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-rw-r--r--arch/mips/mips-boards/malta/malta_int.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c
index c78d48349600..97aeb8c4e601 100644
--- a/arch/mips/mips-boards/malta/malta_int.c
+++ b/arch/mips/mips-boards/malta/malta_int.c
@@ -330,6 +330,18 @@ void __init arch_init_irq(void)
330 (0x100 << MIPSCPU_INT_I8259A)); 330 (0x100 << MIPSCPU_INT_I8259A));
331 setup_irq_smtc (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, 331 setup_irq_smtc (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI,
332 &corehi_irqaction, (0x100 << MIPSCPU_INT_COREHI)); 332 &corehi_irqaction, (0x100 << MIPSCPU_INT_COREHI));
333 /*
334 * Temporary hack to ensure that the subsidiary device
335 * interrupts coing in via the i8259A, but associated
336 * with low IRQ numbers, will restore the Status.IM
337 * value associated with the i8259A.
338 */
339 {
340 int i;
341
342 for (i = 0; i < 16; i++)
343 irq_hwmask[i] = (0x100 << MIPSCPU_INT_I8259A);
344 }
333#else /* Not SMTC */ 345#else /* Not SMTC */
334 setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq); 346 setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
335 setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction); 347 setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction);