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-rw-r--r--arch/mips/configs/bigsur_defconfig9
-rw-r--r--arch/mips/configs/malta_defconfig8
-rw-r--r--arch/mips/mips-boards/generic/display.c4
-rw-r--r--arch/mips/qemu/q-irq.c2
-rw-r--r--include/asm-mips/mach-au1x00/au1100_mmc.h7
5 files changed, 25 insertions, 5 deletions
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index 80b0c99c2cfb..3c70c9d16d01 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -76,9 +76,13 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
76CONFIG_GENERIC_FIND_NEXT_BIT=y 76CONFIG_GENERIC_FIND_NEXT_BIT=y
77CONFIG_GENERIC_HWEIGHT=y 77CONFIG_GENERIC_HWEIGHT=y
78CONFIG_GENERIC_CALIBRATE_DELAY=y 78CONFIG_GENERIC_CALIBRATE_DELAY=y
79CONFIG_GENERIC_CLOCKEVENTS=y
79CONFIG_GENERIC_TIME=y 80CONFIG_GENERIC_TIME=y
81CONFIG_GENERIC_CMOS_UPDATE=y
80CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 82CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
81# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set 83# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
84CONFIG_CEVT_BCM1480=y
85CONFIG_CSRC_BCM1480=y
82CONFIG_DMA_COHERENT=y 86CONFIG_DMA_COHERENT=y
83CONFIG_CPU_BIG_ENDIAN=y 87CONFIG_CPU_BIG_ENDIAN=y
84# CONFIG_CPU_LITTLE_ENDIAN is not set 88# CONFIG_CPU_LITTLE_ENDIAN is not set
@@ -91,6 +95,11 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
91# 95#
92# CPU selection 96# CPU selection
93# 97#
98CONFIG_TICK_ONESHOT=y
99CONFIG_NO_HZ=y
100CONFIG_HIGH_RES_TIMERS=y
101CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
102# CONFIG_CPU_LOONGSON2 is not set
94# CONFIG_CPU_MIPS32_R1 is not set 103# CONFIG_CPU_MIPS32_R1 is not set
95# CONFIG_CPU_MIPS32_R2 is not set 104# CONFIG_CPU_MIPS32_R2 is not set
96# CONFIG_CPU_MIPS64_R1 is not set 105# CONFIG_CPU_MIPS64_R1 is not set
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index fbd2d802fdfd..4b7e43c9f69a 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -49,10 +49,13 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
49CONFIG_GENERIC_FIND_NEXT_BIT=y 49CONFIG_GENERIC_FIND_NEXT_BIT=y
50CONFIG_GENERIC_HWEIGHT=y 50CONFIG_GENERIC_HWEIGHT=y
51CONFIG_GENERIC_CALIBRATE_DELAY=y 51CONFIG_GENERIC_CALIBRATE_DELAY=y
52CONFIG_GENERIC_CLOCKEVENTS=y
52CONFIG_GENERIC_TIME=y 53CONFIG_GENERIC_TIME=y
54CONFIG_GENERIC_CMOS_UPDATE=y
53CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 55CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
54# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set 56# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
55CONFIG_ARCH_MAY_HAVE_PC_FDC=y 57CONFIG_ARCH_MAY_HAVE_PC_FDC=y
58CONFIG_CEVT_R4K=y
56CONFIG_DMA_NONCOHERENT=y 59CONFIG_DMA_NONCOHERENT=y
57CONFIG_DMA_NEED_PCI_MAP_STATE=y 60CONFIG_DMA_NEED_PCI_MAP_STATE=y
58CONFIG_EARLY_PRINTK=y 61CONFIG_EARLY_PRINTK=y
@@ -76,6 +79,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
76# 79#
77# CPU selection 80# CPU selection
78# 81#
82CONFIG_TICK_ONESHOT=y
83CONFIG_NO_HZ=y
84CONFIG_HIGH_RES_TIMERS=y
85CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
79# CONFIG_CPU_LOONGSON2 is not set 86# CONFIG_CPU_LOONGSON2 is not set
80# CONFIG_CPU_MIPS32_R1 is not set 87# CONFIG_CPU_MIPS32_R1 is not set
81CONFIG_CPU_MIPS32_R2=y 88CONFIG_CPU_MIPS32_R2=y
@@ -253,6 +260,7 @@ CONFIG_HW_HAS_PCI=y
253CONFIG_PCI=y 260CONFIG_PCI=y
254# CONFIG_ARCH_SUPPORTS_MSI is not set 261# CONFIG_ARCH_SUPPORTS_MSI is not set
255CONFIG_MMU=y 262CONFIG_MMU=y
263CONFIG_I8253=y
256 264
257# 265#
258# PCCARD (PCMCIA/CardBus) support 266# PCCARD (PCMCIA/CardBus) support
diff --git a/arch/mips/mips-boards/generic/display.c b/arch/mips/mips-boards/generic/display.c
index 5d600054090a..2a0057cfc30d 100644
--- a/arch/mips/mips-boards/generic/display.c
+++ b/arch/mips/mips-boards/generic/display.c
@@ -37,9 +37,9 @@ void mips_display_message(const char *str)
37 37
38 for (i = 0; i <= 14; i=i+2) { 38 for (i = 0; i <= 14; i=i+2) {
39 if (*str) 39 if (*str)
40 writel(*str++, display + i); 40 __raw_writel(*str++, display + i);
41 else 41 else
42 writel(' ', display + i); 42 __raw_writel(' ', display + i);
43 } 43 }
44} 44}
45 45
diff --git a/arch/mips/qemu/q-irq.c b/arch/mips/qemu/q-irq.c
index 11f984767880..7df36dbe65c7 100644
--- a/arch/mips/qemu/q-irq.c
+++ b/arch/mips/qemu/q-irq.c
@@ -33,5 +33,5 @@ void __init arch_init_irq(void)
33 33
34 mips_cpu_irq_init(); 34 mips_cpu_irq_init();
35 init_i8259_irqs(); 35 init_i8259_irqs();
36 set_c0_status(0x8400); 36 set_c0_status(0x400);
37} 37}
diff --git a/include/asm-mips/mach-au1x00/au1100_mmc.h b/include/asm-mips/mach-au1x00/au1100_mmc.h
index 9e7d1ba21b55..9e0028f60a43 100644
--- a/include/asm-mips/mach-au1x00/au1100_mmc.h
+++ b/include/asm-mips/mach-au1x00/au1100_mmc.h
@@ -41,8 +41,11 @@
41 41
42#define NUM_AU1100_MMC_CONTROLLERS 2 42#define NUM_AU1100_MMC_CONTROLLERS 2
43 43
44 44#if defined(CONFIG_SOC_AU1100)
45#define AU1100_SD_IRQ 2 45#define AU1100_SD_IRQ AU1100_SD_INT
46#elif defined(CONFIG_SOC_AU1200)
47#define AU1100_SD_IRQ AU1200_SD_INT
48#endif
46 49
47 50
48#define SD0_BASE 0xB0600000 51#define SD0_BASE 0xB0600000