diff options
| -rw-r--r-- | drivers/i2c/busses/i2c-davinci.c | 77 |
1 files changed, 38 insertions, 39 deletions
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c index 43913c1d50f5..4e33909dd3f0 100644 --- a/drivers/i2c/busses/i2c-davinci.c +++ b/drivers/i2c/busses/i2c-davinci.c | |||
| @@ -38,7 +38,6 @@ | |||
| 38 | #include <linux/slab.h> | 38 | #include <linux/slab.h> |
| 39 | 39 | ||
| 40 | #include <mach/hardware.h> | 40 | #include <mach/hardware.h> |
| 41 | |||
| 42 | #include <mach/i2c.h> | 41 | #include <mach/i2c.h> |
| 43 | 42 | ||
| 44 | /* ----- global defines ----------------------------------------------- */ | 43 | /* ----- global defines ----------------------------------------------- */ |
| @@ -72,37 +71,29 @@ | |||
| 72 | #define DAVINCI_I2C_IVR_NACK 0x02 | 71 | #define DAVINCI_I2C_IVR_NACK 0x02 |
| 73 | #define DAVINCI_I2C_IVR_AL 0x01 | 72 | #define DAVINCI_I2C_IVR_AL 0x01 |
| 74 | 73 | ||
| 75 | #define DAVINCI_I2C_STR_BB (1 << 12) | 74 | #define DAVINCI_I2C_STR_BB BIT(12) |
| 76 | #define DAVINCI_I2C_STR_RSFULL (1 << 11) | 75 | #define DAVINCI_I2C_STR_RSFULL BIT(11) |
| 77 | #define DAVINCI_I2C_STR_SCD (1 << 5) | 76 | #define DAVINCI_I2C_STR_SCD BIT(5) |
| 78 | #define DAVINCI_I2C_STR_ARDY (1 << 2) | 77 | #define DAVINCI_I2C_STR_ARDY BIT(2) |
| 79 | #define DAVINCI_I2C_STR_NACK (1 << 1) | 78 | #define DAVINCI_I2C_STR_NACK BIT(1) |
| 80 | #define DAVINCI_I2C_STR_AL (1 << 0) | 79 | #define DAVINCI_I2C_STR_AL BIT(0) |
| 81 | 80 | ||
| 82 | #define DAVINCI_I2C_MDR_NACK (1 << 15) | 81 | #define DAVINCI_I2C_MDR_NACK BIT(15) |
| 83 | #define DAVINCI_I2C_MDR_STT (1 << 13) | 82 | #define DAVINCI_I2C_MDR_STT BIT(13) |
| 84 | #define DAVINCI_I2C_MDR_STP (1 << 11) | 83 | #define DAVINCI_I2C_MDR_STP BIT(11) |
| 85 | #define DAVINCI_I2C_MDR_MST (1 << 10) | 84 | #define DAVINCI_I2C_MDR_MST BIT(10) |
| 86 | #define DAVINCI_I2C_MDR_TRX (1 << 9) | 85 | #define DAVINCI_I2C_MDR_TRX BIT(9) |
| 87 | #define DAVINCI_I2C_MDR_XA (1 << 8) | 86 | #define DAVINCI_I2C_MDR_XA BIT(8) |
| 88 | #define DAVINCI_I2C_MDR_RM (1 << 7) | 87 | #define DAVINCI_I2C_MDR_RM BIT(7) |
| 89 | #define DAVINCI_I2C_MDR_IRS (1 << 5) | 88 | #define DAVINCI_I2C_MDR_IRS BIT(5) |
| 90 | 89 | ||
| 91 | #define DAVINCI_I2C_IMR_AAS (1 << 6) | 90 | #define DAVINCI_I2C_IMR_AAS BIT(6) |
| 92 | #define DAVINCI_I2C_IMR_SCD (1 << 5) | 91 | #define DAVINCI_I2C_IMR_SCD BIT(5) |
| 93 | #define DAVINCI_I2C_IMR_XRDY (1 << 4) | 92 | #define DAVINCI_I2C_IMR_XRDY BIT(4) |
| 94 | #define DAVINCI_I2C_IMR_RRDY (1 << 3) | 93 | #define DAVINCI_I2C_IMR_RRDY BIT(3) |
| 95 | #define DAVINCI_I2C_IMR_ARDY (1 << 2) | 94 | #define DAVINCI_I2C_IMR_ARDY BIT(2) |
| 96 | #define DAVINCI_I2C_IMR_NACK (1 << 1) | 95 | #define DAVINCI_I2C_IMR_NACK BIT(1) |
| 97 | #define DAVINCI_I2C_IMR_AL (1 << 0) | 96 | #define DAVINCI_I2C_IMR_AL BIT(0) |
| 98 | |||
| 99 | #define MOD_REG_BIT(val, mask, set) do { \ | ||
| 100 | if (set) { \ | ||
| 101 | val |= mask; \ | ||
| 102 | } else { \ | ||
| 103 | val &= ~mask; \ | ||
| 104 | } \ | ||
| 105 | } while (0) | ||
| 106 | 97 | ||
| 107 | struct davinci_i2c_dev { | 98 | struct davinci_i2c_dev { |
| 108 | struct device *dev; | 99 | struct device *dev; |
| @@ -156,7 +147,7 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev) | |||
| 156 | 147 | ||
| 157 | /* put I2C into reset */ | 148 | /* put I2C into reset */ |
| 158 | w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); | 149 | w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); |
| 159 | MOD_REG_BIT(w, DAVINCI_I2C_MDR_IRS, 0); | 150 | w &= ~DAVINCI_I2C_MDR_IRS; |
| 160 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w); | 151 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w); |
| 161 | 152 | ||
| 162 | /* NOTE: I2C Clock divider programming info | 153 | /* NOTE: I2C Clock divider programming info |
| @@ -206,7 +197,7 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev) | |||
| 206 | 197 | ||
| 207 | /* Take the I2C module out of reset: */ | 198 | /* Take the I2C module out of reset: */ |
| 208 | w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); | 199 | w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); |
| 209 | MOD_REG_BIT(w, DAVINCI_I2C_MDR_IRS, 1); | 200 | w |= DAVINCI_I2C_MDR_IRS; |
| 210 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w); | 201 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w); |
| 211 | 202 | ||
| 212 | /* Enable interrupts */ | 203 | /* Enable interrupts */ |
| @@ -288,9 +279,9 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) | |||
| 288 | /* Enable receive or transmit interrupts */ | 279 | /* Enable receive or transmit interrupts */ |
| 289 | w = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG); | 280 | w = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG); |
| 290 | if (msg->flags & I2C_M_RD) | 281 | if (msg->flags & I2C_M_RD) |
| 291 | MOD_REG_BIT(w, DAVINCI_I2C_IMR_RRDY, 1); | 282 | w |= DAVINCI_I2C_IMR_RRDY; |
| 292 | else | 283 | else |
| 293 | MOD_REG_BIT(w, DAVINCI_I2C_IMR_XRDY, 1); | 284 | w |= DAVINCI_I2C_IMR_XRDY; |
| 294 | davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, w); | 285 | davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, w); |
| 295 | 286 | ||
| 296 | dev->terminate = 0; | 287 | dev->terminate = 0; |
| @@ -349,7 +340,7 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) | |||
| 349 | return msg->len; | 340 | return msg->len; |
| 350 | if (stop) { | 341 | if (stop) { |
| 351 | w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); | 342 | w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); |
| 352 | MOD_REG_BIT(w, DAVINCI_I2C_MDR_STP, 1); | 343 | w |= DAVINCI_I2C_MDR_STP; |
| 353 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w); | 344 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w); |
| 354 | } | 345 | } |
| 355 | return -EREMOTEIO; | 346 | return -EREMOTEIO; |
| @@ -485,7 +476,7 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id) | |||
| 485 | 476 | ||
| 486 | w = davinci_i2c_read_reg(dev, | 477 | w = davinci_i2c_read_reg(dev, |
| 487 | DAVINCI_I2C_IMR_REG); | 478 | DAVINCI_I2C_IMR_REG); |
| 488 | MOD_REG_BIT(w, DAVINCI_I2C_IMR_XRDY, 0); | 479 | w &= ~DAVINCI_I2C_IMR_XRDY; |
| 489 | davinci_i2c_write_reg(dev, | 480 | davinci_i2c_write_reg(dev, |
| 490 | DAVINCI_I2C_IMR_REG, | 481 | DAVINCI_I2C_IMR_REG, |
| 491 | w); | 482 | w); |
| @@ -564,7 +555,12 @@ static int davinci_i2c_probe(struct platform_device *pdev) | |||
| 564 | } | 555 | } |
| 565 | clk_enable(dev->clk); | 556 | clk_enable(dev->clk); |
| 566 | 557 | ||
| 567 | dev->base = (void __iomem *)IO_ADDRESS(mem->start); | 558 | dev->base = ioremap(mem->start, resource_size(mem)); |
| 559 | if (!dev->base) { | ||
| 560 | r = -EBUSY; | ||
| 561 | goto err_mem_ioremap; | ||
| 562 | } | ||
| 563 | |||
| 568 | i2c_davinci_init(dev); | 564 | i2c_davinci_init(dev); |
| 569 | 565 | ||
| 570 | r = request_irq(dev->irq, i2c_davinci_isr, 0, pdev->name, dev); | 566 | r = request_irq(dev->irq, i2c_davinci_isr, 0, pdev->name, dev); |
| @@ -594,6 +590,8 @@ static int davinci_i2c_probe(struct platform_device *pdev) | |||
| 594 | err_free_irq: | 590 | err_free_irq: |
| 595 | free_irq(dev->irq, dev); | 591 | free_irq(dev->irq, dev); |
| 596 | err_unuse_clocks: | 592 | err_unuse_clocks: |
| 593 | iounmap(dev->base); | ||
| 594 | err_mem_ioremap: | ||
| 597 | clk_disable(dev->clk); | 595 | clk_disable(dev->clk); |
| 598 | clk_put(dev->clk); | 596 | clk_put(dev->clk); |
| 599 | dev->clk = NULL; | 597 | dev->clk = NULL; |
| @@ -622,6 +620,7 @@ static int davinci_i2c_remove(struct platform_device *pdev) | |||
| 622 | 620 | ||
| 623 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, 0); | 621 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, 0); |
| 624 | free_irq(IRQ_I2C, dev); | 622 | free_irq(IRQ_I2C, dev); |
| 623 | iounmap(dev->base); | ||
| 625 | kfree(dev); | 624 | kfree(dev); |
| 626 | 625 | ||
| 627 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 626 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
