1009 files changed, 43579 insertions, 27911 deletions
diff --git a/Documentation/Changes b/Documentation/Changes
index 6d0f1efc5bf6..f08b313cd235 100644
--- a/Documentation/Changes
+++ b/Documentation/Changes
@@ -49,6 +49,8 @@ o  oprofile               0.9                     # oprofiled --version
 o  udev                   081                     # udevinfo -V
 o  grub                   0.93                    # grub --version
 o  mcelog                 0.6
+o  iptables               1.4.1                   # iptables -V
 Kernel compilation
 ==================
diff --git a/Documentation/DocBook/Makefile b/Documentation/DocBook/Makefile
index ab8300f67182..325cfd1d6d99 100644
--- a/Documentation/DocBook/Makefile
+++ b/Documentation/DocBook/Makefile
@@ -8,7 +8,7 @@
 DOCBOOKS := z8530book.xml mcabook.xml device-drivers.xml \
            kernel-hacking.xml kernel-locking.xml deviceiobook.xml \
-            procfs-guide.xml writing_usb_driver.xml networking.xml \
+            writing_usb_driver.xml networking.xml \
            kernel-api.xml filesystems.xml lsm.xml usb.xml kgdb.xml \
            gadget.xml libata.xml mtdnand.xml librs.xml rapidio.xml \
            genericirq.xml s390-drivers.xml uio-howto.xml scsi.xml \
@@ -32,10 +32,10 @@ PS_METHOD	= $(prefer-db2x)
 ###
 # The targets that may be used.
-PHONY += xmldocs sgmldocs psdocs pdfdocs htmldocs mandocs installmandocs cleandocs media
+PHONY += xmldocs sgmldocs psdocs pdfdocs htmldocs mandocs installmandocs cleandocs xmldoclinks
 BOOKS := $(addprefix $(obj)/,$(DOCBOOKS))
-xmldocs: $(BOOKS)
+xmldocs: $(BOOKS) xmldoclinks
 sgmldocs: xmldocs
 PS := $(patsubst %.xml, %.ps, $(BOOKS))
@@ -45,15 +45,24 @@ PDF := $(patsubst %.xml, %.pdf, $(BOOKS))
 pdfdocs: $(PDF)
 HTML := $(sort $(patsubst %.xml, %.html, $(BOOKS)))
-htmldocs: media $(HTML)
+htmldocs: $(HTML)
        $(call build_main_index)
+        $(call build_images)
 MAN := $(patsubst %.xml, %.9, $(BOOKS))
 mandocs: $(MAN)
-media:
+build_images = mkdir -p $(objtree)/Documentation/DocBook/media/ && \
-        mkdir -p $(srctree)/Documentation/DocBook/media/
+               cp $(srctree)/Documentation/DocBook/dvb/*.png $(srctree)/Documentation/DocBook/v4l/*.gif $(objtree)/Documentation/DocBook/media/
-        cp $(srctree)/Documentation/DocBook/dvb/*.png $(srctree)/Documentation/DocBook/v4l/*.gif $(srctree)/Documentation/DocBook/media/
+xmldoclinks:
+ifneq ($(objtree),$(srctree))
+        for dep in dvb media-entities.tmpl media-indices.tmpl v4l; do \
+                rm -f $(objtree)/Documentation/DocBook/$$dep \
+                && ln -s $(srctree)/Documentation/DocBook/$$dep $(objtree)/Documentation/DocBook/ \
+                || exit; \
+        done
+endif
 installmandocs: mandocs
        mkdir -p /usr/local/man/man9/
@@ -65,7 +74,7 @@ KERNELDOC = $(srctree)/scripts/kernel-doc
 DOCPROC   = $(objtree)/scripts/basic/docproc
 XMLTOFLAGS = -m $(srctree)/Documentation/DocBook/stylesheet.xsl
-#XMLTOFLAGS += --skip-validation
+XMLTOFLAGS += --skip-validation
 ###
 # DOCPROC is used for two purposes:
@@ -101,17 +110,6 @@ endif
 # Changes in kernel-doc force a rebuild of all documentation
 $(BOOKS): $(KERNELDOC)
-###
-# procfs guide uses a .c file as example code.
-# This requires an explicit dependency
-C-procfs-example = procfs_example.xml
-C-procfs-example2 = $(addprefix $(obj)/,$(C-procfs-example))
-$(obj)/procfs-guide.xml: $(C-procfs-example2)
-# List of programs to build
-##oops, this is a kernel module::hostprogs-y := procfs_example
-obj-m += procfs_example.o
 # Tell kbuild to always build the programs
 always := $(hostprogs-y)
@@ -238,7 +236,7 @@ clean-files := $(DOCBOOKS) \
        $(patsubst %.xml, %.pdf,  $(DOCBOOKS)) \
        $(patsubst %.xml, %.html, $(DOCBOOKS)) \
        $(patsubst %.xml, %.9,    $(DOCBOOKS)) \
-        $(C-procfs-example) $(index)
+        $(index)
 clean-dirs := $(patsubst %.xml,%,$(DOCBOOKS)) man
diff --git a/Documentation/DocBook/media-entities.tmpl b/Documentation/DocBook/media-entities.tmpl
index bb5ab741220e..c725cb852c54 100644
--- a/Documentation/DocBook/media-entities.tmpl
+++ b/Documentation/DocBook/media-entities.tmpl
@@ -23,6 +23,7 @@
 <!ENTITY VIDIOC-ENUMINPUT "<link linkend='vidioc-enuminput'><constant>VIDIOC_ENUMINPUT</constant></link>">
 <!ENTITY VIDIOC-ENUMOUTPUT "<link linkend='vidioc-enumoutput'><constant>VIDIOC_ENUMOUTPUT</constant></link>">
 <!ENTITY VIDIOC-ENUMSTD "<link linkend='vidioc-enumstd'><constant>VIDIOC_ENUMSTD</constant></link>">
+<!ENTITY VIDIOC-ENUM-DV-PRESETS "<link linkend='vidioc-enum-dv-presets'><constant>VIDIOC_ENUM_DV_PRESETS</constant></link>">
 <!ENTITY VIDIOC-ENUM-FMT "<link linkend='vidioc-enum-fmt'><constant>VIDIOC_ENUM_FMT</constant></link>">
 <!ENTITY VIDIOC-ENUM-FRAMEINTERVALS "<link linkend='vidioc-enum-frameintervals'><constant>VIDIOC_ENUM_FRAMEINTERVALS</constant></link>">
 <!ENTITY VIDIOC-ENUM-FRAMESIZES "<link linkend='vidioc-enum-framesizes'><constant>VIDIOC_ENUM_FRAMESIZES</constant></link>">
@@ -30,6 +31,8 @@
 <!ENTITY VIDIOC-G-AUDOUT "<link linkend='vidioc-g-audioout'><constant>VIDIOC_G_AUDOUT</constant></link>">
 <!ENTITY VIDIOC-G-CROP "<link linkend='vidioc-g-crop'><constant>VIDIOC_G_CROP</constant></link>">
 <!ENTITY VIDIOC-G-CTRL "<link linkend='vidioc-g-ctrl'><constant>VIDIOC_G_CTRL</constant></link>">
+<!ENTITY VIDIOC-G-DV-PRESET "<link linkend='vidioc-g-dv-preset'><constant>VIDIOC_G_DV_PRESET</constant></link>">
+<!ENTITY VIDIOC-G-DV-TIMINGS "<link linkend='vidioc-g-dv-timings'><constant>VIDIOC_G_DV_TIMINGS</constant></link>">
 <!ENTITY VIDIOC-G-ENC-INDEX "<link linkend='vidioc-g-enc-index'><constant>VIDIOC_G_ENC_INDEX</constant></link>">
 <!ENTITY VIDIOC-G-EXT-CTRLS "<link linkend='vidioc-g-ext-ctrls'><constant>VIDIOC_G_EXT_CTRLS</constant></link>">
 <!ENTITY VIDIOC-G-FBUF "<link linkend='vidioc-g-fbuf'><constant>VIDIOC_G_FBUF</constant></link>">
@@ -53,6 +56,7 @@
 <!ENTITY VIDIOC-QUERYCTRL "<link linkend='vidioc-queryctrl'><constant>VIDIOC_QUERYCTRL</constant></link>">
 <!ENTITY VIDIOC-QUERYMENU "<link linkend='vidioc-queryctrl'><constant>VIDIOC_QUERYMENU</constant></link>">
 <!ENTITY VIDIOC-QUERYSTD "<link linkend='vidioc-querystd'><constant>VIDIOC_QUERYSTD</constant></link>">
+<!ENTITY VIDIOC-QUERY-DV-PRESET "<link linkend='vidioc-query-dv-preset'><constant>VIDIOC_QUERY_DV_PRESET</constant></link>">
 <!ENTITY VIDIOC-REQBUFS "<link linkend='vidioc-reqbufs'><constant>VIDIOC_REQBUFS</constant></link>">
 <!ENTITY VIDIOC-STREAMOFF "<link linkend='vidioc-streamon'><constant>VIDIOC_STREAMOFF</constant></link>">
 <!ENTITY VIDIOC-STREAMON "<link linkend='vidioc-streamon'><constant>VIDIOC_STREAMON</constant></link>">
@@ -60,6 +64,8 @@
 <!ENTITY VIDIOC-S-AUDOUT "<link linkend='vidioc-g-audioout'><constant>VIDIOC_S_AUDOUT</constant></link>">
 <!ENTITY VIDIOC-S-CROP "<link linkend='vidioc-g-crop'><constant>VIDIOC_S_CROP</constant></link>">
 <!ENTITY VIDIOC-S-CTRL "<link linkend='vidioc-g-ctrl'><constant>VIDIOC_S_CTRL</constant></link>">
+<!ENTITY VIDIOC-S-DV-PRESET "<link linkend='vidioc-g-dv-preset'><constant>VIDIOC_S_DV_PRESET</constant></link>">
+<!ENTITY VIDIOC-S-DV-TIMINGS "<link linkend='vidioc-g-dv-timings'><constant>VIDIOC_S_DV_TIMINGS</constant></link>">
 <!ENTITY VIDIOC-S-EXT-CTRLS "<link linkend='vidioc-g-ext-ctrls'><constant>VIDIOC_S_EXT_CTRLS</constant></link>">
 <!ENTITY VIDIOC-S-FBUF "<link linkend='vidioc-g-fbuf'><constant>VIDIOC_S_FBUF</constant></link>">
 <!ENTITY VIDIOC-S-FMT "<link linkend='vidioc-g-fmt'><constant>VIDIOC_S_FMT</constant></link>">
@@ -118,6 +124,7 @@
 <!-- Structures -->
 <!ENTITY v4l2-audio "struct&nbsp;<link linkend='v4l2-audio'>v4l2_audio</link>">
 <!ENTITY v4l2-audioout "struct&nbsp;<link linkend='v4l2-audioout'>v4l2_audioout</link>">
+<!ENTITY v4l2-bt-timings "struct&nbsp;<link linkend='v4l2-bt-timings'>v4l2_bt_timings</link>">
 <!ENTITY v4l2-buffer "struct&nbsp;<link linkend='v4l2-buffer'>v4l2_buffer</link>">
 <!ENTITY v4l2-capability "struct&nbsp;<link linkend='v4l2-capability'>v4l2_capability</link>">
 <!ENTITY v4l2-captureparm "struct&nbsp;<link linkend='v4l2-captureparm'>v4l2_captureparm</link>">
@@ -128,6 +135,9 @@
 <!ENTITY v4l2-dbg-chip-ident "struct&nbsp;<link linkend='v4l2-dbg-chip-ident'>v4l2_dbg_chip_ident</link>">
 <!ENTITY v4l2-dbg-match "struct&nbsp;<link linkend='v4l2-dbg-match'>v4l2_dbg_match</link>">
 <!ENTITY v4l2-dbg-register "struct&nbsp;<link linkend='v4l2-dbg-register'>v4l2_dbg_register</link>">
+<!ENTITY v4l2-dv-enum-preset "struct&nbsp;<link linkend='v4l2-dv-enum-preset'>v4l2_dv_enum_preset</link>">
+<!ENTITY v4l2-dv-preset "struct&nbsp;<link linkend='v4l2-dv-preset'>v4l2_dv_preset</link>">
+<!ENTITY v4l2-dv-timings "struct&nbsp;<link linkend='v4l2-dv-timings'>v4l2_dv_timings</link>">
 <!ENTITY v4l2-enc-idx "struct&nbsp;<link linkend='v4l2-enc-idx'>v4l2_enc_idx</link>">
 <!ENTITY v4l2-enc-idx-entry "struct&nbsp;<link linkend='v4l2-enc-idx-entry'>v4l2_enc_idx_entry</link>">
 <!ENTITY v4l2-encoder-cmd "struct&nbsp;<link linkend='v4l2-encoder-cmd'>v4l2_encoder_cmd</link>">
@@ -243,6 +253,10 @@
 <!ENTITY sub-enumaudioout SYSTEM "v4l/vidioc-enumaudioout.xml">
 <!ENTITY sub-enuminput SYSTEM "v4l/vidioc-enuminput.xml">
 <!ENTITY sub-enumoutput SYSTEM "v4l/vidioc-enumoutput.xml">
+<!ENTITY sub-enum-dv-presets SYSTEM "v4l/vidioc-enum-dv-presets.xml">
+<!ENTITY sub-g-dv-preset SYSTEM "v4l/vidioc-g-dv-preset.xml">
+<!ENTITY sub-query-dv-preset SYSTEM "v4l/vidioc-query-dv-preset.xml">
+<!ENTITY sub-g-dv-timings SYSTEM "v4l/vidioc-g-dv-timings.xml">
 <!ENTITY sub-enumstd SYSTEM "v4l/vidioc-enumstd.xml">
 <!ENTITY sub-g-audio SYSTEM "v4l/vidioc-g-audio.xml">
 <!ENTITY sub-g-audioout SYSTEM "v4l/vidioc-g-audioout.xml">
@@ -333,6 +347,10 @@
 <!ENTITY enumaudioout SYSTEM "v4l/vidioc-enumaudioout.xml">
 <!ENTITY enuminput SYSTEM "v4l/vidioc-enuminput.xml">
 <!ENTITY enumoutput SYSTEM "v4l/vidioc-enumoutput.xml">
+<!ENTITY enum-dv-presets SYSTEM "v4l/vidioc-enum-dv-presets.xml">
+<!ENTITY g-dv-preset SYSTEM "v4l/vidioc-g-dv-preset.xml">
+<!ENTITY query-dv-preset SYSTEM "v4l/vidioc-query-dv-preset.xml">
+<!ENTITY g-dv-timings SYSTEM "v4l/vidioc-g-dv-timings.xml">
 <!ENTITY enumstd SYSTEM "v4l/vidioc-enumstd.xml">
 <!ENTITY g-audio SYSTEM "v4l/vidioc-g-audio.xml">
 <!ENTITY g-audioout SYSTEM "v4l/vidioc-g-audioout.xml">
diff --git a/Documentation/DocBook/media-indices.tmpl b/Documentation/DocBook/media-indices.tmpl
index 9e30a236d74f..78d6031de001 100644
--- a/Documentation/DocBook/media-indices.tmpl
+++ b/Documentation/DocBook/media-indices.tmpl
@@ -36,6 +36,7 @@
 <indexentry><primaryie>enum&nbsp;<link linkend='v4l2-preemphasis'>v4l2_preemphasis</link></primaryie></indexentry>
 <indexentry><primaryie>struct&nbsp;<link linkend='v4l2-audio'>v4l2_audio</link></primaryie></indexentry>
 <indexentry><primaryie>struct&nbsp;<link linkend='v4l2-audioout'>v4l2_audioout</link></primaryie></indexentry>
+<indexentry><primaryie>struct&nbsp;<link linkend='v4l2-bt-timings'>v4l2_bt_timings</link></primaryie></indexentry>
 <indexentry><primaryie>struct&nbsp;<link linkend='v4l2-buffer'>v4l2_buffer</link></primaryie></indexentry>
 <indexentry><primaryie>struct&nbsp;<link linkend='v4l2-capability'>v4l2_capability</link></primaryie></indexentry>
 <indexentry><primaryie>struct&nbsp;<link linkend='v4l2-captureparm'>v4l2_captureparm</link></primaryie></indexentry>
@@ -46,6 +47,9 @@
 <indexentry><primaryie>struct&nbsp;<link linkend='v4l2-dbg-chip-ident'>v4l2_dbg_chip_ident</link></primaryie></indexentry>
 <indexentry><primaryie>struct&nbsp;<link linkend='v4l2-dbg-match'>v4l2_dbg_match</link></primaryie></indexentry>
 <indexentry><primaryie>struct&nbsp;<link linkend='v4l2-dbg-register'>v4l2_dbg_register</link></primaryie></indexentry>
+<indexentry><primaryie>struct&nbsp;<link linkend='v4l2-dv-enum-preset'>v4l2_dv_enum_preset</link></primaryie></indexentry>
+<indexentry><primaryie>struct&nbsp;<link linkend='v4l2-dv-preset'>v4l2_dv_preset</link></primaryie></indexentry>
+<indexentry><primaryie>struct&nbsp;<link linkend='v4l2-dv-timings'>v4l2_dv_timings</link></primaryie></indexentry>
 <indexentry><primaryie>struct&nbsp;<link linkend='v4l2-enc-idx'>v4l2_enc_idx</link></primaryie></indexentry>
 <indexentry><primaryie>struct&nbsp;<link linkend='v4l2-enc-idx-entry'>v4l2_enc_idx_entry</link></primaryie></indexentry>
 <indexentry><primaryie>struct&nbsp;<link linkend='v4l2-encoder-cmd'>v4l2_encoder_cmd</link></primaryie></indexentry>
diff --git a/Documentation/DocBook/procfs-guide.tmpl b/Documentation/DocBook/procfs-guide.tmpl
deleted file mode 100644
index 9eba4b7af73d..000000000000
--- a/Documentation/DocBook/procfs-guide.tmpl
+++ /dev/null
@@ -1,626 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
-        "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" [
-<!ENTITY procfsexample SYSTEM "procfs_example.xml">
-]>
-<book id="LKProcfsGuide">
-  <bookinfo>
-    <title>Linux Kernel Procfs Guide</title>
-    <authorgroup>
-      <author>
-        <firstname>Erik</firstname>
-        <othername>(J.A.K.)</othername>
-        <surname>Mouw</surname>
-        <affiliation>
-          <address>
-            <email>mouw@nl.linux.org</email>
-          </address>
-        </affiliation>
-      </author>
-      <othercredit>
-        <contrib>
-        This software and documentation were written while working on the
-        LART computing board
-        (<ulink url="http://www.lartmaker.nl/">http://www.lartmaker.nl/</ulink>),
-        which was sponsored by the Delt University of Technology projects
-        Mobile Multi-media Communications and Ubiquitous Communications.
-        </contrib>
-      </othercredit>
-    </authorgroup>
-    <revhistory>
-      <revision>
-        <revnumber>1.0</revnumber>
-        <date>May 30, 2001</date>
-        <revremark>Initial revision posted to linux-kernel</revremark>
-      </revision>
-      <revision>
-        <revnumber>1.1</revnumber>
-        <date>June 3, 2001</date>
-        <revremark>Revised after comments from linux-kernel</revremark>
-      </revision>
-    </revhistory>
-    <copyright>
-      <year>2001</year>
-      <holder>Erik Mouw</holder>
-    </copyright>
-    <legalnotice>
-      <para>
-        This documentation is free software; you can redistribute it
-        and/or modify it under the terms of the GNU General Public
-        License as published by the Free Software Foundation; either
-        version 2 of the License, or (at your option) any later
-        version.
-      </para>
-      
-      <para>
-        This documentation is distributed in the hope that it will be
-        useful, but WITHOUT ANY WARRANTY; without even the implied
-        warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
-        PURPOSE.  See the GNU General Public License for more details.
-      </para>
-      
-      <para>
-        You should have received a copy of the GNU General Public
-        License along with this program; if not, write to the Free
-        Software Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-        MA 02111-1307 USA
-      </para>
-      
-      <para>
-        For more details see the file COPYING in the source
-        distribution of Linux.
-      </para>
-    </legalnotice>
-  </bookinfo>
-  <toc>
-  </toc>
-  <preface id="Preface">
-    <title>Preface</title>
-    <para>
-      This guide describes the use of the procfs file system from
-      within the Linux kernel. The idea to write this guide came up on
-      the #kernelnewbies IRC channel (see <ulink
-      url="http://www.kernelnewbies.org/">http://www.kernelnewbies.org/</ulink>),
-      when Jeff Garzik explained the use of procfs and forwarded me a
-      message Alexander Viro wrote to the linux-kernel mailing list. I
-      agreed to write it up nicely, so here it is.
-    </para>
-    <para>
-      I'd like to thank Jeff Garzik
-      <email>jgarzik@pobox.com</email> and Alexander Viro
-      <email>viro@parcelfarce.linux.theplanet.co.uk</email> for their input,
-      Tim Waugh <email>twaugh@redhat.com</email> for his <ulink
-      url="http://people.redhat.com/twaugh/docbook/selfdocbook/">Selfdocbook</ulink>,
-      and Marc Joosen <email>marcj@historia.et.tudelft.nl</email> for
-      proofreading.
-    </para>
-    <para>
-      Erik
-    </para>
-  </preface>
-  <chapter id="intro">
-    <title>Introduction</title>
-    <para>
-      The <filename class="directory">/proc</filename> file system
-      (procfs) is a special file system in the linux kernel. It's a
-      virtual file system: it is not associated with a block device
-      but exists only in memory. The files in the procfs are there to
-      allow userland programs access to certain information from the
-      kernel (like process information in <filename
-      class="directory">/proc/[0-9]+/</filename>), but also for debug
-      purposes (like <filename>/proc/ksyms</filename>).
-    </para>
-    <para>
-      This guide describes the use of the procfs file system from
-      within the Linux kernel. It starts by introducing all relevant
-      functions to manage the files within the file system. After that
-      it shows how to communicate with userland, and some tips and
-      tricks will be pointed out. Finally a complete example will be
-      shown.
-    </para>
-    <para>
-      Note that the files in <filename
-      class="directory">/proc/sys</filename> are sysctl files: they
-      don't belong to procfs and are governed by a completely
-      different API described in the Kernel API book.
-    </para>
-  </chapter>
-  <chapter id="managing">
-    <title>Managing procfs entries</title>
-    
-    <para>
-      This chapter describes the functions that various kernel
-      components use to populate the procfs with files, symlinks,
-      device nodes, and directories.
-    </para>
-    <para>
-      A minor note before we start: if you want to use any of the
-      procfs functions, be sure to include the correct header file! 
-      This should be one of the first lines in your code:
-    </para>
-    <programlisting>
-#include &lt;linux/proc_fs.h&gt;
-    </programlisting>
-    <sect1 id="regularfile">
-      <title>Creating a regular file</title>
-      
-      <funcsynopsis>
-        <funcprototype>
-          <funcdef>struct proc_dir_entry* <function>create_proc_entry</function></funcdef>
-          <paramdef>const char* <parameter>name</parameter></paramdef>
-          <paramdef>mode_t <parameter>mode</parameter></paramdef>
-          <paramdef>struct proc_dir_entry* <parameter>parent</parameter></paramdef>
-        </funcprototype>
-      </funcsynopsis>
-      <para>
-        This function creates a regular file with the name
-        <parameter>name</parameter>, file mode
-        <parameter>mode</parameter> in the directory
-        <parameter>parent</parameter>. To create a file in the root of
-        the procfs, use <constant>NULL</constant> as
-        <parameter>parent</parameter> parameter. When successful, the
-        function will return a pointer to the freshly created
-        <structname>struct proc_dir_entry</structname>; otherwise it
-        will return <constant>NULL</constant>. <xref
-        linkend="userland"/> describes how to do something useful with
-        regular files.
-      </para>
-      <para>
-        Note that it is specifically supported that you can pass a
-        path that spans multiple directories. For example
-        <function>create_proc_entry</function>(<parameter>"drivers/via0/info"</parameter>)
-        will create the <filename class="directory">via0</filename>
-        directory if necessary, with standard
-        <constant>0755</constant> permissions.
-      </para>
-    <para>
-      If you only want to be able to read the file, the function
-      <function>create_proc_read_entry</function> described in <xref
-      linkend="convenience"/> may be used to create and initialise
-      the procfs entry in one single call.
-    </para>
-    </sect1>
-    <sect1 id="Creating_a_symlink">
-      <title>Creating a symlink</title>
-      <funcsynopsis>
-        <funcprototype>
-          <funcdef>struct proc_dir_entry*
-          <function>proc_symlink</function></funcdef> <paramdef>const
-          char* <parameter>name</parameter></paramdef>
-          <paramdef>struct proc_dir_entry*
-          <parameter>parent</parameter></paramdef> <paramdef>const
-          char* <parameter>dest</parameter></paramdef>
-        </funcprototype>
-      </funcsynopsis>
-      
-      <para>
-        This creates a symlink in the procfs directory
-        <parameter>parent</parameter> that points from
-        <parameter>name</parameter> to
-        <parameter>dest</parameter>. This translates in userland to
-        <literal>ln -s</literal> <parameter>dest</parameter>
-        <parameter>name</parameter>.
-      </para>
-    </sect1>
-    <sect1 id="Creating_a_directory">
-      <title>Creating a directory</title>
-      
-      <funcsynopsis>
-        <funcprototype>
-          <funcdef>struct proc_dir_entry* <function>proc_mkdir</function></funcdef>
-          <paramdef>const char* <parameter>name</parameter></paramdef>
-          <paramdef>struct proc_dir_entry* <parameter>parent</parameter></paramdef>
-        </funcprototype>
-      </funcsynopsis>
-      <para>
-        Create a directory <parameter>name</parameter> in the procfs
-        directory <parameter>parent</parameter>.
-      </para>
-    </sect1>
-    <sect1 id="Removing_an_entry">
-      <title>Removing an entry</title>
-      
-      <funcsynopsis>
-        <funcprototype>
-          <funcdef>void <function>remove_proc_entry</function></funcdef>
-          <paramdef>const char* <parameter>name</parameter></paramdef>
-          <paramdef>struct proc_dir_entry* <parameter>parent</parameter></paramdef>
-        </funcprototype>
-      </funcsynopsis>
-      <para>
-        Removes the entry <parameter>name</parameter> in the directory
-        <parameter>parent</parameter> from the procfs. Entries are
-        removed by their <emphasis>name</emphasis>, not by the
-        <structname>struct proc_dir_entry</structname> returned by the
-        various create functions. Note that this function doesn't
-        recursively remove entries.
-      </para>
-      <para>
-        Be sure to free the <structfield>data</structfield> entry from
-        the <structname>struct proc_dir_entry</structname> before
-        <function>remove_proc_entry</function> is called (that is: if
-        there was some <structfield>data</structfield> allocated, of
-        course). See <xref linkend="usingdata"/> for more information
-        on using the <structfield>data</structfield> entry.
-      </para>
-    </sect1>
-  </chapter>
-  <chapter id="userland">
-    <title>Communicating with userland</title>
-    
-    <para>
-       Instead of reading (or writing) information directly from
-       kernel memory, procfs works with <emphasis>call back
-       functions</emphasis> for files: functions that are called when
-       a specific file is being read or written. Such functions have
-       to be initialised after the procfs file is created by setting
-       the <structfield>read_proc</structfield> and/or
-       <structfield>write_proc</structfield> fields in the
-       <structname>struct proc_dir_entry*</structname> that the
-       function <function>create_proc_entry</function> returned:
-    </para>
-    <programlisting>
-struct proc_dir_entry* entry;
-entry->read_proc = read_proc_foo;
-entry->write_proc = write_proc_foo;
-    </programlisting>
-    <para>
-      If you only want to use a the
-      <structfield>read_proc</structfield>, the function
-      <function>create_proc_read_entry</function> described in <xref
-      linkend="convenience"/> may be used to create and initialise the
-      procfs entry in one single call.
-    </para>
-    <sect1 id="Reading_data">
-      <title>Reading data</title>
-      <para>
-        The read function is a call back function that allows userland
-        processes to read data from the kernel. The read function
-        should have the following format:
-      </para>
-      <funcsynopsis>
-        <funcprototype>
-          <funcdef>int <function>read_func</function></funcdef>
-          <paramdef>char* <parameter>buffer</parameter></paramdef>
-          <paramdef>char** <parameter>start</parameter></paramdef>
-          <paramdef>off_t <parameter>off</parameter></paramdef>
-          <paramdef>int <parameter>count</parameter></paramdef>
-          <paramdef>int* <parameter>peof</parameter></paramdef>
-          <paramdef>void* <parameter>data</parameter></paramdef>
-        </funcprototype>
-      </funcsynopsis>
-      <para>
-        The read function should write its information into the
-        <parameter>buffer</parameter>, which will be exactly
-        <literal>PAGE_SIZE</literal> bytes long.
-      </para>
-      <para>
-        The parameter
-        <parameter>peof</parameter> should be used to signal that the
-        end of the file has been reached by writing
-        <literal>1</literal> to the memory location
-        <parameter>peof</parameter> points to.
-      </para>
-      <para>
-        The <parameter>data</parameter>
-        parameter can be used to create a single call back function for
-        several files, see <xref linkend="usingdata"/>.
-      </para>
-      <para>
-        The rest of the parameters and the return value are described
-        by a comment in <filename>fs/proc/generic.c</filename> as follows:
-      </para>
-      <blockquote>
-        <para>
-        You have three ways to return data:
-        </para>
-        <orderedlist>
-          <listitem>
-            <para>
-              Leave <literal>*start = NULL</literal>.  (This is the default.)
-              Put the data of the requested offset at that
-              offset within the buffer.  Return the number (<literal>n</literal>)
-              of bytes there are from the beginning of the
-              buffer up to the last byte of data.  If the
-              number of supplied bytes (<literal>= n - offset</literal>) is
-              greater than zero and you didn't signal eof
-              and the reader is prepared to take more data
-              you will be called again with the requested
-              offset advanced by the number of bytes
-              absorbed.  This interface is useful for files
-              no larger than the buffer.
-            </para>
-          </listitem>
-          <listitem>
-            <para>
-              Set <literal>*start</literal> to an unsigned long value less than
-              the buffer address but greater than zero.
-              Put the data of the requested offset at the
-              beginning of the buffer.  Return the number of
-              bytes of data placed there.  If this number is
-              greater than zero and you didn't signal eof
-              and the reader is prepared to take more data
-              you will be called again with the requested
-              offset advanced by <literal>*start</literal>.  This interface is
-              useful when you have a large file consisting
-              of a series of blocks which you want to count
-              and return as wholes.
-              (Hack by Paul.Russell@rustcorp.com.au)
-            </para>
-          </listitem>
-          <listitem>
-            <para>
-              Set <literal>*start</literal> to an address within the buffer.
-              Put the data of the requested offset at <literal>*start</literal>.
-              Return the number of bytes of data placed there.
-              If this number is greater than zero and you
-              didn't signal eof and the reader is prepared to
-              take more data you will be called again with the
-              requested offset advanced by the number of bytes
-              absorbed.
-            </para>
-          </listitem>
-        </orderedlist>
-      </blockquote>
-      <para>
-        <xref linkend="example"/> shows how to use a read call back
-        function.
-      </para>
-    </sect1>
-    <sect1 id="Writing_data">
-      <title>Writing data</title>
-      <para>
-        The write call back function allows a userland process to write
-        data to the kernel, so it has some kind of control over the
-        kernel. The write function should have the following format:
-      </para>
-      <funcsynopsis>
-        <funcprototype>
-          <funcdef>int <function>write_func</function></funcdef>
-          <paramdef>struct file* <parameter>file</parameter></paramdef>
-          <paramdef>const char* <parameter>buffer</parameter></paramdef>
-          <paramdef>unsigned long <parameter>count</parameter></paramdef>
-          <paramdef>void* <parameter>data</parameter></paramdef>
-        </funcprototype>
-      </funcsynopsis>
-      <para>
-        The write function should read <parameter>count</parameter>
-        bytes at maximum from the <parameter>buffer</parameter>. Note
-        that the <parameter>buffer</parameter> doesn't live in the
-        kernel's memory space, so it should first be copied to kernel
-        space with <function>copy_from_user</function>. The
-        <parameter>file</parameter> parameter is usually
-        ignored. <xref linkend="usingdata"/> shows how to use the
-        <parameter>data</parameter> parameter.
-      </para>
-      <para>
-        Again, <xref linkend="example"/> shows how to use this call back
-        function.
-      </para>
-    </sect1>
-    <sect1 id="usingdata">
-      <title>A single call back for many files</title>
-      <para>
-         When a large number of almost identical files is used, it's
-         quite inconvenient to use a separate call back function for
-         each file. A better approach is to have a single call back
-         function that distinguishes between the files by using the
-         <structfield>data</structfield> field in <structname>struct
-         proc_dir_entry</structname>. First of all, the
-         <structfield>data</structfield> field has to be initialised:
-      </para>
-      <programlisting>
-struct proc_dir_entry* entry;
-struct my_file_data *file_data;
-file_data = kmalloc(sizeof(struct my_file_data), GFP_KERNEL);
-entry->data = file_data;
-      </programlisting>
-     
-      <para>
-          The <structfield>data</structfield> field is a <type>void
-          *</type>, so it can be initialised with anything.
-      </para>
-      <para>
-        Now that the <structfield>data</structfield> field is set, the
-        <function>read_proc</function> and
-        <function>write_proc</function> can use it to distinguish
-        between files because they get it passed into their
-        <parameter>data</parameter> parameter:
-      </para>
-      <programlisting>
-int foo_read_func(char *page, char **start, off_t off,
-                  int count, int *eof, void *data)
-{
-        int len;
-        if(data == file_data) {
-                /* special case for this file */
-        } else {
-                /* normal processing */
-        }
-        return len;
-}
-      </programlisting>
-      <para>
-        Be sure to free the <structfield>data</structfield> data field
-        when removing the procfs entry.
-      </para>
-    </sect1>
-  </chapter>
-  <chapter id="tips">
-    <title>Tips and tricks</title>
-    <sect1 id="convenience">
-      <title>Convenience functions</title>
-      <funcsynopsis>
-        <funcprototype>
-          <funcdef>struct proc_dir_entry* <function>create_proc_read_entry</function></funcdef>
-          <paramdef>const char* <parameter>name</parameter></paramdef>
-          <paramdef>mode_t <parameter>mode</parameter></paramdef>
-          <paramdef>struct proc_dir_entry* <parameter>parent</parameter></paramdef>
-          <paramdef>read_proc_t* <parameter>read_proc</parameter></paramdef>
-          <paramdef>void* <parameter>data</parameter></paramdef>
-        </funcprototype>
-      </funcsynopsis>
-      
-      <para>
-        This function creates a regular file in exactly the same way
-        as <function>create_proc_entry</function> from <xref
-        linkend="regularfile"/> does, but also allows to set the read
-        function <parameter>read_proc</parameter> in one call. This
-        function can set the <parameter>data</parameter> as well, like
-        explained in <xref linkend="usingdata"/>.
-      </para>
-    </sect1>
-    <sect1 id="Modules">
-      <title>Modules</title>
-      <para>
-        If procfs is being used from within a module, be sure to set
-        the <structfield>owner</structfield> field in the
-        <structname>struct proc_dir_entry</structname> to
-        <constant>THIS_MODULE</constant>.
-      </para>
-      <programlisting>
-struct proc_dir_entry* entry;
-entry->owner = THIS_MODULE;
-      </programlisting>
-    </sect1>
-    <sect1 id="Mode_and_ownership">
-      <title>Mode and ownership</title>
-      <para>
-        Sometimes it is useful to change the mode and/or ownership of
-        a procfs entry. Here is an example that shows how to achieve
-        that:
-      </para>
-      <programlisting>
-struct proc_dir_entry* entry;
-entry->mode =  S_IWUSR |S_IRUSR | S_IRGRP | S_IROTH;
-entry->uid = 0;
-entry->gid = 100;
-      </programlisting>
-    </sect1>
-  </chapter>
-  <chapter id="example">
-    <title>Example</title>
-    <!-- be careful with the example code: it shouldn't be wider than
-    approx. 60 columns, or otherwise it won't fit properly on a page
-    -->
-&procfsexample;
-  </chapter>
-</book>
diff --git a/Documentation/DocBook/procfs_example.c b/Documentation/DocBook/procfs_example.c
deleted file mode 100644
index a5b11793b1e0..000000000000
--- a/Documentation/DocBook/procfs_example.c
+++ /dev/null
@@ -1,201 +0,0 @@
-/*
- * procfs_example.c: an example proc interface
- *
- * Copyright (C) 2001, Erik Mouw (mouw@nl.linux.org)
- *
- * This file accompanies the procfs-guide in the Linux kernel
- * source. Its main use is to demonstrate the concepts and
- * functions described in the guide.
- *
- * This software has been developed while working on the LART
- * computing board (http://www.lartmaker.nl), which was sponsored
- * by the Delt University of Technology projects Mobile Multi-media
- * Communications and Ubiquitous Communications.
- *
- * This program is free software; you can redistribute
- * it and/or modify it under the terms of the GNU General
- * Public License as published by the Free Software
- * Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * This program is distributed in the hope that it will be
- * useful, but WITHOUT ANY WARRANTY; without even the implied
- * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
- * PURPOSE.  See the GNU General Public License for more
- * details.
- * 
- * You should have received a copy of the GNU General Public
- * License along with this program; if not, write to the
- * Free Software Foundation, Inc., 59 Temple Place,
- * Suite 330, Boston, MA  02111-1307  USA
- *
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/proc_fs.h>
-#include <linux/jiffies.h>
-#include <asm/uaccess.h>
-#define MODULE_VERS "1.0"
-#define MODULE_NAME "procfs_example"
-#define FOOBAR_LEN 8
-struct fb_data_t {
-        char name[FOOBAR_LEN + 1];
-        char value[FOOBAR_LEN + 1];
-};
-static struct proc_dir_entry *example_dir, *foo_file,
-        *bar_file, *jiffies_file, *symlink;
-struct fb_data_t foo_data, bar_data;
-static int proc_read_jiffies(char *page, char **start,
-                             off_t off, int count,
-                             int *eof, void *data)
-{
-        int len;
-        len = sprintf(page, "jiffies = %ld\n",
-                      jiffies);
-        return len;
-}
-static int proc_read_foobar(char *page, char **start,
-                            off_t off, int count, 
-                            int *eof, void *data)
-{
-        int len;
-        struct fb_data_t *fb_data = (struct fb_data_t *)data;
-        /* DON'T DO THAT - buffer overruns are bad */
-        len = sprintf(page, "%s = '%s'\n", 
-                      fb_data->name, fb_data->value);
-        return len;
-}
-static int proc_write_foobar(struct file *file,
-                             const char *buffer,
-                             unsigned long count, 
-                             void *data)
-{
-        int len;
-        struct fb_data_t *fb_data = (struct fb_data_t *)data;
-        if(count > FOOBAR_LEN)
-                len = FOOBAR_LEN;
-        else
-                len = count;
-        if(copy_from_user(fb_data->value, buffer, len))
-                return -EFAULT;
-        fb_data->value[len] = '\0';
-        return len;
-}
-static int __init init_procfs_example(void)
-{
-        int rv = 0;
-        /* create directory */
-        example_dir = proc_mkdir(MODULE_NAME, NULL);
-        if(example_dir == NULL) {
-                rv = -ENOMEM;
-                goto out;
-        }
-        /* create jiffies using convenience function */
-        jiffies_file = create_proc_read_entry("jiffies", 
-                                              0444, example_dir, 
-                                              proc_read_jiffies,
-                                              NULL);
-        if(jiffies_file == NULL) {
-                rv  = -ENOMEM;
-                goto no_jiffies;
-        }
-        /* create foo and bar files using same callback
-         * functions 
-         */
-        foo_file = create_proc_entry("foo", 0644, example_dir);
-        if(foo_file == NULL) {
-                rv = -ENOMEM;
-                goto no_foo;
-        }
-        strcpy(foo_data.name, "foo");
-        strcpy(foo_data.value, "foo");
-        foo_file->data = &foo_data;
-        foo_file->read_proc = proc_read_foobar;
-        foo_file->write_proc = proc_write_foobar;
-                
-        bar_file = create_proc_entry("bar", 0644, example_dir);
-        if(bar_file == NULL) {
-                rv = -ENOMEM;
-                goto no_bar;
-        }
-        strcpy(bar_data.name, "bar");
-        strcpy(bar_data.value, "bar");
-        bar_file->data = &bar_data;
-        bar_file->read_proc = proc_read_foobar;
-        bar_file->write_proc = proc_write_foobar;
-                
-        /* create symlink */
-        symlink = proc_symlink("jiffies_too", example_dir, 
-                               "jiffies");
-        if(symlink == NULL) {
-                rv = -ENOMEM;
-                goto no_symlink;
-        }
-        /* everything OK */
-        printk(KERN_INFO "%s %s initialised\n",
-               MODULE_NAME, MODULE_VERS);
-        return 0;
-no_symlink:
-        remove_proc_entry("bar", example_dir);
-no_bar:
-        remove_proc_entry("foo", example_dir);
-no_foo:
-        remove_proc_entry("jiffies", example_dir);
-no_jiffies:                           
-        remove_proc_entry(MODULE_NAME, NULL);
-out:
-        return rv;
-}
-static void __exit cleanup_procfs_example(void)
-{
-        remove_proc_entry("jiffies_too", example_dir);
-        remove_proc_entry("bar", example_dir);
-        remove_proc_entry("foo", example_dir);
-        remove_proc_entry("jiffies", example_dir);
-        remove_proc_entry(MODULE_NAME, NULL);
-        printk(KERN_INFO "%s %s removed\n",
-               MODULE_NAME, MODULE_VERS);
-}
-module_init(init_procfs_example);
-module_exit(cleanup_procfs_example);
-MODULE_AUTHOR("Erik Mouw");
-MODULE_DESCRIPTION("procfs examples");
-MODULE_LICENSE("GPL");
diff --git a/Documentation/DocBook/v4l/common.xml b/Documentation/DocBook/v4l/common.xml
index b1a81d246d58..c65f0ac9b6ee 100644
--- a/Documentation/DocBook/v4l/common.xml
+++ b/Documentation/DocBook/v4l/common.xml
@@ -716,6 +716,41 @@ if (-1 == ioctl (fd, &VIDIOC-S-STD;, &amp;std_id)) {
 }
      </programlisting>
    </example>
+  <section id="dv-timings">
+        <title>Digital Video (DV) Timings</title>
+        <para>
+        The video standards discussed so far has been dealing with Analog TV and the
+corresponding video timings. Today there are many more different hardware interfaces
+such as High Definition TV interfaces (HDMI), VGA, DVI connectors etc., that carry
+video signals and there is a need to extend the API to select the video timings
+for these interfaces. Since it is not possible to extend the &v4l2-std-id; due to
+the limited bits available, a new set of IOCTLs is added to set/get video timings at
+the input and output: </para><itemizedlist>
+        <listitem>
+        <para>DV Presets: Digital Video (DV) presets. These are IDs representing a
+video timing at the input/output. Presets are pre-defined timings implemented
+by the hardware according to video standards. A __u32 data type is used to represent
+a preset unlike the bit mask that is used in &v4l2-std-id; allowing future extensions
+to support as many different presets as needed.</para>
+        </listitem>
+        <listitem>
+        <para>Custom DV Timings: This will allow applications to define more detailed
+custom video timings for the interface. This includes parameters such as width, height,
+polarities, frontporch, backporch etc.
+        </para>
+        </listitem>
+        </itemizedlist>
+        <para>To enumerate and query the attributes of DV presets supported by a device,
+applications use the &VIDIOC-ENUM-DV-PRESETS; ioctl. To get the current DV preset,
+applications use the &VIDIOC-G-DV-PRESET; ioctl and to set a preset they use the
+&VIDIOC-S-DV-PRESET; ioctl.</para>
+        <para>To set custom DV timings for the device, applications use the
+&VIDIOC-S-DV-TIMINGS; ioctl and to get current custom DV timings they use the
+&VIDIOC-G-DV-TIMINGS; ioctl.</para>
+        <para>Applications can make use of the <xref linkend="input-capabilities" /> and
+<xref linkend="output-capabilities"/> flags to decide what ioctls are available to set the
+video timings for the device.</para>
+        </section>
  </section>
  &sub-controls;
diff --git a/Documentation/DocBook/v4l/compat.xml b/Documentation/DocBook/v4l/compat.xml
index 4d1902a54d61..b9dbdf9e6d29 100644
--- a/Documentation/DocBook/v4l/compat.xml
+++ b/Documentation/DocBook/v4l/compat.xml
@@ -2291,8 +2291,8 @@ was renamed to <structname id="v4l2-chip-ident-old">v4l2_chip_ident_old</structn
        <listitem>
          <para>New control <constant>V4L2_CID_COLORFX</constant> was added.</para>
        </listitem>
-       </orderedlist>
+      </orderedlist>
-     </section>
+    </section>
    <section>
      <title>V4L2 in Linux 2.6.32</title>
      <orderedlist>
@@ -2322,8 +2322,16 @@ more information.</para>
        <listitem>
          <para>Added Remote Controller chapter, describing the default Remote Controller mapping for media devices.</para>
        </listitem>
-       </orderedlist>
+      </orderedlist>
-     </section>
+    </section>
+    <section>
+      <title>V4L2 in Linux 2.6.33</title>
+      <orderedlist>
+        <listitem>
+          <para>Added support for Digital Video timings in order to support HDTV receivers and transmitters.</para>
+        </listitem>
+      </orderedlist>
+    </section>
   </section>
   <section id="other">
diff --git a/Documentation/DocBook/v4l/v4l2.xml b/Documentation/DocBook/v4l/v4l2.xml
index 937b4157a5d0..060105af49e5 100644
--- a/Documentation/DocBook/v4l/v4l2.xml
+++ b/Documentation/DocBook/v4l/v4l2.xml
@@ -74,6 +74,17 @@ Remote Controller chapter.</contrib>
          </address>
        </affiliation>
      </author>
+      <author>
+        <firstname>Muralidharan</firstname>
+        <surname>Karicheri</surname>
+        <contrib>Documented the Digital Video timings API.</contrib>
+        <affiliation>
+          <address>
+            <email>m-karicheri2@ti.com</email>
+          </address>
+        </affiliation>
+      </author>
    </authorgroup>
    <copyright>
@@ -89,7 +100,7 @@ Remote Controller chapter.</contrib>
      <year>2008</year>
      <year>2009</year>
      <holder>Bill Dirks, Michael H. Schimek, Hans Verkuil, Martin
-Rubli, Andy Walls, Mauro Carvalho Chehab</holder>
+Rubli, Andy Walls, Muralidharan Karicheri, Mauro Carvalho Chehab</holder>
    </copyright>
    <legalnotice>
    <para>Except when explicitly stated as GPL, programming examples within
@@ -103,6 +114,13 @@ structs, ioctls) must be noted in more detail in the history chapter
 applications. -->
      <revision>
+        <revnumber>2.6.33</revnumber>
+        <date>2009-12-03</date>
+        <authorinitials>mk</authorinitials>
+        <revremark>Added documentation for the Digital Video timings API.</revremark>
+      </revision>
+      <revision>
        <revnumber>2.6.32</revnumber>
        <date>2009-08-31</date>
        <authorinitials>mcc</authorinitials>
@@ -355,7 +373,7 @@ and discussions on the V4L mailing list.</revremark>
 </partinfo>
 <title>Video for Linux Two API Specification</title>
- <subtitle>Revision 2.6.32</subtitle>
+ <subtitle>Revision 2.6.33</subtitle>
  <chapter id="common">
    &sub-common;
@@ -411,6 +429,7 @@ and discussions on the V4L mailing list.</revremark>
    &sub-encoder-cmd;
    &sub-enumaudio;
    &sub-enumaudioout;
+    &sub-enum-dv-presets;
    &sub-enum-fmt;
    &sub-enum-framesizes;
    &sub-enum-frameintervals;
@@ -421,6 +440,8 @@ and discussions on the V4L mailing list.</revremark>
    &sub-g-audioout;
    &sub-g-crop;
    &sub-g-ctrl;
+    &sub-g-dv-preset;
+    &sub-g-dv-timings;
    &sub-g-enc-index;
    &sub-g-ext-ctrls;
    &sub-g-fbuf;
@@ -441,6 +462,7 @@ and discussions on the V4L mailing list.</revremark>
    &sub-querybuf;
    &sub-querycap;
    &sub-queryctrl;
+    &sub-query-dv-preset;
    &sub-querystd;
    &sub-reqbufs;
    &sub-s-hw-freq-seek;
diff --git a/Documentation/DocBook/v4l/videodev2.h.xml b/Documentation/DocBook/v4l/videodev2.h.xml
index 3e282ed9f593..068325940658 100644
--- a/Documentation/DocBook/v4l/videodev2.h.xml
+++ b/Documentation/DocBook/v4l/videodev2.h.xml
@@ -734,6 +734,99 @@ struct <link linkend="v4l2-standard">v4l2_standard</link> {
 };
 /*
+ *      V I D E O       T I M I N G S   D V     P R E S E T
+ */
+struct <link linkend="v4l2-dv-preset">v4l2_dv_preset</link> {
+        __u32   preset;
+        __u32   reserved[4];
+};
+/*
+ *      D V     P R E S E T S   E N U M E R A T I O N
+ */
+struct <link linkend="v4l2-dv-enum-preset">v4l2_dv_enum_preset</link> {
+        __u32   index;
+        __u32   preset;
+        __u8    name[32]; /* Name of the preset timing */
+        __u32   width;
+        __u32   height;
+        __u32   reserved[4];
+};
+/*
+ *      D V     P R E S E T     V A L U E S
+ */
+#define         V4L2_DV_INVALID         0
+#define         V4L2_DV_480P59_94       1 /* BT.1362 */
+#define         V4L2_DV_576P50          2 /* BT.1362 */
+#define         V4L2_DV_720P24          3 /* SMPTE 296M */
+#define         V4L2_DV_720P25          4 /* SMPTE 296M */
+#define         V4L2_DV_720P30          5 /* SMPTE 296M */
+#define         V4L2_DV_720P50          6 /* SMPTE 296M */
+#define         V4L2_DV_720P59_94       7 /* SMPTE 274M */
+#define         V4L2_DV_720P60          8 /* SMPTE 274M/296M */
+#define         V4L2_DV_1080I29_97      9 /* BT.1120/ SMPTE 274M */
+#define         V4L2_DV_1080I30         10 /* BT.1120/ SMPTE 274M */
+#define         V4L2_DV_1080I25         11 /* BT.1120 */
+#define         V4L2_DV_1080I50         12 /* SMPTE 296M */
+#define         V4L2_DV_1080I60         13 /* SMPTE 296M */
+#define         V4L2_DV_1080P24         14 /* SMPTE 296M */
+#define         V4L2_DV_1080P25         15 /* SMPTE 296M */
+#define         V4L2_DV_1080P30         16 /* SMPTE 296M */
+#define         V4L2_DV_1080P50         17 /* BT.1120 */
+#define         V4L2_DV_1080P60         18 /* BT.1120 */
+/*
+ *      D V     B T     T I M I N G S
+ */
+/* BT.656/BT.1120 timing data */
+struct <link linkend="v4l2-bt-timings">v4l2_bt_timings</link> {
+        __u32   width;          /* width in pixels */
+        __u32   height;         /* height in lines */
+        __u32   interlaced;     /* Interlaced or progressive */
+        __u32   polarities;     /* Positive or negative polarity */
+        __u64   pixelclock;     /* Pixel clock in HZ. Ex. 74.25MHz-&gt;74250000 */
+        __u32   hfrontporch;    /* Horizpontal front porch in pixels */
+        __u32   hsync;          /* Horizontal Sync length in pixels */
+        __u32   hbackporch;     /* Horizontal back porch in pixels */
+        __u32   vfrontporch;    /* Vertical front porch in pixels */
+        __u32   vsync;          /* Vertical Sync length in lines */
+        __u32   vbackporch;     /* Vertical back porch in lines */
+        __u32   il_vfrontporch; /* Vertical front porch for bottom field of
+                                 * interlaced field formats
+                                 */
+        __u32   il_vsync;       /* Vertical sync length for bottom field of
+                                 * interlaced field formats
+                                 */
+        __u32   il_vbackporch;  /* Vertical back porch for bottom field of
+                                 * interlaced field formats
+                                 */
+        __u32   reserved[16];
+} __attribute__ ((packed));
+/* Interlaced or progressive format */
+#define V4L2_DV_PROGRESSIVE     0
+#define V4L2_DV_INTERLACED      1
+/* Polarities. If bit is not set, it is assumed to be negative polarity */
+#define V4L2_DV_VSYNC_POS_POL   0x00000001
+#define V4L2_DV_HSYNC_POS_POL   0x00000002
+/* DV timings */
+struct <link linkend="v4l2-dv-timings">v4l2_dv_timings</link> {
+        __u32 type;
+        union {
+                struct <link linkend="v4l2-bt-timings">v4l2_bt_timings</link>  bt;
+                __u32   reserved[32];
+        };
+} __attribute__ ((packed));
+/* Values for the type field */
+#define V4L2_DV_BT_656_1120     0       /* BT.656/1120 timing type */
+/*
 *      V I D E O   I N P U T S
 */
 struct <link linkend="v4l2-input">v4l2_input</link> {
@@ -744,7 +837,8 @@ struct <link linkend="v4l2-input">v4l2_input</link> {
        __u32        tuner;             /*  Associated tuner */
        v4l2_std_id  std;
        __u32        status;
-        __u32        reserved[4];
+        __u32        capabilities;
+        __u32        reserved[3];
 };
 /*  Values for the 'type' field */
@@ -775,6 +869,11 @@ struct <link linkend="v4l2-input">v4l2_input</link> {
 #define V4L2_IN_ST_NO_ACCESS   0x02000000  /* Conditional access denied */
 #define V4L2_IN_ST_VTR         0x04000000  /* VTR time constant */
+/* capabilities flags */
+#define V4L2_IN_CAP_PRESETS             0x00000001 /* Supports S_DV_PRESET */
+#define V4L2_IN_CAP_CUSTOM_TIMINGS      0x00000002 /* Supports S_DV_TIMINGS */
+#define V4L2_IN_CAP_STD                 0x00000004 /* Supports S_STD */
 /*
 *      V I D E O   O U T P U T S
 */
@@ -785,13 +884,19 @@ struct <link linkend="v4l2-output">v4l2_output</link> {
        __u32        audioset;          /*  Associated audios (bitfield) */
        __u32        modulator;         /*  Associated modulator */
        v4l2_std_id  std;
-        __u32        reserved[4];
+        __u32        capabilities;
+        __u32        reserved[3];
 };
 /*  Values for the 'type' field */
 #define V4L2_OUTPUT_TYPE_MODULATOR              1
 #define V4L2_OUTPUT_TYPE_ANALOG                 2
 #define V4L2_OUTPUT_TYPE_ANALOGVGAOVERLAY       3
+/* capabilities flags */
+#define V4L2_OUT_CAP_PRESETS            0x00000001 /* Supports S_DV_PRESET */
+#define V4L2_OUT_CAP_CUSTOM_TIMINGS     0x00000002 /* Supports S_DV_TIMINGS */
+#define V4L2_OUT_CAP_STD                0x00000004 /* Supports S_STD */
 /*
 *      C O N T R O L S
 */
@@ -1626,6 +1731,13 @@ struct <link linkend="v4l2-dbg-chip-ident">v4l2_dbg_chip_ident</link> {
 #endif
 #define VIDIOC_S_HW_FREQ_SEEK    _IOW('V', 82, struct <link linkend="v4l2-hw-freq-seek">v4l2_hw_freq_seek</link>)
+#define VIDIOC_ENUM_DV_PRESETS  _IOWR('V', 83, struct <link linkend="v4l2-dv-enum-preset">v4l2_dv_enum_preset</link>)
+#define VIDIOC_S_DV_PRESET      _IOWR('V', 84, struct <link linkend="v4l2-dv-preset">v4l2_dv_preset</link>)
+#define VIDIOC_G_DV_PRESET      _IOWR('V', 85, struct <link linkend="v4l2-dv-preset">v4l2_dv_preset</link>)
+#define VIDIOC_QUERY_DV_PRESET  _IOR('V',  86, struct <link linkend="v4l2-dv-preset">v4l2_dv_preset</link>)
+#define VIDIOC_S_DV_TIMINGS     _IOWR('V', 87, struct <link linkend="v4l2-dv-timings">v4l2_dv_timings</link>)
+#define VIDIOC_G_DV_TIMINGS     _IOWR('V', 88, struct <link linkend="v4l2-dv-timings">v4l2_dv_timings</link>)
 /* Reminder: when adding new ioctls please add support for them to
   drivers/media/video/v4l2-compat-ioctl32.c as well! */
diff --git a/Documentation/DocBook/v4l/vidioc-enum-dv-presets.xml b/Documentation/DocBook/v4l/vidioc-enum-dv-presets.xml
new file mode 100644
index 000000000000..1d31427edd1b
--- /dev/null
+++ b/Documentation/DocBook/v4l/vidioc-enum-dv-presets.xml
@@ -0,0 +1,238 @@
+<refentry id="vidioc-enum-dv-presets">
+  <refmeta>
+    <refentrytitle>ioctl VIDIOC_ENUM_DV_PRESETS</refentrytitle>
+    &manvol;
+  </refmeta>
+  <refnamediv>
+    <refname>VIDIOC_ENUM_DV_PRESETS</refname>
+    <refpurpose>Enumerate supported Digital Video presets</refpurpose>
+  </refnamediv>
+  <refsynopsisdiv>
+    <funcsynopsis>
+      <funcprototype>
+        <funcdef>int <function>ioctl</function></funcdef>
+        <paramdef>int <parameter>fd</parameter></paramdef>
+        <paramdef>int <parameter>request</parameter></paramdef>
+        <paramdef>struct v4l2_dv_enum_preset *<parameter>argp</parameter></paramdef>
+      </funcprototype>
+    </funcsynopsis>
+  </refsynopsisdiv>
+  <refsect1>
+    <title>Arguments</title>
+    <variablelist>
+      <varlistentry>
+        <term><parameter>fd</parameter></term>
+        <listitem>
+          <para>&fd;</para>
+        </listitem>
+      </varlistentry>
+      <varlistentry>
+        <term><parameter>request</parameter></term>
+        <listitem>
+          <para>VIDIOC_ENUM_DV_PRESETS</para>
+        </listitem>
+      </varlistentry>
+      <varlistentry>
+        <term><parameter>argp</parameter></term>
+        <listitem>
+          <para></para>
+        </listitem>
+      </varlistentry>
+    </variablelist>
+  </refsect1>
+  <refsect1>
+    <title>Description</title>
+    <para>To query the attributes of a DV preset, applications initialize the
+<structfield>index</structfield> field and zero the reserved array of &v4l2-dv-enum-preset;
+and call the <constant>VIDIOC_ENUM_DV_PRESETS</constant> ioctl with a pointer to this
+structure. Drivers fill the rest of the structure or return an
+&EINVAL; when the index is out of bounds. To enumerate all DV Presets supported,
+applications shall begin at index zero, incrementing by one until the
+driver returns <errorcode>EINVAL</errorcode>. Drivers may enumerate a
+different set of DV presets after switching the video input or
+output.</para>
+    <table pgwide="1" frame="none" id="v4l2-dv-enum-preset">
+      <title>struct <structname>v4l2_dv_enum_presets</structname></title>
+      <tgroup cols="3">
+        &cs-str;
+        <tbody valign="top">
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>index</structfield></entry>
+            <entry>Number of the DV preset, set by the
+application.</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>preset</structfield></entry>
+            <entry>This field identifies one of the DV preset values listed in <xref linkend="v4l2-dv-presets-vals"/>.</entry>
+          </row>
+          <row>
+            <entry>__u8</entry>
+            <entry><structfield>name</structfield>[24]</entry>
+            <entry>Name of the preset, a NUL-terminated ASCII string, for example: "720P-60", "1080I-60". This information is
+intended for the user.</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>width</structfield></entry>
+            <entry>Width of the active video in pixels for the DV preset.</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>height</structfield></entry>
+            <entry>Height of the active video in lines for the DV preset.</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>reserved</structfield>[4]</entry>
+            <entry>Reserved for future extensions. Drivers must set the array to zero.</entry>
+          </row>
+        </tbody>
+      </tgroup>
+    </table>
+    <table pgwide="1" frame="none" id="v4l2-dv-presets-vals">
+      <title>struct <structname>DV Presets</structname></title>
+      <tgroup cols="3">
+        &cs-str;
+        <tbody valign="top">
+          <row>
+            <entry>Preset</entry>
+            <entry>Preset value</entry>
+            <entry>Description</entry>
+          </row>
+          <row>
+            <entry></entry>
+            <entry></entry>
+            <entry></entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_INVALID</entry>
+            <entry>0</entry>
+            <entry>Invalid preset value.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_480P59_94</entry>
+            <entry>1</entry>
+            <entry>720x480 progressive video at 59.94 fps as per BT.1362.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_576P50</entry>
+            <entry>2</entry>
+            <entry>720x576 progressive video at 50 fps as per BT.1362.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_720P24</entry>
+            <entry>3</entry>
+            <entry>1280x720 progressive video at 24 fps as per SMPTE 296M.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_720P25</entry>
+            <entry>4</entry>
+            <entry>1280x720 progressive video at 25 fps as per SMPTE 296M.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_720P30</entry>
+            <entry>5</entry>
+            <entry>1280x720 progressive video at 30 fps as per SMPTE 296M.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_720P50</entry>
+            <entry>6</entry>
+            <entry>1280x720 progressive video at 50 fps as per SMPTE 296M.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_720P59_94</entry>
+            <entry>7</entry>
+            <entry>1280x720 progressive video at 59.94 fps as per SMPTE 274M.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_720P60</entry>
+            <entry>8</entry>
+            <entry>1280x720 progressive video at 60 fps as per SMPTE 274M/296M.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_1080I29_97</entry>
+            <entry>9</entry>
+            <entry>1920x1080 interlaced video at 29.97 fps as per BT.1120/SMPTE 274M.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_1080I30</entry>
+            <entry>10</entry>
+            <entry>1920x1080 interlaced video at 30 fps as per BT.1120/SMPTE 274M.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_1080I25</entry>
+            <entry>11</entry>
+            <entry>1920x1080 interlaced video at 25 fps as per BT.1120.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_1080I50</entry>
+            <entry>12</entry>
+            <entry>1920x1080 interlaced video at 50 fps as per SMPTE 296M.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_1080I60</entry>
+            <entry>13</entry>
+            <entry>1920x1080 interlaced video at 60 fps as per SMPTE 296M.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_1080P24</entry>
+            <entry>14</entry>
+            <entry>1920x1080 progressive video at 24 fps as per SMPTE 296M.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_1080P25</entry>
+            <entry>15</entry>
+            <entry>1920x1080 progressive video at 25 fps as per SMPTE 296M.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_1080P30</entry>
+            <entry>16</entry>
+            <entry>1920x1080 progressive video at 30 fps as per SMPTE 296M.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_1080P50</entry>
+            <entry>17</entry>
+            <entry>1920x1080 progressive video at 50 fps as per BT.1120.</entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_1080P60</entry>
+            <entry>18</entry>
+            <entry>1920x1080 progressive video at 60 fps as per BT.1120.</entry>
+          </row>
+        </tbody>
+      </tgroup>
+    </table>
+  </refsect1>
+  <refsect1>
+    &return-value;
+    <variablelist>
+      <varlistentry>
+        <term><errorcode>EINVAL</errorcode></term>
+        <listitem>
+          <para>The &v4l2-dv-enum-preset; <structfield>index</structfield>
+is out of bounds.</para>
+        </listitem>
+      </varlistentry>
+    </variablelist>
+  </refsect1>
+</refentry>
+<!--
+Local Variables:
+mode: sgml
+sgml-parent-document: "v4l2.sgml"
+indent-tabs-mode: nil
+End:
+-->
diff --git a/Documentation/DocBook/v4l/vidioc-enuminput.xml b/Documentation/DocBook/v4l/vidioc-enuminput.xml
index 414856b82473..71b868e2fb8f 100644
--- a/Documentation/DocBook/v4l/vidioc-enuminput.xml
+++ b/Documentation/DocBook/v4l/vidioc-enuminput.xml
@@ -124,7 +124,13 @@ current input.</entry>
          </row>
          <row>
            <entry>__u32</entry>
-            <entry><structfield>reserved</structfield>[4]</entry>
+            <entry><structfield>capabilities</structfield></entry>
+            <entry>This field provides capabilities for the
+input. See <xref linkend="input-capabilities" /> for flags.</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>reserved</structfield>[3]</entry>
            <entry>Reserved for future extensions. Drivers must set
 the array to zero.</entry>
          </row>
@@ -261,6 +267,34 @@ flag is set Macrovision has been detected.</entry>
        </tbody>
      </tgroup>
    </table>
+    <!-- Capability flags based on video timings RFC by Muralidharan
+Karicheri, titled RFC (v1.2): V4L - Support for video timings at the
+input/output interface to linux-media@vger.kernel.org on 19 Oct 2009.
+        -->
+    <table frame="none" pgwide="1" id="input-capabilities">
+      <title>Input capabilities</title>
+      <tgroup cols="3">
+        &cs-def;
+        <tbody valign="top">
+          <row>
+            <entry><constant>V4L2_IN_CAP_PRESETS</constant></entry>
+            <entry>0x00000001</entry>
+            <entry>This input supports setting DV presets by using VIDIOC_S_DV_PRESET.</entry>
+          </row>
+          <row>
+            <entry><constant>V4L2_OUT_CAP_CUSTOM_TIMINGS</constant></entry>
+            <entry>0x00000002</entry>
+            <entry>This input supports setting custom video timings by using VIDIOC_S_DV_TIMINGS.</entry>
+          </row>
+          <row>
+            <entry><constant>V4L2_IN_CAP_STD</constant></entry>
+            <entry>0x00000004</entry>
+            <entry>This input supports setting the TV standard by using VIDIOC_S_STD.</entry>
+          </row>
+        </tbody>
+      </tgroup>
+    </table>
  </refsect1>
  <refsect1>
diff --git a/Documentation/DocBook/v4l/vidioc-enumoutput.xml b/Documentation/DocBook/v4l/vidioc-enumoutput.xml
index e8d16dcd50cf..a281d26a195f 100644
--- a/Documentation/DocBook/v4l/vidioc-enumoutput.xml
+++ b/Documentation/DocBook/v4l/vidioc-enumoutput.xml
@@ -114,7 +114,13 @@ details on video standards and how to switch see <xref
          </row>
          <row>
            <entry>__u32</entry>
-            <entry><structfield>reserved</structfield>[4]</entry>
+            <entry><structfield>capabilities</structfield></entry>
+            <entry>This field provides capabilities for the
+output. See <xref linkend="output-capabilities" /> for flags.</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>reserved</structfield>[3]</entry>
            <entry>Reserved for future extensions. Drivers must set
 the array to zero.</entry>
          </row>
@@ -147,6 +153,34 @@ CVBS, S-Video, RGB.</entry>
      </tgroup>
    </table>
+    <!-- Capabilities flags based on video timings RFC by Muralidharan
+Karicheri, titled RFC (v1.2): V4L - Support for video timings at the
+input/output interface to linux-media@vger.kernel.org on 19 Oct 2009.
+        -->
+    <table frame="none" pgwide="1" id="output-capabilities">
+      <title>Output capabilities</title>
+      <tgroup cols="3">
+        &cs-def;
+        <tbody valign="top">
+          <row>
+            <entry><constant>V4L2_OUT_CAP_PRESETS</constant></entry>
+            <entry>0x00000001</entry>
+            <entry>This output supports setting DV presets by using VIDIOC_S_DV_PRESET.</entry>
+          </row>
+          <row>
+            <entry><constant>V4L2_OUT_CAP_CUSTOM_TIMINGS</constant></entry>
+            <entry>0x00000002</entry>
+            <entry>This output supports setting custom video timings by using VIDIOC_S_DV_TIMINGS.</entry>
+          </row>
+          <row>
+            <entry><constant>V4L2_OUT_CAP_STD</constant></entry>
+            <entry>0x00000004</entry>
+            <entry>This output supports setting the TV standard by using VIDIOC_S_STD.</entry>
+          </row>
+        </tbody>
+      </tgroup>
+    </table>
  </refsect1>
  <refsect1>
    &return-value;
diff --git a/Documentation/DocBook/v4l/vidioc-g-dv-preset.xml b/Documentation/DocBook/v4l/vidioc-g-dv-preset.xml
new file mode 100644
index 000000000000..3c6784e132f3
--- /dev/null
+++ b/Documentation/DocBook/v4l/vidioc-g-dv-preset.xml
@@ -0,0 +1,111 @@
+<refentry id="vidioc-g-dv-preset">
+  <refmeta>
+    <refentrytitle>ioctl VIDIOC_G_DV_PRESET, VIDIOC_S_DV_PRESET</refentrytitle>
+    &manvol;
+  </refmeta>
+  <refnamediv>
+    <refname>VIDIOC_G_DV_PRESET</refname>
+    <refname>VIDIOC_S_DV_PRESET</refname>
+    <refpurpose>Query or select the DV preset of the current input or output</refpurpose>
+  </refnamediv>
+  <refsynopsisdiv>
+    <funcsynopsis>
+      <funcprototype>
+        <funcdef>int <function>ioctl</function></funcdef>
+        <paramdef>int <parameter>fd</parameter></paramdef>
+        <paramdef>int <parameter>request</parameter></paramdef>
+        <paramdef>&v4l2-dv-preset;
+*<parameter>argp</parameter></paramdef>
+      </funcprototype>
+    </funcsynopsis>
+  </refsynopsisdiv>
+  <refsect1>
+    <title>Arguments</title>
+    <variablelist>
+      <varlistentry>
+        <term><parameter>fd</parameter></term>
+        <listitem>
+          <para>&fd;</para>
+        </listitem>
+      </varlistentry>
+      <varlistentry>
+        <term><parameter>request</parameter></term>
+        <listitem>
+          <para>VIDIOC_G_DV_PRESET, VIDIOC_S_DV_PRESET</para>
+        </listitem>
+      </varlistentry>
+      <varlistentry>
+        <term><parameter>argp</parameter></term>
+        <listitem>
+          <para></para>
+        </listitem>
+      </varlistentry>
+    </variablelist>
+  </refsect1>
+  <refsect1>
+    <title>Description</title>
+    <para>To query and select the current DV preset, applications
+use the <constant>VIDIOC_G_DV_PRESET</constant> and <constant>VIDIOC_S_DV_PRESET</constant>
+ioctls which take a pointer to a &v4l2-dv-preset; type as argument.
+Applications must zero the reserved array in &v4l2-dv-preset;.
+<constant>VIDIOC_G_DV_PRESET</constant> returns a dv preset in the field
+<structfield>preset</structfield> of &v4l2-dv-preset;.</para>
+    <para><constant>VIDIOC_S_DV_PRESET</constant> accepts a pointer to a &v4l2-dv-preset;
+that has the preset value to be set. Applications must zero the reserved array in &v4l2-dv-preset;.
+If the preset is not supported, it returns an &EINVAL; </para>
+  </refsect1>
+  <refsect1>
+    &return-value;
+    <variablelist>
+      <varlistentry>
+        <term><errorcode>EINVAL</errorcode></term>
+        <listitem>
+          <para>This ioctl is not supported, or the
+<constant>VIDIOC_S_DV_PRESET</constant>,<constant>VIDIOC_S_DV_PRESET</constant> parameter was unsuitable.</para>
+        </listitem>
+      </varlistentry>
+      <varlistentry>
+        <term><errorcode>EBUSY</errorcode></term>
+        <listitem>
+          <para>The device is busy and therefore can not change the preset.</para>
+        </listitem>
+      </varlistentry>
+    </variablelist>
+    <table pgwide="1" frame="none" id="v4l2-dv-preset">
+      <title>struct <structname>v4l2_dv_preset</structname></title>
+      <tgroup cols="3">
+        &cs-str;
+        <tbody valign="top">
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>preset</structfield></entry>
+            <entry>Preset value to represent the digital video timings</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>reserved[4]</structfield></entry>
+            <entry>Reserved fields for future use</entry>
+          </row>
+        </tbody>
+      </tgroup>
+    </table>
+  </refsect1>
+</refentry>
+<!--
+Local Variables:
+mode: sgml
+sgml-parent-document: "v4l2.sgml"
+indent-tabs-mode: nil
+End:
+-->
diff --git a/Documentation/DocBook/v4l/vidioc-g-dv-timings.xml b/Documentation/DocBook/v4l/vidioc-g-dv-timings.xml
new file mode 100644
index 000000000000..ecc19576bb8f
--- /dev/null
+++ b/Documentation/DocBook/v4l/vidioc-g-dv-timings.xml
@@ -0,0 +1,224 @@
+<refentry id="vidioc-g-dv-timings">
+  <refmeta>
+    <refentrytitle>ioctl VIDIOC_G_DV_TIMINGS, VIDIOC_S_DV_TIMINGS</refentrytitle>
+    &manvol;
+  </refmeta>
+  <refnamediv>
+    <refname>VIDIOC_G_DV_TIMINGS</refname>
+    <refname>VIDIOC_S_DV_TIMINGS</refname>
+    <refpurpose>Get or set custom DV timings for input or output</refpurpose>
+  </refnamediv>
+  <refsynopsisdiv>
+    <funcsynopsis>
+      <funcprototype>
+        <funcdef>int <function>ioctl</function></funcdef>
+        <paramdef>int <parameter>fd</parameter></paramdef>
+        <paramdef>int <parameter>request</parameter></paramdef>
+        <paramdef>&v4l2-dv-timings;
+*<parameter>argp</parameter></paramdef>
+      </funcprototype>
+    </funcsynopsis>
+  </refsynopsisdiv>
+  <refsect1>
+    <title>Arguments</title>
+    <variablelist>
+      <varlistentry>
+        <term><parameter>fd</parameter></term>
+        <listitem>
+          <para>&fd;</para>
+        </listitem>
+      </varlistentry>
+      <varlistentry>
+        <term><parameter>request</parameter></term>
+        <listitem>
+          <para>VIDIOC_G_DV_TIMINGS, VIDIOC_S_DV_TIMINGS</para>
+        </listitem>
+      </varlistentry>
+      <varlistentry>
+        <term><parameter>argp</parameter></term>
+        <listitem>
+          <para></para>
+        </listitem>
+      </varlistentry>
+    </variablelist>
+  </refsect1>
+  <refsect1>
+    <title>Description</title>
+    <para>To set custom DV timings for the input or output, applications use the
+<constant>VIDIOC_S_DV_TIMINGS</constant> ioctl and to get the current custom timings,
+applications use the <constant>VIDIOC_G_DV_TIMINGS</constant> ioctl. The detailed timing
+information is filled in using the structure &v4l2-dv-timings;. These ioctls take
+a pointer to the &v4l2-dv-timings; structure as argument. If the ioctl is not supported
+or the timing values are not correct, the driver returns &EINVAL;.</para>
+  </refsect1>
+  <refsect1>
+    &return-value;
+    <variablelist>
+      <varlistentry>
+        <term><errorcode>EINVAL</errorcode></term>
+        <listitem>
+          <para>This ioctl is not supported, or the
+<constant>VIDIOC_S_DV_TIMINGS</constant> parameter was unsuitable.</para>
+        </listitem>
+      </varlistentry>
+      <varlistentry>
+        <term><errorcode>EBUSY</errorcode></term>
+        <listitem>
+          <para>The device is busy and therefore can not change the timings.</para>
+        </listitem>
+      </varlistentry>
+    </variablelist>
+    <table pgwide="1" frame="none" id="v4l2-bt-timings">
+      <title>struct <structname>v4l2_bt_timings</structname></title>
+      <tgroup cols="3">
+        &cs-str;
+        <tbody valign="top">
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>width</structfield></entry>
+            <entry>Width of the active video in pixels</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>height</structfield></entry>
+            <entry>Height of the active video in lines</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>interlaced</structfield></entry>
+            <entry>Progressive (0) or interlaced (1)</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>polarities</structfield></entry>
+            <entry>This is a bit mask that defines polarities of sync signals.
+bit 0 (V4L2_DV_VSYNC_POS_POL) is for vertical sync polarity and bit 1 (V4L2_DV_HSYNC_POS_POL) is for horizontal sync polarity. If the bit is set
+(1) it is positive polarity and if is cleared (0), it is negative polarity.</entry>
+          </row>
+          <row>
+            <entry>__u64</entry>
+            <entry><structfield>pixelclock</structfield></entry>
+            <entry>Pixel clock in Hz. Ex. 74.25MHz->74250000</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>hfrontporch</structfield></entry>
+            <entry>Horizontal front porch in pixels</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>hsync</structfield></entry>
+            <entry>Horizontal sync length in pixels</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>hbackporch</structfield></entry>
+            <entry>Horizontal back porch in pixels</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>vfrontporch</structfield></entry>
+            <entry>Vertical front porch in lines</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>vsync</structfield></entry>
+            <entry>Vertical sync length in lines</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>vbackporch</structfield></entry>
+            <entry>Vertical back porch in lines</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>il_vfrontporch</structfield></entry>
+            <entry>Vertical front porch in lines for bottom field of interlaced field formats</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>il_vsync</structfield></entry>
+            <entry>Vertical sync length in lines for bottom field of interlaced field formats</entry>
+          </row>
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>il_vbackporch</structfield></entry>
+            <entry>Vertical back porch in lines for bottom field of interlaced field formats</entry>
+          </row>
+        </tbody>
+      </tgroup>
+    </table>
+    <table pgwide="1" frame="none" id="v4l2-dv-timings">
+      <title>struct <structname>v4l2_dv_timings</structname></title>
+      <tgroup cols="4">
+        &cs-str;
+        <tbody valign="top">
+          <row>
+            <entry>__u32</entry>
+            <entry><structfield>type</structfield></entry>
+            <entry></entry>
+            <entry>Type of DV timings as listed in <xref linkend="dv-timing-types"/>.</entry>
+          </row>
+          <row>
+            <entry>union</entry>
+            <entry><structfield></structfield></entry>
+            <entry></entry>
+          </row>
+          <row>
+            <entry></entry>
+            <entry>&v4l2-bt-timings;</entry>
+            <entry><structfield>bt</structfield></entry>
+            <entry>Timings defined by BT.656/1120 specifications</entry>
+          </row>
+          <row>
+            <entry></entry>
+            <entry>__u32</entry>
+            <entry><structfield>reserved</structfield>[32]</entry>
+            <entry></entry>
+          </row>
+        </tbody>
+      </tgroup>
+    </table>
+    <table pgwide="1" frame="none" id="dv-timing-types">
+      <title>DV Timing types</title>
+      <tgroup cols="3">
+        &cs-str;
+        <tbody valign="top">
+          <row>
+            <entry>Timing type</entry>
+            <entry>value</entry>
+            <entry>Description</entry>
+          </row>
+          <row>
+            <entry></entry>
+            <entry></entry>
+            <entry></entry>
+          </row>
+          <row>
+            <entry>V4L2_DV_BT_656_1120</entry>
+            <entry>0</entry>
+            <entry>BT.656/1120 timings</entry>
+          </row>
+        </tbody>
+      </tgroup>
+    </table>
+  </refsect1>
+</refentry>
+<!--
+Local Variables:
+mode: sgml
+sgml-parent-document: "v4l2.sgml"
+indent-tabs-mode: nil
+End:
+-->
diff --git a/Documentation/DocBook/v4l/vidioc-g-std.xml b/Documentation/DocBook/v4l/vidioc-g-std.xml
index b6f5d267e856..912f8513e5da 100644
--- a/Documentation/DocBook/v4l/vidioc-g-std.xml
+++ b/Documentation/DocBook/v4l/vidioc-g-std.xml
@@ -86,6 +86,12 @@ standards.</para>
 <constant>VIDIOC_S_STD</constant> parameter was unsuitable.</para>
        </listitem>
      </varlistentry>
+      <varlistentry>
+        <term><errorcode>EBUSY</errorcode></term>
+        <listitem>
+          <para>The device is busy and therefore can not change the standard</para>
+        </listitem>
+      </varlistentry>
    </variablelist>
  </refsect1>
 </refentry>
diff --git a/Documentation/DocBook/v4l/vidioc-query-dv-preset.xml b/Documentation/DocBook/v4l/vidioc-query-dv-preset.xml
new file mode 100644
index 000000000000..87e4f0f6151c
--- /dev/null
+++ b/Documentation/DocBook/v4l/vidioc-query-dv-preset.xml
@@ -0,0 +1,85 @@
+<refentry id="vidioc-query-dv-preset">
+  <refmeta>
+    <refentrytitle>ioctl VIDIOC_QUERY_DV_PRESET</refentrytitle>
+    &manvol;
+  </refmeta>
+  <refnamediv>
+    <refname>VIDIOC_QUERY_DV_PRESET</refname>
+    <refpurpose>Sense the DV preset received by the current
+input</refpurpose>
+  </refnamediv>
+  <refsynopsisdiv>
+    <funcsynopsis>
+      <funcprototype>
+        <funcdef>int <function>ioctl</function></funcdef>
+        <paramdef>int <parameter>fd</parameter></paramdef>
+        <paramdef>int <parameter>request</parameter></paramdef>
+        <paramdef>&v4l2-dv-preset; *<parameter>argp</parameter></paramdef>
+      </funcprototype>
+    </funcsynopsis>
+  </refsynopsisdiv>
+  <refsect1>
+    <title>Arguments</title>
+    <variablelist>
+        <varlistentry>
+        <term><parameter>fd</parameter></term>
+        <listitem>
+          <para>&fd;</para>
+        </listitem>
+      </varlistentry>
+      <varlistentry>
+        <term><parameter>request</parameter></term>
+        <listitem>
+          <para>VIDIOC_QUERY_DV_PRESET</para>
+        </listitem>
+      </varlistentry>
+      <varlistentry>
+        <term><parameter>argp</parameter></term>
+        <listitem>
+          <para></para>
+        </listitem>
+      </varlistentry>
+    </variablelist>
+  </refsect1>
+  <refsect1>
+    <title>Description</title>
+    <para>The hardware may be able to detect the current DV preset
+automatically, similar to sensing the video standard. To do so, applications
+call <constant> VIDIOC_QUERY_DV_PRESET</constant> with a pointer to a
+&v4l2-dv-preset; type. Once the hardware detects a preset, that preset is
+returned in the preset field of &v4l2-dv-preset;. When detection is not
+possible or fails, the value V4L2_DV_INVALID is returned.</para>
+  </refsect1>
+  <refsect1>
+    &return-value;
+    <variablelist>
+      <varlistentry>
+        <term><errorcode>EINVAL</errorcode></term>
+        <listitem>
+          <para>This ioctl is not supported.</para>
+        </listitem>
+    </varlistentry>
+      <varlistentry>
+        <term><errorcode>EBUSY</errorcode></term>
+        <listitem>
+          <para>The device is busy and therefore can not sense the preset</para>
+        </listitem>
+      </varlistentry>
+    </variablelist>
+  </refsect1>
+</refentry>
+<!--
+Local Variables:
+mode: sgml
+sgml-parent-document: "v4l2.sgml"
+indent-tabs-mode: nil
+End:
+-->
diff --git a/Documentation/DocBook/v4l/vidioc-querystd.xml b/Documentation/DocBook/v4l/vidioc-querystd.xml
index b5a7ff934486..1a9e60393091 100644
--- a/Documentation/DocBook/v4l/vidioc-querystd.xml
+++ b/Documentation/DocBook/v4l/vidioc-querystd.xml
@@ -70,6 +70,12 @@ current video input or output.</para>
          <para>This ioctl is not supported.</para>
        </listitem>
      </varlistentry>
+      <varlistentry>
+        <term><errorcode>EBUSY</errorcode></term>
+        <listitem>
+          <para>The device is busy and therefore can not detect the standard</para>
+        </listitem>
+      </varlistentry>
    </variablelist>
  </refsect1>
 </refentry>
diff --git a/Documentation/SubmitChecklist b/Documentation/SubmitChecklist
index 78a9168ff377..1053a56be3b1 100644
--- a/Documentation/SubmitChecklist
+++ b/Documentation/SubmitChecklist
@@ -15,7 +15,7 @@ kernel patches.
 2: Passes allnoconfig, allmodconfig
 3: Builds on multiple CPU architectures by using local cross-compile tools
-   or something like PLM at OSDL.
+   or some other build farm.
 4: ppc64 is a good architecture for cross-compilation checking because it
   tends to use `unsigned long' for 64-bit quantities.
@@ -88,3 +88,6 @@ kernel patches.
 24: All memory barriers {e.g., barrier(), rmb(), wmb()} need a comment in the
    source code that explains the logic of what they are doing and why.
+25: If any ioctl's are added by the patch, then also update
+    Documentation/ioctl/ioctl-number.txt.
diff --git a/Documentation/blackfin/00-INDEX b/Documentation/blackfin/00-INDEX
index d6840a91e1e1..c34e12440fec 100644
--- a/Documentation/blackfin/00-INDEX
+++ b/Documentation/blackfin/00-INDEX
@@ -1,9 +1,6 @@
 00-INDEX
        - This file
-cache-lock.txt
-        - HOWTO for blackfin cache locking.
 cachefeatures.txt
        - Supported cache features.
diff --git a/Documentation/blackfin/Makefile b/Documentation/blackfin/Makefile
new file mode 100644
index 000000000000..773dbb103f1c
--- /dev/null
+++ b/Documentation/blackfin/Makefile
@@ -0,0 +1,6 @@
+obj-m := gptimers-example.o
+all: modules
+modules clean:
+        $(MAKE) -C ../.. SUBDIRS=$(PWD) $@
diff --git a/Documentation/blackfin/cache-lock.txt b/Documentation/blackfin/cache-lock.txt
deleted file mode 100644
index 88ba1e6c31c3..000000000000
--- a/Documentation/blackfin/cache-lock.txt
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * File:         Documentation/blackfin/cache-lock.txt
- * Based on:
- * Author:
- *
- * Created:
- * Description:  This file contains the simple DMA Implementation for Blackfin
- *
- * Rev:          $Id: cache-lock.txt 2384 2006-11-01 04:12:43Z magicyang $
- *
- * Modified:
- *               Copyright 2004-2006 Analog Devices Inc.
- *
- * Bugs:         Enter bugs at http://blackfin.uclinux.org/
- *
- */
-How to lock your code in cache in uClinux/blackfin
--------------------------------------------------
-There are only a few steps required to lock your code into the cache.
-Currently you can lock the code by Way.
-Below are the interface provided for locking the cache.
-1. cache_grab_lock(int Ways);
-This function grab the lock for locking your code into the cache specified
-by Ways.
-2. cache_lock(int Ways);
-This function should be called after your critical code has been executed.
-Once the critical code exits, the code is now loaded into the cache. This
-function locks the code into the cache.
-So, the example sequence will be:
-        cache_grab_lock(WAY0_L);        /* Grab the lock */
-        critical_code();                /* Execute the code of interest */
-        cache_lock(WAY0_L);             /* Lock the cache */
-Where WAY0_L signifies WAY0 locking.
diff --git a/Documentation/blackfin/cachefeatures.txt b/Documentation/blackfin/cachefeatures.txt
index 0fbec23becb5..75de51f94515 100644
--- a/Documentation/blackfin/cachefeatures.txt
+++ b/Documentation/blackfin/cachefeatures.txt
@@ -41,16 +41,6 @@
                icplb_flush();
                dcplb_flush();
-        - Locking the cache.
-                cache_grab_lock();
-                cache_lock();
-        Please refer linux-2.6.x/Documentation/blackfin/cache-lock.txt for how to
-        lock the cache.
-        Locking the cache is optional feature.
        - Miscellaneous cache functions.
                flush_cache_all();
diff --git a/Documentation/blackfin/gptimers-example.c b/Documentation/blackfin/gptimers-example.c
new file mode 100644
index 000000000000..b1bd6340e748
--- /dev/null
+++ b/Documentation/blackfin/gptimers-example.c
@@ -0,0 +1,83 @@
+/*
+ * Simple gptimers example
+ *      http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:drivers:gptimers
+ *
+ * Copyright 2007-2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <asm/gptimers.h>
+#include <asm/portmux.h>
+/* ... random driver includes ... */
+#define DRIVER_NAME "gptimer_example"
+struct gptimer_data {
+        uint32_t period, width;
+};
+static struct gptimer_data data;
+/* ... random driver state ... */
+static irqreturn_t gptimer_example_irq(int irq, void *dev_id)
+{
+        struct gptimer_data *data = dev_id;
+        /* make sure it was our timer which caused the interrupt */
+        if (!get_gptimer_intr(TIMER5_id))
+                return IRQ_NONE;
+        /* read the width/period values that were captured for the waveform */
+        data->width = get_gptimer_pwidth(TIMER5_id);
+        data->period = get_gptimer_period(TIMER5_id);
+        /* acknowledge the interrupt */
+        clear_gptimer_intr(TIMER5_id);
+        /* tell the upper layers we took care of things */
+        return IRQ_HANDLED;
+}
+/* ... random driver code ... */
+static int __init gptimer_example_init(void)
+{
+        int ret;
+        /* grab the peripheral pins */
+        ret = peripheral_request(P_TMR5, DRIVER_NAME);
+        if (ret) {
+                printk(KERN_NOTICE DRIVER_NAME ": peripheral request failed\n");
+                return ret;
+        }
+        /* grab the IRQ for the timer */
+        ret = request_irq(IRQ_TIMER5, gptimer_example_irq, IRQF_SHARED, DRIVER_NAME, &data);
+        if (ret) {
+                printk(KERN_NOTICE DRIVER_NAME ": IRQ request failed\n");
+                peripheral_free(P_TMR5);
+                return ret;
+        }
+        /* setup the timer and enable it */
+        set_gptimer_config(TIMER5_id, WDTH_CAP | PULSE_HI | PERIOD_CNT | IRQ_ENA);
+        enable_gptimers(TIMER5bit);
+        return 0;
+}
+module_init(gptimer_example_init);
+static void __exit gptimer_example_exit(void)
+{
+        disable_gptimers(TIMER5bit);
+        free_irq(IRQ_TIMER5, &data);
+        peripheral_free(P_TMR5);
+}
+module_exit(gptimer_example_exit);
+MODULE_LICENSE("BSD");
diff --git a/Documentation/fb/viafb.txt b/Documentation/fb/viafb.txt
index 67dbf442b0b6..f3e046a6a987 100644
--- a/Documentation/fb/viafb.txt
+++ b/Documentation/fb/viafb.txt
@@ -7,7 +7,7 @@
    VIA UniChrome Family(CLE266, PM800 / CN400 / CN300,
                        P4M800CE / P4M800Pro / CN700 / VN800,
                        CX700 / VX700, K8M890, P4M890,
-                        CN896 / P4M900, VX800)
+                        CN896 / P4M900, VX800, VX855)
 [Driver features]
 ------------------------
@@ -154,13 +154,6 @@
        0 : No Dual Edge Panel (default)
        1 : Dual Edge Panel
-    viafb_video_dev:
-        This option is used to specify video output devices(CRT, DVI, LCD) for
-        duoview case.
-        For example:
-        To output video on DVI, we should use:
-            modprobe viafb viafb_video_dev=DVI...
    viafb_lcd_port:
        This option is used to specify LCD output port,
        available values are "DVP0" "DVP1" "DFP_HIGHLOW" "DFP_HIGH" "DFP_LOW".
@@ -181,9 +174,6 @@ Notes:
       and bpp, need to call VIAFB specified ioctl interface VIAFB_SET_DEVICE
       instead of calling common ioctl function FBIOPUT_VSCREENINFO since
       viafb doesn't support multi-head well, or it will cause screen crush.
-    4. VX800 2D accelerator hasn't been supported in this driver yet. When
-       using driver on VX800, the driver will disable the acceleration
-       function as default.
 [Configure viafb with "fbset" tool]
diff --git a/Documentation/filesystems/00-INDEX b/Documentation/filesystems/00-INDEX
index 7001782ab932..875d49696b6e 100644
--- a/Documentation/filesystems/00-INDEX
+++ b/Documentation/filesystems/00-INDEX
@@ -1,7 +1,5 @@
 00-INDEX
        - this file (info on some of the filesystems supported by linux).
-Exporting
-        - explanation of how to make filesystems exportable.
 Locking
        - info on locking rules as they pertain to Linux VFS.
 9p.txt
@@ -68,12 +66,8 @@ mandatory-locking.txt
        - info on the Linux implementation of Sys V mandatory file locking.
 ncpfs.txt
        - info on Novell Netware(tm) filesystem using NCP protocol.
-nfs41-server.txt
+nfs/
-        - info on the Linux server implementation of NFSv4 minor version 1.
+        - nfs-related documentation.
-nfs-rdma.txt
-        - how to install and setup the Linux NFS/RDMA client and server software.
-nfsroot.txt
-        - short guide on setting up a diskless box with NFS root filesystem.
 nilfs2.txt
        - info and mount options for the NILFS2 filesystem.
 ntfs.txt
@@ -92,8 +86,6 @@ relay.txt
        - info on relay, for efficient streaming from kernel to user space.
 romfs.txt
        - description of the ROMFS filesystem.
-rpc-cache.txt
-        - introduction to the caching mechanisms in the sunrpc layer.
 seq_file.txt
        - how to use the seq_file API
 sharedsubtree.txt
diff --git a/Documentation/filesystems/nfs/00-INDEX b/Documentation/filesystems/nfs/00-INDEX
new file mode 100644
index 000000000000..2f68cd688769
--- /dev/null
+++ b/Documentation/filesystems/nfs/00-INDEX
@@ -0,0 +1,16 @@
+00-INDEX
+        - this file (nfs-related documentation).
+Exporting
+        - explanation of how to make filesystems exportable.
+knfsd-stats.txt
+        - statistics which the NFS server makes available to user space.
+nfs.txt
+        - nfs client, and DNS resolution for fs_locations.
+nfs41-server.txt
+        - info on the Linux server implementation of NFSv4 minor version 1.
+nfs-rdma.txt
+        - how to install and setup the Linux NFS/RDMA client and server software
+nfsroot.txt
+        - short guide on setting up a diskless box with NFS root filesystem.
+rpc-cache.txt
+        - introduction to the caching mechanisms in the sunrpc layer.
diff --git a/Documentation/filesystems/Exporting b/Documentation/filesystems/nfs/Exporting
index 87019d2b5981..87019d2b5981 100644
--- a/Documentation/filesystems/Exporting
+++ b/Documentation/filesystems/nfs/Exporting
diff --git a/Documentation/filesystems/knfsd-stats.txt b/Documentation/filesystems/nfs/knfsd-stats.txt
index 64ced5149d37..64ced5149d37 100644
--- a/Documentation/filesystems/knfsd-stats.txt
+++ b/Documentation/filesystems/nfs/knfsd-stats.txt
diff --git a/Documentation/filesystems/nfs-rdma.txt b/Documentation/filesystems/nfs/nfs-rdma.txt
index e386f7e4bcee..e386f7e4bcee 100644
--- a/Documentation/filesystems/nfs-rdma.txt
+++ b/Documentation/filesystems/nfs/nfs-rdma.txt
diff --git a/Documentation/filesystems/nfs.txt b/Documentation/filesystems/nfs/nfs.txt
index f50f26ce6cd0..f50f26ce6cd0 100644
--- a/Documentation/filesystems/nfs.txt
+++ b/Documentation/filesystems/nfs/nfs.txt
diff --git a/Documentation/filesystems/nfs41-server.txt b/Documentation/filesystems/nfs/nfs41-server.txt
index 5920fe26e6ff..1bd0d0c05171 100644
--- a/Documentation/filesystems/nfs41-server.txt
+++ b/Documentation/filesystems/nfs/nfs41-server.txt
@@ -41,7 +41,7 @@ interoperability problems with future clients.  Known issues:
          conformant with the spec (for example, we don't use kerberos
          on the backchannel correctly).
        - no trunking support: no clients currently take advantage of
-          trunking, but this is a mandatory failure, and its use is
+          trunking, but this is a mandatory feature, and its use is
          recommended to clients in a number of places.  (E.g. to ensure
          timely renewal in case an existing connection's retry timeouts
          have gotten too long; see section 8.3 of the draft.)
@@ -213,3 +213,10 @@ The following cases aren't supported yet:
  DESTROY_CLIENTID, DESTROY_SESSION, EXCHANGE_ID.
 * DESTROY_SESSION MUST be the final operation in the COMPOUND request.
+Nonstandard compound limitations:
+* No support for a sessions fore channel RPC compound that requires both a
+  ca_maxrequestsize request and a ca_maxresponsesize reply, so we may
+  fail to live up to the promise we made in CREATE_SESSION fore channel
+  negotiation.
+* No more than one IO operation (read, write, readdir) allowed per
+  compound.
diff --git a/Documentation/filesystems/nfsroot.txt b/Documentation/filesystems/nfs/nfsroot.txt
index 3ba0b945aaf8..3ba0b945aaf8 100644
--- a/Documentation/filesystems/nfsroot.txt
+++ b/Documentation/filesystems/nfs/nfsroot.txt
diff --git a/Documentation/filesystems/rpc-cache.txt b/Documentation/filesystems/nfs/rpc-cache.txt
index 8a382bea6808..8a382bea6808 100644
--- a/Documentation/filesystems/rpc-cache.txt
+++ b/Documentation/filesystems/nfs/rpc-cache.txt
diff --git a/Documentation/filesystems/porting b/Documentation/filesystems/porting
index 92b888d540a6..a7e9746ee7ea 100644
--- a/Documentation/filesystems/porting
+++ b/Documentation/filesystems/porting
@@ -140,7 +140,7 @@ Callers of notify_change() need ->i_mutex now.
 New super_block field "struct export_operations *s_export_op" for
 explicit support for exporting, e.g. via NFS.  The structure is fully
 documented at its declaration in include/linux/fs.h, and in
-Documentation/filesystems/Exporting.
+Documentation/filesystems/nfs/Exporting.
 Briefly it allows for the definition of decode_fh and encode_fh operations
 to encode and decode filehandles, and allows the filesystem to use
diff --git a/Documentation/filesystems/seq_file.txt b/Documentation/filesystems/seq_file.txt
index 0d15ebccf5b0..a1e2e0dda907 100644
--- a/Documentation/filesystems/seq_file.txt
+++ b/Documentation/filesystems/seq_file.txt
@@ -248,9 +248,7 @@ code, that is done in the initialization code in the usual way:
        {
                struct proc_dir_entry *entry;
-                entry = create_proc_entry("sequence", 0, NULL);
+                proc_create("sequence", 0, NULL, &ct_file_ops);
-                if (entry)
-                        entry->proc_fops = &ct_file_ops;
                return 0;
        }
diff --git a/Documentation/gpio.txt b/Documentation/gpio.txt
index e4e7daed2ba8..1866c27eec69 100644
--- a/Documentation/gpio.txt
+++ b/Documentation/gpio.txt
@@ -531,6 +531,13 @@ and have the following read/write attributes:
                This file exists only if the pin can be configured as an
                interrupt generating input pin.
+        "active_low" ... reads as either 0 (false) or 1 (true).  Write
+                any nonzero value to invert the value attribute both
+                for reading and writing.  Existing and subsequent
+                poll(2) support configuration via the edge attribute
+                for "rising" and "falling" edges will follow this
+                setting.
 GPIO controllers have paths like /sys/class/gpio/gpiochip42/ (for the
 controller implementing GPIOs starting at #42) and have the following
 read-only attributes:
@@ -566,6 +573,8 @@ requested using gpio_request():
        int gpio_export_link(struct device *dev, const char *name,
                unsigned gpio)
+        /* change the polarity of a GPIO node in sysfs */
+        int gpio_sysfs_set_active_low(unsigned gpio, int value);
 After a kernel driver requests a GPIO, it may only be made available in
 the sysfs interface by gpio_export().  The driver can control whether the
@@ -580,3 +589,9 @@ After the GPIO has been exported, gpio_export_link() allows creating
 symlinks from elsewhere in sysfs to the GPIO sysfs node.  Drivers can
 use this to provide the interface under their own device in sysfs with
 a descriptive name.
+Drivers can use gpio_sysfs_set_active_low() to hide GPIO line polarity
+differences between boards from user space.  This only affects the
+sysfs interface.  Polarity change can be done both before and after
+gpio_export(), and previously enabled poll(2) support for either
+rising or falling edge will be reconfigured to follow this setting.
diff --git a/Documentation/infiniband/ipoib.txt b/Documentation/infiniband/ipoib.txt
index 6d40f00b358c..64eeb55d0c09 100644
--- a/Documentation/infiniband/ipoib.txt
+++ b/Documentation/infiniband/ipoib.txt
@@ -36,11 +36,11 @@ Datagram vs Connected modes
  fabric with a 2K MTU, the IPoIB MTU will be 2048 - 4 = 2044 bytes.
  In connected mode, the IB RC (Reliable Connected) transport is used.
-  Connected mode is to takes advantage of the connected nature of the
+  Connected mode takes advantage of the connected nature of the IB
-  IB transport and allows an MTU up to the maximal IP packet size of
+  transport and allows an MTU up to the maximal IP packet size of 64K,
-  64K, which reduces the number of IP packets needed for handling
+  which reduces the number of IP packets needed for handling large UDP
-  large UDP datagrams, TCP segments, etc and increases the performance
+  datagrams, TCP segments, etc and increases the performance for large
-  for large messages.
+  messages.
  In connected mode, the interface's UD QP is still used for multicast
  and communication with peers that don't support connected mode. In
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index ab95d3ada5c7..5ba4d9dff113 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -1032,7 +1032,7 @@ and is between 256 and 4096 characters. It is defined in the file
                        No delay
        ip=             [IP_PNP]
-                        See Documentation/filesystems/nfsroot.txt.
+                        See Documentation/filesystems/nfs/nfsroot.txt.
        ip2=            [HW] Set IO/IRQ pairs for up to 4 IntelliPort boards
                        See comment before ip2_setup() in
@@ -1553,10 +1553,10 @@ and is between 256 and 4096 characters. It is defined in the file
                        going to be removed in 2.6.29.
        nfsaddrs=       [NFS]
-                        See Documentation/filesystems/nfsroot.txt.
+                        See Documentation/filesystems/nfs/nfsroot.txt.
        nfsroot=        [NFS] nfs root filesystem for disk-less boxes.
-                        See Documentation/filesystems/nfsroot.txt.
+                        See Documentation/filesystems/nfs/nfsroot.txt.
        nfs.callback_tcpport=
                        [NFS] set the TCP port on which the NFSv4 callback
@@ -2729,6 +2729,11 @@ and is between 256 and 4096 characters. It is defined in the file
        vmpoff=         [KNL,S390] Perform z/VM CP command after power off.
                        Format: <command>
+        vt.cur_default= [VT] Default cursor shape.
+                        Format: 0xCCBBAA, where AA, BB, and CC are the same as
+                        the parameters of the <Esc>[?A;B;Cc escape sequence;
+                        see VGA-softcursor.txt. Default: 2 = underline.
        vt.default_blu= [VT]
                        Format: <blue0>,<blue1>,<blue2>,...,<blue15>
                        Change the default blue palette of the console.
diff --git a/Documentation/powerpc/dts-bindings/4xx/ppc440spe-adma.txt b/Documentation/powerpc/dts-bindings/4xx/ppc440spe-adma.txt
new file mode 100644
index 000000000000..515ebcf1b97d
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/4xx/ppc440spe-adma.txt
@@ -0,0 +1,93 @@
+PPC440SPe DMA/XOR (DMA Controller and XOR Accelerator)
+Device nodes needed for operation of the ppc440spe-adma driver
+are specified hereby. These are I2O/DMA, DMA and XOR nodes
+for DMA engines and Memory Queue Module node. The latter is used
+by ADMA driver for configuration of RAID-6 H/W capabilities of
+the PPC440SPe. In addition to the nodes and properties described
+below, the ranges property of PLB node must specify ranges for
+DMA devices.
+ i) The I2O node
+ Required properties:
+ - compatible           : "ibm,i2o-440spe";
+ - reg                  : <registers mapping>
+ - dcr-reg              : <DCR registers range>
+ Example:
+        I2O: i2o@400100000 {
+                compatible = "ibm,i2o-440spe";
+                reg = <0x00000004 0x00100000 0x100>;
+                dcr-reg = <0x060 0x020>;
+        };
+ ii) The DMA node
+ Required properties:
+ - compatible           : "ibm,dma-440spe";
+ - cell-index           : 1 cell, hardware index of the DMA engine
+                          (typically 0x0 and 0x1 for DMA0 and DMA1)
+ - reg                  : <registers mapping>
+ - dcr-reg              : <DCR registers range>
+ - interrupts           : <interrupt mapping for DMA0/1 interrupts sources:
+                           2 sources: DMAx CS FIFO Needs Service IRQ (on UIC0)
+                           and DMA Error IRQ (on UIC1). The latter is common
+                           for both DMA engines>.
+ - interrupt-parent     : needed for interrupt mapping
+ Example:
+        DMA0: dma0@400100100 {
+                compatible = "ibm,dma-440spe";
+                cell-index = <0>;
+                reg = <0x00000004 0x00100100 0x100>;
+                dcr-reg = <0x060 0x020>;
+                interrupt-parent = <&DMA0>;
+                interrupts = <0 1>;
+                #interrupt-cells = <1>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                interrupt-map = <
+                        0 &UIC0 0x14 4
+                        1 &UIC1 0x16 4>;
+        };
+ iii) XOR Accelerator node
+ Required properties:
+ - compatible           : "amcc,xor-accelerator";
+ - reg                  : <registers mapping>
+ - interrupts           : <interrupt mapping for XOR interrupt source>
+ - interrupt-parent     : for interrupt mapping
+ Example:
+        xor-accel@400200000 {
+                compatible = "amcc,xor-accelerator";
+                reg = <0x00000004 0x00200000 0x400>;
+                interrupt-parent = <&UIC1>;
+                interrupts = <0x1f 4>;
+        };
+ iv) Memory Queue Module node
+ Required properties:
+ - compatible           : "ibm,mq-440spe";
+ - dcr-reg              : <DCR registers range>
+ Example:
+        MQ0: mq {
+                compatible = "ibm,mq-440spe";
+                dcr-reg = <0x040 0x020>;
+        };
diff --git a/Documentation/video4linux/gspca.txt b/Documentation/video4linux/gspca.txt
index 319d9838e87e..1800a62cf135 100644
--- a/Documentation/video4linux/gspca.txt
+++ b/Documentation/video4linux/gspca.txt
@@ -12,6 +12,7 @@ m5602		0402:5602	ALi Video Camera Controller
 spca501         040a:0002       Kodak DVC-325
 spca500         040a:0300       Kodak EZ200
 zc3xx           041e:041e       Creative WebCam Live!
+ov519           041e:4003       Video Blaster WebCam Go Plus
 spca500         041e:400a       Creative PC-CAM 300
 sunplus         041e:400b       Creative PC-CAM 600
 sunplus         041e:4012       PC-Cam350
@@ -168,10 +169,14 @@ sunplus		055f:c650	Mustek MDC5500Z
 zc3xx           055f:d003       Mustek WCam300A
 zc3xx           055f:d004       Mustek WCam300 AN
 conex           0572:0041       Creative Notebook cx11646
+ov519           05a9:0511       Video Blaster WebCam 3/WebCam Plus, D-Link USB Digital Video Camera
+ov519           05a9:0518       Creative WebCam
 ov519           05a9:0519       OV519 Microphone
 ov519           05a9:0530       OmniVision
+ov519           05a9:2800       OmniVision SuperCAM
 ov519           05a9:4519       Webcam Classic
 ov519           05a9:8519       OmniVision
+ov519           05a9:a511       D-Link USB Digital Video Camera
 ov519           05a9:a518       D-Link DSB-C310 Webcam
 sunplus         05da:1018       Digital Dream Enigma 1.3
 stk014          05e1:0893       Syntek DV4000
@@ -187,7 +192,7 @@ ov534		06f8:3002	Hercules Blog Webcam
 ov534           06f8:3003       Hercules Dualpix HD Weblog
 sonixj          06f8:3004       Hercules Classic Silver
 sonixj          06f8:3008       Hercules Deluxe Optical Glass
-pac7311         06f8:3009       Hercules Classic Link
+pac7302         06f8:3009       Hercules Classic Link
 spca508         0733:0110       ViewQuest VQ110
 spca501         0733:0401       Intel Create and Share
 spca501         0733:0402       ViewQuest M318B
@@ -199,6 +204,7 @@ sunplus		0733:2221	Mercury Digital Pro 3.1p
 sunplus         0733:3261       Concord 3045 spca536a
 sunplus         0733:3281       Cyberpix S550V
 spca506         0734:043b       3DeMon USB Capture aka
+ov519           0813:0002       Dual Mode USB Camera Plus
 spca500         084d:0003       D-Link DSC-350
 spca500         08ca:0103       Aiptek PocketDV
 sunplus         08ca:0104       Aiptek PocketDVII 1.3
@@ -236,15 +242,15 @@ pac7311		093a:2603	Philips SPC 500 NC
 pac7311         093a:2608       Trust WB-3300p
 pac7311         093a:260e       Gigaware VGA PC Camera, Trust WB-3350p, SIGMA cam 2350
 pac7311         093a:260f       SnakeCam
-pac7311         093a:2620       Apollo AC-905
+pac7302         093a:2620       Apollo AC-905
-pac7311         093a:2621       PAC731x
+pac7302         093a:2621       PAC731x
-pac7311         093a:2622       Genius Eye 312
+pac7302         093a:2622       Genius Eye 312
-pac7311         093a:2624       PAC7302
+pac7302         093a:2624       PAC7302
-pac7311         093a:2626       Labtec 2200
+pac7302         093a:2626       Labtec 2200
-pac7311         093a:2628       Genius iLook 300
+pac7302         093a:2628       Genius iLook 300
-pac7311         093a:2629       Genious iSlim 300
+pac7302         093a:2629       Genious iSlim 300
-pac7311         093a:262a       Webcam 300k
+pac7302         093a:262a       Webcam 300k
-pac7311         093a:262c       Philips SPC 230 NC
+pac7302         093a:262c       Philips SPC 230 NC
 jeilinj         0979:0280       Sakar 57379
 zc3xx           0ac8:0302       Z-star Vimicro zc0302
 vc032x          0ac8:0321       Vimicro generic vc0321
@@ -259,6 +265,7 @@ vc032x		0ac8:c002	Sony embedded vimicro
 vc032x          0ac8:c301       Samsung Q1 Ultra Premium
 spca508         0af9:0010       Hama USB Sightcam 100
 spca508         0af9:0011       Hama USB Sightcam 100
+ov519           0b62:0059       iBOT2 Webcam
 sonixb          0c45:6001       Genius VideoCAM NB
 sonixb          0c45:6005       Microdia Sweex Mini Webcam
 sonixb          0c45:6007       Sonix sn9c101 + Tas5110D
@@ -318,8 +325,10 @@ sn9c20x		0c45:62b3	PC Camera (SN9C202 + OV9655)
 sn9c20x         0c45:62bb       PC Camera (SN9C202 + OV7660)
 sn9c20x         0c45:62bc       PC Camera (SN9C202 + HV7131R)
 sunplus         0d64:0303       Sunplus FashionCam DXG
+ov519           0e96:c001       TRUST 380 USB2 SPACEC@M
 etoms           102c:6151       Qcam Sangha CIF
 etoms           102c:6251       Qcam xxxxxx VGA
+ov519           1046:9967       W9967CF/W9968CF WebCam IC, Video Blaster WebCam Go
 zc3xx           10fd:0128       Typhoon Webshot II USB 300k 0x0128
 spca561         10fd:7e50       FlyCam Usb 100
 zc3xx           10fd:8050       Typhoon Webshot II USB 300k
@@ -332,7 +341,12 @@ spca501		1776:501c	Arowana 300K CMOS Camera
 t613            17a1:0128       TASCORP JPEG Webcam, NGS Cyclops
 vc032x          17ef:4802       Lenovo Vc0323+MI1310_SOC
 pac207          2001:f115       D-Link DSB-C120
+sq905c          2770:9050       sq905c
+sq905c          2770:905c       DualCamera
+sq905           2770:9120       Argus Digital Camera DC1512
+sq905c          2770:913d       sq905c
 spca500         2899:012c       Toptro Industrial
+ov519           8020:ef04       ov519
 spca508         8086:0110       Intel Easy PC Camera
 spca500         8086:0630       Intel Pocket PC Camera
 spca506         99fa:8988       Grandtec V.cap
diff --git a/Documentation/video4linux/sh_mobile_ceu_camera.txt b/Documentation/video4linux/sh_mobile_ceu_camera.txt
new file mode 100644
index 000000000000..2ae16349a78d
--- /dev/null
+++ b/Documentation/video4linux/sh_mobile_ceu_camera.txt
@@ -0,0 +1,157 @@
+        Cropping and Scaling algorithm, used in the sh_mobile_ceu_camera driver
+        =======================================================================
+Terminology
+-----------
+sensor scales: horizontal and vertical scales, configured by the sensor driver
+host scales: -"- host driver
+combined scales: sensor_scale * host_scale
+Generic scaling / cropping scheme
+---------------------------------
+-1--
+|
+-2-- -\
+|      --\
+|         --\
+-5-- -\     -- -3--
+|       ---\
+|           --- -4-- -\
+|                      -\
+|                        - -6--
+|
+|                        - -6'-
+|                      -/
+|           --- -4'- -/
+|       ---/
+-5'- -/
+|            -- -3'-
+|         --/
+|      --/
+-2'- -/
+|
+|
+-1'-
+Produced by user requests:
+S_CROP(left / top = (5) - (1), width / height = (5') - (5))
+S_FMT(width / height = (6') - (6))
+Here:
+(1) to (1') - whole max width or height
+(1) to (2)  - sensor cropped left or top
+(2) to (2') - sensor cropped width or height
+(3) to (3') - sensor scale
+(3) to (4)  - CEU cropped left or top
+(4) to (4') - CEU cropped width or height
+(5) to (5') - reverse sensor scale applied to CEU cropped width or height
+(2) to (5)  - reverse sensor scale applied to CEU cropped left or top
+(6) to (6') - CEU scale - user window
+S_FMT
+-----
+Do not touch input rectangle - it is already optimal.
+1. Calculate current sensor scales:
+        scale_s = ((3') - (3)) / ((2') - (2))
+2. Calculate "effective" input crop (sensor subwindow) - CEU crop scaled back at
+current sensor scales onto input window - this is user S_CROP:
+        width_u = (5') - (5) = ((4') - (4)) * scale_s
+3. Calculate new combined scales from "effective" input window to requested user
+window:
+        scale_comb = width_u / ((6') - (6))
+4. Calculate sensor output window by applying combined scales to real input
+window:
+        width_s_out = ((2') - (2)) / scale_comb
+5. Apply iterative sensor S_FMT for sensor output window.
+        subdev->video_ops->s_fmt(.width = width_s_out)
+6. Retrieve sensor output window (g_fmt)
+7. Calculate new sensor scales:
+        scale_s_new = ((3')_new - (3)_new) / ((2') - (2))
+8. Calculate new CEU crop - apply sensor scales to previously calculated
+"effective" crop:
+        width_ceu = (4')_new - (4)_new = width_u / scale_s_new
+        left_ceu = (4)_new - (3)_new = ((5) - (2)) / scale_s_new
+9. Use CEU cropping to crop to the new window:
+        ceu_crop(.width = width_ceu, .left = left_ceu)
+10. Use CEU scaling to scale to the requested user window:
+        scale_ceu = width_ceu / width
+S_CROP
+------
+If old scale applied to new crop is invalid produce nearest new scale possible
+1. Calculate current combined scales.
+        scale_comb = (((4') - (4)) / ((6') - (6))) * (((2') - (2)) / ((3') - (3)))
+2. Apply iterative sensor S_CROP for new input window.
+3. If old combined scales applied to new crop produce an impossible user window,
+adjust scales to produce nearest possible window.
+        width_u_out = ((5') - (5)) / scale_comb
+        if (width_u_out > max)
+                scale_comb = ((5') - (5)) / max;
+        else if (width_u_out < min)
+                scale_comb = ((5') - (5)) / min;
+4. Issue G_CROP to retrieve actual input window.
+5. Using actual input window and calculated combined scales calculate sensor
+target output window.
+        width_s_out = ((3') - (3)) = ((2') - (2)) / scale_comb
+6. Apply iterative S_FMT for new sensor target output window.
+7. Issue G_FMT to retrieve the actual sensor output window.
+8. Calculate sensor scales.
+        scale_s = ((3') - (3)) / ((2') - (2))
+9. Calculate sensor output subwindow to be cropped on CEU by applying sensor
+scales to the requested window.
+        width_ceu = ((5') - (5)) / scale_s
+10. Use CEU cropping for above calculated window.
+11. Calculate CEU scales from sensor scales from results of (10) and user window
+from (3)
+        scale_ceu = calc_scale(((5') - (5)), &width_u_out)
+12. Apply CEU scales.
+--
+Author: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
diff --git a/Documentation/video4linux/v4l2-framework.txt b/Documentation/video4linux/v4l2-framework.txt
index b806edaf3e75..74d677c8b036 100644
--- a/Documentation/video4linux/v4l2-framework.txt
+++ b/Documentation/video4linux/v4l2-framework.txt
@@ -561,6 +561,8 @@ video_device helper functions
 There are a few useful helper functions:
+- file/video_device private data
 You can set/get driver private data in the video_device struct using:
 void *video_get_drvdata(struct video_device *vdev);
@@ -575,8 +577,7 @@ struct video_device *video_devdata(struct file *file);
 returns the video_device belonging to the file struct.
-The final helper function combines video_get_drvdata with
+The video_drvdata function combines video_get_drvdata with video_devdata:
-video_devdata:
 void *video_drvdata(struct file *file);
@@ -584,6 +585,17 @@ You can go from a video_device struct to the v4l2_device struct using:
 struct v4l2_device *v4l2_dev = vdev->v4l2_dev;
+- Device node name
+The video_device node kernel name can be retrieved using
+const char *video_device_node_name(struct video_device *vdev);
+The name is used as a hint by userspace tools such as udev. The function
+should be used where possible instead of accessing the video_device::num and
+video_device::minor fields.
 video buffer helper functions
 -----------------------------
diff --git a/MAINTAINERS b/MAINTAINERS
index 0a32c3ec6b1c..d6a27110a747 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5991,9 +5991,9 @@ F:	sound/soc/codecs/wm8350.*
 F:      sound/soc/codecs/wm8400.*
 X.25 NETWORK LAYER
-M:      Henner Eisen <eis@baty.hanse.de>
+M:      Andrew Hendry <andrew.hendry@gmail.com>
 L:      linux-x25@vger.kernel.org
-S:      Maintained
+S:      Odd Fixes
 F:      Documentation/networking/x25*
 F:      include/net/x25*
 F:      net/x25/
diff --git a/arch/alpha/include/asm/elf.h b/arch/alpha/include/asm/elf.h
index 5c75c1b2352a..9baae8afe8a3 100644
--- a/arch/alpha/include/asm/elf.h
+++ b/arch/alpha/include/asm/elf.h
@@ -81,7 +81,6 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
 #define ELF_DATA        ELFDATA2LSB
 #define ELF_ARCH        EM_ALPHA
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE       8192
 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index 6aac3f5bb2f3..a399bb5730f1 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -101,7 +101,6 @@ extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int);
 int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs);
 #define ELF_CORE_COPY_TASK_REGS dump_task_regs
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE       4096
 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index 0e627705f746..8214bfebfaca 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -48,27 +48,7 @@ extern void __aeabi_uidivmod(void);
 extern void __aeabi_ulcmp(void);
 extern void fpundefinstr(void);
-extern void fp_enter(void);
-/*
- * This has a special calling convention; it doesn't
- * modify any of the usual registers, except for LR.
- */
-#define EXPORT_CRC_ALIAS(sym) __CRC_SYMBOL(sym, "")
-#define EXPORT_SYMBOL_ALIAS(sym,orig)           \
- EXPORT_CRC_ALIAS(sym)                          \
- static const struct kernel_symbol __ksymtab_##sym      \
-  __used __attribute__((section("__ksymtab"))) =        \
-    { (unsigned long)&orig, #sym };
-/*
- * floating point math emulator support.
- * These symbols will never change their calling convention...
- */
-EXPORT_SYMBOL_ALIAS(kern_fp_enter,fp_enter);
-EXPORT_SYMBOL_ALIAS(fp_printk,printk);
-EXPORT_SYMBOL_ALIAS(fp_send_sig,send_sig);
 EXPORT_SYMBOL(__backtrace);
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 71151bd87a36..4957e13ef55b 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -65,11 +65,11 @@ SECTIONS
        __init_end = .;
 #endif
-        /DISCARD/ : {                   /* Exit code and data           */
+        /*
-                EXIT_TEXT
+         * unwind exit sections must be discarded before the rest of the
-                EXIT_DATA
+         * unwind sections get included.
-                *(.exitcall.exit)
+         */
-                *(.discard)
+        /DISCARD/ : {
                *(.ARM.exidx.exit.text)
                *(.ARM.extab.exit.text)
 #ifndef CONFIG_HOTPLUG_CPU
@@ -238,6 +238,9 @@ SECTIONS
        STABS_DEBUG
        .comment 0 : { *(.comment) }
+        /* Default discards */
+        DISCARDS
 }
 /*
diff --git a/arch/arm/mach-bcmring/arch.c b/arch/arm/mach-bcmring/arch.c
index fbe6fa02c882..53dd2a9eecf9 100644
--- a/arch/arm/mach-bcmring/arch.c
+++ b/arch/arm/mach-bcmring/arch.c
@@ -70,9 +70,19 @@ static struct ctl_table bcmring_sysctl_reboot[] = {
        {}
 };
+static struct resource nand_resource[] = {
+        [0] = {
+                .start = MM_ADDR_IO_NAND,
+                .end = MM_ADDR_IO_NAND + 0x1000 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+};
 static struct platform_device nand_device = {
        .name = "bcm-nand",
        .id = -1,
+        .resource = nand_resource,
+        .num_resources  = ARRAY_SIZE(nand_resource),
 };
 static struct platform_device *devices[] __initdata = {
diff --git a/arch/arm/mach-bcmring/include/mach/reg_nand.h b/arch/arm/mach-bcmring/include/mach/reg_nand.h
new file mode 100644
index 000000000000..387376ffb56b
--- /dev/null
+++ b/arch/arm/mach-bcmring/include/mach/reg_nand.h
@@ -0,0 +1,66 @@
+/*****************************************************************************
+* Copyright 2001 - 2008 Broadcom Corporation.  All rights reserved.
+*
+* Unless you and Broadcom execute a separate written software license
+* agreement governing use of this software, this software is licensed to you
+* under the terms of the GNU General Public License version 2, available at
+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
+*
+* Notwithstanding the above, under no circumstances may you combine this
+* software in any way with any other Broadcom software provided under a
+* license other than the GPL, without Broadcom's express prior written
+* consent.
+*****************************************************************************/
+/*
+*
+*****************************************************************************
+*
+*  REG_NAND.h
+*
+*  PURPOSE:
+*
+*     This file contains definitions for the nand registers:
+*
+*  NOTES:
+*
+*****************************************************************************/
+#if !defined(__ASM_ARCH_REG_NAND_H)
+#define __ASM_ARCH_REG_NAND_H
+/* ---- Include Files ---------------------------------------------------- */
+#include <csp/reg.h>
+#include <mach/reg_umi.h>
+/* ---- Constants and Types ---------------------------------------------- */
+#define HW_NAND_BASE       MM_IO_BASE_NAND      /* NAND Flash */
+/* DMA accesses by the bootstrap need hard nonvirtual addresses */
+#define REG_NAND_CMD            __REG16(HW_NAND_BASE + 0)
+#define REG_NAND_ADDR           __REG16(HW_NAND_BASE + 4)
+#define REG_NAND_PHYS_DATA16   (HW_NAND_BASE + 8)
+#define REG_NAND_PHYS_DATA8    (HW_NAND_BASE + 8)
+#define REG_NAND_DATA16         __REG16(REG_NAND_PHYS_DATA16)
+#define REG_NAND_DATA8          __REG8(REG_NAND_PHYS_DATA8)
+/* use appropriate offset to make sure it start at the 1K boundary */
+#define REG_NAND_PHYS_DATA_DMA   (HW_NAND_BASE + 0x400)
+#define REG_NAND_DATA_DMA         __REG32(REG_NAND_PHYS_DATA_DMA)
+/* Linux DMA requires physical address of the data register */
+#define REG_NAND_DATA16_PADDR    HW_IO_VIRT_TO_PHYS(REG_NAND_PHYS_DATA16)
+#define REG_NAND_DATA8_PADDR     HW_IO_VIRT_TO_PHYS(REG_NAND_PHYS_DATA8)
+#define REG_NAND_DATA_PADDR      HW_IO_VIRT_TO_PHYS(REG_NAND_PHYS_DATA_DMA)
+#define NAND_BUS_16BIT()        (0)
+#define NAND_BUS_8BIT()         (!NAND_BUS_16BIT())
+/* Register offsets */
+#define REG_NAND_CMD_OFFSET     (0)
+#define REG_NAND_ADDR_OFFSET    (4)
+#define REG_NAND_DATA8_OFFSET   (8)
+#endif
diff --git a/arch/arm/mach-bcmring/include/mach/reg_umi.h b/arch/arm/mach-bcmring/include/mach/reg_umi.h
new file mode 100644
index 000000000000..06a355481ea6
--- /dev/null
+++ b/arch/arm/mach-bcmring/include/mach/reg_umi.h
@@ -0,0 +1,237 @@
+/*****************************************************************************
+* Copyright 2005 - 2008 Broadcom Corporation.  All rights reserved.
+*
+* Unless you and Broadcom execute a separate written software license
+* agreement governing use of this software, this software is licensed to you
+* under the terms of the GNU General Public License version 2, available at
+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
+*
+* Notwithstanding the above, under no circumstances may you combine this
+* software in any way with any other Broadcom software provided under a
+* license other than the GPL, without Broadcom's express prior written
+* consent.
+*****************************************************************************/
+/*
+*
+*****************************************************************************
+*
+*  REG_UMI.h
+*
+*  PURPOSE:
+*
+*     This file contains definitions for the nand registers:
+*
+*  NOTES:
+*
+*****************************************************************************/
+#if !defined(__ASM_ARCH_REG_UMI_H)
+#define __ASM_ARCH_REG_UMI_H
+/* ---- Include Files ---------------------------------------------------- */
+#include <csp/reg.h>
+#include <mach/csp/mm_io.h>
+/* ---- Constants and Types ---------------------------------------------- */
+/* Unified Memory Interface Ctrl Register */
+#define HW_UMI_BASE       MM_IO_BASE_UMI
+/* Flash bank 0 timing and control register */
+#define REG_UMI_FLASH0_TCR         __REG32(HW_UMI_BASE  + 0x00)
+/* Flash bank 1 timing and control register */
+#define REG_UMI_FLASH1_TCR         __REG32(HW_UMI_BASE  + 0x04)
+/* Flash bank 2 timing and control register */
+#define REG_UMI_FLASH2_TCR         __REG32(HW_UMI_BASE  + 0x08)
+/* MMD interface and control register */
+#define REG_UMI_MMD_ICR            __REG32(HW_UMI_BASE  + 0x0c)
+/* NAND timing and control register */
+#define REG_UMI_NAND_TCR           __REG32(HW_UMI_BASE  + 0x18)
+/* NAND ready/chip select register */
+#define REG_UMI_NAND_RCSR          __REG32(HW_UMI_BASE  + 0x1c)
+/* NAND ECC control & status register */
+#define REG_UMI_NAND_ECC_CSR       __REG32(HW_UMI_BASE  + 0x20)
+/* NAND ECC data register XXB2B1B0 */
+#define REG_UMI_NAND_ECC_DATA      __REG32(HW_UMI_BASE  + 0x24)
+/* BCH ECC Parameter N */
+#define REG_UMI_BCH_N              __REG32(HW_UMI_BASE  + 0x40)
+/* BCH ECC Parameter T */
+#define REG_UMI_BCH_K              __REG32(HW_UMI_BASE  + 0x44)
+/* BCH ECC Parameter K */
+#define REG_UMI_BCH_T              __REG32(HW_UMI_BASE  + 0x48)
+/* BCH ECC Contro Status */
+#define REG_UMI_BCH_CTRL_STATUS    __REG32(HW_UMI_BASE  + 0x4C)
+/* BCH WR ECC 31:0 */
+#define REG_UMI_BCH_WR_ECC_0       __REG32(HW_UMI_BASE  + 0x50)
+/* BCH WR ECC 63:32 */
+#define REG_UMI_BCH_WR_ECC_1       __REG32(HW_UMI_BASE  + 0x54)
+/* BCH WR ECC 95:64 */
+#define REG_UMI_BCH_WR_ECC_2       __REG32(HW_UMI_BASE  + 0x58)
+/* BCH WR ECC 127:96 */
+#define REG_UMI_BCH_WR_ECC_3       __REG32(HW_UMI_BASE  + 0x5c)
+/* BCH WR ECC 155:128 */
+#define REG_UMI_BCH_WR_ECC_4       __REG32(HW_UMI_BASE  + 0x60)
+/* BCH Read Error Location 1,0 */
+#define REG_UMI_BCH_RD_ERR_LOC_1_0 __REG32(HW_UMI_BASE  + 0x64)
+/* BCH Read Error Location 3,2 */
+#define REG_UMI_BCH_RD_ERR_LOC_3_2 __REG32(HW_UMI_BASE  + 0x68)
+/* BCH Read Error Location 5,4 */
+#define REG_UMI_BCH_RD_ERR_LOC_5_4 __REG32(HW_UMI_BASE  + 0x6c)
+/* BCH Read Error Location 7,6 */
+#define REG_UMI_BCH_RD_ERR_LOC_7_6 __REG32(HW_UMI_BASE  + 0x70)
+/* BCH Read Error Location 9,8 */
+#define REG_UMI_BCH_RD_ERR_LOC_9_8 __REG32(HW_UMI_BASE  + 0x74)
+/* BCH Read Error Location 11,10 */
+#define REG_UMI_BCH_RD_ERR_LOC_B_A __REG32(HW_UMI_BASE  + 0x78)
+/* REG_UMI_FLASH0/1/2_TCR, REG_UMI_SRAM0/1_TCR bits */
+/* Enable wait pin during burst write or read */
+#define REG_UMI_TCR_WAITEN              0x80000000
+/* Enable mem ctrlr to work iwth ext mem of lower freq than AHB clk */
+#define REG_UMI_TCR_LOWFREQ             0x40000000
+/* 1=synch write, 0=async write */
+#define REG_UMI_TCR_MEMTYPE_SYNCWRITE   0x20000000
+/* 1=synch read, 0=async read */
+#define REG_UMI_TCR_MEMTYPE_SYNCREAD    0x10000000
+/* 1=page mode read, 0=normal mode read */
+#define REG_UMI_TCR_MEMTYPE_PAGEREAD    0x08000000
+/* page size/burst size (wrap only) */
+#define REG_UMI_TCR_MEMTYPE_PGSZ_MASK   0x07000000
+/* 4 word */
+#define REG_UMI_TCR_MEMTYPE_PGSZ_4      0x00000000
+/* 8 word */
+#define REG_UMI_TCR_MEMTYPE_PGSZ_8      0x01000000
+/* 16 word */
+#define REG_UMI_TCR_MEMTYPE_PGSZ_16     0x02000000
+/* 32 word */
+#define REG_UMI_TCR_MEMTYPE_PGSZ_32     0x03000000
+/* 64 word */
+#define REG_UMI_TCR_MEMTYPE_PGSZ_64     0x04000000
+/* 128 word */
+#define REG_UMI_TCR_MEMTYPE_PGSZ_128    0x05000000
+/* 256 word */
+#define REG_UMI_TCR_MEMTYPE_PGSZ_256    0x06000000
+/* 512 word */
+#define REG_UMI_TCR_MEMTYPE_PGSZ_512    0x07000000
+/* Page read access cycle / Burst write latency (n+2 / n+1) */
+#define REG_UMI_TCR_TPRC_TWLC_MASK      0x00f80000
+/* Bus turnaround cycle (n) */
+#define REG_UMI_TCR_TBTA_MASK           0x00070000
+/* Write pulse width cycle (n+1) */
+#define REG_UMI_TCR_TWP_MASK            0x0000f800
+/* Write recovery cycle (n+1) */
+#define REG_UMI_TCR_TWR_MASK            0x00000600
+/* Write address setup cycle (n+1) */
+#define REG_UMI_TCR_TAS_MASK            0x00000180
+/* Output enable delay cycle (n) */
+#define REG_UMI_TCR_TOE_MASK            0x00000060
+/* Read access cycle / Burst read latency (n+2 / n+1) */
+#define REG_UMI_TCR_TRC_TLC_MASK        0x0000001f
+/* REG_UMI_MMD_ICR bits */
+/* Flash write protection pin control */
+#define REG_UMI_MMD_ICR_FLASH_WP            0x8000
+/* Extend hold time for sram0, sram1 csn (39 MHz operation) */
+#define REG_UMI_MMD_ICR_XHCS                0x4000
+/* Enable SDRAM 2 interface control */
+#define REG_UMI_MMD_ICR_SDRAM2EN            0x2000
+/* Enable merge of flash banks 0/1 to 512 MBit bank */
+#define REG_UMI_MMD_ICR_INST512             0x1000
+/* Enable merge of flash banks 1/2 to 512 MBit bank */
+#define REG_UMI_MMD_ICR_DATA512             0x0800
+/* Enable SDRAM interface control */
+#define REG_UMI_MMD_ICR_SDRAMEN             0x0400
+/* Polarity of busy state of Burst Wait Signal */
+#define REG_UMI_MMD_ICR_WAITPOL             0x0200
+/* Enable burst clock stopped when not accessing external burst flash/sram */
+#define REG_UMI_MMD_ICR_BCLKSTOP            0x0100
+/* Enable the peri1_csn to replace flash1_csn in 512 Mb flash mode */
+#define REG_UMI_MMD_ICR_PERI1EN             0x0080
+/* Enable the peri2_csn to replace sdram_csn */
+#define REG_UMI_MMD_ICR_PERI2EN             0x0040
+/* Enable the peri3_csn to replace sdram2_csn */
+#define REG_UMI_MMD_ICR_PERI3EN             0x0020
+/* Enable sram bank1 for H/W controlled MRS */
+#define REG_UMI_MMD_ICR_MRSB1               0x0010
+/* Enable sram bank0 for H/W controlled MRS */
+#define REG_UMI_MMD_ICR_MRSB0               0x0008
+/* Polarity for assert3ed state of H/W controlled MRS */
+#define REG_UMI_MMD_ICR_MRSPOL              0x0004
+/* 0: S/W controllable ZZ/MRS/CRE/P-Mode pin */
+/* 1: H/W controlled ZZ/MRS/CRE/P-Mode, same timing as CS */
+#define REG_UMI_MMD_ICR_MRSMODE             0x0002
+/* MRS state for S/W controlled mode */
+#define REG_UMI_MMD_ICR_MRSSTATE            0x0001
+/* REG_UMI_NAND_TCR bits */
+/* Enable software to control CS */
+#define REG_UMI_NAND_TCR_CS_SWCTRL          0x80000000
+/* 16-bit nand wordsize if set */
+#define REG_UMI_NAND_TCR_WORD16             0x40000000
+/* Bus turnaround cycle (n) */
+#define REG_UMI_NAND_TCR_TBTA_MASK          0x00070000
+/* Write pulse width cycle (n+1) */
+#define REG_UMI_NAND_TCR_TWP_MASK           0x0000f800
+/* Write recovery cycle (n+1) */
+#define REG_UMI_NAND_TCR_TWR_MASK           0x00000600
+/* Write address setup cycle (n+1) */
+#define REG_UMI_NAND_TCR_TAS_MASK           0x00000180
+/* Output enable delay cycle (n) */
+#define REG_UMI_NAND_TCR_TOE_MASK           0x00000060
+/* Read access cycle (n+2) */
+#define REG_UMI_NAND_TCR_TRC_TLC_MASK       0x0000001f
+/* REG_UMI_NAND_RCSR bits */
+/* Status: Ready=1, Busy=0 */
+#define REG_UMI_NAND_RCSR_RDY               0x02
+/* Keep CS asserted during operation */
+#define REG_UMI_NAND_RCSR_CS_ASSERTED       0x01
+/* REG_UMI_NAND_ECC_CSR bits */
+/* Interrupt status - read-only */
+#define REG_UMI_NAND_ECC_CSR_NANDINT        0x80000000
+/* Read: Status of ECC done, Write: clear ECC interrupt */
+#define REG_UMI_NAND_ECC_CSR_ECCINT_RAW     0x00800000
+/* Read: Status of R/B, Write: clear R/B interrupt */
+#define REG_UMI_NAND_ECC_CSR_RBINT_RAW      0x00400000
+/* 1 = Enable ECC Interrupt */
+#define REG_UMI_NAND_ECC_CSR_ECCINT_ENABLE  0x00008000
+/* 1 = Assert interrupt at rising edge of R/B_ */
+#define REG_UMI_NAND_ECC_CSR_RBINT_ENABLE   0x00004000
+/* Calculate ECC by 0=512 bytes, 1=256 bytes */
+#define REG_UMI_NAND_ECC_CSR_256BYTE        0x00000080
+/* Enable ECC in hardware */
+#define REG_UMI_NAND_ECC_CSR_ECC_ENABLE     0x00000001
+/* REG_UMI_BCH_CTRL_STATUS bits */
+/* Shift to Indicate Number of correctable errors detected */
+#define REG_UMI_BCH_CTRL_STATUS_NB_CORR_ERROR_SHIFT 20
+/* Indicate Number of correctable errors detected */
+#define REG_UMI_BCH_CTRL_STATUS_NB_CORR_ERROR 0x00F00000
+/* Indicate Errors detected during read but uncorrectable */
+#define REG_UMI_BCH_CTRL_STATUS_UNCORR_ERR    0x00080000
+/* Indicate Errors detected during read and are correctable */
+#define REG_UMI_BCH_CTRL_STATUS_CORR_ERR      0x00040000
+/* Flag indicates BCH's ECC status of read process are valid */
+#define REG_UMI_BCH_CTRL_STATUS_RD_ECC_VALID  0x00020000
+/* Flag indicates BCH's ECC status of write process are valid */
+#define REG_UMI_BCH_CTRL_STATUS_WR_ECC_VALID  0x00010000
+/* Pause ECC calculation */
+#define REG_UMI_BCH_CTRL_STATUS_PAUSE_ECC_DEC 0x00000010
+/* Enable Interrupt */
+#define REG_UMI_BCH_CTRL_STATUS_INT_EN        0x00000004
+/* Enable ECC during read */
+#define REG_UMI_BCH_CTRL_STATUS_ECC_RD_EN     0x00000002
+/* Enable ECC during write */
+#define REG_UMI_BCH_CTRL_STATUS_ECC_WR_EN     0x00000001
+/* Mask for location */
+#define REG_UMI_BCH_ERR_LOC_MASK              0x00001FFF
+/* location within a byte */
+#define REG_UMI_BCH_ERR_LOC_BYTE              0x00000007
+/* location within a word */
+#define REG_UMI_BCH_ERR_LOC_WORD              0x00000018
+/* location within a page (512 byte) */
+#define REG_UMI_BCH_ERR_LOC_PAGE              0x00001FE0
+#define REG_UMI_BCH_ERR_LOC_ADDR(index)     (__REG32(HW_UMI_BASE + 0x64 + (index / 2)*4) >> ((index % 2) * 16))
+#endif
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 62b98bffc158..07de8db14581 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -339,6 +339,15 @@ static struct davinci_mmc_config da850_mmc_config = {
        .version        = MMC_CTLR_VERSION_2,
 };
+static void da850_panel_power_ctrl(int val)
+{
+        /* lcd backlight */
+        gpio_set_value(DA850_LCD_BL_PIN, val);
+        /* lcd power */
+        gpio_set_value(DA850_LCD_PWR_PIN, val);
+}
 static int da850_lcd_hw_init(void)
 {
        int status;
@@ -356,17 +365,11 @@ static int da850_lcd_hw_init(void)
        gpio_direction_output(DA850_LCD_BL_PIN, 0);
        gpio_direction_output(DA850_LCD_PWR_PIN, 0);
-        /* disable lcd backlight */
+        /* Switch off panel power and backlight */
-        gpio_set_value(DA850_LCD_BL_PIN, 0);
+        da850_panel_power_ctrl(0);
-        /* disable lcd power */
-        gpio_set_value(DA850_LCD_PWR_PIN, 0);
-        /* enable lcd power */
-        gpio_set_value(DA850_LCD_PWR_PIN, 1);
-        /* enable lcd backlight */
+        /* Switch on panel power and backlight */
-        gpio_set_value(DA850_LCD_BL_PIN, 1);
+        da850_panel_power_ctrl(1);
        return 0;
 }
@@ -674,6 +677,7 @@ static __init void da850_evm_init(void)
                pr_warning("da850_evm_init: lcd initialization failed: %d\n",
                                ret);
+        sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
        ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
        if (ret)
                pr_warning("da850_evm_init: lcdc registration failed: %d\n",
diff --git a/arch/arm/mach-davinci/include/mach/nand.h b/arch/arm/mach-davinci/include/mach/nand.h
index b520c4b5678a..b2ad8090bd10 100644
--- a/arch/arm/mach-davinci/include/mach/nand.h
+++ b/arch/arm/mach-davinci/include/mach/nand.h
@@ -79,6 +79,10 @@ struct davinci_nand_pdata {		/* platform_data */
        /* e.g. NAND_BUSWIDTH_16 or NAND_USE_FLASH_BBT */
        unsigned                options;
+        /* Main and mirror bbt descriptor overrides */
+        struct nand_bbt_descr   *bbt_td;
+        struct nand_bbt_descr   *bbt_md;
 };
 #endif  /* __ARCH_ARM_DAVINCI_NAND_H */
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx_keypad.h b/arch/arm/mach-ep93xx/include/mach/ep93xx_keypad.h
index 83f31cd0a274..62d17421e48c 100644
--- a/arch/arm/mach-ep93xx/include/mach/ep93xx_keypad.h
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx_keypad.h
@@ -5,9 +5,6 @@
 #ifndef __ASM_ARCH_EP93XX_KEYPAD_H
 #define __ASM_ARCH_EP93XX_KEYPAD_H
-#define MAX_MATRIX_KEY_ROWS             (8)
-#define MAX_MATRIX_KEY_COLS             (8)
 /* flags for the ep93xx_keypad driver */
 #define EP93XX_KEYPAD_DISABLE_3_KEY     (1<<0)  /* disable 3-key reset */
 #define EP93XX_KEYPAD_DIAG_MODE         (1<<1)  /* diagnostic mode */
@@ -18,8 +15,6 @@
 /**
 * struct ep93xx_keypad_platform_data - platform specific device structure
- * @matrix_key_rows:            number of rows in the keypad matrix
- * @matrix_key_cols:            number of columns in the keypad matrix
 * @matrix_key_map:             array of keycodes defining the keypad matrix
 * @matrix_key_map_size:        ARRAY_SIZE(matrix_key_map)
 * @debounce:                   debounce start count; terminal count is 0xff
@@ -27,8 +22,6 @@
 * @flags:                      see above
 */
 struct ep93xx_keypad_platform_data {
-        unsigned int    matrix_key_rows;
-        unsigned int    matrix_key_cols;
        unsigned int    *matrix_key_map;
        int             matrix_key_map_size;
        unsigned int    debounce;
@@ -36,7 +29,7 @@ struct ep93xx_keypad_platform_data {
        unsigned int    flags;
 };
-/* macro for creating the matrix_key_map table */
+#define EP93XX_MATRIX_ROWS              (8)
-#define KEY(row, col, val)      (((row) << 28) | ((col) << 24) | (val))
+#define EP93XX_MATRIX_COLS              (8)
 #endif  /* __ASM_ARCH_EP93XX_KEYPAD_H */
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 116394484e71..9438bf6613a3 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -18,6 +18,7 @@
 #include <linux/gpio.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
+#include <linux/mtd/onenand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/io.h>
 #include <asm/sizes.h>
@@ -149,7 +150,7 @@ static struct mtd_partition nhk8815_onenand_partitions[] = {
        }
 };
-static struct flash_platform_data nhk8815_onenand_data = {
+static struct onenand_platform_data nhk8815_onenand_data = {
        .parts          = nhk8815_onenand_partitions,
        .nr_parts       = ARRAY_SIZE(nhk8815_onenand_partitions),
 };
@@ -163,7 +164,7 @@ static struct resource nhk8815_onenand_resource[] = {
 };
 static struct platform_device nhk8815_onenand_device = {
-        .name           = "onenand",
+        .name           = "onenand-flash",
        .id             = -1,
        .dev            = {
                .platform_data  = &nhk8815_onenand_data,
@@ -174,10 +175,10 @@ static struct platform_device nhk8815_onenand_device = {
 static void __init nhk8815_onenand_init(void)
 {
-#ifdef CONFIG_ONENAND
+#ifdef CONFIG_MTD_ONENAND
       /* Set up SMCS0 for OneNand */
-       writel(0x000030db, FSMC_BCR0);
+        writel(0x000030db, FSMC_BCR(0));
-       writel(0x02100551, FSMC_BTR0);
+        writel(0x02100551, FSMC_BTR(0));
 #endif
 }
diff --git a/arch/arm/mach-u300/include/mach/coh901318.h b/arch/arm/mach-u300/include/mach/coh901318.h
new file mode 100644
index 000000000000..f4cfee9c7d28
--- /dev/null
+++ b/arch/arm/mach-u300/include/mach/coh901318.h
@@ -0,0 +1,281 @@
+/*
+ *
+ * include/linux/coh901318.h
+ *
+ *
+ * Copyright (C) 2007-2009 ST-Ericsson
+ * License terms: GNU General Public License (GPL) version 2
+ * DMA driver for COH 901 318
+ * Author: Per Friden <per.friden@stericsson.com>
+ */
+#ifndef COH901318_H
+#define COH901318_H
+#include <linux/device.h>
+#include <linux/dmaengine.h>
+#define MAX_DMA_PACKET_SIZE_SHIFT 11
+#define MAX_DMA_PACKET_SIZE (1 << MAX_DMA_PACKET_SIZE_SHIFT)
+/**
+ * struct coh901318_lli - linked list item for DMAC
+ * @control: control settings for DMAC
+ * @src_addr: transfer source address
+ * @dst_addr: transfer destination address
+ * @link_addr:  physical address to next lli
+ * @virt_link_addr: virtual addres of next lli (only used by pool_free)
+ * @phy_this: physical address of current lli (only used by pool_free)
+ */
+struct coh901318_lli {
+        u32 control;
+        dma_addr_t src_addr;
+        dma_addr_t dst_addr;
+        dma_addr_t link_addr;
+        void *virt_link_addr;
+        dma_addr_t phy_this;
+};
+/**
+ * struct coh901318_params - parameters for DMAC configuration
+ * @config: DMA config register
+ * @ctrl_lli_last: DMA control register for the last lli in the list
+ * @ctrl_lli: DMA control register for an lli
+ * @ctrl_lli_chained: DMA control register for a chained lli
+ */
+struct coh901318_params {
+        u32 config;
+        u32 ctrl_lli_last;
+        u32 ctrl_lli;
+        u32 ctrl_lli_chained;
+};
+/**
+ * struct coh_dma_channel - dma channel base
+ * @name: ascii name of dma channel
+ * @number: channel id number
+ * @desc_nbr_max: number of preallocated descriptortors
+ * @priority_high: prio of channel, 0 low otherwise high.
+ * @param: configuration parameters
+ * @dev_addr: physical address of periphal connected to channel
+ */
+struct coh_dma_channel {
+        const char name[32];
+        const int number;
+        const int desc_nbr_max;
+        const int priority_high;
+        const struct coh901318_params param;
+        const dma_addr_t dev_addr;
+};
+/**
+ * dma_access_memory_state_t - register dma for memory access
+ *
+ * @dev: The dma device
+ * @active:  1 means dma intends to access memory
+ *           0 means dma wont access memory
+ */
+typedef void (*dma_access_memory_state_t)(struct device *dev,
+                                          bool active);
+/**
+ * struct powersave - DMA power save structure
+ * @lock: lock protecting data in this struct
+ * @started_channels: bit mask indicating active dma channels
+ */
+struct powersave {
+        spinlock_t lock;
+        u64 started_channels;
+};
+/**
+ * struct coh901318_platform - platform arch structure
+ * @chans_slave: specifying dma slave channels
+ * @chans_memcpy: specifying dma memcpy channels
+ * @access_memory_state: requesting DMA memeory access (on / off)
+ * @chan_conf: dma channel configurations
+ * @max_channels: max number of dma chanenls
+ */
+struct coh901318_platform {
+        const int *chans_slave;
+        const int *chans_memcpy;
+        const dma_access_memory_state_t access_memory_state;
+        const struct coh_dma_channel *chan_conf;
+        const int max_channels;
+};
+/**
+ * coh901318_get_bytes_left() - Get number of bytes left on a current transfer
+ * @chan: dma channel handle
+ * return number of bytes left, or negative on error
+ */
+u32 coh901318_get_bytes_left(struct dma_chan *chan);
+/**
+ * coh901318_stop() - Stops dma transfer
+ * @chan: dma channel handle
+ * return 0 on success otherwise negative value
+ */
+void coh901318_stop(struct dma_chan *chan);
+/**
+ * coh901318_continue() - Resumes a stopped dma transfer
+ * @chan: dma channel handle
+ * return 0 on success otherwise negative value
+ */
+void coh901318_continue(struct dma_chan *chan);
+/**
+ * coh901318_filter_id() - DMA channel filter function
+ * @chan: dma channel handle
+ * @chan_id: id of dma channel to be filter out
+ *
+ * In dma_request_channel() it specifies what channel id to be requested
+ */
+bool coh901318_filter_id(struct dma_chan *chan, void *chan_id);
+/*
+ * DMA Controller - this access the static mappings of the coh901318 dma.
+ *
+ */
+#define COH901318_MOD32_MASK                                    (0x1F)
+#define COH901318_WORD_MASK                                     (0xFFFFFFFF)
+/* INT_STATUS - Interrupt Status Registers 32bit (R/-) */
+#define COH901318_INT_STATUS1                                   (0x0000)
+#define COH901318_INT_STATUS2                                   (0x0004)
+/* TC_INT_STATUS - Terminal Count Interrupt Status Registers 32bit (R/-) */
+#define COH901318_TC_INT_STATUS1                                (0x0008)
+#define COH901318_TC_INT_STATUS2                                (0x000C)
+/* TC_INT_CLEAR - Terminal Count Interrupt Clear Registers 32bit (-/W) */
+#define COH901318_TC_INT_CLEAR1                                 (0x0010)
+#define COH901318_TC_INT_CLEAR2                                 (0x0014)
+/* RAW_TC_INT_STATUS - Raw Term Count Interrupt Status Registers 32bit (R/-) */
+#define COH901318_RAW_TC_INT_STATUS1                            (0x0018)
+#define COH901318_RAW_TC_INT_STATUS2                            (0x001C)
+/* BE_INT_STATUS - Bus Error Interrupt Status Registers 32bit (R/-) */
+#define COH901318_BE_INT_STATUS1                                (0x0020)
+#define COH901318_BE_INT_STATUS2                                (0x0024)
+/* BE_INT_CLEAR - Bus Error Interrupt Clear Registers 32bit (-/W) */
+#define COH901318_BE_INT_CLEAR1                                 (0x0028)
+#define COH901318_BE_INT_CLEAR2                                 (0x002C)
+/* RAW_BE_INT_STATUS - Raw Term Count Interrupt Status Registers 32bit (R/-) */
+#define COH901318_RAW_BE_INT_STATUS1                            (0x0030)
+#define COH901318_RAW_BE_INT_STATUS2                            (0x0034)
+/*
+ * CX_CFG - Channel Configuration Registers 32bit (R/W)
+ */
+#define COH901318_CX_CFG                                        (0x0100)
+#define COH901318_CX_CFG_SPACING                                (0x04)
+/* Channel enable activates tha dma job */
+#define COH901318_CX_CFG_CH_ENABLE                              (0x00000001)
+#define COH901318_CX_CFG_CH_DISABLE                             (0x00000000)
+/* Request Mode */
+#define COH901318_CX_CFG_RM_MASK                                (0x00000006)
+#define COH901318_CX_CFG_RM_MEMORY_TO_MEMORY                    (0x0 << 1)
+#define COH901318_CX_CFG_RM_PRIMARY_TO_MEMORY                   (0x1 << 1)
+#define COH901318_CX_CFG_RM_MEMORY_TO_PRIMARY                   (0x1 << 1)
+#define COH901318_CX_CFG_RM_PRIMARY_TO_SECONDARY                (0x3 << 1)
+#define COH901318_CX_CFG_RM_SECONDARY_TO_PRIMARY                (0x3 << 1)
+/* Linked channel request field. RM must == 11 */
+#define COH901318_CX_CFG_LCRF_SHIFT                             3
+#define COH901318_CX_CFG_LCRF_MASK                              (0x000001F8)
+#define COH901318_CX_CFG_LCR_DISABLE                            (0x00000000)
+/* Terminal Counter Interrupt Request Mask */
+#define COH901318_CX_CFG_TC_IRQ_ENABLE                          (0x00000200)
+#define COH901318_CX_CFG_TC_IRQ_DISABLE                         (0x00000000)
+/* Bus Error interrupt Mask */
+#define COH901318_CX_CFG_BE_IRQ_ENABLE                          (0x00000400)
+#define COH901318_CX_CFG_BE_IRQ_DISABLE                         (0x00000000)
+/*
+ * CX_STAT - Channel Status Registers 32bit (R/-)
+ */
+#define COH901318_CX_STAT                                       (0x0200)
+#define COH901318_CX_STAT_SPACING                               (0x04)
+#define COH901318_CX_STAT_RBE_IRQ_IND                           (0x00000008)
+#define COH901318_CX_STAT_RTC_IRQ_IND                           (0x00000004)
+#define COH901318_CX_STAT_ACTIVE                                (0x00000002)
+#define COH901318_CX_STAT_ENABLED                               (0x00000001)
+/*
+ * CX_CTRL - Channel Control Registers 32bit (R/W)
+ */
+#define COH901318_CX_CTRL                                       (0x0400)
+#define COH901318_CX_CTRL_SPACING                               (0x10)
+/* Transfer Count Enable */
+#define COH901318_CX_CTRL_TC_ENABLE                             (0x00001000)
+#define COH901318_CX_CTRL_TC_DISABLE                            (0x00000000)
+/* Transfer Count Value 0 - 4095 */
+#define COH901318_CX_CTRL_TC_VALUE_MASK                         (0x00000FFF)
+/* Burst count */
+#define COH901318_CX_CTRL_BURST_COUNT_MASK                      (0x0000E000)
+#define COH901318_CX_CTRL_BURST_COUNT_64_BYTES                  (0x7 << 13)
+#define COH901318_CX_CTRL_BURST_COUNT_48_BYTES                  (0x6 << 13)
+#define COH901318_CX_CTRL_BURST_COUNT_32_BYTES                  (0x5 << 13)
+#define COH901318_CX_CTRL_BURST_COUNT_16_BYTES                  (0x4 << 13)
+#define COH901318_CX_CTRL_BURST_COUNT_8_BYTES                   (0x3 << 13)
+#define COH901318_CX_CTRL_BURST_COUNT_4_BYTES                   (0x2 << 13)
+#define COH901318_CX_CTRL_BURST_COUNT_2_BYTES                   (0x1 << 13)
+#define COH901318_CX_CTRL_BURST_COUNT_1_BYTE                    (0x0 << 13)
+/* Source bus size  */
+#define COH901318_CX_CTRL_SRC_BUS_SIZE_MASK                     (0x00030000)
+#define COH901318_CX_CTRL_SRC_BUS_SIZE_32_BITS                  (0x2 << 16)
+#define COH901318_CX_CTRL_SRC_BUS_SIZE_16_BITS                  (0x1 << 16)
+#define COH901318_CX_CTRL_SRC_BUS_SIZE_8_BITS                   (0x0 << 16)
+/* Source address increment */
+#define COH901318_CX_CTRL_SRC_ADDR_INC_ENABLE                   (0x00040000)
+#define COH901318_CX_CTRL_SRC_ADDR_INC_DISABLE                  (0x00000000)
+/* Destination Bus Size */
+#define COH901318_CX_CTRL_DST_BUS_SIZE_MASK                     (0x00180000)
+#define COH901318_CX_CTRL_DST_BUS_SIZE_32_BITS                  (0x2 << 19)
+#define COH901318_CX_CTRL_DST_BUS_SIZE_16_BITS                  (0x1 << 19)
+#define COH901318_CX_CTRL_DST_BUS_SIZE_8_BITS                   (0x0 << 19)
+/* Destination address increment */
+#define COH901318_CX_CTRL_DST_ADDR_INC_ENABLE                   (0x00200000)
+#define COH901318_CX_CTRL_DST_ADDR_INC_DISABLE                  (0x00000000)
+/* Master Mode (Master2 is only connected to MSL) */
+#define COH901318_CX_CTRL_MASTER_MODE_MASK                      (0x00C00000)
+#define COH901318_CX_CTRL_MASTER_MODE_M2R_M1W                   (0x3 << 22)
+#define COH901318_CX_CTRL_MASTER_MODE_M1R_M2W                   (0x2 << 22)
+#define COH901318_CX_CTRL_MASTER_MODE_M2RW                      (0x1 << 22)
+#define COH901318_CX_CTRL_MASTER_MODE_M1RW                      (0x0 << 22)
+/* Terminal Count flag to PER enable */
+#define COH901318_CX_CTRL_TCP_ENABLE                            (0x01000000)
+#define COH901318_CX_CTRL_TCP_DISABLE                           (0x00000000)
+/* Terminal Count flags to CPU enable */
+#define COH901318_CX_CTRL_TC_IRQ_ENABLE                         (0x02000000)
+#define COH901318_CX_CTRL_TC_IRQ_DISABLE                        (0x00000000)
+/* Hand shake to peripheral */
+#define COH901318_CX_CTRL_HSP_ENABLE                            (0x04000000)
+#define COH901318_CX_CTRL_HSP_DISABLE                           (0x00000000)
+#define COH901318_CX_CTRL_HSS_ENABLE                            (0x08000000)
+#define COH901318_CX_CTRL_HSS_DISABLE                           (0x00000000)
+/* DMA mode */
+#define COH901318_CX_CTRL_DDMA_MASK                             (0x30000000)
+#define COH901318_CX_CTRL_DDMA_LEGACY                           (0x0 << 28)
+#define COH901318_CX_CTRL_DDMA_DEMAND_DMA1                      (0x1 << 28)
+#define COH901318_CX_CTRL_DDMA_DEMAND_DMA2                      (0x2 << 28)
+/* Primary Request Data Destination */
+#define COH901318_CX_CTRL_PRDD_MASK                             (0x40000000)
+#define COH901318_CX_CTRL_PRDD_DEST                             (0x1 << 30)
+#define COH901318_CX_CTRL_PRDD_SOURCE                           (0x0 << 30)
+/*
+ * CX_SRC_ADDR - Channel Source Address Registers 32bit (R/W)
+ */
+#define COH901318_CX_SRC_ADDR                                   (0x0404)
+#define COH901318_CX_SRC_ADDR_SPACING                           (0x10)
+/*
+ * CX_DST_ADDR - Channel Destination Address Registers 32bit R/W
+ */
+#define COH901318_CX_DST_ADDR                                   (0x0408)
+#define COH901318_CX_DST_ADDR_SPACING                           (0x10)
+/*
+ * CX_LNK_ADDR - Channel Link Address Registers 32bit (R/W)
+ */
+#define COH901318_CX_LNK_ADDR                                   (0x040C)
+#define COH901318_CX_LNK_ADDR_SPACING                           (0x10)
+#define COH901318_CX_LNK_LINK_IMMEDIATE                         (0x00000001)
+#endif /* COH901318_H */
diff --git a/arch/arm/plat-mxc/include/mach/mxc_nand.h b/arch/arm/plat-mxc/include/mach/mxc_nand.h
index 2b972df22d12..5d2d21d414e0 100644
--- a/arch/arm/plat-mxc/include/mach/mxc_nand.h
+++ b/arch/arm/plat-mxc/include/mach/mxc_nand.h
@@ -22,6 +22,7 @@
 struct mxc_nand_platform_data {
        int width;      /* data bus width in bytes */
-        int hw_ecc;     /* 0 if supress hardware ECC */
+        int hw_ecc:1;   /* 0 if supress hardware ECC */
+        int flash_bbt:1; /* set to 1 to use a flash based bbt */
 };
 #endif /* __ASM_ARCH_NAND_H */
diff --git a/arch/arm/plat-s3c/include/plat/nand.h b/arch/arm/plat-s3c/include/plat/nand.h
index 065985978413..226147b7e026 100644
--- a/arch/arm/plat-s3c/include/plat/nand.h
+++ b/arch/arm/plat-s3c/include/plat/nand.h
@@ -17,6 +17,7 @@
 *                      Setting this flag will allow the kernel to
 *                      look for it at boot time and also skip the NAND
 *                      scan.
+ * @options:            Default value to set into 'struct nand_chip' options.
 * @nr_chips:           Number of chips in this set
 * @nr_partitions:      Number of partitions pointed to by @partitions
 * @name:               Name of set (optional)
@@ -31,6 +32,7 @@ struct s3c2410_nand_set {
        unsigned int            disable_ecc:1;
        unsigned int            flash_bbt:1;
+        unsigned int            options;
        int                     nr_chips;
        int                     nr_partitions;
        char                    *name;
diff --git a/arch/avr32/include/asm/elf.h b/arch/avr32/include/asm/elf.h
index d5d1d41c600a..3b3159b710d4 100644
--- a/arch/avr32/include/asm/elf.h
+++ b/arch/avr32/include/asm/elf.h
@@ -77,7 +77,6 @@ typedef struct user_fpu_struct elf_fpregset_t;
 #endif
 #define ELF_ARCH        EM_AVR32
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE       4096
 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index ae6a60f10120..53c1e1d45c68 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -5,6 +5,10 @@
 mainmenu "Blackfin Kernel Configuration"
+config SYMBOL_PREFIX
+        string
+        default "_"
 config MMU
        def_bool n
@@ -28,6 +32,9 @@ config BLACKFIN
        select HAVE_OPROFILE
        select ARCH_WANT_OPTIONAL_GPIOLIB
+config GENERIC_CSUM
+        def_bool y
 config GENERIC_BUG
        def_bool y
        depends on BUG
@@ -173,7 +180,7 @@ config BF539
        help
          BF539 Processor Support.
-config BF542
+config BF542_std
        bool "BF542"
        help
          BF542 Processor Support.
@@ -183,7 +190,7 @@ config BF542M
        help
          BF542 Processor Support.
-config BF544
+config BF544_std
        bool "BF544"
        help
          BF544 Processor Support.
@@ -193,7 +200,7 @@ config BF544M
        help
          BF544 Processor Support.
-config BF547
+config BF547_std
        bool "BF547"
        help
          BF547 Processor Support.
@@ -203,7 +210,7 @@ config BF547M
        help
          BF547 Processor Support.
-config BF548
+config BF548_std
        bool "BF548"
        help
          BF548 Processor Support.
@@ -213,7 +220,7 @@ config BF548M
        help
          BF548 Processor Support.
-config BF549
+config BF549_std
        bool "BF549"
        help
          BF549 Processor Support.
@@ -307,31 +314,11 @@ config BF_REV_NONE
 endchoice
-config BF51x
-        bool
-        depends on (BF512 || BF514 || BF516 || BF518)
-        default y
-config BF52x
-        bool
-        depends on (BF522 || BF523 || BF524 || BF525 || BF526 || BF527)
-        default y
 config BF53x
        bool
        depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
        default y
-config BF54xM
-        bool
-        depends on (BF542M || BF544M || BF547M || BF548M || BF549M)
-        default y
-config BF54x
-        bool
-        depends on (BF542 || BF544 || BF547 || BF548 || BF549 || BF54xM)
-        default y
 config MEM_GENERIC_BOARD
        bool
        depends on GENERIC_BOARD
@@ -913,6 +900,12 @@ config DMA_UNCACHED_2M
        bool "Enable 2M DMA region"
 config DMA_UNCACHED_1M
        bool "Enable 1M DMA region"
+config DMA_UNCACHED_512K
+        bool "Enable 512K DMA region"
+config DMA_UNCACHED_256K
+        bool "Enable 256K DMA region"
+config DMA_UNCACHED_128K
+        bool "Enable 128K DMA region"
 config DMA_UNCACHED_NONE
        bool "Disable DMA region"
 endchoice
@@ -1274,6 +1267,8 @@ source "net/Kconfig"
 source "drivers/Kconfig"
+source "drivers/firmware/Kconfig"
 source "fs/Kconfig"
 source "arch/blackfin/Kconfig.debug"
diff --git a/arch/blackfin/Makefile b/arch/blackfin/Makefile
index f063b772934b..d4c7177e7656 100644
--- a/arch/blackfin/Makefile
+++ b/arch/blackfin/Makefile
@@ -16,6 +16,7 @@ GZFLAGS          := -9
 KBUILD_CFLAGS           += $(call cc-option,-mno-fdpic)
 KBUILD_AFLAGS           += $(call cc-option,-mno-fdpic)
 CFLAGS_MODULE    += -mlong-calls
+LDFLAGS_MODULE   += -m elf32bfin
 KALLSYMS         += --symbol-prefix=_
 KBUILD_DEFCONFIG := BF537-STAMP_defconfig
@@ -137,7 +138,7 @@ archclean:
 INSTALL_PATH ?= /tftpboot
 boot := arch/$(ARCH)/boot
-BOOT_TARGETS = vmImage vmImage.bz2 vmImage.gz vmImage.lzma
+BOOT_TARGETS = vmImage vmImage.bin vmImage.bz2 vmImage.gz vmImage.lzma
 PHONY += $(BOOT_TARGETS) install
 KBUILD_IMAGE := $(boot)/vmImage
@@ -151,6 +152,7 @@ install:
 define archhelp
  echo  '* vmImage         - Alias to selected kernel format (vmImage.gz by default)'
+  echo  '  vmImage.bin     - Uncompressed Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.bin)'
  echo  '  vmImage.bz2     - Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.bz2)'
  echo  '* vmImage.gz      - Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.gz)'
  echo  '  vmImage.lzma    - Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.lzma)'
diff --git a/arch/blackfin/boot/Makefile b/arch/blackfin/boot/Makefile
index fd9ccc5fea10..e9c48c6f8c1f 100644
--- a/arch/blackfin/boot/Makefile
+++ b/arch/blackfin/boot/Makefile
@@ -8,7 +8,7 @@
 MKIMAGE := $(srctree)/scripts/mkuboot.sh
-targets := vmImage vmImage.bz2 vmImage.gz vmImage.lzma
+targets := vmImage vmImage.bin vmImage.bz2 vmImage.gz vmImage.lzma
 extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma
 quiet_cmd_uimage = UIMAGE  $@
@@ -29,6 +29,9 @@ $(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
 $(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
        $(call if_changed,lzma)
+$(obj)/vmImage.bin: $(obj)/vmlinux.bin
+        $(call if_changed,uimage,none)
 $(obj)/vmImage.bz2: $(obj)/vmlinux.bin.bz2
        $(call if_changed,uimage,bzip2)
@@ -38,6 +41,7 @@ $(obj)/vmImage.gz: $(obj)/vmlinux.bin.gz
 $(obj)/vmImage.lzma: $(obj)/vmlinux.bin.lzma
        $(call if_changed,uimage,lzma)
+suffix-y                      := bin
 suffix-$(CONFIG_KERNEL_GZIP)  := gz
 suffix-$(CONFIG_KERNEL_BZIP2) := bz2
 suffix-$(CONFIG_KERNEL_LZMA)  := lzma
diff --git a/arch/blackfin/configs/BF518F-EZBRD_defconfig b/arch/blackfin/configs/BF518F-EZBRD_defconfig
index 9905b26009e5..e31559419817 100644
--- a/arch/blackfin/configs/BF518F-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF518F-EZBRD_defconfig
@@ -67,6 +67,7 @@ CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
@@ -316,6 +317,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 CONFIG_BFIN_GPTIMERS=m
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
@@ -438,17 +440,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
-CONFIG_NET_DSA=y
+# CONFIG_NET_DSA is not set
-# CONFIG_NET_DSA_TAG_DSA is not set
-# CONFIG_NET_DSA_TAG_EDSA is not set
-# CONFIG_NET_DSA_TAG_TRAILER is not set
-CONFIG_NET_DSA_TAG_STPID=y
-# CONFIG_NET_DSA_MV88E6XXX is not set
-# CONFIG_NET_DSA_MV88E6060 is not set
-# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
-# CONFIG_NET_DSA_MV88E6131 is not set
-# CONFIG_NET_DSA_MV88E6123_61_65 is not set
-CONFIG_NET_DSA_KSZ8893M=y
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 # CONFIG_LLC2 is not set
diff --git a/arch/blackfin/configs/BF526-EZBRD_defconfig b/arch/blackfin/configs/BF526-EZBRD_defconfig
index 9dc682088023..075e0fdcb399 100644
--- a/arch/blackfin/configs/BF526-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF526-EZBRD_defconfig
@@ -67,6 +67,7 @@ CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
@@ -321,6 +322,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 CONFIG_BFIN_GPTIMERS=m
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig
index 77e35d4baf53..6d1a623fb149 100644
--- a/arch/blackfin/configs/BF527-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF527-EZKIT_defconfig
@@ -67,6 +67,7 @@ CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
@@ -321,6 +322,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 CONFIG_BFIN_GPTIMERS=y
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig
index 4c044805cb5c..50f9a23ccdbd 100644
--- a/arch/blackfin/configs/BF533-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF533-EZKIT_defconfig
@@ -67,6 +67,7 @@ CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
@@ -283,6 +284,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 CONFIG_BFIN_GPTIMERS=m
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig
index c99bbcd09a68..6c60c8286318 100644
--- a/arch/blackfin/configs/BF533-STAMP_defconfig
+++ b/arch/blackfin/configs/BF533-STAMP_defconfig
@@ -67,6 +67,7 @@ CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
@@ -283,6 +284,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 CONFIG_BFIN_GPTIMERS=m
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig
index 092ffda80e68..2908595b67c5 100644
--- a/arch/blackfin/configs/BF537-STAMP_defconfig
+++ b/arch/blackfin/configs/BF537-STAMP_defconfig
@@ -67,6 +67,7 @@ CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
@@ -290,6 +291,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 CONFIG_BFIN_GPTIMERS=m
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
@@ -704,10 +706,7 @@ CONFIG_CONFIG_INPUT_PCF8574=m
 #
 # Hardware I/O ports
 #
-CONFIG_SERIO=y
+# CONFIG_SERIO is not set
-CONFIG_SERIO_SERPORT=y
-CONFIG_SERIO_LIBPS2=y
-# CONFIG_SERIO_RAW is not set
 # CONFIG_GAMEPORT is not set
 #
diff --git a/arch/blackfin/configs/BF538-EZKIT_defconfig b/arch/blackfin/configs/BF538-EZKIT_defconfig
index fa698a89f6fe..09ea2499555e 100644
--- a/arch/blackfin/configs/BF538-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF538-EZKIT_defconfig
@@ -67,6 +67,7 @@ CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
@@ -301,6 +302,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 CONFIG_BFIN_GPTIMERS=m
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
index f773ad1155d4..eb3e98b6f3f0 100644
--- a/arch/blackfin/configs/BF548-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF548-EZKIT_defconfig
@@ -1,22 +1,29 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.10
+# Linux kernel version: 2.6.31.5
-# Thu May 21 05:50:01 2009
+# Mon Nov  2 22:02:56 2009
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 #
 # General setup
@@ -26,22 +33,40 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -62,17 +87,28 @@ CONFIG_EPOLL=y
 # CONFIG_TIMERFD is not set
 # CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
+#
+# Performance Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -80,11 +116,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
@@ -94,13 +127,12 @@ CONFIG_BLOCK=y
 CONFIG_IOSCHED_NOOP=y
 CONFIG_IOSCHED_AS=y
 # CONFIG_IOSCHED_DEADLINE is not set
-CONFIG_IOSCHED_CFQ=y
+# CONFIG_IOSCHED_CFQ is not set
 CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_DEADLINE is not set
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_CLASSIC_RCU=y
 # CONFIG_PREEMPT_NONE is not set
 CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
@@ -137,7 +169,7 @@ CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_BF544M is not set
 # CONFIG_BF547 is not set
 # CONFIG_BF547M is not set
-CONFIG_BF548=y
+CONFIG_BF548_std=y
 # CONFIG_BF548M is not set
 # CONFIG_BF549 is not set
 # CONFIG_BF549M is not set
@@ -195,7 +227,7 @@ CONFIG_BFIN548_EZKIT=y
 #
 # BF548 Specific Configuration
 #
-# CONFIG_DEB_DMA_URGENT is not set
+CONFIG_DEB_DMA_URGENT=y
 # CONFIG_BF548_ATAPI_ALTERNATIVE_PORT is not set
 #
@@ -352,10 +384,11 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 CONFIG_BFIN_GPTIMERS=m
 # CONFIG_DMA_UNCACHED_4M is not set
 CONFIG_DMA_UNCACHED_2M=y
@@ -366,14 +399,13 @@ CONFIG_DMA_UNCACHED_2M=y
 # Cache Support
 #
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
+# CONFIG_BFIN_L2_ICACHEABLE is not set
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
-CONFIG_BFIN_EXTMEM_WRITEBACK=y
+# CONFIG_BFIN_EXTMEM_WRITEBACK is not set
-# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
+CONFIG_BFIN_EXTMEM_WRITETHROUGH=y
-# CONFIG_BFIN_L2_ICACHEABLE is not set
 # CONFIG_BFIN_L2_DCACHEABLE is not set
 #
@@ -382,7 +414,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 #
-# Asynchonous Memory Configuration
+# Asynchronous Memory Configuration
 #
 #
@@ -441,11 +473,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
-# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -469,13 +496,11 @@ CONFIG_IP_PNP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
-CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_TCP_MD5SIG is not set
 # CONFIG_IPV6 is not set
-# CONFIG_NETLABEL is not set
 # CONFIG_NETWORK_SECMARK is not set
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
@@ -493,7 +518,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 #
 # Network testing
@@ -548,14 +576,10 @@ CONFIG_SIR_BFIN_DMA=y
 # CONFIG_MCS_FIR is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
+# CONFIG_WIRELESS is not set
-CONFIG_WIRELESS=y
-# CONFIG_CFG80211 is not set
-CONFIG_WIRELESS_OLD_REGULATORY=y
 CONFIG_WIRELESS_EXT=y
-CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_LIB80211=m
-# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
-# CONFIG_IEEE80211 is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -578,6 +602,7 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
@@ -653,7 +678,6 @@ CONFIG_MTD_NAND=y
 # CONFIG_MTD_NAND_VERIFY_WRITE is not set
 # CONFIG_MTD_NAND_ECC_SMC is not set
 # CONFIG_MTD_NAND_MUSEUM_IDS is not set
-# CONFIG_MTD_NAND_BFIN is not set
 CONFIG_MTD_NAND_IDS=y
 CONFIG_MTD_NAND_BF5XX=y
 CONFIG_MTD_NAND_BF5XX_HWECC=y
@@ -665,6 +689,11 @@ CONFIG_MTD_NAND_BF5XX_HWECC=y
 # CONFIG_MTD_ONENAND is not set
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -682,10 +711,20 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_ATA_OVER_ETH is not set
 # CONFIG_BLK_DEV_HD is not set
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
 # CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_AD525X_DPOT is not set
 # CONFIG_C2PORT is not set
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
@@ -709,10 +748,6 @@ CONFIG_BLK_DEV_SR=m
 # CONFIG_BLK_DEV_SR_VENDOR is not set
 # CONFIG_CHR_DEV_SG is not set
 # CONFIG_CHR_DEV_SCH is not set
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
 # CONFIG_SCSI_MULTI_LUN is not set
 # CONFIG_SCSI_CONSTANTS is not set
 # CONFIG_SCSI_LOGGING is not set
@@ -729,6 +764,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SRP_ATTRS is not set
 # CONFIG_SCSI_LOWLEVEL is not set
 # CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
 CONFIG_SATA_PMP=y
@@ -744,13 +780,34 @@ CONFIG_NETDEVICES=y
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
 # CONFIG_VETH is not set
-# CONFIG_PHYLIB is not set
+CONFIG_PHYLIB=y
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 # CONFIG_SMC91X is not set
-CONFIG_SMSC911X=y
 # CONFIG_DM9000 is not set
 # CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+CONFIG_SMSC911X=y
+# CONFIG_DNET is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -759,6 +816,8 @@ CONFIG_SMSC911X=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
@@ -771,13 +830,16 @@ CONFIG_LIBERTAS=m
 # CONFIG_LIBERTAS_USB is not set
 CONFIG_LIBERTAS_SDIO=m
 CONFIG_POWEROF2_BLOCKSIZE_ONLY=y
+# CONFIG_LIBERTAS_SPI is not set
 # CONFIG_LIBERTAS_DEBUG is not set
 # CONFIG_USB_ZD1201 is not set
-# CONFIG_USB_NET_RNDIS_WLAN is not set
-# CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_HOSTAP is not set
 #
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+#
 # USB Network Adapters
 #
 # CONFIG_USB_CATC is not set
@@ -813,28 +875,31 @@ CONFIG_INPUT_EVBUG=m
 # Input Device Drivers
 #
 CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
 # CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_KEYBOARD_SUNKBD is not set
+CONFIG_KEYBOARD_BFIN=y
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-# CONFIG_KEYBOARD_STOWAWAY is not set
 # CONFIG_KEYBOARD_GPIO is not set
-CONFIG_KEYBOARD_BFIN=y
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_NEWTON is not set
 # CONFIG_KEYBOARD_OPENCORES is not set
-# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
 CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
 CONFIG_TOUCHSCREEN_AD7877=m
 # CONFIG_TOUCHSCREEN_AD7879_I2C is not set
 # CONFIG_TOUCHSCREEN_AD7879_SPI is not set
 # CONFIG_TOUCHSCREEN_AD7879 is not set
-# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
 # CONFIG_TOUCHSCREEN_FUJITSU is not set
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
 # CONFIG_TOUCHSCREEN_MTOUCH is not set
 # CONFIG_TOUCHSCREEN_INEXIO is not set
 # CONFIG_TOUCHSCREEN_MK712 is not set
@@ -844,6 +909,8 @@ CONFIG_TOUCHSCREEN_AD7877=m
 # CONFIG_TOUCHSCREEN_WM97XX is not set
 # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
 # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
 CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_ATI_REMOTE is not set
 # CONFIG_INPUT_ATI_REMOTE2 is not set
@@ -852,7 +919,11 @@ CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_YEALINK is not set
 # CONFIG_INPUT_CM109 is not set
 # CONFIG_INPUT_UINPUT is not set
-# CONFIG_CONFIG_INPUT_PCF8574 is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_BFIN_ROTARY is not set
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_PCF8574 is not set
 #
 # Hardware I/O ports
@@ -863,16 +934,13 @@ CONFIG_INPUT_MISC=y
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
 CONFIG_BFIN_DMA_INTERFACE=m
 # CONFIG_BFIN_PPI is not set
 # CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
 # CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=m
-# CONFIG_BFIN_TIMER_LATENCY is not set
 # CONFIG_BFIN_TWI_LCD is not set
-CONFIG_SIMPLE_GPIO=m
 CONFIG_VT=y
 CONFIG_CONSOLE_TRANSLATIONS=y
 CONFIG_VT_CONSOLE=y
@@ -890,6 +958,7 @@ CONFIG_BFIN_JTAG_COMM=m
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
 CONFIG_SERIAL_BFIN_DMA=y
@@ -903,6 +972,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
 CONFIG_BFIN_OTP=y
 # CONFIG_BFIN_OTP_WRITE_ENABLE is not set
@@ -951,14 +1021,9 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_EEPROM_AT24 is not set
-# CONFIG_SENSORS_AD5252 is not set
-# CONFIG_EEPROM_LEGACY is not set
 # CONFIG_SENSORS_PCF8574 is not set
 # CONFIG_PCF8575 is not set
 # CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -975,13 +1040,18 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_BFIN_LOCK is not set
 # CONFIG_SPI_BFIN_SPORT is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 #
 # SPI Protocol Masters
 #
-# CONFIG_EEPROM_AT25 is not set
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
@@ -997,6 +1067,7 @@ CONFIG_GPIO_SYSFS=y
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 #
 # PCI GPIO expanders:
@@ -1038,28 +1109,19 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_UCB1400_CORE is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
-#
-# Multimedia devices
-#
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
 #
 # Graphics support
@@ -1096,6 +1158,7 @@ CONFIG_FB_BF54X_LQ043=y
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FB_METRONOME is not set
 # CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 #
@@ -1132,6 +1195,7 @@ CONFIG_SOUND_OSS_CORE=y
 CONFIG_SND=y
 CONFIG_SND_TIMER=y
 CONFIG_SND_PCM=y
+CONFIG_SND_JACK=y
 # CONFIG_SND_SEQUENCER is not set
 CONFIG_SND_OSSEMUL=y
 CONFIG_SND_MIXER_OSS=y
@@ -1142,6 +1206,11 @@ CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
 # CONFIG_SND_VERBOSE_PRINTK is not set
 # CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
 CONFIG_SND_DRIVERS=y
 # CONFIG_SND_DUMMY is not set
 # CONFIG_SND_MTPAV is not set
@@ -1152,7 +1221,6 @@ CONFIG_SND_SPI=y
 #
 # ALSA Blackfin devices
 #
-# CONFIG_SND_BLACKFIN_AD1836 is not set
 # CONFIG_SND_BFIN_AD73322 is not set
 CONFIG_SND_USB=y
 # CONFIG_SND_USB_AUDIO is not set
@@ -1160,15 +1228,17 @@ CONFIG_SND_USB=y
 CONFIG_SND_SOC=y
 CONFIG_SND_SOC_AC97_BUS=y
 # CONFIG_SND_BF5XX_I2S is not set
+# CONFIG_SND_BF5XX_TDM is not set
 CONFIG_SND_BF5XX_AC97=y
 CONFIG_SND_BF5XX_MMAP_SUPPORT=y
 # CONFIG_SND_BF5XX_MULTICHAN_SUPPORT is not set
+CONFIG_SND_BF5XX_HAVE_COLD_RESET=y
+CONFIG_SND_BF5XX_RESET_GPIO_NUM=19
+CONFIG_SND_BF5XX_SOC_AD1980=y
 CONFIG_SND_BF5XX_SOC_SPORT=y
 CONFIG_SND_BF5XX_SOC_AC97=y
-CONFIG_SND_BF5XX_SOC_AD1980=y
 CONFIG_SND_BF5XX_SPORT_NUM=0
-CONFIG_SND_BF5XX_HAVE_COLD_RESET=y
+CONFIG_SND_SOC_I2C_AND_SPI=y
-CONFIG_SND_BF5XX_RESET_GPIO_NUM=19
 # CONFIG_SND_SOC_ALL_CODECS is not set
 CONFIG_SND_SOC_AD1980=y
 # CONFIG_SOUND_PRIME is not set
@@ -1188,30 +1258,34 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
-CONFIG_HID_BRIGHT=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
-CONFIG_HID_DELL=y
+# CONFIG_HID_DRAGONRISE is not set
 CONFIG_HID_EZKEY=y
+# CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
 CONFIG_HID_MICROSOFT=y
 CONFIG_HID_MONTEREY=y
+# CONFIG_HID_NTRIG is not set
 CONFIG_HID_PANTHERLORD=y
 # CONFIG_PANTHERLORD_FF is not set
 CONFIG_HID_PETALYNX=y
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
 CONFIG_HID_SUNPLUS=y
-CONFIG_THRUSTMASTER_FF=m
+# CONFIG_HID_GREENASIA is not set
-CONFIG_ZEROPLUS_FF=m
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_ZEROPLUS is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
@@ -1237,6 +1311,7 @@ CONFIG_USB_MON=y
 # USB Host Controller Drivers
 #
 # CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
 # CONFIG_USB_ISP1362_HCD is not set
@@ -1267,18 +1342,17 @@ CONFIG_USB_INVENTRA_DMA=y
 # CONFIG_USB_TMC is not set
 #
-# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
 #
 #
-# see USB_STORAGE Help for more information
+# also be needed; see USB_STORAGE Help for more info
 #
 CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_DEBUG is not set
 # CONFIG_USB_STORAGE_DATAFAB is not set
 # CONFIG_USB_STORAGE_FREECOM is not set
 # CONFIG_USB_STORAGE_ISD200 is not set
-# CONFIG_USB_STORAGE_DPCM is not set
 # CONFIG_USB_STORAGE_USBAT is not set
 # CONFIG_USB_STORAGE_SDDR09 is not set
 # CONFIG_USB_STORAGE_SDDR55 is not set
@@ -1314,7 +1388,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGET is not set
 # CONFIG_USB_IDMOUSE is not set
 # CONFIG_USB_FTDI_ELAN is not set
 # CONFIG_USB_APPLEDISPLAY is not set
@@ -1326,6 +1399,13 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_GPIO_VBUS is not set
+CONFIG_NOP_USB_XCEIV=y
 CONFIG_MMC=y
 # CONFIG_MMC_DEBUG is not set
 # CONFIG_MMC_UNSAFE_RESUME is not set
@@ -1380,6 +1460,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 #
 # SPI RTC drivers
@@ -1411,10 +1492,21 @@ CONFIG_RTC_INTF_DEV=y
 #
 CONFIG_RTC_DRV_BFIN=y
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 #
+# Firmware Drivers
+#
+# CONFIG_FIRMWARE_MEMMAP is not set
+# CONFIG_SIGMA is not set
+#
 # File systems
 #
 CONFIG_EXT2_FS=y
@@ -1427,9 +1519,11 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -1439,6 +1533,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+#
 # CD-ROM/DVD Filesystems
 #
 CONFIG_ISO9660_FS=m
@@ -1467,10 +1566,7 @@ CONFIG_SYSFS=y
 # CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
-#
-# Miscellaneous filesystems
-#
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -1489,17 +1585,8 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -1508,6 +1595,7 @@ CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=m
 CONFIG_NFS_V3=y
@@ -1522,7 +1610,6 @@ CONFIG_LOCKD_V4=y
 CONFIG_EXPORTFS=m
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=m
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 CONFIG_SMB_FS=m
@@ -1596,11 +1683,15 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1608,16 +1699,21 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_NOMMU_REGIONS is not set
 # CONFIG_DEBUG_WRITECOUNT is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
@@ -1625,17 +1721,16 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_FAULT_INJECTION is not set
+# CONFIG_PAGE_POISONING is not set
-#
+CONFIG_HAVE_FUNCTION_TRACER=y
-# Tracers
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-#
+CONFIG_TRACING_SUPPORT=y
-# CONFIG_SCHED_TRACER is not set
+# CONFIG_FTRACE is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_DYNAMIC_DEBUG is not set
-# CONFIG_BOOT_TRACER is not set
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
+# CONFIG_KMEMCHECK is not set
 # CONFIG_DEBUG_STACKOVERFLOW is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_VERBOSE=y
@@ -1657,17 +1752,15 @@ CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 #
 # Security options
 #
 # CONFIG_KEYS is not set
-CONFIG_SECURITY=y
+# CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
-# CONFIG_SECURITY_NETWORK is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
-# CONFIG_SECURITY_ROOTPLUG is not set
-CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
 CONFIG_CRYPTO=y
 #
@@ -1746,6 +1839,7 @@ CONFIG_CRYPTO=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 #
@@ -1753,11 +1847,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
@@ -1767,6 +1863,8 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
+CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF561-ACVILON_defconfig b/arch/blackfin/configs/BF561-ACVILON_defconfig
new file mode 100644
index 000000000000..b9b0f93d0bd3
--- /dev/null
+++ b/arch/blackfin/configs/BF561-ACVILON_defconfig
@@ -0,0 +1,1643 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.31.4
+# Sat Oct 24 12:15:32 2009
+#
+# CONFIG_MMU is not set
+# CONFIG_FPU is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+CONFIG_BLACKFIN=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_BUG=y
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_FORCE_MAX_ZONEORDER=14
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_ELF_CORE is not set
+CONFIG_BASE_FULL=y
+# CONFIG_FUTEX is not set
+CONFIG_EPOLL=y
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_AIO is not set
+#
+# Performance Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_MMAP_ALLOW_UNINITIALIZED is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+# CONFIG_FREEZER is not set
+#
+# Blackfin Processor Options
+#
+#
+# Processor and Board Settings
+#
+# CONFIG_BF512 is not set
+# CONFIG_BF514 is not set
+# CONFIG_BF516 is not set
+# CONFIG_BF518 is not set
+# CONFIG_BF522 is not set
+# CONFIG_BF523 is not set
+# CONFIG_BF524 is not set
+# CONFIG_BF525 is not set
+# CONFIG_BF526 is not set
+# CONFIG_BF527 is not set
+# CONFIG_BF531 is not set
+# CONFIG_BF532 is not set
+# CONFIG_BF533 is not set
+# CONFIG_BF534 is not set
+# CONFIG_BF536 is not set
+# CONFIG_BF537 is not set
+# CONFIG_BF538 is not set
+# CONFIG_BF539 is not set
+# CONFIG_BF542 is not set
+# CONFIG_BF542M is not set
+# CONFIG_BF544 is not set
+# CONFIG_BF544M is not set
+# CONFIG_BF547 is not set
+# CONFIG_BF547M is not set
+# CONFIG_BF548 is not set
+# CONFIG_BF548M is not set
+# CONFIG_BF549 is not set
+# CONFIG_BF549M is not set
+CONFIG_BF561=y
+# CONFIG_SMP is not set
+CONFIG_BF_REV_MIN=3
+CONFIG_BF_REV_MAX=5
+# CONFIG_BF_REV_0_0 is not set
+# CONFIG_BF_REV_0_1 is not set
+# CONFIG_BF_REV_0_2 is not set
+# CONFIG_BF_REV_0_3 is not set
+# CONFIG_BF_REV_0_4 is not set
+CONFIG_BF_REV_0_5=y
+# CONFIG_BF_REV_0_6 is not set
+# CONFIG_BF_REV_ANY is not set
+# CONFIG_BF_REV_NONE is not set
+CONFIG_IRQ_PLL_WAKEUP=7
+CONFIG_IRQ_SPORT0_ERROR=7
+CONFIG_IRQ_SPORT1_ERROR=7
+CONFIG_IRQ_TIMER0=10
+CONFIG_IRQ_TIMER1=10
+CONFIG_IRQ_TIMER2=10
+CONFIG_IRQ_TIMER3=10
+CONFIG_IRQ_TIMER4=10
+CONFIG_IRQ_TIMER5=10
+CONFIG_IRQ_TIMER6=10
+CONFIG_IRQ_TIMER7=10
+CONFIG_IRQ_SPI_ERROR=7
+# CONFIG_BFIN561_EZKIT is not set
+# CONFIG_BFIN561_TEPLA is not set
+# CONFIG_BFIN561_BLUETECHNIX_CM is not set
+CONFIG_BFIN561_ACVILON=y
+#
+# BF561 Specific Configuration
+#
+#
+# Core B Support
+#
+# CONFIG_BF561_COREB is not set
+#
+# Interrupt Priority Assignment
+#
+#
+# Priority
+#
+CONFIG_IRQ_DMA1_ERROR=7
+CONFIG_IRQ_DMA2_ERROR=7
+CONFIG_IRQ_IMDMA_ERROR=7
+CONFIG_IRQ_PPI0_ERROR=7
+CONFIG_IRQ_PPI1_ERROR=7
+CONFIG_IRQ_UART_ERROR=7
+CONFIG_IRQ_RESERVED_ERROR=7
+CONFIG_IRQ_DMA1_0=8
+CONFIG_IRQ_DMA1_1=8
+CONFIG_IRQ_DMA1_2=8
+CONFIG_IRQ_DMA1_3=8
+CONFIG_IRQ_DMA1_4=8
+CONFIG_IRQ_DMA1_5=8
+CONFIG_IRQ_DMA1_6=8
+CONFIG_IRQ_DMA1_7=8
+CONFIG_IRQ_DMA1_8=8
+CONFIG_IRQ_DMA1_9=8
+CONFIG_IRQ_DMA1_10=8
+CONFIG_IRQ_DMA1_11=8
+CONFIG_IRQ_DMA2_0=9
+CONFIG_IRQ_DMA2_1=9
+CONFIG_IRQ_DMA2_2=9
+CONFIG_IRQ_DMA2_3=9
+CONFIG_IRQ_DMA2_4=9
+CONFIG_IRQ_DMA2_5=9
+CONFIG_IRQ_DMA2_6=9
+CONFIG_IRQ_DMA2_7=9
+CONFIG_IRQ_DMA2_8=9
+CONFIG_IRQ_DMA2_9=9
+CONFIG_IRQ_DMA2_10=9
+CONFIG_IRQ_DMA2_11=9
+CONFIG_IRQ_TIMER8=10
+CONFIG_IRQ_TIMER9=10
+CONFIG_IRQ_TIMER10=10
+CONFIG_IRQ_TIMER11=10
+CONFIG_IRQ_PROG0_INTA=11
+CONFIG_IRQ_PROG0_INTB=11
+CONFIG_IRQ_PROG1_INTA=11
+CONFIG_IRQ_PROG1_INTB=11
+CONFIG_IRQ_PROG2_INTA=11
+CONFIG_IRQ_PROG2_INTB=11
+CONFIG_IRQ_DMA1_WRRD0=8
+CONFIG_IRQ_DMA1_WRRD1=8
+CONFIG_IRQ_DMA2_WRRD0=9
+CONFIG_IRQ_DMA2_WRRD1=9
+CONFIG_IRQ_IMDMA_WRRD0=12
+CONFIG_IRQ_IMDMA_WRRD1=12
+CONFIG_IRQ_WDTIMER=13
+#
+# Board customizations
+#
+# CONFIG_CMDLINE_BOOL is not set
+CONFIG_BOOT_LOAD=0x1000
+#
+# Clock/PLL Setup
+#
+CONFIG_CLKIN_HZ=12000000
+# CONFIG_BFIN_KERNEL_CLOCK is not set
+CONFIG_MAX_VCO_HZ=600000000
+CONFIG_MIN_VCO_HZ=50000000
+CONFIG_MAX_SCLK_HZ=133333333
+CONFIG_MIN_SCLK_HZ=27000000
+#
+# Kernel Timer/Scheduler
+#
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_SCHED_HRTICK=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
+CONFIG_CYCLES_CLOCKSOURCE=y
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+#
+# Misc
+#
+CONFIG_BFIN_SCRATCH_REG_RETN=y
+# CONFIG_BFIN_SCRATCH_REG_RETE is not set
+# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
+#
+# Blackfin Kernel Optimizations
+#
+#
+# Memory Optimizations
+#
+CONFIG_I_ENTRY_L1=y
+CONFIG_EXCPT_IRQ_SYSC_L1=y
+CONFIG_DO_IRQ_L1=y
+CONFIG_CORE_TIMER_IRQ_L1=y
+CONFIG_IDLE_L1=y
+CONFIG_SCHEDULE_L1=y
+CONFIG_ARITHMETIC_OPS_L1=y
+CONFIG_ACCESS_OK_L1=y
+CONFIG_MEMSET_L1=y
+CONFIG_MEMCPY_L1=y
+CONFIG_SYS_BFIN_SPINLOCK_L1=y
+# CONFIG_IP_CHECKSUM_L1 is not set
+CONFIG_CACHELINE_ALIGNED_L1=y
+# CONFIG_SYSCALL_TAB_L1 is not set
+# CONFIG_CPLB_SWITCH_TAB_L1 is not set
+CONFIG_APP_STACK_L1=y
+#
+# Speed Optimizations
+#
+CONFIG_BFIN_INS_LOWOVERHEAD=y
+CONFIG_RAMKERNEL=y
+# CONFIG_ROMKERNEL is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_VIRT_TO_BUS=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
+CONFIG_BFIN_GPTIMERS=y
+CONFIG_DMA_UNCACHED_4M=y
+# CONFIG_DMA_UNCACHED_2M is not set
+# CONFIG_DMA_UNCACHED_1M is not set
+# CONFIG_DMA_UNCACHED_NONE is not set
+#
+# Cache Support
+#
+CONFIG_BFIN_ICACHE=y
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
+# CONFIG_BFIN_L2_ICACHEABLE is not set
+CONFIG_BFIN_DCACHE=y
+# CONFIG_BFIN_DCACHE_BANKA is not set
+CONFIG_BFIN_EXTMEM_DCACHEABLE=y
+CONFIG_BFIN_EXTMEM_WRITEBACK=y
+# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
+# CONFIG_BFIN_L2_DCACHEABLE is not set
+#
+# Memory Protection Unit
+#
+# CONFIG_MPU is not set
+#
+# Asynchronous Memory Configuration
+#
+#
+# EBIU_AMGCTL Global Control
+#
+CONFIG_C_AMCKEN=y
+CONFIG_C_CDPRIO=y
+CONFIG_C_B0PEN=y
+CONFIG_C_B1PEN=y
+CONFIG_C_B2PEN=y
+# CONFIG_C_B3PEN is not set
+# CONFIG_C_AMBEN is not set
+# CONFIG_C_AMBEN_B0 is not set
+# CONFIG_C_AMBEN_B0_B1 is not set
+# CONFIG_C_AMBEN_B0_B1_B2 is not set
+CONFIG_C_AMBEN_ALL=y
+#
+# EBIU_AMBCTL Control
+#
+CONFIG_BANK_0=0x99b2
+CONFIG_BANK_1=0x3350
+CONFIG_BANK_2=0x7BB0
+CONFIG_BANK_3=0xAAC2
+#
+# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF_FDPIC=y
+CONFIG_BINFMT_FLAT=y
+CONFIG_BINFMT_ZFLAT=y
+# CONFIG_BINFMT_SHARED_FLAT is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+CONFIG_NET=y
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETLABEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+#
+# Device Drivers
+#
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_RAM=y
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_UCLINUX is not set
+CONFIG_MTD_PLATRAM=y
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+CONFIG_MTD_PHRAM=y
+# CONFIG_MTD_MTDRAM is not set
+CONFIG_MTD_BLOCK2MTD=y
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_VERIFY_WRITE=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+CONFIG_MTD_NAND_PLATFORM=y
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=2
+CONFIG_BLK_DEV_RAM_SIZE=16384
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=y
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+CONFIG_SMSC911X=y
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+#
+# Character devices
+#
+# CONFIG_BFIN_DMA_INTERFACE is not set
+# CONFIG_BFIN_PPI is not set
+# CONFIG_BFIN_PPIFCD is not set
+CONFIG_BFIN_SIMPLE_TIMER=y
+# CONFIG_BFIN_SPI_ADC is not set
+# CONFIG_BFIN_SPORT is not set
+# CONFIG_BFIN_TWI_LCD is not set
+# CONFIG_VT is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_BFIN_JTAG_COMM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_BFIN=y
+CONFIG_SERIAL_BFIN_CONSOLE=y
+# CONFIG_SERIAL_BFIN_DMA is not set
+CONFIG_SERIAL_BFIN_PIO=y
+CONFIG_SERIAL_BFIN_UART0=y
+# CONFIG_BFIN_UART0_CTSRTS is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_BFIN_SPORT is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+#
+# CAN, the car bus and industrial fieldbus
+#
+# CONFIG_CAN4LINUX is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOPCA=y
+#
+# I2C Hardware Bus support
+#
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+#
+# Other I2C/SMBus bus drivers
+#
+CONFIG_I2C_PCA_PLATFORM=y
+# CONFIG_I2C_STUB is not set
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BFIN=y
+# CONFIG_SPI_BFIN_LOCK is not set
+# CONFIG_SPI_BFIN_SPORT is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+#
+# SPI Protocol Masters
+#
+CONFIG_SPI_SPIDEV=y
+# CONFIG_SPI_TLE62X0 is not set
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+#
+# Memory mapped GPIO expanders:
+#
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+CONFIG_GPIO_PCF857X=y
+# CONFIG_GPIO_ADP5588 is not set
+#
+# PCI GPIO expanders:
+#
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADCXX is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+CONFIG_SENSORS_LM75=y
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LM95241 is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_SHT15 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_BFIN_WDT=y
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+# CONFIG_SND_DRIVERS is not set
+CONFIG_SND_SPI=y
+#
+# ALSA Blackfin devices
+#
+# CONFIG_SND_BFIN_AD73322 is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_BF5XX_I2S=y
+# CONFIG_SND_BF5XX_SOC_SSM2602 is not set
+# CONFIG_SND_BF5XX_SOC_AD73311 is not set
+# CONFIG_SND_BF5XX_SOC_ADAU1371 is not set
+# CONFIG_SND_BF5XX_SOC_ADAU1761 is not set
+# CONFIG_SND_BF5XX_TDM is not set
+# CONFIG_SND_BF5XX_AC97 is not set
+CONFIG_SND_BF5XX_SOC_SPORT=y
+CONFIG_SND_BF5XX_SPORT_NUM=1
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+# CONFIG_SOUND_PRIME is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+#
+# USB port drivers
+#
+CONFIG_USB_SERIAL=y
+# CONFIG_USB_SERIAL_CONSOLE is not set
+# CONFIG_USB_EZUSB is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_AIRCABLE is not set
+# CONFIG_USB_SERIAL_ARK3116 is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_CH341 is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_CP210X is not set
+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+CONFIG_USB_SERIAL_FTDI_SIO=y
+# CONFIG_USB_SERIAL_FUNSOFT is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IPAQ is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
+# CONFIG_USB_SERIAL_GARMIN is not set
+# CONFIG_USB_SERIAL_IPW is not set
+# CONFIG_USB_SERIAL_IUU is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KLSI is not set
+# CONFIG_USB_SERIAL_KOBIL_SCT is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_MOS7720 is not set
+# CONFIG_USB_SERIAL_MOS7840 is not set
+# CONFIG_USB_SERIAL_MOTOROLA is not set
+# CONFIG_USB_SERIAL_NAVMAN is not set
+CONFIG_USB_SERIAL_PL2303=y
+# CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_QUALCOMM is not set
+# CONFIG_USB_SERIAL_SPCP8X5 is not set
+# CONFIG_USB_SERIAL_HP4X is not set
+# CONFIG_USB_SERIAL_SAFE is not set
+# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
+# CONFIG_USB_SERIAL_SYMBOL is not set
+# CONFIG_USB_SERIAL_TI is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+# CONFIG_USB_SERIAL_OPTION is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_SERIAL_OPTICON is not set
+# CONFIG_USB_SERIAL_DEBUG is not set
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+#
+# I2C RTC drivers
+#
+CONFIG_RTC_DRV_DS1307=y
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+#
+# on-CPU RTC drivers
+#
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+#
+# Firmware Drivers
+#
+# CONFIG_FIRMWARE_MEMMAP is not set
+# CONFIG_SIGMA is not set
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+# CONFIG_DNOTIFY is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=866
+CONFIG_FAT_DEFAULT_IOCHARSET="cp1251"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+# CONFIG_NTFS_RW is not set
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=y
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+# CONFIG_JFFS2_ZLIB is not set
+CONFIG_JFFS2_LZO=y
+# CONFIG_JFFS2_RTIME is not set
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_CMODE_NONE is not set
+# CONFIG_JFFS2_CMODE_PRIORITY is not set
+# CONFIG_JFFS2_CMODE_SIZE is not set
+CONFIG_JFFS2_CMODE_FAVOURLZO=y
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+CONFIG_MINIX_FS=y
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="cp1251"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+CONFIG_NLS_CODEPAGE_866=y
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+CONFIG_NLS_CODEPAGE_1251=y
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+CONFIG_NLS_KOI8_R=y
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_SHIRQ=y
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_NOMMU_REGIONS is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_FRAME_POINTER is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_KMEMCHECK is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_VERBOSE=y
+CONFIG_DEBUG_MMRS=y
+# CONFIG_DEBUG_HWERR is not set
+# CONFIG_DEBUG_DOUBLEFAULT is not set
+CONFIG_DEBUG_HUNT_FOR_ZERO=y
+CONFIG_DEBUG_BFIN_HWTRACE_ON=y
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
+# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
+# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
+# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
+# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
+# CONFIG_EARLY_PRINTK is not set
+CONFIG_CPLB_INFO=y
+CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+CONFIG_SECURITY=y
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_NETWORK is not set
+# CONFIG_SECURITY_PATH is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_SECURITY_ROOTPLUG is not set
+# CONFIG_SECURITY_TOMOYO is not set
+CONFIG_CRYPTO=y
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_MANAGER2 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig
index 0313cd1d9824..e3ecdcc3e76b 100644
--- a/arch/blackfin/configs/BF561-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF561-EZKIT_defconfig
@@ -1,22 +1,29 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.10
+# Linux kernel version: 2.6.31.5
-# Thu May 21 05:50:01 2009
+# Mon Nov  2 21:59:31 2009
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 #
 # General setup
@@ -26,22 +33,40 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -62,17 +87,28 @@ CONFIG_EPOLL=y
 # CONFIG_TIMERFD is not set
 # CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
+#
+# Performance Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -80,11 +116,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
@@ -94,13 +127,12 @@ CONFIG_BLOCK=y
 CONFIG_IOSCHED_NOOP=y
 CONFIG_IOSCHED_AS=y
 # CONFIG_IOSCHED_DEADLINE is not set
-CONFIG_IOSCHED_CFQ=y
+# CONFIG_IOSCHED_CFQ is not set
 CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_DEADLINE is not set
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_CLASSIC_RCU=y
 # CONFIG_PREEMPT_NONE is not set
 CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
@@ -170,6 +202,7 @@ CONFIG_IRQ_SPI_ERROR=7
 CONFIG_BFIN561_EZKIT=y
 # CONFIG_BFIN561_TEPLA is not set
 # CONFIG_BFIN561_BLUETECHNIX_CM is not set
+# CONFIG_BFIN561_ACVILON is not set
 #
 # BF561 Specific Configuration
@@ -317,10 +350,11 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 CONFIG_BFIN_GPTIMERS=m
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
@@ -331,14 +365,13 @@ CONFIG_DMA_UNCACHED_1M=y
 # Cache Support
 #
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
+# CONFIG_BFIN_L2_ICACHEABLE is not set
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
 CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
-# CONFIG_BFIN_L2_ICACHEABLE is not set
 # CONFIG_BFIN_L2_DCACHEABLE is not set
 #
@@ -347,7 +380,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 #
-# Asynchonous Memory Configuration
+# Asynchronous Memory Configuration
 #
 #
@@ -407,11 +440,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
-# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -435,13 +463,11 @@ CONFIG_IP_PNP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
-CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_TCP_MD5SIG is not set
 # CONFIG_IPV6 is not set
-# CONFIG_NETLABEL is not set
 # CONFIG_NETWORK_SECMARK is not set
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
@@ -459,7 +485,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 #
 # Network testing
@@ -503,13 +532,8 @@ CONFIG_IRTTY_SIR=m
 #
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
+# CONFIG_WIRELESS is not set
-CONFIG_WIRELESS=y
+# CONFIG_WIMAX is not set
-# CONFIG_CFG80211 is not set
-CONFIG_WIRELESS_OLD_REGULATORY=y
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -530,6 +554,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
@@ -603,6 +628,11 @@ CONFIG_MTD_PHYSMAP=m
 # CONFIG_MTD_ONENAND is not set
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -619,9 +649,14 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_ATA_OVER_ETH is not set
 # CONFIG_BLK_DEV_HD is not set
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_C2PORT is not set
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
@@ -645,9 +680,11 @@ CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 CONFIG_SMC91X=y
-# CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
 # CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -656,6 +693,8 @@ CONFIG_SMC91X=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
@@ -664,7 +703,10 @@ CONFIG_SMC91X=y
 #
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
@@ -708,15 +750,12 @@ CONFIG_INPUT_EVDEV=m
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
 CONFIG_BFIN_DMA_INTERFACE=m
 # CONFIG_BFIN_PPI is not set
 # CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
 # CONFIG_BFIN_SPI_ADC is not set
 # CONFIG_BFIN_SPORT is not set
-# CONFIG_BFIN_TIMER_LATENCY is not set
-CONFIG_SIMPLE_GPIO=m
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
 CONFIG_BFIN_JTAG_COMM=m
@@ -730,6 +769,7 @@ CONFIG_BFIN_JTAG_COMM=m
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
 CONFIG_SERIAL_BFIN_DMA=y
@@ -740,6 +780,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
 #
@@ -763,13 +804,18 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_BFIN_LOCK is not set
 # CONFIG_SPI_BFIN_SPORT is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 #
 # SPI Protocol Masters
 #
-# CONFIG_EEPROM_AT25 is not set
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
@@ -782,9 +828,6 @@ CONFIG_GPIO_SYSFS=y
 #
 # I2C GPIO expanders:
 #
-# CONFIG_GPIO_MAX732X is not set
-# CONFIG_GPIO_PCA953X is not set
-# CONFIG_GPIO_PCF857X is not set
 #
 # PCI GPIO expanders:
@@ -822,23 +865,9 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
-#
-# Multimedia devices
-#
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
 #
 # Graphics support
@@ -862,7 +891,6 @@ CONFIG_HID=m
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 # CONFIG_USB_SUPPORT is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
@@ -870,10 +898,20 @@ CONFIG_HID_COMPAT=y
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_RTC_CLASS is not set
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 #
+# Firmware Drivers
+#
+# CONFIG_FIRMWARE_MEMMAP is not set
+#
 # File systems
 #
 # CONFIG_EXT2_FS is not set
@@ -882,9 +920,11 @@ CONFIG_HID_COMPAT=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -894,6 +934,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -915,10 +960,7 @@ CONFIG_SYSFS=y
 # CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
-#
-# Miscellaneous filesystems
-#
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -937,17 +979,8 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -956,6 +989,7 @@ CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=m
 CONFIG_NFS_V3=y
@@ -966,7 +1000,6 @@ CONFIG_LOCKD=m
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=m
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 CONFIG_SMB_FS=m
@@ -1034,11 +1067,15 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1046,16 +1083,21 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_NOMMU_REGIONS is not set
 # CONFIG_DEBUG_WRITECOUNT is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
@@ -1063,17 +1105,19 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_FAULT_INJECTION is not set
+# CONFIG_PAGE_POISONING is not set
-#
+CONFIG_HAVE_FUNCTION_TRACER=y
-# Tracers
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-#
+CONFIG_TRACING_SUPPORT=y
-# CONFIG_SCHED_TRACER is not set
+# CONFIG_FTRACE is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BRANCH_PROFILE_NONE is not set
-# CONFIG_BOOT_TRACER is not set
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
+# CONFIG_KMEMCHECK is not set
 # CONFIG_DEBUG_STACKOVERFLOW is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_VERBOSE=y
@@ -1095,16 +1139,15 @@ CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 #
 # Security options
 #
 # CONFIG_KEYS is not set
-CONFIG_SECURITY=y
+# CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
-# CONFIG_SECURITY_NETWORK is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
-CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
 CONFIG_CRYPTO=y
 #
@@ -1183,6 +1226,7 @@ CONFIG_CRYPTO=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 #
@@ -1190,11 +1234,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
@@ -1204,6 +1250,8 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
+CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BlackStamp_defconfig b/arch/blackfin/configs/BlackStamp_defconfig
index 5d944ffd4ab0..9e65d885ec0b 100644
--- a/arch/blackfin/configs/BlackStamp_defconfig
+++ b/arch/blackfin/configs/BlackStamp_defconfig
@@ -66,6 +66,7 @@ CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
@@ -275,6 +276,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_RESOURCES_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 CONFIG_BFIN_GPTIMERS=y
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
diff --git a/arch/blackfin/configs/CM-BF527_defconfig b/arch/blackfin/configs/CM-BF527_defconfig
index 648a31d01bf4..4432150d89e3 100644
--- a/arch/blackfin/configs/CM-BF527_defconfig
+++ b/arch/blackfin/configs/CM-BF527_defconfig
@@ -1,12 +1,13 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28
+# Linux kernel version: 2.6.30.5
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
@@ -15,6 +16,9 @@ CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 #
@@ -25,55 +29,72 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+# CONFIG_KERNEL_GZIP is not set
+# CONFIG_KERNEL_BZIP2 is not set
+CONFIG_KERNEL_LZMA=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
-CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_RD_GZIP is not set
+# CONFIG_RD_BZIP2 is not set
+CONFIG_RD_LZMA=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SYSCTL is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 # CONFIG_AIO is not set
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
+# CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
-CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -81,11 +102,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
@@ -101,7 +119,6 @@ CONFIG_IOSCHED_CFQ=y
 CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
-CONFIG_CLASSIC_RCU=y
 # CONFIG_PREEMPT_NONE is not set
 CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
@@ -265,7 +282,10 @@ CONFIG_HZ=250
 # CONFIG_SCHED_HRTICK is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
 # CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
 # CONFIG_NO_HZ is not set
 # CONFIG_HIGH_RES_TIMERS is not set
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
@@ -315,10 +335,12 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 CONFIG_BFIN_GPTIMERS=y
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
@@ -329,10 +351,9 @@ CONFIG_DMA_UNCACHED_1M=y
 # Cache Support
 #
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
 CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -343,7 +364,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 #
-# Asynchonous Memory Configuration
+# Asynchronous Memory Configuration
 #
 #
@@ -361,7 +382,7 @@ CONFIG_C_AMBEN_ALL=y
 # EBIU_AMBCTL Control
 #
 CONFIG_BANK_0=0x7BB0
-CONFIG_BANK_1=0x5554
+CONFIG_BANK_1=0x7BB0
 CONFIG_BANK_2=0x7BB0
 CONFIG_BANK_3=0xFFC0
@@ -386,7 +407,6 @@ CONFIG_BINFMT_ZFLAT=y
 #
 # CONFIG_PM is not set
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
-# CONFIG_PM_WAKEUP_BY_GPIO is not set
 #
 # CPU Frequency scaling
@@ -400,11 +420,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
-# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -428,7 +443,6 @@ CONFIG_IP_PNP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
-CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -452,7 +466,9 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 #
 # Network testing
@@ -463,13 +479,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
+# CONFIG_WIRELESS is not set
-CONFIG_WIRELESS=y
+# CONFIG_WIMAX is not set
-# CONFIG_CFG80211 is not set
-CONFIG_WIRELESS_OLD_REGULATORY=y
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -484,22 +495,21 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_FW_LOADER is not set
-# CONFIG_DEBUG_DRIVER is not set
-# CONFIG_DEBUG_DEVRES is not set
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AR7_PARTS is not set
 #
 # User Modules And Translation Layers
 #
-CONFIG_MTD_CHAR=m
+CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLKDEVS=y
 CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
@@ -512,9 +522,9 @@ CONFIG_MTD_BLOCK=y
 #
 # RAM/ROM/Flash chip drivers
 #
-# CONFIG_MTD_CFI is not set
+CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=m
+# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=m
+CONFIG_MTD_GEN_PROBE=y
 # CONFIG_MTD_CFI_ADV_OPTIONS is not set
 CONFIG_MTD_MAP_BANK_WIDTH_1=y
 CONFIG_MTD_MAP_BANK_WIDTH_2=y
@@ -526,9 +536,11 @@ CONFIG_MTD_CFI_I1=y
 CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_I4 is not set
 # CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_INTELEXT=y
 # CONFIG_MTD_CFI_AMDSTD is not set
 # CONFIG_MTD_CFI_STAA is not set
+# CONFIG_MTD_PSD4256G is not set
+CONFIG_MTD_CFI_UTIL=y
 CONFIG_MTD_RAM=y
 CONFIG_MTD_ROM=m
 # CONFIG_MTD_ABSENT is not set
@@ -538,7 +550,7 @@ CONFIG_MTD_ROM=m
 #
 CONFIG_MTD_COMPLEX_MAPPINGS=y
 # CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_GPIO_ADDR is not set
+CONFIG_MTD_GPIO_ADDR=y
 # CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
@@ -562,6 +574,11 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
 # CONFIG_MTD_ONENAND is not set
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -586,12 +603,46 @@ CONFIG_HAVE_IDE=y
 # SCSI device support
 #
 # CONFIG_RAID_ATTRS is not set
-# CONFIG_SCSI is not set
+CONFIG_SCSI=y
-# CONFIG_SCSI_DMA is not set
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
 # CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
 CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
 # CONFIG_MACVLAN is not set
@@ -613,6 +664,9 @@ CONFIG_PHYLIB=y
 # CONFIG_BROADCOM_PHY is not set
 # CONFIG_ICPLUS_PHY is not set
 # CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
 # CONFIG_FIXED_PHY is not set
 # CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
@@ -623,9 +677,11 @@ CONFIG_BFIN_TX_DESC_NUM=10
 CONFIG_BFIN_RX_DESC_NUM=20
 CONFIG_BFIN_MAC_RMII=y
 # CONFIG_SMC91X is not set
-# CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
 # CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -633,6 +689,7 @@ CONFIG_BFIN_MAC_RMII=y
 # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
@@ -641,7 +698,10 @@ CONFIG_BFIN_MAC_RMII=y
 #
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
 #
 # USB Network Adapters
@@ -674,17 +734,13 @@ CONFIG_BFIN_MAC_RMII=y
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
+CONFIG_BFIN_DMA_INTERFACE=m
-# CONFIG_SPI_ADC_BF533 is not set
+# CONFIG_BFIN_PPI is not set
-# CONFIG_BF5xx_PPIFCD is not set
+# CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-# CONFIG_BF5xx_PPI is not set
+# CONFIG_BFIN_SPI_ADC is not set
-# CONFIG_BF5xx_EPPI is not set
 # CONFIG_BFIN_SPORT is not set
-# CONFIG_BFIN_TIMER_LATENCY is not set
+# CONFIG_BFIN_TWI_LCD is not set
-# CONFIG_TWI_LCD is not set
-CONFIG_BFIN_DMA_INTERFACE=m
-CONFIG_SIMPLE_GPIO=m
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
 # CONFIG_BFIN_JTAG_COMM is not set
@@ -698,6 +754,7 @@ CONFIG_SIMPLE_GPIO=m
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
 CONFIG_SERIAL_BFIN_DMA=y
@@ -710,6 +767,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
 CONFIG_BFIN_OTP=y
 # CONFIG_BFIN_OTP_WRITE_ENABLE is not set
@@ -758,13 +816,9 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_AT24 is not set
-# CONFIG_SENSORS_AD5252 is not set
-# CONFIG_SENSORS_EEPROM is not set
 # CONFIG_SENSORS_PCF8574 is not set
 # CONFIG_PCF8575 is not set
 # CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
 # CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
@@ -772,7 +826,6 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 CONFIG_SPI=y
-# CONFIG_SPI_DEBUG is not set
 CONFIG_SPI_MASTER=y
 #
@@ -780,17 +833,17 @@ CONFIG_SPI_MASTER=y
 #
 CONFIG_SPI_BFIN=y
 # CONFIG_SPI_BFIN_LOCK is not set
+# CONFIG_SPI_BFIN_SPORT is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 #
 # SPI Protocol Masters
 #
-# CONFIG_SPI_AT25 is not set
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 CONFIG_GPIOLIB=y
-# CONFIG_DEBUG_GPIO is not set
 CONFIG_GPIO_SYSFS=y
 #
@@ -803,6 +856,7 @@ CONFIG_GPIO_SYSFS=y
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 #
 # PCI GPIO expanders:
@@ -829,11 +883,13 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
 # CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
 # CONFIG_SENSORS_GL518SM is not set
 # CONFIG_SENSORS_GL520SM is not set
 # CONFIG_SENSORS_IT87 is not set
@@ -849,11 +905,16 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_LM90 is not set
 # CONFIG_SENSORS_LM92 is not set
 # CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LM95241 is not set
 # CONFIG_SENSORS_MAX1111 is not set
 # CONFIG_SENSORS_MAX1619 is not set
 # CONFIG_SENSORS_MAX6650 is not set
 # CONFIG_SENSORS_PC87360 is not set
 # CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_SHT15 is not set
 # CONFIG_SENSORS_DME1737 is not set
 # CONFIG_SENSORS_SMSC47M1 is not set
 # CONFIG_SENSORS_SMSC47M192 is not set
@@ -885,6 +946,12 @@ CONFIG_BFIN_WDT=y
 # USB-based Watchdog Cards
 #
 # CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
 #
 # Multifunction device drivers
@@ -892,10 +959,14 @@ CONFIG_BFIN_WDT=y
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
 # CONFIG_REGULATOR is not set
 #
@@ -931,20 +1002,20 @@ CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
 # CONFIG_USB_ARCH_HAS_EHCI is not set
-CONFIG_USB=y
+CONFIG_USB=m
 # CONFIG_USB_DEBUG is not set
-# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 #
 # Miscellaneous USB options
 #
-# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICEFS=y
-CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DEVICE_CLASS is not set
 # CONFIG_USB_DYNAMIC_MINORS is not set
 # CONFIG_USB_OTG is not set
 # CONFIG_USB_OTG_WHITELIST is not set
 CONFIG_USB_OTG_BLACKLIST_HUB=y
-CONFIG_USB_MON=y
+CONFIG_USB_MON=m
 # CONFIG_USB_WUSB is not set
 # CONFIG_USB_WUSB_CBAF is not set
@@ -952,24 +1023,24 @@ CONFIG_USB_MON=y
 # USB Host Controller Drivers
 #
 # CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
 # CONFIG_USB_ISP1362_HCD is not set
 # CONFIG_USB_SL811_HCD is not set
 # CONFIG_USB_R8A66597_HCD is not set
 # CONFIG_USB_HWA_HCD is not set
-CONFIG_USB_MUSB_HDRC=y
+CONFIG_USB_MUSB_HDRC=m
 CONFIG_USB_MUSB_SOC=y
 #
 # Blackfin high speed USB Support
 #
-CONFIG_USB_MUSB_HOST=y
+# CONFIG_USB_MUSB_HOST is not set
-# CONFIG_USB_MUSB_PERIPHERAL is not set
+CONFIG_USB_MUSB_PERIPHERAL=y
 # CONFIG_USB_MUSB_OTG is not set
-CONFIG_USB_MUSB_HDRC_HCD=y
+CONFIG_USB_GADGET_MUSB_HDRC=y
 CONFIG_MUSB_PIO_ONLY=y
-CONFIG_MUSB_DMA_POLL=y
 # CONFIG_USB_MUSB_DEBUG is not set
 #
@@ -981,18 +1052,31 @@ CONFIG_MUSB_DMA_POLL=y
 # CONFIG_USB_TMC is not set
 #
-# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
 #
 #
-# see USB_STORAGE Help for more information
+# also be needed; see USB_STORAGE Help for more info
 #
+CONFIG_USB_STORAGE=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
 # CONFIG_USB_LIBUSUAL is not set
 #
 # USB Imaging devices
 #
 # CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
 #
 # USB port drivers
@@ -1013,7 +1097,6 @@ CONFIG_MUSB_DMA_POLL=y
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGET is not set
 # CONFIG_USB_IDMOUSE is not set
 # CONFIG_USB_FTDI_ELAN is not set
 # CONFIG_USB_APPLEDISPLAY is not set
@@ -1021,9 +1104,50 @@ CONFIG_MUSB_DMA_POLL=y
 # CONFIG_USB_LD is not set
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
-# CONFIG_USB_GADGET is not set
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2272 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+# CONFIG_USB_GADGETFS is not set
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+CONFIG_USB_G_PRINTER=m
+# CONFIG_USB_CDC_COMPOSITE is not set
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
@@ -1090,6 +1214,7 @@ CONFIG_RTC_INTF_DEV=y
 #
 CONFIG_RTC_DRV_BFIN=y
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
 # CONFIG_STAGING is not set
@@ -1102,9 +1227,10 @@ CONFIG_RTC_DRV_BFIN=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_FILE_LOCKING=y
 # CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -1114,6 +1240,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1122,8 +1253,11 @@ CONFIG_INOTIFY_USER=y
 #
 # DOS/FAT/NT Filesystems
 #
-# CONFIG_MSDOS_FS is not set
+CONFIG_FAT_FS=y
-# CONFIG_VFAT_FS is not set
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 # CONFIG_NTFS_FS is not set
 #
@@ -1135,10 +1269,7 @@ CONFIG_SYSFS=y
 # CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
-#
-# Miscellaneous filesystems
-#
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -1146,9 +1277,19 @@ CONFIG_SYSFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-# CONFIG_YAFFS_FS is not set
+CONFIG_JFFS2_FS=y
-# CONFIG_JFFS2_FS is not set
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -1157,6 +1298,7 @@ CONFIG_SYSFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=m
 CONFIG_NFS_V3=y
@@ -1167,7 +1309,6 @@ CONFIG_LOCKD=m
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=m
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 CONFIG_SMB_FS=m
@@ -1182,9 +1323,9 @@ CONFIG_SMB_FS=m
 #
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
-CONFIG_NLS=m
+CONFIG_NLS=y
 CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
+CONFIG_NLS_CODEPAGE_437=y
 # CONFIG_NLS_CODEPAGE_737 is not set
 # CONFIG_NLS_CODEPAGE_775 is not set
 # CONFIG_NLS_CODEPAGE_850 is not set
@@ -1208,7 +1349,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
 # CONFIG_NLS_CODEPAGE_1250 is not set
 # CONFIG_NLS_CODEPAGE_1251 is not set
 # CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
+CONFIG_NLS_ISO8859_1=y
 # CONFIG_NLS_ISO8859_2 is not set
 # CONFIG_NLS_ISO8859_3 is not set
 # CONFIG_NLS_ISO8859_4 is not set
@@ -1235,55 +1376,34 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
-CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_SECTION_MISMATCH=y
-# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_DEBUG_KERNEL is not set
-CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
-CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_SCHEDSTATS is not set
-# CONFIG_TIMER_STATS is not set
-# CONFIG_DEBUG_OBJECTS is not set
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_MUTEXES is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
-# CONFIG_DEBUG_KOBJECT is not set
-CONFIG_DEBUG_BUGVERBOSE=y
-# CONFIG_DEBUG_INFO is not set
-# CONFIG_DEBUG_VM is not set
-# CONFIG_DEBUG_WRITECOUNT is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
-# CONFIG_DEBUG_LIST is not set
-# CONFIG_DEBUG_SG is not set
-# CONFIG_FRAME_POINTER is not set
-# CONFIG_BOOT_PRINTK_DELAY is not set
-# CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_BACKTRACE_SELF_TEST is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
-# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-# CONFIG_FAULT_INJECTION is not set
+CONFIG_TRACING_SUPPORT=y
-# CONFIG_SYSCTL_SYSCALL_CHECK is not set
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
-# CONFIG_KGDB is not set
-# CONFIG_DEBUG_STACKOVERFLOW is not set
-# CONFIG_DEBUG_STACK_USAGE is not set
-# CONFIG_KGDB_TESTCASE is not set
 CONFIG_DEBUG_VERBOSE=y
-CONFIG_DEBUG_MMRS=y
+# CONFIG_DEBUG_MMRS is not set
-# CONFIG_DEBUG_HWERR is not set
 # CONFIG_DEBUG_DOUBLEFAULT is not set
 CONFIG_DEBUG_HUNT_FOR_ZERO=y
 CONFIG_DEBUG_BFIN_HWTRACE_ON=y
@@ -1293,9 +1413,10 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
 CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
 # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
 # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
-# CONFIG_EARLY_PRINTK is not set
+CONFIG_EARLY_PRINTK=y
 # CONFIG_CPLB_INFO is not set
 CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 #
 # Security options
@@ -1304,9 +1425,9 @@ CONFIG_ACCESS_CHECK=y
 CONFIG_SECURITY=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_NETWORK is not set
+# CONFIG_SECURITY_PATH is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
-# CONFIG_SECURITY_ROOTPLUG is not set
+# CONFIG_SECURITY_TOMOYO is not set
-CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
 CONFIG_CRYPTO=y
 #
@@ -1385,6 +1506,7 @@ CONFIG_CRYPTO=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 #
@@ -1392,20 +1514,24 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
-# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC_ITU_T=y
 CONFIG_CRC32=y
-# CONFIG_CRC7 is not set
+CONFIG_CRC7=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
-CONFIG_PLIST=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_DECOMPRESS_LZMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/CM-BF533_defconfig b/arch/blackfin/configs/CM-BF533_defconfig
index ae665b93b875..df56639ab2f2 100644
--- a/arch/blackfin/configs/CM-BF533_defconfig
+++ b/arch/blackfin/configs/CM-BF533_defconfig
@@ -1,94 +1,110 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.22.16
+# Linux kernel version: 2.6.30.5
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
-CONFIG_SEMAPHORE_SLEEPERS=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
-CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 #
-# Code maturity level options
+# General setup
 #
 CONFIG_EXPERIMENTAL=y
 CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
-#
-# General setup
-#
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+# CONFIG_KERNEL_GZIP is not set
+# CONFIG_KERNEL_BZIP2 is not set
+CONFIG_KERNEL_LZMA=y
 CONFIG_SYSVIPC=y
-# CONFIG_IPC_NS is not set
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
-# CONFIG_UTS_NS is not set
 # CONFIG_AUDIT is not set
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
-# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_NAMESPACES is not set
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_BLK_DEV_INITRD=y
-# CONFIG_SYSCTL is not set
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_RD_GZIP is not set
+# CONFIG_RD_BZIP2 is not set
+CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 # CONFIG_UID16 is not set
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
-# CONFIG_HOTPLUG is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
+CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
+CONFIG_COMPAT_BRK=y
-# CONFIG_NP2 is not set
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
-CONFIG_RT_MUTEXES=y
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
-CONFIG_TINY_SHMEM=y
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_SLOW_WORK is not set
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
 CONFIG_BASE_SMALL=0
-#
-# Loadable module support
-#
 CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_LOAD is not set
-# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODULE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-#
-# Block layer
-#
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
 #
 # IO Schedulers
@@ -96,7 +112,7 @@ CONFIG_BLOCK=y
 CONFIG_IOSCHED_NOOP=y
 # CONFIG_IOSCHED_AS is not set
 # CONFIG_IOSCHED_DEADLINE is not set
-CONFIG_IOSCHED_CFQ=y
+# CONFIG_IOSCHED_CFQ is not set
 # CONFIG_DEFAULT_AS is not set
 # CONFIG_DEFAULT_DEADLINE is not set
 # CONFIG_DEFAULT_CFQ is not set
@@ -105,6 +121,7 @@ CONFIG_DEFAULT_IOSCHED="noop"
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
+# CONFIG_FREEZER is not set
 #
 # Blackfin Processor Options
@@ -113,6 +130,10 @@ CONFIG_PREEMPT_NONE=y
 #
 # Processor and Board Settings
 #
+# CONFIG_BF512 is not set
+# CONFIG_BF514 is not set
+# CONFIG_BF516 is not set
+# CONFIG_BF518 is not set
 # CONFIG_BF522 is not set
 # CONFIG_BF523 is not set
 # CONFIG_BF524 is not set
@@ -125,28 +146,38 @@ CONFIG_BF533=y
 # CONFIG_BF534 is not set
 # CONFIG_BF536 is not set
 # CONFIG_BF537 is not set
+# CONFIG_BF538 is not set
+# CONFIG_BF539 is not set
 # CONFIG_BF542 is not set
+# CONFIG_BF542M is not set
 # CONFIG_BF544 is not set
+# CONFIG_BF544M is not set
 # CONFIG_BF547 is not set
+# CONFIG_BF547M is not set
 # CONFIG_BF548 is not set
+# CONFIG_BF548M is not set
 # CONFIG_BF549 is not set
+# CONFIG_BF549M is not set
 # CONFIG_BF561 is not set
+CONFIG_BF_REV_MIN=3
+CONFIG_BF_REV_MAX=6
 # CONFIG_BF_REV_0_0 is not set
 # CONFIG_BF_REV_0_1 is not set
 # CONFIG_BF_REV_0_2 is not set
 CONFIG_BF_REV_0_3=y
 # CONFIG_BF_REV_0_4 is not set
 # CONFIG_BF_REV_0_5 is not set
+# CONFIG_BF_REV_0_6 is not set
 # CONFIG_BF_REV_ANY is not set
 # CONFIG_BF_REV_NONE is not set
 CONFIG_BF53x=y
-CONFIG_BFIN_SINGLE_CORE=y
 CONFIG_MEM_MT48LC16M16A2TG_75=y
 # CONFIG_BFIN533_EZKIT is not set
 # CONFIG_BFIN533_STAMP is not set
+# CONFIG_BLACKSTAMP is not set
 CONFIG_BFIN533_BLUETECHNIX_CM=y
 # CONFIG_H8606_HVSISTEMAS is not set
-# CONFIG_GENERIC_BF533_BOARD is not set
+# CONFIG_BFIN532_IP0X is not set
 #
 # BF533/2/1 Specific Configuration
@@ -188,6 +219,7 @@ CONFIG_WDTIMER=13
 # Board customizations
 #
 # CONFIG_CMDLINE_BOOL is not set
+CONFIG_BOOT_LOAD=0x1000
 #
 # Clock/PLL Setup
@@ -207,13 +239,20 @@ CONFIG_HZ_250=y
 # CONFIG_HZ_300 is not set
 # CONFIG_HZ_1000 is not set
 CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
+# CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 #
-# Memory Setup
+# Misc
 #
-CONFIG_MAX_MEM_SIZE=32
-CONFIG_MEM_ADD_WIDTH=9
-CONFIG_BOOT_LOAD=0x1000
 CONFIG_BFIN_SCRATCH_REG_RETN=y
 # CONFIG_BFIN_SCRATCH_REG_RETE is not set
 # CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
@@ -240,6 +279,12 @@ CONFIG_IP_CHECKSUM_L1=y
 CONFIG_CACHELINE_ALIGNED_L1=y
 CONFIG_SYSCALL_TAB_L1=y
 CONFIG_CPLB_SWITCH_TAB_L1=y
+CONFIG_APP_STACK_L1=y
+#
+# Speed Optimizations
+#
+CONFIG_BFIN_INS_LOWOVERHEAD=y
 CONFIG_RAMKERNEL=y
 # CONFIG_ROMKERNEL is not set
 CONFIG_SELECT_MEMORY_MODEL=y
@@ -248,12 +293,16 @@ CONFIG_FLATMEM_MANUAL=y
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
-CONFIG_LARGE_ALLOCS=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 # CONFIG_BFIN_GPTIMERS is not set
+# CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
 # CONFIG_DMA_UNCACHED_NONE is not set
@@ -262,10 +311,9 @@ CONFIG_DMA_UNCACHED_1M=y
 # Cache Support
 #
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
 CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -276,7 +324,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 #
-# Asynchonous Memory Configuration
+# Asynchronous Memory Configuration
 #
 #
@@ -301,12 +349,8 @@ CONFIG_BANK_3=0xFFC2
 #
 # Bus options (PCI, PCMCIA, EISA, MCA, ISA)
 #
-# CONFIG_PCI is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
-#
-# PCCARD (PCMCIA/CardBus) support
-#
 #
 # Executable file formats
@@ -315,22 +359,19 @@ CONFIG_BINFMT_ELF_FDPIC=y
 CONFIG_BINFMT_FLAT=y
 CONFIG_BINFMT_ZFLAT=y
 CONFIG_BINFMT_SHARED_FLAT=y
+# CONFIG_HAVE_AOUT is not set
 # CONFIG_BINFMT_MISC is not set
 #
 # Power management options
 #
 # CONFIG_PM is not set
-# CONFIG_PM_WAKEUP_BY_GPIO is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
 #
 # CPU Frequency scaling
 #
 # CONFIG_CPU_FREQ is not set
-#
-# Networking
-#
 CONFIG_NET=y
 #
@@ -339,45 +380,13 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
 # CONFIG_NET_KEY is not set
-CONFIG_INET=y
+# CONFIG_INET is not set
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_FIB_HASH=y
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_XFRM_TUNNEL is not set
-# CONFIG_INET_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_INET_TCP_DIAG=y
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_CUBIC=y
-CONFIG_DEFAULT_TCP_CONG="cubic"
-# CONFIG_TCP_MD5SIG is not set
-# CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
-# CONFIG_NETLABEL is not set
 # CONFIG_NETWORK_SECMARK is not set
 # CONFIG_NETFILTER is not set
-# CONFIG_IP_DCCP is not set
-# CONFIG_IP_SCTP is not set
-# CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 # CONFIG_LLC2 is not set
@@ -385,31 +394,23 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_ATALK is not set
 # CONFIG_X25 is not set
 # CONFIG_LAPB is not set
-# CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
-#
-# QoS and/or fair queueing
-#
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 #
 # Network testing
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
-# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
-#
-# Wireless
-#
-# CONFIG_CFG80211 is not set
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
 # CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
 #
 # Device Drivers
@@ -418,20 +419,22 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 #
 # Generic Driver Options
 #
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_SYS_HYPERVISOR is not set
-#
-# Connector - unified userspace <-> kernelspace linker
-#
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
 #
 # User Modules And Translation Layers
@@ -444,12 +447,15 @@ CONFIG_MTD_BLOCK=y
 # CONFIG_INFTL is not set
 # CONFIG_RFD_FTL is not set
 # CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
 #
 # RAM/ROM/Flash chip drivers
 #
-# CONFIG_MTD_CFI is not set
+CONFIG_MTD_CFI=y
 # CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
 CONFIG_MTD_MAP_BANK_WIDTH_1=y
 CONFIG_MTD_MAP_BANK_WIDTH_2=y
 CONFIG_MTD_MAP_BANK_WIDTH_4=y
@@ -460,6 +466,11 @@ CONFIG_MTD_CFI_I1=y
 CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_I4 is not set
 # CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+# CONFIG_MTD_PSD4256G is not set
+CONFIG_MTD_CFI_UTIL=y
 CONFIG_MTD_RAM=y
 # CONFIG_MTD_ROM is not set
 # CONFIG_MTD_ABSENT is not set
@@ -468,12 +479,16 @@ CONFIG_MTD_RAM=y
 # Mapping drivers for chip access
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_UCLINUX=y
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
 #
 # Self-contained MTD device drivers
 #
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -489,36 +504,25 @@ CONFIG_MTD_UCLINUX=y
 # CONFIG_MTD_ONENAND is not set
 #
-# UBI - Unsorted block images
+# LPDDR flash memory drivers
 #
-# CONFIG_MTD_UBI is not set
+# CONFIG_MTD_LPDDR is not set
 #
-# Parallel port support
+# UBI - Unsorted block images
 #
+# CONFIG_MTD_UBI is not set
 # CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
-#
-# Plug and Play support
-#
-# CONFIG_PNPACPI is not set
-#
-# Block devices
-#
 # CONFIG_BLK_DEV_COW_COMMON is not set
 # CONFIG_BLK_DEV_LOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
+# CONFIG_BLK_DEV_RAM is not set
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
-#
+# CONFIG_MISC_DEVICES is not set
-# Misc devices
+CONFIG_HAVE_IDE=y
-#
 # CONFIG_IDE is not set
 #
@@ -526,34 +530,19 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
 #
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
 # CONFIG_SCSI_NETLINK is not set
 # CONFIG_ATA is not set
-#
-# Multi-device support (RAID and LVM)
-#
 # CONFIG_MD is not set
-#
-# Network device support
-#
 CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
 # CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
-# CONFIG_PHYLIB is not set
+# CONFIG_VETH is not set
+# CONFIG_NET_ETHERNET is not set
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-CONFIG_SMC91X=y
-# CONFIG_SMSC911X is not set
-# CONFIG_DM9000 is not set
 # CONFIG_NETDEV_1000 is not set
-# CONFIG_AX88180 is not set
 # CONFIG_NETDEV_10000 is not set
 #
@@ -561,22 +550,17 @@ CONFIG_SMC91X=y
 #
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
 # CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
-#
-# ISDN subsystem
-#
 # CONFIG_ISDN is not set
-#
-# Telephony Support
-#
 # CONFIG_PHONE is not set
 #
@@ -593,16 +577,15 @@ CONFIG_SMC91X=y
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
+# CONFIG_BFIN_DMA_INTERFACE is not set
-# CONFIG_SPI_ADC_BF533 is not set
+# CONFIG_BFIN_PPI is not set
-# CONFIG_BF5xx_PFLAGS is not set
+# CONFIG_BFIN_PPIFCD is not set
-# CONFIG_BF5xx_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-# CONFIG_BF5xx_PPI is not set
+# CONFIG_BFIN_SPI_ADC is not set
-CONFIG_BFIN_SPORT=y
+# CONFIG_BFIN_SPORT is not set
-# CONFIG_BFIN_TIMER_LATENCY is not set
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
+# CONFIG_BFIN_JTAG_COMM is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
 #
@@ -613,6 +596,7 @@ CONFIG_BFIN_SPORT=y
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
 CONFIG_SERIAL_BFIN_DMA=y
@@ -623,176 +607,141 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
 #
 # CAN, the car bus and industrial fieldbus
 #
 # CONFIG_CAN4LINUX is not set
-#
-# IPMI
-#
 # CONFIG_IPMI_HANDLER is not set
-# CONFIG_WATCHDOG is not set
 # CONFIG_HW_RANDOM is not set
-# CONFIG_GEN_RTC is not set
 # CONFIG_R3964 is not set
 # CONFIG_RAW_DRIVER is not set
-#
-# TPM devices
-#
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
+CONFIG_SPI=y
-CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_SPI_MASTER=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_SYSFS=y
 #
-# SPI support
+# SPI Master Controller Drivers
 #
-# CONFIG_SPI is not set
+CONFIG_SPI_BFIN=y
-# CONFIG_SPI_MASTER is not set
+# CONFIG_SPI_BFIN_LOCK is not set
+# CONFIG_SPI_BFIN_SPORT is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 #
-# Dallas's 1-wire bus
+# SPI Protocol Masters
 #
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+# CONFIG_GPIOLIB is not set
 # CONFIG_W1 is not set
-CONFIG_HWMON=y
+# CONFIG_POWER_SUPPLY is not set
-# CONFIG_HWMON_VID is not set
+# CONFIG_HWMON is not set
-# CONFIG_SENSORS_ABITUGURU is not set
+# CONFIG_THERMAL is not set
-# CONFIG_SENSORS_F71805F is not set
+# CONFIG_THERMAL_HWMON is not set
-# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_WATCHDOG is not set
-# CONFIG_SENSORS_SMSC47M1 is not set
+CONFIG_SSB_POSSIBLE=y
-# CONFIG_SENSORS_SMSC47B397 is not set
-# CONFIG_SENSORS_VT1211 is not set
+#
-# CONFIG_SENSORS_W83627HF is not set
+# Sonics Silicon Backplane
-# CONFIG_HWMON_DEBUG_CHIP is not set
+#
+# CONFIG_SSB is not set
 #
 # Multifunction device drivers
 #
+# CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
 #
 # Multimedia devices
 #
+#
+# Multimedia core support
+#
 # CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
-# CONFIG_DAB is not set
 #
-# Graphics support
+# Multimedia drivers
 #
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+# CONFIG_DAB is not set
 #
-# Display device support
+# Graphics support
 #
-# CONFIG_DISPLAY_SUPPORT is not set
 # CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
 # CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 #
-# Sound
+# Display device support
 #
+# CONFIG_DISPLAY_SUPPORT is not set
 # CONFIG_SOUND is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
 #
-# USB support
+# MMC/SD/SDIO Card Drivers
 #
-CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_MMC_BLOCK=y
-# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_MMC_BLOCK_BOUNCE is not set
-# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_SDIO_UART is not set
-# CONFIG_USB is not set
+# CONFIG_MMC_TEST is not set
 #
-# Enable Host or Gadget support to see Inventra options
+# MMC/SD/SDIO Host Controller Drivers
-#
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-#
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-# CONFIG_MMC is not set
-#
-# LED devices
 #
+# CONFIG_MMC_SDHCI is not set
+CONFIG_MMC_SPI=m
+# CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
-#
-# LED drivers
-#
-#
-# LED Triggers
-#
-#
-# InfiniBand support
-#
-#
-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
-#
-#
-# Real Time Clock
-#
 # CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
-#
+# CONFIG_AUXDISPLAY is not set
-# DMA Engine support
+# CONFIG_UIO is not set
-#
+# CONFIG_STAGING is not set
-# CONFIG_DMA_ENGINE is not set
-#
-# DMA Clients
-#
-#
-# DMA Devices
-#
-#
-# PBX support
-#
-# CONFIG_PBX is not set
 #
 # File systems
 #
-CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS is not set
-CONFIG_EXT2_FS_XATTR=y
-# CONFIG_EXT2_FS_POSIX_ACL is not set
-# CONFIG_EXT2_FS_SECURITY is not set
 # CONFIG_EXT3_FS is not set
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
-CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
+# CONFIG_BTRFS_FS is not set
-# CONFIG_ROMFS_FS is not set
+CONFIG_FILE_LOCKING=y
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-# CONFIG_QUOTA is not set
 # CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_FUSE_FS is not set
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -801,8 +750,11 @@ CONFIG_INOTIFY_USER=y
 #
 # DOS/FAT/NT Filesystems
 #
+CONFIG_FAT_FS=y
 # CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 # CONFIG_NTFS_FS is not set
 #
@@ -813,12 +765,8 @@ CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
 # CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
 # CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
-#
-# Miscellaneous filesystems
-#
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -826,60 +774,106 @@ CONFIG_RAMFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-# CONFIG_YAFFS_FS is not set
 # CONFIG_JFFS2_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
-#
+# CONFIG_NETWORK_FILESYSTEMS is not set
-# Network File Systems
-#
-# CONFIG_NFS_FS is not set
-# CONFIG_NFSD is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
 #
 # Partition Types
 #
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
-#
+CONFIG_NLS_DEFAULT="iso8859-1"
-# Native Language Support
+CONFIG_NLS_CODEPAGE_437=y
-#
+# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
-#
+# CONFIG_NLS_CODEPAGE_852 is not set
-# Distributed Lock Manager
+# CONFIG_NLS_CODEPAGE_855 is not set
-#
+# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_DLM is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
-#
+# CONFIG_NLS_CODEPAGE_862 is not set
-# Profiling support
+# CONFIG_NLS_CODEPAGE_863 is not set
-#
+# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_PROFILING is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
 #
 # Kernel hacking
 #
 # CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
 # CONFIG_DEBUG_KERNEL is not set
-CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_DEBUG_VERBOSE=y
 CONFIG_DEBUG_MMRS=y
+# CONFIG_DEBUG_DOUBLEFAULT is not set
 CONFIG_DEBUG_HUNT_FOR_ZERO=y
 CONFIG_DEBUG_BFIN_HWTRACE_ON=y
 CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
@@ -888,34 +882,39 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
 CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
 # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
 # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
-# CONFIG_EARLY_PRINTK is not set
+CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 #
 # Security options
 #
 # CONFIG_KEYS is not set
 CONFIG_SECURITY=y
+# CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_NETWORK is not set
-CONFIG_SECURITY_CAPABILITIES=y
+# CONFIG_SECURITY_PATH is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
-#
+# CONFIG_SECURITY_TOMOYO is not set
-# Cryptographic options
-#
 # CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
-CONFIG_CRC_CCITT=m
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
 # CONFIG_CRC16 is not set
-# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=y
 CONFIG_CRC32=y
+CONFIG_CRC7=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
-CONFIG_PLIST=y
+CONFIG_DECOMPRESS_LZMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/CM-BF537E_defconfig b/arch/blackfin/configs/CM-BF537E_defconfig
index d74b6f4db35d..22e565c51d66 100644
--- a/arch/blackfin/configs/CM-BF537E_defconfig
+++ b/arch/blackfin/configs/CM-BF537E_defconfig
@@ -1,13 +1,13 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.10
+# Linux kernel version: 2.6.30.5
-# Wed Jun  3 06:27:41 2009
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
@@ -16,6 +16,9 @@ CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 #
@@ -26,21 +29,40 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+# CONFIG_KERNEL_GZIP is not set
+# CONFIG_KERNEL_BZIP2 is not set
+CONFIG_KERNEL_LZMA=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
-# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_RD_GZIP is not set
+# CONFIG_RD_BZIP2 is not set
+CONFIG_RD_LZMA=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -49,7 +71,8 @@ CONFIG_EMBEDDED=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
-# CONFIG_HOTPLUG is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
@@ -65,12 +88,13 @@ CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
+# CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -78,11 +102,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
@@ -98,7 +119,6 @@ CONFIG_IOSCHED_CFQ=y
 # CONFIG_DEFAULT_CFQ is not set
 CONFIG_DEFAULT_NOOP=y
 CONFIG_DEFAULT_IOSCHED="noop"
-CONFIG_CLASSIC_RCU=y
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
@@ -181,7 +201,8 @@ CONFIG_IRQ_MEM_DMA1=13
 CONFIG_IRQ_WATCH=13
 CONFIG_IRQ_SPI=10
 # CONFIG_BFIN537_STAMP is not set
-CONFIG_BFIN537_BLUETECHNIX_CM=y
+CONFIG_BFIN537_BLUETECHNIX_CM_E=y
+# CONFIG_BFIN537_BLUETECHNIX_CM_U is not set
 # CONFIG_BFIN537_BLUETECHNIX_TCM is not set
 # CONFIG_PNAV10 is not set
 # CONFIG_CAMSIG_MINOTAUR is not set
@@ -283,10 +304,12 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 # CONFIG_BFIN_GPTIMERS is not set
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
@@ -297,10 +320,9 @@ CONFIG_DMA_UNCACHED_1M=y
 # Cache Support
 #
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
 CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -311,7 +333,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 #
-# Asynchonous Memory Configuration
+# Asynchronous Memory Configuration
 #
 #
@@ -337,6 +359,7 @@ CONFIG_BANK_3=0xFFC2
 # Bus options (PCI, PCMCIA, EISA, MCA, ISA)
 #
 # CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
 #
 # Executable file formats
@@ -366,11 +389,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
-# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -394,7 +412,6 @@ CONFIG_IP_PNP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
-CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -418,7 +435,9 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 #
 # Network testing
@@ -429,8 +448,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
 # CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -441,16 +460,21 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 #
 # Generic Driver Options
 #
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AR7_PARTS is not set
 #
@@ -486,22 +510,26 @@ CONFIG_MTD_CFI_I2=y
 CONFIG_MTD_CFI_INTELEXT=y
 # CONFIG_MTD_CFI_AMDSTD is not set
 # CONFIG_MTD_CFI_STAA is not set
+# CONFIG_MTD_PSD4256G is not set
 CONFIG_MTD_CFI_UTIL=y
 CONFIG_MTD_RAM=y
-# CONFIG_MTD_ROM is not set
+CONFIG_MTD_ROM=m
 # CONFIG_MTD_ABSENT is not set
 #
 # Mapping drivers for chip access
 #
 CONFIG_MTD_COMPLEX_MAPPINGS=y
+# CONFIG_MTD_PHYSMAP is not set
 CONFIG_MTD_GPIO_ADDR=y
-CONFIG_MTD_UCLINUX=y
+# CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
 #
 # Self-contained MTD device drivers
 #
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -517,6 +545,11 @@ CONFIG_MTD_UCLINUX=y
 # CONFIG_MTD_ONENAND is not set
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -533,9 +566,14 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_ATA_OVER_ETH is not set
 # CONFIG_BLK_DEV_HD is not set
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_C2PORT is not set
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
@@ -549,6 +587,7 @@ CONFIG_HAVE_IDE=y
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
 CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
 # CONFIG_MACVLAN is not set
@@ -570,6 +609,9 @@ CONFIG_PHYLIB=y
 # CONFIG_BROADCOM_PHY is not set
 # CONFIG_ICPLUS_PHY is not set
 # CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
 # CONFIG_FIXED_PHY is not set
 # CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
@@ -580,8 +622,11 @@ CONFIG_BFIN_TX_DESC_NUM=10
 CONFIG_BFIN_RX_DESC_NUM=20
 # CONFIG_BFIN_MAC_RMII is not set
 # CONFIG_SMC91X is not set
-# CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -598,7 +643,10 @@ CONFIG_BFIN_RX_DESC_NUM=20
 #
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
@@ -622,15 +670,12 @@ CONFIG_BFIN_RX_DESC_NUM=20
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
 CONFIG_BFIN_DMA_INTERFACE=m
 # CONFIG_BFIN_PPI is not set
 # CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
 # CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=y
-# CONFIG_BFIN_TIMER_LATENCY is not set
-# CONFIG_SIMPLE_GPIO is not set
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
 # CONFIG_BFIN_JTAG_COMM is not set
@@ -644,6 +689,7 @@ CONFIG_BFIN_SPORT=y
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
 CONFIG_SERIAL_BFIN_DMA=y
@@ -656,6 +702,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
 #
@@ -668,7 +715,23 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
-# CONFIG_SPI is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BFIN=y
+# CONFIG_SPI_BFIN_LOCK is not set
+# CONFIG_SPI_BFIN_SPORT is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 CONFIG_GPIOLIB=y
 CONFIG_GPIO_SYSFS=y
@@ -688,15 +751,21 @@ CONFIG_GPIO_SYSFS=y
 #
 # SPI GPIO expanders:
 #
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_ADCXX is not set
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_MAX1111 is not set
 # CONFIG_SENSORS_PC87360 is not set
 # CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SHT15 is not set
 # CONFIG_SENSORS_SMSC47M1 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_VT1211 is not set
@@ -758,21 +827,74 @@ CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB is not set
 # CONFIG_USB_OTG_WHITELIST is not set
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
-#
-# Enable Host or Gadget support to see Inventra options
+#
-#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
-#
+CONFIG_USB_GADGET=m
-# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
-#
+# CONFIG_USB_GADGET_DEBUG_FS is not set
-# CONFIG_USB_GADGET is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
-# CONFIG_MMC is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+CONFIG_USB_GADGET_NET2272=y
+CONFIG_USB_NET2272=m
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+# CONFIG_MMC_BLOCK_BOUNCE is not set
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+CONFIG_MMC_SPI=m
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_RTC_CLASS is not set
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
 # CONFIG_STAGING is not set
@@ -789,9 +911,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_FILE_LOCKING=y
 # CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -801,6 +924,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -809,8 +937,11 @@ CONFIG_INOTIFY_USER=y
 #
 # DOS/FAT/NT Filesystems
 #
-# CONFIG_MSDOS_FS is not set
+CONFIG_FAT_FS=y
-# CONFIG_VFAT_FS is not set
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 # CONFIG_NTFS_FS is not set
 #
@@ -822,10 +953,7 @@ CONFIG_SYSFS=y
 # CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
-#
-# Miscellaneous filesystems
-#
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -833,9 +961,19 @@ CONFIG_SYSFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-# CONFIG_JFFS2_FS is not set
+CONFIG_JFFS2_FS=y
-# CONFIG_YAFFS_FS is not set
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -844,14 +982,70 @@ CONFIG_SYSFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NETWORK_FILESYSTEMS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=m
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=m
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=m
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
 #
 # Partition Types
 #
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
-# CONFIG_NLS is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
 # CONFIG_DLM is not set
 #
@@ -867,14 +1061,28 @@ CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_SECTION_MISMATCH=y
 # CONFIG_DEBUG_KERNEL is not set
-CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
 #
 # Tracers
 #
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_DEBUG_VERBOSE=y
@@ -888,9 +1096,10 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
 CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
 # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
 # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
-# CONFIG_EARLY_PRINTK is not set
+CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 #
 # Security options
@@ -899,8 +1108,9 @@ CONFIG_ACCESS_CHECK=y
 CONFIG_SECURITY=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_NETWORK is not set
+# CONFIG_SECURITY_PATH is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
-CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
+# CONFIG_SECURITY_TOMOYO is not set
 CONFIG_CRYPTO=y
 #
@@ -979,6 +1189,7 @@ CONFIG_CRYPTO=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 #
@@ -986,19 +1197,24 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
-# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC_ITU_T=y
 CONFIG_CRC32=y
-# CONFIG_CRC7 is not set
+CONFIG_CRC7=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_DECOMPRESS_LZMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/CM-BF537U_defconfig b/arch/blackfin/configs/CM-BF537U_defconfig
index 7fc8dfa1719f..efcc90d2f345 100644
--- a/arch/blackfin/configs/CM-BF537U_defconfig
+++ b/arch/blackfin/configs/CM-BF537U_defconfig
@@ -1,94 +1,111 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.22.16
+# Linux kernel version: 2.6.30.5
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
-CONFIG_SEMAPHORE_SLEEPERS=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
-CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 #
-# Code maturity level options
+# General setup
 #
 CONFIG_EXPERIMENTAL=y
 CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
-#
-# General setup
-#
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+# CONFIG_KERNEL_GZIP is not set
+# CONFIG_KERNEL_BZIP2 is not set
+CONFIG_KERNEL_LZMA=y
 CONFIG_SYSVIPC=y
-# CONFIG_IPC_NS is not set
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
-# CONFIG_UTS_NS is not set
 # CONFIG_AUDIT is not set
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
-# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_RD_GZIP is not set
+# CONFIG_RD_BZIP2 is not set
+CONFIG_RD_LZMA=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SYSCTL is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 # CONFIG_UID16 is not set
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
-# CONFIG_HOTPLUG is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
+CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
+CONFIG_COMPAT_BRK=y
-# CONFIG_NP2 is not set
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
-CONFIG_RT_MUTEXES=y
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
-CONFIG_TINY_SHMEM=y
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_SLOW_WORK is not set
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
 CONFIG_BASE_SMALL=0
-#
-# Loadable module support
-#
 CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-#
-# Block layer
-#
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
 #
 # IO Schedulers
@@ -105,6 +122,7 @@ CONFIG_DEFAULT_IOSCHED="noop"
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
+# CONFIG_FREEZER is not set
 #
 # Blackfin Processor Options
@@ -113,6 +131,10 @@ CONFIG_PREEMPT_NONE=y
 #
 # Processor and Board Settings
 #
+# CONFIG_BF512 is not set
+# CONFIG_BF514 is not set
+# CONFIG_BF516 is not set
+# CONFIG_BF518 is not set
 # CONFIG_BF522 is not set
 # CONFIG_BF523 is not set
 # CONFIG_BF524 is not set
@@ -125,22 +147,31 @@ CONFIG_PREEMPT_NONE=y
 # CONFIG_BF534 is not set
 # CONFIG_BF536 is not set
 CONFIG_BF537=y
+# CONFIG_BF538 is not set
+# CONFIG_BF539 is not set
 # CONFIG_BF542 is not set
+# CONFIG_BF542M is not set
 # CONFIG_BF544 is not set
+# CONFIG_BF544M is not set
 # CONFIG_BF547 is not set
+# CONFIG_BF547M is not set
 # CONFIG_BF548 is not set
+# CONFIG_BF548M is not set
 # CONFIG_BF549 is not set
+# CONFIG_BF549M is not set
 # CONFIG_BF561 is not set
+CONFIG_BF_REV_MIN=2
+CONFIG_BF_REV_MAX=3
 # CONFIG_BF_REV_0_0 is not set
 # CONFIG_BF_REV_0_1 is not set
 CONFIG_BF_REV_0_2=y
 # CONFIG_BF_REV_0_3 is not set
 # CONFIG_BF_REV_0_4 is not set
 # CONFIG_BF_REV_0_5 is not set
+# CONFIG_BF_REV_0_6 is not set
 # CONFIG_BF_REV_ANY is not set
 # CONFIG_BF_REV_NONE is not set
 CONFIG_BF53x=y
-CONFIG_BFIN_SINGLE_CORE=y
 CONFIG_MEM_MT48LC16M16A2TG_75=y
 CONFIG_IRQ_PLL_WAKEUP=7
 CONFIG_IRQ_RTC=8
@@ -150,7 +181,6 @@ CONFIG_IRQ_SPORT0_TX=9
 CONFIG_IRQ_SPORT1_RX=9
 CONFIG_IRQ_SPORT1_TX=9
 CONFIG_IRQ_TWI=10
-CONFIG_IRQ_SPI=10
 CONFIG_IRQ_UART0_RX=10
 CONFIG_IRQ_UART0_TX=10
 CONFIG_IRQ_UART1_RX=10
@@ -169,11 +199,13 @@ CONFIG_IRQ_PORTG_INTB=12
 CONFIG_IRQ_MEM_DMA0=13
 CONFIG_IRQ_MEM_DMA1=13
 CONFIG_IRQ_WATCH=13
+CONFIG_IRQ_SPI=10
 # CONFIG_BFIN537_STAMP is not set
-CONFIG_BFIN537_BLUETECHNIX_CM=y
+# CONFIG_BFIN537_BLUETECHNIX_CM_E is not set
+CONFIG_BFIN537_BLUETECHNIX_CM_U=y
+# CONFIG_BFIN537_BLUETECHNIX_TCM is not set
 # CONFIG_PNAV10 is not set
 # CONFIG_CAMSIG_MINOTAUR is not set
-# CONFIG_GENERIC_BF537_BOARD is not set
 #
 # BF537 Specific Configuration
@@ -196,6 +228,7 @@ CONFIG_IRQ_PROG_INTA=12
 # Board customizations
 #
 # CONFIG_CMDLINE_BOOL is not set
+CONFIG_BOOT_LOAD=0x1000
 #
 # Clock/PLL Setup
@@ -215,13 +248,20 @@ CONFIG_HZ_250=y
 # CONFIG_HZ_300 is not set
 # CONFIG_HZ_1000 is not set
 CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
+# CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 #
-# Memory Setup
+# Misc
 #
-CONFIG_MAX_MEM_SIZE=32
-CONFIG_MEM_ADD_WIDTH=9
-CONFIG_BOOT_LOAD=0x1000
 CONFIG_BFIN_SCRATCH_REG_RETN=y
 # CONFIG_BFIN_SCRATCH_REG_RETE is not set
 # CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
@@ -248,6 +288,12 @@ CONFIG_IP_CHECKSUM_L1=y
 CONFIG_CACHELINE_ALIGNED_L1=y
 CONFIG_SYSCALL_TAB_L1=y
 CONFIG_CPLB_SWITCH_TAB_L1=y
+CONFIG_APP_STACK_L1=y
+#
+# Speed Optimizations
+#
+CONFIG_BFIN_INS_LOWOVERHEAD=y
 CONFIG_RAMKERNEL=y
 # CONFIG_ROMKERNEL is not set
 CONFIG_SELECT_MEMORY_MODEL=y
@@ -256,12 +302,16 @@ CONFIG_FLATMEM_MANUAL=y
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
-CONFIG_LARGE_ALLOCS=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 # CONFIG_BFIN_GPTIMERS is not set
+# CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
 # CONFIG_DMA_UNCACHED_NONE is not set
@@ -270,10 +320,9 @@ CONFIG_DMA_UNCACHED_1M=y
 # Cache Support
 #
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
 CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -284,7 +333,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 #
-# Asynchonous Memory Configuration
+# Asynchronous Memory Configuration
 #
 #
@@ -309,12 +358,8 @@ CONFIG_BANK_3=0xFFC2
 #
 # Bus options (PCI, PCMCIA, EISA, MCA, ISA)
 #
-# CONFIG_PCI is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
-#
-# PCCARD (PCMCIA/CardBus) support
-#
 #
 # Executable file formats
@@ -323,22 +368,19 @@ CONFIG_BINFMT_ELF_FDPIC=y
 CONFIG_BINFMT_FLAT=y
 CONFIG_BINFMT_ZFLAT=y
 CONFIG_BINFMT_SHARED_FLAT=y
+# CONFIG_HAVE_AOUT is not set
 # CONFIG_BINFMT_MISC is not set
 #
 # Power management options
 #
 # CONFIG_PM is not set
-# CONFIG_PM_WAKEUP_BY_GPIO is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
 #
 # CPU Frequency scaling
 #
 # CONFIG_CPU_FREQ is not set
-#
-# Networking
-#
 CONFIG_NET=y
 #
@@ -347,10 +389,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -369,15 +407,13 @@ CONFIG_IP_FIB_HASH=y
 # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
 # CONFIG_INET_XFRM_MODE_TUNNEL is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_LRO=y
 # CONFIG_INET_DIAG is not set
-CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_TCP_MD5SIG is not set
 # CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
 # CONFIG_NETLABEL is not set
 # CONFIG_NETWORK_SECMARK is not set
 # CONFIG_NETFILTER is not set
@@ -386,6 +422,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 # CONFIG_LLC2 is not set
@@ -395,29 +432,23 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
-#
-# QoS and/or fair queueing
-#
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 #
 # Network testing
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
-#
+# CONFIG_WIMAX is not set
-# Wireless
-#
-# CONFIG_CFG80211 is not set
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
 # CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
 #
 # Device Drivers
@@ -426,20 +457,22 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 #
 # Generic Driver Options
 #
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_SYS_HYPERVISOR is not set
-#
-# Connector - unified userspace <-> kernelspace linker
-#
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
 #
 # User Modules And Translation Layers
@@ -452,12 +485,15 @@ CONFIG_MTD_BLOCK=y
 # CONFIG_INFTL is not set
 # CONFIG_RFD_FTL is not set
 # CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
 #
 # RAM/ROM/Flash chip drivers
 #
-# CONFIG_MTD_CFI is not set
+CONFIG_MTD_CFI=y
 # CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
 CONFIG_MTD_MAP_BANK_WIDTH_1=y
 CONFIG_MTD_MAP_BANK_WIDTH_2=y
 CONFIG_MTD_MAP_BANK_WIDTH_4=y
@@ -468,20 +504,29 @@ CONFIG_MTD_CFI_I1=y
 CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_I4 is not set
 # CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+# CONFIG_MTD_PSD4256G is not set
+CONFIG_MTD_CFI_UTIL=y
 CONFIG_MTD_RAM=y
-# CONFIG_MTD_ROM is not set
+CONFIG_MTD_ROM=m
 # CONFIG_MTD_ABSENT is not set
 #
 # Mapping drivers for chip access
 #
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_UCLINUX=y
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_GPIO_ADDR=y
+# CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
 #
 # Self-contained MTD device drivers
 #
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -497,36 +542,36 @@ CONFIG_MTD_UCLINUX=y
 # CONFIG_MTD_ONENAND is not set
 #
-# UBI - Unsorted block images
+# LPDDR flash memory drivers
 #
-# CONFIG_MTD_UBI is not set
+# CONFIG_MTD_LPDDR is not set
 #
-# Parallel port support
+# UBI - Unsorted block images
 #
+# CONFIG_MTD_UBI is not set
 # CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
-#
-# Plug and Play support
-#
-# CONFIG_PNPACPI is not set
-#
-# Block devices
-#
 # CONFIG_BLK_DEV_COW_COMMON is not set
 # CONFIG_BLK_DEV_LOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_BLK_DEV_XIP is not set
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_C2PORT is not set
 #
-# Misc devices
+# EEPROM support
 #
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 #
@@ -534,35 +579,20 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
 #
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
 # CONFIG_SCSI_NETLINK is not set
 # CONFIG_ATA is not set
-#
-# Multi-device support (RAID and LVM)
-#
 # CONFIG_MD is not set
-#
-# Network device support
-#
 CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
-# CONFIG_PHYLIB is not set
+# CONFIG_VETH is not set
+# CONFIG_NET_ETHERNET is not set
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-CONFIG_SMC91X=y
-# CONFIG_BFIN_MAC is not set
-# CONFIG_SMSC911X is not set
-# CONFIG_DM9000 is not set
 # CONFIG_NETDEV_1000 is not set
-# CONFIG_AX88180 is not set
 # CONFIG_NETDEV_10000 is not set
 #
@@ -570,22 +600,17 @@ CONFIG_SMC91X=y
 #
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
 # CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
-#
-# ISDN subsystem
-#
 # CONFIG_ISDN is not set
-#
-# Telephony Support
-#
 # CONFIG_PHONE is not set
 #
@@ -602,16 +627,15 @@ CONFIG_SMC91X=y
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
+CONFIG_BFIN_DMA_INTERFACE=m
-# CONFIG_SPI_ADC_BF533 is not set
+# CONFIG_BFIN_PPI is not set
-# CONFIG_BF5xx_PFLAGS is not set
+# CONFIG_BFIN_PPIFCD is not set
-# CONFIG_BF5xx_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-# CONFIG_BF5xx_PPI is not set
+# CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=y
-# CONFIG_BFIN_TIMER_LATENCY is not set
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
+# CONFIG_BFIN_JTAG_COMM is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
 #
@@ -622,6 +646,7 @@ CONFIG_BFIN_SPORT=y
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
 CONFIG_SERIAL_BFIN_DMA=y
@@ -634,165 +659,201 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
 #
 # CAN, the car bus and industrial fieldbus
 #
 # CONFIG_CAN4LINUX is not set
-#
-# IPMI
-#
 # CONFIG_IPMI_HANDLER is not set
-# CONFIG_WATCHDOG is not set
 # CONFIG_HW_RANDOM is not set
-# CONFIG_GEN_RTC is not set
 # CONFIG_R3964 is not set
 # CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
 #
-# TPM devices
+# SPI Master Controller Drivers
 #
-# CONFIG_TCG_TPM is not set
+CONFIG_SPI_BFIN=y
-# CONFIG_I2C is not set
+# CONFIG_SPI_BFIN_LOCK is not set
+# CONFIG_SPI_BFIN_SPORT is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 CONFIG_GPIOLIB=y
 CONFIG_GPIO_SYSFS=y
 #
-# SPI support
+# Memory mapped GPIO expanders:
+#
+#
+# I2C GPIO expanders:
 #
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
 #
-# Dallas's 1-wire bus
+# PCI GPIO expanders:
 #
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
 # CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
-# CONFIG_SENSORS_ABITUGURU is not set
+# CONFIG_SENSORS_ADCXX is not set
 # CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_PC87360 is not set
 # CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SHT15 is not set
 # CONFIG_SENSORS_SMSC47M1 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
 # CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
 #
 # Multifunction device drivers
 #
+# CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
 #
 # Multimedia devices
 #
+#
+# Multimedia core support
+#
 # CONFIG_VIDEO_DEV is not set
 # CONFIG_DVB_CORE is not set
-# CONFIG_DAB is not set
+# CONFIG_VIDEO_MEDIA is not set
 #
-# Graphics support
+# Multimedia drivers
 #
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+# CONFIG_DAB is not set
 #
-# Display device support
+# Graphics support
 #
-# CONFIG_DISPLAY_SUPPORT is not set
 # CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
 # CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 #
-# Sound
+# Display device support
 #
+# CONFIG_DISPLAY_SUPPORT is not set
 # CONFIG_SOUND is not set
+CONFIG_USB_SUPPORT=y
-#
-# USB support
-#
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
 # CONFIG_USB_ARCH_HAS_EHCI is not set
 # CONFIG_USB is not set
-# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
 # CONFIG_USB_GADGET_MUSB_HDRC is not set
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
-#
-#
-# USB Gadget Support
 #
 CONFIG_USB_GADGET=y
 # CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
 CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
 # CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
 CONFIG_USB_GADGET_NET2272=y
 CONFIG_USB_NET2272=y
 # CONFIG_USB_GADGET_NET2280 is not set
-# CONFIG_USB_GADGET_PXA2XX is not set
 # CONFIG_USB_GADGET_GOKU is not set
-# CONFIG_USB_GADGET_LH7A40X is not set
-# CONFIG_USB_GADGET_OMAP is not set
-# CONFIG_USB_GADGET_AT91 is not set
 # CONFIG_USB_GADGET_DUMMY_HCD is not set
 CONFIG_USB_GADGET_DUALSPEED=y
 # CONFIG_USB_ZERO is not set
-# CONFIG_USB_ETH is not set
+# CONFIG_USB_AUDIO is not set
+CONFIG_USB_ETH=y
+CONFIG_USB_ETH_RNDIS=y
 # CONFIG_USB_GADGETFS is not set
 # CONFIG_USB_FILE_STORAGE is not set
 # CONFIG_USB_G_SERIAL is not set
 # CONFIG_USB_MIDI_GADGET is not set
-# CONFIG_MMC is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
-#
-# LED devices
-#
-# CONFIG_NEW_LEDS is not set
-#
-# LED drivers
-#
-#
-# LED Triggers
-#
 #
-# InfiniBand support
+# OTG and related infrastructure
 #
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
 #
-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
+# MMC/SD/SDIO Card Drivers
 #
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
 #
-# Real Time Clock
+# MMC/SD/SDIO Host Controller Drivers
 #
+# CONFIG_MMC_SDHCI is not set
+CONFIG_MMC_SPI=m
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
 # CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
-#
+# CONFIG_AUXDISPLAY is not set
-# DMA Engine support
+# CONFIG_UIO is not set
-#
+# CONFIG_STAGING is not set
-# CONFIG_DMA_ENGINE is not set
-#
-# DMA Clients
-#
-#
-# DMA Devices
-#
-#
-# PBX support
-#
-# CONFIG_PBX is not set
 #
 # File systems
@@ -802,25 +863,29 @@ CONFIG_EXT2_FS_XATTR=y
 # CONFIG_EXT2_FS_POSIX_ACL is not set
 # CONFIG_EXT2_FS_SECURITY is not set
 # CONFIG_EXT3_FS is not set
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
 CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
+# CONFIG_BTRFS_FS is not set
-# CONFIG_ROMFS_FS is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
 # CONFIG_QUOTA is not set
-# CONFIG_DNOTIFY is not set
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_FUSE_FS is not set
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -829,8 +894,11 @@ CONFIG_INOTIFY_USER=y
 #
 # DOS/FAT/NT Filesystems
 #
-# CONFIG_MSDOS_FS is not set
+CONFIG_FAT_FS=y
-# CONFIG_VFAT_FS is not set
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 # CONFIG_NTFS_FS is not set
 #
@@ -841,12 +909,8 @@ CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
 # CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
 # CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
-#
-# Miscellaneous filesystems
-#
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -854,18 +918,29 @@ CONFIG_RAMFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-# CONFIG_YAFFS_FS is not set
+CONFIG_JFFS2_FS=y
-# CONFIG_JFFS2_FS is not set
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
-#
+CONFIG_NETWORK_FILESYSTEMS=y
-# Network File Systems
-#
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
 # CONFIG_SMB_FS is not set
@@ -873,41 +948,94 @@ CONFIG_RAMFS=y
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
 # CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
 #
 # Partition Types
 #
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
-#
+CONFIG_NLS_DEFAULT="iso8859-1"
-# Native Language Support
+CONFIG_NLS_CODEPAGE_437=y
-#
+# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
-#
+# CONFIG_NLS_CODEPAGE_852 is not set
-# Distributed Lock Manager
+# CONFIG_NLS_CODEPAGE_855 is not set
-#
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
 # CONFIG_DLM is not set
 #
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-#
 # Kernel hacking
 #
 # CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
 # CONFIG_DEBUG_KERNEL is not set
-CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_DEBUG_VERBOSE=y
 CONFIG_DEBUG_MMRS=y
+# CONFIG_DEBUG_DOUBLEFAULT is not set
 CONFIG_DEBUG_HUNT_FOR_ZERO=y
 CONFIG_DEBUG_BFIN_HWTRACE_ON=y
 CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
@@ -916,34 +1044,40 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
 CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
 # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
 # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
-# CONFIG_EARLY_PRINTK is not set
+CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 #
 # Security options
 #
 # CONFIG_KEYS is not set
 CONFIG_SECURITY=y
+# CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_NETWORK is not set
-CONFIG_SECURITY_CAPABILITIES=y
+# CONFIG_SECURITY_PATH is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
-#
+# CONFIG_SECURITY_TOMOYO is not set
-# Cryptographic options
-#
 # CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
-# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=y
 CONFIG_CRC32=y
+CONFIG_CRC7=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
-CONFIG_PLIST=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_DECOMPRESS_LZMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/CM-BF548_defconfig b/arch/blackfin/configs/CM-BF548_defconfig
index acca4e51a45a..7f579cf51127 100644
--- a/arch/blackfin/configs/CM-BF548_defconfig
+++ b/arch/blackfin/configs/CM-BF548_defconfig
@@ -1,14 +1,14 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.24.4
+# Linux kernel version: 2.6.30.5
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
-CONFIG_SEMAPHORE_SLEEPERS=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
@@ -16,6 +16,9 @@ CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 #
@@ -26,79 +29,100 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+# CONFIG_KERNEL_GZIP is not set
+# CONFIG_KERNEL_BZIP2 is not set
+CONFIG_KERNEL_LZMA=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
 # CONFIG_AUDIT is not set
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
-CONFIG_FAIR_USER_SCHED=y
-# CONFIG_FAIR_CGROUP_SCHED is not set
-# CONFIG_SYSFS_DEPRECATED is not set
 # CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_RD_GZIP is not set
+# CONFIG_RD_BZIP2 is not set
+CONFIG_RD_LZMA=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SYSCTL is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
-CONFIG_UID16=y
+# CONFIG_UID16 is not set
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
+CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
+CONFIG_COMPAT_BRK=y
-# CONFIG_NP2 is not set
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_SLOW_WORK is not set
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
-CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
 # CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
 #
 # IO Schedulers
 #
 CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
+# CONFIG_IOSCHED_AS is not set
 # CONFIG_IOSCHED_DEADLINE is not set
 CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_AS is not set
 # CONFIG_DEFAULT_DEADLINE is not set
 # CONFIG_DEFAULT_CFQ is not set
-# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_NOOP=y
-CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_DEFAULT_IOSCHED="noop"
-# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_NONE=y
-CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
+# CONFIG_FREEZER is not set
 #
 # Blackfin Processor Options
@@ -107,6 +131,10 @@ CONFIG_PREEMPT_VOLUNTARY=y
 #
 # Processor and Board Settings
 #
+# CONFIG_BF512 is not set
+# CONFIG_BF514 is not set
+# CONFIG_BF516 is not set
+# CONFIG_BF518 is not set
 # CONFIG_BF522 is not set
 # CONFIG_BF523 is not set
 # CONFIG_BF524 is not set
@@ -119,19 +147,29 @@ CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_BF534 is not set
 # CONFIG_BF536 is not set
 # CONFIG_BF537 is not set
+# CONFIG_BF538 is not set
+# CONFIG_BF539 is not set
 # CONFIG_BF542 is not set
+# CONFIG_BF542M is not set
 # CONFIG_BF544 is not set
+# CONFIG_BF544M is not set
 # CONFIG_BF547 is not set
-CONFIG_BF548=y
+# CONFIG_BF547M is not set
+CONFIG_BF548_std=y
+# CONFIG_BF548M is not set
 # CONFIG_BF549 is not set
+# CONFIG_BF549M is not set
 # CONFIG_BF561 is not set
+CONFIG_BF_REV_MIN=0
+CONFIG_BF_REV_MAX=2
 # CONFIG_BF_REV_0_0 is not set
 # CONFIG_BF_REV_0_1 is not set
-CONFIG_BF_REV_0_2=y
+# CONFIG_BF_REV_0_2 is not set
 # CONFIG_BF_REV_0_3 is not set
 # CONFIG_BF_REV_0_4 is not set
 # CONFIG_BF_REV_0_5 is not set
-# CONFIG_BF_REV_ANY is not set
+# CONFIG_BF_REV_0_6 is not set
+CONFIG_BF_REV_ANY=y
 # CONFIG_BF_REV_NONE is not set
 CONFIG_BF54x=y
 CONFIG_IRQ_PLL_WAKEUP=7
@@ -140,15 +178,12 @@ CONFIG_IRQ_SPORT0_RX=9
 CONFIG_IRQ_SPORT0_TX=9
 CONFIG_IRQ_SPORT1_RX=9
 CONFIG_IRQ_SPORT1_TX=9
+CONFIG_IRQ_SPI0=10
 CONFIG_IRQ_UART0_RX=10
 CONFIG_IRQ_UART0_TX=10
 CONFIG_IRQ_UART1_RX=10
 CONFIG_IRQ_UART1_TX=10
 CONFIG_IRQ_CNT=8
-CONFIG_IRQ_USB_INT0=11
-CONFIG_IRQ_USB_INT1=11
-CONFIG_IRQ_USB_INT2=11
-CONFIG_IRQ_USB_DMA=11
 CONFIG_IRQ_TIMER0=11
 CONFIG_IRQ_TIMER1=11
 CONFIG_IRQ_TIMER2=11
@@ -157,9 +192,21 @@ CONFIG_IRQ_TIMER4=11
 CONFIG_IRQ_TIMER5=11
 CONFIG_IRQ_TIMER6=11
 CONFIG_IRQ_TIMER7=11
+CONFIG_IRQ_USB_INT0=11
+CONFIG_IRQ_USB_INT1=11
+CONFIG_IRQ_USB_INT2=11
+CONFIG_IRQ_USB_DMA=11
 CONFIG_IRQ_TIMER8=11
 CONFIG_IRQ_TIMER9=11
 CONFIG_IRQ_TIMER10=11
+CONFIG_IRQ_SPORT2_RX=9
+CONFIG_IRQ_SPORT2_TX=9
+CONFIG_IRQ_SPORT3_RX=9
+CONFIG_IRQ_SPORT3_TX=9
+CONFIG_IRQ_SPI1=10
+CONFIG_IRQ_SPI2=10
+CONFIG_IRQ_TWI0=11
+CONFIG_IRQ_TWI1=11
 # CONFIG_BFIN548_EZKIT is not set
 CONFIG_BFIN548_BLUETECHNIX_CM=y
@@ -167,6 +214,7 @@ CONFIG_BFIN548_BLUETECHNIX_CM=y
 # BF548 Specific Configuration
 #
 # CONFIG_DEB_DMA_URGENT is not set
+# CONFIG_BF548_ATAPI_ALTERNATIVE_PORT is not set
 #
 # Interrupt Priority Assignment
@@ -182,7 +230,6 @@ CONFIG_IRQ_SPORT1_ERR=7
 CONFIG_IRQ_SPI0_ERR=7
 CONFIG_IRQ_UART0_ERR=7
 CONFIG_IRQ_EPPI0=8
-CONFIG_IRQ_SPI0=10
 CONFIG_IRQ_PINT0=12
 CONFIG_IRQ_PINT1=12
 CONFIG_IRQ_MDMAS0=13
@@ -197,18 +244,10 @@ CONFIG_IRQ_SPI2_ERR=7
 CONFIG_IRQ_UART1_ERR=7
 CONFIG_IRQ_UART2_ERR=7
 CONFIG_IRQ_CAN0_ERR=7
-CONFIG_IRQ_SPORT2_RX=9
-CONFIG_IRQ_SPORT2_TX=9
-CONFIG_IRQ_SPORT3_RX=9
-CONFIG_IRQ_SPORT3_TX=9
 CONFIG_IRQ_EPPI1=9
 CONFIG_IRQ_EPPI2=9
-CONFIG_IRQ_SPI1=10
-CONFIG_IRQ_SPI2=10
 CONFIG_IRQ_ATAPI_RX=10
 CONFIG_IRQ_ATAPI_TX=10
-CONFIG_IRQ_TWI0=11
-CONFIG_IRQ_TWI1=11
 CONFIG_IRQ_CAN0_RX=11
 CONFIG_IRQ_CAN0_TX=11
 CONFIG_IRQ_MDMAS2=13
@@ -255,6 +294,7 @@ CONFIG_PINT3_ASSIGN=0x02020303
 # Board customizations
 #
 # CONFIG_CMDLINE_BOOL is not set
+CONFIG_BOOT_LOAD=0x1000
 #
 # Clock/PLL Setup
@@ -274,16 +314,12 @@ CONFIG_HZ_250=y
 # CONFIG_HZ_300 is not set
 # CONFIG_HZ_1000 is not set
 CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
 # CONFIG_GENERIC_TIME is not set
-# CONFIG_TICK_ONESHOT is not set
 #
-# Memory Setup
+# Misc
 #
-CONFIG_MAX_MEM_SIZE=64
-# CONFIG_MEM_MT46V32M16_6T is not set
-CONFIG_MEM_MT46V32M16_5B=y
-CONFIG_BOOT_LOAD=0x1000
 CONFIG_BFIN_SCRATCH_REG_RETN=y
 # CONFIG_BFIN_SCRATCH_REG_RETE is not set
 # CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
@@ -310,6 +346,12 @@ CONFIG_ACCESS_OK_L1=y
 CONFIG_CACHELINE_ALIGNED_L1=y
 # CONFIG_SYSCALL_TAB_L1 is not set
 # CONFIG_CPLB_SWITCH_TAB_L1 is not set
+CONFIG_APP_STACK_L1=y
+#
+# Speed Optimizations
+#
+CONFIG_BFIN_INS_LOWOVERHEAD=y
 CONFIG_RAMKERNEL=y
 # CONFIG_ROMKERNEL is not set
 CONFIG_SELECT_MEMORY_MODEL=y
@@ -318,13 +360,16 @@ CONFIG_FLATMEM_MANUAL=y
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
-# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 # CONFIG_BFIN_GPTIMERS is not set
+# CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
 # CONFIG_DMA_UNCACHED_NONE is not set
@@ -333,14 +378,13 @@ CONFIG_DMA_UNCACHED_1M=y
 # Cache Support
 #
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
+# CONFIG_BFIN_L2_ICACHEABLE is not set
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
-CONFIG_BFIN_EXTMEM_WRITEBACK=y
+# CONFIG_BFIN_EXTMEM_WRITEBACK
-# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
+CONFIG_BFIN_EXTMEM_WRITETHROUGH=y
-# CONFIG_BFIN_L2_ICACHEABLE is not set
 # CONFIG_BFIN_L2_DCACHEABLE is not set
 #
@@ -349,7 +393,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 #
-# Asynchonous Memory Configuration
+# Asynchronous Memory Configuration
 #
 #
@@ -369,7 +413,7 @@ CONFIG_C_AMBEN_ALL=y
 CONFIG_BANK_0=0x7BB0
 CONFIG_BANK_1=0x5554
 CONFIG_BANK_2=0x7BB0
-CONFIG_BANK_3=0x99B2
+CONFIG_BANK_3=0x99B3
 CONFIG_EBIU_MBSCTLVAL=0x0
 CONFIG_EBIU_MODEVAL=0x1
 CONFIG_EBIU_FCTLVAL=0x6
@@ -377,7 +421,6 @@ CONFIG_EBIU_FCTLVAL=0x6
 #
 # Bus options (PCI, PCMCIA, EISA, MCA, ISA)
 #
-# CONFIG_PCI is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 # CONFIG_PCCARD is not set
@@ -388,23 +431,19 @@ CONFIG_BINFMT_ELF_FDPIC=y
 CONFIG_BINFMT_FLAT=y
 CONFIG_BINFMT_ZFLAT=y
 # CONFIG_BINFMT_SHARED_FLAT is not set
+# CONFIG_HAVE_AOUT is not set
 # CONFIG_BINFMT_MISC is not set
 #
 # Power management options
 #
 # CONFIG_PM is not set
-CONFIG_SUSPEND_UP_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
-# CONFIG_PM_WAKEUP_BY_GPIO is not set
 #
 # CPU Frequency scaling
 #
 # CONFIG_CPU_FREQ is not set
-#
-# Networking
-#
 CONFIG_NET=y
 #
@@ -417,6 +456,7 @@ CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
 # CONFIG_XFRM_SUB_POLICY is not set
 # CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -435,19 +475,16 @@ CONFIG_IP_PNP=y
 # CONFIG_INET_IPCOMP is not set
 # CONFIG_INET_XFRM_TUNNEL is not set
 # CONFIG_INET_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=m
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TUNNEL=m
-# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_XFRM_MODE_BEET=m
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
-CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_TCP_MD5SIG is not set
 # CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
 # CONFIG_NETLABEL is not set
 # CONFIG_NETWORK_SECMARK is not set
 # CONFIG_NETFILTER is not set
@@ -456,6 +493,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 # CONFIG_LLC2 is not set
@@ -465,24 +503,21 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 #
 # Network testing
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
-#
+# CONFIG_WIMAX is not set
-# Wireless
-#
-# CONFIG_CFG80211 is not set
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -501,10 +536,12 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
 #
 # User Modules And Translation Layers
@@ -539,6 +576,7 @@ CONFIG_MTD_CFI_I2=y
 CONFIG_MTD_CFI_INTELEXT=y
 # CONFIG_MTD_CFI_AMDSTD is not set
 # CONFIG_MTD_CFI_STAA is not set
+# CONFIG_MTD_PSD4256G is not set
 CONFIG_MTD_CFI_UTIL=y
 CONFIG_MTD_RAM=y
 # CONFIG_MTD_ROM is not set
@@ -549,9 +587,8 @@ CONFIG_MTD_RAM=y
 #
 CONFIG_MTD_COMPLEX_MAPPINGS=y
 CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0x20000000
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
-CONFIG_MTD_PHYSMAP_LEN=0
+# CONFIG_MTD_GPIO_ADDR is not set
-CONFIG_MTD_PHYSMAP_BANKWIDTH=2
 # CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
@@ -575,6 +612,11 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
 # CONFIG_MTD_ONENAND is not set
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -587,31 +629,31 @@ CONFIG_BLK_DEV=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_BLK_DEV_XIP is not set
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
-CONFIG_MISC_DEVICES=y
+# CONFIG_BLK_DEV_HD is not set
-# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 #
 # SCSI device support
 #
 # CONFIG_RAID_ATTRS is not set
-CONFIG_SCSI=y
+CONFIG_SCSI=m
 CONFIG_SCSI_DMA=y
 # CONFIG_SCSI_TGT is not set
 # CONFIG_SCSI_NETLINK is not set
-# CONFIG_SCSI_PROC_FS is not set
+CONFIG_SCSI_PROC_FS=y
 #
 # SCSI support type (disk, tape, CD-ROM)
 #
-CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_DEV_SD=m
 # CONFIG_CHR_DEV_ST is not set
 # CONFIG_CHR_DEV_OSST is not set
-CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR is not set
-# CONFIG_BLK_DEV_SR_VENDOR is not set
 # CONFIG_CHR_DEV_SG is not set
 # CONFIG_CHR_DEV_SCH is not set
@@ -632,29 +674,54 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_ISCSI_ATTRS is not set
 # CONFIG_SCSI_SAS_LIBSAS is not set
 # CONFIG_SCSI_SRP_ATTRS is not set
-CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_SCSI_LOWLEVEL is not set
-# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_DH is not set
-# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
 CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
+CONFIG_COMPAT_NET_DEV_OPS=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
 # CONFIG_MACVLAN is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
 # CONFIG_VETH is not set
-# CONFIG_PHYLIB is not set
+CONFIG_PHYLIB=y
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 # CONFIG_SMC91X is not set
-CONFIG_SMSC911X=y
 # CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+CONFIG_SMSC911X=y
+# CONFIG_DNET is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
 # CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
@@ -666,6 +733,10 @@ CONFIG_SMSC911X=y
 # CONFIG_WLAN_80211 is not set
 #
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+#
 # USB Network Adapters
 #
 # CONFIG_USB_CATC is not set
@@ -676,7 +747,6 @@ CONFIG_SMSC911X=y
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
 # CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
@@ -711,6 +781,7 @@ CONFIG_INPUT_KEYBOARD=y
 # CONFIG_KEYBOARD_GPIO is not set
 # CONFIG_KEYBOARD_BFIN is not set
 # CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_ADP5588 is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
@@ -726,19 +797,16 @@ CONFIG_INPUT_KEYBOARD=y
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
+CONFIG_BFIN_DMA_INTERFACE=m
-# CONFIG_SPI_ADC_BF533 is not set
+# CONFIG_BFIN_PPI is not set
-# CONFIG_BF5xx_PPIFCD is not set
+# CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-# CONFIG_BF5xx_PPI is not set
+# CONFIG_BFIN_SPI_ADC is not set
-CONFIG_BFIN_OTP=y
-# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
 # CONFIG_BFIN_SPORT is not set
-# CONFIG_BFIN_TIMER_LATENCY is not set
+# CONFIG_BFIN_TWI_LCD is not set
-# CONFIG_TWI_LCD is not set
-# CONFIG_SIMPLE_GPIO is not set
 # CONFIG_VT is not set
-# CONFIG_DEVKMEM is not set
+CONFIG_DEVKMEM=y
+# CONFIG_BFIN_JTAG_COMM is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
 #
@@ -749,10 +817,11 @@ CONFIG_BFIN_OTP=y
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
-CONFIG_SERIAL_BFIN_DMA=y
+# CONFIG_SERIAL_BFIN_DMA is not set
-# CONFIG_SERIAL_BFIN_PIO is not set
+CONFIG_SERIAL_BFIN_PIO=y
 # CONFIG_SERIAL_BFIN_UART0 is not set
 CONFIG_SERIAL_BFIN_UART1=y
 # CONFIG_BFIN_UART1_CTSRTS is not set
@@ -762,7 +831,10 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
+CONFIG_BFIN_OTP=y
+# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
 #
 # CAN, the car bus and industrial fieldbus
@@ -770,61 +842,53 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_CAN4LINUX is not set
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_HW_RANDOM is not set
-# CONFIG_GEN_RTC is not set
 # CONFIG_R3964 is not set
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
 CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
 #
-# I2C Algorithms
+# I2C Hardware Bus support
 #
-# CONFIG_I2C_ALGOBIT is not set
-# CONFIG_I2C_ALGOPCF is not set
-# CONFIG_I2C_ALGOPCA is not set
 #
-# I2C Hardware Bus support
+# I2C system bus drivers (mostly embedded / system-on-chip)
 #
 CONFIG_I2C_BLACKFIN_TWI=y
-CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
+CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50
 # CONFIG_I2C_GPIO is not set
 # CONFIG_I2C_OCORES is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
 # CONFIG_I2C_SIMTEC is not set
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
 # CONFIG_I2C_TAOS_EVM is not set
-# CONFIG_I2C_STUB is not set
 # CONFIG_I2C_TINY_USB is not set
 #
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+#
 # Miscellaneous I2C Chip support
 #
-# CONFIG_SENSORS_DS1337 is not set
-# CONFIG_SENSORS_DS1374 is not set
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_AD5252 is not set
-# CONFIG_EEPROM_LEGACY is not set
 # CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_SENSORS_PCF8575 is not set
+# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9543 is not set
 # CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
 # CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
-CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_SYSFS=y
-#
-# SPI support
-#
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
@@ -832,64 +896,23 @@ CONFIG_SPI_MASTER=y
 # SPI Master Controller Drivers
 #
 CONFIG_SPI_BFIN=y
+# CONFIG_SPI_BFIN_LOCK is not set
+# CONFIG_SPI_BFIN_SPORT is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 #
 # SPI Protocol Masters
 #
-# CONFIG_EEPROM_AT25 is not set
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+# CONFIG_GPIOLIB is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
-CONFIG_HWMON=y
+# CONFIG_HWMON is not set
-# CONFIG_HWMON_VID is not set
+# CONFIG_THERMAL is not set
-# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_THERMAL_HWMON is not set
-# CONFIG_SENSORS_ADM1021 is not set
-# CONFIG_SENSORS_ADM1025 is not set
-# CONFIG_SENSORS_ADM1026 is not set
-# CONFIG_SENSORS_ADM1029 is not set
-# CONFIG_SENSORS_ADM1031 is not set
-# CONFIG_SENSORS_ADM9240 is not set
-# CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ATXP1 is not set
-# CONFIG_SENSORS_DS1621 is not set
-# CONFIG_SENSORS_F71805F is not set
-# CONFIG_SENSORS_F71882FG is not set
-# CONFIG_SENSORS_F75375S is not set
-# CONFIG_SENSORS_GL518SM is not set
-# CONFIG_SENSORS_GL520SM is not set
-# CONFIG_SENSORS_IT87 is not set
-# CONFIG_SENSORS_LM63 is not set
-# CONFIG_SENSORS_LM70 is not set
-# CONFIG_SENSORS_LM75 is not set
-# CONFIG_SENSORS_LM77 is not set
-# CONFIG_SENSORS_LM78 is not set
-# CONFIG_SENSORS_LM80 is not set
-# CONFIG_SENSORS_LM83 is not set
-# CONFIG_SENSORS_LM85 is not set
-# CONFIG_SENSORS_LM87 is not set
-# CONFIG_SENSORS_LM90 is not set
-# CONFIG_SENSORS_LM92 is not set
-# CONFIG_SENSORS_LM93 is not set
-# CONFIG_SENSORS_MAX1619 is not set
-# CONFIG_SENSORS_MAX6650 is not set
-# CONFIG_SENSORS_PC87360 is not set
-# CONFIG_SENSORS_PC87427 is not set
-# CONFIG_SENSORS_DME1737 is not set
-# CONFIG_SENSORS_SMSC47M1 is not set
-# CONFIG_SENSORS_SMSC47M192 is not set
-# CONFIG_SENSORS_SMSC47B397 is not set
-# CONFIG_SENSORS_THMC50 is not set
-# CONFIG_SENSORS_VT1211 is not set
-# CONFIG_SENSORS_W83781D is not set
-# CONFIG_SENSORS_W83791D is not set
-# CONFIG_SENSORS_W83792D is not set
-# CONFIG_SENSORS_W83793 is not set
-# CONFIG_SENSORS_W83L785TS is not set
-# CONFIG_SENSORS_W83627HF is not set
-# CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
@@ -903,25 +926,43 @@ CONFIG_BFIN_WDT=y
 # USB-based Watchdog Cards
 #
 # CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
 #
 # Sonics Silicon Backplane
 #
-CONFIG_SSB_POSSIBLE=y
 # CONFIG_SSB is not set
 #
 # Multifunction device drivers
 #
+# CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_REGULATOR is not set
 #
 # Multimedia devices
 #
+#
+# Multimedia core support
+#
 # CONFIG_VIDEO_DEV is not set
 # CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+#
+# Multimedia drivers
+#
 # CONFIG_DAB is not set
-# CONFIG_USB_DABUSB is not set
 #
 # Graphics support
@@ -935,80 +976,75 @@ CONFIG_SSB_POSSIBLE=y
 # Display device support
 #
 # CONFIG_DISPLAY_SUPPORT is not set
-#
-# Sound
-#
 # CONFIG_SOUND is not set
-CONFIG_HID_SUPPORT=y
+# CONFIG_HID_SUPPORT is not set
-CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
-# CONFIG_HIDRAW is not set
-#
-# USB Input Devices
-#
-CONFIG_USB_HID=y
-# CONFIG_USB_HIDINPUT_POWERBOOK is not set
-# CONFIG_HID_FF is not set
-# CONFIG_USB_HIDDEV is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
 # CONFIG_USB_ARCH_HAS_EHCI is not set
-CONFIG_USB=y
+CONFIG_USB=m
 # CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
 #
 # Miscellaneous USB options
 #
-# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICEFS=y
-CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DEVICE_CLASS is not set
 # CONFIG_USB_DYNAMIC_MINORS is not set
 # CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=m
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
 #
 # USB Host Controller Drivers
 #
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
-# CONFIG_USB_ISP1362_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 # CONFIG_USB_SL811_HCD is not set
 # CONFIG_USB_R8A66597_HCD is not set
-CONFIG_USB_MUSB_HDRC=y
+# CONFIG_USB_HWA_HCD is not set
+CONFIG_USB_MUSB_HDRC=m
 CONFIG_USB_MUSB_SOC=y
 #
-# Blackfin BF54x, BF525 and BF527 high speed USB support
+# Blackfin high speed USB Support
 #
-CONFIG_USB_MUSB_HOST=y
+# CONFIG_USB_MUSB_HOST is not set
-# CONFIG_USB_MUSB_PERIPHERAL is not set
+CONFIG_USB_MUSB_PERIPHERAL=y
 # CONFIG_USB_MUSB_OTG is not set
-CONFIG_USB_MUSB_HDRC_HCD=y
+CONFIG_USB_GADGET_MUSB_HDRC=y
 # CONFIG_MUSB_PIO_ONLY is not set
-# CONFIG_USB_INVENTRA_DMA is not set
+CONFIG_USB_INVENTRA_DMA=y
 # CONFIG_USB_TI_CPPI_DMA is not set
-CONFIG_USB_MUSB_LOGLEVEL=0
+# CONFIG_USB_MUSB_DEBUG is not set
 #
 # USB Device Class drivers
 #
 # CONFIG_USB_ACM is not set
 # CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
 #
 #
-# may also be needed; see USB_STORAGE Help for more information
+# also be needed; see USB_STORAGE Help for more info
 #
-CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE=m
 # CONFIG_USB_STORAGE_DEBUG is not set
 # CONFIG_USB_STORAGE_DATAFAB is not set
 # CONFIG_USB_STORAGE_FREECOM is not set
 # CONFIG_USB_STORAGE_ISD200 is not set
-# CONFIG_USB_STORAGE_DPCM is not set
 # CONFIG_USB_STORAGE_USBAT is not set
 # CONFIG_USB_STORAGE_SDDR09 is not set
 # CONFIG_USB_STORAGE_SDDR55 is not set
@@ -1016,6 +1052,7 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_ALAUDA is not set
 # CONFIG_USB_STORAGE_ONETOUCH is not set
 # CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
 # CONFIG_USB_LIBUSUAL is not set
 #
@@ -1023,15 +1060,10 @@ CONFIG_USB_STORAGE=y
 #
 # CONFIG_USB_MDC800 is not set
 # CONFIG_USB_MICROTEK is not set
-CONFIG_USB_MON=y
 #
 # USB port drivers
 #
-#
-# USB Serial Converter support
-#
 # CONFIG_USB_SERIAL is not set
 #
@@ -1040,7 +1072,7 @@ CONFIG_USB_MON=y
 # CONFIG_USB_EMI62 is not set
 # CONFIG_USB_EMI26 is not set
 # CONFIG_USB_ADUTUX is not set
-# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_SEVSEG is not set
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
@@ -1048,7 +1080,6 @@ CONFIG_USB_MON=y
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGET is not set
 # CONFIG_USB_IDMOUSE is not set
 # CONFIG_USB_FTDI_ELAN is not set
 # CONFIG_USB_APPLEDISPLAY is not set
@@ -1056,38 +1087,75 @@ CONFIG_USB_MON=y
 # CONFIG_USB_LD is not set
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
-#
+# CONFIG_USB_ISIGHTFW is not set
-# USB DSL modem support
+# CONFIG_USB_VST is not set
-#
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
-#
+# CONFIG_USB_GADGET_DEBUG_FS is not set
-# USB Gadget Support
+CONFIG_USB_GADGET_VBUS_DRAW=2
-#
+CONFIG_USB_GADGET_SELECTED=y
-# CONFIG_USB_GADGET is not set
+# CONFIG_USB_GADGET_AT91 is not set
-CONFIG_MMC=y
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2272 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_ZERO=m
+# CONFIG_USB_AUDIO is not set
+CONFIG_USB_ETH=m
+# CONFIG_USB_ETH_RNDIS is not set
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+CONFIG_USB_G_PRINTER=m
+# CONFIG_USB_CDC_COMPOSITE is not set
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=m
 # CONFIG_MMC_DEBUG is not set
 # CONFIG_MMC_UNSAFE_RESUME is not set
 #
-# MMC/SD Card Drivers
+# MMC/SD/SDIO Card Drivers
 #
-CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK=m
 CONFIG_MMC_BLOCK_BOUNCE=y
 # CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
 #
-# MMC/SD Host Controller Drivers
+# MMC/SD/SDIO Host Controller Drivers
 #
-CONFIG_SDH_BFIN=y
+# CONFIG_MMC_SDHCI is not set
+CONFIG_SDH_BFIN=m
+# CONFIG_SDH_BFIN_MISSING_CMD_PULLUP_WORKAROUND is not set
+# CONFIG_SDH_BFIN_ENABLE_SDIO_IRQ is not set
 # CONFIG_MMC_SPI is not set
-# CONFIG_SPI_MMC is not set
+# CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
-CONFIG_RTC_LIB=y
+# CONFIG_ACCESSIBILITY is not set
-CONFIG_RTC_CLASS=y
+CONFIG_RTC_LIB=m
-CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_CLASS=m
-CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
-# CONFIG_RTC_DEBUG is not set
 #
 # RTC interfaces
@@ -1111,66 +1179,74 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_PCF8563 is not set
 # CONFIG_RTC_DRV_PCF8583 is not set
 # CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
 #
 # SPI RTC drivers
 #
-# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
 # CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
 #
 # Platform RTC drivers
 #
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
 # CONFIG_RTC_DRV_DS1553 is not set
-# CONFIG_RTC_DRV_STK17TA8 is not set
 # CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
 # CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
 # CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
 # CONFIG_RTC_DRV_V3020 is not set
 #
 # on-CPU RTC drivers
 #
-CONFIG_RTC_DRV_BFIN=y
+CONFIG_RTC_DRV_BFIN=m
+# CONFIG_DMADEVICES is not set
-#
+# CONFIG_AUXDISPLAY is not set
-# Userspace I/O
-#
 # CONFIG_UIO is not set
+# CONFIG_STAGING is not set
-#
-# PBX support
-#
-# CONFIG_PBX is not set
 #
 # File systems
 #
-# CONFIG_EXT2_FS is not set
+CONFIG_EXT2_FS=m
+# CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT3_FS is not set
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
+# CONFIG_BTRFS_FS is not set
-# CONFIG_ROMFS_FS is not set
+CONFIG_FILE_LOCKING=y
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-# CONFIG_QUOTA is not set
 # CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_FUSE_FS is not set
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+#
 # CD-ROM/DVD Filesystems
 #
-CONFIG_ISO9660_FS=m
+# CONFIG_ISO9660_FS is not set
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
 # CONFIG_UDF_FS is not set
 #
@@ -1194,10 +1270,7 @@ CONFIG_SYSFS=y
 # CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
-#
-# Miscellaneous filesystems
-#
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -1205,17 +1278,7 @@ CONFIG_SYSFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-CONFIG_YAFFS_FS=m
+CONFIG_JFFS2_FS=y
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-CONFIG_YAFFS_CHECKPOINT_RESERVED_BLOCKS=10
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
-CONFIG_JFFS2_FS=m
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
 # CONFIG_JFFS2_FS_WBUF_VERIFY is not set
@@ -1227,34 +1290,30 @@ CONFIG_JFFS2_ZLIB=y
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=m
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
 # CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
-CONFIG_NFSD=m
-CONFIG_NFSD_V3=y
-# CONFIG_NFSD_V3_ACL is not set
-# CONFIG_NFSD_V4 is not set
-CONFIG_NFSD_TCP=y
 CONFIG_LOCKD=m
 CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=m
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=m
-# CONFIG_SUNRPC_BIND34 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
-CONFIG_SMB_FS=m
+# CONFIG_SMB_FS is not set
-CONFIG_SMB_NLS_DEFAULT=y
+CONFIG_CIFS=m
-CONFIG_SMB_NLS_REMOTE="cp437"
-CONFIG_CIFS=y
 # CONFIG_CIFS_STATS is not set
 # CONFIG_CIFS_WEAK_PW_HASH is not set
 # CONFIG_CIFS_XATTR is not set
@@ -1267,24 +1326,8 @@ CONFIG_CIFS=y
 #
 # Partition Types
 #
-CONFIG_PARTITION_ADVANCED=y
+# CONFIG_PARTITION_ADVANCED is not set
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
 CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_KARMA_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-# CONFIG_SYSV68_PARTITION is not set
 CONFIG_NLS=y
 CONFIG_NLS_DEFAULT="iso8859-1"
 CONFIG_NLS_CODEPAGE_437=m
@@ -1326,9 +1369,6 @@ CONFIG_NLS_KOI8_R=m
 CONFIG_NLS_KOI8_U=m
 CONFIG_NLS_UTF8=m
 # CONFIG_DLM is not set
-CONFIG_INSTRUMENTATION=y
-# CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 #
 # Kernel hacking
@@ -1336,14 +1376,39 @@ CONFIG_INSTRUMENTATION=y
 # CONFIG_PRINTK_TIME is not set
 CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
 # CONFIG_DEBUG_KERNEL is not set
-CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
-CONFIG_DEBUG_MMRS=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_DEBUG_VERBOSE=y
+# CONFIG_DEBUG_MMRS is not set
+# CONFIG_DEBUG_DOUBLEFAULT is not set
 CONFIG_DEBUG_HUNT_FOR_ZERO=y
 CONFIG_DEBUG_BFIN_HWTRACE_ON=y
 CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
@@ -1352,33 +1417,125 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
 CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
 # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
 # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
-# CONFIG_EARLY_PRINTK is not set
+CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 #
 # Security options
 #
 # CONFIG_KEYS is not set
 CONFIG_SECURITY=y
+# CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_NETWORK is not set
-# CONFIG_SECURITY_CAPABILITIES is not set
+# CONFIG_SECURITY_PATH is not set
-# CONFIG_SECURITY_ROOTPLUG is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
-# CONFIG_CRYPTO is not set
+# CONFIG_SECURITY_TOMOYO is not set
+CONFIG_CRYPTO=y
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_MANAGER2 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
 # CONFIG_CRC_ITU_T is not set
 CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=m
+CONFIG_ZLIB_DEFLATE=y
-CONFIG_PLIST=y
+CONFIG_DECOMPRESS_LZMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/CM-BF561_defconfig b/arch/blackfin/configs/CM-BF561_defconfig
index bae4ee6e68bb..a6df01dac98a 100644
--- a/arch/blackfin/configs/CM-BF561_defconfig
+++ b/arch/blackfin/configs/CM-BF561_defconfig
@@ -1,15 +1,14 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.24.4
+# Linux kernel version: 2.6.30.5
-# Tue Apr  1 10:50:11 2008
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
-CONFIG_SEMAPHORE_SLEEPERS=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
@@ -17,6 +16,9 @@ CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 #
@@ -27,62 +29,83 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+# CONFIG_KERNEL_GZIP is not set
+# CONFIG_KERNEL_BZIP2 is not set
+CONFIG_KERNEL_LZMA=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
 # CONFIG_AUDIT is not set
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
-CONFIG_FAIR_USER_SCHED=y
-# CONFIG_FAIR_CGROUP_SCHED is not set
-# CONFIG_SYSFS_DEPRECATED is not set
 # CONFIG_RELAY is not set
-# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_RD_GZIP is not set
+# CONFIG_RD_BZIP2 is not set
+CONFIG_RD_LZMA=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SYSCTL is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 # CONFIG_UID16 is not set
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
-# CONFIG_HOTPLUG is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
+# CONFIG_SIGNALFD is not set
-CONFIG_EVENTFD=y
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_AIO is not set
 CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
+CONFIG_COMPAT_BRK=y
-# CONFIG_NP2 is not set
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_SLOW_WORK is not set
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
-CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
 # CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
 #
 # IO Schedulers
@@ -99,6 +122,7 @@ CONFIG_DEFAULT_IOSCHED="noop"
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
+# CONFIG_FREEZER is not set
 #
 # Blackfin Processor Options
@@ -107,6 +131,10 @@ CONFIG_PREEMPT_NONE=y
 #
 # Processor and Board Settings
 #
+# CONFIG_BF512 is not set
+# CONFIG_BF514 is not set
+# CONFIG_BF516 is not set
+# CONFIG_BF518 is not set
 # CONFIG_BF522 is not set
 # CONFIG_BF523 is not set
 # CONFIG_BF524 is not set
@@ -119,30 +147,47 @@ CONFIG_PREEMPT_NONE=y
 # CONFIG_BF534 is not set
 # CONFIG_BF536 is not set
 # CONFIG_BF537 is not set
+# CONFIG_BF538 is not set
+# CONFIG_BF539 is not set
 # CONFIG_BF542 is not set
+# CONFIG_BF542M is not set
 # CONFIG_BF544 is not set
+# CONFIG_BF544M is not set
 # CONFIG_BF547 is not set
+# CONFIG_BF547M is not set
 # CONFIG_BF548 is not set
+# CONFIG_BF548M is not set
 # CONFIG_BF549 is not set
+# CONFIG_BF549M is not set
 CONFIG_BF561=y
+# CONFIG_SMP is not set
+CONFIG_BF_REV_MIN=3
+CONFIG_BF_REV_MAX=5
 # CONFIG_BF_REV_0_0 is not set
 # CONFIG_BF_REV_0_1 is not set
 # CONFIG_BF_REV_0_2 is not set
 CONFIG_BF_REV_0_3=y
 # CONFIG_BF_REV_0_4 is not set
 # CONFIG_BF_REV_0_5 is not set
+# CONFIG_BF_REV_0_6 is not set
 # CONFIG_BF_REV_ANY is not set
 # CONFIG_BF_REV_NONE is not set
-CONFIG_BFIN_DUAL_CORE=y
 CONFIG_MEM_MT48LC8M32B2B5_7=y
 CONFIG_IRQ_PLL_WAKEUP=7
 CONFIG_IRQ_SPORT0_ERROR=7
 CONFIG_IRQ_SPORT1_ERROR=7
+CONFIG_IRQ_TIMER0=10
+CONFIG_IRQ_TIMER1=10
+CONFIG_IRQ_TIMER2=10
+CONFIG_IRQ_TIMER3=10
+CONFIG_IRQ_TIMER4=10
+CONFIG_IRQ_TIMER5=10
+CONFIG_IRQ_TIMER6=10
+CONFIG_IRQ_TIMER7=10
 CONFIG_IRQ_SPI_ERROR=7
 # CONFIG_BFIN561_EZKIT is not set
 # CONFIG_BFIN561_TEPLA is not set
 CONFIG_BFIN561_BLUETECHNIX_CM=y
-# CONFIG_GENERIC_BF561_BOARD is not set
 #
 # BF561 Specific Configuration
@@ -151,12 +196,7 @@ CONFIG_BFIN561_BLUETECHNIX_CM=y
 #
 # Core B Support
 #
-#
-# Core B Support
-#
 CONFIG_BF561_COREB=y
-# CONFIG_BF561_COREB_RESET is not set
 #
 # Interrupt Priority Assignment
@@ -196,14 +236,6 @@ CONFIG_IRQ_DMA2_8=9
 CONFIG_IRQ_DMA2_9=9
 CONFIG_IRQ_DMA2_10=9
 CONFIG_IRQ_DMA2_11=9
-CONFIG_IRQ_TIMER0=10
-CONFIG_IRQ_TIMER1=10
-CONFIG_IRQ_TIMER2=10
-CONFIG_IRQ_TIMER3=10
-CONFIG_IRQ_TIMER4=10
-CONFIG_IRQ_TIMER5=10
-CONFIG_IRQ_TIMER6=10
-CONFIG_IRQ_TIMER7=10
 CONFIG_IRQ_TIMER8=10
 CONFIG_IRQ_TIMER9=10
 CONFIG_IRQ_TIMER10=10
@@ -226,6 +258,7 @@ CONFIG_IRQ_WDTIMER=13
 # Board customizations
 #
 # CONFIG_CMDLINE_BOOL is not set
+CONFIG_BOOT_LOAD=0x1000
 #
 # Clock/PLL Setup
@@ -245,19 +278,20 @@ CONFIG_HZ_250=y
 # CONFIG_HZ_300 is not set
 # CONFIG_HZ_1000 is not set
 CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
 # CONFIG_CYCLES_CLOCKSOURCE is not set
-# CONFIG_TICK_ONESHOT is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
 # CONFIG_NO_HZ is not set
 # CONFIG_HIGH_RES_TIMERS is not set
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 #
-# Memory Setup
+# Misc
 #
-CONFIG_MAX_MEM_SIZE=32
-CONFIG_BOOT_LOAD=0x1000
 CONFIG_BFIN_SCRATCH_REG_RETN=y
 # CONFIG_BFIN_SCRATCH_REG_RETE is not set
 # CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
@@ -284,6 +318,12 @@ CONFIG_IP_CHECKSUM_L1=y
 CONFIG_CACHELINE_ALIGNED_L1=y
 CONFIG_SYSCALL_TAB_L1=y
 CONFIG_CPLB_SWITCH_TAB_L1=y
+CONFIG_APP_STACK_L1=y
+#
+# Speed Optimizations
+#
+CONFIG_BFIN_INS_LOWOVERHEAD=y
 CONFIG_RAMKERNEL=y
 # CONFIG_ROMKERNEL is not set
 CONFIG_SELECT_MEMORY_MODEL=y
@@ -292,14 +332,16 @@ CONFIG_FLATMEM_MANUAL=y
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
-# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
-CONFIG_LARGE_ALLOCS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 # CONFIG_BFIN_GPTIMERS is not set
+# CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
 # CONFIG_DMA_UNCACHED_NONE is not set
@@ -308,15 +350,16 @@ CONFIG_DMA_UNCACHED_1M=y
 # Cache Support
 #
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
+# CONFIG_BFIN_L2_ICACHEABLE is not set
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
-CONFIG_BFIN_EXTMEM_WRITEBACK=y
+# CONFIG_BFIN_EXTMEM_WRITEBACK is not set
-# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
+CONFIG_BFIN_EXTMEM_WRITETHROUGH=y
-# CONFIG_BFIN_L2_ICACHEABLE is not set
 # CONFIG_BFIN_L2_DCACHEABLE is not set
+# CONFIG_BFIN_L2_WRITEBACK is not set
+# CONFIG_BFIN_L2_WRITETHROUGH is not set
 #
 # Memory Protection Unit
@@ -324,7 +367,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 #
-# Asynchonous Memory Configuration
+# Asynchronous Memory Configuration
 #
 #
@@ -353,8 +396,8 @@ CONFIG_BANK_3=0xFFC2
 #
 # Bus options (PCI, PCMCIA, EISA, MCA, ISA)
 #
-# CONFIG_PCI is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
 #
 # Executable file formats
@@ -363,18 +406,19 @@ CONFIG_BINFMT_ELF_FDPIC=y
 CONFIG_BINFMT_FLAT=y
 CONFIG_BINFMT_ZFLAT=y
 CONFIG_BINFMT_SHARED_FLAT=y
+# CONFIG_HAVE_AOUT is not set
 # CONFIG_BINFMT_MISC is not set
 #
 # Power management options
 #
 # CONFIG_PM is not set
-CONFIG_SUSPEND_UP_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
-# CONFIG_PM_WAKEUP_BY_GPIO is not set
 #
-# Networking
+# CPU Frequency scaling
 #
+# CONFIG_CPU_FREQ is not set
 CONFIG_NET=y
 #
@@ -383,10 +427,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -407,14 +447,11 @@ CONFIG_IP_FIB_HASH=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
-CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_TCP_MD5SIG is not set
 # CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
 # CONFIG_NETLABEL is not set
 # CONFIG_NETWORK_SECMARK is not set
 # CONFIG_NETFILTER is not set
@@ -423,6 +460,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 # CONFIG_LLC2 is not set
@@ -432,24 +470,21 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 #
 # Network testing
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
-#
+# CONFIG_WIMAX is not set
-# Wireless
-#
-# CONFIG_CFG80211 is not set
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -460,16 +495,22 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 #
 # Generic Driver Options
 #
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
 #
 # User Modules And Translation Layers
@@ -487,8 +528,10 @@ CONFIG_MTD_BLOCK=y
 #
 # RAM/ROM/Flash chip drivers
 #
-# CONFIG_MTD_CFI is not set
+CONFIG_MTD_CFI=y
 # CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
 CONFIG_MTD_MAP_BANK_WIDTH_1=y
 CONFIG_MTD_MAP_BANK_WIDTH_2=y
 CONFIG_MTD_MAP_BANK_WIDTH_4=y
@@ -499,20 +542,29 @@ CONFIG_MTD_CFI_I1=y
 CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_I4 is not set
 # CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+# CONFIG_MTD_PSD4256G is not set
+CONFIG_MTD_CFI_UTIL=y
 CONFIG_MTD_RAM=y
-# CONFIG_MTD_ROM is not set
+CONFIG_MTD_ROM=m
 # CONFIG_MTD_ABSENT is not set
 #
 # Mapping drivers for chip access
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_UCLINUX=y
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
 #
 # Self-contained MTD device drivers
 #
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -528,6 +580,11 @@ CONFIG_MTD_UCLINUX=y
 # CONFIG_MTD_ONENAND is not set
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -539,14 +596,21 @@ CONFIG_BLK_DEV=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_BLK_DEV_XIP is not set
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
 CONFIG_MISC_DEVICES=y
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_C2PORT is not set
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT25 is not set
 # CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
-# CONFIG_BFIN_IDE_ADDRESS_MAPPING_MODE0 is not set
-# CONFIG_BFIN_IDE_ADDRESS_MAPPING_MODE1 is not set
 #
 # SCSI device support
@@ -558,26 +622,50 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
 CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
+CONFIG_COMPAT_NET_DEV_OPS=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
 # CONFIG_MACVLAN is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
 # CONFIG_VETH is not set
-# CONFIG_PHYLIB is not set
+CONFIG_PHYLIB=y
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
-CONFIG_SMC91X=y
+# CONFIG_SMC91X is not set
-# CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+CONFIG_SMSC911X=m
+# CONFIG_DNET is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
 # CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
 # CONFIG_NETDEV_1000 is not set
-# CONFIG_AX88180 is not set
 # CONFIG_NETDEV_10000 is not set
 #
@@ -585,10 +673,13 @@ CONFIG_SMC91X=y
 #
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
 # CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
@@ -609,16 +700,15 @@ CONFIG_SMC91X=y
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
+CONFIG_BFIN_DMA_INTERFACE=m
-# CONFIG_SPI_ADC_BF533 is not set
+# CONFIG_BFIN_PPI is not set
-# CONFIG_BF5xx_PPIFCD is not set
+# CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-# CONFIG_BF5xx_PPI is not set
+# CONFIG_BFIN_SPI_ADC is not set
 # CONFIG_BFIN_SPORT is not set
-# CONFIG_BFIN_TIMER_LATENCY is not set
-# CONFIG_SIMPLE_GPIO is not set
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
+# CONFIG_BFIN_JTAG_COMM is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
 #
@@ -629,6 +719,7 @@ CONFIG_SMC91X=y
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
 CONFIG_SERIAL_BFIN_DMA=y
@@ -639,6 +730,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
 #
@@ -647,54 +739,100 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_CAN4LINUX is not set
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_HW_RANDOM is not set
-# CONFIG_GEN_RTC is not set
 # CONFIG_R3964 is not set
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BFIN=y
+# CONFIG_SPI_BFIN_LOCK is not set
+# CONFIG_SPI_BFIN_SPORT is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 CONFIG_GPIOLIB=y
 CONFIG_GPIO_SYSFS=y
 #
-# SPI support
+# Memory mapped GPIO expanders:
+#
+#
+# I2C GPIO expanders:
+#
 #
-# CONFIG_SPI is not set
+# PCI GPIO expanders:
-# CONFIG_SPI_MASTER is not set
+#
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_ADCXX is not set
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_MAX1111 is not set
 # CONFIG_SENSORS_PC87360 is not set
 # CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SHT15 is not set
 # CONFIG_SENSORS_SMSC47M1 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
 # CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
 #
 # Sonics Silicon Backplane
 #
-CONFIG_SSB_POSSIBLE=y
 # CONFIG_SSB is not set
 #
 # Multifunction device drivers
 #
+# CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
 #
 # Multimedia devices
 #
+#
+# Multimedia core support
+#
 # CONFIG_VIDEO_DEV is not set
 # CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+#
+# Multimedia drivers
+#
 # CONFIG_DAB is not set
 #
@@ -709,42 +847,85 @@ CONFIG_SSB_POSSIBLE=y
 # Display device support
 #
 # CONFIG_DISPLAY_SUPPORT is not set
-#
-# Sound
-#
 # CONFIG_SOUND is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
 # CONFIG_USB_ARCH_HAS_EHCI is not set
 # CONFIG_USB is not set
+# CONFIG_USB_OTG_WHITELIST is not set
-#
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
-# Enable Host or Gadget support to see Inventra options
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
-#
+#
-#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
-#
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
-#
+# CONFIG_USB_GADGET_DEBUG_FS is not set
-# USB Gadget Support
+CONFIG_USB_GADGET_VBUS_DRAW=2
-#
+CONFIG_USB_GADGET_SELECTED=y
-# CONFIG_USB_GADGET is not set
+# CONFIG_USB_GADGET_AT91 is not set
-# CONFIG_MMC is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+CONFIG_USB_GADGET_NET2272=y
+CONFIG_USB_NET2272=m
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+# CONFIG_USB_GADGETFS is not set
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+CONFIG_USB_G_PRINTER=m
+# CONFIG_USB_CDC_COMPOSITE is not set
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+CONFIG_MMC_SPI=m
+# CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
 # CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
-#
+# CONFIG_AUXDISPLAY is not set
-# Userspace I/O
-#
 # CONFIG_UIO is not set
+# CONFIG_STAGING is not set
-#
-# PBX support
-#
-# CONFIG_PBX is not set
 #
 # File systems
@@ -754,25 +935,29 @@ CONFIG_EXT2_FS_XATTR=y
 # CONFIG_EXT2_FS_POSIX_ACL is not set
 # CONFIG_EXT2_FS_SECURITY is not set
 # CONFIG_EXT3_FS is not set
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
 CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
+# CONFIG_BTRFS_FS is not set
-# CONFIG_ROMFS_FS is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
 # CONFIG_QUOTA is not set
-# CONFIG_DNOTIFY is not set
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_FUSE_FS is not set
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -781,8 +966,11 @@ CONFIG_INOTIFY_USER=y
 #
 # DOS/FAT/NT Filesystems
 #
-# CONFIG_MSDOS_FS is not set
+CONFIG_FAT_FS=y
-# CONFIG_VFAT_FS is not set
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 # CONFIG_NTFS_FS is not set
 #
@@ -794,10 +982,7 @@ CONFIG_SYSFS=y
 # CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
-#
-# Miscellaneous filesystems
-#
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -805,14 +990,28 @@ CONFIG_SYSFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-# CONFIG_YAFFS_FS is not set
+CONFIG_JFFS2_FS=y
-# CONFIG_JFFS2_FS is not set
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -827,11 +1026,47 @@ CONFIG_NETWORK_FILESYSTEMS=y
 #
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
-# CONFIG_NLS is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
 # CONFIG_DLM is not set
-CONFIG_INSTRUMENTATION=y
-# CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 #
 # Kernel hacking
@@ -839,14 +1074,40 @@ CONFIG_INSTRUMENTATION=y
 # CONFIG_PRINTK_TIME is not set
 CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
 # CONFIG_DEBUG_KERNEL is not set
-CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_DEBUG_VERBOSE=y
 CONFIG_DEBUG_MMRS=y
+# CONFIG_DEBUG_DOUBLEFAULT is not set
 CONFIG_DEBUG_HUNT_FOR_ZERO=y
 CONFIG_DEBUG_BFIN_HWTRACE_ON=y
 CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
@@ -855,33 +1116,40 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
 CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
 # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
 # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
-# CONFIG_EARLY_PRINTK is not set
+CONFIG_EARLY_PRINTK=y
-# CONFIG_DUAL_CORE_TEST_MODULE is not set
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 #
 # Security options
 #
 # CONFIG_KEYS is not set
 CONFIG_SECURITY=y
+# CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_NETWORK is not set
-CONFIG_SECURITY_CAPABILITIES=y
+# CONFIG_SECURITY_PATH is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_SECURITY_TOMOYO is not set
 # CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
-# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=y
 CONFIG_CRC32=y
-# CONFIG_CRC7 is not set
+CONFIG_CRC7=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
-CONFIG_PLIST=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_DECOMPRESS_LZMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/H8606_defconfig b/arch/blackfin/configs/H8606_defconfig
index a6a7c8ede705..bc7fae3d8b83 100644
--- a/arch/blackfin/configs/H8606_defconfig
+++ b/arch/blackfin/configs/H8606_defconfig
@@ -67,6 +67,7 @@ CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 CONFIG_RT_MUTEXES=y
 CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
@@ -249,6 +250,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_RESOURCES_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_LARGE_ALLOCS=y
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 CONFIG_BFIN_GPTIMERS=y
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
diff --git a/arch/blackfin/configs/IP0X_defconfig b/arch/blackfin/configs/IP0X_defconfig
index 1ec9ae2e964b..a7e49d631229 100644
--- a/arch/blackfin/configs/IP0X_defconfig
+++ b/arch/blackfin/configs/IP0X_defconfig
@@ -68,6 +68,7 @@ CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 CONFIG_RT_MUTEXES=y
 CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
@@ -261,6 +262,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_RESOURCES_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_LARGE_ALLOCS=y
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 # CONFIG_BFIN_GPTIMERS is not set
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
diff --git a/arch/blackfin/configs/PNAV-10_defconfig b/arch/blackfin/configs/PNAV-10_defconfig
index ff377fae061b..67d12768602a 100644
--- a/arch/blackfin/configs/PNAV-10_defconfig
+++ b/arch/blackfin/configs/PNAV-10_defconfig
@@ -63,6 +63,7 @@ CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
@@ -285,6 +286,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 CONFIG_BFIN_GPTIMERS=y
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
diff --git a/arch/blackfin/configs/SRV1_defconfig b/arch/blackfin/configs/SRV1_defconfig
index 814f9cacf407..52bfa6bf18da 100644
--- a/arch/blackfin/configs/SRV1_defconfig
+++ b/arch/blackfin/configs/SRV1_defconfig
@@ -72,6 +72,7 @@ CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 CONFIG_RT_MUTEXES=y
 CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
@@ -271,6 +272,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_RESOURCES_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_LARGE_ALLOCS=y
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 CONFIG_DMA_UNCACHED_2M=y
 # CONFIG_DMA_UNCACHED_1M is not set
 # CONFIG_DMA_UNCACHED_NONE is not set
@@ -700,7 +702,7 @@ CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_YEALINK is not set
 CONFIG_INPUT_UINPUT=y
 # CONFIG_BF53X_PFBUTTONS is not set
-# CONFIG_TWI_KEYPAD is not set
+# CONFIG_INPUT_PCF8574 is not set
 #
 # Hardware I/O ports
diff --git a/arch/blackfin/configs/TCM-BF537_defconfig b/arch/blackfin/configs/TCM-BF537_defconfig
index 375e75a27abc..60adfad54db9 100644
--- a/arch/blackfin/configs/TCM-BF537_defconfig
+++ b/arch/blackfin/configs/TCM-BF537_defconfig
@@ -1,13 +1,13 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28-rc2
+# Linux kernel version: 2.6.30.5
-# Tue Jan  6 09:22:17 2009
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
@@ -16,6 +16,9 @@ CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 #
@@ -26,49 +29,72 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+# CONFIG_KERNEL_GZIP is not set
+# CONFIG_KERNEL_BZIP2 is not set
+CONFIG_KERNEL_LZMA=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
-# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_RD_GZIP is not set
+# CONFIG_RD_BZIP2 is not set
+CONFIG_RD_LZMA=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SYSCTL is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 # CONFIG_UID16 is not set
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
-# CONFIG_HOTPLUG is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 # CONFIG_AIO is not set
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
+# CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
-CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -76,11 +102,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
@@ -96,7 +119,6 @@ CONFIG_IOSCHED_CFQ=y
 # CONFIG_DEFAULT_CFQ is not set
 CONFIG_DEFAULT_NOOP=y
 CONFIG_DEFAULT_IOSCHED="noop"
-CONFIG_CLASSIC_RCU=y
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
@@ -128,10 +150,15 @@ CONFIG_BF537=y
 # CONFIG_BF538 is not set
 # CONFIG_BF539 is not set
 # CONFIG_BF542 is not set
+# CONFIG_BF542M is not set
 # CONFIG_BF544 is not set
+# CONFIG_BF544M is not set
 # CONFIG_BF547 is not set
+# CONFIG_BF547M is not set
 # CONFIG_BF548 is not set
+# CONFIG_BF548M is not set
 # CONFIG_BF549 is not set
+# CONFIG_BF549M is not set
 # CONFIG_BF561 is not set
 CONFIG_BF_REV_MIN=2
 CONFIG_BF_REV_MAX=3
@@ -173,11 +200,11 @@ CONFIG_IRQ_MEM_DMA1=13
 CONFIG_IRQ_WATCH=13
 CONFIG_IRQ_SPI=10
 # CONFIG_BFIN537_STAMP is not set
-# CONFIG_BFIN537_BLUETECHNIX_CM is not set
+# CONFIG_BFIN537_BLUETECHNIX_CM_E is not set
+# CONFIG_BFIN537_BLUETECHNIX_CM_U is not set
 CONFIG_BFIN537_BLUETECHNIX_TCM=y
 # CONFIG_PNAV10 is not set
 # CONFIG_CAMSIG_MINOTAUR is not set
-# CONFIG_GENERIC_BF537_BOARD is not set
 #
 # BF537 Specific Configuration
@@ -223,7 +250,10 @@ CONFIG_HZ=250
 # CONFIG_SCHED_HRTICK is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
 # CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
 # CONFIG_NO_HZ is not set
 # CONFIG_HIGH_RES_TIMERS is not set
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
@@ -273,10 +303,12 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 # CONFIG_BFIN_GPTIMERS is not set
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
@@ -287,10 +319,9 @@ CONFIG_DMA_UNCACHED_1M=y
 # Cache Support
 #
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
 CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -301,7 +332,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 #
-# Asynchonous Memory Configuration
+# Asynchronous Memory Configuration
 #
 #
@@ -327,6 +358,7 @@ CONFIG_BANK_3=0xFFC2
 # Bus options (PCI, PCMCIA, EISA, MCA, ISA)
 #
 # CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
 #
 # Executable file formats
@@ -343,13 +375,83 @@ CONFIG_BINFMT_SHARED_FLAT=y
 #
 # CONFIG_PM is not set
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
-# CONFIG_PM_WAKEUP_BY_GPIO is not set
 #
 # CPU Frequency scaling
 #
 # CONFIG_CPU_FREQ is not set
-# CONFIG_NET is not set
+CONFIG_NET=y
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_LRO=y
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
 #
 # Device Drivers
@@ -358,15 +460,21 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 #
 # Generic Driver Options
 #
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AR7_PARTS is not set
 #
@@ -402,9 +510,10 @@ CONFIG_MTD_CFI_I2=y
 CONFIG_MTD_CFI_INTELEXT=y
 # CONFIG_MTD_CFI_AMDSTD is not set
 # CONFIG_MTD_CFI_STAA is not set
+# CONFIG_MTD_PSD4256G is not set
 CONFIG_MTD_CFI_UTIL=y
 CONFIG_MTD_RAM=y
-# CONFIG_MTD_ROM is not set
+CONFIG_MTD_ROM=m
 # CONFIG_MTD_ABSENT is not set
 #
@@ -413,7 +522,7 @@ CONFIG_MTD_RAM=y
 CONFIG_MTD_COMPLEX_MAPPINGS=y
 # CONFIG_MTD_PHYSMAP is not set
 CONFIG_MTD_GPIO_ADDR=y
-CONFIG_MTD_UCLINUX=y
+# CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
 #
@@ -436,6 +545,11 @@ CONFIG_MTD_UCLINUX=y
 # CONFIG_MTD_ONENAND is not set
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -443,15 +557,23 @@ CONFIG_MTD_UCLINUX=y
 CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 # CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_BLK_DEV_XIP is not set
 # CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
 # CONFIG_BLK_DEV_HD is not set
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_C2PORT is not set
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
@@ -464,6 +586,74 @@ CONFIG_HAVE_IDE=y
 # CONFIG_SCSI_NETLINK is not set
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_BFIN_MAC=y
+CONFIG_BFIN_MAC_USE_L1=y
+CONFIG_BFIN_TX_DESC_NUM=10
+CONFIG_BFIN_RX_DESC_NUM=20
+# CONFIG_BFIN_MAC_RMII is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
 # CONFIG_PHONE is not set
 #
@@ -480,15 +670,12 @@ CONFIG_HAVE_IDE=y
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
+CONFIG_BFIN_DMA_INTERFACE=m
-# CONFIG_SPI_ADC_BF533 is not set
+# CONFIG_BFIN_PPI is not set
-# CONFIG_BF5xx_PPIFCD is not set
+# CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-# CONFIG_BF5xx_PPI is not set
+# CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=y
-# CONFIG_BFIN_TIMER_LATENCY is not set
-CONFIG_BFIN_DMA_INTERFACE=m
-# CONFIG_SIMPLE_GPIO is not set
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
 # CONFIG_BFIN_JTAG_COMM is not set
@@ -502,6 +689,7 @@ CONFIG_BFIN_DMA_INTERFACE=m
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
 CONFIG_SERIAL_BFIN_DMA=y
@@ -514,6 +702,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
 #
@@ -534,39 +723,17 @@ CONFIG_SPI_MASTER=y
 #
 CONFIG_SPI_BFIN=y
 # CONFIG_SPI_BFIN_LOCK is not set
+# CONFIG_SPI_BFIN_SPORT is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 #
 # SPI Protocol Masters
 #
-# CONFIG_EEPROM_AT25 is not set
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-CONFIG_GPIOLIB=y
+# CONFIG_GPIOLIB is not set
-# CONFIG_DEBUG_GPIO is not set
-CONFIG_GPIO_SYSFS=y
-#
-# Memory mapped GPIO expanders:
-#
-#
-# I2C GPIO expanders:
-#
-# CONFIG_GPIO_MAX732X is not set
-# CONFIG_GPIO_PCA953X is not set
-# CONFIG_GPIO_PCF857X is not set
-#
-# PCI GPIO expanders:
-#
-#
-# SPI GPIO expanders:
-#
-# CONFIG_GPIO_MAX7301 is not set
-# CONFIG_GPIO_MCP23S08 is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
@@ -580,6 +747,12 @@ CONFIG_WATCHDOG=y
 #
 # CONFIG_SOFT_WATCHDOG is not set
 CONFIG_BFIN_WDT=y
+CONFIG_SSB_POSSIBLE=y
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
 #
 # Multifunction device drivers
@@ -588,7 +761,7 @@ CONFIG_BFIN_WDT=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
-# CONFIG_MFD_WM8400 is not set
+# CONFIG_REGULATOR is not set
 #
 # Multimedia devices
@@ -598,6 +771,7 @@ CONFIG_BFIN_WDT=y
 # Multimedia core support
 #
 # CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
 # CONFIG_VIDEO_MEDIA is not set
 #
@@ -618,13 +792,81 @@ CONFIG_BFIN_WDT=y
 #
 # CONFIG_DISPLAY_SUPPORT is not set
 # CONFIG_SOUND is not set
-# CONFIG_USB_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
-# CONFIG_MMC is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+CONFIG_USB_GADGET_NET2272=y
+CONFIG_USB_NET2272=y
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+CONFIG_USB_ETH=y
+CONFIG_USB_ETH_RNDIS=y
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+CONFIG_MMC_SPI=m
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_RTC_CLASS is not set
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
 # CONFIG_STAGING is not set
@@ -641,8 +883,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_FILE_LOCKING=y
 # CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -652,6 +896,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -660,8 +909,11 @@ CONFIG_INOTIFY_USER=y
 #
 # DOS/FAT/NT Filesystems
 #
-# CONFIG_MSDOS_FS is not set
+CONFIG_FAT_FS=y
-# CONFIG_VFAT_FS is not set
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 # CONFIG_NTFS_FS is not set
 #
@@ -673,10 +925,7 @@ CONFIG_SYSFS=y
 # CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
-#
-# Miscellaneous filesystems
-#
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -684,9 +933,19 @@ CONFIG_SYSFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-# CONFIG_YAFFS_FS is not set
+CONFIG_JFFS2_FS=y
-# CONFIG_JFFS2_FS is not set
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -695,13 +954,62 @@ CONFIG_SYSFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+# CONFIG_NFS_FS is not set
+# CONFIG_NFSD is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
 #
 # Partition Types
 #
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
-# CONFIG_NLS is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
 #
 # Kernel hacking
@@ -714,12 +1022,30 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
 # CONFIG_DEBUG_KERNEL is not set
-CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_DEBUG_VERBOSE=y
@@ -733,9 +1059,10 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
 CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
 # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
 # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
-# CONFIG_EARLY_PRINTK is not set
+CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 #
 # Security options
@@ -744,20 +1071,110 @@ CONFIG_ACCESS_CHECK=y
 # CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
-# CONFIG_CRYPTO is not set
+CONFIG_CRYPTO=y
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_MANAGER2 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 #
 # Library routines
 #
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 # CONFIG_CRC_CCITT is not set
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
-# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC_ITU_T=y
-# CONFIG_CRC32 is not set
+CONFIG_CRC32=y
-# CONFIG_CRC7 is not set
+CONFIG_CRC7=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
-CONFIG_PLIST=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_DECOMPRESS_LZMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/include/asm/bfin-global.h b/arch/blackfin/include/asm/bfin-global.h
index 10064f902d20..e6485c305ea6 100644
--- a/arch/blackfin/include/asm/bfin-global.h
+++ b/arch/blackfin/include/asm/bfin-global.h
@@ -11,9 +11,6 @@
 #ifndef __ASSEMBLY__
-#include <asm/sections.h>
-#include <asm/ptrace.h>
-#include <asm/user.h>
 #include <linux/linkage.h>
 #include <linux/types.h>
@@ -23,6 +20,12 @@
 # define DMA_UNCACHED_REGION (2 * 1024 * 1024)
 #elif defined(CONFIG_DMA_UNCACHED_1M)
 # define DMA_UNCACHED_REGION (1024 * 1024)
+#elif defined(CONFIG_DMA_UNCACHED_512K)
+# define DMA_UNCACHED_REGION (512 * 1024)
+#elif defined(CONFIG_DMA_UNCACHED_256K)
+# define DMA_UNCACHED_REGION (256 * 1024)
+#elif defined(CONFIG_DMA_UNCACHED_128K)
+# define DMA_UNCACHED_REGION (128 * 1024)
 #else
 # define DMA_UNCACHED_REGION (0)
 #endif
@@ -35,6 +38,7 @@ extern unsigned long get_sclk(void);
 extern unsigned long sclk_to_usecs(unsigned long sclk);
 extern unsigned long usecs_to_sclk(unsigned long usecs);
+struct pt_regs;
 extern void dump_bfin_process(struct pt_regs *regs);
 extern void dump_bfin_mem(struct pt_regs *regs);
 extern void dump_bfin_trace_buffer(void);
diff --git a/arch/blackfin/include/asm/bfin-lq035q1.h b/arch/blackfin/include/asm/bfin-lq035q1.h
new file mode 100644
index 000000000000..57bc21ac2296
--- /dev/null
+++ b/arch/blackfin/include/asm/bfin-lq035q1.h
@@ -0,0 +1,28 @@
+/*
+ * Blackfin LCD Framebuffer driver SHARP LQ035Q1DH02
+ *
+ * Copyright 2008-2009 Analog Devices Inc.
+ * Licensed under the GPL-2 or later.
+ */
+#ifndef BFIN_LQ035Q1_H
+#define BFIN_LQ035Q1_H
+#define LQ035_RL        (0 << 8)        /* Right -> Left Scan */
+#define LQ035_LR        (1 << 8)        /* Left -> Right Scan */
+#define LQ035_TB        (1 << 9)        /* Top -> Botton Scan */
+#define LQ035_BT        (0 << 9)        /* Botton -> Top Scan */
+#define LQ035_BGR       (1 << 11)       /* Use BGR format */
+#define LQ035_RGB       (0 << 11)       /* Use RGB format */
+#define LQ035_NORM      (1 << 13)       /* Reversal */
+#define LQ035_REV       (0 << 13)       /* Reversal */
+struct bfin_lq035q1fb_disp_info {
+        unsigned        mode;
+        /* GPIOs */
+        int             use_bl;
+        unsigned        gpio_bl;
+};
+#endif /* BFIN_LQ035Q1_H */
diff --git a/arch/blackfin/include/asm/bug.h b/arch/blackfin/include/asm/bug.h
index 6f4548a13555..75f6dc336d46 100644
--- a/arch/blackfin/include/asm/bug.h
+++ b/arch/blackfin/include/asm/bug.h
@@ -47,7 +47,7 @@
 #define BUG()                                                           \
        do {                                                            \
                _BUG_OR_WARN(0);                                        \
-                for (;;);                                               \
+                unreachable();                                          \
        } while (0)
 #define WARN_ON(condition)                                                      \
diff --git a/arch/blackfin/include/asm/cacheflush.h b/arch/blackfin/include/asm/cacheflush.h
index 417eaac7fe99..2666ff8ea952 100644
--- a/arch/blackfin/include/asm/cacheflush.h
+++ b/arch/blackfin/include/asm/cacheflush.h
@@ -10,6 +10,7 @@
 #define _BLACKFIN_CACHEFLUSH_H
 #include <asm/blackfin.h>       /* for SSYNC() */
+#include <asm/sections.h>       /* for _ramend */
 extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address);
 extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address);
diff --git a/arch/blackfin/include/asm/checksum.h b/arch/blackfin/include/asm/checksum.h
index a23415be0de1..623cc7fb00bc 100644
--- a/arch/blackfin/include/asm/checksum.h
+++ b/arch/blackfin/include/asm/checksum.h
@@ -9,63 +9,12 @@
 #define _BFIN_CHECKSUM_H
 /*
- * computes the checksum of a memory block at buff, length len,
- * and adds in "sum" (32-bit)
- *
- * returns a 32-bit number suitable for feeding into itself
- * or csum_tcpudp_magic
- *
- * this function must be called with even lengths, except
- * for the last fragment, which may be odd
- *
- * it's best to have buff aligned on a 32-bit boundary
- */
-__wsum csum_partial(const void *buff, int len, __wsum sum);
-/*
- * the same as csum_partial, but copies from src while it
- * checksums
- *
- * here even more important to align src and dst on a 32-bit (or even
- * better 64-bit) boundary
- */
-__wsum csum_partial_copy(const void *src, void *dst,
-                               int len, __wsum sum);
-/*
- * the same as csum_partial_copy, but copies from user space.
- *
- * here even more important to align src and dst on a 32-bit (or even
- * better 64-bit) boundary
- */
-extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
-                                          int len, __wsum sum, int *csum_err);
-#define csum_partial_copy_nocheck(src, dst, len, sum)   \
-        csum_partial_copy((src), (dst), (len), (sum))
-__sum16 ip_fast_csum(unsigned char *iph, unsigned int ihl);
-/*
- *      Fold a partial checksum
- */
-static inline __sum16 csum_fold(__wsum sum)
-{
-        while (sum >> 16)
-                sum = (sum & 0xffff) + (sum >> 16);
-        return ((~(sum << 16)) >> 16);
-}
-/*
 * computes the checksum of the TCP/UDP pseudo-header
 * returns a 16-bit checksum, already complemented
 */
 static inline __wsum
-csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
+__csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
                   unsigned short proto, __wsum sum)
 {
        unsigned int carry;
@@ -88,19 +37,8 @@ csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
        return (sum);
 }
+#define csum_tcpudp_nofold __csum_tcpudp_nofold
-static inline __sum16
+#include <asm-generic/checksum.h>
-csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
-                  unsigned short proto, __wsum sum)
-{
-        return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
-}
-/*
- * this routine is used for miscellaneous IP-like checksums, mainly
- * in icmp.c
- */
-extern __sum16 ip_compute_csum(const void *buff, int len);
-#endif                          /* _BFIN_CHECKSUM_H */
+#endif
diff --git a/arch/blackfin/include/asm/clocks.h b/arch/blackfin/include/asm/clocks.h
index f80dad5ff257..6f0b61852f58 100644
--- a/arch/blackfin/include/asm/clocks.h
+++ b/arch/blackfin/include/asm/clocks.h
@@ -9,6 +9,8 @@
 #ifndef _BFIN_CLOCKS_H
 #define _BFIN_CLOCKS_H
+#include <asm/dpmc.h>
 #ifdef CONFIG_CCLK_DIV_1
 # define CONFIG_CCLK_ACT_DIV   CCLK_DIV1
 # define CONFIG_CCLK_DIV 1
diff --git a/arch/blackfin/include/asm/dma-mapping.h b/arch/blackfin/include/asm/dma-mapping.h
index 7a23d824ac96..f9172ff30e5c 100644
--- a/arch/blackfin/include/asm/dma-mapping.h
+++ b/arch/blackfin/include/asm/dma-mapping.h
@@ -7,9 +7,9 @@
 #ifndef _BLACKFIN_DMA_MAPPING_H
 #define _BLACKFIN_DMA_MAPPING_H
-#include <asm/scatterlist.h>
+#include <asm/cacheflush.h>
+struct scatterlist;
-void dma_alloc_init(unsigned long start, unsigned long end);
 void *dma_alloc_coherent(struct device *dev, size_t size,
                         dma_addr_t *dma_handle, gfp_t gfp);
 void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
@@ -20,13 +20,51 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
 */
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
+#define dma_supported(d, m)         (1)
+#define dma_get_cache_alignment()   (32)
+#define dma_is_consistent(d, h)     (1)
-static inline
+static inline int
-int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
+dma_set_mask(struct device *dev, u64 dma_mask)
 {
+        if (!dev->dma_mask || !dma_supported(dev, dma_mask))
+                return -EIO;
+        *dev->dma_mask = dma_mask;
        return 0;
 }
+static inline int
+dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
+{
+        return 0;
+}
+extern void
+__dma_sync(dma_addr_t addr, size_t size, enum dma_data_direction dir);
+static inline void
+_dma_sync(dma_addr_t addr, size_t size, enum dma_data_direction dir)
+{
+        if (!__builtin_constant_p(dir)) {
+                __dma_sync(addr, size, dir);
+                return;
+        }
+        switch (dir) {
+        case DMA_NONE:
+                BUG();
+        case DMA_TO_DEVICE:             /* writeback only */
+                flush_dcache_range(addr, addr + size);
+                break;
+        case DMA_FROM_DEVICE: /* invalidate only */
+        case DMA_BIDIRECTIONAL: /* flush and invalidate */
+                /* Blackfin has no dedicated invalidate (it includes a flush) */
+                invalidate_dcache_range(addr, addr + size);
+                break;
+        }
+}
 /*
 * Map a single buffer of the indicated size for DMA in streaming mode.
 * The 32-bit bus address to use is returned.
@@ -34,8 +72,13 @@ int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 * Once the device is given the dma address, the device owns this memory
 * until either pci_unmap_single or pci_dma_sync_single is performed.
 */
-extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
+static inline dma_addr_t
-                                 enum dma_data_direction direction);
+dma_map_single(struct device *dev, void *ptr, size_t size,
+               enum dma_data_direction dir)
+{
+        _dma_sync((dma_addr_t)ptr, size, dir);
+        return (dma_addr_t) ptr;
+}
 static inline dma_addr_t
 dma_map_page(struct device *dev, struct page *page,
@@ -53,8 +96,12 @@ dma_map_page(struct device *dev, struct page *page,
 * After this call, reads by the cpu to the buffer are guarenteed to see
 * whatever the device wrote there.
 */
-extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
+static inline void
-                          enum dma_data_direction direction);
+dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
+                 enum dma_data_direction dir)
+{
+        BUG_ON(!valid_dma_direction(dir));
+}
 static inline void
 dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,
@@ -80,38 +127,66 @@ dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,
 * the same here.
 */
 extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
-                      enum dma_data_direction direction);
+                      enum dma_data_direction dir);
 /*
 * Unmap a set of streaming mode DMA translations.
 * Again, cpu read rules concerning calls here are the same as for
 * pci_unmap_single() above.
 */
-extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
+static inline void
-                      int nhwentries, enum dma_data_direction direction);
+dma_unmap_sg(struct device *dev, struct scatterlist *sg,
+             int nhwentries, enum dma_data_direction dir)
+{
+        BUG_ON(!valid_dma_direction(dir));
+}
-static inline void dma_sync_single_for_cpu(struct device *dev,
+static inline void
-                                        dma_addr_t handle, size_t size,
+dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t handle,
-                                        enum dma_data_direction dir)
+                              unsigned long offset, size_t size,
+                              enum dma_data_direction dir)
 {
+        BUG_ON(!valid_dma_direction(dir));
 }
-static inline void dma_sync_single_for_device(struct device *dev,
+static inline void
-                                        dma_addr_t handle, size_t size,
+dma_sync_single_range_for_device(struct device *dev, dma_addr_t handle,
-                                        enum dma_data_direction dir)
+                                 unsigned long offset, size_t size,
+                                 enum dma_data_direction dir)
 {
+        _dma_sync(handle + offset, size, dir);
 }
-static inline void dma_sync_sg_for_cpu(struct device *dev,
+static inline void
-                                        struct scatterlist *sg,
+dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size,
-                                        int nents, enum dma_data_direction dir)
+                        enum dma_data_direction dir)
 {
+        dma_sync_single_range_for_cpu(dev, handle, 0, size, dir);
 }
-static inline void dma_sync_sg_for_device(struct device *dev,
+static inline void
-                                        struct scatterlist *sg,
+dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size,
-                                        int nents, enum dma_data_direction dir)
+                           enum dma_data_direction dir)
+{
+        dma_sync_single_range_for_device(dev, handle, 0, size, dir);
+}
+static inline void
+dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
+                    enum dma_data_direction dir)
+{
+        BUG_ON(!valid_dma_direction(dir));
+}
+extern void
+dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
+                       int nents, enum dma_data_direction dir);
+static inline void
+dma_cache_sync(struct device *dev, void *vaddr, size_t size,
+               enum dma_data_direction dir)
 {
+        _dma_sync((dma_addr_t)vaddr, size, dir);
 }
 #endif                          /* _BLACKFIN_DMA_MAPPING_H */
diff --git a/arch/blackfin/include/asm/dma.h b/arch/blackfin/include/asm/dma.h
index c9a59622e23f..bd2e62243abe 100644
--- a/arch/blackfin/include/asm/dma.h
+++ b/arch/blackfin/include/asm/dma.h
@@ -10,46 +10,70 @@
 #include <linux/interrupt.h>
 #include <mach/dma.h>
+#include <asm/atomic.h>
 #include <asm/blackfin.h>
 #include <asm/page.h>
+#include <asm-generic/dma.h>
-#define MAX_DMA_ADDRESS PAGE_OFFSET
+/* DMA_CONFIG Masks */
-/*****************************************************************************
+#define DMAEN                   0x0001  /* DMA Channel Enable */
-*        Generic DMA  Declarations
+#define WNR                             0x0002  /* Channel Direction (W/R*) */
-*
+#define WDSIZE_8                0x0000  /* Transfer Word Size = 8 */
-****************************************************************************/
+#define WDSIZE_16               0x0004  /* Transfer Word Size = 16 */
-enum dma_chan_status {
+#define WDSIZE_32               0x0008  /* Transfer Word Size = 32 */
-        DMA_CHANNEL_FREE,
+#define DMA2D                   0x0010  /* DMA Mode (2D/1D*) */
-        DMA_CHANNEL_REQUESTED,
+#define RESTART                 0x0020  /* DMA Buffer Clear */
-        DMA_CHANNEL_ENABLED,
+#define DI_SEL                  0x0040  /* Data Interrupt Timing Select */
-};
+#define DI_EN                   0x0080  /* Data Interrupt Enable */
+#define NDSIZE_0                0x0000  /* Next Descriptor Size = 0 (Stop/Autobuffer) */
+#define NDSIZE_1                0x0100  /* Next Descriptor Size = 1 */
+#define NDSIZE_2                0x0200  /* Next Descriptor Size = 2 */
+#define NDSIZE_3                0x0300  /* Next Descriptor Size = 3 */
+#define NDSIZE_4                0x0400  /* Next Descriptor Size = 4 */
+#define NDSIZE_5                0x0500  /* Next Descriptor Size = 5 */
+#define NDSIZE_6                0x0600  /* Next Descriptor Size = 6 */
+#define NDSIZE_7                0x0700  /* Next Descriptor Size = 7 */
+#define NDSIZE_8                0x0800  /* Next Descriptor Size = 8 */
+#define NDSIZE_9                0x0900  /* Next Descriptor Size = 9 */
+#define NDSIZE                  0x0f00  /* Next Descriptor Size */
+#define DMAFLOW                 0x7000  /* Flow Control */
+#define DMAFLOW_STOP    0x0000  /* Stop Mode */
+#define DMAFLOW_AUTO    0x1000  /* Autobuffer Mode */
+#define DMAFLOW_ARRAY   0x4000  /* Descriptor Array Mode */
+#define DMAFLOW_SMALL   0x6000  /* Small Model Descriptor List Mode */
+#define DMAFLOW_LARGE   0x7000  /* Large Model Descriptor List Mode */
+/* DMA_IRQ_STATUS Masks */
+#define DMA_DONE                0x0001  /* DMA Completion Interrupt Status */
+#define DMA_ERR                 0x0002  /* DMA Error Interrupt Status */
+#define DFETCH                  0x0004  /* DMA Descriptor Fetch Indicator */
+#define DMA_RUN                 0x0008  /* DMA Channel Running Indicator */
 /*-------------------------
 * config reg bits value
 *-------------------------*/
-#define DATA_SIZE_8             0
+#define DATA_SIZE_8                     0
-#define DATA_SIZE_16            1
+#define DATA_SIZE_16            1
-#define DATA_SIZE_32            2
+#define DATA_SIZE_32            2
-#define DMA_FLOW_STOP           0
+#define DMA_FLOW_STOP           0
-#define DMA_FLOW_AUTO           1
+#define DMA_FLOW_AUTO           1
-#define DMA_FLOW_ARRAY          4
+#define DMA_FLOW_ARRAY          4
-#define DMA_FLOW_SMALL          6
+#define DMA_FLOW_SMALL          6
-#define DMA_FLOW_LARGE          7
+#define DMA_FLOW_LARGE          7
-#define DIMENSION_LINEAR    0
+#define DIMENSION_LINEAR        0
-#define DIMENSION_2D           1
+#define DIMENSION_2D            1
-#define DIR_READ     0
+#define DIR_READ                        0
-#define DIR_WRITE    1
+#define DIR_WRITE                       1
-#define INTR_DISABLE   0
+#define INTR_DISABLE            0
-#define INTR_ON_BUF    2
+#define INTR_ON_BUF                     2
-#define INTR_ON_ROW    3
+#define INTR_ON_ROW                     3
 #define DMA_NOSYNC_KEEP_DMA_BUF 0
-#define DMA_SYNC_RESTART        1
+#define DMA_SYNC_RESTART                1
 struct dmasg {
        void *next_desc_addr;
@@ -104,11 +128,9 @@ struct dma_register {
 };
-struct mutex;
 struct dma_channel {
-        struct mutex dmalock;
        const char *device_id;
-        enum dma_chan_status chan_status;
+        atomic_t chan_status;
        volatile struct dma_register *regs;
        struct dmasg *sg;               /* large mode descriptor */
        unsigned int irq;
@@ -220,27 +242,20 @@ static inline void set_dma_sg(unsigned int channel, struct dmasg *sg, int ndsize
 static inline int dma_channel_active(unsigned int channel)
 {
-        if (dma_ch[channel].chan_status == DMA_CHANNEL_FREE)
+        return atomic_read(&dma_ch[channel].chan_status);
-                return 0;
-        else
-                return 1;
 }
 static inline void disable_dma(unsigned int channel)
 {
        dma_ch[channel].regs->cfg &= ~DMAEN;
        SSYNC();
-        dma_ch[channel].chan_status = DMA_CHANNEL_REQUESTED;
 }
 static inline void enable_dma(unsigned int channel)
 {
        dma_ch[channel].regs->curr_x_count = 0;
        dma_ch[channel].regs->curr_y_count = 0;
        dma_ch[channel].regs->cfg |= DMAEN;
-        dma_ch[channel].chan_status = DMA_CHANNEL_ENABLED;
 }
-void free_dma(unsigned int channel);
-int request_dma(unsigned int channel, const char *device_id);
 int set_dma_callback(unsigned int channel, irq_handler_t callback, void *data);
 static inline void dma_disable_irq(unsigned int channel)
diff --git a/arch/blackfin/include/asm/dpmc.h b/arch/blackfin/include/asm/dpmc.h
index 925e66cb2d49..1597ae5041ee 100644
--- a/arch/blackfin/include/asm/dpmc.h
+++ b/arch/blackfin/include/asm/dpmc.h
@@ -1,7 +1,7 @@
 /*
 * Miscellaneous IOCTL commands for Dynamic Power Management Controller Driver
 *
- * Copyright (C) 2004-2008 Analog Device Inc.
+ * Copyright (C) 2004-2009 Analog Device Inc.
 *
 * Licensed under the GPL-2
 */
@@ -9,7 +9,109 @@
 #ifndef _BLACKFIN_DPMC_H_
 #define _BLACKFIN_DPMC_H_
-#ifdef __KERNEL__
+/* PLL_CTL Masks */
+#define DF                      0x0001  /* 0: PLL = CLKIN, 1: PLL = CLKIN/2 */
+#define PLL_OFF                 0x0002  /* PLL Not Powered */
+#define STOPCK                  0x0008  /* Core Clock Off */
+#define PDWN                    0x0020  /* Enter Deep Sleep Mode */
+#ifdef __ADSPBF539__
+# define IN_DELAY               0x0014  /* Add 200ps Delay To EBIU Input Latches */
+# define OUT_DELAY              0x00C0  /* Add 200ps Delay To EBIU Output Signals */
+#else
+# define IN_DELAY               0x0040  /* Add 200ps Delay To EBIU Input Latches */
+# define OUT_DELAY              0x0080  /* Add 200ps Delay To EBIU Output Signals */
+#endif
+#define BYPASS                  0x0100  /* Bypass the PLL */
+#define MSEL                    0x7E00  /* Multiplier Select For CCLK/VCO Factors */
+#define SPORT_HYST              0x8000  /* Enable Additional Hysteresis on SPORT Input Pins */
+#define SET_MSEL(x)             (((x)&0x3F) << 0x9)     /* Set MSEL = 0-63 --> VCO = CLKIN*MSEL */
+/* PLL_DIV Masks */
+#define SSEL                    0x000F  /* System Select */
+#define CSEL                    0x0030  /* Core Select */
+#define CSEL_DIV1               0x0000  /* CCLK = VCO / 1 */
+#define CSEL_DIV2               0x0010  /* CCLK = VCO / 2 */
+#define CSEL_DIV4               0x0020  /* CCLK = VCO / 4 */
+#define CSEL_DIV8               0x0030  /* CCLK = VCO / 8 */
+#define CCLK_DIV1 CSEL_DIV1
+#define CCLK_DIV2 CSEL_DIV2
+#define CCLK_DIV4 CSEL_DIV4
+#define CCLK_DIV8 CSEL_DIV8
+#define SET_SSEL(x)     ((x) & 0xF)     /* Set SSEL = 0-15 --> SCLK = VCO/SSEL */
+#define SCLK_DIV(x)     (x)             /* SCLK = VCO / x */
+/* PLL_STAT Masks */
+#define ACTIVE_PLLENABLED       0x0001  /* Processor In Active Mode With PLL Enabled */
+#define FULL_ON                 0x0002  /* Processor In Full On Mode */
+#define ACTIVE_PLLDISABLED      0x0004  /* Processor In Active Mode With PLL Disabled */
+#define PLL_LOCKED              0x0020  /* PLL_LOCKCNT Has Been Reached */
+#define RTCWS                   0x0400  /* RTC/Reset Wake-Up Status */
+#define CANWS                   0x0800  /* CAN Wake-Up Status */
+#define USBWS                   0x2000  /* USB Wake-Up Status */
+#define KPADWS                  0x4000  /* Keypad Wake-Up Status */
+#define ROTWS                   0x8000  /* Rotary Wake-Up Status */
+#define GPWS                    0x1000  /* General-Purpose Wake-Up Status */
+/* VR_CTL Masks */
+#if defined(__ADSPBF52x__) || defined(__ADSPBF51x__)
+#define FREQ                    0x3000  /* Switching Oscillator Frequency For Regulator */
+#define FREQ_1000               0x3000  /* Switching Frequency Is 1 MHz */
+#else
+#define FREQ                    0x0003  /* Switching Oscillator Frequency For Regulator */
+#define FREQ_333                0x0001  /* Switching Frequency Is 333 kHz */
+#define FREQ_667                0x0002  /* Switching Frequency Is 667 kHz */
+#define FREQ_1000               0x0003  /* Switching Frequency Is 1 MHz */
+#endif
+#define HIBERNATE               0x0000  /* Powerdown/Bypass On-Board Regulation */
+#define GAIN                    0x000C  /* Voltage Level Gain */
+#define GAIN_5                  0x0000  /* GAIN = 5 */
+#define GAIN_10                 0x0004  /* GAIN = 1 */
+#define GAIN_20                 0x0008  /* GAIN = 2 */
+#define GAIN_50                 0x000C  /* GAIN = 5 */
+#define VLEV                    0x00F0  /* Internal Voltage Level */
+#ifdef __ADSPBF52x__
+#define VLEV_085                0x0040  /* VLEV = 0.85 V (-5% - +10% Accuracy) */
+#define VLEV_090                0x0050  /* VLEV = 0.90 V (-5% - +10% Accuracy) */
+#define VLEV_095                0x0060  /* VLEV = 0.95 V (-5% - +10% Accuracy) */
+#define VLEV_100                0x0070  /* VLEV = 1.00 V (-5% - +10% Accuracy) */
+#define VLEV_105                0x0080  /* VLEV = 1.05 V (-5% - +10% Accuracy) */
+#define VLEV_110                0x0090  /* VLEV = 1.10 V (-5% - +10% Accuracy) */
+#define VLEV_115                0x00A0  /* VLEV = 1.15 V (-5% - +10% Accuracy) */
+#define VLEV_120                0x00B0  /* VLEV = 1.20 V (-5% - +10% Accuracy) */
+#else
+#define VLEV_085                0x0060  /* VLEV = 0.85 V (-5% - +10% Accuracy) */
+#define VLEV_090                0x0070  /* VLEV = 0.90 V (-5% - +10% Accuracy) */
+#define VLEV_095                0x0080  /* VLEV = 0.95 V (-5% - +10% Accuracy) */
+#define VLEV_100                0x0090  /* VLEV = 1.00 V (-5% - +10% Accuracy) */
+#define VLEV_105                0x00A0  /* VLEV = 1.05 V (-5% - +10% Accuracy) */
+#define VLEV_110                0x00B0  /* VLEV = 1.10 V (-5% - +10% Accuracy) */
+#define VLEV_115                0x00C0  /* VLEV = 1.15 V (-5% - +10% Accuracy) */
+#define VLEV_120                0x00D0  /* VLEV = 1.20 V (-5% - +10% Accuracy) */
+#define VLEV_125                0x00E0  /* VLEV = 1.25 V (-5% - +10% Accuracy) */
+#define VLEV_130                0x00F0  /* VLEV = 1.30 V (-5% - +10% Accuracy) */
+#endif
+#define WAKE                    0x0100  /* Enable RTC/Reset Wakeup From Hibernate */
+#define CANWE                   0x0200  /* Enable CAN Wakeup From Hibernate */
+#define PHYWE                   0x0400  /* Enable PHY Wakeup From Hibernate */
+#define GPWE                    0x0400  /* General-Purpose Wake-Up Enable */
+#define MXVRWE                  0x0400  /* Enable MXVR Wakeup From Hibernate */
+#define KPADWE                  0x1000  /* Keypad Wake-Up Enable */
+#define ROTWE                   0x2000  /* Rotary Wake-Up Enable */
+#define CLKBUFOE                0x4000  /* CLKIN Buffer Output Enable */
+#define SCKELOW                 0x8000  /* Do Not Drive SCKE High During Reset After Hibernate */
+#if defined(__ADSPBF52x__) || defined(__ADSPBF51x__)
+#define USBWE                   0x0200  /* Enable USB Wakeup From Hibernate */
+#else
+#define USBWE                   0x0800  /* Enable USB Wakeup From Hibernate */
+#endif
 #ifndef __ASSEMBLY__
 void sleep_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
@@ -54,6 +156,5 @@ struct bfin_dpmc_platform_data {
        w[P0 + (x - PLL_CTL)] = R0;\
 #endif
-#endif  /* __KERNEL__ */
 #endif  /*_BLACKFIN_DPMC_H_*/
diff --git a/arch/blackfin/include/asm/elf.h b/arch/blackfin/include/asm/elf.h
index 8e0764c81eaf..5b50f0ecacf8 100644
--- a/arch/blackfin/include/asm/elf.h
+++ b/arch/blackfin/include/asm/elf.h
@@ -55,7 +55,6 @@ do {											\
        _regs->p2       = _dynamic_addr;                                \
 } while(0)
-#define USE_ELF_CORE_DUMP
 #define ELF_FDPIC_CORE_EFLAGS   EF_BFIN_FDPIC
 #define ELF_EXEC_PAGESIZE       4096
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 5b44d05ca53e..539468a05057 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -159,6 +159,11 @@ struct gpio_port_t {
 };
 #endif
+#ifdef BFIN_SPECIAL_GPIO_BANKS
+void bfin_special_gpio_free(unsigned gpio);
+int bfin_special_gpio_request(unsigned gpio, const char *label);
+#endif
 #ifdef CONFIG_PM
 unsigned int bfin_pm_standby_setup(void);
diff --git a/arch/blackfin/include/asm/gptimers.h b/arch/blackfin/include/asm/gptimers.h
index 89f08decb8e0..c722acdda0d3 100644
--- a/arch/blackfin/include/asm/gptimers.h
+++ b/arch/blackfin/include/asm/gptimers.h
@@ -172,25 +172,25 @@
 /* The actual gptimer API */
-void     set_gptimer_pwidth(int timer_id, uint32_t width);
+void     set_gptimer_pwidth(unsigned int timer_id, uint32_t width);
-uint32_t get_gptimer_pwidth(int timer_id);
+uint32_t get_gptimer_pwidth(unsigned int timer_id);
-void     set_gptimer_period(int timer_id, uint32_t period);
+void     set_gptimer_period(unsigned int timer_id, uint32_t period);
-uint32_t get_gptimer_period(int timer_id);
+uint32_t get_gptimer_period(unsigned int timer_id);
-uint32_t get_gptimer_count(int timer_id);
+uint32_t get_gptimer_count(unsigned int timer_id);
-int      get_gptimer_intr(int timer_id);
+int      get_gptimer_intr(unsigned int timer_id);
-void     clear_gptimer_intr(int timer_id);
+void     clear_gptimer_intr(unsigned int timer_id);
-int      get_gptimer_over(int timer_id);
+int      get_gptimer_over(unsigned int timer_id);
-void     clear_gptimer_over(int timer_id);
+void     clear_gptimer_over(unsigned int timer_id);
-void     set_gptimer_config(int timer_id, uint16_t config);
+void     set_gptimer_config(unsigned int timer_id, uint16_t config);
-uint16_t get_gptimer_config(int timer_id);
+uint16_t get_gptimer_config(unsigned int timer_id);
-int      get_gptimer_run(int timer_id);
+int      get_gptimer_run(unsigned int timer_id);
-void     set_gptimer_pulse_hi(int timer_id);
+void     set_gptimer_pulse_hi(unsigned int timer_id);
-void     clear_gptimer_pulse_hi(int timer_id);
+void     clear_gptimer_pulse_hi(unsigned int timer_id);
 void     enable_gptimers(uint16_t mask);
 void     disable_gptimers(uint16_t mask);
 void     disable_gptimers_sync(uint16_t mask);
 uint16_t get_enabled_gptimers(void);
-uint32_t get_gptimer_status(int group);
+uint32_t get_gptimer_status(unsigned int group);
-void     set_gptimer_status(int group, uint32_t value);
+void     set_gptimer_status(unsigned int group, uint32_t value);
 #endif
diff --git a/arch/blackfin/include/asm/io.h b/arch/blackfin/include/asm/io.h
index d1f5029189a7..29e55b9d88bc 100644
--- a/arch/blackfin/include/asm/io.h
+++ b/arch/blackfin/include/asm/io.h
@@ -31,12 +31,14 @@ static inline unsigned char readb(const volatile void __iomem *addr)
        unsigned int val;
        int tmp;
-        __asm__ __volatile__ ("cli %1;\n\t"
+        __asm__ __volatile__ (
-                        "NOP; NOP; SSYNC;\n\t"
+                "cli %1;"
-                        "%0 = b [%2] (z);\n\t"
+                "NOP; NOP; SSYNC;"
-                        "sti %1;\n\t"
+                "%0 = b [%2] (z);"
-                        : "=d"(val), "=d"(tmp): "a"(addr)
+                "sti %1;"
-                        );
+                : "=d"(val), "=d"(tmp)
+                : "a"(addr)
+        );
        return (unsigned char) val;
 }
@@ -46,12 +48,14 @@ static inline unsigned short readw(const volatile void __iomem *addr)
        unsigned int val;
        int tmp;
-        __asm__ __volatile__ ("cli %1;\n\t"
+        __asm__ __volatile__ (
-                        "NOP; NOP; SSYNC;\n\t"
+                "cli %1;"
-                        "%0 = w [%2] (z);\n\t"
+                "NOP; NOP; SSYNC;"
-                        "sti %1;\n\t"
+                "%0 = w [%2] (z);"
-                        : "=d"(val), "=d"(tmp): "a"(addr)
+                "sti %1;"
-                        );
+                : "=d"(val), "=d"(tmp)
+                : "a"(addr)
+        );
        return (unsigned short) val;
 }
@@ -61,20 +65,23 @@ static inline unsigned int readl(const volatile void __iomem *addr)
        unsigned int val;
        int tmp;
-        __asm__ __volatile__ ("cli %1;\n\t"
+        __asm__ __volatile__ (
-                        "NOP; NOP; SSYNC;\n\t"
+                "cli %1;"
-                        "%0 = [%2];\n\t"
+                "NOP; NOP; SSYNC;"
-                        "sti %1;\n\t"
+                "%0 = [%2];"
-                        : "=d"(val), "=d"(tmp): "a"(addr)
+                "sti %1;"
-                        );
+                : "=d"(val), "=d"(tmp)
+                : "a"(addr)
+        );
        return val;
 }
 #endif /*  __ASSEMBLY__ */
-#define writeb(b,addr) (void)((*(volatile unsigned char *) (addr)) = (b))
+#define writeb(b, addr) (void)((*(volatile unsigned char *) (addr)) = (b))
-#define writew(b,addr) (void)((*(volatile unsigned short *) (addr)) = (b))
+#define writew(b, addr) (void)((*(volatile unsigned short *) (addr)) = (b))
-#define writel(b,addr) (void)((*(volatile unsigned int *) (addr)) = (b))
+#define writel(b, addr) (void)((*(volatile unsigned int *) (addr)) = (b))
 #define __raw_readb readb
 #define __raw_readw readw
@@ -82,9 +89,9 @@ static inline unsigned int readl(const volatile void __iomem *addr)
 #define __raw_writeb writeb
 #define __raw_writew writew
 #define __raw_writel writel
-#define memset_io(a,b,c)        memset((void *)(a),(b),(c))
+#define memset_io(a, b, c)      memset((void *)(a), (b), (c))
-#define memcpy_fromio(a,b,c)    memcpy((a),(void *)(b),(c))
+#define memcpy_fromio(a, b, c)  memcpy((a), (void *)(b), (c))
-#define memcpy_toio(a,b,c)      memcpy((void *)(a),(b),(c))
+#define memcpy_toio(a, b, c)    memcpy((void *)(a), (b), (c))
 /* Convert "I/O port addresses" to actual addresses.  i.e. ugly casts. */
 #define __io(port) ((void *)(unsigned long)(port))
@@ -92,30 +99,30 @@ static inline unsigned int readl(const volatile void __iomem *addr)
 #define inb(port)    readb(__io(port))
 #define inw(port)    readw(__io(port))
 #define inl(port)    readl(__io(port))
-#define outb(x,port) writeb(x,__io(port))
+#define outb(x, port) writeb(x, __io(port))
-#define outw(x,port) writew(x,__io(port))
+#define outw(x, port) writew(x, __io(port))
-#define outl(x,port) writel(x,__io(port))
+#define outl(x, port) writel(x, __io(port))
 #define inb_p(port)    inb(__io(port))
 #define inw_p(port)    inw(__io(port))
 #define inl_p(port)    inl(__io(port))
-#define outb_p(x,port) outb(x,__io(port))
+#define outb_p(x, port) outb(x, __io(port))
-#define outw_p(x,port) outw(x,__io(port))
+#define outw_p(x, port) outw(x, __io(port))
-#define outl_p(x,port) outl(x,__io(port))
+#define outl_p(x, port) outl(x, __io(port))
-#define ioread8_rep(a,d,c)      readsb(a,d,c)
+#define ioread8_rep(a, d, c)    readsb(a, d, c)
-#define ioread16_rep(a,d,c)     readsw(a,d,c)
+#define ioread16_rep(a, d, c)   readsw(a, d, c)
-#define ioread32_rep(a,d,c)     readsl(a,d,c)
+#define ioread32_rep(a, d, c)   readsl(a, d, c)
-#define iowrite8_rep(a,s,c)     writesb(a,s,c)
+#define iowrite8_rep(a, s, c)   writesb(a, s, c)
-#define iowrite16_rep(a,s,c)    writesw(a,s,c)
+#define iowrite16_rep(a, s, c)  writesw(a, s, c)
-#define iowrite32_rep(a,s,c)    writesl(a,s,c)
+#define iowrite32_rep(a, s, c)  writesl(a, s, c)
-#define ioread8(X)                      readb(X)
+#define ioread8(x)                      readb(x)
-#define ioread16(X)                     readw(X)
+#define ioread16(x)                     readw(x)
-#define ioread32(X)                     readl(X)
+#define ioread32(x)                     readl(x)
-#define iowrite8(val,X)                 writeb(val,X)
+#define iowrite8(val, x)                writeb(val, x)
-#define iowrite16(val,X)                writew(val,X)
+#define iowrite16(val, x)               writew(val, x)
-#define iowrite32(val,X)                writel(val,X)
+#define iowrite32(val, x)               writel(val, x)
 #define mmiowb() wmb()
diff --git a/arch/blackfin/include/asm/ipipe.h b/arch/blackfin/include/asm/ipipe.h
index 4617ba66278f..d3b40449ca0e 100644
--- a/arch/blackfin/include/asm/ipipe.h
+++ b/arch/blackfin/include/asm/ipipe.h
@@ -35,9 +35,9 @@
 #include <asm/atomic.h>
 #include <asm/traps.h>
-#define IPIPE_ARCH_STRING     "1.11-00"
+#define IPIPE_ARCH_STRING     "1.12-00"
 #define IPIPE_MAJOR_NUMBER    1
-#define IPIPE_MINOR_NUMBER    11
+#define IPIPE_MINOR_NUMBER    12
 #define IPIPE_PATCH_NUMBER    0
 #ifdef CONFIG_SMP
@@ -124,16 +124,6 @@ static inline int __ipipe_check_tickdev(const char *devname)
        return 1;
 }
-static inline void __ipipe_lock_root(void)
-{
-        set_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status));
-}
-static inline void __ipipe_unlock_root(void)
-{
-        clear_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status));
-}
 void __ipipe_enable_pipeline(void);
 #define __ipipe_hook_critical_ipi(ipd) do { } while (0)
diff --git a/arch/blackfin/include/asm/ipipe_base.h b/arch/blackfin/include/asm/ipipe_base.h
index 490098f532a7..00409201d9ed 100644
--- a/arch/blackfin/include/asm/ipipe_base.h
+++ b/arch/blackfin/include/asm/ipipe_base.h
@@ -51,23 +51,15 @@
 extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */
-#define __ipipe_stall_root()                                            \
+void __ipipe_stall_root(void);
-        do {                                                            \
-                volatile unsigned long *p = &__ipipe_root_status;       \
+unsigned long __ipipe_test_and_stall_root(void);
-                set_bit(0, p);                                          \
-        } while (0)
+unsigned long __ipipe_test_root(void);
-#define __ipipe_test_and_stall_root()                                   \
+void __ipipe_lock_root(void);
-        ({                                                              \
-                volatile unsigned long *p = &__ipipe_root_status;       \
+void __ipipe_unlock_root(void);
-                test_and_set_bit(0, p);                                 \
-        })
-#define __ipipe_test_root()                                     \
-        ({                                                      \
-                const unsigned long *p = &__ipipe_root_status;  \
-                test_bit(0, p);                                 \
-        })
 #endif /* !__ASSEMBLY__ */
diff --git a/arch/blackfin/include/asm/irqflags.h b/arch/blackfin/include/asm/irqflags.h
index 9b19a19d9ae9..813a1af3e865 100644
--- a/arch/blackfin/include/asm/irqflags.h
+++ b/arch/blackfin/include/asm/irqflags.h
@@ -33,6 +33,7 @@ static inline unsigned long bfin_cli(void)
 #ifdef CONFIG_IPIPE
+#include <linux/compiler.h>
 #include <linux/ipipe_base.h>
 #include <linux/ipipe_trace.h>
@@ -49,12 +50,12 @@ static inline unsigned long bfin_cli(void)
                barrier();                              \
        } while (0)
-static inline void raw_local_irq_enable(void)
+#define raw_local_irq_enable()                          \
-{
+        do {                                            \
-        barrier();
+                barrier();                              \
-        ipipe_check_context(ipipe_root_domain);
+                ipipe_check_context(ipipe_root_domain); \
-        __ipipe_unstall_root();
+                __ipipe_unstall_root();                 \
-}
+        } while (0)
 #define raw_local_save_flags_ptr(x)                                     \
        do {                                                            \
diff --git a/arch/blackfin/include/asm/kgdb.h b/arch/blackfin/include/asm/kgdb.h
index c8b256d2ea30..8651afe12990 100644
--- a/arch/blackfin/include/asm/kgdb.h
+++ b/arch/blackfin/include/asm/kgdb.h
@@ -10,9 +10,6 @@
 #include <linux/ptrace.h>
-/* gdb locks */
-#define KGDB_MAX_NO_CPUS 8
 /*
 * BUFMAX defines the maximum number of characters in inbound/outbound buffers.
 * At least NUMREGBYTES*2 are needed for register packets.
diff --git a/arch/blackfin/include/asm/mem_init.h b/arch/blackfin/include/asm/mem_init.h
index 4179e329b9c9..7c8fe834ff22 100644
--- a/arch/blackfin/include/asm/mem_init.h
+++ b/arch/blackfin/include/asm/mem_init.h
@@ -295,156 +295,3 @@
 #else
 #define PLL_BYPASS       0
 #endif
-/***************************************Currently Not Being Used *********************************/
-#if defined(CONFIG_FLASH_SPEED_BWAT) && \
-defined(CONFIG_FLASH_SPEED_BRAT) && \
-defined(CONFIG_FLASH_SPEED_BHT) && \
-defined(CONFIG_FLASH_SPEED_BST) && \
-defined(CONFIG_FLASH_SPEED_BTT)
-#define flash_EBIU_AMBCTL_WAT  ((CONFIG_FLASH_SPEED_BWAT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
-#define flash_EBIU_AMBCTL_RAT  ((CONFIG_FLASH_SPEED_BRAT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
-#define flash_EBIU_AMBCTL_HT   ((CONFIG_FLASH_SPEED_BHT  * 4) / (4000000000 / CONFIG_SCLK_HZ))
-#define flash_EBIU_AMBCTL_ST   ((CONFIG_FLASH_SPEED_BST  * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
-#define flash_EBIU_AMBCTL_TT   ((CONFIG_FLASH_SPEED_BTT  * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
-#if (flash_EBIU_AMBCTL_TT > 3)
-#define flash_EBIU_AMBCTL0_TT   B0TT_4
-#endif
-#if (flash_EBIU_AMBCTL_TT == 3)
-#define flash_EBIU_AMBCTL0_TT   B0TT_3
-#endif
-#if (flash_EBIU_AMBCTL_TT == 2)
-#define flash_EBIU_AMBCTL0_TT   B0TT_2
-#endif
-#if (flash_EBIU_AMBCTL_TT < 2)
-#define flash_EBIU_AMBCTL0_TT   B0TT_1
-#endif
-#if (flash_EBIU_AMBCTL_ST > 3)
-#define flash_EBIU_AMBCTL0_ST   B0ST_4
-#endif
-#if (flash_EBIU_AMBCTL_ST == 3)
-#define flash_EBIU_AMBCTL0_ST   B0ST_3
-#endif
-#if (flash_EBIU_AMBCTL_ST == 2)
-#define flash_EBIU_AMBCTL0_ST   B0ST_2
-#endif
-#if (flash_EBIU_AMBCTL_ST < 2)
-#define flash_EBIU_AMBCTL0_ST   B0ST_1
-#endif
-#if (flash_EBIU_AMBCTL_HT > 2)
-#define flash_EBIU_AMBCTL0_HT   B0HT_3
-#endif
-#if (flash_EBIU_AMBCTL_HT == 2)
-#define flash_EBIU_AMBCTL0_HT   B0HT_2
-#endif
-#if (flash_EBIU_AMBCTL_HT == 1)
-#define flash_EBIU_AMBCTL0_HT   B0HT_1
-#endif
-#if (flash_EBIU_AMBCTL_HT == 0 && CONFIG_FLASH_SPEED_BHT == 0)
-#define flash_EBIU_AMBCTL0_HT   B0HT_0
-#endif
-#if (flash_EBIU_AMBCTL_HT == 0 && CONFIG_FLASH_SPEED_BHT != 0)
-#define flash_EBIU_AMBCTL0_HT   B0HT_1
-#endif
-#if (flash_EBIU_AMBCTL_WAT > 14)
-#define flash_EBIU_AMBCTL0_WAT  B0WAT_15
-#endif
-#if (flash_EBIU_AMBCTL_WAT == 14)
-#define flash_EBIU_AMBCTL0_WAT  B0WAT_14
-#endif
-#if (flash_EBIU_AMBCTL_WAT == 13)
-#define flash_EBIU_AMBCTL0_WAT  B0WAT_13
-#endif
-#if (flash_EBIU_AMBCTL_WAT == 12)
-#define flash_EBIU_AMBCTL0_WAT  B0WAT_12
-#endif
-#if (flash_EBIU_AMBCTL_WAT == 11)
-#define flash_EBIU_AMBCTL0_WAT  B0WAT_11
-#endif
-#if (flash_EBIU_AMBCTL_WAT == 10)
-#define flash_EBIU_AMBCTL0_WAT  B0WAT_10
-#endif
-#if (flash_EBIU_AMBCTL_WAT == 9)
-#define flash_EBIU_AMBCTL0_WAT  B0WAT_9
-#endif
-#if (flash_EBIU_AMBCTL_WAT == 8)
-#define flash_EBIU_AMBCTL0_WAT  B0WAT_8
-#endif
-#if (flash_EBIU_AMBCTL_WAT == 7)
-#define flash_EBIU_AMBCTL0_WAT  B0WAT_7
-#endif
-#if (flash_EBIU_AMBCTL_WAT == 6)
-#define flash_EBIU_AMBCTL0_WAT  B0WAT_6
-#endif
-#if (flash_EBIU_AMBCTL_WAT == 5)
-#define flash_EBIU_AMBCTL0_WAT  B0WAT_5
-#endif
-#if (flash_EBIU_AMBCTL_WAT == 4)
-#define flash_EBIU_AMBCTL0_WAT  B0WAT_4
-#endif
-#if (flash_EBIU_AMBCTL_WAT == 3)
-#define flash_EBIU_AMBCTL0_WAT  B0WAT_3
-#endif
-#if (flash_EBIU_AMBCTL_WAT == 2)
-#define flash_EBIU_AMBCTL0_WAT  B0WAT_2
-#endif
-#if (flash_EBIU_AMBCTL_WAT == 1)
-#define flash_EBIU_AMBCTL0_WAT  B0WAT_1
-#endif
-#if (flash_EBIU_AMBCTL_RAT > 14)
-#define flash_EBIU_AMBCTL0_RAT  B0RAT_15
-#endif
-#if (flash_EBIU_AMBCTL_RAT == 14)
-#define flash_EBIU_AMBCTL0_RAT  B0RAT_14
-#endif
-#if (flash_EBIU_AMBCTL_RAT == 13)
-#define flash_EBIU_AMBCTL0_RAT  B0RAT_13
-#endif
-#if (flash_EBIU_AMBCTL_RAT == 12)
-#define flash_EBIU_AMBCTL0_RAT  B0RAT_12
-#endif
-#if (flash_EBIU_AMBCTL_RAT == 11)
-#define flash_EBIU_AMBCTL0_RAT  B0RAT_11
-#endif
-#if (flash_EBIU_AMBCTL_RAT == 10)
-#define flash_EBIU_AMBCTL0_RAT  B0RAT_10
-#endif
-#if (flash_EBIU_AMBCTL_RAT == 9)
-#define flash_EBIU_AMBCTL0_RAT  B0RAT_9
-#endif
-#if (flash_EBIU_AMBCTL_RAT == 8)
-#define flash_EBIU_AMBCTL0_RAT  B0RAT_8
-#endif
-#if (flash_EBIU_AMBCTL_RAT == 7)
-#define flash_EBIU_AMBCTL0_RAT  B0RAT_7
-#endif
-#if (flash_EBIU_AMBCTL_RAT == 6)
-#define flash_EBIU_AMBCTL0_RAT  B0RAT_6
-#endif
-#if (flash_EBIU_AMBCTL_RAT == 5)
-#define flash_EBIU_AMBCTL0_RAT  B0RAT_5
-#endif
-#if (flash_EBIU_AMBCTL_RAT == 4)
-#define flash_EBIU_AMBCTL0_RAT  B0RAT_4
-#endif
-#if (flash_EBIU_AMBCTL_RAT == 3)
-#define flash_EBIU_AMBCTL0_RAT  B0RAT_3
-#endif
-#if (flash_EBIU_AMBCTL_RAT == 2)
-#define flash_EBIU_AMBCTL0_RAT  B0RAT_2
-#endif
-#if (flash_EBIU_AMBCTL_RAT == 1)
-#define flash_EBIU_AMBCTL0_RAT  B0RAT_1
-#endif
-#define flash_EBIU_AMBCTL0  \
-        (flash_EBIU_AMBCTL0_WAT | flash_EBIU_AMBCTL0_RAT | flash_EBIU_AMBCTL0_HT | \
-         flash_EBIU_AMBCTL0_ST | flash_EBIU_AMBCTL0_TT | CONFIG_FLASH_SPEED_RDYEN)
-#endif
diff --git a/arch/blackfin/include/asm/mmu_context.h b/arch/blackfin/include/asm/mmu_context.h
index 4a3be376ad5b..ae8ef4ffd806 100644
--- a/arch/blackfin/include/asm/mmu_context.h
+++ b/arch/blackfin/include/asm/mmu_context.h
@@ -66,8 +66,8 @@ activate_l1stack(struct mm_struct *mm, unsigned long sp_base)
 #define activate_mm(prev, next) switch_mm(prev, next, NULL)
-static inline void switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm,
+static inline void __switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm,
-                             struct task_struct *tsk)
+                               struct task_struct *tsk)
 {
 #ifdef CONFIG_MPU
        unsigned int cpu = smp_processor_id();
@@ -95,7 +95,24 @@ static inline void switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_m
 #endif
 }
+#ifdef CONFIG_IPIPE
+#define lock_mm_switch(flags)   local_irq_save_hw_cond(flags)
+#define unlock_mm_switch(flags) local_irq_restore_hw_cond(flags)
+#else
+#define lock_mm_switch(flags)   do { (void)(flags); } while (0)
+#define unlock_mm_switch(flags) do { (void)(flags); } while (0)
+#endif /* CONFIG_IPIPE */
 #ifdef CONFIG_MPU
+static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
+                             struct task_struct *tsk)
+{
+        unsigned long flags;
+        lock_mm_switch(flags);
+        __switch_mm(prev, next, tsk);
+        unlock_mm_switch(flags);
+}
 static inline void protect_page(struct mm_struct *mm, unsigned long addr,
                                unsigned long flags)
 {
@@ -128,6 +145,12 @@ static inline void update_protections(struct mm_struct *mm)
                set_mask_dcplbs(mm->context.page_rwx_mask, cpu);
        }
 }
+#else /* !CONFIG_MPU */
+static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
+                             struct task_struct *tsk)
+{
+        __switch_mm(prev, next, tsk);
+}
 #endif
 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
@@ -173,4 +196,10 @@ static inline void destroy_context(struct mm_struct *mm)
 #endif
 }
+#define ipipe_mm_switch_protect(flags)          \
+        local_irq_save_hw_cond(flags)
+#define ipipe_mm_switch_unprotect(flags)        \
+        local_irq_restore_hw_cond(flags)
 #endif
diff --git a/arch/blackfin/include/asm/module.h b/arch/blackfin/include/asm/module.h
index 9c1cfffddd9b..4282b169ead9 100644
--- a/arch/blackfin/include/asm/module.h
+++ b/arch/blackfin/include/asm/module.h
@@ -7,8 +7,6 @@
 #ifndef _ASM_BFIN_MODULE_H
 #define _ASM_BFIN_MODULE_H
-#define MODULE_SYMBOL_PREFIX "_"
 #define Elf_Shdr        Elf32_Shdr
 #define Elf_Sym         Elf32_Sym
 #define Elf_Ehdr        Elf32_Ehdr
diff --git a/arch/blackfin/include/asm/pci.h b/arch/blackfin/include/asm/pci.h
index 61277358c865..99cae2e3bac7 100644
--- a/arch/blackfin/include/asm/pci.h
+++ b/arch/blackfin/include/asm/pci.h
@@ -4,145 +4,19 @@
 #define _ASM_BFIN_PCI_H
 #include <asm/scatterlist.h>
+#include <asm-generic/pci-dma-compat.h>
+#include <asm-generic/pci.h>
-/*
- *
- * Written by Wout Klaren.
- */
-/* Added by Chang Junxiao */
 #define PCIBIOS_MIN_IO 0x00001000
 #define PCIBIOS_MIN_MEM 0x10000000
-#define PCI_DMA_BUS_IS_PHYS       (1)
-struct pci_ops;
-/*
- * Structure with hardware dependent information and functions of the
- * PCI bus.
- */
-struct pci_bus_info {
-        /*
-         * Resources of the PCI bus.
-         */
-        struct resource mem_space;
-        struct resource io_space;
-        /*
-         * System dependent functions.
-         */
-        struct pci_ops *bfin_pci_ops;
-        void (*fixup) (int pci_modify);
-        void (*conf_device) (unsigned char bus, unsigned char device_fn);
-};
-#define pcibios_assign_all_busses()     0
 static inline void pcibios_set_master(struct pci_dev *dev)
 {
        /* No special bus mastering setup handling */
 }
 static inline void pcibios_penalize_isa_irq(int irq)
 {
        /* We don't do dynamic PCI IRQ allocation */
 }
-static inline dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr,
-                                        size_t size, int direction)
-{
-        if (direction == PCI_DMA_NONE)
-                BUG();
-         /* return virt_to_bus(ptr); */
-        return (dma_addr_t) ptr;
-}
-/* Unmap a single streaming mode DMA translation.  The dma_addr and size
- * must match what was provided for in a previous pci_map_single call.  All
- * other usages are undefined.
- *
- * After this call, reads by the cpu to the buffer are guarenteed to see
- * whatever the device wrote there.
- */
-static inline void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
-                                    size_t size, int direction)
-{
-        if (direction == PCI_DMA_NONE)
-                BUG();
-        /* Nothing to do */
-}
-/* Map a set of buffers described by scatterlist in streaming
- * mode for DMA.  This is the scather-gather version of the
- * above pci_map_single interface.  Here the scatter gather list
- * elements are each tagged with the appropriate dma address
- * and length.  They are obtained via sg_dma_{address,length}(SG).
- *
- * NOTE: An implementation may be able to use a smaller number of
- *       DMA address/length pairs than there are SG table elements.
- *       (for example via virtual mapping capabilities)
- *       The routine returns the number of addr/length pairs actually
- *       used, at most nents.
- *
- * Device ownership issues as mentioned above for pci_map_single are
- * the same here.
- */
-static inline int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
-                             int nents, int direction)
-{
-        if (direction == PCI_DMA_NONE)
-                BUG();
-        return nents;
-}
-/* Unmap a set of streaming mode DMA translations.
- * Again, cpu read rules concerning calls here are the same as for
- * pci_unmap_single() above.
- */
-static inline void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
-                                int nents, int direction)
-{
-        if (direction == PCI_DMA_NONE)
-                BUG();
-        /* Nothing to do */
-}
-/* Make physical memory consistent for a single
- * streaming mode DMA translation after a transfer.
- *
- * If you perform a pci_map_single() but wish to interrogate the
- * buffer using the cpu, yet do not wish to teardown the PCI dma
- * mapping, you must call this function before doing so.  At the
- * next point you give the PCI dma address back to the card, the
- * device again owns the buffer.
- */
-static inline void pci_dma_sync_single(struct pci_dev *hwdev,
-                                       dma_addr_t dma_handle, size_t size,
-                                       int direction)
-{
-        if (direction == PCI_DMA_NONE)
-                BUG();
-        /* Nothing to do */
-}
-/* Make physical memory consistent for a set of streaming
- * mode DMA translations after a transfer.
- *
- * The same as pci_dma_sync_single but for a scatter-gather list,
- * same rules and usage.
- */
-static inline void pci_dma_sync_sg(struct pci_dev *hwdev,
-                                   struct scatterlist *sg, int nelems,
-                                   int direction)
-{
-        if (direction == PCI_DMA_NONE)
-                BUG();
-        /* Nothing to do */
-}
 #endif                          /* _ASM_BFIN_PCI_H */
diff --git a/arch/blackfin/include/asm/ptrace.h b/arch/blackfin/include/asm/ptrace.h
index 27290c955a7a..b33a4488f498 100644
--- a/arch/blackfin/include/asm/ptrace.h
+++ b/arch/blackfin/include/asm/ptrace.h
@@ -89,9 +89,9 @@ struct pt_regs {
 #define PTRACE_GETREGS            12
 #define PTRACE_SETREGS            13    /* ptrace signal  */
-#define PTRACE_GETFDPIC           31
+#define PTRACE_GETFDPIC           31    /* get the ELF fdpic loadmap address */
-#define PTRACE_GETFDPIC_EXEC      0
+#define PTRACE_GETFDPIC_EXEC       0    /* [addr] request the executable loadmap */
-#define PTRACE_GETFDPIC_INTERP    1
+#define PTRACE_GETFDPIC_INTERP     1    /* [addr] request the interpreter loadmap */
 #define PS_S  (0x0002)
diff --git a/arch/blackfin/include/asm/sections.h b/arch/blackfin/include/asm/sections.h
index 1f5381fbb4a7..42f6c53c59c6 100644
--- a/arch/blackfin/include/asm/sections.h
+++ b/arch/blackfin/include/asm/sections.h
@@ -13,10 +13,18 @@ extern unsigned long memory_mtd_start, memory_mtd_end, mtd_size;
 extern unsigned long _ramstart, _ramend, _rambase;
 extern unsigned long memory_start, memory_end, physical_mem_end;
-extern char _stext_l1[], _etext_l1[], _sdata_l1[], _edata_l1[], _sbss_l1[],
+/*
-        _ebss_l1[], _l1_lma_start[], _sdata_b_l1[], _sbss_b_l1[], _ebss_b_l1[],
+ * The weak markings on the lengths might seem weird, but this is required
-        _stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[], _sbss_l2[],
+ * in order to make gcc accept the fact that these may actually have a value
-        _ebss_l2[], _l2_lma_start[];
+ * of 0 (since they aren't actually addresses, but sizes of sections).
+ */
+extern char _stext_l1[], _etext_l1[], _text_l1_lma[], __weak _text_l1_len[];
+extern char _sdata_l1[], _edata_l1[], _sbss_l1[], _ebss_l1[],
+        _data_l1_lma[], __weak _data_l1_len[];
+extern char _sdata_b_l1[], _edata_b_l1[], _sbss_b_l1[], _ebss_b_l1[],
+        _data_b_l1_lma[], __weak _data_b_l1_len[];
+extern char _stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[],
+        _sbss_l2[], _ebss_l2[], _l2_lma[], __weak _l2_len[];
 #include <asm/mem_map.h>
diff --git a/arch/blackfin/include/asm/thread_info.h b/arch/blackfin/include/asm/thread_info.h
index afb3a8626380..a40d9368c38a 100644
--- a/arch/blackfin/include/asm/thread_info.h
+++ b/arch/blackfin/include/asm/thread_info.h
@@ -103,11 +103,13 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_RESTORE_SIGMASK     5       /* restore signal mask in do_signal() */
 #define TIF_FREEZE              6       /* is freezing for suspend */
 #define TIF_IRQ_SYNC            7       /* sync pipeline stage */
+#define TIF_NOTIFY_RESUME       8       /* callback before returning to user */
 /* as above, but as bit values */
 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
+#define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
 #define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
 #define _TIF_FREEZE             (1<<TIF_FREEZE)
diff --git a/arch/blackfin/include/asm/trace.h b/arch/blackfin/include/asm/trace.h
index 609ad3c84189..dc0aa55ae773 100644
--- a/arch/blackfin/include/asm/trace.h
+++ b/arch/blackfin/include/asm/trace.h
@@ -28,6 +28,8 @@ extern unsigned long software_trace_buff[];
 #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
+#define trace_buffer_init() bfin_write_TBUFCTL(BFIN_TRACE_INIT)
 #define trace_buffer_save(x) \
        do { \
                (x) = bfin_read_TBUFCTL(); \
diff --git a/arch/blackfin/include/asm/uaccess.h b/arch/blackfin/include/asm/uaccess.h
index c03b8532aad3..1c0d190adaef 100644
--- a/arch/blackfin/include/asm/uaccess.h
+++ b/arch/blackfin/include/asm/uaccess.h
@@ -17,9 +17,7 @@
 #include <linux/string.h>
 #include <asm/segment.h>
-#ifdef CONFIG_ACCESS_CHECK
+#include <asm/sections.h>
-# include <asm/bfin-global.h>
-#endif
 #define get_ds()        (KERNEL_DS)
 #define get_fs()        (current_thread_info()->addr_limit)
diff --git a/arch/blackfin/include/asm/unistd.h b/arch/blackfin/include/asm/unistd.h
index 779be02a910a..22886cbdae7a 100644
--- a/arch/blackfin/include/asm/unistd.h
+++ b/arch/blackfin/include/asm/unistd.h
@@ -388,8 +388,9 @@
 #define __NR_pwritev            367
 #define __NR_rt_tgsigqueueinfo  368
 #define __NR_perf_event_open    369
+#define __NR_recvmmsg           370
-#define __NR_syscall            370
+#define __NR_syscall            371
 #define NR_syscalls             __NR_syscall
 /* Old optional stuff no one actually uses */
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index 3946aff4f414..924c00286bab 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -37,9 +37,8 @@ static int __init blackfin_dma_init(void)
        printk(KERN_INFO "Blackfin DMA Controller\n");
        for (i = 0; i < MAX_DMA_CHANNELS; i++) {
-                dma_ch[i].chan_status = DMA_CHANNEL_FREE;
+                atomic_set(&dma_ch[i].chan_status, 0);
                dma_ch[i].regs = dma_io_base_addr[i];
-                mutex_init(&(dma_ch[i].dmalock));
        }
        /* Mark MEMDMA Channel 0 as requested since we're using it internally */
        request_dma(CH_MEM_STREAM0_DEST, "Blackfin dma_memcpy");
@@ -60,7 +59,7 @@ static int proc_dma_show(struct seq_file *m, void *v)
        int i;
        for (i = 0; i < MAX_DMA_CHANNELS; ++i)
-                if (dma_ch[i].chan_status != DMA_CHANNEL_FREE)
+                if (dma_channel_active(i))
                        seq_printf(m, "%2d: %s\n", i, dma_ch[i].device_id);
        return 0;
@@ -107,20 +106,11 @@ int request_dma(unsigned int channel, const char *device_id)
        }
 #endif
-        mutex_lock(&(dma_ch[channel].dmalock));
+        if (atomic_cmpxchg(&dma_ch[channel].chan_status, 0, 1)) {
-        if ((dma_ch[channel].chan_status == DMA_CHANNEL_REQUESTED)
-            || (dma_ch[channel].chan_status == DMA_CHANNEL_ENABLED)) {
-                mutex_unlock(&(dma_ch[channel].dmalock));
                pr_debug("DMA CHANNEL IN USE  \n");
                return -EBUSY;
-        } else {
-                dma_ch[channel].chan_status = DMA_CHANNEL_REQUESTED;
-                pr_debug("DMA CHANNEL IS ALLOCATED  \n");
        }
-        mutex_unlock(&(dma_ch[channel].dmalock));
 #ifdef CONFIG_BF54x
        if (channel >= CH_UART2_RX && channel <= CH_UART3_TX) {
                unsigned int per_map;
@@ -148,21 +138,20 @@ EXPORT_SYMBOL(request_dma);
 int set_dma_callback(unsigned int channel, irq_handler_t callback, void *data)
 {
-        BUG_ON(channel >= MAX_DMA_CHANNELS ||
+        int ret;
-                        dma_ch[channel].chan_status == DMA_CHANNEL_FREE);
+        unsigned int irq;
-        if (callback != NULL) {
+        BUG_ON(channel >= MAX_DMA_CHANNELS || !callback ||
-                int ret;
+                        !atomic_read(&dma_ch[channel].chan_status));
-                unsigned int irq = channel2irq(channel);
-                ret = request_irq(irq, callback, IRQF_DISABLED,
+        irq = channel2irq(channel);
-                        dma_ch[channel].device_id, data);
+        ret = request_irq(irq, callback, 0, dma_ch[channel].device_id, data);
-                if (ret)
+        if (ret)
-                        return ret;
+                return ret;
+        dma_ch[channel].irq = irq;
+        dma_ch[channel].data = data;
-                dma_ch[channel].irq = irq;
-                dma_ch[channel].data = data;
-        }
        return 0;
 }
 EXPORT_SYMBOL(set_dma_callback);
@@ -184,7 +173,7 @@ void free_dma(unsigned int channel)
 {
        pr_debug("freedma() : BEGIN \n");
        BUG_ON(channel >= MAX_DMA_CHANNELS ||
-                        dma_ch[channel].chan_status == DMA_CHANNEL_FREE);
+                        !atomic_read(&dma_ch[channel].chan_status));
        /* Halt the DMA */
        disable_dma(channel);
@@ -194,9 +183,7 @@ void free_dma(unsigned int channel)
                free_irq(dma_ch[channel].irq, dma_ch[channel].data);
        /* Clear the DMA Variable in the Channel */
-        mutex_lock(&(dma_ch[channel].dmalock));
+        atomic_set(&dma_ch[channel].chan_status, 0);
-        dma_ch[channel].chan_status = DMA_CHANNEL_FREE;
-        mutex_unlock(&(dma_ch[channel].dmalock));
        pr_debug("freedma() : END \n");
 }
@@ -210,13 +197,14 @@ int blackfin_dma_suspend(void)
 {
        int i;
-        for (i = 0; i < MAX_DMA_SUSPEND_CHANNELS; ++i) {
+        for (i = 0; i < MAX_DMA_CHANNELS; ++i) {
-                if (dma_ch[i].chan_status == DMA_CHANNEL_ENABLED) {
+                if (dma_ch[i].regs->cfg & DMAEN) {
                        printk(KERN_ERR "DMA Channel %d failed to suspend\n", i);
                        return -EBUSY;
                }
-                dma_ch[i].saved_peripheral_map = dma_ch[i].regs->peripheral_map;
+                if (i < MAX_DMA_SUSPEND_CHANNELS)
+                        dma_ch[i].saved_peripheral_map = dma_ch[i].regs->peripheral_map;
        }
        return 0;
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index 22705eeff34f..a174596cc009 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -100,6 +100,12 @@ u8 pmux_offset[][16] = {
 };
 # endif
+#elif defined(BF538_FAMILY)
+static unsigned short * const port_fer[] = {
+        (unsigned short *) PORTCIO_FER,
+        (unsigned short *) PORTDIO_FER,
+        (unsigned short *) PORTEIO_FER,
+};
 #endif
 static unsigned short reserved_gpio_map[GPIO_BANK_NUM];
@@ -163,6 +169,27 @@ static int cmp_label(unsigned short ident, const char *label)
 static void port_setup(unsigned gpio, unsigned short usage)
 {
+#if defined(BF538_FAMILY)
+        /*
+         * BF538/9 Port C,D and E are special.
+         * Inverted PORT_FER polarity on CDE and no PORF_FER on F
+         * Regular PORT F GPIOs are handled here, CDE are exclusively
+         * managed by GPIOLIB
+         */
+        if (gpio < MAX_BLACKFIN_GPIOS || gpio >= MAX_RESOURCES)
+                return;
+        gpio -= MAX_BLACKFIN_GPIOS;
+        if (usage == GPIO_USAGE)
+                *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
+        else
+                *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
+        SSYNC();
+        return;
+#endif
        if (check_gpio(gpio))
                return;
@@ -762,6 +789,8 @@ int peripheral_request(unsigned short per, const char *label)
        if (!(per & P_DEFINED))
                return -ENODEV;
+        BUG_ON(ident >= MAX_RESOURCES);
        local_irq_save_hw(flags);
        /* If a pin can be muxed as either GPIO or peripheral, make
@@ -979,6 +1008,76 @@ void bfin_gpio_free(unsigned gpio)
 }
 EXPORT_SYMBOL(bfin_gpio_free);
+#ifdef BFIN_SPECIAL_GPIO_BANKS
+static unsigned short reserved_special_gpio_map[gpio_bank(MAX_RESOURCES)];
+int bfin_special_gpio_request(unsigned gpio, const char *label)
+{
+        unsigned long flags;
+        local_irq_save_hw(flags);
+        /*
+         * Allow that the identical GPIO can
+         * be requested from the same driver twice
+         * Do nothing and return -
+         */
+        if (cmp_label(gpio, label) == 0) {
+                local_irq_restore_hw(flags);
+                return 0;
+        }
+        if (unlikely(reserved_special_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
+                local_irq_restore_hw(flags);
+                printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
+                       gpio, get_label(gpio));
+                return -EBUSY;
+        }
+        if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
+                local_irq_restore_hw(flags);
+                printk(KERN_ERR
+                       "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
+                       gpio, get_label(gpio));
+                return -EBUSY;
+        }
+        reserved_special_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
+        reserved_peri_map[gpio_bank(gpio)] |= gpio_bit(gpio);
+        set_label(gpio, label);
+        local_irq_restore_hw(flags);
+        port_setup(gpio, GPIO_USAGE);
+        return 0;
+}
+EXPORT_SYMBOL(bfin_special_gpio_request);
+void bfin_special_gpio_free(unsigned gpio)
+{
+        unsigned long flags;
+        might_sleep();
+        local_irq_save_hw(flags);
+        if (unlikely(!(reserved_special_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
+                gpio_error(gpio);
+                local_irq_restore_hw(flags);
+                return;
+        }
+        reserved_special_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
+        reserved_peri_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
+        set_label(gpio, "free");
+        local_irq_restore_hw(flags);
+}
+EXPORT_SYMBOL(bfin_special_gpio_free);
+#endif
 int bfin_gpio_irq_request(unsigned gpio, const char *label)
 {
        unsigned long flags;
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
index b52c1f8c4bc0..8d42b9e50dfa 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
@@ -92,6 +92,6 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
                icplb_tbl[cpu][i_i++].data = 0;
 }
-void generate_cplb_tables_all(void)
+void __init generate_cplb_tables_all(void)
 {
 }
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
index 69e0e530d70f..930c01c06813 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
@@ -113,11 +113,11 @@ static noinline int dcplb_miss(unsigned int cpu)
                addr = L2_START;
                d_data = L2_DMEMORY;
        } else if (addr >= physical_mem_end) {
-                if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE
+                if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
-                    && (status & FAULT_USERSUPV)) {
+                        addr &= ~(4 * 1024 * 1024 - 1);
-                        addr &= ~0x3fffff;
                        d_data &= ~PAGE_SIZE_4KB;
                        d_data |= PAGE_SIZE_4MB;
+                        d_data |= CPLB_USER_RD | CPLB_USER_WR;
                } else if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH
                    && (status & (FAULT_RW | FAULT_USERSUPV)) == FAULT_USERSUPV) {
                        addr &= ~(1 * 1024 * 1024 - 1);
@@ -203,7 +203,12 @@ static noinline int icplb_miss(unsigned int cpu)
                addr = L2_START;
                i_data = L2_IMEMORY;
        } else if (addr >= physical_mem_end) {
-                if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH
+                if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
+                        addr &= ~(4 * 1024 * 1024 - 1);
+                        i_data &= ~PAGE_SIZE_4KB;
+                        i_data |= PAGE_SIZE_4MB;
+                        i_data |= CPLB_USER_RD;
+                } else if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH
                    && (status & FAULT_USERSUPV)) {
                        addr &= ~(1 * 1024 * 1024 - 1);
                        i_data &= ~PAGE_SIZE_4KB;
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index fd9a2f31e686..282a7919821b 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -89,15 +89,25 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
 void __init generate_cplb_tables_all(void)
 {
+        unsigned long uncached_end;
        int i_d, i_i;
        i_d = 0;
        /* Normal RAM, including MTD FS.  */
 #ifdef CONFIG_MTD_UCLINUX
-        dcplb_bounds[i_d].eaddr = memory_mtd_start + mtd_size;
+        uncached_end = memory_mtd_start + mtd_size;
 #else
-        dcplb_bounds[i_d].eaddr = memory_end;
+        uncached_end = memory_end;
 #endif
+        /*
+         * if DMA uncached is less than 1MB, mark the 1MB chunk as uncached
+         * so that we don't have to use 4kB pages and cause CPLB thrashing
+         */
+        if ((DMA_UNCACHED_REGION >= 1 * 1024 * 1024) || !DMA_UNCACHED_REGION ||
+            ((_ramend - uncached_end) >= 1 * 1024 * 1024))
+                dcplb_bounds[i_d].eaddr = uncached_end;
+        else
+                dcplb_bounds[i_d].eaddr = uncached_end & ~(1 * 1024 * 1024);
        dcplb_bounds[i_d++].data = SDRAM_DGENERIC;
        /* DMA uncached region.  */
        if (DMA_UNCACHED_REGION) {
@@ -135,18 +145,15 @@ void __init generate_cplb_tables_all(void)
        i_i = 0;
        /* Normal RAM, including MTD FS.  */
-#ifdef CONFIG_MTD_UCLINUX
+        icplb_bounds[i_i].eaddr = uncached_end;
-        icplb_bounds[i_i].eaddr = memory_mtd_start + mtd_size;
-#else
-        icplb_bounds[i_i].eaddr = memory_end;
-#endif
        icplb_bounds[i_i++].data = SDRAM_IGENERIC;
-        /* DMA uncached region.  */
-        if (DMA_UNCACHED_REGION) {
-                icplb_bounds[i_i].eaddr = _ramend;
-                icplb_bounds[i_i++].data = 0;
-        }
        if (_ramend != physical_mem_end) {
+                /* DMA uncached region.  */
+                if (DMA_UNCACHED_REGION) {
+                        /* Normally this hole is caught by the async below.  */
+                        icplb_bounds[i_i].eaddr = _ramend;
+                        icplb_bounds[i_i++].data = 0;
+                }
                /* Reserved memory.  */
                icplb_bounds[i_i].eaddr = physical_mem_end;
                icplb_bounds[i_i++].data = (reserved_mem_icache_on ?
diff --git a/arch/blackfin/kernel/dma-mapping.c b/arch/blackfin/kernel/dma-mapping.c
index e74e74d7733f..e937f323d82c 100644
--- a/arch/blackfin/kernel/dma-mapping.c
+++ b/arch/blackfin/kernel/dma-mapping.c
@@ -7,30 +7,25 @@
 */
 #include <linux/types.h>
-#include <linux/mm.h>
+#include <linux/gfp.h>
 #include <linux/string.h>
-#include <linux/bootmem.h>
 #include <linux/spinlock.h>
-#include <linux/device.h>
 #include <linux/dma-mapping.h>
-#include <linux/io.h>
 #include <linux/scatterlist.h>
-#include <asm/cacheflush.h>
-#include <asm/bfin-global.h>
 static spinlock_t dma_page_lock;
-static unsigned int *dma_page;
+static unsigned long *dma_page;
 static unsigned int dma_pages;
 static unsigned long dma_base;
 static unsigned long dma_size;
 static unsigned int dma_initialized;
-void dma_alloc_init(unsigned long start, unsigned long end)
+static void dma_alloc_init(unsigned long start, unsigned long end)
 {
        spin_lock_init(&dma_page_lock);
        dma_initialized = 0;
-        dma_page = (unsigned int *)__get_free_page(GFP_KERNEL);
+        dma_page = (unsigned long *)__get_free_page(GFP_KERNEL);
        memset(dma_page, 0, PAGE_SIZE);
        dma_base = PAGE_ALIGN(start);
        dma_size = PAGE_ALIGN(end) - PAGE_ALIGN(start);
@@ -58,10 +53,11 @@ static unsigned long __alloc_dma_pages(unsigned int pages)
        spin_lock_irqsave(&dma_page_lock, flags);
        for (i = 0; i < dma_pages;) {
-                if (dma_page[i++] == 0) {
+                if (test_bit(i++, dma_page) == 0) {
                        if (++count == pages) {
                                while (count--)
-                                        dma_page[--i] = 1;
+                                        __set_bit(--i, dma_page);
                                ret = dma_base + (i << PAGE_SHIFT);
                                break;
                        }
@@ -84,14 +80,14 @@ static void __free_dma_pages(unsigned long addr, unsigned int pages)
        }
        spin_lock_irqsave(&dma_page_lock, flags);
-        for (i = page; i < page + pages; i++) {
+        for (i = page; i < page + pages; i++)
-                dma_page[i] = 0;
+                __clear_bit(i, dma_page);
-        }
        spin_unlock_irqrestore(&dma_page_lock, flags);
 }
 void *dma_alloc_coherent(struct device *dev, size_t size,
-                         dma_addr_t * dma_handle, gfp_t gfp)
+                         dma_addr_t *dma_handle, gfp_t gfp)
 {
        void *ret;
@@ -115,21 +111,14 @@ dma_free_coherent(struct device *dev, size_t size, void *vaddr,
 EXPORT_SYMBOL(dma_free_coherent);
 /*
- * Dummy functions defined for some existing drivers
+ * Streaming DMA mappings
 */
+void __dma_sync(dma_addr_t addr, size_t size,
-dma_addr_t
+                enum dma_data_direction dir)
-dma_map_single(struct device *dev, void *ptr, size_t size,
-               enum dma_data_direction direction)
 {
-        BUG_ON(direction == DMA_NONE);
+        _dma_sync(addr, size, dir);
-        invalidate_dcache_range((unsigned long)ptr,
-                        (unsigned long)ptr + size);
-        return (dma_addr_t) ptr;
 }
-EXPORT_SYMBOL(dma_map_single);
+EXPORT_SYMBOL(__dma_sync);
 int
 dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
@@ -137,30 +126,23 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
 {
        int i;
-        BUG_ON(direction == DMA_NONE);
        for (i = 0; i < nents; i++, sg++) {
                sg->dma_address = (dma_addr_t) sg_virt(sg);
+                __dma_sync(sg_dma_address(sg), sg_dma_len(sg), direction);
-                invalidate_dcache_range(sg_dma_address(sg),
-                                        sg_dma_address(sg) +
-                                        sg_dma_len(sg));
        }
        return nents;
 }
 EXPORT_SYMBOL(dma_map_sg);
-void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
+void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
-                enum dma_data_direction direction)
+                            int nelems, enum dma_data_direction direction)
 {
-        BUG_ON(direction == DMA_NONE);
+        int i;
-}
-EXPORT_SYMBOL(dma_unmap_single);
-void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
+        for (i = 0; i < nelems; i++, sg++) {
-                int nhwentries, enum dma_data_direction direction)
+                sg->dma_address = (dma_addr_t) sg_virt(sg);
-{
+                __dma_sync(sg_dma_address(sg), sg_dma_len(sg), direction);
-        BUG_ON(direction == DMA_NONE);
+        }
 }
-EXPORT_SYMBOL(dma_unmap_sg);
+EXPORT_SYMBOL(dma_sync_sg_for_device);
diff --git a/arch/blackfin/kernel/gptimers.c b/arch/blackfin/kernel/gptimers.c
index 7281a91d26b5..cdbe075de1dc 100644
--- a/arch/blackfin/kernel/gptimers.c
+++ b/arch/blackfin/kernel/gptimers.c
@@ -137,7 +137,7 @@ static uint32_t const timil_mask[MAX_BLACKFIN_GPTIMERS] =
 #endif
 };
-void set_gptimer_pwidth(int timer_id, uint32_t value)
+void set_gptimer_pwidth(unsigned int timer_id, uint32_t value)
 {
        tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
        timer_regs[timer_id]->width = value;
@@ -145,14 +145,14 @@ void set_gptimer_pwidth(int timer_id, uint32_t value)
 }
 EXPORT_SYMBOL(set_gptimer_pwidth);
-uint32_t get_gptimer_pwidth(int timer_id)
+uint32_t get_gptimer_pwidth(unsigned int timer_id)
 {
        tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
        return timer_regs[timer_id]->width;
 }
 EXPORT_SYMBOL(get_gptimer_pwidth);
-void set_gptimer_period(int timer_id, uint32_t period)
+void set_gptimer_period(unsigned int timer_id, uint32_t period)
 {
        tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
        timer_regs[timer_id]->period = period;
@@ -160,28 +160,28 @@ void set_gptimer_period(int timer_id, uint32_t period)
 }
 EXPORT_SYMBOL(set_gptimer_period);
-uint32_t get_gptimer_period(int timer_id)
+uint32_t get_gptimer_period(unsigned int timer_id)
 {
        tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
        return timer_regs[timer_id]->period;
 }
 EXPORT_SYMBOL(get_gptimer_period);
-uint32_t get_gptimer_count(int timer_id)
+uint32_t get_gptimer_count(unsigned int timer_id)
 {
        tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
        return timer_regs[timer_id]->counter;
 }
 EXPORT_SYMBOL(get_gptimer_count);
-uint32_t get_gptimer_status(int group)
+uint32_t get_gptimer_status(unsigned int group)
 {
        tassert(group < BFIN_TIMER_NUM_GROUP);
        return group_regs[group]->status;
 }
 EXPORT_SYMBOL(get_gptimer_status);
-void set_gptimer_status(int group, uint32_t value)
+void set_gptimer_status(unsigned int group, uint32_t value)
 {
        tassert(group < BFIN_TIMER_NUM_GROUP);
        group_regs[group]->status = value;
@@ -189,42 +189,42 @@ void set_gptimer_status(int group, uint32_t value)
 }
 EXPORT_SYMBOL(set_gptimer_status);
-int get_gptimer_intr(int timer_id)
+int get_gptimer_intr(unsigned int timer_id)
 {
        tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
        return !!(group_regs[BFIN_TIMER_OCTET(timer_id)]->status & timil_mask[timer_id]);
 }
 EXPORT_SYMBOL(get_gptimer_intr);
-void clear_gptimer_intr(int timer_id)
+void clear_gptimer_intr(unsigned int timer_id)
 {
        tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
        group_regs[BFIN_TIMER_OCTET(timer_id)]->status = timil_mask[timer_id];
 }
 EXPORT_SYMBOL(clear_gptimer_intr);
-int get_gptimer_over(int timer_id)
+int get_gptimer_over(unsigned int timer_id)
 {
        tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
        return !!(group_regs[BFIN_TIMER_OCTET(timer_id)]->status & tovf_mask[timer_id]);
 }
 EXPORT_SYMBOL(get_gptimer_over);
-void clear_gptimer_over(int timer_id)
+void clear_gptimer_over(unsigned int timer_id)
 {
        tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
        group_regs[BFIN_TIMER_OCTET(timer_id)]->status = tovf_mask[timer_id];
 }
 EXPORT_SYMBOL(clear_gptimer_over);
-int get_gptimer_run(int timer_id)
+int get_gptimer_run(unsigned int timer_id)
 {
        tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
        return !!(group_regs[BFIN_TIMER_OCTET(timer_id)]->status & trun_mask[timer_id]);
 }
 EXPORT_SYMBOL(get_gptimer_run);
-void set_gptimer_config(int timer_id, uint16_t config)
+void set_gptimer_config(unsigned int timer_id, uint16_t config)
 {
        tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
        timer_regs[timer_id]->config = config;
@@ -232,7 +232,7 @@ void set_gptimer_config(int timer_id, uint16_t config)
 }
 EXPORT_SYMBOL(set_gptimer_config);
-uint16_t get_gptimer_config(int timer_id)
+uint16_t get_gptimer_config(unsigned int timer_id)
 {
        tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
        return timer_regs[timer_id]->config;
@@ -280,7 +280,7 @@ void disable_gptimers_sync(uint16_t mask)
 }
 EXPORT_SYMBOL(disable_gptimers_sync);
-void set_gptimer_pulse_hi(int timer_id)
+void set_gptimer_pulse_hi(unsigned int timer_id)
 {
        tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
        timer_regs[timer_id]->config |= TIMER_PULSE_HI;
@@ -288,7 +288,7 @@ void set_gptimer_pulse_hi(int timer_id)
 }
 EXPORT_SYMBOL(set_gptimer_pulse_hi);
-void clear_gptimer_pulse_hi(int timer_id)
+void clear_gptimer_pulse_hi(unsigned int timer_id)
 {
        tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
        timer_regs[timer_id]->config &= ~TIMER_PULSE_HI;
diff --git a/arch/blackfin/kernel/ipipe.c b/arch/blackfin/kernel/ipipe.c
index 5d7382396dc0..a77307a4473b 100644
--- a/arch/blackfin/kernel/ipipe.c
+++ b/arch/blackfin/kernel/ipipe.c
@@ -335,3 +335,70 @@ void __ipipe_enable_root_irqs_hw(void)
        __clear_bit(IPIPE_STALL_FLAG, &ipipe_root_cpudom_var(status));
        bfin_sti(bfin_irq_flags);
 }
+/*
+ * We could use standard atomic bitops in the following root status
+ * manipulation routines, but let's prepare for SMP support in the
+ * same move, preventing CPU migration as required.
+ */
+void __ipipe_stall_root(void)
+{
+        unsigned long *p, flags;
+        local_irq_save_hw(flags);
+        p = &__ipipe_root_status;
+        __set_bit(IPIPE_STALL_FLAG, p);
+        local_irq_restore_hw(flags);
+}
+EXPORT_SYMBOL(__ipipe_stall_root);
+unsigned long __ipipe_test_and_stall_root(void)
+{
+        unsigned long *p, flags;
+        int x;
+        local_irq_save_hw(flags);
+        p = &__ipipe_root_status;
+        x = __test_and_set_bit(IPIPE_STALL_FLAG, p);
+        local_irq_restore_hw(flags);
+        return x;
+}
+EXPORT_SYMBOL(__ipipe_test_and_stall_root);
+unsigned long __ipipe_test_root(void)
+{
+        const unsigned long *p;
+        unsigned long flags;
+        int x;
+        local_irq_save_hw_smp(flags);
+        p = &__ipipe_root_status;
+        x = test_bit(IPIPE_STALL_FLAG, p);
+        local_irq_restore_hw_smp(flags);
+        return x;
+}
+EXPORT_SYMBOL(__ipipe_test_root);
+void __ipipe_lock_root(void)
+{
+        unsigned long *p, flags;
+        local_irq_save_hw(flags);
+        p = &__ipipe_root_status;
+        __set_bit(IPIPE_SYNCDEFER_FLAG, p);
+        local_irq_restore_hw(flags);
+}
+EXPORT_SYMBOL(__ipipe_lock_root);
+void __ipipe_unlock_root(void)
+{
+        unsigned long *p, flags;
+        local_irq_save_hw(flags);
+        p = &__ipipe_root_status;
+        __clear_bit(IPIPE_SYNCDEFER_FLAG, p);
+        local_irq_restore_hw(flags);
+}
+EXPORT_SYMBOL(__ipipe_unlock_root);
diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c
index cce79d05b90b..f1036b6b9293 100644
--- a/arch/blackfin/kernel/kgdb.c
+++ b/arch/blackfin/kernel/kgdb.c
@@ -24,16 +24,6 @@
 #include <asm/blackfin.h>
 #include <asm/dma.h>
-/* Put the error code here just in case the user cares.  */
-int gdb_bfin_errcode;
-/* Likewise, the vector number here (since GDB only gets the signal
-   number through the usual means, and that's not very specific).  */
-int gdb_bfin_vector = -1;
-#if KGDB_MAX_NO_CPUS != 8
-#error change the definition of slavecpulocks
-#endif
 void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
 {
        gdb_regs[BFIN_R0] = regs->r0;
@@ -369,13 +359,6 @@ void kgdb_roundup_cpu(int cpu, unsigned long flags)
 }
 #endif
-void kgdb_post_primary_code(struct pt_regs *regs, int eVector, int err_code)
-{
-        /* Master processor is completely in the debugger */
-        gdb_bfin_vector = eVector;
-        gdb_bfin_errcode = err_code;
-}
 int kgdb_arch_handle_exception(int vector, int signo,
                               int err_code, char *remcom_in_buffer,
                               char *remcom_out_buffer,
diff --git a/arch/blackfin/kernel/kgdb_test.c b/arch/blackfin/kernel/kgdb_test.c
index 59fc42dc5d6a..9a4b07594389 100644
--- a/arch/blackfin/kernel/kgdb_test.c
+++ b/arch/blackfin/kernel/kgdb_test.c
@@ -17,8 +17,9 @@
 #include <asm/blackfin.h>
+/* Symbols are here for kgdb test to poke directly */
 static char cmdline[256];
-static unsigned long len;
+static size_t len;
 #ifndef CONFIG_SMP
 static int num1 __attribute__((l1_data));
@@ -27,11 +28,10 @@ void kgdb_l1_test(void) __attribute__((l1_text));
 void kgdb_l1_test(void)
 {
-        printk(KERN_ALERT "L1(before change) : data variable addr = 0x%p, data value is %d\n", &num1, num1);
+        pr_alert("L1(before change) : data variable addr = 0x%p, data value is %d\n", &num1, num1);
-        printk(KERN_ALERT "L1 : code function addr = 0x%p\n", kgdb_l1_test);
+        pr_alert("L1 : code function addr = 0x%p\n", kgdb_l1_test);
-        num1 = num1 + 10 ;
+        num1 = num1 + 10;
-        printk(KERN_ALERT "L1(after change) : data variable addr = 0x%p, data value is %d\n", &num1, num1);
+        pr_alert("L1(after change) : data variable addr = 0x%p, data value is %d\n", &num1, num1);
-        return ;
 }
 #endif
@@ -42,11 +42,10 @@ void kgdb_l2_test(void) __attribute__((l2));
 void kgdb_l2_test(void)
 {
-        printk(KERN_ALERT "L2(before change) : data variable addr = 0x%p, data value is %d\n", &num2, num2);
+        pr_alert("L2(before change) : data variable addr = 0x%p, data value is %d\n", &num2, num2);
-        printk(KERN_ALERT "L2 : code function addr = 0x%p\n", kgdb_l2_test);
+        pr_alert("L2 : code function addr = 0x%p\n", kgdb_l2_test);
-        num2 = num2 + 20 ;
+        num2 = num2 + 20;
-        printk(KERN_ALERT "L2(after change) : data variable addr = 0x%p, data value is %d\n", &num2, num2);
+        pr_alert("L2(after change) : data variable addr = 0x%p, data value is %d\n", &num2, num2);
-        return ;
 }
 #endif
@@ -54,12 +53,14 @@ void kgdb_l2_test(void)
 int kgdb_test(char *name, int len, int count, int z)
 {
-        printk(KERN_ALERT "kgdb name(%d): %s, %d, %d\n", len, name, count, z);
+        pr_alert("kgdb name(%d): %s, %d, %d\n", len, name, count, z);
        count = z;
        return count;
 }
-static int test_proc_output(char *buf)
+static ssize_t
+kgdb_test_proc_read(struct file *file, char __user *buf,
+                    size_t count, loff_t *ppos)
 {
        kgdb_test("hello world!", 12, 0x55, 0x10);
 #ifndef CONFIG_SMP
@@ -72,49 +73,31 @@ static int test_proc_output(char *buf)
        return 0;
 }
-static int test_read_proc(char *page, char **start, off_t off,
+static ssize_t
-                                 int count, int *eof, void *data)
+kgdb_test_proc_write(struct file *file, const char __user *buffer,
+                     size_t count, loff_t *pos)
 {
-        int len;
+        len = min_t(size_t, 255, count);
-        len = test_proc_output(page);
-        if (len <= off+count)
-                *eof = 1;
-        *start = page + off;
-        len -= off;
-        if (len > count)
-                len = count;
-        if (len < 0)
-                len = 0;
-        return len;
-}
-static int test_write_proc(struct file *file, const char *buffer,
-                                 unsigned long count, void *data)
-{
-        if (count >= 256)
-                len = 255;
-        else
-                len = count;
        memcpy(cmdline, buffer, count);
        cmdline[len] = 0;
        return len;
 }
+static const struct file_operations kgdb_test_proc_fops = {
+        .owner = THIS_MODULE,
+        .read  = kgdb_test_proc_read,
+        .write = kgdb_test_proc_write,
+};
 static int __init kgdbtest_init(void)
 {
        struct proc_dir_entry *entry;
-        entry = create_proc_entry("kgdbtest", 0, NULL);
+        entry = proc_create("kgdbtest", 0, NULL, &kgdb_test_proc_fops);
        if (entry == NULL)
                return -ENOMEM;
-        entry->read_proc = test_read_proc;
-        entry->write_proc = test_write_proc;
-        entry->data = NULL;
        return 0;
 }
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index 45876427eb2d..b56b0e485e0b 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -258,9 +258,12 @@ void finish_atomic_sections (struct pt_regs *regs)
        int __user *up0 = (int __user *)regs->p0;
        switch (regs->pc) {
+        default:
+                /* not in middle of an atomic step, so resume like normal */
+                return;
        case ATOMIC_XCHG32 + 2:
                put_user(regs->r1, up0);
-                regs->pc = ATOMIC_XCHG32 + 4;
                break;
        case ATOMIC_CAS32 + 2:
@@ -268,7 +271,6 @@ void finish_atomic_sections (struct pt_regs *regs)
                if (regs->r0 == regs->r1)
        case ATOMIC_CAS32 + 6:
                        put_user(regs->r2, up0);
-                regs->pc = ATOMIC_CAS32 + 8;
                break;
        case ATOMIC_ADD32 + 2:
@@ -276,7 +278,6 @@ void finish_atomic_sections (struct pt_regs *regs)
                /* fall through */
        case ATOMIC_ADD32 + 4:
                put_user(regs->r0, up0);
-                regs->pc = ATOMIC_ADD32 + 6;
                break;
        case ATOMIC_SUB32 + 2:
@@ -284,7 +285,6 @@ void finish_atomic_sections (struct pt_regs *regs)
                /* fall through */
        case ATOMIC_SUB32 + 4:
                put_user(regs->r0, up0);
-                regs->pc = ATOMIC_SUB32 + 6;
                break;
        case ATOMIC_IOR32 + 2:
@@ -292,7 +292,6 @@ void finish_atomic_sections (struct pt_regs *regs)
                /* fall through */
        case ATOMIC_IOR32 + 4:
                put_user(regs->r0, up0);
-                regs->pc = ATOMIC_IOR32 + 6;
                break;
        case ATOMIC_AND32 + 2:
@@ -300,7 +299,6 @@ void finish_atomic_sections (struct pt_regs *regs)
                /* fall through */
        case ATOMIC_AND32 + 4:
                put_user(regs->r0, up0);
-                regs->pc = ATOMIC_AND32 + 6;
                break;
        case ATOMIC_XOR32 + 2:
@@ -308,9 +306,15 @@ void finish_atomic_sections (struct pt_regs *regs)
                /* fall through */
        case ATOMIC_XOR32 + 4:
                put_user(regs->r0, up0);
-                regs->pc = ATOMIC_XOR32 + 6;
                break;
        }
+        /*
+         * We've finished the atomic section, and the only thing left for
+         * userspace is to do a RTS, so we might as well handle that too
+         * since we need to update the PC anyways.
+         */
+        regs->pc = regs->rets;
 }
 static inline
@@ -332,12 +336,58 @@ int in_mem_const(unsigned long addr, unsigned long size,
 {
        return in_mem_const_off(addr, size, 0, const_addr, const_size);
 }
-#define IN_ASYNC(bnum, bctlnum) \
+#define ASYNC_ENABLED(bnum, bctlnum) \
 ({ \
-        (bfin_read_EBIU_AMGCTL() & 0xe) < ((bnum + 1) << 1) ? -EFAULT : \
+        (bfin_read_EBIU_AMGCTL() & 0xe) < ((bnum + 1) << 1) ? 0 : \
-        bfin_read_EBIU_AMBCTL##bctlnum() & B##bnum##RDYEN ? -EFAULT : \
+        bfin_read_EBIU_AMBCTL##bctlnum() & B##bnum##RDYEN ? 0 : \
-        BFIN_MEM_ACCESS_CORE; \
+        1; \
 })
+/*
+ * We can't read EBIU banks that aren't enabled or we end up hanging
+ * on the access to the async space.  Make sure we validate accesses
+ * that cross async banks too.
+ *      0 - found, but unusable
+ *      1 - found & usable
+ *      2 - not found
+ */
+static
+int in_async(unsigned long addr, unsigned long size)
+{
+        if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE) {
+                if (!ASYNC_ENABLED(0, 0))
+                        return 0;
+                if (addr + size <= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE)
+                        return 1;
+                size -= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE - addr;
+                addr = ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE;
+        }
+        if (addr >= ASYNC_BANK1_BASE && addr < ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE) {
+                if (!ASYNC_ENABLED(1, 0))
+                        return 0;
+                if (addr + size <= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE)
+                        return 1;
+                size -= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE - addr;
+                addr = ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE;
+        }
+        if (addr >= ASYNC_BANK2_BASE && addr < ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE) {
+                if (!ASYNC_ENABLED(2, 1))
+                        return 0;
+                if (addr + size <= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE)
+                        return 1;
+                size -= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE - addr;
+                addr = ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE;
+        }
+        if (addr >= ASYNC_BANK3_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
+                if (ASYNC_ENABLED(3, 1))
+                        return 0;
+                if (addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE)
+                        return 1;
+                return 0;
+        }
+        /* not within async bounds */
+        return 2;
+}
 int bfin_mem_access_type(unsigned long addr, unsigned long size)
 {
@@ -374,17 +424,11 @@ int bfin_mem_access_type(unsigned long addr, unsigned long size)
        if (addr >= SYSMMR_BASE)
                return BFIN_MEM_ACCESS_CORE_ONLY;
-        /* We can't read EBIU banks that aren't enabled or we end up hanging
+        switch (in_async(addr, size)) {
-         * on the access to the async space.
+        case 0: return -EFAULT;
-         */
+        case 1: return BFIN_MEM_ACCESS_CORE;
-        if (in_mem_const(addr, size, ASYNC_BANK0_BASE, ASYNC_BANK0_SIZE))
+        case 2: /* fall through */;
-                return IN_ASYNC(0, 0);
+        }
-        if (in_mem_const(addr, size, ASYNC_BANK1_BASE, ASYNC_BANK1_SIZE))
-                return IN_ASYNC(1, 0);
-        if (in_mem_const(addr, size, ASYNC_BANK2_BASE, ASYNC_BANK2_SIZE))
-                return IN_ASYNC(2, 1);
-        if (in_mem_const(addr, size, ASYNC_BANK3_BASE, ASYNC_BANK3_SIZE))
-                return IN_ASYNC(3, 1);
        if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
                return BFIN_MEM_ACCESS_CORE;
@@ -401,6 +445,8 @@ __attribute__((l1_text))
 /* Return 1 if access to memory range is OK, 0 otherwise */
 int _access_ok(unsigned long addr, unsigned long size)
 {
+        int aret;
        if (size == 0)
                return 1;
        /* Check that things do not wrap around */
@@ -450,6 +496,11 @@ int _access_ok(unsigned long addr, unsigned long size)
        if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
                return 1;
 #endif
+        aret = in_async(addr, size);
+        if (aret < 2)
+                return aret;
        if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH))
                return 1;
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index 56b0ba12175f..65567dc4b9f5 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -316,19 +316,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                        case BFIN_MEM_ACCESS_CORE_ONLY:
                                copied = access_process_vm(child, addr, &data,
                                                           to_copy, 1);
-                                if (copied)
-                                        break;
-                                /* hrm, why didn't that work ... maybe no mapping */
-                                if (addr >= FIXED_CODE_START &&
-                                    addr + to_copy <= FIXED_CODE_END) {
-                                        copy_to_user_page(0, 0, 0, paddr, &data, to_copy);
-                                        copied = to_copy;
-                                } else if (addr >= BOOT_ROM_START) {
-                                        memcpy(paddr, &data, to_copy);
-                                        copied = to_copy;
-                                }
                                break;
                        case BFIN_MEM_ACCESS_DMA:
                                if (safe_dma_memcpy(paddr, &data, to_copy))
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index c202a44d1416..95448ae9c43a 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -178,10 +178,10 @@ void __init bfin_cache_init(void)
 void __init bfin_relocate_l1_mem(void)
 {
-        unsigned long l1_code_length;
+        unsigned long text_l1_len = (unsigned long)_text_l1_len;
-        unsigned long l1_data_a_length;
+        unsigned long data_l1_len = (unsigned long)_data_l1_len;
-        unsigned long l1_data_b_length;
+        unsigned long data_b_l1_len = (unsigned long)_data_b_l1_len;
-        unsigned long l2_length;
+        unsigned long l2_len = (unsigned long)_l2_len;
        early_shadow_stamp();
@@ -201,30 +201,23 @@ void __init bfin_relocate_l1_mem(void)
        blackfin_dma_early_init();
-        /* if necessary, copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
+        /* if necessary, copy L1 text to L1 instruction SRAM */
-        l1_code_length = _etext_l1 - _stext_l1;
+        if (L1_CODE_LENGTH && text_l1_len)
-        if (l1_code_length)
+                early_dma_memcpy(_stext_l1, _text_l1_lma, text_l1_len);
-                early_dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
-        /* if necessary, copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
+        /* if necessary, copy L1 data to L1 data bank A SRAM */
-        l1_data_a_length = _sbss_l1 - _sdata_l1;
+        if (L1_DATA_A_LENGTH && data_l1_len)
-        if (l1_data_a_length)
+                early_dma_memcpy(_sdata_l1, _data_l1_lma, data_l1_len);
-                early_dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
-        /* if necessary, copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
+        /* if necessary, copy L1 data B to L1 data bank B SRAM */
-        l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
+        if (L1_DATA_B_LENGTH && data_b_l1_len)
-        if (l1_data_b_length)
+                early_dma_memcpy(_sdata_b_l1, _data_b_l1_lma, data_b_l1_len);
-                early_dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
-                        l1_data_a_length, l1_data_b_length);
        early_dma_memcpy_done();
-        /* if necessary, copy _stext_l2 to _edata_l2 to L2 SRAM */
+        /* if necessary, copy L2 text/data to L2 SRAM */
-        if (L2_LENGTH != 0) {
+        if (L2_LENGTH && l2_len)
-                l2_length = _sbss_l2 - _stext_l2;
+                memcpy(_stext_l2, _l2_lma, l2_len);
-                if (l2_length)
-                        memcpy(_stext_l2, _l2_lma_start, l2_length);
-        }
 }
 /* add_memory_region to memmap */
@@ -608,11 +601,6 @@ static __init void memory_setup(void)
        page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
 #endif
-#if !defined(CONFIG_MTD_UCLINUX)
-        /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
-        memory_end -= SIZE_4K;
-#endif
        init_mm.start_code = (unsigned long)_stext;
        init_mm.end_code = (unsigned long)_etext;
        init_mm.end_data = (unsigned long)_edata;
@@ -917,7 +905,7 @@ void __init setup_arch(char **cmdline_p)
        printk(KERN_INFO "Blackfin support (C) 2004-2009 Analog Devices, Inc.\n");
        if (bfin_compiled_revid() == 0xffff)
-                printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
+                printk(KERN_INFO "Compiled for ADSP-%s Rev any, running on 0.%d\n", CPU, bfin_revid());
        else if (bfin_compiled_revid() == -1)
                printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
        else
diff --git a/arch/blackfin/kernel/signal.c b/arch/blackfin/kernel/signal.c
index 9d90c18fab23..e0fd63e9e38a 100644
--- a/arch/blackfin/kernel/signal.c
+++ b/arch/blackfin/kernel/signal.c
@@ -12,6 +12,7 @@
 #include <linux/binfmts.h>
 #include <linux/freezer.h>
 #include <linux/uaccess.h>
+#include <linux/tracehook.h>
 #include <asm/cacheflush.h>
 #include <asm/ucontext.h>
@@ -332,3 +333,20 @@ asmlinkage void do_signal(struct pt_regs *regs)
                sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
        }
 }
+/*
+ * notification of userspace execution resumption
+ */
+asmlinkage void do_notify_resume(struct pt_regs *regs)
+{
+        if (test_thread_flag(TIF_SIGPENDING) || test_thread_flag(TIF_RESTORE_SIGMASK))
+                do_signal(regs);
+        if (test_thread_flag(TIF_NOTIFY_RESUME)) {
+                clear_thread_flag(TIF_NOTIFY_RESUME);
+                tracehook_notify_resume(regs);
+                if (current->replacement_session_keyring)
+                        key_replace_session_keyring();
+        }
+}
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
index 359cfb1815ca..17c38c5b5b22 100644
--- a/arch/blackfin/kernel/time-ts.c
+++ b/arch/blackfin/kernel/time-ts.c
@@ -22,8 +22,6 @@
 #include <asm/time.h>
 #include <asm/gptimers.h>
-#if defined(CONFIG_CYCLES_CLOCKSOURCE)
 /* Accelerators for sched_clock()
 * convert from cycles(64bits) => nanoseconds (64bits)
 *  basic equation:
@@ -46,20 +44,11 @@
 *                      -johnstul@us.ibm.com "math is hard, lets go shopping!"
 */
-static unsigned long cyc2ns_scale;
 #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
-static inline void set_cyc2ns_scale(unsigned long cpu_khz)
+#if defined(CONFIG_CYCLES_CLOCKSOURCE)
-{
-        cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR) / cpu_khz;
-}
-static inline unsigned long long cycles_2_ns(cycle_t cyc)
-{
-        return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR;
-}
-static cycle_t bfin_read_cycles(struct clocksource *cs)
+static notrace cycle_t bfin_read_cycles(struct clocksource *cs)
 {
        return __bfin_cycles_off + (get_cycles() << __bfin_cycles_mod);
 }
@@ -69,19 +58,18 @@ static struct clocksource bfin_cs_cycles = {
        .rating         = 400,
        .read           = bfin_read_cycles,
        .mask           = CLOCKSOURCE_MASK(64),
-        .shift          = 22,
+        .shift          = CYC2NS_SCALE_FACTOR,
        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
-unsigned long long sched_clock(void)
+static inline unsigned long long bfin_cs_cycles_sched_clock(void)
 {
-        return cycles_2_ns(bfin_read_cycles(&bfin_cs_cycles));
+        return clocksource_cyc2ns(bfin_read_cycles(&bfin_cs_cycles),
+                bfin_cs_cycles.mult, bfin_cs_cycles.shift);
 }
 static int __init bfin_cs_cycles_init(void)
 {
-        set_cyc2ns_scale(get_cclk() / 1000);
        bfin_cs_cycles.mult = \
                clocksource_hz2mult(get_cclk(), bfin_cs_cycles.shift);
@@ -108,7 +96,7 @@ void __init setup_gptimer0(void)
        enable_gptimers(TIMER0bit);
 }
-static cycle_t bfin_read_gptimer0(void)
+static cycle_t bfin_read_gptimer0(struct clocksource *cs)
 {
        return bfin_read_TIMER0_COUNTER();
 }
@@ -118,10 +106,16 @@ static struct clocksource bfin_cs_gptimer0 = {
        .rating         = 350,
        .read           = bfin_read_gptimer0,
        .mask           = CLOCKSOURCE_MASK(32),
-        .shift          = 22,
+        .shift          = CYC2NS_SCALE_FACTOR,
        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
+static inline unsigned long long bfin_cs_gptimer0_sched_clock(void)
+{
+        return clocksource_cyc2ns(bfin_read_TIMER0_COUNTER(),
+                bfin_cs_gptimer0.mult, bfin_cs_gptimer0.shift);
+}
 static int __init bfin_cs_gptimer0_init(void)
 {
        setup_gptimer0();
@@ -138,6 +132,19 @@ static int __init bfin_cs_gptimer0_init(void)
 # define bfin_cs_gptimer0_init()
 #endif
+#if defined(CONFIG_GPTMR0_CLOCKSOURCE) || defined(CONFIG_CYCLES_CLOCKSOURCE)
+/* prefer to use cycles since it has higher rating */
+notrace unsigned long long sched_clock(void)
+{
+#if defined(CONFIG_CYCLES_CLOCKSOURCE)
+        return bfin_cs_cycles_sched_clock();
+#else
+        return bfin_cs_gptimer0_sched_clock();
+#endif
+}
+#endif
 #ifdef CONFIG_CORE_TIMER_IRQ_L1
 __attribute__((l1_text))
 #endif
diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c
index bd3b53da295e..13c1ee3e6408 100644
--- a/arch/blackfin/kernel/time.c
+++ b/arch/blackfin/kernel/time.c
@@ -184,11 +184,3 @@ void __init time_init(void)
        time_sched_init(timer_interrupt);
 }
-/*
- * Scheduler clock - returns current time in nanosec units.
- */
-unsigned long long sched_clock(void)
-{
-        return (unsigned long long)jiffies *(NSEC_PER_SEC / HZ);
-}
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c
index 9636bace00e8..d3cbcd6bd985 100644
--- a/arch/blackfin/kernel/traps.c
+++ b/arch/blackfin/kernel/traps.c
@@ -119,6 +119,15 @@ static void decode_address(char *buf, unsigned long address)
                return;
        }
+        /*
+         * Don't walk any of the vmas if we are oopsing, it has been known
+         * to cause problems - corrupt vmas (kernel crashes) cause double faults
+         */
+        if (oops_in_progress) {
+                strcat(buf, "/* kernel dynamic memory (maybe user-space) */");
+                return;
+        }
        /* looks like we're off in user-land, so let's walk all the
         * mappings of all our processes and see if we can't be a whee
         * bit more specific
@@ -515,6 +524,36 @@ asmlinkage notrace void trap_c(struct pt_regs *fp)
                        break;
                /* External Memory Addressing Error */
                case (SEQSTAT_HWERRCAUSE_EXTERN_ADDR):
+                        if (ANOMALY_05000310) {
+                                static unsigned long anomaly_rets;
+                                if ((fp->pc >= (L1_CODE_START + L1_CODE_LENGTH - 512)) &&
+                                    (fp->pc < (L1_CODE_START + L1_CODE_LENGTH))) {
+                                        /*
+                                         * A false hardware error will happen while fetching at
+                                         * the L1 instruction SRAM boundary.  Ignore it.
+                                         */
+                                        anomaly_rets = fp->rets;
+                                        goto traps_done;
+                                } else if (fp->rets == anomaly_rets) {
+                                        /*
+                                         * While boundary code returns to a function, at the ret
+                                         * point, a new false hardware error might occur too based
+                                         * on tests.  Ignore it too.
+                                         */
+                                        goto traps_done;
+                                } else if ((fp->rets >= (L1_CODE_START + L1_CODE_LENGTH - 512)) &&
+                                           (fp->rets < (L1_CODE_START + L1_CODE_LENGTH))) {
+                                        /*
+                                         * If boundary code calls a function, at the entry point,
+                                         * a new false hardware error maybe happen based on tests.
+                                         * Ignore it too.
+                                         */
+                                        goto traps_done;
+                                } else
+                                        anomaly_rets = 0;
+                        }
                        info.si_code = BUS_ADRERR;
                        sig = SIGBUS;
                        strerror = KERN_NOTICE HWC_x3(KERN_NOTICE);
@@ -976,12 +1015,12 @@ void dump_bfin_process(struct pt_regs *fp)
            !((unsigned long)current & 0x3) && current->pid) {
                verbose_printk(KERN_NOTICE "CURRENT PROCESS:\n");
                if (current->comm >= (char *)FIXED_CODE_START)
-                        verbose_printk(KERN_NOTICE "COMM=%s PID=%d\n",
+                        verbose_printk(KERN_NOTICE "COMM=%s PID=%d",
                                current->comm, current->pid);
                else
-                        verbose_printk(KERN_NOTICE "COMM= invalid\n");
+                        verbose_printk(KERN_NOTICE "COMM= invalid");
-                printk(KERN_NOTICE "CPU = %d\n", current_thread_info()->cpu);
+                printk(KERN_CONT " CPU=%d\n", current_thread_info()->cpu);
                if (!((unsigned long)current->mm & 0x3) && (unsigned long)current->mm >= FIXED_CODE_START)
                        verbose_printk(KERN_NOTICE
                                "TEXT = 0x%p-0x%p        DATA = 0x%p-0x%p\n"
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S
index 10e12539000e..66799e763dc9 100644
--- a/arch/blackfin/kernel/vmlinux.lds.S
+++ b/arch/blackfin/kernel/vmlinux.lds.S
@@ -4,8 +4,6 @@
 * Licensed under the GPL-2 or later
 */
-#define VMLINUX_SYMBOL(_sym_) _##_sym_
 #include <asm-generic/vmlinux.lds.h>
 #include <asm/mem_map.h>
 #include <asm/page.h>
@@ -123,8 +121,6 @@ SECTIONS
                EXIT_DATA
        }
-        __l1_lma_start = .;
        .text_l1 L1_CODE_START : AT(LOADADDR(.exit.data) + SIZEOF(.exit.data))
        {
                . = ALIGN(4);
@@ -136,9 +132,11 @@ SECTIONS
                . = ALIGN(4);
                __etext_l1 = .;
        }
-        ASSERT (SIZEOF(.text_l1) <= L1_CODE_LENGTH, "L1 text overflow!")
+        __text_l1_lma = LOADADDR(.text_l1);
+        __text_l1_len = SIZEOF(.text_l1);
+        ASSERT (__text_l1_len <= L1_CODE_LENGTH, "L1 text overflow!")
-        .data_l1 L1_DATA_A_START : AT(LOADADDR(.text_l1) + SIZEOF(.text_l1))
+        .data_l1 L1_DATA_A_START : AT(__text_l1_lma + __text_l1_len)
        {
                . = ALIGN(4);
                __sdata_l1 = .;
@@ -154,9 +152,11 @@ SECTIONS
                . = ALIGN(4);
                __ebss_l1 = .;
        }
-        ASSERT (SIZEOF(.data_l1) <= L1_DATA_A_LENGTH, "L1 data A overflow!")
+        __data_l1_lma = LOADADDR(.data_l1);
+        __data_l1_len = SIZEOF(.data_l1);
+        ASSERT (__data_l1_len <= L1_DATA_A_LENGTH, "L1 data A overflow!")
-        .data_b_l1 L1_DATA_B_START : AT(LOADADDR(.data_l1) + SIZEOF(.data_l1))
+        .data_b_l1 L1_DATA_B_START : AT(__data_l1_lma + __data_l1_len)
        {
                . = ALIGN(4);
                __sdata_b_l1 = .;
@@ -169,11 +169,11 @@ SECTIONS
                . = ALIGN(4);
                __ebss_b_l1 = .;
        }
-        ASSERT (SIZEOF(.data_b_l1) <= L1_DATA_B_LENGTH, "L1 data B overflow!")
+        __data_b_l1_lma = LOADADDR(.data_b_l1);
+        __data_b_l1_len = SIZEOF(.data_b_l1);
-        __l2_lma_start = LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1);
+        ASSERT (__data_b_l1_len <= L1_DATA_B_LENGTH, "L1 data B overflow!")
-        .text_data_l2 L2_START : AT(LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1))
+        .text_data_l2 L2_START : AT(__data_b_l1_lma + __data_b_l1_len)
        {
                . = ALIGN(4);
                __stext_l2 = .;
@@ -195,12 +195,14 @@ SECTIONS
                . = ALIGN(4);
                __ebss_l2 = .;
        }
-        ASSERT (SIZEOF(.text_data_l2) <= L2_LENGTH, "L2 overflow!")
+        __l2_lma = LOADADDR(.text_data_l2);
+        __l2_len = SIZEOF(.text_data_l2);
+        ASSERT (__l2_len <= L2_LENGTH, "L2 overflow!")
        /* Force trailing alignment of our init section so that when we
         * free our init memory, we don't leave behind a partial page.
         */
-        . = LOADADDR(.text_data_l2) + SIZEOF(.text_data_l2);
+        . = __l2_lma + __l2_len;
        . = ALIGN(PAGE_SIZE);
        ___init_end = .;
diff --git a/arch/blackfin/lib/Makefile b/arch/blackfin/lib/Makefile
index 635288fc5f54..42c47dc9e12f 100644
--- a/arch/blackfin/lib/Makefile
+++ b/arch/blackfin/lib/Makefile
@@ -5,7 +5,7 @@
 lib-y := \
        ashldi3.o ashrdi3.o lshrdi3.o \
        muldi3.o divsi3.o udivsi3.o modsi3.o umodsi3.o \
-        checksum.o memcpy.o memset.o memcmp.o memchr.o memmove.o \
+        memcpy.o memset.o memcmp.o memchr.o memmove.o \
        strcmp.o strcpy.o strncmp.o strncpy.o \
        umulsi3_highpart.o smulsi3_highpart.o \
        ins.o outs.o
diff --git a/arch/blackfin/lib/checksum.c b/arch/blackfin/lib/checksum.c
deleted file mode 100644
index c62969dc1bbb..000000000000
--- a/arch/blackfin/lib/checksum.c
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * Copyright 2004-2009 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- *
- * An implementation of the TCP/IP protocol suite for the LINUX operating
- * system. INET is implemented using the BSD Socket interface as the
- * means of communication with the user level.
- *
- */
-#include <linux/module.h>
-#include <net/checksum.h>
-#include <asm/checksum.h>
-#ifdef CONFIG_IP_CHECKSUM_L1
-static unsigned short do_csum(const unsigned char *buff, int len)__attribute__((l1_text));
-#endif
-static unsigned short do_csum(const unsigned char *buff, int len)
-{
-        register unsigned long sum = 0;
-        int swappem = 0;
-        if (1 & (unsigned long)buff) {
-                sum = *buff << 8;
-                buff++;
-                len--;
-                ++swappem;
-        }
-        while (len > 1) {
-                sum += *(unsigned short *)buff;
-                buff += 2;
-                len -= 2;
-        }
-        if (len > 0)
-                sum += *buff;
-        /*  Fold 32-bit sum to 16 bits */
-        while (sum >> 16)
-                sum = (sum & 0xffff) + (sum >> 16);
-        if (swappem)
-                sum = ((sum & 0xff00) >> 8) + ((sum & 0x00ff) << 8);
-        return sum;
-}
-/*
- *      This is a version of ip_compute_csum() optimized for IP headers,
- *      which always checksum on 4 octet boundaries.
- */
-__sum16 ip_fast_csum(unsigned char *iph, unsigned int ihl)
-{
-        return (__force __sum16)~do_csum(iph, ihl * 4);
-}
-EXPORT_SYMBOL(ip_fast_csum);
-/*
- * computes the checksum of a memory block at buff, length len,
- * and adds in "sum" (32-bit)
- *
- * returns a 32-bit number suitable for feeding into itself
- * or csum_tcpudp_magic
- *
- * this function must be called with even lengths, except
- * for the last fragment, which may be odd
- *
- * it's best to have buff aligned on a 32-bit boundary
- */
-__wsum csum_partial(const void *buff, int len, __wsum sum)
-{
-        /*
-         * Just in case we get nasty checksum data...
-         * Like 0xffff6ec3 in the case of our IPv6 multicast header.
-         * We fold to begin with, as well as at the end.
-         */
-        sum = (sum & 0xffff) + (sum >> 16);
-        sum += do_csum(buff, len);
-        sum = (sum & 0xffff) + (sum >> 16);
-        return sum;
-}
-EXPORT_SYMBOL(csum_partial);
-/*
- * this routine is used for miscellaneous IP-like checksums, mainly
- * in icmp.c
- */
-__sum16 ip_compute_csum(const void *buff, int len)
-{
-        return (__force __sum16)~do_csum(buff, len);
-}
-EXPORT_SYMBOL(ip_compute_csum);
-/*
- * copy from fs while checksumming, otherwise like csum_partial
- */
-__wsum
-csum_partial_copy_from_user(const void __user *src, void *dst,
-                            int len, __wsum sum, int *csum_err)
-{
-        if (csum_err)
-                *csum_err = 0;
-        memcpy(dst, (__force void *)src, len);
-        return csum_partial(dst, len, sum);
-}
-EXPORT_SYMBOL(csum_partial_copy_from_user);
-/*
- * copy from ds while checksumming, otherwise like csum_partial
- */
-__wsum csum_partial_copy(const void *src, void *dst, int len, __wsum sum)
-{
-        memcpy(dst, src, len);
-        return csum_partial(dst, len, sum);
-}
-EXPORT_SYMBOL(csum_partial_copy);
diff --git a/arch/blackfin/mach-bf518/Kconfig b/arch/blackfin/mach-bf518/Kconfig
index 4c76fefb7a3b..4ab2d166c832 100644
--- a/arch/blackfin/mach-bf518/Kconfig
+++ b/arch/blackfin/mach-bf518/Kconfig
@@ -1,3 +1,7 @@
+config BF51x
+        def_bool y
+        depends on (BF512 || BF514 || BF516 || BF518)
 if (BF51x)
 source "arch/blackfin/mach-bf518/boards/Kconfig"
diff --git a/arch/blackfin/mach-bf518/include/mach/blackfin.h b/arch/blackfin/mach-bf518/include/mach/blackfin.h
index 6cfb246aebec..9053462be4b1 100644
--- a/arch/blackfin/mach-bf518/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf518/include/mach/blackfin.h
@@ -58,10 +58,4 @@
 #define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
 #define OFFSET_GCTL             0x24    /* Global Control Register              */
-/* PLL_DIV Masks                                                                                                        */
-#define CCLK_DIV1 CSEL_DIV1     /*          CCLK = VCO / 1                                  */
-#define CCLK_DIV2 CSEL_DIV2     /*          CCLK = VCO / 2                                  */
-#define CCLK_DIV4 CSEL_DIV4     /*          CCLK = VCO / 4                                  */
-#define CCLK_DIV8 CSEL_DIV8     /*          CCLK = VCO / 8                                  */
 #endif
diff --git a/arch/blackfin/mach-bf518/include/mach/cdefBF514.h b/arch/blackfin/mach-bf518/include/mach/cdefBF514.h
index e1d99911025d..108fa4bde277 100644
--- a/arch/blackfin/mach-bf518/include/mach/cdefBF514.h
+++ b/arch/blackfin/mach-bf518/include/mach/cdefBF514.h
@@ -1,7 +1,7 @@
 /*
 * Copyright 2008-2009 Analog Devices Inc.
 *
- * Licensed under the GPL-2 or later
+ * Licensed under the ADI BSD license or the GPL-2 (or later)
 */
 #ifndef _CDEF_BF514_H
@@ -10,15 +10,8 @@
 /* include all Core registers and bit definitions */
 #include "defBF514.h"
-/* include core specific register pointer definitions */
+/* BF514 is BF512 + RSI */
-#include <asm/cdef_LPBlackfin.h>
+#include "cdefBF512.h"
-/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF514 */
-/* include cdefBF51x_base.h for the set of #defines that are common to all ADSP-BF51x processors */
-#include "cdefBF51x_base.h"
-/* The following are the #defines needed by ADSP-BF514 that are not in the common header */
 /* Removable Storage Interface Registers */
diff --git a/arch/blackfin/mach-bf518/include/mach/cdefBF516.h b/arch/blackfin/mach-bf518/include/mach/cdefBF516.h
index 6b364eda4947..2751592ef1c1 100644
--- a/arch/blackfin/mach-bf518/include/mach/cdefBF516.h
+++ b/arch/blackfin/mach-bf518/include/mach/cdefBF516.h
@@ -1,7 +1,7 @@
 /*
 * Copyright 2008-2009 Analog Devices Inc.
 *
- * Licensed under the GPL-2 or later
+ * Licensed under the ADI BSD license or the GPL-2 (or later)
 */
 #ifndef _CDEF_BF516_H
@@ -10,15 +10,8 @@
 /* include all Core registers and bit definitions */
 #include "defBF516.h"
-/* include core specific register pointer definitions */
+/* BF516 is BF514 + EMAC */
-#include <asm/cdef_LPBlackfin.h>
+#include "cdefBF514.h"
-/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF516 */
-/* include cdefBF51x_base.h for the set of #defines that are common to all ADSP-BF51x processors */
-#include "cdefBF51x_base.h"
-/* The following are the #defines needed by ADSP-BF516 that are not in the common header */
 /* 10/100 Ethernet Controller   (0xFFC03000 - 0xFFC031FF) */
@@ -185,71 +178,4 @@
 #define bfin_read_EMAC_TXC_ABORT()              bfin_read32(EMAC_TXC_ABORT)
 #define bfin_write_EMAC_TXC_ABORT(val)          bfin_write32(EMAC_TXC_ABORT, val)
-/* Removable Storage Interface Registers */
-#define bfin_read_RSI_PWR_CTL()        bfin_read16(RSI_PWR_CONTROL)
-#define bfin_write_RSI_PWR_CTL(val)    bfin_write16(RSI_PWR_CONTROL, val)
-#define bfin_read_RSI_CLK_CTL()        bfin_read16(RSI_CLK_CONTROL)
-#define bfin_write_RSI_CLK_CTL(val)    bfin_write16(RSI_CLK_CONTROL, val)
-#define bfin_read_RSI_ARGUMENT()       bfin_read32(RSI_ARGUMENT)
-#define bfin_write_RSI_ARGUMENT(val)   bfin_write32(RSI_ARGUMENT, val)
-#define bfin_read_RSI_COMMAND()        bfin_read16(RSI_COMMAND)
-#define bfin_write_RSI_COMMAND(val)    bfin_write16(RSI_COMMAND, val)
-#define bfin_read_RSI_RESP_CMD()       bfin_read16(RSI_RESP_CMD)
-#define bfin_write_RSI_RESP_CMD(val)   bfin_write16(RSI_RESP_CMD, val)
-#define bfin_read_RSI_RESPONSE0()      bfin_read32(RSI_RESPONSE0)
-#define bfin_write_RSI_RESPONSE0(val)  bfin_write32(RSI_RESPONSE0, val)
-#define bfin_read_RSI_RESPONSE1()      bfin_read32(RSI_RESPONSE1)
-#define bfin_write_RSI_RESPONSE1(val)  bfin_write32(RSI_RESPONSE1, val)
-#define bfin_read_RSI_RESPONSE2()      bfin_read32(RSI_RESPONSE2)
-#define bfin_write_RSI_RESPONSE2(val)  bfin_write32(RSI_RESPONSE2, val)
-#define bfin_read_RSI_RESPONSE3()      bfin_read32(RSI_RESPONSE3)
-#define bfin_write_RSI_RESPONSE3(val)  bfin_write32(RSI_RESPONSE3, val)
-#define bfin_read_RSI_DATA_TIMER()     bfin_read32(RSI_DATA_TIMER)
-#define bfin_write_RSI_DATA_TIMER(val) bfin_write32(RSI_DATA_TIMER, val)
-#define bfin_read_RSI_DATA_LGTH()      bfin_read16(RSI_DATA_LGTH)
-#define bfin_write_RSI_DATA_LGTH(val)  bfin_write16(RSI_DATA_LGTH, val)
-#define bfin_read_RSI_DATA_CTL()       bfin_read16(RSI_DATA_CONTROL)
-#define bfin_write_RSI_DATA_CTL(val)   bfin_write16(RSI_DATA_CONTROL, val)
-#define bfin_read_RSI_DATA_CNT()       bfin_read16(RSI_DATA_CNT)
-#define bfin_write_RSI_DATA_CNT(val)   bfin_write16(RSI_DATA_CNT, val)
-#define bfin_read_RSI_STATUS()         bfin_read32(RSI_STATUS)
-#define bfin_write_RSI_STATUS(val)     bfin_write32(RSI_STATUS, val)
-#define bfin_read_RSI_STATUS_CLR()     bfin_read16(RSI_STATUSCL)
-#define bfin_write_RSI_STATUS_CLR(val) bfin_write16(RSI_STATUSCL, val)
-#define bfin_read_RSI_MASK0()          bfin_read32(RSI_MASK0)
-#define bfin_write_RSI_MASK0(val)      bfin_write32(RSI_MASK0, val)
-#define bfin_read_RSI_MASK1()          bfin_read32(RSI_MASK1)
-#define bfin_write_RSI_MASK1(val)      bfin_write32(RSI_MASK1, val)
-#define bfin_read_RSI_FIFO_CNT()       bfin_read16(RSI_FIFO_CNT)
-#define bfin_write_RSI_FIFO_CNT(val)   bfin_write16(RSI_FIFO_CNT, val)
-#define bfin_read_RSI_CEATA_CTL()      bfin_read16(RSI_CEATA_CONTROL)
-#define bfin_write_RSI_CEATA_CTL(val)  bfin_write16(RSI_CEATA_CONTROL, val)
-#define bfin_read_RSI_FIFO()           bfin_read32(RSI_FIFO)
-#define bfin_write_RSI_FIFO(val)       bfin_write32(RSI_FIFO, val)
-#define bfin_read_RSI_E_STATUS()       bfin_read16(RSI_ESTAT)
-#define bfin_write_RSI_E_STATUS(val)   bfin_write16(RSI_ESTAT, val)
-#define bfin_read_RSI_E_MASK()         bfin_read16(RSI_EMASK)
-#define bfin_write_RSI_E_MASK(val)     bfin_write16(RSI_EMASK, val)
-#define bfin_read_RSI_CFG()            bfin_read16(RSI_CONFIG)
-#define bfin_write_RSI_CFG(val)        bfin_write16(RSI_CONFIG, val)
-#define bfin_read_RSI_RD_WAIT_EN()     bfin_read16(RSI_RD_WAIT_EN)
-#define bfin_write_RSI_RD_WAIT_EN(val) bfin_write16(RSI_RD_WAIT_EN, val)
-#define bfin_read_RSI_PID0()           bfin_read16(RSI_PID0)
-#define bfin_write_RSI_PID0(val)       bfin_write16(RSI_PID0, val)
-#define bfin_read_RSI_PID1()           bfin_read16(RSI_PID1)
-#define bfin_write_RSI_PID1(val)       bfin_write16(RSI_PID1, val)
-#define bfin_read_RSI_PID2()           bfin_read16(RSI_PID2)
-#define bfin_write_RSI_PID2(val)       bfin_write16(RSI_PID2, val)
-#define bfin_read_RSI_PID3()           bfin_read16(RSI_PID3)
-#define bfin_write_RSI_PID3(val)       bfin_write16(RSI_PID3, val)
-#define bfin_read_RSI_PID4()           bfin_read16(RSI_PID4)
-#define bfin_write_RSI_PID4(val)       bfin_write16(RSI_PID4, val)
-#define bfin_read_RSI_PID5()           bfin_read16(RSI_PID5)
-#define bfin_write_RSI_PID5(val)       bfin_write16(RSI_PID5, val)
-#define bfin_read_RSI_PID6()           bfin_read16(RSI_PID6)
-#define bfin_write_RSI_PID6(val)       bfin_write16(RSI_PID6, val)
-#define bfin_read_RSI_PID7()           bfin_read16(RSI_PID7)
-#define bfin_write_RSI_PID7(val)       bfin_write16(RSI_PID7, val)
 #endif /* _CDEF_BF516_H */
diff --git a/arch/blackfin/mach-bf518/include/mach/cdefBF518.h b/arch/blackfin/mach-bf518/include/mach/cdefBF518.h
index 929b90650bd4..7fb7f0eab990 100644
--- a/arch/blackfin/mach-bf518/include/mach/cdefBF518.h
+++ b/arch/blackfin/mach-bf518/include/mach/cdefBF518.h
@@ -1,7 +1,7 @@
 /*
 * Copyright 2008-2009 Analog Devices Inc.
 *
- * Licensed under the GPL-2 or later
+ * Licensed under the ADI BSD license or the GPL-2 (or later)
 */
 #ifndef _CDEF_BF518_H
@@ -10,181 +10,10 @@
 /* include all Core registers and bit definitions */
 #include "defBF518.h"
-/* include core specific register pointer definitions */
+/* BF518 is BF516 + IEEE-1588 */
-#include <asm/cdef_LPBlackfin.h>
+#include "cdefBF516.h"
-/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF518 */
+/* PTP TSYNC Registers */
-/* include cdefBF51x_base.h for the set of #defines that are common to all ADSP-BF51x processors */
-#include "cdefBF51x_base.h"
-/* The following are the #defines needed by ADSP-BF518 that are not in the common header */
-/* 10/100 Ethernet Controller   (0xFFC03000 - 0xFFC031FF) */
-#define bfin_read_EMAC_OPMODE()                 bfin_read32(EMAC_OPMODE)
-#define bfin_write_EMAC_OPMODE(val)             bfin_write32(EMAC_OPMODE, val)
-#define bfin_read_EMAC_ADDRLO()                 bfin_read32(EMAC_ADDRLO)
-#define bfin_write_EMAC_ADDRLO(val)             bfin_write32(EMAC_ADDRLO, val)
-#define bfin_read_EMAC_ADDRHI()                 bfin_read32(EMAC_ADDRHI)
-#define bfin_write_EMAC_ADDRHI(val)             bfin_write32(EMAC_ADDRHI, val)
-#define bfin_read_EMAC_HASHLO()                 bfin_read32(EMAC_HASHLO)
-#define bfin_write_EMAC_HASHLO(val)             bfin_write32(EMAC_HASHLO, val)
-#define bfin_read_EMAC_HASHHI()                 bfin_read32(EMAC_HASHHI)
-#define bfin_write_EMAC_HASHHI(val)             bfin_write32(EMAC_HASHHI, val)
-#define bfin_read_EMAC_STAADD()                 bfin_read32(EMAC_STAADD)
-#define bfin_write_EMAC_STAADD(val)             bfin_write32(EMAC_STAADD, val)
-#define bfin_read_EMAC_STADAT()                 bfin_read32(EMAC_STADAT)
-#define bfin_write_EMAC_STADAT(val)             bfin_write32(EMAC_STADAT, val)
-#define bfin_read_EMAC_FLC()                    bfin_read32(EMAC_FLC)
-#define bfin_write_EMAC_FLC(val)                bfin_write32(EMAC_FLC, val)
-#define bfin_read_EMAC_VLAN1()                  bfin_read32(EMAC_VLAN1)
-#define bfin_write_EMAC_VLAN1(val)              bfin_write32(EMAC_VLAN1, val)
-#define bfin_read_EMAC_VLAN2()                  bfin_read32(EMAC_VLAN2)
-#define bfin_write_EMAC_VLAN2(val)              bfin_write32(EMAC_VLAN2, val)
-#define bfin_read_EMAC_WKUP_CTL()               bfin_read32(EMAC_WKUP_CTL)
-#define bfin_write_EMAC_WKUP_CTL(val)           bfin_write32(EMAC_WKUP_CTL, val)
-#define bfin_read_EMAC_WKUP_FFMSK0()            bfin_read32(EMAC_WKUP_FFMSK0)
-#define bfin_write_EMAC_WKUP_FFMSK0(val)        bfin_write32(EMAC_WKUP_FFMSK0, val)
-#define bfin_read_EMAC_WKUP_FFMSK1()            bfin_read32(EMAC_WKUP_FFMSK1)
-#define bfin_write_EMAC_WKUP_FFMSK1(val)        bfin_write32(EMAC_WKUP_FFMSK1, val)
-#define bfin_read_EMAC_WKUP_FFMSK2()            bfin_read32(EMAC_WKUP_FFMSK2)
-#define bfin_write_EMAC_WKUP_FFMSK2(val)        bfin_write32(EMAC_WKUP_FFMSK2, val)
-#define bfin_read_EMAC_WKUP_FFMSK3()            bfin_read32(EMAC_WKUP_FFMSK3)
-#define bfin_write_EMAC_WKUP_FFMSK3(val)        bfin_write32(EMAC_WKUP_FFMSK3, val)
-#define bfin_read_EMAC_WKUP_FFCMD()             bfin_read32(EMAC_WKUP_FFCMD)
-#define bfin_write_EMAC_WKUP_FFCMD(val)         bfin_write32(EMAC_WKUP_FFCMD, val)
-#define bfin_read_EMAC_WKUP_FFOFF()             bfin_read32(EMAC_WKUP_FFOFF)
-#define bfin_write_EMAC_WKUP_FFOFF(val)         bfin_write32(EMAC_WKUP_FFOFF, val)
-#define bfin_read_EMAC_WKUP_FFCRC0()            bfin_read32(EMAC_WKUP_FFCRC0)
-#define bfin_write_EMAC_WKUP_FFCRC0(val)        bfin_write32(EMAC_WKUP_FFCRC0, val)
-#define bfin_read_EMAC_WKUP_FFCRC1()            bfin_read32(EMAC_WKUP_FFCRC1)
-#define bfin_write_EMAC_WKUP_FFCRC1(val)        bfin_write32(EMAC_WKUP_FFCRC1, val)
-#define bfin_read_EMAC_SYSCTL()                 bfin_read32(EMAC_SYSCTL)
-#define bfin_write_EMAC_SYSCTL(val)             bfin_write32(EMAC_SYSCTL, val)
-#define bfin_read_EMAC_SYSTAT()                 bfin_read32(EMAC_SYSTAT)
-#define bfin_write_EMAC_SYSTAT(val)             bfin_write32(EMAC_SYSTAT, val)
-#define bfin_read_EMAC_RX_STAT()                bfin_read32(EMAC_RX_STAT)
-#define bfin_write_EMAC_RX_STAT(val)            bfin_write32(EMAC_RX_STAT, val)
-#define bfin_read_EMAC_RX_STKY()                bfin_read32(EMAC_RX_STKY)
-#define bfin_write_EMAC_RX_STKY(val)            bfin_write32(EMAC_RX_STKY, val)
-#define bfin_read_EMAC_RX_IRQE()                bfin_read32(EMAC_RX_IRQE)
-#define bfin_write_EMAC_RX_IRQE(val)            bfin_write32(EMAC_RX_IRQE, val)
-#define bfin_read_EMAC_TX_STAT()                bfin_read32(EMAC_TX_STAT)
-#define bfin_write_EMAC_TX_STAT(val)            bfin_write32(EMAC_TX_STAT, val)
-#define bfin_read_EMAC_TX_STKY()                bfin_read32(EMAC_TX_STKY)
-#define bfin_write_EMAC_TX_STKY(val)            bfin_write32(EMAC_TX_STKY, val)
-#define bfin_read_EMAC_TX_IRQE()                bfin_read32(EMAC_TX_IRQE)
-#define bfin_write_EMAC_TX_IRQE(val)            bfin_write32(EMAC_TX_IRQE, val)
-#define bfin_read_EMAC_MMC_CTL()                bfin_read32(EMAC_MMC_CTL)
-#define bfin_write_EMAC_MMC_CTL(val)            bfin_write32(EMAC_MMC_CTL, val)
-#define bfin_read_EMAC_MMC_RIRQS()              bfin_read32(EMAC_MMC_RIRQS)
-#define bfin_write_EMAC_MMC_RIRQS(val)          bfin_write32(EMAC_MMC_RIRQS, val)
-#define bfin_read_EMAC_MMC_RIRQE()              bfin_read32(EMAC_MMC_RIRQE)
-#define bfin_write_EMAC_MMC_RIRQE(val)          bfin_write32(EMAC_MMC_RIRQE, val)
-#define bfin_read_EMAC_MMC_TIRQS()              bfin_read32(EMAC_MMC_TIRQS)
-#define bfin_write_EMAC_MMC_TIRQS(val)          bfin_write32(EMAC_MMC_TIRQS, val)
-#define bfin_read_EMAC_MMC_TIRQE()              bfin_read32(EMAC_MMC_TIRQE)
-#define bfin_write_EMAC_MMC_TIRQE(val)          bfin_write32(EMAC_MMC_TIRQE, val)
-#define bfin_read_EMAC_RXC_OK()                 bfin_read32(EMAC_RXC_OK)
-#define bfin_write_EMAC_RXC_OK(val)             bfin_write32(EMAC_RXC_OK, val)
-#define bfin_read_EMAC_RXC_FCS()                bfin_read32(EMAC_RXC_FCS)
-#define bfin_write_EMAC_RXC_FCS(val)            bfin_write32(EMAC_RXC_FCS, val)
-#define bfin_read_EMAC_RXC_ALIGN()              bfin_read32(EMAC_RXC_ALIGN)
-#define bfin_write_EMAC_RXC_ALIGN(val)          bfin_write32(EMAC_RXC_ALIGN, val)
-#define bfin_read_EMAC_RXC_OCTET()              bfin_read32(EMAC_RXC_OCTET)
-#define bfin_write_EMAC_RXC_OCTET(val)          bfin_write32(EMAC_RXC_OCTET, val)
-#define bfin_read_EMAC_RXC_DMAOVF()             bfin_read32(EMAC_RXC_DMAOVF)
-#define bfin_write_EMAC_RXC_DMAOVF(val)         bfin_write32(EMAC_RXC_DMAOVF, val)
-#define bfin_read_EMAC_RXC_UNICST()             bfin_read32(EMAC_RXC_UNICST)
-#define bfin_write_EMAC_RXC_UNICST(val)         bfin_write32(EMAC_RXC_UNICST, val)
-#define bfin_read_EMAC_RXC_MULTI()              bfin_read32(EMAC_RXC_MULTI)
-#define bfin_write_EMAC_RXC_MULTI(val)          bfin_write32(EMAC_RXC_MULTI, val)
-#define bfin_read_EMAC_RXC_BROAD()              bfin_read32(EMAC_RXC_BROAD)
-#define bfin_write_EMAC_RXC_BROAD(val)          bfin_write32(EMAC_RXC_BROAD, val)
-#define bfin_read_EMAC_RXC_LNERRI()             bfin_read32(EMAC_RXC_LNERRI)
-#define bfin_write_EMAC_RXC_LNERRI(val)         bfin_write32(EMAC_RXC_LNERRI, val)
-#define bfin_read_EMAC_RXC_LNERRO()             bfin_read32(EMAC_RXC_LNERRO)
-#define bfin_write_EMAC_RXC_LNERRO(val)         bfin_write32(EMAC_RXC_LNERRO, val)
-#define bfin_read_EMAC_RXC_LONG()               bfin_read32(EMAC_RXC_LONG)
-#define bfin_write_EMAC_RXC_LONG(val)           bfin_write32(EMAC_RXC_LONG, val)
-#define bfin_read_EMAC_RXC_MACCTL()             bfin_read32(EMAC_RXC_MACCTL)
-#define bfin_write_EMAC_RXC_MACCTL(val)         bfin_write32(EMAC_RXC_MACCTL, val)
-#define bfin_read_EMAC_RXC_OPCODE()             bfin_read32(EMAC_RXC_OPCODE)
-#define bfin_write_EMAC_RXC_OPCODE(val)         bfin_write32(EMAC_RXC_OPCODE, val)
-#define bfin_read_EMAC_RXC_PAUSE()              bfin_read32(EMAC_RXC_PAUSE)
-#define bfin_write_EMAC_RXC_PAUSE(val)          bfin_write32(EMAC_RXC_PAUSE, val)
-#define bfin_read_EMAC_RXC_ALLFRM()             bfin_read32(EMAC_RXC_ALLFRM)
-#define bfin_write_EMAC_RXC_ALLFRM(val)         bfin_write32(EMAC_RXC_ALLFRM, val)
-#define bfin_read_EMAC_RXC_ALLOCT()             bfin_read32(EMAC_RXC_ALLOCT)
-#define bfin_write_EMAC_RXC_ALLOCT(val)         bfin_write32(EMAC_RXC_ALLOCT, val)
-#define bfin_read_EMAC_RXC_TYPED()              bfin_read32(EMAC_RXC_TYPED)
-#define bfin_write_EMAC_RXC_TYPED(val)          bfin_write32(EMAC_RXC_TYPED, val)
-#define bfin_read_EMAC_RXC_SHORT()              bfin_read32(EMAC_RXC_SHORT)
-#define bfin_write_EMAC_RXC_SHORT(val)          bfin_write32(EMAC_RXC_SHORT, val)
-#define bfin_read_EMAC_RXC_EQ64()               bfin_read32(EMAC_RXC_EQ64)
-#define bfin_write_EMAC_RXC_EQ64(val)           bfin_write32(EMAC_RXC_EQ64, val)
-#define bfin_read_EMAC_RXC_LT128()              bfin_read32(EMAC_RXC_LT128)
-#define bfin_write_EMAC_RXC_LT128(val)          bfin_write32(EMAC_RXC_LT128, val)
-#define bfin_read_EMAC_RXC_LT256()              bfin_read32(EMAC_RXC_LT256)
-#define bfin_write_EMAC_RXC_LT256(val)          bfin_write32(EMAC_RXC_LT256, val)
-#define bfin_read_EMAC_RXC_LT512()              bfin_read32(EMAC_RXC_LT512)
-#define bfin_write_EMAC_RXC_LT512(val)          bfin_write32(EMAC_RXC_LT512, val)
-#define bfin_read_EMAC_RXC_LT1024()             bfin_read32(EMAC_RXC_LT1024)
-#define bfin_write_EMAC_RXC_LT1024(val)         bfin_write32(EMAC_RXC_LT1024, val)
-#define bfin_read_EMAC_RXC_GE1024()             bfin_read32(EMAC_RXC_GE1024)
-#define bfin_write_EMAC_RXC_GE1024(val)         bfin_write32(EMAC_RXC_GE1024, val)
-#define bfin_read_EMAC_TXC_OK()                 bfin_read32(EMAC_TXC_OK)
-#define bfin_write_EMAC_TXC_OK(val)             bfin_write32(EMAC_TXC_OK, val)
-#define bfin_read_EMAC_TXC_1COL()               bfin_read32(EMAC_TXC_1COL)
-#define bfin_write_EMAC_TXC_1COL(val)           bfin_write32(EMAC_TXC_1COL, val)
-#define bfin_read_EMAC_TXC_GT1COL()             bfin_read32(EMAC_TXC_GT1COL)
-#define bfin_write_EMAC_TXC_GT1COL(val)         bfin_write32(EMAC_TXC_GT1COL, val)
-#define bfin_read_EMAC_TXC_OCTET()              bfin_read32(EMAC_TXC_OCTET)
-#define bfin_write_EMAC_TXC_OCTET(val)          bfin_write32(EMAC_TXC_OCTET, val)
-#define bfin_read_EMAC_TXC_DEFER()              bfin_read32(EMAC_TXC_DEFER)
-#define bfin_write_EMAC_TXC_DEFER(val)          bfin_write32(EMAC_TXC_DEFER, val)
-#define bfin_read_EMAC_TXC_LATECL()             bfin_read32(EMAC_TXC_LATECL)
-#define bfin_write_EMAC_TXC_LATECL(val)         bfin_write32(EMAC_TXC_LATECL, val)
-#define bfin_read_EMAC_TXC_XS_COL()             bfin_read32(EMAC_TXC_XS_COL)
-#define bfin_write_EMAC_TXC_XS_COL(val)         bfin_write32(EMAC_TXC_XS_COL, val)
-#define bfin_read_EMAC_TXC_DMAUND()             bfin_read32(EMAC_TXC_DMAUND)
-#define bfin_write_EMAC_TXC_DMAUND(val)         bfin_write32(EMAC_TXC_DMAUND, val)
-#define bfin_read_EMAC_TXC_CRSERR()             bfin_read32(EMAC_TXC_CRSERR)
-#define bfin_write_EMAC_TXC_CRSERR(val)         bfin_write32(EMAC_TXC_CRSERR, val)
-#define bfin_read_EMAC_TXC_UNICST()             bfin_read32(EMAC_TXC_UNICST)
-#define bfin_write_EMAC_TXC_UNICST(val)         bfin_write32(EMAC_TXC_UNICST, val)
-#define bfin_read_EMAC_TXC_MULTI()              bfin_read32(EMAC_TXC_MULTI)
-#define bfin_write_EMAC_TXC_MULTI(val)          bfin_write32(EMAC_TXC_MULTI, val)
-#define bfin_read_EMAC_TXC_BROAD()              bfin_read32(EMAC_TXC_BROAD)
-#define bfin_write_EMAC_TXC_BROAD(val)          bfin_write32(EMAC_TXC_BROAD, val)
-#define bfin_read_EMAC_TXC_XS_DFR()             bfin_read32(EMAC_TXC_XS_DFR)
-#define bfin_write_EMAC_TXC_XS_DFR(val)         bfin_write32(EMAC_TXC_XS_DFR, val)
-#define bfin_read_EMAC_TXC_MACCTL()             bfin_read32(EMAC_TXC_MACCTL)
-#define bfin_write_EMAC_TXC_MACCTL(val)         bfin_write32(EMAC_TXC_MACCTL, val)
-#define bfin_read_EMAC_TXC_ALLFRM()             bfin_read32(EMAC_TXC_ALLFRM)
-#define bfin_write_EMAC_TXC_ALLFRM(val)         bfin_write32(EMAC_TXC_ALLFRM, val)
-#define bfin_read_EMAC_TXC_ALLOCT()             bfin_read32(EMAC_TXC_ALLOCT)
-#define bfin_write_EMAC_TXC_ALLOCT(val)         bfin_write32(EMAC_TXC_ALLOCT, val)
-#define bfin_read_EMAC_TXC_EQ64()               bfin_read32(EMAC_TXC_EQ64)
-#define bfin_write_EMAC_TXC_EQ64(val)           bfin_write32(EMAC_TXC_EQ64, val)
-#define bfin_read_EMAC_TXC_LT128()              bfin_read32(EMAC_TXC_LT128)
-#define bfin_write_EMAC_TXC_LT128(val)          bfin_write32(EMAC_TXC_LT128, val)
-#define bfin_read_EMAC_TXC_LT256()              bfin_read32(EMAC_TXC_LT256)
-#define bfin_write_EMAC_TXC_LT256(val)          bfin_write32(EMAC_TXC_LT256, val)
-#define bfin_read_EMAC_TXC_LT512()              bfin_read32(EMAC_TXC_LT512)
-#define bfin_write_EMAC_TXC_LT512(val)          bfin_write32(EMAC_TXC_LT512, val)
-#define bfin_read_EMAC_TXC_LT1024()             bfin_read32(EMAC_TXC_LT1024)
-#define bfin_write_EMAC_TXC_LT1024(val)         bfin_write32(EMAC_TXC_LT1024, val)
-#define bfin_read_EMAC_TXC_GE1024()             bfin_read32(EMAC_TXC_GE1024)
-#define bfin_write_EMAC_TXC_GE1024(val)         bfin_write32(EMAC_TXC_GE1024, val)
-#define bfin_read_EMAC_TXC_ABORT()              bfin_read32(EMAC_TXC_ABORT)
-#define bfin_write_EMAC_TXC_ABORT(val)          bfin_write32(EMAC_TXC_ABORT, val)
 #define bfin_read_EMAC_PTP_CTL()                bfin_read16(EMAC_PTP_CTL)
 #define bfin_write_EMAC_PTP_CTL(val)            bfin_write16(EMAC_PTP_CTL, val)
@@ -227,72 +56,4 @@
 #define bfin_read_EMAC_PTP_PPS_PERIOD()         bfin_read32(EMAC_PTP_PPS_PERIOD)
 #define bfin_write_EMAC_PTP_PPS_PERIOD(val)     bfin_write32(EMAC_PTP_PPS_PERIOD, val)
-/* Removable Storage Interface Registers */
-#define bfin_read_RSI_PWR_CTL()        bfin_read16(RSI_PWR_CONTROL)
-#define bfin_write_RSI_PWR_CTL(val)    bfin_write16(RSI_PWR_CONTROL, val)
-#define bfin_read_RSI_CLK_CTL()        bfin_read16(RSI_CLK_CONTROL)
-#define bfin_write_RSI_CLK_CTL(val)    bfin_write16(RSI_CLK_CONTROL, val)
-#define bfin_read_RSI_ARGUMENT()       bfin_read32(RSI_ARGUMENT)
-#define bfin_write_RSI_ARGUMENT(val)   bfin_write32(RSI_ARGUMENT, val)
-#define bfin_read_RSI_COMMAND()        bfin_read16(RSI_COMMAND)
-#define bfin_write_RSI_COMMAND(val)    bfin_write16(RSI_COMMAND, val)
-#define bfin_read_RSI_RESP_CMD()       bfin_read16(RSI_RESP_CMD)
-#define bfin_write_RSI_RESP_CMD(val)   bfin_write16(RSI_RESP_CMD, val)
-#define bfin_read_RSI_RESPONSE0()      bfin_read32(RSI_RESPONSE0)
-#define bfin_write_RSI_RESPONSE0(val)  bfin_write32(RSI_RESPONSE0, val)
-#define bfin_read_RSI_RESPONSE1()      bfin_read32(RSI_RESPONSE1)
-#define bfin_write_RSI_RESPONSE1(val)  bfin_write32(RSI_RESPONSE1, val)
-#define bfin_read_RSI_RESPONSE2()      bfin_read32(RSI_RESPONSE2)
-#define bfin_write_RSI_RESPONSE2(val)  bfin_write32(RSI_RESPONSE2, val)
-#define bfin_read_RSI_RESPONSE3()      bfin_read32(RSI_RESPONSE3)
-#define bfin_write_RSI_RESPONSE3(val)  bfin_write32(RSI_RESPONSE3, val)
-#define bfin_read_RSI_DATA_TIMER()     bfin_read32(RSI_DATA_TIMER)
-#define bfin_write_RSI_DATA_TIMER(val) bfin_write32(RSI_DATA_TIMER, val)
-#define bfin_read_RSI_DATA_LGTH()      bfin_read16(RSI_DATA_LGTH)
-#define bfin_write_RSI_DATA_LGTH(val)  bfin_write16(RSI_DATA_LGTH, val)
-#define bfin_read_RSI_DATA_CTL()       bfin_read16(RSI_DATA_CONTROL)
-#define bfin_write_RSI_DATA_CTL(val)   bfin_write16(RSI_DATA_CONTROL, val)
-#define bfin_read_RSI_DATA_CNT()       bfin_read16(RSI_DATA_CNT)
-#define bfin_write_RSI_DATA_CNT(val)   bfin_write16(RSI_DATA_CNT, val)
-#define bfin_read_RSI_STATUS()         bfin_read32(RSI_STATUS)
-#define bfin_write_RSI_STATUS(val)     bfin_write32(RSI_STATUS, val)
-#define bfin_read_RSI_STATUS_CLR()     bfin_read16(RSI_STATUSCL)
-#define bfin_write_RSI_STATUS_CLR(val) bfin_write16(RSI_STATUSCL, val)
-#define bfin_read_RSI_MASK0()          bfin_read32(RSI_MASK0)
-#define bfin_write_RSI_MASK0(val)      bfin_write32(RSI_MASK0, val)
-#define bfin_read_RSI_MASK1()          bfin_read32(RSI_MASK1)
-#define bfin_write_RSI_MASK1(val)      bfin_write32(RSI_MASK1, val)
-#define bfin_read_RSI_FIFO_CNT()       bfin_read16(RSI_FIFO_CNT)
-#define bfin_write_RSI_FIFO_CNT(val)   bfin_write16(RSI_FIFO_CNT, val)
-#define bfin_read_RSI_CEATA_CTL()      bfin_read16(RSI_CEATA_CONTROL)
-#define bfin_write_RSI_CEATA_CTL(val)  bfin_write16(RSI_CEATA_CONTROL, val)
-#define bfin_read_RSI_FIFO()           bfin_read32(RSI_FIFO)
-#define bfin_write_RSI_FIFO(val)       bfin_write32(RSI_FIFO, val)
-#define bfin_read_RSI_E_STATUS()       bfin_read16(RSI_ESTAT)
-#define bfin_write_RSI_E_STATUS(val)   bfin_write16(RSI_ESTAT, val)
-#define bfin_read_RSI_E_MASK()         bfin_read16(RSI_EMASK)
-#define bfin_write_RSI_E_MASK(val)     bfin_write16(RSI_EMASK, val)
-#define bfin_read_RSI_CFG()            bfin_read16(RSI_CONFIG)
-#define bfin_write_RSI_CFG(val)        bfin_write16(RSI_CONFIG, val)
-#define bfin_read_RSI_RD_WAIT_EN()     bfin_read16(RSI_RD_WAIT_EN)
-#define bfin_write_RSI_RD_WAIT_EN(val) bfin_write16(RSI_RD_WAIT_EN, val)
-#define bfin_read_RSI_PID0()           bfin_read16(RSI_PID0)
-#define bfin_write_RSI_PID0(val)       bfin_write16(RSI_PID0, val)
-#define bfin_read_RSI_PID1()           bfin_read16(RSI_PID1)
-#define bfin_write_RSI_PID1(val)       bfin_write16(RSI_PID1, val)
-#define bfin_read_RSI_PID2()           bfin_read16(RSI_PID2)
-#define bfin_write_RSI_PID2(val)       bfin_write16(RSI_PID2, val)
-#define bfin_read_RSI_PID3()           bfin_read16(RSI_PID3)
-#define bfin_write_RSI_PID3(val)       bfin_write16(RSI_PID3, val)
-#define bfin_read_RSI_PID4()           bfin_read16(RSI_PID4)
-#define bfin_write_RSI_PID4(val)       bfin_write16(RSI_PID4, val)
-#define bfin_read_RSI_PID5()           bfin_read16(RSI_PID5)
-#define bfin_write_RSI_PID5(val)       bfin_write16(RSI_PID5, val)
-#define bfin_read_RSI_PID6()           bfin_read16(RSI_PID6)
-#define bfin_write_RSI_PID6(val)       bfin_write16(RSI_PID6, val)
-#define bfin_read_RSI_PID7()           bfin_read16(RSI_PID7)
-#define bfin_write_RSI_PID7(val)       bfin_write16(RSI_PID7, val)
 #endif /* _CDEF_BF518_H */
diff --git a/arch/blackfin/mach-bf518/include/mach/cdefBF51x_base.h b/arch/blackfin/mach-bf518/include/mach/cdefBF51x_base.h
index 1d970df7aee9..e548e9d1d6fa 100644
--- a/arch/blackfin/mach-bf518/include/mach/cdefBF51x_base.h
+++ b/arch/blackfin/mach-bf518/include/mach/cdefBF51x_base.h
@@ -131,23 +131,6 @@
 #define bfin_write_UART0_GCTL(val)              bfin_write16(UART0_GCTL, val)
-/* SPI Controller               (0xFFC00500 - 0xFFC005FF)                                                                       */
-#define bfin_read_SPI_CTL()                     bfin_read16(SPI_CTL)
-#define bfin_write_SPI_CTL(val)                 bfin_write16(SPI_CTL, val)
-#define bfin_read_SPI_FLG()                     bfin_read16(SPI_FLG)
-#define bfin_write_SPI_FLG(val)                 bfin_write16(SPI_FLG, val)
-#define bfin_read_SPI_STAT()                    bfin_read16(SPI_STAT)
-#define bfin_write_SPI_STAT(val)                bfin_write16(SPI_STAT, val)
-#define bfin_read_SPI_TDBR()                    bfin_read16(SPI_TDBR)
-#define bfin_write_SPI_TDBR(val)                bfin_write16(SPI_TDBR, val)
-#define bfin_read_SPI_RDBR()                    bfin_read16(SPI_RDBR)
-#define bfin_write_SPI_RDBR(val)                bfin_write16(SPI_RDBR, val)
-#define bfin_read_SPI_BAUD()                    bfin_read16(SPI_BAUD)
-#define bfin_write_SPI_BAUD(val)                bfin_write16(SPI_BAUD, val)
-#define bfin_read_SPI_SHADOW()                  bfin_read16(SPI_SHADOW)
-#define bfin_write_SPI_SHADOW(val)              bfin_write16(SPI_SHADOW, val)
 /* TIMER0-7 Registers           (0xFFC00600 - 0xFFC006FF)                                                               */
 #define bfin_read_TIMER0_CONFIG()               bfin_read16(TIMER0_CONFIG)
 #define bfin_write_TIMER0_CONFIG(val)           bfin_write16(TIMER0_CONFIG, val)
@@ -844,6 +827,7 @@
 #define bfin_write_PPI_CONTROL(val)             bfin_write16(PPI_CONTROL, val)
 #define bfin_read_PPI_STATUS()                  bfin_read16(PPI_STATUS)
 #define bfin_write_PPI_STATUS(val)              bfin_write16(PPI_STATUS, val)
+#define bfin_clear_PPI_STATUS()                 bfin_write_PPI_STATUS(0xFFFF)
 #define bfin_read_PPI_DELAY()                   bfin_read16(PPI_DELAY)
 #define bfin_write_PPI_DELAY(val)               bfin_write16(PPI_DELAY, val)
 #define bfin_read_PPI_COUNT()                   bfin_read16(PPI_COUNT)
@@ -1062,17 +1046,6 @@
 #define bfin_read_CNT_MIN()                     bfin_read32(CNT_MIN)
 #define bfin_write_CNT_MIN(val)                 bfin_write32(CNT_MIN, val)
-/* OTP/FUSE Registers */
-#define bfin_read_OTP_CONTROL()                 bfin_read16(OTP_CONTROL)
-#define bfin_write_OTP_CONTROL(val)             bfin_write16(OTP_CONTROL, val)
-#define bfin_read_OTP_BEN()                     bfin_read16(OTP_BEN)
-#define bfin_write_OTP_BEN(val)                 bfin_write16(OTP_BEN, val)
-#define bfin_read_OTP_STATUS()                  bfin_read16(OTP_STATUS)
-#define bfin_write_OTP_STATUS(val)              bfin_write16(OTP_STATUS, val)
-#define bfin_read_OTP_TIMING()                  bfin_read32(OTP_TIMING)
-#define bfin_write_OTP_TIMING(val)              bfin_write32(OTP_TIMING, val)
 /* Security Registers */
 #define bfin_read_SECURE_SYSSWT()               bfin_read32(SECURE_SYSSWT)
@@ -1082,52 +1055,6 @@
 #define bfin_read_SECURE_STATUS()               bfin_read16(SECURE_STATUS)
 #define bfin_write_SECURE_STATUS(val)           bfin_write16(SECURE_STATUS, val)
-/* OTP Read/Write Data Buffer Registers */
-#define bfin_read_OTP_DATA0()                   bfin_read32(OTP_DATA0)
-#define bfin_write_OTP_DATA0(val)               bfin_write32(OTP_DATA0, val)
-#define bfin_read_OTP_DATA1()                   bfin_read32(OTP_DATA1)
-#define bfin_write_OTP_DATA1(val)               bfin_write32(OTP_DATA1, val)
-#define bfin_read_OTP_DATA2()                   bfin_read32(OTP_DATA2)
-#define bfin_write_OTP_DATA2(val)               bfin_write32(OTP_DATA2, val)
-#define bfin_read_OTP_DATA3()                   bfin_read32(OTP_DATA3)
-#define bfin_write_OTP_DATA3(val)               bfin_write32(OTP_DATA3, val)
-/* NFC Registers */
-#define bfin_read_NFC_CTL()                     bfin_read16(NFC_CTL)
-#define bfin_write_NFC_CTL(val)                 bfin_write16(NFC_CTL, val)
-#define bfin_read_NFC_STAT()                    bfin_read16(NFC_STAT)
-#define bfin_write_NFC_STAT(val)                bfin_write16(NFC_STAT, val)
-#define bfin_read_NFC_IRQSTAT()                 bfin_read16(NFC_IRQSTAT)
-#define bfin_write_NFC_IRQSTAT(val)             bfin_write16(NFC_IRQSTAT, val)
-#define bfin_read_NFC_IRQMASK()                 bfin_read16(NFC_IRQMASK)
-#define bfin_write_NFC_IRQMASK(val)             bfin_write16(NFC_IRQMASK, val)
-#define bfin_read_NFC_ECC0()                    bfin_read16(NFC_ECC0)
-#define bfin_write_NFC_ECC0(val)                bfin_write16(NFC_ECC0, val)
-#define bfin_read_NFC_ECC1()                    bfin_read16(NFC_ECC1)
-#define bfin_write_NFC_ECC1(val)                bfin_write16(NFC_ECC1, val)
-#define bfin_read_NFC_ECC2()                    bfin_read16(NFC_ECC2)
-#define bfin_write_NFC_ECC2(val)                bfin_write16(NFC_ECC2, val)
-#define bfin_read_NFC_ECC3()                    bfin_read16(NFC_ECC3)
-#define bfin_write_NFC_ECC3(val)                bfin_write16(NFC_ECC3, val)
-#define bfin_read_NFC_COUNT()                   bfin_read16(NFC_COUNT)
-#define bfin_write_NFC_COUNT(val)               bfin_write16(NFC_COUNT, val)
-#define bfin_read_NFC_RST()                     bfin_read16(NFC_RST)
-#define bfin_write_NFC_RST(val)                 bfin_write16(NFC_RST, val)
-#define bfin_read_NFC_PGCTL()                   bfin_read16(NFC_PGCTL)
-#define bfin_write_NFC_PGCTL(val)               bfin_write16(NFC_PGCTL, val)
-#define bfin_read_NFC_READ()                    bfin_read16(NFC_READ)
-#define bfin_write_NFC_READ(val)                bfin_write16(NFC_READ, val)
-#define bfin_read_NFC_ADDR()                    bfin_read16(NFC_ADDR)
-#define bfin_write_NFC_ADDR(val)                bfin_write16(NFC_ADDR, val)
-#define bfin_read_NFC_CMD()                     bfin_read16(NFC_CMD)
-#define bfin_write_NFC_CMD(val)                 bfin_write16(NFC_CMD, val)
-#define bfin_read_NFC_DATA_WR()                 bfin_read16(NFC_DATA_WR)
-#define bfin_write_NFC_DATA_WR(val)             bfin_write16(NFC_DATA_WR, val)
-#define bfin_read_NFC_DATA_RD()                 bfin_read16(NFC_DATA_RD)
-#define bfin_write_NFC_DATA_RD(val)             bfin_write16(NFC_DATA_RD, val)
 /* These need to be last due to the cdef/linux inter-dependencies */
 #include <asm/irq.h>
diff --git a/arch/blackfin/mach-bf518/include/mach/defBF514.h b/arch/blackfin/mach-bf518/include/mach/defBF514.h
index b5adca23a788..92e950d6e996 100644
--- a/arch/blackfin/mach-bf518/include/mach/defBF514.h
+++ b/arch/blackfin/mach-bf518/include/mach/defBF514.h
@@ -7,49 +7,8 @@
 #ifndef _DEF_BF514_H
 #define _DEF_BF514_H
-/* Include all Core registers and bit definitions */
+/* BF514 is BF512 + RSI */
-#include <asm/def_LPBlackfin.h>
+#include "defBF512.h"
-/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF514 */
-/* Include defBF51x_base.h for the set of #defines that are common to all ADSP-BF51x processors */
-#include "defBF51x_base.h"
-/* The following are the #defines needed by ADSP-BF514 that are not in the common header */
-/* SDH Registers */
-#define SDH_PWR_CTL                    0xFFC03900 /* SDH Power Control */
-#define SDH_CLK_CTL                    0xFFC03904 /* SDH Clock Control */
-#define SDH_ARGUMENT                   0xFFC03908 /* SDH Argument */
-#define SDH_COMMAND                    0xFFC0390C /* SDH Command */
-#define SDH_RESP_CMD                   0xFFC03910 /* SDH Response Command */
-#define SDH_RESPONSE0                  0xFFC03914 /* SDH Response0 */
-#define SDH_RESPONSE1                  0xFFC03918 /* SDH Response1 */
-#define SDH_RESPONSE2                  0xFFC0391C /* SDH Response2 */
-#define SDH_RESPONSE3                  0xFFC03920 /* SDH Response3 */
-#define SDH_DATA_TIMER                 0xFFC03924 /* SDH Data Timer */
-#define SDH_DATA_LGTH                  0xFFC03928 /* SDH Data Length */
-#define SDH_DATA_CTL                   0xFFC0392C /* SDH Data Control */
-#define SDH_DATA_CNT                   0xFFC03930 /* SDH Data Counter */
-#define SDH_STATUS                     0xFFC03934 /* SDH Status */
-#define SDH_STATUS_CLR                 0xFFC03938 /* SDH Status Clear */
-#define SDH_MASK0                      0xFFC0393C /* SDH Interrupt0 Mask */
-#define SDH_MASK1                      0xFFC03940 /* SDH Interrupt1 Mask */
-#define SDH_FIFO_CNT                   0xFFC03948 /* SDH FIFO Counter */
-#define SDH_FIFO                       0xFFC03980 /* SDH Data FIFO */
-#define SDH_E_STATUS                   0xFFC039C0 /* SDH Exception Status */
-#define SDH_E_MASK                     0xFFC039C4 /* SDH Exception Mask */
-#define SDH_CFG                        0xFFC039C8 /* SDH Configuration */
-#define SDH_RD_WAIT_EN                 0xFFC039CC /* SDH Read Wait Enable */
-#define SDH_PID0                       0xFFC039D0 /* SDH Peripheral Identification0 */
-#define SDH_PID1                       0xFFC039D4 /* SDH Peripheral Identification1 */
-#define SDH_PID2                       0xFFC039D8 /* SDH Peripheral Identification2 */
-#define SDH_PID3                       0xFFC039DC /* SDH Peripheral Identification3 */
-#define SDH_PID4                       0xFFC039E0 /* SDH Peripheral Identification4 */
-#define SDH_PID5                       0xFFC039E4 /* SDH Peripheral Identification5 */
-#define SDH_PID6                       0xFFC039E8 /* SDH Peripheral Identification6 */
-#define SDH_PID7                       0xFFC039EC /* SDH Peripheral Identification7 */
 /* Removable Storage Interface Registers */
diff --git a/arch/blackfin/mach-bf518/include/mach/defBF516.h b/arch/blackfin/mach-bf518/include/mach/defBF516.h
index 7eb18774d727..22a3aa0d2629 100644
--- a/arch/blackfin/mach-bf518/include/mach/defBF516.h
+++ b/arch/blackfin/mach-bf518/include/mach/defBF516.h
@@ -7,13 +7,8 @@
 #ifndef _DEF_BF516_H
 #define _DEF_BF516_H
-/* Include all Core registers and bit definitions */
+/* BF516 is BF514 + EMAC */
-#include <asm/def_LPBlackfin.h>
+#include "defBF514.h"
-/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF516 */
-/* Include defBF51x_base.h for the set of #defines that are common to all ADSP-BF51x processors */
-#include "defBF51x_base.h"
 /* The following are the #defines needed by ADSP-BF516 that are not in the common header */
 /* 10/100 Ethernet Controller   (0xFFC03000 - 0xFFC031FF) */
@@ -394,208 +389,4 @@
 #define TX_GE1024_CNT     0x00200000    /* 1024-Max-Byte TX Frames Sent                           */
 #define TX_ABORT_CNT      0x00400000    /* TX Frames Aborted                                      */
-/* SDH Registers */
-#define SDH_PWR_CTL                    0xFFC03900 /* SDH Power Control */
-#define SDH_CLK_CTL                    0xFFC03904 /* SDH Clock Control */
-#define SDH_ARGUMENT                   0xFFC03908 /* SDH Argument */
-#define SDH_COMMAND                    0xFFC0390C /* SDH Command */
-#define SDH_RESP_CMD                   0xFFC03910 /* SDH Response Command */
-#define SDH_RESPONSE0                  0xFFC03914 /* SDH Response0 */
-#define SDH_RESPONSE1                  0xFFC03918 /* SDH Response1 */
-#define SDH_RESPONSE2                  0xFFC0391C /* SDH Response2 */
-#define SDH_RESPONSE3                  0xFFC03920 /* SDH Response3 */
-#define SDH_DATA_TIMER                 0xFFC03924 /* SDH Data Timer */
-#define SDH_DATA_LGTH                  0xFFC03928 /* SDH Data Length */
-#define SDH_DATA_CTL                   0xFFC0392C /* SDH Data Control */
-#define SDH_DATA_CNT                   0xFFC03930 /* SDH Data Counter */
-#define SDH_STATUS                     0xFFC03934 /* SDH Status */
-#define SDH_STATUS_CLR                 0xFFC03938 /* SDH Status Clear */
-#define SDH_MASK0                      0xFFC0393C /* SDH Interrupt0 Mask */
-#define SDH_MASK1                      0xFFC03940 /* SDH Interrupt1 Mask */
-#define SDH_FIFO_CNT                   0xFFC03948 /* SDH FIFO Counter */
-#define SDH_FIFO                       0xFFC03980 /* SDH Data FIFO */
-#define SDH_E_STATUS                   0xFFC039C0 /* SDH Exception Status */
-#define SDH_E_MASK                     0xFFC039C4 /* SDH Exception Mask */
-#define SDH_CFG                        0xFFC039C8 /* SDH Configuration */
-#define SDH_RD_WAIT_EN                 0xFFC039CC /* SDH Read Wait Enable */
-#define SDH_PID0                       0xFFC039D0 /* SDH Peripheral Identification0 */
-#define SDH_PID1                       0xFFC039D4 /* SDH Peripheral Identification1 */
-#define SDH_PID2                       0xFFC039D8 /* SDH Peripheral Identification2 */
-#define SDH_PID3                       0xFFC039DC /* SDH Peripheral Identification3 */
-#define SDH_PID4                       0xFFC039E0 /* SDH Peripheral Identification4 */
-#define SDH_PID5                       0xFFC039E4 /* SDH Peripheral Identification5 */
-#define SDH_PID6                       0xFFC039E8 /* SDH Peripheral Identification6 */
-#define SDH_PID7                       0xFFC039EC /* SDH Peripheral Identification7 */
-/* Removable Storage Interface Registers */
-#define RSI_PWR_CONTROL                0xFFC03800 /* RSI Power Control Register */
-#define RSI_CLK_CONTROL                0xFFC03804 /* RSI Clock Control Register */
-#define RSI_ARGUMENT                   0xFFC03808 /* RSI Argument Register */
-#define RSI_COMMAND                    0xFFC0380C /* RSI Command Register */
-#define RSI_RESP_CMD                   0xFFC03810 /* RSI Response Command Register */
-#define RSI_RESPONSE0                  0xFFC03814 /* RSI Response Register */
-#define RSI_RESPONSE1                  0xFFC03818 /* RSI Response Register */
-#define RSI_RESPONSE2                  0xFFC0381C /* RSI Response Register */
-#define RSI_RESPONSE3                  0xFFC03820 /* RSI Response Register */
-#define RSI_DATA_TIMER                 0xFFC03824 /* RSI Data Timer Register */
-#define RSI_DATA_LGTH                  0xFFC03828 /* RSI Data Length Register */
-#define RSI_DATA_CONTROL               0xFFC0382C /* RSI Data Control Register */
-#define RSI_DATA_CNT                   0xFFC03830 /* RSI Data Counter Register */
-#define RSI_STATUS                     0xFFC03834 /* RSI Status Register */
-#define RSI_STATUSCL                   0xFFC03838 /* RSI Status Clear Register */
-#define RSI_MASK0                      0xFFC0383C /* RSI Interrupt 0 Mask Register */
-#define RSI_MASK1                      0xFFC03840 /* RSI Interrupt 1 Mask Register */
-#define RSI_FIFO_CNT                   0xFFC03848 /* RSI FIFO Counter Register */
-#define RSI_CEATA_CONTROL              0xFFC0384C /* RSI CEATA Register */
-#define RSI_FIFO                       0xFFC03880 /* RSI Data FIFO Register */
-#define RSI_ESTAT                      0xFFC038C0 /* RSI Exception Status Register */
-#define RSI_EMASK                      0xFFC038C4 /* RSI Exception Mask Register */
-#define RSI_CONFIG                     0xFFC038C8 /* RSI Configuration Register */
-#define RSI_RD_WAIT_EN                 0xFFC038CC /* RSI Read Wait Enable Register */
-#define RSI_PID0                       0xFFC03FE0 /* RSI Peripheral ID Register 0 */
-#define RSI_PID1                       0xFFC03FE4 /* RSI Peripheral ID Register 1 */
-#define RSI_PID2                       0xFFC03FE8 /* RSI Peripheral ID Register 2 */
-#define RSI_PID3                       0xFFC03FEC /* RSI Peripheral ID Register 3 */
-#define RSI_PID4                       0xFFC03FF0 /* RSI Peripheral ID Register 4 */
-#define RSI_PID5                       0xFFC03FF4 /* RSI Peripheral ID Register 5 */
-#define RSI_PID6                       0xFFC03FF8 /* RSI Peripheral ID Register 6 */
-#define RSI_PID7                       0xFFC03FFC /* RSI Peripheral ID Register 7 */
-/* ********************************************************** */
-/*     SINGLE BIT MACRO PAIRS (bit mask and negated one)      */
-/*     and MULTI BIT READ MACROS                              */
-/* ********************************************************** */
-/* Bit masks for SDH_COMMAND */
-#define                   CMD_IDX  0x3f       /* Command Index */
-#define                   CMD_RSP  0x40       /* Response */
-#define                 CMD_L_RSP  0x80       /* Long Response */
-#define                 CMD_INT_E  0x100      /* Command Interrupt */
-#define                CMD_PEND_E  0x200      /* Command Pending */
-#define                     CMD_E  0x400      /* Command Enable */
-/* Bit masks for SDH_PWR_CTL */
-#define                    PWR_ON  0x3        /* Power On */
-#if 0
-#define                       TBD  0x3c       /* TBD */
-#endif
-#define                 SD_CMD_OD  0x40       /* Open Drain Output */
-#define                   ROD_CTL  0x80       /* Rod Control */
-/* Bit masks for SDH_CLK_CTL */
-#define                    CLKDIV  0xff       /* MC_CLK Divisor */
-#define                     CLK_E  0x100      /* MC_CLK Bus Clock Enable */
-#define                  PWR_SV_E  0x200      /* Power Save Enable */
-#define             CLKDIV_BYPASS  0x400      /* Bypass Divisor */
-#define                  WIDE_BUS  0x800      /* Wide Bus Mode Enable */
-/* Bit masks for SDH_RESP_CMD */
-#define                  RESP_CMD  0x3f       /* Response Command */
-/* Bit masks for SDH_DATA_CTL */
-#define                     DTX_E  0x1        /* Data Transfer Enable */
-#define                   DTX_DIR  0x2        /* Data Transfer Direction */
-#define                  DTX_MODE  0x4        /* Data Transfer Mode */
-#define                 DTX_DMA_E  0x8        /* Data Transfer DMA Enable */
-#define              DTX_BLK_LGTH  0xf0       /* Data Transfer Block Length */
-/* Bit masks for SDH_STATUS */
-#define              CMD_CRC_FAIL  0x1        /* CMD CRC Fail */
-#define              DAT_CRC_FAIL  0x2        /* Data CRC Fail */
-#define               CMD_TIME_OUT  0x4        /* CMD Time Out */
-#define               DAT_TIME_OUT  0x8        /* Data Time Out */
-#define               TX_UNDERRUN  0x10       /* Transmit Underrun */
-#define                RX_OVERRUN  0x20       /* Receive Overrun */
-#define              CMD_RESP_END  0x40       /* CMD Response End */
-#define                  CMD_SENT  0x80       /* CMD Sent */
-#define                   DAT_END  0x100      /* Data End */
-#define             START_BIT_ERR  0x200      /* Start Bit Error */
-#define               DAT_BLK_END  0x400      /* Data Block End */
-#define                   CMD_ACT  0x800      /* CMD Active */
-#define                    TX_ACT  0x1000     /* Transmit Active */
-#define                    RX_ACT  0x2000     /* Receive Active */
-#define              TX_FIFO_STAT  0x4000     /* Transmit FIFO Status */
-#define              RX_FIFO_STAT  0x8000     /* Receive FIFO Status */
-#define              TX_FIFO_FULL  0x10000    /* Transmit FIFO Full */
-#define              RX_FIFO_FULL  0x20000    /* Receive FIFO Full */
-#define              TX_FIFO_ZERO  0x40000    /* Transmit FIFO Empty */
-#define               RX_DAT_ZERO  0x80000    /* Receive FIFO Empty */
-#define                TX_DAT_RDY  0x100000   /* Transmit Data Available */
-#define               RX_FIFO_RDY  0x200000   /* Receive Data Available */
-/* Bit masks for SDH_STATUS_CLR */
-#define         CMD_CRC_FAIL_STAT  0x1        /* CMD CRC Fail Status */
-#define         DAT_CRC_FAIL_STAT  0x2        /* Data CRC Fail Status */
-#define          CMD_TIMEOUT_STAT  0x4        /* CMD Time Out Status */
-#define          DAT_TIMEOUT_STAT  0x8        /* Data Time Out status */
-#define          TX_UNDERRUN_STAT  0x10       /* Transmit Underrun Status */
-#define           RX_OVERRUN_STAT  0x20       /* Receive Overrun Status */
-#define         CMD_RESP_END_STAT  0x40       /* CMD Response End Status */
-#define             CMD_SENT_STAT  0x80       /* CMD Sent Status */
-#define              DAT_END_STAT  0x100      /* Data End Status */
-#define        START_BIT_ERR_STAT  0x200      /* Start Bit Error Status */
-#define          DAT_BLK_END_STAT  0x400      /* Data Block End Status */
-/* Bit masks for SDH_MASK0 */
-#define         CMD_CRC_FAIL_MASK  0x1        /* CMD CRC Fail Mask */
-#define         DAT_CRC_FAIL_MASK  0x2        /* Data CRC Fail Mask */
-#define          CMD_TIMEOUT_MASK  0x4        /* CMD Time Out Mask */
-#define          DAT_TIMEOUT_MASK  0x8        /* Data Time Out Mask */
-#define          TX_UNDERRUN_MASK  0x10       /* Transmit Underrun Mask */
-#define           RX_OVERRUN_MASK  0x20       /* Receive Overrun Mask */
-#define         CMD_RESP_END_MASK  0x40       /* CMD Response End Mask */
-#define             CMD_SENT_MASK  0x80       /* CMD Sent Mask */
-#define              DAT_END_MASK  0x100      /* Data End Mask */
-#define        START_BIT_ERR_MASK  0x200      /* Start Bit Error Mask */
-#define          DAT_BLK_END_MASK  0x400      /* Data Block End Mask */
-#define              CMD_ACT_MASK  0x800      /* CMD Active Mask */
-#define               TX_ACT_MASK  0x1000     /* Transmit Active Mask */
-#define               RX_ACT_MASK  0x2000     /* Receive Active Mask */
-#define         TX_FIFO_STAT_MASK  0x4000     /* Transmit FIFO Status Mask */
-#define         RX_FIFO_STAT_MASK  0x8000     /* Receive FIFO Status Mask */
-#define         TX_FIFO_FULL_MASK  0x10000    /* Transmit FIFO Full Mask */
-#define         RX_FIFO_FULL_MASK  0x20000    /* Receive FIFO Full Mask */
-#define         TX_FIFO_ZERO_MASK  0x40000    /* Transmit FIFO Empty Mask */
-#define          RX_DAT_ZERO_MASK  0x80000    /* Receive FIFO Empty Mask */
-#define           TX_DAT_RDY_MASK  0x100000   /* Transmit Data Available Mask */
-#define          RX_FIFO_RDY_MASK  0x200000   /* Receive Data Available Mask */
-/* Bit masks for SDH_FIFO_CNT */
-#define                FIFO_COUNT  0x7fff     /* FIFO Count */
-/* Bit masks for SDH_E_STATUS */
-#define              SDIO_INT_DET  0x2        /* SDIO Int Detected */
-#define               SD_CARD_DET  0x10       /* SD Card Detect */
-/* Bit masks for SDH_E_MASK */
-#define                  SDIO_MSK  0x2        /* Mask SDIO Int Detected */
-#define                   SCD_MSK  0x40       /* Mask Card Detect */
-/* Bit masks for SDH_CFG */
-#define                   CLKS_EN  0x1        /* Clocks Enable */
-#define                      SD4E  0x4        /* SDIO 4-Bit Enable */
-#define                       MWE  0x8        /* Moving Window Enable */
-#define                    SD_RST  0x10       /* SDMMC Reset */
-#define                 PUP_SDDAT  0x20       /* Pull-up SD_DAT */
-#define                PUP_SDDAT3  0x40       /* Pull-up SD_DAT3 */
-#define                 PD_SDDAT3  0x80       /* Pull-down SD_DAT3 */
-/* Bit masks for SDH_RD_WAIT_EN */
-#define                       RWR  0x1        /* Read Wait Request */
 #endif /* _DEF_BF516_H */
diff --git a/arch/blackfin/mach-bf518/include/mach/defBF518.h b/arch/blackfin/mach-bf518/include/mach/defBF518.h
index 794cf06eb5ba..cb18270e55c2 100644
--- a/arch/blackfin/mach-bf518/include/mach/defBF518.h
+++ b/arch/blackfin/mach-bf518/include/mach/defBF518.h
@@ -7,461 +7,8 @@
 #ifndef _DEF_BF518_H
 #define _DEF_BF518_H
-/* Include all Core registers and bit definitions */
+/* BF518 is BF516 + IEEE-1588 */
-#include <asm/def_LPBlackfin.h>
+#include "defBF516.h"
-/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF518 */
-/* Include defBF51x_base.h for the set of #defines that are common to all ADSP-BF51x processors */
-#include "defBF51x_base.h"
-/* The following are the #defines needed by ADSP-BF518 that are not in the common header */
-/* 10/100 Ethernet Controller   (0xFFC03000 - 0xFFC031FF) */
-#define EMAC_OPMODE             0xFFC03000       /* Operating Mode Register                              */
-#define EMAC_ADDRLO             0xFFC03004       /* Address Low (32 LSBs) Register                       */
-#define EMAC_ADDRHI             0xFFC03008       /* Address High (16 MSBs) Register                      */
-#define EMAC_HASHLO             0xFFC0300C       /* Multicast Hash Table Low (Bins 31-0) Register        */
-#define EMAC_HASHHI             0xFFC03010       /* Multicast Hash Table High (Bins 63-32) Register      */
-#define EMAC_STAADD             0xFFC03014       /* Station Management Address Register                  */
-#define EMAC_STADAT             0xFFC03018       /* Station Management Data Register                     */
-#define EMAC_FLC                0xFFC0301C       /* Flow Control Register                                */
-#define EMAC_VLAN1              0xFFC03020       /* VLAN1 Tag Register                                   */
-#define EMAC_VLAN2              0xFFC03024       /* VLAN2 Tag Register                                   */
-#define EMAC_WKUP_CTL           0xFFC0302C       /* Wake-Up Control/Status Register                      */
-#define EMAC_WKUP_FFMSK0        0xFFC03030       /* Wake-Up Frame Filter 0 Byte Mask Register            */
-#define EMAC_WKUP_FFMSK1        0xFFC03034       /* Wake-Up Frame Filter 1 Byte Mask Register            */
-#define EMAC_WKUP_FFMSK2        0xFFC03038       /* Wake-Up Frame Filter 2 Byte Mask Register            */
-#define EMAC_WKUP_FFMSK3        0xFFC0303C       /* Wake-Up Frame Filter 3 Byte Mask Register            */
-#define EMAC_WKUP_FFCMD         0xFFC03040       /* Wake-Up Frame Filter Commands Register               */
-#define EMAC_WKUP_FFOFF         0xFFC03044       /* Wake-Up Frame Filter Offsets Register                */
-#define EMAC_WKUP_FFCRC0        0xFFC03048       /* Wake-Up Frame Filter 0,1 CRC-16 Register             */
-#define EMAC_WKUP_FFCRC1        0xFFC0304C       /* Wake-Up Frame Filter 2,3 CRC-16 Register             */
-#define EMAC_SYSCTL             0xFFC03060       /* EMAC System Control Register                         */
-#define EMAC_SYSTAT             0xFFC03064       /* EMAC System Status Register                          */
-#define EMAC_RX_STAT            0xFFC03068       /* RX Current Frame Status Register                     */
-#define EMAC_RX_STKY            0xFFC0306C       /* RX Sticky Frame Status Register                      */
-#define EMAC_RX_IRQE            0xFFC03070       /* RX Frame Status Interrupt Enables Register           */
-#define EMAC_TX_STAT            0xFFC03074       /* TX Current Frame Status Register                     */
-#define EMAC_TX_STKY            0xFFC03078       /* TX Sticky Frame Status Register                      */
-#define EMAC_TX_IRQE            0xFFC0307C       /* TX Frame Status Interrupt Enables Register           */
-#define EMAC_MMC_CTL            0xFFC03080       /* MMC Counter Control Register                         */
-#define EMAC_MMC_RIRQS          0xFFC03084       /* MMC RX Interrupt Status Register                     */
-#define EMAC_MMC_RIRQE          0xFFC03088       /* MMC RX Interrupt Enables Register                    */
-#define EMAC_MMC_TIRQS          0xFFC0308C       /* MMC TX Interrupt Status Register                     */
-#define EMAC_MMC_TIRQE          0xFFC03090       /* MMC TX Interrupt Enables Register                    */
-#define EMAC_RXC_OK             0xFFC03100       /* RX Frame Successful Count                            */
-#define EMAC_RXC_FCS            0xFFC03104       /* RX Frame FCS Failure Count                           */
-#define EMAC_RXC_ALIGN          0xFFC03108       /* RX Alignment Error Count                             */
-#define EMAC_RXC_OCTET          0xFFC0310C       /* RX Octets Successfully Received Count                */
-#define EMAC_RXC_DMAOVF         0xFFC03110       /* Internal MAC Sublayer Error RX Frame Count           */
-#define EMAC_RXC_UNICST         0xFFC03114       /* Unicast RX Frame Count                               */
-#define EMAC_RXC_MULTI          0xFFC03118       /* Multicast RX Frame Count                             */
-#define EMAC_RXC_BROAD          0xFFC0311C       /* Broadcast RX Frame Count                             */
-#define EMAC_RXC_LNERRI         0xFFC03120       /* RX Frame In Range Error Count                        */
-#define EMAC_RXC_LNERRO         0xFFC03124       /* RX Frame Out Of Range Error Count                    */
-#define EMAC_RXC_LONG           0xFFC03128       /* RX Frame Too Long Count                              */
-#define EMAC_RXC_MACCTL         0xFFC0312C       /* MAC Control RX Frame Count                           */
-#define EMAC_RXC_OPCODE         0xFFC03130       /* Unsupported Op-Code RX Frame Count                   */
-#define EMAC_RXC_PAUSE          0xFFC03134       /* MAC Control Pause RX Frame Count                     */
-#define EMAC_RXC_ALLFRM         0xFFC03138       /* Overall RX Frame Count                               */
-#define EMAC_RXC_ALLOCT         0xFFC0313C       /* Overall RX Octet Count                               */
-#define EMAC_RXC_TYPED          0xFFC03140       /* Type/Length Consistent RX Frame Count                */
-#define EMAC_RXC_SHORT          0xFFC03144       /* RX Frame Fragment Count - Byte Count x < 64          */
-#define EMAC_RXC_EQ64           0xFFC03148       /* Good RX Frame Count - Byte Count x = 64              */
-#define EMAC_RXC_LT128          0xFFC0314C       /* Good RX Frame Count - Byte Count  64 < x < 128       */
-#define EMAC_RXC_LT256          0xFFC03150       /* Good RX Frame Count - Byte Count 128 <= x < 256      */
-#define EMAC_RXC_LT512          0xFFC03154       /* Good RX Frame Count - Byte Count 256 <= x < 512      */
-#define EMAC_RXC_LT1024         0xFFC03158       /* Good RX Frame Count - Byte Count 512 <= x < 1024     */
-#define EMAC_RXC_GE1024         0xFFC0315C       /* Good RX Frame Count - Byte Count x >= 1024           */
-#define EMAC_TXC_OK             0xFFC03180       /* TX Frame Successful Count                             */
-#define EMAC_TXC_1COL           0xFFC03184       /* TX Frames Successful After Single Collision Count     */
-#define EMAC_TXC_GT1COL         0xFFC03188       /* TX Frames Successful After Multiple Collisions Count  */
-#define EMAC_TXC_OCTET          0xFFC0318C       /* TX Octets Successfully Received Count                 */
-#define EMAC_TXC_DEFER          0xFFC03190       /* TX Frame Delayed Due To Busy Count                    */
-#define EMAC_TXC_LATECL         0xFFC03194       /* Late TX Collisions Count                              */
-#define EMAC_TXC_XS_COL         0xFFC03198       /* TX Frame Failed Due To Excessive Collisions Count     */
-#define EMAC_TXC_DMAUND         0xFFC0319C       /* Internal MAC Sublayer Error TX Frame Count            */
-#define EMAC_TXC_CRSERR         0xFFC031A0       /* Carrier Sense Deasserted During TX Frame Count        */
-#define EMAC_TXC_UNICST         0xFFC031A4       /* Unicast TX Frame Count                                */
-#define EMAC_TXC_MULTI          0xFFC031A8       /* Multicast TX Frame Count                              */
-#define EMAC_TXC_BROAD          0xFFC031AC       /* Broadcast TX Frame Count                              */
-#define EMAC_TXC_XS_DFR         0xFFC031B0       /* TX Frames With Excessive Deferral Count               */
-#define EMAC_TXC_MACCTL         0xFFC031B4       /* MAC Control TX Frame Count                            */
-#define EMAC_TXC_ALLFRM         0xFFC031B8       /* Overall TX Frame Count                                */
-#define EMAC_TXC_ALLOCT         0xFFC031BC       /* Overall TX Octet Count                                */
-#define EMAC_TXC_EQ64           0xFFC031C0       /* Good TX Frame Count - Byte Count x = 64               */
-#define EMAC_TXC_LT128          0xFFC031C4       /* Good TX Frame Count - Byte Count  64 < x < 128        */
-#define EMAC_TXC_LT256          0xFFC031C8       /* Good TX Frame Count - Byte Count 128 <= x < 256       */
-#define EMAC_TXC_LT512          0xFFC031CC       /* Good TX Frame Count - Byte Count 256 <= x < 512       */
-#define EMAC_TXC_LT1024         0xFFC031D0       /* Good TX Frame Count - Byte Count 512 <= x < 1024      */
-#define EMAC_TXC_GE1024         0xFFC031D4       /* Good TX Frame Count - Byte Count x >= 1024            */
-#define EMAC_TXC_ABORT          0xFFC031D8       /* Total TX Frames Aborted Count                         */
-/* Listing for IEEE-Supported Count Registers */
-#define FramesReceivedOK                EMAC_RXC_OK        /* RX Frame Successful Count                            */
-#define FrameCheckSequenceErrors        EMAC_RXC_FCS       /* RX Frame FCS Failure Count                           */
-#define AlignmentErrors                 EMAC_RXC_ALIGN     /* RX Alignment Error Count                             */
-#define OctetsReceivedOK                EMAC_RXC_OCTET     /* RX Octets Successfully Received Count                */
-#define FramesLostDueToIntMACRcvError   EMAC_RXC_DMAOVF    /* Internal MAC Sublayer Error RX Frame Count           */
-#define UnicastFramesReceivedOK         EMAC_RXC_UNICST    /* Unicast RX Frame Count                               */
-#define MulticastFramesReceivedOK       EMAC_RXC_MULTI     /* Multicast RX Frame Count                             */
-#define BroadcastFramesReceivedOK       EMAC_RXC_BROAD     /* Broadcast RX Frame Count                             */
-#define InRangeLengthErrors             EMAC_RXC_LNERRI    /* RX Frame In Range Error Count                        */
-#define OutOfRangeLengthField           EMAC_RXC_LNERRO    /* RX Frame Out Of Range Error Count                    */
-#define FrameTooLongErrors              EMAC_RXC_LONG      /* RX Frame Too Long Count                              */
-#define MACControlFramesReceived        EMAC_RXC_MACCTL    /* MAC Control RX Frame Count                           */
-#define UnsupportedOpcodesReceived      EMAC_RXC_OPCODE    /* Unsupported Op-Code RX Frame Count                   */
-#define PAUSEMACCtrlFramesReceived      EMAC_RXC_PAUSE     /* MAC Control Pause RX Frame Count                     */
-#define FramesReceivedAll               EMAC_RXC_ALLFRM    /* Overall RX Frame Count                               */
-#define OctetsReceivedAll               EMAC_RXC_ALLOCT    /* Overall RX Octet Count                               */
-#define TypedFramesReceived             EMAC_RXC_TYPED     /* Type/Length Consistent RX Frame Count                */
-#define FramesLenLt64Received           EMAC_RXC_SHORT     /* RX Frame Fragment Count - Byte Count x < 64          */
-#define FramesLenEq64Received           EMAC_RXC_EQ64      /* Good RX Frame Count - Byte Count x = 64              */
-#define FramesLen65_127Received         EMAC_RXC_LT128     /* Good RX Frame Count - Byte Count  64 < x < 128       */
-#define FramesLen128_255Received        EMAC_RXC_LT256     /* Good RX Frame Count - Byte Count 128 <= x < 256      */
-#define FramesLen256_511Received        EMAC_RXC_LT512     /* Good RX Frame Count - Byte Count 256 <= x < 512      */
-#define FramesLen512_1023Received       EMAC_RXC_LT1024    /* Good RX Frame Count - Byte Count 512 <= x < 1024     */
-#define FramesLen1024_MaxReceived       EMAC_RXC_GE1024    /* Good RX Frame Count - Byte Count x >= 1024           */
-#define FramesTransmittedOK             EMAC_TXC_OK        /* TX Frame Successful Count                            */
-#define SingleCollisionFrames           EMAC_TXC_1COL      /* TX Frames Successful After Single Collision Count    */
-#define MultipleCollisionFrames         EMAC_TXC_GT1COL    /* TX Frames Successful After Multiple Collisions Count */
-#define OctetsTransmittedOK             EMAC_TXC_OCTET     /* TX Octets Successfully Received Count                */
-#define FramesWithDeferredXmissions     EMAC_TXC_DEFER     /* TX Frame Delayed Due To Busy Count                   */
-#define LateCollisions                  EMAC_TXC_LATECL    /* Late TX Collisions Count                             */
-#define FramesAbortedDueToXSColls       EMAC_TXC_XS_COL    /* TX Frame Failed Due To Excessive Collisions Count    */
-#define FramesLostDueToIntMacXmitError  EMAC_TXC_DMAUND    /* Internal MAC Sublayer Error TX Frame Count           */
-#define CarrierSenseErrors              EMAC_TXC_CRSERR    /* Carrier Sense Deasserted During TX Frame Count       */
-#define UnicastFramesXmittedOK          EMAC_TXC_UNICST    /* Unicast TX Frame Count                               */
-#define MulticastFramesXmittedOK        EMAC_TXC_MULTI     /* Multicast TX Frame Count                             */
-#define BroadcastFramesXmittedOK        EMAC_TXC_BROAD     /* Broadcast TX Frame Count                             */
-#define FramesWithExcessiveDeferral     EMAC_TXC_XS_DFR    /* TX Frames With Excessive Deferral Count              */
-#define MACControlFramesTransmitted     EMAC_TXC_MACCTL    /* MAC Control TX Frame Count                           */
-#define FramesTransmittedAll            EMAC_TXC_ALLFRM    /* Overall TX Frame Count                               */
-#define OctetsTransmittedAll            EMAC_TXC_ALLOCT    /* Overall TX Octet Count                               */
-#define FramesLenEq64Transmitted        EMAC_TXC_EQ64      /* Good TX Frame Count - Byte Count x = 64              */
-#define FramesLen65_127Transmitted      EMAC_TXC_LT128     /* Good TX Frame Count - Byte Count  64 < x < 128       */
-#define FramesLen128_255Transmitted     EMAC_TXC_LT256     /* Good TX Frame Count - Byte Count 128 <= x < 256      */
-#define FramesLen256_511Transmitted     EMAC_TXC_LT512     /* Good TX Frame Count - Byte Count 256 <= x < 512      */
-#define FramesLen512_1023Transmitted    EMAC_TXC_LT1024    /* Good TX Frame Count - Byte Count 512 <= x < 1024     */
-#define FramesLen1024_MaxTransmitted    EMAC_TXC_GE1024    /* Good TX Frame Count - Byte Count x >= 1024           */
-#define TxAbortedFrames                 EMAC_TXC_ABORT     /* Total TX Frames Aborted Count                        */
-/***********************************************************************************
-** System MMR Register Bits And Macros
-**
-** Disclaimer:  All macros are intended to make C and Assembly code more readable.
-**                              Use these macros carefully, as any that do left shifts for field
-**                              depositing will result in the lower order bits being destroyed.  Any
-**                              macro that shifts left to properly position the bit-field should be
-**                              used as part of an OR to initialize a register and NOT as a dynamic
-**                              modifier UNLESS the lower order bits are saved and ORed back in when
-**                              the macro is used.
-*************************************************************************************/
-/************************  ETHERNET 10/100 CONTROLLER MASKS  ************************/
-/* EMAC_OPMODE Masks */
-#define RE                 0x00000001     /* Receiver Enable                                    */
-#define ASTP               0x00000002     /* Enable Automatic Pad Stripping On RX Frames        */
-#define HU                 0x00000010     /* Hash Filter Unicast Address                        */
-#define HM                 0x00000020     /* Hash Filter Multicast Address                      */
-#define PAM                0x00000040     /* Pass-All-Multicast Mode Enable                     */
-#define PR                 0x00000080     /* Promiscuous Mode Enable                            */
-#define IFE                0x00000100     /* Inverse Filtering Enable                           */
-#define DBF                0x00000200     /* Disable Broadcast Frame Reception                  */
-#define PBF                0x00000400     /* Pass Bad Frames Enable                             */
-#define PSF                0x00000800     /* Pass Short Frames Enable                           */
-#define RAF                0x00001000     /* Receive-All Mode                                   */
-#define TE                 0x00010000     /* Transmitter Enable                                 */
-#define DTXPAD             0x00020000     /* Disable Automatic TX Padding                       */
-#define DTXCRC             0x00040000     /* Disable Automatic TX CRC Generation                */
-#define DC                 0x00080000     /* Deferral Check                                     */
-#define BOLMT              0x00300000     /* Back-Off Limit                                     */
-#define BOLMT_10           0x00000000     /*            10-bit range                            */
-#define BOLMT_8            0x00100000     /*            8-bit range                             */
-#define BOLMT_4            0x00200000     /*            4-bit range                             */
-#define BOLMT_1            0x00300000     /*            1-bit range                             */
-#define DRTY               0x00400000     /* Disable TX Retry On Collision                      */
-#define LCTRE              0x00800000     /* Enable TX Retry On Late Collision                  */
-#define RMII               0x01000000     /* RMII/MII* Mode                                     */
-#define RMII_10            0x02000000     /* Speed Select for RMII Port (10MBit/100MBit*)       */
-#define FDMODE             0x04000000     /* Duplex Mode Enable (Full/Half*)                    */
-#define LB                 0x08000000     /* Internal Loopback Enable                           */
-#define DRO                0x10000000     /* Disable Receive Own Frames (Half-Duplex Mode)      */
-/* EMAC_STAADD Masks */
-#define STABUSY            0x00000001     /* Initiate Station Mgt Reg Access / STA Busy Stat    */
-#define STAOP              0x00000002     /* Station Management Operation Code (Write/Read*)    */
-#define STADISPRE          0x00000004     /* Disable Preamble Generation                        */
-#define STAIE              0x00000008     /* Station Mgt. Transfer Done Interrupt Enable        */
-#define REGAD              0x000007C0     /* STA Register Address                               */
-#define PHYAD              0x0000F800     /* PHY Device Address                                 */
-#define SET_REGAD(x) (((x)&0x1F)<<  6 )   /* Set STA Register Address                           */
-#define SET_PHYAD(x) (((x)&0x1F)<< 11 )   /* Set PHY Device Address                             */
-/* EMAC_STADAT Mask */
-#define STADATA            0x0000FFFF     /* Station Management Data                            */
-/* EMAC_FLC Masks */
-#define FLCBUSY            0x00000001     /* Send Flow Ctrl Frame / Flow Ctrl Busy Status       */
-#define FLCE               0x00000002     /* Flow Control Enable                                */
-#define PCF                0x00000004     /* Pass Control Frames                                */
-#define BKPRSEN            0x00000008     /* Enable Backpressure                                */
-#define FLCPAUSE           0xFFFF0000     /* Pause Time                                         */
-#define SET_FLCPAUSE(x) (((x)&0xFFFF)<< 16) /* Set Pause Time                                   */
-/* EMAC_WKUP_CTL Masks */
-#define CAPWKFRM           0x00000001    /* Capture Wake-Up Frames                              */
-#define MPKE               0x00000002    /* Magic Packet Enable                                 */
-#define RWKE               0x00000004    /* Remote Wake-Up Frame Enable                         */
-#define GUWKE              0x00000008    /* Global Unicast Wake Enable                          */
-#define MPKS               0x00000020    /* Magic Packet Received Status                        */
-#define RWKS               0x00000F00    /* Wake-Up Frame Received Status, Filters 3:0          */
-/* EMAC_WKUP_FFCMD Masks */
-#define WF0_E              0x00000001    /* Enable Wake-Up Filter 0                              */
-#define WF0_T              0x00000008    /* Wake-Up Filter 0 Addr Type (Multicast/Unicast*)      */
-#define WF1_E              0x00000100    /* Enable Wake-Up Filter 1                              */
-#define WF1_T              0x00000800    /* Wake-Up Filter 1 Addr Type (Multicast/Unicast*)      */
-#define WF2_E              0x00010000    /* Enable Wake-Up Filter 2                              */
-#define WF2_T              0x00080000    /* Wake-Up Filter 2 Addr Type (Multicast/Unicast*)      */
-#define WF3_E              0x01000000    /* Enable Wake-Up Filter 3                              */
-#define WF3_T              0x08000000    /* Wake-Up Filter 3 Addr Type (Multicast/Unicast*)      */
-/* EMAC_WKUP_FFOFF Masks */
-#define WF0_OFF            0x000000FF    /* Wake-Up Filter 0 Pattern Offset                      */
-#define WF1_OFF            0x0000FF00    /* Wake-Up Filter 1 Pattern Offset                      */
-#define WF2_OFF            0x00FF0000    /* Wake-Up Filter 2 Pattern Offset                      */
-#define WF3_OFF            0xFF000000    /* Wake-Up Filter 3 Pattern Offset                      */
-#define SET_WF0_OFF(x) (((x)&0xFF)<<  0 ) /* Set Wake-Up Filter 0 Byte Offset                    */
-#define SET_WF1_OFF(x) (((x)&0xFF)<<  8 ) /* Set Wake-Up Filter 1 Byte Offset                    */
-#define SET_WF2_OFF(x) (((x)&0xFF)<< 16 ) /* Set Wake-Up Filter 2 Byte Offset                    */
-#define SET_WF3_OFF(x) (((x)&0xFF)<< 24 ) /* Set Wake-Up Filter 3 Byte Offset                    */
-/* Set ALL Offsets */
-#define SET_WF_OFFS(x0,x1,x2,x3) (SET_WF0_OFF((x0))|SET_WF1_OFF((x1))|SET_WF2_OFF((x2))|SET_WF3_OFF((x3)))
-/* EMAC_WKUP_FFCRC0 Masks */
-#define WF0_CRC           0x0000FFFF    /* Wake-Up Filter 0 Pattern CRC                           */
-#define WF1_CRC           0xFFFF0000    /* Wake-Up Filter 1 Pattern CRC                           */
-#define SET_WF0_CRC(x) (((x)&0xFFFF)<<   0 ) /* Set Wake-Up Filter 0 Target CRC                   */
-#define SET_WF1_CRC(x) (((x)&0xFFFF)<<  16 ) /* Set Wake-Up Filter 1 Target CRC                   */
-/* EMAC_WKUP_FFCRC1 Masks */
-#define WF2_CRC           0x0000FFFF    /* Wake-Up Filter 2 Pattern CRC                           */
-#define WF3_CRC           0xFFFF0000    /* Wake-Up Filter 3 Pattern CRC                           */
-#define SET_WF2_CRC(x) (((x)&0xFFFF)<<   0 ) /* Set Wake-Up Filter 2 Target CRC                   */
-#define SET_WF3_CRC(x) (((x)&0xFFFF)<<  16 ) /* Set Wake-Up Filter 3 Target CRC                   */
-/* EMAC_SYSCTL Masks */
-#define PHYIE             0x00000001    /* PHY_INT Interrupt Enable                               */
-#define RXDWA             0x00000002    /* Receive Frame DMA Word Alignment (Odd/Even*)           */
-#define RXCKS             0x00000004    /* Enable RX Frame TCP/UDP Checksum Computation           */
-#define TXDWA             0x00000010    /* Transmit Frame DMA Word Alignment (Odd/Even*)          */
-#define MDCDIV            0x00003F00    /* SCLK:MDC Clock Divisor [MDC=SCLK/(2*(N+1))]            */
-#define SET_MDCDIV(x) (((x)&0x3F)<< 8)   /* Set MDC Clock Divisor                                 */
-/* EMAC_SYSTAT Masks */
-#define PHYINT            0x00000001    /* PHY_INT Interrupt Status                               */
-#define MMCINT            0x00000002    /* MMC Counter Interrupt Status                           */
-#define RXFSINT           0x00000004    /* RX Frame-Status Interrupt Status                       */
-#define TXFSINT           0x00000008    /* TX Frame-Status Interrupt Status                       */
-#define WAKEDET           0x00000010    /* Wake-Up Detected Status                                */
-#define RXDMAERR          0x00000020    /* RX DMA Direction Error Status                          */
-#define TXDMAERR          0x00000040    /* TX DMA Direction Error Status                          */
-#define STMDONE           0x00000080    /* Station Mgt. Transfer Done Interrupt Status            */
-/* EMAC_RX_STAT, EMAC_RX_STKY, and EMAC_RX_IRQE Masks */
-#define RX_FRLEN          0x000007FF    /* Frame Length In Bytes                                  */
-#define RX_COMP           0x00001000    /* RX Frame Complete                                      */
-#define RX_OK             0x00002000    /* RX Frame Received With No Errors                       */
-#define RX_LONG           0x00004000    /* RX Frame Too Long Error                                */
-#define RX_ALIGN          0x00008000    /* RX Frame Alignment Error                               */
-#define RX_CRC            0x00010000    /* RX Frame CRC Error                                     */
-#define RX_LEN            0x00020000    /* RX Frame Length Error                                  */
-#define RX_FRAG           0x00040000    /* RX Frame Fragment Error                                */
-#define RX_ADDR           0x00080000    /* RX Frame Address Filter Failed Error                   */
-#define RX_DMAO           0x00100000    /* RX Frame DMA Overrun Error                             */
-#define RX_PHY            0x00200000    /* RX Frame PHY Error                                     */
-#define RX_LATE           0x00400000    /* RX Frame Late Collision Error                          */
-#define RX_RANGE          0x00800000    /* RX Frame Length Field Out of Range Error               */
-#define RX_MULTI          0x01000000    /* RX Multicast Frame Indicator                           */
-#define RX_BROAD          0x02000000    /* RX Broadcast Frame Indicator                           */
-#define RX_CTL            0x04000000    /* RX Control Frame Indicator                             */
-#define RX_UCTL           0x08000000    /* Unsupported RX Control Frame Indicator                 */
-#define RX_TYPE           0x10000000    /* RX Typed Frame Indicator                               */
-#define RX_VLAN1          0x20000000    /* RX VLAN1 Frame Indicator                               */
-#define RX_VLAN2          0x40000000    /* RX VLAN2 Frame Indicator                               */
-#define RX_ACCEPT         0x80000000    /* RX Frame Accepted Indicator                            */
-/*  EMAC_TX_STAT, EMAC_TX_STKY, and EMAC_TX_IRQE Masks  */
-#define TX_COMP           0x00000001    /* TX Frame Complete                                      */
-#define TX_OK             0x00000002    /* TX Frame Sent With No Errors                           */
-#define TX_ECOLL          0x00000004    /* TX Frame Excessive Collision Error                     */
-#define TX_LATE           0x00000008    /* TX Frame Late Collision Error                          */
-#define TX_DMAU           0x00000010    /* TX Frame DMA Underrun Error (STAT)                     */
-#define TX_MACE           0x00000010    /* Internal MAC Error Detected (STKY and IRQE)            */
-#define TX_EDEFER         0x00000020    /* TX Frame Excessive Deferral Error                      */
-#define TX_BROAD          0x00000040    /* TX Broadcast Frame Indicator                           */
-#define TX_MULTI          0x00000080    /* TX Multicast Frame Indicator                           */
-#define TX_CCNT           0x00000F00    /* TX Frame Collision Count                               */
-#define TX_DEFER          0x00001000    /* TX Frame Deferred Indicator                            */
-#define TX_CRS            0x00002000    /* TX Frame Carrier Sense Not Asserted Error              */
-#define TX_LOSS           0x00004000    /* TX Frame Carrier Lost During TX Error                  */
-#define TX_RETRY          0x00008000    /* TX Frame Successful After Retry                        */
-#define TX_FRLEN          0x07FF0000    /* TX Frame Length (Bytes)                                */
-/* EMAC_MMC_CTL Masks */
-#define RSTC              0x00000001    /* Reset All Counters                                     */
-#define CROLL             0x00000002    /* Counter Roll-Over Enable                               */
-#define CCOR              0x00000004    /* Counter Clear-On-Read Mode Enable                      */
-#define MMCE              0x00000008    /* Enable MMC Counter Operation                           */
-/* EMAC_MMC_RIRQS and EMAC_MMC_RIRQE Masks */
-#define RX_OK_CNT         0x00000001    /* RX Frames Received With No Errors                      */
-#define RX_FCS_CNT        0x00000002    /* RX Frames W/Frame Check Sequence Errors                */
-#define RX_ALIGN_CNT      0x00000004    /* RX Frames With Alignment Errors                        */
-#define RX_OCTET_CNT      0x00000008    /* RX Octets Received OK                                  */
-#define RX_LOST_CNT       0x00000010    /* RX Frames Lost Due To Internal MAC RX Error            */
-#define RX_UNI_CNT        0x00000020    /* Unicast RX Frames Received OK                          */
-#define RX_MULTI_CNT      0x00000040    /* Multicast RX Frames Received OK                        */
-#define RX_BROAD_CNT      0x00000080    /* Broadcast RX Frames Received OK                        */
-#define RX_IRL_CNT        0x00000100    /* RX Frames With In-Range Length Errors                  */
-#define RX_ORL_CNT        0x00000200    /* RX Frames With Out-Of-Range Length Errors              */
-#define RX_LONG_CNT       0x00000400    /* RX Frames With Frame Too Long Errors                   */
-#define RX_MACCTL_CNT     0x00000800    /* MAC Control RX Frames Received                         */
-#define RX_OPCODE_CTL     0x00001000    /* Unsupported Op-Code RX Frames Received                 */
-#define RX_PAUSE_CNT      0x00002000    /* PAUSEMAC Control RX Frames Received                    */
-#define RX_ALLF_CNT       0x00004000    /* All RX Frames Received                                 */
-#define RX_ALLO_CNT       0x00008000    /* All RX Octets Received                                 */
-#define RX_TYPED_CNT      0x00010000    /* Typed RX Frames Received                               */
-#define RX_SHORT_CNT      0x00020000    /* RX Frame Fragments (< 64 Bytes) Received               */
-#define RX_EQ64_CNT       0x00040000    /* 64-Byte RX Frames Received                             */
-#define RX_LT128_CNT      0x00080000    /* 65-127-Byte RX Frames Received                         */
-#define RX_LT256_CNT      0x00100000    /* 128-255-Byte RX Frames Received                        */
-#define RX_LT512_CNT      0x00200000    /* 256-511-Byte RX Frames Received                        */
-#define RX_LT1024_CNT     0x00400000    /* 512-1023-Byte RX Frames Received                       */
-#define RX_GE1024_CNT     0x00800000    /* 1024-Max-Byte RX Frames Received                       */
-/* EMAC_MMC_TIRQS and EMAC_MMC_TIRQE Masks  */
-#define TX_OK_CNT         0x00000001    /* TX Frames Sent OK                                      */
-#define TX_SCOLL_CNT      0x00000002    /* TX Frames With Single Collisions                       */
-#define TX_MCOLL_CNT      0x00000004    /* TX Frames With Multiple Collisions                     */
-#define TX_OCTET_CNT      0x00000008    /* TX Octets Sent OK                                      */
-#define TX_DEFER_CNT      0x00000010    /* TX Frames With Deferred Transmission                   */
-#define TX_LATE_CNT       0x00000020    /* TX Frames With Late Collisions                         */
-#define TX_ABORTC_CNT     0x00000040    /* TX Frames Aborted Due To Excess Collisions             */
-#define TX_LOST_CNT       0x00000080    /* TX Frames Lost Due To Internal MAC TX Error            */
-#define TX_CRS_CNT        0x00000100    /* TX Frames With Carrier Sense Errors                    */
-#define TX_UNI_CNT        0x00000200    /* Unicast TX Frames Sent                                 */
-#define TX_MULTI_CNT      0x00000400    /* Multicast TX Frames Sent                               */
-#define TX_BROAD_CNT      0x00000800    /* Broadcast TX Frames Sent                               */
-#define TX_EXDEF_CTL      0x00001000    /* TX Frames With Excessive Deferral                      */
-#define TX_MACCTL_CNT     0x00002000    /* MAC Control TX Frames Sent                             */
-#define TX_ALLF_CNT       0x00004000    /* All TX Frames Sent                                     */
-#define TX_ALLO_CNT       0x00008000    /* All TX Octets Sent                                     */
-#define TX_EQ64_CNT       0x00010000    /* 64-Byte TX Frames Sent                                 */
-#define TX_LT128_CNT      0x00020000    /* 65-127-Byte TX Frames Sent                             */
-#define TX_LT256_CNT      0x00040000    /* 128-255-Byte TX Frames Sent                            */
-#define TX_LT512_CNT      0x00080000    /* 256-511-Byte TX Frames Sent                            */
-#define TX_LT1024_CNT     0x00100000    /* 512-1023-Byte TX Frames Sent                           */
-#define TX_GE1024_CNT     0x00200000    /* 1024-Max-Byte TX Frames Sent                           */
-#define TX_ABORT_CNT      0x00400000    /* TX Frames Aborted                                      */
-/* SDH Registers */
-#define SDH_PWR_CTL                    0xFFC03900 /* SDH Power Control */
-#define SDH_CLK_CTL                    0xFFC03904 /* SDH Clock Control */
-#define SDH_ARGUMENT                   0xFFC03908 /* SDH Argument */
-#define SDH_COMMAND                    0xFFC0390C /* SDH Command */
-#define SDH_RESP_CMD                   0xFFC03910 /* SDH Response Command */
-#define SDH_RESPONSE0                  0xFFC03914 /* SDH Response0 */
-#define SDH_RESPONSE1                  0xFFC03918 /* SDH Response1 */
-#define SDH_RESPONSE2                  0xFFC0391C /* SDH Response2 */
-#define SDH_RESPONSE3                  0xFFC03920 /* SDH Response3 */
-#define SDH_DATA_TIMER                 0xFFC03924 /* SDH Data Timer */
-#define SDH_DATA_LGTH                  0xFFC03928 /* SDH Data Length */
-#define SDH_DATA_CTL                   0xFFC0392C /* SDH Data Control */
-#define SDH_DATA_CNT                   0xFFC03930 /* SDH Data Counter */
-#define SDH_STATUS                     0xFFC03934 /* SDH Status */
-#define SDH_STATUS_CLR                 0xFFC03938 /* SDH Status Clear */
-#define SDH_MASK0                      0xFFC0393C /* SDH Interrupt0 Mask */
-#define SDH_MASK1                      0xFFC03940 /* SDH Interrupt1 Mask */
-#define SDH_FIFO_CNT                   0xFFC03948 /* SDH FIFO Counter */
-#define SDH_FIFO                       0xFFC03980 /* SDH Data FIFO */
-#define SDH_E_STATUS                   0xFFC039C0 /* SDH Exception Status */
-#define SDH_E_MASK                     0xFFC039C4 /* SDH Exception Mask */
-#define SDH_CFG                        0xFFC039C8 /* SDH Configuration */
-#define SDH_RD_WAIT_EN                 0xFFC039CC /* SDH Read Wait Enable */
-#define SDH_PID0                       0xFFC039D0 /* SDH Peripheral Identification0 */
-#define SDH_PID1                       0xFFC039D4 /* SDH Peripheral Identification1 */
-#define SDH_PID2                       0xFFC039D8 /* SDH Peripheral Identification2 */
-#define SDH_PID3                       0xFFC039DC /* SDH Peripheral Identification3 */
-#define SDH_PID4                       0xFFC039E0 /* SDH Peripheral Identification4 */
-#define SDH_PID5                       0xFFC039E4 /* SDH Peripheral Identification5 */
-#define SDH_PID6                       0xFFC039E8 /* SDH Peripheral Identification6 */
-#define SDH_PID7                       0xFFC039EC /* SDH Peripheral Identification7 */
-/* Removable Storage Interface Registers */
-#define RSI_PWR_CONTROL                0xFFC03800 /* RSI Power Control Register */
-#define RSI_CLK_CONTROL                0xFFC03804 /* RSI Clock Control Register */
-#define RSI_ARGUMENT                   0xFFC03808 /* RSI Argument Register */
-#define RSI_COMMAND                    0xFFC0380C /* RSI Command Register */
-#define RSI_RESP_CMD                   0xFFC03810 /* RSI Response Command Register */
-#define RSI_RESPONSE0                  0xFFC03814 /* RSI Response Register */
-#define RSI_RESPONSE1                  0xFFC03818 /* RSI Response Register */
-#define RSI_RESPONSE2                  0xFFC0381C /* RSI Response Register */
-#define RSI_RESPONSE3                  0xFFC03820 /* RSI Response Register */
-#define RSI_DATA_TIMER                 0xFFC03824 /* RSI Data Timer Register */
-#define RSI_DATA_LGTH                  0xFFC03828 /* RSI Data Length Register */
-#define RSI_DATA_CONTROL               0xFFC0382C /* RSI Data Control Register */
-#define RSI_DATA_CNT                   0xFFC03830 /* RSI Data Counter Register */
-#define RSI_STATUS                     0xFFC03834 /* RSI Status Register */
-#define RSI_STATUSCL                   0xFFC03838 /* RSI Status Clear Register */
-#define RSI_MASK0                      0xFFC0383C /* RSI Interrupt 0 Mask Register */
-#define RSI_MASK1                      0xFFC03840 /* RSI Interrupt 1 Mask Register */
-#define RSI_FIFO_CNT                   0xFFC03848 /* RSI FIFO Counter Register */
-#define RSI_CEATA_CONTROL              0xFFC0384C /* RSI CEATA Register */
-#define RSI_FIFO                       0xFFC03880 /* RSI Data FIFO Register */
-#define RSI_ESTAT                      0xFFC038C0 /* RSI Exception Status Register */
-#define RSI_EMASK                      0xFFC038C4 /* RSI Exception Mask Register */
-#define RSI_CONFIG                     0xFFC038C8 /* RSI Configuration Register */
-#define RSI_RD_WAIT_EN                 0xFFC038CC /* RSI Read Wait Enable Register */
-#define RSI_PID0                       0xFFC03FE0 /* RSI Peripheral ID Register 0 */
-#define RSI_PID1                       0xFFC03FE4 /* RSI Peripheral ID Register 1 */
-#define RSI_PID2                       0xFFC03FE8 /* RSI Peripheral ID Register 2 */
-#define RSI_PID3                       0xFFC03FEC /* RSI Peripheral ID Register 3 */
-#define RSI_PID4                       0xFFC03FF0 /* RSI Peripheral ID Register 4 */
-#define RSI_PID5                       0xFFC03FF4 /* RSI Peripheral ID Register 5 */
-#define RSI_PID6                       0xFFC03FF8 /* RSI Peripheral ID Register 6 */
-#define RSI_PID7                       0xFFC03FFC /* RSI Peripheral ID Register 7 */
 /* PTP TSYNC Registers */
@@ -489,141 +36,6 @@
 #define EMAC_PTP_PPS_STARTHI           0xFFC030F4 /* PPS Start Time High */
 #define EMAC_PTP_PPS_PERIOD            0xFFC030F8 /* PPS Count Register */
-/* ********************************************************** */
-/*     SINGLE BIT MACRO PAIRS (bit mask and negated one)      */
-/*     and MULTI BIT READ MACROS                              */
-/* ********************************************************** */
-/* Bit masks for SDH_COMMAND */
-#define                   CMD_IDX  0x3f       /* Command Index */
-#define                   CMD_RSP  0x40       /* Response */
-#define                 CMD_L_RSP  0x80       /* Long Response */
-#define                 CMD_INT_E  0x100      /* Command Interrupt */
-#define                CMD_PEND_E  0x200      /* Command Pending */
-#define                     CMD_E  0x400      /* Command Enable */
-/* Bit masks for SDH_PWR_CTL */
-#define                    PWR_ON  0x3        /* Power On */
-#if 0
-#define                       TBD  0x3c       /* TBD */
-#endif
-#define                 SD_CMD_OD  0x40       /* Open Drain Output */
-#define                   ROD_CTL  0x80       /* Rod Control */
-/* Bit masks for SDH_CLK_CTL */
-#define                    CLKDIV  0xff       /* MC_CLK Divisor */
-#define                     CLK_E  0x100      /* MC_CLK Bus Clock Enable */
-#define                  PWR_SV_E  0x200      /* Power Save Enable */
-#define             CLKDIV_BYPASS  0x400      /* Bypass Divisor */
-#define                  WIDE_BUS  0x800      /* Wide Bus Mode Enable */
-/* Bit masks for SDH_RESP_CMD */
-#define                  RESP_CMD  0x3f       /* Response Command */
-/* Bit masks for SDH_DATA_CTL */
-#define                     DTX_E  0x1        /* Data Transfer Enable */
-#define                   DTX_DIR  0x2        /* Data Transfer Direction */
-#define                  DTX_MODE  0x4        /* Data Transfer Mode */
-#define                 DTX_DMA_E  0x8        /* Data Transfer DMA Enable */
-#define              DTX_BLK_LGTH  0xf0       /* Data Transfer Block Length */
-/* Bit masks for SDH_STATUS */
-#define              CMD_CRC_FAIL  0x1        /* CMD CRC Fail */
-#define              DAT_CRC_FAIL  0x2        /* Data CRC Fail */
-#define               CMD_TIME_OUT  0x4        /* CMD Time Out */
-#define               DAT_TIME_OUT  0x8        /* Data Time Out */
-#define               TX_UNDERRUN  0x10       /* Transmit Underrun */
-#define                RX_OVERRUN  0x20       /* Receive Overrun */
-#define              CMD_RESP_END  0x40       /* CMD Response End */
-#define                  CMD_SENT  0x80       /* CMD Sent */
-#define                   DAT_END  0x100      /* Data End */
-#define             START_BIT_ERR  0x200      /* Start Bit Error */
-#define               DAT_BLK_END  0x400      /* Data Block End */
-#define                   CMD_ACT  0x800      /* CMD Active */
-#define                    TX_ACT  0x1000     /* Transmit Active */
-#define                    RX_ACT  0x2000     /* Receive Active */
-#define              TX_FIFO_STAT  0x4000     /* Transmit FIFO Status */
-#define              RX_FIFO_STAT  0x8000     /* Receive FIFO Status */
-#define              TX_FIFO_FULL  0x10000    /* Transmit FIFO Full */
-#define              RX_FIFO_FULL  0x20000    /* Receive FIFO Full */
-#define              TX_FIFO_ZERO  0x40000    /* Transmit FIFO Empty */
-#define               RX_DAT_ZERO  0x80000    /* Receive FIFO Empty */
-#define                TX_DAT_RDY  0x100000   /* Transmit Data Available */
-#define               RX_FIFO_RDY  0x200000   /* Receive Data Available */
-/* Bit masks for SDH_STATUS_CLR */
-#define         CMD_CRC_FAIL_STAT  0x1        /* CMD CRC Fail Status */
-#define         DAT_CRC_FAIL_STAT  0x2        /* Data CRC Fail Status */
-#define          CMD_TIMEOUT_STAT  0x4        /* CMD Time Out Status */
-#define          DAT_TIMEOUT_STAT  0x8        /* Data Time Out status */
-#define          TX_UNDERRUN_STAT  0x10       /* Transmit Underrun Status */
-#define           RX_OVERRUN_STAT  0x20       /* Receive Overrun Status */
-#define         CMD_RESP_END_STAT  0x40       /* CMD Response End Status */
-#define             CMD_SENT_STAT  0x80       /* CMD Sent Status */
-#define              DAT_END_STAT  0x100      /* Data End Status */
-#define        START_BIT_ERR_STAT  0x200      /* Start Bit Error Status */
-#define          DAT_BLK_END_STAT  0x400      /* Data Block End Status */
-/* Bit masks for SDH_MASK0 */
-#define         CMD_CRC_FAIL_MASK  0x1        /* CMD CRC Fail Mask */
-#define         DAT_CRC_FAIL_MASK  0x2        /* Data CRC Fail Mask */
-#define          CMD_TIMEOUT_MASK  0x4        /* CMD Time Out Mask */
-#define          DAT_TIMEOUT_MASK  0x8        /* Data Time Out Mask */
-#define          TX_UNDERRUN_MASK  0x10       /* Transmit Underrun Mask */
-#define           RX_OVERRUN_MASK  0x20       /* Receive Overrun Mask */
-#define         CMD_RESP_END_MASK  0x40       /* CMD Response End Mask */
-#define             CMD_SENT_MASK  0x80       /* CMD Sent Mask */
-#define              DAT_END_MASK  0x100      /* Data End Mask */
-#define        START_BIT_ERR_MASK  0x200      /* Start Bit Error Mask */
-#define          DAT_BLK_END_MASK  0x400      /* Data Block End Mask */
-#define              CMD_ACT_MASK  0x800      /* CMD Active Mask */
-#define               TX_ACT_MASK  0x1000     /* Transmit Active Mask */
-#define               RX_ACT_MASK  0x2000     /* Receive Active Mask */
-#define         TX_FIFO_STAT_MASK  0x4000     /* Transmit FIFO Status Mask */
-#define         RX_FIFO_STAT_MASK  0x8000     /* Receive FIFO Status Mask */
-#define         TX_FIFO_FULL_MASK  0x10000    /* Transmit FIFO Full Mask */
-#define         RX_FIFO_FULL_MASK  0x20000    /* Receive FIFO Full Mask */
-#define         TX_FIFO_ZERO_MASK  0x40000    /* Transmit FIFO Empty Mask */
-#define          RX_DAT_ZERO_MASK  0x80000    /* Receive FIFO Empty Mask */
-#define           TX_DAT_RDY_MASK  0x100000   /* Transmit Data Available Mask */
-#define          RX_FIFO_RDY_MASK  0x200000   /* Receive Data Available Mask */
-/* Bit masks for SDH_FIFO_CNT */
-#define                FIFO_COUNT  0x7fff     /* FIFO Count */
-/* Bit masks for SDH_E_STATUS */
-#define              SDIO_INT_DET  0x2        /* SDIO Int Detected */
-#define               SD_CARD_DET  0x10       /* SD Card Detect */
-/* Bit masks for SDH_E_MASK */
-#define                  SDIO_MSK  0x2        /* Mask SDIO Int Detected */
-#define                   SCD_MSK  0x40       /* Mask Card Detect */
-/* Bit masks for SDH_CFG */
-#define                   CLKS_EN  0x1        /* Clocks Enable */
-#define                      SD4E  0x4        /* SDIO 4-Bit Enable */
-#define                       MWE  0x8        /* Moving Window Enable */
-#define                    SD_RST  0x10       /* SDMMC Reset */
-#define                 PUP_SDDAT  0x20       /* Pull-up SD_DAT */
-#define                PUP_SDDAT3  0x40       /* Pull-up SD_DAT3 */
-#define                 PD_SDDAT3  0x80       /* Pull-down SD_DAT3 */
-/* Bit masks for SDH_RD_WAIT_EN */
-#define                       RWR  0x1        /* Read Wait Request */
 /* Bit masks for EMAC_PTP_CTL */
 #define                    PTP_EN  0x1        /* Enable the PTP_TSYNC module */
diff --git a/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h b/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
index f9fd2b2a2956..9241205fb992 100644
--- a/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
+++ b/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
@@ -585,58 +585,6 @@
 **                              modifier UNLESS the lower order bits are saved and ORed back in when
 **                              the macro is used.
 *************************************************************************************/
-/*
-** ********************* PLL AND RESET MASKS ****************************************/
-/* PLL_CTL Masks                                                                                                                                        */
-#define DF                              0x0001  /* 0: PLL = CLKIN, 1: PLL = CLKIN/2                                     */
-#define PLL_OFF                 0x0002  /* PLL Not Powered                                                                      */
-#define STOPCK                  0x0008  /* Core Clock Off                                                                       */
-#define PDWN                    0x0020  /* Enter Deep Sleep Mode                                                        */
-#define IN_DELAY                0x0040  /* Add 200ps Delay To EBIU Input Latches                        */
-#define OUT_DELAY               0x0080  /* Add 200ps Delay To EBIU Output Signals                       */
-#define BYPASS                  0x0100  /* Bypass the PLL                                                                       */
-#define MSEL                    0x7E00  /* Multiplier Select For CCLK/VCO Factors                       */
-/* PLL_CTL Macros (Only Use With Logic OR While Setting Lower Order Bits)                       */
-#define SET_MSEL(x)             (((x)&0x3F) << 0x9)     /* Set MSEL = 0-63 --> VCO = CLKIN*MSEL         */
-/* PLL_DIV Masks                                                                                                                */
-#define SSEL                    0x000F  /* System Select                                                */
-#define CSEL                    0x0030  /* Core Select                                                  */
-#define CSEL_DIV1               0x0000  /*              CCLK = VCO / 1                                  */
-#define CSEL_DIV2               0x0010  /*              CCLK = VCO / 2                                  */
-#define CSEL_DIV4               0x0020  /*              CCLK = VCO / 4                                  */
-#define CSEL_DIV8               0x0030  /*              CCLK = VCO / 8                                  */
-/* PLL_DIV Macros                                                                                                               */
-#define SET_SSEL(x)             ((x)&0xF)               /* Set SSEL = 0-15 --> SCLK = VCO/SSEL  */
-/* VR_CTL Masks */
-#define FREQ                    0x3000  /* Switching Oscillator Frequency For Regulator */
-#define HIBERNATE               0x0000  /*              Powerdown/Bypass On-Board Regulation    */
-#define VLEV                    0x00F0  /* Internal Voltage Level                                       */
-#define VLEV_085                0x0060  /*              VLEV = 0.85 V (-5% - +10% Accuracy)     */
-#define VLEV_090                0x0070  /*              VLEV = 0.90 V (-5% - +10% Accuracy)     */
-#define VLEV_095                0x0080  /*              VLEV = 0.95 V (-5% - +10% Accuracy)     */
-#define VLEV_100                0x0090  /*              VLEV = 1.00 V (-5% - +10% Accuracy)     */
-#define VLEV_105                0x00A0  /*              VLEV = 1.05 V (-5% - +10% Accuracy)     */
-#define VLEV_110                0x00B0  /*              VLEV = 1.10 V (-5% - +10% Accuracy)     */
-#define VLEV_115                0x00C0  /*              VLEV = 1.15 V (-5% - +10% Accuracy)     */
-#define VLEV_120                0x00D0  /*              VLEV = 1.20 V (-5% - +10% Accuracy)     */
-#define VLEV_125                0x00E0  /*              VLEV = 1.25 V (-5% - +10% Accuracy)     */
-#define VLEV_130                0x00F0  /*              VLEV = 1.30 V (-5% - +10% Accuracy)     */
-#define WAKE                    0x0100  /* Enable RTC/Reset Wakeup From Hibernate       */
-#define USBWE                   0x0200  /* Enable USB Wakeup From Hibernate                     */
-#define PHYWE                   0x0400  /* Enable PHY Wakeup From Hibernate                     */
-#define CLKBUFOE                0x4000  /* CLKIN Buffer Output Enable */
-#define PHYCLKOE                CLKBUFOE        /* Alternative legacy name for the above */
-#define SCKELOW         0x8000  /* Enable Drive CKE Low During Reset            */
-/* PLL_STAT Masks                                                                                                                                       */
-#define ACTIVE_PLLENABLED       0x0001  /* Processor In Active Mode With PLL Enabled    */
-#define FULL_ON                         0x0002  /* Processor In Full On Mode                                    */
-#define ACTIVE_PLLDISABLED      0x0004  /* Processor In Active Mode With PLL Disabled   */
-#define PLL_LOCKED                      0x0020  /* PLL_LOCKCNT Has Been Reached                                 */
 /* CHIPID Masks */
 #define CHIPID_VERSION         0xF0000000
@@ -756,66 +704,6 @@
 #define IWR_DISABLE(x)  (0xFFFFFFFF ^ (1 << ((x)&0x1F)))        /* Wakeup Disable Peripheral #x         */
-/* ********* WATCHDOG TIMER MASKS ******************** */
-/* Watchdog Timer WDOG_CTL Register Masks */
-#define WDEV(x) (((x)<<1) & 0x0006) /* event generated on roll over */
-#define WDEV_RESET 0x0000 /* generate reset event on roll over */
-#define WDEV_NMI 0x0002 /* generate NMI event on roll over */
-#define WDEV_GPI 0x0004 /* generate GP IRQ on roll over */
-#define WDEV_NONE 0x0006 /* no event on roll over */
-#define WDEN 0x0FF0 /* enable watchdog */
-#define WDDIS 0x0AD0 /* disable watchdog */
-#define WDRO 0x8000 /* watchdog rolled over latch */
-/* depreciated WDOG_CTL Register Masks for legacy code */
-#define ICTL WDEV
-#define ENABLE_RESET WDEV_RESET
-#define WDOG_RESET WDEV_RESET
-#define ENABLE_NMI WDEV_NMI
-#define WDOG_NMI WDEV_NMI
-#define ENABLE_GPI WDEV_GPI
-#define WDOG_GPI WDEV_GPI
-#define DISABLE_EVT WDEV_NONE
-#define WDOG_NONE WDEV_NONE
-#define TMR_EN WDEN
-#define TMR_DIS WDDIS
-#define TRO WDRO
-#define ICTL_P0 0x01
- #define ICTL_P1 0x02
-#define TRO_P 0x0F
-/* ***************  REAL TIME CLOCK MASKS  **************************/
-/* RTC_STAT and RTC_ALARM Masks                                                                         */
-#define RTC_SEC                         0x0000003F      /* Real-Time Clock Seconds      */
-#define RTC_MIN                         0x00000FC0      /* Real-Time Clock Minutes      */
-#define RTC_HR                          0x0001F000      /* Real-Time Clock Hours        */
-#define RTC_DAY                         0xFFFE0000      /* Real-Time Clock Days         */
-/* RTC_ALARM Macro                      z=day           y=hr    x=min   w=sec           */
-#define SET_ALARM(z,y,x,w)      ((((z)&0x7FFF)<<0x11)|(((y)&0x1F)<<0xC)|(((x)&0x3F)<<0x6)|((w)&0x3F))
-/* RTC_ICTL and RTC_ISTAT Masks                                                                                                                                         */
-#define STOPWATCH                       0x0001          /* Stopwatch Interrupt Enable                                                           */
-#define ALARM                           0x0002          /* Alarm Interrupt Enable                                                                       */
-#define SECOND                          0x0004          /* Seconds (1 Hz) Interrupt Enable                                                      */
-#define MINUTE                          0x0008          /* Minutes Interrupt Enable                                                                     */
-#define HOUR                            0x0010          /* Hours Interrupt Enable                                                                       */
-#define DAY                                     0x0020          /* 24 Hours (Days) Interrupt Enable                                                     */
-#define DAY_ALARM                       0x0040          /* Day Alarm (Day, Hour, Minute, Second) Interrupt Enable       */
-#define WRITE_PENDING           0x4000          /* Write Pending Status                                                                         */
-#define WRITE_COMPLETE          0x8000          /* Write Complete Interrupt Enable                                                      */
-/* RTC_FAST / RTC_PREN Mask                                                                                             */
-#define PREN                            0x0001  /* Enable Prescaler, RTC Runs @1 Hz     */
 /* ************** UART CONTROLLER MASKS *************************/
 /* UARTx_LCR Masks                                                                                              */
 #define WLS(x)          (((x)-5) & 0x03)        /* Word Length Select */
@@ -1372,33 +1260,6 @@
 /* **************************  DMA CONTROLLER MASKS  ********************************/
-/* DMAx_CONFIG, MDMA_yy_CONFIG Masks                                                                                            */
-#define DMAEN                   0x0001          /* DMA Channel Enable                                                   */
-#define WNR                             0x0002          /* Channel Direction (W/R*)                                             */
-#define WDSIZE_8                0x0000          /* Transfer Word Size = 8                                               */
-#define WDSIZE_16               0x0004          /* Transfer Word Size = 16                                              */
-#define WDSIZE_32               0x0008          /* Transfer Word Size = 32                                              */
-#define DMA2D                   0x0010          /* DMA Mode (2D/1D*)                                                    */
-#define RESTART                 0x0020          /* DMA Buffer Clear                                                             */
-#define DI_SEL                  0x0040          /* Data Interrupt Timing Select                                 */
-#define DI_EN                   0x0080          /* Data Interrupt Enable                                                */
-#define NDSIZE_0                0x0000          /* Next Descriptor Size = 0 (Stop/Autobuffer)   */
-#define NDSIZE_1                0x0100          /* Next Descriptor Size = 1                                             */
-#define NDSIZE_2                0x0200          /* Next Descriptor Size = 2                                             */
-#define NDSIZE_3                0x0300          /* Next Descriptor Size = 3                                             */
-#define NDSIZE_4                0x0400          /* Next Descriptor Size = 4                                             */
-#define NDSIZE_5                0x0500          /* Next Descriptor Size = 5                                             */
-#define NDSIZE_6                0x0600          /* Next Descriptor Size = 6                                             */
-#define NDSIZE_7                0x0700          /* Next Descriptor Size = 7                                             */
-#define NDSIZE_8                0x0800          /* Next Descriptor Size = 8                                             */
-#define NDSIZE_9                0x0900          /* Next Descriptor Size = 9                                             */
-#define NDSIZE                  0x0900  /* Next Descriptor Size */
-#define DMAFLOW                 0x7000  /* Flow Control */
-#define DMAFLOW_STOP            0x0000          /* Stop Mode                                                                    */
-#define DMAFLOW_AUTO            0x1000          /* Autobuffer Mode                                                              */
-#define DMAFLOW_ARRAY           0x4000          /* Descriptor Array Mode                                                */
-#define DMAFLOW_SMALL           0x6000          /* Small Model Descriptor List Mode                             */
-#define DMAFLOW_LARGE           0x7000          /* Large Model Descriptor List Mode                             */
 /* DMAx_PERIPHERAL_MAP, MDMA_yy_PERIPHERAL_MAP Masks                                                            */
 #define CTYPE                   0x0040  /* DMA Channel Type Indicator (Memory/Peripheral*)      */
@@ -1416,13 +1277,6 @@
 #define PMAP_UART1RX    0xA000  /*              UART1 Port Receive DMA                                          */
 #define PMAP_UART1TX    0xB000  /*              UART1 Port Transmit DMA                                         */
-/* DMAx_IRQ_STATUS, MDMA_yy_IRQ_STATUS Masks                                            */
-#define DMA_DONE                0x0001  /* DMA Completion Interrupt Status      */
-#define DMA_ERR                 0x0002  /* DMA Error Interrupt Status           */
-#define DFETCH                  0x0004  /* DMA Descriptor Fetch Indicator       */
-#define DMA_RUN                 0x0008  /* DMA Channel Running Indicator        */
 /*  ************  PARALLEL PERIPHERAL INTERFACE (PPI) MASKS *************/
 /*  PPI_CONTROL Masks                                                                                                   */
 #define PORT_EN                 0x0001          /* PPI Port Enable                                      */
@@ -1830,46 +1684,6 @@
 #define BNDMODE_CAPT     0x2000  /* boundary capture mode */
 #define BNDMODE_AEXT     0x3000  /* boundary auto-extend mode */
-/* Bit masks for OTP_CONTROL */
-#define                FUSE_FADDR  0x1ff      /* OTP/Fuse Address */
-#define                      FIEN  0x800      /* OTP/Fuse Interrupt Enable */
-#define                     nFIEN  0x0
-#define                  FTESTDEC  0x1000     /* OTP/Fuse Test Decoder */
-#define                 nFTESTDEC  0x0
-#define                   FWRTEST  0x2000     /* OTP/Fuse Write Test */
-#define                  nFWRTEST  0x0
-#define                     FRDEN  0x4000     /* OTP/Fuse Read Enable */
-#define                    nFRDEN  0x0
-#define                     FWREN  0x8000     /* OTP/Fuse Write Enable */
-#define                    nFWREN  0x0
-/* Bit masks for OTP_BEN */
-#define                      FBEN  0xffff     /* OTP/Fuse Byte Enable */
-/* Bit masks for OTP_STATUS */
-#define                     FCOMP  0x1        /* OTP/Fuse Access Complete */
-#define                    nFCOMP  0x0
-#define                    FERROR  0x2        /* OTP/Fuse Access Error */
-#define                   nFERROR  0x0
-#define                  MMRGLOAD  0x10       /* Memory Mapped Register Gasket Load */
-#define                 nMMRGLOAD  0x0
-#define                  MMRGLOCK  0x20       /* Memory Mapped Register Gasket Lock */
-#define                 nMMRGLOCK  0x0
-#define                    FPGMEN  0x40       /* OTP/Fuse Program Enable */
-#define                   nFPGMEN  0x0
-/* Bit masks for OTP_TIMING */
-#define                   USECDIV  0xff       /* Micro Second Divider */
-#define                   READACC  0x7f00     /* Read Access Time */
-#define                   CPUMPRL  0x38000    /* Charge Pump Release Time */
-#define                   CPUMPSU  0xc0000    /* Charge Pump Setup Time */
-#define                   CPUMPHD  0xf00000   /* Charge Pump Hold Time */
-#define                   PGMTIME  0xff000000 /* Program Time */
 /* Bit masks for SECURE_SYSSWT */
 #define                   EMUDABL  0x1        /* Emulation Disable. */
diff --git a/arch/blackfin/mach-bf527/Kconfig b/arch/blackfin/mach-bf527/Kconfig
index 848ac6f86823..1f8cbe9d6b9a 100644
--- a/arch/blackfin/mach-bf527/Kconfig
+++ b/arch/blackfin/mach-bf527/Kconfig
@@ -1,3 +1,7 @@
+config BF52x
+        def_bool y
+        depends on (BF522 || BF523 || BF524 || BF525 || BF526 || BF527)
 if (BF52x)
 source "arch/blackfin/mach-bf527/boards/Kconfig"
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c
index f1996b13a3da..7ab0800e2914 100644
--- a/arch/blackfin/mach-bf527/boards/cm_bf527.c
+++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c
@@ -15,9 +15,6 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
 #include <linux/etherdevice.h>
-#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
-#include <linux/usb/isp1362.h>
-#endif
 #include <linux/i2c.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
@@ -65,7 +62,7 @@ static struct isp1760_platform_data isp1760_priv = {
 };
 static struct platform_device bfin_isp1760_device = {
-        .name           = "isp1760-hcd",
+        .name           = "isp1760",
        .id             = 0,
        .dev = {
                .platform_data = &isp1760_priv,
@@ -317,45 +314,6 @@ static struct platform_device sl811_hcd_device = {
 };
 #endif
-#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
-static struct resource isp1362_hcd_resources[] = {
-        {
-                .start = 0x20360000,
-                .end = 0x20360000,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = 0x20360004,
-                .end = 0x20360004,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
-                .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
-                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
-        },
-};
-static struct isp1362_platform_data isp1362_priv = {
-        .sel15Kres = 1,
-        .clknotstop = 0,
-        .oc_enable = 0,
-        .int_act_high = 0,
-        .int_edge_triggered = 0,
-        .remote_wakeup_connected = 0,
-        .no_power_switching = 1,
-        .power_switching_mode = 0,
-};
-static struct platform_device isp1362_hcd_device = {
-        .name = "isp1362-hcd",
-        .id = 0,
-        .dev = {
-                .platform_data = &isp1362_priv,
-        },
-        .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
-        .resource = isp1362_hcd_resources,
-};
-#endif
 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 static struct platform_device bfin_mii_bus = {
        .name = "bfin_mii_bus",
@@ -841,10 +799,6 @@ static struct platform_device *cmbf527_devices[] __initdata = {
        &sl811_hcd_device,
 #endif
-#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
-        &isp1362_hcd_device,
-#endif
 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
        &bfin_isp1760_device,
 #endif
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index f09665f74ba0..5294fdd20732 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -13,9 +13,6 @@
 #include <linux/mtd/physmap.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
-#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
-#include <linux/usb/isp1362.h>
-#endif
 #include <linux/i2c.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
@@ -63,7 +60,7 @@ static struct isp1760_platform_data isp1760_priv = {
 };
 static struct platform_device bfin_isp1760_device = {
-        .name           = "isp1760-hcd",
+        .name           = "isp1760",
        .id             = 0,
        .dev = {
                .platform_data = &isp1760_priv,
@@ -373,45 +370,6 @@ static struct platform_device sl811_hcd_device = {
 };
 #endif
-#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
-static struct resource isp1362_hcd_resources[] = {
-        {
-                .start = 0x20360000,
-                .end = 0x20360000,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = 0x20360004,
-                .end = 0x20360004,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
-                .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
-                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
-        },
-};
-static struct isp1362_platform_data isp1362_priv = {
-        .sel15Kres = 1,
-        .clknotstop = 0,
-        .oc_enable = 0,
-        .int_act_high = 0,
-        .int_edge_triggered = 0,
-        .remote_wakeup_connected = 0,
-        .no_power_switching = 1,
-        .power_switching_mode = 0,
-};
-static struct platform_device isp1362_hcd_device = {
-        .name = "isp1362-hcd",
-        .id = 0,
-        .dev = {
-                .platform_data = &isp1362_priv,
-        },
-        .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
-        .resource = isp1362_hcd_resources,
-};
-#endif
 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 static struct platform_device bfin_mii_bus = {
        .name = "bfin_mii_bus",
@@ -688,12 +646,6 @@ static struct platform_device bfin_spi0_device = {
 };
 #endif  /* spi master and devices */
-#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
-static struct platform_device bfin_fb_device = {
-        .name = "bf537-lq035",
-};
-#endif
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 static struct resource bfin_uart_resources[] = {
 #ifdef CONFIG_SERIAL_BFIN_UART0
@@ -850,7 +802,7 @@ static struct platform_device bfin_device_gpiokeys = {
 };
 #endif
-#if defined(CONFIG_JOYSTICK_BFIN_ROTARY) || defined(CONFIG_JOYSTICK_BFIN_ROTARY_MODULE)
+#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
 #include <linux/input.h>
 #include <asm/bfin_rotary.h>
@@ -924,10 +876,6 @@ static struct platform_device *stamp_devices[] __initdata = {
        &sl811_hcd_device,
 #endif
-#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
-        &isp1362_hcd_device,
-#endif
 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
        &bfin_isp1760_device,
 #endif
@@ -957,10 +905,6 @@ static struct platform_device *stamp_devices[] __initdata = {
        &bfin_spi0_device,
 #endif
-#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
-        &bfin_fb_device,
-#endif
 #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
        &bf52x_t350mcqb_device,
 #endif
@@ -991,7 +935,7 @@ static struct platform_device *stamp_devices[] __initdata = {
        &bfin_device_gpiokeys,
 #endif
-#if defined(CONFIG_JOYSTICK_BFIN_ROTARY) || defined(CONFIG_JOYSTICK_BFIN_ROTARY_MODULE)
+#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
        &bfin_rotary_device,
 #endif
diff --git a/arch/blackfin/mach-bf527/include/mach/blackfin.h b/arch/blackfin/mach-bf527/include/mach/blackfin.h
index e7d6034f268f..f714c5de3073 100644
--- a/arch/blackfin/mach-bf527/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf527/include/mach/blackfin.h
@@ -46,10 +46,4 @@
 #define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
 #define OFFSET_GCTL             0x24    /* Global Control Register              */
-/* PLL_DIV Masks                                                                                                        */
-#define CCLK_DIV1 CSEL_DIV1     /*          CCLK = VCO / 1                                  */
-#define CCLK_DIV2 CSEL_DIV2     /*          CCLK = VCO / 2                                  */
-#define CCLK_DIV4 CSEL_DIV4     /*          CCLK = VCO / 4                                  */
-#define CCLK_DIV8 CSEL_DIV8     /*          CCLK = VCO / 8                                  */
 #endif
diff --git a/arch/blackfin/mach-bf527/include/mach/cdefBF525.h b/arch/blackfin/mach-bf527/include/mach/cdefBF525.h
index dc3119e9f663..d7e2751c6bcc 100644
--- a/arch/blackfin/mach-bf527/include/mach/cdefBF525.h
+++ b/arch/blackfin/mach-bf527/include/mach/cdefBF525.h
@@ -10,15 +10,8 @@
 /* include all Core registers and bit definitions */
 #include "defBF525.h"
-/* include core specific register pointer definitions */
+/* BF525 is BF522 + USB */
-#include <asm/cdef_LPBlackfin.h>
+#include "cdefBF522.h"
-/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF525 */
-/* include cdefBF52x_base.h for the set of #defines that are common to all ADSP-BF52x processors */
-#include "cdefBF52x_base.h"
-/* The following are the #defines needed by ADSP-BF525 that are not in the common header */
 /* USB Control Registers */
diff --git a/arch/blackfin/mach-bf527/include/mach/cdefBF527.h b/arch/blackfin/mach-bf527/include/mach/cdefBF527.h
index d6579449ee46..c7ba544d50b6 100644
--- a/arch/blackfin/mach-bf527/include/mach/cdefBF527.h
+++ b/arch/blackfin/mach-bf527/include/mach/cdefBF527.h
@@ -10,15 +10,8 @@
 /* include all Core registers and bit definitions */
 #include "defBF527.h"
-/* include core specific register pointer definitions */
+/* BF527 is BF525 + EMAC */
-#include <asm/cdef_LPBlackfin.h>
+#include "cdefBF525.h"
-/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF527 */
-/* include cdefBF52x_base.h for the set of #defines that are common to all ADSP-BF52x processors */
-#include "cdefBF52x_base.h"
-/* The following are the #defines needed by ADSP-BF527 that are not in the common header */
 /* 10/100 Ethernet Controller   (0xFFC03000 - 0xFFC031FF) */
@@ -185,417 +178,4 @@
 #define bfin_read_EMAC_TXC_ABORT()              bfin_read32(EMAC_TXC_ABORT)
 #define bfin_write_EMAC_TXC_ABORT(val)          bfin_write32(EMAC_TXC_ABORT, val)
-/* USB Control Registers */
-#define bfin_read_USB_FADDR()                   bfin_read16(USB_FADDR)
-#define bfin_write_USB_FADDR(val)               bfin_write16(USB_FADDR, val)
-#define bfin_read_USB_POWER()                   bfin_read16(USB_POWER)
-#define bfin_write_USB_POWER(val)               bfin_write16(USB_POWER, val)
-#define bfin_read_USB_INTRTX()                  bfin_read16(USB_INTRTX)
-#define bfin_write_USB_INTRTX(val)              bfin_write16(USB_INTRTX, val)
-#define bfin_read_USB_INTRRX()                  bfin_read16(USB_INTRRX)
-#define bfin_write_USB_INTRRX(val)              bfin_write16(USB_INTRRX, val)
-#define bfin_read_USB_INTRTXE()                 bfin_read16(USB_INTRTXE)
-#define bfin_write_USB_INTRTXE(val)             bfin_write16(USB_INTRTXE, val)
-#define bfin_read_USB_INTRRXE()                 bfin_read16(USB_INTRRXE)
-#define bfin_write_USB_INTRRXE(val)             bfin_write16(USB_INTRRXE, val)
-#define bfin_read_USB_INTRUSB()                 bfin_read16(USB_INTRUSB)
-#define bfin_write_USB_INTRUSB(val)             bfin_write16(USB_INTRUSB, val)
-#define bfin_read_USB_INTRUSBE()                bfin_read16(USB_INTRUSBE)
-#define bfin_write_USB_INTRUSBE(val)            bfin_write16(USB_INTRUSBE, val)
-#define bfin_read_USB_FRAME()                   bfin_read16(USB_FRAME)
-#define bfin_write_USB_FRAME(val)               bfin_write16(USB_FRAME, val)
-#define bfin_read_USB_INDEX()                   bfin_read16(USB_INDEX)
-#define bfin_write_USB_INDEX(val)               bfin_write16(USB_INDEX, val)
-#define bfin_read_USB_TESTMODE()                bfin_read16(USB_TESTMODE)
-#define bfin_write_USB_TESTMODE(val)            bfin_write16(USB_TESTMODE, val)
-#define bfin_read_USB_GLOBINTR()                bfin_read16(USB_GLOBINTR)
-#define bfin_write_USB_GLOBINTR(val)            bfin_write16(USB_GLOBINTR, val)
-#define bfin_read_USB_GLOBAL_CTL()              bfin_read16(USB_GLOBAL_CTL)
-#define bfin_write_USB_GLOBAL_CTL(val)          bfin_write16(USB_GLOBAL_CTL, val)
-/* USB Packet Control Registers */
-#define bfin_read_USB_TX_MAX_PACKET()           bfin_read16(USB_TX_MAX_PACKET)
-#define bfin_write_USB_TX_MAX_PACKET(val)       bfin_write16(USB_TX_MAX_PACKET, val)
-#define bfin_read_USB_CSR0()                    bfin_read16(USB_CSR0)
-#define bfin_write_USB_CSR0(val)                bfin_write16(USB_CSR0, val)
-#define bfin_read_USB_TXCSR()                   bfin_read16(USB_TXCSR)
-#define bfin_write_USB_TXCSR(val)               bfin_write16(USB_TXCSR, val)
-#define bfin_read_USB_RX_MAX_PACKET()           bfin_read16(USB_RX_MAX_PACKET)
-#define bfin_write_USB_RX_MAX_PACKET(val)       bfin_write16(USB_RX_MAX_PACKET, val)
-#define bfin_read_USB_RXCSR()                   bfin_read16(USB_RXCSR)
-#define bfin_write_USB_RXCSR(val)               bfin_write16(USB_RXCSR, val)
-#define bfin_read_USB_COUNT0()                  bfin_read16(USB_COUNT0)
-#define bfin_write_USB_COUNT0(val)              bfin_write16(USB_COUNT0, val)
-#define bfin_read_USB_RXCOUNT()                 bfin_read16(USB_RXCOUNT)
-#define bfin_write_USB_RXCOUNT(val)             bfin_write16(USB_RXCOUNT, val)
-#define bfin_read_USB_TXTYPE()                  bfin_read16(USB_TXTYPE)
-#define bfin_write_USB_TXTYPE(val)              bfin_write16(USB_TXTYPE, val)
-#define bfin_read_USB_NAKLIMIT0()               bfin_read16(USB_NAKLIMIT0)
-#define bfin_write_USB_NAKLIMIT0(val)           bfin_write16(USB_NAKLIMIT0, val)
-#define bfin_read_USB_TXINTERVAL()              bfin_read16(USB_TXINTERVAL)
-#define bfin_write_USB_TXINTERVAL(val)          bfin_write16(USB_TXINTERVAL, val)
-#define bfin_read_USB_RXTYPE()                  bfin_read16(USB_RXTYPE)
-#define bfin_write_USB_RXTYPE(val)              bfin_write16(USB_RXTYPE, val)
-#define bfin_read_USB_RXINTERVAL()              bfin_read16(USB_RXINTERVAL)
-#define bfin_write_USB_RXINTERVAL(val)          bfin_write16(USB_RXINTERVAL, val)
-#define bfin_read_USB_TXCOUNT()                 bfin_read16(USB_TXCOUNT)
-#define bfin_write_USB_TXCOUNT(val)             bfin_write16(USB_TXCOUNT, val)
-/* USB Endpoint FIFO Registers */
-#define bfin_read_USB_EP0_FIFO()                bfin_read16(USB_EP0_FIFO)
-#define bfin_write_USB_EP0_FIFO(val)            bfin_write16(USB_EP0_FIFO, val)
-#define bfin_read_USB_EP1_FIFO()                bfin_read16(USB_EP1_FIFO)
-#define bfin_write_USB_EP1_FIFO(val)            bfin_write16(USB_EP1_FIFO, val)
-#define bfin_read_USB_EP2_FIFO()                bfin_read16(USB_EP2_FIFO)
-#define bfin_write_USB_EP2_FIFO(val)            bfin_write16(USB_EP2_FIFO, val)
-#define bfin_read_USB_EP3_FIFO()                bfin_read16(USB_EP3_FIFO)
-#define bfin_write_USB_EP3_FIFO(val)            bfin_write16(USB_EP3_FIFO, val)
-#define bfin_read_USB_EP4_FIFO()                bfin_read16(USB_EP4_FIFO)
-#define bfin_write_USB_EP4_FIFO(val)            bfin_write16(USB_EP4_FIFO, val)
-#define bfin_read_USB_EP5_FIFO()                bfin_read16(USB_EP5_FIFO)
-#define bfin_write_USB_EP5_FIFO(val)            bfin_write16(USB_EP5_FIFO, val)
-#define bfin_read_USB_EP6_FIFO()                bfin_read16(USB_EP6_FIFO)
-#define bfin_write_USB_EP6_FIFO(val)            bfin_write16(USB_EP6_FIFO, val)
-#define bfin_read_USB_EP7_FIFO()                bfin_read16(USB_EP7_FIFO)
-#define bfin_write_USB_EP7_FIFO(val)            bfin_write16(USB_EP7_FIFO, val)
-/* USB OTG Control Registers */
-#define bfin_read_USB_OTG_DEV_CTL()             bfin_read16(USB_OTG_DEV_CTL)
-#define bfin_write_USB_OTG_DEV_CTL(val)         bfin_write16(USB_OTG_DEV_CTL, val)
-#define bfin_read_USB_OTG_VBUS_IRQ()            bfin_read16(USB_OTG_VBUS_IRQ)
-#define bfin_write_USB_OTG_VBUS_IRQ(val)        bfin_write16(USB_OTG_VBUS_IRQ, val)
-#define bfin_read_USB_OTG_VBUS_MASK()           bfin_read16(USB_OTG_VBUS_MASK)
-#define bfin_write_USB_OTG_VBUS_MASK(val)       bfin_write16(USB_OTG_VBUS_MASK, val)
-/* USB Phy Control Registers */
-#define bfin_read_USB_LINKINFO()                bfin_read16(USB_LINKINFO)
-#define bfin_write_USB_LINKINFO(val)            bfin_write16(USB_LINKINFO, val)
-#define bfin_read_USB_VPLEN()                   bfin_read16(USB_VPLEN)
-#define bfin_write_USB_VPLEN(val)               bfin_write16(USB_VPLEN, val)
-#define bfin_read_USB_HS_EOF1()                 bfin_read16(USB_HS_EOF1)
-#define bfin_write_USB_HS_EOF1(val)             bfin_write16(USB_HS_EOF1, val)
-#define bfin_read_USB_FS_EOF1()                 bfin_read16(USB_FS_EOF1)
-#define bfin_write_USB_FS_EOF1(val)             bfin_write16(USB_FS_EOF1, val)
-#define bfin_read_USB_LS_EOF1()                 bfin_read16(USB_LS_EOF1)
-#define bfin_write_USB_LS_EOF1(val)             bfin_write16(USB_LS_EOF1, val)
-/* (APHY_CNTRL is for ADI usage only) */
-#define bfin_read_USB_APHY_CNTRL()              bfin_read16(USB_APHY_CNTRL)
-#define bfin_write_USB_APHY_CNTRL(val)          bfin_write16(USB_APHY_CNTRL, val)
-/* (APHY_CALIB is for ADI usage only) */
-#define bfin_read_USB_APHY_CALIB()              bfin_read16(USB_APHY_CALIB)
-#define bfin_write_USB_APHY_CALIB(val)          bfin_write16(USB_APHY_CALIB, val)
-#define bfin_read_USB_APHY_CNTRL2()             bfin_read16(USB_APHY_CNTRL2)
-#define bfin_write_USB_APHY_CNTRL2(val)         bfin_write16(USB_APHY_CNTRL2, val)
-/* (PHY_TEST is for ADI usage only) */
-#define bfin_read_USB_PHY_TEST()                bfin_read16(USB_PHY_TEST)
-#define bfin_write_USB_PHY_TEST(val)            bfin_write16(USB_PHY_TEST, val)
-#define bfin_read_USB_PLLOSC_CTRL()             bfin_read16(USB_PLLOSC_CTRL)
-#define bfin_write_USB_PLLOSC_CTRL(val)         bfin_write16(USB_PLLOSC_CTRL, val)
-#define bfin_read_USB_SRP_CLKDIV()              bfin_read16(USB_SRP_CLKDIV)
-#define bfin_write_USB_SRP_CLKDIV(val)          bfin_write16(USB_SRP_CLKDIV, val)
-/* USB Endpoint 0 Control Registers */
-#define bfin_read_USB_EP_NI0_TXMAXP()           bfin_read16(USB_EP_NI0_TXMAXP)
-#define bfin_write_USB_EP_NI0_TXMAXP(val)       bfin_write16(USB_EP_NI0_TXMAXP, val)
-#define bfin_read_USB_EP_NI0_TXCSR()            bfin_read16(USB_EP_NI0_TXCSR)
-#define bfin_write_USB_EP_NI0_TXCSR(val)        bfin_write16(USB_EP_NI0_TXCSR, val)
-#define bfin_read_USB_EP_NI0_RXMAXP()           bfin_read16(USB_EP_NI0_RXMAXP)
-#define bfin_write_USB_EP_NI0_RXMAXP(val)       bfin_write16(USB_EP_NI0_RXMAXP, val)
-#define bfin_read_USB_EP_NI0_RXCSR()            bfin_read16(USB_EP_NI0_RXCSR)
-#define bfin_write_USB_EP_NI0_RXCSR(val)        bfin_write16(USB_EP_NI0_RXCSR, val)
-#define bfin_read_USB_EP_NI0_RXCOUNT()          bfin_read16(USB_EP_NI0_RXCOUNT)
-#define bfin_write_USB_EP_NI0_RXCOUNT(val)      bfin_write16(USB_EP_NI0_RXCOUNT, val)
-#define bfin_read_USB_EP_NI0_TXTYPE()           bfin_read16(USB_EP_NI0_TXTYPE)
-#define bfin_write_USB_EP_NI0_TXTYPE(val)       bfin_write16(USB_EP_NI0_TXTYPE, val)
-#define bfin_read_USB_EP_NI0_TXINTERVAL()       bfin_read16(USB_EP_NI0_TXINTERVAL)
-#define bfin_write_USB_EP_NI0_TXINTERVAL(val)   bfin_write16(USB_EP_NI0_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI0_RXTYPE()           bfin_read16(USB_EP_NI0_RXTYPE)
-#define bfin_write_USB_EP_NI0_RXTYPE(val)       bfin_write16(USB_EP_NI0_RXTYPE, val)
-#define bfin_read_USB_EP_NI0_RXINTERVAL()       bfin_read16(USB_EP_NI0_RXINTERVAL)
-#define bfin_write_USB_EP_NI0_RXINTERVAL(val)   bfin_write16(USB_EP_NI0_RXINTERVAL, val)
-#define bfin_read_USB_EP_NI0_TXCOUNT()          bfin_read16(USB_EP_NI0_TXCOUNT)
-#define bfin_write_USB_EP_NI0_TXCOUNT(val)      bfin_write16(USB_EP_NI0_TXCOUNT, val)
-/* USB Endpoint 1 Control Registers */
-#define bfin_read_USB_EP_NI1_TXMAXP()           bfin_read16(USB_EP_NI1_TXMAXP)
-#define bfin_write_USB_EP_NI1_TXMAXP(val)       bfin_write16(USB_EP_NI1_TXMAXP, val)
-#define bfin_read_USB_EP_NI1_TXCSR()            bfin_read16(USB_EP_NI1_TXCSR)
-#define bfin_write_USB_EP_NI1_TXCSR(val)        bfin_write16(USB_EP_NI1_TXCSR, val)
-#define bfin_read_USB_EP_NI1_RXMAXP()           bfin_read16(USB_EP_NI1_RXMAXP)
-#define bfin_write_USB_EP_NI1_RXMAXP(val)       bfin_write16(USB_EP_NI1_RXMAXP, val)
-#define bfin_read_USB_EP_NI1_RXCSR()            bfin_read16(USB_EP_NI1_RXCSR)
-#define bfin_write_USB_EP_NI1_RXCSR(val)        bfin_write16(USB_EP_NI1_RXCSR, val)
-#define bfin_read_USB_EP_NI1_RXCOUNT()          bfin_read16(USB_EP_NI1_RXCOUNT)
-#define bfin_write_USB_EP_NI1_RXCOUNT(val)      bfin_write16(USB_EP_NI1_RXCOUNT, val)
-#define bfin_read_USB_EP_NI1_TXTYPE()           bfin_read16(USB_EP_NI1_TXTYPE)
-#define bfin_write_USB_EP_NI1_TXTYPE(val)       bfin_write16(USB_EP_NI1_TXTYPE, val)
-#define bfin_read_USB_EP_NI1_TXINTERVAL()       bfin_read16(USB_EP_NI1_TXINTERVAL)
-#define bfin_write_USB_EP_NI1_TXINTERVAL(val)   bfin_write16(USB_EP_NI1_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI1_RXTYPE()           bfin_read16(USB_EP_NI1_RXTYPE)
-#define bfin_write_USB_EP_NI1_RXTYPE(val)       bfin_write16(USB_EP_NI1_RXTYPE, val)
-#define bfin_read_USB_EP_NI1_RXINTERVAL()       bfin_read16(USB_EP_NI1_RXINTERVAL)
-#define bfin_write_USB_EP_NI1_RXINTERVAL(val)   bfin_write16(USB_EP_NI1_RXINTERVAL, val)
-#define bfin_read_USB_EP_NI1_TXCOUNT()          bfin_read16(USB_EP_NI1_TXCOUNT)
-#define bfin_write_USB_EP_NI1_TXCOUNT(val)      bfin_write16(USB_EP_NI1_TXCOUNT, val)
-/* USB Endpoint 2 Control Registers */
-#define bfin_read_USB_EP_NI2_TXMAXP()           bfin_read16(USB_EP_NI2_TXMAXP)
-#define bfin_write_USB_EP_NI2_TXMAXP(val)       bfin_write16(USB_EP_NI2_TXMAXP, val)
-#define bfin_read_USB_EP_NI2_TXCSR()            bfin_read16(USB_EP_NI2_TXCSR)
-#define bfin_write_USB_EP_NI2_TXCSR(val)        bfin_write16(USB_EP_NI2_TXCSR, val)
-#define bfin_read_USB_EP_NI2_RXMAXP()           bfin_read16(USB_EP_NI2_RXMAXP)
-#define bfin_write_USB_EP_NI2_RXMAXP(val)       bfin_write16(USB_EP_NI2_RXMAXP, val)
-#define bfin_read_USB_EP_NI2_RXCSR()            bfin_read16(USB_EP_NI2_RXCSR)
-#define bfin_write_USB_EP_NI2_RXCSR(val)        bfin_write16(USB_EP_NI2_RXCSR, val)
-#define bfin_read_USB_EP_NI2_RXCOUNT()          bfin_read16(USB_EP_NI2_RXCOUNT)
-#define bfin_write_USB_EP_NI2_RXCOUNT(val)      bfin_write16(USB_EP_NI2_RXCOUNT, val)
-#define bfin_read_USB_EP_NI2_TXTYPE()           bfin_read16(USB_EP_NI2_TXTYPE)
-#define bfin_write_USB_EP_NI2_TXTYPE(val)       bfin_write16(USB_EP_NI2_TXTYPE, val)
-#define bfin_read_USB_EP_NI2_TXINTERVAL()       bfin_read16(USB_EP_NI2_TXINTERVAL)
-#define bfin_write_USB_EP_NI2_TXINTERVAL(val)   bfin_write16(USB_EP_NI2_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI2_RXTYPE()           bfin_read16(USB_EP_NI2_RXTYPE)
-#define bfin_write_USB_EP_NI2_RXTYPE(val)       bfin_write16(USB_EP_NI2_RXTYPE, val)
-#define bfin_read_USB_EP_NI2_RXINTERVAL()       bfin_read16(USB_EP_NI2_RXINTERVAL)
-#define bfin_write_USB_EP_NI2_RXINTERVAL(val)   bfin_write16(USB_EP_NI2_RXINTERVAL, val)
-#define bfin_read_USB_EP_NI2_TXCOUNT()          bfin_read16(USB_EP_NI2_TXCOUNT)
-#define bfin_write_USB_EP_NI2_TXCOUNT(val)      bfin_write16(USB_EP_NI2_TXCOUNT, val)
-/* USB Endpoint 3 Control Registers */
-#define bfin_read_USB_EP_NI3_TXMAXP()           bfin_read16(USB_EP_NI3_TXMAXP)
-#define bfin_write_USB_EP_NI3_TXMAXP(val)       bfin_write16(USB_EP_NI3_TXMAXP, val)
-#define bfin_read_USB_EP_NI3_TXCSR()            bfin_read16(USB_EP_NI3_TXCSR)
-#define bfin_write_USB_EP_NI3_TXCSR(val)        bfin_write16(USB_EP_NI3_TXCSR, val)
-#define bfin_read_USB_EP_NI3_RXMAXP()           bfin_read16(USB_EP_NI3_RXMAXP)
-#define bfin_write_USB_EP_NI3_RXMAXP(val)       bfin_write16(USB_EP_NI3_RXMAXP, val)
-#define bfin_read_USB_EP_NI3_RXCSR()            bfin_read16(USB_EP_NI3_RXCSR)
-#define bfin_write_USB_EP_NI3_RXCSR(val)        bfin_write16(USB_EP_NI3_RXCSR, val)
-#define bfin_read_USB_EP_NI3_RXCOUNT()          bfin_read16(USB_EP_NI3_RXCOUNT)
-#define bfin_write_USB_EP_NI3_RXCOUNT(val)      bfin_write16(USB_EP_NI3_RXCOUNT, val)
-#define bfin_read_USB_EP_NI3_TXTYPE()           bfin_read16(USB_EP_NI3_TXTYPE)
-#define bfin_write_USB_EP_NI3_TXTYPE(val)       bfin_write16(USB_EP_NI3_TXTYPE, val)
-#define bfin_read_USB_EP_NI3_TXINTERVAL()       bfin_read16(USB_EP_NI3_TXINTERVAL)
-#define bfin_write_USB_EP_NI3_TXINTERVAL(val)   bfin_write16(USB_EP_NI3_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI3_RXTYPE()           bfin_read16(USB_EP_NI3_RXTYPE)
-#define bfin_write_USB_EP_NI3_RXTYPE(val)       bfin_write16(USB_EP_NI3_RXTYPE, val)
-#define bfin_read_USB_EP_NI3_RXINTERVAL()       bfin_read16(USB_EP_NI3_RXINTERVAL)
-#define bfin_write_USB_EP_NI3_RXINTERVAL(val)   bfin_write16(USB_EP_NI3_RXINTERVAL, val)
-#define bfin_read_USB_EP_NI3_TXCOUNT()          bfin_read16(USB_EP_NI3_TXCOUNT)
-#define bfin_write_USB_EP_NI3_TXCOUNT(val)      bfin_write16(USB_EP_NI3_TXCOUNT, val)
-/* USB Endpoint 4 Control Registers */
-#define bfin_read_USB_EP_NI4_TXMAXP()           bfin_read16(USB_EP_NI4_TXMAXP)
-#define bfin_write_USB_EP_NI4_TXMAXP(val)       bfin_write16(USB_EP_NI4_TXMAXP, val)
-#define bfin_read_USB_EP_NI4_TXCSR()            bfin_read16(USB_EP_NI4_TXCSR)
-#define bfin_write_USB_EP_NI4_TXCSR(val)        bfin_write16(USB_EP_NI4_TXCSR, val)
-#define bfin_read_USB_EP_NI4_RXMAXP()           bfin_read16(USB_EP_NI4_RXMAXP)
-#define bfin_write_USB_EP_NI4_RXMAXP(val)       bfin_write16(USB_EP_NI4_RXMAXP, val)
-#define bfin_read_USB_EP_NI4_RXCSR()            bfin_read16(USB_EP_NI4_RXCSR)
-#define bfin_write_USB_EP_NI4_RXCSR(val)        bfin_write16(USB_EP_NI4_RXCSR, val)
-#define bfin_read_USB_EP_NI4_RXCOUNT()          bfin_read16(USB_EP_NI4_RXCOUNT)
-#define bfin_write_USB_EP_NI4_RXCOUNT(val)      bfin_write16(USB_EP_NI4_RXCOUNT, val)
-#define bfin_read_USB_EP_NI4_TXTYPE()           bfin_read16(USB_EP_NI4_TXTYPE)
-#define bfin_write_USB_EP_NI4_TXTYPE(val)       bfin_write16(USB_EP_NI4_TXTYPE, val)
-#define bfin_read_USB_EP_NI4_TXINTERVAL()       bfin_read16(USB_EP_NI4_TXINTERVAL)
-#define bfin_write_USB_EP_NI4_TXINTERVAL(val)   bfin_write16(USB_EP_NI4_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI4_RXTYPE()           bfin_read16(USB_EP_NI4_RXTYPE)
-#define bfin_write_USB_EP_NI4_RXTYPE(val)       bfin_write16(USB_EP_NI4_RXTYPE, val)
-#define bfin_read_USB_EP_NI4_RXINTERVAL()       bfin_read16(USB_EP_NI4_RXINTERVAL)
-#define bfin_write_USB_EP_NI4_RXINTERVAL(val)   bfin_write16(USB_EP_NI4_RXINTERVAL, val)
-#define bfin_read_USB_EP_NI4_TXCOUNT()          bfin_read16(USB_EP_NI4_TXCOUNT)
-#define bfin_write_USB_EP_NI4_TXCOUNT(val)      bfin_write16(USB_EP_NI4_TXCOUNT, val)
-/* USB Endpoint 5 Control Registers */
-#define bfin_read_USB_EP_NI5_TXMAXP()           bfin_read16(USB_EP_NI5_TXMAXP)
-#define bfin_write_USB_EP_NI5_TXMAXP(val)       bfin_write16(USB_EP_NI5_TXMAXP, val)
-#define bfin_read_USB_EP_NI5_TXCSR()            bfin_read16(USB_EP_NI5_TXCSR)
-#define bfin_write_USB_EP_NI5_TXCSR(val)        bfin_write16(USB_EP_NI5_TXCSR, val)
-#define bfin_read_USB_EP_NI5_RXMAXP()           bfin_read16(USB_EP_NI5_RXMAXP)
-#define bfin_write_USB_EP_NI5_RXMAXP(val)       bfin_write16(USB_EP_NI5_RXMAXP, val)
-#define bfin_read_USB_EP_NI5_RXCSR()            bfin_read16(USB_EP_NI5_RXCSR)
-#define bfin_write_USB_EP_NI5_RXCSR(val)        bfin_write16(USB_EP_NI5_RXCSR, val)
-#define bfin_read_USB_EP_NI5_RXCOUNT()          bfin_read16(USB_EP_NI5_RXCOUNT)
-#define bfin_write_USB_EP_NI5_RXCOUNT(val)      bfin_write16(USB_EP_NI5_RXCOUNT, val)
-#define bfin_read_USB_EP_NI5_TXTYPE()           bfin_read16(USB_EP_NI5_TXTYPE)
-#define bfin_write_USB_EP_NI5_TXTYPE(val)       bfin_write16(USB_EP_NI5_TXTYPE, val)
-#define bfin_read_USB_EP_NI5_TXINTERVAL()       bfin_read16(USB_EP_NI5_TXINTERVAL)
-#define bfin_write_USB_EP_NI5_TXINTERVAL(val)   bfin_write16(USB_EP_NI5_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI5_RXTYPE()           bfin_read16(USB_EP_NI5_RXTYPE)
-#define bfin_write_USB_EP_NI5_RXTYPE(val)       bfin_write16(USB_EP_NI5_RXTYPE, val)
-#define bfin_read_USB_EP_NI5_RXINTERVAL()       bfin_read16(USB_EP_NI5_RXINTERVAL)
-#define bfin_write_USB_EP_NI5_RXINTERVAL(val)   bfin_write16(USB_EP_NI5_RXINTERVAL, val)
-#define bfin_read_USB_EP_NI5_TXCOUNT()          bfin_read16(USB_EP_NI5_TXCOUNT)
-#define bfin_write_USB_EP_NI5_TXCOUNT(val)      bfin_write16(USB_EP_NI5_TXCOUNT, val)
-/* USB Endpoint 6 Control Registers */
-#define bfin_read_USB_EP_NI6_TXMAXP()           bfin_read16(USB_EP_NI6_TXMAXP)
-#define bfin_write_USB_EP_NI6_TXMAXP(val)       bfin_write16(USB_EP_NI6_TXMAXP, val)
-#define bfin_read_USB_EP_NI6_TXCSR()            bfin_read16(USB_EP_NI6_TXCSR)
-#define bfin_write_USB_EP_NI6_TXCSR(val)        bfin_write16(USB_EP_NI6_TXCSR, val)
-#define bfin_read_USB_EP_NI6_RXMAXP()           bfin_read16(USB_EP_NI6_RXMAXP)
-#define bfin_write_USB_EP_NI6_RXMAXP(val)       bfin_write16(USB_EP_NI6_RXMAXP, val)
-#define bfin_read_USB_EP_NI6_RXCSR()            bfin_read16(USB_EP_NI6_RXCSR)
-#define bfin_write_USB_EP_NI6_RXCSR(val)        bfin_write16(USB_EP_NI6_RXCSR, val)
-#define bfin_read_USB_EP_NI6_RXCOUNT()          bfin_read16(USB_EP_NI6_RXCOUNT)
-#define bfin_write_USB_EP_NI6_RXCOUNT(val)      bfin_write16(USB_EP_NI6_RXCOUNT, val)
-#define bfin_read_USB_EP_NI6_TXTYPE()           bfin_read16(USB_EP_NI6_TXTYPE)
-#define bfin_write_USB_EP_NI6_TXTYPE(val)       bfin_write16(USB_EP_NI6_TXTYPE, val)
-#define bfin_read_USB_EP_NI6_TXINTERVAL()       bfin_read16(USB_EP_NI6_TXINTERVAL)
-#define bfin_write_USB_EP_NI6_TXINTERVAL(val)   bfin_write16(USB_EP_NI6_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI6_RXTYPE()           bfin_read16(USB_EP_NI6_RXTYPE)
-#define bfin_write_USB_EP_NI6_RXTYPE(val)       bfin_write16(USB_EP_NI6_RXTYPE, val)
-#define bfin_read_USB_EP_NI6_RXINTERVAL()       bfin_read16(USB_EP_NI6_RXINTERVAL)
-#define bfin_write_USB_EP_NI6_RXINTERVAL(val)   bfin_write16(USB_EP_NI6_RXINTERVAL, val)
-#define bfin_read_USB_EP_NI6_TXCOUNT()          bfin_read16(USB_EP_NI6_TXCOUNT)
-#define bfin_write_USB_EP_NI6_TXCOUNT(val)      bfin_write16(USB_EP_NI6_TXCOUNT, val)
-/* USB Endpoint 7 Control Registers */
-#define bfin_read_USB_EP_NI7_TXMAXP()           bfin_read16(USB_EP_NI7_TXMAXP)
-#define bfin_write_USB_EP_NI7_TXMAXP(val)       bfin_write16(USB_EP_NI7_TXMAXP, val)
-#define bfin_read_USB_EP_NI7_TXCSR()            bfin_read16(USB_EP_NI7_TXCSR)
-#define bfin_write_USB_EP_NI7_TXCSR(val)        bfin_write16(USB_EP_NI7_TXCSR, val)
-#define bfin_read_USB_EP_NI7_RXMAXP()           bfin_read16(USB_EP_NI7_RXMAXP)
-#define bfin_write_USB_EP_NI7_RXMAXP(val)       bfin_write16(USB_EP_NI7_RXMAXP, val)
-#define bfin_read_USB_EP_NI7_RXCSR()            bfin_read16(USB_EP_NI7_RXCSR)
-#define bfin_write_USB_EP_NI7_RXCSR(val)        bfin_write16(USB_EP_NI7_RXCSR, val)
-#define bfin_read_USB_EP_NI7_RXCOUNT()          bfin_read16(USB_EP_NI7_RXCOUNT)
-#define bfin_write_USB_EP_NI7_RXCOUNT(val)      bfin_write16(USB_EP_NI7_RXCOUNT, val)
-#define bfin_read_USB_EP_NI7_TXTYPE()           bfin_read16(USB_EP_NI7_TXTYPE)
-#define bfin_write_USB_EP_NI7_TXTYPE(val)       bfin_write16(USB_EP_NI7_TXTYPE, val)
-#define bfin_read_USB_EP_NI7_TXINTERVAL()       bfin_read16(USB_EP_NI7_TXINTERVAL)
-#define bfin_write_USB_EP_NI7_TXINTERVAL(val)   bfin_write16(USB_EP_NI7_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI7_RXTYPE()           bfin_read16(USB_EP_NI7_RXTYPE)
-#define bfin_write_USB_EP_NI7_RXTYPE(val)       bfin_write16(USB_EP_NI7_RXTYPE, val)
-#define bfin_read_USB_EP_NI7_RXINTERVAL()       bfin_read16(USB_EP_NI7_RXINTERVAL)
-#define bfin_write_USB_EP_NI7_RXINTERVAL(val)   bfin_write16(USB_EP_NI7_RXINTERVAL, val)
-#define bfin_read_USB_EP_NI7_TXCOUNT()          bfin_read16(USB_EP_NI7_TXCOUNT)
-#define bfin_write_USB_EP_NI7_TXCOUNT(val)      bfin_write16(USB_EP_NI7_TXCOUNT, val)
-#define bfin_read_USB_DMA_INTERRUPT()           bfin_read16(USB_DMA_INTERRUPT)
-#define bfin_write_USB_DMA_INTERRUPT(val)       bfin_write16(USB_DMA_INTERRUPT, val)
-/* USB Channel 0 Config Registers */
-#define bfin_read_USB_DMA0CONTROL()             bfin_read16(USB_DMA0CONTROL)
-#define bfin_write_USB_DMA0CONTROL(val)         bfin_write16(USB_DMA0CONTROL, val)
-#define bfin_read_USB_DMA0ADDRLOW()             bfin_read16(USB_DMA0ADDRLOW)
-#define bfin_write_USB_DMA0ADDRLOW(val)         bfin_write16(USB_DMA0ADDRLOW, val)
-#define bfin_read_USB_DMA0ADDRHIGH()            bfin_read16(USB_DMA0ADDRHIGH)
-#define bfin_write_USB_DMA0ADDRHIGH(val)        bfin_write16(USB_DMA0ADDRHIGH, val)
-#define bfin_read_USB_DMA0COUNTLOW()            bfin_read16(USB_DMA0COUNTLOW)
-#define bfin_write_USB_DMA0COUNTLOW(val)        bfin_write16(USB_DMA0COUNTLOW, val)
-#define bfin_read_USB_DMA0COUNTHIGH()           bfin_read16(USB_DMA0COUNTHIGH)
-#define bfin_write_USB_DMA0COUNTHIGH(val)       bfin_write16(USB_DMA0COUNTHIGH, val)
-/* USB Channel 1 Config Registers */
-#define bfin_read_USB_DMA1CONTROL()             bfin_read16(USB_DMA1CONTROL)
-#define bfin_write_USB_DMA1CONTROL(val)         bfin_write16(USB_DMA1CONTROL, val)
-#define bfin_read_USB_DMA1ADDRLOW()             bfin_read16(USB_DMA1ADDRLOW)
-#define bfin_write_USB_DMA1ADDRLOW(val)         bfin_write16(USB_DMA1ADDRLOW, val)
-#define bfin_read_USB_DMA1ADDRHIGH()            bfin_read16(USB_DMA1ADDRHIGH)
-#define bfin_write_USB_DMA1ADDRHIGH(val)        bfin_write16(USB_DMA1ADDRHIGH, val)
-#define bfin_read_USB_DMA1COUNTLOW()            bfin_read16(USB_DMA1COUNTLOW)
-#define bfin_write_USB_DMA1COUNTLOW(val)        bfin_write16(USB_DMA1COUNTLOW, val)
-#define bfin_read_USB_DMA1COUNTHIGH()           bfin_read16(USB_DMA1COUNTHIGH)
-#define bfin_write_USB_DMA1COUNTHIGH(val)       bfin_write16(USB_DMA1COUNTHIGH, val)
-/* USB Channel 2 Config Registers */
-#define bfin_read_USB_DMA2CONTROL()             bfin_read16(USB_DMA2CONTROL)
-#define bfin_write_USB_DMA2CONTROL(val)         bfin_write16(USB_DMA2CONTROL, val)
-#define bfin_read_USB_DMA2ADDRLOW()             bfin_read16(USB_DMA2ADDRLOW)
-#define bfin_write_USB_DMA2ADDRLOW(val)         bfin_write16(USB_DMA2ADDRLOW, val)
-#define bfin_read_USB_DMA2ADDRHIGH()            bfin_read16(USB_DMA2ADDRHIGH)
-#define bfin_write_USB_DMA2ADDRHIGH(val)        bfin_write16(USB_DMA2ADDRHIGH, val)
-#define bfin_read_USB_DMA2COUNTLOW()            bfin_read16(USB_DMA2COUNTLOW)
-#define bfin_write_USB_DMA2COUNTLOW(val)        bfin_write16(USB_DMA2COUNTLOW, val)
-#define bfin_read_USB_DMA2COUNTHIGH()           bfin_read16(USB_DMA2COUNTHIGH)
-#define bfin_write_USB_DMA2COUNTHIGH(val)       bfin_write16(USB_DMA2COUNTHIGH, val)
-/* USB Channel 3 Config Registers */
-#define bfin_read_USB_DMA3CONTROL()             bfin_read16(USB_DMA3CONTROL)
-#define bfin_write_USB_DMA3CONTROL(val)         bfin_write16(USB_DMA3CONTROL, val)
-#define bfin_read_USB_DMA3ADDRLOW()             bfin_read16(USB_DMA3ADDRLOW)
-#define bfin_write_USB_DMA3ADDRLOW(val)         bfin_write16(USB_DMA3ADDRLOW, val)
-#define bfin_read_USB_DMA3ADDRHIGH()            bfin_read16(USB_DMA3ADDRHIGH)
-#define bfin_write_USB_DMA3ADDRHIGH(val)        bfin_write16(USB_DMA3ADDRHIGH, val)
-#define bfin_read_USB_DMA3COUNTLOW()            bfin_read16(USB_DMA3COUNTLOW)
-#define bfin_write_USB_DMA3COUNTLOW(val)        bfin_write16(USB_DMA3COUNTLOW, val)
-#define bfin_read_USB_DMA3COUNTHIGH()           bfin_read16(USB_DMA3COUNTHIGH)
-#define bfin_write_USB_DMA3COUNTHIGH(val)       bfin_write16(USB_DMA3COUNTHIGH, val)
-/* USB Channel 4 Config Registers */
-#define bfin_read_USB_DMA4CONTROL()             bfin_read16(USB_DMA4CONTROL)
-#define bfin_write_USB_DMA4CONTROL(val)         bfin_write16(USB_DMA4CONTROL, val)
-#define bfin_read_USB_DMA4ADDRLOW()             bfin_read16(USB_DMA4ADDRLOW)
-#define bfin_write_USB_DMA4ADDRLOW(val)         bfin_write16(USB_DMA4ADDRLOW, val)
-#define bfin_read_USB_DMA4ADDRHIGH()            bfin_read16(USB_DMA4ADDRHIGH)
-#define bfin_write_USB_DMA4ADDRHIGH(val)        bfin_write16(USB_DMA4ADDRHIGH, val)
-#define bfin_read_USB_DMA4COUNTLOW()            bfin_read16(USB_DMA4COUNTLOW)
-#define bfin_write_USB_DMA4COUNTLOW(val)        bfin_write16(USB_DMA4COUNTLOW, val)
-#define bfin_read_USB_DMA4COUNTHIGH()           bfin_read16(USB_DMA4COUNTHIGH)
-#define bfin_write_USB_DMA4COUNTHIGH(val)       bfin_write16(USB_DMA4COUNTHIGH, val)
-/* USB Channel 5 Config Registers */
-#define bfin_read_USB_DMA5CONTROL()             bfin_read16(USB_DMA5CONTROL)
-#define bfin_write_USB_DMA5CONTROL(val)         bfin_write16(USB_DMA5CONTROL, val)
-#define bfin_read_USB_DMA5ADDRLOW()             bfin_read16(USB_DMA5ADDRLOW)
-#define bfin_write_USB_DMA5ADDRLOW(val)         bfin_write16(USB_DMA5ADDRLOW, val)
-#define bfin_read_USB_DMA5ADDRHIGH()            bfin_read16(USB_DMA5ADDRHIGH)
-#define bfin_write_USB_DMA5ADDRHIGH(val)        bfin_write16(USB_DMA5ADDRHIGH, val)
-#define bfin_read_USB_DMA5COUNTLOW()            bfin_read16(USB_DMA5COUNTLOW)
-#define bfin_write_USB_DMA5COUNTLOW(val)        bfin_write16(USB_DMA5COUNTLOW, val)
-#define bfin_read_USB_DMA5COUNTHIGH()           bfin_read16(USB_DMA5COUNTHIGH)
-#define bfin_write_USB_DMA5COUNTHIGH(val)       bfin_write16(USB_DMA5COUNTHIGH, val)
-/* USB Channel 6 Config Registers */
-#define bfin_read_USB_DMA6CONTROL()             bfin_read16(USB_DMA6CONTROL)
-#define bfin_write_USB_DMA6CONTROL(val)         bfin_write16(USB_DMA6CONTROL, val)
-#define bfin_read_USB_DMA6ADDRLOW()             bfin_read16(USB_DMA6ADDRLOW)
-#define bfin_write_USB_DMA6ADDRLOW(val)         bfin_write16(USB_DMA6ADDRLOW, val)
-#define bfin_read_USB_DMA6ADDRHIGH()            bfin_read16(USB_DMA6ADDRHIGH)
-#define bfin_write_USB_DMA6ADDRHIGH(val)        bfin_write16(USB_DMA6ADDRHIGH, val)
-#define bfin_read_USB_DMA6COUNTLOW()            bfin_read16(USB_DMA6COUNTLOW)
-#define bfin_write_USB_DMA6COUNTLOW(val)        bfin_write16(USB_DMA6COUNTLOW, val)
-#define bfin_read_USB_DMA6COUNTHIGH()           bfin_read16(USB_DMA6COUNTHIGH)
-#define bfin_write_USB_DMA6COUNTHIGH(val)       bfin_write16(USB_DMA6COUNTHIGH, val)
-/* USB Channel 7 Config Registers */
-#define bfin_read_USB_DMA7CONTROL()             bfin_read16(USB_DMA7CONTROL)
-#define bfin_write_USB_DMA7CONTROL(val)         bfin_write16(USB_DMA7CONTROL, val)
-#define bfin_read_USB_DMA7ADDRLOW()             bfin_read16(USB_DMA7ADDRLOW)
-#define bfin_write_USB_DMA7ADDRLOW(val)         bfin_write16(USB_DMA7ADDRLOW, val)
-#define bfin_read_USB_DMA7ADDRHIGH()            bfin_read16(USB_DMA7ADDRHIGH)
-#define bfin_write_USB_DMA7ADDRHIGH(val)        bfin_write16(USB_DMA7ADDRHIGH, val)
-#define bfin_read_USB_DMA7COUNTLOW()            bfin_read16(USB_DMA7COUNTLOW)
-#define bfin_write_USB_DMA7COUNTLOW(val)        bfin_write16(USB_DMA7COUNTLOW, val)
-#define bfin_read_USB_DMA7COUNTHIGH()           bfin_read16(USB_DMA7COUNTHIGH)
-#define bfin_write_USB_DMA7COUNTHIGH(val)       bfin_write16(USB_DMA7COUNTHIGH, val)
 #endif /* _CDEF_BF527_H */
diff --git a/arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h b/arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h
index 7014dde10dd6..12f2ad45314e 100644
--- a/arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h
+++ b/arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h
@@ -844,6 +844,7 @@
 #define bfin_write_PPI_CONTROL(val)             bfin_write16(PPI_CONTROL, val)
 #define bfin_read_PPI_STATUS()                  bfin_read16(PPI_STATUS)
 #define bfin_write_PPI_STATUS(val)              bfin_write16(PPI_STATUS, val)
+#define bfin_clear_PPI_STATUS()                 bfin_write_PPI_STATUS(0xFFFF)
 #define bfin_read_PPI_DELAY()                   bfin_read16(PPI_DELAY)
 #define bfin_write_PPI_DELAY(val)               bfin_write16(PPI_DELAY, val)
 #define bfin_read_PPI_COUNT()                   bfin_read16(PPI_COUNT)
@@ -1062,17 +1063,6 @@
 #define bfin_read_CNT_MIN()                     bfin_read32(CNT_MIN)
 #define bfin_write_CNT_MIN(val)                 bfin_write32(CNT_MIN, val)
-/* OTP/FUSE Registers */
-#define bfin_read_OTP_CONTROL()                 bfin_read16(OTP_CONTROL)
-#define bfin_write_OTP_CONTROL(val)             bfin_write16(OTP_CONTROL, val)
-#define bfin_read_OTP_BEN()                     bfin_read16(OTP_BEN)
-#define bfin_write_OTP_BEN(val)                 bfin_write16(OTP_BEN, val)
-#define bfin_read_OTP_STATUS()                  bfin_read16(OTP_STATUS)
-#define bfin_write_OTP_STATUS(val)              bfin_write16(OTP_STATUS, val)
-#define bfin_read_OTP_TIMING()                  bfin_read32(OTP_TIMING)
-#define bfin_write_OTP_TIMING(val)              bfin_write32(OTP_TIMING, val)
 /* Security Registers */
 #define bfin_read_SECURE_SYSSWT()               bfin_read32(SECURE_SYSSWT)
@@ -1082,17 +1072,6 @@
 #define bfin_read_SECURE_STATUS()               bfin_read16(SECURE_STATUS)
 #define bfin_write_SECURE_STATUS(val)           bfin_write16(SECURE_STATUS, val)
-/* OTP Read/Write Data Buffer Registers */
-#define bfin_read_OTP_DATA0()                   bfin_read32(OTP_DATA0)
-#define bfin_write_OTP_DATA0(val)               bfin_write32(OTP_DATA0, val)
-#define bfin_read_OTP_DATA1()                   bfin_read32(OTP_DATA1)
-#define bfin_write_OTP_DATA1(val)               bfin_write32(OTP_DATA1, val)
-#define bfin_read_OTP_DATA2()                   bfin_read32(OTP_DATA2)
-#define bfin_write_OTP_DATA2(val)               bfin_write32(OTP_DATA2, val)
-#define bfin_read_OTP_DATA3()                   bfin_read32(OTP_DATA3)
-#define bfin_write_OTP_DATA3(val)               bfin_write32(OTP_DATA3, val)
 /* NFC Registers */
 #define bfin_read_NFC_CTL()                     bfin_read16(NFC_CTL)
diff --git a/arch/blackfin/mach-bf527/include/mach/defBF525.h b/arch/blackfin/mach-bf527/include/mach/defBF525.h
index 82abefc1ef6c..c136f7032962 100644
--- a/arch/blackfin/mach-bf527/include/mach/defBF525.h
+++ b/arch/blackfin/mach-bf527/include/mach/defBF525.h
@@ -7,15 +7,8 @@
 #ifndef _DEF_BF525_H
 #define _DEF_BF525_H
-/* Include all Core registers and bit definitions */
+/* BF525 is BF522 + USB */
-#include <asm/def_LPBlackfin.h>
+#include "defBF522.h"
-/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF525 */
-/* Include defBF52x_base.h for the set of #defines that are common to all ADSP-BF52x processors */
-#include "defBF52x_base.h"
-/* The following are the #defines needed by ADSP-BF525 that are not in the common header */
 /* USB Control Registers */
diff --git a/arch/blackfin/mach-bf527/include/mach/defBF527.h b/arch/blackfin/mach-bf527/include/mach/defBF527.h
index 570a125df025..4dd58fb33156 100644
--- a/arch/blackfin/mach-bf527/include/mach/defBF527.h
+++ b/arch/blackfin/mach-bf527/include/mach/defBF527.h
@@ -7,15 +7,9 @@
 #ifndef _DEF_BF527_H
 #define _DEF_BF527_H
-/* Include all Core registers and bit definitions */
+/* BF527 is BF525 + EMAC */
-#include <asm/def_LPBlackfin.h>
+#include "defBF525.h"
-/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF527 */
-/* Include defBF52x_base.h for the set of #defines that are common to all ADSP-BF52x processors */
-#include "defBF52x_base.h"
-/* The following are the #defines needed by ADSP-BF527 that are not in the common header */
 /* 10/100 Ethernet Controller   (0xFFC03000 - 0xFFC031FF) */
 #define EMAC_OPMODE             0xFFC03000       /* Operating Mode Register                              */
@@ -394,673 +388,4 @@
 #define TX_GE1024_CNT     0x00200000    /* 1024-Max-Byte TX Frames Sent                           */
 #define TX_ABORT_CNT      0x00400000    /* TX Frames Aborted                                      */
-/* USB Control Registers */
-#define                        USB_FADDR  0xffc03800   /* Function address register */
-#define                        USB_POWER  0xffc03804   /* Power management register */
-#define                       USB_INTRTX  0xffc03808   /* Interrupt register for endpoint 0 and Tx endpoint 1 to 7 */
-#define                       USB_INTRRX  0xffc0380c   /* Interrupt register for Rx endpoints 1 to 7 */
-#define                      USB_INTRTXE  0xffc03810   /* Interrupt enable register for IntrTx */
-#define                      USB_INTRRXE  0xffc03814   /* Interrupt enable register for IntrRx */
-#define                      USB_INTRUSB  0xffc03818   /* Interrupt register for common USB interrupts */
-#define                     USB_INTRUSBE  0xffc0381c   /* Interrupt enable register for IntrUSB */
-#define                        USB_FRAME  0xffc03820   /* USB frame number */
-#define                        USB_INDEX  0xffc03824   /* Index register for selecting the indexed endpoint registers */
-#define                     USB_TESTMODE  0xffc03828   /* Enabled USB 20 test modes */
-#define                     USB_GLOBINTR  0xffc0382c   /* Global Interrupt Mask register and Wakeup Exception Interrupt */
-#define                   USB_GLOBAL_CTL  0xffc03830   /* Global Clock Control for the core */
-/* USB Packet Control Registers */
-#define                USB_TX_MAX_PACKET  0xffc03840   /* Maximum packet size for Host Tx endpoint */
-#define                         USB_CSR0  0xffc03844   /* Control Status register for endpoint 0 and Control Status register for Host Tx endpoint */
-#define                        USB_TXCSR  0xffc03844   /* Control Status register for endpoint 0 and Control Status register for Host Tx endpoint */
-#define                USB_RX_MAX_PACKET  0xffc03848   /* Maximum packet size for Host Rx endpoint */
-#define                        USB_RXCSR  0xffc0384c   /* Control Status register for Host Rx endpoint */
-#define                       USB_COUNT0  0xffc03850   /* Number of bytes received in endpoint 0 FIFO and Number of bytes received in Host Tx endpoint */
-#define                      USB_RXCOUNT  0xffc03850   /* Number of bytes received in endpoint 0 FIFO and Number of bytes received in Host Tx endpoint */
-#define                       USB_TXTYPE  0xffc03854   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint */
-#define                    USB_NAKLIMIT0  0xffc03858   /* Sets the NAK response timeout on Endpoint 0 and on Bulk transfers for Host Tx endpoint */
-#define                   USB_TXINTERVAL  0xffc03858   /* Sets the NAK response timeout on Endpoint 0 and on Bulk transfers for Host Tx endpoint */
-#define                       USB_RXTYPE  0xffc0385c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint */
-#define                   USB_RXINTERVAL  0xffc03860   /* Sets the polling interval for Interrupt and Isochronous transfers or the NAK response timeout on Bulk transfers */
-#define                      USB_TXCOUNT  0xffc03868   /* Number of bytes to be written to the selected endpoint Tx FIFO */
-/* USB Endpoint FIFO Registers */
-#define                     USB_EP0_FIFO  0xffc03880   /* Endpoint 0 FIFO */
-#define                     USB_EP1_FIFO  0xffc03888   /* Endpoint 1 FIFO */
-#define                     USB_EP2_FIFO  0xffc03890   /* Endpoint 2 FIFO */
-#define                     USB_EP3_FIFO  0xffc03898   /* Endpoint 3 FIFO */
-#define                     USB_EP4_FIFO  0xffc038a0   /* Endpoint 4 FIFO */
-#define                     USB_EP5_FIFO  0xffc038a8   /* Endpoint 5 FIFO */
-#define                     USB_EP6_FIFO  0xffc038b0   /* Endpoint 6 FIFO */
-#define                     USB_EP7_FIFO  0xffc038b8   /* Endpoint 7 FIFO */
-/* USB OTG Control Registers */
-#define                  USB_OTG_DEV_CTL  0xffc03900   /* OTG Device Control Register */
-#define                 USB_OTG_VBUS_IRQ  0xffc03904   /* OTG VBUS Control Interrupts */
-#define                USB_OTG_VBUS_MASK  0xffc03908   /* VBUS Control Interrupt Enable */
-/* USB Phy Control Registers */
-#define                     USB_LINKINFO  0xffc03948   /* Enables programming of some PHY-side delays */
-#define                        USB_VPLEN  0xffc0394c   /* Determines duration of VBUS pulse for VBUS charging */
-#define                      USB_HS_EOF1  0xffc03950   /* Time buffer for High-Speed transactions */
-#define                      USB_FS_EOF1  0xffc03954   /* Time buffer for Full-Speed transactions */
-#define                      USB_LS_EOF1  0xffc03958   /* Time buffer for Low-Speed transactions */
-/* (APHY_CNTRL is for ADI usage only) */
-#define                   USB_APHY_CNTRL  0xffc039e0   /* Register that increases visibility of Analog PHY */
-/* (APHY_CALIB is for ADI usage only) */
-#define                   USB_APHY_CALIB  0xffc039e4   /* Register used to set some calibration values */
-#define                  USB_APHY_CNTRL2  0xffc039e8   /* Register used to prevent re-enumeration once Moab goes into hibernate mode */
-/* (PHY_TEST is for ADI usage only) */
-#define                     USB_PHY_TEST  0xffc039ec   /* Used for reducing simulation time and simplifies FIFO testability */
-#define                  USB_PLLOSC_CTRL  0xffc039f0   /* Used to program different parameters for USB PLL and Oscillator */
-#define                   USB_SRP_CLKDIV  0xffc039f4   /* Used to program clock divide value for the clock fed to the SRP detection logic */
-/* USB Endpoint 0 Control Registers */
-#define                USB_EP_NI0_TXMAXP  0xffc03a00   /* Maximum packet size for Host Tx endpoint0 */
-#define                 USB_EP_NI0_TXCSR  0xffc03a04   /* Control Status register for endpoint 0 */
-#define                USB_EP_NI0_RXMAXP  0xffc03a08   /* Maximum packet size for Host Rx endpoint0 */
-#define                 USB_EP_NI0_RXCSR  0xffc03a0c   /* Control Status register for Host Rx endpoint0 */
-#define               USB_EP_NI0_RXCOUNT  0xffc03a10   /* Number of bytes received in endpoint 0 FIFO */
-#define                USB_EP_NI0_TXTYPE  0xffc03a14   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint0 */
-#define            USB_EP_NI0_TXINTERVAL  0xffc03a18   /* Sets the NAK response timeout on Endpoint 0 */
-#define                USB_EP_NI0_RXTYPE  0xffc03a1c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint0 */
-#define            USB_EP_NI0_RXINTERVAL  0xffc03a20   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint0 */
-#define               USB_EP_NI0_TXCOUNT  0xffc03a28   /* Number of bytes to be written to the endpoint0 Tx FIFO */
-/* USB Endpoint 1 Control Registers */
-#define                USB_EP_NI1_TXMAXP  0xffc03a40   /* Maximum packet size for Host Tx endpoint1 */
-#define                 USB_EP_NI1_TXCSR  0xffc03a44   /* Control Status register for endpoint1 */
-#define                USB_EP_NI1_RXMAXP  0xffc03a48   /* Maximum packet size for Host Rx endpoint1 */
-#define                 USB_EP_NI1_RXCSR  0xffc03a4c   /* Control Status register for Host Rx endpoint1 */
-#define               USB_EP_NI1_RXCOUNT  0xffc03a50   /* Number of bytes received in endpoint1 FIFO */
-#define                USB_EP_NI1_TXTYPE  0xffc03a54   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint1 */
-#define            USB_EP_NI1_TXINTERVAL  0xffc03a58   /* Sets the NAK response timeout on Endpoint1 */
-#define                USB_EP_NI1_RXTYPE  0xffc03a5c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint1 */
-#define            USB_EP_NI1_RXINTERVAL  0xffc03a60   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint1 */
-#define               USB_EP_NI1_TXCOUNT  0xffc03a68   /* Number of bytes to be written to the+H102 endpoint1 Tx FIFO */
-/* USB Endpoint 2 Control Registers */
-#define                USB_EP_NI2_TXMAXP  0xffc03a80   /* Maximum packet size for Host Tx endpoint2 */
-#define                 USB_EP_NI2_TXCSR  0xffc03a84   /* Control Status register for endpoint2 */
-#define                USB_EP_NI2_RXMAXP  0xffc03a88   /* Maximum packet size for Host Rx endpoint2 */
-#define                 USB_EP_NI2_RXCSR  0xffc03a8c   /* Control Status register for Host Rx endpoint2 */
-#define               USB_EP_NI2_RXCOUNT  0xffc03a90   /* Number of bytes received in endpoint2 FIFO */
-#define                USB_EP_NI2_TXTYPE  0xffc03a94   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint2 */
-#define            USB_EP_NI2_TXINTERVAL  0xffc03a98   /* Sets the NAK response timeout on Endpoint2 */
-#define                USB_EP_NI2_RXTYPE  0xffc03a9c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint2 */
-#define            USB_EP_NI2_RXINTERVAL  0xffc03aa0   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint2 */
-#define               USB_EP_NI2_TXCOUNT  0xffc03aa8   /* Number of bytes to be written to the endpoint2 Tx FIFO */
-/* USB Endpoint 3 Control Registers */
-#define                USB_EP_NI3_TXMAXP  0xffc03ac0   /* Maximum packet size for Host Tx endpoint3 */
-#define                 USB_EP_NI3_TXCSR  0xffc03ac4   /* Control Status register for endpoint3 */
-#define                USB_EP_NI3_RXMAXP  0xffc03ac8   /* Maximum packet size for Host Rx endpoint3 */
-#define                 USB_EP_NI3_RXCSR  0xffc03acc   /* Control Status register for Host Rx endpoint3 */
-#define               USB_EP_NI3_RXCOUNT  0xffc03ad0   /* Number of bytes received in endpoint3 FIFO */
-#define                USB_EP_NI3_TXTYPE  0xffc03ad4   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint3 */
-#define            USB_EP_NI3_TXINTERVAL  0xffc03ad8   /* Sets the NAK response timeout on Endpoint3 */
-#define                USB_EP_NI3_RXTYPE  0xffc03adc   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint3 */
-#define            USB_EP_NI3_RXINTERVAL  0xffc03ae0   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint3 */
-#define               USB_EP_NI3_TXCOUNT  0xffc03ae8   /* Number of bytes to be written to the H124endpoint3 Tx FIFO */
-/* USB Endpoint 4 Control Registers */
-#define                USB_EP_NI4_TXMAXP  0xffc03b00   /* Maximum packet size for Host Tx endpoint4 */
-#define                 USB_EP_NI4_TXCSR  0xffc03b04   /* Control Status register for endpoint4 */
-#define                USB_EP_NI4_RXMAXP  0xffc03b08   /* Maximum packet size for Host Rx endpoint4 */
-#define                 USB_EP_NI4_RXCSR  0xffc03b0c   /* Control Status register for Host Rx endpoint4 */
-#define               USB_EP_NI4_RXCOUNT  0xffc03b10   /* Number of bytes received in endpoint4 FIFO */
-#define                USB_EP_NI4_TXTYPE  0xffc03b14   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint4 */
-#define            USB_EP_NI4_TXINTERVAL  0xffc03b18   /* Sets the NAK response timeout on Endpoint4 */
-#define                USB_EP_NI4_RXTYPE  0xffc03b1c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint4 */
-#define            USB_EP_NI4_RXINTERVAL  0xffc03b20   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint4 */
-#define               USB_EP_NI4_TXCOUNT  0xffc03b28   /* Number of bytes to be written to the endpoint4 Tx FIFO */
-/* USB Endpoint 5 Control Registers */
-#define                USB_EP_NI5_TXMAXP  0xffc03b40   /* Maximum packet size for Host Tx endpoint5 */
-#define                 USB_EP_NI5_TXCSR  0xffc03b44   /* Control Status register for endpoint5 */
-#define                USB_EP_NI5_RXMAXP  0xffc03b48   /* Maximum packet size for Host Rx endpoint5 */
-#define                 USB_EP_NI5_RXCSR  0xffc03b4c   /* Control Status register for Host Rx endpoint5 */
-#define               USB_EP_NI5_RXCOUNT  0xffc03b50   /* Number of bytes received in endpoint5 FIFO */
-#define                USB_EP_NI5_TXTYPE  0xffc03b54   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint5 */
-#define            USB_EP_NI5_TXINTERVAL  0xffc03b58   /* Sets the NAK response timeout on Endpoint5 */
-#define                USB_EP_NI5_RXTYPE  0xffc03b5c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint5 */
-#define            USB_EP_NI5_RXINTERVAL  0xffc03b60   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint5 */
-#define               USB_EP_NI5_TXCOUNT  0xffc03b68   /* Number of bytes to be written to the endpoint5 Tx FIFO */
-/* USB Endpoint 6 Control Registers */
-#define                USB_EP_NI6_TXMAXP  0xffc03b80   /* Maximum packet size for Host Tx endpoint6 */
-#define                 USB_EP_NI6_TXCSR  0xffc03b84   /* Control Status register for endpoint6 */
-#define                USB_EP_NI6_RXMAXP  0xffc03b88   /* Maximum packet size for Host Rx endpoint6 */
-#define                 USB_EP_NI6_RXCSR  0xffc03b8c   /* Control Status register for Host Rx endpoint6 */
-#define               USB_EP_NI6_RXCOUNT  0xffc03b90   /* Number of bytes received in endpoint6 FIFO */
-#define                USB_EP_NI6_TXTYPE  0xffc03b94   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint6 */
-#define            USB_EP_NI6_TXINTERVAL  0xffc03b98   /* Sets the NAK response timeout on Endpoint6 */
-#define                USB_EP_NI6_RXTYPE  0xffc03b9c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint6 */
-#define            USB_EP_NI6_RXINTERVAL  0xffc03ba0   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint6 */
-#define               USB_EP_NI6_TXCOUNT  0xffc03ba8   /* Number of bytes to be written to the endpoint6 Tx FIFO */
-/* USB Endpoint 7 Control Registers */
-#define                USB_EP_NI7_TXMAXP  0xffc03bc0   /* Maximum packet size for Host Tx endpoint7 */
-#define                 USB_EP_NI7_TXCSR  0xffc03bc4   /* Control Status register for endpoint7 */
-#define                USB_EP_NI7_RXMAXP  0xffc03bc8   /* Maximum packet size for Host Rx endpoint7 */
-#define                 USB_EP_NI7_RXCSR  0xffc03bcc   /* Control Status register for Host Rx endpoint7 */
-#define               USB_EP_NI7_RXCOUNT  0xffc03bd0   /* Number of bytes received in endpoint7 FIFO */
-#define                USB_EP_NI7_TXTYPE  0xffc03bd4   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint7 */
-#define            USB_EP_NI7_TXINTERVAL  0xffc03bd8   /* Sets the NAK response timeout on Endpoint7 */
-#define                USB_EP_NI7_RXTYPE  0xffc03bdc   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint7 */
-#define            USB_EP_NI7_RXINTERVAL  0xffc03bf0   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint7 */
-#define               USB_EP_NI7_TXCOUNT  0xffc03bf8   /* Number of bytes to be written to the endpoint7 Tx FIFO */
-#define                USB_DMA_INTERRUPT  0xffc03c00   /* Indicates pending interrupts for the DMA channels */
-/* USB Channel 0 Config Registers */
-#define                  USB_DMA0CONTROL  0xffc03c04   /* DMA master channel 0 configuration */
-#define                  USB_DMA0ADDRLOW  0xffc03c08   /* Lower 16-bits of memory source/destination address for DMA master channel 0 */
-#define                 USB_DMA0ADDRHIGH  0xffc03c0c   /* Upper 16-bits of memory source/destination address for DMA master channel 0 */
-#define                 USB_DMA0COUNTLOW  0xffc03c10   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 0 */
-#define                USB_DMA0COUNTHIGH  0xffc03c14   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 0 */
-/* USB Channel 1 Config Registers */
-#define                  USB_DMA1CONTROL  0xffc03c24   /* DMA master channel 1 configuration */
-#define                  USB_DMA1ADDRLOW  0xffc03c28   /* Lower 16-bits of memory source/destination address for DMA master channel 1 */
-#define                 USB_DMA1ADDRHIGH  0xffc03c2c   /* Upper 16-bits of memory source/destination address for DMA master channel 1 */
-#define                 USB_DMA1COUNTLOW  0xffc03c30   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 1 */
-#define                USB_DMA1COUNTHIGH  0xffc03c34   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 1 */
-/* USB Channel 2 Config Registers */
-#define                  USB_DMA2CONTROL  0xffc03c44   /* DMA master channel 2 configuration */
-#define                  USB_DMA2ADDRLOW  0xffc03c48   /* Lower 16-bits of memory source/destination address for DMA master channel 2 */
-#define                 USB_DMA2ADDRHIGH  0xffc03c4c   /* Upper 16-bits of memory source/destination address for DMA master channel 2 */
-#define                 USB_DMA2COUNTLOW  0xffc03c50   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 2 */
-#define                USB_DMA2COUNTHIGH  0xffc03c54   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 2 */
-/* USB Channel 3 Config Registers */
-#define                  USB_DMA3CONTROL  0xffc03c64   /* DMA master channel 3 configuration */
-#define                  USB_DMA3ADDRLOW  0xffc03c68   /* Lower 16-bits of memory source/destination address for DMA master channel 3 */
-#define                 USB_DMA3ADDRHIGH  0xffc03c6c   /* Upper 16-bits of memory source/destination address for DMA master channel 3 */
-#define                 USB_DMA3COUNTLOW  0xffc03c70   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 3 */
-#define                USB_DMA3COUNTHIGH  0xffc03c74   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 3 */
-/* USB Channel 4 Config Registers */
-#define                  USB_DMA4CONTROL  0xffc03c84   /* DMA master channel 4 configuration */
-#define                  USB_DMA4ADDRLOW  0xffc03c88   /* Lower 16-bits of memory source/destination address for DMA master channel 4 */
-#define                 USB_DMA4ADDRHIGH  0xffc03c8c   /* Upper 16-bits of memory source/destination address for DMA master channel 4 */
-#define                 USB_DMA4COUNTLOW  0xffc03c90   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 4 */
-#define                USB_DMA4COUNTHIGH  0xffc03c94   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 4 */
-/* USB Channel 5 Config Registers */
-#define                  USB_DMA5CONTROL  0xffc03ca4   /* DMA master channel 5 configuration */
-#define                  USB_DMA5ADDRLOW  0xffc03ca8   /* Lower 16-bits of memory source/destination address for DMA master channel 5 */
-#define                 USB_DMA5ADDRHIGH  0xffc03cac   /* Upper 16-bits of memory source/destination address for DMA master channel 5 */
-#define                 USB_DMA5COUNTLOW  0xffc03cb0   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 5 */
-#define                USB_DMA5COUNTHIGH  0xffc03cb4   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 5 */
-/* USB Channel 6 Config Registers */
-#define                  USB_DMA6CONTROL  0xffc03cc4   /* DMA master channel 6 configuration */
-#define                  USB_DMA6ADDRLOW  0xffc03cc8   /* Lower 16-bits of memory source/destination address for DMA master channel 6 */
-#define                 USB_DMA6ADDRHIGH  0xffc03ccc   /* Upper 16-bits of memory source/destination address for DMA master channel 6 */
-#define                 USB_DMA6COUNTLOW  0xffc03cd0   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 6 */
-#define                USB_DMA6COUNTHIGH  0xffc03cd4   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 6 */
-/* USB Channel 7 Config Registers */
-#define                  USB_DMA7CONTROL  0xffc03ce4   /* DMA master channel 7 configuration */
-#define                  USB_DMA7ADDRLOW  0xffc03ce8   /* Lower 16-bits of memory source/destination address for DMA master channel 7 */
-#define                 USB_DMA7ADDRHIGH  0xffc03cec   /* Upper 16-bits of memory source/destination address for DMA master channel 7 */
-#define                 USB_DMA7COUNTLOW  0xffc03cf0   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 7 */
-#define                USB_DMA7COUNTHIGH  0xffc03cf4   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 7 */
-/* Bit masks for USB_FADDR */
-#define          FUNCTION_ADDRESS  0x7f       /* Function address */
-/* Bit masks for USB_POWER */
-#define           ENABLE_SUSPENDM  0x1        /* enable SuspendM output */
-#define          nENABLE_SUSPENDM  0x0       
-#define              SUSPEND_MODE  0x2        /* Suspend Mode indicator */
-#define             nSUSPEND_MODE  0x0       
-#define               RESUME_MODE  0x4        /* DMA Mode */
-#define              nRESUME_MODE  0x0       
-#define                     RESET  0x8        /* Reset indicator */
-#define                    nRESET  0x0       
-#define                   HS_MODE  0x10       /* High Speed mode indicator */
-#define                  nHS_MODE  0x0       
-#define                 HS_ENABLE  0x20       /* high Speed Enable */
-#define                nHS_ENABLE  0x0       
-#define                 SOFT_CONN  0x40       /* Soft connect */
-#define                nSOFT_CONN  0x0       
-#define                ISO_UPDATE  0x80       /* Isochronous update */
-#define               nISO_UPDATE  0x0       
-/* Bit masks for USB_INTRTX */
-#define                    EP0_TX  0x1        /* Tx Endpoint 0 interrupt */
-#define                   nEP0_TX  0x0       
-#define                    EP1_TX  0x2        /* Tx Endpoint 1 interrupt */
-#define                   nEP1_TX  0x0       
-#define                    EP2_TX  0x4        /* Tx Endpoint 2 interrupt */
-#define                   nEP2_TX  0x0       
-#define                    EP3_TX  0x8        /* Tx Endpoint 3 interrupt */
-#define                   nEP3_TX  0x0       
-#define                    EP4_TX  0x10       /* Tx Endpoint 4 interrupt */
-#define                   nEP4_TX  0x0       
-#define                    EP5_TX  0x20       /* Tx Endpoint 5 interrupt */
-#define                   nEP5_TX  0x0       
-#define                    EP6_TX  0x40       /* Tx Endpoint 6 interrupt */
-#define                   nEP6_TX  0x0       
-#define                    EP7_TX  0x80       /* Tx Endpoint 7 interrupt */
-#define                   nEP7_TX  0x0       
-/* Bit masks for USB_INTRRX */
-#define                    EP1_RX  0x2        /* Rx Endpoint 1 interrupt */
-#define                   nEP1_RX  0x0       
-#define                    EP2_RX  0x4        /* Rx Endpoint 2 interrupt */
-#define                   nEP2_RX  0x0       
-#define                    EP3_RX  0x8        /* Rx Endpoint 3 interrupt */
-#define                   nEP3_RX  0x0       
-#define                    EP4_RX  0x10       /* Rx Endpoint 4 interrupt */
-#define                   nEP4_RX  0x0       
-#define                    EP5_RX  0x20       /* Rx Endpoint 5 interrupt */
-#define                   nEP5_RX  0x0       
-#define                    EP6_RX  0x40       /* Rx Endpoint 6 interrupt */
-#define                   nEP6_RX  0x0       
-#define                    EP7_RX  0x80       /* Rx Endpoint 7 interrupt */
-#define                   nEP7_RX  0x0       
-/* Bit masks for USB_INTRTXE */
-#define                  EP0_TX_E  0x1        /* Endpoint 0 interrupt Enable */
-#define                 nEP0_TX_E  0x0       
-#define                  EP1_TX_E  0x2        /* Tx Endpoint 1 interrupt  Enable */
-#define                 nEP1_TX_E  0x0       
-#define                  EP2_TX_E  0x4        /* Tx Endpoint 2 interrupt  Enable */
-#define                 nEP2_TX_E  0x0       
-#define                  EP3_TX_E  0x8        /* Tx Endpoint 3 interrupt  Enable */
-#define                 nEP3_TX_E  0x0       
-#define                  EP4_TX_E  0x10       /* Tx Endpoint 4 interrupt  Enable */
-#define                 nEP4_TX_E  0x0       
-#define                  EP5_TX_E  0x20       /* Tx Endpoint 5 interrupt  Enable */
-#define                 nEP5_TX_E  0x0       
-#define                  EP6_TX_E  0x40       /* Tx Endpoint 6 interrupt  Enable */
-#define                 nEP6_TX_E  0x0       
-#define                  EP7_TX_E  0x80       /* Tx Endpoint 7 interrupt  Enable */
-#define                 nEP7_TX_E  0x0       
-/* Bit masks for USB_INTRRXE */
-#define                  EP1_RX_E  0x2        /* Rx Endpoint 1 interrupt  Enable */
-#define                 nEP1_RX_E  0x0       
-#define                  EP2_RX_E  0x4        /* Rx Endpoint 2 interrupt  Enable */
-#define                 nEP2_RX_E  0x0       
-#define                  EP3_RX_E  0x8        /* Rx Endpoint 3 interrupt  Enable */
-#define                 nEP3_RX_E  0x0       
-#define                  EP4_RX_E  0x10       /* Rx Endpoint 4 interrupt  Enable */
-#define                 nEP4_RX_E  0x0       
-#define                  EP5_RX_E  0x20       /* Rx Endpoint 5 interrupt  Enable */
-#define                 nEP5_RX_E  0x0       
-#define                  EP6_RX_E  0x40       /* Rx Endpoint 6 interrupt  Enable */
-#define                 nEP6_RX_E  0x0       
-#define                  EP7_RX_E  0x80       /* Rx Endpoint 7 interrupt  Enable */
-#define                 nEP7_RX_E  0x0       
-/* Bit masks for USB_INTRUSB */
-#define                 SUSPEND_B  0x1        /* Suspend indicator */
-#define                nSUSPEND_B  0x0       
-#define                  RESUME_B  0x2        /* Resume indicator */
-#define                 nRESUME_B  0x0       
-#define          RESET_OR_BABLE_B  0x4        /* Reset/babble indicator */
-#define         nRESET_OR_BABLE_B  0x0       
-#define                     SOF_B  0x8        /* Start of frame */
-#define                    nSOF_B  0x0       
-#define                    CONN_B  0x10       /* Connection indicator */
-#define                   nCONN_B  0x0       
-#define                  DISCON_B  0x20       /* Disconnect indicator */
-#define                 nDISCON_B  0x0       
-#define             SESSION_REQ_B  0x40       /* Session Request */
-#define            nSESSION_REQ_B  0x0       
-#define              VBUS_ERROR_B  0x80       /* Vbus threshold indicator */
-#define             nVBUS_ERROR_B  0x0       
-/* Bit masks for USB_INTRUSBE */
-#define                SUSPEND_BE  0x1        /* Suspend indicator int enable */
-#define               nSUSPEND_BE  0x0       
-#define                 RESUME_BE  0x2        /* Resume indicator int enable */
-#define                nRESUME_BE  0x0       
-#define         RESET_OR_BABLE_BE  0x4        /* Reset/babble indicator int enable */
-#define        nRESET_OR_BABLE_BE  0x0       
-#define                    SOF_BE  0x8        /* Start of frame int enable */
-#define                   nSOF_BE  0x0       
-#define                   CONN_BE  0x10       /* Connection indicator int enable */
-#define                  nCONN_BE  0x0       
-#define                 DISCON_BE  0x20       /* Disconnect indicator int enable */
-#define                nDISCON_BE  0x0       
-#define            SESSION_REQ_BE  0x40       /* Session Request int enable */
-#define           nSESSION_REQ_BE  0x0       
-#define             VBUS_ERROR_BE  0x80       /* Vbus threshold indicator int enable */
-#define            nVBUS_ERROR_BE  0x0       
-/* Bit masks for USB_FRAME */
-#define              FRAME_NUMBER  0x7ff      /* Frame number */
-/* Bit masks for USB_INDEX */
-#define         SELECTED_ENDPOINT  0xf        /* selected endpoint */
-/* Bit masks for USB_GLOBAL_CTL */
-#define                GLOBAL_ENA  0x1        /* enables USB module */
-#define               nGLOBAL_ENA  0x0       
-#define                EP1_TX_ENA  0x2        /* Transmit endpoint 1 enable */
-#define               nEP1_TX_ENA  0x0       
-#define                EP2_TX_ENA  0x4        /* Transmit endpoint 2 enable */
-#define               nEP2_TX_ENA  0x0       
-#define                EP3_TX_ENA  0x8        /* Transmit endpoint 3 enable */
-#define               nEP3_TX_ENA  0x0       
-#define                EP4_TX_ENA  0x10       /* Transmit endpoint 4 enable */
-#define               nEP4_TX_ENA  0x0       
-#define                EP5_TX_ENA  0x20       /* Transmit endpoint 5 enable */
-#define               nEP5_TX_ENA  0x0       
-#define                EP6_TX_ENA  0x40       /* Transmit endpoint 6 enable */
-#define               nEP6_TX_ENA  0x0       
-#define                EP7_TX_ENA  0x80       /* Transmit endpoint 7 enable */
-#define               nEP7_TX_ENA  0x0       
-#define                EP1_RX_ENA  0x100      /* Receive endpoint 1 enable */
-#define               nEP1_RX_ENA  0x0       
-#define                EP2_RX_ENA  0x200      /* Receive endpoint 2 enable */
-#define               nEP2_RX_ENA  0x0       
-#define                EP3_RX_ENA  0x400      /* Receive endpoint 3 enable */
-#define               nEP3_RX_ENA  0x0       
-#define                EP4_RX_ENA  0x800      /* Receive endpoint 4 enable */
-#define               nEP4_RX_ENA  0x0       
-#define                EP5_RX_ENA  0x1000     /* Receive endpoint 5 enable */
-#define               nEP5_RX_ENA  0x0       
-#define                EP6_RX_ENA  0x2000     /* Receive endpoint 6 enable */
-#define               nEP6_RX_ENA  0x0       
-#define                EP7_RX_ENA  0x4000     /* Receive endpoint 7 enable */
-#define               nEP7_RX_ENA  0x0       
-/* Bit masks for USB_OTG_DEV_CTL */
-#define                   SESSION  0x1        /* session indicator */
-#define                  nSESSION  0x0       
-#define                  HOST_REQ  0x2        /* Host negotiation request */
-#define                 nHOST_REQ  0x0       
-#define                 HOST_MODE  0x4        /* indicates USBDRC is a host */
-#define                nHOST_MODE  0x0       
-#define                     VBUS0  0x8        /* Vbus level indicator[0] */
-#define                    nVBUS0  0x0       
-#define                     VBUS1  0x10       /* Vbus level indicator[1] */
-#define                    nVBUS1  0x0       
-#define                     LSDEV  0x20       /* Low-speed indicator */
-#define                    nLSDEV  0x0       
-#define                     FSDEV  0x40       /* Full or High-speed indicator */
-#define                    nFSDEV  0x0       
-#define                  B_DEVICE  0x80       /* A' or 'B' device indicator */
-#define                 nB_DEVICE  0x0       
-/* Bit masks for USB_OTG_VBUS_IRQ */
-#define             DRIVE_VBUS_ON  0x1        /* indicator to drive VBUS control circuit */
-#define            nDRIVE_VBUS_ON  0x0       
-#define            DRIVE_VBUS_OFF  0x2        /* indicator to shut off charge pump */
-#define           nDRIVE_VBUS_OFF  0x0       
-#define           CHRG_VBUS_START  0x4        /* indicator for external circuit to start charging VBUS */
-#define          nCHRG_VBUS_START  0x0       
-#define             CHRG_VBUS_END  0x8        /* indicator for external circuit to end charging VBUS */
-#define            nCHRG_VBUS_END  0x0       
-#define        DISCHRG_VBUS_START  0x10       /* indicator to start discharging VBUS */
-#define       nDISCHRG_VBUS_START  0x0       
-#define          DISCHRG_VBUS_END  0x20       /* indicator to stop discharging VBUS */
-#define         nDISCHRG_VBUS_END  0x0       
-/* Bit masks for USB_OTG_VBUS_MASK */
-#define         DRIVE_VBUS_ON_ENA  0x1        /* enable DRIVE_VBUS_ON interrupt */
-#define        nDRIVE_VBUS_ON_ENA  0x0       
-#define        DRIVE_VBUS_OFF_ENA  0x2        /* enable DRIVE_VBUS_OFF interrupt */
-#define       nDRIVE_VBUS_OFF_ENA  0x0       
-#define       CHRG_VBUS_START_ENA  0x4        /* enable CHRG_VBUS_START interrupt */
-#define      nCHRG_VBUS_START_ENA  0x0       
-#define         CHRG_VBUS_END_ENA  0x8        /* enable CHRG_VBUS_END interrupt */
-#define        nCHRG_VBUS_END_ENA  0x0       
-#define    DISCHRG_VBUS_START_ENA  0x10       /* enable DISCHRG_VBUS_START interrupt */
-#define   nDISCHRG_VBUS_START_ENA  0x0       
-#define      DISCHRG_VBUS_END_ENA  0x20       /* enable DISCHRG_VBUS_END interrupt */
-#define     nDISCHRG_VBUS_END_ENA  0x0       
-/* Bit masks for USB_CSR0 */
-#define                  RXPKTRDY  0x1        /* data packet receive indicator */
-#define                 nRXPKTRDY  0x0       
-#define                  TXPKTRDY  0x2        /* data packet in FIFO indicator */
-#define                 nTXPKTRDY  0x0       
-#define                STALL_SENT  0x4        /* STALL handshake sent */
-#define               nSTALL_SENT  0x0       
-#define                   DATAEND  0x8        /* Data end indicator */
-#define                  nDATAEND  0x0       
-#define                  SETUPEND  0x10       /* Setup end */
-#define                 nSETUPEND  0x0       
-#define                 SENDSTALL  0x20       /* Send STALL handshake */
-#define                nSENDSTALL  0x0       
-#define         SERVICED_RXPKTRDY  0x40       /* used to clear the RxPktRdy bit */
-#define        nSERVICED_RXPKTRDY  0x0       
-#define         SERVICED_SETUPEND  0x80       /* used to clear the SetupEnd bit */
-#define        nSERVICED_SETUPEND  0x0       
-#define                 FLUSHFIFO  0x100      /* flush endpoint FIFO */
-#define                nFLUSHFIFO  0x0       
-#define          STALL_RECEIVED_H  0x4        /* STALL handshake received host mode */
-#define         nSTALL_RECEIVED_H  0x0       
-#define                SETUPPKT_H  0x8        /* send Setup token host mode */
-#define               nSETUPPKT_H  0x0       
-#define                   ERROR_H  0x10       /* timeout error indicator host mode */
-#define                  nERROR_H  0x0       
-#define                  REQPKT_H  0x20       /* Request an IN transaction host mode */
-#define                 nREQPKT_H  0x0       
-#define               STATUSPKT_H  0x40       /* Status stage transaction host mode */
-#define              nSTATUSPKT_H  0x0       
-#define             NAK_TIMEOUT_H  0x80       /* EP0 halted after a NAK host mode */
-#define            nNAK_TIMEOUT_H  0x0       
-/* Bit masks for USB_COUNT0 */
-#define              EP0_RX_COUNT  0x7f       /* number of received bytes in EP0 FIFO */
-/* Bit masks for USB_NAKLIMIT0 */
-#define             EP0_NAK_LIMIT  0x1f       /* number of frames/micro frames after which EP0 timeouts */
-/* Bit masks for USB_TX_MAX_PACKET */
-#define         MAX_PACKET_SIZE_T  0x7ff      /* maximum data pay load in a frame */
-/* Bit masks for USB_RX_MAX_PACKET */
-#define         MAX_PACKET_SIZE_R  0x7ff      /* maximum data pay load in a frame */
-/* Bit masks for USB_TXCSR */
-#define                TXPKTRDY_T  0x1        /* data packet in FIFO indicator */
-#define               nTXPKTRDY_T  0x0       
-#define          FIFO_NOT_EMPTY_T  0x2        /* FIFO not empty */
-#define         nFIFO_NOT_EMPTY_T  0x0       
-#define                UNDERRUN_T  0x4        /* TxPktRdy not set  for an IN token */
-#define               nUNDERRUN_T  0x0       
-#define               FLUSHFIFO_T  0x8        /* flush endpoint FIFO */
-#define              nFLUSHFIFO_T  0x0       
-#define              STALL_SEND_T  0x10       /* issue a Stall handshake */
-#define             nSTALL_SEND_T  0x0       
-#define              STALL_SENT_T  0x20       /* Stall handshake transmitted */
-#define             nSTALL_SENT_T  0x0       
-#define        CLEAR_DATATOGGLE_T  0x40       /* clear endpoint data toggle */
-#define       nCLEAR_DATATOGGLE_T  0x0       
-#define                INCOMPTX_T  0x80       /* indicates that a large packet is split */
-#define               nINCOMPTX_T  0x0       
-#define              DMAREQMODE_T  0x400      /* DMA mode (0 or 1) selection */
-#define             nDMAREQMODE_T  0x0       
-#define        FORCE_DATATOGGLE_T  0x800      /* Force data toggle */
-#define       nFORCE_DATATOGGLE_T  0x0       
-#define              DMAREQ_ENA_T  0x1000     /* Enable DMA request for Tx EP */
-#define             nDMAREQ_ENA_T  0x0       
-#define                     ISO_T  0x4000     /* enable Isochronous transfers */
-#define                    nISO_T  0x0       
-#define                 AUTOSET_T  0x8000     /* allows TxPktRdy to be set automatically */
-#define                nAUTOSET_T  0x0       
-#define                  ERROR_TH  0x4        /* error condition host mode */
-#define                 nERROR_TH  0x0       
-#define         STALL_RECEIVED_TH  0x20       /* Stall handshake received host mode */
-#define        nSTALL_RECEIVED_TH  0x0       
-#define            NAK_TIMEOUT_TH  0x80       /* NAK timeout host mode */
-#define           nNAK_TIMEOUT_TH  0x0       
-/* Bit masks for USB_TXCOUNT */
-#define                  TX_COUNT  0x1fff     /* Number of bytes to be written to the selected endpoint Tx FIFO */
-/* Bit masks for USB_RXCSR */
-#define                RXPKTRDY_R  0x1        /* data packet in FIFO indicator */
-#define               nRXPKTRDY_R  0x0       
-#define               FIFO_FULL_R  0x2        /* FIFO not empty */
-#define              nFIFO_FULL_R  0x0       
-#define                 OVERRUN_R  0x4        /* TxPktRdy not set  for an IN token */
-#define                nOVERRUN_R  0x0       
-#define               DATAERROR_R  0x8        /* Out packet cannot be loaded into Rx  FIFO */
-#define              nDATAERROR_R  0x0       
-#define               FLUSHFIFO_R  0x10       /* flush endpoint FIFO */
-#define              nFLUSHFIFO_R  0x0       
-#define              STALL_SEND_R  0x20       /* issue a Stall handshake */
-#define             nSTALL_SEND_R  0x0       
-#define              STALL_SENT_R  0x40       /* Stall handshake transmitted */
-#define             nSTALL_SENT_R  0x0       
-#define        CLEAR_DATATOGGLE_R  0x80       /* clear endpoint data toggle */
-#define       nCLEAR_DATATOGGLE_R  0x0       
-#define                INCOMPRX_R  0x100      /* indicates that a large packet is split */
-#define               nINCOMPRX_R  0x0       
-#define              DMAREQMODE_R  0x800      /* DMA mode (0 or 1) selection */
-#define             nDMAREQMODE_R  0x0       
-#define                 DISNYET_R  0x1000     /* disable Nyet handshakes */
-#define                nDISNYET_R  0x0       
-#define              DMAREQ_ENA_R  0x2000     /* Enable DMA request for Tx EP */
-#define             nDMAREQ_ENA_R  0x0       
-#define                     ISO_R  0x4000     /* enable Isochronous transfers */
-#define                    nISO_R  0x0       
-#define               AUTOCLEAR_R  0x8000     /* allows TxPktRdy to be set automatically */
-#define              nAUTOCLEAR_R  0x0       
-#define                  ERROR_RH  0x4        /* TxPktRdy not set  for an IN token host mode */
-#define                 nERROR_RH  0x0       
-#define                 REQPKT_RH  0x20       /* request an IN transaction host mode */
-#define                nREQPKT_RH  0x0       
-#define         STALL_RECEIVED_RH  0x40       /* Stall handshake received host mode */
-#define        nSTALL_RECEIVED_RH  0x0       
-#define               INCOMPRX_RH  0x100      /* indicates that a large packet is split host mode */
-#define              nINCOMPRX_RH  0x0       
-#define             DMAREQMODE_RH  0x800      /* DMA mode (0 or 1) selection host mode */
-#define            nDMAREQMODE_RH  0x0       
-#define                AUTOREQ_RH  0x4000     /* sets ReqPkt automatically host mode */
-#define               nAUTOREQ_RH  0x0       
-/* Bit masks for USB_RXCOUNT */
-#define                  RX_COUNT  0x1fff     /* Number of received bytes in the packet in the Rx FIFO */
-/* Bit masks for USB_TXTYPE */
-#define            TARGET_EP_NO_T  0xf        /* EP number */
-#define                PROTOCOL_T  0xc        /* transfer type */
-/* Bit masks for USB_TXINTERVAL */
-#define          TX_POLL_INTERVAL  0xff       /* polling interval for selected Tx EP */
-/* Bit masks for USB_RXTYPE */
-#define            TARGET_EP_NO_R  0xf        /* EP number */
-#define                PROTOCOL_R  0xc        /* transfer type */
-/* Bit masks for USB_RXINTERVAL */
-#define          RX_POLL_INTERVAL  0xff       /* polling interval for selected Rx EP */
-/* Bit masks for USB_DMA_INTERRUPT */
-#define                  DMA0_INT  0x1        /* DMA0 pending interrupt */
-#define                 nDMA0_INT  0x0       
-#define                  DMA1_INT  0x2        /* DMA1 pending interrupt */
-#define                 nDMA1_INT  0x0       
-#define                  DMA2_INT  0x4        /* DMA2 pending interrupt */
-#define                 nDMA2_INT  0x0       
-#define                  DMA3_INT  0x8        /* DMA3 pending interrupt */
-#define                 nDMA3_INT  0x0       
-#define                  DMA4_INT  0x10       /* DMA4 pending interrupt */
-#define                 nDMA4_INT  0x0       
-#define                  DMA5_INT  0x20       /* DMA5 pending interrupt */
-#define                 nDMA5_INT  0x0       
-#define                  DMA6_INT  0x40       /* DMA6 pending interrupt */
-#define                 nDMA6_INT  0x0       
-#define                  DMA7_INT  0x80       /* DMA7 pending interrupt */
-#define                 nDMA7_INT  0x0       
-/* Bit masks for USB_DMAxCONTROL */
-#define                   DMA_ENA  0x1        /* DMA enable */
-#define                  nDMA_ENA  0x0       
-#define                 DIRECTION  0x2        /* direction of DMA transfer */
-#define                nDIRECTION  0x0       
-#define                      MODE  0x4        /* DMA Bus error */
-#define                     nMODE  0x0       
-#define                   INT_ENA  0x8        /* Interrupt enable */
-#define                  nINT_ENA  0x0       
-#define                     EPNUM  0xf0       /* EP number */
-#define                  BUSERROR  0x100      /* DMA Bus error */
-#define                 nBUSERROR  0x0       
-/* Bit masks for USB_DMAxADDRHIGH */
-#define             DMA_ADDR_HIGH  0xffff     /* Upper 16-bits of memory source/destination address for the DMA master channel */
-/* Bit masks for USB_DMAxADDRLOW */
-#define              DMA_ADDR_LOW  0xffff     /* Lower 16-bits of memory source/destination address for the DMA master channel */
-/* Bit masks for USB_DMAxCOUNTHIGH */
-#define            DMA_COUNT_HIGH  0xffff     /* Upper 16-bits of byte count of DMA transfer for DMA master channel */
-/* Bit masks for USB_DMAxCOUNTLOW */
-#define             DMA_COUNT_LOW  0xffff     /* Lower 16-bits of byte count of DMA transfer for DMA master channel */
 #endif /* _DEF_BF527_H */
diff --git a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
index b9dbb73d7ef0..8b18b5359210 100644
--- a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
+++ b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
@@ -586,58 +586,6 @@
 **                              modifier UNLESS the lower order bits are saved and ORed back in when
 **                              the macro is used.
 *************************************************************************************/
-/*
-** ********************* PLL AND RESET MASKS ****************************************/
-/* PLL_CTL Masks                                                                                                                                        */
-#define DF                              0x0001  /* 0: PLL = CLKIN, 1: PLL = CLKIN/2                                     */
-#define PLL_OFF                 0x0002  /* PLL Not Powered                                                                      */
-#define STOPCK                  0x0008  /* Core Clock Off                                                                       */
-#define PDWN                    0x0020  /* Enter Deep Sleep Mode                                                        */
-#define IN_DELAY                0x0040  /* Add 200ps Delay To EBIU Input Latches                        */
-#define OUT_DELAY               0x0080  /* Add 200ps Delay To EBIU Output Signals                       */
-#define BYPASS                  0x0100  /* Bypass the PLL                                                                       */
-#define MSEL                    0x7E00  /* Multiplier Select For CCLK/VCO Factors                       */
-/* PLL_CTL Macros (Only Use With Logic OR While Setting Lower Order Bits)                       */
-#define SET_MSEL(x)             (((x)&0x3F) << 0x9)     /* Set MSEL = 0-63 --> VCO = CLKIN*MSEL         */
-/* PLL_DIV Masks                                                                                                                */
-#define SSEL                    0x000F  /* System Select                                                */
-#define CSEL                    0x0030  /* Core Select                                                  */
-#define CSEL_DIV1               0x0000  /*              CCLK = VCO / 1                                  */
-#define CSEL_DIV2               0x0010  /*              CCLK = VCO / 2                                  */
-#define CSEL_DIV4               0x0020  /*              CCLK = VCO / 4                                  */
-#define CSEL_DIV8               0x0030  /*              CCLK = VCO / 8                                  */
-/* PLL_DIV Macros                                                                                                               */
-#define SET_SSEL(x)             ((x)&0xF)               /* Set SSEL = 0-15 --> SCLK = VCO/SSEL  */
-/* VR_CTL Masks */
-#define FREQ                    0x3000  /* Switching Oscillator Frequency For Regulator */
-#define HIBERNATE               0x0000  /*              Powerdown/Bypass On-Board Regulation    */
-#define VLEV                    0x00F0  /* Internal Voltage Level                                       */
-#define VLEV_085                0x0060  /*              VLEV = 0.85 V (-5% - +10% Accuracy)     */
-#define VLEV_090                0x0070  /*              VLEV = 0.90 V (-5% - +10% Accuracy)     */
-#define VLEV_095                0x0080  /*              VLEV = 0.95 V (-5% - +10% Accuracy)     */
-#define VLEV_100                0x0090  /*              VLEV = 1.00 V (-5% - +10% Accuracy)     */
-#define VLEV_105                0x00A0  /*              VLEV = 1.05 V (-5% - +10% Accuracy)     */
-#define VLEV_110                0x00B0  /*              VLEV = 1.10 V (-5% - +10% Accuracy)     */
-#define VLEV_115                0x00C0  /*              VLEV = 1.15 V (-5% - +10% Accuracy)     */
-#define VLEV_120                0x00D0  /*              VLEV = 1.20 V (-5% - +10% Accuracy)     */
-#define VLEV_125                0x00E0  /*              VLEV = 1.25 V (-5% - +10% Accuracy)     */
-#define VLEV_130                0x00F0  /*              VLEV = 1.30 V (-5% - +10% Accuracy)     */
-#define WAKE                    0x0100  /* Enable RTC/Reset Wakeup From Hibernate       */
-#define USBWE                   0x0200  /* Enable USB Wakeup From Hibernate                     */
-#define PHYWE                   0x0400  /* Enable PHY Wakeup From Hibernate                     */
-#define CLKBUFOE                0x4000  /* CLKIN Buffer Output Enable */
-#define PHYCLKOE                CLKBUFOE        /* Alternative legacy name for the above */
-#define SCKELOW         0x8000  /* Enable Drive CKE Low During Reset            */
-/* PLL_STAT Masks                                                                                                                                       */
-#define ACTIVE_PLLENABLED       0x0001  /* Processor In Active Mode With PLL Enabled    */
-#define FULL_ON                         0x0002  /* Processor In Full On Mode                                    */
-#define ACTIVE_PLLDISABLED      0x0004  /* Processor In Active Mode With PLL Disabled   */
-#define PLL_LOCKED                      0x0020  /* PLL_LOCKCNT Has Been Reached                                 */
 /* CHIPID Masks */
 #define CHIPID_VERSION         0xF0000000
@@ -757,66 +705,6 @@
 #define IWR_DISABLE(x)  (0xFFFFFFFF ^ (1 << ((x)&0x1F)))        /* Wakeup Disable Peripheral #x         */
-/* ********* WATCHDOG TIMER MASKS ******************** */
-/* Watchdog Timer WDOG_CTL Register Masks */
-#define WDEV(x) (((x)<<1) & 0x0006) /* event generated on roll over */
-#define WDEV_RESET 0x0000 /* generate reset event on roll over */
-#define WDEV_NMI 0x0002 /* generate NMI event on roll over */
-#define WDEV_GPI 0x0004 /* generate GP IRQ on roll over */
-#define WDEV_NONE 0x0006 /* no event on roll over */
-#define WDEN 0x0FF0 /* enable watchdog */
-#define WDDIS 0x0AD0 /* disable watchdog */
-#define WDRO 0x8000 /* watchdog rolled over latch */
-/* depreciated WDOG_CTL Register Masks for legacy code */
-#define ICTL WDEV
-#define ENABLE_RESET WDEV_RESET
-#define WDOG_RESET WDEV_RESET
-#define ENABLE_NMI WDEV_NMI
-#define WDOG_NMI WDEV_NMI
-#define ENABLE_GPI WDEV_GPI
-#define WDOG_GPI WDEV_GPI
-#define DISABLE_EVT WDEV_NONE
-#define WDOG_NONE WDEV_NONE
-#define TMR_EN WDEN
-#define TMR_DIS WDDIS
-#define TRO WDRO
-#define ICTL_P0 0x01
- #define ICTL_P1 0x02
-#define TRO_P 0x0F
-/* ***************  REAL TIME CLOCK MASKS  **************************/
-/* RTC_STAT and RTC_ALARM Masks                                                                         */
-#define RTC_SEC                         0x0000003F      /* Real-Time Clock Seconds      */
-#define RTC_MIN                         0x00000FC0      /* Real-Time Clock Minutes      */
-#define RTC_HR                          0x0001F000      /* Real-Time Clock Hours        */
-#define RTC_DAY                         0xFFFE0000      /* Real-Time Clock Days         */
-/* RTC_ALARM Macro                      z=day           y=hr    x=min   w=sec           */
-#define SET_ALARM(z,y,x,w)      ((((z)&0x7FFF)<<0x11)|(((y)&0x1F)<<0xC)|(((x)&0x3F)<<0x6)|((w)&0x3F))
-/* RTC_ICTL and RTC_ISTAT Masks                                                                                                                                         */
-#define STOPWATCH                       0x0001          /* Stopwatch Interrupt Enable                                                           */
-#define ALARM                           0x0002          /* Alarm Interrupt Enable                                                                       */
-#define SECOND                          0x0004          /* Seconds (1 Hz) Interrupt Enable                                                      */
-#define MINUTE                          0x0008          /* Minutes Interrupt Enable                                                                     */
-#define HOUR                            0x0010          /* Hours Interrupt Enable                                                                       */
-#define DAY                                     0x0020          /* 24 Hours (Days) Interrupt Enable                                                     */
-#define DAY_ALARM                       0x0040          /* Day Alarm (Day, Hour, Minute, Second) Interrupt Enable       */
-#define WRITE_PENDING           0x4000          /* Write Pending Status                                                                         */
-#define WRITE_COMPLETE          0x8000          /* Write Complete Interrupt Enable                                                      */
-/* RTC_FAST / RTC_PREN Mask                                                                                             */
-#define PREN                            0x0001  /* Enable Prescaler, RTC Runs @1 Hz     */
 /* ************** UART CONTROLLER MASKS *************************/
 /* UARTx_LCR Masks                                                                                              */
 #define WLS(x)          (((x)-5) & 0x03)        /* Word Length Select */
@@ -1381,33 +1269,6 @@
 /* **************************  DMA CONTROLLER MASKS  ********************************/
-/* DMAx_CONFIG, MDMA_yy_CONFIG Masks                                                                                            */
-#define DMAEN                   0x0001          /* DMA Channel Enable                                                   */
-#define WNR                             0x0002          /* Channel Direction (W/R*)                                             */
-#define WDSIZE_8                0x0000          /* Transfer Word Size = 8                                               */
-#define WDSIZE_16               0x0004          /* Transfer Word Size = 16                                              */
-#define WDSIZE_32               0x0008          /* Transfer Word Size = 32                                              */
-#define DMA2D                   0x0010          /* DMA Mode (2D/1D*)                                                    */
-#define RESTART                 0x0020          /* DMA Buffer Clear                                                             */
-#define DI_SEL                  0x0040          /* Data Interrupt Timing Select                                 */
-#define DI_EN                   0x0080          /* Data Interrupt Enable                                                */
-#define NDSIZE_0                0x0000          /* Next Descriptor Size = 0 (Stop/Autobuffer)   */
-#define NDSIZE_1                0x0100          /* Next Descriptor Size = 1                                             */
-#define NDSIZE_2                0x0200          /* Next Descriptor Size = 2                                             */
-#define NDSIZE_3                0x0300          /* Next Descriptor Size = 3                                             */
-#define NDSIZE_4                0x0400          /* Next Descriptor Size = 4                                             */
-#define NDSIZE_5                0x0500          /* Next Descriptor Size = 5                                             */
-#define NDSIZE_6                0x0600          /* Next Descriptor Size = 6                                             */
-#define NDSIZE_7                0x0700          /* Next Descriptor Size = 7                                             */
-#define NDSIZE_8                0x0800          /* Next Descriptor Size = 8                                             */
-#define NDSIZE_9                0x0900          /* Next Descriptor Size = 9                                             */
-#define NDSIZE                  0x0900  /* Next Descriptor Size */
-#define DMAFLOW                 0x7000  /* Flow Control */
-#define DMAFLOW_STOP            0x0000          /* Stop Mode                                                                    */
-#define DMAFLOW_AUTO            0x1000          /* Autobuffer Mode                                                              */
-#define DMAFLOW_ARRAY           0x4000          /* Descriptor Array Mode                                                */
-#define DMAFLOW_SMALL           0x6000          /* Small Model Descriptor List Mode                             */
-#define DMAFLOW_LARGE           0x7000          /* Large Model Descriptor List Mode                             */
 /* DMAx_PERIPHERAL_MAP, MDMA_yy_PERIPHERAL_MAP Masks                                                            */
 #define CTYPE                   0x0040  /* DMA Channel Type Indicator (Memory/Peripheral*)      */
@@ -1425,13 +1286,6 @@
 #define PMAP_UART1RX    0xA000  /*              UART1 Port Receive DMA                                          */
 #define PMAP_UART1TX    0xB000  /*              UART1 Port Transmit DMA                                         */
-/* DMAx_IRQ_STATUS, MDMA_yy_IRQ_STATUS Masks                                            */
-#define DMA_DONE                0x0001  /* DMA Completion Interrupt Status      */
-#define DMA_ERR                 0x0002  /* DMA Error Interrupt Status           */
-#define DFETCH                  0x0004  /* DMA Descriptor Fetch Indicator       */
-#define DMA_RUN                 0x0008  /* DMA Channel Running Indicator        */
 /*  ************  PARALLEL PERIPHERAL INTERFACE (PPI) MASKS *************/
 /*  PPI_CONTROL Masks                                                                                                   */
 #define PORT_EN                 0x0001          /* PPI Port Enable                                      */
@@ -1843,46 +1697,6 @@
 #define BNDMODE_CAPT     0x2000  /* boundary capture mode */
 #define BNDMODE_AEXT     0x3000  /* boundary auto-extend mode */
-/* Bit masks for OTP_CONTROL */
-#define                FUSE_FADDR  0x1ff      /* OTP/Fuse Address */
-#define                      FIEN  0x800      /* OTP/Fuse Interrupt Enable */
-#define                     nFIEN  0x0
-#define                  FTESTDEC  0x1000     /* OTP/Fuse Test Decoder */
-#define                 nFTESTDEC  0x0
-#define                   FWRTEST  0x2000     /* OTP/Fuse Write Test */
-#define                  nFWRTEST  0x0
-#define                     FRDEN  0x4000     /* OTP/Fuse Read Enable */
-#define                    nFRDEN  0x0
-#define                     FWREN  0x8000     /* OTP/Fuse Write Enable */
-#define                    nFWREN  0x0
-/* Bit masks for OTP_BEN */
-#define                      FBEN  0xffff     /* OTP/Fuse Byte Enable */
-/* Bit masks for OTP_STATUS */
-#define                     FCOMP  0x1        /* OTP/Fuse Access Complete */
-#define                    nFCOMP  0x0
-#define                    FERROR  0x2        /* OTP/Fuse Access Error */
-#define                   nFERROR  0x0
-#define                  MMRGLOAD  0x10       /* Memory Mapped Register Gasket Load */
-#define                 nMMRGLOAD  0x0
-#define                  MMRGLOCK  0x20       /* Memory Mapped Register Gasket Lock */
-#define                 nMMRGLOCK  0x0
-#define                    FPGMEN  0x40       /* OTP/Fuse Program Enable */
-#define                   nFPGMEN  0x0
-/* Bit masks for OTP_TIMING */
-#define                   USECDIV  0xff       /* Micro Second Divider */
-#define                   READACC  0x7f00     /* Read Access Time */
-#define                   CPUMPRL  0x38000    /* Charge Pump Release Time */
-#define                   CPUMPSU  0xc0000    /* Charge Pump Setup Time */
-#define                   CPUMPHD  0xf00000   /* Charge Pump Hold Time */
-#define                   PGMTIME  0xff000000 /* Program Time */
 /* Bit masks for SECURE_SYSSWT */
 #define                   EMUDABL  0x1        /* Emulation Disable. */
diff --git a/arch/blackfin/mach-bf533/boards/H8606.c b/arch/blackfin/mach-bf533/boards/H8606.c
index 43f43a095a99..4adceb0bdb6d 100644
--- a/arch/blackfin/mach-bf533/boards/H8606.c
+++ b/arch/blackfin/mach-bf533/boards/H8606.c
@@ -166,7 +166,6 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
-        .ctl_reg = 0x1000,
        .enable_dma = 1,         /* use dma transfer with this chip*/
        .bits_per_word = 16,
 };
@@ -174,7 +173,6 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
-        .ctl_reg = 0x1000,
        .enable_dma = 0,
        .bits_per_word = 16,
 };
@@ -258,12 +256,6 @@ static struct platform_device bfin_spi0_device = {
 };
 #endif  /* spi master and devices */
-#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
-static struct platform_device bfin_fb_device = {
-        .name = "bf537-fb",
-};
-#endif
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 static struct resource bfin_uart_resources[] = {
        {
diff --git a/arch/blackfin/mach-bf533/boards/ip0x.c b/arch/blackfin/mach-bf533/boards/ip0x.c
index 644be5e5ab6f..8ec42ba35b9e 100644
--- a/arch/blackfin/mach-bf533/boards/ip0x.c
+++ b/arch/blackfin/mach-bf533/boards/ip0x.c
@@ -20,6 +20,7 @@
 #endif
 #include <asm/irq.h>
 #include <asm/bfin5xx_spi.h>
+#include <asm/portmux.h>
 /*
 * Name the Board for the /proc/cpuinfo
@@ -107,20 +108,6 @@ static struct platform_device dm9000_device2 = {
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
-/*
- * CPOL (Clock Polarity)
- *  0 - Active high SCK
- *  1 - Active low SCK
- *  CPHA (Clock Phase) Selects transfer format and operation mode
- *  0 - SCLK toggles from middle of the first data bit, slave select
- *      pins controlled by hardware.
- *  1 - SCLK toggles from beginning of first data bit, slave select
- *      pins controller by user software.
- *      .ctl_reg = 0x1c00,               *  CPOL=1,CPHA=1,Sandisk 1G work
- * NO NO        .ctl_reg = 0x1800,               *  CPOL=1,CPHA=0
- * NO NO        .ctl_reg = 0x1400,               *  CPOL=0,CPHA=1
- */
-        .ctl_reg = 0x1000,              /* CPOL=0,CPHA=0,Sandisk 1G work */
        .enable_dma = 0,                /* if 1 - block!!! */
        .bits_per_word = 8,
 };
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index 82f70efd66e7..6d68dcfa2da2 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -321,12 +321,6 @@ static struct platform_device bfin_spi0_device = {
 };
 #endif  /* spi master and devices */
-#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
-static struct platform_device bfin_fb_device = {
-        .name = "bf537-fb",
-};
-#endif
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 static struct resource bfin_uart_resources[] = {
        {
diff --git a/arch/blackfin/mach-bf533/include/mach/defBF532.h b/arch/blackfin/mach-bf533/include/mach/defBF532.h
index 02b328eb0e07..e9ff491c0953 100644
--- a/arch/blackfin/mach-bf533/include/mach/defBF532.h
+++ b/arch/blackfin/mach-bf533/include/mach/defBF532.h
@@ -370,72 +370,6 @@
 /* System MMR Register Bits */
 /******************************************************************************* */
-/* ********************* PLL AND RESET MASKS ************************ */
-/* PLL_CTL Masks */
-#define PLL_CLKIN                       0x0000  /* Pass CLKIN to PLL */
-#define PLL_CLKIN_DIV2                  0x0001  /* Pass CLKIN/2 to PLL */
-#define DF                              0x0001  /* 0: PLL = CLKIN, 1: PLL = CLKIN/2                                     */
-#define PLL_OFF                         0x0002  /* Shut off PLL clocks */
-#define STOPCK_OFF                      0x0008  /* Core clock off */
-#define STOPCK                          0x0008  /* Core Clock Off                                                                       */
-#define PDWN                            0x0020  /* Put the PLL in a Deep Sleep state */
-#if !defined(__ADSPBF538__)
-/* this file is included in defBF538.h but IN_DELAY/OUT_DELAY are different */
-# define IN_DELAY        0x0040  /* Add 200ps Delay To EBIU Input Latches */
-# define OUT_DELAY       0x0080  /* Add 200ps Delay To EBIU Output Signals */
-#endif
-#define BYPASS                          0x0100  /* Bypass the PLL */
-/* PLL_CTL Macros (Only Use With Logic OR While Setting Lower Order Bits)                       */
-#define SET_MSEL(x)             (((x)&0x3F) << 0x9)     /* Set MSEL = 0-63 --> VCO = CLKIN*MSEL         */
-/* PLL_DIV Masks */
-#define SSEL                            0x000F  /* System Select                                                */
-#define CSEL                            0x0030  /* Core Select                                                  */
-#define SCLK_DIV(x)  (x)        /* SCLK = VCO / x */
-#define CCLK_DIV1              0x00000000       /* CCLK = VCO / 1 */
-#define CCLK_DIV2              0x00000010       /* CCLK = VCO / 2 */
-#define CCLK_DIV4              0x00000020       /* CCLK = VCO / 4 */
-#define CCLK_DIV8              0x00000030       /* CCLK = VCO / 8 */
-/* PLL_DIV Macros                                                                                                               */
-#define SET_SSEL(x)                     ((x)&0xF)       /* Set SSEL = 0-15 --> SCLK = VCO/SSEL  */
-/* PLL_STAT Masks                                                                                                                                       */
-#define ACTIVE_PLLENABLED       0x0001  /* Processor In Active Mode With PLL Enabled    */
-#define FULL_ON                         0x0002  /* Processor In Full On Mode                                    */
-#define ACTIVE_PLLDISABLED      0x0004  /* Processor In Active Mode With PLL Disabled   */
-#define PLL_LOCKED                      0x0020  /* PLL_LOCKCNT Has Been Reached                                 */
-/* VR_CTL Masks                                                                                                                                 */
-#define FREQ                    0x0003  /* Switching Oscillator Frequency For Regulator */
-#define HIBERNATE               0x0000  /*              Powerdown/Bypass On-Board Regulation    */
-#define FREQ_333                0x0001  /*              Switching Frequency Is 333 kHz                  */
-#define FREQ_667                0x0002  /*              Switching Frequency Is 667 kHz                  */
-#define FREQ_1000               0x0003  /*              Switching Frequency Is 1 MHz                    */
-#define GAIN                    0x000C  /* Voltage Level Gain   */
-#define GAIN_5                  0x0000  /*              GAIN = 5                */
-#define GAIN_10                 0x0004  /*              GAIN = 10               */
-#define GAIN_20                 0x0008  /*              GAIN = 20               */
-#define GAIN_50                 0x000C  /*              GAIN = 50               */
-#define VLEV                    0x00F0  /* Internal Voltage Level                                       */
-#define VLEV_085                0x0060  /*              VLEV = 0.85 V (-5% - +10% Accuracy)     */
-#define VLEV_090                0x0070  /*              VLEV = 0.90 V (-5% - +10% Accuracy)     */
-#define VLEV_095                0x0080  /*              VLEV = 0.95 V (-5% - +10% Accuracy)     */
-#define VLEV_100                0x0090  /*              VLEV = 1.00 V (-5% - +10% Accuracy)     */
-#define VLEV_105                0x00A0  /*              VLEV = 1.05 V (-5% - +10% Accuracy)     */
-#define VLEV_110                0x00B0  /*              VLEV = 1.10 V (-5% - +10% Accuracy)     */
-#define VLEV_115                0x00C0  /*              VLEV = 1.15 V (-5% - +10% Accuracy)     */
-#define VLEV_120                0x00D0  /*              VLEV = 1.20 V (-5% - +10% Accuracy)     */
-#define VLEV_125                0x00E0  /*              VLEV = 1.25 V (-5% - +10% Accuracy)     */
-#define VLEV_130                0x00F0  /*              VLEV = 1.30 V (-5% - +10% Accuracy)     */
-#define WAKE                    0x0100  /* Enable RTC/Reset Wakeup From Hibernate       */
-#define SCKELOW                 0x8000  /* Do Not Drive SCKE High During Reset After Hibernate */
 /* CHIPID Masks */
 #define CHIPID_VERSION         0xF0000000
 #define CHIPID_FAMILY          0x0FFFF000
@@ -703,54 +637,7 @@
 /* **********  DMA CONTROLLER MASKS  *********************8 */
-/*DMAx_CONFIG, MDMA_yy_CONFIG Masks */
+/* DMAx_PERIPHERAL_MAP, MDMA_yy_PERIPHERAL_MAP Masks */
-#define DMAEN           0x00000001      /* Channel Enable */
-#define WNR             0x00000002      /* Channel Direction (W/R*) */
-#define WDSIZE_8        0x00000000      /* Word Size 8 bits */
-#define WDSIZE_16       0x00000004      /* Word Size 16 bits */
-#define WDSIZE_32       0x00000008      /* Word Size 32 bits */
-#define DMA2D           0x00000010      /* 2D/1D* Mode */
-#define RESTART         0x00000020      /* Restart */
-#define DI_SEL          0x00000040      /* Data Interrupt Select */
-#define DI_EN           0x00000080      /* Data Interrupt Enable */
-#define NDSIZE_0                0x0000  /* Next Descriptor Size = 0 (Stop/Autobuffer)   */
-#define NDSIZE_1                0x0100  /* Next Descriptor Size = 1                                             */
-#define NDSIZE_2                0x0200  /* Next Descriptor Size = 2                                             */
-#define NDSIZE_3                0x0300  /* Next Descriptor Size = 3                                             */
-#define NDSIZE_4                0x0400  /* Next Descriptor Size = 4                                             */
-#define NDSIZE_5                0x0500  /* Next Descriptor Size = 5                                             */
-#define NDSIZE_6                0x0600  /* Next Descriptor Size = 6                                             */
-#define NDSIZE_7                0x0700  /* Next Descriptor Size = 7                                             */
-#define NDSIZE_8                0x0800  /* Next Descriptor Size = 8                                             */
-#define NDSIZE_9                0x0900  /* Next Descriptor Size = 9                                             */
-#define NDSIZE          0x00000900      /* Next Descriptor Size */
-#define DMAFLOW         0x00007000      /* Flow Control */
-#define DMAFLOW_STOP            0x0000  /* Stop Mode */
-#define DMAFLOW_AUTO            0x1000  /* Autobuffer Mode */
-#define DMAFLOW_ARRAY           0x4000  /* Descriptor Array Mode */
-#define DMAFLOW_SMALL           0x6000  /* Small Model Descriptor List Mode */
-#define DMAFLOW_LARGE           0x7000  /* Large Model Descriptor List Mode */
-#define DMAEN_P                 0       /* Channel Enable */
-#define WNR_P                   1       /* Channel Direction (W/R*) */
-#define DMA2D_P                 4       /* 2D/1D* Mode */
-#define RESTART_P               5       /* Restart */
-#define DI_SEL_P                6       /* Data Interrupt Select */
-#define DI_EN_P                 7       /* Data Interrupt Enable */
-/*DMAx_IRQ_STATUS, MDMA_yy_IRQ_STATUS Masks */
-#define DMA_DONE                0x00000001      /* DMA Done Indicator */
-#define DMA_ERR                 0x00000002      /* DMA Error Indicator */
-#define DFETCH                  0x00000004      /* Descriptor Fetch Indicator */
-#define DMA_RUN                 0x00000008      /* DMA Running Indicator */
-#define DMA_DONE_P              0       /* DMA Done Indicator */
-#define DMA_ERR_P               1       /* DMA Error Indicator */
-#define DFETCH_P                2       /* Descriptor Fetch Indicator */
-#define DMA_RUN_P               3       /* DMA Running Indicator */
-/*DMAx_PERIPHERAL_MAP, MDMA_yy_PERIPHERAL_MAP Masks */
 #define CTYPE               0x00000040  /* DMA Channel Type Indicator */
 #define CTYPE_P             6   /* DMA Channel Type Indicator BIT POSITION */
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index 9ba290466b56..4e0afda472ab 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -13,9 +13,6 @@
 #include <linux/mtd/partitions.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
-#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
-#include <linux/usb/isp1362.h>
-#endif
 #include <linux/irq.h>
 #include <asm/dma.h>
 #include <asm/bfin5xx_spi.h>
@@ -147,45 +144,6 @@ static struct platform_device sl811_hcd_device = {
 };
 #endif
-#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
-static struct resource isp1362_hcd_resources[] = {
-        {
-                .start = 0x20360000,
-                .end = 0x20360000,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = 0x20360004,
-                .end = 0x20360004,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
-                .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
-                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
-        },
-};
-static struct isp1362_platform_data isp1362_priv = {
-        .sel15Kres = 1,
-        .clknotstop = 0,
-        .oc_enable = 0,
-        .int_act_high = 0,
-        .int_edge_triggered = 0,
-        .remote_wakeup_connected = 0,
-        .no_power_switching = 1,
-        .power_switching_mode = 0,
-};
-static struct platform_device isp1362_hcd_device = {
-        .name = "isp1362-hcd",
-        .id = 0,
-        .dev = {
-                .platform_data = &isp1362_priv,
-        },
-        .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
-        .resource = isp1362_hcd_resources,
-};
-#endif
 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 static struct platform_device bfin_mii_bus = {
        .name = "bfin_mii_bus",
@@ -492,10 +450,6 @@ static struct platform_device *stamp_devices[] __initdata = {
        &sl811_hcd_device,
 #endif
-#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
-        &isp1362_hcd_device,
-#endif
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
        &smc91x_device,
 #endif
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index c46baa5e6d9b..ac9b52e0087c 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -9,6 +9,7 @@
 #include <linux/device.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include <linux/io.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
@@ -25,6 +26,8 @@
 #include <linux/i2c.h>
 #include <linux/usb/sl811.h>
 #include <linux/spi/mmc_spi.h>
+#include <linux/leds.h>
+#include <linux/input.h>
 #include <asm/dma.h>
 #include <asm/bfin5xx_spi.h>
 #include <asm/reboot.h>
@@ -65,7 +68,7 @@ static struct isp1760_platform_data isp1760_priv = {
 };
 static struct platform_device bfin_isp1760_device = {
-        .name           = "isp1760-hcd",
+        .name           = "isp1760",
        .id             = 0,
        .dev = {
                .platform_data = &isp1760_priv,
@@ -76,7 +79,6 @@ static struct platform_device bfin_isp1760_device = {
 #endif
 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
-#include <linux/input.h>
 #include <linux/gpio_keys.h>
 static struct gpio_keys_button bfin_gpio_keys_table[] = {
@@ -195,28 +197,6 @@ static struct platform_device dm9000_device = {
 };
 #endif
-#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
-static struct resource ax88180_resources[] = {
-        [0] = {
-                .start  = 0x20300000,
-                .end    = 0x20300000 + 0x8000,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_PF7,
-                .end    = IRQ_PF7,
-                .flags  = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL),
-        },
-};
-static struct platform_device ax88180_device = {
-        .name           = "ax88180",
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(ax88180_resources),
-        .resource       = ax88180_resources,
-};
-#endif
 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
 static struct resource sl811_hcd_resources[] = {
        {
@@ -272,8 +252,8 @@ static struct resource isp1362_hcd_resources[] = {
                .end = 0x20360004,
                .flags = IORESOURCE_MEM,
        }, {
-                .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
+                .start = IRQ_PF3,
-                .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
+                .end = IRQ_PF3,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
        },
 };
@@ -300,6 +280,44 @@ static struct platform_device isp1362_hcd_device = {
 };
 #endif
+#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
+unsigned short bfin_can_peripherals[] = {
+        P_CAN0_RX, P_CAN0_TX, 0
+};
+static struct resource bfin_can_resources[] = {
+        {
+                .start = 0xFFC02A00,
+                .end = 0xFFC02FFF,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_CAN_RX,
+                .end = IRQ_CAN_RX,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_CAN_TX,
+                .end = IRQ_CAN_TX,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_CAN_ERROR,
+                .end = IRQ_CAN_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device bfin_can_device = {
+        .name = "bfin_can",
+        .num_resources = ARRAY_SIZE(bfin_can_resources),
+        .resource = bfin_can_resources,
+        .dev = {
+                .platform_data = &bfin_can_peripherals, /* Passed to driver */
+        },
+};
+#endif
 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 static struct platform_device bfin_mii_bus = {
        .name = "bfin_mii_bus",
@@ -514,15 +532,14 @@ static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
 };
 #endif
-#if defined(CONFIG_INPUT_EVAL_AD7147EBZ)
+#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
-#include <linux/input.h>
 #include <linux/input/ad714x.h>
 static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
        .enable_dma = 0,
        .bits_per_word = 16,
 };
-static struct ad714x_slider_plat slider_plat[] = {
+static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
        {
                .start_stage = 0,
                .end_stage = 7,
@@ -530,7 +547,7 @@ static struct ad714x_slider_plat slider_plat[] = {
        },
 };
-static struct ad714x_button_plat button_plat[] = {
+static struct ad714x_button_plat ad7147_spi_button_plat[] = {
        {
                .keycode = BTN_FORWARD,
                .l_mask = 0,
@@ -557,11 +574,11 @@ static struct ad714x_button_plat button_plat[] = {
                .h_mask = 0x400,
        },
 };
-static struct ad714x_platform_data ad7147_platfrom_data = {
+static struct ad714x_platform_data ad7147_spi_platform_data = {
        .slider_num = 1,
        .button_num = 5,
-        .slider = slider_plat,
+        .slider = ad7147_spi_slider_plat,
-        .button = button_plat,
+        .button = ad7147_spi_button_plat,
        .stage_cfg_reg =  {
                {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
                {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
@@ -580,10 +597,9 @@ static struct ad714x_platform_data ad7147_platfrom_data = {
 };
 #endif
-#if defined(CONFIG_INPUT_EVAL_AD7142EB)
+#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
-#include <linux/input.h>
 #include <linux/input/ad714x.h>
-static struct ad714x_button_plat button_plat[] = {
+static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
        {
                .keycode = BTN_1,
                .l_mask = 0,
@@ -605,9 +621,9 @@ static struct ad714x_button_plat button_plat[] = {
                .h_mask = 0x8,
        },
 };
-static struct ad714x_platform_data ad7142_platfrom_data = {
+static struct ad714x_platform_data ad7142_i2c_platform_data = {
        .button_num = 4,
-        .button = button_plat,
+        .button = ad7142_i2c_button_plat,
        .stage_cfg_reg =  {
                /* fixme: figure out right setting for all comoponent according
                 * to hardware feature of EVAL-AD7142EB board */
@@ -696,8 +712,7 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = {
 #endif
 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
-#include <linux/input.h>
+#include <linux/input/adxl34x.h>
-#include <linux/spi/adxl34x.h>
 static const struct adxl34x_platform_data adxl34x_info = {
        .x_axis_offset = 0,
        .y_axis_offset = 0,
@@ -721,9 +736,7 @@ static const struct adxl34x_platform_data adxl34x_info = {
        .ev_code_y = ABS_Y,             /* EV_REL */
        .ev_code_z = ABS_Z,             /* EV_REL */
-        .ev_code_tap_x = BTN_TOUCH,             /* EV_KEY */
+        .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
-        .ev_code_tap_y = BTN_TOUCH,             /* EV_KEY */
-        .ev_code_tap_z = BTN_TOUCH,             /* EV_KEY */
 /*      .ev_code_ff = KEY_F,*/          /* EV_KEY */
 /*      .ev_code_act_inactivity = KEY_A,*/      /* EV_KEY */
@@ -761,6 +774,47 @@ static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
 };
 #endif
+#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
+static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
+        .bits_per_word = 16,
+        .cs_gpio = GPIO_PF10,
+};
+#include <linux/spi/adf702x.h>
+#define TXREG 0x0160A470
+static const u32 adf7021_regs[] = {
+        0x09608FA0,
+        0x00575011,
+        0x00A7F092,
+        0x2B141563,
+        0x81F29E94,
+        0x00003155,
+        0x050A4F66,
+        0x00000007,
+        0x00000008,
+        0x000231E9,
+        0x3296354A,
+        0x891A2B3B,
+        0x00000D9C,
+        0x0000000D,
+        0x0000000E,
+        0x0000000F,
+};
+static struct adf702x_platform_data adf7021_platform_data = {
+        .regs_base = (void *)SPORT1_TCR1,
+        .dma_ch_rx = CH_SPORT1_RX,
+        .dma_ch_tx = CH_SPORT1_TX,
+        .irq_sport_err = IRQ_SPORT1_ERROR,
+        .gpio_int_rfs = GPIO_PF8,
+        .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
+                        P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
+        .adf702x_model = MODEL_ADF7021,
+        .adf702x_regs = adf7021_regs,
+        .tx_reg = TXREG,
+};
+#endif
 #if defined(CONFIG_MTD_DATAFLASH) \
        || defined(CONFIG_MTD_DATAFLASH_MODULE)
@@ -794,6 +848,13 @@ static struct bfin5xx_spi_chip data_flash_chip_info = {
 };
 #endif
+#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
+static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
+        .enable_dma = 0,         /* use dma transfer with this chip*/
+        .bits_per_word = 8,
+};
+#endif
 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 #if defined(CONFIG_MTD_M25P80) \
        || defined(CONFIG_MTD_M25P80_MODULE)
@@ -855,7 +916,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
        },
 #endif
-#if defined(CONFIG_INPUT_EVAL_AD7147EBZ)
+#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
        {
                .modalias = "ad714x_captouch",
                .max_speed_hz = 1000000,     /* max spi clock (SCK) speed in HZ */
@@ -863,7 +924,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
                .bus_num = 0,
                .chip_select = 5,
                .mode = SPI_MODE_3,
-                .platform_data = &ad7147_platfrom_data,
+                .platform_data = &ad7147_spi_platform_data,
                .controller_data = &ad7147_spi_chip_info,
        },
 #endif
@@ -932,6 +993,30 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
                .mode = SPI_MODE_0,
        },
 #endif
+#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
+        {
+                .modalias       = "adxl34x",
+                .platform_data  = &adxl34x_info,
+                .irq            = IRQ_PF6,
+                .max_speed_hz   = 5000000,    /* max spi clock (SCK) speed in HZ */
+                .bus_num        = 0,
+                .chip_select    = 2,
+                .controller_data = &spi_adxl34x_chip_info,
+                .mode = SPI_MODE_3,
+        },
+#endif
+#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
+        {
+                .modalias = "adf702x",
+                .max_speed_hz = 16000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0,
+                .chip_select = 0,       /* GPIO controlled SSEL */
+                .controller_data = &adf7021_spi_chip_info,
+                .platform_data = &adf7021_platform_data,
+                .mode = SPI_MODE_0,
+        },
+#endif
 };
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
@@ -1175,7 +1260,6 @@ static struct platform_device i2c_bfin_twi_device = {
 #endif
 #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
-#include <linux/input.h>
 #include <linux/i2c/adp5588.h>
 static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
        [0]      = KEY_GRAVE,
@@ -1268,35 +1352,33 @@ static struct adp5588_kpad_platform_data adp5588_kpad_data = {
         *  ADP5520/5501 Backlight Data
         */
-static struct adp5520_backlight_platfrom_data adp5520_backlight_data = {
+static struct adp5520_backlight_platform_data adp5520_backlight_data = {
-        .fade_in                = FADE_T_1200ms,
+        .fade_in                = ADP5520_FADE_T_1200ms,
-        .fade_out               = FADE_T_1200ms,
+        .fade_out               = ADP5520_FADE_T_1200ms,
-        .fade_led_law           = BL_LAW_LINEAR,
+        .fade_led_law           = ADP5520_BL_LAW_LINEAR,
-        .en_ambl_sens           = 1,
+        .en_ambl_sens           = 1,
-        .abml_filt              = BL_AMBL_FILT_640ms,
+        .abml_filt              = ADP5520_BL_AMBL_FILT_640ms,
-        .l1_daylight_max        = BL_CUR_mA(15),
+        .l1_daylight_max        = ADP5520_BL_CUR_mA(15),
-        .l1_daylight_dim        = BL_CUR_mA(0),
+        .l1_daylight_dim        = ADP5520_BL_CUR_mA(0),
-        .l2_office_max          = BL_CUR_mA(7),
+        .l2_office_max          = ADP5520_BL_CUR_mA(7),
-        .l2_office_dim          = BL_CUR_mA(0),
+        .l2_office_dim          = ADP5520_BL_CUR_mA(0),
-        .l3_dark_max            = BL_CUR_mA(3),
+        .l3_dark_max            = ADP5520_BL_CUR_mA(3),
-        .l3_dark_dim            = BL_CUR_mA(0),
+        .l3_dark_dim            = ADP5520_BL_CUR_mA(0),
-        .l2_trip                = L2_COMP_CURR_uA(700),
+        .l2_trip                = ADP5520_L2_COMP_CURR_uA(700),
-        .l2_hyst                = L2_COMP_CURR_uA(50),
+        .l2_hyst                = ADP5520_L2_COMP_CURR_uA(50),
-        .l3_trip                = L3_COMP_CURR_uA(80),
+        .l3_trip                = ADP5520_L3_COMP_CURR_uA(80),
-        .l3_hyst                = L3_COMP_CURR_uA(20),
+        .l3_hyst                = ADP5520_L3_COMP_CURR_uA(20),
 };
        /*
         *  ADP5520/5501 LEDs Data
         */
-#include <linux/leds.h>
 static struct led_info adp5520_leds[] = {
        {
                .name = "adp5520-led1",
                .default_trigger = "none",
-                .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | LED_OFFT_600ms,
+                .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
        },
 #ifdef ADP5520_EN_ALL_LEDS
        {
@@ -1312,51 +1394,50 @@ static struct led_info adp5520_leds[] = {
 #endif
 };
-static struct adp5520_leds_platfrom_data adp5520_leds_data = {
+static struct adp5520_leds_platform_data adp5520_leds_data = {
        .num_leds = ARRAY_SIZE(adp5520_leds),
        .leds = adp5520_leds,
-        .fade_in = FADE_T_600ms,
+        .fade_in = ADP5520_FADE_T_600ms,
-        .fade_out = FADE_T_600ms,
+        .fade_out = ADP5520_FADE_T_600ms,
-        .led_on_time = LED_ONT_600ms,
+        .led_on_time = ADP5520_LED_ONT_600ms,
 };
        /*
         *  ADP5520 GPIO Data
         */
-static struct adp5520_gpio_platfrom_data adp5520_gpio_data = {
+static struct adp5520_gpio_platform_data adp5520_gpio_data = {
        .gpio_start = 50,
-        .gpio_en_mask = GPIO_C1 | GPIO_C2 | GPIO_R2,
+        .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
-        .gpio_pullup_mask = GPIO_C1 | GPIO_C2 | GPIO_R2,
+        .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
 };
        /*
         *  ADP5520 Keypad Data
         */
-#include <linux/input.h>
 static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
-        [KEY(0, 0)]     = KEY_GRAVE,
+        [ADP5520_KEY(0, 0)]     = KEY_GRAVE,
-        [KEY(0, 1)]     = KEY_1,
+        [ADP5520_KEY(0, 1)]     = KEY_1,
-        [KEY(0, 2)]     = KEY_2,
+        [ADP5520_KEY(0, 2)]     = KEY_2,
-        [KEY(0, 3)]     = KEY_3,
+        [ADP5520_KEY(0, 3)]     = KEY_3,
-        [KEY(1, 0)]     = KEY_4,
+        [ADP5520_KEY(1, 0)]     = KEY_4,
-        [KEY(1, 1)]     = KEY_5,
+        [ADP5520_KEY(1, 1)]     = KEY_5,
-        [KEY(1, 2)]     = KEY_6,
+        [ADP5520_KEY(1, 2)]     = KEY_6,
-        [KEY(1, 3)]     = KEY_7,
+        [ADP5520_KEY(1, 3)]     = KEY_7,
-        [KEY(2, 0)]     = KEY_8,
+        [ADP5520_KEY(2, 0)]     = KEY_8,
-        [KEY(2, 1)]     = KEY_9,
+        [ADP5520_KEY(2, 1)]     = KEY_9,
-        [KEY(2, 2)]     = KEY_0,
+        [ADP5520_KEY(2, 2)]     = KEY_0,
-        [KEY(2, 3)]     = KEY_MINUS,
+        [ADP5520_KEY(2, 3)]     = KEY_MINUS,
-        [KEY(3, 0)]     = KEY_EQUAL,
+        [ADP5520_KEY(3, 0)]     = KEY_EQUAL,
-        [KEY(3, 1)]     = KEY_BACKSLASH,
+        [ADP5520_KEY(3, 1)]     = KEY_BACKSLASH,
-        [KEY(3, 2)]     = KEY_BACKSPACE,
+        [ADP5520_KEY(3, 2)]     = KEY_BACKSPACE,
-        [KEY(3, 3)]     = KEY_ENTER,
+        [ADP5520_KEY(3, 3)]     = KEY_ENTER,
-};
+};
-static struct adp5520_keys_platfrom_data adp5520_keys_data = {
+static struct adp5520_keys_platform_data adp5520_keys_data = {
-        .rows_en_mask   = ROW_R3 | ROW_R2 | ROW_R1 | ROW_R0,
+        .rows_en_mask   = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
-        .cols_en_mask   = COL_C3 | COL_C2 | COL_C1 | COL_C0,
+        .cols_en_mask   = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
        .keymap         = adp5520_keymap,
        .keymapsize     = ARRAY_SIZE(adp5520_keymap),
        .repeat         = 0,
@@ -1366,50 +1447,81 @@ static struct adp5520_keys_platfrom_data adp5520_keys_data = {
         *  ADP5520/5501 Multifuction Device Init Data
         */
-static struct adp5520_subdev_info adp5520_subdevs[] = {
-        {
-                .name = "adp5520-backlight",
-                .id = ID_ADP5520,
-                .platform_data = &adp5520_backlight_data,
-        },
-        {
-                .name = "adp5520-led",
-                .id = ID_ADP5520,
-                .platform_data = &adp5520_leds_data,
-        },
-        {
-                .name = "adp5520-gpio",
-                .id = ID_ADP5520,
-                .platform_data = &adp5520_gpio_data,
-        },
-        {
-                .name = "adp5520-keys",
-                .id = ID_ADP5520,
-                .platform_data = &adp5520_keys_data,
-        },
-};
 static struct adp5520_platform_data adp5520_pdev_data = {
-        .num_subdevs = ARRAY_SIZE(adp5520_subdevs),
+        .backlight = &adp5520_backlight_data,
-        .subdevs = adp5520_subdevs,
+        .leds = &adp5520_leds_data,
+        .gpio = &adp5520_gpio_data,
+        .keys = &adp5520_keys_data,
 };
 #endif
 #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
 #include <linux/i2c/adp5588.h>
-static struct adp5588_gpio_platfrom_data adp5588_gpio_data = {
+static struct adp5588_gpio_platform_data adp5588_gpio_data = {
        .gpio_start = 50,
        .pullup_dis_mask = 0,
 };
 #endif
+#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
+#include <linux/i2c/adp8870.h>
+static struct led_info adp8870_leds[] = {
+        {
+                .name = "adp8870-led7",
+                .default_trigger = "none",
+                .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
+        },
+};
+static struct adp8870_backlight_platform_data adp8870_pdata = {
+        .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
+                         ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
+        .pwm_assign = 0,                                /* 1 = Enables PWM mode */
+        .bl_fade_in = ADP8870_FADE_T_1200ms,            /* Backlight Fade-In Timer */
+        .bl_fade_out = ADP8870_FADE_T_1200ms,           /* Backlight Fade-Out Timer */
+        .bl_fade_law = ADP8870_FADE_LAW_CUBIC1,         /* fade-on/fade-off transfer characteristic */
+        .en_ambl_sens = 1,                              /* 1 = enable ambient light sensor */
+        .abml_filt = ADP8870_BL_AMBL_FILT_320ms,        /* Light sensor filter time */
+        .l1_daylight_max = ADP8870_BL_CUR_mA(20),       /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
+        .l1_daylight_dim = ADP8870_BL_CUR_mA(0),        /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
+        .l2_bright_max = ADP8870_BL_CUR_mA(14),         /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
+        .l2_bright_dim = ADP8870_BL_CUR_mA(0),          /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
+        .l3_office_max = ADP8870_BL_CUR_mA(6),          /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
+        .l3_office_dim = ADP8870_BL_CUR_mA(0),          /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
+        .l4_indoor_max = ADP8870_BL_CUR_mA(3),          /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
+        .l4_indor_dim = ADP8870_BL_CUR_mA(0),           /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
+        .l5_dark_max = ADP8870_BL_CUR_mA(2),            /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
+        .l5_dark_dim = ADP8870_BL_CUR_mA(0),            /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
+        .l2_trip = ADP8870_L2_COMP_CURR_uA(710),        /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
+        .l2_hyst = ADP8870_L2_COMP_CURR_uA(73),         /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
+        .l3_trip = ADP8870_L3_COMP_CURR_uA(389),        /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
+        .l3_hyst = ADP8870_L3_COMP_CURR_uA(54),         /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
+        .l4_trip = ADP8870_L4_COMP_CURR_uA(167),        /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
+        .l4_hyst = ADP8870_L4_COMP_CURR_uA(16),         /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
+        .l5_trip = ADP8870_L5_COMP_CURR_uA(43),         /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
+        .l5_hyst = ADP8870_L5_COMP_CURR_uA(11),         /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
+        .leds = adp8870_leds,
+        .num_leds = ARRAY_SIZE(adp8870_leds),
+        .led_fade_law = ADP8870_FADE_LAW_SQUARE,        /* fade-on/fade-off transfer characteristic */
+        .led_fade_in = ADP8870_FADE_T_600ms,
+        .led_fade_out = ADP8870_FADE_T_600ms,
+        .led_on_time = ADP8870_LED_ONT_200ms,
+};
+#endif
 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
-#if defined(CONFIG_INPUT_EVAL_AD7142EB)
+#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
        {
                I2C_BOARD_INFO("ad7142_captouch", 0x2C),
                .irq = IRQ_PG5,
-                .platform_data = (void *)&ad7142_platfrom_data,
+                .platform_data = (void *)&ad7142_i2c_platform_data,
        },
 #endif
 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
@@ -1462,6 +1574,32 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
                I2C_BOARD_INFO("bfin-adv7393", 0x2B),
        },
 #endif
+#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
+        {
+                I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2C),
+        },
+#endif
+#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
+        {
+                I2C_BOARD_INFO("adp8870", 0x2B),
+                .platform_data = (void *)&adp8870_pdata,
+        },
+#endif
+#if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
+        {
+                I2C_BOARD_INFO("adau1371", 0x1A),
+        },
+#endif
+#if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
+        {
+                I2C_BOARD_INFO("adau1761", 0x38),
+        },
+#endif
+#if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
+        {
+                I2C_BOARD_INFO("ad5258", 0x18),
+        },
+#endif
 };
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
@@ -1602,8 +1740,8 @@ static struct platform_device *stamp_devices[] __initdata = {
        &dm9000_device,
 #endif
-#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
+#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
-        &ax88180_device,
+        &bfin_can_device,
 #endif
 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
diff --git a/arch/blackfin/mach-bf537/include/mach/bf537.h b/arch/blackfin/mach-bf537/include/mach/bf537.h
index 17fab4474669..8b291418ca32 100644
--- a/arch/blackfin/mach-bf537/include/mach/bf537.h
+++ b/arch/blackfin/mach-bf537/include/mach/bf537.h
@@ -9,16 +9,6 @@
 #ifndef __MACH_BF537_H__
 #define __MACH_BF537_H__
-/* Masks for generic ERROR IRQ demultiplexing used in int-priority-sc.c */
-#define SPI_ERR_MASK (TXCOL | RBSY | MODF | TXE)        /* SPI_STAT */
-#define SPORT_ERR_MASK (ROVF | RUVF | TOVF | TUVF)      /* SPORTx_STAT */
-#define PPI_ERR_MASK (0xFFFF & ~FLD)    /* PPI_STATUS */
-#define EMAC_ERR_MASK (PHYINT | MMCINT | RXFSINT | TXFSINT | WAKEDET | RXDMAERR | TXDMAERR | STMDONE)   /* EMAC_SYSTAT */
-#define UART_ERR_MASK_STAT1 (0x4)       /* UARTx_IIR */
-#define UART_ERR_MASK_STAT0 (0x2)       /* UARTx_IIR */
-#define CAN_ERR_MASK  (EWTIF | EWRIF | EPIF | BOIF | WUIF | UIAIF | AAIF | RMLIF | UCEIF | EXTIF | ADIF)        /* CAN_GIF */
 #define OFFSET_(x) ((x) & 0x0000FFFF)
 /*some misc defines*/
diff --git a/arch/blackfin/mach-bf537/include/mach/blackfin.h b/arch/blackfin/mach-bf537/include/mach/blackfin.h
index eab006d260c5..a12d4b6a221d 100644
--- a/arch/blackfin/mach-bf537/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf537/include/mach/blackfin.h
@@ -40,10 +40,4 @@
 #define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
 #define OFFSET_GCTL             0x24    /* Global Control Register              */
-/* PLL_DIV Masks                                                                                                        */
-#define CCLK_DIV1 CSEL_DIV1     /*          CCLK = VCO / 1                                  */
-#define CCLK_DIV2 CSEL_DIV2     /*          CCLK = VCO / 2                                  */
-#define CCLK_DIV4 CSEL_DIV4     /*          CCLK = VCO / 4                                  */
-#define CCLK_DIV8 CSEL_DIV8     /*          CCLK = VCO / 8                                  */
 #endif
diff --git a/arch/blackfin/mach-bf537/include/mach/defBF534.h b/arch/blackfin/mach-bf537/include/mach/defBF534.h
index a6d20ca57683..066d5c261f47 100644
--- a/arch/blackfin/mach-bf537/include/mach/defBF534.h
+++ b/arch/blackfin/mach-bf537/include/mach/defBF534.h
@@ -958,67 +958,6 @@
 **                              modifier UNLESS the lower order bits are saved and ORed back in when
 **                              the macro is used.
 *************************************************************************************/
-/*
-** ********************* PLL AND RESET MASKS ****************************************/
-/* PLL_CTL Masks                                                                                                                                        */
-#define DF                              0x0001  /* 0: PLL = CLKIN, 1: PLL = CLKIN/2                                     */
-#define PLL_OFF                 0x0002  /* PLL Not Powered                                                                      */
-#define STOPCK                  0x0008  /* Core Clock Off                                                                       */
-#define PDWN                    0x0020  /* Enter Deep Sleep Mode                                                        */
-#define IN_DELAY                0x0040  /* Add 200ps Delay To EBIU Input Latches                        */
-#define OUT_DELAY               0x0080  /* Add 200ps Delay To EBIU Output Signals                       */
-#define BYPASS                  0x0100  /* Bypass the PLL                                                                       */
-#define MSEL                    0x7E00  /* Multiplier Select For CCLK/VCO Factors                       */
-/* PLL_CTL Macros (Only Use With Logic OR While Setting Lower Order Bits)                       */
-#define SET_MSEL(x)             (((x)&0x3F) << 0x9)     /* Set MSEL = 0-63 --> VCO = CLKIN*MSEL         */
-/* PLL_DIV Masks                                                                                                                */
-#define SSEL                    0x000F  /* System Select                                                */
-#define CSEL                    0x0030  /* Core Select                                                  */
-#define CSEL_DIV1               0x0000  /*              CCLK = VCO / 1                                  */
-#define CSEL_DIV2               0x0010  /*              CCLK = VCO / 2                                  */
-#define CSEL_DIV4               0x0020  /*              CCLK = VCO / 4                                  */
-#define CSEL_DIV8               0x0030  /*              CCLK = VCO / 8                                  */
-/* PLL_DIV Macros                                                                                                               */
-#define SET_SSEL(x)             ((x)&0xF)       /* Set SSEL = 0-15 --> SCLK = VCO/SSEL  */
-/* VR_CTL Masks                                                                                                                                 */
-#define FREQ                    0x0003  /* Switching Oscillator Frequency For Regulator */
-#define HIBERNATE               0x0000  /*              Powerdown/Bypass On-Board Regulation    */
-#define FREQ_333                0x0001  /*              Switching Frequency Is 333 kHz                  */
-#define FREQ_667                0x0002  /*              Switching Frequency Is 667 kHz                  */
-#define FREQ_1000               0x0003  /*              Switching Frequency Is 1 MHz                    */
-#define GAIN                    0x000C  /* Voltage Level Gain   */
-#define GAIN_5                  0x0000  /*              GAIN = 5                */
-#define GAIN_10                 0x0004  /*              GAIN = 10               */
-#define GAIN_20                 0x0008  /*              GAIN = 20               */
-#define GAIN_50                 0x000C  /*              GAIN = 50               */
-#define VLEV                    0x00F0  /* Internal Voltage Level                                       */
-#define VLEV_085                0x0060  /*              VLEV = 0.85 V (-5% - +10% Accuracy)     */
-#define VLEV_090                0x0070  /*              VLEV = 0.90 V (-5% - +10% Accuracy)     */
-#define VLEV_095                0x0080  /*              VLEV = 0.95 V (-5% - +10% Accuracy)     */
-#define VLEV_100                0x0090  /*              VLEV = 1.00 V (-5% - +10% Accuracy)     */
-#define VLEV_105                0x00A0  /*              VLEV = 1.05 V (-5% - +10% Accuracy)     */
-#define VLEV_110                0x00B0  /*              VLEV = 1.10 V (-5% - +10% Accuracy)     */
-#define VLEV_115                0x00C0  /*              VLEV = 1.15 V (-5% - +10% Accuracy)     */
-#define VLEV_120                0x00D0  /*              VLEV = 1.20 V (-5% - +10% Accuracy)     */
-#define VLEV_125                0x00E0  /*              VLEV = 1.25 V (-5% - +10% Accuracy)     */
-#define VLEV_130                0x00F0  /*              VLEV = 1.30 V (-5% - +10% Accuracy)     */
-#define WAKE                    0x0100  /* Enable RTC/Reset Wakeup From Hibernate       */
-#define CANWE                   0x0200  /* Enable CAN Wakeup From Hibernate                     */
-#define PHYWE                   0x0400  /* Enable PHY Wakeup From Hibernate                     */
-#define CLKBUFOE                0x4000  /* CLKIN Buffer Output Enable */
-#define PHYCLKOE                CLKBUFOE        /* Alternative legacy name for the above */
-#define SCKELOW         0x8000  /* Enable Drive CKE Low During Reset            */
-/* PLL_STAT Masks                                                                                                                                       */
-#define ACTIVE_PLLENABLED       0x0001  /* Processor In Active Mode With PLL Enabled    */
-#define FULL_ON                         0x0002  /* Processor In Full On Mode                                    */
-#define ACTIVE_PLLDISABLED      0x0004  /* Processor In Active Mode With PLL Disabled   */
-#define PLL_LOCKED                      0x0020  /* PLL_LOCKCNT Has Been Reached                                 */
 /* CHIPID Masks */
 #define CHIPID_VERSION         0xF0000000
@@ -1645,34 +1584,6 @@
 #define BGSTAT                  0x0020  /* Bus Grant Status                                             */
 /* **************************  DMA CONTROLLER MASKS  ********************************/
-/* DMAx_CONFIG, MDMA_yy_CONFIG Masks                                                                                            */
-#define DMAEN                   0x0001  /* DMA Channel Enable                                                   */
-#define WNR                             0x0002  /* Channel Direction (W/R*)                                             */
-#define WDSIZE_8                0x0000  /* Transfer Word Size = 8                                               */
-#define WDSIZE_16               0x0004  /* Transfer Word Size = 16                                              */
-#define WDSIZE_32               0x0008  /* Transfer Word Size = 32                                              */
-#define DMA2D                   0x0010  /* DMA Mode (2D/1D*)                                                    */
-#define RESTART                 0x0020  /* DMA Buffer Clear                                                             */
-#define DI_SEL                  0x0040  /* Data Interrupt Timing Select                                 */
-#define DI_EN                   0x0080  /* Data Interrupt Enable                                                */
-#define NDSIZE_0                0x0000  /* Next Descriptor Size = 0 (Stop/Autobuffer)   */
-#define NDSIZE_1                0x0100  /* Next Descriptor Size = 1                                             */
-#define NDSIZE_2                0x0200  /* Next Descriptor Size = 2                                             */
-#define NDSIZE_3                0x0300  /* Next Descriptor Size = 3                                             */
-#define NDSIZE_4                0x0400  /* Next Descriptor Size = 4                                             */
-#define NDSIZE_5                0x0500  /* Next Descriptor Size = 5                                             */
-#define NDSIZE_6                0x0600  /* Next Descriptor Size = 6                                             */
-#define NDSIZE_7                0x0700  /* Next Descriptor Size = 7                                             */
-#define NDSIZE_8                0x0800  /* Next Descriptor Size = 8                                             */
-#define NDSIZE_9                0x0900  /* Next Descriptor Size = 9                                             */
-#define NDSIZE                  0x0900  /* Next Descriptor Size */
-#define DMAFLOW                 0x7000  /* Flow Control */
-#define DMAFLOW_STOP            0x0000  /* Stop Mode */
-#define DMAFLOW_AUTO            0x1000  /* Autobuffer Mode */
-#define DMAFLOW_ARRAY           0x4000  /* Descriptor Array Mode */
-#define DMAFLOW_SMALL           0x6000  /* Small Model Descriptor List Mode */
-#define DMAFLOW_LARGE           0x7000  /* Large Model Descriptor List Mode */
 /* DMAx_PERIPHERAL_MAP, MDMA_yy_PERIPHERAL_MAP Masks                                                            */
 #define CTYPE                   0x0040  /* DMA Channel Type Indicator (Memory/Peripheral*)      */
@@ -1690,12 +1601,6 @@
 #define PMAP_UART1RX    0xA000  /*              UART1 Port Receive DMA                                          */
 #define PMAP_UART1TX    0xB000  /*              UART1 Port Transmit DMA                                         */
-/* DMAx_IRQ_STATUS, MDMA_yy_IRQ_STATUS Masks                                            */
-#define DMA_DONE                0x0001  /* DMA Completion Interrupt Status      */
-#define DMA_ERR                 0x0002  /* DMA Error Interrupt Status           */
-#define DFETCH                  0x0004  /* DMA Descriptor Fetch Indicator       */
-#define DMA_RUN                 0x0008  /* DMA Channel Running Indicator        */
 /*  ************  PARALLEL PERIPHERAL INTERFACE (PPI) MASKS *************/
 /*  PPI_CONTROL Masks                                                                                                   */
 #define PORT_EN                 0x0001  /* PPI Port Enable                                      */
diff --git a/arch/blackfin/mach-bf538/Makefile b/arch/blackfin/mach-bf538/Makefile
index 8cd2719684db..c0be54f2cd2b 100644
--- a/arch/blackfin/mach-bf538/Makefile
+++ b/arch/blackfin/mach-bf538/Makefile
@@ -3,3 +3,4 @@
 #
 obj-y := ints-priority.o dma.o
+obj-$(CONFIG_GPIOLIB)   += ext-gpio.o
diff --git a/arch/blackfin/mach-bf538/boards/ezkit.c b/arch/blackfin/mach-bf538/boards/ezkit.c
index 14af5c2088d4..c296bb1ed503 100644
--- a/arch/blackfin/mach-bf538/boards/ezkit.c
+++ b/arch/blackfin/mach-bf538/boards/ezkit.c
@@ -151,6 +151,44 @@ static struct platform_device bfin_sir2_device = {
 #endif
 #endif
+#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
+unsigned short bfin_can_peripherals[] = {
+        P_CAN0_RX, P_CAN0_TX, 0
+};
+static struct resource bfin_can_resources[] = {
+        {
+                .start = 0xFFC02A00,
+                .end = 0xFFC02FFF,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_CAN_RX,
+                .end = IRQ_CAN_RX,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_CAN_TX,
+                .end = IRQ_CAN_TX,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_CAN_ERROR,
+                .end = IRQ_CAN_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device bfin_can_device = {
+        .name = "bfin_can",
+        .num_resources = ARRAY_SIZE(bfin_can_resources),
+        .resource = bfin_can_resources,
+        .dev = {
+                .platform_data = &bfin_can_peripherals, /* Passed to driver */
+        },
+};
+#endif
 /*
 *  USB-LAN EzExtender board
 *  Driver needs to know address, irq and flag pin.
@@ -610,6 +648,10 @@ static struct platform_device *cm_bf538_devices[] __initdata = {
 #endif
 #endif
+#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
+        &bfin_can_device,
+#endif
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
        &smc91x_device,
 #endif
diff --git a/arch/blackfin/mach-bf538/ext-gpio.c b/arch/blackfin/mach-bf538/ext-gpio.c
new file mode 100644
index 000000000000..180b1252679f
--- /dev/null
+++ b/arch/blackfin/mach-bf538/ext-gpio.c
@@ -0,0 +1,123 @@
+/*
+ * GPIOLIB interface for BF538/9 PORT C, D, and E GPIOs
+ *
+ * Copyright 2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+#include <linux/module.h>
+#include <linux/err.h>
+#include <asm/blackfin.h>
+#include <asm/gpio.h>
+#include <asm/portmux.h>
+#define DEFINE_REG(reg, off) \
+static inline u16 read_##reg(void __iomem *port) \
+        { return bfin_read16(port + off); } \
+static inline void write_##reg(void __iomem *port, u16 v) \
+        { bfin_write16(port + off, v); }
+DEFINE_REG(PORTIO, 0x00)
+DEFINE_REG(PORTIO_CLEAR, 0x10)
+DEFINE_REG(PORTIO_SET, 0x20)
+DEFINE_REG(PORTIO_DIR, 0x40)
+DEFINE_REG(PORTIO_INEN, 0x50)
+static void __iomem *gpio_chip_to_mmr(struct gpio_chip *chip)
+{
+        switch (chip->base) {
+        default: /* not really needed, but keeps gcc happy */
+        case GPIO_PC0: return (void __iomem *)PORTCIO;
+        case GPIO_PD0: return (void __iomem *)PORTDIO;
+        case GPIO_PE0: return (void __iomem *)PORTEIO;
+        }
+}
+static int bf538_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
+{
+        void __iomem *port = gpio_chip_to_mmr(chip);
+        return !!(read_PORTIO(port) & (1u << gpio));
+}
+static void bf538_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value)
+{
+        void __iomem *port = gpio_chip_to_mmr(chip);
+        if (value)
+                write_PORTIO_SET(port, (1u << gpio));
+        else
+                write_PORTIO_CLEAR(port, (1u << gpio));
+}
+static int bf538_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
+{
+        void __iomem *port = gpio_chip_to_mmr(chip);
+        write_PORTIO_DIR(port, read_PORTIO_DIR(port) & ~(1u << gpio));
+        write_PORTIO_INEN(port, read_PORTIO_INEN(port) | (1u << gpio));
+        return 0;
+}
+static int bf538_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int value)
+{
+        void __iomem *port = gpio_chip_to_mmr(chip);
+        write_PORTIO_INEN(port, read_PORTIO_INEN(port) & ~(1u << gpio));
+        bf538_gpio_set_value(port, gpio, value);
+        write_PORTIO_DIR(port, read_PORTIO_DIR(port) | (1u << gpio));
+        return 0;
+}
+static int bf538_gpio_request(struct gpio_chip *chip, unsigned gpio)
+{
+        return bfin_special_gpio_request(chip->base + gpio, chip->label);
+}
+static void bf538_gpio_free(struct gpio_chip *chip, unsigned gpio)
+{
+        return bfin_special_gpio_free(chip->base + gpio);
+}
+/* We don't set the irq fields as these banks cannot generate interrupts */
+static struct gpio_chip bf538_portc_chip = {
+        .label = "GPIO-PC",
+        .direction_input = bf538_gpio_direction_input,
+        .get = bf538_gpio_get_value,
+        .direction_output = bf538_gpio_direction_output,
+        .set = bf538_gpio_set_value,
+        .request = bf538_gpio_request,
+        .free = bf538_gpio_free,
+        .base = GPIO_PC0,
+        .ngpio = GPIO_PC9 - GPIO_PC0 + 1,
+};
+static struct gpio_chip bf538_portd_chip = {
+        .label = "GPIO-PD",
+        .direction_input = bf538_gpio_direction_input,
+        .get = bf538_gpio_get_value,
+        .direction_output = bf538_gpio_direction_output,
+        .set = bf538_gpio_set_value,
+        .request = bf538_gpio_request,
+        .free = bf538_gpio_free,
+        .base = GPIO_PD0,
+        .ngpio = GPIO_PD13 - GPIO_PD0 + 1,
+};
+static struct gpio_chip bf538_porte_chip = {
+        .label = "GPIO-PE",
+        .direction_input = bf538_gpio_direction_input,
+        .get = bf538_gpio_get_value,
+        .direction_output = bf538_gpio_direction_output,
+        .set = bf538_gpio_set_value,
+        .request = bf538_gpio_request,
+        .free = bf538_gpio_free,
+        .base = GPIO_PE0,
+        .ngpio = GPIO_PE15 - GPIO_PE0 + 1,
+};
+static int __init bf538_extgpio_setup(void)
+{
+        return gpiochip_add(&bf538_portc_chip) |
+                gpiochip_add(&bf538_portd_chip) |
+                gpiochip_add(&bf538_porte_chip);
+}
+arch_initcall(bf538_extgpio_setup);
diff --git a/arch/blackfin/mach-bf538/include/mach/blackfin.h b/arch/blackfin/mach-bf538/include/mach/blackfin.h
index 278e8942eef2..08b5eabb1ed5 100644
--- a/arch/blackfin/mach-bf538/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf538/include/mach/blackfin.h
@@ -37,10 +37,4 @@
 #define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
 #define OFFSET_GCTL             0x24    /* Global Control Register              */
-/* PLL_DIV Masks                                                                                                        */
-#define CCLK_DIV1 CSEL_DIV1     /*          CCLK = VCO / 1                                  */
-#define CCLK_DIV2 CSEL_DIV2     /*          CCLK = VCO / 2                                  */
-#define CCLK_DIV4 CSEL_DIV4     /*          CCLK = VCO / 4                                  */
-#define CCLK_DIV8 CSEL_DIV8     /*          CCLK = VCO / 8                                  */
 #endif
diff --git a/arch/blackfin/mach-bf538/include/mach/defBF539.h b/arch/blackfin/mach-bf538/include/mach/defBF539.h
index 5f6c34dfd08e..fac563e6f62f 100644
--- a/arch/blackfin/mach-bf538/include/mach/defBF539.h
+++ b/arch/blackfin/mach-bf538/include/mach/defBF539.h
@@ -468,31 +468,31 @@
 /* General-Purpose Ports  (0xFFC01500 - 0xFFC015FF)      */
 /* GPIO Port C Register Names */
-#define GPIO_C_CNFG                     0xFFC01500      /* GPIO Pin Port C Configuration Register */
+#define PORTCIO_FER                     0xFFC01500      /* GPIO Pin Port C Configuration Register */
-#define GPIO_C_D                        0xFFC01510      /* GPIO Pin Port C Data Register */
+#define PORTCIO                         0xFFC01510      /* GPIO Pin Port C Data Register */
-#define GPIO_C_C                        0xFFC01520      /* Clear GPIO Pin Port C Register */
+#define PORTCIO_CLEAR                   0xFFC01520      /* Clear GPIO Pin Port C Register */
-#define GPIO_C_S                        0xFFC01530      /* Set GPIO Pin Port C Register */
+#define PORTCIO_SET                     0xFFC01530      /* Set GPIO Pin Port C Register */
-#define GPIO_C_T                        0xFFC01540      /* Toggle GPIO Pin Port C Register */
+#define PORTCIO_TOGGLE                  0xFFC01540      /* Toggle GPIO Pin Port C Register */
-#define GPIO_C_DIR                      0xFFC01550      /* GPIO Pin Port C Direction Register */
+#define PORTCIO_DIR                     0xFFC01550      /* GPIO Pin Port C Direction Register */
-#define GPIO_C_INEN                     0xFFC01560      /* GPIO Pin Port C Input Enable Register */
+#define PORTCIO_INEN                    0xFFC01560      /* GPIO Pin Port C Input Enable Register */
 /* GPIO Port D Register Names */
-#define GPIO_D_CNFG                     0xFFC01504      /* GPIO Pin Port D Configuration Register */
+#define PORTDIO_FER                     0xFFC01504      /* GPIO Pin Port D Configuration Register */
-#define GPIO_D_D                        0xFFC01514      /* GPIO Pin Port D Data Register */
+#define PORTDIO                         0xFFC01514      /* GPIO Pin Port D Data Register */
-#define GPIO_D_C                        0xFFC01524      /* Clear GPIO Pin Port D Register */
+#define PORTDIO_CLEAR                   0xFFC01524      /* Clear GPIO Pin Port D Register */
-#define GPIO_D_S                        0xFFC01534      /* Set GPIO Pin Port D Register */
+#define PORTDIO_SET                     0xFFC01534      /* Set GPIO Pin Port D Register */
-#define GPIO_D_T                        0xFFC01544      /* Toggle GPIO Pin Port D Register */
+#define PORTDIO_TOGGLE                  0xFFC01544      /* Toggle GPIO Pin Port D Register */
-#define GPIO_D_DIR                      0xFFC01554      /* GPIO Pin Port D Direction Register */
+#define PORTDIO_DIR                     0xFFC01554      /* GPIO Pin Port D Direction Register */
-#define GPIO_D_INEN                     0xFFC01564      /* GPIO Pin Port D Input Enable Register */
+#define PORTDIO_INEN                    0xFFC01564      /* GPIO Pin Port D Input Enable Register */
 /* GPIO Port E Register Names */
-#define GPIO_E_CNFG                     0xFFC01508      /* GPIO Pin Port E Configuration Register */
+#define PORTEIO_FER                     0xFFC01508      /* GPIO Pin Port E Configuration Register */
-#define GPIO_E_D                        0xFFC01518      /* GPIO Pin Port E Data Register */
+#define PORTEIO                         0xFFC01518      /* GPIO Pin Port E Data Register */
-#define GPIO_E_C                        0xFFC01528      /* Clear GPIO Pin Port E Register */
+#define PORTEIO_CLEAR                   0xFFC01528      /* Clear GPIO Pin Port E Register */
-#define GPIO_E_S                        0xFFC01538      /* Set GPIO Pin Port E Register */
+#define PORTEIO_SET                     0xFFC01538      /* Set GPIO Pin Port E Register */
-#define GPIO_E_T                        0xFFC01548      /* Toggle GPIO Pin Port E Register */
+#define PORTEIO_TOGGLE                  0xFFC01548      /* Toggle GPIO Pin Port E Register */
-#define GPIO_E_DIR                      0xFFC01558      /* GPIO Pin Port E Direction Register */
+#define PORTEIO_DIR                     0xFFC01558      /* GPIO Pin Port E Direction Register */
-#define GPIO_E_INEN                     0xFFC01568      /* GPIO Pin Port E Input Enable Register */
+#define PORTEIO_INEN                    0xFFC01568      /* GPIO Pin Port E Input Enable Register */
 /* DMA Controller 1 Traffic Control Registers (0xFFC01B00 - 0xFFC01BFF) */
@@ -1422,81 +1422,6 @@
 /* System MMR Register Bits and Macros */
 /******************************************************************************* */
-/* ********************* PLL AND RESET MASKS ************************ */
-/* PLL_CTL Masks */
-#define PLL_CLKIN                       0x0000  /* Pass CLKIN to PLL */
-#define PLL_CLKIN_DIV2          0x0001  /* Pass CLKIN/2 to PLL */
-#define DF                                      0x0001   /* 0: PLL = CLKIN, 1: PLL = CLKIN/2 */
-#define PLL_OFF                         0x0002  /* Shut off PLL clocks */
-#define STOPCK                          0x0008  /* Core Clock Off                */
-#define PDWN                            0x0020  /* Put the PLL in a Deep Sleep state */
-#define IN_DELAY                        0x0014  /* EBIU Input Delay Select */
-#define OUT_DELAY                       0x00C0  /* EBIU Output Delay Select */
-#define BYPASS                          0x0100  /* Bypass the PLL */
-#define MSEL                    0x7E00  /* Multiplier Select For CCLK/VCO Factors */
-/* PLL_CTL Macros                                */
-#ifdef _MISRA_RULES
-#define SET_MSEL(x)             (((x)&0x3Fu) << 0x9)    /* Set MSEL = 0-63 --> VCO = CLKIN*MSEL */
-#define SET_OUT_DELAY(x)        (((x)&0x03u) << 0x6)
-#define SET_IN_DELAY(x)         ((((x)&0x02u) << 0x3) | (((x)&0x01u) << 0x2))
-#else
-#define SET_MSEL(x)             (((x)&0x3F) << 0x9)     /* Set MSEL = 0-63 --> VCO = CLKIN*MSEL */
-#define SET_OUT_DELAY(x)        (((x)&0x03) << 0x6)
-#define SET_IN_DELAY(x)         ((((x)&0x02) << 0x3) | (((x)&0x01) << 0x2))
-#endif /* _MISRA_RULES */
-/* PLL_DIV Masks */
-#define SSEL                            0x000F  /* System Select */
-#define CSEL                            0x0030  /* Core Select */
-#define CSEL_DIV1               0x0000  /*              CCLK = VCO / 1 */
-#define CSEL_DIV2               0x0010  /*              CCLK = VCO / 2 */
-#define CSEL_DIV4               0x0020  /*              CCLK = VCO / 4 */
-#define CSEL_DIV8               0x0030  /*              CCLK = VCO / 8 */
-#define SCLK_DIV(x)                     (x)             /* SCLK = VCO / x */
-/* PLL_DIV Macros                                                        */
-#ifdef _MISRA_RULES
-#define SET_SSEL(x)                     ((x)&0xFu)      /* Set SSEL = 0-15 --> SCLK = VCO/SSEL */
-#else
-#define SET_SSEL(x)                     ((x)&0xF)       /* Set SSEL = 0-15 --> SCLK = VCO/SSEL */
-#endif /* _MISRA_RULES */
-/* PLL_STAT Masks                                                                                */
-#define ACTIVE_PLLENABLED       0x0001  /* Processor In Active Mode With PLL Enabled */
-#define FULL_ON                         0x0002  /* Processor In Full On Mode */
-#define ACTIVE_PLLDISABLED      0x0004  /* Processor In Active Mode With PLL Disabled */
-#define PLL_LOCKED                      0x0020  /* PLL_LOCKCNT Has Been Reached */
-/* VR_CTL Masks                                                                          */
-#define FREQ                    0x0003  /* Switching Oscillator Frequency For Regulator */
-#define HIBERNATE               0x0000  /*              Powerdown/Bypass On-Board Regulation */
-#define FREQ_333                0x0001  /*              Switching Frequency Is 333 kHz */
-#define FREQ_667                0x0002  /*              Switching Frequency Is 667 kHz */
-#define FREQ_1000               0x0003  /*              Switching Frequency Is 1 MHz */
-#define GAIN                    0x000C  /* Voltage Level Gain */
-#define GAIN_5                  0x0000  /*              GAIN = 5 */
-#define GAIN_10                 0x0004  /*              GAIN = 10 */
-#define GAIN_20                 0x0008  /*              GAIN = 20 */
-#define GAIN_50                 0x000C  /*              GAIN = 50 */
-#define VLEV                    0x00F0  /* Internal Voltage Level - Only Program Values Within Specifications */
-#define VLEV_100                0x0090  /*      VLEV = 1.00 V (See Datasheet for Regulator Tolerance) */
-#define VLEV_105                0x00A0  /*      VLEV = 1.05 V (See Datasheet for Regulator Tolerance) */
-#define VLEV_110                0x00B0  /*      VLEV = 1.10 V (See Datasheet for Regulator Tolerance) */
-#define VLEV_115                0x00C0  /*      VLEV = 1.15 V (See Datasheet for Regulator Tolerance) */
-#define VLEV_120                0x00D0  /*      VLEV = 1.20 V (See Datasheet for Regulator Tolerance) */
-#define VLEV_125                0x00E0  /*      VLEV = 1.25 V (See Datasheet for Regulator Tolerance) */
-#define VLEV_130                0x00F0  /*      VLEV = 1.30 V (See Datasheet for Regulator Tolerance) */
-#define WAKE                    0x0100  /* Enable RTC/Reset Wakeup From Hibernate */
-#define CANWE                   0x0200  /* Enable CAN Wakeup From Hibernate */
-#define MXVRWE                  0x0400  /* Enable MXVR Wakeup From Hibernate */
-#define SCKELOW                 0x8000  /* Do Not Drive SCKE High During Reset After Hibernate */
 /* SWRST Mask */
 #define SYSTEM_RESET    0x0007  /* Initiates A System Software Reset */
 #define DOUBLE_FAULT    0x0008  /* Core Double Fault Causes Reset */
@@ -1609,91 +1534,6 @@
 #endif /* _MISRA_RULES */
-/* ********* WATCHDOG TIMER MASKS ******************** */
-/* Watchdog Timer WDOG_CTL Register Masks */
-#ifdef _MISRA_RULES
-#define WDEV(x)                 (((x)<<1) & 0x0006u)    /* event generated on roll over */
-#else
-#define WDEV(x)                 (((x)<<1) & 0x0006)     /* event generated on roll over */
-#endif /* _MISRA_RULES */
-#define WDEV_RESET              0x0000                          /* generate reset event on roll over */
-#define WDEV_NMI                0x0002                          /* generate NMI event on roll over */
-#define WDEV_GPI                0x0004                          /* generate GP IRQ on roll over */
-#define WDEV_NONE               0x0006                          /* no event on roll over */
-#define WDEN                    0x0FF0                          /* enable watchdog */
-#define WDDIS                   0x0AD0                          /* disable watchdog */
-#define WDRO                    0x8000                          /* watchdog rolled over latch */
-/* deprecated WDOG_CTL Register Masks for legacy code */
-#define ICTL WDEV
-#define ENABLE_RESET    WDEV_RESET
-#define WDOG_RESET              WDEV_RESET
-#define ENABLE_NMI              WDEV_NMI
-#define WDOG_NMI                WDEV_NMI
-#define ENABLE_GPI              WDEV_GPI
-#define WDOG_GPI                WDEV_GPI
-#define DISABLE_EVT     WDEV_NONE
-#define WDOG_NONE               WDEV_NONE
-#define TMR_EN                  WDEN
-#define WDOG_DISABLE            WDDIS
-#define TRO                     WDRO
-#define ICTL_P0                 0x01
-#define ICTL_P1                 0x02
-#define TRO_P                   0x0F
-/* ***************  REAL TIME CLOCK MASKS  **************************/
-/* RTC_STAT and RTC_ALARM register */
-#define RTSEC           0x0000003F      /* Real-Time Clock Seconds */
-#define RTMIN           0x00000FC0      /* Real-Time Clock Minutes */
-#define RTHR            0x0001F000      /* Real-Time Clock Hours */
-#define RTDAY           0xFFFE0000      /* Real-Time Clock Days */
-/* RTC_ICTL register */
-#define SWIE            0x0001          /* Stopwatch Interrupt Enable */
-#define AIE                     0x0002          /* Alarm Interrupt Enable */
-#define SIE                     0x0004          /* Seconds (1 Hz) Interrupt Enable */
-#define MIE                     0x0008          /* Minutes Interrupt Enable */
-#define HIE                     0x0010          /* Hours Interrupt Enable */
-#define DIE                     0x0020          /* 24 Hours (Days) Interrupt Enable */
-#define DAIE            0x0040          /* Day Alarm (Day, Hour, Minute, Second) Interrupt Enable */
-#define WCIE            0x8000          /* Write Complete Interrupt Enable */
-/* RTC_ISTAT register */
-#define SWEF            0x0001          /* Stopwatch Event Flag */
-#define AEF                     0x0002          /* Alarm Event Flag */
-#define SEF                     0x0004          /* Seconds (1 Hz) Event Flag */
-#define MEF                     0x0008          /* Minutes Event Flag */
-#define HEF                     0x0010          /* Hours Event Flag */
-#define DEF                     0x0020          /* 24 Hours (Days) Event Flag */
-#define DAEF            0x0040          /* Day Alarm (Day, Hour, Minute, Second) Event Flag */
-#define WPS                     0x4000          /* Write Pending Status (RO) */
-#define WCOM            0x8000          /* Write Complete */
-/* RTC_FAST Mask (RTC_PREN Mask) */
-#define ENABLE_PRESCALE      0x00000001  /* Enable prescaler so RTC runs at 1 Hz */
-#define PREN                 0x00000001
-                /* ** Must be set after power-up for proper operation of RTC */
-/* Deprecated RTC_STAT and RTC_ALARM Masks                       */
-#define RTC_SEC                 RTSEC   /* Real-Time Clock Seconds */
-#define RTC_MIN                 RTMIN   /* Real-Time Clock Minutes */
-#define RTC_HR                  RTHR    /* Real-Time Clock Hours */
-#define RTC_DAY                 RTDAY   /* Real-Time Clock Days */
-/* Deprecated RTC_ICTL/RTC_ISTAT Masks                                                                                   */
-#define STOPWATCH               SWIE            /* Stopwatch Interrupt Enable    */
-#define ALARM                   AIE             /* Alarm Interrupt Enable                */
-#define SECOND                  SIE             /* Seconds (1 Hz) Interrupt Enable */
-#define MINUTE                  MIE             /* Minutes Interrupt Enable              */
-#define HOUR                    HIE             /* Hours Interrupt Enable                */
-#define DAY                             DIE             /* 24 Hours (Days) Interrupt Enable */
-#define DAY_ALARM               DAIE            /* Day Alarm (Day, Hour, Minute, Second) Interrupt Enable */
-#define WRITE_COMPLETE  WCIE            /* Write Complete Interrupt Enable */
 /* ***************************** UART CONTROLLER MASKS ********************** */
 /* UARTx_LCR Register */
 #ifdef _MISRA_RULES
@@ -1917,52 +1757,6 @@
 /* **********  DMA CONTROLLER MASKS  ***********************/
-/* DMAx_CONFIG, MDMA_yy_CONFIG Masks */
-#define DMAEN           0x0001  /* Channel Enable */
-#define WNR                     0x0002  /* Channel Direction (W/R*) */
-#define WDSIZE_8        0x0000  /* Word Size 8 bits */
-#define WDSIZE_16       0x0004  /* Word Size 16 bits */
-#define WDSIZE_32       0x0008  /* Word Size 32 bits */
-#define DMA2D           0x0010  /* 2D/1D* Mode */
-#define RESTART         0x0020  /* Restart */
-#define DI_SEL          0x0040  /* Data Interrupt Select */
-#define DI_EN           0x0080  /* Data Interrupt Enable */
-#define NDSIZE          0x0900  /* Next Descriptor Size */
-#define NDSIZE_0        0x0000  /* Next Descriptor Size = 0 (Stop/Autobuffer) */
-#define NDSIZE_1        0x0100  /* Next Descriptor Size = 1 */
-#define NDSIZE_2        0x0200  /* Next Descriptor Size = 2 */
-#define NDSIZE_3        0x0300  /* Next Descriptor Size = 3 */
-#define NDSIZE_4        0x0400  /* Next Descriptor Size = 4 */
-#define NDSIZE_5        0x0500  /* Next Descriptor Size = 5 */
-#define NDSIZE_6        0x0600  /* Next Descriptor Size = 6 */
-#define NDSIZE_7        0x0700  /* Next Descriptor Size = 7 */
-#define NDSIZE_8        0x0800  /* Next Descriptor Size = 8 */
-#define NDSIZE_9        0x0900  /* Next Descriptor Size = 9 */
-#define DMAFLOW                 0x7000  /* Flow Control */
-#define DMAFLOW_STOP            0x0000  /* Stop Mode */
-#define DMAFLOW_AUTO            0x1000  /* Autobuffer Mode */
-#define DMAFLOW_ARRAY           0x4000  /* Descriptor Array Mode */
-#define DMAFLOW_SMALL           0x6000  /* Small Model Descriptor List Mode */
-#define DMAFLOW_LARGE           0x7000  /* Large Model Descriptor List Mode */
-#define DMAEN_P         0x0             /* Channel Enable */
-#define WNR_P           0x1             /* Channel Direction (W/R*) */
-#define DMA2D_P         0x4             /* 2D/1D* Mode */
-#define RESTART_P       0x5             /* Restart */
-#define DI_SEL_P        0x6             /* Data Interrupt Select */
-#define DI_EN_P         0x7             /* Data Interrupt Enable */
-/* DMAx_IRQ_STATUS, MDMA_yy_IRQ_STATUS Masks */
-#define DMA_DONE        0x0001  /* DMA Done Indicator */
-#define DMA_ERR         0x0002  /* DMA Error Indicator */
-#define DFETCH          0x0004  /* Descriptor Fetch Indicator */
-#define DMA_RUN         0x0008  /* DMA Running Indicator */
-#define DMA_DONE_P      0x0             /* DMA Done Indicator */
-#define DMA_ERR_P       0x1             /* DMA Error Indicator */
-#define DFETCH_P        0x2             /* Descriptor Fetch Indicator */
-#define DMA_RUN_P       0x3             /* DMA Running Indicator */
 /* DMAx_PERIPHERAL_MAP, MDMA_yy_PERIPHERAL_MAP Masks */
@@ -2625,1019 +2419,6 @@
 #define RCV_FULL        0x000C          /*              Receive FIFO Full (2 Bytes To Read) */
-/********************************* MXVR MASKS ****************************************/
-/* MXVR_CONFIG Masks */
-#define MXVREN    0x00000001lu
-#define MMSM      0x00000002lu
-#define ACTIVE    0x00000004lu
-#define SDELAY    0x00000008lu
-#define NCMRXEN   0x00000010lu
-#define RWRRXEN   0x00000020lu
-#define MTXEN     0x00000040lu
-#define MTXON     0x00000080lu /*legacy*/
-#define MTXONB    0x00000080lu
-#define EPARITY   0x00000100lu
-#define MSB       0x00001E00lu
-#define APRXEN    0x00002000lu
-#define WAKEUP    0x00004000lu
-#define LMECH     0x00008000lu
-#ifdef _MISRA_RULES
-#define SET_MSB(x)     (((x)&0xFu) << 0x9)
-#else
-#define SET_MSB(x)     (((x)&0xF) << 0x9)
-#endif /* _MISRA_RULES */
-/* MXVR_PLL_CTL_0 Masks */
-#define MXTALCEN  0x00000001lu
-#define MXTALFEN  0x00000002lu
-#define MPLLMS    0x00000008lu
-#define MXTALMUL  0x00000030lu
-#define MPLLEN    0x00000040lu
-#define MPLLEN0   0x00000040lu /* legacy */
-#define MPLLEN1   0x00000080lu /* legacy */
-#define MMCLKEN   0x00000100lu
-#define MMCLKMUL  0x00001E00lu
-#define MPLLRSTB  0x00002000lu
-#define MPLLRSTB0 0x00002000lu /* legacy */
-#define MPLLRSTB1 0x00004000lu /* legacy */
-#define MBCLKEN   0x00010000lu
-#define MBCLKDIV  0x001E0000lu
-#define MPLLCDR   0x00200000lu
-#define MPLLCDR0  0x00200000lu /* legacy */
-#define MPLLCDR1  0x00400000lu /* legacy */
-#define INVRX     0x00800000lu
-#define MFSEN     0x01000000lu
-#define MFSDIV    0x1E000000lu
-#define MFSSEL    0x60000000lu
-#define MFSSYNC   0x80000000lu
-#define MXTALMUL_256FS   0x00000000lu /* legacy */
-#define MXTALMUL_384FS   0x00000010lu /* legacy */
-#define MXTALMUL_512FS   0x00000020lu /* legacy */
-#define MXTALMUL_1024FS  0x00000030lu
-#define MMCLKMUL_1024FS  0x00000000lu
-#define MMCLKMUL_512FS   0x00000200lu
-#define MMCLKMUL_256FS   0x00000400lu
-#define MMCLKMUL_128FS   0x00000600lu
-#define MMCLKMUL_64FS    0x00000800lu
-#define MMCLKMUL_32FS    0x00000A00lu
-#define MMCLKMUL_16FS    0x00000C00lu
-#define MMCLKMUL_8FS     0x00000E00lu
-#define MMCLKMUL_4FS     0x00001000lu
-#define MMCLKMUL_2FS     0x00001200lu
-#define MMCLKMUL_1FS     0x00001400lu
-#define MMCLKMUL_1536FS  0x00001A00lu
-#define MMCLKMUL_768FS   0x00001C00lu
-#define MMCLKMUL_384FS   0x00001E00lu
-#define MBCLKDIV_DIV2    0x00020000lu
-#define MBCLKDIV_DIV4    0x00040000lu
-#define MBCLKDIV_DIV8    0x00060000lu
-#define MBCLKDIV_DIV16   0x00080000lu
-#define MBCLKDIV_DIV32   0x000A0000lu
-#define MBCLKDIV_DIV64   0x000C0000lu
-#define MBCLKDIV_DIV128  0x000E0000lu
-#define MBCLKDIV_DIV256  0x00100000lu
-#define MBCLKDIV_DIV512  0x00120000lu
-#define MBCLKDIV_DIV1024 0x00140000lu
-#define MFSDIV_DIV2      0x02000000lu
-#define MFSDIV_DIV4      0x04000000lu
-#define MFSDIV_DIV8      0x06000000lu
-#define MFSDIV_DIV16     0x08000000lu
-#define MFSDIV_DIV32     0x0A000000lu
-#define MFSDIV_DIV64     0x0C000000lu
-#define MFSDIV_DIV128    0x0E000000lu
-#define MFSDIV_DIV256    0x10000000lu
-#define MFSDIV_DIV512    0x12000000lu
-#define MFSDIV_DIV1024   0x14000000lu
-#define MFSSEL_CLOCK     0x00000000lu
-#define MFSSEL_PULSE_HI  0x20000000lu
-#define MFSSEL_PULSE_LO  0x40000000lu
-/* MXVR_PLL_CTL_1 Masks */
-#define MSTO       0x00000001lu
-#define MSTO0      0x00000001lu /* legacy */
-#define MHOGGD     0x00000004lu
-#define MHOGGD0    0x00000004lu /* legacy */
-#define MHOGGD1    0x00000008lu /* legacy */
-#define MSHAPEREN  0x00000010lu
-#define MSHAPEREN0 0x00000010lu /* legacy */
-#define MSHAPEREN1 0x00000020lu /* legacy */
-#define MPLLCNTEN  0x00008000lu
-#define MPLLCNT    0xFFFF0000lu
-#ifdef _MISRA_RULES
-#define SET_MPLLCNT(x)     (((x)&0xFFFFu) << 0x10)
-#else
-#define SET_MPLLCNT(x)     (((x)&0xFFFF) << 0x10)
-#endif /* _MISRA_RULES */
-/* MXVR_PLL_CTL_2 Masks */
-#define MSHAPERSEL 0x00000007lu
-#define MCPSEL     0x000000E0lu
-/* MXVR_INT_STAT_0 Masks */
-#define NI2A  0x00000001lu
-#define NA2I  0x00000002lu
-#define SBU2L 0x00000004lu
-#define SBL2U 0x00000008lu
-#define PRU   0x00000010lu
-#define MPRU  0x00000020lu
-#define DRU   0x00000040lu
-#define MDRU  0x00000080lu
-#define SBU   0x00000100lu
-#define ATU   0x00000200lu
-#define FCZ0  0x00000400lu
-#define FCZ1  0x00000800lu
-#define PERR  0x00001000lu
-#define MH2L  0x00002000lu
-#define ML2H  0x00004000lu
-#define WUP   0x00008000lu
-#define FU2L  0x00010000lu
-#define FL2U  0x00020000lu
-#define BU2L  0x00040000lu
-#define BL2U  0x00080000lu
-#define PCZ   0x00400000lu
-#define FERR  0x00800000lu
-#define CMR   0x01000000lu
-#define CMROF 0x02000000lu
-#define CMTS  0x04000000lu
-#define CMTC  0x08000000lu
-#define RWRC  0x10000000lu
-#define BCZ   0x20000000lu
-#define BMERR 0x40000000lu
-#define DERR  0x80000000lu
-/* MXVR_INT_EN_0 Masks */
-#define NI2AEN  NI2A
-#define NA2IEN  NA2I
-#define SBU2LEN SBU2L
-#define SBL2UEN SBL2U
-#define PRUEN   PRU
-#define MPRUEN  MPRU
-#define DRUEN   DRU
-#define MDRUEN  MDRU
-#define SBUEN   SBU
-#define ATUEN   ATU
-#define FCZ0EN  FCZ0
-#define FCZ1EN  FCZ1
-#define PERREN  PERR
-#define MH2LEN  MH2L
-#define ML2HEN  ML2H
-#define WUPEN   WUP
-#define FU2LEN  FU2L
-#define FL2UEN  FL2U
-#define BU2LEN  BU2L
-#define BL2UEN  BL2U
-#define PCZEN   PCZ
-#define FERREN  FERR
-#define CMREN   CMR
-#define CMROFEN CMROF
-#define CMTSEN  CMTS
-#define CMTCEN  CMTC
-#define RWRCEN  RWRC
-#define BCZEN   BCZ
-#define BMERREN BMERR
-#define DERREN  DERR
-/* MXVR_INT_STAT_1 Masks */
-#define APR   0x00000004lu
-#define APROF 0x00000008lu
-#define APTS  0x00000040lu
-#define APTC  0x00000080lu
-#define APRCE 0x00000400lu
-#define APRPE 0x00000800lu
-#define HDONE0 0x00000001lu
-#define DONE0  0x00000002lu
-#define HDONE1 0x00000010lu
-#define DONE1  0x00000020lu
-#define HDONE2 0x00000100lu
-#define DONE2  0x00000200lu
-#define HDONE3 0x00001000lu
-#define DONE3  0x00002000lu
-#define HDONE4 0x00010000lu
-#define DONE4  0x00020000lu
-#define HDONE5 0x00100000lu
-#define DONE5  0x00200000lu
-#define HDONE6 0x01000000lu
-#define DONE6  0x02000000lu
-#define HDONE7 0x10000000lu
-#define DONE7  0x20000000lu
-#define DONEX(x) (0x00000002 << (4 * (x)))
-#define HDONEX(x) (0x00000001 << (4 * (x)))
-/* MXVR_INT_EN_1 Masks */
-#define APREN   APR
-#define APROFEN APROF
-#define APTSEN  APTS
-#define APTCEN  APTC
-#define APRCEEN APRCE
-#define APRPEEN APRPE
-#define HDONEEN0 HDONE0
-#define DONEEN0  DONE0
-#define HDONEEN1 HDONE1
-#define DONEEN1  DONE1
-#define HDONEEN2 HDONE2
-#define DONEEN2  DONE2
-#define HDONEEN3 HDONE3
-#define DONEEN3  DONE3
-#define HDONEEN4 HDONE4
-#define DONEEN4  DONE4
-#define HDONEEN5 HDONE5
-#define DONEEN5  DONE5
-#define HDONEEN6 HDONE6
-#define DONEEN6  DONE6
-#define HDONEEN7 HDONE7
-#define DONEEN7  DONE7
-#define DONEENX(x) (0x00000002 << (4 * (x)))
-#define HDONEENX(x) (0x00000001 << (4 * (x)))
-/* MXVR_STATE_0 Masks */
-#define NACT     0x00000001lu
-#define SBLOCK   0x00000002lu
-#define PFDLOCK  0x00000004lu
-#define PFDLOCK0 0x00000004lu /* legacy */
-#define PDD      0x00000008lu
-#define PDD0     0x00000008lu /* legacy */
-#define PVCO     0x00000010lu
-#define PVCO0    0x00000010lu /* legacy */
-#define PFDLOCK1 0x00000020lu /* legacy */
-#define PDD1     0x00000040lu /* legacy */
-#define PVCO1    0x00000080lu /* legacy */
-#define APBSY    0x00000100lu
-#define APARB    0x00000200lu
-#define APTX     0x00000400lu
-#define APRX     0x00000800lu
-#define CMBSY    0x00001000lu
-#define CMARB    0x00002000lu
-#define CMTX     0x00004000lu
-#define CMRX     0x00008000lu
-#define MRXONB   0x00010000lu
-#define RGSIP    0x00020000lu
-#define DALIP    0x00040000lu
-#define ALIP     0x00080000lu
-#define RRDIP    0x00100000lu
-#define RWRIP    0x00200000lu
-#define FLOCK    0x00400000lu
-#define BLOCK    0x00800000lu
-#define RSB      0x0F000000lu
-#define DERRNUM  0xF0000000lu
-/* MXVR_STATE_1 Masks */
-#define STXNUMB     0x0000000Flu
-#define SRXNUMB     0x000000F0lu
-#define APCONT      0x00000100lu
-#define DMAACTIVEX  0x00FF0000lu
-#define DMAACTIVE0  0x00010000lu
-#define DMAACTIVE1  0x00020000lu
-#define DMAACTIVE2  0x00040000lu
-#define DMAACTIVE3  0x00080000lu
-#define DMAACTIVE4  0x00100000lu
-#define DMAACTIVE5  0x00200000lu
-#define DMAACTIVE6  0x00400000lu
-#define DMAACTIVE7  0x00800000lu
-#define DMAPMENX    0xFF000000lu
-#define DMAPMEN0    0x01000000lu
-#define DMAPMEN1    0x02000000lu
-#define DMAPMEN2    0x04000000lu
-#define DMAPMEN3    0x08000000lu
-#define DMAPMEN4    0x10000000lu
-#define DMAPMEN5    0x20000000lu
-#define DMAPMEN6    0x40000000lu
-#define DMAPMEN7    0x80000000lu
-/* MXVR_POSITION Masks */
-#define PVALID       0x8000
-#define POSITION     0x003F
-/* MXVR_MAX_POSITION Masks */
-#define MPVALID      0x8000
-#define MPOSITION    0x003F
-/* MXVR_DELAY Masks */
-#define DVALID       0x8000
-#define DELAY        0x003F
-/* MXVR_MAX_DELAY Masks */
-#define MDVALID      0x8000
-#define MDELAY       0x003F
-/* MXVR_LADDR Masks */
-#define LVALID       0x80000000lu
-#define LADDR        0x0000FFFFlu
-/* MXVR_GADDR Masks */
-#define GVALID       0x8000
-#define GADDRL       0x00FF
-/* MXVR_AADDR Masks */
-#define AVALID       0x80000000lu
-#define AADDR        0x0000FFFFlu
-/* MXVR_ALLOC_0 Masks */
-#define CIU0         0x00000080lu
-#define CIU1         0x00008000lu
-#define CIU2         0x00800000lu
-#define CIU3         0x80000000lu
-#define CL0          0x0000007Flu
-#define CL1          0x00007F00lu
-#define CL2          0x007F0000lu
-#define CL3          0x7F000000lu
-/* MXVR_ALLOC_1 Masks */
-#define CIU4         0x00000080lu
-#define CIU5         0x00008000lu
-#define CIU6         0x00800000lu
-#define CIU7         0x80000000lu
-#define CL4          0x0000007Flu
-#define CL5          0x00007F00lu
-#define CL6          0x007F0000lu
-#define CL7          0x7F000000lu
-/* MXVR_ALLOC_2 Masks */
-#define CIU8         0x00000080lu
-#define CIU9         0x00008000lu
-#define CIU10        0x00800000lu
-#define CIU11        0x80000000lu
-#define CL8          0x0000007Flu
-#define CL9          0x00007F00lu
-#define CL10         0x007F0000lu
-#define CL11         0x7F000000lu
-/* MXVR_ALLOC_3 Masks */
-#define CIU12        0x00000080lu
-#define CIU13        0x00008000lu
-#define CIU14        0x00800000lu
-#define CIU15        0x80000000lu
-#define CL12         0x0000007Flu
-#define CL13         0x00007F00lu
-#define CL14         0x007F0000lu
-#define CL15         0x7F000000lu
-/* MXVR_ALLOC_4 Masks */
-#define CIU16        0x00000080lu
-#define CIU17        0x00008000lu
-#define CIU18        0x00800000lu
-#define CIU19        0x80000000lu
-#define CL16         0x0000007Flu
-#define CL17         0x00007F00lu
-#define CL18         0x007F0000lu
-#define CL19         0x7F000000lu
-/* MXVR_ALLOC_5 Masks */
-#define CIU20        0x00000080lu
-#define CIU21        0x00008000lu
-#define CIU22        0x00800000lu
-#define CIU23        0x80000000lu
-#define CL20         0x0000007Flu
-#define CL21         0x00007F00lu
-#define CL22         0x007F0000lu
-#define CL23         0x7F000000lu
-/* MXVR_ALLOC_6 Masks */
-#define CIU24        0x00000080lu
-#define CIU25        0x00008000lu
-#define CIU26        0x00800000lu
-#define CIU27        0x80000000lu
-#define CL24         0x0000007Flu
-#define CL25         0x00007F00lu
-#define CL26         0x007F0000lu
-#define CL27         0x7F000000lu
-/* MXVR_ALLOC_7 Masks */
-#define CIU28        0x00000080lu
-#define CIU29        0x00008000lu
-#define CIU30        0x00800000lu
-#define CIU31        0x80000000lu
-#define CL28         0x0000007Flu
-#define CL29         0x00007F00lu
-#define CL30         0x007F0000lu
-#define CL31         0x7F000000lu
-/* MXVR_ALLOC_8 Masks */
-#define CIU32        0x00000080lu
-#define CIU33        0x00008000lu
-#define CIU34        0x00800000lu
-#define CIU35        0x80000000lu
-#define CL32         0x0000007Flu
-#define CL33         0x00007F00lu
-#define CL34         0x007F0000lu
-#define CL35         0x7F000000lu
-/* MXVR_ALLOC_9 Masks */
-#define CIU36        0x00000080lu
-#define CIU37        0x00008000lu
-#define CIU38        0x00800000lu
-#define CIU39        0x80000000lu
-#define CL36         0x0000007Flu
-#define CL37         0x00007F00lu
-#define CL38         0x007F0000lu
-#define CL39         0x7F000000lu
-/* MXVR_ALLOC_10 Masks */
-#define CIU40        0x00000080lu
-#define CIU41        0x00008000lu
-#define CIU42        0x00800000lu
-#define CIU43        0x80000000lu
-#define CL40         0x0000007Flu
-#define CL41         0x00007F00lu
-#define CL42         0x007F0000lu
-#define CL43         0x7F000000lu
-/* MXVR_ALLOC_11 Masks */
-#define CIU44        0x00000080lu
-#define CIU45        0x00008000lu
-#define CIU46        0x00800000lu
-#define CIU47        0x80000000lu
-#define CL44         0x0000007Flu
-#define CL45         0x00007F00lu
-#define CL46         0x007F0000lu
-#define CL47         0x7F000000lu
-/* MXVR_ALLOC_12 Masks */
-#define CIU48        0x00000080lu
-#define CIU49        0x00008000lu
-#define CIU50        0x00800000lu
-#define CIU51        0x80000000lu
-#define CL48         0x0000007Flu
-#define CL49         0x00007F00lu
-#define CL50         0x007F0000lu
-#define CL51         0x7F000000lu
-/* MXVR_ALLOC_13 Masks */
-#define CIU52        0x00000080lu
-#define CIU53        0x00008000lu
-#define CIU54        0x00800000lu
-#define CIU55        0x80000000lu
-#define CL52         0x0000007Flu
-#define CL53         0x00007F00lu
-#define CL54         0x007F0000lu
-#define CL55         0x7F000000lu
-/* MXVR_ALLOC_14 Masks */
-#define CIU56        0x00000080lu
-#define CIU57        0x00008000lu
-#define CIU58        0x00800000lu
-#define CIU59        0x80000000lu
-#define CL56         0x0000007Flu
-#define CL57         0x00007F00lu
-#define CL58         0x007F0000lu
-#define CL59         0x7F000000lu
-/* MXVR_SYNC_LCHAN_0 Masks */
-#define LCHANPC0     0x0000000Flu
-#define LCHANPC1     0x000000F0lu
-#define LCHANPC2     0x00000F00lu
-#define LCHANPC3     0x0000F000lu
-#define LCHANPC4     0x000F0000lu
-#define LCHANPC5     0x00F00000lu
-#define LCHANPC6     0x0F000000lu
-#define LCHANPC7     0xF0000000lu
-/* MXVR_SYNC_LCHAN_1 Masks */
-#define LCHANPC8     0x0000000Flu
-#define LCHANPC9     0x000000F0lu
-#define LCHANPC10    0x00000F00lu
-#define LCHANPC11    0x0000F000lu
-#define LCHANPC12    0x000F0000lu
-#define LCHANPC13    0x00F00000lu
-#define LCHANPC14    0x0F000000lu
-#define LCHANPC15    0xF0000000lu
-/* MXVR_SYNC_LCHAN_2 Masks */
-#define LCHANPC16    0x0000000Flu
-#define LCHANPC17    0x000000F0lu
-#define LCHANPC18    0x00000F00lu
-#define LCHANPC19    0x0000F000lu
-#define LCHANPC20    0x000F0000lu
-#define LCHANPC21    0x00F00000lu
-#define LCHANPC22    0x0F000000lu
-#define LCHANPC23    0xF0000000lu
-/* MXVR_SYNC_LCHAN_3 Masks */
-#define LCHANPC24    0x0000000Flu
-#define LCHANPC25    0x000000F0lu
-#define LCHANPC26    0x00000F00lu
-#define LCHANPC27    0x0000F000lu
-#define LCHANPC28    0x000F0000lu
-#define LCHANPC29    0x00F00000lu
-#define LCHANPC30    0x0F000000lu
-#define LCHANPC31    0xF0000000lu
-/* MXVR_SYNC_LCHAN_4 Masks */
-#define LCHANPC32    0x0000000Flu
-#define LCHANPC33    0x000000F0lu
-#define LCHANPC34    0x00000F00lu
-#define LCHANPC35    0x0000F000lu
-#define LCHANPC36    0x000F0000lu
-#define LCHANPC37    0x00F00000lu
-#define LCHANPC38    0x0F000000lu
-#define LCHANPC39    0xF0000000lu
-/* MXVR_SYNC_LCHAN_5 Masks */
-#define LCHANPC40    0x0000000Flu
-#define LCHANPC41    0x000000F0lu
-#define LCHANPC42    0x00000F00lu
-#define LCHANPC43    0x0000F000lu
-#define LCHANPC44    0x000F0000lu
-#define LCHANPC45    0x00F00000lu
-#define LCHANPC46    0x0F000000lu
-#define LCHANPC47    0xF0000000lu
-/* MXVR_SYNC_LCHAN_6 Masks */
-#define LCHANPC48    0x0000000Flu
-#define LCHANPC49    0x000000F0lu
-#define LCHANPC50    0x00000F00lu
-#define LCHANPC51    0x0000F000lu
-#define LCHANPC52    0x000F0000lu
-#define LCHANPC53    0x00F00000lu
-#define LCHANPC54    0x0F000000lu
-#define LCHANPC55    0xF0000000lu
-/* MXVR_SYNC_LCHAN_7 Masks */
-#define LCHANPC56    0x0000000Flu
-#define LCHANPC57    0x000000F0lu
-#define LCHANPC58    0x00000F00lu
-#define LCHANPC59    0x0000F000lu
-/* MXVR_DMAx_CONFIG Masks */
-#define MDMAEN      0x00000001lu
-#define DD          0x00000002lu
-#define LCHAN       0x000003C0lu
-#define BITSWAPEN   0x00000400lu
-#define BYSWAPEN    0x00000800lu
-#define MFLOW       0x00007000lu
-#define FIXEDPM     0x00080000lu
-#define STARTPAT    0x00300000lu
-#define STOPPAT     0x00C00000lu
-#define COUNTPOS    0x1C000000lu
-#define DD_TX       0x00000000lu
-#define DD_RX       0x00000002lu
-#define LCHAN_0     0x00000000lu
-#define LCHAN_1     0x00000040lu
-#define LCHAN_2     0x00000080lu
-#define LCHAN_3     0x000000C0lu
-#define LCHAN_4     0x00000100lu
-#define LCHAN_5     0x00000140lu
-#define LCHAN_6     0x00000180lu
-#define LCHAN_7     0x000001C0lu
-#define MFLOW_STOP  0x00000000lu
-#define MFLOW_AUTO  0x00001000lu
-#define MFLOW_PVC   0x00002000lu
-#define MFLOW_PSS   0x00003000lu
-#define MFLOW_PFC   0x00004000lu
-#define STARTPAT_0  0x00000000lu
-#define STARTPAT_1  0x00100000lu
-#define STOPPAT_0   0x00000000lu
-#define STOPPAT_1   0x00400000lu
-#define COUNTPOS_0  0x00000000lu
-#define COUNTPOS_1  0x04000000lu
-#define COUNTPOS_2  0x08000000lu
-#define COUNTPOS_3  0x0C000000lu
-#define COUNTPOS_4  0x10000000lu
-#define COUNTPOS_5  0x14000000lu
-#define COUNTPOS_6  0x18000000lu
-#define COUNTPOS_7  0x1C000000lu
-/* MXVR_AP_CTL Masks */
-#define STARTAP    0x00000001lu
-#define CANCELAP   0x00000002lu
-#define RESETAP    0x00000004lu
-#define APRBE0     0x00004000lu
-#define APRBE1     0x00008000lu
-#define APRBEX     0x0000C000lu
-/* MXVR_CM_CTL Masks */
-#define STARTCM    0x00000001lu
-#define CANCELCM   0x00000002lu
-#define CMRBEX     0xFFFF0000lu
-#define CMRBE0     0x00010000lu
-#define CMRBE1     0x00020000lu
-#define CMRBE2     0x00040000lu
-#define CMRBE3     0x00080000lu
-#define CMRBE4     0x00100000lu
-#define CMRBE5     0x00200000lu
-#define CMRBE6     0x00400000lu
-#define CMRBE7     0x00800000lu
-#define CMRBE8     0x01000000lu
-#define CMRBE9     0x02000000lu
-#define CMRBE10    0x04000000lu
-#define CMRBE11    0x08000000lu
-#define CMRBE12    0x10000000lu
-#define CMRBE13    0x20000000lu
-#define CMRBE14    0x40000000lu
-#define CMRBE15    0x80000000lu
-/* MXVR_PAT_DATA_x Masks */
-#define MATCH_DATA_0 0x000000FFlu
-#define MATCH_DATA_1 0x0000FF00lu
-#define MATCH_DATA_2 0x00FF0000lu
-#define MATCH_DATA_3 0xFF000000lu
-/* MXVR_PAT_EN_x Masks */
-#define MATCH_EN_0_0 0x00000001lu
-#define MATCH_EN_0_1 0x00000002lu
-#define MATCH_EN_0_2 0x00000004lu
-#define MATCH_EN_0_3 0x00000008lu
-#define MATCH_EN_0_4 0x00000010lu
-#define MATCH_EN_0_5 0x00000020lu
-#define MATCH_EN_0_6 0x00000040lu
-#define MATCH_EN_0_7 0x00000080lu
-#define MATCH_EN_1_0 0x00000100lu
-#define MATCH_EN_1_1 0x00000200lu
-#define MATCH_EN_1_2 0x00000400lu
-#define MATCH_EN_1_3 0x00000800lu
-#define MATCH_EN_1_4 0x00001000lu
-#define MATCH_EN_1_5 0x00002000lu
-#define MATCH_EN_1_6 0x00004000lu
-#define MATCH_EN_1_7 0x00008000lu
-#define MATCH_EN_2_0 0x00010000lu
-#define MATCH_EN_2_1 0x00020000lu
-#define MATCH_EN_2_2 0x00040000lu
-#define MATCH_EN_2_3 0x00080000lu
-#define MATCH_EN_2_4 0x00100000lu
-#define MATCH_EN_2_5 0x00200000lu
-#define MATCH_EN_2_6 0x00400000lu
-#define MATCH_EN_2_7 0x00800000lu
-#define MATCH_EN_3_0 0x01000000lu
-#define MATCH_EN_3_1 0x02000000lu
-#define MATCH_EN_3_2 0x04000000lu
-#define MATCH_EN_3_3 0x08000000lu
-#define MATCH_EN_3_4 0x10000000lu
-#define MATCH_EN_3_5 0x20000000lu
-#define MATCH_EN_3_6 0x40000000lu
-#define MATCH_EN_3_7 0x80000000lu
-/* MXVR_ROUTING_0 Masks */
-#define MUTE_CH0        0x00000080lu
-#define MUTE_CH1        0x00008000lu
-#define MUTE_CH2        0x00800000lu
-#define MUTE_CH3        0x80000000lu
-#define TX_CH0          0x0000007Flu
-#define TX_CH1          0x00007F00lu
-#define TX_CH2          0x007F0000lu
-#define TX_CH3          0x7F000000lu
-/* MXVR_ROUTING_1 Masks */
-#define MUTE_CH4        0x00000080lu
-#define MUTE_CH5        0x00008000lu
-#define MUTE_CH6        0x00800000lu
-#define MUTE_CH7        0x80000000lu
-#define TX_CH4          0x0000007Flu
-#define TX_CH5          0x00007F00lu
-#define TX_CH6          0x007F0000lu
-#define TX_CH7          0x7F000000lu
-/* MXVR_ROUTING_2 Masks */
-#define MUTE_CH8        0x00000080lu
-#define MUTE_CH9        0x00008000lu
-#define MUTE_CH10       0x00800000lu
-#define MUTE_CH11       0x80000000lu
-#define TX_CH8          0x0000007Flu
-#define TX_CH9          0x00007F00lu
-#define TX_CH10         0x007F0000lu
-#define TX_CH11         0x7F000000lu
-/* MXVR_ROUTING_3 Masks */
-#define MUTE_CH12       0x00000080lu
-#define MUTE_CH13       0x00008000lu
-#define MUTE_CH14       0x00800000lu
-#define MUTE_CH15       0x80000000lu
-#define TX_CH12         0x0000007Flu
-#define TX_CH13         0x00007F00lu
-#define TX_CH14         0x007F0000lu
-#define TX_CH15         0x7F000000lu
-/* MXVR_ROUTING_4 Masks */
-#define MUTE_CH16       0x00000080lu
-#define MUTE_CH17       0x00008000lu
-#define MUTE_CH18       0x00800000lu
-#define MUTE_CH19       0x80000000lu
-#define TX_CH16         0x0000007Flu
-#define TX_CH17         0x00007F00lu
-#define TX_CH18         0x007F0000lu
-#define TX_CH19         0x7F000000lu
-/* MXVR_ROUTING_5 Masks */
-#define MUTE_CH20       0x00000080lu
-#define MUTE_CH21       0x00008000lu
-#define MUTE_CH22       0x00800000lu
-#define MUTE_CH23       0x80000000lu
-#define TX_CH20         0x0000007Flu
-#define TX_CH21         0x00007F00lu
-#define TX_CH22         0x007F0000lu
-#define TX_CH23         0x7F000000lu
-/* MXVR_ROUTING_6 Masks */
-#define MUTE_CH24       0x00000080lu
-#define MUTE_CH25       0x00008000lu
-#define MUTE_CH26       0x00800000lu
-#define MUTE_CH27       0x80000000lu
-#define TX_CH24         0x0000007Flu
-#define TX_CH25         0x00007F00lu
-#define TX_CH26         0x007F0000lu
-#define TX_CH27         0x7F000000lu
-/* MXVR_ROUTING_7 Masks */
-#define MUTE_CH28       0x00000080lu
-#define MUTE_CH29       0x00008000lu
-#define MUTE_CH30       0x00800000lu
-#define MUTE_CH31       0x80000000lu
-#define TX_CH28         0x0000007Flu
-#define TX_CH29         0x00007F00lu
-#define TX_CH30         0x007F0000lu
-#define TX_CH31         0x7F000000lu
-/* MXVR_ROUTING_8 Masks */
-#define MUTE_CH32       0x00000080lu
-#define MUTE_CH33       0x00008000lu
-#define MUTE_CH34       0x00800000lu
-#define MUTE_CH35       0x80000000lu
-#define TX_CH32         0x0000007Flu
-#define TX_CH33         0x00007F00lu
-#define TX_CH34         0x007F0000lu
-#define TX_CH35         0x7F000000lu
-/* MXVR_ROUTING_9 Masks */
-#define MUTE_CH36       0x00000080lu
-#define MUTE_CH37       0x00008000lu
-#define MUTE_CH38       0x00800000lu
-#define MUTE_CH39       0x80000000lu
-#define TX_CH36         0x0000007Flu
-#define TX_CH37         0x00007F00lu
-#define TX_CH38         0x007F0000lu
-#define TX_CH39         0x7F000000lu
-/* MXVR_ROUTING_10 Masks */
-#define MUTE_CH40       0x00000080lu
-#define MUTE_CH41       0x00008000lu
-#define MUTE_CH42       0x00800000lu
-#define MUTE_CH43       0x80000000lu
-#define TX_CH40         0x0000007Flu
-#define TX_CH41         0x00007F00lu
-#define TX_CH42         0x007F0000lu
-#define TX_CH43         0x7F000000lu
-/* MXVR_ROUTING_11 Masks */
-#define MUTE_CH44       0x00000080lu
-#define MUTE_CH45       0x00008000lu
-#define MUTE_CH46       0x00800000lu
-#define MUTE_CH47       0x80000000lu
-#define TX_CH44         0x0000007Flu
-#define TX_CH45         0x00007F00lu
-#define TX_CH46         0x007F0000lu
-#define TX_CH47         0x7F000000lu
-/* MXVR_ROUTING_12 Masks */
-#define MUTE_CH48       0x00000080lu
-#define MUTE_CH49       0x00008000lu
-#define MUTE_CH50       0x00800000lu
-#define MUTE_CH51       0x80000000lu
-#define TX_CH48         0x0000007Flu
-#define TX_CH49         0x00007F00lu
-#define TX_CH50         0x007F0000lu
-#define TX_CH51         0x7F000000lu
-/* MXVR_ROUTING_13 Masks */
-#define MUTE_CH52       0x00000080lu
-#define MUTE_CH53       0x00008000lu
-#define MUTE_CH54       0x00800000lu
-#define MUTE_CH55       0x80000000lu
-#define TX_CH52         0x0000007Flu
-#define TX_CH53         0x00007F00lu
-#define TX_CH54         0x007F0000lu
-#define TX_CH55         0x7F000000lu
-/* MXVR_ROUTING_14 Masks */
-#define MUTE_CH56       0x00000080lu
-#define MUTE_CH57       0x00008000lu
-#define MUTE_CH58       0x00800000lu
-#define MUTE_CH59       0x80000000lu
-#define TX_CH56         0x0000007Flu
-#define TX_CH57         0x00007F00lu
-#define TX_CH58         0x007F0000lu
-#define TX_CH59         0x7F000000lu
-/* Control Message Receive Buffer (CMRB) Address Offsets */
-#define CMRB_STRIDE       0x00000016lu
-#define CMRB_DST_OFFSET   0x00000000lu
-#define CMRB_SRC_OFFSET   0x00000002lu
-#define CMRB_DATA_OFFSET  0x00000005lu
-/* Control Message Transmit Buffer (CMTB) Address Offsets */
-#define CMTB_PRIO_OFFSET    0x00000000lu
-#define CMTB_DST_OFFSET     0x00000002lu
-#define CMTB_SRC_OFFSET     0x00000004lu
-#define CMTB_TYPE_OFFSET    0x00000006lu
-#define CMTB_DATA_OFFSET    0x00000007lu
-#define CMTB_ANSWER_OFFSET  0x0000000Alu
-#define CMTB_STAT_N_OFFSET  0x00000018lu
-#define CMTB_STAT_A_OFFSET  0x00000016lu
-#define CMTB_STAT_D_OFFSET  0x0000000Elu
-#define CMTB_STAT_R_OFFSET  0x00000014lu
-#define CMTB_STAT_W_OFFSET  0x00000014lu
-#define CMTB_STAT_G_OFFSET  0x00000014lu
-/* Asynchronous Packet Receive Buffer (APRB) Address Offsets */
-#define APRB_STRIDE       0x00000400lu
-#define APRB_DST_OFFSET   0x00000000lu
-#define APRB_LEN_OFFSET   0x00000002lu
-#define APRB_SRC_OFFSET   0x00000004lu
-#define APRB_DATA_OFFSET  0x00000006lu
-/* Asynchronous Packet Transmit Buffer (APTB) Address Offsets */
-#define APTB_PRIO_OFFSET  0x00000000lu
-#define APTB_DST_OFFSET   0x00000002lu
-#define APTB_LEN_OFFSET   0x00000004lu
-#define APTB_SRC_OFFSET   0x00000006lu
-#define APTB_DATA_OFFSET  0x00000008lu
-/* Remote Read Buffer (RRDB) Address Offsets */
-#define RRDB_WADDR_OFFSET 0x00000100lu
-#define RRDB_WLEN_OFFSET  0x00000101lu
 /* ************  CONTROLLER AREA NETWORK (CAN) MASKS  ***************/
 /* CAN_CONTROL Masks                                     */
 #define SRS                     0x0001  /* Software Reset */
diff --git a/arch/blackfin/mach-bf538/include/mach/gpio.h b/arch/blackfin/mach-bf538/include/mach/gpio.h
index 295c78a465c2..0c346fba9619 100644
--- a/arch/blackfin/mach-bf538/include/mach/gpio.h
+++ b/arch/blackfin/mach-bf538/include/mach/gpio.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2008 Analog Devices Inc.
+ * Copyright (C) 2008-2009 Analog Devices Inc.
 * Licensed under the GPL-2 or later.
 */
@@ -7,11 +7,8 @@
 #ifndef _MACH_GPIO_H_
 #define _MACH_GPIO_H_
-        /* FIXME:
-         * For now only support PORTF GPIOs.
-         * PORT C,D and E are for peripheral usage only
-         */
 #define MAX_BLACKFIN_GPIOS 16
+#define BFIN_SPECIAL_GPIO_BANKS 3
 #define GPIO_PF0        0       /* PF */
 #define GPIO_PF1        1
diff --git a/arch/blackfin/mach-bf538/include/mach/portmux.h b/arch/blackfin/mach-bf538/include/mach/portmux.h
index 6121cf8b5872..0083ba13ee9e 100644
--- a/arch/blackfin/mach-bf538/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf538/include/mach/portmux.h
@@ -7,7 +7,7 @@
 #ifndef _MACH_PORTMUX_H_
 #define _MACH_PORTMUX_H_
-#define MAX_RESOURCES   MAX_BLACKFIN_GPIOS
+#define MAX_RESOURCES   64
 #define P_TMR2          (P_DONTCARE)
 #define P_TMR1          (P_DONTCARE)
diff --git a/arch/blackfin/mach-bf548/Kconfig b/arch/blackfin/mach-bf548/Kconfig
index a09623dfd550..70189a0d1a19 100644
--- a/arch/blackfin/mach-bf548/Kconfig
+++ b/arch/blackfin/mach-bf548/Kconfig
@@ -1,3 +1,27 @@
+config BF542
+        def_bool y
+        depends on BF542_std || BF542M
+config BF544
+        def_bool y
+        depends on BF544_std || BF544M
+config BF547
+        def_bool y
+        depends on BF547_std || BF547M
+config BF548
+        def_bool y
+        depends on BF548_std || BF548M
+config BF549
+        def_bool y
+        depends on BF549_std || BF549M
+config BF54xM
+        def_bool y
+        depends on (BF542M || BF544M || BF547M || BF548M || BF549M)
+config BF54x
+        def_bool y
+        depends on (BF542 || BF544 || BF547 || BF548 || BF549)
 if (BF54x)
 source "arch/blackfin/mach-bf548/boards/Kconfig"
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index 1a5286bbb3fa..60193f72777c 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -62,7 +62,7 @@ static struct isp1760_platform_data isp1760_priv = {
 };
 static struct platform_device bfin_isp1760_device = {
-        .name           = "isp1760-hcd",
+        .name           = "isp1760",
        .id             = 0,
        .dev = {
                .platform_data = &isp1760_priv,
@@ -154,7 +154,7 @@ static struct platform_device bf54x_kpad_device = {
 };
 #endif
-#if defined(CONFIG_JOYSTICK_BFIN_ROTARY) || defined(CONFIG_JOYSTICK_BFIN_ROTARY_MODULE)
+#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
 #include <asm/bfin_rotary.h>
 static struct bfin_rotary_platform_data bfin_rotary_data = {
@@ -186,7 +186,7 @@ static struct platform_device bfin_rotary_device = {
 #endif
 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
-#include <linux/spi/adxl34x.h>
+#include <linux/input/adxl34x.h>
 static const struct adxl34x_platform_data adxl34x_info = {
        .x_axis_offset = 0,
        .y_axis_offset = 0,
@@ -210,14 +210,17 @@ static const struct adxl34x_platform_data adxl34x_info = {
        .ev_code_y = ABS_Y,             /* EV_REL */
        .ev_code_z = ABS_Z,             /* EV_REL */
-        .ev_code_tap_x = BTN_TOUCH,             /* EV_KEY */
+        .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
-        .ev_code_tap_y = BTN_TOUCH,             /* EV_KEY */
-        .ev_code_tap_z = BTN_TOUCH,             /* EV_KEY */
 /*      .ev_code_ff = KEY_F,*/          /* EV_KEY */
 /*      .ev_code_act_inactivity = KEY_A,*/      /* EV_KEY */
        .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
        .fifo_mode = ADXL_FIFO_STREAM,
+        .orientation_enable = ADXL_EN_ORIENTATION_3D,
+        .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
+        .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
+        /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
+        .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
 };
 #endif
@@ -461,6 +464,44 @@ static struct platform_device musb_device = {
 };
 #endif
+#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
+unsigned short bfin_can_peripherals[] = {
+        P_CAN0_RX, P_CAN0_TX, 0
+};
+static struct resource bfin_can_resources[] = {
+        {
+                .start = 0xFFC02A00,
+                .end = 0xFFC02FFF,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_CAN0_RX,
+                .end = IRQ_CAN0_RX,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_CAN0_TX,
+                .end = IRQ_CAN0_TX,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_CAN0_ERROR,
+                .end = IRQ_CAN0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device bfin_can_device = {
+        .name = "bfin_can",
+        .num_resources = ARRAY_SIZE(bfin_can_resources),
+        .resource = bfin_can_resources,
+        .dev = {
+                .platform_data = &bfin_can_peripherals, /* Passed to driver */
+        },
+};
+#endif
 #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
 static struct resource bfin_atapi_resources[] = {
        {
@@ -953,6 +994,10 @@ static struct platform_device *ezkit_devices[] __initdata = {
        &bfin_isp1760_device,
 #endif
+#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
+        &bfin_can_device,
+#endif
 #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
        &bfin_atapi_device,
 #endif
@@ -974,7 +1019,7 @@ static struct platform_device *ezkit_devices[] __initdata = {
        &bf54x_kpad_device,
 #endif
-#if defined(CONFIG_JOYSTICK_BFIN_ROTARY) || defined(CONFIG_JOYSTICK_BFIN_ROTARY_MODULE)
+#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
        &bfin_rotary_device,
 #endif
diff --git a/arch/blackfin/mach-bf548/include/mach/bf548.h b/arch/blackfin/mach-bf548/include/mach/bf548.h
index 7bead5ce0f3b..751e5e11ecf8 100644
--- a/arch/blackfin/mach-bf548/include/mach/bf548.h
+++ b/arch/blackfin/mach-bf548/include/mach/bf548.h
@@ -81,18 +81,6 @@
 #define AMGCTLVAL       (V_AMBEN | V_AMCKEN)
-#if defined(CONFIG_BF542M)
-# define CONFIG_BF542
-#elif defined(CONFIG_BF544M)
-# define CONFIG_BF544
-#elif defined(CONFIG_BF547M)
-# define CONFIG_BF547
-#elif defined(CONFIG_BF548M)
-# define CONFIG_BF548
-#elif defined(CONFIG_BF549M)
-# define CONFIG_BF549
-#endif
 #if defined(CONFIG_BF542)
 # define CPU   "BF542"
 # define CPUID 0x27de
diff --git a/arch/blackfin/mach-bf548/include/mach/blackfin.h b/arch/blackfin/mach-bf548/include/mach/blackfin.h
index 13302b67857a..5684030ccc21 100644
--- a/arch/blackfin/mach-bf548/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf548/include/mach/blackfin.h
@@ -64,10 +64,4 @@
 #define OFFSET_THR              0x28    /* Transmit Holding register            */
 #define OFFSET_RBR              0x2C    /* Receive Buffer register              */
-/* PLL_DIV Masks */
-#define CCLK_DIV1 CSEL_DIV1     /* CCLK = VCO / 1 */
-#define CCLK_DIV2 CSEL_DIV2     /* CCLK = VCO / 2 */
-#define CCLK_DIV4 CSEL_DIV4     /* CCLK = VCO / 4 */
-#define CCLK_DIV8 CSEL_DIV8     /* CCLK = VCO / 8 */
 #endif
diff --git a/arch/blackfin/mach-bf548/include/mach/cdefBF547.h b/arch/blackfin/mach-bf548/include/mach/cdefBF547.h
index 423421515134..bc650e6ea482 100644
--- a/arch/blackfin/mach-bf548/include/mach/cdefBF547.h
+++ b/arch/blackfin/mach-bf548/include/mach/cdefBF547.h
@@ -4,21 +4,21 @@
 * Licensed under the GPL-2 or later.
 */
-#ifndef _CDEF_BF548_H
+#ifndef _CDEF_BF547_H
-#define _CDEF_BF548_H
+#define _CDEF_BF547_H
 /* include all Core registers and bit definitions */
-#include "defBF548.h"
+#include "defBF547.h"
 /* include core sbfin_read_()ecific register pointer definitions */
 #include <asm/cdef_LPBlackfin.h>
-/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF548 */
+/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF547 */
 /* include cdefBF54x_base.h for the set of #defines that are common to all ADSP-BF54x bfin_read_()rocessors */
 #include "cdefBF54x_base.h"
-/* The following are the #defines needed by ADSP-BF548 that are not in the common header */
+/* The following are the #defines needed by ADSP-BF547 that are not in the common header */
 /* Timer Registers */
@@ -805,4 +805,4 @@
 #define bfin_read_HMDMA1_BCOUNT()               bfin_read16(HMDMA1_BCOUNT)
 #define bfin_write_HMDMA1_BCOUNT(val)           bfin_write16(HMDMA1_BCOUNT, val)
-#endif /* _CDEF_BF548_H */
+#endif /* _CDEF_BF547_H */
diff --git a/arch/blackfin/mach-bf548/include/mach/cdefBF548.h b/arch/blackfin/mach-bf548/include/mach/cdefBF548.h
index df84180410c4..3523e08f7968 100644
--- a/arch/blackfin/mach-bf548/include/mach/cdefBF548.h
+++ b/arch/blackfin/mach-bf548/include/mach/cdefBF548.h
@@ -18,165 +18,8 @@
 /* include cdefBF54x_base.h for the set of #defines that are common to all ADSP-BF54x bfin_read_()rocessors */
 #include "cdefBF54x_base.h"
-/* The following are the #defines needed by ADSP-BF548 that are not in the common header */
+/* The BF548 is like the BF547, but has additional CANs */
+#include "cdefBF547.h"
-/* Timer Registers */
-#define bfin_read_TIMER8_CONFIG()       bfin_read16(TIMER8_CONFIG)
-#define bfin_write_TIMER8_CONFIG(val)   bfin_write16(TIMER8_CONFIG, val)
-#define bfin_read_TIMER8_COUNTER()      bfin_read32(TIMER8_COUNTER)
-#define bfin_write_TIMER8_COUNTER(val)  bfin_write32(TIMER8_COUNTER, val)
-#define bfin_read_TIMER8_PERIOD()       bfin_read32(TIMER8_PERIOD)
-#define bfin_write_TIMER8_PERIOD(val)   bfin_write32(TIMER8_PERIOD, val)
-#define bfin_read_TIMER8_WIDTH()        bfin_read32(TIMER8_WIDTH)
-#define bfin_write_TIMER8_WIDTH(val)    bfin_write32(TIMER8_WIDTH, val)
-#define bfin_read_TIMER9_CONFIG()       bfin_read16(TIMER9_CONFIG)
-#define bfin_write_TIMER9_CONFIG(val)   bfin_write16(TIMER9_CONFIG, val)
-#define bfin_read_TIMER9_COUNTER()      bfin_read32(TIMER9_COUNTER)
-#define bfin_write_TIMER9_COUNTER(val)  bfin_write32(TIMER9_COUNTER, val)
-#define bfin_read_TIMER9_PERIOD()       bfin_read32(TIMER9_PERIOD)
-#define bfin_write_TIMER9_PERIOD(val)   bfin_write32(TIMER9_PERIOD, val)
-#define bfin_read_TIMER9_WIDTH()        bfin_read32(TIMER9_WIDTH)
-#define bfin_write_TIMER9_WIDTH(val)    bfin_write32(TIMER9_WIDTH, val)
-#define bfin_read_TIMER10_CONFIG()      bfin_read16(TIMER10_CONFIG)
-#define bfin_write_TIMER10_CONFIG(val)  bfin_write16(TIMER10_CONFIG, val)
-#define bfin_read_TIMER10_COUNTER()     bfin_read32(TIMER10_COUNTER)
-#define bfin_write_TIMER10_COUNTER(val) bfin_write32(TIMER10_COUNTER, val)
-#define bfin_read_TIMER10_PERIOD()      bfin_read32(TIMER10_PERIOD)
-#define bfin_write_TIMER10_PERIOD(val)  bfin_write32(TIMER10_PERIOD, val)
-#define bfin_read_TIMER10_WIDTH()       bfin_read32(TIMER10_WIDTH)
-#define bfin_write_TIMER10_WIDTH(val)   bfin_write32(TIMER10_WIDTH, val)
-/* Timer Groubfin_read_() of 3 */
-#define bfin_read_TIMER_ENABLE1()       bfin_read16(TIMER_ENABLE1)
-#define bfin_write_TIMER_ENABLE1(val)   bfin_write16(TIMER_ENABLE1, val)
-#define bfin_read_TIMER_DISABLE1()      bfin_read16(TIMER_DISABLE1)
-#define bfin_write_TIMER_DISABLE1(val)  bfin_write16(TIMER_DISABLE1, val)
-#define bfin_read_TIMER_STATUS1()       bfin_read32(TIMER_STATUS1)
-#define bfin_write_TIMER_STATUS1(val)   bfin_write32(TIMER_STATUS1, val)
-/* SPORT0 Registers */
-#define bfin_read_SPORT0_TCR1()         bfin_read16(SPORT0_TCR1)
-#define bfin_write_SPORT0_TCR1(val)     bfin_write16(SPORT0_TCR1, val)
-#define bfin_read_SPORT0_TCR2()         bfin_read16(SPORT0_TCR2)
-#define bfin_write_SPORT0_TCR2(val)     bfin_write16(SPORT0_TCR2, val)
-#define bfin_read_SPORT0_TCLKDIV()      bfin_read16(SPORT0_TCLKDIV)
-#define bfin_write_SPORT0_TCLKDIV(val)  bfin_write16(SPORT0_TCLKDIV, val)
-#define bfin_read_SPORT0_TFSDIV()       bfin_read16(SPORT0_TFSDIV)
-#define bfin_write_SPORT0_TFSDIV(val)   bfin_write16(SPORT0_TFSDIV, val)
-#define bfin_read_SPORT0_TX()           bfin_read32(SPORT0_TX)
-#define bfin_write_SPORT0_TX(val)       bfin_write32(SPORT0_TX, val)
-#define bfin_read_SPORT0_RX()           bfin_read32(SPORT0_RX)
-#define bfin_write_SPORT0_RX(val)       bfin_write32(SPORT0_RX, val)
-#define bfin_read_SPORT0_RCR1()         bfin_read16(SPORT0_RCR1)
-#define bfin_write_SPORT0_RCR1(val)     bfin_write16(SPORT0_RCR1, val)
-#define bfin_read_SPORT0_RCR2()         bfin_read16(SPORT0_RCR2)
-#define bfin_write_SPORT0_RCR2(val)     bfin_write16(SPORT0_RCR2, val)
-#define bfin_read_SPORT0_RCLKDIV()      bfin_read16(SPORT0_RCLKDIV)
-#define bfin_write_SPORT0_RCLKDIV(val)  bfin_write16(SPORT0_RCLKDIV, val)
-#define bfin_read_SPORT0_RFSDIV()       bfin_read16(SPORT0_RFSDIV)
-#define bfin_write_SPORT0_RFSDIV(val)   bfin_write16(SPORT0_RFSDIV, val)
-#define bfin_read_SPORT0_STAT()         bfin_read16(SPORT0_STAT)
-#define bfin_write_SPORT0_STAT(val)     bfin_write16(SPORT0_STAT, val)
-#define bfin_read_SPORT0_CHNL()         bfin_read16(SPORT0_CHNL)
-#define bfin_write_SPORT0_CHNL(val)     bfin_write16(SPORT0_CHNL, val)
-#define bfin_read_SPORT0_MCMC1()        bfin_read16(SPORT0_MCMC1)
-#define bfin_write_SPORT0_MCMC1(val)    bfin_write16(SPORT0_MCMC1, val)
-#define bfin_read_SPORT0_MCMC2()        bfin_read16(SPORT0_MCMC2)
-#define bfin_write_SPORT0_MCMC2(val)    bfin_write16(SPORT0_MCMC2, val)
-#define bfin_read_SPORT0_MTCS0()        bfin_read32(SPORT0_MTCS0)
-#define bfin_write_SPORT0_MTCS0(val)    bfin_write32(SPORT0_MTCS0, val)
-#define bfin_read_SPORT0_MTCS1()        bfin_read32(SPORT0_MTCS1)
-#define bfin_write_SPORT0_MTCS1(val)    bfin_write32(SPORT0_MTCS1, val)
-#define bfin_read_SPORT0_MTCS2()        bfin_read32(SPORT0_MTCS2)
-#define bfin_write_SPORT0_MTCS2(val)    bfin_write32(SPORT0_MTCS2, val)
-#define bfin_read_SPORT0_MTCS3()        bfin_read32(SPORT0_MTCS3)
-#define bfin_write_SPORT0_MTCS3(val)    bfin_write32(SPORT0_MTCS3, val)
-#define bfin_read_SPORT0_MRCS0()        bfin_read32(SPORT0_MRCS0)
-#define bfin_write_SPORT0_MRCS0(val)    bfin_write32(SPORT0_MRCS0, val)
-#define bfin_read_SPORT0_MRCS1()        bfin_read32(SPORT0_MRCS1)
-#define bfin_write_SPORT0_MRCS1(val)    bfin_write32(SPORT0_MRCS1, val)
-#define bfin_read_SPORT0_MRCS2()        bfin_read32(SPORT0_MRCS2)
-#define bfin_write_SPORT0_MRCS2(val)    bfin_write32(SPORT0_MRCS2, val)
-#define bfin_read_SPORT0_MRCS3()        bfin_read32(SPORT0_MRCS3)
-#define bfin_write_SPORT0_MRCS3(val)    bfin_write32(SPORT0_MRCS3, val)
-/* EPPI0 Registers */
-#define bfin_read_EPPI0_STATUS()        bfin_read16(EPPI0_STATUS)
-#define bfin_write_EPPI0_STATUS(val)    bfin_write16(EPPI0_STATUS, val)
-#define bfin_read_EPPI0_HCOUNT()        bfin_read16(EPPI0_HCOUNT)
-#define bfin_write_EPPI0_HCOUNT(val)    bfin_write16(EPPI0_HCOUNT, val)
-#define bfin_read_EPPI0_HDELAY()        bfin_read16(EPPI0_HDELAY)
-#define bfin_write_EPPI0_HDELAY(val)    bfin_write16(EPPI0_HDELAY, val)
-#define bfin_read_EPPI0_VCOUNT()        bfin_read16(EPPI0_VCOUNT)
-#define bfin_write_EPPI0_VCOUNT(val)    bfin_write16(EPPI0_VCOUNT, val)
-#define bfin_read_EPPI0_VDELAY()        bfin_read16(EPPI0_VDELAY)
-#define bfin_write_EPPI0_VDELAY(val)    bfin_write16(EPPI0_VDELAY, val)
-#define bfin_read_EPPI0_FRAME()         bfin_read16(EPPI0_FRAME)
-#define bfin_write_EPPI0_FRAME(val)     bfin_write16(EPPI0_FRAME, val)
-#define bfin_read_EPPI0_LINE()          bfin_read16(EPPI0_LINE)
-#define bfin_write_EPPI0_LINE(val)      bfin_write16(EPPI0_LINE, val)
-#define bfin_read_EPPI0_CLKDIV()        bfin_read16(EPPI0_CLKDIV)
-#define bfin_write_EPPI0_CLKDIV(val)    bfin_write16(EPPI0_CLKDIV, val)
-#define bfin_read_EPPI0_CONTROL()       bfin_read32(EPPI0_CONTROL)
-#define bfin_write_EPPI0_CONTROL(val)   bfin_write32(EPPI0_CONTROL, val)
-#define bfin_read_EPPI0_FS1W_HBL()      bfin_read32(EPPI0_FS1W_HBL)
-#define bfin_write_EPPI0_FS1W_HBL(val)  bfin_write32(EPPI0_FS1W_HBL, val)
-#define bfin_read_EPPI0_FS1P_AVPL()     bfin_read32(EPPI0_FS1P_AVPL)
-#define bfin_write_EPPI0_FS1P_AVPL(val) bfin_write32(EPPI0_FS1P_AVPL, val)
-#define bfin_read_EPPI0_FS2W_LVB()      bfin_read32(EPPI0_FS2W_LVB)
-#define bfin_write_EPPI0_FS2W_LVB(val)  bfin_write32(EPPI0_FS2W_LVB, val)
-#define bfin_read_EPPI0_FS2P_LAVF()     bfin_read32(EPPI0_FS2P_LAVF)
-#define bfin_write_EPPI0_FS2P_LAVF(val) bfin_write32(EPPI0_FS2P_LAVF, val)
-#define bfin_read_EPPI0_CLIP()          bfin_read32(EPPI0_CLIP)
-#define bfin_write_EPPI0_CLIP(val)      bfin_write32(EPPI0_CLIP, val)
-/* UART2 Registers */
-#define bfin_read_UART2_DLL()           bfin_read16(UART2_DLL)
-#define bfin_write_UART2_DLL(val)       bfin_write16(UART2_DLL, val)
-#define bfin_read_UART2_DLH()           bfin_read16(UART2_DLH)
-#define bfin_write_UART2_DLH(val)       bfin_write16(UART2_DLH, val)
-#define bfin_read_UART2_GCTL()          bfin_read16(UART2_GCTL)
-#define bfin_write_UART2_GCTL(val)      bfin_write16(UART2_GCTL, val)
-#define bfin_read_UART2_LCR()           bfin_read16(UART2_LCR)
-#define bfin_write_UART2_LCR(val)       bfin_write16(UART2_LCR, val)
-#define bfin_read_UART2_MCR()           bfin_read16(UART2_MCR)
-#define bfin_write_UART2_MCR(val)       bfin_write16(UART2_MCR, val)
-#define bfin_read_UART2_LSR()           bfin_read16(UART2_LSR)
-#define bfin_write_UART2_LSR(val)       bfin_write16(UART2_LSR, val)
-#define bfin_read_UART2_MSR()           bfin_read16(UART2_MSR)
-#define bfin_write_UART2_MSR(val)       bfin_write16(UART2_MSR, val)
-#define bfin_read_UART2_SCR()           bfin_read16(UART2_SCR)
-#define bfin_write_UART2_SCR(val)       bfin_write16(UART2_SCR, val)
-#define bfin_read_UART2_IER_SET()       bfin_read16(UART2_IER_SET)
-#define bfin_write_UART2_IER_SET(val)   bfin_write16(UART2_IER_SET, val)
-#define bfin_read_UART2_IER_CLEAR()     bfin_read16(UART2_IER_CLEAR)
-#define bfin_write_UART2_IER_CLEAR(val) bfin_write16(UART2_IER_CLEAR, val)
-#define bfin_read_UART2_RBR()           bfin_read16(UART2_RBR)
-#define bfin_write_UART2_RBR(val)       bfin_write16(UART2_RBR, val)
-/* Two Wire Interface Registers (TWI1) */
-/* SPI2  Registers */
-#define bfin_read_SPI2_CTL()            bfin_read16(SPI2_CTL)
-#define bfin_write_SPI2_CTL(val)        bfin_write16(SPI2_CTL, val)
-#define bfin_read_SPI2_FLG()            bfin_read16(SPI2_FLG)
-#define bfin_write_SPI2_FLG(val)        bfin_write16(SPI2_FLG, val)
-#define bfin_read_SPI2_STAT()           bfin_read16(SPI2_STAT)
-#define bfin_write_SPI2_STAT(val)       bfin_write16(SPI2_STAT, val)
-#define bfin_read_SPI2_TDBR()           bfin_read16(SPI2_TDBR)
-#define bfin_write_SPI2_TDBR(val)       bfin_write16(SPI2_TDBR, val)
-#define bfin_read_SPI2_RDBR()           bfin_read16(SPI2_RDBR)
-#define bfin_write_SPI2_RDBR(val)       bfin_write16(SPI2_RDBR, val)
-#define bfin_read_SPI2_BAUD()           bfin_read16(SPI2_BAUD)
-#define bfin_write_SPI2_BAUD(val)       bfin_write16(SPI2_BAUD, val)
-#define bfin_read_SPI2_SHADOW()         bfin_read16(SPI2_SHADOW)
-#define bfin_write_SPI2_SHADOW(val)     bfin_write16(SPI2_SHADOW, val)
 /* CAN Controller 1 Config 1 Registers */
@@ -923,631 +766,4 @@
 #define bfin_read_CAN1_MB31_ID1()               bfin_read16(CAN1_MB31_ID1)
 #define bfin_write_CAN1_MB31_ID1(val)           bfin_write16(CAN1_MB31_ID1, val)
-/* ATAPI Registers */
-#define bfin_read_ATAPI_CONTROL()               bfin_read16(ATAPI_CONTROL)
-#define bfin_write_ATAPI_CONTROL(val)           bfin_write16(ATAPI_CONTROL, val)
-#define bfin_read_ATAPI_STATUS()                bfin_read16(ATAPI_STATUS)
-#define bfin_write_ATAPI_STATUS(val)            bfin_write16(ATAPI_STATUS, val)
-#define bfin_read_ATAPI_DEV_ADDR()              bfin_read16(ATAPI_DEV_ADDR)
-#define bfin_write_ATAPI_DEV_ADDR(val)          bfin_write16(ATAPI_DEV_ADDR, val)
-#define bfin_read_ATAPI_DEV_TXBUF()             bfin_read16(ATAPI_DEV_TXBUF)
-#define bfin_write_ATAPI_DEV_TXBUF(val)         bfin_write16(ATAPI_DEV_TXBUF, val)
-#define bfin_read_ATAPI_DEV_RXBUF()             bfin_read16(ATAPI_DEV_RXBUF)
-#define bfin_write_ATAPI_DEV_RXBUF(val)         bfin_write16(ATAPI_DEV_RXBUF, val)
-#define bfin_read_ATAPI_INT_MASK()              bfin_read16(ATAPI_INT_MASK)
-#define bfin_write_ATAPI_INT_MASK(val)          bfin_write16(ATAPI_INT_MASK, val)
-#define bfin_read_ATAPI_INT_STATUS()            bfin_read16(ATAPI_INT_STATUS)
-#define bfin_write_ATAPI_INT_STATUS(val)        bfin_write16(ATAPI_INT_STATUS, val)
-#define bfin_read_ATAPI_XFER_LEN()              bfin_read16(ATAPI_XFER_LEN)
-#define bfin_write_ATAPI_XFER_LEN(val)          bfin_write16(ATAPI_XFER_LEN, val)
-#define bfin_read_ATAPI_LINE_STATUS()           bfin_read16(ATAPI_LINE_STATUS)
-#define bfin_write_ATAPI_LINE_STATUS(val)       bfin_write16(ATAPI_LINE_STATUS, val)
-#define bfin_read_ATAPI_SM_STATE()              bfin_read16(ATAPI_SM_STATE)
-#define bfin_write_ATAPI_SM_STATE(val)          bfin_write16(ATAPI_SM_STATE, val)
-#define bfin_read_ATAPI_TERMINATE()             bfin_read16(ATAPI_TERMINATE)
-#define bfin_write_ATAPI_TERMINATE(val)         bfin_write16(ATAPI_TERMINATE, val)
-#define bfin_read_ATAPI_PIO_TFRCNT()            bfin_read16(ATAPI_PIO_TFRCNT)
-#define bfin_write_ATAPI_PIO_TFRCNT(val)        bfin_write16(ATAPI_PIO_TFRCNT, val)
-#define bfin_read_ATAPI_DMA_TFRCNT()            bfin_read16(ATAPI_DMA_TFRCNT)
-#define bfin_write_ATAPI_DMA_TFRCNT(val)        bfin_write16(ATAPI_DMA_TFRCNT, val)
-#define bfin_read_ATAPI_UMAIN_TFRCNT()          bfin_read16(ATAPI_UMAIN_TFRCNT)
-#define bfin_write_ATAPI_UMAIN_TFRCNT(val)      bfin_write16(ATAPI_UMAIN_TFRCNT, val)
-#define bfin_read_ATAPI_UDMAOUT_TFRCNT()        bfin_read16(ATAPI_UDMAOUT_TFRCNT)
-#define bfin_write_ATAPI_UDMAOUT_TFRCNT(val)    bfin_write16(ATAPI_UDMAOUT_TFRCNT, val)
-#define bfin_read_ATAPI_REG_TIM_0()             bfin_read16(ATAPI_REG_TIM_0)
-#define bfin_write_ATAPI_REG_TIM_0(val)         bfin_write16(ATAPI_REG_TIM_0, val)
-#define bfin_read_ATAPI_PIO_TIM_0()             bfin_read16(ATAPI_PIO_TIM_0)
-#define bfin_write_ATAPI_PIO_TIM_0(val)         bfin_write16(ATAPI_PIO_TIM_0, val)
-#define bfin_read_ATAPI_PIO_TIM_1()             bfin_read16(ATAPI_PIO_TIM_1)
-#define bfin_write_ATAPI_PIO_TIM_1(val)         bfin_write16(ATAPI_PIO_TIM_1, val)
-#define bfin_read_ATAPI_MULTI_TIM_0()           bfin_read16(ATAPI_MULTI_TIM_0)
-#define bfin_write_ATAPI_MULTI_TIM_0(val)       bfin_write16(ATAPI_MULTI_TIM_0, val)
-#define bfin_read_ATAPI_MULTI_TIM_1()           bfin_read16(ATAPI_MULTI_TIM_1)
-#define bfin_write_ATAPI_MULTI_TIM_1(val)       bfin_write16(ATAPI_MULTI_TIM_1, val)
-#define bfin_read_ATAPI_MULTI_TIM_2()           bfin_read16(ATAPI_MULTI_TIM_2)
-#define bfin_write_ATAPI_MULTI_TIM_2(val)       bfin_write16(ATAPI_MULTI_TIM_2, val)
-#define bfin_read_ATAPI_ULTRA_TIM_0()           bfin_read16(ATAPI_ULTRA_TIM_0)
-#define bfin_write_ATAPI_ULTRA_TIM_0(val)       bfin_write16(ATAPI_ULTRA_TIM_0, val)
-#define bfin_read_ATAPI_ULTRA_TIM_1()           bfin_read16(ATAPI_ULTRA_TIM_1)
-#define bfin_write_ATAPI_ULTRA_TIM_1(val)       bfin_write16(ATAPI_ULTRA_TIM_1, val)
-#define bfin_read_ATAPI_ULTRA_TIM_2()           bfin_read16(ATAPI_ULTRA_TIM_2)
-#define bfin_write_ATAPI_ULTRA_TIM_2(val)       bfin_write16(ATAPI_ULTRA_TIM_2, val)
-#define bfin_read_ATAPI_ULTRA_TIM_3()           bfin_read16(ATAPI_ULTRA_TIM_3)
-#define bfin_write_ATAPI_ULTRA_TIM_3(val)       bfin_write16(ATAPI_ULTRA_TIM_3, val)
-/* SDH Registers */
-#define bfin_read_SDH_PWR_CTL()         bfin_read16(SDH_PWR_CTL)
-#define bfin_write_SDH_PWR_CTL(val)     bfin_write16(SDH_PWR_CTL, val)
-#define bfin_read_SDH_CLK_CTL()         bfin_read16(SDH_CLK_CTL)
-#define bfin_write_SDH_CLK_CTL(val)     bfin_write16(SDH_CLK_CTL, val)
-#define bfin_read_SDH_ARGUMENT()        bfin_read32(SDH_ARGUMENT)
-#define bfin_write_SDH_ARGUMENT(val)    bfin_write32(SDH_ARGUMENT, val)
-#define bfin_read_SDH_COMMAND()         bfin_read16(SDH_COMMAND)
-#define bfin_write_SDH_COMMAND(val)     bfin_write16(SDH_COMMAND, val)
-#define bfin_read_SDH_RESP_CMD()        bfin_read16(SDH_RESP_CMD)
-#define bfin_write_SDH_RESP_CMD(val)    bfin_write16(SDH_RESP_CMD, val)
-#define bfin_read_SDH_RESPONSE0()       bfin_read32(SDH_RESPONSE0)
-#define bfin_write_SDH_RESPONSE0(val)   bfin_write32(SDH_RESPONSE0, val)
-#define bfin_read_SDH_RESPONSE1()       bfin_read32(SDH_RESPONSE1)
-#define bfin_write_SDH_RESPONSE1(val)   bfin_write32(SDH_RESPONSE1, val)
-#define bfin_read_SDH_RESPONSE2()       bfin_read32(SDH_RESPONSE2)
-#define bfin_write_SDH_RESPONSE2(val)   bfin_write32(SDH_RESPONSE2, val)
-#define bfin_read_SDH_RESPONSE3()       bfin_read32(SDH_RESPONSE3)
-#define bfin_write_SDH_RESPONSE3(val)   bfin_write32(SDH_RESPONSE3, val)
-#define bfin_read_SDH_DATA_TIMER()      bfin_read32(SDH_DATA_TIMER)
-#define bfin_write_SDH_DATA_TIMER(val)  bfin_write32(SDH_DATA_TIMER, val)
-#define bfin_read_SDH_DATA_LGTH()       bfin_read16(SDH_DATA_LGTH)
-#define bfin_write_SDH_DATA_LGTH(val)   bfin_write16(SDH_DATA_LGTH, val)
-#define bfin_read_SDH_DATA_CTL()        bfin_read16(SDH_DATA_CTL)
-#define bfin_write_SDH_DATA_CTL(val)    bfin_write16(SDH_DATA_CTL, val)
-#define bfin_read_SDH_DATA_CNT()        bfin_read16(SDH_DATA_CNT)
-#define bfin_write_SDH_DATA_CNT(val)    bfin_write16(SDH_DATA_CNT, val)
-#define bfin_read_SDH_STATUS()          bfin_read32(SDH_STATUS)
-#define bfin_write_SDH_STATUS(val)      bfin_write32(SDH_STATUS, val)
-#define bfin_read_SDH_STATUS_CLR()      bfin_read16(SDH_STATUS_CLR)
-#define bfin_write_SDH_STATUS_CLR(val)  bfin_write16(SDH_STATUS_CLR, val)
-#define bfin_read_SDH_MASK0()           bfin_read32(SDH_MASK0)
-#define bfin_write_SDH_MASK0(val)       bfin_write32(SDH_MASK0, val)
-#define bfin_read_SDH_MASK1()           bfin_read32(SDH_MASK1)
-#define bfin_write_SDH_MASK1(val)       bfin_write32(SDH_MASK1, val)
-#define bfin_read_SDH_FIFO_CNT()        bfin_read16(SDH_FIFO_CNT)
-#define bfin_write_SDH_FIFO_CNT(val)    bfin_write16(SDH_FIFO_CNT, val)
-#define bfin_read_SDH_FIFO()            bfin_read32(SDH_FIFO)
-#define bfin_write_SDH_FIFO(val)        bfin_write32(SDH_FIFO, val)
-#define bfin_read_SDH_E_STATUS()        bfin_read16(SDH_E_STATUS)
-#define bfin_write_SDH_E_STATUS(val)    bfin_write16(SDH_E_STATUS, val)
-#define bfin_read_SDH_E_MASK()          bfin_read16(SDH_E_MASK)
-#define bfin_write_SDH_E_MASK(val)      bfin_write16(SDH_E_MASK, val)
-#define bfin_read_SDH_CFG()             bfin_read16(SDH_CFG)
-#define bfin_write_SDH_CFG(val)         bfin_write16(SDH_CFG, val)
-#define bfin_read_SDH_RD_WAIT_EN()      bfin_read16(SDH_RD_WAIT_EN)
-#define bfin_write_SDH_RD_WAIT_EN(val)  bfin_write16(SDH_RD_WAIT_EN, val)
-#define bfin_read_SDH_PID0()            bfin_read16(SDH_PID0)
-#define bfin_write_SDH_PID0(val)        bfin_write16(SDH_PID0, val)
-#define bfin_read_SDH_PID1()            bfin_read16(SDH_PID1)
-#define bfin_write_SDH_PID1(val)        bfin_write16(SDH_PID1, val)
-#define bfin_read_SDH_PID2()            bfin_read16(SDH_PID2)
-#define bfin_write_SDH_PID2(val)        bfin_write16(SDH_PID2, val)
-#define bfin_read_SDH_PID3()            bfin_read16(SDH_PID3)
-#define bfin_write_SDH_PID3(val)        bfin_write16(SDH_PID3, val)
-#define bfin_read_SDH_PID4()            bfin_read16(SDH_PID4)
-#define bfin_write_SDH_PID4(val)        bfin_write16(SDH_PID4, val)
-#define bfin_read_SDH_PID5()            bfin_read16(SDH_PID5)
-#define bfin_write_SDH_PID5(val)        bfin_write16(SDH_PID5, val)
-#define bfin_read_SDH_PID6()            bfin_read16(SDH_PID6)
-#define bfin_write_SDH_PID6(val)        bfin_write16(SDH_PID6, val)
-#define bfin_read_SDH_PID7()            bfin_read16(SDH_PID7)
-#define bfin_write_SDH_PID7(val)        bfin_write16(SDH_PID7, val)
-/* HOST Port Registers */
-#define bfin_read_HOST_CONTROL()        bfin_read16(HOST_CONTROL)
-#define bfin_write_HOST_CONTROL(val)    bfin_write16(HOST_CONTROL, val)
-#define bfin_read_HOST_STATUS()         bfin_read16(HOST_STATUS)
-#define bfin_write_HOST_STATUS(val)     bfin_write16(HOST_STATUS, val)
-#define bfin_read_HOST_TIMEOUT()        bfin_read16(HOST_TIMEOUT)
-#define bfin_write_HOST_TIMEOUT(val)    bfin_write16(HOST_TIMEOUT, val)
-/* USB Control Registers */
-#define bfin_read_USB_FADDR()           bfin_read16(USB_FADDR)
-#define bfin_write_USB_FADDR(val)       bfin_write16(USB_FADDR, val)
-#define bfin_read_USB_POWER()           bfin_read16(USB_POWER)
-#define bfin_write_USB_POWER(val)       bfin_write16(USB_POWER, val)
-#define bfin_read_USB_INTRTX()          bfin_read16(USB_INTRTX)
-#define bfin_write_USB_INTRTX(val)      bfin_write16(USB_INTRTX, val)
-#define bfin_read_USB_INTRRX()          bfin_read16(USB_INTRRX)
-#define bfin_write_USB_INTRRX(val)      bfin_write16(USB_INTRRX, val)
-#define bfin_read_USB_INTRTXE()         bfin_read16(USB_INTRTXE)
-#define bfin_write_USB_INTRTXE(val)     bfin_write16(USB_INTRTXE, val)
-#define bfin_read_USB_INTRRXE()         bfin_read16(USB_INTRRXE)
-#define bfin_write_USB_INTRRXE(val)     bfin_write16(USB_INTRRXE, val)
-#define bfin_read_USB_INTRUSB()         bfin_read16(USB_INTRUSB)
-#define bfin_write_USB_INTRUSB(val)     bfin_write16(USB_INTRUSB, val)
-#define bfin_read_USB_INTRUSBE()        bfin_read16(USB_INTRUSBE)
-#define bfin_write_USB_INTRUSBE(val)    bfin_write16(USB_INTRUSBE, val)
-#define bfin_read_USB_FRAME()           bfin_read16(USB_FRAME)
-#define bfin_write_USB_FRAME(val)       bfin_write16(USB_FRAME, val)
-#define bfin_read_USB_INDEX()           bfin_read16(USB_INDEX)
-#define bfin_write_USB_INDEX(val)       bfin_write16(USB_INDEX, val)
-#define bfin_read_USB_TESTMODE()        bfin_read16(USB_TESTMODE)
-#define bfin_write_USB_TESTMODE(val)    bfin_write16(USB_TESTMODE, val)
-#define bfin_read_USB_GLOBINTR()        bfin_read16(USB_GLOBINTR)
-#define bfin_write_USB_GLOBINTR(val)    bfin_write16(USB_GLOBINTR, val)
-#define bfin_read_USB_GLOBAL_CTL()      bfin_read16(USB_GLOBAL_CTL)
-#define bfin_write_USB_GLOBAL_CTL(val)          bfin_write16(USB_GLOBAL_CTL, val)
-/* USB Packet Control Registers */
-#define bfin_read_USB_TX_MAX_PACKET()           bfin_read16(USB_TX_MAX_PACKET)
-#define bfin_write_USB_TX_MAX_PACKET(val)       bfin_write16(USB_TX_MAX_PACKET, val)
-#define bfin_read_USB_CSR0()            bfin_read16(USB_CSR0)
-#define bfin_write_USB_CSR0(val)        bfin_write16(USB_CSR0, val)
-#define bfin_read_USB_TXCSR()           bfin_read16(USB_TXCSR)
-#define bfin_write_USB_TXCSR(val)       bfin_write16(USB_TXCSR, val)
-#define bfin_read_USB_RX_MAX_PACKET()           bfin_read16(USB_RX_MAX_PACKET)
-#define bfin_write_USB_RX_MAX_PACKET(val)       bfin_write16(USB_RX_MAX_PACKET, val)
-#define bfin_read_USB_RXCSR()           bfin_read16(USB_RXCSR)
-#define bfin_write_USB_RXCSR(val)       bfin_write16(USB_RXCSR, val)
-#define bfin_read_USB_COUNT0()          bfin_read16(USB_COUNT0)
-#define bfin_write_USB_COUNT0(val)      bfin_write16(USB_COUNT0, val)
-#define bfin_read_USB_RXCOUNT()         bfin_read16(USB_RXCOUNT)
-#define bfin_write_USB_RXCOUNT(val)     bfin_write16(USB_RXCOUNT, val)
-#define bfin_read_USB_TXTYPE()          bfin_read16(USB_TXTYPE)
-#define bfin_write_USB_TXTYPE(val)      bfin_write16(USB_TXTYPE, val)
-#define bfin_read_USB_NAKLIMIT0()       bfin_read16(USB_NAKLIMIT0)
-#define bfin_write_USB_NAKLIMIT0(val)   bfin_write16(USB_NAKLIMIT0, val)
-#define bfin_read_USB_TXINTERVAL()      bfin_read16(USB_TXINTERVAL)
-#define bfin_write_USB_TXINTERVAL(val)  bfin_write16(USB_TXINTERVAL, val)
-#define bfin_read_USB_RXTYPE()          bfin_read16(USB_RXTYPE)
-#define bfin_write_USB_RXTYPE(val)      bfin_write16(USB_RXTYPE, val)
-#define bfin_read_USB_RXINTERVAL()      bfin_read16(USB_RXINTERVAL)
-#define bfin_write_USB_RXINTERVAL(val)  bfin_write16(USB_RXINTERVAL, val)
-#define bfin_read_USB_TXCOUNT()         bfin_read16(USB_TXCOUNT)
-#define bfin_write_USB_TXCOUNT(val)     bfin_write16(USB_TXCOUNT, val)
-/* USB Endbfin_read_()oint FIFO Registers */
-#define bfin_read_USB_EP0_FIFO()        bfin_read16(USB_EP0_FIFO)
-#define bfin_write_USB_EP0_FIFO(val)    bfin_write16(USB_EP0_FIFO, val)
-#define bfin_read_USB_EP1_FIFO()        bfin_read16(USB_EP1_FIFO)
-#define bfin_write_USB_EP1_FIFO(val)    bfin_write16(USB_EP1_FIFO, val)
-#define bfin_read_USB_EP2_FIFO()        bfin_read16(USB_EP2_FIFO)
-#define bfin_write_USB_EP2_FIFO(val)    bfin_write16(USB_EP2_FIFO, val)
-#define bfin_read_USB_EP3_FIFO()        bfin_read16(USB_EP3_FIFO)
-#define bfin_write_USB_EP3_FIFO(val)    bfin_write16(USB_EP3_FIFO, val)
-#define bfin_read_USB_EP4_FIFO()        bfin_read16(USB_EP4_FIFO)
-#define bfin_write_USB_EP4_FIFO(val)    bfin_write16(USB_EP4_FIFO, val)
-#define bfin_read_USB_EP5_FIFO()        bfin_read16(USB_EP5_FIFO)
-#define bfin_write_USB_EP5_FIFO(val)    bfin_write16(USB_EP5_FIFO, val)
-#define bfin_read_USB_EP6_FIFO()        bfin_read16(USB_EP6_FIFO)
-#define bfin_write_USB_EP6_FIFO(val)    bfin_write16(USB_EP6_FIFO, val)
-#define bfin_read_USB_EP7_FIFO()        bfin_read16(USB_EP7_FIFO)
-#define bfin_write_USB_EP7_FIFO(val)    bfin_write16(USB_EP7_FIFO, val)
-/* USB OTG Control Registers */
-#define bfin_read_USB_OTG_DEV_CTL()             bfin_read16(USB_OTG_DEV_CTL)
-#define bfin_write_USB_OTG_DEV_CTL(val)         bfin_write16(USB_OTG_DEV_CTL, val)
-#define bfin_read_USB_OTG_VBUS_IRQ()            bfin_read16(USB_OTG_VBUS_IRQ)
-#define bfin_write_USB_OTG_VBUS_IRQ(val)        bfin_write16(USB_OTG_VBUS_IRQ, val)
-#define bfin_read_USB_OTG_VBUS_MASK()           bfin_read16(USB_OTG_VBUS_MASK)
-#define bfin_write_USB_OTG_VBUS_MASK(val)       bfin_write16(USB_OTG_VBUS_MASK, val)
-/* USB Phy Control Registers */
-#define bfin_read_USB_LINKINFO()        bfin_read16(USB_LINKINFO)
-#define bfin_write_USB_LINKINFO(val)    bfin_write16(USB_LINKINFO, val)
-#define bfin_read_USB_VPLEN()           bfin_read16(USB_VPLEN)
-#define bfin_write_USB_VPLEN(val)       bfin_write16(USB_VPLEN, val)
-#define bfin_read_USB_HS_EOF1()         bfin_read16(USB_HS_EOF1)
-#define bfin_write_USB_HS_EOF1(val)     bfin_write16(USB_HS_EOF1, val)
-#define bfin_read_USB_FS_EOF1()         bfin_read16(USB_FS_EOF1)
-#define bfin_write_USB_FS_EOF1(val)     bfin_write16(USB_FS_EOF1, val)
-#define bfin_read_USB_LS_EOF1()         bfin_read16(USB_LS_EOF1)
-#define bfin_write_USB_LS_EOF1(val)     bfin_write16(USB_LS_EOF1, val)
-/* (APHY_CNTRL is for ADI usage only) */
-#define bfin_read_USB_APHY_CNTRL()              bfin_read16(USB_APHY_CNTRL)
-#define bfin_write_USB_APHY_CNTRL(val)          bfin_write16(USB_APHY_CNTRL, val)
-/* (APHY_CALIB is for ADI usage only) */
-#define bfin_read_USB_APHY_CALIB()              bfin_read16(USB_APHY_CALIB)
-#define bfin_write_USB_APHY_CALIB(val)          bfin_write16(USB_APHY_CALIB, val)
-#define bfin_read_USB_APHY_CNTRL2()             bfin_read16(USB_APHY_CNTRL2)
-#define bfin_write_USB_APHY_CNTRL2(val)         bfin_write16(USB_APHY_CNTRL2, val)
-/* (PHY_TEST is for ADI usage only) */
-#define bfin_read_USB_PHY_TEST()                bfin_read16(USB_PHY_TEST)
-#define bfin_write_USB_PHY_TEST(val)            bfin_write16(USB_PHY_TEST, val)
-#define bfin_read_USB_PLLOSC_CTRL()             bfin_read16(USB_PLLOSC_CTRL)
-#define bfin_write_USB_PLLOSC_CTRL(val)         bfin_write16(USB_PLLOSC_CTRL, val)
-#define bfin_read_USB_SRP_CLKDIV()              bfin_read16(USB_SRP_CLKDIV)
-#define bfin_write_USB_SRP_CLKDIV(val)          bfin_write16(USB_SRP_CLKDIV, val)
-/* USB Endbfin_read_()oint 0 Control Registers */
-#define bfin_read_USB_EP_NI0_TXMAXP()           bfin_read16(USB_EP_NI0_TXMAXP)
-#define bfin_write_USB_EP_NI0_TXMAXP(val)       bfin_write16(USB_EP_NI0_TXMAXP, val)
-#define bfin_read_USB_EP_NI0_TXCSR()            bfin_read16(USB_EP_NI0_TXCSR)
-#define bfin_write_USB_EP_NI0_TXCSR(val)        bfin_write16(USB_EP_NI0_TXCSR, val)
-#define bfin_read_USB_EP_NI0_RXMAXP()           bfin_read16(USB_EP_NI0_RXMAXP)
-#define bfin_write_USB_EP_NI0_RXMAXP(val)       bfin_write16(USB_EP_NI0_RXMAXP, val)
-#define bfin_read_USB_EP_NI0_RXCSR()            bfin_read16(USB_EP_NI0_RXCSR)
-#define bfin_write_USB_EP_NI0_RXCSR(val)        bfin_write16(USB_EP_NI0_RXCSR, val)
-#define bfin_read_USB_EP_NI0_RXCOUNT()          bfin_read16(USB_EP_NI0_RXCOUNT)
-#define bfin_write_USB_EP_NI0_RXCOUNT(val)      bfin_write16(USB_EP_NI0_RXCOUNT, val)
-#define bfin_read_USB_EP_NI0_TXTYPE()           bfin_read16(USB_EP_NI0_TXTYPE)
-#define bfin_write_USB_EP_NI0_TXTYPE(val)       bfin_write16(USB_EP_NI0_TXTYPE, val)
-#define bfin_read_USB_EP_NI0_TXINTERVAL()       bfin_read16(USB_EP_NI0_TXINTERVAL)
-#define bfin_write_USB_EP_NI0_TXINTERVAL(val)   bfin_write16(USB_EP_NI0_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI0_RXTYPE()           bfin_read16(USB_EP_NI0_RXTYPE)
-#define bfin_write_USB_EP_NI0_RXTYPE(val)       bfin_write16(USB_EP_NI0_RXTYPE, val)
-#define bfin_read_USB_EP_NI0_RXINTERVAL()       bfin_read16(USB_EP_NI0_RXINTERVAL)
-#define bfin_write_USB_EP_NI0_RXINTERVAL(val)   bfin_write16(USB_EP_NI0_RXINTERVAL, val)
-/* USB Endbfin_read_()oint 1 Control Registers */
-#define bfin_read_USB_EP_NI0_TXCOUNT()          bfin_read16(USB_EP_NI0_TXCOUNT)
-#define bfin_write_USB_EP_NI0_TXCOUNT(val)      bfin_write16(USB_EP_NI0_TXCOUNT, val)
-#define bfin_read_USB_EP_NI1_TXMAXP()           bfin_read16(USB_EP_NI1_TXMAXP)
-#define bfin_write_USB_EP_NI1_TXMAXP(val)       bfin_write16(USB_EP_NI1_TXMAXP, val)
-#define bfin_read_USB_EP_NI1_TXCSR()            bfin_read16(USB_EP_NI1_TXCSR)
-#define bfin_write_USB_EP_NI1_TXCSR(val)        bfin_write16(USB_EP_NI1_TXCSR, val)
-#define bfin_read_USB_EP_NI1_RXMAXP()           bfin_read16(USB_EP_NI1_RXMAXP)
-#define bfin_write_USB_EP_NI1_RXMAXP(val)       bfin_write16(USB_EP_NI1_RXMAXP, val)
-#define bfin_read_USB_EP_NI1_RXCSR()            bfin_read16(USB_EP_NI1_RXCSR)
-#define bfin_write_USB_EP_NI1_RXCSR(val)        bfin_write16(USB_EP_NI1_RXCSR, val)
-#define bfin_read_USB_EP_NI1_RXCOUNT()          bfin_read16(USB_EP_NI1_RXCOUNT)
-#define bfin_write_USB_EP_NI1_RXCOUNT(val)      bfin_write16(USB_EP_NI1_RXCOUNT, val)
-#define bfin_read_USB_EP_NI1_TXTYPE()           bfin_read16(USB_EP_NI1_TXTYPE)
-#define bfin_write_USB_EP_NI1_TXTYPE(val)       bfin_write16(USB_EP_NI1_TXTYPE, val)
-#define bfin_read_USB_EP_NI1_TXINTERVAL()       bfin_read16(USB_EP_NI1_TXINTERVAL)
-#define bfin_write_USB_EP_NI1_TXINTERVAL(val)   bfin_write16(USB_EP_NI1_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI1_RXTYPE()           bfin_read16(USB_EP_NI1_RXTYPE)
-#define bfin_write_USB_EP_NI1_RXTYPE(val)       bfin_write16(USB_EP_NI1_RXTYPE, val)
-#define bfin_read_USB_EP_NI1_RXINTERVAL()       bfin_read16(USB_EP_NI1_RXINTERVAL)
-#define bfin_write_USB_EP_NI1_RXINTERVAL(val)   bfin_write16(USB_EP_NI1_RXINTERVAL, val)
-/* USB Endbfin_read_()oint 2 Control Registers */
-#define bfin_read_USB_EP_NI1_TXCOUNT()          bfin_read16(USB_EP_NI1_TXCOUNT)
-#define bfin_write_USB_EP_NI1_TXCOUNT(val)      bfin_write16(USB_EP_NI1_TXCOUNT, val)
-#define bfin_read_USB_EP_NI2_TXMAXP()           bfin_read16(USB_EP_NI2_TXMAXP)
-#define bfin_write_USB_EP_NI2_TXMAXP(val)       bfin_write16(USB_EP_NI2_TXMAXP, val)
-#define bfin_read_USB_EP_NI2_TXCSR()            bfin_read16(USB_EP_NI2_TXCSR)
-#define bfin_write_USB_EP_NI2_TXCSR(val)        bfin_write16(USB_EP_NI2_TXCSR, val)
-#define bfin_read_USB_EP_NI2_RXMAXP()           bfin_read16(USB_EP_NI2_RXMAXP)
-#define bfin_write_USB_EP_NI2_RXMAXP(val)       bfin_write16(USB_EP_NI2_RXMAXP, val)
-#define bfin_read_USB_EP_NI2_RXCSR()            bfin_read16(USB_EP_NI2_RXCSR)
-#define bfin_write_USB_EP_NI2_RXCSR(val)        bfin_write16(USB_EP_NI2_RXCSR, val)
-#define bfin_read_USB_EP_NI2_RXCOUNT()          bfin_read16(USB_EP_NI2_RXCOUNT)
-#define bfin_write_USB_EP_NI2_RXCOUNT(val)      bfin_write16(USB_EP_NI2_RXCOUNT, val)
-#define bfin_read_USB_EP_NI2_TXTYPE()           bfin_read16(USB_EP_NI2_TXTYPE)
-#define bfin_write_USB_EP_NI2_TXTYPE(val)       bfin_write16(USB_EP_NI2_TXTYPE, val)
-#define bfin_read_USB_EP_NI2_TXINTERVAL()       bfin_read16(USB_EP_NI2_TXINTERVAL)
-#define bfin_write_USB_EP_NI2_TXINTERVAL(val)   bfin_write16(USB_EP_NI2_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI2_RXTYPE()           bfin_read16(USB_EP_NI2_RXTYPE)
-#define bfin_write_USB_EP_NI2_RXTYPE(val)       bfin_write16(USB_EP_NI2_RXTYPE, val)
-#define bfin_read_USB_EP_NI2_RXINTERVAL()       bfin_read16(USB_EP_NI2_RXINTERVAL)
-#define bfin_write_USB_EP_NI2_RXINTERVAL(val)   bfin_write16(USB_EP_NI2_RXINTERVAL, val)
-/* USB Endbfin_read_()oint 3 Control Registers */
-#define bfin_read_USB_EP_NI2_TXCOUNT()          bfin_read16(USB_EP_NI2_TXCOUNT)
-#define bfin_write_USB_EP_NI2_TXCOUNT(val)      bfin_write16(USB_EP_NI2_TXCOUNT, val)
-#define bfin_read_USB_EP_NI3_TXMAXP()           bfin_read16(USB_EP_NI3_TXMAXP)
-#define bfin_write_USB_EP_NI3_TXMAXP(val)       bfin_write16(USB_EP_NI3_TXMAXP, val)
-#define bfin_read_USB_EP_NI3_TXCSR()            bfin_read16(USB_EP_NI3_TXCSR)
-#define bfin_write_USB_EP_NI3_TXCSR(val)        bfin_write16(USB_EP_NI3_TXCSR, val)
-#define bfin_read_USB_EP_NI3_RXMAXP()           bfin_read16(USB_EP_NI3_RXMAXP)
-#define bfin_write_USB_EP_NI3_RXMAXP(val)       bfin_write16(USB_EP_NI3_RXMAXP, val)
-#define bfin_read_USB_EP_NI3_RXCSR()            bfin_read16(USB_EP_NI3_RXCSR)
-#define bfin_write_USB_EP_NI3_RXCSR(val)        bfin_write16(USB_EP_NI3_RXCSR, val)
-#define bfin_read_USB_EP_NI3_RXCOUNT()          bfin_read16(USB_EP_NI3_RXCOUNT)
-#define bfin_write_USB_EP_NI3_RXCOUNT(val)      bfin_write16(USB_EP_NI3_RXCOUNT, val)
-#define bfin_read_USB_EP_NI3_TXTYPE()           bfin_read16(USB_EP_NI3_TXTYPE)
-#define bfin_write_USB_EP_NI3_TXTYPE(val)       bfin_write16(USB_EP_NI3_TXTYPE, val)
-#define bfin_read_USB_EP_NI3_TXINTERVAL()       bfin_read16(USB_EP_NI3_TXINTERVAL)
-#define bfin_write_USB_EP_NI3_TXINTERVAL(val)   bfin_write16(USB_EP_NI3_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI3_RXTYPE()           bfin_read16(USB_EP_NI3_RXTYPE)
-#define bfin_write_USB_EP_NI3_RXTYPE(val)       bfin_write16(USB_EP_NI3_RXTYPE, val)
-#define bfin_read_USB_EP_NI3_RXINTERVAL()       bfin_read16(USB_EP_NI3_RXINTERVAL)
-#define bfin_write_USB_EP_NI3_RXINTERVAL(val)   bfin_write16(USB_EP_NI3_RXINTERVAL, val)
-/* USB Endbfin_read_()oint 4 Control Registers */
-#define bfin_read_USB_EP_NI3_TXCOUNT()          bfin_read16(USB_EP_NI3_TXCOUNT)
-#define bfin_write_USB_EP_NI3_TXCOUNT(val)      bfin_write16(USB_EP_NI3_TXCOUNT, val)
-#define bfin_read_USB_EP_NI4_TXMAXP()           bfin_read16(USB_EP_NI4_TXMAXP)
-#define bfin_write_USB_EP_NI4_TXMAXP(val)       bfin_write16(USB_EP_NI4_TXMAXP, val)
-#define bfin_read_USB_EP_NI4_TXCSR()            bfin_read16(USB_EP_NI4_TXCSR)
-#define bfin_write_USB_EP_NI4_TXCSR(val)        bfin_write16(USB_EP_NI4_TXCSR, val)
-#define bfin_read_USB_EP_NI4_RXMAXP()           bfin_read16(USB_EP_NI4_RXMAXP)
-#define bfin_write_USB_EP_NI4_RXMAXP(val)       bfin_write16(USB_EP_NI4_RXMAXP, val)
-#define bfin_read_USB_EP_NI4_RXCSR()            bfin_read16(USB_EP_NI4_RXCSR)
-#define bfin_write_USB_EP_NI4_RXCSR(val)        bfin_write16(USB_EP_NI4_RXCSR, val)
-#define bfin_read_USB_EP_NI4_RXCOUNT()          bfin_read16(USB_EP_NI4_RXCOUNT)
-#define bfin_write_USB_EP_NI4_RXCOUNT(val)      bfin_write16(USB_EP_NI4_RXCOUNT, val)
-#define bfin_read_USB_EP_NI4_TXTYPE()           bfin_read16(USB_EP_NI4_TXTYPE)
-#define bfin_write_USB_EP_NI4_TXTYPE(val)       bfin_write16(USB_EP_NI4_TXTYPE, val)
-#define bfin_read_USB_EP_NI4_TXINTERVAL()       bfin_read16(USB_EP_NI4_TXINTERVAL)
-#define bfin_write_USB_EP_NI4_TXINTERVAL(val)   bfin_write16(USB_EP_NI4_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI4_RXTYPE()           bfin_read16(USB_EP_NI4_RXTYPE)
-#define bfin_write_USB_EP_NI4_RXTYPE(val)       bfin_write16(USB_EP_NI4_RXTYPE, val)
-#define bfin_read_USB_EP_NI4_RXINTERVAL()       bfin_read16(USB_EP_NI4_RXINTERVAL)
-#define bfin_write_USB_EP_NI4_RXINTERVAL(val)   bfin_write16(USB_EP_NI4_RXINTERVAL, val)
-/* USB Endbfin_read_()oint 5 Control Registers */
-#define bfin_read_USB_EP_NI4_TXCOUNT()          bfin_read16(USB_EP_NI4_TXCOUNT)
-#define bfin_write_USB_EP_NI4_TXCOUNT(val)      bfin_write16(USB_EP_NI4_TXCOUNT, val)
-#define bfin_read_USB_EP_NI5_TXMAXP()           bfin_read16(USB_EP_NI5_TXMAXP)
-#define bfin_write_USB_EP_NI5_TXMAXP(val)       bfin_write16(USB_EP_NI5_TXMAXP, val)
-#define bfin_read_USB_EP_NI5_TXCSR()            bfin_read16(USB_EP_NI5_TXCSR)
-#define bfin_write_USB_EP_NI5_TXCSR(val)        bfin_write16(USB_EP_NI5_TXCSR, val)
-#define bfin_read_USB_EP_NI5_RXMAXP()           bfin_read16(USB_EP_NI5_RXMAXP)
-#define bfin_write_USB_EP_NI5_RXMAXP(val)       bfin_write16(USB_EP_NI5_RXMAXP, val)
-#define bfin_read_USB_EP_NI5_RXCSR()            bfin_read16(USB_EP_NI5_RXCSR)
-#define bfin_write_USB_EP_NI5_RXCSR(val)        bfin_write16(USB_EP_NI5_RXCSR, val)
-#define bfin_read_USB_EP_NI5_RXCOUNT()          bfin_read16(USB_EP_NI5_RXCOUNT)
-#define bfin_write_USB_EP_NI5_RXCOUNT(val)      bfin_write16(USB_EP_NI5_RXCOUNT, val)
-#define bfin_read_USB_EP_NI5_TXTYPE()           bfin_read16(USB_EP_NI5_TXTYPE)
-#define bfin_write_USB_EP_NI5_TXTYPE(val)       bfin_write16(USB_EP_NI5_TXTYPE, val)
-#define bfin_read_USB_EP_NI5_TXINTERVAL()       bfin_read16(USB_EP_NI5_TXINTERVAL)
-#define bfin_write_USB_EP_NI5_TXINTERVAL(val)   bfin_write16(USB_EP_NI5_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI5_RXTYPE()           bfin_read16(USB_EP_NI5_RXTYPE)
-#define bfin_write_USB_EP_NI5_RXTYPE(val)       bfin_write16(USB_EP_NI5_RXTYPE, val)
-#define bfin_read_USB_EP_NI5_RXINTERVAL()       bfin_read16(USB_EP_NI5_RXINTERVAL)
-#define bfin_write_USB_EP_NI5_RXINTERVAL(val)   bfin_write16(USB_EP_NI5_RXINTERVAL, val)
-/* USB Endbfin_read_()oint 6 Control Registers */
-#define bfin_read_USB_EP_NI5_TXCOUNT()          bfin_read16(USB_EP_NI5_TXCOUNT)
-#define bfin_write_USB_EP_NI5_TXCOUNT(val)      bfin_write16(USB_EP_NI5_TXCOUNT, val)
-#define bfin_read_USB_EP_NI6_TXMAXP()           bfin_read16(USB_EP_NI6_TXMAXP)
-#define bfin_write_USB_EP_NI6_TXMAXP(val)       bfin_write16(USB_EP_NI6_TXMAXP, val)
-#define bfin_read_USB_EP_NI6_TXCSR()            bfin_read16(USB_EP_NI6_TXCSR)
-#define bfin_write_USB_EP_NI6_TXCSR(val)        bfin_write16(USB_EP_NI6_TXCSR, val)
-#define bfin_read_USB_EP_NI6_RXMAXP()           bfin_read16(USB_EP_NI6_RXMAXP)
-#define bfin_write_USB_EP_NI6_RXMAXP(val)       bfin_write16(USB_EP_NI6_RXMAXP, val)
-#define bfin_read_USB_EP_NI6_RXCSR()            bfin_read16(USB_EP_NI6_RXCSR)
-#define bfin_write_USB_EP_NI6_RXCSR(val)        bfin_write16(USB_EP_NI6_RXCSR, val)
-#define bfin_read_USB_EP_NI6_RXCOUNT()          bfin_read16(USB_EP_NI6_RXCOUNT)
-#define bfin_write_USB_EP_NI6_RXCOUNT(val)      bfin_write16(USB_EP_NI6_RXCOUNT, val)
-#define bfin_read_USB_EP_NI6_TXTYPE()           bfin_read16(USB_EP_NI6_TXTYPE)
-#define bfin_write_USB_EP_NI6_TXTYPE(val)       bfin_write16(USB_EP_NI6_TXTYPE, val)
-#define bfin_read_USB_EP_NI6_TXINTERVAL()       bfin_read16(USB_EP_NI6_TXINTERVAL)
-#define bfin_write_USB_EP_NI6_TXINTERVAL(val)   bfin_write16(USB_EP_NI6_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI6_RXTYPE()           bfin_read16(USB_EP_NI6_RXTYPE)
-#define bfin_write_USB_EP_NI6_RXTYPE(val)       bfin_write16(USB_EP_NI6_RXTYPE, val)
-#define bfin_read_USB_EP_NI6_RXINTERVAL()       bfin_read16(USB_EP_NI6_RXINTERVAL)
-#define bfin_write_USB_EP_NI6_RXINTERVAL(val)   bfin_write16(USB_EP_NI6_RXINTERVAL, val)
-/* USB Endbfin_read_()oint 7 Control Registers */
-#define bfin_read_USB_EP_NI6_TXCOUNT()          bfin_read16(USB_EP_NI6_TXCOUNT)
-#define bfin_write_USB_EP_NI6_TXCOUNT(val)      bfin_write16(USB_EP_NI6_TXCOUNT, val)
-#define bfin_read_USB_EP_NI7_TXMAXP()           bfin_read16(USB_EP_NI7_TXMAXP)
-#define bfin_write_USB_EP_NI7_TXMAXP(val)       bfin_write16(USB_EP_NI7_TXMAXP, val)
-#define bfin_read_USB_EP_NI7_TXCSR()            bfin_read16(USB_EP_NI7_TXCSR)
-#define bfin_write_USB_EP_NI7_TXCSR(val)        bfin_write16(USB_EP_NI7_TXCSR, val)
-#define bfin_read_USB_EP_NI7_RXMAXP()           bfin_read16(USB_EP_NI7_RXMAXP)
-#define bfin_write_USB_EP_NI7_RXMAXP(val)       bfin_write16(USB_EP_NI7_RXMAXP, val)
-#define bfin_read_USB_EP_NI7_RXCSR()            bfin_read16(USB_EP_NI7_RXCSR)
-#define bfin_write_USB_EP_NI7_RXCSR(val)        bfin_write16(USB_EP_NI7_RXCSR, val)
-#define bfin_read_USB_EP_NI7_RXCOUNT()          bfin_read16(USB_EP_NI7_RXCOUNT)
-#define bfin_write_USB_EP_NI7_RXCOUNT(val)      bfin_write16(USB_EP_NI7_RXCOUNT, val)
-#define bfin_read_USB_EP_NI7_TXTYPE()           bfin_read16(USB_EP_NI7_TXTYPE)
-#define bfin_write_USB_EP_NI7_TXTYPE(val)       bfin_write16(USB_EP_NI7_TXTYPE, val)
-#define bfin_read_USB_EP_NI7_TXINTERVAL()       bfin_read16(USB_EP_NI7_TXINTERVAL)
-#define bfin_write_USB_EP_NI7_TXINTERVAL(val)   bfin_write16(USB_EP_NI7_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI7_RXTYPE()           bfin_read16(USB_EP_NI7_RXTYPE)
-#define bfin_write_USB_EP_NI7_RXTYPE(val)       bfin_write16(USB_EP_NI7_RXTYPE, val)
-#define bfin_read_USB_EP_NI7_RXINTERVAL()       bfin_read16(USB_EP_NI7_RXINTERVAL)
-#define bfin_write_USB_EP_NI7_RXINTERVAL(val)   bfin_write16(USB_EP_NI7_RXINTERVAL, val)
-#define bfin_read_USB_EP_NI7_TXCOUNT()          bfin_read16(USB_EP_NI7_TXCOUNT)
-#define bfin_write_USB_EP_NI7_TXCOUNT(val)      bfin_write16(USB_EP_NI7_TXCOUNT, val)
-#define bfin_read_USB_DMA_INTERRUPT()           bfin_read16(USB_DMA_INTERRUPT)
-#define bfin_write_USB_DMA_INTERRUPT(val)       bfin_write16(USB_DMA_INTERRUPT, val)
-/* USB Channel 0 Config Registers */
-#define bfin_read_USB_DMA0CONTROL()             bfin_read16(USB_DMA0CONTROL)
-#define bfin_write_USB_DMA0CONTROL(val)         bfin_write16(USB_DMA0CONTROL, val)
-#define bfin_read_USB_DMA0ADDRLOW()             bfin_read16(USB_DMA0ADDRLOW)
-#define bfin_write_USB_DMA0ADDRLOW(val)         bfin_write16(USB_DMA0ADDRLOW, val)
-#define bfin_read_USB_DMA0ADDRHIGH()            bfin_read16(USB_DMA0ADDRHIGH)
-#define bfin_write_USB_DMA0ADDRHIGH(val)        bfin_write16(USB_DMA0ADDRHIGH, val)
-#define bfin_read_USB_DMA0COUNTLOW()            bfin_read16(USB_DMA0COUNTLOW)
-#define bfin_write_USB_DMA0COUNTLOW(val)        bfin_write16(USB_DMA0COUNTLOW, val)
-#define bfin_read_USB_DMA0COUNTHIGH()           bfin_read16(USB_DMA0COUNTHIGH)
-#define bfin_write_USB_DMA0COUNTHIGH(val)       bfin_write16(USB_DMA0COUNTHIGH, val)
-/* USB Channel 1 Config Registers */
-#define bfin_read_USB_DMA1CONTROL()             bfin_read16(USB_DMA1CONTROL)
-#define bfin_write_USB_DMA1CONTROL(val)         bfin_write16(USB_DMA1CONTROL, val)
-#define bfin_read_USB_DMA1ADDRLOW()             bfin_read16(USB_DMA1ADDRLOW)
-#define bfin_write_USB_DMA1ADDRLOW(val)         bfin_write16(USB_DMA1ADDRLOW, val)
-#define bfin_read_USB_DMA1ADDRHIGH()            bfin_read16(USB_DMA1ADDRHIGH)
-#define bfin_write_USB_DMA1ADDRHIGH(val)        bfin_write16(USB_DMA1ADDRHIGH, val)
-#define bfin_read_USB_DMA1COUNTLOW()            bfin_read16(USB_DMA1COUNTLOW)
-#define bfin_write_USB_DMA1COUNTLOW(val)        bfin_write16(USB_DMA1COUNTLOW, val)
-#define bfin_read_USB_DMA1COUNTHIGH()           bfin_read16(USB_DMA1COUNTHIGH)
-#define bfin_write_USB_DMA1COUNTHIGH(val)       bfin_write16(USB_DMA1COUNTHIGH, val)
-/* USB Channel 2 Config Registers */
-#define bfin_read_USB_DMA2CONTROL()             bfin_read16(USB_DMA2CONTROL)
-#define bfin_write_USB_DMA2CONTROL(val)         bfin_write16(USB_DMA2CONTROL, val)
-#define bfin_read_USB_DMA2ADDRLOW()             bfin_read16(USB_DMA2ADDRLOW)
-#define bfin_write_USB_DMA2ADDRLOW(val)         bfin_write16(USB_DMA2ADDRLOW, val)
-#define bfin_read_USB_DMA2ADDRHIGH()            bfin_read16(USB_DMA2ADDRHIGH)
-#define bfin_write_USB_DMA2ADDRHIGH(val)        bfin_write16(USB_DMA2ADDRHIGH, val)
-#define bfin_read_USB_DMA2COUNTLOW()            bfin_read16(USB_DMA2COUNTLOW)
-#define bfin_write_USB_DMA2COUNTLOW(val)        bfin_write16(USB_DMA2COUNTLOW, val)
-#define bfin_read_USB_DMA2COUNTHIGH()           bfin_read16(USB_DMA2COUNTHIGH)
-#define bfin_write_USB_DMA2COUNTHIGH(val)       bfin_write16(USB_DMA2COUNTHIGH, val)
-/* USB Channel 3 Config Registers */
-#define bfin_read_USB_DMA3CONTROL()             bfin_read16(USB_DMA3CONTROL)
-#define bfin_write_USB_DMA3CONTROL(val)         bfin_write16(USB_DMA3CONTROL, val)
-#define bfin_read_USB_DMA3ADDRLOW()             bfin_read16(USB_DMA3ADDRLOW)
-#define bfin_write_USB_DMA3ADDRLOW(val)         bfin_write16(USB_DMA3ADDRLOW, val)
-#define bfin_read_USB_DMA3ADDRHIGH()            bfin_read16(USB_DMA3ADDRHIGH)
-#define bfin_write_USB_DMA3ADDRHIGH(val)        bfin_write16(USB_DMA3ADDRHIGH, val)
-#define bfin_read_USB_DMA3COUNTLOW()            bfin_read16(USB_DMA3COUNTLOW)
-#define bfin_write_USB_DMA3COUNTLOW(val)        bfin_write16(USB_DMA3COUNTLOW, val)
-#define bfin_read_USB_DMA3COUNTHIGH()           bfin_read16(USB_DMA3COUNTHIGH)
-#define bfin_write_USB_DMA3COUNTHIGH(val)       bfin_write16(USB_DMA3COUNTHIGH, val)
-/* USB Channel 4 Config Registers */
-#define bfin_read_USB_DMA4CONTROL()             bfin_read16(USB_DMA4CONTROL)
-#define bfin_write_USB_DMA4CONTROL(val)         bfin_write16(USB_DMA4CONTROL, val)
-#define bfin_read_USB_DMA4ADDRLOW()             bfin_read16(USB_DMA4ADDRLOW)
-#define bfin_write_USB_DMA4ADDRLOW(val)         bfin_write16(USB_DMA4ADDRLOW, val)
-#define bfin_read_USB_DMA4ADDRHIGH()            bfin_read16(USB_DMA4ADDRHIGH)
-#define bfin_write_USB_DMA4ADDRHIGH(val)        bfin_write16(USB_DMA4ADDRHIGH, val)
-#define bfin_read_USB_DMA4COUNTLOW()            bfin_read16(USB_DMA4COUNTLOW)
-#define bfin_write_USB_DMA4COUNTLOW(val)        bfin_write16(USB_DMA4COUNTLOW, val)
-#define bfin_read_USB_DMA4COUNTHIGH()           bfin_read16(USB_DMA4COUNTHIGH)
-#define bfin_write_USB_DMA4COUNTHIGH(val)       bfin_write16(USB_DMA4COUNTHIGH, val)
-/* USB Channel 5 Config Registers */
-#define bfin_read_USB_DMA5CONTROL()             bfin_read16(USB_DMA5CONTROL)
-#define bfin_write_USB_DMA5CONTROL(val)         bfin_write16(USB_DMA5CONTROL, val)
-#define bfin_read_USB_DMA5ADDRLOW()             bfin_read16(USB_DMA5ADDRLOW)
-#define bfin_write_USB_DMA5ADDRLOW(val)         bfin_write16(USB_DMA5ADDRLOW, val)
-#define bfin_read_USB_DMA5ADDRHIGH()            bfin_read16(USB_DMA5ADDRHIGH)
-#define bfin_write_USB_DMA5ADDRHIGH(val)        bfin_write16(USB_DMA5ADDRHIGH, val)
-#define bfin_read_USB_DMA5COUNTLOW()            bfin_read16(USB_DMA5COUNTLOW)
-#define bfin_write_USB_DMA5COUNTLOW(val)        bfin_write16(USB_DMA5COUNTLOW, val)
-#define bfin_read_USB_DMA5COUNTHIGH()           bfin_read16(USB_DMA5COUNTHIGH)
-#define bfin_write_USB_DMA5COUNTHIGH(val)       bfin_write16(USB_DMA5COUNTHIGH, val)
-/* USB Channel 6 Config Registers */
-#define bfin_read_USB_DMA6CONTROL()             bfin_read16(USB_DMA6CONTROL)
-#define bfin_write_USB_DMA6CONTROL(val)         bfin_write16(USB_DMA6CONTROL, val)
-#define bfin_read_USB_DMA6ADDRLOW()             bfin_read16(USB_DMA6ADDRLOW)
-#define bfin_write_USB_DMA6ADDRLOW(val)         bfin_write16(USB_DMA6ADDRLOW, val)
-#define bfin_read_USB_DMA6ADDRHIGH()            bfin_read16(USB_DMA6ADDRHIGH)
-#define bfin_write_USB_DMA6ADDRHIGH(val)        bfin_write16(USB_DMA6ADDRHIGH, val)
-#define bfin_read_USB_DMA6COUNTLOW()            bfin_read16(USB_DMA6COUNTLOW)
-#define bfin_write_USB_DMA6COUNTLOW(val)        bfin_write16(USB_DMA6COUNTLOW, val)
-#define bfin_read_USB_DMA6COUNTHIGH()           bfin_read16(USB_DMA6COUNTHIGH)
-#define bfin_write_USB_DMA6COUNTHIGH(val)       bfin_write16(USB_DMA6COUNTHIGH, val)
-/* USB Channel 7 Config Registers */
-#define bfin_read_USB_DMA7CONTROL()             bfin_read16(USB_DMA7CONTROL)
-#define bfin_write_USB_DMA7CONTROL(val)         bfin_write16(USB_DMA7CONTROL, val)
-#define bfin_read_USB_DMA7ADDRLOW()             bfin_read16(USB_DMA7ADDRLOW)
-#define bfin_write_USB_DMA7ADDRLOW(val)         bfin_write16(USB_DMA7ADDRLOW, val)
-#define bfin_read_USB_DMA7ADDRHIGH()            bfin_read16(USB_DMA7ADDRHIGH)
-#define bfin_write_USB_DMA7ADDRHIGH(val)        bfin_write16(USB_DMA7ADDRHIGH, val)
-#define bfin_read_USB_DMA7COUNTLOW()            bfin_read16(USB_DMA7COUNTLOW)
-#define bfin_write_USB_DMA7COUNTLOW(val)        bfin_write16(USB_DMA7COUNTLOW, val)
-#define bfin_read_USB_DMA7COUNTHIGH()           bfin_read16(USB_DMA7COUNTHIGH)
-#define bfin_write_USB_DMA7COUNTHIGH(val)       bfin_write16(USB_DMA7COUNTHIGH, val)
-/* Keybfin_read_()ad Registers */
-#define bfin_read_KPAD_CTL()            bfin_read16(KPAD_CTL)
-#define bfin_write_KPAD_CTL(val)        bfin_write16(KPAD_CTL, val)
-#define bfin_read_KPAD_PRESCALE()       bfin_read16(KPAD_PRESCALE)
-#define bfin_write_KPAD_PRESCALE(val)   bfin_write16(KPAD_PRESCALE, val)
-#define bfin_read_KPAD_MSEL()           bfin_read16(KPAD_MSEL)
-#define bfin_write_KPAD_MSEL(val)       bfin_write16(KPAD_MSEL, val)
-#define bfin_read_KPAD_ROWCOL()         bfin_read16(KPAD_ROWCOL)
-#define bfin_write_KPAD_ROWCOL(val)     bfin_write16(KPAD_ROWCOL, val)
-#define bfin_read_KPAD_STAT()           bfin_read16(KPAD_STAT)
-#define bfin_write_KPAD_STAT(val)       bfin_write16(KPAD_STAT, val)
-#define bfin_read_KPAD_SOFTEVAL()       bfin_read16(KPAD_SOFTEVAL)
-#define bfin_write_KPAD_SOFTEVAL(val)   bfin_write16(KPAD_SOFTEVAL, val)
-/* Pixel Combfin_read_()ositor (PIXC) Registers */
-#define bfin_read_PIXC_CTL()            bfin_read16(PIXC_CTL)
-#define bfin_write_PIXC_CTL(val)        bfin_write16(PIXC_CTL, val)
-#define bfin_read_PIXC_PPL()            bfin_read16(PIXC_PPL)
-#define bfin_write_PIXC_PPL(val)        bfin_write16(PIXC_PPL, val)
-#define bfin_read_PIXC_LPF()            bfin_read16(PIXC_LPF)
-#define bfin_write_PIXC_LPF(val)        bfin_write16(PIXC_LPF, val)
-#define bfin_read_PIXC_AHSTART()        bfin_read16(PIXC_AHSTART)
-#define bfin_write_PIXC_AHSTART(val)    bfin_write16(PIXC_AHSTART, val)
-#define bfin_read_PIXC_AHEND()          bfin_read16(PIXC_AHEND)
-#define bfin_write_PIXC_AHEND(val)      bfin_write16(PIXC_AHEND, val)
-#define bfin_read_PIXC_AVSTART()        bfin_read16(PIXC_AVSTART)
-#define bfin_write_PIXC_AVSTART(val)    bfin_write16(PIXC_AVSTART, val)
-#define bfin_read_PIXC_AVEND()          bfin_read16(PIXC_AVEND)
-#define bfin_write_PIXC_AVEND(val)      bfin_write16(PIXC_AVEND, val)
-#define bfin_read_PIXC_ATRANSP()        bfin_read16(PIXC_ATRANSP)
-#define bfin_write_PIXC_ATRANSP(val)    bfin_write16(PIXC_ATRANSP, val)
-#define bfin_read_PIXC_BHSTART()        bfin_read16(PIXC_BHSTART)
-#define bfin_write_PIXC_BHSTART(val)    bfin_write16(PIXC_BHSTART, val)
-#define bfin_read_PIXC_BHEND()          bfin_read16(PIXC_BHEND)
-#define bfin_write_PIXC_BHEND(val)      bfin_write16(PIXC_BHEND, val)
-#define bfin_read_PIXC_BVSTART()        bfin_read16(PIXC_BVSTART)
-#define bfin_write_PIXC_BVSTART(val)    bfin_write16(PIXC_BVSTART, val)
-#define bfin_read_PIXC_BVEND()          bfin_read16(PIXC_BVEND)
-#define bfin_write_PIXC_BVEND(val)      bfin_write16(PIXC_BVEND, val)
-#define bfin_read_PIXC_BTRANSP()        bfin_read16(PIXC_BTRANSP)
-#define bfin_write_PIXC_BTRANSP(val)    bfin_write16(PIXC_BTRANSP, val)
-#define bfin_read_PIXC_INTRSTAT()       bfin_read16(PIXC_INTRSTAT)
-#define bfin_write_PIXC_INTRSTAT(val)   bfin_write16(PIXC_INTRSTAT, val)
-#define bfin_read_PIXC_RYCON()          bfin_read32(PIXC_RYCON)
-#define bfin_write_PIXC_RYCON(val)      bfin_write32(PIXC_RYCON, val)
-#define bfin_read_PIXC_GUCON()          bfin_read32(PIXC_GUCON)
-#define bfin_write_PIXC_GUCON(val)      bfin_write32(PIXC_GUCON, val)
-#define bfin_read_PIXC_BVCON()          bfin_read32(PIXC_BVCON)
-#define bfin_write_PIXC_BVCON(val)      bfin_write32(PIXC_BVCON, val)
-#define bfin_read_PIXC_CCBIAS()         bfin_read32(PIXC_CCBIAS)
-#define bfin_write_PIXC_CCBIAS(val)     bfin_write32(PIXC_CCBIAS, val)
-#define bfin_read_PIXC_TC()             bfin_read32(PIXC_TC)
-#define bfin_write_PIXC_TC(val)         bfin_write32(PIXC_TC, val)
-/* Handshake MDMA 0 Registers */
-#define bfin_read_HMDMA0_CONTROL()              bfin_read16(HMDMA0_CONTROL)
-#define bfin_write_HMDMA0_CONTROL(val)          bfin_write16(HMDMA0_CONTROL, val)
-#define bfin_read_HMDMA0_ECINIT()               bfin_read16(HMDMA0_ECINIT)
-#define bfin_write_HMDMA0_ECINIT(val)           bfin_write16(HMDMA0_ECINIT, val)
-#define bfin_read_HMDMA0_BCINIT()               bfin_read16(HMDMA0_BCINIT)
-#define bfin_write_HMDMA0_BCINIT(val)           bfin_write16(HMDMA0_BCINIT, val)
-#define bfin_read_HMDMA0_ECURGENT()             bfin_read16(HMDMA0_ECURGENT)
-#define bfin_write_HMDMA0_ECURGENT(val)         bfin_write16(HMDMA0_ECURGENT, val)
-#define bfin_read_HMDMA0_ECOVERFLOW()           bfin_read16(HMDMA0_ECOVERFLOW)
-#define bfin_write_HMDMA0_ECOVERFLOW(val)       bfin_write16(HMDMA0_ECOVERFLOW, val)
-#define bfin_read_HMDMA0_ECOUNT()               bfin_read16(HMDMA0_ECOUNT)
-#define bfin_write_HMDMA0_ECOUNT(val)           bfin_write16(HMDMA0_ECOUNT, val)
-#define bfin_read_HMDMA0_BCOUNT()               bfin_read16(HMDMA0_BCOUNT)
-#define bfin_write_HMDMA0_BCOUNT(val)           bfin_write16(HMDMA0_BCOUNT, val)
-/* Handshake MDMA 1 Registers */
-#define bfin_read_HMDMA1_CONTROL()              bfin_read16(HMDMA1_CONTROL)
-#define bfin_write_HMDMA1_CONTROL(val)          bfin_write16(HMDMA1_CONTROL, val)
-#define bfin_read_HMDMA1_ECINIT()               bfin_read16(HMDMA1_ECINIT)
-#define bfin_write_HMDMA1_ECINIT(val)           bfin_write16(HMDMA1_ECINIT, val)
-#define bfin_read_HMDMA1_BCINIT()               bfin_read16(HMDMA1_BCINIT)
-#define bfin_write_HMDMA1_BCINIT(val)           bfin_write16(HMDMA1_BCINIT, val)
-#define bfin_read_HMDMA1_ECURGENT()             bfin_read16(HMDMA1_ECURGENT)
-#define bfin_write_HMDMA1_ECURGENT(val)         bfin_write16(HMDMA1_ECURGENT, val)
-#define bfin_read_HMDMA1_ECOVERFLOW()           bfin_read16(HMDMA1_ECOVERFLOW)
-#define bfin_write_HMDMA1_ECOVERFLOW(val)       bfin_write16(HMDMA1_ECOVERFLOW, val)
-#define bfin_read_HMDMA1_ECOUNT()               bfin_read16(HMDMA1_ECOUNT)
-#define bfin_write_HMDMA1_ECOUNT(val)           bfin_write16(HMDMA1_ECOUNT, val)
-#define bfin_read_HMDMA1_BCOUNT()               bfin_read16(HMDMA1_BCOUNT)
-#define bfin_write_HMDMA1_BCOUNT(val)           bfin_write16(HMDMA1_BCOUNT, val)
 #endif /* _CDEF_BF548_H */
diff --git a/arch/blackfin/mach-bf548/include/mach/cdefBF549.h b/arch/blackfin/mach-bf548/include/mach/cdefBF549.h
index 34c84c7fb256..80201ed41f80 100644
--- a/arch/blackfin/mach-bf548/include/mach/cdefBF549.h
+++ b/arch/blackfin/mach-bf548/include/mach/cdefBF549.h
@@ -18,165 +18,8 @@
 /* include cdefBF54x_base.h for the set of #defines that are common to all ADSP-BF54x bfin_read_()rocessors */
 #include "cdefBF54x_base.h"
-/* The following are the #defines needed by ADSP-BF549 that are not in the common header */
+/* The BF549 is like the BF544, but has MXVR */
+#include "cdefBF547.h"
-/* Timer Registers */
-#define bfin_read_TIMER8_CONFIG()               bfin_read16(TIMER8_CONFIG)
-#define bfin_write_TIMER8_CONFIG(val)           bfin_write16(TIMER8_CONFIG, val)
-#define bfin_read_TIMER8_COUNTER()              bfin_read32(TIMER8_COUNTER)
-#define bfin_write_TIMER8_COUNTER(val)          bfin_write32(TIMER8_COUNTER, val)
-#define bfin_read_TIMER8_PERIOD()               bfin_read32(TIMER8_PERIOD)
-#define bfin_write_TIMER8_PERIOD(val)           bfin_write32(TIMER8_PERIOD, val)
-#define bfin_read_TIMER8_WIDTH()                bfin_read32(TIMER8_WIDTH)
-#define bfin_write_TIMER8_WIDTH(val)            bfin_write32(TIMER8_WIDTH, val)
-#define bfin_read_TIMER9_CONFIG()               bfin_read16(TIMER9_CONFIG)
-#define bfin_write_TIMER9_CONFIG(val)           bfin_write16(TIMER9_CONFIG, val)
-#define bfin_read_TIMER9_COUNTER()              bfin_read32(TIMER9_COUNTER)
-#define bfin_write_TIMER9_COUNTER(val)          bfin_write32(TIMER9_COUNTER, val)
-#define bfin_read_TIMER9_PERIOD()               bfin_read32(TIMER9_PERIOD)
-#define bfin_write_TIMER9_PERIOD(val)           bfin_write32(TIMER9_PERIOD, val)
-#define bfin_read_TIMER9_WIDTH()                bfin_read32(TIMER9_WIDTH)
-#define bfin_write_TIMER9_WIDTH(val)            bfin_write32(TIMER9_WIDTH, val)
-#define bfin_read_TIMER10_CONFIG()              bfin_read16(TIMER10_CONFIG)
-#define bfin_write_TIMER10_CONFIG(val)          bfin_write16(TIMER10_CONFIG, val)
-#define bfin_read_TIMER10_COUNTER()             bfin_read32(TIMER10_COUNTER)
-#define bfin_write_TIMER10_COUNTER(val)         bfin_write32(TIMER10_COUNTER, val)
-#define bfin_read_TIMER10_PERIOD()              bfin_read32(TIMER10_PERIOD)
-#define bfin_write_TIMER10_PERIOD(val)          bfin_write32(TIMER10_PERIOD, val)
-#define bfin_read_TIMER10_WIDTH()               bfin_read32(TIMER10_WIDTH)
-#define bfin_write_TIMER10_WIDTH(val)           bfin_write32(TIMER10_WIDTH, val)
-/* Timer Groubfin_read_() of 3 */
-#define bfin_read_TIMER_ENABLE1()               bfin_read16(TIMER_ENABLE1)
-#define bfin_write_TIMER_ENABLE1(val)           bfin_write16(TIMER_ENABLE1, val)
-#define bfin_read_TIMER_DISABLE1()              bfin_read16(TIMER_DISABLE1)
-#define bfin_write_TIMER_DISABLE1(val)          bfin_write16(TIMER_DISABLE1, val)
-#define bfin_read_TIMER_STATUS1()               bfin_read32(TIMER_STATUS1)
-#define bfin_write_TIMER_STATUS1(val)           bfin_write32(TIMER_STATUS1, val)
-/* SPORT0 Registers */
-#define bfin_read_SPORT0_TCR1()                 bfin_read16(SPORT0_TCR1)
-#define bfin_write_SPORT0_TCR1(val)             bfin_write16(SPORT0_TCR1, val)
-#define bfin_read_SPORT0_TCR2()                 bfin_read16(SPORT0_TCR2)
-#define bfin_write_SPORT0_TCR2(val)             bfin_write16(SPORT0_TCR2, val)
-#define bfin_read_SPORT0_TCLKDIV()              bfin_read16(SPORT0_TCLKDIV)
-#define bfin_write_SPORT0_TCLKDIV(val)          bfin_write16(SPORT0_TCLKDIV, val)
-#define bfin_read_SPORT0_TFSDIV()               bfin_read16(SPORT0_TFSDIV)
-#define bfin_write_SPORT0_TFSDIV(val)           bfin_write16(SPORT0_TFSDIV, val)
-#define bfin_read_SPORT0_TX()                   bfin_read32(SPORT0_TX)
-#define bfin_write_SPORT0_TX(val)               bfin_write32(SPORT0_TX, val)
-#define bfin_read_SPORT0_RX()                   bfin_read32(SPORT0_RX)
-#define bfin_write_SPORT0_RX(val)               bfin_write32(SPORT0_RX, val)
-#define bfin_read_SPORT0_RCR1()                 bfin_read16(SPORT0_RCR1)
-#define bfin_write_SPORT0_RCR1(val)             bfin_write16(SPORT0_RCR1, val)
-#define bfin_read_SPORT0_RCR2()                 bfin_read16(SPORT0_RCR2)
-#define bfin_write_SPORT0_RCR2(val)             bfin_write16(SPORT0_RCR2, val)
-#define bfin_read_SPORT0_RCLKDIV()              bfin_read16(SPORT0_RCLKDIV)
-#define bfin_write_SPORT0_RCLKDIV(val)          bfin_write16(SPORT0_RCLKDIV, val)
-#define bfin_read_SPORT0_RFSDIV()               bfin_read16(SPORT0_RFSDIV)
-#define bfin_write_SPORT0_RFSDIV(val)           bfin_write16(SPORT0_RFSDIV, val)
-#define bfin_read_SPORT0_STAT()                 bfin_read16(SPORT0_STAT)
-#define bfin_write_SPORT0_STAT(val)             bfin_write16(SPORT0_STAT, val)
-#define bfin_read_SPORT0_CHNL()                 bfin_read16(SPORT0_CHNL)
-#define bfin_write_SPORT0_CHNL(val)             bfin_write16(SPORT0_CHNL, val)
-#define bfin_read_SPORT0_MCMC1()                bfin_read16(SPORT0_MCMC1)
-#define bfin_write_SPORT0_MCMC1(val)            bfin_write16(SPORT0_MCMC1, val)
-#define bfin_read_SPORT0_MCMC2()                bfin_read16(SPORT0_MCMC2)
-#define bfin_write_SPORT0_MCMC2(val)            bfin_write16(SPORT0_MCMC2, val)
-#define bfin_read_SPORT0_MTCS0()                bfin_read32(SPORT0_MTCS0)
-#define bfin_write_SPORT0_MTCS0(val)            bfin_write32(SPORT0_MTCS0, val)
-#define bfin_read_SPORT0_MTCS1()                bfin_read32(SPORT0_MTCS1)
-#define bfin_write_SPORT0_MTCS1(val)            bfin_write32(SPORT0_MTCS1, val)
-#define bfin_read_SPORT0_MTCS2()                bfin_read32(SPORT0_MTCS2)
-#define bfin_write_SPORT0_MTCS2(val)            bfin_write32(SPORT0_MTCS2, val)
-#define bfin_read_SPORT0_MTCS3()                bfin_read32(SPORT0_MTCS3)
-#define bfin_write_SPORT0_MTCS3(val)            bfin_write32(SPORT0_MTCS3, val)
-#define bfin_read_SPORT0_MRCS0()                bfin_read32(SPORT0_MRCS0)
-#define bfin_write_SPORT0_MRCS0(val)            bfin_write32(SPORT0_MRCS0, val)
-#define bfin_read_SPORT0_MRCS1()                bfin_read32(SPORT0_MRCS1)
-#define bfin_write_SPORT0_MRCS1(val)            bfin_write32(SPORT0_MRCS1, val)
-#define bfin_read_SPORT0_MRCS2()                bfin_read32(SPORT0_MRCS2)
-#define bfin_write_SPORT0_MRCS2(val)            bfin_write32(SPORT0_MRCS2, val)
-#define bfin_read_SPORT0_MRCS3()                bfin_read32(SPORT0_MRCS3)
-#define bfin_write_SPORT0_MRCS3(val)            bfin_write32(SPORT0_MRCS3, val)
-/* EPPI0 Registers */
-#define bfin_read_EPPI0_STATUS()                bfin_read16(EPPI0_STATUS)
-#define bfin_write_EPPI0_STATUS(val)            bfin_write16(EPPI0_STATUS, val)
-#define bfin_read_EPPI0_HCOUNT()                bfin_read16(EPPI0_HCOUNT)
-#define bfin_write_EPPI0_HCOUNT(val)            bfin_write16(EPPI0_HCOUNT, val)
-#define bfin_read_EPPI0_HDELAY()                bfin_read16(EPPI0_HDELAY)
-#define bfin_write_EPPI0_HDELAY(val)            bfin_write16(EPPI0_HDELAY, val)
-#define bfin_read_EPPI0_VCOUNT()                bfin_read16(EPPI0_VCOUNT)
-#define bfin_write_EPPI0_VCOUNT(val)            bfin_write16(EPPI0_VCOUNT, val)
-#define bfin_read_EPPI0_VDELAY()                bfin_read16(EPPI0_VDELAY)
-#define bfin_write_EPPI0_VDELAY(val)            bfin_write16(EPPI0_VDELAY, val)
-#define bfin_read_EPPI0_FRAME()                 bfin_read16(EPPI0_FRAME)
-#define bfin_write_EPPI0_FRAME(val)             bfin_write16(EPPI0_FRAME, val)
-#define bfin_read_EPPI0_LINE()                  bfin_read16(EPPI0_LINE)
-#define bfin_write_EPPI0_LINE(val)              bfin_write16(EPPI0_LINE, val)
-#define bfin_read_EPPI0_CLKDIV()                bfin_read16(EPPI0_CLKDIV)
-#define bfin_write_EPPI0_CLKDIV(val)            bfin_write16(EPPI0_CLKDIV, val)
-#define bfin_read_EPPI0_CONTROL()               bfin_read32(EPPI0_CONTROL)
-#define bfin_write_EPPI0_CONTROL(val)           bfin_write32(EPPI0_CONTROL, val)
-#define bfin_read_EPPI0_FS1W_HBL()              bfin_read32(EPPI0_FS1W_HBL)
-#define bfin_write_EPPI0_FS1W_HBL(val)          bfin_write32(EPPI0_FS1W_HBL, val)
-#define bfin_read_EPPI0_FS1P_AVPL()             bfin_read32(EPPI0_FS1P_AVPL)
-#define bfin_write_EPPI0_FS1P_AVPL(val)         bfin_write32(EPPI0_FS1P_AVPL, val)
-#define bfin_read_EPPI0_FS2W_LVB()              bfin_read32(EPPI0_FS2W_LVB)
-#define bfin_write_EPPI0_FS2W_LVB(val)          bfin_write32(EPPI0_FS2W_LVB, val)
-#define bfin_read_EPPI0_FS2P_LAVF()             bfin_read32(EPPI0_FS2P_LAVF)
-#define bfin_write_EPPI0_FS2P_LAVF(val)         bfin_write32(EPPI0_FS2P_LAVF, val)
-#define bfin_read_EPPI0_CLIP()                  bfin_read32(EPPI0_CLIP)
-#define bfin_write_EPPI0_CLIP(val)              bfin_write32(EPPI0_CLIP, val)
-/* UART2 Registers */
-#define bfin_read_UART2_DLL()                   bfin_read16(UART2_DLL)
-#define bfin_write_UART2_DLL(val)               bfin_write16(UART2_DLL, val)
-#define bfin_read_UART2_DLH()                   bfin_read16(UART2_DLH)
-#define bfin_write_UART2_DLH(val)               bfin_write16(UART2_DLH, val)
-#define bfin_read_UART2_GCTL()                  bfin_read16(UART2_GCTL)
-#define bfin_write_UART2_GCTL(val)              bfin_write16(UART2_GCTL, val)
-#define bfin_read_UART2_LCR()                   bfin_read16(UART2_LCR)
-#define bfin_write_UART2_LCR(val)               bfin_write16(UART2_LCR, val)
-#define bfin_read_UART2_MCR()                   bfin_read16(UART2_MCR)
-#define bfin_write_UART2_MCR(val)               bfin_write16(UART2_MCR, val)
-#define bfin_read_UART2_LSR()                   bfin_read16(UART2_LSR)
-#define bfin_write_UART2_LSR(val)               bfin_write16(UART2_LSR, val)
-#define bfin_read_UART2_MSR()                   bfin_read16(UART2_MSR)
-#define bfin_write_UART2_MSR(val)               bfin_write16(UART2_MSR, val)
-#define bfin_read_UART2_SCR()                   bfin_read16(UART2_SCR)
-#define bfin_write_UART2_SCR(val)               bfin_write16(UART2_SCR, val)
-#define bfin_read_UART2_IER_SET()               bfin_read16(UART2_IER_SET)
-#define bfin_write_UART2_IER_SET(val)           bfin_write16(UART2_IER_SET, val)
-#define bfin_read_UART2_IER_CLEAR()             bfin_read16(UART2_IER_CLEAR)
-#define bfin_write_UART2_IER_CLEAR(val)         bfin_write16(UART2_IER_CLEAR, val)
-#define bfin_read_UART2_RBR()                   bfin_read16(UART2_RBR)
-#define bfin_write_UART2_RBR(val)               bfin_write16(UART2_RBR, val)
-/* Two Wire Interface Registers (TWI1) */
-/* SPI2 Registers */
-#define bfin_read_SPI2_CTL()            bfin_read16(SPI2_CTL)
-#define bfin_write_SPI2_CTL(val)        bfin_write16(SPI2_CTL, val)
-#define bfin_read_SPI2_FLG()            bfin_read16(SPI2_FLG)
-#define bfin_write_SPI2_FLG(val)        bfin_write16(SPI2_FLG, val)
-#define bfin_read_SPI2_STAT()           bfin_read16(SPI2_STAT)
-#define bfin_write_SPI2_STAT(val)       bfin_write16(SPI2_STAT, val)
-#define bfin_read_SPI2_TDBR()           bfin_read16(SPI2_TDBR)
-#define bfin_write_SPI2_TDBR(val)       bfin_write16(SPI2_TDBR, val)
-#define bfin_read_SPI2_RDBR()           bfin_read16(SPI2_RDBR)
-#define bfin_write_SPI2_RDBR(val)       bfin_write16(SPI2_RDBR, val)
-#define bfin_read_SPI2_BAUD()           bfin_read16(SPI2_BAUD)
-#define bfin_write_SPI2_BAUD(val)       bfin_write16(SPI2_BAUD, val)
-#define bfin_read_SPI2_SHADOW()         bfin_read16(SPI2_SHADOW)
-#define bfin_write_SPI2_SHADOW(val)     bfin_write16(SPI2_SHADOW, val)
 /* MXVR Registers */
@@ -464,1376 +307,4 @@
 #define bfin_read_MXVR_SCLK_CNT()               bfin_read16(MXVR_SCLK_CNT)
 #define bfin_write_MXVR_SCLK_CNT(val)           bfin_write16(MXVR_SCLK_CNT, val)
-/* CAN Controller 1 Config 1 Registers */
-#define bfin_read_CAN1_MC1()            bfin_read16(CAN1_MC1)
-#define bfin_write_CAN1_MC1(val)        bfin_write16(CAN1_MC1, val)
-#define bfin_read_CAN1_MD1()            bfin_read16(CAN1_MD1)
-#define bfin_write_CAN1_MD1(val)        bfin_write16(CAN1_MD1, val)
-#define bfin_read_CAN1_TRS1()           bfin_read16(CAN1_TRS1)
-#define bfin_write_CAN1_TRS1(val)       bfin_write16(CAN1_TRS1, val)
-#define bfin_read_CAN1_TRR1()           bfin_read16(CAN1_TRR1)
-#define bfin_write_CAN1_TRR1(val)       bfin_write16(CAN1_TRR1, val)
-#define bfin_read_CAN1_TA1()            bfin_read16(CAN1_TA1)
-#define bfin_write_CAN1_TA1(val)        bfin_write16(CAN1_TA1, val)
-#define bfin_read_CAN1_AA1()            bfin_read16(CAN1_AA1)
-#define bfin_write_CAN1_AA1(val)        bfin_write16(CAN1_AA1, val)
-#define bfin_read_CAN1_RMP1()           bfin_read16(CAN1_RMP1)
-#define bfin_write_CAN1_RMP1(val)       bfin_write16(CAN1_RMP1, val)
-#define bfin_read_CAN1_RML1()           bfin_read16(CAN1_RML1)
-#define bfin_write_CAN1_RML1(val)       bfin_write16(CAN1_RML1, val)
-#define bfin_read_CAN1_MBTIF1()         bfin_read16(CAN1_MBTIF1)
-#define bfin_write_CAN1_MBTIF1(val)     bfin_write16(CAN1_MBTIF1, val)
-#define bfin_read_CAN1_MBRIF1()         bfin_read16(CAN1_MBRIF1)
-#define bfin_write_CAN1_MBRIF1(val)     bfin_write16(CAN1_MBRIF1, val)
-#define bfin_read_CAN1_MBIM1()          bfin_read16(CAN1_MBIM1)
-#define bfin_write_CAN1_MBIM1(val)      bfin_write16(CAN1_MBIM1, val)
-#define bfin_read_CAN1_RFH1()           bfin_read16(CAN1_RFH1)
-#define bfin_write_CAN1_RFH1(val)       bfin_write16(CAN1_RFH1, val)
-#define bfin_read_CAN1_OPSS1()          bfin_read16(CAN1_OPSS1)
-#define bfin_write_CAN1_OPSS1(val)      bfin_write16(CAN1_OPSS1, val)
-/* CAN Controller 1 Config 2 Registers */
-#define bfin_read_CAN1_MC2()            bfin_read16(CAN1_MC2)
-#define bfin_write_CAN1_MC2(val)        bfin_write16(CAN1_MC2, val)
-#define bfin_read_CAN1_MD2()            bfin_read16(CAN1_MD2)
-#define bfin_write_CAN1_MD2(val)        bfin_write16(CAN1_MD2, val)
-#define bfin_read_CAN1_TRS2()           bfin_read16(CAN1_TRS2)
-#define bfin_write_CAN1_TRS2(val)       bfin_write16(CAN1_TRS2, val)
-#define bfin_read_CAN1_TRR2()           bfin_read16(CAN1_TRR2)
-#define bfin_write_CAN1_TRR2(val)       bfin_write16(CAN1_TRR2, val)
-#define bfin_read_CAN1_TA2()            bfin_read16(CAN1_TA2)
-#define bfin_write_CAN1_TA2(val)        bfin_write16(CAN1_TA2, val)
-#define bfin_read_CAN1_AA2()            bfin_read16(CAN1_AA2)
-#define bfin_write_CAN1_AA2(val)        bfin_write16(CAN1_AA2, val)
-#define bfin_read_CAN1_RMP2()           bfin_read16(CAN1_RMP2)
-#define bfin_write_CAN1_RMP2(val)       bfin_write16(CAN1_RMP2, val)
-#define bfin_read_CAN1_RML2()           bfin_read16(CAN1_RML2)
-#define bfin_write_CAN1_RML2(val)       bfin_write16(CAN1_RML2, val)
-#define bfin_read_CAN1_MBTIF2()         bfin_read16(CAN1_MBTIF2)
-#define bfin_write_CAN1_MBTIF2(val)     bfin_write16(CAN1_MBTIF2, val)
-#define bfin_read_CAN1_MBRIF2()         bfin_read16(CAN1_MBRIF2)
-#define bfin_write_CAN1_MBRIF2(val)     bfin_write16(CAN1_MBRIF2, val)
-#define bfin_read_CAN1_MBIM2()          bfin_read16(CAN1_MBIM2)
-#define bfin_write_CAN1_MBIM2(val)      bfin_write16(CAN1_MBIM2, val)
-#define bfin_read_CAN1_RFH2()           bfin_read16(CAN1_RFH2)
-#define bfin_write_CAN1_RFH2(val)       bfin_write16(CAN1_RFH2, val)
-#define bfin_read_CAN1_OPSS2()          bfin_read16(CAN1_OPSS2)
-#define bfin_write_CAN1_OPSS2(val)      bfin_write16(CAN1_OPSS2, val)
-/* CAN Controller 1 Clock/Interrubfin_read_()t/Counter Registers */
-#define bfin_read_CAN1_CLOCK()          bfin_read16(CAN1_CLOCK)
-#define bfin_write_CAN1_CLOCK(val)      bfin_write16(CAN1_CLOCK, val)
-#define bfin_read_CAN1_TIMING()         bfin_read16(CAN1_TIMING)
-#define bfin_write_CAN1_TIMING(val)     bfin_write16(CAN1_TIMING, val)
-#define bfin_read_CAN1_DEBUG()          bfin_read16(CAN1_DEBUG)
-#define bfin_write_CAN1_DEBUG(val)      bfin_write16(CAN1_DEBUG, val)
-#define bfin_read_CAN1_STATUS()         bfin_read16(CAN1_STATUS)
-#define bfin_write_CAN1_STATUS(val)     bfin_write16(CAN1_STATUS, val)
-#define bfin_read_CAN1_CEC()            bfin_read16(CAN1_CEC)
-#define bfin_write_CAN1_CEC(val)        bfin_write16(CAN1_CEC, val)
-#define bfin_read_CAN1_GIS()            bfin_read16(CAN1_GIS)
-#define bfin_write_CAN1_GIS(val)        bfin_write16(CAN1_GIS, val)
-#define bfin_read_CAN1_GIM()            bfin_read16(CAN1_GIM)
-#define bfin_write_CAN1_GIM(val)        bfin_write16(CAN1_GIM, val)
-#define bfin_read_CAN1_GIF()            bfin_read16(CAN1_GIF)
-#define bfin_write_CAN1_GIF(val)        bfin_write16(CAN1_GIF, val)
-#define bfin_read_CAN1_CONTROL()        bfin_read16(CAN1_CONTROL)
-#define bfin_write_CAN1_CONTROL(val)    bfin_write16(CAN1_CONTROL, val)
-#define bfin_read_CAN1_INTR()           bfin_read16(CAN1_INTR)
-#define bfin_write_CAN1_INTR(val)       bfin_write16(CAN1_INTR, val)
-#define bfin_read_CAN1_MBTD()           bfin_read16(CAN1_MBTD)
-#define bfin_write_CAN1_MBTD(val)       bfin_write16(CAN1_MBTD, val)
-#define bfin_read_CAN1_EWR()            bfin_read16(CAN1_EWR)
-#define bfin_write_CAN1_EWR(val)        bfin_write16(CAN1_EWR, val)
-#define bfin_read_CAN1_ESR()            bfin_read16(CAN1_ESR)
-#define bfin_write_CAN1_ESR(val)        bfin_write16(CAN1_ESR, val)
-#define bfin_read_CAN1_UCCNT()          bfin_read16(CAN1_UCCNT)
-#define bfin_write_CAN1_UCCNT(val)      bfin_write16(CAN1_UCCNT, val)
-#define bfin_read_CAN1_UCRC()           bfin_read16(CAN1_UCRC)
-#define bfin_write_CAN1_UCRC(val)       bfin_write16(CAN1_UCRC, val)
-#define bfin_read_CAN1_UCCNF()          bfin_read16(CAN1_UCCNF)
-#define bfin_write_CAN1_UCCNF(val)      bfin_write16(CAN1_UCCNF, val)
-/* CAN Controller 1 Mailbox Accebfin_read_()tance Registers */
-#define bfin_read_CAN1_AM00L()          bfin_read16(CAN1_AM00L)
-#define bfin_write_CAN1_AM00L(val)      bfin_write16(CAN1_AM00L, val)
-#define bfin_read_CAN1_AM00H()          bfin_read16(CAN1_AM00H)
-#define bfin_write_CAN1_AM00H(val)      bfin_write16(CAN1_AM00H, val)
-#define bfin_read_CAN1_AM01L()          bfin_read16(CAN1_AM01L)
-#define bfin_write_CAN1_AM01L(val)      bfin_write16(CAN1_AM01L, val)
-#define bfin_read_CAN1_AM01H()          bfin_read16(CAN1_AM01H)
-#define bfin_write_CAN1_AM01H(val)      bfin_write16(CAN1_AM01H, val)
-#define bfin_read_CAN1_AM02L()          bfin_read16(CAN1_AM02L)
-#define bfin_write_CAN1_AM02L(val)      bfin_write16(CAN1_AM02L, val)
-#define bfin_read_CAN1_AM02H()          bfin_read16(CAN1_AM02H)
-#define bfin_write_CAN1_AM02H(val)      bfin_write16(CAN1_AM02H, val)
-#define bfin_read_CAN1_AM03L()          bfin_read16(CAN1_AM03L)
-#define bfin_write_CAN1_AM03L(val)      bfin_write16(CAN1_AM03L, val)
-#define bfin_read_CAN1_AM03H()          bfin_read16(CAN1_AM03H)
-#define bfin_write_CAN1_AM03H(val)      bfin_write16(CAN1_AM03H, val)
-#define bfin_read_CAN1_AM04L()          bfin_read16(CAN1_AM04L)
-#define bfin_write_CAN1_AM04L(val)      bfin_write16(CAN1_AM04L, val)
-#define bfin_read_CAN1_AM04H()          bfin_read16(CAN1_AM04H)
-#define bfin_write_CAN1_AM04H(val)      bfin_write16(CAN1_AM04H, val)
-#define bfin_read_CAN1_AM05L()          bfin_read16(CAN1_AM05L)
-#define bfin_write_CAN1_AM05L(val)      bfin_write16(CAN1_AM05L, val)
-#define bfin_read_CAN1_AM05H()          bfin_read16(CAN1_AM05H)
-#define bfin_write_CAN1_AM05H(val)      bfin_write16(CAN1_AM05H, val)
-#define bfin_read_CAN1_AM06L()          bfin_read16(CAN1_AM06L)
-#define bfin_write_CAN1_AM06L(val)      bfin_write16(CAN1_AM06L, val)
-#define bfin_read_CAN1_AM06H()          bfin_read16(CAN1_AM06H)
-#define bfin_write_CAN1_AM06H(val)      bfin_write16(CAN1_AM06H, val)
-#define bfin_read_CAN1_AM07L()          bfin_read16(CAN1_AM07L)
-#define bfin_write_CAN1_AM07L(val)      bfin_write16(CAN1_AM07L, val)
-#define bfin_read_CAN1_AM07H()          bfin_read16(CAN1_AM07H)
-#define bfin_write_CAN1_AM07H(val)      bfin_write16(CAN1_AM07H, val)
-#define bfin_read_CAN1_AM08L()          bfin_read16(CAN1_AM08L)
-#define bfin_write_CAN1_AM08L(val)      bfin_write16(CAN1_AM08L, val)
-#define bfin_read_CAN1_AM08H()          bfin_read16(CAN1_AM08H)
-#define bfin_write_CAN1_AM08H(val)      bfin_write16(CAN1_AM08H, val)
-#define bfin_read_CAN1_AM09L()          bfin_read16(CAN1_AM09L)
-#define bfin_write_CAN1_AM09L(val)      bfin_write16(CAN1_AM09L, val)
-#define bfin_read_CAN1_AM09H()          bfin_read16(CAN1_AM09H)
-#define bfin_write_CAN1_AM09H(val)      bfin_write16(CAN1_AM09H, val)
-#define bfin_read_CAN1_AM10L()          bfin_read16(CAN1_AM10L)
-#define bfin_write_CAN1_AM10L(val)      bfin_write16(CAN1_AM10L, val)
-#define bfin_read_CAN1_AM10H()          bfin_read16(CAN1_AM10H)
-#define bfin_write_CAN1_AM10H(val)      bfin_write16(CAN1_AM10H, val)
-#define bfin_read_CAN1_AM11L()          bfin_read16(CAN1_AM11L)
-#define bfin_write_CAN1_AM11L(val)      bfin_write16(CAN1_AM11L, val)
-#define bfin_read_CAN1_AM11H()          bfin_read16(CAN1_AM11H)
-#define bfin_write_CAN1_AM11H(val)      bfin_write16(CAN1_AM11H, val)
-#define bfin_read_CAN1_AM12L()          bfin_read16(CAN1_AM12L)
-#define bfin_write_CAN1_AM12L(val)      bfin_write16(CAN1_AM12L, val)
-#define bfin_read_CAN1_AM12H()          bfin_read16(CAN1_AM12H)
-#define bfin_write_CAN1_AM12H(val)      bfin_write16(CAN1_AM12H, val)
-#define bfin_read_CAN1_AM13L()          bfin_read16(CAN1_AM13L)
-#define bfin_write_CAN1_AM13L(val)      bfin_write16(CAN1_AM13L, val)
-#define bfin_read_CAN1_AM13H()          bfin_read16(CAN1_AM13H)
-#define bfin_write_CAN1_AM13H(val)      bfin_write16(CAN1_AM13H, val)
-#define bfin_read_CAN1_AM14L()          bfin_read16(CAN1_AM14L)
-#define bfin_write_CAN1_AM14L(val)      bfin_write16(CAN1_AM14L, val)
-#define bfin_read_CAN1_AM14H()          bfin_read16(CAN1_AM14H)
-#define bfin_write_CAN1_AM14H(val)      bfin_write16(CAN1_AM14H, val)
-#define bfin_read_CAN1_AM15L()          bfin_read16(CAN1_AM15L)
-#define bfin_write_CAN1_AM15L(val)      bfin_write16(CAN1_AM15L, val)
-#define bfin_read_CAN1_AM15H()          bfin_read16(CAN1_AM15H)
-#define bfin_write_CAN1_AM15H(val)      bfin_write16(CAN1_AM15H, val)
-/* CAN Controller 1 Mailbox Accebfin_read_()tance Registers */
-#define bfin_read_CAN1_AM16L()          bfin_read16(CAN1_AM16L)
-#define bfin_write_CAN1_AM16L(val)      bfin_write16(CAN1_AM16L, val)
-#define bfin_read_CAN1_AM16H()          bfin_read16(CAN1_AM16H)
-#define bfin_write_CAN1_AM16H(val)      bfin_write16(CAN1_AM16H, val)
-#define bfin_read_CAN1_AM17L()          bfin_read16(CAN1_AM17L)
-#define bfin_write_CAN1_AM17L(val)      bfin_write16(CAN1_AM17L, val)
-#define bfin_read_CAN1_AM17H()          bfin_read16(CAN1_AM17H)
-#define bfin_write_CAN1_AM17H(val)      bfin_write16(CAN1_AM17H, val)
-#define bfin_read_CAN1_AM18L()          bfin_read16(CAN1_AM18L)
-#define bfin_write_CAN1_AM18L(val)      bfin_write16(CAN1_AM18L, val)
-#define bfin_read_CAN1_AM18H()          bfin_read16(CAN1_AM18H)
-#define bfin_write_CAN1_AM18H(val)      bfin_write16(CAN1_AM18H, val)
-#define bfin_read_CAN1_AM19L()          bfin_read16(CAN1_AM19L)
-#define bfin_write_CAN1_AM19L(val)      bfin_write16(CAN1_AM19L, val)
-#define bfin_read_CAN1_AM19H()          bfin_read16(CAN1_AM19H)
-#define bfin_write_CAN1_AM19H(val)      bfin_write16(CAN1_AM19H, val)
-#define bfin_read_CAN1_AM20L()          bfin_read16(CAN1_AM20L)
-#define bfin_write_CAN1_AM20L(val)      bfin_write16(CAN1_AM20L, val)
-#define bfin_read_CAN1_AM20H()          bfin_read16(CAN1_AM20H)
-#define bfin_write_CAN1_AM20H(val)      bfin_write16(CAN1_AM20H, val)
-#define bfin_read_CAN1_AM21L()          bfin_read16(CAN1_AM21L)
-#define bfin_write_CAN1_AM21L(val)      bfin_write16(CAN1_AM21L, val)
-#define bfin_read_CAN1_AM21H()          bfin_read16(CAN1_AM21H)
-#define bfin_write_CAN1_AM21H(val)      bfin_write16(CAN1_AM21H, val)
-#define bfin_read_CAN1_AM22L()          bfin_read16(CAN1_AM22L)
-#define bfin_write_CAN1_AM22L(val)      bfin_write16(CAN1_AM22L, val)
-#define bfin_read_CAN1_AM22H()          bfin_read16(CAN1_AM22H)
-#define bfin_write_CAN1_AM22H(val)      bfin_write16(CAN1_AM22H, val)
-#define bfin_read_CAN1_AM23L()          bfin_read16(CAN1_AM23L)
-#define bfin_write_CAN1_AM23L(val)      bfin_write16(CAN1_AM23L, val)
-#define bfin_read_CAN1_AM23H()          bfin_read16(CAN1_AM23H)
-#define bfin_write_CAN1_AM23H(val)      bfin_write16(CAN1_AM23H, val)
-#define bfin_read_CAN1_AM24L()          bfin_read16(CAN1_AM24L)
-#define bfin_write_CAN1_AM24L(val)      bfin_write16(CAN1_AM24L, val)
-#define bfin_read_CAN1_AM24H()          bfin_read16(CAN1_AM24H)
-#define bfin_write_CAN1_AM24H(val)      bfin_write16(CAN1_AM24H, val)
-#define bfin_read_CAN1_AM25L()          bfin_read16(CAN1_AM25L)
-#define bfin_write_CAN1_AM25L(val)      bfin_write16(CAN1_AM25L, val)
-#define bfin_read_CAN1_AM25H()          bfin_read16(CAN1_AM25H)
-#define bfin_write_CAN1_AM25H(val)      bfin_write16(CAN1_AM25H, val)
-#define bfin_read_CAN1_AM26L()          bfin_read16(CAN1_AM26L)
-#define bfin_write_CAN1_AM26L(val)      bfin_write16(CAN1_AM26L, val)
-#define bfin_read_CAN1_AM26H()          bfin_read16(CAN1_AM26H)
-#define bfin_write_CAN1_AM26H(val)      bfin_write16(CAN1_AM26H, val)
-#define bfin_read_CAN1_AM27L()          bfin_read16(CAN1_AM27L)
-#define bfin_write_CAN1_AM27L(val)      bfin_write16(CAN1_AM27L, val)
-#define bfin_read_CAN1_AM27H()          bfin_read16(CAN1_AM27H)
-#define bfin_write_CAN1_AM27H(val)      bfin_write16(CAN1_AM27H, val)
-#define bfin_read_CAN1_AM28L()          bfin_read16(CAN1_AM28L)
-#define bfin_write_CAN1_AM28L(val)      bfin_write16(CAN1_AM28L, val)
-#define bfin_read_CAN1_AM28H()          bfin_read16(CAN1_AM28H)
-#define bfin_write_CAN1_AM28H(val)      bfin_write16(CAN1_AM28H, val)
-#define bfin_read_CAN1_AM29L()          bfin_read16(CAN1_AM29L)
-#define bfin_write_CAN1_AM29L(val)      bfin_write16(CAN1_AM29L, val)
-#define bfin_read_CAN1_AM29H()          bfin_read16(CAN1_AM29H)
-#define bfin_write_CAN1_AM29H(val)      bfin_write16(CAN1_AM29H, val)
-#define bfin_read_CAN1_AM30L()          bfin_read16(CAN1_AM30L)
-#define bfin_write_CAN1_AM30L(val)      bfin_write16(CAN1_AM30L, val)
-#define bfin_read_CAN1_AM30H()          bfin_read16(CAN1_AM30H)
-#define bfin_write_CAN1_AM30H(val)      bfin_write16(CAN1_AM30H, val)
-#define bfin_read_CAN1_AM31L()          bfin_read16(CAN1_AM31L)
-#define bfin_write_CAN1_AM31L(val)      bfin_write16(CAN1_AM31L, val)
-#define bfin_read_CAN1_AM31H()          bfin_read16(CAN1_AM31H)
-#define bfin_write_CAN1_AM31H(val)      bfin_write16(CAN1_AM31H, val)
-/* CAN Controller 1 Mailbox Data Registers */
-#define bfin_read_CAN1_MB00_DATA0()             bfin_read16(CAN1_MB00_DATA0)
-#define bfin_write_CAN1_MB00_DATA0(val)         bfin_write16(CAN1_MB00_DATA0, val)
-#define bfin_read_CAN1_MB00_DATA1()             bfin_read16(CAN1_MB00_DATA1)
-#define bfin_write_CAN1_MB00_DATA1(val)         bfin_write16(CAN1_MB00_DATA1, val)
-#define bfin_read_CAN1_MB00_DATA2()             bfin_read16(CAN1_MB00_DATA2)
-#define bfin_write_CAN1_MB00_DATA2(val)         bfin_write16(CAN1_MB00_DATA2, val)
-#define bfin_read_CAN1_MB00_DATA3()             bfin_read16(CAN1_MB00_DATA3)
-#define bfin_write_CAN1_MB00_DATA3(val)         bfin_write16(CAN1_MB00_DATA3, val)
-#define bfin_read_CAN1_MB00_LENGTH()            bfin_read16(CAN1_MB00_LENGTH)
-#define bfin_write_CAN1_MB00_LENGTH(val)        bfin_write16(CAN1_MB00_LENGTH, val)
-#define bfin_read_CAN1_MB00_TIMESTAMP()         bfin_read16(CAN1_MB00_TIMESTAMP)
-#define bfin_write_CAN1_MB00_TIMESTAMP(val)     bfin_write16(CAN1_MB00_TIMESTAMP, val)
-#define bfin_read_CAN1_MB00_ID0()               bfin_read16(CAN1_MB00_ID0)
-#define bfin_write_CAN1_MB00_ID0(val)           bfin_write16(CAN1_MB00_ID0, val)
-#define bfin_read_CAN1_MB00_ID1()               bfin_read16(CAN1_MB00_ID1)
-#define bfin_write_CAN1_MB00_ID1(val)           bfin_write16(CAN1_MB00_ID1, val)
-#define bfin_read_CAN1_MB01_DATA0()             bfin_read16(CAN1_MB01_DATA0)
-#define bfin_write_CAN1_MB01_DATA0(val)         bfin_write16(CAN1_MB01_DATA0, val)
-#define bfin_read_CAN1_MB01_DATA1()             bfin_read16(CAN1_MB01_DATA1)
-#define bfin_write_CAN1_MB01_DATA1(val)         bfin_write16(CAN1_MB01_DATA1, val)
-#define bfin_read_CAN1_MB01_DATA2()             bfin_read16(CAN1_MB01_DATA2)
-#define bfin_write_CAN1_MB01_DATA2(val)         bfin_write16(CAN1_MB01_DATA2, val)
-#define bfin_read_CAN1_MB01_DATA3()             bfin_read16(CAN1_MB01_DATA3)
-#define bfin_write_CAN1_MB01_DATA3(val)         bfin_write16(CAN1_MB01_DATA3, val)
-#define bfin_read_CAN1_MB01_LENGTH()            bfin_read16(CAN1_MB01_LENGTH)
-#define bfin_write_CAN1_MB01_LENGTH(val)        bfin_write16(CAN1_MB01_LENGTH, val)
-#define bfin_read_CAN1_MB01_TIMESTAMP()         bfin_read16(CAN1_MB01_TIMESTAMP)
-#define bfin_write_CAN1_MB01_TIMESTAMP(val)     bfin_write16(CAN1_MB01_TIMESTAMP, val)
-#define bfin_read_CAN1_MB01_ID0()               bfin_read16(CAN1_MB01_ID0)
-#define bfin_write_CAN1_MB01_ID0(val)           bfin_write16(CAN1_MB01_ID0, val)
-#define bfin_read_CAN1_MB01_ID1()               bfin_read16(CAN1_MB01_ID1)
-#define bfin_write_CAN1_MB01_ID1(val)           bfin_write16(CAN1_MB01_ID1, val)
-#define bfin_read_CAN1_MB02_DATA0()             bfin_read16(CAN1_MB02_DATA0)
-#define bfin_write_CAN1_MB02_DATA0(val)         bfin_write16(CAN1_MB02_DATA0, val)
-#define bfin_read_CAN1_MB02_DATA1()             bfin_read16(CAN1_MB02_DATA1)
-#define bfin_write_CAN1_MB02_DATA1(val)         bfin_write16(CAN1_MB02_DATA1, val)
-#define bfin_read_CAN1_MB02_DATA2()             bfin_read16(CAN1_MB02_DATA2)
-#define bfin_write_CAN1_MB02_DATA2(val)         bfin_write16(CAN1_MB02_DATA2, val)
-#define bfin_read_CAN1_MB02_DATA3()             bfin_read16(CAN1_MB02_DATA3)
-#define bfin_write_CAN1_MB02_DATA3(val)         bfin_write16(CAN1_MB02_DATA3, val)
-#define bfin_read_CAN1_MB02_LENGTH()            bfin_read16(CAN1_MB02_LENGTH)
-#define bfin_write_CAN1_MB02_LENGTH(val)        bfin_write16(CAN1_MB02_LENGTH, val)
-#define bfin_read_CAN1_MB02_TIMESTAMP()         bfin_read16(CAN1_MB02_TIMESTAMP)
-#define bfin_write_CAN1_MB02_TIMESTAMP(val)     bfin_write16(CAN1_MB02_TIMESTAMP, val)
-#define bfin_read_CAN1_MB02_ID0()               bfin_read16(CAN1_MB02_ID0)
-#define bfin_write_CAN1_MB02_ID0(val)           bfin_write16(CAN1_MB02_ID0, val)
-#define bfin_read_CAN1_MB02_ID1()               bfin_read16(CAN1_MB02_ID1)
-#define bfin_write_CAN1_MB02_ID1(val)           bfin_write16(CAN1_MB02_ID1, val)
-#define bfin_read_CAN1_MB03_DATA0()             bfin_read16(CAN1_MB03_DATA0)
-#define bfin_write_CAN1_MB03_DATA0(val)         bfin_write16(CAN1_MB03_DATA0, val)
-#define bfin_read_CAN1_MB03_DATA1()             bfin_read16(CAN1_MB03_DATA1)
-#define bfin_write_CAN1_MB03_DATA1(val)         bfin_write16(CAN1_MB03_DATA1, val)
-#define bfin_read_CAN1_MB03_DATA2()             bfin_read16(CAN1_MB03_DATA2)
-#define bfin_write_CAN1_MB03_DATA2(val)         bfin_write16(CAN1_MB03_DATA2, val)
-#define bfin_read_CAN1_MB03_DATA3()             bfin_read16(CAN1_MB03_DATA3)
-#define bfin_write_CAN1_MB03_DATA3(val)         bfin_write16(CAN1_MB03_DATA3, val)
-#define bfin_read_CAN1_MB03_LENGTH()            bfin_read16(CAN1_MB03_LENGTH)
-#define bfin_write_CAN1_MB03_LENGTH(val)        bfin_write16(CAN1_MB03_LENGTH, val)
-#define bfin_read_CAN1_MB03_TIMESTAMP()         bfin_read16(CAN1_MB03_TIMESTAMP)
-#define bfin_write_CAN1_MB03_TIMESTAMP(val)     bfin_write16(CAN1_MB03_TIMESTAMP, val)
-#define bfin_read_CAN1_MB03_ID0()               bfin_read16(CAN1_MB03_ID0)
-#define bfin_write_CAN1_MB03_ID0(val)           bfin_write16(CAN1_MB03_ID0, val)
-#define bfin_read_CAN1_MB03_ID1()               bfin_read16(CAN1_MB03_ID1)
-#define bfin_write_CAN1_MB03_ID1(val)           bfin_write16(CAN1_MB03_ID1, val)
-#define bfin_read_CAN1_MB04_DATA0()             bfin_read16(CAN1_MB04_DATA0)
-#define bfin_write_CAN1_MB04_DATA0(val)         bfin_write16(CAN1_MB04_DATA0, val)
-#define bfin_read_CAN1_MB04_DATA1()             bfin_read16(CAN1_MB04_DATA1)
-#define bfin_write_CAN1_MB04_DATA1(val)         bfin_write16(CAN1_MB04_DATA1, val)
-#define bfin_read_CAN1_MB04_DATA2()             bfin_read16(CAN1_MB04_DATA2)
-#define bfin_write_CAN1_MB04_DATA2(val)         bfin_write16(CAN1_MB04_DATA2, val)
-#define bfin_read_CAN1_MB04_DATA3()             bfin_read16(CAN1_MB04_DATA3)
-#define bfin_write_CAN1_MB04_DATA3(val)         bfin_write16(CAN1_MB04_DATA3, val)
-#define bfin_read_CAN1_MB04_LENGTH()            bfin_read16(CAN1_MB04_LENGTH)
-#define bfin_write_CAN1_MB04_LENGTH(val)        bfin_write16(CAN1_MB04_LENGTH, val)
-#define bfin_read_CAN1_MB04_TIMESTAMP()         bfin_read16(CAN1_MB04_TIMESTAMP)
-#define bfin_write_CAN1_MB04_TIMESTAMP(val)     bfin_write16(CAN1_MB04_TIMESTAMP, val)
-#define bfin_read_CAN1_MB04_ID0()               bfin_read16(CAN1_MB04_ID0)
-#define bfin_write_CAN1_MB04_ID0(val)           bfin_write16(CAN1_MB04_ID0, val)
-#define bfin_read_CAN1_MB04_ID1()               bfin_read16(CAN1_MB04_ID1)
-#define bfin_write_CAN1_MB04_ID1(val)           bfin_write16(CAN1_MB04_ID1, val)
-#define bfin_read_CAN1_MB05_DATA0()             bfin_read16(CAN1_MB05_DATA0)
-#define bfin_write_CAN1_MB05_DATA0(val)         bfin_write16(CAN1_MB05_DATA0, val)
-#define bfin_read_CAN1_MB05_DATA1()             bfin_read16(CAN1_MB05_DATA1)
-#define bfin_write_CAN1_MB05_DATA1(val)         bfin_write16(CAN1_MB05_DATA1, val)
-#define bfin_read_CAN1_MB05_DATA2()             bfin_read16(CAN1_MB05_DATA2)
-#define bfin_write_CAN1_MB05_DATA2(val)         bfin_write16(CAN1_MB05_DATA2, val)
-#define bfin_read_CAN1_MB05_DATA3()             bfin_read16(CAN1_MB05_DATA3)
-#define bfin_write_CAN1_MB05_DATA3(val)         bfin_write16(CAN1_MB05_DATA3, val)
-#define bfin_read_CAN1_MB05_LENGTH()            bfin_read16(CAN1_MB05_LENGTH)
-#define bfin_write_CAN1_MB05_LENGTH(val)        bfin_write16(CAN1_MB05_LENGTH, val)
-#define bfin_read_CAN1_MB05_TIMESTAMP()         bfin_read16(CAN1_MB05_TIMESTAMP)
-#define bfin_write_CAN1_MB05_TIMESTAMP(val)     bfin_write16(CAN1_MB05_TIMESTAMP, val)
-#define bfin_read_CAN1_MB05_ID0()               bfin_read16(CAN1_MB05_ID0)
-#define bfin_write_CAN1_MB05_ID0(val)           bfin_write16(CAN1_MB05_ID0, val)
-#define bfin_read_CAN1_MB05_ID1()               bfin_read16(CAN1_MB05_ID1)
-#define bfin_write_CAN1_MB05_ID1(val)           bfin_write16(CAN1_MB05_ID1, val)
-#define bfin_read_CAN1_MB06_DATA0()             bfin_read16(CAN1_MB06_DATA0)
-#define bfin_write_CAN1_MB06_DATA0(val)         bfin_write16(CAN1_MB06_DATA0, val)
-#define bfin_read_CAN1_MB06_DATA1()             bfin_read16(CAN1_MB06_DATA1)
-#define bfin_write_CAN1_MB06_DATA1(val)         bfin_write16(CAN1_MB06_DATA1, val)
-#define bfin_read_CAN1_MB06_DATA2()             bfin_read16(CAN1_MB06_DATA2)
-#define bfin_write_CAN1_MB06_DATA2(val)         bfin_write16(CAN1_MB06_DATA2, val)
-#define bfin_read_CAN1_MB06_DATA3()             bfin_read16(CAN1_MB06_DATA3)
-#define bfin_write_CAN1_MB06_DATA3(val)         bfin_write16(CAN1_MB06_DATA3, val)
-#define bfin_read_CAN1_MB06_LENGTH()            bfin_read16(CAN1_MB06_LENGTH)
-#define bfin_write_CAN1_MB06_LENGTH(val)        bfin_write16(CAN1_MB06_LENGTH, val)
-#define bfin_read_CAN1_MB06_TIMESTAMP()         bfin_read16(CAN1_MB06_TIMESTAMP)
-#define bfin_write_CAN1_MB06_TIMESTAMP(val)     bfin_write16(CAN1_MB06_TIMESTAMP, val)
-#define bfin_read_CAN1_MB06_ID0()               bfin_read16(CAN1_MB06_ID0)
-#define bfin_write_CAN1_MB06_ID0(val)           bfin_write16(CAN1_MB06_ID0, val)
-#define bfin_read_CAN1_MB06_ID1()               bfin_read16(CAN1_MB06_ID1)
-#define bfin_write_CAN1_MB06_ID1(val)           bfin_write16(CAN1_MB06_ID1, val)
-#define bfin_read_CAN1_MB07_DATA0()             bfin_read16(CAN1_MB07_DATA0)
-#define bfin_write_CAN1_MB07_DATA0(val)         bfin_write16(CAN1_MB07_DATA0, val)
-#define bfin_read_CAN1_MB07_DATA1()             bfin_read16(CAN1_MB07_DATA1)
-#define bfin_write_CAN1_MB07_DATA1(val)         bfin_write16(CAN1_MB07_DATA1, val)
-#define bfin_read_CAN1_MB07_DATA2()             bfin_read16(CAN1_MB07_DATA2)
-#define bfin_write_CAN1_MB07_DATA2(val)         bfin_write16(CAN1_MB07_DATA2, val)
-#define bfin_read_CAN1_MB07_DATA3()             bfin_read16(CAN1_MB07_DATA3)
-#define bfin_write_CAN1_MB07_DATA3(val)         bfin_write16(CAN1_MB07_DATA3, val)
-#define bfin_read_CAN1_MB07_LENGTH()            bfin_read16(CAN1_MB07_LENGTH)
-#define bfin_write_CAN1_MB07_LENGTH(val)        bfin_write16(CAN1_MB07_LENGTH, val)
-#define bfin_read_CAN1_MB07_TIMESTAMP()         bfin_read16(CAN1_MB07_TIMESTAMP)
-#define bfin_write_CAN1_MB07_TIMESTAMP(val)     bfin_write16(CAN1_MB07_TIMESTAMP, val)
-#define bfin_read_CAN1_MB07_ID0()               bfin_read16(CAN1_MB07_ID0)
-#define bfin_write_CAN1_MB07_ID0(val)           bfin_write16(CAN1_MB07_ID0, val)
-#define bfin_read_CAN1_MB07_ID1()               bfin_read16(CAN1_MB07_ID1)
-#define bfin_write_CAN1_MB07_ID1(val)           bfin_write16(CAN1_MB07_ID1, val)
-#define bfin_read_CAN1_MB08_DATA0()             bfin_read16(CAN1_MB08_DATA0)
-#define bfin_write_CAN1_MB08_DATA0(val)         bfin_write16(CAN1_MB08_DATA0, val)
-#define bfin_read_CAN1_MB08_DATA1()             bfin_read16(CAN1_MB08_DATA1)
-#define bfin_write_CAN1_MB08_DATA1(val)         bfin_write16(CAN1_MB08_DATA1, val)
-#define bfin_read_CAN1_MB08_DATA2()             bfin_read16(CAN1_MB08_DATA2)
-#define bfin_write_CAN1_MB08_DATA2(val)         bfin_write16(CAN1_MB08_DATA2, val)
-#define bfin_read_CAN1_MB08_DATA3()             bfin_read16(CAN1_MB08_DATA3)
-#define bfin_write_CAN1_MB08_DATA3(val)         bfin_write16(CAN1_MB08_DATA3, val)
-#define bfin_read_CAN1_MB08_LENGTH()            bfin_read16(CAN1_MB08_LENGTH)
-#define bfin_write_CAN1_MB08_LENGTH(val)        bfin_write16(CAN1_MB08_LENGTH, val)
-#define bfin_read_CAN1_MB08_TIMESTAMP()         bfin_read16(CAN1_MB08_TIMESTAMP)
-#define bfin_write_CAN1_MB08_TIMESTAMP(val)     bfin_write16(CAN1_MB08_TIMESTAMP, val)
-#define bfin_read_CAN1_MB08_ID0()               bfin_read16(CAN1_MB08_ID0)
-#define bfin_write_CAN1_MB08_ID0(val)           bfin_write16(CAN1_MB08_ID0, val)
-#define bfin_read_CAN1_MB08_ID1()               bfin_read16(CAN1_MB08_ID1)
-#define bfin_write_CAN1_MB08_ID1(val)           bfin_write16(CAN1_MB08_ID1, val)
-#define bfin_read_CAN1_MB09_DATA0()             bfin_read16(CAN1_MB09_DATA0)
-#define bfin_write_CAN1_MB09_DATA0(val)         bfin_write16(CAN1_MB09_DATA0, val)
-#define bfin_read_CAN1_MB09_DATA1()             bfin_read16(CAN1_MB09_DATA1)
-#define bfin_write_CAN1_MB09_DATA1(val)         bfin_write16(CAN1_MB09_DATA1, val)
-#define bfin_read_CAN1_MB09_DATA2()             bfin_read16(CAN1_MB09_DATA2)
-#define bfin_write_CAN1_MB09_DATA2(val)         bfin_write16(CAN1_MB09_DATA2, val)
-#define bfin_read_CAN1_MB09_DATA3()             bfin_read16(CAN1_MB09_DATA3)
-#define bfin_write_CAN1_MB09_DATA3(val)         bfin_write16(CAN1_MB09_DATA3, val)
-#define bfin_read_CAN1_MB09_LENGTH()            bfin_read16(CAN1_MB09_LENGTH)
-#define bfin_write_CAN1_MB09_LENGTH(val)        bfin_write16(CAN1_MB09_LENGTH, val)
-#define bfin_read_CAN1_MB09_TIMESTAMP()         bfin_read16(CAN1_MB09_TIMESTAMP)
-#define bfin_write_CAN1_MB09_TIMESTAMP(val)     bfin_write16(CAN1_MB09_TIMESTAMP, val)
-#define bfin_read_CAN1_MB09_ID0()               bfin_read16(CAN1_MB09_ID0)
-#define bfin_write_CAN1_MB09_ID0(val)           bfin_write16(CAN1_MB09_ID0, val)
-#define bfin_read_CAN1_MB09_ID1()               bfin_read16(CAN1_MB09_ID1)
-#define bfin_write_CAN1_MB09_ID1(val)           bfin_write16(CAN1_MB09_ID1, val)
-#define bfin_read_CAN1_MB10_DATA0()             bfin_read16(CAN1_MB10_DATA0)
-#define bfin_write_CAN1_MB10_DATA0(val)         bfin_write16(CAN1_MB10_DATA0, val)
-#define bfin_read_CAN1_MB10_DATA1()             bfin_read16(CAN1_MB10_DATA1)
-#define bfin_write_CAN1_MB10_DATA1(val)         bfin_write16(CAN1_MB10_DATA1, val)
-#define bfin_read_CAN1_MB10_DATA2()             bfin_read16(CAN1_MB10_DATA2)
-#define bfin_write_CAN1_MB10_DATA2(val)         bfin_write16(CAN1_MB10_DATA2, val)
-#define bfin_read_CAN1_MB10_DATA3()             bfin_read16(CAN1_MB10_DATA3)
-#define bfin_write_CAN1_MB10_DATA3(val)         bfin_write16(CAN1_MB10_DATA3, val)
-#define bfin_read_CAN1_MB10_LENGTH()            bfin_read16(CAN1_MB10_LENGTH)
-#define bfin_write_CAN1_MB10_LENGTH(val)        bfin_write16(CAN1_MB10_LENGTH, val)
-#define bfin_read_CAN1_MB10_TIMESTAMP()         bfin_read16(CAN1_MB10_TIMESTAMP)
-#define bfin_write_CAN1_MB10_TIMESTAMP(val)     bfin_write16(CAN1_MB10_TIMESTAMP, val)
-#define bfin_read_CAN1_MB10_ID0()               bfin_read16(CAN1_MB10_ID0)
-#define bfin_write_CAN1_MB10_ID0(val)           bfin_write16(CAN1_MB10_ID0, val)
-#define bfin_read_CAN1_MB10_ID1()               bfin_read16(CAN1_MB10_ID1)
-#define bfin_write_CAN1_MB10_ID1(val)           bfin_write16(CAN1_MB10_ID1, val)
-#define bfin_read_CAN1_MB11_DATA0()             bfin_read16(CAN1_MB11_DATA0)
-#define bfin_write_CAN1_MB11_DATA0(val)         bfin_write16(CAN1_MB11_DATA0, val)
-#define bfin_read_CAN1_MB11_DATA1()             bfin_read16(CAN1_MB11_DATA1)
-#define bfin_write_CAN1_MB11_DATA1(val)         bfin_write16(CAN1_MB11_DATA1, val)
-#define bfin_read_CAN1_MB11_DATA2()             bfin_read16(CAN1_MB11_DATA2)
-#define bfin_write_CAN1_MB11_DATA2(val)         bfin_write16(CAN1_MB11_DATA2, val)
-#define bfin_read_CAN1_MB11_DATA3()             bfin_read16(CAN1_MB11_DATA3)
-#define bfin_write_CAN1_MB11_DATA3(val)         bfin_write16(CAN1_MB11_DATA3, val)
-#define bfin_read_CAN1_MB11_LENGTH()            bfin_read16(CAN1_MB11_LENGTH)
-#define bfin_write_CAN1_MB11_LENGTH(val)        bfin_write16(CAN1_MB11_LENGTH, val)
-#define bfin_read_CAN1_MB11_TIMESTAMP()         bfin_read16(CAN1_MB11_TIMESTAMP)
-#define bfin_write_CAN1_MB11_TIMESTAMP(val)     bfin_write16(CAN1_MB11_TIMESTAMP, val)
-#define bfin_read_CAN1_MB11_ID0()               bfin_read16(CAN1_MB11_ID0)
-#define bfin_write_CAN1_MB11_ID0(val)           bfin_write16(CAN1_MB11_ID0, val)
-#define bfin_read_CAN1_MB11_ID1()               bfin_read16(CAN1_MB11_ID1)
-#define bfin_write_CAN1_MB11_ID1(val)           bfin_write16(CAN1_MB11_ID1, val)
-#define bfin_read_CAN1_MB12_DATA0()             bfin_read16(CAN1_MB12_DATA0)
-#define bfin_write_CAN1_MB12_DATA0(val)         bfin_write16(CAN1_MB12_DATA0, val)
-#define bfin_read_CAN1_MB12_DATA1()             bfin_read16(CAN1_MB12_DATA1)
-#define bfin_write_CAN1_MB12_DATA1(val)         bfin_write16(CAN1_MB12_DATA1, val)
-#define bfin_read_CAN1_MB12_DATA2()             bfin_read16(CAN1_MB12_DATA2)
-#define bfin_write_CAN1_MB12_DATA2(val)         bfin_write16(CAN1_MB12_DATA2, val)
-#define bfin_read_CAN1_MB12_DATA3()             bfin_read16(CAN1_MB12_DATA3)
-#define bfin_write_CAN1_MB12_DATA3(val)         bfin_write16(CAN1_MB12_DATA3, val)
-#define bfin_read_CAN1_MB12_LENGTH()            bfin_read16(CAN1_MB12_LENGTH)
-#define bfin_write_CAN1_MB12_LENGTH(val)        bfin_write16(CAN1_MB12_LENGTH, val)
-#define bfin_read_CAN1_MB12_TIMESTAMP()         bfin_read16(CAN1_MB12_TIMESTAMP)
-#define bfin_write_CAN1_MB12_TIMESTAMP(val)     bfin_write16(CAN1_MB12_TIMESTAMP, val)
-#define bfin_read_CAN1_MB12_ID0()               bfin_read16(CAN1_MB12_ID0)
-#define bfin_write_CAN1_MB12_ID0(val)           bfin_write16(CAN1_MB12_ID0, val)
-#define bfin_read_CAN1_MB12_ID1()               bfin_read16(CAN1_MB12_ID1)
-#define bfin_write_CAN1_MB12_ID1(val)           bfin_write16(CAN1_MB12_ID1, val)
-#define bfin_read_CAN1_MB13_DATA0()             bfin_read16(CAN1_MB13_DATA0)
-#define bfin_write_CAN1_MB13_DATA0(val)         bfin_write16(CAN1_MB13_DATA0, val)
-#define bfin_read_CAN1_MB13_DATA1()             bfin_read16(CAN1_MB13_DATA1)
-#define bfin_write_CAN1_MB13_DATA1(val)         bfin_write16(CAN1_MB13_DATA1, val)
-#define bfin_read_CAN1_MB13_DATA2()             bfin_read16(CAN1_MB13_DATA2)
-#define bfin_write_CAN1_MB13_DATA2(val)         bfin_write16(CAN1_MB13_DATA2, val)
-#define bfin_read_CAN1_MB13_DATA3()             bfin_read16(CAN1_MB13_DATA3)
-#define bfin_write_CAN1_MB13_DATA3(val)         bfin_write16(CAN1_MB13_DATA3, val)
-#define bfin_read_CAN1_MB13_LENGTH()            bfin_read16(CAN1_MB13_LENGTH)
-#define bfin_write_CAN1_MB13_LENGTH(val)        bfin_write16(CAN1_MB13_LENGTH, val)
-#define bfin_read_CAN1_MB13_TIMESTAMP()         bfin_read16(CAN1_MB13_TIMESTAMP)
-#define bfin_write_CAN1_MB13_TIMESTAMP(val)     bfin_write16(CAN1_MB13_TIMESTAMP, val)
-#define bfin_read_CAN1_MB13_ID0()               bfin_read16(CAN1_MB13_ID0)
-#define bfin_write_CAN1_MB13_ID0(val)           bfin_write16(CAN1_MB13_ID0, val)
-#define bfin_read_CAN1_MB13_ID1()               bfin_read16(CAN1_MB13_ID1)
-#define bfin_write_CAN1_MB13_ID1(val)           bfin_write16(CAN1_MB13_ID1, val)
-#define bfin_read_CAN1_MB14_DATA0()             bfin_read16(CAN1_MB14_DATA0)
-#define bfin_write_CAN1_MB14_DATA0(val)         bfin_write16(CAN1_MB14_DATA0, val)
-#define bfin_read_CAN1_MB14_DATA1()             bfin_read16(CAN1_MB14_DATA1)
-#define bfin_write_CAN1_MB14_DATA1(val)         bfin_write16(CAN1_MB14_DATA1, val)
-#define bfin_read_CAN1_MB14_DATA2()             bfin_read16(CAN1_MB14_DATA2)
-#define bfin_write_CAN1_MB14_DATA2(val)         bfin_write16(CAN1_MB14_DATA2, val)
-#define bfin_read_CAN1_MB14_DATA3()             bfin_read16(CAN1_MB14_DATA3)
-#define bfin_write_CAN1_MB14_DATA3(val)         bfin_write16(CAN1_MB14_DATA3, val)
-#define bfin_read_CAN1_MB14_LENGTH()            bfin_read16(CAN1_MB14_LENGTH)
-#define bfin_write_CAN1_MB14_LENGTH(val)        bfin_write16(CAN1_MB14_LENGTH, val)
-#define bfin_read_CAN1_MB14_TIMESTAMP()         bfin_read16(CAN1_MB14_TIMESTAMP)
-#define bfin_write_CAN1_MB14_TIMESTAMP(val)     bfin_write16(CAN1_MB14_TIMESTAMP, val)
-#define bfin_read_CAN1_MB14_ID0()               bfin_read16(CAN1_MB14_ID0)
-#define bfin_write_CAN1_MB14_ID0(val)           bfin_write16(CAN1_MB14_ID0, val)
-#define bfin_read_CAN1_MB14_ID1()               bfin_read16(CAN1_MB14_ID1)
-#define bfin_write_CAN1_MB14_ID1(val)           bfin_write16(CAN1_MB14_ID1, val)
-#define bfin_read_CAN1_MB15_DATA0()             bfin_read16(CAN1_MB15_DATA0)
-#define bfin_write_CAN1_MB15_DATA0(val)         bfin_write16(CAN1_MB15_DATA0, val)
-#define bfin_read_CAN1_MB15_DATA1()             bfin_read16(CAN1_MB15_DATA1)
-#define bfin_write_CAN1_MB15_DATA1(val)         bfin_write16(CAN1_MB15_DATA1, val)
-#define bfin_read_CAN1_MB15_DATA2()             bfin_read16(CAN1_MB15_DATA2)
-#define bfin_write_CAN1_MB15_DATA2(val)         bfin_write16(CAN1_MB15_DATA2, val)
-#define bfin_read_CAN1_MB15_DATA3()             bfin_read16(CAN1_MB15_DATA3)
-#define bfin_write_CAN1_MB15_DATA3(val)         bfin_write16(CAN1_MB15_DATA3, val)
-#define bfin_read_CAN1_MB15_LENGTH()            bfin_read16(CAN1_MB15_LENGTH)
-#define bfin_write_CAN1_MB15_LENGTH(val)        bfin_write16(CAN1_MB15_LENGTH, val)
-#define bfin_read_CAN1_MB15_TIMESTAMP()         bfin_read16(CAN1_MB15_TIMESTAMP)
-#define bfin_write_CAN1_MB15_TIMESTAMP(val)     bfin_write16(CAN1_MB15_TIMESTAMP, val)
-#define bfin_read_CAN1_MB15_ID0()               bfin_read16(CAN1_MB15_ID0)
-#define bfin_write_CAN1_MB15_ID0(val)           bfin_write16(CAN1_MB15_ID0, val)
-#define bfin_read_CAN1_MB15_ID1()               bfin_read16(CAN1_MB15_ID1)
-#define bfin_write_CAN1_MB15_ID1(val)           bfin_write16(CAN1_MB15_ID1, val)
-/* CAN Controller 1 Mailbox Data Registers */
-#define bfin_read_CAN1_MB16_DATA0()             bfin_read16(CAN1_MB16_DATA0)
-#define bfin_write_CAN1_MB16_DATA0(val)         bfin_write16(CAN1_MB16_DATA0, val)
-#define bfin_read_CAN1_MB16_DATA1()             bfin_read16(CAN1_MB16_DATA1)
-#define bfin_write_CAN1_MB16_DATA1(val)         bfin_write16(CAN1_MB16_DATA1, val)
-#define bfin_read_CAN1_MB16_DATA2()             bfin_read16(CAN1_MB16_DATA2)
-#define bfin_write_CAN1_MB16_DATA2(val)         bfin_write16(CAN1_MB16_DATA2, val)
-#define bfin_read_CAN1_MB16_DATA3()             bfin_read16(CAN1_MB16_DATA3)
-#define bfin_write_CAN1_MB16_DATA3(val)         bfin_write16(CAN1_MB16_DATA3, val)
-#define bfin_read_CAN1_MB16_LENGTH()            bfin_read16(CAN1_MB16_LENGTH)
-#define bfin_write_CAN1_MB16_LENGTH(val)        bfin_write16(CAN1_MB16_LENGTH, val)
-#define bfin_read_CAN1_MB16_TIMESTAMP()         bfin_read16(CAN1_MB16_TIMESTAMP)
-#define bfin_write_CAN1_MB16_TIMESTAMP(val)     bfin_write16(CAN1_MB16_TIMESTAMP, val)
-#define bfin_read_CAN1_MB16_ID0()               bfin_read16(CAN1_MB16_ID0)
-#define bfin_write_CAN1_MB16_ID0(val)           bfin_write16(CAN1_MB16_ID0, val)
-#define bfin_read_CAN1_MB16_ID1()               bfin_read16(CAN1_MB16_ID1)
-#define bfin_write_CAN1_MB16_ID1(val)           bfin_write16(CAN1_MB16_ID1, val)
-#define bfin_read_CAN1_MB17_DATA0()             bfin_read16(CAN1_MB17_DATA0)
-#define bfin_write_CAN1_MB17_DATA0(val)         bfin_write16(CAN1_MB17_DATA0, val)
-#define bfin_read_CAN1_MB17_DATA1()             bfin_read16(CAN1_MB17_DATA1)
-#define bfin_write_CAN1_MB17_DATA1(val)         bfin_write16(CAN1_MB17_DATA1, val)
-#define bfin_read_CAN1_MB17_DATA2()             bfin_read16(CAN1_MB17_DATA2)
-#define bfin_write_CAN1_MB17_DATA2(val)         bfin_write16(CAN1_MB17_DATA2, val)
-#define bfin_read_CAN1_MB17_DATA3()             bfin_read16(CAN1_MB17_DATA3)
-#define bfin_write_CAN1_MB17_DATA3(val)         bfin_write16(CAN1_MB17_DATA3, val)
-#define bfin_read_CAN1_MB17_LENGTH()            bfin_read16(CAN1_MB17_LENGTH)
-#define bfin_write_CAN1_MB17_LENGTH(val)        bfin_write16(CAN1_MB17_LENGTH, val)
-#define bfin_read_CAN1_MB17_TIMESTAMP()         bfin_read16(CAN1_MB17_TIMESTAMP)
-#define bfin_write_CAN1_MB17_TIMESTAMP(val)     bfin_write16(CAN1_MB17_TIMESTAMP, val)
-#define bfin_read_CAN1_MB17_ID0()               bfin_read16(CAN1_MB17_ID0)
-#define bfin_write_CAN1_MB17_ID0(val)           bfin_write16(CAN1_MB17_ID0, val)
-#define bfin_read_CAN1_MB17_ID1()               bfin_read16(CAN1_MB17_ID1)
-#define bfin_write_CAN1_MB17_ID1(val)           bfin_write16(CAN1_MB17_ID1, val)
-#define bfin_read_CAN1_MB18_DATA0()             bfin_read16(CAN1_MB18_DATA0)
-#define bfin_write_CAN1_MB18_DATA0(val)         bfin_write16(CAN1_MB18_DATA0, val)
-#define bfin_read_CAN1_MB18_DATA1()             bfin_read16(CAN1_MB18_DATA1)
-#define bfin_write_CAN1_MB18_DATA1(val)         bfin_write16(CAN1_MB18_DATA1, val)
-#define bfin_read_CAN1_MB18_DATA2()             bfin_read16(CAN1_MB18_DATA2)
-#define bfin_write_CAN1_MB18_DATA2(val)         bfin_write16(CAN1_MB18_DATA2, val)
-#define bfin_read_CAN1_MB18_DATA3()             bfin_read16(CAN1_MB18_DATA3)
-#define bfin_write_CAN1_MB18_DATA3(val)         bfin_write16(CAN1_MB18_DATA3, val)
-#define bfin_read_CAN1_MB18_LENGTH()            bfin_read16(CAN1_MB18_LENGTH)
-#define bfin_write_CAN1_MB18_LENGTH(val)        bfin_write16(CAN1_MB18_LENGTH, val)
-#define bfin_read_CAN1_MB18_TIMESTAMP()         bfin_read16(CAN1_MB18_TIMESTAMP)
-#define bfin_write_CAN1_MB18_TIMESTAMP(val)     bfin_write16(CAN1_MB18_TIMESTAMP, val)
-#define bfin_read_CAN1_MB18_ID0()               bfin_read16(CAN1_MB18_ID0)
-#define bfin_write_CAN1_MB18_ID0(val)           bfin_write16(CAN1_MB18_ID0, val)
-#define bfin_read_CAN1_MB18_ID1()               bfin_read16(CAN1_MB18_ID1)
-#define bfin_write_CAN1_MB18_ID1(val)           bfin_write16(CAN1_MB18_ID1, val)
-#define bfin_read_CAN1_MB19_DATA0()             bfin_read16(CAN1_MB19_DATA0)
-#define bfin_write_CAN1_MB19_DATA0(val)         bfin_write16(CAN1_MB19_DATA0, val)
-#define bfin_read_CAN1_MB19_DATA1()             bfin_read16(CAN1_MB19_DATA1)
-#define bfin_write_CAN1_MB19_DATA1(val)         bfin_write16(CAN1_MB19_DATA1, val)
-#define bfin_read_CAN1_MB19_DATA2()             bfin_read16(CAN1_MB19_DATA2)
-#define bfin_write_CAN1_MB19_DATA2(val)         bfin_write16(CAN1_MB19_DATA2, val)
-#define bfin_read_CAN1_MB19_DATA3()             bfin_read16(CAN1_MB19_DATA3)
-#define bfin_write_CAN1_MB19_DATA3(val)         bfin_write16(CAN1_MB19_DATA3, val)
-#define bfin_read_CAN1_MB19_LENGTH()            bfin_read16(CAN1_MB19_LENGTH)
-#define bfin_write_CAN1_MB19_LENGTH(val)        bfin_write16(CAN1_MB19_LENGTH, val)
-#define bfin_read_CAN1_MB19_TIMESTAMP()         bfin_read16(CAN1_MB19_TIMESTAMP)
-#define bfin_write_CAN1_MB19_TIMESTAMP(val)     bfin_write16(CAN1_MB19_TIMESTAMP, val)
-#define bfin_read_CAN1_MB19_ID0()               bfin_read16(CAN1_MB19_ID0)
-#define bfin_write_CAN1_MB19_ID0(val)           bfin_write16(CAN1_MB19_ID0, val)
-#define bfin_read_CAN1_MB19_ID1()               bfin_read16(CAN1_MB19_ID1)
-#define bfin_write_CAN1_MB19_ID1(val)           bfin_write16(CAN1_MB19_ID1, val)
-#define bfin_read_CAN1_MB20_DATA0()             bfin_read16(CAN1_MB20_DATA0)
-#define bfin_write_CAN1_MB20_DATA0(val)         bfin_write16(CAN1_MB20_DATA0, val)
-#define bfin_read_CAN1_MB20_DATA1()             bfin_read16(CAN1_MB20_DATA1)
-#define bfin_write_CAN1_MB20_DATA1(val)         bfin_write16(CAN1_MB20_DATA1, val)
-#define bfin_read_CAN1_MB20_DATA2()             bfin_read16(CAN1_MB20_DATA2)
-#define bfin_write_CAN1_MB20_DATA2(val)         bfin_write16(CAN1_MB20_DATA2, val)
-#define bfin_read_CAN1_MB20_DATA3()             bfin_read16(CAN1_MB20_DATA3)
-#define bfin_write_CAN1_MB20_DATA3(val)         bfin_write16(CAN1_MB20_DATA3, val)
-#define bfin_read_CAN1_MB20_LENGTH()            bfin_read16(CAN1_MB20_LENGTH)
-#define bfin_write_CAN1_MB20_LENGTH(val)        bfin_write16(CAN1_MB20_LENGTH, val)
-#define bfin_read_CAN1_MB20_TIMESTAMP()         bfin_read16(CAN1_MB20_TIMESTAMP)
-#define bfin_write_CAN1_MB20_TIMESTAMP(val)     bfin_write16(CAN1_MB20_TIMESTAMP, val)
-#define bfin_read_CAN1_MB20_ID0()               bfin_read16(CAN1_MB20_ID0)
-#define bfin_write_CAN1_MB20_ID0(val)           bfin_write16(CAN1_MB20_ID0, val)
-#define bfin_read_CAN1_MB20_ID1()               bfin_read16(CAN1_MB20_ID1)
-#define bfin_write_CAN1_MB20_ID1(val)           bfin_write16(CAN1_MB20_ID1, val)
-#define bfin_read_CAN1_MB21_DATA0()             bfin_read16(CAN1_MB21_DATA0)
-#define bfin_write_CAN1_MB21_DATA0(val)         bfin_write16(CAN1_MB21_DATA0, val)
-#define bfin_read_CAN1_MB21_DATA1()             bfin_read16(CAN1_MB21_DATA1)
-#define bfin_write_CAN1_MB21_DATA1(val)         bfin_write16(CAN1_MB21_DATA1, val)
-#define bfin_read_CAN1_MB21_DATA2()             bfin_read16(CAN1_MB21_DATA2)
-#define bfin_write_CAN1_MB21_DATA2(val)         bfin_write16(CAN1_MB21_DATA2, val)
-#define bfin_read_CAN1_MB21_DATA3()             bfin_read16(CAN1_MB21_DATA3)
-#define bfin_write_CAN1_MB21_DATA3(val)         bfin_write16(CAN1_MB21_DATA3, val)
-#define bfin_read_CAN1_MB21_LENGTH()            bfin_read16(CAN1_MB21_LENGTH)
-#define bfin_write_CAN1_MB21_LENGTH(val)        bfin_write16(CAN1_MB21_LENGTH, val)
-#define bfin_read_CAN1_MB21_TIMESTAMP()         bfin_read16(CAN1_MB21_TIMESTAMP)
-#define bfin_write_CAN1_MB21_TIMESTAMP(val)     bfin_write16(CAN1_MB21_TIMESTAMP, val)
-#define bfin_read_CAN1_MB21_ID0()               bfin_read16(CAN1_MB21_ID0)
-#define bfin_write_CAN1_MB21_ID0(val)           bfin_write16(CAN1_MB21_ID0, val)
-#define bfin_read_CAN1_MB21_ID1()               bfin_read16(CAN1_MB21_ID1)
-#define bfin_write_CAN1_MB21_ID1(val)           bfin_write16(CAN1_MB21_ID1, val)
-#define bfin_read_CAN1_MB22_DATA0()             bfin_read16(CAN1_MB22_DATA0)
-#define bfin_write_CAN1_MB22_DATA0(val)         bfin_write16(CAN1_MB22_DATA0, val)
-#define bfin_read_CAN1_MB22_DATA1()             bfin_read16(CAN1_MB22_DATA1)
-#define bfin_write_CAN1_MB22_DATA1(val)         bfin_write16(CAN1_MB22_DATA1, val)
-#define bfin_read_CAN1_MB22_DATA2()             bfin_read16(CAN1_MB22_DATA2)
-#define bfin_write_CAN1_MB22_DATA2(val)         bfin_write16(CAN1_MB22_DATA2, val)
-#define bfin_read_CAN1_MB22_DATA3()             bfin_read16(CAN1_MB22_DATA3)
-#define bfin_write_CAN1_MB22_DATA3(val)         bfin_write16(CAN1_MB22_DATA3, val)
-#define bfin_read_CAN1_MB22_LENGTH()            bfin_read16(CAN1_MB22_LENGTH)
-#define bfin_write_CAN1_MB22_LENGTH(val)        bfin_write16(CAN1_MB22_LENGTH, val)
-#define bfin_read_CAN1_MB22_TIMESTAMP()         bfin_read16(CAN1_MB22_TIMESTAMP)
-#define bfin_write_CAN1_MB22_TIMESTAMP(val)     bfin_write16(CAN1_MB22_TIMESTAMP, val)
-#define bfin_read_CAN1_MB22_ID0()               bfin_read16(CAN1_MB22_ID0)
-#define bfin_write_CAN1_MB22_ID0(val)           bfin_write16(CAN1_MB22_ID0, val)
-#define bfin_read_CAN1_MB22_ID1()               bfin_read16(CAN1_MB22_ID1)
-#define bfin_write_CAN1_MB22_ID1(val)           bfin_write16(CAN1_MB22_ID1, val)
-#define bfin_read_CAN1_MB23_DATA0()             bfin_read16(CAN1_MB23_DATA0)
-#define bfin_write_CAN1_MB23_DATA0(val)         bfin_write16(CAN1_MB23_DATA0, val)
-#define bfin_read_CAN1_MB23_DATA1()             bfin_read16(CAN1_MB23_DATA1)
-#define bfin_write_CAN1_MB23_DATA1(val)         bfin_write16(CAN1_MB23_DATA1, val)
-#define bfin_read_CAN1_MB23_DATA2()             bfin_read16(CAN1_MB23_DATA2)
-#define bfin_write_CAN1_MB23_DATA2(val)         bfin_write16(CAN1_MB23_DATA2, val)
-#define bfin_read_CAN1_MB23_DATA3()             bfin_read16(CAN1_MB23_DATA3)
-#define bfin_write_CAN1_MB23_DATA3(val)         bfin_write16(CAN1_MB23_DATA3, val)
-#define bfin_read_CAN1_MB23_LENGTH()            bfin_read16(CAN1_MB23_LENGTH)
-#define bfin_write_CAN1_MB23_LENGTH(val)        bfin_write16(CAN1_MB23_LENGTH, val)
-#define bfin_read_CAN1_MB23_TIMESTAMP()         bfin_read16(CAN1_MB23_TIMESTAMP)
-#define bfin_write_CAN1_MB23_TIMESTAMP(val)     bfin_write16(CAN1_MB23_TIMESTAMP, val)
-#define bfin_read_CAN1_MB23_ID0()               bfin_read16(CAN1_MB23_ID0)
-#define bfin_write_CAN1_MB23_ID0(val)           bfin_write16(CAN1_MB23_ID0, val)
-#define bfin_read_CAN1_MB23_ID1()               bfin_read16(CAN1_MB23_ID1)
-#define bfin_write_CAN1_MB23_ID1(val)           bfin_write16(CAN1_MB23_ID1, val)
-#define bfin_read_CAN1_MB24_DATA0()             bfin_read16(CAN1_MB24_DATA0)
-#define bfin_write_CAN1_MB24_DATA0(val)         bfin_write16(CAN1_MB24_DATA0, val)
-#define bfin_read_CAN1_MB24_DATA1()             bfin_read16(CAN1_MB24_DATA1)
-#define bfin_write_CAN1_MB24_DATA1(val)         bfin_write16(CAN1_MB24_DATA1, val)
-#define bfin_read_CAN1_MB24_DATA2()             bfin_read16(CAN1_MB24_DATA2)
-#define bfin_write_CAN1_MB24_DATA2(val)         bfin_write16(CAN1_MB24_DATA2, val)
-#define bfin_read_CAN1_MB24_DATA3()             bfin_read16(CAN1_MB24_DATA3)
-#define bfin_write_CAN1_MB24_DATA3(val)         bfin_write16(CAN1_MB24_DATA3, val)
-#define bfin_read_CAN1_MB24_LENGTH()            bfin_read16(CAN1_MB24_LENGTH)
-#define bfin_write_CAN1_MB24_LENGTH(val)        bfin_write16(CAN1_MB24_LENGTH, val)
-#define bfin_read_CAN1_MB24_TIMESTAMP()         bfin_read16(CAN1_MB24_TIMESTAMP)
-#define bfin_write_CAN1_MB24_TIMESTAMP(val)     bfin_write16(CAN1_MB24_TIMESTAMP, val)
-#define bfin_read_CAN1_MB24_ID0()               bfin_read16(CAN1_MB24_ID0)
-#define bfin_write_CAN1_MB24_ID0(val)           bfin_write16(CAN1_MB24_ID0, val)
-#define bfin_read_CAN1_MB24_ID1()               bfin_read16(CAN1_MB24_ID1)
-#define bfin_write_CAN1_MB24_ID1(val)           bfin_write16(CAN1_MB24_ID1, val)
-#define bfin_read_CAN1_MB25_DATA0()             bfin_read16(CAN1_MB25_DATA0)
-#define bfin_write_CAN1_MB25_DATA0(val)         bfin_write16(CAN1_MB25_DATA0, val)
-#define bfin_read_CAN1_MB25_DATA1()             bfin_read16(CAN1_MB25_DATA1)
-#define bfin_write_CAN1_MB25_DATA1(val)         bfin_write16(CAN1_MB25_DATA1, val)
-#define bfin_read_CAN1_MB25_DATA2()             bfin_read16(CAN1_MB25_DATA2)
-#define bfin_write_CAN1_MB25_DATA2(val)         bfin_write16(CAN1_MB25_DATA2, val)
-#define bfin_read_CAN1_MB25_DATA3()             bfin_read16(CAN1_MB25_DATA3)
-#define bfin_write_CAN1_MB25_DATA3(val)         bfin_write16(CAN1_MB25_DATA3, val)
-#define bfin_read_CAN1_MB25_LENGTH()            bfin_read16(CAN1_MB25_LENGTH)
-#define bfin_write_CAN1_MB25_LENGTH(val)        bfin_write16(CAN1_MB25_LENGTH, val)
-#define bfin_read_CAN1_MB25_TIMESTAMP()         bfin_read16(CAN1_MB25_TIMESTAMP)
-#define bfin_write_CAN1_MB25_TIMESTAMP(val)     bfin_write16(CAN1_MB25_TIMESTAMP, val)
-#define bfin_read_CAN1_MB25_ID0()               bfin_read16(CAN1_MB25_ID0)
-#define bfin_write_CAN1_MB25_ID0(val)           bfin_write16(CAN1_MB25_ID0, val)
-#define bfin_read_CAN1_MB25_ID1()               bfin_read16(CAN1_MB25_ID1)
-#define bfin_write_CAN1_MB25_ID1(val)           bfin_write16(CAN1_MB25_ID1, val)
-#define bfin_read_CAN1_MB26_DATA0()             bfin_read16(CAN1_MB26_DATA0)
-#define bfin_write_CAN1_MB26_DATA0(val)         bfin_write16(CAN1_MB26_DATA0, val)
-#define bfin_read_CAN1_MB26_DATA1()             bfin_read16(CAN1_MB26_DATA1)
-#define bfin_write_CAN1_MB26_DATA1(val)         bfin_write16(CAN1_MB26_DATA1, val)
-#define bfin_read_CAN1_MB26_DATA2()             bfin_read16(CAN1_MB26_DATA2)
-#define bfin_write_CAN1_MB26_DATA2(val)         bfin_write16(CAN1_MB26_DATA2, val)
-#define bfin_read_CAN1_MB26_DATA3()             bfin_read16(CAN1_MB26_DATA3)
-#define bfin_write_CAN1_MB26_DATA3(val)         bfin_write16(CAN1_MB26_DATA3, val)
-#define bfin_read_CAN1_MB26_LENGTH()            bfin_read16(CAN1_MB26_LENGTH)
-#define bfin_write_CAN1_MB26_LENGTH(val)        bfin_write16(CAN1_MB26_LENGTH, val)
-#define bfin_read_CAN1_MB26_TIMESTAMP()         bfin_read16(CAN1_MB26_TIMESTAMP)
-#define bfin_write_CAN1_MB26_TIMESTAMP(val)     bfin_write16(CAN1_MB26_TIMESTAMP, val)
-#define bfin_read_CAN1_MB26_ID0()               bfin_read16(CAN1_MB26_ID0)
-#define bfin_write_CAN1_MB26_ID0(val)           bfin_write16(CAN1_MB26_ID0, val)
-#define bfin_read_CAN1_MB26_ID1()               bfin_read16(CAN1_MB26_ID1)
-#define bfin_write_CAN1_MB26_ID1(val)           bfin_write16(CAN1_MB26_ID1, val)
-#define bfin_read_CAN1_MB27_DATA0()             bfin_read16(CAN1_MB27_DATA0)
-#define bfin_write_CAN1_MB27_DATA0(val)         bfin_write16(CAN1_MB27_DATA0, val)
-#define bfin_read_CAN1_MB27_DATA1()             bfin_read16(CAN1_MB27_DATA1)
-#define bfin_write_CAN1_MB27_DATA1(val)         bfin_write16(CAN1_MB27_DATA1, val)
-#define bfin_read_CAN1_MB27_DATA2()             bfin_read16(CAN1_MB27_DATA2)
-#define bfin_write_CAN1_MB27_DATA2(val)         bfin_write16(CAN1_MB27_DATA2, val)
-#define bfin_read_CAN1_MB27_DATA3()             bfin_read16(CAN1_MB27_DATA3)
-#define bfin_write_CAN1_MB27_DATA3(val)         bfin_write16(CAN1_MB27_DATA3, val)
-#define bfin_read_CAN1_MB27_LENGTH()            bfin_read16(CAN1_MB27_LENGTH)
-#define bfin_write_CAN1_MB27_LENGTH(val)        bfin_write16(CAN1_MB27_LENGTH, val)
-#define bfin_read_CAN1_MB27_TIMESTAMP()         bfin_read16(CAN1_MB27_TIMESTAMP)
-#define bfin_write_CAN1_MB27_TIMESTAMP(val)     bfin_write16(CAN1_MB27_TIMESTAMP, val)
-#define bfin_read_CAN1_MB27_ID0()               bfin_read16(CAN1_MB27_ID0)
-#define bfin_write_CAN1_MB27_ID0(val)           bfin_write16(CAN1_MB27_ID0, val)
-#define bfin_read_CAN1_MB27_ID1()               bfin_read16(CAN1_MB27_ID1)
-#define bfin_write_CAN1_MB27_ID1(val)           bfin_write16(CAN1_MB27_ID1, val)
-#define bfin_read_CAN1_MB28_DATA0()             bfin_read16(CAN1_MB28_DATA0)
-#define bfin_write_CAN1_MB28_DATA0(val)         bfin_write16(CAN1_MB28_DATA0, val)
-#define bfin_read_CAN1_MB28_DATA1()             bfin_read16(CAN1_MB28_DATA1)
-#define bfin_write_CAN1_MB28_DATA1(val)         bfin_write16(CAN1_MB28_DATA1, val)
-#define bfin_read_CAN1_MB28_DATA2()             bfin_read16(CAN1_MB28_DATA2)
-#define bfin_write_CAN1_MB28_DATA2(val)         bfin_write16(CAN1_MB28_DATA2, val)
-#define bfin_read_CAN1_MB28_DATA3()             bfin_read16(CAN1_MB28_DATA3)
-#define bfin_write_CAN1_MB28_DATA3(val)         bfin_write16(CAN1_MB28_DATA3, val)
-#define bfin_read_CAN1_MB28_LENGTH()            bfin_read16(CAN1_MB28_LENGTH)
-#define bfin_write_CAN1_MB28_LENGTH(val)        bfin_write16(CAN1_MB28_LENGTH, val)
-#define bfin_read_CAN1_MB28_TIMESTAMP()         bfin_read16(CAN1_MB28_TIMESTAMP)
-#define bfin_write_CAN1_MB28_TIMESTAMP(val)     bfin_write16(CAN1_MB28_TIMESTAMP, val)
-#define bfin_read_CAN1_MB28_ID0()               bfin_read16(CAN1_MB28_ID0)
-#define bfin_write_CAN1_MB28_ID0(val)           bfin_write16(CAN1_MB28_ID0, val)
-#define bfin_read_CAN1_MB28_ID1()               bfin_read16(CAN1_MB28_ID1)
-#define bfin_write_CAN1_MB28_ID1(val)           bfin_write16(CAN1_MB28_ID1, val)
-#define bfin_read_CAN1_MB29_DATA0()             bfin_read16(CAN1_MB29_DATA0)
-#define bfin_write_CAN1_MB29_DATA0(val)         bfin_write16(CAN1_MB29_DATA0, val)
-#define bfin_read_CAN1_MB29_DATA1()             bfin_read16(CAN1_MB29_DATA1)
-#define bfin_write_CAN1_MB29_DATA1(val)         bfin_write16(CAN1_MB29_DATA1, val)
-#define bfin_read_CAN1_MB29_DATA2()             bfin_read16(CAN1_MB29_DATA2)
-#define bfin_write_CAN1_MB29_DATA2(val)         bfin_write16(CAN1_MB29_DATA2, val)
-#define bfin_read_CAN1_MB29_DATA3()             bfin_read16(CAN1_MB29_DATA3)
-#define bfin_write_CAN1_MB29_DATA3(val)         bfin_write16(CAN1_MB29_DATA3, val)
-#define bfin_read_CAN1_MB29_LENGTH()            bfin_read16(CAN1_MB29_LENGTH)
-#define bfin_write_CAN1_MB29_LENGTH(val)        bfin_write16(CAN1_MB29_LENGTH, val)
-#define bfin_read_CAN1_MB29_TIMESTAMP()         bfin_read16(CAN1_MB29_TIMESTAMP)
-#define bfin_write_CAN1_MB29_TIMESTAMP(val)     bfin_write16(CAN1_MB29_TIMESTAMP, val)
-#define bfin_read_CAN1_MB29_ID0()               bfin_read16(CAN1_MB29_ID0)
-#define bfin_write_CAN1_MB29_ID0(val)           bfin_write16(CAN1_MB29_ID0, val)
-#define bfin_read_CAN1_MB29_ID1()               bfin_read16(CAN1_MB29_ID1)
-#define bfin_write_CAN1_MB29_ID1(val)           bfin_write16(CAN1_MB29_ID1, val)
-#define bfin_read_CAN1_MB30_DATA0()             bfin_read16(CAN1_MB30_DATA0)
-#define bfin_write_CAN1_MB30_DATA0(val)         bfin_write16(CAN1_MB30_DATA0, val)
-#define bfin_read_CAN1_MB30_DATA1()             bfin_read16(CAN1_MB30_DATA1)
-#define bfin_write_CAN1_MB30_DATA1(val)         bfin_write16(CAN1_MB30_DATA1, val)
-#define bfin_read_CAN1_MB30_DATA2()             bfin_read16(CAN1_MB30_DATA2)
-#define bfin_write_CAN1_MB30_DATA2(val)         bfin_write16(CAN1_MB30_DATA2, val)
-#define bfin_read_CAN1_MB30_DATA3()             bfin_read16(CAN1_MB30_DATA3)
-#define bfin_write_CAN1_MB30_DATA3(val)         bfin_write16(CAN1_MB30_DATA3, val)
-#define bfin_read_CAN1_MB30_LENGTH()            bfin_read16(CAN1_MB30_LENGTH)
-#define bfin_write_CAN1_MB30_LENGTH(val)        bfin_write16(CAN1_MB30_LENGTH, val)
-#define bfin_read_CAN1_MB30_TIMESTAMP()         bfin_read16(CAN1_MB30_TIMESTAMP)
-#define bfin_write_CAN1_MB30_TIMESTAMP(val)     bfin_write16(CAN1_MB30_TIMESTAMP, val)
-#define bfin_read_CAN1_MB30_ID0()               bfin_read16(CAN1_MB30_ID0)
-#define bfin_write_CAN1_MB30_ID0(val)           bfin_write16(CAN1_MB30_ID0, val)
-#define bfin_read_CAN1_MB30_ID1()               bfin_read16(CAN1_MB30_ID1)
-#define bfin_write_CAN1_MB30_ID1(val)           bfin_write16(CAN1_MB30_ID1, val)
-#define bfin_read_CAN1_MB31_DATA0()             bfin_read16(CAN1_MB31_DATA0)
-#define bfin_write_CAN1_MB31_DATA0(val)         bfin_write16(CAN1_MB31_DATA0, val)
-#define bfin_read_CAN1_MB31_DATA1()             bfin_read16(CAN1_MB31_DATA1)
-#define bfin_write_CAN1_MB31_DATA1(val)         bfin_write16(CAN1_MB31_DATA1, val)
-#define bfin_read_CAN1_MB31_DATA2()             bfin_read16(CAN1_MB31_DATA2)
-#define bfin_write_CAN1_MB31_DATA2(val)         bfin_write16(CAN1_MB31_DATA2, val)
-#define bfin_read_CAN1_MB31_DATA3()             bfin_read16(CAN1_MB31_DATA3)
-#define bfin_write_CAN1_MB31_DATA3(val)         bfin_write16(CAN1_MB31_DATA3, val)
-#define bfin_read_CAN1_MB31_LENGTH()            bfin_read16(CAN1_MB31_LENGTH)
-#define bfin_write_CAN1_MB31_LENGTH(val)        bfin_write16(CAN1_MB31_LENGTH, val)
-#define bfin_read_CAN1_MB31_TIMESTAMP()         bfin_read16(CAN1_MB31_TIMESTAMP)
-#define bfin_write_CAN1_MB31_TIMESTAMP(val)     bfin_write16(CAN1_MB31_TIMESTAMP, val)
-#define bfin_read_CAN1_MB31_ID0()               bfin_read16(CAN1_MB31_ID0)
-#define bfin_write_CAN1_MB31_ID0(val)           bfin_write16(CAN1_MB31_ID0, val)
-#define bfin_read_CAN1_MB31_ID1()               bfin_read16(CAN1_MB31_ID1)
-#define bfin_write_CAN1_MB31_ID1(val)           bfin_write16(CAN1_MB31_ID1, val)
-/* ATAPI Registers */
-#define bfin_read_ATAPI_CONTROL()               bfin_read16(ATAPI_CONTROL)
-#define bfin_write_ATAPI_CONTROL(val)           bfin_write16(ATAPI_CONTROL, val)
-#define bfin_read_ATAPI_STATUS()                bfin_read16(ATAPI_STATUS)
-#define bfin_write_ATAPI_STATUS(val)            bfin_write16(ATAPI_STATUS, val)
-#define bfin_read_ATAPI_DEV_ADDR()              bfin_read16(ATAPI_DEV_ADDR)
-#define bfin_write_ATAPI_DEV_ADDR(val)          bfin_write16(ATAPI_DEV_ADDR, val)
-#define bfin_read_ATAPI_DEV_TXBUF()             bfin_read16(ATAPI_DEV_TXBUF)
-#define bfin_write_ATAPI_DEV_TXBUF(val)         bfin_write16(ATAPI_DEV_TXBUF, val)
-#define bfin_read_ATAPI_DEV_RXBUF()             bfin_read16(ATAPI_DEV_RXBUF)
-#define bfin_write_ATAPI_DEV_RXBUF(val)         bfin_write16(ATAPI_DEV_RXBUF, val)
-#define bfin_read_ATAPI_INT_MASK()              bfin_read16(ATAPI_INT_MASK)
-#define bfin_write_ATAPI_INT_MASK(val)          bfin_write16(ATAPI_INT_MASK, val)
-#define bfin_read_ATAPI_INT_STATUS()            bfin_read16(ATAPI_INT_STATUS)
-#define bfin_write_ATAPI_INT_STATUS(val)        bfin_write16(ATAPI_INT_STATUS, val)
-#define bfin_read_ATAPI_XFER_LEN()              bfin_read16(ATAPI_XFER_LEN)
-#define bfin_write_ATAPI_XFER_LEN(val)          bfin_write16(ATAPI_XFER_LEN, val)
-#define bfin_read_ATAPI_LINE_STATUS()           bfin_read16(ATAPI_LINE_STATUS)
-#define bfin_write_ATAPI_LINE_STATUS(val)       bfin_write16(ATAPI_LINE_STATUS, val)
-#define bfin_read_ATAPI_SM_STATE()              bfin_read16(ATAPI_SM_STATE)
-#define bfin_write_ATAPI_SM_STATE(val)          bfin_write16(ATAPI_SM_STATE, val)
-#define bfin_read_ATAPI_TERMINATE()             bfin_read16(ATAPI_TERMINATE)
-#define bfin_write_ATAPI_TERMINATE(val)         bfin_write16(ATAPI_TERMINATE, val)
-#define bfin_read_ATAPI_PIO_TFRCNT()            bfin_read16(ATAPI_PIO_TFRCNT)
-#define bfin_write_ATAPI_PIO_TFRCNT(val)        bfin_write16(ATAPI_PIO_TFRCNT, val)
-#define bfin_read_ATAPI_DMA_TFRCNT()            bfin_read16(ATAPI_DMA_TFRCNT)
-#define bfin_write_ATAPI_DMA_TFRCNT(val)        bfin_write16(ATAPI_DMA_TFRCNT, val)
-#define bfin_read_ATAPI_UMAIN_TFRCNT()          bfin_read16(ATAPI_UMAIN_TFRCNT)
-#define bfin_write_ATAPI_UMAIN_TFRCNT(val)      bfin_write16(ATAPI_UMAIN_TFRCNT, val)
-#define bfin_read_ATAPI_UDMAOUT_TFRCNT()        bfin_read16(ATAPI_UDMAOUT_TFRCNT)
-#define bfin_write_ATAPI_UDMAOUT_TFRCNT(val)    bfin_write16(ATAPI_UDMAOUT_TFRCNT, val)
-#define bfin_read_ATAPI_REG_TIM_0()             bfin_read16(ATAPI_REG_TIM_0)
-#define bfin_write_ATAPI_REG_TIM_0(val)         bfin_write16(ATAPI_REG_TIM_0, val)
-#define bfin_read_ATAPI_PIO_TIM_0()             bfin_read16(ATAPI_PIO_TIM_0)
-#define bfin_write_ATAPI_PIO_TIM_0(val)         bfin_write16(ATAPI_PIO_TIM_0, val)
-#define bfin_read_ATAPI_PIO_TIM_1()             bfin_read16(ATAPI_PIO_TIM_1)
-#define bfin_write_ATAPI_PIO_TIM_1(val)         bfin_write16(ATAPI_PIO_TIM_1, val)
-#define bfin_read_ATAPI_MULTI_TIM_0()           bfin_read16(ATAPI_MULTI_TIM_0)
-#define bfin_write_ATAPI_MULTI_TIM_0(val)       bfin_write16(ATAPI_MULTI_TIM_0, val)
-#define bfin_read_ATAPI_MULTI_TIM_1()           bfin_read16(ATAPI_MULTI_TIM_1)
-#define bfin_write_ATAPI_MULTI_TIM_1(val)       bfin_write16(ATAPI_MULTI_TIM_1, val)
-#define bfin_read_ATAPI_MULTI_TIM_2()           bfin_read16(ATAPI_MULTI_TIM_2)
-#define bfin_write_ATAPI_MULTI_TIM_2(val)       bfin_write16(ATAPI_MULTI_TIM_2, val)
-#define bfin_read_ATAPI_ULTRA_TIM_0()           bfin_read16(ATAPI_ULTRA_TIM_0)
-#define bfin_write_ATAPI_ULTRA_TIM_0(val)       bfin_write16(ATAPI_ULTRA_TIM_0, val)
-#define bfin_read_ATAPI_ULTRA_TIM_1()           bfin_read16(ATAPI_ULTRA_TIM_1)
-#define bfin_write_ATAPI_ULTRA_TIM_1(val)       bfin_write16(ATAPI_ULTRA_TIM_1, val)
-#define bfin_read_ATAPI_ULTRA_TIM_2()           bfin_read16(ATAPI_ULTRA_TIM_2)
-#define bfin_write_ATAPI_ULTRA_TIM_2(val)       bfin_write16(ATAPI_ULTRA_TIM_2, val)
-#define bfin_read_ATAPI_ULTRA_TIM_3()           bfin_read16(ATAPI_ULTRA_TIM_3)
-#define bfin_write_ATAPI_ULTRA_TIM_3(val)       bfin_write16(ATAPI_ULTRA_TIM_3, val)
-/* SDH Registers */
-#define bfin_read_SDH_PWR_CTL()         bfin_read16(SDH_PWR_CTL)
-#define bfin_write_SDH_PWR_CTL(val)     bfin_write16(SDH_PWR_CTL, val)
-#define bfin_read_SDH_CLK_CTL()         bfin_read16(SDH_CLK_CTL)
-#define bfin_write_SDH_CLK_CTL(val)     bfin_write16(SDH_CLK_CTL, val)
-#define bfin_read_SDH_ARGUMENT()        bfin_read32(SDH_ARGUMENT)
-#define bfin_write_SDH_ARGUMENT(val)    bfin_write32(SDH_ARGUMENT, val)
-#define bfin_read_SDH_COMMAND()         bfin_read16(SDH_COMMAND)
-#define bfin_write_SDH_COMMAND(val)     bfin_write16(SDH_COMMAND, val)
-#define bfin_read_SDH_RESP_CMD()        bfin_read16(SDH_RESP_CMD)
-#define bfin_write_SDH_RESP_CMD(val)    bfin_write16(SDH_RESP_CMD, val)
-#define bfin_read_SDH_RESPONSE0()       bfin_read32(SDH_RESPONSE0)
-#define bfin_write_SDH_RESPONSE0(val)   bfin_write32(SDH_RESPONSE0, val)
-#define bfin_read_SDH_RESPONSE1()       bfin_read32(SDH_RESPONSE1)
-#define bfin_write_SDH_RESPONSE1(val)   bfin_write32(SDH_RESPONSE1, val)
-#define bfin_read_SDH_RESPONSE2()       bfin_read32(SDH_RESPONSE2)
-#define bfin_write_SDH_RESPONSE2(val)   bfin_write32(SDH_RESPONSE2, val)
-#define bfin_read_SDH_RESPONSE3()       bfin_read32(SDH_RESPONSE3)
-#define bfin_write_SDH_RESPONSE3(val)   bfin_write32(SDH_RESPONSE3, val)
-#define bfin_read_SDH_DATA_TIMER()      bfin_read32(SDH_DATA_TIMER)
-#define bfin_write_SDH_DATA_TIMER(val)  bfin_write32(SDH_DATA_TIMER, val)
-#define bfin_read_SDH_DATA_LGTH()       bfin_read16(SDH_DATA_LGTH)
-#define bfin_write_SDH_DATA_LGTH(val)   bfin_write16(SDH_DATA_LGTH, val)
-#define bfin_read_SDH_DATA_CTL()        bfin_read16(SDH_DATA_CTL)
-#define bfin_write_SDH_DATA_CTL(val)    bfin_write16(SDH_DATA_CTL, val)
-#define bfin_read_SDH_DATA_CNT()        bfin_read16(SDH_DATA_CNT)
-#define bfin_write_SDH_DATA_CNT(val)    bfin_write16(SDH_DATA_CNT, val)
-#define bfin_read_SDH_STATUS()          bfin_read32(SDH_STATUS)
-#define bfin_write_SDH_STATUS(val)      bfin_write32(SDH_STATUS, val)
-#define bfin_read_SDH_STATUS_CLR()      bfin_read16(SDH_STATUS_CLR)
-#define bfin_write_SDH_STATUS_CLR(val)  bfin_write16(SDH_STATUS_CLR, val)
-#define bfin_read_SDH_MASK0()           bfin_read32(SDH_MASK0)
-#define bfin_write_SDH_MASK0(val)       bfin_write32(SDH_MASK0, val)
-#define bfin_read_SDH_MASK1()           bfin_read32(SDH_MASK1)
-#define bfin_write_SDH_MASK1(val)       bfin_write32(SDH_MASK1, val)
-#define bfin_read_SDH_FIFO_CNT()        bfin_read16(SDH_FIFO_CNT)
-#define bfin_write_SDH_FIFO_CNT(val)    bfin_write16(SDH_FIFO_CNT, val)
-#define bfin_read_SDH_FIFO()            bfin_read32(SDH_FIFO)
-#define bfin_write_SDH_FIFO(val)        bfin_write32(SDH_FIFO, val)
-#define bfin_read_SDH_E_STATUS()        bfin_read16(SDH_E_STATUS)
-#define bfin_write_SDH_E_STATUS(val)    bfin_write16(SDH_E_STATUS, val)
-#define bfin_read_SDH_E_MASK()          bfin_read16(SDH_E_MASK)
-#define bfin_write_SDH_E_MASK(val)      bfin_write16(SDH_E_MASK, val)
-#define bfin_read_SDH_CFG()             bfin_read16(SDH_CFG)
-#define bfin_write_SDH_CFG(val)         bfin_write16(SDH_CFG, val)
-#define bfin_read_SDH_RD_WAIT_EN()      bfin_read16(SDH_RD_WAIT_EN)
-#define bfin_write_SDH_RD_WAIT_EN(val)  bfin_write16(SDH_RD_WAIT_EN, val)
-#define bfin_read_SDH_PID0()            bfin_read16(SDH_PID0)
-#define bfin_write_SDH_PID0(val)        bfin_write16(SDH_PID0, val)
-#define bfin_read_SDH_PID1()            bfin_read16(SDH_PID1)
-#define bfin_write_SDH_PID1(val)        bfin_write16(SDH_PID1, val)
-#define bfin_read_SDH_PID2()            bfin_read16(SDH_PID2)
-#define bfin_write_SDH_PID2(val)        bfin_write16(SDH_PID2, val)
-#define bfin_read_SDH_PID3()            bfin_read16(SDH_PID3)
-#define bfin_write_SDH_PID3(val)        bfin_write16(SDH_PID3, val)
-#define bfin_read_SDH_PID4()            bfin_read16(SDH_PID4)
-#define bfin_write_SDH_PID4(val)        bfin_write16(SDH_PID4, val)
-#define bfin_read_SDH_PID5()            bfin_read16(SDH_PID5)
-#define bfin_write_SDH_PID5(val)        bfin_write16(SDH_PID5, val)
-#define bfin_read_SDH_PID6()            bfin_read16(SDH_PID6)
-#define bfin_write_SDH_PID6(val)        bfin_write16(SDH_PID6, val)
-#define bfin_read_SDH_PID7()            bfin_read16(SDH_PID7)
-#define bfin_write_SDH_PID7(val)        bfin_write16(SDH_PID7, val)
-/* HOST Port Registers */
-#define bfin_read_HOST_CONTROL()        bfin_read16(HOST_CONTROL)
-#define bfin_write_HOST_CONTROL(val)    bfin_write16(HOST_CONTROL, val)
-#define bfin_read_HOST_STATUS()         bfin_read16(HOST_STATUS)
-#define bfin_write_HOST_STATUS(val)     bfin_write16(HOST_STATUS, val)
-#define bfin_read_HOST_TIMEOUT()        bfin_read16(HOST_TIMEOUT)
-#define bfin_write_HOST_TIMEOUT(val)    bfin_write16(HOST_TIMEOUT, val)
-/* USB Control Registers */
-#define bfin_read_USB_FADDR()           bfin_read16(USB_FADDR)
-#define bfin_write_USB_FADDR(val)       bfin_write16(USB_FADDR, val)
-#define bfin_read_USB_POWER()           bfin_read16(USB_POWER)
-#define bfin_write_USB_POWER(val)       bfin_write16(USB_POWER, val)
-#define bfin_read_USB_INTRTX()          bfin_read16(USB_INTRTX)
-#define bfin_write_USB_INTRTX(val)      bfin_write16(USB_INTRTX, val)
-#define bfin_read_USB_INTRRX()          bfin_read16(USB_INTRRX)
-#define bfin_write_USB_INTRRX(val)      bfin_write16(USB_INTRRX, val)
-#define bfin_read_USB_INTRTXE()         bfin_read16(USB_INTRTXE)
-#define bfin_write_USB_INTRTXE(val)     bfin_write16(USB_INTRTXE, val)
-#define bfin_read_USB_INTRRXE()         bfin_read16(USB_INTRRXE)
-#define bfin_write_USB_INTRRXE(val)     bfin_write16(USB_INTRRXE, val)
-#define bfin_read_USB_INTRUSB()         bfin_read16(USB_INTRUSB)
-#define bfin_write_USB_INTRUSB(val)     bfin_write16(USB_INTRUSB, val)
-#define bfin_read_USB_INTRUSBE()        bfin_read16(USB_INTRUSBE)
-#define bfin_write_USB_INTRUSBE(val)    bfin_write16(USB_INTRUSBE, val)
-#define bfin_read_USB_FRAME()           bfin_read16(USB_FRAME)
-#define bfin_write_USB_FRAME(val)       bfin_write16(USB_FRAME, val)
-#define bfin_read_USB_INDEX()           bfin_read16(USB_INDEX)
-#define bfin_write_USB_INDEX(val)       bfin_write16(USB_INDEX, val)
-#define bfin_read_USB_TESTMODE()        bfin_read16(USB_TESTMODE)
-#define bfin_write_USB_TESTMODE(val)    bfin_write16(USB_TESTMODE, val)
-#define bfin_read_USB_GLOBINTR()        bfin_read16(USB_GLOBINTR)
-#define bfin_write_USB_GLOBINTR(val)    bfin_write16(USB_GLOBINTR, val)
-#define bfin_read_USB_GLOBAL_CTL()      bfin_read16(USB_GLOBAL_CTL)
-#define bfin_write_USB_GLOBAL_CTL(val)  bfin_write16(USB_GLOBAL_CTL, val)
-/* USB Packet Control Registers */
-#define bfin_read_USB_TX_MAX_PACKET()           bfin_read16(USB_TX_MAX_PACKET)
-#define bfin_write_USB_TX_MAX_PACKET(val)       bfin_write16(USB_TX_MAX_PACKET, val)
-#define bfin_read_USB_CSR0()                    bfin_read16(USB_CSR0)
-#define bfin_write_USB_CSR0(val)                bfin_write16(USB_CSR0, val)
-#define bfin_read_USB_TXCSR()                   bfin_read16(USB_TXCSR)
-#define bfin_write_USB_TXCSR(val)               bfin_write16(USB_TXCSR, val)
-#define bfin_read_USB_RX_MAX_PACKET()           bfin_read16(USB_RX_MAX_PACKET)
-#define bfin_write_USB_RX_MAX_PACKET(val)       bfin_write16(USB_RX_MAX_PACKET, val)
-#define bfin_read_USB_RXCSR()                   bfin_read16(USB_RXCSR)
-#define bfin_write_USB_RXCSR(val)               bfin_write16(USB_RXCSR, val)
-#define bfin_read_USB_COUNT0()                  bfin_read16(USB_COUNT0)
-#define bfin_write_USB_COUNT0(val)              bfin_write16(USB_COUNT0, val)
-#define bfin_read_USB_RXCOUNT()                 bfin_read16(USB_RXCOUNT)
-#define bfin_write_USB_RXCOUNT(val)             bfin_write16(USB_RXCOUNT, val)
-#define bfin_read_USB_TXTYPE()                  bfin_read16(USB_TXTYPE)
-#define bfin_write_USB_TXTYPE(val)              bfin_write16(USB_TXTYPE, val)
-#define bfin_read_USB_NAKLIMIT0()               bfin_read16(USB_NAKLIMIT0)
-#define bfin_write_USB_NAKLIMIT0(val)           bfin_write16(USB_NAKLIMIT0, val)
-#define bfin_read_USB_TXINTERVAL()              bfin_read16(USB_TXINTERVAL)
-#define bfin_write_USB_TXINTERVAL(val)          bfin_write16(USB_TXINTERVAL, val)
-#define bfin_read_USB_RXTYPE()                  bfin_read16(USB_RXTYPE)
-#define bfin_write_USB_RXTYPE(val)              bfin_write16(USB_RXTYPE, val)
-#define bfin_read_USB_RXINTERVAL()              bfin_read16(USB_RXINTERVAL)
-#define bfin_write_USB_RXINTERVAL(val)          bfin_write16(USB_RXINTERVAL, val)
-#define bfin_read_USB_TXCOUNT()                 bfin_read16(USB_TXCOUNT)
-#define bfin_write_USB_TXCOUNT(val)             bfin_write16(USB_TXCOUNT, val)
-/* USB Endbfin_read_()oint FIFO Registers */
-#define bfin_read_USB_EP0_FIFO()                bfin_read16(USB_EP0_FIFO)
-#define bfin_write_USB_EP0_FIFO(val)            bfin_write16(USB_EP0_FIFO, val)
-#define bfin_read_USB_EP1_FIFO()                bfin_read16(USB_EP1_FIFO)
-#define bfin_write_USB_EP1_FIFO(val)            bfin_write16(USB_EP1_FIFO, val)
-#define bfin_read_USB_EP2_FIFO()                bfin_read16(USB_EP2_FIFO)
-#define bfin_write_USB_EP2_FIFO(val)            bfin_write16(USB_EP2_FIFO, val)
-#define bfin_read_USB_EP3_FIFO()                bfin_read16(USB_EP3_FIFO)
-#define bfin_write_USB_EP3_FIFO(val)            bfin_write16(USB_EP3_FIFO, val)
-#define bfin_read_USB_EP4_FIFO()                bfin_read16(USB_EP4_FIFO)
-#define bfin_write_USB_EP4_FIFO(val)            bfin_write16(USB_EP4_FIFO, val)
-#define bfin_read_USB_EP5_FIFO()                bfin_read16(USB_EP5_FIFO)
-#define bfin_write_USB_EP5_FIFO(val)            bfin_write16(USB_EP5_FIFO, val)
-#define bfin_read_USB_EP6_FIFO()                bfin_read16(USB_EP6_FIFO)
-#define bfin_write_USB_EP6_FIFO(val)            bfin_write16(USB_EP6_FIFO, val)
-#define bfin_read_USB_EP7_FIFO()                bfin_read16(USB_EP7_FIFO)
-#define bfin_write_USB_EP7_FIFO(val)            bfin_write16(USB_EP7_FIFO, val)
-/* USB OTG Control Registers */
-#define bfin_read_USB_OTG_DEV_CTL()             bfin_read16(USB_OTG_DEV_CTL)
-#define bfin_write_USB_OTG_DEV_CTL(val)         bfin_write16(USB_OTG_DEV_CTL, val)
-#define bfin_read_USB_OTG_VBUS_IRQ()            bfin_read16(USB_OTG_VBUS_IRQ)
-#define bfin_write_USB_OTG_VBUS_IRQ(val)        bfin_write16(USB_OTG_VBUS_IRQ, val)
-#define bfin_read_USB_OTG_VBUS_MASK()           bfin_read16(USB_OTG_VBUS_MASK)
-#define bfin_write_USB_OTG_VBUS_MASK(val)       bfin_write16(USB_OTG_VBUS_MASK, val)
-/* USB Phy Control Registers */
-#define bfin_read_USB_LINKINFO()                bfin_read16(USB_LINKINFO)
-#define bfin_write_USB_LINKINFO(val)            bfin_write16(USB_LINKINFO, val)
-#define bfin_read_USB_VPLEN()                   bfin_read16(USB_VPLEN)
-#define bfin_write_USB_VPLEN(val)               bfin_write16(USB_VPLEN, val)
-#define bfin_read_USB_HS_EOF1()                 bfin_read16(USB_HS_EOF1)
-#define bfin_write_USB_HS_EOF1(val)             bfin_write16(USB_HS_EOF1, val)
-#define bfin_read_USB_FS_EOF1()                 bfin_read16(USB_FS_EOF1)
-#define bfin_write_USB_FS_EOF1(val)             bfin_write16(USB_FS_EOF1, val)
-#define bfin_read_USB_LS_EOF1()                 bfin_read16(USB_LS_EOF1)
-#define bfin_write_USB_LS_EOF1(val)             bfin_write16(USB_LS_EOF1, val)
-/* (APHY_CNTRL is for ADI usage only) */
-#define bfin_read_USB_APHY_CNTRL()              bfin_read16(USB_APHY_CNTRL)
-#define bfin_write_USB_APHY_CNTRL(val)          bfin_write16(USB_APHY_CNTRL, val)
-/* (APHY_CALIB is for ADI usage only) */
-#define bfin_read_USB_APHY_CALIB()              bfin_read16(USB_APHY_CALIB)
-#define bfin_write_USB_APHY_CALIB(val)          bfin_write16(USB_APHY_CALIB, val)
-#define bfin_read_USB_APHY_CNTRL2()             bfin_read16(USB_APHY_CNTRL2)
-#define bfin_write_USB_APHY_CNTRL2(val)         bfin_write16(USB_APHY_CNTRL2, val)
-/* (PHY_TEST is for ADI usage only) */
-#define bfin_read_USB_PHY_TEST()                bfin_read16(USB_PHY_TEST)
-#define bfin_write_USB_PHY_TEST(val)            bfin_write16(USB_PHY_TEST, val)
-#define bfin_read_USB_PLLOSC_CTRL()             bfin_read16(USB_PLLOSC_CTRL)
-#define bfin_write_USB_PLLOSC_CTRL(val)         bfin_write16(USB_PLLOSC_CTRL, val)
-#define bfin_read_USB_SRP_CLKDIV()              bfin_read16(USB_SRP_CLKDIV)
-#define bfin_write_USB_SRP_CLKDIV(val)          bfin_write16(USB_SRP_CLKDIV, val)
-/* USB Endbfin_read_()oint 0 Control Registers */
-#define bfin_read_USB_EP_NI0_TXMAXP()           bfin_read16(USB_EP_NI0_TXMAXP)
-#define bfin_write_USB_EP_NI0_TXMAXP(val)       bfin_write16(USB_EP_NI0_TXMAXP, val)
-#define bfin_read_USB_EP_NI0_TXCSR()            bfin_read16(USB_EP_NI0_TXCSR)
-#define bfin_write_USB_EP_NI0_TXCSR(val)        bfin_write16(USB_EP_NI0_TXCSR, val)
-#define bfin_read_USB_EP_NI0_RXMAXP()           bfin_read16(USB_EP_NI0_RXMAXP)
-#define bfin_write_USB_EP_NI0_RXMAXP(val)       bfin_write16(USB_EP_NI0_RXMAXP, val)
-#define bfin_read_USB_EP_NI0_RXCSR()            bfin_read16(USB_EP_NI0_RXCSR)
-#define bfin_write_USB_EP_NI0_RXCSR(val)        bfin_write16(USB_EP_NI0_RXCSR, val)
-#define bfin_read_USB_EP_NI0_RXCOUNT()          bfin_read16(USB_EP_NI0_RXCOUNT)
-#define bfin_write_USB_EP_NI0_RXCOUNT(val)      bfin_write16(USB_EP_NI0_RXCOUNT, val)
-#define bfin_read_USB_EP_NI0_TXTYPE()           bfin_read16(USB_EP_NI0_TXTYPE)
-#define bfin_write_USB_EP_NI0_TXTYPE(val)       bfin_write16(USB_EP_NI0_TXTYPE, val)
-#define bfin_read_USB_EP_NI0_TXINTERVAL()       bfin_read16(USB_EP_NI0_TXINTERVAL)
-#define bfin_write_USB_EP_NI0_TXINTERVAL(val)   bfin_write16(USB_EP_NI0_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI0_RXTYPE()           bfin_read16(USB_EP_NI0_RXTYPE)
-#define bfin_write_USB_EP_NI0_RXTYPE(val)       bfin_write16(USB_EP_NI0_RXTYPE, val)
-#define bfin_read_USB_EP_NI0_RXINTERVAL()       bfin_read16(USB_EP_NI0_RXINTERVAL)
-#define bfin_write_USB_EP_NI0_RXINTERVAL(val)   bfin_write16(USB_EP_NI0_RXINTERVAL, val)
-/* USB Endbfin_read_()oint 1 Control Registers */
-#define bfin_read_USB_EP_NI0_TXCOUNT()          bfin_read16(USB_EP_NI0_TXCOUNT)
-#define bfin_write_USB_EP_NI0_TXCOUNT(val)      bfin_write16(USB_EP_NI0_TXCOUNT, val)
-#define bfin_read_USB_EP_NI1_TXMAXP()           bfin_read16(USB_EP_NI1_TXMAXP)
-#define bfin_write_USB_EP_NI1_TXMAXP(val)       bfin_write16(USB_EP_NI1_TXMAXP, val)
-#define bfin_read_USB_EP_NI1_TXCSR()            bfin_read16(USB_EP_NI1_TXCSR)
-#define bfin_write_USB_EP_NI1_TXCSR(val)        bfin_write16(USB_EP_NI1_TXCSR, val)
-#define bfin_read_USB_EP_NI1_RXMAXP()           bfin_read16(USB_EP_NI1_RXMAXP)
-#define bfin_write_USB_EP_NI1_RXMAXP(val)       bfin_write16(USB_EP_NI1_RXMAXP, val)
-#define bfin_read_USB_EP_NI1_RXCSR()            bfin_read16(USB_EP_NI1_RXCSR)
-#define bfin_write_USB_EP_NI1_RXCSR(val)        bfin_write16(USB_EP_NI1_RXCSR, val)
-#define bfin_read_USB_EP_NI1_RXCOUNT()          bfin_read16(USB_EP_NI1_RXCOUNT)
-#define bfin_write_USB_EP_NI1_RXCOUNT(val)      bfin_write16(USB_EP_NI1_RXCOUNT, val)
-#define bfin_read_USB_EP_NI1_TXTYPE()           bfin_read16(USB_EP_NI1_TXTYPE)
-#define bfin_write_USB_EP_NI1_TXTYPE(val)       bfin_write16(USB_EP_NI1_TXTYPE, val)
-#define bfin_read_USB_EP_NI1_TXINTERVAL()       bfin_read16(USB_EP_NI1_TXINTERVAL)
-#define bfin_write_USB_EP_NI1_TXINTERVAL(val)   bfin_write16(USB_EP_NI1_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI1_RXTYPE()           bfin_read16(USB_EP_NI1_RXTYPE)
-#define bfin_write_USB_EP_NI1_RXTYPE(val)       bfin_write16(USB_EP_NI1_RXTYPE, val)
-#define bfin_read_USB_EP_NI1_RXINTERVAL()       bfin_read16(USB_EP_NI1_RXINTERVAL)
-#define bfin_write_USB_EP_NI1_RXINTERVAL(val)   bfin_write16(USB_EP_NI1_RXINTERVAL, val)
-/* USB Endbfin_read_()oint 2 Control Registers */
-#define bfin_read_USB_EP_NI1_TXCOUNT()          bfin_read16(USB_EP_NI1_TXCOUNT)
-#define bfin_write_USB_EP_NI1_TXCOUNT(val)      bfin_write16(USB_EP_NI1_TXCOUNT, val)
-#define bfin_read_USB_EP_NI2_TXMAXP()           bfin_read16(USB_EP_NI2_TXMAXP)
-#define bfin_write_USB_EP_NI2_TXMAXP(val)       bfin_write16(USB_EP_NI2_TXMAXP, val)
-#define bfin_read_USB_EP_NI2_TXCSR()            bfin_read16(USB_EP_NI2_TXCSR)
-#define bfin_write_USB_EP_NI2_TXCSR(val)        bfin_write16(USB_EP_NI2_TXCSR, val)
-#define bfin_read_USB_EP_NI2_RXMAXP()           bfin_read16(USB_EP_NI2_RXMAXP)
-#define bfin_write_USB_EP_NI2_RXMAXP(val)       bfin_write16(USB_EP_NI2_RXMAXP, val)
-#define bfin_read_USB_EP_NI2_RXCSR()            bfin_read16(USB_EP_NI2_RXCSR)
-#define bfin_write_USB_EP_NI2_RXCSR(val)        bfin_write16(USB_EP_NI2_RXCSR, val)
-#define bfin_read_USB_EP_NI2_RXCOUNT()          bfin_read16(USB_EP_NI2_RXCOUNT)
-#define bfin_write_USB_EP_NI2_RXCOUNT(val)      bfin_write16(USB_EP_NI2_RXCOUNT, val)
-#define bfin_read_USB_EP_NI2_TXTYPE()           bfin_read16(USB_EP_NI2_TXTYPE)
-#define bfin_write_USB_EP_NI2_TXTYPE(val)       bfin_write16(USB_EP_NI2_TXTYPE, val)
-#define bfin_read_USB_EP_NI2_TXINTERVAL()       bfin_read16(USB_EP_NI2_TXINTERVAL)
-#define bfin_write_USB_EP_NI2_TXINTERVAL(val)   bfin_write16(USB_EP_NI2_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI2_RXTYPE()           bfin_read16(USB_EP_NI2_RXTYPE)
-#define bfin_write_USB_EP_NI2_RXTYPE(val)       bfin_write16(USB_EP_NI2_RXTYPE, val)
-#define bfin_read_USB_EP_NI2_RXINTERVAL()       bfin_read16(USB_EP_NI2_RXINTERVAL)
-#define bfin_write_USB_EP_NI2_RXINTERVAL(val)   bfin_write16(USB_EP_NI2_RXINTERVAL, val)
-/* USB Endbfin_read_()oint 3 Control Registers */
-#define bfin_read_USB_EP_NI2_TXCOUNT()          bfin_read16(USB_EP_NI2_TXCOUNT)
-#define bfin_write_USB_EP_NI2_TXCOUNT(val)      bfin_write16(USB_EP_NI2_TXCOUNT, val)
-#define bfin_read_USB_EP_NI3_TXMAXP()           bfin_read16(USB_EP_NI3_TXMAXP)
-#define bfin_write_USB_EP_NI3_TXMAXP(val)       bfin_write16(USB_EP_NI3_TXMAXP, val)
-#define bfin_read_USB_EP_NI3_TXCSR()            bfin_read16(USB_EP_NI3_TXCSR)
-#define bfin_write_USB_EP_NI3_TXCSR(val)        bfin_write16(USB_EP_NI3_TXCSR, val)
-#define bfin_read_USB_EP_NI3_RXMAXP()           bfin_read16(USB_EP_NI3_RXMAXP)
-#define bfin_write_USB_EP_NI3_RXMAXP(val)       bfin_write16(USB_EP_NI3_RXMAXP, val)
-#define bfin_read_USB_EP_NI3_RXCSR()            bfin_read16(USB_EP_NI3_RXCSR)
-#define bfin_write_USB_EP_NI3_RXCSR(val)        bfin_write16(USB_EP_NI3_RXCSR, val)
-#define bfin_read_USB_EP_NI3_RXCOUNT()          bfin_read16(USB_EP_NI3_RXCOUNT)
-#define bfin_write_USB_EP_NI3_RXCOUNT(val)      bfin_write16(USB_EP_NI3_RXCOUNT, val)
-#define bfin_read_USB_EP_NI3_TXTYPE()           bfin_read16(USB_EP_NI3_TXTYPE)
-#define bfin_write_USB_EP_NI3_TXTYPE(val)       bfin_write16(USB_EP_NI3_TXTYPE, val)
-#define bfin_read_USB_EP_NI3_TXINTERVAL()       bfin_read16(USB_EP_NI3_TXINTERVAL)
-#define bfin_write_USB_EP_NI3_TXINTERVAL(val)   bfin_write16(USB_EP_NI3_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI3_RXTYPE()           bfin_read16(USB_EP_NI3_RXTYPE)
-#define bfin_write_USB_EP_NI3_RXTYPE(val)       bfin_write16(USB_EP_NI3_RXTYPE, val)
-#define bfin_read_USB_EP_NI3_RXINTERVAL()       bfin_read16(USB_EP_NI3_RXINTERVAL)
-#define bfin_write_USB_EP_NI3_RXINTERVAL(val)   bfin_write16(USB_EP_NI3_RXINTERVAL, val)
-/* USB Endbfin_read_()oint 4 Control Registers */
-#define bfin_read_USB_EP_NI3_TXCOUNT()          bfin_read16(USB_EP_NI3_TXCOUNT)
-#define bfin_write_USB_EP_NI3_TXCOUNT(val)      bfin_write16(USB_EP_NI3_TXCOUNT, val)
-#define bfin_read_USB_EP_NI4_TXMAXP()           bfin_read16(USB_EP_NI4_TXMAXP)
-#define bfin_write_USB_EP_NI4_TXMAXP(val)       bfin_write16(USB_EP_NI4_TXMAXP, val)
-#define bfin_read_USB_EP_NI4_TXCSR()            bfin_read16(USB_EP_NI4_TXCSR)
-#define bfin_write_USB_EP_NI4_TXCSR(val)        bfin_write16(USB_EP_NI4_TXCSR, val)
-#define bfin_read_USB_EP_NI4_RXMAXP()           bfin_read16(USB_EP_NI4_RXMAXP)
-#define bfin_write_USB_EP_NI4_RXMAXP(val)       bfin_write16(USB_EP_NI4_RXMAXP, val)
-#define bfin_read_USB_EP_NI4_RXCSR()            bfin_read16(USB_EP_NI4_RXCSR)
-#define bfin_write_USB_EP_NI4_RXCSR(val)        bfin_write16(USB_EP_NI4_RXCSR, val)
-#define bfin_read_USB_EP_NI4_RXCOUNT()          bfin_read16(USB_EP_NI4_RXCOUNT)
-#define bfin_write_USB_EP_NI4_RXCOUNT(val)      bfin_write16(USB_EP_NI4_RXCOUNT, val)
-#define bfin_read_USB_EP_NI4_TXTYPE()           bfin_read16(USB_EP_NI4_TXTYPE)
-#define bfin_write_USB_EP_NI4_TXTYPE(val)       bfin_write16(USB_EP_NI4_TXTYPE, val)
-#define bfin_read_USB_EP_NI4_TXINTERVAL()       bfin_read16(USB_EP_NI4_TXINTERVAL)
-#define bfin_write_USB_EP_NI4_TXINTERVAL(val)   bfin_write16(USB_EP_NI4_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI4_RXTYPE()           bfin_read16(USB_EP_NI4_RXTYPE)
-#define bfin_write_USB_EP_NI4_RXTYPE(val)       bfin_write16(USB_EP_NI4_RXTYPE, val)
-#define bfin_read_USB_EP_NI4_RXINTERVAL()       bfin_read16(USB_EP_NI4_RXINTERVAL)
-#define bfin_write_USB_EP_NI4_RXINTERVAL(val)   bfin_write16(USB_EP_NI4_RXINTERVAL, val)
-/* USB Endbfin_read_()oint 5 Control Registers */
-#define bfin_read_USB_EP_NI4_TXCOUNT()          bfin_read16(USB_EP_NI4_TXCOUNT)
-#define bfin_write_USB_EP_NI4_TXCOUNT(val)      bfin_write16(USB_EP_NI4_TXCOUNT, val)
-#define bfin_read_USB_EP_NI5_TXMAXP()           bfin_read16(USB_EP_NI5_TXMAXP)
-#define bfin_write_USB_EP_NI5_TXMAXP(val)       bfin_write16(USB_EP_NI5_TXMAXP, val)
-#define bfin_read_USB_EP_NI5_TXCSR()            bfin_read16(USB_EP_NI5_TXCSR)
-#define bfin_write_USB_EP_NI5_TXCSR(val)        bfin_write16(USB_EP_NI5_TXCSR, val)
-#define bfin_read_USB_EP_NI5_RXMAXP()           bfin_read16(USB_EP_NI5_RXMAXP)
-#define bfin_write_USB_EP_NI5_RXMAXP(val)       bfin_write16(USB_EP_NI5_RXMAXP, val)
-#define bfin_read_USB_EP_NI5_RXCSR()            bfin_read16(USB_EP_NI5_RXCSR)
-#define bfin_write_USB_EP_NI5_RXCSR(val)        bfin_write16(USB_EP_NI5_RXCSR, val)
-#define bfin_read_USB_EP_NI5_RXCOUNT()          bfin_read16(USB_EP_NI5_RXCOUNT)
-#define bfin_write_USB_EP_NI5_RXCOUNT(val)      bfin_write16(USB_EP_NI5_RXCOUNT, val)
-#define bfin_read_USB_EP_NI5_TXTYPE()           bfin_read16(USB_EP_NI5_TXTYPE)
-#define bfin_write_USB_EP_NI5_TXTYPE(val)       bfin_write16(USB_EP_NI5_TXTYPE, val)
-#define bfin_read_USB_EP_NI5_TXINTERVAL()       bfin_read16(USB_EP_NI5_TXINTERVAL)
-#define bfin_write_USB_EP_NI5_TXINTERVAL(val)   bfin_write16(USB_EP_NI5_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI5_RXTYPE()           bfin_read16(USB_EP_NI5_RXTYPE)
-#define bfin_write_USB_EP_NI5_RXTYPE(val)       bfin_write16(USB_EP_NI5_RXTYPE, val)
-#define bfin_read_USB_EP_NI5_RXINTERVAL()       bfin_read16(USB_EP_NI5_RXINTERVAL)
-#define bfin_write_USB_EP_NI5_RXINTERVAL(val)   bfin_write16(USB_EP_NI5_RXINTERVAL, val)
-/* USB Endbfin_read_()oint 6 Control Registers */
-#define bfin_read_USB_EP_NI5_TXCOUNT()          bfin_read16(USB_EP_NI5_TXCOUNT)
-#define bfin_write_USB_EP_NI5_TXCOUNT(val)      bfin_write16(USB_EP_NI5_TXCOUNT, val)
-#define bfin_read_USB_EP_NI6_TXMAXP()           bfin_read16(USB_EP_NI6_TXMAXP)
-#define bfin_write_USB_EP_NI6_TXMAXP(val)       bfin_write16(USB_EP_NI6_TXMAXP, val)
-#define bfin_read_USB_EP_NI6_TXCSR()            bfin_read16(USB_EP_NI6_TXCSR)
-#define bfin_write_USB_EP_NI6_TXCSR(val)        bfin_write16(USB_EP_NI6_TXCSR, val)
-#define bfin_read_USB_EP_NI6_RXMAXP()           bfin_read16(USB_EP_NI6_RXMAXP)
-#define bfin_write_USB_EP_NI6_RXMAXP(val)       bfin_write16(USB_EP_NI6_RXMAXP, val)
-#define bfin_read_USB_EP_NI6_RXCSR()            bfin_read16(USB_EP_NI6_RXCSR)
-#define bfin_write_USB_EP_NI6_RXCSR(val)        bfin_write16(USB_EP_NI6_RXCSR, val)
-#define bfin_read_USB_EP_NI6_RXCOUNT()          bfin_read16(USB_EP_NI6_RXCOUNT)
-#define bfin_write_USB_EP_NI6_RXCOUNT(val)      bfin_write16(USB_EP_NI6_RXCOUNT, val)
-#define bfin_read_USB_EP_NI6_TXTYPE()           bfin_read16(USB_EP_NI6_TXTYPE)
-#define bfin_write_USB_EP_NI6_TXTYPE(val)       bfin_write16(USB_EP_NI6_TXTYPE, val)
-#define bfin_read_USB_EP_NI6_TXINTERVAL()       bfin_read16(USB_EP_NI6_TXINTERVAL)
-#define bfin_write_USB_EP_NI6_TXINTERVAL(val)   bfin_write16(USB_EP_NI6_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI6_RXTYPE()           bfin_read16(USB_EP_NI6_RXTYPE)
-#define bfin_write_USB_EP_NI6_RXTYPE(val)       bfin_write16(USB_EP_NI6_RXTYPE, val)
-#define bfin_read_USB_EP_NI6_RXINTERVAL()       bfin_read16(USB_EP_NI6_RXINTERVAL)
-#define bfin_write_USB_EP_NI6_RXINTERVAL(val)   bfin_write16(USB_EP_NI6_RXINTERVAL, val)
-/* USB Endbfin_read_()oint 7 Control Registers */
-#define bfin_read_USB_EP_NI6_TXCOUNT()          bfin_read16(USB_EP_NI6_TXCOUNT)
-#define bfin_write_USB_EP_NI6_TXCOUNT(val)      bfin_write16(USB_EP_NI6_TXCOUNT, val)
-#define bfin_read_USB_EP_NI7_TXMAXP()           bfin_read16(USB_EP_NI7_TXMAXP)
-#define bfin_write_USB_EP_NI7_TXMAXP(val)       bfin_write16(USB_EP_NI7_TXMAXP, val)
-#define bfin_read_USB_EP_NI7_TXCSR()            bfin_read16(USB_EP_NI7_TXCSR)
-#define bfin_write_USB_EP_NI7_TXCSR(val)        bfin_write16(USB_EP_NI7_TXCSR, val)
-#define bfin_read_USB_EP_NI7_RXMAXP()           bfin_read16(USB_EP_NI7_RXMAXP)
-#define bfin_write_USB_EP_NI7_RXMAXP(val)       bfin_write16(USB_EP_NI7_RXMAXP, val)
-#define bfin_read_USB_EP_NI7_RXCSR()            bfin_read16(USB_EP_NI7_RXCSR)
-#define bfin_write_USB_EP_NI7_RXCSR(val)        bfin_write16(USB_EP_NI7_RXCSR, val)
-#define bfin_read_USB_EP_NI7_RXCOUNT()          bfin_read16(USB_EP_NI7_RXCOUNT)
-#define bfin_write_USB_EP_NI7_RXCOUNT(val)      bfin_write16(USB_EP_NI7_RXCOUNT, val)
-#define bfin_read_USB_EP_NI7_TXTYPE()           bfin_read16(USB_EP_NI7_TXTYPE)
-#define bfin_write_USB_EP_NI7_TXTYPE(val)       bfin_write16(USB_EP_NI7_TXTYPE, val)
-#define bfin_read_USB_EP_NI7_TXINTERVAL()       bfin_read16(USB_EP_NI7_TXINTERVAL)
-#define bfin_write_USB_EP_NI7_TXINTERVAL(val)   bfin_write16(USB_EP_NI7_TXINTERVAL, val)
-#define bfin_read_USB_EP_NI7_RXTYPE()           bfin_read16(USB_EP_NI7_RXTYPE)
-#define bfin_write_USB_EP_NI7_RXTYPE(val)       bfin_write16(USB_EP_NI7_RXTYPE, val)
-#define bfin_read_USB_EP_NI7_RXINTERVAL()       bfin_read16(USB_EP_NI7_RXINTERVAL)
-#define bfin_write_USB_EP_NI7_RXINTERVAL(val)   bfin_write16(USB_EP_NI7_RXINTERVAL, val)
-#define bfin_read_USB_EP_NI7_TXCOUNT()          bfin_read16(USB_EP_NI7_TXCOUNT)
-#define bfin_write_USB_EP_NI7_TXCOUNT(val)      bfin_write16(USB_EP_NI7_TXCOUNT, val)
-#define bfin_read_USB_DMA_INTERRUPT()           bfin_read16(USB_DMA_INTERRUPT)
-#define bfin_write_USB_DMA_INTERRUPT(val)       bfin_write16(USB_DMA_INTERRUPT, val)
-/* USB Channel 0 Config Registers */
-#define bfin_read_USB_DMA0CONTROL()             bfin_read16(USB_DMA0CONTROL)
-#define bfin_write_USB_DMA0CONTROL(val)         bfin_write16(USB_DMA0CONTROL, val)
-#define bfin_read_USB_DMA0ADDRLOW()             bfin_read16(USB_DMA0ADDRLOW)
-#define bfin_write_USB_DMA0ADDRLOW(val)         bfin_write16(USB_DMA0ADDRLOW, val)
-#define bfin_read_USB_DMA0ADDRHIGH()            bfin_read16(USB_DMA0ADDRHIGH)
-#define bfin_write_USB_DMA0ADDRHIGH(val)        bfin_write16(USB_DMA0ADDRHIGH, val)
-#define bfin_read_USB_DMA0COUNTLOW()            bfin_read16(USB_DMA0COUNTLOW)
-#define bfin_write_USB_DMA0COUNTLOW(val)        bfin_write16(USB_DMA0COUNTLOW, val)
-#define bfin_read_USB_DMA0COUNTHIGH()           bfin_read16(USB_DMA0COUNTHIGH)
-#define bfin_write_USB_DMA0COUNTHIGH(val)       bfin_write16(USB_DMA0COUNTHIGH, val)
-/* USB Channel 1 Config Registers */
-#define bfin_read_USB_DMA1CONTROL()             bfin_read16(USB_DMA1CONTROL)
-#define bfin_write_USB_DMA1CONTROL(val)         bfin_write16(USB_DMA1CONTROL, val)
-#define bfin_read_USB_DMA1ADDRLOW()             bfin_read16(USB_DMA1ADDRLOW)
-#define bfin_write_USB_DMA1ADDRLOW(val)         bfin_write16(USB_DMA1ADDRLOW, val)
-#define bfin_read_USB_DMA1ADDRHIGH()            bfin_read16(USB_DMA1ADDRHIGH)
-#define bfin_write_USB_DMA1ADDRHIGH(val)        bfin_write16(USB_DMA1ADDRHIGH, val)
-#define bfin_read_USB_DMA1COUNTLOW()            bfin_read16(USB_DMA1COUNTLOW)
-#define bfin_write_USB_DMA1COUNTLOW(val)        bfin_write16(USB_DMA1COUNTLOW, val)
-#define bfin_read_USB_DMA1COUNTHIGH()           bfin_read16(USB_DMA1COUNTHIGH)
-#define bfin_write_USB_DMA1COUNTHIGH(val)       bfin_write16(USB_DMA1COUNTHIGH, val)
-/* USB Channel 2 Config Registers */
-#define bfin_read_USB_DMA2CONTROL()             bfin_read16(USB_DMA2CONTROL)
-#define bfin_write_USB_DMA2CONTROL(val)         bfin_write16(USB_DMA2CONTROL, val)
-#define bfin_read_USB_DMA2ADDRLOW()             bfin_read16(USB_DMA2ADDRLOW)
-#define bfin_write_USB_DMA2ADDRLOW(val)         bfin_write16(USB_DMA2ADDRLOW, val)
-#define bfin_read_USB_DMA2ADDRHIGH()            bfin_read16(USB_DMA2ADDRHIGH)
-#define bfin_write_USB_DMA2ADDRHIGH(val)        bfin_write16(USB_DMA2ADDRHIGH, val)
-#define bfin_read_USB_DMA2COUNTLOW()            bfin_read16(USB_DMA2COUNTLOW)
-#define bfin_write_USB_DMA2COUNTLOW(val)        bfin_write16(USB_DMA2COUNTLOW, val)
-#define bfin_read_USB_DMA2COUNTHIGH()           bfin_read16(USB_DMA2COUNTHIGH)
-#define bfin_write_USB_DMA2COUNTHIGH(val)       bfin_write16(USB_DMA2COUNTHIGH, val)
-/* USB Channel 3 Config Registers */
-#define bfin_read_USB_DMA3CONTROL()             bfin_read16(USB_DMA3CONTROL)
-#define bfin_write_USB_DMA3CONTROL(val)         bfin_write16(USB_DMA3CONTROL, val)
-#define bfin_read_USB_DMA3ADDRLOW()             bfin_read16(USB_DMA3ADDRLOW)
-#define bfin_write_USB_DMA3ADDRLOW(val)         bfin_write16(USB_DMA3ADDRLOW, val)
-#define bfin_read_USB_DMA3ADDRHIGH()            bfin_read16(USB_DMA3ADDRHIGH)
-#define bfin_write_USB_DMA3ADDRHIGH(val)        bfin_write16(USB_DMA3ADDRHIGH, val)
-#define bfin_read_USB_DMA3COUNTLOW()            bfin_read16(USB_DMA3COUNTLOW)
-#define bfin_write_USB_DMA3COUNTLOW(val)        bfin_write16(USB_DMA3COUNTLOW, val)
-#define bfin_read_USB_DMA3COUNTHIGH()           bfin_read16(USB_DMA3COUNTHIGH)
-#define bfin_write_USB_DMA3COUNTHIGH(val)       bfin_write16(USB_DMA3COUNTHIGH, val)
-/* USB Channel 4 Config Registers */
-#define bfin_read_USB_DMA4CONTROL()             bfin_read16(USB_DMA4CONTROL)
-#define bfin_write_USB_DMA4CONTROL(val)         bfin_write16(USB_DMA4CONTROL, val)
-#define bfin_read_USB_DMA4ADDRLOW()             bfin_read16(USB_DMA4ADDRLOW)
-#define bfin_write_USB_DMA4ADDRLOW(val)         bfin_write16(USB_DMA4ADDRLOW, val)
-#define bfin_read_USB_DMA4ADDRHIGH()            bfin_read16(USB_DMA4ADDRHIGH)
-#define bfin_write_USB_DMA4ADDRHIGH(val)        bfin_write16(USB_DMA4ADDRHIGH, val)
-#define bfin_read_USB_DMA4COUNTLOW()            bfin_read16(USB_DMA4COUNTLOW)
-#define bfin_write_USB_DMA4COUNTLOW(val)        bfin_write16(USB_DMA4COUNTLOW, val)
-#define bfin_read_USB_DMA4COUNTHIGH()           bfin_read16(USB_DMA4COUNTHIGH)
-#define bfin_write_USB_DMA4COUNTHIGH(val)       bfin_write16(USB_DMA4COUNTHIGH, val)
-/* USB Channel 5 Config Registers */
-#define bfin_read_USB_DMA5CONTROL()             bfin_read16(USB_DMA5CONTROL)
-#define bfin_write_USB_DMA5CONTROL(val)         bfin_write16(USB_DMA5CONTROL, val)
-#define bfin_read_USB_DMA5ADDRLOW()             bfin_read16(USB_DMA5ADDRLOW)
-#define bfin_write_USB_DMA5ADDRLOW(val)         bfin_write16(USB_DMA5ADDRLOW, val)
-#define bfin_read_USB_DMA5ADDRHIGH()            bfin_read16(USB_DMA5ADDRHIGH)
-#define bfin_write_USB_DMA5ADDRHIGH(val)                bfin_write16(USB_DMA5ADDRHIGH, val)
-#define bfin_read_USB_DMA5COUNTLOW()            bfin_read16(USB_DMA5COUNTLOW)
-#define bfin_write_USB_DMA5COUNTLOW(val)        bfin_write16(USB_DMA5COUNTLOW, val)
-#define bfin_read_USB_DMA5COUNTHIGH()           bfin_read16(USB_DMA5COUNTHIGH)
-#define bfin_write_USB_DMA5COUNTHIGH(val)       bfin_write16(USB_DMA5COUNTHIGH, val)
-/* USB Channel 6 Config Registers */
-#define bfin_read_USB_DMA6CONTROL()             bfin_read16(USB_DMA6CONTROL)
-#define bfin_write_USB_DMA6CONTROL(val)         bfin_write16(USB_DMA6CONTROL, val)
-#define bfin_read_USB_DMA6ADDRLOW()             bfin_read16(USB_DMA6ADDRLOW)
-#define bfin_write_USB_DMA6ADDRLOW(val)         bfin_write16(USB_DMA6ADDRLOW, val)
-#define bfin_read_USB_DMA6ADDRHIGH()            bfin_read16(USB_DMA6ADDRHIGH)
-#define bfin_write_USB_DMA6ADDRHIGH(val)        bfin_write16(USB_DMA6ADDRHIGH, val)
-#define bfin_read_USB_DMA6COUNTLOW()            bfin_read16(USB_DMA6COUNTLOW)
-#define bfin_write_USB_DMA6COUNTLOW(val)        bfin_write16(USB_DMA6COUNTLOW, val)
-#define bfin_read_USB_DMA6COUNTHIGH()           bfin_read16(USB_DMA6COUNTHIGH)
-#define bfin_write_USB_DMA6COUNTHIGH(val)       bfin_write16(USB_DMA6COUNTHIGH, val)
-/* USB Channel 7 Config Registers */
-#define bfin_read_USB_DMA7CONTROL()             bfin_read16(USB_DMA7CONTROL)
-#define bfin_write_USB_DMA7CONTROL(val)         bfin_write16(USB_DMA7CONTROL, val)
-#define bfin_read_USB_DMA7ADDRLOW()             bfin_read16(USB_DMA7ADDRLOW)
-#define bfin_write_USB_DMA7ADDRLOW(val)         bfin_write16(USB_DMA7ADDRLOW, val)
-#define bfin_read_USB_DMA7ADDRHIGH()            bfin_read16(USB_DMA7ADDRHIGH)
-#define bfin_write_USB_DMA7ADDRHIGH(val)        bfin_write16(USB_DMA7ADDRHIGH, val)
-#define bfin_read_USB_DMA7COUNTLOW()            bfin_read16(USB_DMA7COUNTLOW)
-#define bfin_write_USB_DMA7COUNTLOW(val)        bfin_write16(USB_DMA7COUNTLOW, val)
-#define bfin_read_USB_DMA7COUNTHIGH()           bfin_read16(USB_DMA7COUNTHIGH)
-#define bfin_write_USB_DMA7COUNTHIGH(val)       bfin_write16(USB_DMA7COUNTHIGH, val)
-/* Keybfin_read_()ad Registers */
-#define bfin_read_KPAD_CTL()            bfin_read16(KPAD_CTL)
-#define bfin_write_KPAD_CTL(val)        bfin_write16(KPAD_CTL, val)
-#define bfin_read_KPAD_PRESCALE()       bfin_read16(KPAD_PRESCALE)
-#define bfin_write_KPAD_PRESCALE(val)   bfin_write16(KPAD_PRESCALE, val)
-#define bfin_read_KPAD_MSEL()           bfin_read16(KPAD_MSEL)
-#define bfin_write_KPAD_MSEL(val)       bfin_write16(KPAD_MSEL, val)
-#define bfin_read_KPAD_ROWCOL()         bfin_read16(KPAD_ROWCOL)
-#define bfin_write_KPAD_ROWCOL(val)     bfin_write16(KPAD_ROWCOL, val)
-#define bfin_read_KPAD_STAT()           bfin_read16(KPAD_STAT)
-#define bfin_write_KPAD_STAT(val)       bfin_write16(KPAD_STAT, val)
-#define bfin_read_KPAD_SOFTEVAL()       bfin_read16(KPAD_SOFTEVAL)
-#define bfin_write_KPAD_SOFTEVAL(val)   bfin_write16(KPAD_SOFTEVAL, val)
-/* Pixel Combfin_read_()ositor (PIXC) Registers */
-#define bfin_read_PIXC_CTL()            bfin_read16(PIXC_CTL)
-#define bfin_write_PIXC_CTL(val)        bfin_write16(PIXC_CTL, val)
-#define bfin_read_PIXC_PPL()            bfin_read16(PIXC_PPL)
-#define bfin_write_PIXC_PPL(val)        bfin_write16(PIXC_PPL, val)
-#define bfin_read_PIXC_LPF()            bfin_read16(PIXC_LPF)
-#define bfin_write_PIXC_LPF(val)        bfin_write16(PIXC_LPF, val)
-#define bfin_read_PIXC_AHSTART()        bfin_read16(PIXC_AHSTART)
-#define bfin_write_PIXC_AHSTART(val)    bfin_write16(PIXC_AHSTART, val)
-#define bfin_read_PIXC_AHEND()          bfin_read16(PIXC_AHEND)
-#define bfin_write_PIXC_AHEND(val)      bfin_write16(PIXC_AHEND, val)
-#define bfin_read_PIXC_AVSTART()        bfin_read16(PIXC_AVSTART)
-#define bfin_write_PIXC_AVSTART(val)    bfin_write16(PIXC_AVSTART, val)
-#define bfin_read_PIXC_AVEND()          bfin_read16(PIXC_AVEND)
-#define bfin_write_PIXC_AVEND(val)      bfin_write16(PIXC_AVEND, val)
-#define bfin_read_PIXC_ATRANSP()        bfin_read16(PIXC_ATRANSP)
-#define bfin_write_PIXC_ATRANSP(val)    bfin_write16(PIXC_ATRANSP, val)
-#define bfin_read_PIXC_BHSTART()        bfin_read16(PIXC_BHSTART)
-#define bfin_write_PIXC_BHSTART(val)    bfin_write16(PIXC_BHSTART, val)
-#define bfin_read_PIXC_BHEND()          bfin_read16(PIXC_BHEND)
-#define bfin_write_PIXC_BHEND(val)      bfin_write16(PIXC_BHEND, val)
-#define bfin_read_PIXC_BVSTART()        bfin_read16(PIXC_BVSTART)
-#define bfin_write_PIXC_BVSTART(val)    bfin_write16(PIXC_BVSTART, val)
-#define bfin_read_PIXC_BVEND()          bfin_read16(PIXC_BVEND)
-#define bfin_write_PIXC_BVEND(val)      bfin_write16(PIXC_BVEND, val)
-#define bfin_read_PIXC_BTRANSP()        bfin_read16(PIXC_BTRANSP)
-#define bfin_write_PIXC_BTRANSP(val)    bfin_write16(PIXC_BTRANSP, val)
-#define bfin_read_PIXC_INTRSTAT()       bfin_read16(PIXC_INTRSTAT)
-#define bfin_write_PIXC_INTRSTAT(val)   bfin_write16(PIXC_INTRSTAT, val)
-#define bfin_read_PIXC_RYCON()          bfin_read32(PIXC_RYCON)
-#define bfin_write_PIXC_RYCON(val)      bfin_write32(PIXC_RYCON, val)
-#define bfin_read_PIXC_GUCON()          bfin_read32(PIXC_GUCON)
-#define bfin_write_PIXC_GUCON(val)      bfin_write32(PIXC_GUCON, val)
-#define bfin_read_PIXC_BVCON()          bfin_read32(PIXC_BVCON)
-#define bfin_write_PIXC_BVCON(val)      bfin_write32(PIXC_BVCON, val)
-#define bfin_read_PIXC_CCBIAS()         bfin_read32(PIXC_CCBIAS)
-#define bfin_write_PIXC_CCBIAS(val)     bfin_write32(PIXC_CCBIAS, val)
-#define bfin_read_PIXC_TC()             bfin_read32(PIXC_TC)
-#define bfin_write_PIXC_TC(val)         bfin_write32(PIXC_TC, val)
-/* Handshake MDMA 0 Registers */
-#define bfin_read_HMDMA0_CONTROL()              bfin_read16(HMDMA0_CONTROL)
-#define bfin_write_HMDMA0_CONTROL(val)          bfin_write16(HMDMA0_CONTROL, val)
-#define bfin_read_HMDMA0_ECINIT()               bfin_read16(HMDMA0_ECINIT)
-#define bfin_write_HMDMA0_ECINIT(val)           bfin_write16(HMDMA0_ECINIT, val)
-#define bfin_read_HMDMA0_BCINIT()               bfin_read16(HMDMA0_BCINIT)
-#define bfin_write_HMDMA0_BCINIT(val)           bfin_write16(HMDMA0_BCINIT, val)
-#define bfin_read_HMDMA0_ECURGENT()             bfin_read16(HMDMA0_ECURGENT)
-#define bfin_write_HMDMA0_ECURGENT(val)         bfin_write16(HMDMA0_ECURGENT, val)
-#define bfin_read_HMDMA0_ECOVERFLOW()           bfin_read16(HMDMA0_ECOVERFLOW)
-#define bfin_write_HMDMA0_ECOVERFLOW(val)       bfin_write16(HMDMA0_ECOVERFLOW, val)
-#define bfin_read_HMDMA0_ECOUNT()               bfin_read16(HMDMA0_ECOUNT)
-#define bfin_write_HMDMA0_ECOUNT(val)           bfin_write16(HMDMA0_ECOUNT, val)
-#define bfin_read_HMDMA0_BCOUNT()               bfin_read16(HMDMA0_BCOUNT)
-#define bfin_write_HMDMA0_BCOUNT(val)           bfin_write16(HMDMA0_BCOUNT, val)
-/* Handshake MDMA 1 Registers */
-#define bfin_read_HMDMA1_CONTROL()              bfin_read16(HMDMA1_CONTROL)
-#define bfin_write_HMDMA1_CONTROL(val)          bfin_write16(HMDMA1_CONTROL, val)
-#define bfin_read_HMDMA1_ECINIT()               bfin_read16(HMDMA1_ECINIT)
-#define bfin_write_HMDMA1_ECINIT(val)           bfin_write16(HMDMA1_ECINIT, val)
-#define bfin_read_HMDMA1_BCINIT()               bfin_read16(HMDMA1_BCINIT)
-#define bfin_write_HMDMA1_BCINIT(val)           bfin_write16(HMDMA1_BCINIT, val)
-#define bfin_read_HMDMA1_ECURGENT()             bfin_read16(HMDMA1_ECURGENT)
-#define bfin_write_HMDMA1_ECURGENT(val)         bfin_write16(HMDMA1_ECURGENT, val)
-#define bfin_read_HMDMA1_ECOVERFLOW()           bfin_read16(HMDMA1_ECOVERFLOW)
-#define bfin_write_HMDMA1_ECOVERFLOW(val)       bfin_write16(HMDMA1_ECOVERFLOW, val)
-#define bfin_read_HMDMA1_ECOUNT()               bfin_read16(HMDMA1_ECOUNT)
-#define bfin_write_HMDMA1_ECOUNT(val)           bfin_write16(HMDMA1_ECOUNT, val)
-#define bfin_read_HMDMA1_BCOUNT()               bfin_read16(HMDMA1_BCOUNT)
-#define bfin_write_HMDMA1_BCOUNT(val)           bfin_write16(HMDMA1_BCOUNT, val)
 #endif /* _CDEF_BF549_H */
diff --git a/arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h b/arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h
index a2e9d9849eba..32f71e6a7c15 100644
--- a/arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h
+++ b/arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h
@@ -2615,17 +2615,6 @@
 #define bfin_read_CNT_MIN()             bfin_read32(CNT_MIN)
 #define bfin_write_CNT_MIN(val)         bfin_write32(CNT_MIN, val)
-/* OTP/FUSE Registers */
-#define bfin_read_OTP_CONTROL()         bfin_read16(OTP_CONTROL)
-#define bfin_write_OTP_CONTROL(val)     bfin_write16(OTP_CONTROL, val)
-#define bfin_read_OTP_BEN()             bfin_read16(OTP_BEN)
-#define bfin_write_OTP_BEN(val)         bfin_write16(OTP_BEN, val)
-#define bfin_read_OTP_STATUS()          bfin_read16(OTP_STATUS)
-#define bfin_write_OTP_STATUS(val)      bfin_write16(OTP_STATUS, val)
-#define bfin_read_OTP_TIMING()          bfin_read32(OTP_TIMING)
-#define bfin_write_OTP_TIMING(val)      bfin_write32(OTP_TIMING, val)
 /* Security Registers */
 #define bfin_read_SECURE_SYSSWT()       bfin_read32(SECURE_SYSSWT)
@@ -2640,17 +2629,6 @@
 #define bfin_read_DMAC1_PERIMUX()       bfin_read16(DMAC1_PERIMUX)
 #define bfin_write_DMAC1_PERIMUX(val)   bfin_write16(DMAC1_PERIMUX, val)
-/* OTP Read/Write Data Buffer Registers */
-#define bfin_read_OTP_DATA0()           bfin_read32(OTP_DATA0)
-#define bfin_write_OTP_DATA0(val)       bfin_write32(OTP_DATA0, val)
-#define bfin_read_OTP_DATA1()           bfin_read32(OTP_DATA1)
-#define bfin_write_OTP_DATA1(val)       bfin_write32(OTP_DATA1, val)
-#define bfin_read_OTP_DATA2()           bfin_read32(OTP_DATA2)
-#define bfin_write_OTP_DATA2(val)       bfin_write32(OTP_DATA2, val)
-#define bfin_read_OTP_DATA3()           bfin_read32(OTP_DATA3)
-#define bfin_write_OTP_DATA3(val)       bfin_write32(OTP_DATA3, val)
 /* Handshake MDMA is not defined in the shared file because it is not available on the ADSP-BF542 bfin_read_()rocessor */
 /* legacy definitions */
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF544.h b/arch/blackfin/mach-bf548/include/mach/defBF544.h
index 39f588dcd382..f916c52a148a 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF544.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF544.h
@@ -624,9 +624,9 @@
 #define                 DMA_READY  0x1        /* DMA Ready */
 #define                  FIFOFULL  0x2        /* FIFO Full */
 #define                 FIFOEMPTY  0x4        /* FIFO Empty */
-#define                  COMPLETE  0x8        /* DMA Complete */
+#define              DMA_COMPLETE  0x8        /* DMA Complete */
 #define                      HSHK  0x10       /* Host Handshake */
-#define                   TIMEOUT  0x20       /* Host Timeout */
+#define                 HSTIMEOUT  0x20       /* Host Timeout */
 #define                      HIRQ  0x40       /* Host Interrupt Request */
 #define                ALLOW_CNFG  0x80       /* Allow New Configuration */
 #define                   DMA_DIR  0x100      /* DMA Direction */
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF547.h b/arch/blackfin/mach-bf548/include/mach/defBF547.h
index c4dcf302d9f5..72c343646b2a 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF547.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF547.h
@@ -4,18 +4,18 @@
 * Licensed under the ADI BSD license or the GPL-2 (or later)
 */
-#ifndef _DEF_BF548_H
+#ifndef _DEF_BF547_H
-#define _DEF_BF548_H
+#define _DEF_BF547_H
 /* Include all Core registers and bit definitions */
 #include <asm/def_LPBlackfin.h>
-/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF548 */
+/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF547 */
 /* Include defBF54x_base.h for the set of #defines that are common to all ADSP-BF54x processors */
 #include "defBF54x_base.h"
-/* The following are the #defines needed by ADSP-BF548 that are not in the common header */
+/* The following are the #defines needed by ADSP-BF547 that are not in the common header */
 /* Timer Registers */
@@ -1217,4 +1217,4 @@
 /* ******************************************* */
-#endif /* _DEF_BF548_H */
+#endif /* _DEF_BF547_H */
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF548.h b/arch/blackfin/mach-bf548/include/mach/defBF548.h
index a5079980968c..3fb33b040ab7 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF548.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF548.h
@@ -15,115 +15,8 @@
 /* Include defBF54x_base.h for the set of #defines that are common to all ADSP-BF54x processors */
 #include "defBF54x_base.h"
-/* The following are the #defines needed by ADSP-BF548 that are not in the common header */
+/* The BF548 is like the BF547, but has additional CANs */
+#include "defBF547.h"
-/* Timer Registers */
-#define                    TIMER8_CONFIG  0xffc00600   /* Timer 8 Configuration Register */
-#define                   TIMER8_COUNTER  0xffc00604   /* Timer 8 Counter Register */
-#define                    TIMER8_PERIOD  0xffc00608   /* Timer 8 Period Register */
-#define                     TIMER8_WIDTH  0xffc0060c   /* Timer 8 Width Register */
-#define                    TIMER9_CONFIG  0xffc00610   /* Timer 9 Configuration Register */
-#define                   TIMER9_COUNTER  0xffc00614   /* Timer 9 Counter Register */
-#define                    TIMER9_PERIOD  0xffc00618   /* Timer 9 Period Register */
-#define                     TIMER9_WIDTH  0xffc0061c   /* Timer 9 Width Register */
-#define                   TIMER10_CONFIG  0xffc00620   /* Timer 10 Configuration Register */
-#define                  TIMER10_COUNTER  0xffc00624   /* Timer 10 Counter Register */
-#define                   TIMER10_PERIOD  0xffc00628   /* Timer 10 Period Register */
-#define                    TIMER10_WIDTH  0xffc0062c   /* Timer 10 Width Register */
-/* Timer Group of 3 Registers */
-#define                    TIMER_ENABLE1  0xffc00640   /* Timer Group of 3 Enable Register */
-#define                   TIMER_DISABLE1  0xffc00644   /* Timer Group of 3 Disable Register */
-#define                    TIMER_STATUS1  0xffc00648   /* Timer Group of 3 Status Register */
-/* SPORT0 Registers */
-#define                      SPORT0_TCR1  0xffc00800   /* SPORT0 Transmit Configuration 1 Register */
-#define                      SPORT0_TCR2  0xffc00804   /* SPORT0 Transmit Configuration 2 Register */
-#define                   SPORT0_TCLKDIV  0xffc00808   /* SPORT0 Transmit Serial Clock Divider Register */
-#define                    SPORT0_TFSDIV  0xffc0080c   /* SPORT0 Transmit Frame Sync Divider Register */
-#define                        SPORT0_TX  0xffc00810   /* SPORT0 Transmit Data Register */
-#define                        SPORT0_RX  0xffc00818   /* SPORT0 Receive Data Register */
-#define                      SPORT0_RCR1  0xffc00820   /* SPORT0 Receive Configuration 1 Register */
-#define                      SPORT0_RCR2  0xffc00824   /* SPORT0 Receive Configuration 2 Register */
-#define                   SPORT0_RCLKDIV  0xffc00828   /* SPORT0 Receive Serial Clock Divider Register */
-#define                    SPORT0_RFSDIV  0xffc0082c   /* SPORT0 Receive Frame Sync Divider Register */
-#define                      SPORT0_STAT  0xffc00830   /* SPORT0 Status Register */
-#define                      SPORT0_CHNL  0xffc00834   /* SPORT0 Current Channel Register */
-#define                     SPORT0_MCMC1  0xffc00838   /* SPORT0 Multi channel Configuration Register 1 */
-#define                     SPORT0_MCMC2  0xffc0083c   /* SPORT0 Multi channel Configuration Register 2 */
-#define                     SPORT0_MTCS0  0xffc00840   /* SPORT0 Multi channel Transmit Select Register 0 */
-#define                     SPORT0_MTCS1  0xffc00844   /* SPORT0 Multi channel Transmit Select Register 1 */
-#define                     SPORT0_MTCS2  0xffc00848   /* SPORT0 Multi channel Transmit Select Register 2 */
-#define                     SPORT0_MTCS3  0xffc0084c   /* SPORT0 Multi channel Transmit Select Register 3 */
-#define                     SPORT0_MRCS0  0xffc00850   /* SPORT0 Multi channel Receive Select Register 0 */
-#define                     SPORT0_MRCS1  0xffc00854   /* SPORT0 Multi channel Receive Select Register 1 */
-#define                     SPORT0_MRCS2  0xffc00858   /* SPORT0 Multi channel Receive Select Register 2 */
-#define                     SPORT0_MRCS3  0xffc0085c   /* SPORT0 Multi channel Receive Select Register 3 */
-/* EPPI0 Registers */
-#define                     EPPI0_STATUS  0xffc01000   /* EPPI0 Status Register */
-#define                     EPPI0_HCOUNT  0xffc01004   /* EPPI0 Horizontal Transfer Count Register */
-#define                     EPPI0_HDELAY  0xffc01008   /* EPPI0 Horizontal Delay Count Register */
-#define                     EPPI0_VCOUNT  0xffc0100c   /* EPPI0 Vertical Transfer Count Register */
-#define                     EPPI0_VDELAY  0xffc01010   /* EPPI0 Vertical Delay Count Register */
-#define                      EPPI0_FRAME  0xffc01014   /* EPPI0 Lines per Frame Register */
-#define                       EPPI0_LINE  0xffc01018   /* EPPI0 Samples per Line Register */
-#define                     EPPI0_CLKDIV  0xffc0101c   /* EPPI0 Clock Divide Register */
-#define                    EPPI0_CONTROL  0xffc01020   /* EPPI0 Control Register */
-#define                   EPPI0_FS1W_HBL  0xffc01024   /* EPPI0 FS1 Width Register / EPPI0 Horizontal Blanking Samples Per Line Register */
-#define                  EPPI0_FS1P_AVPL  0xffc01028   /* EPPI0 FS1 Period Register / EPPI0 Active Video Samples Per Line Register */
-#define                   EPPI0_FS2W_LVB  0xffc0102c   /* EPPI0 FS2 Width Register / EPPI0 Lines of Vertical Blanking Register */
-#define                  EPPI0_FS2P_LAVF  0xffc01030   /* EPPI0 FS2 Period Register/ EPPI0 Lines of Active Video Per Field Register */
-#define                       EPPI0_CLIP  0xffc01034   /* EPPI0 Clipping Register */
-/* UART2 Registers */
-#define                        UART2_DLL  0xffc02100   /* Divisor Latch Low Byte */
-#define                        UART2_DLH  0xffc02104   /* Divisor Latch High Byte */
-#define                       UART2_GCTL  0xffc02108   /* Global Control Register */
-#define                        UART2_LCR  0xffc0210c   /* Line Control Register */
-#define                        UART2_MCR  0xffc02110   /* Modem Control Register */
-#define                        UART2_LSR  0xffc02114   /* Line Status Register */
-#define                        UART2_MSR  0xffc02118   /* Modem Status Register */
-#define                        UART2_SCR  0xffc0211c   /* Scratch Register */
-#define                    UART2_IER_SET  0xffc02120   /* Interrupt Enable Register Set */
-#define                  UART2_IER_CLEAR  0xffc02124   /* Interrupt Enable Register Clear */
-#define                        UART2_RBR  0xffc0212c   /* Receive Buffer Register */
-/* Two Wire Interface Registers (TWI1) */
-#define                     TWI1_REGBASE  0xffc02200
-#define                      TWI1_CLKDIV  0xffc02200   /* Clock Divider Register */
-#define                     TWI1_CONTROL  0xffc02204   /* TWI Control Register */
-#define                  TWI1_SLAVE_CTRL  0xffc02208   /* TWI Slave Mode Control Register */
-#define                  TWI1_SLAVE_STAT  0xffc0220c   /* TWI Slave Mode Status Register */
-#define                  TWI1_SLAVE_ADDR  0xffc02210   /* TWI Slave Mode Address Register */
-#define                 TWI1_MASTER_CTRL  0xffc02214   /* TWI Master Mode Control Register */
-#define                 TWI1_MASTER_STAT  0xffc02218   /* TWI Master Mode Status Register */
-#define                 TWI1_MASTER_ADDR  0xffc0221c   /* TWI Master Mode Address Register */
-#define                    TWI1_INT_STAT  0xffc02220   /* TWI Interrupt Status Register */
-#define                    TWI1_INT_MASK  0xffc02224   /* TWI Interrupt Mask Register */
-#define                   TWI1_FIFO_CTRL  0xffc02228   /* TWI FIFO Control Register */
-#define                   TWI1_FIFO_STAT  0xffc0222c   /* TWI FIFO Status Register */
-#define                   TWI1_XMT_DATA8  0xffc02280   /* TWI FIFO Transmit Data Single Byte Register */
-#define                  TWI1_XMT_DATA16  0xffc02284   /* TWI FIFO Transmit Data Double Byte Register */
-#define                   TWI1_RCV_DATA8  0xffc02288   /* TWI FIFO Receive Data Single Byte Register */
-#define                  TWI1_RCV_DATA16  0xffc0228c   /* TWI FIFO Receive Data Double Byte Register */
-/* SPI2  Registers */
-#define                     SPI2_REGBASE  0xffc02400
-#define                         SPI2_CTL  0xffc02400   /* SPI2 Control Register */
-#define                         SPI2_FLG  0xffc02404   /* SPI2 Flag Register */
-#define                        SPI2_STAT  0xffc02408   /* SPI2 Status Register */
-#define                        SPI2_TDBR  0xffc0240c   /* SPI2 Transmit Data Buffer Register */
-#define                        SPI2_RDBR  0xffc02410   /* SPI2 Receive Data Buffer Register */
-#define                        SPI2_BAUD  0xffc02414   /* SPI2 Baud Rate Register */
-#define                      SPI2_SHADOW  0xffc02418   /* SPI2 Receive Data Buffer Shadow Register */
 /* CAN Controller 1 Config 1 Registers */
@@ -508,1096 +401,4 @@
 #define                    CAN1_MB31_ID0  0xffc037f8   /* CAN Controller 1 Mailbox 31 ID0 Register */
 #define                    CAN1_MB31_ID1  0xffc037fc   /* CAN Controller 1 Mailbox 31 ID1 Register */
-/* ATAPI Registers */
-#define                    ATAPI_CONTROL  0xffc03800   /* ATAPI Control Register */
-#define                     ATAPI_STATUS  0xffc03804   /* ATAPI Status Register */
-#define                   ATAPI_DEV_ADDR  0xffc03808   /* ATAPI Device Register Address */
-#define                  ATAPI_DEV_TXBUF  0xffc0380c   /* ATAPI Device Register Write Data */
-#define                  ATAPI_DEV_RXBUF  0xffc03810   /* ATAPI Device Register Read Data */
-#define                   ATAPI_INT_MASK  0xffc03814   /* ATAPI Interrupt Mask Register */
-#define                 ATAPI_INT_STATUS  0xffc03818   /* ATAPI Interrupt Status Register */
-#define                   ATAPI_XFER_LEN  0xffc0381c   /* ATAPI Length of Transfer */
-#define                ATAPI_LINE_STATUS  0xffc03820   /* ATAPI Line Status */
-#define                   ATAPI_SM_STATE  0xffc03824   /* ATAPI State Machine Status */
-#define                  ATAPI_TERMINATE  0xffc03828   /* ATAPI Host Terminate */
-#define                 ATAPI_PIO_TFRCNT  0xffc0382c   /* ATAPI PIO mode transfer count */
-#define                 ATAPI_DMA_TFRCNT  0xffc03830   /* ATAPI DMA mode transfer count */
-#define               ATAPI_UMAIN_TFRCNT  0xffc03834   /* ATAPI UDMAIN transfer count */
-#define             ATAPI_UDMAOUT_TFRCNT  0xffc03838   /* ATAPI UDMAOUT transfer count */
-#define                  ATAPI_REG_TIM_0  0xffc03840   /* ATAPI Register Transfer Timing 0 */
-#define                  ATAPI_PIO_TIM_0  0xffc03844   /* ATAPI PIO Timing 0 Register */
-#define                  ATAPI_PIO_TIM_1  0xffc03848   /* ATAPI PIO Timing 1 Register */
-#define                ATAPI_MULTI_TIM_0  0xffc03850   /* ATAPI Multi-DMA Timing 0 Register */
-#define                ATAPI_MULTI_TIM_1  0xffc03854   /* ATAPI Multi-DMA Timing 1 Register */
-#define                ATAPI_MULTI_TIM_2  0xffc03858   /* ATAPI Multi-DMA Timing 2 Register */
-#define                ATAPI_ULTRA_TIM_0  0xffc03860   /* ATAPI Ultra-DMA Timing 0 Register */
-#define                ATAPI_ULTRA_TIM_1  0xffc03864   /* ATAPI Ultra-DMA Timing 1 Register */
-#define                ATAPI_ULTRA_TIM_2  0xffc03868   /* ATAPI Ultra-DMA Timing 2 Register */
-#define                ATAPI_ULTRA_TIM_3  0xffc0386c   /* ATAPI Ultra-DMA Timing 3 Register */
-/* SDH Registers */
-#define                      SDH_PWR_CTL  0xffc03900   /* SDH Power Control */
-#define                      SDH_CLK_CTL  0xffc03904   /* SDH Clock Control */
-#define                     SDH_ARGUMENT  0xffc03908   /* SDH Argument */
-#define                      SDH_COMMAND  0xffc0390c   /* SDH Command */
-#define                     SDH_RESP_CMD  0xffc03910   /* SDH Response Command */
-#define                    SDH_RESPONSE0  0xffc03914   /* SDH Response0 */
-#define                    SDH_RESPONSE1  0xffc03918   /* SDH Response1 */
-#define                    SDH_RESPONSE2  0xffc0391c   /* SDH Response2 */
-#define                    SDH_RESPONSE3  0xffc03920   /* SDH Response3 */
-#define                   SDH_DATA_TIMER  0xffc03924   /* SDH Data Timer */
-#define                    SDH_DATA_LGTH  0xffc03928   /* SDH Data Length */
-#define                     SDH_DATA_CTL  0xffc0392c   /* SDH Data Control */
-#define                     SDH_DATA_CNT  0xffc03930   /* SDH Data Counter */
-#define                       SDH_STATUS  0xffc03934   /* SDH Status */
-#define                   SDH_STATUS_CLR  0xffc03938   /* SDH Status Clear */
-#define                        SDH_MASK0  0xffc0393c   /* SDH Interrupt0 Mask */
-#define                        SDH_MASK1  0xffc03940   /* SDH Interrupt1 Mask */
-#define                     SDH_FIFO_CNT  0xffc03948   /* SDH FIFO Counter */
-#define                         SDH_FIFO  0xffc03980   /* SDH Data FIFO */
-#define                     SDH_E_STATUS  0xffc039c0   /* SDH Exception Status */
-#define                       SDH_E_MASK  0xffc039c4   /* SDH Exception Mask */
-#define                          SDH_CFG  0xffc039c8   /* SDH Configuration */
-#define                   SDH_RD_WAIT_EN  0xffc039cc   /* SDH Read Wait Enable */
-#define                         SDH_PID0  0xffc039d0   /* SDH Peripheral Identification0 */
-#define                         SDH_PID1  0xffc039d4   /* SDH Peripheral Identification1 */
-#define                         SDH_PID2  0xffc039d8   /* SDH Peripheral Identification2 */
-#define                         SDH_PID3  0xffc039dc   /* SDH Peripheral Identification3 */
-#define                         SDH_PID4  0xffc039e0   /* SDH Peripheral Identification4 */
-#define                         SDH_PID5  0xffc039e4   /* SDH Peripheral Identification5 */
-#define                         SDH_PID6  0xffc039e8   /* SDH Peripheral Identification6 */
-#define                         SDH_PID7  0xffc039ec   /* SDH Peripheral Identification7 */
-/* HOST Port Registers */
-#define                     HOST_CONTROL  0xffc03a00   /* HOST Control Register */
-#define                      HOST_STATUS  0xffc03a04   /* HOST Status Register */
-#define                     HOST_TIMEOUT  0xffc03a08   /* HOST Acknowledge Mode Timeout Register */
-/* USB Control Registers */
-#define                        USB_FADDR  0xffc03c00   /* Function address register */
-#define                        USB_POWER  0xffc03c04   /* Power management register */
-#define                       USB_INTRTX  0xffc03c08   /* Interrupt register for endpoint 0 and Tx endpoint 1 to 7 */
-#define                       USB_INTRRX  0xffc03c0c   /* Interrupt register for Rx endpoints 1 to 7 */
-#define                      USB_INTRTXE  0xffc03c10   /* Interrupt enable register for IntrTx */
-#define                      USB_INTRRXE  0xffc03c14   /* Interrupt enable register for IntrRx */
-#define                      USB_INTRUSB  0xffc03c18   /* Interrupt register for common USB interrupts */
-#define                     USB_INTRUSBE  0xffc03c1c   /* Interrupt enable register for IntrUSB */
-#define                        USB_FRAME  0xffc03c20   /* USB frame number */
-#define                        USB_INDEX  0xffc03c24   /* Index register for selecting the indexed endpoint registers */
-#define                     USB_TESTMODE  0xffc03c28   /* Enabled USB 20 test modes */
-#define                     USB_GLOBINTR  0xffc03c2c   /* Global Interrupt Mask register and Wakeup Exception Interrupt */
-#define                   USB_GLOBAL_CTL  0xffc03c30   /* Global Clock Control for the core */
-/* USB Packet Control Registers */
-#define                USB_TX_MAX_PACKET  0xffc03c40   /* Maximum packet size for Host Tx endpoint */
-#define                         USB_CSR0  0xffc03c44   /* Control Status register for endpoint 0 and Control Status register for Host Tx endpoint */
-#define                        USB_TXCSR  0xffc03c44   /* Control Status register for endpoint 0 and Control Status register for Host Tx endpoint */
-#define                USB_RX_MAX_PACKET  0xffc03c48   /* Maximum packet size for Host Rx endpoint */
-#define                        USB_RXCSR  0xffc03c4c   /* Control Status register for Host Rx endpoint */
-#define                       USB_COUNT0  0xffc03c50   /* Number of bytes received in endpoint 0 FIFO and Number of bytes received in Host Tx endpoint */
-#define                      USB_RXCOUNT  0xffc03c50   /* Number of bytes received in endpoint 0 FIFO and Number of bytes received in Host Tx endpoint */
-#define                       USB_TXTYPE  0xffc03c54   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint */
-#define                    USB_NAKLIMIT0  0xffc03c58   /* Sets the NAK response timeout on Endpoint 0 and on Bulk transfers for Host Tx endpoint */
-#define                   USB_TXINTERVAL  0xffc03c58   /* Sets the NAK response timeout on Endpoint 0 and on Bulk transfers for Host Tx endpoint */
-#define                       USB_RXTYPE  0xffc03c5c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint */
-#define                   USB_RXINTERVAL  0xffc03c60   /* Sets the polling interval for Interrupt and Isochronous transfers or the NAK response timeout on Bulk transfers */
-#define                      USB_TXCOUNT  0xffc03c68   /* Number of bytes to be written to the selected endpoint Tx FIFO */
-/* USB Endpoint FIFO Registers */
-#define                     USB_EP0_FIFO  0xffc03c80   /* Endpoint 0 FIFO */
-#define                     USB_EP1_FIFO  0xffc03c88   /* Endpoint 1 FIFO */
-#define                     USB_EP2_FIFO  0xffc03c90   /* Endpoint 2 FIFO */
-#define                     USB_EP3_FIFO  0xffc03c98   /* Endpoint 3 FIFO */
-#define                     USB_EP4_FIFO  0xffc03ca0   /* Endpoint 4 FIFO */
-#define                     USB_EP5_FIFO  0xffc03ca8   /* Endpoint 5 FIFO */
-#define                     USB_EP6_FIFO  0xffc03cb0   /* Endpoint 6 FIFO */
-#define                     USB_EP7_FIFO  0xffc03cb8   /* Endpoint 7 FIFO */
-/* USB OTG Control Registers */
-#define                  USB_OTG_DEV_CTL  0xffc03d00   /* OTG Device Control Register */
-#define                 USB_OTG_VBUS_IRQ  0xffc03d04   /* OTG VBUS Control Interrupts */
-#define                USB_OTG_VBUS_MASK  0xffc03d08   /* VBUS Control Interrupt Enable */
-/* USB Phy Control Registers */
-#define                     USB_LINKINFO  0xffc03d48   /* Enables programming of some PHY-side delays */
-#define                        USB_VPLEN  0xffc03d4c   /* Determines duration of VBUS pulse for VBUS charging */
-#define                      USB_HS_EOF1  0xffc03d50   /* Time buffer for High-Speed transactions */
-#define                      USB_FS_EOF1  0xffc03d54   /* Time buffer for Full-Speed transactions */
-#define                      USB_LS_EOF1  0xffc03d58   /* Time buffer for Low-Speed transactions */
-/* (APHY_CNTRL is for ADI usage only) */
-#define                   USB_APHY_CNTRL  0xffc03de0   /* Register that increases visibility of Analog PHY */
-/* (APHY_CALIB is for ADI usage only) */
-#define                   USB_APHY_CALIB  0xffc03de4   /* Register used to set some calibration values */
-#define                  USB_APHY_CNTRL2  0xffc03de8   /* Register used to prevent re-enumeration once Moab goes into hibernate mode */
-/* (PHY_TEST is for ADI usage only) */
-#define                     USB_PHY_TEST  0xffc03dec   /* Used for reducing simulation time and simplifies FIFO testability */
-#define                  USB_PLLOSC_CTRL  0xffc03df0   /* Used to program different parameters for USB PLL and Oscillator */
-#define                   USB_SRP_CLKDIV  0xffc03df4   /* Used to program clock divide value for the clock fed to the SRP detection logic */
-/* USB Endpoint 0 Control Registers */
-#define                USB_EP_NI0_TXMAXP  0xffc03e00   /* Maximum packet size for Host Tx endpoint0 */
-#define                 USB_EP_NI0_TXCSR  0xffc03e04   /* Control Status register for endpoint 0 */
-#define                USB_EP_NI0_RXMAXP  0xffc03e08   /* Maximum packet size for Host Rx endpoint0 */
-#define                 USB_EP_NI0_RXCSR  0xffc03e0c   /* Control Status register for Host Rx endpoint0 */
-#define               USB_EP_NI0_RXCOUNT  0xffc03e10   /* Number of bytes received in endpoint 0 FIFO */
-#define                USB_EP_NI0_TXTYPE  0xffc03e14   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint0 */
-#define            USB_EP_NI0_TXINTERVAL  0xffc03e18   /* Sets the NAK response timeout on Endpoint 0 */
-#define                USB_EP_NI0_RXTYPE  0xffc03e1c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint0 */
-#define            USB_EP_NI0_RXINTERVAL  0xffc03e20   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint0 */
-/* USB Endpoint 1 Control Registers */
-#define               USB_EP_NI0_TXCOUNT  0xffc03e28   /* Number of bytes to be written to the endpoint0 Tx FIFO */
-#define                USB_EP_NI1_TXMAXP  0xffc03e40   /* Maximum packet size for Host Tx endpoint1 */
-#define                 USB_EP_NI1_TXCSR  0xffc03e44   /* Control Status register for endpoint1 */
-#define                USB_EP_NI1_RXMAXP  0xffc03e48   /* Maximum packet size for Host Rx endpoint1 */
-#define                 USB_EP_NI1_RXCSR  0xffc03e4c   /* Control Status register for Host Rx endpoint1 */
-#define               USB_EP_NI1_RXCOUNT  0xffc03e50   /* Number of bytes received in endpoint1 FIFO */
-#define                USB_EP_NI1_TXTYPE  0xffc03e54   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint1 */
-#define            USB_EP_NI1_TXINTERVAL  0xffc03e58   /* Sets the NAK response timeout on Endpoint1 */
-#define                USB_EP_NI1_RXTYPE  0xffc03e5c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint1 */
-#define            USB_EP_NI1_RXINTERVAL  0xffc03e60   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint1 */
-/* USB Endpoint 2 Control Registers */
-#define               USB_EP_NI1_TXCOUNT  0xffc03e68   /* Number of bytes to be written to the+H102 endpoint1 Tx FIFO */
-#define                USB_EP_NI2_TXMAXP  0xffc03e80   /* Maximum packet size for Host Tx endpoint2 */
-#define                 USB_EP_NI2_TXCSR  0xffc03e84   /* Control Status register for endpoint2 */
-#define                USB_EP_NI2_RXMAXP  0xffc03e88   /* Maximum packet size for Host Rx endpoint2 */
-#define                 USB_EP_NI2_RXCSR  0xffc03e8c   /* Control Status register for Host Rx endpoint2 */
-#define               USB_EP_NI2_RXCOUNT  0xffc03e90   /* Number of bytes received in endpoint2 FIFO */
-#define                USB_EP_NI2_TXTYPE  0xffc03e94   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint2 */
-#define            USB_EP_NI2_TXINTERVAL  0xffc03e98   /* Sets the NAK response timeout on Endpoint2 */
-#define                USB_EP_NI2_RXTYPE  0xffc03e9c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint2 */
-#define            USB_EP_NI2_RXINTERVAL  0xffc03ea0   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint2 */
-/* USB Endpoint 3 Control Registers */
-#define               USB_EP_NI2_TXCOUNT  0xffc03ea8   /* Number of bytes to be written to the endpoint2 Tx FIFO */
-#define                USB_EP_NI3_TXMAXP  0xffc03ec0   /* Maximum packet size for Host Tx endpoint3 */
-#define                 USB_EP_NI3_TXCSR  0xffc03ec4   /* Control Status register for endpoint3 */
-#define                USB_EP_NI3_RXMAXP  0xffc03ec8   /* Maximum packet size for Host Rx endpoint3 */
-#define                 USB_EP_NI3_RXCSR  0xffc03ecc   /* Control Status register for Host Rx endpoint3 */
-#define               USB_EP_NI3_RXCOUNT  0xffc03ed0   /* Number of bytes received in endpoint3 FIFO */
-#define                USB_EP_NI3_TXTYPE  0xffc03ed4   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint3 */
-#define            USB_EP_NI3_TXINTERVAL  0xffc03ed8   /* Sets the NAK response timeout on Endpoint3 */
-#define                USB_EP_NI3_RXTYPE  0xffc03edc   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint3 */
-#define            USB_EP_NI3_RXINTERVAL  0xffc03ee0   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint3 */
-/* USB Endpoint 4 Control Registers */
-#define               USB_EP_NI3_TXCOUNT  0xffc03ee8   /* Number of bytes to be written to the H124endpoint3 Tx FIFO */
-#define                USB_EP_NI4_TXMAXP  0xffc03f00   /* Maximum packet size for Host Tx endpoint4 */
-#define                 USB_EP_NI4_TXCSR  0xffc03f04   /* Control Status register for endpoint4 */
-#define                USB_EP_NI4_RXMAXP  0xffc03f08   /* Maximum packet size for Host Rx endpoint4 */
-#define                 USB_EP_NI4_RXCSR  0xffc03f0c   /* Control Status register for Host Rx endpoint4 */
-#define               USB_EP_NI4_RXCOUNT  0xffc03f10   /* Number of bytes received in endpoint4 FIFO */
-#define                USB_EP_NI4_TXTYPE  0xffc03f14   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint4 */
-#define            USB_EP_NI4_TXINTERVAL  0xffc03f18   /* Sets the NAK response timeout on Endpoint4 */
-#define                USB_EP_NI4_RXTYPE  0xffc03f1c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint4 */
-#define            USB_EP_NI4_RXINTERVAL  0xffc03f20   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint4 */
-/* USB Endpoint 5 Control Registers */
-#define               USB_EP_NI4_TXCOUNT  0xffc03f28   /* Number of bytes to be written to the endpoint4 Tx FIFO */
-#define                USB_EP_NI5_TXMAXP  0xffc03f40   /* Maximum packet size for Host Tx endpoint5 */
-#define                 USB_EP_NI5_TXCSR  0xffc03f44   /* Control Status register for endpoint5 */
-#define                USB_EP_NI5_RXMAXP  0xffc03f48   /* Maximum packet size for Host Rx endpoint5 */
-#define                 USB_EP_NI5_RXCSR  0xffc03f4c   /* Control Status register for Host Rx endpoint5 */
-#define               USB_EP_NI5_RXCOUNT  0xffc03f50   /* Number of bytes received in endpoint5 FIFO */
-#define                USB_EP_NI5_TXTYPE  0xffc03f54   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint5 */
-#define            USB_EP_NI5_TXINTERVAL  0xffc03f58   /* Sets the NAK response timeout on Endpoint5 */
-#define                USB_EP_NI5_RXTYPE  0xffc03f5c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint5 */
-#define            USB_EP_NI5_RXINTERVAL  0xffc03f60   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint5 */
-/* USB Endpoint 6 Control Registers */
-#define               USB_EP_NI5_TXCOUNT  0xffc03f68   /* Number of bytes to be written to the H145endpoint5 Tx FIFO */
-#define                USB_EP_NI6_TXMAXP  0xffc03f80   /* Maximum packet size for Host Tx endpoint6 */
-#define                 USB_EP_NI6_TXCSR  0xffc03f84   /* Control Status register for endpoint6 */
-#define                USB_EP_NI6_RXMAXP  0xffc03f88   /* Maximum packet size for Host Rx endpoint6 */
-#define                 USB_EP_NI6_RXCSR  0xffc03f8c   /* Control Status register for Host Rx endpoint6 */
-#define               USB_EP_NI6_RXCOUNT  0xffc03f90   /* Number of bytes received in endpoint6 FIFO */
-#define                USB_EP_NI6_TXTYPE  0xffc03f94   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint6 */
-#define            USB_EP_NI6_TXINTERVAL  0xffc03f98   /* Sets the NAK response timeout on Endpoint6 */
-#define                USB_EP_NI6_RXTYPE  0xffc03f9c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint6 */
-#define            USB_EP_NI6_RXINTERVAL  0xffc03fa0   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint6 */
-/* USB Endpoint 7 Control Registers */
-#define               USB_EP_NI6_TXCOUNT  0xffc03fa8   /* Number of bytes to be written to the endpoint6 Tx FIFO */
-#define                USB_EP_NI7_TXMAXP  0xffc03fc0   /* Maximum packet size for Host Tx endpoint7 */
-#define                 USB_EP_NI7_TXCSR  0xffc03fc4   /* Control Status register for endpoint7 */
-#define                USB_EP_NI7_RXMAXP  0xffc03fc8   /* Maximum packet size for Host Rx endpoint7 */
-#define                 USB_EP_NI7_RXCSR  0xffc03fcc   /* Control Status register for Host Rx endpoint7 */
-#define               USB_EP_NI7_RXCOUNT  0xffc03fd0   /* Number of bytes received in endpoint7 FIFO */
-#define                USB_EP_NI7_TXTYPE  0xffc03fd4   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint7 */
-#define            USB_EP_NI7_TXINTERVAL  0xffc03fd8   /* Sets the NAK response timeout on Endpoint7 */
-#define                USB_EP_NI7_RXTYPE  0xffc03fdc   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint7 */
-#define            USB_EP_NI7_RXINTERVAL  0xffc03ff0   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint7 */
-#define               USB_EP_NI7_TXCOUNT  0xffc03ff8   /* Number of bytes to be written to the endpoint7 Tx FIFO */
-#define                USB_DMA_INTERRUPT  0xffc04000   /* Indicates pending interrupts for the DMA channels */
-/* USB Channel 0 Config Registers */
-#define                  USB_DMA0CONTROL  0xffc04004   /* DMA master channel 0 configuration */
-#define                  USB_DMA0ADDRLOW  0xffc04008   /* Lower 16-bits of memory source/destination address for DMA master channel 0 */
-#define                 USB_DMA0ADDRHIGH  0xffc0400c   /* Upper 16-bits of memory source/destination address for DMA master channel 0 */
-#define                 USB_DMA0COUNTLOW  0xffc04010   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 0 */
-#define                USB_DMA0COUNTHIGH  0xffc04014   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 0 */
-/* USB Channel 1 Config Registers */
-#define                  USB_DMA1CONTROL  0xffc04024   /* DMA master channel 1 configuration */
-#define                  USB_DMA1ADDRLOW  0xffc04028   /* Lower 16-bits of memory source/destination address for DMA master channel 1 */
-#define                 USB_DMA1ADDRHIGH  0xffc0402c   /* Upper 16-bits of memory source/destination address for DMA master channel 1 */
-#define                 USB_DMA1COUNTLOW  0xffc04030   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 1 */
-#define                USB_DMA1COUNTHIGH  0xffc04034   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 1 */
-/* USB Channel 2 Config Registers */
-#define                  USB_DMA2CONTROL  0xffc04044   /* DMA master channel 2 configuration */
-#define                  USB_DMA2ADDRLOW  0xffc04048   /* Lower 16-bits of memory source/destination address for DMA master channel 2 */
-#define                 USB_DMA2ADDRHIGH  0xffc0404c   /* Upper 16-bits of memory source/destination address for DMA master channel 2 */
-#define                 USB_DMA2COUNTLOW  0xffc04050   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 2 */
-#define                USB_DMA2COUNTHIGH  0xffc04054   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 2 */
-/* USB Channel 3 Config Registers */
-#define                  USB_DMA3CONTROL  0xffc04064   /* DMA master channel 3 configuration */
-#define                  USB_DMA3ADDRLOW  0xffc04068   /* Lower 16-bits of memory source/destination address for DMA master channel 3 */
-#define                 USB_DMA3ADDRHIGH  0xffc0406c   /* Upper 16-bits of memory source/destination address for DMA master channel 3 */
-#define                 USB_DMA3COUNTLOW  0xffc04070   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 3 */
-#define                USB_DMA3COUNTHIGH  0xffc04074   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 3 */
-/* USB Channel 4 Config Registers */
-#define                  USB_DMA4CONTROL  0xffc04084   /* DMA master channel 4 configuration */
-#define                  USB_DMA4ADDRLOW  0xffc04088   /* Lower 16-bits of memory source/destination address for DMA master channel 4 */
-#define                 USB_DMA4ADDRHIGH  0xffc0408c   /* Upper 16-bits of memory source/destination address for DMA master channel 4 */
-#define                 USB_DMA4COUNTLOW  0xffc04090   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 4 */
-#define                USB_DMA4COUNTHIGH  0xffc04094   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 4 */
-/* USB Channel 5 Config Registers */
-#define                  USB_DMA5CONTROL  0xffc040a4   /* DMA master channel 5 configuration */
-#define                  USB_DMA5ADDRLOW  0xffc040a8   /* Lower 16-bits of memory source/destination address for DMA master channel 5 */
-#define                 USB_DMA5ADDRHIGH  0xffc040ac   /* Upper 16-bits of memory source/destination address for DMA master channel 5 */
-#define                 USB_DMA5COUNTLOW  0xffc040b0   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 5 */
-#define                USB_DMA5COUNTHIGH  0xffc040b4   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 5 */
-/* USB Channel 6 Config Registers */
-#define                  USB_DMA6CONTROL  0xffc040c4   /* DMA master channel 6 configuration */
-#define                  USB_DMA6ADDRLOW  0xffc040c8   /* Lower 16-bits of memory source/destination address for DMA master channel 6 */
-#define                 USB_DMA6ADDRHIGH  0xffc040cc   /* Upper 16-bits of memory source/destination address for DMA master channel 6 */
-#define                 USB_DMA6COUNTLOW  0xffc040d0   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 6 */
-#define                USB_DMA6COUNTHIGH  0xffc040d4   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 6 */
-/* USB Channel 7 Config Registers */
-#define                  USB_DMA7CONTROL  0xffc040e4   /* DMA master channel 7 configuration */
-#define                  USB_DMA7ADDRLOW  0xffc040e8   /* Lower 16-bits of memory source/destination address for DMA master channel 7 */
-#define                 USB_DMA7ADDRHIGH  0xffc040ec   /* Upper 16-bits of memory source/destination address for DMA master channel 7 */
-#define                 USB_DMA7COUNTLOW  0xffc040f0   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 7 */
-#define                USB_DMA7COUNTHIGH  0xffc040f4   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 7 */
-/* Keypad Registers */
-#define                         KPAD_CTL  0xffc04100   /* Controls keypad module enable and disable */
-#define                    KPAD_PRESCALE  0xffc04104   /* Establish a time base for programing the KPAD_MSEL register */
-#define                        KPAD_MSEL  0xffc04108   /* Selects delay parameters for keypad interface sensitivity */
-#define                      KPAD_ROWCOL  0xffc0410c   /* Captures the row and column output values of the keys pressed */
-#define                        KPAD_STAT  0xffc04110   /* Holds and clears the status of the keypad interface interrupt */
-#define                    KPAD_SOFTEVAL  0xffc04114   /* Lets software force keypad interface to check for keys being pressed */
-/* Pixel Compositor (PIXC) Registers */
-#define                         PIXC_CTL  0xffc04400   /* Overlay enable, resampling mode, I/O data format, transparency enable, watermark level, FIFO status */
-#define                         PIXC_PPL  0xffc04404   /* Holds the number of pixels per line of the display */
-#define                         PIXC_LPF  0xffc04408   /* Holds the number of lines per frame of the display */
-#define                     PIXC_AHSTART  0xffc0440c   /* Contains horizontal start pixel information of the overlay data (set A) */
-#define                       PIXC_AHEND  0xffc04410   /* Contains horizontal end pixel information of the overlay data (set A) */
-#define                     PIXC_AVSTART  0xffc04414   /* Contains vertical start pixel information of the overlay data (set A) */
-#define                       PIXC_AVEND  0xffc04418   /* Contains vertical end pixel information of the overlay data (set A) */
-#define                     PIXC_ATRANSP  0xffc0441c   /* Contains the transparency ratio (set A) */
-#define                     PIXC_BHSTART  0xffc04420   /* Contains horizontal start pixel information of the overlay data (set B) */
-#define                       PIXC_BHEND  0xffc04424   /* Contains horizontal end pixel information of the overlay data (set B) */
-#define                     PIXC_BVSTART  0xffc04428   /* Contains vertical start pixel information of the overlay data (set B) */
-#define                       PIXC_BVEND  0xffc0442c   /* Contains vertical end pixel information of the overlay data (set B) */
-#define                     PIXC_BTRANSP  0xffc04430   /* Contains the transparency ratio (set B) */
-#define                    PIXC_INTRSTAT  0xffc0443c   /* Overlay interrupt configuration/status */
-#define                       PIXC_RYCON  0xffc04440   /* Color space conversion matrix register. Contains the R/Y conversion coefficients */
-#define                       PIXC_GUCON  0xffc04444   /* Color space conversion matrix register. Contains the G/U conversion coefficients */
-#define                       PIXC_BVCON  0xffc04448   /* Color space conversion matrix register. Contains the B/V conversion coefficients */
-#define                      PIXC_CCBIAS  0xffc0444c   /* Bias values for the color space conversion matrix */
-#define                          PIXC_TC  0xffc04450   /* Holds the transparent color value */
-/* Handshake MDMA 0 Registers */
-#define                   HMDMA0_CONTROL  0xffc04500   /* Handshake MDMA0 Control Register */
-#define                    HMDMA0_ECINIT  0xffc04504   /* Handshake MDMA0 Initial Edge Count Register */
-#define                    HMDMA0_BCINIT  0xffc04508   /* Handshake MDMA0 Initial Block Count Register */
-#define                  HMDMA0_ECURGENT  0xffc0450c   /* Handshake MDMA0 Urgent Edge Count Threshold Register */
-#define                HMDMA0_ECOVERFLOW  0xffc04510   /* Handshake MDMA0 Edge Count Overflow Interrupt Register */
-#define                    HMDMA0_ECOUNT  0xffc04514   /* Handshake MDMA0 Current Edge Count Register */
-#define                    HMDMA0_BCOUNT  0xffc04518   /* Handshake MDMA0 Current Block Count Register */
-/* Handshake MDMA 1 Registers */
-#define                   HMDMA1_CONTROL  0xffc04540   /* Handshake MDMA1 Control Register */
-#define                    HMDMA1_ECINIT  0xffc04544   /* Handshake MDMA1 Initial Edge Count Register */
-#define                    HMDMA1_BCINIT  0xffc04548   /* Handshake MDMA1 Initial Block Count Register */
-#define                  HMDMA1_ECURGENT  0xffc0454c   /* Handshake MDMA1 Urgent Edge Count Threshold Register */
-#define                HMDMA1_ECOVERFLOW  0xffc04550   /* Handshake MDMA1 Edge Count Overflow Interrupt Register */
-#define                    HMDMA1_ECOUNT  0xffc04554   /* Handshake MDMA1 Current Edge Count Register */
-#define                    HMDMA1_BCOUNT  0xffc04558   /* Handshake MDMA1 Current Block Count Register */
-/* ********************************************************** */
-/*     SINGLE BIT MACRO PAIRS (bit mask and negated one)      */
-/*     and MULTI BIT READ MACROS                              */
-/* ********************************************************** */
-/* Bit masks for PIXC_CTL */
-#define                   PIXC_EN  0x1        /* Pixel Compositor Enable */
-#define                  OVR_A_EN  0x2        /* Overlay A Enable */
-#define                  OVR_B_EN  0x4        /* Overlay B Enable */
-#define                  IMG_FORM  0x8        /* Image Data Format */
-#define                  OVR_FORM  0x10       /* Overlay Data Format */
-#define                  OUT_FORM  0x20       /* Output Data Format */
-#define                   UDS_MOD  0x40       /* Resampling Mode */
-#define                     TC_EN  0x80       /* Transparent Color Enable */
-#define                  IMG_STAT  0x300      /* Image FIFO Status */
-#define                  OVR_STAT  0xc00      /* Overlay FIFO Status */
-#define                    WM_LVL  0x3000     /* FIFO Watermark Level */
-/* Bit masks for PIXC_AHSTART */
-#define                  A_HSTART  0xfff      /* Horizontal Start Coordinates */
-/* Bit masks for PIXC_AHEND */
-#define                    A_HEND  0xfff      /* Horizontal End Coordinates */
-/* Bit masks for PIXC_AVSTART */
-#define                  A_VSTART  0x3ff      /* Vertical Start Coordinates */
-/* Bit masks for PIXC_AVEND */
-#define                    A_VEND  0x3ff      /* Vertical End Coordinates */
-/* Bit masks for PIXC_ATRANSP */
-#define                  A_TRANSP  0xf        /* Transparency Value */
-/* Bit masks for PIXC_BHSTART */
-#define                  B_HSTART  0xfff      /* Horizontal Start Coordinates */
-/* Bit masks for PIXC_BHEND */
-#define                    B_HEND  0xfff      /* Horizontal End Coordinates */
-/* Bit masks for PIXC_BVSTART */
-#define                  B_VSTART  0x3ff      /* Vertical Start Coordinates */
-/* Bit masks for PIXC_BVEND */
-#define                    B_VEND  0x3ff      /* Vertical End Coordinates */
-/* Bit masks for PIXC_BTRANSP */
-#define                  B_TRANSP  0xf        /* Transparency Value */
-/* Bit masks for PIXC_INTRSTAT */
-#define                OVR_INT_EN  0x1        /* Interrupt at End of Last Valid Overlay */
-#define                FRM_INT_EN  0x2        /* Interrupt at End of Frame */
-#define              OVR_INT_STAT  0x4        /* Overlay Interrupt Status */
-#define              FRM_INT_STAT  0x8        /* Frame Interrupt Status */
-/* Bit masks for PIXC_RYCON */
-#define                       A11  0x3ff      /* A11 in the Coefficient Matrix */
-#define                       A12  0xffc00    /* A12 in the Coefficient Matrix */
-#define                       A13  0x3ff00000 /* A13 in the Coefficient Matrix */
-#define                  RY_MULT4  0x40000000 /* Multiply Row by 4 */
-/* Bit masks for PIXC_GUCON */
-#define                       A21  0x3ff      /* A21 in the Coefficient Matrix */
-#define                       A22  0xffc00    /* A22 in the Coefficient Matrix */
-#define                       A23  0x3ff00000 /* A23 in the Coefficient Matrix */
-#define                  GU_MULT4  0x40000000 /* Multiply Row by 4 */
-/* Bit masks for PIXC_BVCON */
-#define                       A31  0x3ff      /* A31 in the Coefficient Matrix */
-#define                       A32  0xffc00    /* A32 in the Coefficient Matrix */
-#define                       A33  0x3ff00000 /* A33 in the Coefficient Matrix */
-#define                  BV_MULT4  0x40000000 /* Multiply Row by 4 */
-/* Bit masks for PIXC_CCBIAS */
-#define                       A14  0x3ff      /* A14 in the Bias Vector */
-#define                       A24  0xffc00    /* A24 in the Bias Vector */
-#define                       A34  0x3ff00000 /* A34 in the Bias Vector */
-/* Bit masks for PIXC_TC */
-#define                  RY_TRANS  0xff       /* Transparent Color - R/Y Component */
-#define                  GU_TRANS  0xff00     /* Transparent Color - G/U Component */
-#define                  BV_TRANS  0xff0000   /* Transparent Color - B/V Component */
-/* Bit masks for HOST_CONTROL */
-#define                   HOST_EN  0x1        /* Host Enable */
-#define                  HOST_END  0x2        /* Host Endianess */
-#define                 DATA_SIZE  0x4        /* Data Size */
-#define                  HOST_RST  0x8        /* Host Reset */
-#define                  HRDY_OVR  0x20       /* Host Ready Override */
-#define                  INT_MODE  0x40       /* Interrupt Mode */
-#define                     BT_EN  0x80       /* Bus Timeout Enable */
-#define                       EHW  0x100      /* Enable Host Write */
-#define                       EHR  0x200      /* Enable Host Read */
-#define                       BDR  0x400      /* Burst DMA Requests */
-/* Bit masks for HOST_STATUS */
-#define                 DMA_READY  0x1        /* DMA Ready */
-#define                  FIFOFULL  0x2        /* FIFO Full */
-#define                 FIFOEMPTY  0x4        /* FIFO Empty */
-#define              DMA_COMPLETE  0x8        /* DMA Complete */
-#define                      HSHK  0x10       /* Host Handshake */
-#define                 HSTIMEOUT  0x20       /* Host Timeout */
-#define                      HIRQ  0x40       /* Host Interrupt Request */
-#define                ALLOW_CNFG  0x80       /* Allow New Configuration */
-#define                   DMA_DIR  0x100      /* DMA Direction */
-#define                       BTE  0x200      /* Bus Timeout Enabled */
-/* Bit masks for HOST_TIMEOUT */
-#define             COUNT_TIMEOUT  0x7ff      /* Host Timeout count */
-/* Bit masks for KPAD_CTL */
-#define                   KPAD_EN  0x1        /* Keypad Enable */
-#define              KPAD_IRQMODE  0x6        /* Key Press Interrupt Enable */
-#define                KPAD_ROWEN  0x1c00     /* Row Enable Width */
-#define                KPAD_COLEN  0xe000     /* Column Enable Width */
-/* Bit masks for KPAD_PRESCALE */
-#define         KPAD_PRESCALE_VAL  0x3f       /* Key Prescale Value */
-/* Bit masks for KPAD_MSEL */
-#define                DBON_SCALE  0xff       /* Debounce Scale Value */
-#define              COLDRV_SCALE  0xff00     /* Column Driver Scale Value */
-/* Bit masks for KPAD_ROWCOL */
-#define                  KPAD_ROW  0xff       /* Rows Pressed */
-#define                  KPAD_COL  0xff00     /* Columns Pressed */
-/* Bit masks for KPAD_STAT */
-#define                  KPAD_IRQ  0x1        /* Keypad Interrupt Status */
-#define              KPAD_MROWCOL  0x6        /* Multiple Row/Column Keypress Status */
-#define              KPAD_PRESSED  0x8        /* Key press current status */
-/* Bit masks for KPAD_SOFTEVAL */
-#define           KPAD_SOFTEVAL_E  0x2        /* Software Programmable Force Evaluate */
-/* Bit masks for SDH_COMMAND */
-#define                   CMD_IDX  0x3f       /* Command Index */
-#define                   CMD_RSP  0x40       /* Response */
-#define                 CMD_L_RSP  0x80       /* Long Response */
-#define                 CMD_INT_E  0x100      /* Command Interrupt */
-#define                CMD_PEND_E  0x200      /* Command Pending */
-#define                     CMD_E  0x400      /* Command Enable */
-/* Bit masks for SDH_PWR_CTL */
-#define                    PWR_ON  0x3        /* Power On */
-#if 0
-#define                       TBD  0x3c       /* TBD */
-#endif
-#define                 SD_CMD_OD  0x40       /* Open Drain Output */
-#define                   ROD_CTL  0x80       /* Rod Control */
-/* Bit masks for SDH_CLK_CTL */
-#define                    CLKDIV  0xff       /* MC_CLK Divisor */
-#define                     CLK_E  0x100      /* MC_CLK Bus Clock Enable */
-#define                  PWR_SV_E  0x200      /* Power Save Enable */
-#define             CLKDIV_BYPASS  0x400      /* Bypass Divisor */
-#define                  WIDE_BUS  0x800      /* Wide Bus Mode Enable */
-/* Bit masks for SDH_RESP_CMD */
-#define                  RESP_CMD  0x3f       /* Response Command */
-/* Bit masks for SDH_DATA_CTL */
-#define                     DTX_E  0x1        /* Data Transfer Enable */
-#define                   DTX_DIR  0x2        /* Data Transfer Direction */
-#define                  DTX_MODE  0x4        /* Data Transfer Mode */
-#define                 DTX_DMA_E  0x8        /* Data Transfer DMA Enable */
-#define              DTX_BLK_LGTH  0xf0       /* Data Transfer Block Length */
-/* Bit masks for SDH_STATUS */
-#define              CMD_CRC_FAIL  0x1        /* CMD CRC Fail */
-#define              DAT_CRC_FAIL  0x2        /* Data CRC Fail */
-#define               CMD_TIME_OUT  0x4        /* CMD Time Out */
-#define               DAT_TIME_OUT  0x8        /* Data Time Out */
-#define               TX_UNDERRUN  0x10       /* Transmit Underrun */
-#define                RX_OVERRUN  0x20       /* Receive Overrun */
-#define              CMD_RESP_END  0x40       /* CMD Response End */
-#define                  CMD_SENT  0x80       /* CMD Sent */
-#define                   DAT_END  0x100      /* Data End */
-#define             START_BIT_ERR  0x200      /* Start Bit Error */
-#define               DAT_BLK_END  0x400      /* Data Block End */
-#define                   CMD_ACT  0x800      /* CMD Active */
-#define                    TX_ACT  0x1000     /* Transmit Active */
-#define                    RX_ACT  0x2000     /* Receive Active */
-#define              TX_FIFO_STAT  0x4000     /* Transmit FIFO Status */
-#define              RX_FIFO_STAT  0x8000     /* Receive FIFO Status */
-#define              TX_FIFO_FULL  0x10000    /* Transmit FIFO Full */
-#define              RX_FIFO_FULL  0x20000    /* Receive FIFO Full */
-#define              TX_FIFO_ZERO  0x40000    /* Transmit FIFO Empty */
-#define               RX_DAT_ZERO  0x80000    /* Receive FIFO Empty */
-#define                TX_DAT_RDY  0x100000   /* Transmit Data Available */
-#define               RX_FIFO_RDY  0x200000   /* Receive Data Available */
-/* Bit masks for SDH_STATUS_CLR */
-#define         CMD_CRC_FAIL_STAT  0x1        /* CMD CRC Fail Status */
-#define         DAT_CRC_FAIL_STAT  0x2        /* Data CRC Fail Status */
-#define          CMD_TIMEOUT_STAT  0x4        /* CMD Time Out Status */
-#define          DAT_TIMEOUT_STAT  0x8        /* Data Time Out status */
-#define          TX_UNDERRUN_STAT  0x10       /* Transmit Underrun Status */
-#define           RX_OVERRUN_STAT  0x20       /* Receive Overrun Status */
-#define         CMD_RESP_END_STAT  0x40       /* CMD Response End Status */
-#define             CMD_SENT_STAT  0x80       /* CMD Sent Status */
-#define              DAT_END_STAT  0x100      /* Data End Status */
-#define        START_BIT_ERR_STAT  0x200      /* Start Bit Error Status */
-#define          DAT_BLK_END_STAT  0x400      /* Data Block End Status */
-/* Bit masks for SDH_MASK0 */
-#define         CMD_CRC_FAIL_MASK  0x1        /* CMD CRC Fail Mask */
-#define         DAT_CRC_FAIL_MASK  0x2        /* Data CRC Fail Mask */
-#define          CMD_TIMEOUT_MASK  0x4        /* CMD Time Out Mask */
-#define          DAT_TIMEOUT_MASK  0x8        /* Data Time Out Mask */
-#define          TX_UNDERRUN_MASK  0x10       /* Transmit Underrun Mask */
-#define           RX_OVERRUN_MASK  0x20       /* Receive Overrun Mask */
-#define         CMD_RESP_END_MASK  0x40       /* CMD Response End Mask */
-#define             CMD_SENT_MASK  0x80       /* CMD Sent Mask */
-#define              DAT_END_MASK  0x100      /* Data End Mask */
-#define        START_BIT_ERR_MASK  0x200      /* Start Bit Error Mask */
-#define          DAT_BLK_END_MASK  0x400      /* Data Block End Mask */
-#define              CMD_ACT_MASK  0x800      /* CMD Active Mask */
-#define               TX_ACT_MASK  0x1000     /* Transmit Active Mask */
-#define               RX_ACT_MASK  0x2000     /* Receive Active Mask */
-#define         TX_FIFO_STAT_MASK  0x4000     /* Transmit FIFO Status Mask */
-#define         RX_FIFO_STAT_MASK  0x8000     /* Receive FIFO Status Mask */
-#define         TX_FIFO_FULL_MASK  0x10000    /* Transmit FIFO Full Mask */
-#define         RX_FIFO_FULL_MASK  0x20000    /* Receive FIFO Full Mask */
-#define         TX_FIFO_ZERO_MASK  0x40000    /* Transmit FIFO Empty Mask */
-#define          RX_DAT_ZERO_MASK  0x80000    /* Receive FIFO Empty Mask */
-#define           TX_DAT_RDY_MASK  0x100000   /* Transmit Data Available Mask */
-#define          RX_FIFO_RDY_MASK  0x200000   /* Receive Data Available Mask */
-/* Bit masks for SDH_FIFO_CNT */
-#define                FIFO_COUNT  0x7fff     /* FIFO Count */
-/* Bit masks for SDH_E_STATUS */
-#define              SDIO_INT_DET  0x2        /* SDIO Int Detected */
-#define               SD_CARD_DET  0x10       /* SD Card Detect */
-/* Bit masks for SDH_E_MASK */
-#define                  SDIO_MSK  0x2        /* Mask SDIO Int Detected */
-#define                   SCD_MSK  0x40       /* Mask Card Detect */
-/* Bit masks for SDH_CFG */
-#define                   CLKS_EN  0x1        /* Clocks Enable */
-#define                      SD4E  0x4        /* SDIO 4-Bit Enable */
-#define                       MWE  0x8        /* Moving Window Enable */
-#define                    SD_RST  0x10       /* SDMMC Reset */
-#define                 PUP_SDDAT  0x20       /* Pull-up SD_DAT */
-#define                PUP_SDDAT3  0x40       /* Pull-up SD_DAT3 */
-#define                 PD_SDDAT3  0x80       /* Pull-down SD_DAT3 */
-/* Bit masks for SDH_RD_WAIT_EN */
-#define                       RWR  0x1        /* Read Wait Request */
-/* Bit masks for ATAPI_CONTROL */
-#define                 PIO_START  0x1        /* Start PIO/Reg Op */
-#define               MULTI_START  0x2        /* Start Multi-DMA Op */
-#define               ULTRA_START  0x4        /* Start Ultra-DMA Op */
-#define                  XFER_DIR  0x8        /* Transfer Direction */
-#define                  IORDY_EN  0x10       /* IORDY Enable */
-#define                FIFO_FLUSH  0x20       /* Flush FIFOs */
-#define                  SOFT_RST  0x40       /* Soft Reset */
-#define                   DEV_RST  0x80       /* Device Reset */
-#define                TFRCNT_RST  0x100      /* Trans Count Reset */
-#define               END_ON_TERM  0x200      /* End/Terminate Select */
-#define               PIO_USE_DMA  0x400      /* PIO-DMA Enable */
-#define          UDMAIN_FIFO_THRS  0xf000     /* Ultra DMA-IN FIFO Threshold */
-/* Bit masks for ATAPI_STATUS */
-#define               PIO_XFER_ON  0x1        /* PIO transfer in progress */
-#define             MULTI_XFER_ON  0x2        /* Multi-word DMA transfer in progress */
-#define             ULTRA_XFER_ON  0x4        /* Ultra DMA transfer in progress */
-#define               ULTRA_IN_FL  0xf0       /* Ultra DMA Input FIFO Level */
-/* Bit masks for ATAPI_DEV_ADDR */
-#define                  DEV_ADDR  0x1f       /* Device Address */
-/* Bit masks for ATAPI_INT_MASK */
-#define        ATAPI_DEV_INT_MASK  0x1        /* Device interrupt mask */
-#define             PIO_DONE_MASK  0x2        /* PIO transfer done interrupt mask */
-#define           MULTI_DONE_MASK  0x4        /* Multi-DMA transfer done interrupt mask */
-#define          UDMAIN_DONE_MASK  0x8        /* Ultra-DMA in transfer done interrupt mask */
-#define         UDMAOUT_DONE_MASK  0x10       /* Ultra-DMA out transfer done interrupt mask */
-#define       HOST_TERM_XFER_MASK  0x20       /* Host terminate current transfer interrupt mask */
-#define           MULTI_TERM_MASK  0x40       /* Device terminate Multi-DMA transfer interrupt mask */
-#define          UDMAIN_TERM_MASK  0x80       /* Device terminate Ultra-DMA-in transfer interrupt mask */
-#define         UDMAOUT_TERM_MASK  0x100      /* Device terminate Ultra-DMA-out transfer interrupt mask */
-/* Bit masks for ATAPI_INT_STATUS */
-#define             ATAPI_DEV_INT  0x1        /* Device interrupt status */
-#define              PIO_DONE_INT  0x2        /* PIO transfer done interrupt status */
-#define            MULTI_DONE_INT  0x4        /* Multi-DMA transfer done interrupt status */
-#define           UDMAIN_DONE_INT  0x8        /* Ultra-DMA in transfer done interrupt status */
-#define          UDMAOUT_DONE_INT  0x10       /* Ultra-DMA out transfer done interrupt status */
-#define        HOST_TERM_XFER_INT  0x20       /* Host terminate current transfer interrupt status */
-#define            MULTI_TERM_INT  0x40       /* Device terminate Multi-DMA transfer interrupt status */
-#define           UDMAIN_TERM_INT  0x80       /* Device terminate Ultra-DMA-in transfer interrupt status */
-#define          UDMAOUT_TERM_INT  0x100      /* Device terminate Ultra-DMA-out transfer interrupt status */
-/* Bit masks for ATAPI_LINE_STATUS */
-#define                ATAPI_INTR  0x1        /* Device interrupt to host line status */
-#define                ATAPI_DASP  0x2        /* Device dasp to host line status */
-#define                ATAPI_CS0N  0x4        /* ATAPI chip select 0 line status */
-#define                ATAPI_CS1N  0x8        /* ATAPI chip select 1 line status */
-#define                ATAPI_ADDR  0x70       /* ATAPI address line status */
-#define              ATAPI_DMAREQ  0x80       /* ATAPI DMA request line status */
-#define             ATAPI_DMAACKN  0x100      /* ATAPI DMA acknowledge line status */
-#define               ATAPI_DIOWN  0x200      /* ATAPI write line status */
-#define               ATAPI_DIORN  0x400      /* ATAPI read line status */
-#define               ATAPI_IORDY  0x800      /* ATAPI IORDY line status */
-/* Bit masks for ATAPI_SM_STATE */
-#define                PIO_CSTATE  0xf        /* PIO mode state machine current state */
-#define                DMA_CSTATE  0xf0       /* DMA mode state machine current state */
-#define             UDMAIN_CSTATE  0xf00      /* Ultra DMA-In mode state machine current state */
-#define            UDMAOUT_CSTATE  0xf000     /* ATAPI IORDY line status */
-/* Bit masks for ATAPI_TERMINATE */
-#define           ATAPI_HOST_TERM  0x1        /* Host terminationation */
-/* Bit masks for ATAPI_REG_TIM_0 */
-#define                    T2_REG  0xff       /* End of cycle time for register access transfers */
-#define                  TEOC_REG  0xff00     /* Selects DIOR/DIOW pulsewidth */
-/* Bit masks for ATAPI_PIO_TIM_0 */
-#define                    T1_REG  0xf        /* Time from address valid to DIOR/DIOW */
-#define                T2_REG_PIO  0xff0      /* DIOR/DIOW pulsewidth */
-#define                    T4_REG  0xf000     /* DIOW data hold */
-/* Bit masks for ATAPI_PIO_TIM_1 */
-#define              TEOC_REG_PIO  0xff       /* End of cycle time for PIO access transfers. */
-/* Bit masks for ATAPI_MULTI_TIM_0 */
-#define                        TD  0xff       /* DIOR/DIOW asserted pulsewidth */
-#define                        TM  0xff00     /* Time from address valid to DIOR/DIOW */
-/* Bit masks for ATAPI_MULTI_TIM_1 */
-#define                       TKW  0xff       /* Selects DIOW negated pulsewidth */
-#define                       TKR  0xff00     /* Selects DIOR negated pulsewidth */
-/* Bit masks for ATAPI_MULTI_TIM_2 */
-#define                        TH  0xff       /* Selects DIOW data hold */
-#define                      TEOC  0xff00     /* Selects end of cycle for DMA */
-/* Bit masks for ATAPI_ULTRA_TIM_0 */
-#define                      TACK  0xff       /* Selects setup and hold times for TACK */
-#define                      TENV  0xff00     /* Selects envelope time */
-/* Bit masks for ATAPI_ULTRA_TIM_1 */
-#define                      TDVS  0xff       /* Selects data valid setup time */
-#define                 TCYC_TDVS  0xff00     /* Selects cycle time - TDVS time */
-/* Bit masks for ATAPI_ULTRA_TIM_2 */
-#define                       TSS  0xff       /* Selects time from STROBE edge to negation of DMARQ or assertion of STOP */
-#define                      TMLI  0xff00     /* Selects interlock time */
-/* Bit masks for ATAPI_ULTRA_TIM_3 */
-#define                      TZAH  0xff       /* Selects minimum delay required for output */
-#define               READY_PAUSE  0xff00     /* Selects ready to pause */
-/* Bit masks for TIMER_ENABLE1 */
-#define                    TIMEN8  0x1        /* Timer 8 Enable */
-#define                    TIMEN9  0x2        /* Timer 9 Enable */
-#define                   TIMEN10  0x4        /* Timer 10 Enable */
-/* Bit masks for TIMER_DISABLE1 */
-#define                   TIMDIS8  0x1        /* Timer 8 Disable */
-#define                   TIMDIS9  0x2        /* Timer 9 Disable */
-#define                  TIMDIS10  0x4        /* Timer 10 Disable */
-/* Bit masks for TIMER_STATUS1 */
-#define                    TIMIL8  0x1        /* Timer 8 Interrupt */
-#define                    TIMIL9  0x2        /* Timer 9 Interrupt */
-#define                   TIMIL10  0x4        /* Timer 10 Interrupt */
-#define                 TOVF_ERR8  0x10       /* Timer 8 Counter Overflow */
-#define                 TOVF_ERR9  0x20       /* Timer 9 Counter Overflow */
-#define                TOVF_ERR10  0x40       /* Timer 10 Counter Overflow */
-#define                     TRUN8  0x1000     /* Timer 8 Slave Enable Status */
-#define                     TRUN9  0x2000     /* Timer 9 Slave Enable Status */
-#define                    TRUN10  0x4000     /* Timer 10 Slave Enable Status */
-/* Bit masks for EPPI0 are obtained from common base header for EPPIx (EPPI1 and EPPI2) */
-/* Bit masks for USB_FADDR */
-#define          FUNCTION_ADDRESS  0x7f       /* Function address */
-/* Bit masks for USB_POWER */
-#define           ENABLE_SUSPENDM  0x1        /* enable SuspendM output */
-#define              SUSPEND_MODE  0x2        /* Suspend Mode indicator */
-#define               RESUME_MODE  0x4        /* DMA Mode */
-#define                     RESET  0x8        /* Reset indicator */
-#define                   HS_MODE  0x10       /* High Speed mode indicator */
-#define                 HS_ENABLE  0x20       /* high Speed Enable */
-#define                 SOFT_CONN  0x40       /* Soft connect */
-#define                ISO_UPDATE  0x80       /* Isochronous update */
-/* Bit masks for USB_INTRTX */
-#define                    EP0_TX  0x1        /* Tx Endpoint 0 interrupt */
-#define                    EP1_TX  0x2        /* Tx Endpoint 1 interrupt */
-#define                    EP2_TX  0x4        /* Tx Endpoint 2 interrupt */
-#define                    EP3_TX  0x8        /* Tx Endpoint 3 interrupt */
-#define                    EP4_TX  0x10       /* Tx Endpoint 4 interrupt */
-#define                    EP5_TX  0x20       /* Tx Endpoint 5 interrupt */
-#define                    EP6_TX  0x40       /* Tx Endpoint 6 interrupt */
-#define                    EP7_TX  0x80       /* Tx Endpoint 7 interrupt */
-/* Bit masks for USB_INTRRX */
-#define                    EP1_RX  0x2        /* Rx Endpoint 1 interrupt */
-#define                    EP2_RX  0x4        /* Rx Endpoint 2 interrupt */
-#define                    EP3_RX  0x8        /* Rx Endpoint 3 interrupt */
-#define                    EP4_RX  0x10       /* Rx Endpoint 4 interrupt */
-#define                    EP5_RX  0x20       /* Rx Endpoint 5 interrupt */
-#define                    EP6_RX  0x40       /* Rx Endpoint 6 interrupt */
-#define                    EP7_RX  0x80       /* Rx Endpoint 7 interrupt */
-/* Bit masks for USB_INTRTXE */
-#define                  EP0_TX_E  0x1        /* Endpoint 0 interrupt Enable */
-#define                  EP1_TX_E  0x2        /* Tx Endpoint 1 interrupt  Enable */
-#define                  EP2_TX_E  0x4        /* Tx Endpoint 2 interrupt  Enable */
-#define                  EP3_TX_E  0x8        /* Tx Endpoint 3 interrupt  Enable */
-#define                  EP4_TX_E  0x10       /* Tx Endpoint 4 interrupt  Enable */
-#define                  EP5_TX_E  0x20       /* Tx Endpoint 5 interrupt  Enable */
-#define                  EP6_TX_E  0x40       /* Tx Endpoint 6 interrupt  Enable */
-#define                  EP7_TX_E  0x80       /* Tx Endpoint 7 interrupt  Enable */
-/* Bit masks for USB_INTRRXE */
-#define                  EP1_RX_E  0x2        /* Rx Endpoint 1 interrupt  Enable */
-#define                  EP2_RX_E  0x4        /* Rx Endpoint 2 interrupt  Enable */
-#define                  EP3_RX_E  0x8        /* Rx Endpoint 3 interrupt  Enable */
-#define                  EP4_RX_E  0x10       /* Rx Endpoint 4 interrupt  Enable */
-#define                  EP5_RX_E  0x20       /* Rx Endpoint 5 interrupt  Enable */
-#define                  EP6_RX_E  0x40       /* Rx Endpoint 6 interrupt  Enable */
-#define                  EP7_RX_E  0x80       /* Rx Endpoint 7 interrupt  Enable */
-/* Bit masks for USB_INTRUSB */
-#define                 SUSPEND_B  0x1        /* Suspend indicator */
-#define                  RESUME_B  0x2        /* Resume indicator */
-#define          RESET_OR_BABLE_B  0x4        /* Reset/babble indicator */
-#define                     SOF_B  0x8        /* Start of frame */
-#define                    CONN_B  0x10       /* Connection indicator */
-#define                  DISCON_B  0x20       /* Disconnect indicator */
-#define             SESSION_REQ_B  0x40       /* Session Request */
-#define              VBUS_ERROR_B  0x80       /* Vbus threshold indicator */
-/* Bit masks for USB_INTRUSBE */
-#define                SUSPEND_BE  0x1        /* Suspend indicator int enable */
-#define                 RESUME_BE  0x2        /* Resume indicator int enable */
-#define         RESET_OR_BABLE_BE  0x4        /* Reset/babble indicator int enable */
-#define                    SOF_BE  0x8        /* Start of frame int enable */
-#define                   CONN_BE  0x10       /* Connection indicator int enable */
-#define                 DISCON_BE  0x20       /* Disconnect indicator int enable */
-#define            SESSION_REQ_BE  0x40       /* Session Request int enable */
-#define             VBUS_ERROR_BE  0x80       /* Vbus threshold indicator int enable */
-/* Bit masks for USB_FRAME */
-#define              FRAME_NUMBER  0x7ff      /* Frame number */
-/* Bit masks for USB_INDEX */
-#define         SELECTED_ENDPOINT  0xf        /* selected endpoint */
-/* Bit masks for USB_GLOBAL_CTL */
-#define                GLOBAL_ENA  0x1        /* enables USB module */
-#define                EP1_TX_ENA  0x2        /* Transmit endpoint 1 enable */
-#define                EP2_TX_ENA  0x4        /* Transmit endpoint 2 enable */
-#define                EP3_TX_ENA  0x8        /* Transmit endpoint 3 enable */
-#define                EP4_TX_ENA  0x10       /* Transmit endpoint 4 enable */
-#define                EP5_TX_ENA  0x20       /* Transmit endpoint 5 enable */
-#define                EP6_TX_ENA  0x40       /* Transmit endpoint 6 enable */
-#define                EP7_TX_ENA  0x80       /* Transmit endpoint 7 enable */
-#define                EP1_RX_ENA  0x100      /* Receive endpoint 1 enable */
-#define                EP2_RX_ENA  0x200      /* Receive endpoint 2 enable */
-#define                EP3_RX_ENA  0x400      /* Receive endpoint 3 enable */
-#define                EP4_RX_ENA  0x800      /* Receive endpoint 4 enable */
-#define                EP5_RX_ENA  0x1000     /* Receive endpoint 5 enable */
-#define                EP6_RX_ENA  0x2000     /* Receive endpoint 6 enable */
-#define                EP7_RX_ENA  0x4000     /* Receive endpoint 7 enable */
-/* Bit masks for USB_OTG_DEV_CTL */
-#define                   SESSION  0x1        /* session indicator */
-#define                  HOST_REQ  0x2        /* Host negotiation request */
-#define                 HOST_MODE  0x4        /* indicates USBDRC is a host */
-#define                     VBUS0  0x8        /* Vbus level indicator[0] */
-#define                     VBUS1  0x10       /* Vbus level indicator[1] */
-#define                     LSDEV  0x20       /* Low-speed indicator */
-#define                     FSDEV  0x40       /* Full or High-speed indicator */
-#define                  B_DEVICE  0x80       /* A' or 'B' device indicator */
-/* Bit masks for USB_OTG_VBUS_IRQ */
-#define             DRIVE_VBUS_ON  0x1        /* indicator to drive VBUS control circuit */
-#define            DRIVE_VBUS_OFF  0x2        /* indicator to shut off charge pump */
-#define           CHRG_VBUS_START  0x4        /* indicator for external circuit to start charging VBUS */
-#define             CHRG_VBUS_END  0x8        /* indicator for external circuit to end charging VBUS */
-#define        DISCHRG_VBUS_START  0x10       /* indicator to start discharging VBUS */
-#define          DISCHRG_VBUS_END  0x20       /* indicator to stop discharging VBUS */
-/* Bit masks for USB_OTG_VBUS_MASK */
-#define         DRIVE_VBUS_ON_ENA  0x1        /* enable DRIVE_VBUS_ON interrupt */
-#define        DRIVE_VBUS_OFF_ENA  0x2        /* enable DRIVE_VBUS_OFF interrupt */
-#define       CHRG_VBUS_START_ENA  0x4        /* enable CHRG_VBUS_START interrupt */
-#define         CHRG_VBUS_END_ENA  0x8        /* enable CHRG_VBUS_END interrupt */
-#define    DISCHRG_VBUS_START_ENA  0x10       /* enable DISCHRG_VBUS_START interrupt */
-#define      DISCHRG_VBUS_END_ENA  0x20       /* enable DISCHRG_VBUS_END interrupt */
-/* Bit masks for USB_CSR0 */
-#define                  RXPKTRDY  0x1        /* data packet receive indicator */
-#define                  TXPKTRDY  0x2        /* data packet in FIFO indicator */
-#define                STALL_SENT  0x4        /* STALL handshake sent */
-#define                   DATAEND  0x8        /* Data end indicator */
-#define                  SETUPEND  0x10       /* Setup end */
-#define                 SENDSTALL  0x20       /* Send STALL handshake */
-#define         SERVICED_RXPKTRDY  0x40       /* used to clear the RxPktRdy bit */
-#define         SERVICED_SETUPEND  0x80       /* used to clear the SetupEnd bit */
-#define                 FLUSHFIFO  0x100      /* flush endpoint FIFO */
-#define          STALL_RECEIVED_H  0x4        /* STALL handshake received host mode */
-#define                SETUPPKT_H  0x8        /* send Setup token host mode */
-#define                   ERROR_H  0x10       /* timeout error indicator host mode */
-#define                  REQPKT_H  0x20       /* Request an IN transaction host mode */
-#define               STATUSPKT_H  0x40       /* Status stage transaction host mode */
-#define             NAK_TIMEOUT_H  0x80       /* EP0 halted after a NAK host mode */
-/* Bit masks for USB_COUNT0 */
-#define              EP0_RX_COUNT  0x7f       /* number of received bytes in EP0 FIFO */
-/* Bit masks for USB_NAKLIMIT0 */
-#define             EP0_NAK_LIMIT  0x1f       /* number of frames/micro frames after which EP0 timeouts */
-/* Bit masks for USB_TX_MAX_PACKET */
-#define         MAX_PACKET_SIZE_T  0x7ff      /* maximum data pay load in a frame */
-/* Bit masks for USB_RX_MAX_PACKET */
-#define         MAX_PACKET_SIZE_R  0x7ff      /* maximum data pay load in a frame */
-/* Bit masks for USB_TXCSR */
-#define                TXPKTRDY_T  0x1        /* data packet in FIFO indicator */
-#define          FIFO_NOT_EMPTY_T  0x2        /* FIFO not empty */
-#define                UNDERRUN_T  0x4        /* TxPktRdy not set  for an IN token */
-#define               FLUSHFIFO_T  0x8        /* flush endpoint FIFO */
-#define              STALL_SEND_T  0x10       /* issue a Stall handshake */
-#define              STALL_SENT_T  0x20       /* Stall handshake transmitted */
-#define        CLEAR_DATATOGGLE_T  0x40       /* clear endpoint data toggle */
-#define                INCOMPTX_T  0x80       /* indicates that a large packet is split */
-#define              DMAREQMODE_T  0x400      /* DMA mode (0 or 1) selection */
-#define        FORCE_DATATOGGLE_T  0x800      /* Force data toggle */
-#define              DMAREQ_ENA_T  0x1000     /* Enable DMA request for Tx EP */
-#define                     ISO_T  0x4000     /* enable Isochronous transfers */
-#define                 AUTOSET_T  0x8000     /* allows TxPktRdy to be set automatically */
-#define                  ERROR_TH  0x4        /* error condition host mode */
-#define         STALL_RECEIVED_TH  0x20       /* Stall handshake received host mode */
-#define            NAK_TIMEOUT_TH  0x80       /* NAK timeout host mode */
-/* Bit masks for USB_TXCOUNT */
-#define                  TX_COUNT  0x1fff     /* Number of bytes to be written to the selected endpoint Tx FIFO */
-/* Bit masks for USB_RXCSR */
-#define                RXPKTRDY_R  0x1        /* data packet in FIFO indicator */
-#define               FIFO_FULL_R  0x2        /* FIFO not empty */
-#define                 OVERRUN_R  0x4        /* TxPktRdy not set  for an IN token */
-#define               DATAERROR_R  0x8        /* Out packet cannot be loaded into Rx  FIFO */
-#define               FLUSHFIFO_R  0x10       /* flush endpoint FIFO */
-#define              STALL_SEND_R  0x20       /* issue a Stall handshake */
-#define              STALL_SENT_R  0x40       /* Stall handshake transmitted */
-#define        CLEAR_DATATOGGLE_R  0x80       /* clear endpoint data toggle */
-#define                INCOMPRX_R  0x100      /* indicates that a large packet is split */
-#define              DMAREQMODE_R  0x800      /* DMA mode (0 or 1) selection */
-#define                 DISNYET_R  0x1000     /* disable Nyet handshakes */
-#define              DMAREQ_ENA_R  0x2000     /* Enable DMA request for Tx EP */
-#define                     ISO_R  0x4000     /* enable Isochronous transfers */
-#define               AUTOCLEAR_R  0x8000     /* allows TxPktRdy to be set automatically */
-#define                  ERROR_RH  0x4        /* TxPktRdy not set  for an IN token host mode */
-#define                 REQPKT_RH  0x20       /* request an IN transaction host mode */
-#define         STALL_RECEIVED_RH  0x40       /* Stall handshake received host mode */
-#define               INCOMPRX_RH  0x100      /* indicates that a large packet is split host mode */
-#define             DMAREQMODE_RH  0x800      /* DMA mode (0 or 1) selection host mode */
-#define                AUTOREQ_RH  0x4000     /* sets ReqPkt automatically host mode */
-/* Bit masks for USB_RXCOUNT */
-#define                  RX_COUNT  0x1fff     /* Number of received bytes in the packet in the Rx FIFO */
-/* Bit masks for USB_TXTYPE */
-#define            TARGET_EP_NO_T  0xf        /* EP number */
-#define                PROTOCOL_T  0xc        /* transfer type */
-/* Bit masks for USB_TXINTERVAL */
-#define          TX_POLL_INTERVAL  0xff       /* polling interval for selected Tx EP */
-/* Bit masks for USB_RXTYPE */
-#define            TARGET_EP_NO_R  0xf        /* EP number */
-#define                PROTOCOL_R  0xc        /* transfer type */
-/* Bit masks for USB_RXINTERVAL */
-#define          RX_POLL_INTERVAL  0xff       /* polling interval for selected Rx EP */
-/* Bit masks for USB_DMA_INTERRUPT */
-#define                  DMA0_INT  0x1        /* DMA0 pending interrupt */
-#define                  DMA1_INT  0x2        /* DMA1 pending interrupt */
-#define                  DMA2_INT  0x4        /* DMA2 pending interrupt */
-#define                  DMA3_INT  0x8        /* DMA3 pending interrupt */
-#define                  DMA4_INT  0x10       /* DMA4 pending interrupt */
-#define                  DMA5_INT  0x20       /* DMA5 pending interrupt */
-#define                  DMA6_INT  0x40       /* DMA6 pending interrupt */
-#define                  DMA7_INT  0x80       /* DMA7 pending interrupt */
-/* Bit masks for USB_DMAxCONTROL */
-#define                   DMA_ENA  0x1        /* DMA enable */
-#define                 DIRECTION  0x2        /* direction of DMA transfer */
-#define                      MODE  0x4        /* DMA Bus error */
-#define                   INT_ENA  0x8        /* Interrupt enable */
-#define                     EPNUM  0xf0       /* EP number */
-#define                  BUSERROR  0x100      /* DMA Bus error */
-/* Bit masks for USB_DMAxADDRHIGH */
-#define             DMA_ADDR_HIGH  0xffff     /* Upper 16-bits of memory source/destination address for the DMA master channel */
-/* Bit masks for USB_DMAxADDRLOW */
-#define              DMA_ADDR_LOW  0xffff     /* Lower 16-bits of memory source/destination address for the DMA master channel */
-/* Bit masks for USB_DMAxCOUNTHIGH */
-#define            DMA_COUNT_HIGH  0xffff     /* Upper 16-bits of byte count of DMA transfer for DMA master channel */
-/* Bit masks for USB_DMAxCOUNTLOW */
-#define             DMA_COUNT_LOW  0xffff     /* Lower 16-bits of byte count of DMA transfer for DMA master channel */
-/* Bit masks for HMDMAx_CONTROL */
-#define                   HMDMAEN  0x1        /* Handshake MDMA Enable */
-#define                       REP  0x2        /* Handshake MDMA Request Polarity */
-#define                       UTE  0x8        /* Urgency Threshold Enable */
-#define                       OIE  0x10       /* Overflow Interrupt Enable */
-#define                      BDIE  0x20       /* Block Done Interrupt Enable */
-#define                      MBDI  0x40       /* Mask Block Done Interrupt */
-#define                       DRQ  0x300      /* Handshake MDMA Request Type */
-#define                       RBC  0x1000     /* Force Reload of BCOUNT */
-#define                        PS  0x2000     /* Pin Status */
-#define                        OI  0x4000     /* Overflow Interrupt Generated */
-#define                       BDI  0x8000     /* Block Done Interrupt Generated */
-/* ******************************************* */
-/*     MULTI BIT MACRO ENUMERATIONS            */
-/* ******************************************* */
 #endif /* _DEF_BF548_H */
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF549.h b/arch/blackfin/mach-bf548/include/mach/defBF549.h
index f7f043560c6f..5a04e6d4017e 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF549.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF549.h
@@ -10,121 +10,13 @@
 /* Include all Core registers and bit definitions */
 #include <asm/def_LPBlackfin.h>
 /* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF549 */
 /* Include defBF54x_base.h for the set of #defines that are common to all ADSP-BF54x processors */
 #include "defBF54x_base.h"
-/* The following are the #defines needed by ADSP-BF549 that are not in the common header */
+/* The BF549 is like the BF544, but has MXVR */
+#include "defBF547.h"
-/* Timer Registers */
-#define                    TIMER8_CONFIG  0xffc00600   /* Timer 8 Configuration Register */
-#define                   TIMER8_COUNTER  0xffc00604   /* Timer 8 Counter Register */
-#define                    TIMER8_PERIOD  0xffc00608   /* Timer 8 Period Register */
-#define                     TIMER8_WIDTH  0xffc0060c   /* Timer 8 Width Register */
-#define                    TIMER9_CONFIG  0xffc00610   /* Timer 9 Configuration Register */
-#define                   TIMER9_COUNTER  0xffc00614   /* Timer 9 Counter Register */
-#define                    TIMER9_PERIOD  0xffc00618   /* Timer 9 Period Register */
-#define                     TIMER9_WIDTH  0xffc0061c   /* Timer 9 Width Register */
-#define                   TIMER10_CONFIG  0xffc00620   /* Timer 10 Configuration Register */
-#define                  TIMER10_COUNTER  0xffc00624   /* Timer 10 Counter Register */
-#define                   TIMER10_PERIOD  0xffc00628   /* Timer 10 Period Register */
-#define                    TIMER10_WIDTH  0xffc0062c   /* Timer 10 Width Register */
-/* Timer Group of 3 Registers */
-#define                    TIMER_ENABLE1  0xffc00640   /* Timer Group of 3 Enable Register */
-#define                   TIMER_DISABLE1  0xffc00644   /* Timer Group of 3 Disable Register */
-#define                    TIMER_STATUS1  0xffc00648   /* Timer Group of 3 Status Register */
-/* SPORT0 Registers */
-#define                      SPORT0_TCR1  0xffc00800   /* SPORT0 Transmit Configuration 1 Register */
-#define                      SPORT0_TCR2  0xffc00804   /* SPORT0 Transmit Configuration 2 Register */
-#define                   SPORT0_TCLKDIV  0xffc00808   /* SPORT0 Transmit Serial Clock Divider Register */
-#define                    SPORT0_TFSDIV  0xffc0080c   /* SPORT0 Transmit Frame Sync Divider Register */
-#define                        SPORT0_TX  0xffc00810   /* SPORT0 Transmit Data Register */
-#define                        SPORT0_RX  0xffc00818   /* SPORT0 Receive Data Register */
-#define                      SPORT0_RCR1  0xffc00820   /* SPORT0 Receive Configuration 1 Register */
-#define                      SPORT0_RCR2  0xffc00824   /* SPORT0 Receive Configuration 2 Register */
-#define                   SPORT0_RCLKDIV  0xffc00828   /* SPORT0 Receive Serial Clock Divider Register */
-#define                    SPORT0_RFSDIV  0xffc0082c   /* SPORT0 Receive Frame Sync Divider Register */
-#define                      SPORT0_STAT  0xffc00830   /* SPORT0 Status Register */
-#define                      SPORT0_CHNL  0xffc00834   /* SPORT0 Current Channel Register */
-#define                     SPORT0_MCMC1  0xffc00838   /* SPORT0 Multi channel Configuration Register 1 */
-#define                     SPORT0_MCMC2  0xffc0083c   /* SPORT0 Multi channel Configuration Register 2 */
-#define                     SPORT0_MTCS0  0xffc00840   /* SPORT0 Multi channel Transmit Select Register 0 */
-#define                     SPORT0_MTCS1  0xffc00844   /* SPORT0 Multi channel Transmit Select Register 1 */
-#define                     SPORT0_MTCS2  0xffc00848   /* SPORT0 Multi channel Transmit Select Register 2 */
-#define                     SPORT0_MTCS3  0xffc0084c   /* SPORT0 Multi channel Transmit Select Register 3 */
-#define                     SPORT0_MRCS0  0xffc00850   /* SPORT0 Multi channel Receive Select Register 0 */
-#define                     SPORT0_MRCS1  0xffc00854   /* SPORT0 Multi channel Receive Select Register 1 */
-#define                     SPORT0_MRCS2  0xffc00858   /* SPORT0 Multi channel Receive Select Register 2 */
-#define                     SPORT0_MRCS3  0xffc0085c   /* SPORT0 Multi channel Receive Select Register 3 */
-/* EPPI0 Registers */
-#define                     EPPI0_STATUS  0xffc01000   /* EPPI0 Status Register */
-#define                     EPPI0_HCOUNT  0xffc01004   /* EPPI0 Horizontal Transfer Count Register */
-#define                     EPPI0_HDELAY  0xffc01008   /* EPPI0 Horizontal Delay Count Register */
-#define                     EPPI0_VCOUNT  0xffc0100c   /* EPPI0 Vertical Transfer Count Register */
-#define                     EPPI0_VDELAY  0xffc01010   /* EPPI0 Vertical Delay Count Register */
-#define                      EPPI0_FRAME  0xffc01014   /* EPPI0 Lines per Frame Register */
-#define                       EPPI0_LINE  0xffc01018   /* EPPI0 Samples per Line Register */
-#define                     EPPI0_CLKDIV  0xffc0101c   /* EPPI0 Clock Divide Register */
-#define                    EPPI0_CONTROL  0xffc01020   /* EPPI0 Control Register */
-#define                   EPPI0_FS1W_HBL  0xffc01024   /* EPPI0 FS1 Width Register / EPPI0 Horizontal Blanking Samples Per Line Register */
-#define                  EPPI0_FS1P_AVPL  0xffc01028   /* EPPI0 FS1 Period Register / EPPI0 Active Video Samples Per Line Register */
-#define                   EPPI0_FS2W_LVB  0xffc0102c   /* EPPI0 FS2 Width Register / EPPI0 Lines of Vertical Blanking Register */
-#define                  EPPI0_FS2P_LAVF  0xffc01030   /* EPPI0 FS2 Period Register/ EPPI0 Lines of Active Video Per Field Register */
-#define                       EPPI0_CLIP  0xffc01034   /* EPPI0 Clipping Register */
-/* UART2 Registers */
-#define                        UART2_DLL  0xffc02100   /* Divisor Latch Low Byte */
-#define                        UART2_DLH  0xffc02104   /* Divisor Latch High Byte */
-#define                       UART2_GCTL  0xffc02108   /* Global Control Register */
-#define                        UART2_LCR  0xffc0210c   /* Line Control Register */
-#define                        UART2_MCR  0xffc02110   /* Modem Control Register */
-#define                        UART2_LSR  0xffc02114   /* Line Status Register */
-#define                        UART2_MSR  0xffc02118   /* Modem Status Register */
-#define                        UART2_SCR  0xffc0211c   /* Scratch Register */
-#define                    UART2_IER_SET  0xffc02120   /* Interrupt Enable Register Set */
-#define                  UART2_IER_CLEAR  0xffc02124   /* Interrupt Enable Register Clear */
-#define                        UART2_RBR  0xffc0212c   /* Receive Buffer Register */
-/* Two Wire Interface Registers (TWI1) */
-#define                     TWI1_REGBASE  0xffc02200
-#define                      TWI1_CLKDIV  0xffc02200   /* Clock Divider Register */
-#define                     TWI1_CONTROL  0xffc02204   /* TWI Control Register */
-#define                  TWI1_SLAVE_CTRL  0xffc02208   /* TWI Slave Mode Control Register */
-#define                  TWI1_SLAVE_STAT  0xffc0220c   /* TWI Slave Mode Status Register */
-#define                  TWI1_SLAVE_ADDR  0xffc02210   /* TWI Slave Mode Address Register */
-#define                 TWI1_MASTER_CTRL  0xffc02214   /* TWI Master Mode Control Register */
-#define                 TWI1_MASTER_STAT  0xffc02218   /* TWI Master Mode Status Register */
-#define                 TWI1_MASTER_ADDR  0xffc0221c   /* TWI Master Mode Address Register */
-#define                    TWI1_INT_STAT  0xffc02220   /* TWI Interrupt Status Register */
-#define                    TWI1_INT_MASK  0xffc02224   /* TWI Interrupt Mask Register */
-#define                   TWI1_FIFO_CTRL  0xffc02228   /* TWI FIFO Control Register */
-#define                   TWI1_FIFO_STAT  0xffc0222c   /* TWI FIFO Status Register */
-#define                   TWI1_XMT_DATA8  0xffc02280   /* TWI FIFO Transmit Data Single Byte Register */
-#define                  TWI1_XMT_DATA16  0xffc02284   /* TWI FIFO Transmit Data Double Byte Register */
-#define                   TWI1_RCV_DATA8  0xffc02288   /* TWI FIFO Receive Data Single Byte Register */
-#define                  TWI1_RCV_DATA16  0xffc0228c   /* TWI FIFO Receive Data Double Byte Register */
-/* SPI2  Registers */
-#define                     SPI2_REGBASE  0xffc02400
-#define                         SPI2_CTL  0xffc02400   /* SPI2 Control Register */
-#define                         SPI2_FLG  0xffc02404   /* SPI2 Flag Register */
-#define                        SPI2_STAT  0xffc02408   /* SPI2 Status Register */
-#define                        SPI2_TDBR  0xffc0240c   /* SPI2 Transmit Data Buffer Register */
-#define                        SPI2_RDBR  0xffc02410   /* SPI2 Receive Data Buffer Register */
-#define                        SPI2_BAUD  0xffc02414   /* SPI2 Baud Rate Register */
-#define                      SPI2_SHADOW  0xffc02418   /* SPI2 Receive Data Buffer Shadow Register */
 /* MXVR Registers */
@@ -296,2418 +188,4 @@
 #define                     MXVR_PIN_CTL  0xffc028dc   /* MXVR Pin Control Register */
 #define                    MXVR_SCLK_CNT  0xffc028e0   /* MXVR System Clock Counter Register */
-/* CAN Controller 1 Config 1 Registers */
-#define                         CAN1_MC1  0xffc03200   /* CAN Controller 1 Mailbox Configuration Register 1 */
-#define                         CAN1_MD1  0xffc03204   /* CAN Controller 1 Mailbox Direction Register 1 */
-#define                        CAN1_TRS1  0xffc03208   /* CAN Controller 1 Transmit Request Set Register 1 */
-#define                        CAN1_TRR1  0xffc0320c   /* CAN Controller 1 Transmit Request Reset Register 1 */
-#define                         CAN1_TA1  0xffc03210   /* CAN Controller 1 Transmit Acknowledge Register 1 */
-#define                         CAN1_AA1  0xffc03214   /* CAN Controller 1 Abort Acknowledge Register 1 */
-#define                        CAN1_RMP1  0xffc03218   /* CAN Controller 1 Receive Message Pending Register 1 */
-#define                        CAN1_RML1  0xffc0321c   /* CAN Controller 1 Receive Message Lost Register 1 */
-#define                      CAN1_MBTIF1  0xffc03220   /* CAN Controller 1 Mailbox Transmit Interrupt Flag Register 1 */
-#define                      CAN1_MBRIF1  0xffc03224   /* CAN Controller 1 Mailbox Receive Interrupt Flag Register 1 */
-#define                       CAN1_MBIM1  0xffc03228   /* CAN Controller 1 Mailbox Interrupt Mask Register 1 */
-#define                        CAN1_RFH1  0xffc0322c   /* CAN Controller 1 Remote Frame Handling Enable Register 1 */
-#define                       CAN1_OPSS1  0xffc03230   /* CAN Controller 1 Overwrite Protection Single Shot Transmit Register 1 */
-/* CAN Controller 1 Config 2 Registers */
-#define                         CAN1_MC2  0xffc03240   /* CAN Controller 1 Mailbox Configuration Register 2 */
-#define                         CAN1_MD2  0xffc03244   /* CAN Controller 1 Mailbox Direction Register 2 */
-#define                        CAN1_TRS2  0xffc03248   /* CAN Controller 1 Transmit Request Set Register 2 */
-#define                        CAN1_TRR2  0xffc0324c   /* CAN Controller 1 Transmit Request Reset Register 2 */
-#define                         CAN1_TA2  0xffc03250   /* CAN Controller 1 Transmit Acknowledge Register 2 */
-#define                         CAN1_AA2  0xffc03254   /* CAN Controller 1 Abort Acknowledge Register 2 */
-#define                        CAN1_RMP2  0xffc03258   /* CAN Controller 1 Receive Message Pending Register 2 */
-#define                        CAN1_RML2  0xffc0325c   /* CAN Controller 1 Receive Message Lost Register 2 */
-#define                      CAN1_MBTIF2  0xffc03260   /* CAN Controller 1 Mailbox Transmit Interrupt Flag Register 2 */
-#define                      CAN1_MBRIF2  0xffc03264   /* CAN Controller 1 Mailbox Receive Interrupt Flag Register 2 */
-#define                       CAN1_MBIM2  0xffc03268   /* CAN Controller 1 Mailbox Interrupt Mask Register 2 */
-#define                        CAN1_RFH2  0xffc0326c   /* CAN Controller 1 Remote Frame Handling Enable Register 2 */
-#define                       CAN1_OPSS2  0xffc03270   /* CAN Controller 1 Overwrite Protection Single Shot Transmit Register 2 */
-/* CAN Controller 1 Clock/Interrupt/Counter Registers */
-#define                       CAN1_CLOCK  0xffc03280   /* CAN Controller 1 Clock Register */
-#define                      CAN1_TIMING  0xffc03284   /* CAN Controller 1 Timing Register */
-#define                       CAN1_DEBUG  0xffc03288   /* CAN Controller 1 Debug Register */
-#define                      CAN1_STATUS  0xffc0328c   /* CAN Controller 1 Global Status Register */
-#define                         CAN1_CEC  0xffc03290   /* CAN Controller 1 Error Counter Register */
-#define                         CAN1_GIS  0xffc03294   /* CAN Controller 1 Global Interrupt Status Register */
-#define                         CAN1_GIM  0xffc03298   /* CAN Controller 1 Global Interrupt Mask Register */
-#define                         CAN1_GIF  0xffc0329c   /* CAN Controller 1 Global Interrupt Flag Register */
-#define                     CAN1_CONTROL  0xffc032a0   /* CAN Controller 1 Master Control Register */
-#define                        CAN1_INTR  0xffc032a4   /* CAN Controller 1 Interrupt Pending Register */
-#define                        CAN1_MBTD  0xffc032ac   /* CAN Controller 1 Mailbox Temporary Disable Register */
-#define                         CAN1_EWR  0xffc032b0   /* CAN Controller 1 Programmable Warning Level Register */
-#define                         CAN1_ESR  0xffc032b4   /* CAN Controller 1 Error Status Register */
-#define                       CAN1_UCCNT  0xffc032c4   /* CAN Controller 1 Universal Counter Register */
-#define                        CAN1_UCRC  0xffc032c8   /* CAN Controller 1 Universal Counter Force Reload Register */
-#define                       CAN1_UCCNF  0xffc032cc   /* CAN Controller 1 Universal Counter Configuration Register */
-/* CAN Controller 1 Mailbox Acceptance Registers */
-#define                       CAN1_AM00L  0xffc03300   /* CAN Controller 1 Mailbox 0 Acceptance Mask High Register */
-#define                       CAN1_AM00H  0xffc03304   /* CAN Controller 1 Mailbox 0 Acceptance Mask Low Register */
-#define                       CAN1_AM01L  0xffc03308   /* CAN Controller 1 Mailbox 1 Acceptance Mask High Register */
-#define                       CAN1_AM01H  0xffc0330c   /* CAN Controller 1 Mailbox 1 Acceptance Mask Low Register */
-#define                       CAN1_AM02L  0xffc03310   /* CAN Controller 1 Mailbox 2 Acceptance Mask High Register */
-#define                       CAN1_AM02H  0xffc03314   /* CAN Controller 1 Mailbox 2 Acceptance Mask Low Register */
-#define                       CAN1_AM03L  0xffc03318   /* CAN Controller 1 Mailbox 3 Acceptance Mask High Register */
-#define                       CAN1_AM03H  0xffc0331c   /* CAN Controller 1 Mailbox 3 Acceptance Mask Low Register */
-#define                       CAN1_AM04L  0xffc03320   /* CAN Controller 1 Mailbox 4 Acceptance Mask High Register */
-#define                       CAN1_AM04H  0xffc03324   /* CAN Controller 1 Mailbox 4 Acceptance Mask Low Register */
-#define                       CAN1_AM05L  0xffc03328   /* CAN Controller 1 Mailbox 5 Acceptance Mask High Register */
-#define                       CAN1_AM05H  0xffc0332c   /* CAN Controller 1 Mailbox 5 Acceptance Mask Low Register */
-#define                       CAN1_AM06L  0xffc03330   /* CAN Controller 1 Mailbox 6 Acceptance Mask High Register */
-#define                       CAN1_AM06H  0xffc03334   /* CAN Controller 1 Mailbox 6 Acceptance Mask Low Register */
-#define                       CAN1_AM07L  0xffc03338   /* CAN Controller 1 Mailbox 7 Acceptance Mask High Register */
-#define                       CAN1_AM07H  0xffc0333c   /* CAN Controller 1 Mailbox 7 Acceptance Mask Low Register */
-#define                       CAN1_AM08L  0xffc03340   /* CAN Controller 1 Mailbox 8 Acceptance Mask High Register */
-#define                       CAN1_AM08H  0xffc03344   /* CAN Controller 1 Mailbox 8 Acceptance Mask Low Register */
-#define                       CAN1_AM09L  0xffc03348   /* CAN Controller 1 Mailbox 9 Acceptance Mask High Register */
-#define                       CAN1_AM09H  0xffc0334c   /* CAN Controller 1 Mailbox 9 Acceptance Mask Low Register */
-#define                       CAN1_AM10L  0xffc03350   /* CAN Controller 1 Mailbox 10 Acceptance Mask High Register */
-#define                       CAN1_AM10H  0xffc03354   /* CAN Controller 1 Mailbox 10 Acceptance Mask Low Register */
-#define                       CAN1_AM11L  0xffc03358   /* CAN Controller 1 Mailbox 11 Acceptance Mask High Register */
-#define                       CAN1_AM11H  0xffc0335c   /* CAN Controller 1 Mailbox 11 Acceptance Mask Low Register */
-#define                       CAN1_AM12L  0xffc03360   /* CAN Controller 1 Mailbox 12 Acceptance Mask High Register */
-#define                       CAN1_AM12H  0xffc03364   /* CAN Controller 1 Mailbox 12 Acceptance Mask Low Register */
-#define                       CAN1_AM13L  0xffc03368   /* CAN Controller 1 Mailbox 13 Acceptance Mask High Register */
-#define                       CAN1_AM13H  0xffc0336c   /* CAN Controller 1 Mailbox 13 Acceptance Mask Low Register */
-#define                       CAN1_AM14L  0xffc03370   /* CAN Controller 1 Mailbox 14 Acceptance Mask High Register */
-#define                       CAN1_AM14H  0xffc03374   /* CAN Controller 1 Mailbox 14 Acceptance Mask Low Register */
-#define                       CAN1_AM15L  0xffc03378   /* CAN Controller 1 Mailbox 15 Acceptance Mask High Register */
-#define                       CAN1_AM15H  0xffc0337c   /* CAN Controller 1 Mailbox 15 Acceptance Mask Low Register */
-/* CAN Controller 1 Mailbox Acceptance Registers */
-#define                       CAN1_AM16L  0xffc03380   /* CAN Controller 1 Mailbox 16 Acceptance Mask High Register */
-#define                       CAN1_AM16H  0xffc03384   /* CAN Controller 1 Mailbox 16 Acceptance Mask Low Register */
-#define                       CAN1_AM17L  0xffc03388   /* CAN Controller 1 Mailbox 17 Acceptance Mask High Register */
-#define                       CAN1_AM17H  0xffc0338c   /* CAN Controller 1 Mailbox 17 Acceptance Mask Low Register */
-#define                       CAN1_AM18L  0xffc03390   /* CAN Controller 1 Mailbox 18 Acceptance Mask High Register */
-#define                       CAN1_AM18H  0xffc03394   /* CAN Controller 1 Mailbox 18 Acceptance Mask Low Register */
-#define                       CAN1_AM19L  0xffc03398   /* CAN Controller 1 Mailbox 19 Acceptance Mask High Register */
-#define                       CAN1_AM19H  0xffc0339c   /* CAN Controller 1 Mailbox 19 Acceptance Mask Low Register */
-#define                       CAN1_AM20L  0xffc033a0   /* CAN Controller 1 Mailbox 20 Acceptance Mask High Register */
-#define                       CAN1_AM20H  0xffc033a4   /* CAN Controller 1 Mailbox 20 Acceptance Mask Low Register */
-#define                       CAN1_AM21L  0xffc033a8   /* CAN Controller 1 Mailbox 21 Acceptance Mask High Register */
-#define                       CAN1_AM21H  0xffc033ac   /* CAN Controller 1 Mailbox 21 Acceptance Mask Low Register */
-#define                       CAN1_AM22L  0xffc033b0   /* CAN Controller 1 Mailbox 22 Acceptance Mask High Register */
-#define                       CAN1_AM22H  0xffc033b4   /* CAN Controller 1 Mailbox 22 Acceptance Mask Low Register */
-#define                       CAN1_AM23L  0xffc033b8   /* CAN Controller 1 Mailbox 23 Acceptance Mask High Register */
-#define                       CAN1_AM23H  0xffc033bc   /* CAN Controller 1 Mailbox 23 Acceptance Mask Low Register */
-#define                       CAN1_AM24L  0xffc033c0   /* CAN Controller 1 Mailbox 24 Acceptance Mask High Register */
-#define                       CAN1_AM24H  0xffc033c4   /* CAN Controller 1 Mailbox 24 Acceptance Mask Low Register */
-#define                       CAN1_AM25L  0xffc033c8   /* CAN Controller 1 Mailbox 25 Acceptance Mask High Register */
-#define                       CAN1_AM25H  0xffc033cc   /* CAN Controller 1 Mailbox 25 Acceptance Mask Low Register */
-#define                       CAN1_AM26L  0xffc033d0   /* CAN Controller 1 Mailbox 26 Acceptance Mask High Register */
-#define                       CAN1_AM26H  0xffc033d4   /* CAN Controller 1 Mailbox 26 Acceptance Mask Low Register */
-#define                       CAN1_AM27L  0xffc033d8   /* CAN Controller 1 Mailbox 27 Acceptance Mask High Register */
-#define                       CAN1_AM27H  0xffc033dc   /* CAN Controller 1 Mailbox 27 Acceptance Mask Low Register */
-#define                       CAN1_AM28L  0xffc033e0   /* CAN Controller 1 Mailbox 28 Acceptance Mask High Register */
-#define                       CAN1_AM28H  0xffc033e4   /* CAN Controller 1 Mailbox 28 Acceptance Mask Low Register */
-#define                       CAN1_AM29L  0xffc033e8   /* CAN Controller 1 Mailbox 29 Acceptance Mask High Register */
-#define                       CAN1_AM29H  0xffc033ec   /* CAN Controller 1 Mailbox 29 Acceptance Mask Low Register */
-#define                       CAN1_AM30L  0xffc033f0   /* CAN Controller 1 Mailbox 30 Acceptance Mask High Register */
-#define                       CAN1_AM30H  0xffc033f4   /* CAN Controller 1 Mailbox 30 Acceptance Mask Low Register */
-#define                       CAN1_AM31L  0xffc033f8   /* CAN Controller 1 Mailbox 31 Acceptance Mask High Register */
-#define                       CAN1_AM31H  0xffc033fc   /* CAN Controller 1 Mailbox 31 Acceptance Mask Low Register */
-/* CAN Controller 1 Mailbox Data Registers */
-#define                  CAN1_MB00_DATA0  0xffc03400   /* CAN Controller 1 Mailbox 0 Data 0 Register */
-#define                  CAN1_MB00_DATA1  0xffc03404   /* CAN Controller 1 Mailbox 0 Data 1 Register */
-#define                  CAN1_MB00_DATA2  0xffc03408   /* CAN Controller 1 Mailbox 0 Data 2 Register */
-#define                  CAN1_MB00_DATA3  0xffc0340c   /* CAN Controller 1 Mailbox 0 Data 3 Register */
-#define                 CAN1_MB00_LENGTH  0xffc03410   /* CAN Controller 1 Mailbox 0 Length Register */
-#define              CAN1_MB00_TIMESTAMP  0xffc03414   /* CAN Controller 1 Mailbox 0 Timestamp Register */
-#define                    CAN1_MB00_ID0  0xffc03418   /* CAN Controller 1 Mailbox 0 ID0 Register */
-#define                    CAN1_MB00_ID1  0xffc0341c   /* CAN Controller 1 Mailbox 0 ID1 Register */
-#define                  CAN1_MB01_DATA0  0xffc03420   /* CAN Controller 1 Mailbox 1 Data 0 Register */
-#define                  CAN1_MB01_DATA1  0xffc03424   /* CAN Controller 1 Mailbox 1 Data 1 Register */
-#define                  CAN1_MB01_DATA2  0xffc03428   /* CAN Controller 1 Mailbox 1 Data 2 Register */
-#define                  CAN1_MB01_DATA3  0xffc0342c   /* CAN Controller 1 Mailbox 1 Data 3 Register */
-#define                 CAN1_MB01_LENGTH  0xffc03430   /* CAN Controller 1 Mailbox 1 Length Register */
-#define              CAN1_MB01_TIMESTAMP  0xffc03434   /* CAN Controller 1 Mailbox 1 Timestamp Register */
-#define                    CAN1_MB01_ID0  0xffc03438   /* CAN Controller 1 Mailbox 1 ID0 Register */
-#define                    CAN1_MB01_ID1  0xffc0343c   /* CAN Controller 1 Mailbox 1 ID1 Register */
-#define                  CAN1_MB02_DATA0  0xffc03440   /* CAN Controller 1 Mailbox 2 Data 0 Register */
-#define                  CAN1_MB02_DATA1  0xffc03444   /* CAN Controller 1 Mailbox 2 Data 1 Register */
-#define                  CAN1_MB02_DATA2  0xffc03448   /* CAN Controller 1 Mailbox 2 Data 2 Register */
-#define                  CAN1_MB02_DATA3  0xffc0344c   /* CAN Controller 1 Mailbox 2 Data 3 Register */
-#define                 CAN1_MB02_LENGTH  0xffc03450   /* CAN Controller 1 Mailbox 2 Length Register */
-#define              CAN1_MB02_TIMESTAMP  0xffc03454   /* CAN Controller 1 Mailbox 2 Timestamp Register */
-#define                    CAN1_MB02_ID0  0xffc03458   /* CAN Controller 1 Mailbox 2 ID0 Register */
-#define                    CAN1_MB02_ID1  0xffc0345c   /* CAN Controller 1 Mailbox 2 ID1 Register */
-#define                  CAN1_MB03_DATA0  0xffc03460   /* CAN Controller 1 Mailbox 3 Data 0 Register */
-#define                  CAN1_MB03_DATA1  0xffc03464   /* CAN Controller 1 Mailbox 3 Data 1 Register */
-#define                  CAN1_MB03_DATA2  0xffc03468   /* CAN Controller 1 Mailbox 3 Data 2 Register */
-#define                  CAN1_MB03_DATA3  0xffc0346c   /* CAN Controller 1 Mailbox 3 Data 3 Register */
-#define                 CAN1_MB03_LENGTH  0xffc03470   /* CAN Controller 1 Mailbox 3 Length Register */
-#define              CAN1_MB03_TIMESTAMP  0xffc03474   /* CAN Controller 1 Mailbox 3 Timestamp Register */
-#define                    CAN1_MB03_ID0  0xffc03478   /* CAN Controller 1 Mailbox 3 ID0 Register */
-#define                    CAN1_MB03_ID1  0xffc0347c   /* CAN Controller 1 Mailbox 3 ID1 Register */
-#define                  CAN1_MB04_DATA0  0xffc03480   /* CAN Controller 1 Mailbox 4 Data 0 Register */
-#define                  CAN1_MB04_DATA1  0xffc03484   /* CAN Controller 1 Mailbox 4 Data 1 Register */
-#define                  CAN1_MB04_DATA2  0xffc03488   /* CAN Controller 1 Mailbox 4 Data 2 Register */
-#define                  CAN1_MB04_DATA3  0xffc0348c   /* CAN Controller 1 Mailbox 4 Data 3 Register */
-#define                 CAN1_MB04_LENGTH  0xffc03490   /* CAN Controller 1 Mailbox 4 Length Register */
-#define              CAN1_MB04_TIMESTAMP  0xffc03494   /* CAN Controller 1 Mailbox 4 Timestamp Register */
-#define                    CAN1_MB04_ID0  0xffc03498   /* CAN Controller 1 Mailbox 4 ID0 Register */
-#define                    CAN1_MB04_ID1  0xffc0349c   /* CAN Controller 1 Mailbox 4 ID1 Register */
-#define                  CAN1_MB05_DATA0  0xffc034a0   /* CAN Controller 1 Mailbox 5 Data 0 Register */
-#define                  CAN1_MB05_DATA1  0xffc034a4   /* CAN Controller 1 Mailbox 5 Data 1 Register */
-#define                  CAN1_MB05_DATA2  0xffc034a8   /* CAN Controller 1 Mailbox 5 Data 2 Register */
-#define                  CAN1_MB05_DATA3  0xffc034ac   /* CAN Controller 1 Mailbox 5 Data 3 Register */
-#define                 CAN1_MB05_LENGTH  0xffc034b0   /* CAN Controller 1 Mailbox 5 Length Register */
-#define              CAN1_MB05_TIMESTAMP  0xffc034b4   /* CAN Controller 1 Mailbox 5 Timestamp Register */
-#define                    CAN1_MB05_ID0  0xffc034b8   /* CAN Controller 1 Mailbox 5 ID0 Register */
-#define                    CAN1_MB05_ID1  0xffc034bc   /* CAN Controller 1 Mailbox 5 ID1 Register */
-#define                  CAN1_MB06_DATA0  0xffc034c0   /* CAN Controller 1 Mailbox 6 Data 0 Register */
-#define                  CAN1_MB06_DATA1  0xffc034c4   /* CAN Controller 1 Mailbox 6 Data 1 Register */
-#define                  CAN1_MB06_DATA2  0xffc034c8   /* CAN Controller 1 Mailbox 6 Data 2 Register */
-#define                  CAN1_MB06_DATA3  0xffc034cc   /* CAN Controller 1 Mailbox 6 Data 3 Register */
-#define                 CAN1_MB06_LENGTH  0xffc034d0   /* CAN Controller 1 Mailbox 6 Length Register */
-#define              CAN1_MB06_TIMESTAMP  0xffc034d4   /* CAN Controller 1 Mailbox 6 Timestamp Register */
-#define                    CAN1_MB06_ID0  0xffc034d8   /* CAN Controller 1 Mailbox 6 ID0 Register */
-#define                    CAN1_MB06_ID1  0xffc034dc   /* CAN Controller 1 Mailbox 6 ID1 Register */
-#define                  CAN1_MB07_DATA0  0xffc034e0   /* CAN Controller 1 Mailbox 7 Data 0 Register */
-#define                  CAN1_MB07_DATA1  0xffc034e4   /* CAN Controller 1 Mailbox 7 Data 1 Register */
-#define                  CAN1_MB07_DATA2  0xffc034e8   /* CAN Controller 1 Mailbox 7 Data 2 Register */
-#define                  CAN1_MB07_DATA3  0xffc034ec   /* CAN Controller 1 Mailbox 7 Data 3 Register */
-#define                 CAN1_MB07_LENGTH  0xffc034f0   /* CAN Controller 1 Mailbox 7 Length Register */
-#define              CAN1_MB07_TIMESTAMP  0xffc034f4   /* CAN Controller 1 Mailbox 7 Timestamp Register */
-#define                    CAN1_MB07_ID0  0xffc034f8   /* CAN Controller 1 Mailbox 7 ID0 Register */
-#define                    CAN1_MB07_ID1  0xffc034fc   /* CAN Controller 1 Mailbox 7 ID1 Register */
-#define                  CAN1_MB08_DATA0  0xffc03500   /* CAN Controller 1 Mailbox 8 Data 0 Register */
-#define                  CAN1_MB08_DATA1  0xffc03504   /* CAN Controller 1 Mailbox 8 Data 1 Register */
-#define                  CAN1_MB08_DATA2  0xffc03508   /* CAN Controller 1 Mailbox 8 Data 2 Register */
-#define                  CAN1_MB08_DATA3  0xffc0350c   /* CAN Controller 1 Mailbox 8 Data 3 Register */
-#define                 CAN1_MB08_LENGTH  0xffc03510   /* CAN Controller 1 Mailbox 8 Length Register */
-#define              CAN1_MB08_TIMESTAMP  0xffc03514   /* CAN Controller 1 Mailbox 8 Timestamp Register */
-#define                    CAN1_MB08_ID0  0xffc03518   /* CAN Controller 1 Mailbox 8 ID0 Register */
-#define                    CAN1_MB08_ID1  0xffc0351c   /* CAN Controller 1 Mailbox 8 ID1 Register */
-#define                  CAN1_MB09_DATA0  0xffc03520   /* CAN Controller 1 Mailbox 9 Data 0 Register */
-#define                  CAN1_MB09_DATA1  0xffc03524   /* CAN Controller 1 Mailbox 9 Data 1 Register */
-#define                  CAN1_MB09_DATA2  0xffc03528   /* CAN Controller 1 Mailbox 9 Data 2 Register */
-#define                  CAN1_MB09_DATA3  0xffc0352c   /* CAN Controller 1 Mailbox 9 Data 3 Register */
-#define                 CAN1_MB09_LENGTH  0xffc03530   /* CAN Controller 1 Mailbox 9 Length Register */
-#define              CAN1_MB09_TIMESTAMP  0xffc03534   /* CAN Controller 1 Mailbox 9 Timestamp Register */
-#define                    CAN1_MB09_ID0  0xffc03538   /* CAN Controller 1 Mailbox 9 ID0 Register */
-#define                    CAN1_MB09_ID1  0xffc0353c   /* CAN Controller 1 Mailbox 9 ID1 Register */
-#define                  CAN1_MB10_DATA0  0xffc03540   /* CAN Controller 1 Mailbox 10 Data 0 Register */
-#define                  CAN1_MB10_DATA1  0xffc03544   /* CAN Controller 1 Mailbox 10 Data 1 Register */
-#define                  CAN1_MB10_DATA2  0xffc03548   /* CAN Controller 1 Mailbox 10 Data 2 Register */
-#define                  CAN1_MB10_DATA3  0xffc0354c   /* CAN Controller 1 Mailbox 10 Data 3 Register */
-#define                 CAN1_MB10_LENGTH  0xffc03550   /* CAN Controller 1 Mailbox 10 Length Register */
-#define              CAN1_MB10_TIMESTAMP  0xffc03554   /* CAN Controller 1 Mailbox 10 Timestamp Register */
-#define                    CAN1_MB10_ID0  0xffc03558   /* CAN Controller 1 Mailbox 10 ID0 Register */
-#define                    CAN1_MB10_ID1  0xffc0355c   /* CAN Controller 1 Mailbox 10 ID1 Register */
-#define                  CAN1_MB11_DATA0  0xffc03560   /* CAN Controller 1 Mailbox 11 Data 0 Register */
-#define                  CAN1_MB11_DATA1  0xffc03564   /* CAN Controller 1 Mailbox 11 Data 1 Register */
-#define                  CAN1_MB11_DATA2  0xffc03568   /* CAN Controller 1 Mailbox 11 Data 2 Register */
-#define                  CAN1_MB11_DATA3  0xffc0356c   /* CAN Controller 1 Mailbox 11 Data 3 Register */
-#define                 CAN1_MB11_LENGTH  0xffc03570   /* CAN Controller 1 Mailbox 11 Length Register */
-#define              CAN1_MB11_TIMESTAMP  0xffc03574   /* CAN Controller 1 Mailbox 11 Timestamp Register */
-#define                    CAN1_MB11_ID0  0xffc03578   /* CAN Controller 1 Mailbox 11 ID0 Register */
-#define                    CAN1_MB11_ID1  0xffc0357c   /* CAN Controller 1 Mailbox 11 ID1 Register */
-#define                  CAN1_MB12_DATA0  0xffc03580   /* CAN Controller 1 Mailbox 12 Data 0 Register */
-#define                  CAN1_MB12_DATA1  0xffc03584   /* CAN Controller 1 Mailbox 12 Data 1 Register */
-#define                  CAN1_MB12_DATA2  0xffc03588   /* CAN Controller 1 Mailbox 12 Data 2 Register */
-#define                  CAN1_MB12_DATA3  0xffc0358c   /* CAN Controller 1 Mailbox 12 Data 3 Register */
-#define                 CAN1_MB12_LENGTH  0xffc03590   /* CAN Controller 1 Mailbox 12 Length Register */
-#define              CAN1_MB12_TIMESTAMP  0xffc03594   /* CAN Controller 1 Mailbox 12 Timestamp Register */
-#define                    CAN1_MB12_ID0  0xffc03598   /* CAN Controller 1 Mailbox 12 ID0 Register */
-#define                    CAN1_MB12_ID1  0xffc0359c   /* CAN Controller 1 Mailbox 12 ID1 Register */
-#define                  CAN1_MB13_DATA0  0xffc035a0   /* CAN Controller 1 Mailbox 13 Data 0 Register */
-#define                  CAN1_MB13_DATA1  0xffc035a4   /* CAN Controller 1 Mailbox 13 Data 1 Register */
-#define                  CAN1_MB13_DATA2  0xffc035a8   /* CAN Controller 1 Mailbox 13 Data 2 Register */
-#define                  CAN1_MB13_DATA3  0xffc035ac   /* CAN Controller 1 Mailbox 13 Data 3 Register */
-#define                 CAN1_MB13_LENGTH  0xffc035b0   /* CAN Controller 1 Mailbox 13 Length Register */
-#define              CAN1_MB13_TIMESTAMP  0xffc035b4   /* CAN Controller 1 Mailbox 13 Timestamp Register */
-#define                    CAN1_MB13_ID0  0xffc035b8   /* CAN Controller 1 Mailbox 13 ID0 Register */
-#define                    CAN1_MB13_ID1  0xffc035bc   /* CAN Controller 1 Mailbox 13 ID1 Register */
-#define                  CAN1_MB14_DATA0  0xffc035c0   /* CAN Controller 1 Mailbox 14 Data 0 Register */
-#define                  CAN1_MB14_DATA1  0xffc035c4   /* CAN Controller 1 Mailbox 14 Data 1 Register */
-#define                  CAN1_MB14_DATA2  0xffc035c8   /* CAN Controller 1 Mailbox 14 Data 2 Register */
-#define                  CAN1_MB14_DATA3  0xffc035cc   /* CAN Controller 1 Mailbox 14 Data 3 Register */
-#define                 CAN1_MB14_LENGTH  0xffc035d0   /* CAN Controller 1 Mailbox 14 Length Register */
-#define              CAN1_MB14_TIMESTAMP  0xffc035d4   /* CAN Controller 1 Mailbox 14 Timestamp Register */
-#define                    CAN1_MB14_ID0  0xffc035d8   /* CAN Controller 1 Mailbox 14 ID0 Register */
-#define                    CAN1_MB14_ID1  0xffc035dc   /* CAN Controller 1 Mailbox 14 ID1 Register */
-#define                  CAN1_MB15_DATA0  0xffc035e0   /* CAN Controller 1 Mailbox 15 Data 0 Register */
-#define                  CAN1_MB15_DATA1  0xffc035e4   /* CAN Controller 1 Mailbox 15 Data 1 Register */
-#define                  CAN1_MB15_DATA2  0xffc035e8   /* CAN Controller 1 Mailbox 15 Data 2 Register */
-#define                  CAN1_MB15_DATA3  0xffc035ec   /* CAN Controller 1 Mailbox 15 Data 3 Register */
-#define                 CAN1_MB15_LENGTH  0xffc035f0   /* CAN Controller 1 Mailbox 15 Length Register */
-#define              CAN1_MB15_TIMESTAMP  0xffc035f4   /* CAN Controller 1 Mailbox 15 Timestamp Register */
-#define                    CAN1_MB15_ID0  0xffc035f8   /* CAN Controller 1 Mailbox 15 ID0 Register */
-#define                    CAN1_MB15_ID1  0xffc035fc   /* CAN Controller 1 Mailbox 15 ID1 Register */
-/* CAN Controller 1 Mailbox Data Registers */
-#define                  CAN1_MB16_DATA0  0xffc03600   /* CAN Controller 1 Mailbox 16 Data 0 Register */
-#define                  CAN1_MB16_DATA1  0xffc03604   /* CAN Controller 1 Mailbox 16 Data 1 Register */
-#define                  CAN1_MB16_DATA2  0xffc03608   /* CAN Controller 1 Mailbox 16 Data 2 Register */
-#define                  CAN1_MB16_DATA3  0xffc0360c   /* CAN Controller 1 Mailbox 16 Data 3 Register */
-#define                 CAN1_MB16_LENGTH  0xffc03610   /* CAN Controller 1 Mailbox 16 Length Register */
-#define              CAN1_MB16_TIMESTAMP  0xffc03614   /* CAN Controller 1 Mailbox 16 Timestamp Register */
-#define                    CAN1_MB16_ID0  0xffc03618   /* CAN Controller 1 Mailbox 16 ID0 Register */
-#define                    CAN1_MB16_ID1  0xffc0361c   /* CAN Controller 1 Mailbox 16 ID1 Register */
-#define                  CAN1_MB17_DATA0  0xffc03620   /* CAN Controller 1 Mailbox 17 Data 0 Register */
-#define                  CAN1_MB17_DATA1  0xffc03624   /* CAN Controller 1 Mailbox 17 Data 1 Register */
-#define                  CAN1_MB17_DATA2  0xffc03628   /* CAN Controller 1 Mailbox 17 Data 2 Register */
-#define                  CAN1_MB17_DATA3  0xffc0362c   /* CAN Controller 1 Mailbox 17 Data 3 Register */
-#define                 CAN1_MB17_LENGTH  0xffc03630   /* CAN Controller 1 Mailbox 17 Length Register */
-#define              CAN1_MB17_TIMESTAMP  0xffc03634   /* CAN Controller 1 Mailbox 17 Timestamp Register */
-#define                    CAN1_MB17_ID0  0xffc03638   /* CAN Controller 1 Mailbox 17 ID0 Register */
-#define                    CAN1_MB17_ID1  0xffc0363c   /* CAN Controller 1 Mailbox 17 ID1 Register */
-#define                  CAN1_MB18_DATA0  0xffc03640   /* CAN Controller 1 Mailbox 18 Data 0 Register */
-#define                  CAN1_MB18_DATA1  0xffc03644   /* CAN Controller 1 Mailbox 18 Data 1 Register */
-#define                  CAN1_MB18_DATA2  0xffc03648   /* CAN Controller 1 Mailbox 18 Data 2 Register */
-#define                  CAN1_MB18_DATA3  0xffc0364c   /* CAN Controller 1 Mailbox 18 Data 3 Register */
-#define                 CAN1_MB18_LENGTH  0xffc03650   /* CAN Controller 1 Mailbox 18 Length Register */
-#define              CAN1_MB18_TIMESTAMP  0xffc03654   /* CAN Controller 1 Mailbox 18 Timestamp Register */
-#define                    CAN1_MB18_ID0  0xffc03658   /* CAN Controller 1 Mailbox 18 ID0 Register */
-#define                    CAN1_MB18_ID1  0xffc0365c   /* CAN Controller 1 Mailbox 18 ID1 Register */
-#define                  CAN1_MB19_DATA0  0xffc03660   /* CAN Controller 1 Mailbox 19 Data 0 Register */
-#define                  CAN1_MB19_DATA1  0xffc03664   /* CAN Controller 1 Mailbox 19 Data 1 Register */
-#define                  CAN1_MB19_DATA2  0xffc03668   /* CAN Controller 1 Mailbox 19 Data 2 Register */
-#define                  CAN1_MB19_DATA3  0xffc0366c   /* CAN Controller 1 Mailbox 19 Data 3 Register */
-#define                 CAN1_MB19_LENGTH  0xffc03670   /* CAN Controller 1 Mailbox 19 Length Register */
-#define              CAN1_MB19_TIMESTAMP  0xffc03674   /* CAN Controller 1 Mailbox 19 Timestamp Register */
-#define                    CAN1_MB19_ID0  0xffc03678   /* CAN Controller 1 Mailbox 19 ID0 Register */
-#define                    CAN1_MB19_ID1  0xffc0367c   /* CAN Controller 1 Mailbox 19 ID1 Register */
-#define                  CAN1_MB20_DATA0  0xffc03680   /* CAN Controller 1 Mailbox 20 Data 0 Register */
-#define                  CAN1_MB20_DATA1  0xffc03684   /* CAN Controller 1 Mailbox 20 Data 1 Register */
-#define                  CAN1_MB20_DATA2  0xffc03688   /* CAN Controller 1 Mailbox 20 Data 2 Register */
-#define                  CAN1_MB20_DATA3  0xffc0368c   /* CAN Controller 1 Mailbox 20 Data 3 Register */
-#define                 CAN1_MB20_LENGTH  0xffc03690   /* CAN Controller 1 Mailbox 20 Length Register */
-#define              CAN1_MB20_TIMESTAMP  0xffc03694   /* CAN Controller 1 Mailbox 20 Timestamp Register */
-#define                    CAN1_MB20_ID0  0xffc03698   /* CAN Controller 1 Mailbox 20 ID0 Register */
-#define                    CAN1_MB20_ID1  0xffc0369c   /* CAN Controller 1 Mailbox 20 ID1 Register */
-#define                  CAN1_MB21_DATA0  0xffc036a0   /* CAN Controller 1 Mailbox 21 Data 0 Register */
-#define                  CAN1_MB21_DATA1  0xffc036a4   /* CAN Controller 1 Mailbox 21 Data 1 Register */
-#define                  CAN1_MB21_DATA2  0xffc036a8   /* CAN Controller 1 Mailbox 21 Data 2 Register */
-#define                  CAN1_MB21_DATA3  0xffc036ac   /* CAN Controller 1 Mailbox 21 Data 3 Register */
-#define                 CAN1_MB21_LENGTH  0xffc036b0   /* CAN Controller 1 Mailbox 21 Length Register */
-#define              CAN1_MB21_TIMESTAMP  0xffc036b4   /* CAN Controller 1 Mailbox 21 Timestamp Register */
-#define                    CAN1_MB21_ID0  0xffc036b8   /* CAN Controller 1 Mailbox 21 ID0 Register */
-#define                    CAN1_MB21_ID1  0xffc036bc   /* CAN Controller 1 Mailbox 21 ID1 Register */
-#define                  CAN1_MB22_DATA0  0xffc036c0   /* CAN Controller 1 Mailbox 22 Data 0 Register */
-#define                  CAN1_MB22_DATA1  0xffc036c4   /* CAN Controller 1 Mailbox 22 Data 1 Register */
-#define                  CAN1_MB22_DATA2  0xffc036c8   /* CAN Controller 1 Mailbox 22 Data 2 Register */
-#define                  CAN1_MB22_DATA3  0xffc036cc   /* CAN Controller 1 Mailbox 22 Data 3 Register */
-#define                 CAN1_MB22_LENGTH  0xffc036d0   /* CAN Controller 1 Mailbox 22 Length Register */
-#define              CAN1_MB22_TIMESTAMP  0xffc036d4   /* CAN Controller 1 Mailbox 22 Timestamp Register */
-#define                    CAN1_MB22_ID0  0xffc036d8   /* CAN Controller 1 Mailbox 22 ID0 Register */
-#define                    CAN1_MB22_ID1  0xffc036dc   /* CAN Controller 1 Mailbox 22 ID1 Register */
-#define                  CAN1_MB23_DATA0  0xffc036e0   /* CAN Controller 1 Mailbox 23 Data 0 Register */
-#define                  CAN1_MB23_DATA1  0xffc036e4   /* CAN Controller 1 Mailbox 23 Data 1 Register */
-#define                  CAN1_MB23_DATA2  0xffc036e8   /* CAN Controller 1 Mailbox 23 Data 2 Register */
-#define                  CAN1_MB23_DATA3  0xffc036ec   /* CAN Controller 1 Mailbox 23 Data 3 Register */
-#define                 CAN1_MB23_LENGTH  0xffc036f0   /* CAN Controller 1 Mailbox 23 Length Register */
-#define              CAN1_MB23_TIMESTAMP  0xffc036f4   /* CAN Controller 1 Mailbox 23 Timestamp Register */
-#define                    CAN1_MB23_ID0  0xffc036f8   /* CAN Controller 1 Mailbox 23 ID0 Register */
-#define                    CAN1_MB23_ID1  0xffc036fc   /* CAN Controller 1 Mailbox 23 ID1 Register */
-#define                  CAN1_MB24_DATA0  0xffc03700   /* CAN Controller 1 Mailbox 24 Data 0 Register */
-#define                  CAN1_MB24_DATA1  0xffc03704   /* CAN Controller 1 Mailbox 24 Data 1 Register */
-#define                  CAN1_MB24_DATA2  0xffc03708   /* CAN Controller 1 Mailbox 24 Data 2 Register */
-#define                  CAN1_MB24_DATA3  0xffc0370c   /* CAN Controller 1 Mailbox 24 Data 3 Register */
-#define                 CAN1_MB24_LENGTH  0xffc03710   /* CAN Controller 1 Mailbox 24 Length Register */
-#define              CAN1_MB24_TIMESTAMP  0xffc03714   /* CAN Controller 1 Mailbox 24 Timestamp Register */
-#define                    CAN1_MB24_ID0  0xffc03718   /* CAN Controller 1 Mailbox 24 ID0 Register */
-#define                    CAN1_MB24_ID1  0xffc0371c   /* CAN Controller 1 Mailbox 24 ID1 Register */
-#define                  CAN1_MB25_DATA0  0xffc03720   /* CAN Controller 1 Mailbox 25 Data 0 Register */
-#define                  CAN1_MB25_DATA1  0xffc03724   /* CAN Controller 1 Mailbox 25 Data 1 Register */
-#define                  CAN1_MB25_DATA2  0xffc03728   /* CAN Controller 1 Mailbox 25 Data 2 Register */
-#define                  CAN1_MB25_DATA3  0xffc0372c   /* CAN Controller 1 Mailbox 25 Data 3 Register */
-#define                 CAN1_MB25_LENGTH  0xffc03730   /* CAN Controller 1 Mailbox 25 Length Register */
-#define              CAN1_MB25_TIMESTAMP  0xffc03734   /* CAN Controller 1 Mailbox 25 Timestamp Register */
-#define                    CAN1_MB25_ID0  0xffc03738   /* CAN Controller 1 Mailbox 25 ID0 Register */
-#define                    CAN1_MB25_ID1  0xffc0373c   /* CAN Controller 1 Mailbox 25 ID1 Register */
-#define                  CAN1_MB26_DATA0  0xffc03740   /* CAN Controller 1 Mailbox 26 Data 0 Register */
-#define                  CAN1_MB26_DATA1  0xffc03744   /* CAN Controller 1 Mailbox 26 Data 1 Register */
-#define                  CAN1_MB26_DATA2  0xffc03748   /* CAN Controller 1 Mailbox 26 Data 2 Register */
-#define                  CAN1_MB26_DATA3  0xffc0374c   /* CAN Controller 1 Mailbox 26 Data 3 Register */
-#define                 CAN1_MB26_LENGTH  0xffc03750   /* CAN Controller 1 Mailbox 26 Length Register */
-#define              CAN1_MB26_TIMESTAMP  0xffc03754   /* CAN Controller 1 Mailbox 26 Timestamp Register */
-#define                    CAN1_MB26_ID0  0xffc03758   /* CAN Controller 1 Mailbox 26 ID0 Register */
-#define                    CAN1_MB26_ID1  0xffc0375c   /* CAN Controller 1 Mailbox 26 ID1 Register */
-#define                  CAN1_MB27_DATA0  0xffc03760   /* CAN Controller 1 Mailbox 27 Data 0 Register */
-#define                  CAN1_MB27_DATA1  0xffc03764   /* CAN Controller 1 Mailbox 27 Data 1 Register */
-#define                  CAN1_MB27_DATA2  0xffc03768   /* CAN Controller 1 Mailbox 27 Data 2 Register */
-#define                  CAN1_MB27_DATA3  0xffc0376c   /* CAN Controller 1 Mailbox 27 Data 3 Register */
-#define                 CAN1_MB27_LENGTH  0xffc03770   /* CAN Controller 1 Mailbox 27 Length Register */
-#define              CAN1_MB27_TIMESTAMP  0xffc03774   /* CAN Controller 1 Mailbox 27 Timestamp Register */
-#define                    CAN1_MB27_ID0  0xffc03778   /* CAN Controller 1 Mailbox 27 ID0 Register */
-#define                    CAN1_MB27_ID1  0xffc0377c   /* CAN Controller 1 Mailbox 27 ID1 Register */
-#define                  CAN1_MB28_DATA0  0xffc03780   /* CAN Controller 1 Mailbox 28 Data 0 Register */
-#define                  CAN1_MB28_DATA1  0xffc03784   /* CAN Controller 1 Mailbox 28 Data 1 Register */
-#define                  CAN1_MB28_DATA2  0xffc03788   /* CAN Controller 1 Mailbox 28 Data 2 Register */
-#define                  CAN1_MB28_DATA3  0xffc0378c   /* CAN Controller 1 Mailbox 28 Data 3 Register */
-#define                 CAN1_MB28_LENGTH  0xffc03790   /* CAN Controller 1 Mailbox 28 Length Register */
-#define              CAN1_MB28_TIMESTAMP  0xffc03794   /* CAN Controller 1 Mailbox 28 Timestamp Register */
-#define                    CAN1_MB28_ID0  0xffc03798   /* CAN Controller 1 Mailbox 28 ID0 Register */
-#define                    CAN1_MB28_ID1  0xffc0379c   /* CAN Controller 1 Mailbox 28 ID1 Register */
-#define                  CAN1_MB29_DATA0  0xffc037a0   /* CAN Controller 1 Mailbox 29 Data 0 Register */
-#define                  CAN1_MB29_DATA1  0xffc037a4   /* CAN Controller 1 Mailbox 29 Data 1 Register */
-#define                  CAN1_MB29_DATA2  0xffc037a8   /* CAN Controller 1 Mailbox 29 Data 2 Register */
-#define                  CAN1_MB29_DATA3  0xffc037ac   /* CAN Controller 1 Mailbox 29 Data 3 Register */
-#define                 CAN1_MB29_LENGTH  0xffc037b0   /* CAN Controller 1 Mailbox 29 Length Register */
-#define              CAN1_MB29_TIMESTAMP  0xffc037b4   /* CAN Controller 1 Mailbox 29 Timestamp Register */
-#define                    CAN1_MB29_ID0  0xffc037b8   /* CAN Controller 1 Mailbox 29 ID0 Register */
-#define                    CAN1_MB29_ID1  0xffc037bc   /* CAN Controller 1 Mailbox 29 ID1 Register */
-#define                  CAN1_MB30_DATA0  0xffc037c0   /* CAN Controller 1 Mailbox 30 Data 0 Register */
-#define                  CAN1_MB30_DATA1  0xffc037c4   /* CAN Controller 1 Mailbox 30 Data 1 Register */
-#define                  CAN1_MB30_DATA2  0xffc037c8   /* CAN Controller 1 Mailbox 30 Data 2 Register */
-#define                  CAN1_MB30_DATA3  0xffc037cc   /* CAN Controller 1 Mailbox 30 Data 3 Register */
-#define                 CAN1_MB30_LENGTH  0xffc037d0   /* CAN Controller 1 Mailbox 30 Length Register */
-#define              CAN1_MB30_TIMESTAMP  0xffc037d4   /* CAN Controller 1 Mailbox 30 Timestamp Register */
-#define                    CAN1_MB30_ID0  0xffc037d8   /* CAN Controller 1 Mailbox 30 ID0 Register */
-#define                    CAN1_MB30_ID1  0xffc037dc   /* CAN Controller 1 Mailbox 30 ID1 Register */
-#define                  CAN1_MB31_DATA0  0xffc037e0   /* CAN Controller 1 Mailbox 31 Data 0 Register */
-#define                  CAN1_MB31_DATA1  0xffc037e4   /* CAN Controller 1 Mailbox 31 Data 1 Register */
-#define                  CAN1_MB31_DATA2  0xffc037e8   /* CAN Controller 1 Mailbox 31 Data 2 Register */
-#define                  CAN1_MB31_DATA3  0xffc037ec   /* CAN Controller 1 Mailbox 31 Data 3 Register */
-#define                 CAN1_MB31_LENGTH  0xffc037f0   /* CAN Controller 1 Mailbox 31 Length Register */
-#define              CAN1_MB31_TIMESTAMP  0xffc037f4   /* CAN Controller 1 Mailbox 31 Timestamp Register */
-#define                    CAN1_MB31_ID0  0xffc037f8   /* CAN Controller 1 Mailbox 31 ID0 Register */
-#define                    CAN1_MB31_ID1  0xffc037fc   /* CAN Controller 1 Mailbox 31 ID1 Register */
-/* ATAPI Registers */
-#define                    ATAPI_CONTROL  0xffc03800   /* ATAPI Control Register */
-#define                     ATAPI_STATUS  0xffc03804   /* ATAPI Status Register */
-#define                   ATAPI_DEV_ADDR  0xffc03808   /* ATAPI Device Register Address */
-#define                  ATAPI_DEV_TXBUF  0xffc0380c   /* ATAPI Device Register Write Data */
-#define                  ATAPI_DEV_RXBUF  0xffc03810   /* ATAPI Device Register Read Data */
-#define                   ATAPI_INT_MASK  0xffc03814   /* ATAPI Interrupt Mask Register */
-#define                 ATAPI_INT_STATUS  0xffc03818   /* ATAPI Interrupt Status Register */
-#define                   ATAPI_XFER_LEN  0xffc0381c   /* ATAPI Length of Transfer */
-#define                ATAPI_LINE_STATUS  0xffc03820   /* ATAPI Line Status */
-#define                   ATAPI_SM_STATE  0xffc03824   /* ATAPI State Machine Status */
-#define                  ATAPI_TERMINATE  0xffc03828   /* ATAPI Host Terminate */
-#define                 ATAPI_PIO_TFRCNT  0xffc0382c   /* ATAPI PIO mode transfer count */
-#define                 ATAPI_DMA_TFRCNT  0xffc03830   /* ATAPI DMA mode transfer count */
-#define               ATAPI_UMAIN_TFRCNT  0xffc03834   /* ATAPI UDMAIN transfer count */
-#define             ATAPI_UDMAOUT_TFRCNT  0xffc03838   /* ATAPI UDMAOUT transfer count */
-#define                  ATAPI_REG_TIM_0  0xffc03840   /* ATAPI Register Transfer Timing 0 */
-#define                  ATAPI_PIO_TIM_0  0xffc03844   /* ATAPI PIO Timing 0 Register */
-#define                  ATAPI_PIO_TIM_1  0xffc03848   /* ATAPI PIO Timing 1 Register */
-#define                ATAPI_MULTI_TIM_0  0xffc03850   /* ATAPI Multi-DMA Timing 0 Register */
-#define                ATAPI_MULTI_TIM_1  0xffc03854   /* ATAPI Multi-DMA Timing 1 Register */
-#define                ATAPI_MULTI_TIM_2  0xffc03858   /* ATAPI Multi-DMA Timing 2 Register */
-#define                ATAPI_ULTRA_TIM_0  0xffc03860   /* ATAPI Ultra-DMA Timing 0 Register */
-#define                ATAPI_ULTRA_TIM_1  0xffc03864   /* ATAPI Ultra-DMA Timing 1 Register */
-#define                ATAPI_ULTRA_TIM_2  0xffc03868   /* ATAPI Ultra-DMA Timing 2 Register */
-#define                ATAPI_ULTRA_TIM_3  0xffc0386c   /* ATAPI Ultra-DMA Timing 3 Register */
-/* SDH Registers */
-#define                      SDH_PWR_CTL  0xffc03900   /* SDH Power Control */
-#define                      SDH_CLK_CTL  0xffc03904   /* SDH Clock Control */
-#define                     SDH_ARGUMENT  0xffc03908   /* SDH Argument */
-#define                      SDH_COMMAND  0xffc0390c   /* SDH Command */
-#define                     SDH_RESP_CMD  0xffc03910   /* SDH Response Command */
-#define                    SDH_RESPONSE0  0xffc03914   /* SDH Response0 */
-#define                    SDH_RESPONSE1  0xffc03918   /* SDH Response1 */
-#define                    SDH_RESPONSE2  0xffc0391c   /* SDH Response2 */
-#define                    SDH_RESPONSE3  0xffc03920   /* SDH Response3 */
-#define                   SDH_DATA_TIMER  0xffc03924   /* SDH Data Timer */
-#define                    SDH_DATA_LGTH  0xffc03928   /* SDH Data Length */
-#define                     SDH_DATA_CTL  0xffc0392c   /* SDH Data Control */
-#define                     SDH_DATA_CNT  0xffc03930   /* SDH Data Counter */
-#define                       SDH_STATUS  0xffc03934   /* SDH Status */
-#define                   SDH_STATUS_CLR  0xffc03938   /* SDH Status Clear */
-#define                        SDH_MASK0  0xffc0393c   /* SDH Interrupt0 Mask */
-#define                        SDH_MASK1  0xffc03940   /* SDH Interrupt1 Mask */
-#define                     SDH_FIFO_CNT  0xffc03948   /* SDH FIFO Counter */
-#define                         SDH_FIFO  0xffc03980   /* SDH Data FIFO */
-#define                     SDH_E_STATUS  0xffc039c0   /* SDH Exception Status */
-#define                       SDH_E_MASK  0xffc039c4   /* SDH Exception Mask */
-#define                          SDH_CFG  0xffc039c8   /* SDH Configuration */
-#define                   SDH_RD_WAIT_EN  0xffc039cc   /* SDH Read Wait Enable */
-#define                         SDH_PID0  0xffc039d0   /* SDH Peripheral Identification0 */
-#define                         SDH_PID1  0xffc039d4   /* SDH Peripheral Identification1 */
-#define                         SDH_PID2  0xffc039d8   /* SDH Peripheral Identification2 */
-#define                         SDH_PID3  0xffc039dc   /* SDH Peripheral Identification3 */
-#define                         SDH_PID4  0xffc039e0   /* SDH Peripheral Identification4 */
-#define                         SDH_PID5  0xffc039e4   /* SDH Peripheral Identification5 */
-#define                         SDH_PID6  0xffc039e8   /* SDH Peripheral Identification6 */
-#define                         SDH_PID7  0xffc039ec   /* SDH Peripheral Identification7 */
-/* HOST Port Registers */
-#define                     HOST_CONTROL  0xffc03a00   /* HOST Control Register */
-#define                      HOST_STATUS  0xffc03a04   /* HOST Status Register */
-#define                     HOST_TIMEOUT  0xffc03a08   /* HOST Acknowledge Mode Timeout Register */
-/* USB Control Registers */
-#define                        USB_FADDR  0xffc03c00   /* Function address register */
-#define                        USB_POWER  0xffc03c04   /* Power management register */
-#define                       USB_INTRTX  0xffc03c08   /* Interrupt register for endpoint 0 and Tx endpoint 1 to 7 */
-#define                       USB_INTRRX  0xffc03c0c   /* Interrupt register for Rx endpoints 1 to 7 */
-#define                      USB_INTRTXE  0xffc03c10   /* Interrupt enable register for IntrTx */
-#define                      USB_INTRRXE  0xffc03c14   /* Interrupt enable register for IntrRx */
-#define                      USB_INTRUSB  0xffc03c18   /* Interrupt register for common USB interrupts */
-#define                     USB_INTRUSBE  0xffc03c1c   /* Interrupt enable register for IntrUSB */
-#define                        USB_FRAME  0xffc03c20   /* USB frame number */
-#define                        USB_INDEX  0xffc03c24   /* Index register for selecting the indexed endpoint registers */
-#define                     USB_TESTMODE  0xffc03c28   /* Enabled USB 20 test modes */
-#define                     USB_GLOBINTR  0xffc03c2c   /* Global Interrupt Mask register and Wakeup Exception Interrupt */
-#define                   USB_GLOBAL_CTL  0xffc03c30   /* Global Clock Control for the core */
-/* USB Packet Control Registers */
-#define                USB_TX_MAX_PACKET  0xffc03c40   /* Maximum packet size for Host Tx endpoint */
-#define                         USB_CSR0  0xffc03c44   /* Control Status register for endpoint 0 and Control Status register for Host Tx endpoint */
-#define                        USB_TXCSR  0xffc03c44   /* Control Status register for endpoint 0 and Control Status register for Host Tx endpoint */
-#define                USB_RX_MAX_PACKET  0xffc03c48   /* Maximum packet size for Host Rx endpoint */
-#define                        USB_RXCSR  0xffc03c4c   /* Control Status register for Host Rx endpoint */
-#define                       USB_COUNT0  0xffc03c50   /* Number of bytes received in endpoint 0 FIFO and Number of bytes received in Host Tx endpoint */
-#define                      USB_RXCOUNT  0xffc03c50   /* Number of bytes received in endpoint 0 FIFO and Number of bytes received in Host Tx endpoint */
-#define                       USB_TXTYPE  0xffc03c54   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint */
-#define                    USB_NAKLIMIT0  0xffc03c58   /* Sets the NAK response timeout on Endpoint 0 and on Bulk transfers for Host Tx endpoint */
-#define                   USB_TXINTERVAL  0xffc03c58   /* Sets the NAK response timeout on Endpoint 0 and on Bulk transfers for Host Tx endpoint */
-#define                       USB_RXTYPE  0xffc03c5c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint */
-#define                   USB_RXINTERVAL  0xffc03c60   /* Sets the polling interval for Interrupt and Isochronous transfers or the NAK response timeout on Bulk transfers */
-#define                      USB_TXCOUNT  0xffc03c68   /* Number of bytes to be written to the selected endpoint Tx FIFO */
-/* USB Endpoint FIFO Registers */
-#define                     USB_EP0_FIFO  0xffc03c80   /* Endpoint 0 FIFO */
-#define                     USB_EP1_FIFO  0xffc03c88   /* Endpoint 1 FIFO */
-#define                     USB_EP2_FIFO  0xffc03c90   /* Endpoint 2 FIFO */
-#define                     USB_EP3_FIFO  0xffc03c98   /* Endpoint 3 FIFO */
-#define                     USB_EP4_FIFO  0xffc03ca0   /* Endpoint 4 FIFO */
-#define                     USB_EP5_FIFO  0xffc03ca8   /* Endpoint 5 FIFO */
-#define                     USB_EP6_FIFO  0xffc03cb0   /* Endpoint 6 FIFO */
-#define                     USB_EP7_FIFO  0xffc03cb8   /* Endpoint 7 FIFO */
-/* USB OTG Control Registers */
-#define                  USB_OTG_DEV_CTL  0xffc03d00   /* OTG Device Control Register */
-#define                 USB_OTG_VBUS_IRQ  0xffc03d04   /* OTG VBUS Control Interrupts */
-#define                USB_OTG_VBUS_MASK  0xffc03d08   /* VBUS Control Interrupt Enable */
-/* USB Phy Control Registers */
-#define                     USB_LINKINFO  0xffc03d48   /* Enables programming of some PHY-side delays */
-#define                        USB_VPLEN  0xffc03d4c   /* Determines duration of VBUS pulse for VBUS charging */
-#define                      USB_HS_EOF1  0xffc03d50   /* Time buffer for High-Speed transactions */
-#define                      USB_FS_EOF1  0xffc03d54   /* Time buffer for Full-Speed transactions */
-#define                      USB_LS_EOF1  0xffc03d58   /* Time buffer for Low-Speed transactions */
-/* (APHY_CNTRL is for ADI usage only) */
-#define                   USB_APHY_CNTRL  0xffc03de0   /* Register that increases visibility of Analog PHY */
-/* (APHY_CALIB is for ADI usage only) */
-#define                   USB_APHY_CALIB  0xffc03de4   /* Register used to set some calibration values */
-#define                  USB_APHY_CNTRL2  0xffc03de8   /* Register used to prevent re-enumeration once Moab goes into hibernate mode */
-/* (PHY_TEST is for ADI usage only) */
-#define                     USB_PHY_TEST  0xffc03dec   /* Used for reducing simulation time and simplifies FIFO testability */
-#define                  USB_PLLOSC_CTRL  0xffc03df0   /* Used to program different parameters for USB PLL and Oscillator */
-#define                   USB_SRP_CLKDIV  0xffc03df4   /* Used to program clock divide value for the clock fed to the SRP detection logic */
-/* USB Endpoint 0 Control Registers */
-#define                USB_EP_NI0_TXMAXP  0xffc03e00   /* Maximum packet size for Host Tx endpoint0 */
-#define                 USB_EP_NI0_TXCSR  0xffc03e04   /* Control Status register for endpoint 0 */
-#define                USB_EP_NI0_RXMAXP  0xffc03e08   /* Maximum packet size for Host Rx endpoint0 */
-#define                 USB_EP_NI0_RXCSR  0xffc03e0c   /* Control Status register for Host Rx endpoint0 */
-#define               USB_EP_NI0_RXCOUNT  0xffc03e10   /* Number of bytes received in endpoint 0 FIFO */
-#define                USB_EP_NI0_TXTYPE  0xffc03e14   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint0 */
-#define            USB_EP_NI0_TXINTERVAL  0xffc03e18   /* Sets the NAK response timeout on Endpoint 0 */
-#define                USB_EP_NI0_RXTYPE  0xffc03e1c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint0 */
-#define            USB_EP_NI0_RXINTERVAL  0xffc03e20   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint0 */
-/* USB Endpoint 1 Control Registers */
-#define               USB_EP_NI0_TXCOUNT  0xffc03e28   /* Number of bytes to be written to the endpoint0 Tx FIFO */
-#define                USB_EP_NI1_TXMAXP  0xffc03e40   /* Maximum packet size for Host Tx endpoint1 */
-#define                 USB_EP_NI1_TXCSR  0xffc03e44   /* Control Status register for endpoint1 */
-#define                USB_EP_NI1_RXMAXP  0xffc03e48   /* Maximum packet size for Host Rx endpoint1 */
-#define                 USB_EP_NI1_RXCSR  0xffc03e4c   /* Control Status register for Host Rx endpoint1 */
-#define               USB_EP_NI1_RXCOUNT  0xffc03e50   /* Number of bytes received in endpoint1 FIFO */
-#define                USB_EP_NI1_TXTYPE  0xffc03e54   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint1 */
-#define            USB_EP_NI1_TXINTERVAL  0xffc03e58   /* Sets the NAK response timeout on Endpoint1 */
-#define                USB_EP_NI1_RXTYPE  0xffc03e5c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint1 */
-#define            USB_EP_NI1_RXINTERVAL  0xffc03e60   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint1 */
-/* USB Endpoint 2 Control Registers */
-#define               USB_EP_NI1_TXCOUNT  0xffc03e68   /* Number of bytes to be written to the+H102 endpoint1 Tx FIFO */
-#define                USB_EP_NI2_TXMAXP  0xffc03e80   /* Maximum packet size for Host Tx endpoint2 */
-#define                 USB_EP_NI2_TXCSR  0xffc03e84   /* Control Status register for endpoint2 */
-#define                USB_EP_NI2_RXMAXP  0xffc03e88   /* Maximum packet size for Host Rx endpoint2 */
-#define                 USB_EP_NI2_RXCSR  0xffc03e8c   /* Control Status register for Host Rx endpoint2 */
-#define               USB_EP_NI2_RXCOUNT  0xffc03e90   /* Number of bytes received in endpoint2 FIFO */
-#define                USB_EP_NI2_TXTYPE  0xffc03e94   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint2 */
-#define            USB_EP_NI2_TXINTERVAL  0xffc03e98   /* Sets the NAK response timeout on Endpoint2 */
-#define                USB_EP_NI2_RXTYPE  0xffc03e9c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint2 */
-#define            USB_EP_NI2_RXINTERVAL  0xffc03ea0   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint2 */
-/* USB Endpoint 3 Control Registers */
-#define               USB_EP_NI2_TXCOUNT  0xffc03ea8   /* Number of bytes to be written to the endpoint2 Tx FIFO */
-#define                USB_EP_NI3_TXMAXP  0xffc03ec0   /* Maximum packet size for Host Tx endpoint3 */
-#define                 USB_EP_NI3_TXCSR  0xffc03ec4   /* Control Status register for endpoint3 */
-#define                USB_EP_NI3_RXMAXP  0xffc03ec8   /* Maximum packet size for Host Rx endpoint3 */
-#define                 USB_EP_NI3_RXCSR  0xffc03ecc   /* Control Status register for Host Rx endpoint3 */
-#define               USB_EP_NI3_RXCOUNT  0xffc03ed0   /* Number of bytes received in endpoint3 FIFO */
-#define                USB_EP_NI3_TXTYPE  0xffc03ed4   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint3 */
-#define            USB_EP_NI3_TXINTERVAL  0xffc03ed8   /* Sets the NAK response timeout on Endpoint3 */
-#define                USB_EP_NI3_RXTYPE  0xffc03edc   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint3 */
-#define            USB_EP_NI3_RXINTERVAL  0xffc03ee0   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint3 */
-/* USB Endpoint 4 Control Registers */
-#define               USB_EP_NI3_TXCOUNT  0xffc03ee8   /* Number of bytes to be written to the H124endpoint3 Tx FIFO */
-#define                USB_EP_NI4_TXMAXP  0xffc03f00   /* Maximum packet size for Host Tx endpoint4 */
-#define                 USB_EP_NI4_TXCSR  0xffc03f04   /* Control Status register for endpoint4 */
-#define                USB_EP_NI4_RXMAXP  0xffc03f08   /* Maximum packet size for Host Rx endpoint4 */
-#define                 USB_EP_NI4_RXCSR  0xffc03f0c   /* Control Status register for Host Rx endpoint4 */
-#define               USB_EP_NI4_RXCOUNT  0xffc03f10   /* Number of bytes received in endpoint4 FIFO */
-#define                USB_EP_NI4_TXTYPE  0xffc03f14   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint4 */
-#define            USB_EP_NI4_TXINTERVAL  0xffc03f18   /* Sets the NAK response timeout on Endpoint4 */
-#define                USB_EP_NI4_RXTYPE  0xffc03f1c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint4 */
-#define            USB_EP_NI4_RXINTERVAL  0xffc03f20   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint4 */
-/* USB Endpoint 5 Control Registers */
-#define               USB_EP_NI4_TXCOUNT  0xffc03f28   /* Number of bytes to be written to the endpoint4 Tx FIFO */
-#define                USB_EP_NI5_TXMAXP  0xffc03f40   /* Maximum packet size for Host Tx endpoint5 */
-#define                 USB_EP_NI5_TXCSR  0xffc03f44   /* Control Status register for endpoint5 */
-#define                USB_EP_NI5_RXMAXP  0xffc03f48   /* Maximum packet size for Host Rx endpoint5 */
-#define                 USB_EP_NI5_RXCSR  0xffc03f4c   /* Control Status register for Host Rx endpoint5 */
-#define               USB_EP_NI5_RXCOUNT  0xffc03f50   /* Number of bytes received in endpoint5 FIFO */
-#define                USB_EP_NI5_TXTYPE  0xffc03f54   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint5 */
-#define            USB_EP_NI5_TXINTERVAL  0xffc03f58   /* Sets the NAK response timeout on Endpoint5 */
-#define                USB_EP_NI5_RXTYPE  0xffc03f5c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint5 */
-#define            USB_EP_NI5_RXINTERVAL  0xffc03f60   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint5 */
-/* USB Endpoint 6 Control Registers */
-#define               USB_EP_NI5_TXCOUNT  0xffc03f68   /* Number of bytes to be written to the H145endpoint5 Tx FIFO */
-#define                USB_EP_NI6_TXMAXP  0xffc03f80   /* Maximum packet size for Host Tx endpoint6 */
-#define                 USB_EP_NI6_TXCSR  0xffc03f84   /* Control Status register for endpoint6 */
-#define                USB_EP_NI6_RXMAXP  0xffc03f88   /* Maximum packet size for Host Rx endpoint6 */
-#define                 USB_EP_NI6_RXCSR  0xffc03f8c   /* Control Status register for Host Rx endpoint6 */
-#define               USB_EP_NI6_RXCOUNT  0xffc03f90   /* Number of bytes received in endpoint6 FIFO */
-#define                USB_EP_NI6_TXTYPE  0xffc03f94   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint6 */
-#define            USB_EP_NI6_TXINTERVAL  0xffc03f98   /* Sets the NAK response timeout on Endpoint6 */
-#define                USB_EP_NI6_RXTYPE  0xffc03f9c   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint6 */
-#define            USB_EP_NI6_RXINTERVAL  0xffc03fa0   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint6 */
-/* USB Endpoint 7 Control Registers */
-#define               USB_EP_NI6_TXCOUNT  0xffc03fa8   /* Number of bytes to be written to the endpoint6 Tx FIFO */
-#define                USB_EP_NI7_TXMAXP  0xffc03fc0   /* Maximum packet size for Host Tx endpoint7 */
-#define                 USB_EP_NI7_TXCSR  0xffc03fc4   /* Control Status register for endpoint7 */
-#define                USB_EP_NI7_RXMAXP  0xffc03fc8   /* Maximum packet size for Host Rx endpoint7 */
-#define                 USB_EP_NI7_RXCSR  0xffc03fcc   /* Control Status register for Host Rx endpoint7 */
-#define               USB_EP_NI7_RXCOUNT  0xffc03fd0   /* Number of bytes received in endpoint7 FIFO */
-#define                USB_EP_NI7_TXTYPE  0xffc03fd4   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint7 */
-#define            USB_EP_NI7_TXINTERVAL  0xffc03fd8   /* Sets the NAK response timeout on Endpoint7 */
-#define                USB_EP_NI7_RXTYPE  0xffc03fdc   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint7 */
-#define            USB_EP_NI7_RXINTERVAL  0xffc03ff0   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint7 */
-#define               USB_EP_NI7_TXCOUNT  0xffc03ff8   /* Number of bytes to be written to the endpoint7 Tx FIFO */
-#define                USB_DMA_INTERRUPT  0xffc04000   /* Indicates pending interrupts for the DMA channels */
-/* USB Channel 0 Config Registers */
-#define                  USB_DMA0CONTROL  0xffc04004   /* DMA master channel 0 configuration */
-#define                  USB_DMA0ADDRLOW  0xffc04008   /* Lower 16-bits of memory source/destination address for DMA master channel 0 */
-#define                 USB_DMA0ADDRHIGH  0xffc0400c   /* Upper 16-bits of memory source/destination address for DMA master channel 0 */
-#define                 USB_DMA0COUNTLOW  0xffc04010   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 0 */
-#define                USB_DMA0COUNTHIGH  0xffc04014   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 0 */
-/* USB Channel 1 Config Registers */
-#define                  USB_DMA1CONTROL  0xffc04024   /* DMA master channel 1 configuration */
-#define                  USB_DMA1ADDRLOW  0xffc04028   /* Lower 16-bits of memory source/destination address for DMA master channel 1 */
-#define                 USB_DMA1ADDRHIGH  0xffc0402c   /* Upper 16-bits of memory source/destination address for DMA master channel 1 */
-#define                 USB_DMA1COUNTLOW  0xffc04030   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 1 */
-#define                USB_DMA1COUNTHIGH  0xffc04034   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 1 */
-/* USB Channel 2 Config Registers */
-#define                  USB_DMA2CONTROL  0xffc04044   /* DMA master channel 2 configuration */
-#define                  USB_DMA2ADDRLOW  0xffc04048   /* Lower 16-bits of memory source/destination address for DMA master channel 2 */
-#define                 USB_DMA2ADDRHIGH  0xffc0404c   /* Upper 16-bits of memory source/destination address for DMA master channel 2 */
-#define                 USB_DMA2COUNTLOW  0xffc04050   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 2 */
-#define                USB_DMA2COUNTHIGH  0xffc04054   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 2 */
-/* USB Channel 3 Config Registers */
-#define                  USB_DMA3CONTROL  0xffc04064   /* DMA master channel 3 configuration */
-#define                  USB_DMA3ADDRLOW  0xffc04068   /* Lower 16-bits of memory source/destination address for DMA master channel 3 */
-#define                 USB_DMA3ADDRHIGH  0xffc0406c   /* Upper 16-bits of memory source/destination address for DMA master channel 3 */
-#define                 USB_DMA3COUNTLOW  0xffc04070   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 3 */
-#define                USB_DMA3COUNTHIGH  0xffc04074   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 3 */
-/* USB Channel 4 Config Registers */
-#define                  USB_DMA4CONTROL  0xffc04084   /* DMA master channel 4 configuration */
-#define                  USB_DMA4ADDRLOW  0xffc04088   /* Lower 16-bits of memory source/destination address for DMA master channel 4 */
-#define                 USB_DMA4ADDRHIGH  0xffc0408c   /* Upper 16-bits of memory source/destination address for DMA master channel 4 */
-#define                 USB_DMA4COUNTLOW  0xffc04090   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 4 */
-#define                USB_DMA4COUNTHIGH  0xffc04094   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 4 */
-/* USB Channel 5 Config Registers */
-#define                  USB_DMA5CONTROL  0xffc040a4   /* DMA master channel 5 configuration */
-#define                  USB_DMA5ADDRLOW  0xffc040a8   /* Lower 16-bits of memory source/destination address for DMA master channel 5 */
-#define                 USB_DMA5ADDRHIGH  0xffc040ac   /* Upper 16-bits of memory source/destination address for DMA master channel 5 */
-#define                 USB_DMA5COUNTLOW  0xffc040b0   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 5 */
-#define                USB_DMA5COUNTHIGH  0xffc040b4   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 5 */
-/* USB Channel 6 Config Registers */
-#define                  USB_DMA6CONTROL  0xffc040c4   /* DMA master channel 6 configuration */
-#define                  USB_DMA6ADDRLOW  0xffc040c8   /* Lower 16-bits of memory source/destination address for DMA master channel 6 */
-#define                 USB_DMA6ADDRHIGH  0xffc040cc   /* Upper 16-bits of memory source/destination address for DMA master channel 6 */
-#define                 USB_DMA6COUNTLOW  0xffc040d0   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 6 */
-#define                USB_DMA6COUNTHIGH  0xffc040d4   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 6 */
-/* USB Channel 7 Config Registers */
-#define                  USB_DMA7CONTROL  0xffc040e4   /* DMA master channel 7 configuration */
-#define                  USB_DMA7ADDRLOW  0xffc040e8   /* Lower 16-bits of memory source/destination address for DMA master channel 7 */
-#define                 USB_DMA7ADDRHIGH  0xffc040ec   /* Upper 16-bits of memory source/destination address for DMA master channel 7 */
-#define                 USB_DMA7COUNTLOW  0xffc040f0   /* Lower 16-bits of byte count of DMA transfer for DMA master channel 7 */
-#define                USB_DMA7COUNTHIGH  0xffc040f4   /* Upper 16-bits of byte count of DMA transfer for DMA master channel 7 */
-/* Keypad Registers */
-#define                         KPAD_CTL  0xffc04100   /* Controls keypad module enable and disable */
-#define                    KPAD_PRESCALE  0xffc04104   /* Establish a time base for programing the KPAD_MSEL register */
-#define                        KPAD_MSEL  0xffc04108   /* Selects delay parameters for keypad interface sensitivity */
-#define                      KPAD_ROWCOL  0xffc0410c   /* Captures the row and column output values of the keys pressed */
-#define                        KPAD_STAT  0xffc04110   /* Holds and clears the status of the keypad interface interrupt */
-#define                    KPAD_SOFTEVAL  0xffc04114   /* Lets software force keypad interface to check for keys being pressed */
-/* Pixel Compositor (PIXC) Registers */
-#define                         PIXC_CTL  0xffc04400   /* Overlay enable, resampling mode, I/O data format, transparency enable, watermark level, FIFO status */
-#define                         PIXC_PPL  0xffc04404   /* Holds the number of pixels per line of the display */
-#define                         PIXC_LPF  0xffc04408   /* Holds the number of lines per frame of the display */
-#define                     PIXC_AHSTART  0xffc0440c   /* Contains horizontal start pixel information of the overlay data (set A) */
-#define                       PIXC_AHEND  0xffc04410   /* Contains horizontal end pixel information of the overlay data (set A) */
-#define                     PIXC_AVSTART  0xffc04414   /* Contains vertical start pixel information of the overlay data (set A) */
-#define                       PIXC_AVEND  0xffc04418   /* Contains vertical end pixel information of the overlay data (set A) */
-#define                     PIXC_ATRANSP  0xffc0441c   /* Contains the transparency ratio (set A) */
-#define                     PIXC_BHSTART  0xffc04420   /* Contains horizontal start pixel information of the overlay data (set B) */
-#define                       PIXC_BHEND  0xffc04424   /* Contains horizontal end pixel information of the overlay data (set B) */
-#define                     PIXC_BVSTART  0xffc04428   /* Contains vertical start pixel information of the overlay data (set B) */
-#define                       PIXC_BVEND  0xffc0442c   /* Contains vertical end pixel information of the overlay data (set B) */
-#define                     PIXC_BTRANSP  0xffc04430   /* Contains the transparency ratio (set B) */
-#define                    PIXC_INTRSTAT  0xffc0443c   /* Overlay interrupt configuration/status */
-#define                       PIXC_RYCON  0xffc04440   /* Color space conversion matrix register. Contains the R/Y conversion coefficients */
-#define                       PIXC_GUCON  0xffc04444   /* Color space conversion matrix register. Contains the G/U conversion coefficients */
-#define                       PIXC_BVCON  0xffc04448   /* Color space conversion matrix register. Contains the B/V conversion coefficients */
-#define                      PIXC_CCBIAS  0xffc0444c   /* Bias values for the color space conversion matrix */
-#define                          PIXC_TC  0xffc04450   /* Holds the transparent color value */
-/* Handshake MDMA 0 Registers */
-#define                   HMDMA0_CONTROL  0xffc04500   /* Handshake MDMA0 Control Register */
-#define                    HMDMA0_ECINIT  0xffc04504   /* Handshake MDMA0 Initial Edge Count Register */
-#define                    HMDMA0_BCINIT  0xffc04508   /* Handshake MDMA0 Initial Block Count Register */
-#define                  HMDMA0_ECURGENT  0xffc0450c   /* Handshake MDMA0 Urgent Edge Count Threshold Register */
-#define                HMDMA0_ECOVERFLOW  0xffc04510   /* Handshake MDMA0 Edge Count Overflow Interrupt Register */
-#define                    HMDMA0_ECOUNT  0xffc04514   /* Handshake MDMA0 Current Edge Count Register */
-#define                    HMDMA0_BCOUNT  0xffc04518   /* Handshake MDMA0 Current Block Count Register */
-/* Handshake MDMA 1 Registers */
-#define                   HMDMA1_CONTROL  0xffc04540   /* Handshake MDMA1 Control Register */
-#define                    HMDMA1_ECINIT  0xffc04544   /* Handshake MDMA1 Initial Edge Count Register */
-#define                    HMDMA1_BCINIT  0xffc04548   /* Handshake MDMA1 Initial Block Count Register */
-#define                  HMDMA1_ECURGENT  0xffc0454c   /* Handshake MDMA1 Urgent Edge Count Threshold Register */
-#define                HMDMA1_ECOVERFLOW  0xffc04550   /* Handshake MDMA1 Edge Count Overflow Interrupt Register */
-#define                    HMDMA1_ECOUNT  0xffc04554   /* Handshake MDMA1 Current Edge Count Register */
-#define                    HMDMA1_BCOUNT  0xffc04558   /* Handshake MDMA1 Current Block Count Register */
-/* ********************************************************** */
-/*     SINGLE BIT MACRO PAIRS (bit mask and negated one)      */
-/*     and MULTI BIT READ MACROS                              */
-/* ********************************************************** */
-/* Bit masks for PIXC_CTL */
-#define                   PIXC_EN  0x1        /* Pixel Compositor Enable */
-#define                  OVR_A_EN  0x2        /* Overlay A Enable */
-#define                  OVR_B_EN  0x4        /* Overlay B Enable */
-#define                  IMG_FORM  0x8        /* Image Data Format */
-#define                  OVR_FORM  0x10       /* Overlay Data Format */
-#define                  OUT_FORM  0x20       /* Output Data Format */
-#define                   UDS_MOD  0x40       /* Resampling Mode */
-#define                     TC_EN  0x80       /* Transparent Color Enable */
-#define                  IMG_STAT  0x300      /* Image FIFO Status */
-#define                  OVR_STAT  0xc00      /* Overlay FIFO Status */
-#define                    WM_LVL  0x3000     /* FIFO Watermark Level */
-/* Bit masks for PIXC_AHSTART */
-#define                  A_HSTART  0xfff      /* Horizontal Start Coordinates */
-/* Bit masks for PIXC_AHEND */
-#define                    A_HEND  0xfff      /* Horizontal End Coordinates */
-/* Bit masks for PIXC_AVSTART */
-#define                  A_VSTART  0x3ff      /* Vertical Start Coordinates */
-/* Bit masks for PIXC_AVEND */
-#define                    A_VEND  0x3ff      /* Vertical End Coordinates */
-/* Bit masks for PIXC_ATRANSP */
-#define                  A_TRANSP  0xf        /* Transparency Value */
-/* Bit masks for PIXC_BHSTART */
-#define                  B_HSTART  0xfff      /* Horizontal Start Coordinates */
-/* Bit masks for PIXC_BHEND */
-#define                    B_HEND  0xfff      /* Horizontal End Coordinates */
-/* Bit masks for PIXC_BVSTART */
-#define                  B_VSTART  0x3ff      /* Vertical Start Coordinates */
-/* Bit masks for PIXC_BVEND */
-#define                    B_VEND  0x3ff      /* Vertical End Coordinates */
-/* Bit masks for PIXC_BTRANSP */
-#define                  B_TRANSP  0xf        /* Transparency Value */
-/* Bit masks for PIXC_INTRSTAT */
-#define                OVR_INT_EN  0x1        /* Interrupt at End of Last Valid Overlay */
-#define                FRM_INT_EN  0x2        /* Interrupt at End of Frame */
-#define              OVR_INT_STAT  0x4        /* Overlay Interrupt Status */
-#define              FRM_INT_STAT  0x8        /* Frame Interrupt Status */
-/* Bit masks for PIXC_RYCON */
-#define                       A11  0x3ff      /* A11 in the Coefficient Matrix */
-#define                       A12  0xffc00    /* A12 in the Coefficient Matrix */
-#define                       A13  0x3ff00000 /* A13 in the Coefficient Matrix */
-#define                  RY_MULT4  0x40000000 /* Multiply Row by 4 */
-/* Bit masks for PIXC_GUCON */
-#define                       A21  0x3ff      /* A21 in the Coefficient Matrix */
-#define                       A22  0xffc00    /* A22 in the Coefficient Matrix */
-#define                       A23  0x3ff00000 /* A23 in the Coefficient Matrix */
-#define                  GU_MULT4  0x40000000 /* Multiply Row by 4 */
-/* Bit masks for PIXC_BVCON */
-#define                       A31  0x3ff      /* A31 in the Coefficient Matrix */
-#define                       A32  0xffc00    /* A32 in the Coefficient Matrix */
-#define                       A33  0x3ff00000 /* A33 in the Coefficient Matrix */
-#define                  BV_MULT4  0x40000000 /* Multiply Row by 4 */
-/* Bit masks for PIXC_CCBIAS */
-#define                       A14  0x3ff      /* A14 in the Bias Vector */
-#define                       A24  0xffc00    /* A24 in the Bias Vector */
-#define                       A34  0x3ff00000 /* A34 in the Bias Vector */
-/* Bit masks for PIXC_TC */
-#define                  RY_TRANS  0xff       /* Transparent Color - R/Y Component */
-#define                  GU_TRANS  0xff00     /* Transparent Color - G/U Component */
-#define                  BV_TRANS  0xff0000   /* Transparent Color - B/V Component */
-/* Bit masks for HOST_CONTROL */
-#define                   HOST_EN  0x1        /* Host Enable */
-#define                  HOST_END  0x2        /* Host Endianess */
-#define                 DATA_SIZE  0x4        /* Data Size */
-#define                  HOST_RST  0x8        /* Host Reset */
-#define                  HRDY_OVR  0x20       /* Host Ready Override */
-#define                  INT_MODE  0x40       /* Interrupt Mode */
-#define                     BT_EN  0x80       /* Bus Timeout Enable */
-#define                       EHW  0x100      /* Enable Host Write */
-#define                       EHR  0x200      /* Enable Host Read */
-#define                       BDR  0x400      /* Burst DMA Requests */
-/* Bit masks for HOST_STATUS */
-#define                 DMA_READY  0x1        /* DMA Ready */
-#define                  FIFOFULL  0x2        /* FIFO Full */
-#define                 FIFOEMPTY  0x4        /* FIFO Empty */
-#define              DMA_COMPLETE  0x8        /* DMA Complete */
-#define                      HSHK  0x10       /* Host Handshake */
-#define                   TIMEOUT  0x20       /* Host Timeout */
-#define                      HIRQ  0x40       /* Host Interrupt Request */
-#define                ALLOW_CNFG  0x80       /* Allow New Configuration */
-#define                   DMA_DIR  0x100      /* DMA Direction */
-#define                       BTE  0x200      /* Bus Timeout Enabled */
-/* Bit masks for HOST_TIMEOUT */
-#define             COUNT_TIMEOUT  0x7ff      /* Host Timeout count */
-/* Bit masks for MXVR_CONFIG */
-#define                    MXVREN  0x1        /* MXVR Enable */
-#define                      MMSM  0x2        /* MXVR Master/Slave Mode Select */
-#define                    ACTIVE  0x4        /* Active Mode */
-#define                    SDELAY  0x8        /* Synchronous Data Delay */
-#define                   NCMRXEN  0x10       /* Normal Control Message Receive Enable */
-#define                   RWRRXEN  0x20       /* Remote Write Receive Enable */
-#define                     MTXEN  0x40       /* MXVR Transmit Data Enable */
-#define                    MTXONB  0x80       /* MXVR Phy Transmitter On */
-#define                   EPARITY  0x100      /* Even Parity Select */
-#define                       MSB  0x1e00     /* Master Synchronous Boundary */
-#define                    APRXEN  0x2000     /* Asynchronous Packet Receive Enable */
-#define                    WAKEUP  0x4000     /* Wake-Up */
-#define                     LMECH  0x8000     /* Lock Mechanism Select */
-/* Bit masks for MXVR_STATE_0 */
-#define                      NACT  0x1        /* Network Activity */
-#define                    SBLOCK  0x2        /* Super Block Lock */
-#define                   FMPLLST  0xc        /* Frequency Multiply PLL SM State */
-#define                  CDRPLLST  0xe0       /* Clock/Data Recovery PLL SM State */
-#define                     APBSY  0x100      /* Asynchronous Packet Transmit Buffer Busy */
-#define                     APARB  0x200      /* Asynchronous Packet Arbitrating */
-#define                      APTX  0x400      /* Asynchronous Packet Transmitting */
-#define                      APRX  0x800      /* Receiving Asynchronous Packet */
-#define                     CMBSY  0x1000     /* Control Message Transmit Buffer Busy */
-#define                     CMARB  0x2000     /* Control Message Arbitrating */
-#define                      CMTX  0x4000     /* Control Message Transmitting */
-#define                      CMRX  0x8000     /* Receiving Control Message */
-#define                    MRXONB  0x10000    /* MRXONB Pin State */
-#define                     RGSIP  0x20000    /* Remote Get Source In Progress */
-#define                     DALIP  0x40000    /* Resource Deallocate In Progress */
-#define                      ALIP  0x80000    /* Resource Allocate In Progress */
-#define                     RRDIP  0x100000   /* Remote Read In Progress */
-#define                     RWRIP  0x200000   /* Remote Write In Progress */
-#define                     FLOCK  0x400000   /* Frame Lock */
-#define                     BLOCK  0x800000   /* Block Lock */
-#define                       RSB  0xf000000  /* Received Synchronous Boundary */
-#define                   DERRNUM  0xf0000000 /* DMA Error Channel Number */
-/* Bit masks for MXVR_STATE_1 */
-#define                   SRXNUMB  0xf        /* Synchronous Receive FIFO Number of Bytes */
-#define                   STXNUMB  0xf0       /* Synchronous Transmit FIFO Number of Bytes */
-#define                    APCONT  0x100      /* Asynchronous Packet Continuation */
-#define                  OBERRNUM  0xe00      /* DMA Out of Bounds Error Channel Number */
-#define                DMAACTIVE0  0x10000    /* DMA0 Active */
-#define                DMAACTIVE1  0x20000    /* DMA1 Active */
-#define                DMAACTIVE2  0x40000    /* DMA2 Active */
-#define                DMAACTIVE3  0x80000    /* DMA3 Active */
-#define                DMAACTIVE4  0x100000   /* DMA4 Active */
-#define                DMAACTIVE5  0x200000   /* DMA5 Active */
-#define                DMAACTIVE6  0x400000   /* DMA6 Active */
-#define                DMAACTIVE7  0x800000   /* DMA7 Active */
-#define                  DMAPMEN0  0x1000000  /* DMA0 Pattern Matching Enabled */
-#define                  DMAPMEN1  0x2000000  /* DMA1 Pattern Matching Enabled */
-#define                  DMAPMEN2  0x4000000  /* DMA2 Pattern Matching Enabled */
-#define                  DMAPMEN3  0x8000000  /* DMA3 Pattern Matching Enabled */
-#define                  DMAPMEN4  0x10000000 /* DMA4 Pattern Matching Enabled */
-#define                  DMAPMEN5  0x20000000 /* DMA5 Pattern Matching Enabled */
-#define                  DMAPMEN6  0x40000000 /* DMA6 Pattern Matching Enabled */
-#define                  DMAPMEN7  0x80000000 /* DMA7 Pattern Matching Enabled */
-/* Bit masks for MXVR_INT_STAT_0 */
-#define                      NI2A  0x1        /* Network Inactive to Active */
-#define                      NA2I  0x2        /* Network Active to Inactive */
-#define                     SBU2L  0x4        /* Super Block Unlock to Lock */
-#define                     SBL2U  0x8        /* Super Block Lock to Unlock */
-#define                       PRU  0x10       /* Position Register Updated */
-#define                      MPRU  0x20       /* Maximum Position Register Updated */
-#define                       DRU  0x40       /* Delay Register Updated */
-#define                      MDRU  0x80       /* Maximum Delay Register Updated */
-#define                       SBU  0x100      /* Synchronous Boundary Updated */
-#define                       ATU  0x200      /* Allocation Table Updated */
-#define                      FCZ0  0x400      /* Frame Counter 0 Zero */
-#define                      FCZ1  0x800      /* Frame Counter 1 Zero */
-#define                      PERR  0x1000     /* Parity Error */
-#define                      MH2L  0x2000     /* MRXONB High to Low */
-#define                      ML2H  0x4000     /* MRXONB Low to High */
-#define                       WUP  0x8000     /* Wake-Up Preamble Received */
-#define                      FU2L  0x10000    /* Frame Unlock to Lock */
-#define                      FL2U  0x20000    /* Frame Lock to Unlock */
-#define                      BU2L  0x40000    /* Block Unlock to Lock */
-#define                      BL2U  0x80000    /* Block Lock to Unlock */
-#define                     OBERR  0x100000   /* DMA Out of Bounds Error */
-#define                       PFL  0x200000   /* PLL Frequency Locked */
-#define                       SCZ  0x400000   /* System Clock Counter Zero */
-#define                      FERR  0x800000   /* FIFO Error */
-#define                       CMR  0x1000000  /* Control Message Received */
-#define                     CMROF  0x2000000  /* Control Message Receive Buffer Overflow */
-#define                      CMTS  0x4000000  /* Control Message Transmit Buffer Successfully Sent */
-#define                      CMTC  0x8000000  /* Control Message Transmit Buffer Successfully Cancelled */
-#define                      RWRC  0x10000000 /* Remote Write Control Message Completed */
-#define                       BCZ  0x20000000 /* Block Counter Zero */
-#define                     BMERR  0x40000000 /* Biphase Mark Coding Error */
-#define                      DERR  0x80000000 /* DMA Error */
-/* Bit masks for MXVR_INT_STAT_1 */
-#define                    HDONE0  0x1        /* DMA0 Half Done */
-#define                     DONE0  0x2        /* DMA0 Done */
-#define                       APR  0x4        /* Asynchronous Packet Received */
-#define                     APROF  0x8        /* Asynchronous Packet Receive Buffer Overflow */
-#define                    HDONE1  0x10       /* DMA1 Half Done */
-#define                     DONE1  0x20       /* DMA1 Done */
-#define                      APTS  0x40       /* Asynchronous Packet Transmit Buffer Successfully Sent */
-#define                      APTC  0x80       /* Asynchronous Packet Transmit Buffer Successfully Cancelled */
-#define                    HDONE2  0x100      /* DMA2 Half Done */
-#define                     DONE2  0x200      /* DMA2 Done */
-#define                     APRCE  0x400      /* Asynchronous Packet Receive CRC Error */
-#define                     APRPE  0x800      /* Asynchronous Packet Receive Packet Error */
-#define                    HDONE3  0x1000     /* DMA3 Half Done */
-#define                     DONE3  0x2000     /* DMA3 Done */
-#define                    HDONE4  0x10000    /* DMA4 Half Done */
-#define                     DONE4  0x20000    /* DMA4 Done */
-#define                    HDONE5  0x100000   /* DMA5 Half Done */
-#define                     DONE5  0x200000   /* DMA5 Done */
-#define                    HDONE6  0x1000000  /* DMA6 Half Done */
-#define                     DONE6  0x2000000  /* DMA6 Done */
-#define                    HDONE7  0x10000000 /* DMA7 Half Done */
-#define                     DONE7  0x20000000 /* DMA7 Done */
-/* Bit masks for MXVR_INT_EN_0 */
-#define                    NI2AEN  0x1        /* Network Inactive to Active Interrupt Enable */
-#define                    NA2IEN  0x2        /* Network Active to Inactive Interrupt Enable */
-#define                   SBU2LEN  0x4        /* Super Block Unlock to Lock Interrupt Enable */
-#define                   SBL2UEN  0x8        /* Super Block Lock to Unlock Interrupt Enable */
-#define                     PRUEN  0x10       /* Position Register Updated Interrupt Enable */
-#define                    MPRUEN  0x20       /* Maximum Position Register Updated Interrupt Enable */
-#define                     DRUEN  0x40       /* Delay Register Updated Interrupt Enable */
-#define                    MDRUEN  0x80       /* Maximum Delay Register Updated Interrupt Enable */
-#define                     SBUEN  0x100      /* Synchronous Boundary Updated Interrupt Enable */
-#define                     ATUEN  0x200      /* Allocation Table Updated Interrupt Enable */
-#define                    FCZ0EN  0x400      /* Frame Counter 0 Zero Interrupt Enable */
-#define                    FCZ1EN  0x800      /* Frame Counter 1 Zero Interrupt Enable */
-#define                    PERREN  0x1000     /* Parity Error Interrupt Enable */
-#define                    MH2LEN  0x2000     /* MRXONB High to Low Interrupt Enable */
-#define                    ML2HEN  0x4000     /* MRXONB Low to High Interrupt Enable */
-#define                     WUPEN  0x8000     /* Wake-Up Preamble Received Interrupt Enable */
-#define                    FU2LEN  0x10000    /* Frame Unlock to Lock Interrupt Enable */
-#define                    FL2UEN  0x20000    /* Frame Lock to Unlock Interrupt Enable */
-#define                    BU2LEN  0x40000    /* Block Unlock to Lock Interrupt Enable */
-#define                    BL2UEN  0x80000    /* Block Lock to Unlock Interrupt Enable */
-#define                   OBERREN  0x100000   /* DMA Out of Bounds Error Interrupt Enable */
-#define                     PFLEN  0x200000   /* PLL Frequency Locked Interrupt Enable */
-#define                     SCZEN  0x400000   /* System Clock Counter Zero Interrupt Enable */
-#define                    FERREN  0x800000   /* FIFO Error Interrupt Enable */
-#define                     CMREN  0x1000000  /* Control Message Received Interrupt Enable */
-#define                   CMROFEN  0x2000000  /* Control Message Receive Buffer Overflow Interrupt Enable */
-#define                    CMTSEN  0x4000000  /* Control Message Transmit Buffer Successfully Sent Interrupt Enable */
-#define                    CMTCEN  0x8000000  /* Control Message Transmit Buffer Successfully Cancelled Interrupt Enable */
-#define                    RWRCEN  0x10000000 /* Remote Write Control Message Completed Interrupt Enable */
-#define                     BCZEN  0x20000000 /* Block Counter Zero Interrupt Enable */
-#define                   BMERREN  0x40000000 /* Biphase Mark Coding Error Interrupt Enable */
-#define                    DERREN  0x80000000 /* DMA Error Interrupt Enable */
-/* Bit masks for MXVR_INT_EN_1 */
-#define                  HDONEEN0  0x1        /* DMA0 Half Done Interrupt Enable */
-#define                   DONEEN0  0x2        /* DMA0 Done Interrupt Enable */
-#define                     APREN  0x4        /* Asynchronous Packet Received Interrupt Enable */
-#define                   APROFEN  0x8        /* Asynchronous Packet Receive Buffer Overflow Interrupt Enable */
-#define                  HDONEEN1  0x10       /* DMA1 Half Done Interrupt Enable */
-#define                   DONEEN1  0x20       /* DMA1 Done Interrupt Enable */
-#define                    APTSEN  0x40       /* Asynchronous Packet Transmit Buffer Successfully Sent Interrupt Enable */
-#define                    APTCEN  0x80       /* Asynchronous Packet Transmit Buffer Successfully Cancelled Interrupt Enable */
-#define                  HDONEEN2  0x100      /* DMA2 Half Done Interrupt Enable */
-#define                   DONEEN2  0x200      /* DMA2 Done Interrupt Enable */
-#define                   APRCEEN  0x400      /* Asynchronous Packet Receive CRC Error Interrupt Enable */
-#define                   APRPEEN  0x800      /* Asynchronous Packet Receive Packet Error Interrupt Enable */
-#define                  HDONEEN3  0x1000     /* DMA3 Half Done Interrupt Enable */
-#define                   DONEEN3  0x2000     /* DMA3 Done Interrupt Enable */
-#define                  HDONEEN4  0x10000    /* DMA4 Half Done Interrupt Enable */
-#define                   DONEEN4  0x20000    /* DMA4 Done Interrupt Enable */
-#define                  HDONEEN5  0x100000   /* DMA5 Half Done Interrupt Enable */
-#define                   DONEEN5  0x200000   /* DMA5 Done Interrupt Enable */
-#define                  HDONEEN6  0x1000000  /* DMA6 Half Done Interrupt Enable */
-#define                   DONEEN6  0x2000000  /* DMA6 Done Interrupt Enable */
-#define                  HDONEEN7  0x10000000 /* DMA7 Half Done Interrupt Enable */
-#define                   DONEEN7  0x20000000 /* DMA7 Done Interrupt Enable */
-/* Bit masks for MXVR_POSITION */
-#define                  POSITION  0x3f       /* Node Position */
-#define                    PVALID  0x8000     /* Node Position Valid */
-/* Bit masks for MXVR_MAX_POSITION */
-#define                 MPOSITION  0x3f       /* Maximum Node Position */
-#define                   MPVALID  0x8000     /* Maximum Node Position Valid */
-/* Bit masks for MXVR_DELAY */
-#define                     DELAY  0x3f       /* Node Frame Delay */
-#define                    DVALID  0x8000     /* Node Frame Delay Valid */
-/* Bit masks for MXVR_MAX_DELAY */
-#define                    MDELAY  0x3f       /* Maximum Node Frame Delay */
-#define                   MDVALID  0x8000     /* Maximum Node Frame Delay Valid */
-/* Bit masks for MXVR_LADDR */
-#define                     LADDR  0xffff     /* Logical Address */
-#define                    LVALID  0x80000000 /* Logical Address Valid */
-/* Bit masks for MXVR_GADDR */
-#define                    GADDRL  0xff       /* Group Address Lower Byte */
-#define                    GVALID  0x8000     /* Group Address Valid */
-/* Bit masks for MXVR_AADDR */
-#define                     AADDR  0xffff     /* Alternate Address */
-#define                    AVALID  0x80000000 /* Alternate Address Valid */
-/* Bit masks for MXVR_ALLOC_0 */
-#define                       CL0  0x7f       /* Channel 0 Connection Label */
-#define                      CIU0  0x80       /* Channel 0 In Use */
-#define                       CL1  0x7f00     /* Channel 0 Connection Label */
-#define                      CIU1  0x8000     /* Channel 0 In Use */
-#define                       CL2  0x7f0000   /* Channel 0 Connection Label */
-#define                      CIU2  0x800000   /* Channel 0 In Use */
-#define                       CL3  0x7f000000 /* Channel 0 Connection Label */
-#define                      CIU3  0x80000000 /* Channel 0 In Use */
-/* Bit masks for MXVR_ALLOC_1 */
-#define                       CL4  0x7f       /* Channel 4 Connection Label */
-#define                      CIU4  0x80       /* Channel 4 In Use */
-#define                       CL5  0x7f00     /* Channel 5 Connection Label */
-#define                      CIU5  0x8000     /* Channel 5 In Use */
-#define                       CL6  0x7f0000   /* Channel 6 Connection Label */
-#define                      CIU6  0x800000   /* Channel 6 In Use */
-#define                       CL7  0x7f000000 /* Channel 7 Connection Label */
-#define                      CIU7  0x80000000 /* Channel 7 In Use */
-/* Bit masks for MXVR_ALLOC_2 */
-#define                       CL8  0x7f       /* Channel 8 Connection Label */
-#define                      CIU8  0x80       /* Channel 8 In Use */
-#define                       CL9  0x7f00     /* Channel 9 Connection Label */
-#define                      CIU9  0x8000     /* Channel 9 In Use */
-#define                      CL10  0x7f0000   /* Channel 10 Connection Label */
-#define                     CIU10  0x800000   /* Channel 10 In Use */
-#define                      CL11  0x7f000000 /* Channel 11 Connection Label */
-#define                     CIU11  0x80000000 /* Channel 11 In Use */
-/* Bit masks for MXVR_ALLOC_3 */
-#define                      CL12  0x7f       /* Channel 12 Connection Label */
-#define                     CIU12  0x80       /* Channel 12 In Use */
-#define                      CL13  0x7f00     /* Channel 13 Connection Label */
-#define                     CIU13  0x8000     /* Channel 13 In Use */
-#define                      CL14  0x7f0000   /* Channel 14 Connection Label */
-#define                     CIU14  0x800000   /* Channel 14 In Use */
-#define                      CL15  0x7f000000 /* Channel 15 Connection Label */
-#define                     CIU15  0x80000000 /* Channel 15 In Use */
-/* Bit masks for MXVR_ALLOC_4 */
-#define                      CL16  0x7f       /* Channel 16 Connection Label */
-#define                     CIU16  0x80       /* Channel 16 In Use */
-#define                      CL17  0x7f00     /* Channel 17 Connection Label */
-#define                     CIU17  0x8000     /* Channel 17 In Use */
-#define                      CL18  0x7f0000   /* Channel 18 Connection Label */
-#define                     CIU18  0x800000   /* Channel 18 In Use */
-#define                      CL19  0x7f000000 /* Channel 19 Connection Label */
-#define                     CIU19  0x80000000 /* Channel 19 In Use */
-/* Bit masks for MXVR_ALLOC_5 */
-#define                      CL20  0x7f       /* Channel 20 Connection Label */
-#define                     CIU20  0x80       /* Channel 20 In Use */
-#define                      CL21  0x7f00     /* Channel 21 Connection Label */
-#define                     CIU21  0x8000     /* Channel 21 In Use */
-#define                      CL22  0x7f0000   /* Channel 22 Connection Label */
-#define                     CIU22  0x800000   /* Channel 22 In Use */
-#define                      CL23  0x7f000000 /* Channel 23 Connection Label */
-#define                     CIU23  0x80000000 /* Channel 23 In Use */
-/* Bit masks for MXVR_ALLOC_6 */
-#define                      CL24  0x7f       /* Channel 24 Connection Label */
-#define                     CIU24  0x80       /* Channel 24 In Use */
-#define                      CL25  0x7f00     /* Channel 25 Connection Label */
-#define                     CIU25  0x8000     /* Channel 25 In Use */
-#define                      CL26  0x7f0000   /* Channel 26 Connection Label */
-#define                     CIU26  0x800000   /* Channel 26 In Use */
-#define                      CL27  0x7f000000 /* Channel 27 Connection Label */
-#define                     CIU27  0x80000000 /* Channel 27 In Use */
-/* Bit masks for MXVR_ALLOC_7 */
-#define                      CL28  0x7f       /* Channel 28 Connection Label */
-#define                     CIU28  0x80       /* Channel 28 In Use */
-#define                      CL29  0x7f00     /* Channel 29 Connection Label */
-#define                     CIU29  0x8000     /* Channel 29 In Use */
-#define                      CL30  0x7f0000   /* Channel 30 Connection Label */
-#define                     CIU30  0x800000   /* Channel 30 In Use */
-#define                      CL31  0x7f000000 /* Channel 31 Connection Label */
-#define                     CIU31  0x80000000 /* Channel 31 In Use */
-/* Bit masks for MXVR_ALLOC_8 */
-#define                      CL32  0x7f       /* Channel 32 Connection Label */
-#define                     CIU32  0x80       /* Channel 32 In Use */
-#define                      CL33  0x7f00     /* Channel 33 Connection Label */
-#define                     CIU33  0x8000     /* Channel 33 In Use */
-#define                      CL34  0x7f0000   /* Channel 34 Connection Label */
-#define                     CIU34  0x800000   /* Channel 34 In Use */
-#define                      CL35  0x7f000000 /* Channel 35 Connection Label */
-#define                     CIU35  0x80000000 /* Channel 35 In Use */
-/* Bit masks for MXVR_ALLOC_9 */
-#define                      CL36  0x7f       /* Channel 36 Connection Label */
-#define                     CIU36  0x80       /* Channel 36 In Use */
-#define                      CL37  0x7f00     /* Channel 37 Connection Label */
-#define                     CIU37  0x8000     /* Channel 37 In Use */
-#define                      CL38  0x7f0000   /* Channel 38 Connection Label */
-#define                     CIU38  0x800000   /* Channel 38 In Use */
-#define                      CL39  0x7f000000 /* Channel 39 Connection Label */
-#define                     CIU39  0x80000000 /* Channel 39 In Use */
-/* Bit masks for MXVR_ALLOC_10 */
-#define                      CL40  0x7f       /* Channel 40 Connection Label */
-#define                     CIU40  0x80       /* Channel 40 In Use */
-#define                      CL41  0x7f00     /* Channel 41 Connection Label */
-#define                     CIU41  0x8000     /* Channel 41 In Use */
-#define                      CL42  0x7f0000   /* Channel 42 Connection Label */
-#define                     CIU42  0x800000   /* Channel 42 In Use */
-#define                      CL43  0x7f000000 /* Channel 43 Connection Label */
-#define                     CIU43  0x80000000 /* Channel 43 In Use */
-/* Bit masks for MXVR_ALLOC_11 */
-#define                      CL44  0x7f       /* Channel 44 Connection Label */
-#define                     CIU44  0x80       /* Channel 44 In Use */
-#define                      CL45  0x7f00     /* Channel 45 Connection Label */
-#define                     CIU45  0x8000     /* Channel 45 In Use */
-#define                      CL46  0x7f0000   /* Channel 46 Connection Label */
-#define                     CIU46  0x800000   /* Channel 46 In Use */
-#define                      CL47  0x7f000000 /* Channel 47 Connection Label */
-#define                     CIU47  0x80000000 /* Channel 47 In Use */
-/* Bit masks for MXVR_ALLOC_12 */
-#define                      CL48  0x7f       /* Channel 48 Connection Label */
-#define                     CIU48  0x80       /* Channel 48 In Use */
-#define                      CL49  0x7f00     /* Channel 49 Connection Label */
-#define                     CIU49  0x8000     /* Channel 49 In Use */
-#define                      CL50  0x7f0000   /* Channel 50 Connection Label */
-#define                     CIU50  0x800000   /* Channel 50 In Use */
-#define                      CL51  0x7f000000 /* Channel 51 Connection Label */
-#define                     CIU51  0x80000000 /* Channel 51 In Use */
-/* Bit masks for MXVR_ALLOC_13 */
-#define                      CL52  0x7f       /* Channel 52 Connection Label */
-#define                     CIU52  0x80       /* Channel 52 In Use */
-#define                      CL53  0x7f00     /* Channel 53 Connection Label */
-#define                     CIU53  0x8000     /* Channel 53 In Use */
-#define                      CL54  0x7f0000   /* Channel 54 Connection Label */
-#define                     CIU54  0x800000   /* Channel 54 In Use */
-#define                      CL55  0x7f000000 /* Channel 55 Connection Label */
-#define                     CIU55  0x80000000 /* Channel 55 In Use */
-/* Bit masks for MXVR_ALLOC_14 */
-#define                      CL56  0x7f       /* Channel 56 Connection Label */
-#define                     CIU56  0x80       /* Channel 56 In Use */
-#define                      CL57  0x7f00     /* Channel 57 Connection Label */
-#define                     CIU57  0x8000     /* Channel 57 In Use */
-#define                      CL58  0x7f0000   /* Channel 58 Connection Label */
-#define                     CIU58  0x800000   /* Channel 58 In Use */
-#define                      CL59  0x7f000000 /* Channel 59 Connection Label */
-#define                     CIU59  0x80000000 /* Channel 59 In Use */
-/* MXVR_SYNC_LCHAN_0 Masks */
-#define LCHANPC0     0x0000000Flu
-#define LCHANPC1     0x000000F0lu
-#define LCHANPC2     0x00000F00lu
-#define LCHANPC3     0x0000F000lu
-#define LCHANPC4     0x000F0000lu
-#define LCHANPC5     0x00F00000lu
-#define LCHANPC6     0x0F000000lu
-#define LCHANPC7     0xF0000000lu
-/* MXVR_SYNC_LCHAN_1 Masks */
-#define LCHANPC8     0x0000000Flu
-#define LCHANPC9     0x000000F0lu
-#define LCHANPC10    0x00000F00lu
-#define LCHANPC11    0x0000F000lu
-#define LCHANPC12    0x000F0000lu
-#define LCHANPC13    0x00F00000lu
-#define LCHANPC14    0x0F000000lu
-#define LCHANPC15    0xF0000000lu
-/* MXVR_SYNC_LCHAN_2 Masks */
-#define LCHANPC16    0x0000000Flu
-#define LCHANPC17    0x000000F0lu
-#define LCHANPC18    0x00000F00lu
-#define LCHANPC19    0x0000F000lu
-#define LCHANPC20    0x000F0000lu
-#define LCHANPC21    0x00F00000lu
-#define LCHANPC22    0x0F000000lu
-#define LCHANPC23    0xF0000000lu
-/* MXVR_SYNC_LCHAN_3 Masks */
-#define LCHANPC24    0x0000000Flu
-#define LCHANPC25    0x000000F0lu
-#define LCHANPC26    0x00000F00lu
-#define LCHANPC27    0x0000F000lu
-#define LCHANPC28    0x000F0000lu
-#define LCHANPC29    0x00F00000lu
-#define LCHANPC30    0x0F000000lu
-#define LCHANPC31    0xF0000000lu
-/* MXVR_SYNC_LCHAN_4 Masks */
-#define LCHANPC32    0x0000000Flu
-#define LCHANPC33    0x000000F0lu
-#define LCHANPC34    0x00000F00lu
-#define LCHANPC35    0x0000F000lu
-#define LCHANPC36    0x000F0000lu
-#define LCHANPC37    0x00F00000lu
-#define LCHANPC38    0x0F000000lu
-#define LCHANPC39    0xF0000000lu
-/* MXVR_SYNC_LCHAN_5 Masks */
-#define LCHANPC40    0x0000000Flu
-#define LCHANPC41    0x000000F0lu
-#define LCHANPC42    0x00000F00lu
-#define LCHANPC43    0x0000F000lu
-#define LCHANPC44    0x000F0000lu
-#define LCHANPC45    0x00F00000lu
-#define LCHANPC46    0x0F000000lu
-#define LCHANPC47    0xF0000000lu
-/* MXVR_SYNC_LCHAN_6 Masks */
-#define LCHANPC48    0x0000000Flu
-#define LCHANPC49    0x000000F0lu
-#define LCHANPC50    0x00000F00lu
-#define LCHANPC51    0x0000F000lu
-#define LCHANPC52    0x000F0000lu
-#define LCHANPC53    0x00F00000lu
-#define LCHANPC54    0x0F000000lu
-#define LCHANPC55    0xF0000000lu
-/* MXVR_SYNC_LCHAN_7 Masks */
-#define LCHANPC56    0x0000000Flu
-#define LCHANPC57    0x000000F0lu
-#define LCHANPC58    0x00000F00lu
-#define LCHANPC59    0x0000F000lu
-/* Bit masks for MXVR_DMAx_CONFIG */
-#define                    MDMAEN  0x1        /* DMA Channel Enable */
-#define                     DMADD  0x2        /* DMA Channel Direction */
-#define                 BY4SWAPEN  0x20       /* DMA Channel Four Byte Swap Enable */
-#define                     LCHAN  0x3c0      /* DMA Channel Logical Channel */
-#define                 BITSWAPEN  0x400      /* DMA Channel Bit Swap Enable */
-#define                 BY2SWAPEN  0x800      /* DMA Channel Two Byte Swap Enable */
-#define                     MFLOW  0x7000     /* DMA Channel Operation Flow */
-#define                   FIXEDPM  0x80000    /* DMA Channel Fixed Pattern Matching Select */
-#define                  STARTPAT  0x300000   /* DMA Channel Start Pattern Select */
-#define                   STOPPAT  0xc00000   /* DMA Channel Stop Pattern Select */
-#define                  COUNTPOS  0x1c000000 /* DMA Channel Count Position */
-/* Bit masks for MXVR_AP_CTL */
-#define                   STARTAP  0x1        /* Start Asynchronous Packet Transmission */
-#define                  CANCELAP  0x2        /* Cancel Asynchronous Packet Transmission */
-#define                   RESETAP  0x4        /* Reset Asynchronous Packet Arbitration */
-#define                    APRBE0  0x4000     /* Asynchronous Packet Receive Buffer Entry 0 */
-#define                    APRBE1  0x8000     /* Asynchronous Packet Receive Buffer Entry 1 */
-/* Bit masks for MXVR_APRB_START_ADDR */
-#define      MXVR_APRB_START_ADDR_MASK  0x1fffffe  /* Asynchronous Packet Receive Buffer Start Address */
-/* Bit masks for MXVR_APRB_CURR_ADDR */
-#define       MXVR_APRB_CURR_ADDR_MASK  0xffffffff /* Asynchronous Packet Receive Buffer Current Address */
-/* Bit masks for MXVR_APTB_START_ADDR */
-#define       MXVR_APTB_START_ADDR_MASK  0x1fffffe  /* Asynchronous Packet Transmit Buffer Start Address */
-/* Bit masks for MXVR_APTB_CURR_ADDR */
-#define        MXVR_APTB_CURR_ADDR_MASK  0xffffffff /* Asynchronous Packet Transmit Buffer Current Address */
-/* Bit masks for MXVR_CM_CTL */
-#define                   STARTCM  0x1        /* Start Control Message Transmission */
-#define                  CANCELCM  0x2        /* Cancel Control Message Transmission */
-#define                    CMRBE0  0x10000    /* Control Message Receive Buffer Entry 0 */
-#define                    CMRBE1  0x20000    /* Control Message Receive Buffer Entry 1 */
-#define                    CMRBE2  0x40000    /* Control Message Receive Buffer Entry 2 */
-#define                    CMRBE3  0x80000    /* Control Message Receive Buffer Entry 3 */
-#define                    CMRBE4  0x100000   /* Control Message Receive Buffer Entry 4 */
-#define                    CMRBE5  0x200000   /* Control Message Receive Buffer Entry 5 */
-#define                    CMRBE6  0x400000   /* Control Message Receive Buffer Entry 6 */
-#define                    CMRBE7  0x800000   /* Control Message Receive Buffer Entry 7 */
-#define                    CMRBE8  0x1000000  /* Control Message Receive Buffer Entry 8 */
-#define                    CMRBE9  0x2000000  /* Control Message Receive Buffer Entry 9 */
-#define                   CMRBE10  0x4000000  /* Control Message Receive Buffer Entry 10 */
-#define                   CMRBE11  0x8000000  /* Control Message Receive Buffer Entry 11 */
-#define                   CMRBE12  0x10000000 /* Control Message Receive Buffer Entry 12 */
-#define                   CMRBE13  0x20000000 /* Control Message Receive Buffer Entry 13 */
-#define                   CMRBE14  0x40000000 /* Control Message Receive Buffer Entry 14 */
-#define                   CMRBE15  0x80000000 /* Control Message Receive Buffer Entry 15 */
-/* Bit masks for MXVR_CMRB_START_ADDR */
-#define      MXVR_CMRB_START_ADDR_MASK  0x1fffffe  /* Control Message Receive Buffer Start Address */
-/* Bit masks for MXVR_CMRB_CURR_ADDR */
-#define       MXVR_CMRB_CURR_ADDR_MASK  0xffffffff /* Control Message Receive Buffer Current Address */
-/* Bit masks for MXVR_CMTB_START_ADDR */
-#define      MXVR_CMTB_START_ADDR_MASK  0x1fffffe  /* Control Message Transmit Buffer Start Address */
-/* Bit masks for MXVR_CMTB_CURR_ADDR */
-#define       MXVR_CMTB_CURR_ADDR_MASK  0xffffffff /* Control Message Transmit Buffer Current Address */
-/* Bit masks for MXVR_RRDB_START_ADDR */
-#define      MXVR_RRDB_START_ADDR_MASK  0x1fffffe  /* Remote Read Buffer Start Address */
-/* Bit masks for MXVR_RRDB_CURR_ADDR */
-#define       MXVR_RRDB_CURR_ADDR_MASK  0xffffffff /* Remote Read Buffer Current Address */
-/* Bit masks for MXVR_PAT_DATAx */
-#define              MATCH_DATA_0  0xff       /* Pattern Match Data Byte 0 */
-#define              MATCH_DATA_1  0xff00     /* Pattern Match Data Byte 1 */
-#define              MATCH_DATA_2  0xff0000   /* Pattern Match Data Byte 2 */
-#define              MATCH_DATA_3  0xff000000 /* Pattern Match Data Byte 3 */
-/* Bit masks for MXVR_PAT_EN_0 */
-#define              MATCH_EN_0_0  0x1        /* Pattern Match Enable Byte 0 Bit 0 */
-#define              MATCH_EN_0_1  0x2        /* Pattern Match Enable Byte 0 Bit 1 */
-#define              MATCH_EN_0_2  0x4        /* Pattern Match Enable Byte 0 Bit 2 */
-#define              MATCH_EN_0_3  0x8        /* Pattern Match Enable Byte 0 Bit 3 */
-#define              MATCH_EN_0_4  0x10       /* Pattern Match Enable Byte 0 Bit 4 */
-#define              MATCH_EN_0_5  0x20       /* Pattern Match Enable Byte 0 Bit 5 */
-#define              MATCH_EN_0_6  0x40       /* Pattern Match Enable Byte 0 Bit 6 */
-#define              MATCH_EN_0_7  0x80       /* Pattern Match Enable Byte 0 Bit 7 */
-#define              MATCH_EN_1_0  0x100      /* Pattern Match Enable Byte 1 Bit 0 */
-#define              MATCH_EN_1_1  0x200      /* Pattern Match Enable Byte 1 Bit 1 */
-#define              MATCH_EN_1_2  0x400      /* Pattern Match Enable Byte 1 Bit 2 */
-#define              MATCH_EN_1_3  0x800      /* Pattern Match Enable Byte 1 Bit 3 */
-#define              MATCH_EN_1_4  0x1000     /* Pattern Match Enable Byte 1 Bit 4 */
-#define              MATCH_EN_1_5  0x2000     /* Pattern Match Enable Byte 1 Bit 5 */
-#define              MATCH_EN_1_6  0x4000     /* Pattern Match Enable Byte 1 Bit 6 */
-#define              MATCH_EN_1_7  0x8000     /* Pattern Match Enable Byte 1 Bit 7 */
-#define              MATCH_EN_2_0  0x10000    /* Pattern Match Enable Byte 2 Bit 0 */
-#define              MATCH_EN_2_1  0x20000    /* Pattern Match Enable Byte 2 Bit 1 */
-#define              MATCH_EN_2_2  0x40000    /* Pattern Match Enable Byte 2 Bit 2 */
-#define              MATCH_EN_2_3  0x80000    /* Pattern Match Enable Byte 2 Bit 3 */
-#define              MATCH_EN_2_4  0x100000   /* Pattern Match Enable Byte 2 Bit 4 */
-#define              MATCH_EN_2_5  0x200000   /* Pattern Match Enable Byte 2 Bit 5 */
-#define              MATCH_EN_2_6  0x400000   /* Pattern Match Enable Byte 2 Bit 6 */
-#define              MATCH_EN_2_7  0x800000   /* Pattern Match Enable Byte 2 Bit 7 */
-#define              MATCH_EN_3_0  0x1000000  /* Pattern Match Enable Byte 3 Bit 0 */
-#define              MATCH_EN_3_1  0x2000000  /* Pattern Match Enable Byte 3 Bit 1 */
-#define              MATCH_EN_3_2  0x4000000  /* Pattern Match Enable Byte 3 Bit 2 */
-#define              MATCH_EN_3_3  0x8000000  /* Pattern Match Enable Byte 3 Bit 3 */
-#define              MATCH_EN_3_4  0x10000000 /* Pattern Match Enable Byte 3 Bit 4 */
-#define              MATCH_EN_3_5  0x20000000 /* Pattern Match Enable Byte 3 Bit 5 */
-#define              MATCH_EN_3_6  0x40000000 /* Pattern Match Enable Byte 3 Bit 6 */
-#define              MATCH_EN_3_7  0x80000000 /* Pattern Match Enable Byte 3 Bit 7 */
-/* Bit masks for MXVR_PAT_EN_1 */
-#define              MATCH_EN_0_0  0x1        /* Pattern Match Enable Byte 0 Bit 0 */
-#define              MATCH_EN_0_1  0x2        /* Pattern Match Enable Byte 0 Bit 1 */
-#define              MATCH_EN_0_2  0x4        /* Pattern Match Enable Byte 0 Bit 2 */
-#define              MATCH_EN_0_3  0x8        /* Pattern Match Enable Byte 0 Bit 3 */
-#define              MATCH_EN_0_4  0x10       /* Pattern Match Enable Byte 0 Bit 4 */
-#define              MATCH_EN_0_5  0x20       /* Pattern Match Enable Byte 0 Bit 5 */
-#define              MATCH_EN_0_6  0x40       /* Pattern Match Enable Byte 0 Bit 6 */
-#define              MATCH_EN_0_7  0x80       /* Pattern Match Enable Byte 0 Bit 7 */
-#define              MATCH_EN_1_0  0x100      /* Pattern Match Enable Byte 1 Bit 0 */
-#define              MATCH_EN_1_1  0x200      /* Pattern Match Enable Byte 1 Bit 1 */
-#define              MATCH_EN_1_2  0x400      /* Pattern Match Enable Byte 1 Bit 2 */
-#define              MATCH_EN_1_3  0x800      /* Pattern Match Enable Byte 1 Bit 3 */
-#define              MATCH_EN_1_4  0x1000     /* Pattern Match Enable Byte 1 Bit 4 */
-#define              MATCH_EN_1_5  0x2000     /* Pattern Match Enable Byte 1 Bit 5 */
-#define              MATCH_EN_1_6  0x4000     /* Pattern Match Enable Byte 1 Bit 6 */
-#define              MATCH_EN_1_7  0x8000     /* Pattern Match Enable Byte 1 Bit 7 */
-#define              MATCH_EN_2_0  0x10000    /* Pattern Match Enable Byte 2 Bit 0 */
-#define              MATCH_EN_2_1  0x20000    /* Pattern Match Enable Byte 2 Bit 1 */
-#define              MATCH_EN_2_2  0x40000    /* Pattern Match Enable Byte 2 Bit 2 */
-#define              MATCH_EN_2_3  0x80000    /* Pattern Match Enable Byte 2 Bit 3 */
-#define              MATCH_EN_2_4  0x100000   /* Pattern Match Enable Byte 2 Bit 4 */
-#define              MATCH_EN_2_5  0x200000   /* Pattern Match Enable Byte 2 Bit 5 */
-#define              MATCH_EN_2_6  0x400000   /* Pattern Match Enable Byte 2 Bit 6 */
-#define              MATCH_EN_2_7  0x800000   /* Pattern Match Enable Byte 2 Bit 7 */
-#define              MATCH_EN_3_0  0x1000000  /* Pattern Match Enable Byte 3 Bit 0 */
-#define              MATCH_EN_3_1  0x2000000  /* Pattern Match Enable Byte 3 Bit 1 */
-#define              MATCH_EN_3_2  0x4000000  /* Pattern Match Enable Byte 3 Bit 2 */
-#define              MATCH_EN_3_3  0x8000000  /* Pattern Match Enable Byte 3 Bit 3 */
-#define              MATCH_EN_3_4  0x10000000 /* Pattern Match Enable Byte 3 Bit 4 */
-#define              MATCH_EN_3_5  0x20000000 /* Pattern Match Enable Byte 3 Bit 5 */
-#define              MATCH_EN_3_6  0x40000000 /* Pattern Match Enable Byte 3 Bit 6 */
-#define              MATCH_EN_3_7  0x80000000 /* Pattern Match Enable Byte 3 Bit 7 */
-/* Bit masks for MXVR_FRAME_CNT_0 */
-#define                      FCNT  0xffff     /* Frame Count */
-/* Bit masks for MXVR_FRAME_CNT_1 */
-#define                      FCNT  0xffff     /* Frame Count */
-/* Bit masks for MXVR_ROUTING_0 */
-#define                    TX_CH0  0x3f       /* Transmit Channel 0 */
-#define                  MUTE_CH0  0x80       /* Mute Channel 0 */
-#define                    TX_CH1  0x3f00     /* Transmit Channel 0 */
-#define                  MUTE_CH1  0x8000     /* Mute Channel 0 */
-#define                    TX_CH2  0x3f0000   /* Transmit Channel 0 */
-#define                  MUTE_CH2  0x800000   /* Mute Channel 0 */
-#define                    TX_CH3  0x3f000000 /* Transmit Channel 0 */
-#define                  MUTE_CH3  0x80000000 /* Mute Channel 0 */
-/* Bit masks for MXVR_ROUTING_1 */
-#define                    TX_CH4  0x3f       /* Transmit Channel 4 */
-#define                  MUTE_CH4  0x80       /* Mute Channel 4 */
-#define                    TX_CH5  0x3f00     /* Transmit Channel 5 */
-#define                  MUTE_CH5  0x8000     /* Mute Channel 5 */
-#define                    TX_CH6  0x3f0000   /* Transmit Channel 6 */
-#define                  MUTE_CH6  0x800000   /* Mute Channel 6 */
-#define                    TX_CH7  0x3f000000 /* Transmit Channel 7 */
-#define                  MUTE_CH7  0x80000000 /* Mute Channel 7 */
-/* Bit masks for MXVR_ROUTING_2 */
-#define                    TX_CH8  0x3f       /* Transmit Channel 8 */
-#define                  MUTE_CH8  0x80       /* Mute Channel 8 */
-#define                    TX_CH9  0x3f00     /* Transmit Channel 9 */
-#define                  MUTE_CH9  0x8000     /* Mute Channel 9 */
-#define                   TX_CH10  0x3f0000   /* Transmit Channel 10 */
-#define                 MUTE_CH10  0x800000   /* Mute Channel 10 */
-#define                   TX_CH11  0x3f000000 /* Transmit Channel 11 */
-#define                 MUTE_CH11  0x80000000 /* Mute Channel 11 */
-/* Bit masks for MXVR_ROUTING_3 */
-#define                   TX_CH12  0x3f       /* Transmit Channel 12 */
-#define                 MUTE_CH12  0x80       /* Mute Channel 12 */
-#define                   TX_CH13  0x3f00     /* Transmit Channel 13 */
-#define                 MUTE_CH13  0x8000     /* Mute Channel 13 */
-#define                   TX_CH14  0x3f0000   /* Transmit Channel 14 */
-#define                 MUTE_CH14  0x800000   /* Mute Channel 14 */
-#define                   TX_CH15  0x3f000000 /* Transmit Channel 15 */
-#define                 MUTE_CH15  0x80000000 /* Mute Channel 15 */
-/* Bit masks for MXVR_ROUTING_4 */
-#define                   TX_CH16  0x3f       /* Transmit Channel 16 */
-#define                 MUTE_CH16  0x80       /* Mute Channel 16 */
-#define                   TX_CH17  0x3f00     /* Transmit Channel 17 */
-#define                 MUTE_CH17  0x8000     /* Mute Channel 17 */
-#define                   TX_CH18  0x3f0000   /* Transmit Channel 18 */
-#define                 MUTE_CH18  0x800000   /* Mute Channel 18 */
-#define                   TX_CH19  0x3f000000 /* Transmit Channel 19 */
-#define                 MUTE_CH19  0x80000000 /* Mute Channel 19 */
-/* Bit masks for MXVR_ROUTING_5 */
-#define                   TX_CH20  0x3f       /* Transmit Channel 20 */
-#define                 MUTE_CH20  0x80       /* Mute Channel 20 */
-#define                   TX_CH21  0x3f00     /* Transmit Channel 21 */
-#define                 MUTE_CH21  0x8000     /* Mute Channel 21 */
-#define                   TX_CH22  0x3f0000   /* Transmit Channel 22 */
-#define                 MUTE_CH22  0x800000   /* Mute Channel 22 */
-#define                   TX_CH23  0x3f000000 /* Transmit Channel 23 */
-#define                 MUTE_CH23  0x80000000 /* Mute Channel 23 */
-/* Bit masks for MXVR_ROUTING_6 */
-#define                   TX_CH24  0x3f       /* Transmit Channel 24 */
-#define                 MUTE_CH24  0x80       /* Mute Channel 24 */
-#define                   TX_CH25  0x3f00     /* Transmit Channel 25 */
-#define                 MUTE_CH25  0x8000     /* Mute Channel 25 */
-#define                   TX_CH26  0x3f0000   /* Transmit Channel 26 */
-#define                 MUTE_CH26  0x800000   /* Mute Channel 26 */
-#define                   TX_CH27  0x3f000000 /* Transmit Channel 27 */
-#define                 MUTE_CH27  0x80000000 /* Mute Channel 27 */
-/* Bit masks for MXVR_ROUTING_7 */
-#define                   TX_CH28  0x3f       /* Transmit Channel 28 */
-#define                 MUTE_CH28  0x80       /* Mute Channel 28 */
-#define                   TX_CH29  0x3f00     /* Transmit Channel 29 */
-#define                 MUTE_CH29  0x8000     /* Mute Channel 29 */
-#define                   TX_CH30  0x3f0000   /* Transmit Channel 30 */
-#define                 MUTE_CH30  0x800000   /* Mute Channel 30 */
-#define                   TX_CH31  0x3f000000 /* Transmit Channel 31 */
-#define                 MUTE_CH31  0x80000000 /* Mute Channel 31 */
-/* Bit masks for MXVR_ROUTING_8 */
-#define                   TX_CH32  0x3f       /* Transmit Channel 32 */
-#define                 MUTE_CH32  0x80       /* Mute Channel 32 */
-#define                   TX_CH33  0x3f00     /* Transmit Channel 33 */
-#define                 MUTE_CH33  0x8000     /* Mute Channel 33 */
-#define                   TX_CH34  0x3f0000   /* Transmit Channel 34 */
-#define                 MUTE_CH34  0x800000   /* Mute Channel 34 */
-#define                   TX_CH35  0x3f000000 /* Transmit Channel 35 */
-#define                 MUTE_CH35  0x80000000 /* Mute Channel 35 */
-/* Bit masks for MXVR_ROUTING_9 */
-#define                   TX_CH36  0x3f       /* Transmit Channel 36 */
-#define                 MUTE_CH36  0x80       /* Mute Channel 36 */
-#define                   TX_CH37  0x3f00     /* Transmit Channel 37 */
-#define                 MUTE_CH37  0x8000     /* Mute Channel 37 */
-#define                   TX_CH38  0x3f0000   /* Transmit Channel 38 */
-#define                 MUTE_CH38  0x800000   /* Mute Channel 38 */
-#define                   TX_CH39  0x3f000000 /* Transmit Channel 39 */
-#define                 MUTE_CH39  0x80000000 /* Mute Channel 39 */
-/* Bit masks for MXVR_ROUTING_10 */
-#define                   TX_CH40  0x3f       /* Transmit Channel 40 */
-#define                 MUTE_CH40  0x80       /* Mute Channel 40 */
-#define                   TX_CH41  0x3f00     /* Transmit Channel 41 */
-#define                 MUTE_CH41  0x8000     /* Mute Channel 41 */
-#define                   TX_CH42  0x3f0000   /* Transmit Channel 42 */
-#define                 MUTE_CH42  0x800000   /* Mute Channel 42 */
-#define                   TX_CH43  0x3f000000 /* Transmit Channel 43 */
-#define                 MUTE_CH43  0x80000000 /* Mute Channel 43 */
-/* Bit masks for MXVR_ROUTING_11 */
-#define                   TX_CH44  0x3f       /* Transmit Channel 44 */
-#define                 MUTE_CH44  0x80       /* Mute Channel 44 */
-#define                   TX_CH45  0x3f00     /* Transmit Channel 45 */
-#define                 MUTE_CH45  0x8000     /* Mute Channel 45 */
-#define                   TX_CH46  0x3f0000   /* Transmit Channel 46 */
-#define                 MUTE_CH46  0x800000   /* Mute Channel 46 */
-#define                   TX_CH47  0x3f000000 /* Transmit Channel 47 */
-#define                 MUTE_CH47  0x80000000 /* Mute Channel 47 */
-/* Bit masks for MXVR_ROUTING_12 */
-#define                   TX_CH48  0x3f       /* Transmit Channel 48 */
-#define                 MUTE_CH48  0x80       /* Mute Channel 48 */
-#define                   TX_CH49  0x3f00     /* Transmit Channel 49 */
-#define                 MUTE_CH49  0x8000     /* Mute Channel 49 */
-#define                   TX_CH50  0x3f0000   /* Transmit Channel 50 */
-#define                 MUTE_CH50  0x800000   /* Mute Channel 50 */
-#define                   TX_CH51  0x3f000000 /* Transmit Channel 51 */
-#define                 MUTE_CH51  0x80000000 /* Mute Channel 51 */
-/* Bit masks for MXVR_ROUTING_13 */
-#define                   TX_CH52  0x3f       /* Transmit Channel 52 */
-#define                 MUTE_CH52  0x80       /* Mute Channel 52 */
-#define                   TX_CH53  0x3f00     /* Transmit Channel 53 */
-#define                 MUTE_CH53  0x8000     /* Mute Channel 53 */
-#define                   TX_CH54  0x3f0000   /* Transmit Channel 54 */
-#define                 MUTE_CH54  0x800000   /* Mute Channel 54 */
-#define                   TX_CH55  0x3f000000 /* Transmit Channel 55 */
-#define                 MUTE_CH55  0x80000000 /* Mute Channel 55 */
-/* Bit masks for MXVR_ROUTING_14 */
-#define                   TX_CH56  0x3f       /* Transmit Channel 56 */
-#define                 MUTE_CH56  0x80       /* Mute Channel 56 */
-#define                   TX_CH57  0x3f00     /* Transmit Channel 57 */
-#define                 MUTE_CH57  0x8000     /* Mute Channel 57 */
-#define                   TX_CH58  0x3f0000   /* Transmit Channel 58 */
-#define                 MUTE_CH58  0x800000   /* Mute Channel 58 */
-#define                   TX_CH59  0x3f000000 /* Transmit Channel 59 */
-#define                 MUTE_CH59  0x80000000 /* Mute Channel 59 */
-/* Bit masks for MXVR_BLOCK_CNT */
-#define                      BCNT  0xffff     /* Block Count */
-/* Bit masks for MXVR_CLK_CTL */
-#define                  MXTALCEN  0x1        /* MXVR Crystal Oscillator Clock Enable */
-#define                  MXTALFEN  0x2        /* MXVR Crystal Oscillator Feedback Enable */
-#define                  MXTALMUL  0x30       /* MXVR Crystal Multiplier */
-#define                  CLKX3SEL  0x80       /* Clock Generation Source Select */
-#define                   MMCLKEN  0x100      /* Master Clock Enable */
-#define                  MMCLKMUL  0x1e00     /* Master Clock Multiplication Factor */
-#define                   PLLSMPS  0xe000     /* MXVR PLL State Machine Prescaler */
-#define                   MBCLKEN  0x10000    /* Bit Clock Enable */
-#define                  MBCLKDIV  0x1e0000   /* Bit Clock Divide Factor */
-#define                     INVRX  0x800000   /* Invert Receive Data */
-#define                     MFSEN  0x1000000  /* Frame Sync Enable */
-#define                    MFSDIV  0x1e000000 /* Frame Sync Divide Factor */
-#define                    MFSSEL  0x60000000 /* Frame Sync Select */
-#define                   MFSSYNC  0x80000000 /* Frame Sync Synchronization Select */
-/* Bit masks for MXVR_CDRPLL_CTL */
-#define                   CDRSMEN  0x1        /* MXVR CDRPLL State Machine Enable */
-#define                   CDRRSTB  0x2        /* MXVR CDRPLL Reset */
-#define                   CDRSVCO  0x4        /* MXVR CDRPLL Start VCO */
-#define                   CDRMODE  0x8        /* MXVR CDRPLL CDR Mode Select */
-#define                   CDRSCNT  0x3f0      /* MXVR CDRPLL Start Counter */
-#define                   CDRLCNT  0xfc00     /* MXVR CDRPLL Lock Counter */
-#define                 CDRSHPSEL  0x3f0000   /* MXVR CDRPLL Shaper Select */
-#define                  CDRSHPEN  0x800000   /* MXVR CDRPLL Shaper Enable */
-#define                  CDRCPSEL  0xff000000 /* MXVR CDRPLL Charge Pump Current Select */
-/* Bit masks for MXVR_FMPLL_CTL */
-#define                    FMSMEN  0x1        /* MXVR FMPLL State Machine Enable */
-#define                    FMRSTB  0x2        /* MXVR FMPLL Reset */
-#define                    FMSVCO  0x4        /* MXVR FMPLL Start VCO */
-#define                    FMSCNT  0x3f0      /* MXVR FMPLL Start Counter */
-#define                    FMLCNT  0xfc00     /* MXVR FMPLL Lock Counter */
-#define                   FMCPSEL  0xff000000 /* MXVR FMPLL Charge Pump Current Select */
-/* Bit masks for MXVR_PIN_CTL */
-#define                  MTXONBOD  0x1        /* MTXONB Open Drain Select */
-#define                   MTXONBG  0x2        /* MTXONB Gates MTX Select */
-#define                     MFSOE  0x10       /* MFS Output Enable */
-#define                  MFSGPSEL  0x20       /* MFS General Purpose Output Select */
-#define                  MFSGPDAT  0x40       /* MFS General Purpose Output Data */
-/* Bit masks for MXVR_SCLK_CNT */
-#define                      SCNT  0xffff     /* System Clock Count */
-/* Bit masks for KPAD_CTL */
-#define                   KPAD_EN  0x1        /* Keypad Enable */
-#define              KPAD_IRQMODE  0x6        /* Key Press Interrupt Enable */
-#define                KPAD_ROWEN  0x1c00     /* Row Enable Width */
-#define                KPAD_COLEN  0xe000     /* Column Enable Width */
-/* Bit masks for KPAD_PRESCALE */
-#define         KPAD_PRESCALE_VAL  0x3f       /* Key Prescale Value */
-/* Bit masks for KPAD_MSEL */
-#define                DBON_SCALE  0xff       /* Debounce Scale Value */
-#define              COLDRV_SCALE  0xff00     /* Column Driver Scale Value */
-/* Bit masks for KPAD_ROWCOL */
-#define                  KPAD_ROW  0xff       /* Rows Pressed */
-#define                  KPAD_COL  0xff00     /* Columns Pressed */
-/* Bit masks for KPAD_STAT */
-#define                  KPAD_IRQ  0x1        /* Keypad Interrupt Status */
-#define              KPAD_MROWCOL  0x6        /* Multiple Row/Column Keypress Status */
-#define              KPAD_PRESSED  0x8        /* Key press current status */
-/* Bit masks for KPAD_SOFTEVAL */
-#define           KPAD_SOFTEVAL_E  0x2        /* Software Programmable Force Evaluate */
-/* Bit masks for SDH_COMMAND */
-#define                   CMD_IDX  0x3f       /* Command Index */
-#define                   CMD_RSP  0x40       /* Response */
-#define                 CMD_L_RSP  0x80       /* Long Response */
-#define                 CMD_INT_E  0x100      /* Command Interrupt */
-#define                CMD_PEND_E  0x200      /* Command Pending */
-#define                     CMD_E  0x400      /* Command Enable */
-/* Bit masks for SDH_PWR_CTL */
-#define                    PWR_ON  0x3        /* Power On */
-#if 0
-#define                       TBD  0x3c       /* TBD */
-#endif
-#define                 SD_CMD_OD  0x40       /* Open Drain Output */
-#define                   ROD_CTL  0x80       /* Rod Control */
-/* Bit masks for SDH_CLK_CTL */
-#define                    CLKDIV  0xff       /* MC_CLK Divisor */
-#define                     CLK_E  0x100      /* MC_CLK Bus Clock Enable */
-#define                  PWR_SV_E  0x200      /* Power Save Enable */
-#define             CLKDIV_BYPASS  0x400      /* Bypass Divisor */
-#define                  WIDE_BUS  0x800      /* Wide Bus Mode Enable */
-/* Bit masks for SDH_RESP_CMD */
-#define                  RESP_CMD  0x3f       /* Response Command */
-/* Bit masks for SDH_DATA_CTL */
-#define                     DTX_E  0x1        /* Data Transfer Enable */
-#define                   DTX_DIR  0x2        /* Data Transfer Direction */
-#define                  DTX_MODE  0x4        /* Data Transfer Mode */
-#define                 DTX_DMA_E  0x8        /* Data Transfer DMA Enable */
-#define              DTX_BLK_LGTH  0xf0       /* Data Transfer Block Length */
-/* Bit masks for SDH_STATUS */
-#define              CMD_CRC_FAIL  0x1        /* CMD CRC Fail */
-#define              DAT_CRC_FAIL  0x2        /* Data CRC Fail */
-#define               CMD_TIME_OUT  0x4        /* CMD Time Out */
-#define               DAT_TIME_OUT  0x8        /* Data Time Out */
-#define               TX_UNDERRUN  0x10       /* Transmit Underrun */
-#define                RX_OVERRUN  0x20       /* Receive Overrun */
-#define              CMD_RESP_END  0x40       /* CMD Response End */
-#define                  CMD_SENT  0x80       /* CMD Sent */
-#define                   DAT_END  0x100      /* Data End */
-#define             START_BIT_ERR  0x200      /* Start Bit Error */
-#define               DAT_BLK_END  0x400      /* Data Block End */
-#define                   CMD_ACT  0x800      /* CMD Active */
-#define                    TX_ACT  0x1000     /* Transmit Active */
-#define                    RX_ACT  0x2000     /* Receive Active */
-#define              TX_FIFO_STAT  0x4000     /* Transmit FIFO Status */
-#define              RX_FIFO_STAT  0x8000     /* Receive FIFO Status */
-#define              TX_FIFO_FULL  0x10000    /* Transmit FIFO Full */
-#define              RX_FIFO_FULL  0x20000    /* Receive FIFO Full */
-#define              TX_FIFO_ZERO  0x40000    /* Transmit FIFO Empty */
-#define               RX_DAT_ZERO  0x80000    /* Receive FIFO Empty */
-#define                TX_DAT_RDY  0x100000   /* Transmit Data Available */
-#define               RX_FIFO_RDY  0x200000   /* Receive Data Available */
-/* Bit masks for SDH_STATUS_CLR */
-#define         CMD_CRC_FAIL_STAT  0x1        /* CMD CRC Fail Status */
-#define         DAT_CRC_FAIL_STAT  0x2        /* Data CRC Fail Status */
-#define          CMD_TIMEOUT_STAT  0x4        /* CMD Time Out Status */
-#define          DAT_TIMEOUT_STAT  0x8        /* Data Time Out status */
-#define          TX_UNDERRUN_STAT  0x10       /* Transmit Underrun Status */
-#define           RX_OVERRUN_STAT  0x20       /* Receive Overrun Status */
-#define         CMD_RESP_END_STAT  0x40       /* CMD Response End Status */
-#define             CMD_SENT_STAT  0x80       /* CMD Sent Status */
-#define              DAT_END_STAT  0x100      /* Data End Status */
-#define        START_BIT_ERR_STAT  0x200      /* Start Bit Error Status */
-#define          DAT_BLK_END_STAT  0x400      /* Data Block End Status */
-/* Bit masks for SDH_MASK0 */
-#define         CMD_CRC_FAIL_MASK  0x1        /* CMD CRC Fail Mask */
-#define         DAT_CRC_FAIL_MASK  0x2        /* Data CRC Fail Mask */
-#define          CMD_TIMEOUT_MASK  0x4        /* CMD Time Out Mask */
-#define          DAT_TIMEOUT_MASK  0x8        /* Data Time Out Mask */
-#define          TX_UNDERRUN_MASK  0x10       /* Transmit Underrun Mask */
-#define           RX_OVERRUN_MASK  0x20       /* Receive Overrun Mask */
-#define         CMD_RESP_END_MASK  0x40       /* CMD Response End Mask */
-#define             CMD_SENT_MASK  0x80       /* CMD Sent Mask */
-#define              DAT_END_MASK  0x100      /* Data End Mask */
-#define        START_BIT_ERR_MASK  0x200      /* Start Bit Error Mask */
-#define          DAT_BLK_END_MASK  0x400      /* Data Block End Mask */
-#define              CMD_ACT_MASK  0x800      /* CMD Active Mask */
-#define               TX_ACT_MASK  0x1000     /* Transmit Active Mask */
-#define               RX_ACT_MASK  0x2000     /* Receive Active Mask */
-#define         TX_FIFO_STAT_MASK  0x4000     /* Transmit FIFO Status Mask */
-#define         RX_FIFO_STAT_MASK  0x8000     /* Receive FIFO Status Mask */
-#define         TX_FIFO_FULL_MASK  0x10000    /* Transmit FIFO Full Mask */
-#define         RX_FIFO_FULL_MASK  0x20000    /* Receive FIFO Full Mask */
-#define         TX_FIFO_ZERO_MASK  0x40000    /* Transmit FIFO Empty Mask */
-#define          RX_DAT_ZERO_MASK  0x80000    /* Receive FIFO Empty Mask */
-#define           TX_DAT_RDY_MASK  0x100000   /* Transmit Data Available Mask */
-#define          RX_FIFO_RDY_MASK  0x200000   /* Receive Data Available Mask */
-/* Bit masks for SDH_FIFO_CNT */
-#define                FIFO_COUNT  0x7fff     /* FIFO Count */
-/* Bit masks for SDH_E_STATUS */
-#define              SDIO_INT_DET  0x2        /* SDIO Int Detected */
-#define               SD_CARD_DET  0x10       /* SD Card Detect */
-/* Bit masks for SDH_E_MASK */
-#define                  SDIO_MSK  0x2        /* Mask SDIO Int Detected */
-#define                   SCD_MSK  0x40       /* Mask Card Detect */
-/* Bit masks for SDH_CFG */
-#define                   CLKS_EN  0x1        /* Clocks Enable */
-#define                      SD4E  0x4        /* SDIO 4-Bit Enable */
-#define                       MWE  0x8        /* Moving Window Enable */
-#define                    SD_RST  0x10       /* SDMMC Reset */
-#define                 PUP_SDDAT  0x20       /* Pull-up SD_DAT */
-#define                PUP_SDDAT3  0x40       /* Pull-up SD_DAT3 */
-#define                 PD_SDDAT3  0x80       /* Pull-down SD_DAT3 */
-/* Bit masks for SDH_RD_WAIT_EN */
-#define                       RWR  0x1        /* Read Wait Request */
-/* Bit masks for ATAPI_CONTROL */
-#define                 PIO_START  0x1        /* Start PIO/Reg Op */
-#define               MULTI_START  0x2        /* Start Multi-DMA Op */
-#define               ULTRA_START  0x4        /* Start Ultra-DMA Op */
-#define                  XFER_DIR  0x8        /* Transfer Direction */
-#define                  IORDY_EN  0x10       /* IORDY Enable */
-#define                FIFO_FLUSH  0x20       /* Flush FIFOs */
-#define                  SOFT_RST  0x40       /* Soft Reset */
-#define                   DEV_RST  0x80       /* Device Reset */
-#define                TFRCNT_RST  0x100      /* Trans Count Reset */
-#define               END_ON_TERM  0x200      /* End/Terminate Select */
-#define               PIO_USE_DMA  0x400      /* PIO-DMA Enable */
-#define          UDMAIN_FIFO_THRS  0xf000     /* Ultra DMA-IN FIFO Threshold */
-/* Bit masks for ATAPI_STATUS */
-#define               PIO_XFER_ON  0x1        /* PIO transfer in progress */
-#define             MULTI_XFER_ON  0x2        /* Multi-word DMA transfer in progress */
-#define             ULTRA_XFER_ON  0x4        /* Ultra DMA transfer in progress */
-#define               ULTRA_IN_FL  0xf0       /* Ultra DMA Input FIFO Level */
-/* Bit masks for ATAPI_DEV_ADDR */
-#define                  DEV_ADDR  0x1f       /* Device Address */
-/* Bit masks for ATAPI_INT_MASK */
-#define        ATAPI_DEV_INT_MASK  0x1        /* Device interrupt mask */
-#define             PIO_DONE_MASK  0x2        /* PIO transfer done interrupt mask */
-#define           MULTI_DONE_MASK  0x4        /* Multi-DMA transfer done interrupt mask */
-#define          UDMAIN_DONE_MASK  0x8        /* Ultra-DMA in transfer done interrupt mask */
-#define         UDMAOUT_DONE_MASK  0x10       /* Ultra-DMA out transfer done interrupt mask */
-#define       HOST_TERM_XFER_MASK  0x20       /* Host terminate current transfer interrupt mask */
-#define           MULTI_TERM_MASK  0x40       /* Device terminate Multi-DMA transfer interrupt mask */
-#define          UDMAIN_TERM_MASK  0x80       /* Device terminate Ultra-DMA-in transfer interrupt mask */
-#define         UDMAOUT_TERM_MASK  0x100      /* Device terminate Ultra-DMA-out transfer interrupt mask */
-/* Bit masks for ATAPI_INT_STATUS */
-#define             ATAPI_DEV_INT  0x1        /* Device interrupt status */
-#define              PIO_DONE_INT  0x2        /* PIO transfer done interrupt status */
-#define            MULTI_DONE_INT  0x4        /* Multi-DMA transfer done interrupt status */
-#define           UDMAIN_DONE_INT  0x8        /* Ultra-DMA in transfer done interrupt status */
-#define          UDMAOUT_DONE_INT  0x10       /* Ultra-DMA out transfer done interrupt status */
-#define        HOST_TERM_XFER_INT  0x20       /* Host terminate current transfer interrupt status */
-#define            MULTI_TERM_INT  0x40       /* Device terminate Multi-DMA transfer interrupt status */
-#define           UDMAIN_TERM_INT  0x80       /* Device terminate Ultra-DMA-in transfer interrupt status */
-#define          UDMAOUT_TERM_INT  0x100      /* Device terminate Ultra-DMA-out transfer interrupt status */
-/* Bit masks for ATAPI_LINE_STATUS */
-#define                ATAPI_INTR  0x1        /* Device interrupt to host line status */
-#define                ATAPI_DASP  0x2        /* Device dasp to host line status */
-#define                ATAPI_CS0N  0x4        /* ATAPI chip select 0 line status */
-#define                ATAPI_CS1N  0x8        /* ATAPI chip select 1 line status */
-#define                ATAPI_ADDR  0x70       /* ATAPI address line status */
-#define              ATAPI_DMAREQ  0x80       /* ATAPI DMA request line status */
-#define             ATAPI_DMAACKN  0x100      /* ATAPI DMA acknowledge line status */
-#define               ATAPI_DIOWN  0x200      /* ATAPI write line status */
-#define               ATAPI_DIORN  0x400      /* ATAPI read line status */
-#define               ATAPI_IORDY  0x800      /* ATAPI IORDY line status */
-/* Bit masks for ATAPI_SM_STATE */
-#define                PIO_CSTATE  0xf        /* PIO mode state machine current state */
-#define                DMA_CSTATE  0xf0       /* DMA mode state machine current state */
-#define             UDMAIN_CSTATE  0xf00      /* Ultra DMA-In mode state machine current state */
-#define            UDMAOUT_CSTATE  0xf000     /* ATAPI IORDY line status */
-/* Bit masks for ATAPI_TERMINATE */
-#define           ATAPI_HOST_TERM  0x1        /* Host terminationation */
-/* Bit masks for ATAPI_REG_TIM_0 */
-#define                    T2_REG  0xff       /* End of cycle time for register access transfers */
-#define                  TEOC_REG  0xff00     /* Selects DIOR/DIOW pulsewidth */
-/* Bit masks for ATAPI_PIO_TIM_0 */
-#define                    T1_REG  0xf        /* Time from address valid to DIOR/DIOW */
-#define                T2_REG_PIO  0xff0      /* DIOR/DIOW pulsewidth */
-#define                    T4_REG  0xf000     /* DIOW data hold */
-/* Bit masks for ATAPI_PIO_TIM_1 */
-#define              TEOC_REG_PIO  0xff       /* End of cycle time for PIO access transfers. */
-/* Bit masks for ATAPI_MULTI_TIM_0 */
-#define                        TD  0xff       /* DIOR/DIOW asserted pulsewidth */
-#define                        TM  0xff00     /* Time from address valid to DIOR/DIOW */
-/* Bit masks for ATAPI_MULTI_TIM_1 */
-#define                       TKW  0xff       /* Selects DIOW negated pulsewidth */
-#define                       TKR  0xff00     /* Selects DIOR negated pulsewidth */
-/* Bit masks for ATAPI_MULTI_TIM_2 */
-#define                        TH  0xff       /* Selects DIOW data hold */
-#define                      TEOC  0xff00     /* Selects end of cycle for DMA */
-/* Bit masks for ATAPI_ULTRA_TIM_0 */
-#define                      TACK  0xff       /* Selects setup and hold times for TACK */
-#define                      TENV  0xff00     /* Selects envelope time */
-/* Bit masks for ATAPI_ULTRA_TIM_1 */
-#define                      TDVS  0xff       /* Selects data valid setup time */
-#define                 TCYC_TDVS  0xff00     /* Selects cycle time - TDVS time */
-/* Bit masks for ATAPI_ULTRA_TIM_2 */
-#define                       TSS  0xff       /* Selects time from STROBE edge to negation of DMARQ or assertion of STOP */
-#define                      TMLI  0xff00     /* Selects interlock time */
-/* Bit masks for ATAPI_ULTRA_TIM_3 */
-#define                      TZAH  0xff       /* Selects minimum delay required for output */
-#define               READY_PAUSE  0xff00     /* Selects ready to pause */
-/* Bit masks for TIMER_ENABLE1 */
-#define                    TIMEN8  0x1        /* Timer 8 Enable */
-#define                    TIMEN9  0x2        /* Timer 9 Enable */
-#define                   TIMEN10  0x4        /* Timer 10 Enable */
-/* Bit masks for TIMER_DISABLE1 */
-#define                   TIMDIS8  0x1        /* Timer 8 Disable */
-#define                   TIMDIS9  0x2        /* Timer 9 Disable */
-#define                  TIMDIS10  0x4        /* Timer 10 Disable */
-/* Bit masks for TIMER_STATUS1 */
-#define                    TIMIL8  0x1        /* Timer 8 Interrupt */
-#define                    TIMIL9  0x2        /* Timer 9 Interrupt */
-#define                   TIMIL10  0x4        /* Timer 10 Interrupt */
-#define                 TOVF_ERR8  0x10       /* Timer 8 Counter Overflow */
-#define                 TOVF_ERR9  0x20       /* Timer 9 Counter Overflow */
-#define                TOVF_ERR10  0x40       /* Timer 10 Counter Overflow */
-#define                     TRUN8  0x1000     /* Timer 8 Slave Enable Status */
-#define                     TRUN9  0x2000     /* Timer 9 Slave Enable Status */
-#define                    TRUN10  0x4000     /* Timer 10 Slave Enable Status */
-/* Bit masks for EPPI0 are obtained from common base header for EPPIx (EPPI1 and EPPI2) */
-/* Bit masks for USB_FADDR */
-#define          FUNCTION_ADDRESS  0x7f       /* Function address */
-/* Bit masks for USB_POWER */
-#define           ENABLE_SUSPENDM  0x1        /* enable SuspendM output */
-#define              SUSPEND_MODE  0x2        /* Suspend Mode indicator */
-#define               RESUME_MODE  0x4        /* DMA Mode */
-#define                     RESET  0x8        /* Reset indicator */
-#define                   HS_MODE  0x10       /* High Speed mode indicator */
-#define                 HS_ENABLE  0x20       /* high Speed Enable */
-#define                 SOFT_CONN  0x40       /* Soft connect */
-#define                ISO_UPDATE  0x80       /* Isochronous update */
-/* Bit masks for USB_INTRTX */
-#define                    EP0_TX  0x1        /* Tx Endpoint 0 interrupt */
-#define                    EP1_TX  0x2        /* Tx Endpoint 1 interrupt */
-#define                    EP2_TX  0x4        /* Tx Endpoint 2 interrupt */
-#define                    EP3_TX  0x8        /* Tx Endpoint 3 interrupt */
-#define                    EP4_TX  0x10       /* Tx Endpoint 4 interrupt */
-#define                    EP5_TX  0x20       /* Tx Endpoint 5 interrupt */
-#define                    EP6_TX  0x40       /* Tx Endpoint 6 interrupt */
-#define                    EP7_TX  0x80       /* Tx Endpoint 7 interrupt */
-/* Bit masks for USB_INTRRX */
-#define                    EP1_RX  0x2        /* Rx Endpoint 1 interrupt */
-#define                    EP2_RX  0x4        /* Rx Endpoint 2 interrupt */
-#define                    EP3_RX  0x8        /* Rx Endpoint 3 interrupt */
-#define                    EP4_RX  0x10       /* Rx Endpoint 4 interrupt */
-#define                    EP5_RX  0x20       /* Rx Endpoint 5 interrupt */
-#define                    EP6_RX  0x40       /* Rx Endpoint 6 interrupt */
-#define                    EP7_RX  0x80       /* Rx Endpoint 7 interrupt */
-/* Bit masks for USB_INTRTXE */
-#define                  EP0_TX_E  0x1        /* Endpoint 0 interrupt Enable */
-#define                  EP1_TX_E  0x2        /* Tx Endpoint 1 interrupt  Enable */
-#define                  EP2_TX_E  0x4        /* Tx Endpoint 2 interrupt  Enable */
-#define                  EP3_TX_E  0x8        /* Tx Endpoint 3 interrupt  Enable */
-#define                  EP4_TX_E  0x10       /* Tx Endpoint 4 interrupt  Enable */
-#define                  EP5_TX_E  0x20       /* Tx Endpoint 5 interrupt  Enable */
-#define                  EP6_TX_E  0x40       /* Tx Endpoint 6 interrupt  Enable */
-#define                  EP7_TX_E  0x80       /* Tx Endpoint 7 interrupt  Enable */
-/* Bit masks for USB_INTRRXE */
-#define                  EP1_RX_E  0x2        /* Rx Endpoint 1 interrupt  Enable */
-#define                  EP2_RX_E  0x4        /* Rx Endpoint 2 interrupt  Enable */
-#define                  EP3_RX_E  0x8        /* Rx Endpoint 3 interrupt  Enable */
-#define                  EP4_RX_E  0x10       /* Rx Endpoint 4 interrupt  Enable */
-#define                  EP5_RX_E  0x20       /* Rx Endpoint 5 interrupt  Enable */
-#define                  EP6_RX_E  0x40       /* Rx Endpoint 6 interrupt  Enable */
-#define                  EP7_RX_E  0x80       /* Rx Endpoint 7 interrupt  Enable */
-/* Bit masks for USB_INTRUSB */
-#define                 SUSPEND_B  0x1        /* Suspend indicator */
-#define                  RESUME_B  0x2        /* Resume indicator */
-#define          RESET_OR_BABLE_B  0x4        /* Reset/babble indicator */
-#define                     SOF_B  0x8        /* Start of frame */
-#define                    CONN_B  0x10       /* Connection indicator */
-#define                  DISCON_B  0x20       /* Disconnect indicator */
-#define             SESSION_REQ_B  0x40       /* Session Request */
-#define              VBUS_ERROR_B  0x80       /* Vbus threshold indicator */
-/* Bit masks for USB_INTRUSBE */
-#define                SUSPEND_BE  0x1        /* Suspend indicator int enable */
-#define                 RESUME_BE  0x2        /* Resume indicator int enable */
-#define         RESET_OR_BABLE_BE  0x4        /* Reset/babble indicator int enable */
-#define                    SOF_BE  0x8        /* Start of frame int enable */
-#define                   CONN_BE  0x10       /* Connection indicator int enable */
-#define                 DISCON_BE  0x20       /* Disconnect indicator int enable */
-#define            SESSION_REQ_BE  0x40       /* Session Request int enable */
-#define             VBUS_ERROR_BE  0x80       /* Vbus threshold indicator int enable */
-/* Bit masks for USB_FRAME */
-#define              FRAME_NUMBER  0x7ff      /* Frame number */
-/* Bit masks for USB_INDEX */
-#define         SELECTED_ENDPOINT  0xf        /* selected endpoint */
-/* Bit masks for USB_GLOBAL_CTL */
-#define                GLOBAL_ENA  0x1        /* enables USB module */
-#define                EP1_TX_ENA  0x2        /* Transmit endpoint 1 enable */
-#define                EP2_TX_ENA  0x4        /* Transmit endpoint 2 enable */
-#define                EP3_TX_ENA  0x8        /* Transmit endpoint 3 enable */
-#define                EP4_TX_ENA  0x10       /* Transmit endpoint 4 enable */
-#define                EP5_TX_ENA  0x20       /* Transmit endpoint 5 enable */
-#define                EP6_TX_ENA  0x40       /* Transmit endpoint 6 enable */
-#define                EP7_TX_ENA  0x80       /* Transmit endpoint 7 enable */
-#define                EP1_RX_ENA  0x100      /* Receive endpoint 1 enable */
-#define                EP2_RX_ENA  0x200      /* Receive endpoint 2 enable */
-#define                EP3_RX_ENA  0x400      /* Receive endpoint 3 enable */
-#define                EP4_RX_ENA  0x800      /* Receive endpoint 4 enable */
-#define                EP5_RX_ENA  0x1000     /* Receive endpoint 5 enable */
-#define                EP6_RX_ENA  0x2000     /* Receive endpoint 6 enable */
-#define                EP7_RX_ENA  0x4000     /* Receive endpoint 7 enable */
-/* Bit masks for USB_OTG_DEV_CTL */
-#define                   SESSION  0x1        /* session indicator */
-#define                  HOST_REQ  0x2        /* Host negotiation request */
-#define                 HOST_MODE  0x4        /* indicates USBDRC is a host */
-#define                     VBUS0  0x8        /* Vbus level indicator[0] */
-#define                     VBUS1  0x10       /* Vbus level indicator[1] */
-#define                     LSDEV  0x20       /* Low-speed indicator */
-#define                     FSDEV  0x40       /* Full or High-speed indicator */
-#define                  B_DEVICE  0x80       /* A' or 'B' device indicator */
-/* Bit masks for USB_OTG_VBUS_IRQ */
-#define             DRIVE_VBUS_ON  0x1        /* indicator to drive VBUS control circuit */
-#define            DRIVE_VBUS_OFF  0x2        /* indicator to shut off charge pump */
-#define           CHRG_VBUS_START  0x4        /* indicator for external circuit to start charging VBUS */
-#define             CHRG_VBUS_END  0x8        /* indicator for external circuit to end charging VBUS */
-#define        DISCHRG_VBUS_START  0x10       /* indicator to start discharging VBUS */
-#define          DISCHRG_VBUS_END  0x20       /* indicator to stop discharging VBUS */
-/* Bit masks for USB_OTG_VBUS_MASK */
-#define         DRIVE_VBUS_ON_ENA  0x1        /* enable DRIVE_VBUS_ON interrupt */
-#define        DRIVE_VBUS_OFF_ENA  0x2        /* enable DRIVE_VBUS_OFF interrupt */
-#define       CHRG_VBUS_START_ENA  0x4        /* enable CHRG_VBUS_START interrupt */
-#define         CHRG_VBUS_END_ENA  0x8        /* enable CHRG_VBUS_END interrupt */
-#define    DISCHRG_VBUS_START_ENA  0x10       /* enable DISCHRG_VBUS_START interrupt */
-#define      DISCHRG_VBUS_END_ENA  0x20       /* enable DISCHRG_VBUS_END interrupt */
-/* Bit masks for USB_CSR0 */
-#define                  RXPKTRDY  0x1        /* data packet receive indicator */
-#define                  TXPKTRDY  0x2        /* data packet in FIFO indicator */
-#define                STALL_SENT  0x4        /* STALL handshake sent */
-#define                   DATAEND  0x8        /* Data end indicator */
-#define                  SETUPEND  0x10       /* Setup end */
-#define                 SENDSTALL  0x20       /* Send STALL handshake */
-#define         SERVICED_RXPKTRDY  0x40       /* used to clear the RxPktRdy bit */
-#define         SERVICED_SETUPEND  0x80       /* used to clear the SetupEnd bit */
-#define                 FLUSHFIFO  0x100      /* flush endpoint FIFO */
-#define          STALL_RECEIVED_H  0x4        /* STALL handshake received host mode */
-#define                SETUPPKT_H  0x8        /* send Setup token host mode */
-#define                   ERROR_H  0x10       /* timeout error indicator host mode */
-#define                  REQPKT_H  0x20       /* Request an IN transaction host mode */
-#define               STATUSPKT_H  0x40       /* Status stage transaction host mode */
-#define             NAK_TIMEOUT_H  0x80       /* EP0 halted after a NAK host mode */
-/* Bit masks for USB_COUNT0 */
-#define              EP0_RX_COUNT  0x7f       /* number of received bytes in EP0 FIFO */
-/* Bit masks for USB_NAKLIMIT0 */
-#define             EP0_NAK_LIMIT  0x1f       /* number of frames/micro frames after which EP0 timeouts */
-/* Bit masks for USB_TX_MAX_PACKET */
-#define         MAX_PACKET_SIZE_T  0x7ff      /* maximum data pay load in a frame */
-/* Bit masks for USB_RX_MAX_PACKET */
-#define         MAX_PACKET_SIZE_R  0x7ff      /* maximum data pay load in a frame */
-/* Bit masks for USB_TXCSR */
-#define                TXPKTRDY_T  0x1        /* data packet in FIFO indicator */
-#define          FIFO_NOT_EMPTY_T  0x2        /* FIFO not empty */
-#define                UNDERRUN_T  0x4        /* TxPktRdy not set  for an IN token */
-#define               FLUSHFIFO_T  0x8        /* flush endpoint FIFO */
-#define              STALL_SEND_T  0x10       /* issue a Stall handshake */
-#define              STALL_SENT_T  0x20       /* Stall handshake transmitted */
-#define        CLEAR_DATATOGGLE_T  0x40       /* clear endpoint data toggle */
-#define                INCOMPTX_T  0x80       /* indicates that a large packet is split */
-#define              DMAREQMODE_T  0x400      /* DMA mode (0 or 1) selection */
-#define        FORCE_DATATOGGLE_T  0x800      /* Force data toggle */
-#define              DMAREQ_ENA_T  0x1000     /* Enable DMA request for Tx EP */
-#define                     ISO_T  0x4000     /* enable Isochronous transfers */
-#define                 AUTOSET_T  0x8000     /* allows TxPktRdy to be set automatically */
-#define                  ERROR_TH  0x4        /* error condition host mode */
-#define         STALL_RECEIVED_TH  0x20       /* Stall handshake received host mode */
-#define            NAK_TIMEOUT_TH  0x80       /* NAK timeout host mode */
-/* Bit masks for USB_TXCOUNT */
-#define                  TX_COUNT  0x1fff     /* Number of bytes to be written to the selected endpoint Tx FIFO */
-/* Bit masks for USB_RXCSR */
-#define                RXPKTRDY_R  0x1        /* data packet in FIFO indicator */
-#define               FIFO_FULL_R  0x2        /* FIFO not empty */
-#define                 OVERRUN_R  0x4        /* TxPktRdy not set  for an IN token */
-#define               DATAERROR_R  0x8        /* Out packet cannot be loaded into Rx  FIFO */
-#define               FLUSHFIFO_R  0x10       /* flush endpoint FIFO */
-#define              STALL_SEND_R  0x20       /* issue a Stall handshake */
-#define              STALL_SENT_R  0x40       /* Stall handshake transmitted */
-#define        CLEAR_DATATOGGLE_R  0x80       /* clear endpoint data toggle */
-#define                INCOMPRX_R  0x100      /* indicates that a large packet is split */
-#define              DMAREQMODE_R  0x800      /* DMA mode (0 or 1) selection */
-#define                 DISNYET_R  0x1000     /* disable Nyet handshakes */
-#define              DMAREQ_ENA_R  0x2000     /* Enable DMA request for Tx EP */
-#define                     ISO_R  0x4000     /* enable Isochronous transfers */
-#define               AUTOCLEAR_R  0x8000     /* allows TxPktRdy to be set automatically */
-#define                  ERROR_RH  0x4        /* TxPktRdy not set  for an IN token host mode */
-#define                 REQPKT_RH  0x20       /* request an IN transaction host mode */
-#define         STALL_RECEIVED_RH  0x40       /* Stall handshake received host mode */
-#define               INCOMPRX_RH  0x100      /* indicates that a large packet is split host mode */
-#define             DMAREQMODE_RH  0x800      /* DMA mode (0 or 1) selection host mode */
-#define                AUTOREQ_RH  0x4000     /* sets ReqPkt automatically host mode */
-/* Bit masks for USB_RXCOUNT */
-#define                  RX_COUNT  0x1fff     /* Number of received bytes in the packet in the Rx FIFO */
-/* Bit masks for USB_TXTYPE */
-#define            TARGET_EP_NO_T  0xf        /* EP number */
-#define                PROTOCOL_T  0xc        /* transfer type */
-/* Bit masks for USB_TXINTERVAL */
-#define          TX_POLL_INTERVAL  0xff       /* polling interval for selected Tx EP */
-/* Bit masks for USB_RXTYPE */
-#define            TARGET_EP_NO_R  0xf        /* EP number */
-#define                PROTOCOL_R  0xc        /* transfer type */
-/* Bit masks for USB_RXINTERVAL */
-#define          RX_POLL_INTERVAL  0xff       /* polling interval for selected Rx EP */
-/* Bit masks for USB_DMA_INTERRUPT */
-#define                  DMA0_INT  0x1        /* DMA0 pending interrupt */
-#define                  DMA1_INT  0x2        /* DMA1 pending interrupt */
-#define                  DMA2_INT  0x4        /* DMA2 pending interrupt */
-#define                  DMA3_INT  0x8        /* DMA3 pending interrupt */
-#define                  DMA4_INT  0x10       /* DMA4 pending interrupt */
-#define                  DMA5_INT  0x20       /* DMA5 pending interrupt */
-#define                  DMA6_INT  0x40       /* DMA6 pending interrupt */
-#define                  DMA7_INT  0x80       /* DMA7 pending interrupt */
-/* Bit masks for USB_DMAxCONTROL */
-#define                   DMA_ENA  0x1        /* DMA enable */
-#define                 DIRECTION  0x2        /* direction of DMA transfer */
-#define                      MODE  0x4        /* DMA Bus error */
-#define                   INT_ENA  0x8        /* Interrupt enable */
-#define                     EPNUM  0xf0       /* EP number */
-#define                  BUSERROR  0x100      /* DMA Bus error */
-/* Bit masks for USB_DMAxADDRHIGH */
-#define             DMA_ADDR_HIGH  0xffff     /* Upper 16-bits of memory source/destination address for the DMA master channel */
-/* Bit masks for USB_DMAxADDRLOW */
-#define              DMA_ADDR_LOW  0xffff     /* Lower 16-bits of memory source/destination address for the DMA master channel */
-/* Bit masks for USB_DMAxCOUNTHIGH */
-#define            DMA_COUNT_HIGH  0xffff     /* Upper 16-bits of byte count of DMA transfer for DMA master channel */
-/* Bit masks for USB_DMAxCOUNTLOW */
-#define             DMA_COUNT_LOW  0xffff     /* Lower 16-bits of byte count of DMA transfer for DMA master channel */
-/* Bit masks for HMDMAx_CONTROL */
-#define                   HMDMAEN  0x1        /* Handshake MDMA Enable */
-#define                       REP  0x2        /* Handshake MDMA Request Polarity */
-#define                       UTE  0x8        /* Urgency Threshold Enable */
-#define                       OIE  0x10       /* Overflow Interrupt Enable */
-#define                      BDIE  0x20       /* Block Done Interrupt Enable */
-#define                      MBDI  0x40       /* Mask Block Done Interrupt */
-#define                       DRQ  0x300      /* Handshake MDMA Request Type */
-#define                       RBC  0x1000     /* Force Reload of BCOUNT */
-#define                        PS  0x2000     /* Pin Status */
-#define                        OI  0x4000     /* Overflow Interrupt Generated */
-#define                       BDI  0x8000     /* Block Done Interrupt Generated */
-/* ******************************************* */
-/*     MULTI BIT MACRO ENUMERATIONS            */
-/* ******************************************* */
-/* ************************ */
-/*   MXVR Address Offsets   */
-/* ************************ */
-/* Control Message Receive Buffer (CMRB) Address Offsets */
-#define CMRB_STRIDE       0x00000016lu
-#define CMRB_DST_OFFSET   0x00000000lu
-#define CMRB_SRC_OFFSET   0x00000002lu
-#define CMRB_DATA_OFFSET  0x00000005lu
-/* Control Message Transmit Buffer (CMTB) Address Offsets */
-#define CMTB_PRIO_OFFSET    0x00000000lu
-#define CMTB_DST_OFFSET     0x00000002lu
-#define CMTB_SRC_OFFSET     0x00000004lu
-#define CMTB_TYPE_OFFSET    0x00000006lu
-#define CMTB_DATA_OFFSET    0x00000007lu
-#define CMTB_ANSWER_OFFSET  0x0000000Alu
-#define CMTB_STAT_N_OFFSET  0x00000018lu
-#define CMTB_STAT_A_OFFSET  0x00000016lu
-#define CMTB_STAT_D_OFFSET  0x0000000Elu
-#define CMTB_STAT_R_OFFSET  0x00000014lu
-#define CMTB_STAT_W_OFFSET  0x00000014lu
-#define CMTB_STAT_G_OFFSET  0x00000014lu
-/* Asynchronous Packet Receive Buffer (APRB) Address Offsets */
-#define APRB_STRIDE       0x00000400lu
-#define APRB_DST_OFFSET   0x00000000lu
-#define APRB_LEN_OFFSET   0x00000002lu
-#define APRB_SRC_OFFSET   0x00000004lu
-#define APRB_DATA_OFFSET  0x00000006lu
-/* Asynchronous Packet Transmit Buffer (APTB) Address Offsets */
-#define APTB_PRIO_OFFSET  0x00000000lu
-#define APTB_DST_OFFSET   0x00000002lu
-#define APTB_LEN_OFFSET   0x00000004lu
-#define APTB_SRC_OFFSET   0x00000006lu
-#define APTB_DATA_OFFSET  0x00000008lu
-/* Remote Read Buffer (RRDB) Address Offsets */
-#define RRDB_WADDR_OFFSET 0x00000100lu
-#define RRDB_WLEN_OFFSET  0x00000101lu
-/* **************** */
-/*   MXVR Macros    */
-/* **************** */
-/* MXVR_CONFIG Macros */
-#define SET_MSB(x)       ( ( (x) & 0xF  ) << 9)
-/* MXVR_INT_STAT_1 Macros */
-#define DONEX(x)         (0x00000002 << (4 * (x)))
-#define HDONEX(x)        (0x00000001 << (4 * (x)))
-/* MXVR_INT_EN_1 Macros */
-#define DONEENX(x)       (0x00000002 << (4 * (x)))
-#define HDONEENX(x)      (0x00000001 << (4 * (x)))
-/* MXVR_CDRPLL_CTL Macros */
-#define SET_CDRSHPSEL(x) ( ( (x) & 0x3F ) << 16)
-/* MXVR_FMPLL_CTL Macros */
-#define SET_CDRCPSEL(x)  ( ( (x) & 0xFF ) << 24)
-#define SET_FMCPSEL(x)   ( ( (x) & 0xFF ) << 24)
 #endif /* _DEF_BF549_H */
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
index 8590c8c78336..ab04d137fd8b 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
@@ -1609,44 +1609,6 @@
 #define                 PINT2  0x40000000 /* Pin Interrupt 2 */
 #define                 PINT3  0x80000000 /* Pin Interrupt 3 */
-/* Bit masks for DMAx_CONFIG, MDMA_Sx_CONFIG, MDMA_Dx_CONFIG */
-#define                     DMAEN  0x1        /* DMA Channel Enable */
-#define                       WNR  0x2        /* DMA Direction */
-#define                  WDSIZE_8  0x0        /* Transfer Word Size = 8 */
-#define                 WDSIZE_16  0x4        /* Transfer Word Size = 16 */
-#define                 WDSIZE_32  0x8        /* Transfer Word Size = 32 */
-#define                     DMA2D  0x10       /* DMA Mode */
-#define                   RESTART  0x20       /* Work Unit Transitions */
-#define                    DI_SEL  0x40       /* Data Interrupt Timing Select */
-#define                     DI_EN  0x80       /* Data Interrupt Enable */
-#define                    NDSIZE  0xf00      /* Flex Descriptor Size */
-#define                  NDSIZE_0 0x0000      /* Next Descriptor Size = 0 (Stop/Autobuffer) */
-#define                  NDSIZE_1 0x0100      /* Next Descriptor Size = 1 */
-#define                  NDSIZE_2 0x0200      /* Next Descriptor Size = 2 */
-#define                  NDSIZE_3 0x0300      /* Next Descriptor Size = 3 */
-#define                  NDSIZE_4 0x0400      /* Next Descriptor Size = 4 */
-#define                  NDSIZE_5 0x0500      /* Next Descriptor Size = 5 */
-#define                  NDSIZE_6 0x0600      /* Next Descriptor Size = 6 */
-#define                  NDSIZE_7 0x0700      /* Next Descriptor Size = 7 */
-#define                  NDSIZE_8 0x0800      /* Next Descriptor Size = 8 */
-#define                  NDSIZE_9 0x0900      /* Next Descriptor Size = 9 */
-#define                   DMAFLOW  0xf000     /* Next Operation */
-#define              DMAFLOW_STOP  0x0000     /* Stop Mode */
-#define              DMAFLOW_AUTO  0x1000     /* Autobuffer Mode */
-#define             DMAFLOW_ARRAY  0x4000     /* Descriptor Array Mode */
-#define             DMAFLOW_SMALL  0x6000     /* Small Model Descriptor List Mode */
-#define             DMAFLOW_LARGE  0x7000     /* Large Model Descriptor List Mode */
-/* Bit masks for DMAx_IRQ_STATUS, MDMA_Sx_IRQ_STATUS, MDMA_Dx_IRQ_STATUS */
-#define                  DMA_DONE  0x1        /* DMA Completion Interrupt Status */
-#define                   DMA_ERR  0x2        /* DMA Error Interrupt Status */
-#define                    DFETCH  0x4        /* DMA Descriptor Fetch */
-#define                   DMA_RUN  0x8        /* DMA Channel Running */
 /* Bit masks for DMAx_PERIPHERAL_MAP, MDMA_Sx_IRQ_STATUS, MDMA_Dx_IRQ_STATUS */
 #define                     CTYPE  0x40       /* DMA Channel Type */
@@ -1815,10 +1777,6 @@
 #define               DEB3_MERROR  0x40       /* DEB3 Error (2nd) */
 #define               CORE_MERROR  0x80       /* Core Error (2nd) */
-/* Bit masks for EBIU_ERRADD */
-#define             ERROR_ADDRESS  0xffffffff /* Error Address */
 /* Bit masks for EBIU_RSTCTL */
 #define                 DDRSRESET  0x1        /* DDR soft reset */
@@ -1827,98 +1785,6 @@
 #define                     SRACK  0x10       /* Self-refresh acknowledge */
 #define                MDDRENABLE  0x20       /* Mobile DDR enable */
-/* Bit masks for EBIU_DDRBRC0 */
-#define                      BRC0  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRBRC1 */
-#define                      BRC1  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRBRC2 */
-#define                      BRC2  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRBRC3 */
-#define                      BRC3  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRBRC4 */
-#define                      BRC4  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRBRC5 */
-#define                      BRC5  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRBRC6 */
-#define                      BRC6  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRBRC7 */
-#define                      BRC7  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRBWC0 */
-#define                      BWC0  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRBWC1 */
-#define                      BWC1  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRBWC2 */
-#define                      BWC2  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRBWC3 */
-#define                      BWC3  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRBWC4 */
-#define                      BWC4  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRBWC5 */
-#define                      BWC5  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRBWC6 */
-#define                      BWC6  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRBWC7 */
-#define                      BWC7  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRACCT */
-#define                      ACCT  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRTACT */
-#define                      TECT  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRARCT */
-#define                      ARCT  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRGC0 */
-#define                       GC0  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRGC1 */
-#define                       GC1  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRGC2 */
-#define                       GC2  0xffffffff /* Count */
-/* Bit masks for EBIU_DDRGC3 */
-#define                       GC3  0xffffffff /* Count */
 /* Bit masks for EBIU_DDRMCEN */
 #define                B0WCENABLE  0x1        /* Bank 0 write count enable */
@@ -2092,12 +1958,6 @@
 #define                     TRUN6  0x40000000 /* Timer 6 Slave Enable Status */
 #define                     TRUN7  0x80000000 /* Timer 7 Slave Enable Status */
-/* Bit masks for WDOG_CTL */
-#define                      WDEV  0x6        /* Watchdog Event */
-#define                      WDEN  0xff0      /* Watchdog Enable */
-#define                      WDRO  0x8000     /* Watchdog Rolled Over */
 /* Bit masks for CNT_CONFIG */
 #define                      CNTE  0x1        /* Counter Enable */
@@ -2149,81 +2009,6 @@
 #define                 DPRESCALE  0xf        /* Load Counter Register */
-/* Bit masks for RTC_STAT */
-#define                   SECONDS  0x3f       /* Seconds */
-#define                   MINUTES  0xfc0      /* Minutes */
-#define                     HOURS  0x1f000    /* Hours */
-#define               DAY_COUNTER  0xfffe0000 /* Day Counter */
-/* Bit masks for RTC_ICTL */
-#define STOPWATCH_INTERRUPT_ENABLE  0x1        /* Stopwatch Interrupt Enable */
-#define    ALARM_INTERRUPT_ENABLE  0x2        /* Alarm Interrupt Enable */
-#define  SECONDS_INTERRUPT_ENABLE  0x4        /* Seconds Interrupt Enable */
-#define  MINUTES_INTERRUPT_ENABLE  0x8        /* Minutes Interrupt Enable */
-#define    HOURS_INTERRUPT_ENABLE  0x10       /* Hours Interrupt Enable */
-#define TWENTY_FOUR_HOURS_INTERRUPT_ENABLE  0x20       /* 24 Hours Interrupt Enable */
-#define DAY_ALARM_INTERRUPT_ENABLE  0x40       /* Day Alarm Interrupt Enable */
-#define WRITE_COMPLETE_INTERRUPT_ENABLE  0x8000     /* Write Complete Interrupt Enable */
-/* Bit masks for RTC_ISTAT */
-#define      STOPWATCH_EVENT_FLAG  0x1        /* Stopwatch Event Flag */
-#define          ALARM_EVENT_FLAG  0x2        /* Alarm Event Flag */
-#define        SECONDS_EVENT_FLAG  0x4        /* Seconds Event Flag */
-#define        MINUTES_EVENT_FLAG  0x8        /* Minutes Event Flag */
-#define          HOURS_EVENT_FLAG  0x10       /* Hours Event Flag */
-#define TWENTY_FOUR_HOURS_EVENT_FLAG  0x20       /* 24 Hours Event Flag */
-#define      DAY_ALARM_EVENT_FLAG  0x40       /* Day Alarm Event Flag */
-#define     WRITE_PENDING__STATUS  0x4000     /* Write Pending  Status */
-#define            WRITE_COMPLETE  0x8000     /* Write Complete */
-/* Bit masks for RTC_SWCNT */
-#define           STOPWATCH_COUNT  0xffff     /* Stopwatch Count */
-/* Bit masks for RTC_ALARM */
-#define                   SECONDS  0x3f       /* Seconds */
-#define                   MINUTES  0xfc0      /* Minutes */
-#define                     HOURS  0x1f000    /* Hours */
-#define                       DAY  0xfffe0000 /* Day */
-/* Bit masks for RTC_PREN */
-#define                      PREN  0x1        /* Prescaler Enable */
-/* Bit masks for OTP_CONTROL */
-#define                FUSE_FADDR  0x1ff      /* OTP/Fuse Address */
-#define                      FIEN  0x800      /* OTP/Fuse Interrupt Enable */
-#define                  FTESTDEC  0x1000     /* OTP/Fuse Test Decoder */
-#define                   FWRTEST  0x2000     /* OTP/Fuse Write Test */
-#define                     FRDEN  0x4000     /* OTP/Fuse Read Enable */
-#define                     FWREN  0x8000     /* OTP/Fuse Write Enable */
-/* Bit masks for OTP_BEN */
-#define                      FBEN  0xffff     /* OTP/Fuse Byte Enable */
-/* Bit masks for OTP_STATUS */
-#define                     FCOMP  0x1        /* OTP/Fuse Access Complete */
-#define                    FERROR  0x2        /* OTP/Fuse Access Error */
-#define                  MMRGLOAD  0x10       /* Memory Mapped Register Gasket Load */
-#define                  MMRGLOCK  0x20       /* Memory Mapped Register Gasket Lock */
-#define                    FPGMEN  0x40       /* OTP/Fuse Program Enable */
-/* Bit masks for OTP_TIMING */
-#define                   USECDIV  0xff       /* Micro Second Divider */
-#define                   READACC  0x7f00     /* Read Access Time */
-#define                   CPUMPRL  0x38000    /* Charge Pump Release Time */
-#define                   CPUMPSU  0xc0000    /* Charge Pump Setup Time */
-#define                   CPUMPHD  0xf00000   /* Charge Pump Hold Time */
-#define                   PGMTIME  0xff000000 /* Program Time */
 /* Bit masks for SECURE_SYSSWT */
 #define                   EMUDABL  0x1        /* Emulation Disable. */
@@ -2252,26 +2037,6 @@
 #define                    AFEXIT  0x10       /* Authentication Firmware Exit */
 #define                   SECSTAT  0xe0       /* Secure Status */
-/* Bit masks for PLL_DIV */
-#define                      CSEL  0x30       /* Core Select */
-#define                      SSEL  0xf        /* System Select */
-#define                 CSEL_DIV1       0x0000  /* CCLK = VCO / 1 */
-#define                 CSEL_DIV2       0x0010  /* CCLK = VCO / 2 */
-#define                 CSEL_DIV4       0x0020  /* CCLK = VCO / 4 */
-#define                 CSEL_DIV8       0x0030  /* CCLK = VCO / 8 */
-/* Bit masks for PLL_CTL */
-#define                      MSEL  0x7e00     /* Multiplier Select */
-#define                    BYPASS  0x100      /* PLL Bypass Enable */
-#define              OUTPUT_DELAY  0x80       /* External Memory Output Delay Enable */
-#define               INPUT_DELAY  0x40       /* External Memory Input Delay Enable */
-#define                      PDWN  0x20       /* Power Down */
-#define                    STOPCK  0x8        /* Stop Clock */
-#define                   PLL_OFF  0x2        /* Disable PLL */
-#define                        DF  0x1        /* Divide Frequency */
 /* SWRST Masks */
 #define              SYSTEM_RESET 0x0007       /* Initiates A System Software Reset */
 #define              DOUBLE_FAULT 0x0008       /* Core Double Fault Causes Reset */
@@ -2279,52 +2044,6 @@
 #define                RESET_WDOG 0x4000       /* SW Reset Generated By Watchdog Timer */
 #define            RESET_SOFTWARE 0x8000       /* SW Reset Occurred Since Last Read Of SWRST */
-/* Bit masks for PLL_STAT */
-#define                PLL_LOCKED  0x20       /* PLL Locked Status */
-#define        ACTIVE_PLLDISABLED  0x4        /* Active Mode With PLL Disabled */
-#define                   FULL_ON  0x2        /* Full-On Mode */
-#define         ACTIVE_PLLENABLED  0x1        /* Active Mode With PLL Enabled */
-#define                     RTCWS  0x400      /* RTC/Reset Wake-Up Status */
-#define                     CANWS  0x800      /* CAN Wake-Up Status */
-#define                     USBWS  0x2000     /* USB Wake-Up Status */
-#define                    KPADWS  0x4000     /* Keypad Wake-Up Status */
-#define                     ROTWS  0x8000     /* Rotary Wake-Up Status */
-#define                      GPWS  0x1000     /* General-Purpose Wake-Up Status */
-/* Bit masks for VR_CTL */
-#define                      FREQ  0x3        /* Regulator Switching Frequency */
-#define                      GAIN  0xc        /* Voltage Output Level Gain */
-#define                      VLEV  0xf0       /* Internal Voltage Level */
-#define                   SCKELOW  0x8000     /* Drive SCKE Low During Reset Enable */
-#define                      WAKE  0x100      /* RTC/Reset Wake-Up Enable */
-#define                     CANWE  0x200      /* CAN0/1 Wake-Up Enable */
-#define                      GPWE  0x400      /* General-Purpose Wake-Up Enable */
-#define                     USBWE  0x800      /* USB Wake-Up Enable */
-#define                    KPADWE  0x1000     /* Keypad Wake-Up Enable */
-#define                     ROTWE  0x2000     /* Rotary Wake-Up Enable */
-#define FREQ_333                0x0001  /* Switching Frequency Is 333 kHz */
-#define FREQ_667                0x0002  /* Switching Frequency Is 667 kHz */
-#define FREQ_1000               0x0003  /* Switching Frequency Is 1 MHz */
-#define GAIN_5                  0x0000  /* GAIN = 5*/
-#define GAIN_10                 0x0004  /* GAIN = 1*/
-#define GAIN_20                 0x0008  /* GAIN = 2*/
-#define GAIN_50                 0x000C  /* GAIN = 5*/
-#define VLEV_085                0x0060  /* VLEV = 0.85 V (-5% - +10% Accuracy) */
-#define VLEV_090                0x0070  /* VLEV = 0.90 V (-5% - +10% Accuracy) */
-#define VLEV_095                0x0080  /* VLEV = 0.95 V (-5% - +10% Accuracy) */
-#define VLEV_100                0x0090  /* VLEV = 1.00 V (-5% - +10% Accuracy) */
-#define VLEV_105                0x00A0  /* VLEV = 1.05 V (-5% - +10% Accuracy) */
-#define VLEV_110                0x00B0  /* VLEV = 1.10 V (-5% - +10% Accuracy) */
-#define VLEV_115                0x00C0  /* VLEV = 1.15 V (-5% - +10% Accuracy) */
-#define VLEV_120                0x00D0  /* VLEV = 1.20 V (-5% - +10% Accuracy) */
-#define VLEV_125                0x00E0  /* VLEV = 1.25 V (-5% - +10% Accuracy) */
-#define VLEV_130                0x00F0  /* VLEV = 1.30 V (-5% - +10% Accuracy) */
 /* Bit masks for NFC_CTL */
 #define                    WR_DLY  0xf        /* Write Strobe Delay */
@@ -2489,14 +2208,6 @@
 #define                      UCCT  0x40       /* Universal Counter CAN Trigger */
 #define                       UCE  0x80       /* Universal Counter Enable */
-/* Bit masks for CAN0_UCCNT */
-#define                     UCCNT  0xffff     /* Universal Counter Count Value */
-/* Bit masks for CAN0_UCRC */
-#define                     UCVAL  0xffff     /* Universal Counter Reload/Capture Value */
 /* Bit masks for CAN0_CEC */
 #define                    RXECNT  0xff       /* Receive Error Counter */
diff --git a/arch/blackfin/mach-bf561/boards/Kconfig b/arch/blackfin/mach-bf561/boards/Kconfig
index e4bc6d7c5a6a..1aa529b9f8bb 100644
--- a/arch/blackfin/mach-bf561/boards/Kconfig
+++ b/arch/blackfin/mach-bf561/boards/Kconfig
@@ -19,4 +19,11 @@ config BFIN561_BLUETECHNIX_CM
        help
          CM-BF561 support for EVAL- and DEV-Board.
+config BFIN561_ACVILON
+        bool "BF561-ACVILON"
+        help
+          BF561-ACVILON System On Module support (SO-DIMM 144).
+          For more information about Acvilon BF561 SoM
+          please go to http://www.niistt.ru/
 endchoice
diff --git a/arch/blackfin/mach-bf561/boards/Makefile b/arch/blackfin/mach-bf561/boards/Makefile
index 3a152559e957..a5879f7857ad 100644
--- a/arch/blackfin/mach-bf561/boards/Makefile
+++ b/arch/blackfin/mach-bf561/boards/Makefile
@@ -2,6 +2,7 @@
 # arch/blackfin/mach-bf561/boards/Makefile
 #
+obj-$(CONFIG_BFIN561_ACVILON)          += acvilon.o
 obj-$(CONFIG_BFIN561_BLUETECHNIX_CM)   += cm_bf561.o
 obj-$(CONFIG_BFIN561_EZKIT)            += ezkit.o
 obj-$(CONFIG_BFIN561_TEPLA)            += tepla.o
diff --git a/arch/blackfin/mach-bf561/boards/acvilon.c b/arch/blackfin/mach-bf561/boards/acvilon.c
new file mode 100644
index 000000000000..07e8dc8770da
--- /dev/null
+++ b/arch/blackfin/mach-bf561/boards/acvilon.c
@@ -0,0 +1,551 @@
+/*
+ * File:         arch/blackfin/mach-bf561/acvilon.c
+ * Based on:     arch/blackfin/mach-bf561/ezkit.c
+ * Author:
+ *
+ * Created:
+ * Description:
+ *
+ * Modified:
+ *               Copyright 2004-2006 Analog Devices Inc.
+ *               Copyright 2009 CJSC "NII STT"
+ *
+ * Bugs:
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ *
+ *
+ * For more information about Acvilon BF561 SoM please
+ * go to http://www.niistt.ru/
+ *
+ */
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/plat-ram.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/i2c-pca-platform.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <asm/dma.h>
+#include <asm/bfin5xx_spi.h>
+#include <asm/portmux.h>
+#include <asm/dpmc.h>
+#include <asm/cacheflush.h>
+#include <linux/i2c.h>
+/*
+ * Name the Board for the /proc/cpuinfo
+ */
+const char bfin_board_name[] = "Acvilon board";
+#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
+#include <linux/usb/isp1760.h>
+static struct resource bfin_isp1760_resources[] = {
+        [0] = {
+               .start = 0x20000000,
+               .end = 0x20000000 + 0x000fffff,
+               .flags = IORESOURCE_MEM,
+               },
+        [1] = {
+               .start = IRQ_PF15,
+               .end = IRQ_PF15,
+               .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
+               },
+};
+static struct isp1760_platform_data isp1760_priv = {
+        .is_isp1761 = 0,
+        .port1_disable = 0,
+        .bus_width_16 = 1,
+        .port1_otg = 0,
+        .analog_oc = 0,
+        .dack_polarity_high = 0,
+        .dreq_polarity_high = 0,
+};
+static struct platform_device bfin_isp1760_device = {
+        .name = "isp1760-hcd",
+        .id = 0,
+        .dev = {
+                .platform_data = &isp1760_priv,
+                },
+        .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
+        .resource = bfin_isp1760_resources,
+};
+#endif
+static struct resource bfin_i2c_pca_resources[] = {
+        {
+         .name = "pca9564-regs",
+         .start = 0x2C000000,
+         .end = 0x2C000000 + 16,
+         .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
+         }, {
+             .start = IRQ_PF8,
+             .end = IRQ_PF8,
+             .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
+             },
+};
+struct i2c_pca9564_pf_platform_data pca9564_platform_data = {
+        .gpio = -1,
+        .i2c_clock_speed = 330000,
+        .timeout = 10000
+};
+/* PCA9564 I2C Bus driver */
+static struct platform_device bfin_i2c_pca_device = {
+        .name = "i2c-pca-platform",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_i2c_pca_resources),
+        .resource = bfin_i2c_pca_resources,
+        .dev = {
+                .platform_data = &pca9564_platform_data,
+                }
+};
+/* I2C devices fitted. */
+static struct i2c_board_info acvilon_i2c_devs[] __initdata = {
+        {
+         I2C_BOARD_INFO("ds1339", 0x68),
+         },
+        {
+         I2C_BOARD_INFO("tcn75", 0x49),
+         },
+};
+#if defined(CONFIG_MTD_PLATRAM) || defined(CONFIG_MTD_PLATRAM_MODULE)
+static struct platdata_mtd_ram mtd_ram_data = {
+        .mapname = "rootfs(RAM)",
+        .bankwidth = 4,
+};
+static struct resource mtd_ram_resource = {
+        .start = 0x4000000,
+        .end = 0x5ffffff,
+        .flags = IORESOURCE_MEM,
+};
+static struct platform_device mtd_ram_device = {
+        .name = "mtd-ram",
+        .id = 0,
+        .dev = {
+                .platform_data = &mtd_ram_data,
+                },
+        .num_resources = 1,
+        .resource = &mtd_ram_resource,
+};
+#endif
+#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
+#include <linux/smsc911x.h>
+static struct resource smsc911x_resources[] = {
+        {
+         .name = "smsc911x-memory",
+         .start = 0x28000000,
+         .end = 0x28000000 + 0xFF,
+         .flags = IORESOURCE_MEM,
+         },
+        {
+         .start = IRQ_PF7,
+         .end = IRQ_PF7,
+         .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
+         },
+};
+static struct smsc911x_platform_config smsc911x_config = {
+        .flags = SMSC911X_USE_32BIT,
+        .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+        .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
+        .phy_interface = PHY_INTERFACE_MODE_MII,
+};
+static struct platform_device smsc911x_device = {
+        .name = "smsc911x",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(smsc911x_resources),
+        .resource = smsc911x_resources,
+        .dev = {
+                .platform_data = &smsc911x_config,
+                },
+};
+#endif
+#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
+        {
+         .start = BFIN_UART_THR,
+         .end = BFIN_UART_GCTL + 2,
+         .flags = IORESOURCE_MEM,
+         },
+        {
+         .start = IRQ_UART_RX,
+         .end = IRQ_UART_RX + 1,
+         .flags = IORESOURCE_IRQ,
+         },
+        {
+         .start = IRQ_UART_ERROR,
+         .end = IRQ_UART_ERROR,
+         .flags = IORESOURCE_IRQ,
+         },
+        {
+         .start = CH_UART_TX,
+         .end = CH_UART_TX,
+         .flags = IORESOURCE_DMA,
+         },
+        {
+         .start = CH_UART_RX,
+         .end = CH_UART_RX,
+         .flags = IORESOURCE_DMA,
+         },
+};
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+static struct platform_device bfin_uart0_device = {
+        .name = "bfin-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                /* Passed to driver */
+                .platform_data = &bfin_uart0_peripherals,
+                },
+};
+#endif
+#endif
+#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
+#ifdef CONFIG_MTD_PARTITIONS
+const char *part_probes[] = { "cmdlinepart", NULL };
+static struct mtd_partition bfin_plat_nand_partitions[] = {
+        {
+         .name = "params(nand)",
+         .size = 32 * 1024 * 1024,
+         .offset = 0,
+         }, {
+             .name = "userfs(nand)",
+             .size = MTDPART_SIZ_FULL,
+             .offset = MTDPART_OFS_APPEND,
+             },
+};
+#endif
+#define BFIN_NAND_PLAT_CLE 2
+#define BFIN_NAND_PLAT_ALE 3
+static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
+                                    unsigned int ctrl)
+{
+        struct nand_chip *this = mtd->priv;
+        if (cmd == NAND_CMD_NONE)
+                return;
+        if (ctrl & NAND_CLE)
+                writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
+        else
+                writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
+}
+#define BFIN_NAND_PLAT_READY GPIO_PF10
+static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
+{
+        return gpio_get_value(BFIN_NAND_PLAT_READY);
+}
+static struct platform_nand_data bfin_plat_nand_data = {
+        .chip = {
+                 .chip_delay = 30,
+#ifdef CONFIG_MTD_PARTITIONS
+                 .part_probe_types = part_probes,
+                 .partitions = bfin_plat_nand_partitions,
+                 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
+#endif
+                 },
+        .ctrl = {
+                 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
+                 .dev_ready = bfin_plat_nand_dev_ready,
+                 },
+};
+#define MAX(x, y) (x > y ? x : y)
+static struct resource bfin_plat_nand_resources = {
+        .start = 0x24000000,
+        .end = 0x24000000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
+        .flags = IORESOURCE_IO,
+};
+static struct platform_device bfin_async_nand_device = {
+        .name = "gen_nand",
+        .id = -1,
+        .num_resources = 1,
+        .resource = &bfin_plat_nand_resources,
+        .dev = {
+                .platform_data = &bfin_plat_nand_data,
+                },
+};
+static void bfin_plat_nand_init(void)
+{
+        gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
+}
+#else
+static void bfin_plat_nand_init(void)
+{
+}
+#endif
+#if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE)
+static struct mtd_partition bfin_spi_dataflash_partitions[] = {
+        {
+         .name = "bootloader",
+         .size = 0x4200,
+         .offset = 0,
+         .mask_flags = MTD_CAP_ROM},
+        {
+         .name = "u-boot",
+         .size = 0x42000,
+         .offset = MTDPART_OFS_APPEND,
+         },
+        {
+         .name = "u-boot(params)",
+         .size = 0x4200,
+         .offset = MTDPART_OFS_APPEND,
+         },
+        {
+         .name = "kernel",
+         .size = 0x294000,
+         .offset = MTDPART_OFS_APPEND,
+         },
+        {
+         .name = "params",
+         .size = 0x42000,
+         .offset = MTDPART_OFS_APPEND,
+         },
+        {
+         .name = "rootfs",
+         .size = MTDPART_SIZ_FULL,
+         .offset = MTDPART_OFS_APPEND,
+         }
+};
+static struct flash_platform_data bfin_spi_dataflash_data = {
+        .name = "SPI Dataflash",
+        .parts = bfin_spi_dataflash_partitions,
+        .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
+};
+/* DataFlash chip */
+static struct bfin5xx_spi_chip data_flash_chip_info = {
+        .enable_dma = 0,        /* use dma transfer with this chip */
+        .bits_per_word = 8,
+};
+#endif
+#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
+static struct bfin5xx_spi_chip spidev_chip_info = {
+        .enable_dma = 0,
+        .bits_per_word = 8,
+};
+#endif
+#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
+/* SPI (0) */
+static struct resource bfin_spi0_resource[] = {
+        [0] = {
+               .start = SPI0_REGBASE,
+               .end = SPI0_REGBASE + 0xFF,
+               .flags = IORESOURCE_MEM,
+               },
+        [1] = {
+               .start = CH_SPI,
+               .end = CH_SPI,
+               .flags = IORESOURCE_DMA,
+               },
+        [2] = {
+               .start = IRQ_SPI,
+               .end = IRQ_SPI,
+               .flags = IORESOURCE_IRQ,
+               },
+};
+/* SPI controller data */
+static struct bfin5xx_spi_master bfin_spi0_info = {
+        .num_chipselect = 8,
+        .enable_dma = 1,        /* master has the ability to do dma transfer */
+        .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
+};
+static struct platform_device bfin_spi0_device = {
+        .name = "bfin-spi",
+        .id = 0,                /* Bus number */
+        .num_resources = ARRAY_SIZE(bfin_spi0_resource),
+        .resource = bfin_spi0_resource,
+        .dev = {
+                .platform_data = &bfin_spi0_info,       /* Passed to driver */
+                },
+};
+#endif
+static struct spi_board_info bfin_spi_board_info[] __initdata = {
+#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
+        {
+         .modalias = "spidev",
+         .max_speed_hz = 3125000,       /* max spi clock (SCK) speed in HZ */
+         .bus_num = 0,
+         .chip_select = 3,
+         .controller_data = &spidev_chip_info,
+         },
+#endif
+#if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE)
+        {                       /* DataFlash chip */
+         .modalias = "mtd_dataflash",
+         .max_speed_hz = 33250000,      /* max spi clock (SCK) speed in HZ */
+         .bus_num = 0,          /* Framework bus number */
+         .chip_select = 2,      /* Framework chip select */
+         .platform_data = &bfin_spi_dataflash_data,
+         .controller_data = &data_flash_chip_info,
+         .mode = SPI_MODE_3,
+         },
+#endif
+};
+static struct resource bfin_gpios_resources = {
+        .start = 31,
+/*      .end   = MAX_BLACKFIN_GPIOS - 1, */
+        .end = 32,
+        .flags = IORESOURCE_IRQ,
+};
+static struct platform_device bfin_gpios_device = {
+        .name = "simple-gpio",
+        .id = -1,
+        .num_resources = 1,
+        .resource = &bfin_gpios_resources,
+};
+static const unsigned int cclk_vlev_datasheet[] = {
+        VRPAIR(VLEV_085, 250000000),
+        VRPAIR(VLEV_090, 300000000),
+        VRPAIR(VLEV_095, 313000000),
+        VRPAIR(VLEV_100, 350000000),
+        VRPAIR(VLEV_105, 400000000),
+        VRPAIR(VLEV_110, 444000000),
+        VRPAIR(VLEV_115, 450000000),
+        VRPAIR(VLEV_120, 475000000),
+        VRPAIR(VLEV_125, 500000000),
+        VRPAIR(VLEV_130, 600000000),
+};
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+        .tuple_tab = cclk_vlev_datasheet,
+        .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+        .vr_settling_time = 25 /* us */ ,
+};
+static struct platform_device bfin_dpmc = {
+        .name = "bfin dpmc",
+        .dev = {
+                .platform_data = &bfin_dmpc_vreg_data,
+                },
+};
+static struct platform_device *acvilon_devices[] __initdata = {
+        &bfin_dpmc,
+#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
+        &bfin_spi0_device,
+#endif
+#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#endif
+        &bfin_gpios_device,
+#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
+        &smsc911x_device,
+#endif
+        &bfin_i2c_pca_device,
+#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
+        &bfin_async_nand_device,
+#endif
+#if defined(CONFIG_MTD_PLATRAM) || defined(CONFIG_MTD_PLATRAM_MODULE)
+        &mtd_ram_device,
+#endif
+};
+static int __init acvilon_init(void)
+{
+        int ret;
+        printk(KERN_INFO "%s(): registering device resources\n", __func__);
+        bfin_plat_nand_init();
+        ret =
+            platform_add_devices(acvilon_devices, ARRAY_SIZE(acvilon_devices));
+        if (ret < 0)
+                return ret;
+        i2c_register_board_info(0, acvilon_i2c_devs,
+                                ARRAY_SIZE(acvilon_i2c_devs));
+        bfin_write_FIO0_FLAG_C(1 << 14);
+        msleep(5);
+        bfin_write_FIO0_FLAG_S(1 << 14);
+        spi_register_board_info(bfin_spi_board_info,
+                                ARRAY_SIZE(bfin_spi_board_info));
+        return 0;
+}
+arch_initcall(acvilon_init);
+static struct platform_device *acvilon_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#endif
+};
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(acvilon_early_devices,
+                                   ARRAY_SIZE(acvilon_early_devices));
+}
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index 9e2d8cfba546..ffd3e6a80d1a 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -49,7 +49,7 @@ static struct isp1760_platform_data isp1760_priv = {
 };
 static struct platform_device bfin_isp1760_device = {
-        .name           = "isp1760-hcd",
+        .name           = "isp1760",
        .id             = 0,
        .dev = {
                .platform_data = &isp1760_priv,
@@ -159,28 +159,6 @@ static struct platform_device smc91x_device = {
 };
 #endif
-#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
-static struct resource ax88180_resources[] = {
-        [0] = {
-                .start  = 0x2c000000,
-                .end    = 0x2c000000 + 0x8000,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_PF10,
-                .end    = IRQ_PF10,
-                .flags  = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL),
-        },
-};
-static struct platform_device ax88180_device = {
-        .name           = "ax88180",
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(ax88180_resources),
-        .resource       = ax88180_resources,
-};
-#endif
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 static struct resource bfin_uart_resources[] = {
        {
@@ -421,10 +399,6 @@ static struct platform_device *ezkit_devices[] __initdata = {
        &smc91x_device,
 #endif
-#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
-        &ax88180_device,
-#endif
 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
        &net2272_bfin_device,
 #endif
diff --git a/arch/blackfin/mach-bf561/coreb.c b/arch/blackfin/mach-bf561/coreb.c
index 1e60a92dd602..deb2271d09a3 100644
--- a/arch/blackfin/mach-bf561/coreb.c
+++ b/arch/blackfin/mach-bf561/coreb.c
@@ -22,8 +22,8 @@
 #define CMD_COREB_STOP          3
 #define CMD_COREB_RESET         4
-static int
+static long
-coreb_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
+coreb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
        int ret = 0;
@@ -49,8 +49,8 @@ coreb_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned l
 }
 static const struct file_operations coreb_fops = {
-        .owner   = THIS_MODULE,
+        .owner          = THIS_MODULE,
-        .ioctl   = coreb_ioctl,
+        .unlocked_ioctl = coreb_ioctl,
 };
 static struct miscdevice coreb_dev = {
diff --git a/arch/blackfin/mach-bf561/include/mach/defBF561.h b/arch/blackfin/mach-bf561/include/mach/defBF561.h
index a31e509553fb..4c8e36b7fb33 100644
--- a/arch/blackfin/mach-bf561/include/mach/defBF561.h
+++ b/arch/blackfin/mach-bf561/include/mach/defBF561.h
@@ -884,65 +884,11 @@
 /* System MMR Register Bits */
 /******************************************************************************* */
-/* ********************* PLL AND RESET MASKS ************************ */
-/* PLL_CTL Masks */
-#define PLL_CLKIN              0x00000000       /* Pass CLKIN to PLL */
-#define PLL_CLKIN_DIV2         0x00000001       /* Pass CLKIN/2 to PLL */
-#define PLL_OFF                0x00000002       /* Shut off PLL clocks */
-#define STOPCK_OFF             0x00000008       /* Core clock off */
-#define PDWN                   0x00000020       /* Put the PLL in a Deep Sleep state */
-#define BYPASS                 0x00000100       /* Bypass the PLL */
 /* CHIPID Masks */
 #define CHIPID_VERSION         0xF0000000
 #define CHIPID_FAMILY          0x0FFFF000
 #define CHIPID_MANUFACTURE     0x00000FFE
-/* VR_CTL Masks                                                                                                                                 */
-#define FREQ                    0x0003  /* Switching Oscillator Frequency For Regulator */
-#define HIBERNATE               0x0000  /* Powerdown/Bypass On-Board Regulation */
-#define FREQ_333                0x0001  /* Switching Frequency Is 333 kHz */
-#define FREQ_667                0x0002  /* Switching Frequency Is 667 kHz */
-#define FREQ_1000               0x0003  /* Switching Frequency Is 1 MHz */
-#define GAIN                    0x000C  /* Voltage Level Gain   */
-#define GAIN_5                  0x0000  /* GAIN = 5*/
-#define GAIN_10                 0x0004  /* GAIN = 1*/
-#define GAIN_20                 0x0008  /* GAIN = 2*/
-#define GAIN_50                 0x000C  /* GAIN = 5*/
-#define VLEV                    0x00F0  /* Internal Voltage Level */
-#define VLEV_085                0x0060  /* VLEV = 0.85 V (-5% - +10% Accuracy) */
-#define VLEV_090                0x0070  /* VLEV = 0.90 V (-5% - +10% Accuracy) */
-#define VLEV_095                0x0080  /* VLEV = 0.95 V (-5% - +10% Accuracy) */
-#define VLEV_100                0x0090  /* VLEV = 1.00 V (-5% - +10% Accuracy) */
-#define VLEV_105                0x00A0  /* VLEV = 1.05 V (-5% - +10% Accuracy) */
-#define VLEV_110                0x00B0  /* VLEV = 1.10 V (-5% - +10% Accuracy) */
-#define VLEV_115                0x00C0  /* VLEV = 1.15 V (-5% - +10% Accuracy) */
-#define VLEV_120                0x00D0  /* VLEV = 1.20 V (-5% - +10% Accuracy) */
-#define VLEV_125                0x00E0  /* VLEV = 1.25 V (-5% - +10% Accuracy) */
-#define VLEV_130                0x00F0  /* VLEV = 1.30 V (-5% - +10% Accuracy) */
-#define WAKE                    0x0100  /* Enable RTC/Reset Wakeup From Hibernate */
-#define SCKELOW                 0x8000  /* Do Not Drive SCKE High During Reset After Hibernate */
-/* PLL_DIV Masks */
-#define SCLK_DIV(x)  (x)        /* SCLK = VCO / x */
-#define CSEL                    0x30            /* Core Select */
-#define SSEL                    0xf             /* System Select */
-#define CCLK_DIV1              0x00000000       /* CCLK = VCO / 1 */
-#define CCLK_DIV2              0x00000010       /* CCLK = VCO / 2 */
-#define CCLK_DIV4              0x00000020       /* CCLK = VCO / 4 */
-#define CCLK_DIV8              0x00000030       /* CCLK = VCO / 8 */
-/* PLL_STAT Masks                                                                                                                                       */
-#define ACTIVE_PLLENABLED       0x0001  /* Processor In Active Mode With PLL Enabled    */
-#define FULL_ON                         0x0002  /* Processor In Full On Mode                                    */
-#define ACTIVE_PLLDISABLED      0x0004  /* Processor In Active Mode With PLL Disabled   */
-#define PLL_LOCKED                      0x0020  /* PLL_LOCKCNT Has Been Reached                                 */
 /* SICA_SYSCR Masks */
 #define COREB_SRAM_INIT         0x0020
@@ -1150,53 +1096,6 @@
 /* **********  DMA CONTROLLER MASKS  *********************8 */
-/* DMAx_CONFIG, MDMA_yy_CONFIG, IMDMA_yy_CONFIG Masks */
-#define DMAEN           0x00000001      /* Channel Enable */
-#define WNR             0x00000002      /* Channel Direction (W/R*) */
-#define WDSIZE_8        0x00000000      /* Word Size 8 bits */
-#define WDSIZE_16       0x00000004      /* Word Size 16 bits */
-#define WDSIZE_32       0x00000008      /* Word Size 32 bits */
-#define DMA2D           0x00000010      /* 2D/1D* Mode */
-#define RESTART         0x00000020      /* Restart */
-#define DI_SEL          0x00000040      /* Data Interrupt Select */
-#define DI_EN           0x00000080      /* Data Interrupt Enable */
-#define NDSIZE_0                0x0000  /* Next Descriptor Size = 0 (Stop/Autobuffer)   */
-#define NDSIZE_1                0x0100  /* Next Descriptor Size = 1                                             */
-#define NDSIZE_2                0x0200  /* Next Descriptor Size = 2                                             */
-#define NDSIZE_3                0x0300  /* Next Descriptor Size = 3                                             */
-#define NDSIZE_4                0x0400  /* Next Descriptor Size = 4                                             */
-#define NDSIZE_5                0x0500  /* Next Descriptor Size = 5                                             */
-#define NDSIZE_6                0x0600  /* Next Descriptor Size = 6                                             */
-#define NDSIZE_7                0x0700  /* Next Descriptor Size = 7                                             */
-#define NDSIZE_8                0x0800  /* Next Descriptor Size = 8                                             */
-#define NDSIZE_9                0x0900  /* Next Descriptor Size = 9                                             */
-#define NDSIZE          0x00000900      /* Next Descriptor Size */
-#define DMAFLOW         0x00007000      /* Flow Control */
-#define DMAFLOW_STOP            0x0000  /* Stop Mode */
-#define DMAFLOW_AUTO            0x1000  /* Autobuffer Mode */
-#define DMAFLOW_ARRAY           0x4000  /* Descriptor Array Mode */
-#define DMAFLOW_SMALL           0x6000  /* Small Model Descriptor List Mode */
-#define DMAFLOW_LARGE           0x7000  /* Large Model Descriptor List Mode */
-#define DMAEN_P                 0       /* Channel Enable */
-#define WNR_P                   1       /* Channel Direction (W/R*) */
-#define DMA2D_P                 4       /* 2D/1D* Mode */
-#define RESTART_P               5       /* Restart */
-#define DI_SEL_P                6       /* Data Interrupt Select */
-#define DI_EN_P                 7       /* Data Interrupt Enable */
-/* DMAx_IRQ_STATUS, MDMA_yy_IRQ_STATUS, IMDMA_yy_IRQ_STATUS Masks */
-#define DMA_DONE                0x00000001      /* DMA Done Indicator */
-#define DMA_ERR                 0x00000002      /* DMA Error Indicator */
-#define DFETCH                  0x00000004      /* Descriptor Fetch Indicator */
-#define DMA_RUN                 0x00000008      /* DMA Running Indicator */
-#define DMA_DONE_P              0       /* DMA Done Indicator */
-#define DMA_ERR_P               1       /* DMA Error Indicator */
-#define DFETCH_P                2       /* Descriptor Fetch Indicator */
-#define DMA_RUN_P               3       /* DMA Running Indicator */
 /* DMAx_PERIPHERAL_MAP, MDMA_yy_PERIPHERAL_MAP, IMDMA_yy_PERIPHERAL_MAP Masks */
 #define CTYPE               0x00000040  /* DMA Channel Type Indicator */
diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c
index 510f57641495..0192532e96a2 100644
--- a/arch/blackfin/mach-bf561/smp.c
+++ b/arch/blackfin/mach-bf561/smp.c
@@ -52,8 +52,6 @@ int __init setup_profiling_timer(unsigned int multiplier) /* not supported */
 void __cpuinit platform_secondary_init(unsigned int cpu)
 {
-        local_irq_disable();
        /* Clone setup for peripheral interrupt sources from CoreA. */
        bfin_write_SICB_IMASK0(bfin_read_SICA_IMASK0());
        bfin_write_SICB_IMASK1(bfin_read_SICA_IMASK1());
@@ -70,11 +68,6 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
        bfin_write_SICB_IAR7(bfin_read_SICA_IAR7());
        SSYNC();
-        local_irq_enable();
-        /* Calibrate loops per jiffy value. */
-        calibrate_delay();
        /* Store CPU-private information to the cpu_data array. */
        bfin_setup_cpudata(cpu);
@@ -108,9 +101,13 @@ int __cpuinit platform_boot_secondary(unsigned int cpu, struct task_struct *idle
                barrier();
        }
-        spin_unlock(&boot_lock);
+        if (cpu_isset(cpu, cpu_callin_map)) {
+                cpu_set(cpu, cpu_online_map);
-        return cpu_isset(cpu, cpu_callin_map) ? 0 : -ENOSYS;
+                /* release the lock and let coreb run */
+                spin_unlock(&boot_lock);
+                return 0;
+        } else
+                panic("CPU%u: processor failed to boot\n", cpu);
 }
 void __init platform_request_ipi(irq_handler_t handler)
diff --git a/arch/blackfin/mach-common/clocks-init.c b/arch/blackfin/mach-common/clocks-init.c
index ef6870e9eea6..d5cfe611b778 100644
--- a/arch/blackfin/mach-common/clocks-init.c
+++ b/arch/blackfin/mach-common/clocks-init.c
@@ -13,6 +13,7 @@
 #include <asm/dma.h>
 #include <asm/clocks.h>
 #include <asm/mem_init.h>
+#include <asm/dpmc.h>
 #define SDGCTL_WIDTH (1 << 31)  /* SDRAM external data path width */
 #define PLL_CTL_VAL \
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c
index 01506504e6d0..777582897253 100644
--- a/arch/blackfin/mach-common/cpufreq.c
+++ b/arch/blackfin/mach-common/cpufreq.c
@@ -13,7 +13,7 @@
 #include <linux/fs.h>
 #include <asm/blackfin.h>
 #include <asm/time.h>
+#include <asm/dpmc.h>
 /* this is the table of CCLK frequencies, in Hz */
 /* .index is the entry in the auxillary dpm_state_table[] */
@@ -138,7 +138,8 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
                                                 dpm_state_table[index].tscale);
        }
-        policy->cpuinfo.transition_latency = (bfin_read_PLL_LOCKCNT() / (sclk / 1000000)) * 1000;
+        policy->cpuinfo.transition_latency = 50000; /* 50us assumed */
        /*Now ,only support one cpu */
        policy->cur = cclk;
        cpufreq_frequency_table_get_attr(bfin_freq_table, policy->cpu);
diff --git a/arch/blackfin/mach-common/dpmc_modes.S b/arch/blackfin/mach-common/dpmc_modes.S
index 8009a512fb11..b03716896051 100644
--- a/arch/blackfin/mach-common/dpmc_modes.S
+++ b/arch/blackfin/mach-common/dpmc_modes.S
@@ -404,6 +404,21 @@ ENTRY(_do_hibernate)
        PM_SYS_PUSH(EBIU_FCTL)
 #endif
+#ifdef PORTCIO_FER
+        PM_SYS_PUSH16(PORTCIO_DIR)
+        PM_SYS_PUSH16(PORTCIO_INEN)
+        PM_SYS_PUSH16(PORTCIO)
+        PM_SYS_PUSH16(PORTCIO_FER)
+        PM_SYS_PUSH16(PORTDIO_DIR)
+        PM_SYS_PUSH16(PORTDIO_INEN)
+        PM_SYS_PUSH16(PORTDIO)
+        PM_SYS_PUSH16(PORTDIO_FER)
+        PM_SYS_PUSH16(PORTEIO_DIR)
+        PM_SYS_PUSH16(PORTEIO_INEN)
+        PM_SYS_PUSH16(PORTEIO)
+        PM_SYS_PUSH16(PORTEIO_FER)
+#endif
        PM_SYS_PUSH16(SYSCR)
        /* Save Core MMRs */
@@ -716,6 +731,21 @@ ENTRY(_do_hibernate)
        P0.L = lo(PLL_CTL);
        PM_SYS_POP16(SYSCR)
+#ifdef PORTCIO_FER
+        PM_SYS_POP16(PORTEIO_FER)
+        PM_SYS_POP16(PORTEIO)
+        PM_SYS_POP16(PORTEIO_INEN)
+        PM_SYS_POP16(PORTEIO_DIR)
+        PM_SYS_POP16(PORTDIO_FER)
+        PM_SYS_POP16(PORTDIO)
+        PM_SYS_POP16(PORTDIO_INEN)
+        PM_SYS_POP16(PORTDIO_DIR)
+        PM_SYS_POP16(PORTCIO_FER)
+        PM_SYS_POP16(PORTCIO)
+        PM_SYS_POP16(PORTCIO_INEN)
+        PM_SYS_POP16(PORTCIO_DIR)
+#endif
 #ifdef EBIU_FCTL
        PM_SYS_POP(EBIU_FCTL)
        PM_SYS_POP(EBIU_MODE)
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index f3f8bb46b517..b0ed0b487ff2 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -713,6 +713,8 @@ ENTRY(_system_call)
        cc = BITTST(r7, TIF_RESTORE_SIGMASK);
        if cc jump .Lsyscall_do_signals;
        cc = BITTST(r7, TIF_SIGPENDING);
+        if cc jump .Lsyscall_do_signals;
+        cc = BITTST(r7, TIF_NOTIFY_RESUME);
        if !cc jump .Lsyscall_really_exit;
 .Lsyscall_do_signals:
        /* Reenable interrupts.  */
@@ -721,7 +723,7 @@ ENTRY(_system_call)
        r0 = sp;
        SP += -12;
-        call _do_signal;
+        call _do_notify_resume;
        SP += 12;
 .Lsyscall_really_exit:
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 660ea1bec54c..1873b2c1fede 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -25,11 +25,20 @@
 #include <asm/blackfin.h>
 #include <asm/gpio.h>
 #include <asm/irq_handler.h>
+#include <asm/dpmc.h>
+#include <asm/bfin5xx_spi.h>
+#include <asm/bfin_sport.h>
 #define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1))
 #ifdef BF537_FAMILY
 # define BF537_GENERIC_ERROR_INT_DEMUX
+# define SPI_ERR_MASK   (BIT_STAT_TXCOL | BIT_STAT_RBSY | BIT_STAT_MODF | BIT_STAT_TXE) /* SPI_STAT */
+# define SPORT_ERR_MASK (ROVF | RUVF | TOVF | TUVF)     /* SPORT_STAT */
+# define PPI_ERR_MASK   (0xFFFF & ~FLD) /* PPI_STATUS */
+# define EMAC_ERR_MASK  (PHYINT | MMCINT | RXFSINT | TXFSINT | WAKEDET | RXDMAERR | TXDMAERR | STMDONE) /* EMAC_SYSTAT */
+# define UART_ERR_MASK  (0x6)   /* UART_IIR */
+# define CAN_ERR_MASK   (EWTIF | EWRIF | EPIF | BOIF | WUIF | UIAIF | AAIF | RMLIF | UCEIF | EXTIF | ADIF)      /* CAN_GIF */
 #else
 # undef BF537_GENERIC_ERROR_INT_DEMUX
 #endif
@@ -324,11 +333,9 @@ static void bfin_demux_error_irq(unsigned int int_err_irq,
                irq = IRQ_CAN_ERROR;
        else if (bfin_read_SPI_STAT() & SPI_ERR_MASK)
                irq = IRQ_SPI_ERROR;
-        else if ((bfin_read_UART0_IIR() & UART_ERR_MASK_STAT1) &&
+        else if ((bfin_read_UART0_IIR() & UART_ERR_MASK) == UART_ERR_MASK)
-                 (bfin_read_UART0_IIR() & UART_ERR_MASK_STAT0))
                irq = IRQ_UART0_ERROR;
-        else if ((bfin_read_UART1_IIR() & UART_ERR_MASK_STAT1) &&
+        else if ((bfin_read_UART1_IIR() & UART_ERR_MASK) == UART_ERR_MASK)
-                 (bfin_read_UART1_IIR() & UART_ERR_MASK_STAT0))
                irq = IRQ_UART1_ERROR;
        if (irq) {
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c
index d92b168c8328..369e687582b7 100644
--- a/arch/blackfin/mach-common/smp.c
+++ b/arch/blackfin/mach-common/smp.c
@@ -336,13 +336,6 @@ int __cpuinit __cpu_up(unsigned int cpu)
        ret = platform_boot_secondary(cpu, idle);
-        if (ret) {
-                cpu_clear(cpu, cpu_present_map);
-                printk(KERN_CRIT "CPU%u: processor failed to boot (%d)\n", cpu, ret);
-                free_task(idle);
-        } else
-                cpu_set(cpu, cpu_online_map);
        secondary_stack = NULL;
        return ret;
@@ -418,9 +411,16 @@ void __cpuinit secondary_start_kernel(void)
        setup_secondary(cpu);
+        platform_secondary_init(cpu);
        local_irq_enable();
-        platform_secondary_init(cpu);
+        /*
+         * Calibrate loops per jiffy value.
+         * IRQs need to be enabled here - D-cache can be invalidated
+         * in timer irq handler, so core B can read correct jiffies.
+         */
+        calibrate_delay();
        cpu_idle();
 }
diff --git a/arch/cris/include/asm/elf.h b/arch/cris/include/asm/elf.h
index 0f51b10b9f4f..8a3d8e2b33c1 100644
--- a/arch/cris/include/asm/elf.h
+++ b/arch/cris/include/asm/elf.h
@@ -64,8 +64,6 @@ typedef unsigned long elf_fpregset_t;
 #define EF_CRIS_VARIANT_COMMON_V10_V32  0x00000004
 /* End of excerpt from {binutils}/include/elf/cris.h.  */
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE       8192
 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
diff --git a/arch/frv/include/asm/elf.h b/arch/frv/include/asm/elf.h
index 7bbf6e47f8c8..c3819804a74b 100644
--- a/arch/frv/include/asm/elf.h
+++ b/arch/frv/include/asm/elf.h
@@ -115,7 +115,6 @@ do {											\
        __kernel_frame0_ptr->gr29       = 0;                                            \
 } while(0)
-#define USE_ELF_CORE_DUMP
 #define CORE_DUMP_USE_REGSET
 #define ELF_FDPIC_CORE_EFLAGS   EF_FRV_FDPIC
 #define ELF_EXEC_PAGESIZE       16384
diff --git a/arch/h8300/Kconfig b/arch/h8300/Kconfig
index 9420648352b8..53cc669e6d59 100644
--- a/arch/h8300/Kconfig
+++ b/arch/h8300/Kconfig
@@ -10,6 +10,10 @@ config H8300
        default y
        select HAVE_IDE
+config SYMBOL_PREFIX
+        string
+        default "_"
 config MMU
        bool
        default n
diff --git a/arch/h8300/include/asm/elf.h b/arch/h8300/include/asm/elf.h
index 94e2284c8816..c24fa250d653 100644
--- a/arch/h8300/include/asm/elf.h
+++ b/arch/h8300/include/asm/elf.h
@@ -34,7 +34,6 @@ typedef unsigned long elf_fpregset_t;
 #define ELF_PLAT_INIT(_r)       _r->er1 = 0
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE       4096
 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
diff --git a/arch/h8300/include/asm/module.h b/arch/h8300/include/asm/module.h
index de23231f3196..8e46724b7c09 100644
--- a/arch/h8300/include/asm/module.h
+++ b/arch/h8300/include/asm/module.h
@@ -8,6 +8,4 @@ struct mod_arch_specific { };
 #define Elf_Sym Elf32_Sym
 #define Elf_Ehdr Elf32_Ehdr
-#define MODULE_SYMBOL_PREFIX "_"
 #endif /* _ASM_H8/300_MODULE_H */
diff --git a/arch/h8300/kernel/vmlinux.lds.S b/arch/h8300/kernel/vmlinux.lds.S
index b9e24907e6ea..03d356d96e5d 100644
--- a/arch/h8300/kernel/vmlinux.lds.S
+++ b/arch/h8300/kernel/vmlinux.lds.S
@@ -1,4 +1,3 @@
-#define VMLINUX_SYMBOL(_sym_) _##_sym_
 #include <asm-generic/vmlinux.lds.h>
 #include <asm/page.h>
diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c
index f332e3fe4237..e14c492a8a93 100644
--- a/arch/ia64/hp/common/sba_iommu.c
+++ b/arch/ia64/hp/common/sba_iommu.c
@@ -677,12 +677,19 @@ sba_alloc_range(struct ioc *ioc, struct device *dev, size_t size)
                        spin_unlock_irqrestore(&ioc->saved_lock, flags);
                        pide = sba_search_bitmap(ioc, dev, pages_needed, 0);
-                        if (unlikely(pide >= (ioc->res_size << 3)))
+                        if (unlikely(pide >= (ioc->res_size << 3))) {
-                                panic(__FILE__ ": I/O MMU @ %p is out of mapping resources\n",
+                                printk(KERN_WARNING "%s: I/O MMU @ %p is"
-                                      ioc->ioc_hpa);
+                                       "out of mapping resources, %u %u %lx\n",
+                                       __func__, ioc->ioc_hpa, ioc->res_size,
+                                       pages_needed, dma_get_seg_boundary(dev));
+                                return -1;
+                        }
 #else
-                        panic(__FILE__ ": I/O MMU @ %p is out of mapping resources\n",
+                        printk(KERN_WARNING "%s: I/O MMU @ %p is"
-                              ioc->ioc_hpa);
+                               "out of mapping resources, %u %u %lx\n",
+                               __func__, ioc->ioc_hpa, ioc->res_size,
+                               pages_needed, dma_get_seg_boundary(dev));
+                        return -1;
 #endif
                }
        }
@@ -965,6 +972,8 @@ static dma_addr_t sba_map_page(struct device *dev, struct page *page,
 #endif
        pide = sba_alloc_range(ioc, dev, size);
+        if (pide < 0)
+                return 0;
        iovp = (dma_addr_t) pide << iovp_shift;
@@ -1320,6 +1329,7 @@ sba_coalesce_chunks(struct ioc *ioc, struct device *dev,
        unsigned long dma_offset, dma_len; /* start/len of DMA stream */
        int n_mappings = 0;
        unsigned int max_seg_size = dma_get_max_seg_size(dev);
+        int idx;
        while (nents > 0) {
                unsigned long vaddr = (unsigned long) sba_sg_address(startsg);
@@ -1418,16 +1428,22 @@ sba_coalesce_chunks(struct ioc *ioc, struct device *dev,
                vcontig_sg->dma_length = vcontig_len;
                dma_len = (dma_len + dma_offset + ~iovp_mask) & iovp_mask;
                ASSERT(dma_len <= DMA_CHUNK_SIZE);
-                dma_sg->dma_address = (dma_addr_t) (PIDE_FLAG
+                idx = sba_alloc_range(ioc, dev, dma_len);
-                        | (sba_alloc_range(ioc, dev, dma_len) << iovp_shift)
+                if (idx < 0) {
-                        | dma_offset);
+                        dma_sg->dma_length = 0;
+                        return -1;
+                }
+                dma_sg->dma_address = (dma_addr_t)(PIDE_FLAG | (idx << iovp_shift)
+                                                   | dma_offset);
                n_mappings++;
        }
        return n_mappings;
 }
+static void sba_unmap_sg_attrs(struct device *dev, struct scatterlist *sglist,
+                               int nents, enum dma_data_direction dir,
+                               struct dma_attrs *attrs);
 /**
 * sba_map_sg - map Scatter/Gather list
 * @dev: instance of PCI owned by the driver that's asking.
@@ -1493,6 +1509,10 @@ static int sba_map_sg_attrs(struct device *dev, struct scatterlist *sglist,
        ** Access to the virtual address is what forces a two pass algorithm.
        */
        coalesced = sba_coalesce_chunks(ioc, dev, sglist, nents);
+        if (coalesced < 0) {
+                sba_unmap_sg_attrs(dev, sglist, nents, dir, attrs);
+                return 0;
+        }
        /*
        ** Program the I/O Pdir
diff --git a/arch/ia64/ia32/elfcore32.h b/arch/ia64/ia32/elfcore32.h
index 9a3abf58cea3..657725742617 100644
--- a/arch/ia64/ia32/elfcore32.h
+++ b/arch/ia64/ia32/elfcore32.h
@@ -11,8 +11,6 @@
 #include <asm/intrinsics.h>
 #include <asm/uaccess.h>
-#define USE_ELF_CORE_DUMP 1
 /* Override elfcore.h */
 #define _LINUX_ELFCORE_H 1
 typedef unsigned int elf_greg_t;
diff --git a/arch/ia64/include/asm/dma-mapping.h b/arch/ia64/include/asm/dma-mapping.h
index 8d3c79cd81e7..7d09a09cdaad 100644
--- a/arch/ia64/include/asm/dma-mapping.h
+++ b/arch/ia64/include/asm/dma-mapping.h
@@ -73,7 +73,7 @@ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
        if (!dev->dma_mask)
                return 0;
-        return addr + size <= *dev->dma_mask;
+        return addr + size - 1 <= *dev->dma_mask;
 }
 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
diff --git a/arch/ia64/include/asm/elf.h b/arch/ia64/include/asm/elf.h
index 86eddee029cb..e14108b19c09 100644
--- a/arch/ia64/include/asm/elf.h
+++ b/arch/ia64/include/asm/elf.h
@@ -25,7 +25,6 @@
 #define ELF_DATA        ELFDATA2LSB
 #define ELF_ARCH        EM_IA_64
-#define USE_ELF_CORE_DUMP
 #define CORE_DUMP_USE_REGSET
 /* Least-significant four bits of ELF header's e_flags are OS-specific.  The bits are
diff --git a/arch/ia64/include/asm/hw_irq.h b/arch/ia64/include/asm/hw_irq.h
index 91619b31dbf5..bf2e37493e04 100644
--- a/arch/ia64/include/asm/hw_irq.h
+++ b/arch/ia64/include/asm/hw_irq.h
@@ -59,7 +59,13 @@ typedef u16 ia64_vector;
 extern int ia64_first_device_vector;
 extern int ia64_last_device_vector;
+#if defined(CONFIG_SMP) && (defined(CONFIG_IA64_GENERIC) || defined (CONFIG_IA64_DIG))
+/* Reserve the lower priority vector than device vectors for "move IRQ" IPI */
+#define IA64_IRQ_MOVE_VECTOR            0x30    /* "move IRQ" IPI */
+#define IA64_DEF_FIRST_DEVICE_VECTOR    0x31
+#else
 #define IA64_DEF_FIRST_DEVICE_VECTOR    0x30
+#endif
 #define IA64_DEF_LAST_DEVICE_VECTOR     0xe7
 #define IA64_FIRST_DEVICE_VECTOR        ia64_first_device_vector
 #define IA64_LAST_DEVICE_VECTOR         ia64_last_device_vector
diff --git a/arch/ia64/include/asm/io.h b/arch/ia64/include/asm/io.h
index 0d9d16e2d949..cc8335eb3110 100644
--- a/arch/ia64/include/asm/io.h
+++ b/arch/ia64/include/asm/io.h
@@ -424,6 +424,8 @@ __writeq (unsigned long val, volatile void __iomem *addr)
 extern void __iomem * ioremap(unsigned long offset, unsigned long size);
 extern void __iomem * ioremap_nocache (unsigned long offset, unsigned long size);
 extern void iounmap (volatile void __iomem *addr);
+extern void __iomem * early_ioremap (unsigned long phys_addr, unsigned long size);
+extern void early_iounmap (volatile void __iomem *addr, unsigned long size);
 /*
 * String version of IO memory access ops:
diff --git a/arch/ia64/include/asm/mca.h b/arch/ia64/include/asm/mca.h
index c171cdf0a789..43f96ab18fa0 100644
--- a/arch/ia64/include/asm/mca.h
+++ b/arch/ia64/include/asm/mca.h
@@ -106,6 +106,11 @@ struct ia64_sal_os_state {
        unsigned long           os_status;              /* OS status to SAL, enum below */
        unsigned long           context;                /* 0 if return to same context
                                                           1 if return to new context */
+        /* I-resources */
+        unsigned long           iip;
+        unsigned long           ipsr;
+        unsigned long           ifs;
 };
 enum {
diff --git a/arch/ia64/include/asm/rwsem.h b/arch/ia64/include/asm/rwsem.h
index fbee74b15782..e8762688e8e3 100644
--- a/arch/ia64/include/asm/rwsem.h
+++ b/arch/ia64/include/asm/rwsem.h
@@ -47,7 +47,7 @@ struct rw_semaphore {
 #define RWSEM_ACTIVE_WRITE_BIAS         (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
 #define __RWSEM_INITIALIZER(name) \
-        { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \
+        { RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait_lock), \
          LIST_HEAD_INIT((name).wait_list) }
 #define DECLARE_RWSEM(name) \
diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c
index 70e4bad23432..d4093a173a3e 100644
--- a/arch/ia64/kernel/irq_ia64.c
+++ b/arch/ia64/kernel/irq_ia64.c
@@ -260,7 +260,6 @@ void __setup_vector_irq(int cpu)
 }
 #if defined(CONFIG_SMP) && (defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_DIG))
-#define IA64_IRQ_MOVE_VECTOR    IA64_DEF_FIRST_DEVICE_VECTOR
 static enum vector_domain_type {
        VECTOR_DOMAIN_NONE,
@@ -659,11 +658,8 @@ init_IRQ (void)
        register_percpu_irq(IA64_SPURIOUS_INT_VECTOR, NULL);
 #ifdef CONFIG_SMP
 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_DIG)
-        if (vector_domain_type != VECTOR_DOMAIN_NONE) {
+        if (vector_domain_type != VECTOR_DOMAIN_NONE)
-                BUG_ON(IA64_FIRST_DEVICE_VECTOR != IA64_IRQ_MOVE_VECTOR);
-                IA64_FIRST_DEVICE_VECTOR++;
                register_percpu_irq(IA64_IRQ_MOVE_VECTOR, &irq_move_irqaction);
-        }
 #endif
 #endif
 #ifdef CONFIG_PERFMON
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index 496ac7a99488..32f2639e9b0a 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -888,9 +888,10 @@ ia64_mca_modify_comm(const struct task_struct *previous_current)
 }
 static void
-finish_pt_regs(struct pt_regs *regs, const pal_min_state_area_t *ms,
+finish_pt_regs(struct pt_regs *regs, struct ia64_sal_os_state *sos,
                unsigned long *nat)
 {
+        const pal_min_state_area_t *ms = sos->pal_min_state;
        const u64 *bank;
        /* If ipsr.ic then use pmsa_{iip,ipsr,ifs}, else use
@@ -904,6 +905,10 @@ finish_pt_regs(struct pt_regs *regs, const pal_min_state_area_t *ms,
                regs->cr_iip = ms->pmsa_xip;
                regs->cr_ipsr = ms->pmsa_xpsr;
                regs->cr_ifs = ms->pmsa_xfs;
+                sos->iip = ms->pmsa_iip;
+                sos->ipsr = ms->pmsa_ipsr;
+                sos->ifs = ms->pmsa_ifs;
        }
        regs->pr = ms->pmsa_pr;
        regs->b0 = ms->pmsa_br0;
@@ -1079,7 +1084,7 @@ ia64_mca_modify_original_stack(struct pt_regs *regs,
        memcpy(old_regs, regs, sizeof(*regs));
        old_regs->loadrs = loadrs;
        old_unat = old_regs->ar_unat;
-        finish_pt_regs(old_regs, ms, &old_unat);
+        finish_pt_regs(old_regs, sos, &old_unat);
        /* Next stack a struct switch_stack.  mca_asm.S built a partial
         * switch_stack, copy it and fill in the blanks using pt_regs and
@@ -1150,7 +1155,7 @@ no_mod:
        mprintk(KERN_INFO "cpu %d, %s %s, original stack not modified\n",
                        smp_processor_id(), type, msg);
        old_unat = regs->ar_unat;
-        finish_pt_regs(regs, ms, &old_unat);
+        finish_pt_regs(regs, sos, &old_unat);
        return previous_current;
 }
diff --git a/arch/ia64/mm/ioremap.c b/arch/ia64/mm/ioremap.c
index 2a140627dfd6..3dccdd8eb275 100644
--- a/arch/ia64/mm/ioremap.c
+++ b/arch/ia64/mm/ioremap.c
@@ -22,6 +22,12 @@ __ioremap (unsigned long phys_addr)
 }
 void __iomem *
+early_ioremap (unsigned long phys_addr, unsigned long size)
+{
+        return __ioremap(phys_addr);
+}
+void __iomem *
 ioremap (unsigned long phys_addr, unsigned long size)
 {
        void __iomem *addr;
@@ -102,6 +108,11 @@ ioremap_nocache (unsigned long phys_addr, unsigned long size)
 EXPORT_SYMBOL(ioremap_nocache);
 void
+early_iounmap (volatile void __iomem *addr, unsigned long size)
+{
+}
+void
 iounmap (volatile void __iomem *addr)
 {
        if (REGION_NUMBER(addr) == RGN_GATE)
diff --git a/arch/ia64/sn/pci/tioca_provider.c b/arch/ia64/sn/pci/tioca_provider.c
index 35b2a27d2e77..efb454534e52 100644
--- a/arch/ia64/sn/pci/tioca_provider.c
+++ b/arch/ia64/sn/pci/tioca_provider.c
@@ -9,6 +9,7 @@
 #include <linux/types.h>
 #include <linux/interrupt.h>
 #include <linux/pci.h>
+#include <linux/bitmap.h>
 #include <asm/sn/sn_sal.h>
 #include <asm/sn/addrs.h>
 #include <asm/sn/io.h>
@@ -369,7 +370,7 @@ tioca_dma_d48(struct pci_dev *pdev, u64 paddr)
 static dma_addr_t
 tioca_dma_mapped(struct pci_dev *pdev, unsigned long paddr, size_t req_size)
 {
-        int i, ps, ps_shift, entry, entries, mapsize, last_entry;
+        int ps, ps_shift, entry, entries, mapsize;
        u64 xio_addr, end_xio_addr;
        struct tioca_common *tioca_common;
        struct tioca_kernel *tioca_kern;
@@ -410,23 +411,13 @@ tioca_dma_mapped(struct pci_dev *pdev, unsigned long paddr, size_t req_size)
        map = tioca_kern->ca_pcigart_pagemap;
        mapsize = tioca_kern->ca_pcigart_entries;
-        entry = find_first_zero_bit(map, mapsize);
+        entry = bitmap_find_next_zero_area(map, mapsize, 0, entries, 0);
-        while (entry < mapsize) {
+        if (entry >= mapsize) {
-                last_entry = find_next_bit(map, mapsize, entry);
-                if (last_entry - entry >= entries)
-                        break;
-                entry = find_next_zero_bit(map, mapsize, last_entry);
-        }
-        if (entry > mapsize) {
                kfree(ca_dmamap);
                goto map_return;
        }
-        for (i = 0; i < entries; i++)
+        bitmap_set(map, entry, entries);
-                set_bit(entry + i, map);
        bus_addr = tioca_kern->ca_pciap_base + (entry * ps);
diff --git a/arch/m32r/include/asm/elf.h b/arch/m32r/include/asm/elf.h
index 0cc34c94bf2b..2f85412ef730 100644
--- a/arch/m32r/include/asm/elf.h
+++ b/arch/m32r/include/asm/elf.h
@@ -102,7 +102,6 @@ typedef elf_fpreg_t elf_fpregset_t;
 */
 #define ELF_PLAT_INIT(_r, load_addr)    (_r)->r0 = 0
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE       PAGE_SIZE
 /*
diff --git a/arch/m68k/include/asm/elf.h b/arch/m68k/include/asm/elf.h
index 0b0f49eb876b..01c193d91412 100644
--- a/arch/m68k/include/asm/elf.h
+++ b/arch/m68k/include/asm/elf.h
@@ -59,7 +59,6 @@ typedef struct user_m68kfp_struct elf_fpregset_t;
   is actually used on ASV.  */
 #define ELF_PLAT_INIT(_r, load_addr)    _r->a1 = 0
-#define USE_ELF_CORE_DUMP
 #ifndef CONFIG_SUN3
 #define ELF_EXEC_PAGESIZE       4096
 #else
diff --git a/arch/microblaze/include/asm/elf.h b/arch/microblaze/include/asm/elf.h
index f92fc0dda006..7d4acf2b278e 100644
--- a/arch/microblaze/include/asm/elf.h
+++ b/arch/microblaze/include/asm/elf.h
@@ -77,7 +77,6 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
 #define ELF_DATA        ELFDATA2MSB
 #endif
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE       4096
diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
index 7990694cda22..7a6a35dbe529 100644
--- a/arch/mips/include/asm/elf.h
+++ b/arch/mips/include/asm/elf.h
@@ -326,7 +326,6 @@ extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
 #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs)                   \
        dump_task_fpu(tsk, elf_fpregs)
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE       PAGE_SIZE
 /* This yields a mask that user programs can use to figure out what
diff --git a/arch/mn10300/include/asm/elf.h b/arch/mn10300/include/asm/elf.h
index 75a70aa9fd6f..e5fa97cd9a14 100644
--- a/arch/mn10300/include/asm/elf.h
+++ b/arch/mn10300/include/asm/elf.h
@@ -77,7 +77,6 @@ do {									\
        _ur->a1   = 0;  _ur->a0   = 0;  _ur->d1   = 0;  _ur->d0   = 0;  \
 } while (0)
-#define USE_ELF_CORE_DUMP
 #define CORE_DUMP_USE_REGSET
 #define ELF_EXEC_PAGESIZE       4096
diff --git a/arch/parisc/include/asm/bug.h b/arch/parisc/include/asm/bug.h
index 8cfc553fc837..75e46c557a16 100644
--- a/arch/parisc/include/asm/bug.h
+++ b/arch/parisc/include/asm/bug.h
@@ -32,14 +32,14 @@
                             "\t.popsection"                            \
                             : : "i" (__FILE__), "i" (__LINE__),        \
                             "i" (0), "i" (sizeof(struct bug_entry)) ); \
-                for(;;) ;                                               \
+                unreachable();                                          \
        } while(0)
 #else
 #define BUG()                                                           \
        do {                                                            \
                asm volatile(PARISC_BUG_BREAK_ASM : : );                \
-                for(;;) ;                                               \
+                unreachable();                                          \
        } while(0)
 #endif
diff --git a/arch/parisc/include/asm/elf.h b/arch/parisc/include/asm/elf.h
index 9c802eb4be84..19f6cb1a4a1c 100644
--- a/arch/parisc/include/asm/elf.h
+++ b/arch/parisc/include/asm/elf.h
@@ -328,7 +328,6 @@ struct pt_regs;	/* forward declaration... */
   such function.  */
 #define ELF_PLAT_INIT(_r, load_addr)       _r->gr[23] = 0
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE       4096
 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
diff --git a/arch/parisc/include/asm/ftrace.h b/arch/parisc/include/asm/ftrace.h
index 2fa05dd6aeee..72c0fafaa039 100644
--- a/arch/parisc/include/asm/ftrace.h
+++ b/arch/parisc/include/asm/ftrace.h
@@ -20,6 +20,20 @@ struct ftrace_ret_stack {
 * Defined in entry.S
 */
 extern void return_to_handler(void);
+extern unsigned long return_address(unsigned int);
+#define HAVE_ARCH_CALLER_ADDR
+#define CALLER_ADDR0 ((unsigned long)__builtin_return_address(0))
+#define CALLER_ADDR1 return_address(1)
+#define CALLER_ADDR2 return_address(2)
+#define CALLER_ADDR3 return_address(3)
+#define CALLER_ADDR4 return_address(4)
+#define CALLER_ADDR5 return_address(5)
+#define CALLER_ADDR6 return_address(6)
 #endif /* __ASSEMBLY__ */
 #endif /* _ASM_PARISC_FTRACE_H */
diff --git a/arch/parisc/kernel/asm-offsets.c b/arch/parisc/kernel/asm-offsets.c
index fcd3c707bf12..ec787b411e9a 100644
--- a/arch/parisc/kernel/asm-offsets.c
+++ b/arch/parisc/kernel/asm-offsets.c
@@ -244,9 +244,6 @@ int main(void)
        DEFINE(THREAD_SZ, sizeof(struct thread_info));
        DEFINE(THREAD_SZ_ALGN, align(sizeof(struct thread_info), 64));
        BLANK();
-        DEFINE(IRQSTAT_SIRQ_PEND, offsetof(irq_cpustat_t, __softirq_pending));
-        DEFINE(IRQSTAT_SZ, sizeof(irq_cpustat_t));
-        BLANK();
        DEFINE(ICACHE_BASE, offsetof(struct pdc_cache_info, ic_base));
        DEFINE(ICACHE_STRIDE, offsetof(struct pdc_cache_info, ic_stride));
        DEFINE(ICACHE_COUNT, offsetof(struct pdc_cache_info, ic_count));
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
index f47465e8d040..efbcee5d2220 100644
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -145,7 +145,7 @@ static int cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest)
 #endif
 static struct irq_chip cpu_interrupt_type = {
-        .typename       = "CPU",
+        .name           = "CPU",
        .startup        = cpu_startup_irq,
        .shutdown       = cpu_disable_irq,
        .enable         = cpu_enable_irq,
@@ -192,7 +192,7 @@ int show_interrupts(struct seq_file *p, void *v)
                seq_printf(p, "%10u ", kstat_irqs(i));
 #endif
-                seq_printf(p, " %14s", irq_desc[i].chip->typename);
+                seq_printf(p, " %14s", irq_desc[i].chip->name);
 #ifndef PARISC_IRQ_CR16_COUNTS
                seq_printf(p, "  %s", action->name);
diff --git a/arch/parisc/kernel/signal.c b/arch/parisc/kernel/signal.c
index e8467e4aa8d1..fb37ac52e46c 100644
--- a/arch/parisc/kernel/signal.c
+++ b/arch/parisc/kernel/signal.c
@@ -26,7 +26,6 @@
 #include <linux/stddef.h>
 #include <linux/compat.h>
 #include <linux/elf.h>
-#include <linux/tracehook.h>
 #include <asm/ucontext.h>
 #include <asm/rt_sigframe.h>
 #include <asm/uaccess.h>
diff --git a/arch/parisc/kernel/smp.c b/arch/parisc/kernel/smp.c
index 1fd0f0cec037..3f2fce8ce6b6 100644
--- a/arch/parisc/kernel/smp.c
+++ b/arch/parisc/kernel/smp.c
@@ -60,8 +60,6 @@ static int smp_debug_lvl = 0;
 #define smp_debug(lvl, ...)     do { } while(0)
 #endif /* DEBUG_SMP */
-DEFINE_SPINLOCK(smp_lock);
 volatile struct task_struct *smp_init_current_idle_task;
 /* track which CPU is booting */
@@ -69,7 +67,7 @@ static volatile int cpu_now_booting __cpuinitdata;
 static int parisc_max_cpus __cpuinitdata = 1;
-DEFINE_PER_CPU(spinlock_t, ipi_lock) = SPIN_LOCK_UNLOCKED;
+static DEFINE_PER_CPU(spinlock_t, ipi_lock);
 enum ipi_message_type {
        IPI_NOP=0,
@@ -438,6 +436,11 @@ void __init smp_prepare_boot_cpu(void)
 */
 void __init smp_prepare_cpus(unsigned int max_cpus)
 {
+        int cpu;
+        for_each_possible_cpu(cpu)
+                spin_lock_init(&per_cpu(ipi_lock, cpu));
        init_cpu_present(cpumask_of(0));
        parisc_max_cpus = max_cpus;
diff --git a/arch/parisc/kernel/sys_parisc32.c b/arch/parisc/kernel/sys_parisc32.c
index 76d23ec8dfaa..9779ece2b070 100644
--- a/arch/parisc/kernel/sys_parisc32.c
+++ b/arch/parisc/kernel/sys_parisc32.c
@@ -26,13 +26,7 @@
 #include <linux/shm.h>
 #include <linux/slab.h>
 #include <linux/uio.h>
-#include <linux/nfs_fs.h>
 #include <linux/ncp_fs.h>
-#include <linux/sunrpc/svc.h>
-#include <linux/nfsd/nfsd.h>
-#include <linux/nfsd/cache.h>
-#include <linux/nfsd/xdr.h>
-#include <linux/nfsd/syscall.h>
 #include <linux/poll.h>
 #include <linux/personality.h>
 #include <linux/stat.h>
diff --git a/arch/parisc/kernel/unwind.c b/arch/parisc/kernel/unwind.c
index a36799e85693..d58eac1a8288 100644
--- a/arch/parisc/kernel/unwind.c
+++ b/arch/parisc/kernel/unwind.c
@@ -13,6 +13,7 @@
 #include <linux/sched.h>
 #include <linux/slab.h>
 #include <linux/kallsyms.h>
+#include <linux/sort.h>
 #include <asm/uaccess.h>
 #include <asm/assembly.h>
@@ -115,24 +116,18 @@ unwind_table_init(struct unwind_table *table, const char *name,
        }
 }
+static int cmp_unwind_table_entry(const void *a, const void *b)
+{
+        return ((const struct unwind_table_entry *)a)->region_start
+             - ((const struct unwind_table_entry *)b)->region_start;
+}
 static void
 unwind_table_sort(struct unwind_table_entry *start,
                  struct unwind_table_entry *finish)
 {
-        struct unwind_table_entry el, *p, *q;
+        sort(start, finish - start, sizeof(struct unwind_table_entry),
+             cmp_unwind_table_entry, NULL);
-        for (p = start + 1; p < finish; ++p) {
-                if (p[0].region_start < p[-1].region_start) {
-                        el = *p;
-                        q = p;
-                        do {
-                                q[0] = q[-1];
-                                --q;
-                        } while (q > start && 
-                                 el.region_start < q[-1].region_start);
-                        *q = el;
-                }
-        }
 }
 struct unwind_table *
@@ -417,3 +412,30 @@ int unwind_to_user(struct unwind_frame_info *info)
        return ret;
 }
+unsigned long return_address(unsigned int level)
+{
+        struct unwind_frame_info info;
+        struct pt_regs r;
+        unsigned long sp;
+        /* initialize unwind info */
+        asm volatile ("copy %%r30, %0" : "=r"(sp));
+        memset(&r, 0, sizeof(struct pt_regs));
+        r.iaoq[0] = (unsigned long) current_text_addr();
+        r.gr[2] = (unsigned long) __builtin_return_address(0);
+        r.gr[30] = sp;
+        unwind_frame_init(&info, current, &r);
+        /* unwind stack */
+        ++level;
+        do {
+                if (unwind_once(&info) < 0 || info.ip == 0)
+                        return 0;
+                if (!__kernel_text_address(info.ip)) {
+                        return 0;
+                }
+        } while (info.ip && level--);
+        return info.ip;
+}
diff --git a/arch/powerpc/include/asm/async_tx.h b/arch/powerpc/include/asm/async_tx.h
new file mode 100644
index 000000000000..8b2dc55d01ab
--- /dev/null
+++ b/arch/powerpc/include/asm/async_tx.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2008-2009 DENX Software Engineering.
+ *
+ * Author: Yuri Tikhonov <yur@emcraft.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59
+ * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called COPYING.
+ */
+#ifndef _ASM_POWERPC_ASYNC_TX_H_
+#define _ASM_POWERPC_ASYNC_TX_H_
+#if defined(CONFIG_440SPe) || defined(CONFIG_440SP)
+extern struct dma_chan *
+ppc440spe_async_tx_find_best_channel(enum dma_transaction_type cap,
+        struct page **dst_lst, int dst_cnt, struct page **src_lst,
+        int src_cnt, size_t src_sz);
+#define async_tx_find_channel(dep, cap, dst_lst, dst_cnt, src_lst, \
+                              src_cnt, src_sz) \
+        ppc440spe_async_tx_find_best_channel(cap, dst_lst, dst_cnt, src_lst, \
+                                             src_cnt, src_sz)
+#else
+#define async_tx_find_channel(dep, type, dst, dst_count, src, src_count, len) \
+        __async_tx_find_channel(dep, type)
+struct dma_chan *
+__async_tx_find_channel(struct async_submit_ctl *submit,
+                        enum dma_transaction_type tx_type);
+#endif
+#endif
diff --git a/arch/powerpc/include/asm/dcr-regs.h b/arch/powerpc/include/asm/dcr-regs.h
index 828e3aa1f2fc..380274de429f 100644
--- a/arch/powerpc/include/asm/dcr-regs.h
+++ b/arch/powerpc/include/asm/dcr-regs.h
@@ -157,4 +157,27 @@
 #define  L2C_SNP_SSR_32G        0x0000f000
 #define  L2C_SNP_ESR            0x00000800
+/*
+ * DCR register offsets for 440SP/440SPe I2O/DMA controller.
+ * The base address is configured in the device tree.
+ */
+#define DCRN_I2O0_IBAL          0x006
+#define DCRN_I2O0_IBAH          0x007
+#define I2O_REG_ENABLE          0x00000001      /* Enable I2O/DMA access */
+/* 440SP/440SPe Software Reset DCR */
+#define DCRN_SDR0_SRST          0x0200
+#define DCRN_SDR0_SRST_I2ODMA   (0x80000000 >> 15)      /* Reset I2O/DMA */
+/* 440SP/440SPe Memory Queue DCR offsets */
+#define DCRN_MQ0_XORBA          0x04
+#define DCRN_MQ0_CF2H           0x06
+#define DCRN_MQ0_CFBHL          0x0f
+#define DCRN_MQ0_BAUH           0x10
+/* HB/LL Paths Configuration Register */
+#define MQ0_CFBHL_TPLM          28
+#define MQ0_CFBHL_HBCL          23
+#define MQ0_CFBHL_POLY          15
 #endif /* __DCR_REGS_H__ */
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index e281daebddca..80a973bb9e71 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -197,7 +197,7 @@ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
        if (!dev->dma_mask)
                return 0;
-        return addr + size <= *dev->dma_mask;
+        return addr + size - 1 <= *dev->dma_mask;
 }
 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h
index 014a624f4c8e..17828ad411eb 100644
--- a/arch/powerpc/include/asm/elf.h
+++ b/arch/powerpc/include/asm/elf.h
@@ -170,7 +170,6 @@ typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG];
 #define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
 #define compat_elf_check_arch(x)        ((x)->e_machine == EM_PPC)
-#define USE_ELF_CORE_DUMP
 #define CORE_DUMP_USE_REGSET
 #define ELF_EXEC_PAGESIZE       PAGE_SIZE
diff --git a/arch/powerpc/include/asm/module.h b/arch/powerpc/include/asm/module.h
index 08454880a2c0..0192a4ee2bc2 100644
--- a/arch/powerpc/include/asm/module.h
+++ b/arch/powerpc/include/asm/module.h
@@ -87,5 +87,10 @@ struct exception_table_entry;
 void sort_ex_table(struct exception_table_entry *start,
                   struct exception_table_entry *finish);
+#ifdef CONFIG_MODVERSIONS
+#define ARCH_RELOCATES_KCRCTAB
+extern const unsigned long reloc_start[];
+#endif
 #endif /* __KERNEL__ */
 #endif  /* _ASM_POWERPC_MODULE_H */
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
index 8c341490cfc5..cbd759e3cd78 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -140,6 +140,8 @@ extern void user_enable_single_step(struct task_struct *);
 extern void user_enable_block_step(struct task_struct *);
 extern void user_disable_single_step(struct task_struct *);
+#define ARCH_HAS_USER_SINGLE_STEP_INFO
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index fd51578e29dd..5547ae6e6b0b 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -30,7 +30,7 @@
 #include <linux/spinlock.h>
 #include <linux/string.h>
 #include <linux/dma-mapping.h>
-#include <linux/bitops.h>
+#include <linux/bitmap.h>
 #include <linux/iommu-helper.h>
 #include <linux/crash_dump.h>
 #include <asm/io.h>
@@ -251,7 +251,7 @@ static void __iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
        }
        ppc_md.tce_free(tbl, entry, npages);
-        iommu_area_free(tbl->it_map, free_entry, npages);
+        bitmap_clear(tbl->it_map, free_entry, npages);
 }
 static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 804f0f30f227..d069ff8a7e03 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -174,6 +174,15 @@ int die(const char *str, struct pt_regs *regs, long err)
        return 0;
 }
+void user_single_step_siginfo(struct task_struct *tsk,
+                                struct pt_regs *regs, siginfo_t *info)
+{
+        memset(info, 0, sizeof(*info));
+        info->si_signo = SIGTRAP;
+        info->si_code = TRAP_TRACE;
+        info->si_addr = (void __user *)regs->nip;
+}
 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
 {
        siginfo_t info;
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 27735a7ac12b..dcd01c82e701 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -38,6 +38,9 @@ jiffies = jiffies_64 + 4;
 #endif
 SECTIONS
 {
+        . = 0;
+        reloc_start = .;
        . = KERNELBASE;
 /*
diff --git a/arch/s390/include/asm/elf.h b/arch/s390/include/asm/elf.h
index e885442c1dfe..354d42616c7e 100644
--- a/arch/s390/include/asm/elf.h
+++ b/arch/s390/include/asm/elf.h
@@ -155,7 +155,6 @@ extern unsigned int vdso_enabled;
        } while (0)
 #define CORE_DUMP_USE_REGSET
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE       4096
 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
diff --git a/arch/score/include/asm/elf.h b/arch/score/include/asm/elf.h
index 43526d9fda93..f478ce94181f 100644
--- a/arch/score/include/asm/elf.h
+++ b/arch/score/include/asm/elf.h
@@ -61,7 +61,6 @@ struct task_struct;
 struct pt_regs;
 #define CORE_DUMP_USE_REGSET
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE       PAGE_SIZE
 /* This yields a mask that user programs can use to figure out what
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index 55907af1dc25..12fec72fec5f 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -19,50 +19,6 @@ config SH_STANDARD_BIOS
          mask ROM and no flash (WindowsCE machines fall in this category).
          If unsure, say N.
-config EARLY_SCIF_CONSOLE
-        bool "Use early SCIF console"
-        help
-          This enables an early console using a fixed SCIF port. This can
-          be used by platforms that are either not running the SH
-          standard BIOS, or do not wish to use the BIOS callbacks for the
-          serial I/O.
-config EARLY_SCIF_CONSOLE_PORT
-        hex
-        depends on EARLY_SCIF_CONSOLE
-        default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705
-        default "0xa4430000" if CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721
-        default "0xf8420000" if CPU_SUBTYPE_SH7619
-        default "0xff804000" if CPU_SUBTYPE_MXG
-        default "0xffc30000" if CPU_SUBTYPE_SHX3
-        default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \
-                                CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \
-                                CPU_SUBTYPE_SH7343
-        default "0xfe4c0000" if CPU_SUBTYPE_SH7757
-        default "0xffeb0000" if CPU_SUBTYPE_SH7785
-        default "0xffeb0000" if CPU_SUBTYPE_SH7786
-        default "0xfffe8000" if CPU_SUBTYPE_SH7203
-        default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263
-        default "0xffe80000" if CPU_SH4
-        default "0xa4000150" if CPU_SH3
-        default "0x00000000"
-config EARLY_PRINTK
-        bool "Early printk support"
-        depends on SH_STANDARD_BIOS || EARLY_SCIF_CONSOLE
-        help
-          Say Y here to redirect kernel printk messages to the serial port
-          used by the SH-IPL bootloader, starting very early in the boot
-          process and ending when the kernel's serial console is initialised.
-          This option is only useful porting the kernel to a new machine,
-          when the kernel may crash or hang before the serial console is
-          initialised. If unsure, say N.
-          On devices that are running SH-IPL and want to keep the port
-          initialization consistent while not using the BIOS callbacks,
-          select both the EARLY_SCIF_CONSOLE and SH_STANDARD_BIOS, using
-          the kernel command line option to toggle back and forth.
 config STACK_DEBUG
        bool "Check for stack overflows"
        depends on DEBUG_KERNEL && SUPERH32
diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c
index cf9dc12dfeb1..1f5fa5c44f6d 100644
--- a/arch/sh/boards/mach-ap325rxa/setup.c
+++ b/arch/sh/boards/mach-ap325rxa/setup.c
@@ -316,20 +316,24 @@ static struct soc_camera_platform_info camera_info = {
        .format_name = "UYVY",
        .format_depth = 16,
        .format = {
-                .pixelformat = V4L2_PIX_FMT_UYVY,
+                .code = V4L2_MBUS_FMT_YUYV8_2X8_BE,
                .colorspace = V4L2_COLORSPACE_SMPTE170M,
+                .field = V4L2_FIELD_NONE,
                .width = 640,
                .height = 480,
        },
        .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
-        SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
+        SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8 |
+        SOCAM_DATA_ACTIVE_HIGH,
        .set_capture = camera_set_capture,
-        .link = {
+};
-                .bus_id         = 0,
-                .add_device     = ap325rxa_camera_add,
+struct soc_camera_link camera_link = {
-                .del_device     = ap325rxa_camera_del,
+        .bus_id         = 0,
-                .module_name    = "soc_camera_platform",
+        .add_device     = ap325rxa_camera_add,
-        },
+        .del_device     = ap325rxa_camera_del,
+        .module_name    = "soc_camera_platform",
+        .priv           = &camera_info,
 };
 static void dummy_release(struct device *dev)
@@ -347,7 +351,7 @@ static struct platform_device camera_device = {
 static int ap325rxa_camera_add(struct soc_camera_link *icl,
                               struct device *dev)
 {
-        if (icl != &camera_info.link || camera_probe() <= 0)
+        if (icl != &camera_link || camera_probe() <= 0)
                return -ENODEV;
        camera_info.dev = dev;
@@ -357,7 +361,7 @@ static int ap325rxa_camera_add(struct soc_camera_link *icl,
 static void ap325rxa_camera_del(struct soc_camera_link *icl)
 {
-        if (icl != &camera_info.link)
+        if (icl != &camera_link)
                return;
        platform_device_unregister(&camera_device);
@@ -470,13 +474,15 @@ static struct ov772x_camera_info ov7725_info = {
        .buswidth       = SOCAM_DATAWIDTH_8,
        .flags          = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP,
        .edgectrl       = OV772X_AUTO_EDGECTRL(0xf, 0),
-        .link = {
+};
-                .bus_id         = 0,
-                .power          = ov7725_power,
+static struct soc_camera_link ov7725_link = {
-                .board_info     = &ap325rxa_i2c_camera[0],
+        .bus_id         = 0,
-                .i2c_adapter_id = 0,
+        .power          = ov7725_power,
-                .module_name    = "ov772x",
+        .board_info     = &ap325rxa_i2c_camera[0],
-        },
+        .i2c_adapter_id = 0,
+        .module_name    = "ov772x",
+        .priv           = &ov7725_info,
 };
 static struct platform_device ap325rxa_camera[] = {
@@ -484,13 +490,13 @@ static struct platform_device ap325rxa_camera[] = {
                .name   = "soc-camera-pdrv",
                .id     = 0,
                .dev    = {
-                        .platform_data = &ov7725_info.link,
+                        .platform_data = &ov7725_link,
                },
        }, {
                .name   = "soc-camera-pdrv",
                .id     = 1,
                .dev    = {
-                        .platform_data = &camera_info.link,
+                        .platform_data = &camera_link,
                },
        },
 };
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 826e62326d51..194aaca22d47 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -19,11 +19,18 @@
 #include <linux/usb/r8a66597.h>
 #include <linux/i2c.h>
 #include <linux/i2c/tsc2007.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/sh_msiof.h>
+#include <linux/spi/mmc_spi.h>
+#include <linux/mmc/host.h>
 #include <linux/input.h>
 #include <linux/input/sh_keysc.h>
 #include <linux/mfd/sh_mobile_sdhi.h>
 #include <video/sh_mobile_lcdc.h>
+#include <sound/sh_fsi.h>
 #include <media/sh_mobile_ceu.h>
+#include <media/tw9910.h>
+#include <media/mt9t112.h>
 #include <asm/heartbeat.h>
 #include <asm/sh_eth.h>
 #include <asm/clock.h>
@@ -338,6 +345,12 @@ static struct platform_device ceu1_device = {
 };
 /* I2C device */
+static struct i2c_board_info i2c0_devices[] = {
+        {
+                I2C_BOARD_INFO("da7210", 0x1a),
+        },
+};
 static struct i2c_board_info i2c1_devices[] = {
        {
                I2C_BOARD_INFO("r2025sd", 0x32),
@@ -421,6 +434,7 @@ static struct i2c_board_info ts_i2c_clients = {
        .irq            = IRQ0,
 };
+#ifdef CONFIG_MFD_SH_MOBILE_SDHI
 /* SHDI0 */
 static void sdhi0_set_pwr(struct platform_device *pdev, int state)
 {
@@ -493,6 +507,248 @@ static struct platform_device sdhi1_device = {
        },
 };
+#else
+static int mmc_spi_get_ro(struct device *dev)
+{
+        return gpio_get_value(GPIO_PTY6);
+}
+static int mmc_spi_get_cd(struct device *dev)
+{
+        return !gpio_get_value(GPIO_PTY7);
+}
+static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
+{
+        gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
+}
+static struct mmc_spi_platform_data mmc_spi_info = {
+        .get_ro = mmc_spi_get_ro,
+        .get_cd = mmc_spi_get_cd,
+        .caps = MMC_CAP_NEEDS_POLL,
+        .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
+        .setpower = mmc_spi_setpower,
+};
+static struct spi_board_info spi_bus[] = {
+        {
+                .modalias       = "mmc_spi",
+                .platform_data  = &mmc_spi_info,
+                .max_speed_hz   = 5000000,
+                .mode           = SPI_MODE_0,
+                .controller_data = (void *) GPIO_PTM4,
+        },
+};
+static struct sh_msiof_spi_info msiof0_data = {
+        .num_chipselect = 1,
+};
+static struct resource msiof0_resources[] = {
+        [0] = {
+                .name   = "MSIOF0",
+                .start  = 0xa4c40000,
+                .end    = 0xa4c40063,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 84,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device msiof0_device = {
+        .name           = "spi_sh_msiof",
+        .id             = 0, /* MSIOF0 */
+        .dev = {
+                .platform_data = &msiof0_data,
+        },
+        .num_resources  = ARRAY_SIZE(msiof0_resources),
+        .resource       = msiof0_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_MSIOF0,
+        },
+};
+#endif
+/* I2C Video/Camera */
+static struct i2c_board_info i2c_camera[] = {
+        {
+                I2C_BOARD_INFO("tw9910", 0x45),
+        },
+        {
+                /* 1st camera */
+                I2C_BOARD_INFO("mt9t112", 0x3c),
+        },
+        {
+                /* 2nd camera */
+                I2C_BOARD_INFO("mt9t112", 0x3c),
+        },
+};
+/* tw9910 */
+static int tw9910_power(struct device *dev, int mode)
+{
+        int val = mode ? 0 : 1;
+        gpio_set_value(GPIO_PTU2, val);
+        if (mode)
+                mdelay(100);
+        return 0;
+}
+static struct tw9910_video_info tw9910_info = {
+        .buswidth       = SOCAM_DATAWIDTH_8,
+        .mpout          = TW9910_MPO_FIELD,
+};
+static struct soc_camera_link tw9910_link = {
+        .i2c_adapter_id = 0,
+        .bus_id         = 1,
+        .power          = tw9910_power,
+        .board_info     = &i2c_camera[0],
+        .module_name    = "tw9910",
+        .priv           = &tw9910_info,
+};
+/* mt9t112 */
+static int mt9t112_power1(struct device *dev, int mode)
+{
+        gpio_set_value(GPIO_PTA3, mode);
+        if (mode)
+                mdelay(100);
+        return 0;
+}
+static struct mt9t112_camera_info mt9t112_info1 = {
+        .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
+        .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
+};
+static struct soc_camera_link mt9t112_link1 = {
+        .i2c_adapter_id = 0,
+        .power          = mt9t112_power1,
+        .bus_id         = 0,
+        .board_info     = &i2c_camera[1],
+        .module_name    = "mt9t112",
+        .priv           = &mt9t112_info1,
+};
+static int mt9t112_power2(struct device *dev, int mode)
+{
+        gpio_set_value(GPIO_PTA4, mode);
+        if (mode)
+                mdelay(100);
+        return 0;
+}
+static struct mt9t112_camera_info mt9t112_info2 = {
+        .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
+        .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
+};
+static struct soc_camera_link mt9t112_link2 = {
+        .i2c_adapter_id = 1,
+        .power          = mt9t112_power2,
+        .bus_id         = 1,
+        .board_info     = &i2c_camera[2],
+        .module_name    = "mt9t112",
+        .priv           = &mt9t112_info2,
+};
+static struct platform_device camera_devices[] = {
+        {
+                .name   = "soc-camera-pdrv",
+                .id     = 0,
+                .dev    = {
+                        .platform_data = &tw9910_link,
+                },
+        },
+        {
+                .name   = "soc-camera-pdrv",
+                .id     = 1,
+                .dev    = {
+                        .platform_data = &mt9t112_link1,
+                },
+        },
+        {
+                .name   = "soc-camera-pdrv",
+                .id     = 2,
+                .dev    = {
+                        .platform_data = &mt9t112_link2,
+                },
+        },
+};
+/* FSI */
+/*
+ * FSI-B use external clock which came from da7210.
+ * So, we should change parent of fsi
+ */
+#define FCLKBCR         0xa415000c
+static void fsimck_init(struct clk *clk)
+{
+        u32 status = ctrl_inl(clk->enable_reg);
+        /* use external clock */
+        status &= ~0x000000ff;
+        status |= 0x00000080;
+        ctrl_outl(status, clk->enable_reg);
+}
+static struct clk_ops fsimck_clk_ops = {
+        .init = fsimck_init,
+};
+static struct clk fsimckb_clk = {
+        .name           = "fsimckb_clk",
+        .id             = -1,
+        .ops            = &fsimck_clk_ops,
+        .enable_reg     = (void __iomem *)FCLKBCR,
+        .rate           = 0, /* unknown */
+};
+struct sh_fsi_platform_info fsi_info = {
+        .portb_flags = SH_FSI_BRS_INV |
+                       SH_FSI_OUT_SLAVE_MODE |
+                       SH_FSI_IN_SLAVE_MODE |
+                       SH_FSI_OFMT(I2S) |
+                       SH_FSI_IFMT(I2S),
+};
+static struct resource fsi_resources[] = {
+        [0] = {
+                .name   = "FSI",
+                .start  = 0xFE3C0000,
+                .end    = 0xFE3C021d,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 108,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device fsi_device = {
+        .name           = "sh_fsi",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(fsi_resources),
+        .resource       = fsi_resources,
+        .dev    = {
+                .platform_data  = &fsi_info,
+        },
+        .archdata = {
+                .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
+        },
+};
 static struct platform_device *ecovec_devices[] __initdata = {
        &heartbeat_device,
        &nor_flash_device,
@@ -503,8 +759,16 @@ static struct platform_device *ecovec_devices[] __initdata = {
        &ceu0_device,
        &ceu1_device,
        &keysc_device,
+#ifdef CONFIG_MFD_SH_MOBILE_SDHI
        &sdhi0_device,
        &sdhi1_device,
+#else
+        &msiof0_device,
+#endif
+        &camera_devices[0],
+        &camera_devices[1],
+        &camera_devices[2],
+        &fsi_device,
 };
 #define EEPROM_ADDR 0x50
@@ -560,6 +824,8 @@ extern char ecovec24_sdram_leave_end;
 static int __init arch_setup(void)
 {
+        struct clk *clk;
        /* register board specific self-refresh code */
        sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
                                        &ecovec24_sdram_enter_start,
@@ -773,7 +1039,8 @@ static int __init arch_setup(void)
        gpio_direction_input(GPIO_PTR5);
        gpio_direction_input(GPIO_PTR6);
-        /* enable SDHI0 (needs DS2.4 set to ON) */
+#ifdef CONFIG_MFD_SH_MOBILE_SDHI
+        /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
        gpio_request(GPIO_FN_SDHI0CD,  NULL);
        gpio_request(GPIO_FN_SDHI0WP,  NULL);
        gpio_request(GPIO_FN_SDHI0CMD, NULL);
@@ -785,7 +1052,7 @@ static int __init arch_setup(void)
        gpio_request(GPIO_PTB6, NULL);
        gpio_direction_output(GPIO_PTB6, 0);
-        /* enable SDHI1 (needs DS2.6,7 set to ON,OFF) */
+        /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
        gpio_request(GPIO_FN_SDHI1CD,  NULL);
        gpio_request(GPIO_FN_SDHI1WP,  NULL);
        gpio_request(GPIO_FN_SDHI1CMD, NULL);
@@ -799,8 +1066,59 @@ static int __init arch_setup(void)
        /* I/O buffer drive ability is high for SDHI1 */
        ctrl_outw((ctrl_inw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
+#else
+        /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
+        gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
+        gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
+        gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
+        gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
+        gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
+        gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
+        gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
+        gpio_request(GPIO_PTY6, NULL); /* write protect */
+        gpio_direction_input(GPIO_PTY6);
+        gpio_request(GPIO_PTY7, NULL); /* card detect */
+        gpio_direction_input(GPIO_PTY7);
+        spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
+#endif
+        /* enable Video */
+        gpio_request(GPIO_PTU2, NULL);
+        gpio_direction_output(GPIO_PTU2, 1);
+        /* enable Camera */
+        gpio_request(GPIO_PTA3, NULL);
+        gpio_request(GPIO_PTA4, NULL);
+        gpio_direction_output(GPIO_PTA3, 0);
+        gpio_direction_output(GPIO_PTA4, 0);
+        /* enable FSI */
+        gpio_request(GPIO_FN_FSIMCKB,    NULL);
+        gpio_request(GPIO_FN_FSIIBSD,    NULL);
+        gpio_request(GPIO_FN_FSIOBSD,    NULL);
+        gpio_request(GPIO_FN_FSIIBBCK,   NULL);
+        gpio_request(GPIO_FN_FSIIBLRCK,  NULL);
+        gpio_request(GPIO_FN_FSIOBBCK,   NULL);
+        gpio_request(GPIO_FN_FSIOBLRCK,  NULL);
+        gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
+        /* change parent of FSI B */
+        clk = clk_get(NULL, "fsib_clk");
+        clk_register(&fsimckb_clk);
+        clk_set_parent(clk, &fsimckb_clk);
+        clk_set_rate(clk, 11000);
+        clk_set_rate(&fsimckb_clk, 11000);
+        clk_put(clk);
+        gpio_request(GPIO_PTU0, NULL);
+        gpio_direction_output(GPIO_PTU0, 0);
+        mdelay(20);
        /* enable I2C device */
+        i2c_register_board_info(0, i2c0_devices,
+                                ARRAY_SIZE(i2c0_devices));
        i2c_register_board_info(1, i2c1_devices,
                                ARRAY_SIZE(i2c1_devices));
diff --git a/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
index 8ccb1cc8b589..e9b970846c41 100644
--- a/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
+++ b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
@@ -273,6 +273,12 @@ int kfr2r09_lcd_setup(void *board_data, void *sohandle,
        return 0;
 }
+void kfr2r09_lcd_start(void *board_data, void *sohandle,
+                       struct sh_mobile_lcdc_sys_bus_ops *so)
+{
+        write_memory_start(sohandle, so);
+}
 #define CTRL_CKSW       0x10
 #define CTRL_C10        0x20
 #define CTRL_CPSW       0x80
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
index 87438d6603d6..5d7b5d92475e 100644
--- a/arch/sh/boards/mach-kfr2r09/setup.c
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -19,6 +19,7 @@
 #include <linux/input/sh_keysc.h>
 #include <linux/i2c.h>
 #include <linux/usb/r8a66597.h>
+#include <media/rj54n1cb0c.h>
 #include <media/soc_camera.h>
 #include <media/sh_mobile_ceu.h>
 #include <video/sh_mobile_lcdc.h>
@@ -149,6 +150,7 @@ static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = {
                },
                .board_cfg = {
                        .setup_sys = kfr2r09_lcd_setup,
+                        .start_transfer = kfr2r09_lcd_start,
                        .display_on = kfr2r09_lcd_on,
                        .display_off = kfr2r09_lcd_off,
                },
@@ -255,6 +257,9 @@ static struct i2c_board_info kfr2r09_i2c_camera = {
 static struct clk *camera_clk;
+/* set VIO_CKO clock to 25MHz */
+#define CEU_MCLK_FREQ 25000000
 #define DRVCRB 0xA405018C
 static int camera_power(struct device *dev, int mode)
 {
@@ -267,8 +272,7 @@ static int camera_power(struct device *dev, int mode)
                if (IS_ERR(camera_clk))
                        return PTR_ERR(camera_clk);
-                /* set VIO_CKO clock to 25MHz */
+                rate = clk_round_rate(camera_clk, CEU_MCLK_FREQ);
-                rate = clk_round_rate(camera_clk, 25000000);
                ret = clk_set_rate(camera_clk, rate);
                if (ret < 0)
                        goto eclkrate;
@@ -318,11 +322,17 @@ eclkrate:
        return ret;
 }
+static struct rj54n1_pdata rj54n1_priv = {
+        .mclk_freq      = CEU_MCLK_FREQ,
+        .ioctl_high     = false,
+};
 static struct soc_camera_link rj54n1_link = {
        .power          = camera_power,
        .board_info     = &kfr2r09_i2c_camera,
        .i2c_adapter_id = 1,
        .module_name    = "rj54n1cb0c",
+        .priv           = &rj54n1_priv,
 };
 static struct platform_device kfr2r09_camera = {
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 9099b6da9957..507c77be476d 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -432,23 +432,27 @@ static struct i2c_board_info migor_i2c_camera[] = {
 static struct ov772x_camera_info ov7725_info = {
        .buswidth       = SOCAM_DATAWIDTH_8,
-        .link = {
+};
-                .power          = ov7725_power,
-                .board_info     = &migor_i2c_camera[0],
+static struct soc_camera_link ov7725_link = {
-                .i2c_adapter_id = 0,
+        .power          = ov7725_power,
-                .module_name    = "ov772x",
+        .board_info     = &migor_i2c_camera[0],
-        },
+        .i2c_adapter_id = 0,
+        .module_name    = "ov772x",
+        .priv           = &ov7725_info,
 };
 static struct tw9910_video_info tw9910_info = {
        .buswidth       = SOCAM_DATAWIDTH_8,
        .mpout          = TW9910_MPO_FIELD,
-        .link = {
+};
-                .power          = tw9910_power,
-                .board_info     = &migor_i2c_camera[1],
+static struct soc_camera_link tw9910_link = {
-                .i2c_adapter_id = 0,
+        .power          = tw9910_power,
-                .module_name    = "tw9910",
+        .board_info     = &migor_i2c_camera[1],
-        }
+        .i2c_adapter_id = 0,
+        .module_name    = "tw9910",
+        .priv           = &tw9910_info,
 };
 static struct platform_device migor_camera[] = {
@@ -456,13 +460,13 @@ static struct platform_device migor_camera[] = {
                .name   = "soc-camera-pdrv",
                .id     = 0,
                .dev    = {
-                        .platform_data = &ov7725_info.link,
+                        .platform_data = &ov7725_link,
                },
        }, {
                .name   = "soc-camera-pdrv",
                .id     = 1,
                .dev    = {
-                        .platform_data = &tw9910_info.link,
+                        .platform_data = &tw9910_link,
                },
        },
 };
diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c
index 4eb31acfafef..b221b6842b0d 100644
--- a/arch/sh/boards/mach-se/7722/irq.c
+++ b/arch/sh/boards/mach-se/7722/irq.c
@@ -57,15 +57,16 @@ static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
 */
 void __init init_se7722_IRQ(void)
 {
-        int i;
+        int i, irq;
        ctrl_outw(0, IRQ01_MASK);       /* disable all irqs */
        ctrl_outw(0x2000, 0xb03fffec);  /* mrshpc irq enable */
        for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) {
-                se7722_fpga_irq[i] = create_irq();
+                irq = create_irq();
-                if (se7722_fpga_irq[i] < 0)
+                if (irq < 0)
                        return;
+                se7722_fpga_irq[i] = irq;
                set_irq_chip_and_handler_name(se7722_fpga_irq[i],
                                              &se7722_irq_chip,
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index 4b0f0c0dc2b8..5d0f70b46c97 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -514,6 +514,13 @@ static struct platform_device *ms7724se_devices[] __initdata = {
        &sdhi1_cn8_device,
 };
+/* I2C device */
+static struct i2c_board_info i2c0_devices[] = {
+        {
+                I2C_BOARD_INFO("ak4642", 0x12),
+        },
+};
 #define EEPROM_OP   0xBA206000
 #define EEPROM_ADR  0xBA206004
 #define EEPROM_DATA 0xBA20600C
@@ -575,6 +582,16 @@ extern char ms7724se_sdram_enter_end;
 extern char ms7724se_sdram_leave_start;
 extern char ms7724se_sdram_leave_end;
+static int __init arch_setup(void)
+{
+        /* enable I2C device */
+        i2c_register_board_info(0, i2c0_devices,
+                                ARRAY_SIZE(i2c0_devices));
+        return 0;
+}
+arch_initcall(arch_setup);
 static int __init devices_setup(void)
 {
        u16 sw = ctrl_inw(SW4140); /* select camera, monitor */
diff --git a/arch/sh/configs/ecovec24-romimage_defconfig b/arch/sh/configs/ecovec24-romimage_defconfig
index 0774924623cc..46874704e4e7 100644
--- a/arch/sh/configs/ecovec24-romimage_defconfig
+++ b/arch/sh/configs/ecovec24-romimage_defconfig
@@ -203,7 +203,7 @@ CONFIG_MMU=y
 CONFIG_PAGE_OFFSET=0x80000000
 CONFIG_FORCE_MAX_ZONEORDER=11
 CONFIG_MEMORY_START=0x08000000
-CONFIG_MEMORY_SIZE=0x08000000
+CONFIG_MEMORY_SIZE=0x10000000
 CONFIG_29BIT=y
 # CONFIG_X2TLB is not set
 CONFIG_VSYSCALL=y
diff --git a/arch/sh/configs/ecovec24_defconfig b/arch/sh/configs/ecovec24_defconfig
index ac6469718a2c..cad918437ca7 100644
--- a/arch/sh/configs/ecovec24_defconfig
+++ b/arch/sh/configs/ecovec24_defconfig
@@ -204,7 +204,7 @@ CONFIG_MMU=y
 CONFIG_PAGE_OFFSET=0x80000000
 CONFIG_FORCE_MAX_ZONEORDER=11
 CONFIG_MEMORY_START=0x08000000
-CONFIG_MEMORY_SIZE=0x08000000
+CONFIG_MEMORY_SIZE=0x10000000
 CONFIG_29BIT=y
 # CONFIG_X2TLB is not set
 CONFIG_VSYSCALL=y
diff --git a/arch/sh/configs/rts7751r2d1_defconfig b/arch/sh/configs/rts7751r2d1_defconfig
index f521e82cc19e..6f1126b3e487 100644
--- a/arch/sh/configs/rts7751r2d1_defconfig
+++ b/arch/sh/configs/rts7751r2d1_defconfig
@@ -324,7 +324,7 @@ CONFIG_ENTRY_OFFSET=0x00001000
 # CONFIG_UBC_WAKEUP is not set
 CONFIG_CMDLINE_OVERWRITE=y
 # CONFIG_CMDLINE_EXTEND is not set
-CONFIG_CMDLINE="console=tty0 console=ttySC0,115200 root=/dev/sda1 earlyprintk=serial"
+CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 root=/dev/sda1"
 #
 # Bus options
diff --git a/arch/sh/configs/rts7751r2dplus_defconfig b/arch/sh/configs/rts7751r2dplus_defconfig
index a156cd1e0617..9215bbb13d6f 100644
--- a/arch/sh/configs/rts7751r2dplus_defconfig
+++ b/arch/sh/configs/rts7751r2dplus_defconfig
@@ -324,7 +324,7 @@ CONFIG_ENTRY_OFFSET=0x00001000
 # CONFIG_UBC_WAKEUP is not set
 CONFIG_CMDLINE_OVERWRITE=y
 # CONFIG_CMDLINE_EXTEND is not set
-CONFIG_CMDLINE="console=tty0 console=ttySC0,115200 root=/dev/sda1 earlyprintk=serial"
+CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 root=/dev/sda1"
 #
 # Bus options
diff --git a/arch/sh/include/asm/elf.h b/arch/sh/include/asm/elf.h
index ccb1d93bb043..ac04255022b6 100644
--- a/arch/sh/include/asm/elf.h
+++ b/arch/sh/include/asm/elf.h
@@ -114,7 +114,6 @@ typedef struct user_fpu_struct elf_fpregset_t;
 */
 #define CORE_DUMP_USE_REGSET
-#define USE_ELF_CORE_DUMP
 #define ELF_FDPIC_CORE_EFLAGS   EF_SH_FDPIC
 #define ELF_EXEC_PAGESIZE       PAGE_SIZE
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 512cd3e9d0ca..026dd659a640 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -233,11 +233,17 @@ unsigned long long poke_real_address_q(unsigned long long addr,
 * doesn't exist, so everything must go through page tables.
 */
 #ifdef CONFIG_MMU
-void __iomem *__ioremap(unsigned long offset, unsigned long size,
+void __iomem *__ioremap_caller(unsigned long offset, unsigned long size,
-                        unsigned long flags);
+                               unsigned long flags, void *caller);
 void __iounmap(void __iomem *addr);
 static inline void __iomem *
+__ioremap(unsigned long offset, unsigned long size, unsigned long flags)
+{
+        return __ioremap_caller(offset, size, flags, __builtin_return_address(0));
+}
+static inline void __iomem *
 __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
 {
 #if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) && !defined(CONFIG_PMB)
@@ -271,6 +277,7 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
        return __ioremap(offset, size, flags);
 }
 #else
+#define __ioremap(offset, size, flags)          ((void __iomem *)(offset))
 #define __ioremap_mode(offset, size, flags)     ((void __iomem *)(offset))
 #define __iounmap(addr)                         do { } while (0)
 #endif /* CONFIG_MMU */
diff --git a/arch/sh/include/asm/pgtable_32.h b/arch/sh/include/asm/pgtable_32.h
index b35435516203..5003ee86f67b 100644
--- a/arch/sh/include/asm/pgtable_32.h
+++ b/arch/sh/include/asm/pgtable_32.h
@@ -344,7 +344,8 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
 #define pte_special(pte)        ((pte).pte_low & _PAGE_SPECIAL)
 #ifdef CONFIG_X2TLB
-#define pte_write(pte)          ((pte).pte_high & _PAGE_EXT_USER_WRITE)
+#define pte_write(pte) \
+        ((pte).pte_high & (_PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE))
 #else
 #define pte_write(pte)          ((pte).pte_low & _PAGE_RW)
 #endif
@@ -358,7 +359,7 @@ static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; }
 * individually toggled (and user permissions are entirely decoupled from
 * kernel permissions), we attempt to couple them a bit more sanely here.
 */
-PTE_BIT_FUNC(high, wrprotect, &= ~_PAGE_EXT_USER_WRITE);
+PTE_BIT_FUNC(high, wrprotect, &= ~(_PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE));
 PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE);
 PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE);
 #else
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h
index f3fd1b9eb6b1..f18c4f9baf27 100644
--- a/arch/sh/include/asm/unistd_32.h
+++ b/arch/sh/include/asm/unistd_32.h
@@ -345,8 +345,9 @@
 #define __NR_pwritev            334
 #define __NR_rt_tgsigqueueinfo  335
 #define __NR_perf_event_open    336
+#define __NR_recvmmsg           337
-#define NR_syscalls 337
+#define NR_syscalls 338
 #ifdef __KERNEL__
diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h
index 343ce8f073ea..3e7645d11130 100644
--- a/arch/sh/include/asm/unistd_64.h
+++ b/arch/sh/include/asm/unistd_64.h
@@ -385,10 +385,11 @@
 #define __NR_pwritev            362
 #define __NR_rt_tgsigqueueinfo  363
 #define __NR_perf_event_open    364
+#define __NR_recvmmsg           365
 #ifdef __KERNEL__
-#define NR_syscalls 365
+#define NR_syscalls 366
 #define __ARCH_WANT_IPC_PARSE_VERSION
 #define __ARCH_WANT_OLD_READDIR
diff --git a/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h
index 174374e19547..484ef42c2fb5 100644
--- a/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h
+++ b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h
@@ -8,6 +8,8 @@ void kfr2r09_lcd_on(void *board_data);
 void kfr2r09_lcd_off(void *board_data);
 int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
                      struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
+void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle,
+                       struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
 #else
 static inline void kfr2r09_lcd_on(void *board_data) {}
 static inline void kfr2r09_lcd_off(void *board_data) {}
@@ -16,6 +18,10 @@ static inline int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
 {
        return -ENODEV;
 }
+static inline void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle,
+                                     struct sh_mobile_lcdc_sys_bus_ops *sys_ops)
+{
+}
 #endif
 #endif /* __ASM_SH_KFR2R09_H */
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index 0471a3eb25ed..0d587da1ef12 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -22,11 +22,10 @@ obj-y	:= debugtraps.o dma-nommu.o dumpstack.o 			\
 obj-y                           += cpu/
 obj-$(CONFIG_VSYSCALL)          += vsyscall/
 obj-$(CONFIG_SMP)               += smp.o
-obj-$(CONFIG_SH_STANDARD_BIOS)  += sh_bios.o
+obj-$(CONFIG_SH_STANDARD_BIOS)  += sh_bios.o early_printk.o
 obj-$(CONFIG_KGDB)              += kgdb.o
 obj-$(CONFIG_SH_CPU_FREQ)       += cpufreq.o
 obj-$(CONFIG_MODULES)           += sh_ksyms_$(BITS).o module.o
-obj-$(CONFIG_EARLY_PRINTK)      += early_printk.o
 obj-$(CONFIG_KEXEC)             += machine_kexec.o relocate_kernel.o
 obj-$(CONFIG_CRASH_DUMP)        += crash_dump.o
 obj-$(CONFIG_STACKTRACE)        += stacktrace.o
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index c1508a90fc6a..9282d965a1b6 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -17,16 +17,17 @@
 * for more details.
 */
 #include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/io.h>
-#include <linux/interrupt.h>
 #include <linux/topology.h>
 static inline struct ipr_desc *get_ipr_desc(unsigned int irq)
 {
        struct irq_chip *chip = get_irq_chip(irq);
-        return (void *)((char *)chip - offsetof(struct ipr_desc, chip));
+        return container_of(chip, struct ipr_desc, chip);
 }
 static void disable_ipr_irq(unsigned int irq)
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index 8555c05e8667..114c7cee7184 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -59,32 +59,48 @@ static struct intc_prio_reg prio_registers[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,
                         NULL, prio_registers, NULL);
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = 0xf8400000,
-                .mapbase        = 0xf8400000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 88, 88, 88, 88 },
-                .irqs           = { 88, 88, 88, 88 },
+};
-        }, {
-                .mapbase        = 0xf8410000,
+static struct platform_device scif0_device = {
-                .flags          = UPF_BOOT_AUTOCONF,
+        .name           = "sh-sci",
-                .type           = PORT_SCIF,
+        .id             = 0,
-                .irqs           = { 92, 92, 92, 92 },
+        .dev            = {
-        }, {
+                .platform_data  = &scif0_platform_data,
-                .mapbase        = 0xf8420000,
+        },
-                .flags          = UPF_BOOT_AUTOCONF,
+};
-                .type           = PORT_SCIF,
-                .irqs           = { 96, 96, 96, 96 },
+static struct plat_sci_port scif1_platform_data = {
-        }, {
+        .mapbase        = 0xf8410000,
-                .flags = 0,
+        .flags          = UPF_BOOT_AUTOCONF,
-        }
+        .type           = PORT_SCIF,
-};
+        .irqs           = { 92, 92, 92, 92 },
+};
-static struct platform_device sci_device = {
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xf8420000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 96, 96, 96, 96 },
+};
+static struct platform_device scif2_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 2,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif2_platform_data,
        },
 };
@@ -176,7 +192,9 @@ static struct platform_device cmt1_device = {
 };
 static struct platform_device *sh7619_devices[] __initdata = {
-        &sci_device,
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
        &eth_device,
        &cmt0_device,
        &cmt1_device,
@@ -195,6 +213,9 @@ void __init plat_irq_setup(void)
 }
 static struct platform_device *sh7619_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
        &cmt0_device,
        &cmt1_device,
 };
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
index b67376445315..8f669dc9b0da 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
@@ -207,27 +207,23 @@ static struct platform_device mtu2_2_device = {
        .num_resources  = ARRAY_SIZE(mtu2_2_resources),
 };
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = 0xff804000,
-                .mapbase        = 0xff804000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 220, 220, 220, 220 },
-                .irqs           = { 220, 220, 220, 220 },
-        }, {
-                .flags = 0,
-        }
 };
-static struct platform_device sci_device = {
+static struct platform_device scif0_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif0_platform_data,
        },
 };
 static struct platform_device *mxg_devices[] __initdata = {
-        &sci_device,
+        &scif0_device,
        &mtu2_0_device,
        &mtu2_1_device,
        &mtu2_2_device,
@@ -246,6 +242,7 @@ void __init plat_irq_setup(void)
 }
 static struct platform_device *mxg_early_devices[] __initdata = {
+        &scif0_device,
        &mtu2_0_device,
        &mtu2_1_device,
        &mtu2_2_device,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
index fbde5b75deb9..4ccfeb59eb1a 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
@@ -177,57 +177,123 @@ static struct intc_mask_reg mask_registers[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "sh7201", vectors, groups,
                         mask_registers, prio_registers, NULL);
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = 0xfffe8000,
-                .mapbase        = 0xfffe8000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 180, 180, 180, 180 }
-                .irqs           = { 180, 180, 180, 180 }
+};
-        }, {
-                .mapbase        = 0xfffe8800,
+static struct platform_device scif0_device = {
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 184, 184, 184, 184 }
-        }, {
-                .mapbase        = 0xfffe9000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 188, 188, 188, 188 }
-        }, {
-                .mapbase        = 0xfffe9800,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 192, 192, 192, 192 }
-        }, {
-                .mapbase        = 0xfffea000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 196, 196, 196, 196 }
-        }, {
-                .mapbase        = 0xfffea800,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 200, 200, 200, 200 }
-        }, {
-                .mapbase        = 0xfffeb000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 204, 204, 204, 204 }
-        }, {
-                .mapbase        = 0xfffeb800,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 208, 208, 208, 208 }
-        }, {
-                .flags = 0,
-        }
-};
-static struct platform_device sci_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xfffe8800,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 184, 184, 184, 184 }
+};
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xfffe9000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 188, 188, 188, 188 }
+};
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xfffe9800,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 192, 192, 192, 192 }
+};
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xfffea000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 196, 196, 196, 196 }
+};
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xfffea800,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 200, 200, 200, 200 }
+};
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
+        .dev            = {
+                .platform_data  = &scif5_platform_data,
+        },
+};
+static struct plat_sci_port scif6_platform_data = {
+        .mapbase        = 0xfffeb000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 204, 204, 204, 204 }
+};
+static struct platform_device scif6_device = {
+        .name           = "sh-sci",
+        .id             = 6,
+        .dev            = {
+                .platform_data  = &scif6_platform_data,
+        },
+};
+static struct plat_sci_port scif7_platform_data = {
+        .mapbase        = 0xfffeb800,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 208, 208, 208, 208 }
+};
+static struct platform_device scif7_device = {
+        .name           = "sh-sci",
+        .id             = 7,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif7_platform_data,
        },
 };
@@ -345,7 +411,14 @@ static struct platform_device mtu2_2_device = {
 };
 static struct platform_device *sh7201_devices[] __initdata = {
-        &sci_device,
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
+        &scif6_device,
+        &scif7_device,
        &rtc_device,
        &mtu2_0_device,
        &mtu2_1_device,
@@ -365,6 +438,14 @@ void __init plat_irq_setup(void)
 }
 static struct platform_device *sh7201_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
+        &scif6_device,
+        &scif7_device,
        &mtu2_0_device,
        &mtu2_1_device,
        &mtu2_2_device,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
index d3fd536c9a84..3136966cc9b3 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
@@ -173,37 +173,63 @@ static struct intc_mask_reg mask_registers[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "sh7203", vectors, groups,
                         mask_registers, prio_registers, NULL);
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = 0xfffe8000,
-                .mapbase        = 0xfffe8000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           =  { 192, 192, 192, 192 },
-                .irqs           =  { 192, 192, 192, 192 },
-        }, {
-                .mapbase        = 0xfffe8800,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           =  { 196, 196, 196, 196 },
-        }, {
-                .mapbase        = 0xfffe9000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           =  { 200, 200, 200, 200 },
-        }, {
-                .mapbase        = 0xfffe9800,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           =  { 204, 204, 204, 204 },
-        }, {
-                .flags = 0,
-        }
 };
-static struct platform_device sci_device = {
+static struct platform_device scif0_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xfffe8800,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           =  { 196, 196, 196, 196 },
+};
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xfffe9000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           =  { 200, 200, 200, 200 },
+};
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xfffe9800,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           =  { 204, 204, 204, 204 },
+};
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif3_platform_data,
        },
 };
@@ -354,7 +380,10 @@ static struct platform_device rtc_device = {
 };
 static struct platform_device *sh7203_devices[] __initdata = {
-        &sci_device,
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
        &cmt0_device,
        &cmt1_device,
        &mtu2_0_device,
@@ -375,6 +404,10 @@ void __init plat_irq_setup(void)
 }
 static struct platform_device *sh7203_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
        &cmt0_device,
        &cmt1_device,
        &mtu2_0_device,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index a9ccc5e8d9e9..064873585a8b 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -133,37 +133,63 @@ static struct intc_mask_reg mask_registers[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups,
                         mask_registers, prio_registers, NULL);
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = 0xfffe8000,
-                .mapbase        = 0xfffe8000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 240, 240, 240, 240 },
-                .irqs           = { 240, 240, 240, 240 },
-        }, {
-                .mapbase        = 0xfffe8800,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 244, 244, 244, 244 },
-        }, {
-                .mapbase        = 0xfffe9000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 248, 248, 248, 248 },
-        }, {
-                .mapbase        = 0xfffe9800,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 252, 252, 252, 252 },
-        }, {
-                .flags = 0,
-        }
 };
-static struct platform_device sci_device = {
+static struct platform_device scif0_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xfffe8800,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 244, 244, 244, 244 },
+};
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xfffe9000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 248, 248, 248, 248 },
+};
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xfffe9800,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 252, 252, 252, 252 },
+};
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif3_platform_data,
        },
 };
@@ -325,7 +351,10 @@ static struct platform_device mtu2_2_device = {
 };
 static struct platform_device *sh7206_devices[] __initdata = {
-        &sci_device,
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
        &cmt0_device,
        &cmt1_device,
        &mtu2_0_device,
@@ -346,6 +375,10 @@ void __init plat_irq_setup(void)
 }
 static struct platform_device *sh7206_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
        &cmt0_device,
        &cmt1_device,
        &mtu2_0_device,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index c23105983878..7b892d60e3a0 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -67,27 +67,33 @@ static struct intc_prio_reg prio_registers[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
                         NULL, prio_registers, NULL);
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = 0xa4410000,
-                .mapbase        = 0xa4410000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 56, 56, 56 },
-                .irqs           = { 56, 56, 56 },
+};
-        }, {
-                .mapbase        = 0xa4400000,
+static struct platform_device scif0_device = {
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 52, 52, 52 },
-        }, {
-                .flags = 0,
-        }
-};
-static struct platform_device sci_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xa4400000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 52, 52, 52 },
+};
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif1_platform_data,
        },
 };
@@ -210,10 +216,11 @@ static struct platform_device tmu2_device = {
 };
 static struct platform_device *sh7705_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
-        &sci_device,
        &rtc_device,
 };
@@ -225,6 +232,8 @@ static int __init sh7705_devices_setup(void)
 arch_initcall(sh7705_devices_setup);
 static struct platform_device *sh7705_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index 347ab35d0697..bc0c4f68c7c7 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -106,44 +106,55 @@ static struct platform_device rtc_device = {
        .resource       = rtc_resources,
 };
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = 0xfffffe80,
-                .mapbase        = 0xfffffe80,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCI,
-                .type           = PORT_SCI,
+        .irqs           = { 23, 23, 23, 0 },
-                .irqs           = { 23, 23, 23, 0 },
+};
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
        },
+};
 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
    defined(CONFIG_CPU_SUBTYPE_SH7707) || \
    defined(CONFIG_CPU_SUBTYPE_SH7709)
-        {
+static struct plat_sci_port scif1_platform_data = {
-                .mapbase        = 0xa4000150,
+        .mapbase        = 0xa4000150,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
+        .type           = PORT_SCIF,
-                .irqs           = { 56, 56, 56, 56 },
+        .irqs           = { 56, 56, 56, 56 },
+};
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
        },
+};
 #endif
 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
    defined(CONFIG_CPU_SUBTYPE_SH7709)
-        {
+static struct plat_sci_port scif2_platform_data = {
-                .mapbase        = 0xa4000140,
+        .mapbase        = 0xa4000140,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_IRDA,
+        .type           = PORT_IRDA,
-                .irqs           = { 52, 52, 52, 52 },
+        .irqs           = { 52, 52, 52, 52 },
-        },
-#endif
-        {
-                .flags = 0,
-        }
 };
-static struct platform_device sci_device = {
+static struct platform_device scif2_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 2,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif2_platform_data,
        },
 };
+#endif
 static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
@@ -238,10 +249,19 @@ static struct platform_device tmu2_device = {
 };
 static struct platform_device *sh770x_devices[] __initdata = {
+        &scif0_device,
+#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7709)
+        &scif1_device,
+#endif
+#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7709)
+        &scif2_device,
+#endif
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
-        &sci_device,
        &rtc_device,
 };
@@ -253,6 +273,16 @@ static int __init sh770x_devices_setup(void)
 arch_initcall(sh770x_devices_setup);
 static struct platform_device *sh770x_early_devices[] __initdata = {
+        &scif0_device,
+#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7709)
+        &scif1_device,
+#endif
+#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7709)
+        &scif2_device,
+#endif
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 717e90ae1097..0845a3ad006d 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -96,28 +96,33 @@ static struct platform_device rtc_device = {
        },
 };
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = 0xa4400000,
-                .mapbase        = 0xa4400000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 52, 52, 52, 52 },
-                .irqs           = { 52, 52, 52, 52 },
+};
-        }, {
-                .mapbase        = 0xa4410000,
+static struct platform_device scif0_device = {
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 56, 56, 56, 56 },
-        }, {
-                .flags = 0,
-        }
-};
-static struct platform_device sci_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xa4410000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 56, 56, 56, 56 },
+};
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif1_platform_data,
        },
 };
@@ -214,10 +219,11 @@ static struct platform_device tmu2_device = {
 };
 static struct platform_device *sh7710_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
-        &sci_device,
        &rtc_device,
 };
@@ -229,6 +235,8 @@ static int __init sh7710_devices_setup(void)
 arch_initcall(sh7710_devices_setup);
 static struct platform_device *sh7710_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 74d8baaf8e96..a718a6231091 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -48,28 +48,33 @@ static struct platform_device rtc_device = {
        },
 };
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = 0xa4430000,
-                .mapbase        = 0xa4430000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
-                .irqs           = { 80, 80, 80, 80 },
+};
-        }, {
-                .mapbase        = 0xa4438000,
+static struct platform_device scif0_device = {
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 81, 81, 81, 81 },
-        }, {
-                .flags = 0,
-        }
-};
-static struct platform_device sci_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xa4438000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 81, 81, 81, 81 },
+};
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif1_platform_data,
        },
 };
@@ -369,6 +374,8 @@ static struct platform_device tmu2_device = {
 };
 static struct platform_device *sh7720_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
        &cmt0_device,
        &cmt1_device,
        &cmt2_device,
@@ -378,7 +385,6 @@ static struct platform_device *sh7720_devices[] __initdata = {
        &tmu1_device,
        &tmu2_device,
        &rtc_device,
-        &sci_device,
        &usb_ohci_device,
        &usbf_device,
 };
@@ -391,6 +397,8 @@ static int __init sh7720_devices_setup(void)
 arch_initcall(sh7720_devices_setup);
 static struct platform_device *sh7720_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
        &cmt0_device,
        &cmt1_device,
        &cmt2_device,
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
index de4827df19aa..4b733715cdb5 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
@@ -15,22 +15,18 @@
 #include <linux/sh_timer.h>
 #include <linux/io.h>
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = 0xffe80000,
-                .mapbase        = 0xffe80000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 40, 41, 43, 42 },
-                .irqs           = { 40, 41, 43, 42 },
-        }, {
-                .flags = 0,
-        }
 };
-static struct platform_device sci_device = {
+static struct platform_device scif0_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif0_platform_data,
        },
 };
@@ -127,7 +123,7 @@ static struct platform_device tmu2_device = {
 };
 static struct platform_device *sh4202_devices[] __initdata = {
-        &sci_device,
+        &scif0_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
@@ -141,6 +137,7 @@ static int __init sh4202_devices_setup(void)
 arch_initcall(sh4202_devices_setup);
 static struct platform_device *sh4202_early_devices[] __initdata = {
+        &scif0_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index 1b8b122e8f3d..b2a9df1af64c 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -35,29 +35,33 @@ static struct platform_device rtc_device = {
        .resource       = rtc_resources,
 };
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = 0xffe00000,
-#ifndef CONFIG_SH_RTS7751R2D
+        .flags          = UPF_BOOT_AUTOCONF,
-                .mapbase        = 0xffe00000,
+        .type           = PORT_SCI,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .irqs           = { 23, 23, 23, 0 },
-                .type           = PORT_SCI,
-                .irqs           = { 23, 23, 23, 0 },
-        }, {
-#endif
-                .mapbase        = 0xffe80000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 40, 40, 40, 40 },
-        }, {
-                .flags = 0,
-        }
 };
-static struct platform_device sci_device = {
+static struct platform_device scif0_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffe80000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 40, 40, 40, 40 },
+};
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif1_platform_data,
        },
 };
@@ -221,8 +225,9 @@ static struct platform_device tmu4_device = {
 #endif
 static struct platform_device *sh7750_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
        &rtc_device,
-        &sci_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
@@ -242,6 +247,8 @@ static int __init sh7750_devices_setup(void)
 arch_initcall(sh7750_devices_setup);
 static struct platform_device *sh7750_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 7fbb7be9284c..5b74cc0b43da 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -126,37 +126,63 @@ static struct intc_vect vectors_irq[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups,
                         mask_registers, prio_registers, NULL);
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = 0xfe600000,
-                .mapbase        = 0xfe600000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 52, 53, 55, 54 },
-                .irqs           = { 52, 53, 55, 54 },
+};
-        }, {
-                .mapbase        = 0xfe610000,
+static struct platform_device scif0_device = {
-                .flags          = UPF_BOOT_AUTOCONF,
+        .name           = "sh-sci",
-                .type           = PORT_SCIF,
+        .id             = 0,
-                .irqs           = { 72, 73, 75, 74 },
+        .dev            = {
-        }, {
+                .platform_data  = &scif0_platform_data,
-                .mapbase        = 0xfe620000,
+        },
-                .flags          = UPF_BOOT_AUTOCONF,
+};
-                .type           = PORT_SCIF,
-                .irqs           = { 76, 77, 79, 78 },
+static struct plat_sci_port scif1_platform_data = {
-        }, {
+        .mapbase        = 0xfe610000,
-                .mapbase        = 0xfe480000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCI,
+        .irqs           = { 72, 73, 75, 74 },
-                .irqs           = { 80, 81, 82, 0 },
+};
-        }, {
-                .flags = 0,
+static struct platform_device scif1_device = {
-        }
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xfe620000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 76, 77, 79, 78 },
+};
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xfe480000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCI,
+        .irqs           = { 80, 81, 82, 0 },
 };
-static struct platform_device sci_device = {
+static struct platform_device scif3_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 3,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif3_platform_data,
        },
 };
@@ -254,7 +280,10 @@ static struct platform_device tmu2_device = {
 static struct platform_device *sh7760_devices[] __initdata = {
-        &sci_device,
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
@@ -268,6 +297,10 @@ static int __init sh7760_devices_setup(void)
 arch_initcall(sh7760_devices_setup);
 static struct platform_device *sh7760_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index ac4d5672ec1a..45eb1bfd42c9 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -15,6 +15,71 @@
 #include <linux/sh_timer.h>
 #include <asm/clock.h>
+/* Serial */
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffe00000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
+        .clk            = "scif0",
+};
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffe10000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 81, 81, 81, 81 },
+        .clk            = "scif1",
+};
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xffe20000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 82, 82, 82, 82 },
+        .clk            = "scif2",
+};
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xffe30000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 83, 83, 83, 83 },
+        .clk            = "scif3",
+};
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
 static struct resource iic0_resources[] = {
        [0] = {
                .name   = "IIC0",
@@ -265,52 +330,17 @@ static struct platform_device tmu2_device = {
        .num_resources  = ARRAY_SIZE(tmu2_resources),
 };
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xffe00000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 80, 80, 80, 80 },
-                .clk            = "scif0",
-        }, {
-                .mapbase        = 0xffe10000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 81, 81, 81, 81 },
-                .clk            = "scif1",
-        }, {
-                .mapbase        = 0xffe20000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 82, 82, 82, 82 },
-                .clk            = "scif2",
-        }, {
-                .mapbase        = 0xffe30000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 83, 83, 83, 83 },
-                .clk            = "scif3",
-        }, {
-                .flags = 0,
-        }
-};
-static struct platform_device sci_device = {
-        .name           = "sh-sci",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = sci_platform_data,
-        },
-};
 static struct platform_device *sh7343_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
        &cmt_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
        &iic0_device,
        &iic1_device,
-        &sci_device,
        &vpu_device,
        &veu_device,
        &jpu_device,
@@ -328,6 +358,10 @@ static int __init sh7343_devices_setup(void)
 arch_initcall(sh7343_devices_setup);
 static struct platform_device *sh7343_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
        &cmt_device,
        &tmu0_device,
        &tmu1_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index 4a9010bf4fd3..c494c193e3b6 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -18,6 +18,22 @@
 #include <linux/usb/r8a66597.h>
 #include <asm/clock.h>
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffe00000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
+        .clk            = "scif0",
+};
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
 static struct resource iic_resources[] = {
        [0] = {
                .name   = "IIC",
@@ -276,33 +292,13 @@ static struct platform_device tmu2_device = {
        .num_resources  = ARRAY_SIZE(tmu2_resources),
 };
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xffe00000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 80, 80, 80, 80 },
-                .clk            = "scif0",
-        }, {
-                .flags = 0,
-        }
-};
-static struct platform_device sci_device = {
-        .name           = "sh-sci",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = sci_platform_data,
-        },
-};
 static struct platform_device *sh7366_devices[] __initdata = {
+        &scif0_device,
        &cmt_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
        &iic_device,
-        &sci_device,
        &usb_host_device,
        &vpu_device,
        &veu0_device,
@@ -321,6 +317,7 @@ static int __init sh7366_devices_setup(void)
 arch_initcall(sh7366_devices_setup);
 static struct platform_device *sh7366_early_devices[] __initdata = {
+        &scif0_device,
        &cmt_device,
        &tmu0_device,
        &tmu1_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 5491b094cf05..b5335b5e309c 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -20,6 +20,55 @@
 #include <asm/dma-sh.h>
 #include <cpu/sh7722.h>
+/* Serial */
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffe00000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
+        .clk            = "scif0",
+};
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffe10000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 81, 81, 81, 81 },
+        .clk            = "scif1",
+};
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xffe20000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 82, 82, 82, 82 },
+        .clk            = "scif2",
+};
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
 static struct resource rtc_resources[] = {
        [0] = {
                .start  = 0xa465fec0,
@@ -339,41 +388,6 @@ static struct platform_device tmu2_device = {
        },
 };
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xffe00000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 80, 80, 80, 80 },
-                .clk            = "scif0",
-        },
-        {
-                .mapbase        = 0xffe10000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 81, 81, 81, 81 },
-                .clk            = "scif1",
-        },
-        {
-                .mapbase        = 0xffe20000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 82, 82, 82, 82 },
-                .clk            = "scif2",
-        },
-        {
-                .flags = 0,
-        }
-};
-static struct platform_device sci_device = {
-        .name           = "sh-sci",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = sci_platform_data,
-        },
-};
 static struct sh_dmae_pdata dma_platform_data = {
        .mode = 0,
 };
@@ -387,6 +401,9 @@ static struct platform_device dma_device = {
 };
 static struct platform_device *sh7722_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
        &cmt_device,
        &tmu0_device,
        &tmu1_device,
@@ -394,7 +411,6 @@ static struct platform_device *sh7722_devices[] __initdata = {
        &rtc_device,
        &usbf_device,
        &iic_device,
-        &sci_device,
        &vpu_device,
        &veu_device,
        &jpu_device,
@@ -413,6 +429,9 @@ static int __init sh7722_devices_setup(void)
 arch_initcall(sh7722_devices_setup);
 static struct platform_device *sh7722_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
        &cmt_device,
        &tmu0_device,
        &tmu1_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 4caa5a7ca86e..772b9265d0e4 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -20,6 +20,103 @@
 #include <asm/mmzone.h>
 #include <cpu/sh7723.h>
+/* Serial */
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffe00000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
+        .clk            = "scif0",
+};
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffe10000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 81, 81, 81, 81 },
+        .clk            = "scif1",
+};
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xffe20000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 82, 82, 82, 82 },
+        .clk            = "scif2",
+};
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xa4e30000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIFA,
+        .irqs           = { 56, 56, 56, 56 },
+        .clk            = "scif3",
+};
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xa4e40000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIFA,
+        .irqs           = { 88, 88, 88, 88 },
+        .clk            = "scif4",
+};
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xa4e50000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIFA,
+        .irqs           = { 109, 109, 109, 109 },
+        .clk            = "scif5",
+};
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
+        .dev            = {
+                .platform_data  = &scif5_platform_data,
+        },
+};
 static struct uio_info vpu_platform_data = {
        .name = "VPU5",
        .version = "0",
@@ -348,56 +445,6 @@ static struct platform_device tmu5_device = {
        },
 };
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xffe00000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 80, 80, 80, 80 },
-                .clk            = "scif0",
-        },{
-                .mapbase        = 0xffe10000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 81, 81, 81, 81 },
-                .clk            = "scif1",
-        },{
-                .mapbase        = 0xffe20000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 82, 82, 82, 82 },
-                .clk            = "scif2",
-        },{
-                .mapbase        = 0xa4e30000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIFA,
-                .irqs           = { 56, 56, 56, 56 },
-                .clk            = "scif3",
-        },{
-                .mapbase        = 0xa4e40000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIFA,
-                .irqs           = { 88, 88, 88, 88 },
-                .clk            = "scif4",
-        },{
-                .mapbase        = 0xa4e50000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIFA,
-                .irqs           = { 109, 109, 109, 109 },
-                .clk            = "scif5",
-        }, {
-                .flags = 0,
-        }
-};
-static struct platform_device sci_device = {
-        .name           = "sh-sci",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = sci_platform_data,
-        },
-};
 static struct resource rtc_resources[] = {
        [0] = {
                .start  = 0xa465fec0,
@@ -488,6 +535,12 @@ static struct platform_device iic_device = {
 };
 static struct platform_device *sh7723_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
        &cmt_device,
        &tmu0_device,
        &tmu1_device,
@@ -495,7 +548,6 @@ static struct platform_device *sh7723_devices[] __initdata = {
        &tmu3_device,
        &tmu4_device,
        &tmu5_device,
-        &sci_device,
        &rtc_device,
        &iic_device,
        &sh7723_usb_host_device,
@@ -516,6 +568,12 @@ static int __init sh7723_devices_setup(void)
 arch_initcall(sh7723_devices_setup);
 static struct platform_device *sh7723_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
        &cmt_device,
        &tmu0_device,
        &tmu1_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index 845e89c936e7..a52f35117e82 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -27,53 +27,99 @@
 #include <cpu/sh7724.h>
 /* Serial */
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = 0xffe00000,
-                .mapbase        = 0xffe00000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
-                .irqs           = { 80, 80, 80, 80 },
+        .clk            = "scif0",
-                .clk            = "scif0",
+};
-        }, {
-                .mapbase        = 0xffe10000,
+static struct platform_device scif0_device = {
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 81, 81, 81, 81 },
-                .clk            = "scif1",
-        }, {
-                .mapbase        = 0xffe20000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 82, 82, 82, 82 },
-                .clk            = "scif2",
-        }, {
-                .mapbase        = 0xa4e30000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIFA,
-                .irqs           = { 56, 56, 56, 56 },
-                .clk            = "scif3",
-        }, {
-                .mapbase        = 0xa4e40000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIFA,
-                .irqs           = { 88, 88, 88, 88 },
-                .clk            = "scif4",
-        }, {
-                .mapbase        = 0xa4e50000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIFA,
-                .irqs           = { 109, 109, 109, 109 },
-                .clk            = "scif5",
-        }, {
-                .flags = 0,
-        }
-};
-static struct platform_device sci_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffe10000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 81, 81, 81, 81 },
+        .clk            = "scif1",
+};
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xffe20000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 82, 82, 82, 82 },
+        .clk            = "scif2",
+};
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xa4e30000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIFA,
+        .irqs           = { 56, 56, 56, 56 },
+        .clk            = "scif3",
+};
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xa4e40000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIFA,
+        .irqs           = { 88, 88, 88, 88 },
+        .clk            = "scif4",
+};
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xa4e50000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIFA,
+        .irqs           = { 109, 109, 109, 109 },
+        .clk            = "scif5",
+};
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif5_platform_data,
        },
 };
@@ -590,6 +636,12 @@ static struct platform_device spu1_device = {
 };
 static struct platform_device *sh7724_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
        &cmt_device,
        &tmu0_device,
        &tmu1_device,
@@ -597,7 +649,6 @@ static struct platform_device *sh7724_devices[] __initdata = {
        &tmu3_device,
        &tmu4_device,
        &tmu5_device,
-        &sci_device,
        &rtc_device,
        &iic0_device,
        &iic1_device,
@@ -624,6 +675,12 @@ static int __init sh7724_devices_setup(void)
 arch_initcall(sh7724_devices_setup);
 static struct platform_device *sh7724_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
        &cmt_device,
        &tmu0_device,
        &tmu1_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index c470e15f2e03..37e32efbbaa7 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -17,6 +17,51 @@
 #include <linux/mm.h>
 #include <linux/sh_timer.h>
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xfe4b0000,           /* SCIF2 */
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 40, 40, 40, 40 },
+};
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xfe4c0000,           /* SCIF3 */
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 76, 76, 76, 76 },
+};
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xfe4d0000,           /* SCIF4 */
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 104, 104, 104, 104 },
+};
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
 static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x04,
@@ -79,39 +124,12 @@ static struct platform_device tmu1_device = {
        .num_resources  = ARRAY_SIZE(tmu1_resources),
 };
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xfe4b0000,           /* SCIF2 */
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 40, 40, 40, 40 },
-        }, {
-                .mapbase        = 0xfe4c0000,           /* SCIF3 */
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 76, 76, 76, 76 },
-        }, {
-                .mapbase        = 0xfe4d0000,           /* SCIF4 */
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 104, 104, 104, 104 },
-        }, {
-                .flags = 0,
-        }
-};
-static struct platform_device sci_device = {
-        .name           = "sh-sci",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = sci_platform_data,
-        },
-};
 static struct platform_device *sh7757_devices[] __initdata = {
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
        &tmu0_device,
        &tmu1_device,
-        &sci_device,
 };
 static int __init sh7757_devices_setup(void)
@@ -121,6 +139,20 @@ static int __init sh7757_devices_setup(void)
 }
 arch_initcall(sh7757_devices_setup);
+static struct platform_device *sh7757_early_devices[] __initdata = {
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &tmu0_device,
+        &tmu1_device,
+};
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7757_early_devices,
+                                   ARRAY_SIZE(sh7757_early_devices));
+}
 enum {
        UNUSED = 0,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 4659fff6b842..6aba26fec416 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -16,6 +16,51 @@
 #include <linux/io.h>
 #include <linux/serial_sci.h>
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffe00000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 40, 40, 40, 40 },
+};
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffe08000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 76, 76, 76, 76 },
+};
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xffe10000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 104, 104, 104, 104 },
+};
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
 static struct resource rtc_resources[] = {
        [0] = {
                .start  = 0xffe80000,
@@ -36,35 +81,6 @@ static struct platform_device rtc_device = {
        .resource       = rtc_resources,
 };
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xffe00000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 40, 40, 40, 40 },
-        }, {
-                .mapbase        = 0xffe08000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 76, 76, 76, 76 },
-        }, {
-                .mapbase        = 0xffe10000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 104, 104, 104, 104 },
-        }, {
-                .flags = 0,
-        }
-};
-static struct platform_device sci_device = {
-        .name           = "sh-sci",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = sci_platform_data,
-        },
-};
 static struct resource usb_ohci_resources[] = {
        [0] = {
                .start  = 0xffec8000,
@@ -297,6 +313,9 @@ static struct platform_device tmu5_device = {
 };
 static struct platform_device *sh7763_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
@@ -304,7 +323,6 @@ static struct platform_device *sh7763_devices[] __initdata = {
        &tmu4_device,
        &tmu5_device,
        &rtc_device,
-        &sci_device,
        &usb_ohci_device,
        &usbf_device,
 };
@@ -317,6 +335,9 @@ static int __init sh7763_devices_setup(void)
 arch_initcall(sh7763_devices_setup);
 static struct platform_device *sh7763_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index eead08d89d32..c1643bc9590d 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -14,67 +14,153 @@
 #include <linux/sh_timer.h>
 #include <linux/io.h>
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = 0xff923000,
-                .mapbase        = 0xff923000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 61, 61, 61, 61 },
-                .irqs           = { 61, 61, 61, 61 },
+};
-        }, {
-                .mapbase        = 0xff924000,
+static struct platform_device scif0_device = {
-                .flags          = UPF_BOOT_AUTOCONF,
+        .name           = "sh-sci",
-                .type           = PORT_SCIF,
+        .id             = 0,
-                .irqs           = { 62, 62, 62, 62 },
+        .dev            = {
-        }, {
+                .platform_data  = &scif0_platform_data,
-                .mapbase        = 0xff925000,
+        },
-                .flags          = UPF_BOOT_AUTOCONF,
+};
-                .type           = PORT_SCIF,
-                .irqs           = { 63, 63, 63, 63 },
+static struct plat_sci_port scif1_platform_data = {
-        }, {
+        .mapbase        = 0xff924000,
-                .mapbase        = 0xff926000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 62, 62, 62, 62 },
-                .irqs           = { 64, 64, 64, 64 },
+};
-        }, {
-                .mapbase        = 0xff927000,
+static struct platform_device scif1_device = {
-                .flags          = UPF_BOOT_AUTOCONF,
+        .name           = "sh-sci",
-                .type           = PORT_SCIF,
+        .id             = 1,
-                .irqs           = { 65, 65, 65, 65 },
+        .dev            = {
-        }, {
+                .platform_data  = &scif1_platform_data,
-                .mapbase        = 0xff928000,
+        },
-                .flags          = UPF_BOOT_AUTOCONF,
+};
-                .type           = PORT_SCIF,
-                .irqs           = { 66, 66, 66, 66 },
+static struct plat_sci_port scif2_platform_data = {
-        }, {
+        .mapbase        = 0xff925000,
-                .mapbase        = 0xff929000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 63, 63, 63, 63 },
-                .irqs           = { 67, 67, 67, 67 },
+};
-        }, {
-                .mapbase        = 0xff92a000,
+static struct platform_device scif2_device = {
-                .flags          = UPF_BOOT_AUTOCONF,
+        .name           = "sh-sci",
-                .type           = PORT_SCIF,
+        .id             = 2,
-                .irqs           = { 68, 68, 68, 68 },
+        .dev            = {
-        }, {
+                .platform_data  = &scif2_platform_data,
-                .mapbase        = 0xff92b000,
+        },
-                .flags          = UPF_BOOT_AUTOCONF,
+};
-                .type           = PORT_SCIF,
-                .irqs           = { 69, 69, 69, 69 },
+static struct plat_sci_port scif3_platform_data = {
-        }, {
+        .mapbase        = 0xff926000,
-                .mapbase        = 0xff92c000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 64, 64, 64, 64 },
-                .irqs           = { 70, 70, 70, 70 },
+};
-        }, {
-                .flags = 0,
+static struct platform_device scif3_device = {
-        }
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xff927000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 65, 65, 65, 65 },
+};
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xff928000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 66, 66, 66, 66 },
+};
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
+        .dev            = {
+                .platform_data  = &scif5_platform_data,
+        },
+};
+static struct plat_sci_port scif6_platform_data = {
+        .mapbase        = 0xff929000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 67, 67, 67, 67 },
+};
+static struct platform_device scif6_device = {
+        .name           = "sh-sci",
+        .id             = 6,
+        .dev            = {
+                .platform_data  = &scif6_platform_data,
+        },
+};
+static struct plat_sci_port scif7_platform_data = {
+        .mapbase        = 0xff92a000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 68, 68, 68, 68 },
+};
+static struct platform_device scif7_device = {
+        .name           = "sh-sci",
+        .id             = 7,
+        .dev            = {
+                .platform_data  = &scif7_platform_data,
+        },
+};
+static struct plat_sci_port scif8_platform_data = {
+        .mapbase        = 0xff92b000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 69, 69, 69, 69 },
+};
+static struct platform_device scif8_device = {
+        .name           = "sh-sci",
+        .id             = 8,
+        .dev            = {
+                .platform_data  = &scif8_platform_data,
+        },
+};
+static struct plat_sci_port scif9_platform_data = {
+        .mapbase        = 0xff92c000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 70, 70, 70, 70 },
 };
-static struct platform_device sci_device = {
+static struct platform_device scif9_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 9,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif9_platform_data,
        },
 };
@@ -351,6 +437,16 @@ static struct platform_device tmu8_device = {
 };
 static struct platform_device *sh7770_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
+        &scif6_device,
+        &scif7_device,
+        &scif8_device,
+        &scif9_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
@@ -360,7 +456,6 @@ static struct platform_device *sh7770_devices[] __initdata = {
        &tmu6_device,
        &tmu7_device,
        &tmu8_device,
-        &sci_device,
 };
 static int __init sh7770_devices_setup(void)
@@ -371,6 +466,16 @@ static int __init sh7770_devices_setup(void)
 arch_initcall(sh7770_devices_setup);
 static struct platform_device *sh7770_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
+        &scif6_device,
+        &scif7_device,
+        &scif8_device,
+        &scif9_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 12ff56f19c5c..c310558490d5 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -15,6 +15,36 @@
 #include <linux/sh_timer.h>
 #include <asm/dma-sh.h>
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffe00000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 40, 40, 40, 40 },
+};
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffe10000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 76, 76, 76, 76 },
+};
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
 static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x04,
@@ -217,30 +247,6 @@ static struct platform_device rtc_device = {
        .resource       = rtc_resources,
 };
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xffe00000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 40, 40, 40, 40 },
-        }, {
-                .mapbase        = 0xffe10000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 76, 76, 76, 76 },
-        }, {
-                .flags = 0,
-        }
-};
-static struct platform_device sci_device = {
-        .name           = "sh-sci",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = sci_platform_data,
-        },
-};
 static struct sh_dmae_pdata dma_platform_data = {
        .mode = (SHDMA_MIX_IRQ | SHDMA_DMAOR1),
 };
@@ -254,6 +260,8 @@ static struct platform_device dma_device = {
 };
 static struct platform_device *sh7780_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
@@ -261,7 +269,6 @@ static struct platform_device *sh7780_devices[] __initdata = {
        &tmu4_device,
        &tmu5_device,
        &rtc_device,
-        &sci_device,
        &dma_device,
 };
@@ -271,8 +278,9 @@ static int __init sh7780_devices_setup(void)
                                    ARRAY_SIZE(sh7780_devices));
 }
 arch_initcall(sh7780_devices_setup);
 static struct platform_device *sh7780_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 7f6c718b6c36..ef26ebda6e8b 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -16,6 +16,102 @@
 #include <linux/sh_timer.h>
 #include <asm/mmzone.h>
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffea0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 40, 40, 40, 40 },
+        .clk            = "scif_fck",
+};
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffeb0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 44, 44, 44, 44 },
+        .clk            = "scif_fck",
+};
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xffec0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 60, 60, 60, 60 },
+        .clk            = "scif_fck",
+};
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xffed0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 61, 61, 61, 61 },
+        .clk            = "scif_fck",
+};
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xffee0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 62, 62, 62, 62 },
+        .clk            = "scif_fck",
+};
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xffef0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 63, 63, 63, 63 },
+        .clk            = "scif_fck",
+};
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
+        .dev            = {
+                .platform_data  = &scif5_platform_data,
+        },
+};
 static struct sh_timer_config tmu0_platform_data = {
        .name = "TMU0",
        .channel_offset = 0x04,
@@ -198,64 +294,19 @@ static struct platform_device tmu5_device = {
        .num_resources  = ARRAY_SIZE(tmu5_resources),
 };
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xffea0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 40, 40, 40, 40 },
-                .clk            = "scif_fck",
-        }, {
-                .mapbase        = 0xffeb0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 44, 44, 44, 44 },
-                .clk            = "scif_fck",
-        }, {
-                .mapbase        = 0xffec0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 60, 60, 60, 60 },
-                .clk            = "scif_fck",
-        }, {
-                .mapbase        = 0xffed0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 61, 61, 61, 61 },
-                .clk            = "scif_fck",
-        }, {
-                .mapbase        = 0xffee0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 62, 62, 62, 62 },
-                .clk            = "scif_fck",
-        }, {
-                .mapbase        = 0xffef0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 63, 63, 63, 63 },
-                .clk            = "scif_fck",
-        }, {
-                .flags = 0,
-        }
-};
-static struct platform_device sci_device = {
-        .name           = "sh-sci",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = sci_platform_data,
-        },
-};
 static struct platform_device *sh7785_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
        &tmu3_device,
        &tmu4_device,
        &tmu5_device,
-        &sci_device,
 };
 static int __init sh7785_devices_setup(void)
@@ -266,6 +317,12 @@ static int __init sh7785_devices_setup(void)
 arch_initcall(sh7785_devices_setup);
 static struct platform_device *sh7785_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 0104a8ec5369..71673487ace0 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -23,51 +23,96 @@
 #include <linux/sh_timer.h>
 #include <asm/mmzone.h>
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = 0xffea0000,
-                .mapbase        = 0xffea0000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 40, 41, 43, 42 },
-                .irqs           = { 40, 41, 43, 42 },
+};
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
        },
-        /*
-         * The rest of these all have multiplexed IRQs
-         */
-        {
-                .mapbase        = 0xffeb0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 44, 44, 44, 44 },
-        }, {
-                .mapbase        = 0xffec0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 50, 50, 50, 50 },
-        }, {
-                .mapbase        = 0xffed0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 51, 51, 51, 51 },
-        }, {
-                .mapbase        = 0xffee0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 52, 52, 52, 52 },
-        }, {
-                .mapbase        = 0xffef0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 53, 53, 53, 53 },
-        }, {
-                .flags = 0,
-        }
 };
-static struct platform_device sci_device = {
+/*
+ * The rest of these all have multiplexed IRQs
+ */
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffeb0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 44, 44, 44, 44 },
+};
+static struct platform_device scif1_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xffec0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 50, 50, 50, 50 },
+};
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xffed0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 51, 51, 51, 51 },
+};
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xffee0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 52, 52, 52, 52 },
+};
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xffef0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 53, 53, 53, 53 },
+};
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif5_platform_data,
        },
 };
@@ -459,6 +504,12 @@ static struct platform_device usb_ohci_device = {
 };
 static struct platform_device *sh7786_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
@@ -474,7 +525,6 @@ static struct platform_device *sh7786_early_devices[] __initdata = {
 };
 static struct platform_device *sh7786_devices[] __initdata = {
-        &sci_device,
        &usb_ohci_device,
 };
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index c7ba9166e18a..780ba17a5599 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -24,32 +24,48 @@
 * silicon in the first place, we just refuse to deal with the port at
 * all rather than adding infrastructure to hack around it.
 */
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = 0xffc30000,
-                .mapbase        = 0xffc30000,
+        .flags          = UPF_BOOT_AUTOCONF,
-                .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 40, 41, 43, 42 },
-                .irqs           = { 40, 41, 43, 42 },
+};
-        }, {
-                .mapbase        = 0xffc40000,
+static struct platform_device scif0_device = {
-                .flags          = UPF_BOOT_AUTOCONF,
+        .name           = "sh-sci",
-                .type           = PORT_SCIF,
+        .id             = 0,
-                .irqs           = { 44, 45, 47, 46 },
+        .dev            = {
-        }, {
+                .platform_data  = &scif0_platform_data,
-                .mapbase        = 0xffc60000,
+        },
-                .flags          = UPF_BOOT_AUTOCONF,
+};
-                .type           = PORT_SCIF,
-                .irqs           = { 52, 53, 55, 54 },
+static struct plat_sci_port scif1_platform_data = {
-        }, {
+        .mapbase        = 0xffc40000,
-                .flags = 0,
+        .flags          = UPF_BOOT_AUTOCONF,
-        }
+        .type           = PORT_SCIF,
+        .irqs           = { 44, 45, 47, 46 },
+};
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xffc60000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 52, 53, 55, 54 },
 };
-static struct platform_device sci_device = {
+static struct platform_device scif2_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 2,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif2_platform_data,
        },
 };
@@ -236,6 +252,9 @@ static struct platform_device tmu5_device = {
 };
 static struct platform_device *shx3_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
@@ -244,21 +263,10 @@ static struct platform_device *shx3_early_devices[] __initdata = {
        &tmu5_device,
 };
-static struct platform_device *shx3_devices[] __initdata = {
-        &sci_device,
-};
 static int __init shx3_devices_setup(void)
 {
-        int ret;
+        return platform_add_devices(shx3_early_devices,
-        ret = platform_add_devices(shx3_early_devices,
                                   ARRAY_SIZE(shx3_early_devices));
-        if (unlikely(ret != 0))
-                return ret;
-        return platform_add_devices(shx3_devices,
-                                    ARRAY_SIZE(shx3_devices));
 }
 arch_initcall(shx3_devices_setup);
diff --git a/arch/sh/kernel/cpu/sh5/fpu.c b/arch/sh/kernel/cpu/sh5/fpu.c
index dd4f51ffb50e..4648ccee6c4d 100644
--- a/arch/sh/kernel/cpu/sh5/fpu.c
+++ b/arch/sh/kernel/cpu/sh5/fpu.c
@@ -34,7 +34,7 @@ static union sh_fpu_union init_fpuregs = {
        }
 };
-void save_fpu(struct task_struct *tsk, struct pt_regs *regs)
+void save_fpu(struct task_struct *tsk)
 {
        asm volatile("fst.p     %0, (0*8), fp0\n\t"
                     "fst.p     %0, (1*8), fp2\n\t"
@@ -153,7 +153,7 @@ do_fpu_state_restore(unsigned long ex, struct pt_regs *regs)
        enable_fpu();
        if (last_task_used_math != NULL)
                /* Other processes fpu state, save away */
-                save_fpu(last_task_used_math, regs);
+                save_fpu(last_task_used_math);
        last_task_used_math = current;
        if (used_math()) {
diff --git a/arch/sh/kernel/cpu/sh5/setup-sh5.c b/arch/sh/kernel/cpu/sh5/setup-sh5.c
index 6a0f82f70032..e7a3c1e4b604 100644
--- a/arch/sh/kernel/cpu/sh5/setup-sh5.c
+++ b/arch/sh/kernel/cpu/sh5/setup-sh5.c
@@ -16,22 +16,18 @@
 #include <linux/sh_timer.h>
 #include <asm/addrspace.h>
-static struct plat_sci_port sci_platform_data[] = {
+static struct plat_sci_port scif0_platform_data = {
-        {
+        .mapbase        = PHYS_PERIPHERAL_BLOCK + 0x01030000,
-                .mapbase        = PHYS_PERIPHERAL_BLOCK + 0x01030000,
+        .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
-                .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+        .type           = PORT_SCIF,
-                .type           = PORT_SCIF,
+        .irqs           = { 39, 40, 42, 0 },
-                .irqs           = { 39, 40, 42, 0 },
-        }, {
-                .flags = 0,
-        }
 };
-static struct platform_device sci_device = {
+static struct platform_device scif0_device = {
        .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
        .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif0_platform_data,
        },
 };
@@ -164,13 +160,13 @@ static struct platform_device tmu2_device = {
 };
 static struct platform_device *sh5_early_devices[] __initdata = {
+        &scif0_device,
        &tmu0_device,
        &tmu1_device,
        &tmu2_device,
 };
 static struct platform_device *sh5_devices[] __initdata = {
-        &sci_device,
        &rtc_device,
 };
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
index 81a46145ffa5..f8bb50c6e050 100644
--- a/arch/sh/kernel/early_printk.c
+++ b/arch/sh/kernel/early_printk.c
@@ -15,7 +15,6 @@
 #include <linux/io.h>
 #include <linux/delay.h>
-#ifdef CONFIG_SH_STANDARD_BIOS
 #include <asm/sh_bios.h>
 /*
@@ -57,149 +56,8 @@ static struct console bios_console = {
        .flags          = CON_PRINTBUFFER,
        .index          = -1,
 };
-#endif
-#ifdef CONFIG_EARLY_SCIF_CONSOLE
+static struct console *early_console;
-#include <linux/serial_core.h>
-#include "../../../drivers/serial/sh-sci.h"
-#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7721)
-#define EPK_SCSMR_VALUE 0x000
-#define EPK_SCBRR_VALUE 0x00C
-#define EPK_FIFO_SIZE 64
-#define EPK_FIFO_BITS (0x7f00 >> 8)
-#else
-#define EPK_FIFO_SIZE 16
-#define EPK_FIFO_BITS (0x1f00 >> 8)
-#endif
-static struct uart_port scif_port = {
-        .type           = PORT_SCIF,
-        .mapbase        = CONFIG_EARLY_SCIF_CONSOLE_PORT,
-        .membase        = (char __iomem *)CONFIG_EARLY_SCIF_CONSOLE_PORT,
-};
-static void scif_sercon_putc(int c)
-{
-        while (((sci_in(&scif_port, SCFDR) & EPK_FIFO_BITS) >= EPK_FIFO_SIZE))
-                ;
-        sci_in(&scif_port, SCxSR);
-        sci_out(&scif_port, SCxSR, 0xf3 & ~(0x20 | 0x40));
-        sci_out(&scif_port, SCxTDR, c);
-        while ((sci_in(&scif_port, SCxSR) & 0x40) == 0)
-                ;
-        if (c == '\n')
-                scif_sercon_putc('\r');
-}
-static void scif_sercon_write(struct console *con, const char *s,
-                              unsigned count)
-{
-        while (count-- > 0)
-                scif_sercon_putc(*s++);
-}
-static int __init scif_sercon_setup(struct console *con, char *options)
-{
-        con->cflag = CREAD | HUPCL | CLOCAL | B115200 | CS8;
-        return 0;
-}
-static struct console scif_console = {
-        .name           = "sercon",
-        .write          = scif_sercon_write,
-        .setup          = scif_sercon_setup,
-        .flags          = CON_PRINTBUFFER,
-        .index          = -1,
-};
-#if !defined(CONFIG_SH_STANDARD_BIOS)
-#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7721)
-static void scif_sercon_init(char *s)
-{
-        sci_out(&scif_port, SCSCR, 0x0000);     /* clear TE and RE */
-        sci_out(&scif_port, SCFCR, 0x4006);     /* reset */
-        sci_out(&scif_port, SCSCR, 0x0000);     /* select internal clock */
-        sci_out(&scif_port, SCSMR, EPK_SCSMR_VALUE);
-        sci_out(&scif_port, SCBRR, EPK_SCBRR_VALUE);
-        mdelay(1);      /* wait 1-bit time */
-        sci_out(&scif_port, SCFCR, 0x0030);     /* TTRG=b'11 */
-        sci_out(&scif_port, SCSCR, 0x0030);     /* TE, RE */
-}
-#elif defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SH3)
-#define DEFAULT_BAUD 115200
-/*
- * Simple SCIF init, primarily aimed at SH7750 and other similar SH-4
- * devices that aren't using sh-ipl+g.
- */
-static void scif_sercon_init(char *s)
-{
-        struct uart_port *port = &scif_port;
-        unsigned baud = DEFAULT_BAUD;
-        unsigned int status;
-        char *e;
-        if (*s == ',')
-                ++s;
-        if (*s) {
-                /* ignore ioport/device name */
-                s += strcspn(s, ",");
-                if (*s == ',')
-                        s++;
-        }
-        if (*s) {
-                baud = simple_strtoul(s, &e, 0);
-                if (baud == 0 || s == e)
-                        baud = DEFAULT_BAUD;
-        }
-        do {
-                status = sci_in(port, SCxSR);
-        } while (!(status & SCxSR_TEND(port)));
-        sci_out(port, SCSCR, 0);         /* TE=0, RE=0 */
-        sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
-        sci_out(port, SCSMR, 0);
-        /* Set baud rate */
-        sci_out(port, SCBRR, (CONFIG_SH_PCLK_FREQ + 16 * baud) /
-                (32 * baud) - 1);
-        udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
-        sci_out(port, SCSPTR, 0);
-        sci_out(port, SCxSR, 0x60);
-        sci_out(port, SCLSR, 0);
-        sci_out(port, SCFCR, 0);
-        sci_out(port, SCSCR, 0x30);      /* TE=1, RE=1 */
-}
-#endif /* defined(CONFIG_CPU_SUBTYPE_SH7720) */
-#endif /* !defined(CONFIG_SH_STANDARD_BIOS) */
-#endif /* CONFIG_EARLY_SCIF_CONSOLE */
-/*
- * Setup a default console, if more than one is compiled in, rely on the
- * earlyprintk= parsing to give priority.
- */
-static struct console *early_console =
-#ifdef CONFIG_SH_STANDARD_BIOS
-        &bios_console
-#elif defined(CONFIG_EARLY_SCIF_CONSOLE)
-        &scif_console
-#else
-        NULL
-#endif
-        ;
 static int __init setup_early_printk(char *buf)
 {
@@ -211,21 +69,8 @@ static int __init setup_early_printk(char *buf)
        if (strstr(buf, "keep"))
                keep_early = 1;
-#ifdef CONFIG_SH_STANDARD_BIOS
        if (!strncmp(buf, "bios", 4))
                early_console = &bios_console;
-#endif
-#if defined(CONFIG_EARLY_SCIF_CONSOLE)
-        if (!strncmp(buf, "serial", 6)) {
-                early_console = &scif_console;
-#if !defined(CONFIG_SH_STANDARD_BIOS)
-#if defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SH3)
-                scif_sercon_init(buf + 6);
-#endif
-#endif
-        }
-#endif
        if (likely(early_console)) {
                if (keep_early)
diff --git a/arch/sh/kernel/ftrace.c b/arch/sh/kernel/ftrace.c
index b6f41c109beb..a48cdedc73b5 100644
--- a/arch/sh/kernel/ftrace.c
+++ b/arch/sh/kernel/ftrace.c
@@ -401,82 +401,10 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
 #endif /* CONFIG_FUNCTION_GRAPH_TRACER */
 #ifdef CONFIG_FTRACE_SYSCALLS
-extern unsigned long __start_syscalls_metadata[];
-extern unsigned long __stop_syscalls_metadata[];
 extern unsigned long *sys_call_table;
-static struct syscall_metadata **syscalls_metadata;
+unsigned long __init arch_syscall_addr(int nr)
-static struct syscall_metadata *find_syscall_meta(unsigned long *syscall)
-{
-        struct syscall_metadata *start;
-        struct syscall_metadata *stop;
-        char str[KSYM_SYMBOL_LEN];
-        start = (struct syscall_metadata *)__start_syscalls_metadata;
-        stop = (struct syscall_metadata *)__stop_syscalls_metadata;
-        kallsyms_lookup((unsigned long) syscall, NULL, NULL, NULL, str);
-        for ( ; start < stop; start++) {
-                if (start->name && !strcmp(start->name, str))
-                        return start;
-        }
-        return NULL;
-}
-struct syscall_metadata *syscall_nr_to_meta(int nr)
-{
-        if (!syscalls_metadata || nr >= FTRACE_SYSCALL_MAX || nr < 0)
-                return NULL;
-        return syscalls_metadata[nr];
-}
-int syscall_name_to_nr(char *name)
-{
-        int i;
-        if (!syscalls_metadata)
-                return -1;
-        for (i = 0; i < NR_syscalls; i++)
-                if (syscalls_metadata[i])
-                        if (!strcmp(syscalls_metadata[i]->name, name))
-                                return i;
-        return -1;
-}
-void set_syscall_enter_id(int num, int id)
-{
-        syscalls_metadata[num]->enter_id = id;
-}
-void set_syscall_exit_id(int num, int id)
-{
-        syscalls_metadata[num]->exit_id = id;
-}
-static int __init arch_init_ftrace_syscalls(void)
 {
-        int i;
+        return (unsigned long)sys_call_table[nr];
-        struct syscall_metadata *meta;
-        unsigned long **psys_syscall_table = &sys_call_table;
-        syscalls_metadata = kzalloc(sizeof(*syscalls_metadata) *
-                                        FTRACE_SYSCALL_MAX, GFP_KERNEL);
-        if (!syscalls_metadata) {
-                WARN_ON(1);
-                return -ENOMEM;
-        }
-        for (i = 0; i < FTRACE_SYSCALL_MAX; i++) {
-                meta = find_syscall_meta(psys_syscall_table[i]);
-                syscalls_metadata[i] = meta;
-        }
-        return 0;
 }
-arch_initcall(arch_init_ftrace_syscalls);
 #endif /* CONFIG_FTRACE_SYSCALLS */
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c
index 359b8a2f4d2e..31f80c61b031 100644
--- a/arch/sh/kernel/process_64.c
+++ b/arch/sh/kernel/process_64.c
@@ -404,7 +404,7 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
        if (fpvalid) {
                if (current == last_task_used_math) {
                        enable_fpu();
-                        save_fpu(tsk, regs);
+                        save_fpu(tsk);
                        disable_fpu();
                        last_task_used_math = 0;
                        regs->sr |= SR_FD;
@@ -431,7 +431,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
 #ifdef CONFIG_SH_FPU
        if(last_task_used_math == current) {
                enable_fpu();
-                save_fpu(current, regs);
+                save_fpu(current);
                disable_fpu();
                last_task_used_math = NULL;
                regs->sr |= SR_FD;
diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c
index 952da83903da..873ebdc4f98e 100644
--- a/arch/sh/kernel/ptrace_64.c
+++ b/arch/sh/kernel/ptrace_64.c
@@ -82,7 +82,7 @@ get_fpu_long(struct task_struct *task, unsigned long addr)
        if (last_task_used_math == task) {
                enable_fpu();
-                save_fpu(task, regs);
+                save_fpu(task);
                disable_fpu();
                last_task_used_math = 0;
                regs->sr |= SR_FD;
@@ -118,7 +118,7 @@ put_fpu_long(struct task_struct *task, unsigned long addr, unsigned long data)
                set_stopped_child_used_math(task);
        } else if (last_task_used_math == task) {
                enable_fpu();
-                save_fpu(task, regs);
+                save_fpu(task);
                disable_fpu();
                last_task_used_math = 0;
                regs->sr |= SR_FD;
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 5a947a2567e4..8b0e69792cf4 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -423,6 +423,9 @@ void __init setup_arch(char **cmdline_p)
        plat_early_device_setup();
+        /* Let earlyprintk output early console messages */
+        early_platform_driver_probe("earlyprintk", 1, 1);
        sh_mv_setup();
        /*
diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c
index feb3dddd3192..ce76dbdef294 100644
--- a/arch/sh/kernel/signal_64.c
+++ b/arch/sh/kernel/signal_64.c
@@ -314,7 +314,7 @@ setup_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc)
        if (current == last_task_used_math) {
                enable_fpu();
-                save_fpu(current, regs);
+                save_fpu(current);
                disable_fpu();
                last_task_used_math = NULL;
                regs->sr |= SR_FD;
diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S
index 19fd11dd9871..4bd5a1146956 100644
--- a/arch/sh/kernel/syscalls_32.S
+++ b/arch/sh/kernel/syscalls_32.S
@@ -353,3 +353,4 @@ ENTRY(sys_call_table)
        .long sys_pwritev
        .long sys_rt_tgsigqueueinfo     /* 335 */
        .long sys_perf_event_open
+        .long sys_recvmmsg
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index 3da5a125d884..86639beac3a2 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -452,12 +452,18 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
        rm = regs->regs[index];
        /* shout about fixups */
-        if (!expected && printk_ratelimit())
+        if (!expected) {
-                printk(KERN_NOTICE "Fixing up unaligned %s access "
+                if (user_mode(regs) && (se_usermode & 1) && printk_ratelimit())
-                       "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
+                        pr_notice("Fixing up unaligned userspace access "
-                       user_mode(regs) ? "userspace" : "kernel",
+                                  "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
-                       current->comm, task_pid_nr(current),
+                                  current->comm, task_pid_nr(current),
-                       (void *)regs->pc, instruction);
+                                  (void *)regs->pc, instruction);
+                else if (se_kernmode_warn && printk_ratelimit())
+                        pr_notice("Fixing up unaligned kernel access "
+                                  "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
+                                  current->comm, task_pid_nr(current),
+                                  (void *)regs->pc, instruction);
+        }
        ret = -EFAULT;
        switch (instruction&0xF000) {
diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c
index 75c0cbe2eda0..d86f5315a0c1 100644
--- a/arch/sh/kernel/traps_64.c
+++ b/arch/sh/kernel/traps_64.c
@@ -600,7 +600,7 @@ static int misaligned_fpu_load(struct pt_regs *regs,
                   indexed by register number. */
                if (last_task_used_math == current) {
                        enable_fpu();
-                        save_fpu(current, regs);
+                        save_fpu(current);
                        disable_fpu();
                        last_task_used_math = NULL;
                        regs->sr |= SR_FD;
@@ -673,7 +673,7 @@ static int misaligned_fpu_store(struct pt_regs *regs,
                   indexed by register number. */
                if (last_task_used_math == current) {
                        enable_fpu();
-                        save_fpu(current, regs);
+                        save_fpu(current);
                        disable_fpu();
                        last_task_used_math = NULL;
                        regs->sr |= SR_FD;
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index f36a08bf3d5c..560ddb6bc8a7 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -256,8 +256,7 @@ static void sh4_flush_cache_page(void *args)
                address = (unsigned long)vaddr;
        }
-        if (pages_do_alias(address, phys))
+        flush_cache_one(CACHE_OC_ADDRESS_ARRAY |
-                flush_cache_one(CACHE_OC_ADDRESS_ARRAY |
                        (address & shm_align_mask), phys);
        if (vma->vm_flags & VM_EXEC)
diff --git a/arch/sh/mm/ioremap_32.c b/arch/sh/mm/ioremap_32.c
index a86eaa9d75a5..2141befb4f91 100644
--- a/arch/sh/mm/ioremap_32.c
+++ b/arch/sh/mm/ioremap_32.c
@@ -33,10 +33,10 @@
 * have to convert them into an offset in a page-aligned mapping, but the
 * caller shouldn't need to know that small detail.
 */
-void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
+void __iomem *__ioremap_caller(unsigned long phys_addr, unsigned long size,
-                        unsigned long flags)
+                               unsigned long flags, void *caller)
 {
-        struct vm_struct * area;
+        struct vm_struct *area;
        unsigned long offset, last_addr, addr, orig_addr;
        pgprot_t pgprot;
@@ -67,7 +67,7 @@ void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
        /*
         * Ok, go for it..
         */
-        area = get_vm_area(size, VM_IOREMAP);
+        area = get_vm_area_caller(size, VM_IOREMAP, caller);
        if (!area)
                return NULL;
        area->phys_addr = phys_addr;
@@ -103,7 +103,7 @@ void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
        return (void __iomem *)(offset + (char *)orig_addr);
 }
-EXPORT_SYMBOL(__ioremap);
+EXPORT_SYMBOL(__ioremap_caller);
 void __iounmap(void __iomem *addr)
 {
diff --git a/arch/sh/mm/ioremap_64.c b/arch/sh/mm/ioremap_64.c
index b16843d02b76..ef434657d428 100644
--- a/arch/sh/mm/ioremap_64.c
+++ b/arch/sh/mm/ioremap_64.c
@@ -258,15 +258,15 @@ static void shmedia_unmapioaddr(unsigned long vaddr)
        pte_clear(&init_mm, vaddr, ptep);
 }
-void __iomem *__ioremap(unsigned long offset, unsigned long size,
+void __iomem *__ioremap_caller(unsigned long offset, unsigned long size,
-                        unsigned long flags)
+                               unsigned long flags, void *caller)
 {
        char name[14];
        sprintf(name, "phys_%08x", (u32)offset);
        return shmedia_alloc_io(offset, size, name, flags);
 }
-EXPORT_SYMBOL(__ioremap);
+EXPORT_SYMBOL(__ioremap_caller);
 void __iounmap(void __iomem *virtual)
 {
diff --git a/arch/sh/mm/numa.c b/arch/sh/mm/numa.c
index 6c524446c0f6..422e92721878 100644
--- a/arch/sh/mm/numa.c
+++ b/arch/sh/mm/numa.c
@@ -28,7 +28,7 @@ void __init setup_memory(void)
 {
        unsigned long free_pfn = PFN_UP(__pa(_end));
        u64 base = min_low_pfn << PAGE_SHIFT;
-        u64 size = (max_low_pfn << PAGE_SHIFT) - min_low_pfn;
+        u64 size = (max_low_pfn << PAGE_SHIFT) - base;
        lmb_add(base, size);
@@ -38,6 +38,15 @@ void __init setup_memory(void)
                    (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET));
        /*
+         * Reserve physical pages below CONFIG_ZERO_PAGE_OFFSET.
+         */
+        if (CONFIG_ZERO_PAGE_OFFSET != 0)
+                lmb_reserve(__MEMORY_START, CONFIG_ZERO_PAGE_OFFSET);
+        lmb_analyze();
+        lmb_dump_all();
+        /*
         * Node 0 sets up its pgdat at the first available pfn,
         * and bumps it up before setting up the bootmem allocator.
         */
@@ -71,7 +80,7 @@ void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end)
        /* Node-local pgdat */
        NODE_DATA(nid) = __va(lmb_alloc_base(sizeof(struct pglist_data),
-                                             SMP_CACHE_BYTES, end_pfn));
+                                             SMP_CACHE_BYTES, end));
        memset(NODE_DATA(nid), 0, sizeof(struct pglist_data));
        NODE_DATA(nid)->bdata = &bootmem_node_data[nid];
@@ -81,7 +90,7 @@ void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end)
        /* Node-local bootmap */
        bootmap_pages = bootmem_bootmap_pages(end_pfn - start_pfn);
        bootmem_paddr = lmb_alloc_base(bootmap_pages << PAGE_SHIFT,
-                                       PAGE_SIZE, end_pfn);
+                                       PAGE_SIZE, end);
        init_bootmem_node(NODE_DATA(nid), bootmem_paddr >> PAGE_SHIFT,
                          start_pfn, end_pfn);
diff --git a/arch/sparc/include/asm/elf_32.h b/arch/sparc/include/asm/elf_32.h
index 381a1b5256d6..4269ca6ad18a 100644
--- a/arch/sparc/include/asm/elf_32.h
+++ b/arch/sparc/include/asm/elf_32.h
@@ -104,8 +104,6 @@ typedef struct {
 #define ELF_CLASS       ELFCLASS32
 #define ELF_DATA        ELFDATA2MSB
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE       4096
diff --git a/arch/sparc/include/asm/elf_64.h b/arch/sparc/include/asm/elf_64.h
index d42e393078c4..ff66bb88537b 100644
--- a/arch/sparc/include/asm/elf_64.h
+++ b/arch/sparc/include/asm/elf_64.h
@@ -152,7 +152,6 @@ typedef struct {
                                         (x)->e_machine == EM_SPARC32PLUS)
 #define compat_start_thread             start_thread32
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE       PAGE_SIZE
 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c
index 7690cc219ecc..5fad94950e76 100644
--- a/arch/sparc/kernel/iommu.c
+++ b/arch/sparc/kernel/iommu.c
@@ -11,6 +11,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/errno.h>
 #include <linux/iommu-helper.h>
+#include <linux/bitmap.h>
 #ifdef CONFIG_PCI
 #include <linux/pci.h>
@@ -169,7 +170,7 @@ void iommu_range_free(struct iommu *iommu, dma_addr_t dma_addr, unsigned long np
        entry = (dma_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT;
-        iommu_area_free(arena->map, entry, npages);
+        bitmap_clear(arena->map, entry, npages);
 }
 int iommu_table_init(struct iommu *iommu, int tsbsize,
diff --git a/arch/sparc/kernel/ldc.c b/arch/sparc/kernel/ldc.c
index e0ba898e30cf..df39a0f0d27a 100644
--- a/arch/sparc/kernel/ldc.c
+++ b/arch/sparc/kernel/ldc.c
@@ -14,6 +14,7 @@
 #include <linux/interrupt.h>
 #include <linux/list.h>
 #include <linux/init.h>
+#include <linux/bitmap.h>
 #include <asm/hypervisor.h>
 #include <asm/iommu.h>
@@ -1875,7 +1876,7 @@ EXPORT_SYMBOL(ldc_read);
 static long arena_alloc(struct ldc_iommu *iommu, unsigned long npages)
 {
        struct iommu_arena *arena = &iommu->arena;
-        unsigned long n, i, start, end, limit;
+        unsigned long n, start, end, limit;
        int pass;
        limit = arena->limit;
@@ -1883,7 +1884,7 @@ static long arena_alloc(struct ldc_iommu *iommu, unsigned long npages)
        pass = 0;
 again:
-        n = find_next_zero_bit(arena->map, limit, start);
+        n = bitmap_find_next_zero_area(arena->map, limit, start, npages, 0);
        end = n + npages;
        if (unlikely(end >= limit)) {
                if (likely(pass < 1)) {
@@ -1896,16 +1897,7 @@ again:
                        return -1;
                }
        }
+        bitmap_set(arena->map, n, npages);
-        for (i = n; i < end; i++) {
-                if (test_bit(i, arena->map)) {
-                        start = i + 1;
-                        goto again;
-                }
-        }
-        for (i = n; i < end; i++)
-                __set_bit(i, arena->map);
        arena->hint = end;
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index b85374f7cf94..539e83f8e087 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -1064,7 +1064,6 @@ int pci64_dma_supported(struct pci_dev *pdev, u64 device_mask)
        return (device_mask & dma_addr_mask) == dma_addr_mask;
 }
-EXPORT_SYMBOL(pci_dma_supported);
 void pci_resource_to_user(const struct pci_dev *pdev, int bar,
                          const struct resource *rp, resource_size_t *start,
diff --git a/arch/sparc/kernel/sparc_ksyms_64.c b/arch/sparc/kernel/sparc_ksyms_64.c
index 0f26066a08d9..372ad59c4cba 100644
--- a/arch/sparc/kernel/sparc_ksyms_64.c
+++ b/arch/sparc/kernel/sparc_ksyms_64.c
@@ -38,17 +38,5 @@ EXPORT_SYMBOL(sun4v_niagara_setperf);
 EXPORT_SYMBOL(sun4v_niagara2_getperf);
 EXPORT_SYMBOL(sun4v_niagara2_setperf);
-#ifdef CONFIG_PCI
-/* inline functions in asm/pci_64.h */
-EXPORT_SYMBOL(pci_alloc_consistent);
-EXPORT_SYMBOL(pci_free_consistent);
-EXPORT_SYMBOL(pci_map_single);
-EXPORT_SYMBOL(pci_unmap_single);
-EXPORT_SYMBOL(pci_map_sg);
-EXPORT_SYMBOL(pci_unmap_sg);
-EXPORT_SYMBOL(pci_dma_sync_single_for_cpu);
-EXPORT_SYMBOL(pci_dma_sync_sg_for_cpu);
-#endif
 /* Exporting a symbol from /init/main.c */
 EXPORT_SYMBOL(saved_command_line);
diff --git a/arch/sparc/mm/sun4c.c b/arch/sparc/mm/sun4c.c
index 2ffacd67c424..a89baf0d875a 100644
--- a/arch/sparc/mm/sun4c.c
+++ b/arch/sparc/mm/sun4c.c
@@ -17,6 +17,7 @@
 #include <linux/fs.h>
 #include <linux/seq_file.h>
 #include <linux/scatterlist.h>
+#include <linux/bitmap.h>
 #include <asm/sections.h>
 #include <asm/page.h>
@@ -1021,20 +1022,12 @@ static char *sun4c_lockarea(char *vaddr, unsigned long size)
        npages = (((unsigned long)vaddr & ~PAGE_MASK) +
                  size + (PAGE_SIZE-1)) >> PAGE_SHIFT;
-        scan = 0;
        local_irq_save(flags);
-        for (;;) {
+        base = bitmap_find_next_zero_area(sun4c_iobuffer_map, iobuffer_map_size,
-                scan = find_next_zero_bit(sun4c_iobuffer_map,
+                                                0, npages, 0);
-                                          iobuffer_map_size, scan);
+        if (base >= iobuffer_map_size)
-                if ((base = scan) + npages > iobuffer_map_size) goto abend;
+                goto abend;
-                for (;;) {
-                        if (scan >= base + npages) goto found;
-                        if (test_bit(scan, sun4c_iobuffer_map)) break;
-                        scan++;
-                }
-        }
-found:
        high = ((base + npages) << PAGE_SHIFT) + sun4c_iobuffer_start;
        high = SUN4C_REAL_PGDIR_ALIGN(high);
        while (high > sun4c_iobuffer_high) {
diff --git a/arch/um/sys-i386/asm/elf.h b/arch/um/sys-i386/asm/elf.h
index d0da9d7c5371..770885472ed4 100644
--- a/arch/um/sys-i386/asm/elf.h
+++ b/arch/um/sys-i386/asm/elf.h
@@ -48,7 +48,6 @@ typedef struct user_i387_struct elf_fpregset_t;
        PT_REGS_EAX(regs) = 0; \
 } while (0)
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE 4096
 #define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
diff --git a/arch/um/sys-ppc/asm/elf.h b/arch/um/sys-ppc/asm/elf.h
index af9463cd8ce5..8aacaf56508d 100644
--- a/arch/um/sys-ppc/asm/elf.h
+++ b/arch/um/sys-ppc/asm/elf.h
@@ -17,8 +17,6 @@ extern long elf_aux_hwcap;
 #define ELF_CLASS ELFCLASS32
 #endif
-#define USE_ELF_CORE_DUMP
 #define R_386_NONE      0
 #define R_386_32        1
 #define R_386_PC32      2
diff --git a/arch/um/sys-x86_64/asm/elf.h b/arch/um/sys-x86_64/asm/elf.h
index 04b9e87c8dad..49655c83efd2 100644
--- a/arch/um/sys-x86_64/asm/elf.h
+++ b/arch/um/sys-x86_64/asm/elf.h
@@ -104,7 +104,6 @@ extern int elf_core_copy_fpregs(struct task_struct *t, elf_fpregset_t *fpu);
        clear_thread_flag(TIF_IA32);
 #endif
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE 4096
 #define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
diff --git a/arch/x86/boot/compressed/relocs.c b/arch/x86/boot/compressed/relocs.c
index bbeb0c3fbd90..89bbf4e4d05d 100644
--- a/arch/x86/boot/compressed/relocs.c
+++ b/arch/x86/boot/compressed/relocs.c
@@ -9,6 +9,9 @@
 #include <byteswap.h>
 #define USE_BSD
 #include <endian.h>
+#include <regex.h>
+static void die(char *fmt, ...);
 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
 static Elf32_Ehdr ehdr;
@@ -30,25 +33,47 @@ static struct section *secs;
 * the address for which it has been compiled. Don't warn user about
 * absolute relocations present w.r.t these symbols.
 */
-static const char* safe_abs_relocs[] = {
+static const char abs_sym_regex[] =
-                "xen_irq_disable_direct_reloc",
+        "^(xen_irq_disable_direct_reloc$|"
-                "xen_save_fl_direct_reloc",
+        "xen_save_fl_direct_reloc$|"
-};
+        "VDSO|"
+        "__crc_)";
+static regex_t abs_sym_regex_c;
+static int is_abs_reloc(const char *sym_name)
+{
+        return !regexec(&abs_sym_regex_c, sym_name, 0, NULL, 0);
+}
-static int is_safe_abs_reloc(const char* sym_name)
+/*
+ * These symbols are known to be relative, even if the linker marks them
+ * as absolute (typically defined outside any section in the linker script.)
+ */
+static const char rel_sym_regex[] =
+        "^_end$";
+static regex_t rel_sym_regex_c;
+static int is_rel_reloc(const char *sym_name)
 {
-        int i;
+        return !regexec(&rel_sym_regex_c, sym_name, 0, NULL, 0);
+}
-        for (i = 0; i < ARRAY_SIZE(safe_abs_relocs); i++) {
+static void regex_init(void)
-                if (!strcmp(sym_name, safe_abs_relocs[i]))
+{
-                        /* Match found */
+        char errbuf[128];
-                        return 1;
+        int err;
-        }
+        
-        if (strncmp(sym_name, "VDSO", 4) == 0)
+        err = regcomp(&abs_sym_regex_c, abs_sym_regex,
-                return 1;
+                      REG_EXTENDED|REG_NOSUB);
-        if (strncmp(sym_name, "__crc_", 6) == 0)
+        if (err) {
-                return 1;
+                regerror(err, &abs_sym_regex_c, errbuf, sizeof errbuf);
-        return 0;
+                die("%s", errbuf);
+        }
+        err = regcomp(&rel_sym_regex_c, rel_sym_regex,
+                      REG_EXTENDED|REG_NOSUB);
+        if (err) {
+                regerror(err, &rel_sym_regex_c, errbuf, sizeof errbuf);
+                die("%s", errbuf);
+        }
 }
 static void die(char *fmt, ...)
@@ -131,7 +156,7 @@ static const char *rel_type(unsigned type)
 #undef REL_TYPE
        };
        const char *name = "unknown type rel type name";
-        if (type < ARRAY_SIZE(type_name)) {
+        if (type < ARRAY_SIZE(type_name) && type_name[type]) {
                name = type_name[type];
        }
        return name;
@@ -448,7 +473,7 @@ static void print_absolute_relocs(void)
                         * Before warning check if this absolute symbol
                         * relocation is harmless.
                         */
-                        if (is_safe_abs_reloc(name))
+                        if (is_abs_reloc(name) || is_rel_reloc(name))
                                continue;
                        if (!printed) {
@@ -501,21 +526,26 @@ static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym))
                        sym = &sh_symtab[ELF32_R_SYM(rel->r_info)];
                        r_type = ELF32_R_TYPE(rel->r_info);
                        /* Don't visit relocations to absolute symbols */
-                        if (sym->st_shndx == SHN_ABS) {
+                        if (sym->st_shndx == SHN_ABS &&
+                            !is_rel_reloc(sym_name(sym_strtab, sym))) {
                                continue;
                        }
-                        if (r_type == R_386_NONE || r_type == R_386_PC32) {
+                        switch (r_type) {
+                        case R_386_NONE:
+                        case R_386_PC32:
                                /*
                                 * NONE can be ignored and and PC relative
                                 * relocations don't need to be adjusted.
                                 */
-                        }
+                                break;
-                        else if (r_type == R_386_32) {
+                        case R_386_32:
                                /* Visit relocations that need to be adjusted */
                                visit(rel, sym);
-                        }
+                                break;
-                        else {
+                        default:
-                                die("Unsupported relocation type: %d\n", r_type);
+                                die("Unsupported relocation type: %s (%d)\n",
+                                    rel_type(r_type), r_type);
+                                break;
                        }
                }
        }
@@ -571,16 +601,15 @@ static void emit_relocs(int as_text)
        }
        else {
                unsigned char buf[4];
-                buf[0] = buf[1] = buf[2] = buf[3] = 0;
                /* Print a stop */
-                printf("%c%c%c%c", buf[0], buf[1], buf[2], buf[3]);
+                fwrite("\0\0\0\0", 4, 1, stdout);
                /* Now print each relocation */
                for (i = 0; i < reloc_count; i++) {
                        buf[0] = (relocs[i] >>  0) & 0xff;
                        buf[1] = (relocs[i] >>  8) & 0xff;
                        buf[2] = (relocs[i] >> 16) & 0xff;
                        buf[3] = (relocs[i] >> 24) & 0xff;
-                        printf("%c%c%c%c", buf[0], buf[1], buf[2], buf[3]);
+                        fwrite(buf, 4, 1, stdout);
                }
        }
 }
@@ -598,6 +627,8 @@ int main(int argc, char **argv)
        FILE *fp;
        int i;
+        regex_init();
        show_absolute_syms = 0;
        show_absolute_relocs = 0;
        as_text = 0;
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h
index 0f6c02f3b7d4..ac91eed21061 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -67,7 +67,7 @@ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
        if (!dev->dma_mask)
                return 0;
-        return addr + size <= *dev->dma_mask;
+        return addr + size - 1 <= *dev->dma_mask;
 }
 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
index 8a024babe5e6..b4501ee223ad 100644
--- a/arch/x86/include/asm/elf.h
+++ b/arch/x86/include/asm/elf.h
@@ -239,7 +239,6 @@ extern int force_personality32;
 #endif /* !CONFIG_X86_32 */
 #define CORE_DUMP_USE_REGSET
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE       4096
 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index 3d11fd0f44c5..9d369f680321 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -292,6 +292,8 @@ extern void user_enable_block_step(struct task_struct *);
 #define arch_has_block_step()   (boot_cpu_data.x86 >= 6)
 #endif
+#define ARCH_HAS_USER_SINGLE_STEP_INFO
 struct user_desc;
 extern int do_get_thread_area(struct task_struct *p, int idx,
                              struct user_desc __user *info);
diff --git a/arch/x86/include/asm/swiotlb.h b/arch/x86/include/asm/swiotlb.h
index 87ffcb12a1b8..8085277e1b8b 100644
--- a/arch/x86/include/asm/swiotlb.h
+++ b/arch/x86/include/asm/swiotlb.h
@@ -5,13 +5,17 @@
 #ifdef CONFIG_SWIOTLB
 extern int swiotlb;
-extern int pci_swiotlb_init(void);
+extern int __init pci_swiotlb_detect(void);
+extern void __init pci_swiotlb_init(void);
 #else
 #define swiotlb 0
-static inline int pci_swiotlb_init(void)
+static inline int pci_swiotlb_detect(void)
 {
        return 0;
 }
+static inline void pci_swiotlb_init(void)
+{
+}
 #endif
 static inline void dma_mark_clean(void *addr, size_t size) {}
diff --git a/arch/x86/include/asm/syscalls.h b/arch/x86/include/asm/syscalls.h
index 1bb6e395881c..8868b9420b0e 100644
--- a/arch/x86/include/asm/syscalls.h
+++ b/arch/x86/include/asm/syscalls.h
@@ -18,16 +18,24 @@
 /* Common in X86_32 and X86_64 */
 /* kernel/ioport.c */
 asmlinkage long sys_ioperm(unsigned long, unsigned long, int);
+long sys_iopl(unsigned int, struct pt_regs *);
 /* kernel/process.c */
 int sys_fork(struct pt_regs *);
 int sys_vfork(struct pt_regs *);
+long sys_execve(char __user *, char __user * __user *,
+                char __user * __user *, struct pt_regs *);
+long sys_clone(unsigned long, unsigned long, void __user *,
+               void __user *, struct pt_regs *);
 /* kernel/ldt.c */
 asmlinkage int sys_modify_ldt(int, void __user *, unsigned long);
 /* kernel/signal.c */
 long sys_rt_sigreturn(struct pt_regs *);
+long sys_sigaltstack(const stack_t __user *, stack_t __user *,
+                     struct pt_regs *);
 /* kernel/tls.c */
 asmlinkage int sys_set_thread_area(struct user_desc __user *);
@@ -35,18 +43,11 @@ asmlinkage int sys_get_thread_area(struct user_desc __user *);
 /* X86_32 only */
 #ifdef CONFIG_X86_32
-/* kernel/ioport.c */
-long sys_iopl(struct pt_regs *);
-/* kernel/process_32.c */
-int sys_clone(struct pt_regs *);
-int sys_execve(struct pt_regs *);
 /* kernel/signal.c */
 asmlinkage int sys_sigsuspend(int, int, old_sigset_t);
 asmlinkage int sys_sigaction(int, const struct old_sigaction __user *,
                             struct old_sigaction __user *);
-int sys_sigaltstack(struct pt_regs *);
 unsigned long sys_sigreturn(struct pt_regs *);
 /* kernel/sys_i386_32.c */
@@ -62,28 +63,15 @@ asmlinkage int sys_uname(struct old_utsname __user *);
 asmlinkage int sys_olduname(struct oldold_utsname __user *);
 /* kernel/vm86_32.c */
-int sys_vm86old(struct pt_regs *);
+int sys_vm86old(struct vm86_struct __user *, struct pt_regs *);
-int sys_vm86(struct pt_regs *);
+int sys_vm86(unsigned long, unsigned long, struct pt_regs *);
 #else /* CONFIG_X86_32 */
 /* X86_64 only */
-/* kernel/ioport.c */
-asmlinkage long sys_iopl(unsigned int, struct pt_regs *);
 /* kernel/process_64.c */
-asmlinkage long sys_clone(unsigned long, unsigned long,
-                          void __user *, void __user *,
-                          struct pt_regs *);
-asmlinkage long sys_execve(char __user *, char __user * __user *,
-                           char __user * __user *,
-                           struct pt_regs *);
 long sys_arch_prctl(int, unsigned long);
-/* kernel/signal.c */
-asmlinkage long sys_sigaltstack(const stack_t __user *, stack_t __user *,
-                                struct pt_regs *);
 /* kernel/sys_x86_64.c */
 struct new_utsname;
diff --git a/arch/x86/include/asm/uv/bios.h b/arch/x86/include/asm/uv/bios.h
index 7ed17ff502b9..2751f3075d8b 100644
--- a/arch/x86/include/asm/uv/bios.h
+++ b/arch/x86/include/asm/uv/bios.h
@@ -76,15 +76,6 @@ union partition_info_u {
        };
 };
-union uv_watchlist_u {
-        u64     val;
-        struct {
-                u64     blade   : 16,
-                        size    : 32,
-                        filler  : 16;
-        };
-};
 enum uv_memprotect {
        UV_MEMPROT_RESTRICT_ACCESS,
        UV_MEMPROT_ALLOW_AMO,
@@ -100,7 +91,7 @@ extern s64 uv_bios_call_reentrant(enum uv_bios_cmd, u64, u64, u64, u64, u64);
 extern s64 uv_bios_get_sn_info(int, int *, long *, long *, long *);
 extern s64 uv_bios_freq_base(u64, u64 *);
-extern int uv_bios_mq_watchlist_alloc(int, unsigned long, unsigned int,
+extern int uv_bios_mq_watchlist_alloc(unsigned long, unsigned int,
                                        unsigned long *);
 extern int uv_bios_mq_watchlist_free(int, int);
 extern s64 uv_bios_change_memprotect(u64, u64, enum uv_memprotect);
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index d1414af98559..811bfabc80b7 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -172,6 +172,8 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
 #define UV_LOCAL_MMR_SIZE               (64UL * 1024 * 1024)
 #define UV_GLOBAL_MMR32_SIZE            (64UL * 1024 * 1024)
+#define UV_GLOBAL_GRU_MMR_BASE          0x4000000
 #define UV_GLOBAL_MMR32_PNODE_SHIFT     15
 #define UV_GLOBAL_MMR64_PNODE_SHIFT     26
@@ -232,6 +234,26 @@ static inline unsigned long uv_gpa(void *v)
        return uv_soc_phys_ram_to_gpa(__pa(v));
 }
+/* Top two bits indicate the requested address is in MMR space.  */
+static inline int
+uv_gpa_in_mmr_space(unsigned long gpa)
+{
+        return (gpa >> 62) == 0x3UL;
+}
+/* UV global physical address --> socket phys RAM */
+static inline unsigned long uv_gpa_to_soc_phys_ram(unsigned long gpa)
+{
+        unsigned long paddr = gpa & uv_hub_info->gpa_mask;
+        unsigned long remap_base = uv_hub_info->lowmem_remap_base;
+        unsigned long remap_top =  uv_hub_info->lowmem_remap_top;
+        if (paddr >= remap_base && paddr < remap_base + remap_top)
+                paddr -= remap_base;
+        return paddr;
+}
 /* gnode -> pnode */
 static inline unsigned long uv_gpa_to_gnode(unsigned long gpa)
 {
@@ -308,6 +330,15 @@ static inline unsigned long uv_read_global_mmr64(int pnode,
 }
 /*
+ * Global MMR space addresses when referenced by the GRU. (GRU does
+ * NOT use socket addressing).
+ */
+static inline unsigned long uv_global_gru_mmr_address(int pnode, unsigned long offset)
+{
+        return UV_GLOBAL_GRU_MMR_BASE | offset | (pnode << uv_hub_info->m_val);
+}
+/*
 * Access hub local MMRs. Faster than using global space but only local MMRs
 * are accessible.
 */
@@ -434,6 +465,14 @@ static inline void uv_set_cpu_scir_bits(int cpu, unsigned char value)
        }
 }
+static unsigned long uv_hub_ipi_value(int apicid, int vector, int mode)
+{
+        return (1UL << UVH_IPI_INT_SEND_SHFT) |
+                        ((apicid) << UVH_IPI_INT_APIC_ID_SHFT) |
+                        (mode << UVH_IPI_INT_DELIVERY_MODE_SHFT) |
+                        (vector << UVH_IPI_INT_VECTOR_SHFT);
+}
 static inline void uv_hub_send_ipi(int pnode, int apicid, int vector)
 {
        unsigned long val;
@@ -442,10 +481,7 @@ static inline void uv_hub_send_ipi(int pnode, int apicid, int vector)
        if (vector == NMI_VECTOR)
                dmode = dest_NMI;
-        val = (1UL << UVH_IPI_INT_SEND_SHFT) |
+        val = uv_hub_ipi_value(apicid, vector, dmode);
-                        ((apicid) << UVH_IPI_INT_APIC_ID_SHFT) |
-                        (dmode << UVH_IPI_INT_DELIVERY_MODE_SHFT) |
-                        (vector << UVH_IPI_INT_VECTOR_SHFT);
        uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
 }
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index b990b5cc9541..23824fef789c 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -19,7 +19,7 @@
 #include <linux/pci.h>
 #include <linux/gfp.h>
-#include <linux/bitops.h>
+#include <linux/bitmap.h>
 #include <linux/debugfs.h>
 #include <linux/scatterlist.h>
 #include <linux/dma-mapping.h>
@@ -1162,7 +1162,7 @@ static void dma_ops_free_addresses(struct dma_ops_domain *dom,
        address = (address % APERTURE_RANGE_SIZE) >> PAGE_SHIFT;
-        iommu_area_free(range->bitmap, address, pages);
+        bitmap_clear(range->bitmap, address, pages);
 }
diff --git a/arch/x86/kernel/bios_uv.c b/arch/x86/kernel/bios_uv.c
index 63a88e1f987d..b0206a211b09 100644
--- a/arch/x86/kernel/bios_uv.c
+++ b/arch/x86/kernel/bios_uv.c
@@ -101,21 +101,17 @@ s64 uv_bios_get_sn_info(int fc, int *uvtype, long *partid, long *coher,
 }
 int
-uv_bios_mq_watchlist_alloc(int blade, unsigned long addr, unsigned int mq_size,
+uv_bios_mq_watchlist_alloc(unsigned long addr, unsigned int mq_size,
                           unsigned long *intr_mmr_offset)
 {
-        union uv_watchlist_u size_blade;
        u64 watchlist;
        s64 ret;
-        size_blade.size = mq_size;
-        size_blade.blade = blade;
        /*
         * bios returns watchlist number or negative error number.
         */
        ret = (int)uv_bios_call_irqsave(UV_BIOS_WATCHLIST_ALLOC, addr,
-                        size_blade.val, (u64)intr_mmr_offset,
+                        mq_size, (u64)intr_mmr_offset,
                        (u64)&watchlist, 0);
        if (ret < BIOS_STATUS_SUCCESS)
                return ret;
diff --git a/arch/x86/kernel/cpu/mcheck/mce-inject.c b/arch/x86/kernel/cpu/mcheck/mce-inject.c
index 472763d92098..73734baa50f2 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-inject.c
+++ b/arch/x86/kernel/cpu/mcheck/mce-inject.c
@@ -74,7 +74,7 @@ static void raise_exception(struct mce *m, struct pt_regs *pregs)
        m->finished = 0;
 }
-static cpumask_t mce_inject_cpumask;
+static cpumask_var_t mce_inject_cpumask;
 static int mce_raise_notify(struct notifier_block *self,
                            unsigned long val, void *data)
@@ -82,9 +82,9 @@ static int mce_raise_notify(struct notifier_block *self,
        struct die_args *args = (struct die_args *)data;
        int cpu = smp_processor_id();
        struct mce *m = &__get_cpu_var(injectm);
-        if (val != DIE_NMI_IPI || !cpu_isset(cpu, mce_inject_cpumask))
+        if (val != DIE_NMI_IPI || !cpumask_test_cpu(cpu, mce_inject_cpumask))
                return NOTIFY_DONE;
-        cpu_clear(cpu, mce_inject_cpumask);
+        cpumask_clear_cpu(cpu, mce_inject_cpumask);
        if (m->inject_flags & MCJ_EXCEPTION)
                raise_exception(m, args->regs);
        else if (m->status)
@@ -148,22 +148,22 @@ static void raise_mce(struct mce *m)
                unsigned long start;
                int cpu;
                get_online_cpus();
-                mce_inject_cpumask = cpu_online_map;
+                cpumask_copy(mce_inject_cpumask, cpu_online_mask);
-                cpu_clear(get_cpu(), mce_inject_cpumask);
+                cpumask_clear_cpu(get_cpu(), mce_inject_cpumask);
                for_each_online_cpu(cpu) {
                        struct mce *mcpu = &per_cpu(injectm, cpu);
                        if (!mcpu->finished ||
                            MCJ_CTX(mcpu->inject_flags) != MCJ_CTX_RANDOM)
-                                cpu_clear(cpu, mce_inject_cpumask);
+                                cpumask_clear_cpu(cpu, mce_inject_cpumask);
                }
-                if (!cpus_empty(mce_inject_cpumask))
+                if (!cpumask_empty(mce_inject_cpumask))
-                        apic->send_IPI_mask(&mce_inject_cpumask, NMI_VECTOR);
+                        apic->send_IPI_mask(mce_inject_cpumask, NMI_VECTOR);
                start = jiffies;
-                while (!cpus_empty(mce_inject_cpumask)) {
+                while (!cpumask_empty(mce_inject_cpumask)) {
                        if (!time_before(jiffies, start + 2*HZ)) {
                                printk(KERN_ERR
                                "Timeout waiting for mce inject NMI %lx\n",
-                                        *cpus_addr(mce_inject_cpumask));
+                                        *cpumask_bits(mce_inject_cpumask));
                                break;
                        }
                        cpu_relax();
@@ -210,6 +210,8 @@ static ssize_t mce_write(struct file *filp, const char __user *ubuf,
 static int inject_init(void)
 {
+        if (!alloc_cpumask_var(&mce_inject_cpumask, GFP_KERNEL))
+                return -ENOMEM;
        printk(KERN_INFO "Machine check injector initialized\n");
        mce_chrdev_ops.write = mce_write;
        register_die_notifier(&mce_raise_nb);
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index 50b9c220e121..44a8e0dc6737 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -725,22 +725,61 @@ END(syscall_badsys)
 /*
 * System calls that need a pt_regs pointer.
 */
-#define PTREGSCALL(name) \
+#define PTREGSCALL0(name) \
        ALIGN; \
 ptregs_##name: \
        leal 4(%esp),%eax; \
        jmp sys_##name;
-PTREGSCALL(iopl)
+#define PTREGSCALL1(name) \
-PTREGSCALL(fork)
+        ALIGN; \
-PTREGSCALL(clone)
+ptregs_##name: \
-PTREGSCALL(vfork)
+        leal 4(%esp),%edx; \
-PTREGSCALL(execve)
+        movl (PT_EBX+4)(%esp),%eax; \
-PTREGSCALL(sigaltstack)
+        jmp sys_##name;
-PTREGSCALL(sigreturn)
-PTREGSCALL(rt_sigreturn)
+#define PTREGSCALL2(name) \
-PTREGSCALL(vm86)
+        ALIGN; \
-PTREGSCALL(vm86old)
+ptregs_##name: \
+        leal 4(%esp),%ecx; \
+        movl (PT_ECX+4)(%esp),%edx; \
+        movl (PT_EBX+4)(%esp),%eax; \
+        jmp sys_##name;
+#define PTREGSCALL3(name) \
+        ALIGN; \
+ptregs_##name: \
+        leal 4(%esp),%eax; \
+        pushl %eax; \
+        movl PT_EDX(%eax),%ecx; \
+        movl PT_ECX(%eax),%edx; \
+        movl PT_EBX(%eax),%eax; \
+        call sys_##name; \
+        addl $4,%esp; \
+        ret
+PTREGSCALL1(iopl)
+PTREGSCALL0(fork)
+PTREGSCALL0(vfork)
+PTREGSCALL3(execve)
+PTREGSCALL2(sigaltstack)
+PTREGSCALL0(sigreturn)
+PTREGSCALL0(rt_sigreturn)
+PTREGSCALL2(vm86)
+PTREGSCALL1(vm86old)
+/* Clone is an oddball.  The 4th arg is in %edi */
+        ALIGN;
+ptregs_clone:
+        leal 4(%esp),%eax
+        pushl %eax
+        pushl PT_EDI(%eax)
+        movl PT_EDX(%eax),%ecx
+        movl PT_ECX(%eax),%edx
+        movl PT_EBX(%eax),%eax
+        call sys_clone
+        addl $8,%esp
+        ret
 .macro FIXUP_ESPFIX_STACK
 /*
@@ -1008,12 +1047,8 @@ END(spurious_interrupt_bug)
 ENTRY(kernel_thread_helper)
        pushl $0                # fake return address for unwinder
        CFI_STARTPROC
-        movl %edx,%eax
+        movl %edi,%eax
-        push %edx
+        call *%esi
-        CFI_ADJUST_CFA_OFFSET 4
-        call *%ebx
-        push %eax
-        CFI_ADJUST_CFA_OFFSET 4
        call do_exit
        ud2                     # padding for call trace
        CFI_ENDPROC
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index 673f693fb451..0697ff139837 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -1166,63 +1166,20 @@ bad_gs:
        jmp  2b
        .previous
-/*
+ENTRY(kernel_thread_helper)
- * Create a kernel thread.
- *
- * C extern interface:
- *      extern long kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
- *
- * asm input arguments:
- *      rdi: fn, rsi: arg, rdx: flags
- */
-ENTRY(kernel_thread)
-        CFI_STARTPROC
-        FAKE_STACK_FRAME $child_rip
-        SAVE_ALL
-        # rdi: flags, rsi: usp, rdx: will be &pt_regs
-        movq %rdx,%rdi
-        orq  kernel_thread_flags(%rip),%rdi
-        movq $-1, %rsi
-        movq %rsp, %rdx
-        xorl %r8d,%r8d
-        xorl %r9d,%r9d
-        # clone now
-        call do_fork
-        movq %rax,RAX(%rsp)
-        xorl %edi,%edi
-        /*
-         * It isn't worth to check for reschedule here,
-         * so internally to the x86_64 port you can rely on kernel_thread()
-         * not to reschedule the child before returning, this avoids the need
-         * of hacks for example to fork off the per-CPU idle tasks.
-         * [Hopefully no generic code relies on the reschedule -AK]
-         */
-        RESTORE_ALL
-        UNFAKE_STACK_FRAME
-        ret
-        CFI_ENDPROC
-END(kernel_thread)
-ENTRY(child_rip)
        pushq $0                # fake return address
        CFI_STARTPROC
        /*
         * Here we are in the child and the registers are set as they were
         * at kernel_thread() invocation in the parent.
         */
-        movq %rdi, %rax
+        call *%rsi
-        movq %rsi, %rdi
-        call *%rax
        # exit
        mov %eax, %edi
        call do_exit
        ud2                     # padding for call trace
        CFI_ENDPROC
-END(child_rip)
+END(kernel_thread_helper)
 /*
 * execve(). This function needs to use IRET, not SYSRET, to set up all state properly.
diff --git a/arch/x86/kernel/ioport.c b/arch/x86/kernel/ioport.c
index 99c4d308f16b..8eec0ec59af2 100644
--- a/arch/x86/kernel/ioport.c
+++ b/arch/x86/kernel/ioport.c
@@ -103,9 +103,10 @@ asmlinkage long sys_ioperm(unsigned long from, unsigned long num, int turn_on)
 * on system-call entry - see also fork() and the signal handling
 * code.
 */
-static int do_iopl(unsigned int level, struct pt_regs *regs)
+long sys_iopl(unsigned int level, struct pt_regs *regs)
 {
        unsigned int old = (regs->flags >> 12) & 3;
+        struct thread_struct *t = &current->thread;
        if (level > 3)
                return -EINVAL;
@@ -115,29 +116,8 @@ static int do_iopl(unsigned int level, struct pt_regs *regs)
                        return -EPERM;
        }
        regs->flags = (regs->flags & ~X86_EFLAGS_IOPL) | (level << 12);
-        return 0;
-}
-#ifdef CONFIG_X86_32
-long sys_iopl(struct pt_regs *regs)
-{
-        unsigned int level = regs->bx;
-        struct thread_struct *t = &current->thread;
-        int rc;
-        rc = do_iopl(level, regs);
-        if (rc < 0)
-                goto out;
        t->iopl = level << 12;
        set_iopl_mask(t->iopl);
-out:
-        return rc;
+        return 0;
-}
-#else
-asmlinkage long sys_iopl(unsigned int level, struct pt_regs *regs)
-{
-        return do_iopl(level, regs);
 }
-#endif
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 553449951b84..572b07eee3f4 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -172,11 +172,10 @@ static long msr_ioctl(struct file *file, unsigned int ioc, unsigned long arg)
 static int msr_open(struct inode *inode, struct file *file)
 {
-        unsigned int cpu = iminor(file->f_path.dentry->d_inode);
+        unsigned int cpu;
-        struct cpuinfo_x86 *c = &cpu_data(cpu);
+        struct cpuinfo_x86 *c;
        cpu = iminor(file->f_path.dentry->d_inode);
        if (cpu >= nr_cpu_ids || !cpu_online(cpu))
                return -ENXIO;  /* No such CPU */
diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c
index c563e4c8ff39..2bbde6078143 100644
--- a/arch/x86/kernel/pci-calgary_64.c
+++ b/arch/x86/kernel/pci-calgary_64.c
@@ -31,7 +31,7 @@
 #include <linux/string.h>
 #include <linux/crash_dump.h>
 #include <linux/dma-mapping.h>
-#include <linux/bitops.h>
+#include <linux/bitmap.h>
 #include <linux/pci_ids.h>
 #include <linux/pci.h>
 #include <linux/delay.h>
@@ -212,7 +212,7 @@ static void iommu_range_reserve(struct iommu_table *tbl,
        spin_lock_irqsave(&tbl->it_lock, flags);
-        iommu_area_reserve(tbl->it_map, index, npages);
+        bitmap_set(tbl->it_map, index, npages);
        spin_unlock_irqrestore(&tbl->it_lock, flags);
 }
@@ -303,7 +303,7 @@ static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
        spin_lock_irqsave(&tbl->it_lock, flags);
-        iommu_area_free(tbl->it_map, entry, npages);
+        bitmap_clear(tbl->it_map, entry, npages);
        spin_unlock_irqrestore(&tbl->it_lock, flags);
 }
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index fcc2f2bfa39c..75e14e21f61a 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -120,15 +120,12 @@ static void __init dma32_free_bootmem(void)
 void __init pci_iommu_alloc(void)
 {
-        int use_swiotlb;
-        use_swiotlb = pci_swiotlb_init();
 #ifdef CONFIG_X86_64
        /* free the range so iommu could get some range less than 4G */
        dma32_free_bootmem();
 #endif
-        if (use_swiotlb)
+        if (pci_swiotlb_detect())
-                return;
+                goto out;
        gart_iommu_hole_init();
@@ -138,6 +135,8 @@ void __init pci_iommu_alloc(void)
        /* needs to be called after gart_iommu_hole_init */
        amd_iommu_detect();
+out:
+        pci_swiotlb_init();
 }
 void *dma_generic_alloc_coherent(struct device *dev, size_t size,
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index 56c0e730d3fe..34de53b46f87 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -23,7 +23,7 @@
 #include <linux/module.h>
 #include <linux/topology.h>
 #include <linux/interrupt.h>
-#include <linux/bitops.h>
+#include <linux/bitmap.h>
 #include <linux/kdebug.h>
 #include <linux/scatterlist.h>
 #include <linux/iommu-helper.h>
@@ -126,7 +126,7 @@ static void free_iommu(unsigned long offset, int size)
        unsigned long flags;
        spin_lock_irqsave(&iommu_bitmap_lock, flags);
-        iommu_area_free(iommu_gart_bitmap, offset, size);
+        bitmap_clear(iommu_gart_bitmap, offset, size);
        if (offset >= next_bit)
                next_bit = offset + size;
        spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
@@ -792,7 +792,7 @@ int __init gart_iommu_init(void)
         * Out of IOMMU space handling.
         * Reserve some invalid pages at the beginning of the GART.
         */
-        iommu_area_reserve(iommu_gart_bitmap, 0, EMERGENCY_PAGES);
+        bitmap_set(iommu_gart_bitmap, 0, EMERGENCY_PAGES);
        pr_info("PCI-DMA: Reserving %luMB of IOMMU area in the AGP aperture\n",
               iommu_size >> 20);
diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index e3c0a66b9e77..7d2829dde20e 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -43,12 +43,12 @@ static struct dma_map_ops swiotlb_dma_ops = {
 };
 /*
- * pci_swiotlb_init - initialize swiotlb if necessary
+ * pci_swiotlb_detect - set swiotlb to 1 if necessary
 *
 * This returns non-zero if we are forced to use swiotlb (by the boot
 * option).
 */
-int __init pci_swiotlb_init(void)
+int __init pci_swiotlb_detect(void)
 {
        int use_swiotlb = swiotlb | swiotlb_force;
@@ -60,10 +60,13 @@ int __init pci_swiotlb_init(void)
        if (swiotlb_force)
                swiotlb = 1;
+        return use_swiotlb;
+}
+void __init pci_swiotlb_init(void)
+{
        if (swiotlb) {
                swiotlb_init(0);
                dma_ops = &swiotlb_dma_ops;
        }
-        return use_swiotlb;
 }
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 7a7bd4e3ec49..98c2cdeb599e 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -255,6 +255,76 @@ int sys_vfork(struct pt_regs *regs)
                       NULL, NULL);
 }
+long
+sys_clone(unsigned long clone_flags, unsigned long newsp,
+          void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
+{
+        if (!newsp)
+                newsp = regs->sp;
+        return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
+}
+/*
+ * This gets run with %si containing the
+ * function to call, and %di containing
+ * the "args".
+ */
+extern void kernel_thread_helper(void);
+/*
+ * Create a kernel thread
+ */
+int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
+{
+        struct pt_regs regs;
+        memset(&regs, 0, sizeof(regs));
+        regs.si = (unsigned long) fn;
+        regs.di = (unsigned long) arg;
+#ifdef CONFIG_X86_32
+        regs.ds = __USER_DS;
+        regs.es = __USER_DS;
+        regs.fs = __KERNEL_PERCPU;
+        regs.gs = __KERNEL_STACK_CANARY;
+#endif
+        regs.orig_ax = -1;
+        regs.ip = (unsigned long) kernel_thread_helper;
+        regs.cs = __KERNEL_CS | get_kernel_rpl();
+        regs.flags = X86_EFLAGS_IF | 0x2;
+        /* Ok, create the new process.. */
+        return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
+}
+EXPORT_SYMBOL(kernel_thread);
+/*
+ * sys_execve() executes a new program.
+ */
+long sys_execve(char __user *name, char __user * __user *argv,
+                char __user * __user *envp, struct pt_regs *regs)
+{
+        long error;
+        char *filename;
+        filename = getname(name);
+        error = PTR_ERR(filename);
+        if (IS_ERR(filename))
+                return error;
+        error = do_execve(filename, argv, envp, regs);
+#ifdef CONFIG_X86_32
+        if (error == 0) {
+                /* Make sure we don't return using sysenter.. */
+                set_thread_flag(TIF_IRET);
+        }
+#endif
+        putname(filename);
+        return error;
+}
 /*
 * Idle related variables and functions
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index 120b88797a75..9c517b5858f0 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -180,39 +180,6 @@ void show_regs(struct pt_regs *regs)
        show_trace(NULL, regs, &regs->sp, regs->bp);
 }
-/*
- * This gets run with %bx containing the
- * function to call, and %dx containing
- * the "args".
- */
-extern void kernel_thread_helper(void);
-/*
- * Create a kernel thread
- */
-int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
-{
-        struct pt_regs regs;
-        memset(&regs, 0, sizeof(regs));
-        regs.bx = (unsigned long) fn;
-        regs.dx = (unsigned long) arg;
-        regs.ds = __USER_DS;
-        regs.es = __USER_DS;
-        regs.fs = __KERNEL_PERCPU;
-        regs.gs = __KERNEL_STACK_CANARY;
-        regs.orig_ax = -1;
-        regs.ip = (unsigned long) kernel_thread_helper;
-        regs.cs = __KERNEL_CS | get_kernel_rpl();
-        regs.flags = X86_EFLAGS_IF | X86_EFLAGS_SF | X86_EFLAGS_PF | 0x2;
-        /* Ok, create the new process.. */
-        return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
-}
-EXPORT_SYMBOL(kernel_thread);
 void release_thread(struct task_struct *dead_task)
 {
        BUG_ON(dead_task->mm);
@@ -424,46 +391,6 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
        return prev_p;
 }
-int sys_clone(struct pt_regs *regs)
-{
-        unsigned long clone_flags;
-        unsigned long newsp;
-        int __user *parent_tidptr, *child_tidptr;
-        clone_flags = regs->bx;
-        newsp = regs->cx;
-        parent_tidptr = (int __user *)regs->dx;
-        child_tidptr = (int __user *)regs->di;
-        if (!newsp)
-                newsp = regs->sp;
-        return do_fork(clone_flags, newsp, regs, 0, parent_tidptr, child_tidptr);
-}
-/*
- * sys_execve() executes a new program.
- */
-int sys_execve(struct pt_regs *regs)
-{
-        int error;
-        char *filename;
-        filename = getname((char __user *) regs->bx);
-        error = PTR_ERR(filename);
-        if (IS_ERR(filename))
-                goto out;
-        error = do_execve(filename,
-                        (char __user * __user *) regs->cx,
-                        (char __user * __user *) regs->dx,
-                        regs);
-        if (error == 0) {
-                /* Make sure we don't return using sysenter.. */
-                set_thread_flag(TIF_IRET);
-        }
-        putname(filename);
-out:
-        return error;
-}
 #define top_esp                (THREAD_SIZE - sizeof(unsigned long))
 #define top_ebp                (THREAD_SIZE - 2*sizeof(unsigned long))
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index e5ab0cd0ef36..52fbd0c60198 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -57,8 +57,6 @@ asmlinkage extern void ret_from_fork(void);
 DEFINE_PER_CPU(unsigned long, old_rsp);
 static DEFINE_PER_CPU(unsigned char, is_idle);
-unsigned long kernel_thread_flags = CLONE_VM | CLONE_UNTRACED;
 static ATOMIC_NOTIFIER_HEAD(idle_notifier);
 void idle_notifier_register(struct notifier_block *n)
@@ -273,8 +271,9 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,
        *childregs = *regs;
        childregs->ax = 0;
-        childregs->sp = sp;
+        if (user_mode(regs))
-        if (sp == ~0UL)
+                childregs->sp = sp;
+        else
                childregs->sp = (unsigned long)childregs;
        p->thread.sp = (unsigned long) childregs;
@@ -508,25 +507,6 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
        return prev_p;
 }
-/*
- * sys_execve() executes a new program.
- */
-asmlinkage
-long sys_execve(char __user *name, char __user * __user *argv,
-                char __user * __user *envp, struct pt_regs *regs)
-{
-        long error;
-        char *filename;
-        filename = getname(name);
-        error = PTR_ERR(filename);
-        if (IS_ERR(filename))
-                return error;
-        error = do_execve(filename, argv, envp, regs);
-        putname(filename);
-        return error;
-}
 void set_personality_64bit(void)
 {
        /* inherit personality from parent */
@@ -541,15 +521,6 @@ void set_personality_64bit(void)
        current->personality &= ~READ_IMPLIES_EXEC;
 }
-asmlinkage long
-sys_clone(unsigned long clone_flags, unsigned long newsp,
-          void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
-{
-        if (!newsp)
-                newsp = regs->sp;
-        return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
-}
 unsigned long get_wchan(struct task_struct *p)
 {
        unsigned long stack;
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 7079ddaf0731..2779321046bd 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -1676,21 +1676,33 @@ const struct user_regset_view *task_user_regset_view(struct task_struct *task)
 #endif
 }
-void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs,
+static void fill_sigtrap_info(struct task_struct *tsk,
-                                         int error_code, int si_code)
+                                struct pt_regs *regs,
+                                int error_code, int si_code,
+                                struct siginfo *info)
 {
-        struct siginfo info;
        tsk->thread.trap_no = 1;
        tsk->thread.error_code = error_code;
-        memset(&info, 0, sizeof(info));
+        memset(info, 0, sizeof(*info));
-        info.si_signo = SIGTRAP;
+        info->si_signo = SIGTRAP;
-        info.si_code = si_code;
+        info->si_code = si_code;
+        info->si_addr = user_mode_vm(regs) ? (void __user *)regs->ip : NULL;
+}
-        /* User-mode ip? */
+void user_single_step_siginfo(struct task_struct *tsk,
-        info.si_addr = user_mode_vm(regs) ? (void __user *) regs->ip : NULL;
+                                struct pt_regs *regs,
+                                struct siginfo *info)
+{
+        fill_sigtrap_info(tsk, regs, 0, TRAP_BRKPT, info);
+}
+void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs,
+                                         int error_code, int si_code)
+{
+        struct siginfo info;
+        fill_sigtrap_info(tsk, regs, error_code, si_code, &info);
        /* Send us the fake SIGTRAP */
        force_sig_info(SIGTRAP, &info, tsk);
 }
@@ -1755,29 +1767,22 @@ asmregparm long syscall_trace_enter(struct pt_regs *regs)
 asmregparm void syscall_trace_leave(struct pt_regs *regs)
 {
+        bool step;
        if (unlikely(current->audit_context))
                audit_syscall_exit(AUDITSC_RESULT(regs->ax), regs->ax);
        if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
                trace_sys_exit(regs, regs->ax);
-        if (test_thread_flag(TIF_SYSCALL_TRACE))
-                tracehook_report_syscall_exit(regs, 0);
        /*
         * If TIF_SYSCALL_EMU is set, we only get here because of
         * TIF_SINGLESTEP (i.e. this is PTRACE_SYSEMU_SINGLESTEP).
         * We already reported this syscall instruction in
-         * syscall_trace_enter(), so don't do any more now.
+         * syscall_trace_enter().
-         */
-        if (unlikely(test_thread_flag(TIF_SYSCALL_EMU)))
-                return;
-        /*
-         * If we are single-stepping, synthesize a trap to follow the
-         * system call instruction.
         */
-        if (test_thread_flag(TIF_SINGLESTEP) &&
+        step = unlikely(test_thread_flag(TIF_SINGLESTEP)) &&
-            tracehook_consider_fatal_signal(current, SIGTRAP))
+                        !test_thread_flag(TIF_SYSCALL_EMU);
-                send_sigtrap(current, regs, 0, TRAP_BRKPT);
+        if (step || test_thread_flag(TIF_SYSCALL_TRACE))
+                tracehook_report_syscall_exit(regs, step);
 }
diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c
index 74fe6d86dc5d..4fd173cd8e57 100644
--- a/arch/x86/kernel/signal.c
+++ b/arch/x86/kernel/signal.c
@@ -545,22 +545,12 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,
 }
 #endif /* CONFIG_X86_32 */
-#ifdef CONFIG_X86_32
+long
-int sys_sigaltstack(struct pt_regs *regs)
-{
-        const stack_t __user *uss = (const stack_t __user *)regs->bx;
-        stack_t __user *uoss = (stack_t __user *)regs->cx;
-        return do_sigaltstack(uss, uoss, regs->sp);
-}
-#else /* !CONFIG_X86_32 */
-asmlinkage long
 sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
                struct pt_regs *regs)
 {
        return do_sigaltstack(uss, uoss, regs->sp);
 }
-#endif /* CONFIG_X86_32 */
 /*
 * Do a signal return; undo the signal stack.
diff --git a/arch/x86/kernel/vm86_32.c b/arch/x86/kernel/vm86_32.c
index 9c4e62539058..5ffb5622f793 100644
--- a/arch/x86/kernel/vm86_32.c
+++ b/arch/x86/kernel/vm86_32.c
@@ -197,9 +197,8 @@ out:
 static int do_vm86_irq_handling(int subfunction, int irqnumber);
 static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk);
-int sys_vm86old(struct pt_regs *regs)
+int sys_vm86old(struct vm86_struct __user *v86, struct pt_regs *regs)
 {
-        struct vm86_struct __user *v86 = (struct vm86_struct __user *)regs->bx;
        struct kernel_vm86_struct info; /* declare this _on top_,
                                         * this avoids wasting of stack space.
                                         * This remains on the stack until we
@@ -227,7 +226,7 @@ out:
 }
-int sys_vm86(struct pt_regs *regs)
+int sys_vm86(unsigned long cmd, unsigned long arg, struct pt_regs *regs)
 {
        struct kernel_vm86_struct info; /* declare this _on top_,
                                         * this avoids wasting of stack space.
@@ -239,12 +238,12 @@ int sys_vm86(struct pt_regs *regs)
        struct vm86plus_struct __user *v86;
        tsk = current;
-        switch (regs->bx) {
+        switch (cmd) {
        case VM86_REQUEST_IRQ:
        case VM86_FREE_IRQ:
        case VM86_GET_IRQ_BITS:
        case VM86_GET_AND_RESET_IRQ:
-                ret = do_vm86_irq_handling(regs->bx, (int)regs->cx);
+                ret = do_vm86_irq_handling(cmd, (int)arg);
                goto out;
        case VM86_PLUS_INSTALL_CHECK:
                /*
@@ -261,7 +260,7 @@ int sys_vm86(struct pt_regs *regs)
        ret = -EPERM;
        if (tsk->thread.saved_sp0)
                goto out;
-        v86 = (struct vm86plus_struct __user *)regs->cx;
+        v86 = (struct vm86plus_struct __user *)arg;
        tmp = copy_vm86_regs_from_user(&info.regs, &v86->regs,
                                       offsetof(struct kernel_vm86_struct, regs32) -
                                       sizeof(info.regs));
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S
index f3f2104408d9..f92a0da608cb 100644
--- a/arch/x86/kernel/vmlinux.lds.S
+++ b/arch/x86/kernel/vmlinux.lds.S
@@ -319,9 +319,7 @@ SECTIONS
                __brk_limit = .;
        }
-        .end : AT(ADDR(.end) - LOAD_OFFSET) {
+        _end = .;
-                _end = .;
-        }
        STABS_DEBUG
        DWARF_DEBUG
diff --git a/arch/x86/kernel/x8664_ksyms_64.c b/arch/x86/kernel/x8664_ksyms_64.c
index a1029769b6f2..619f7f88b8cc 100644
--- a/arch/x86/kernel/x8664_ksyms_64.c
+++ b/arch/x86/kernel/x8664_ksyms_64.c
@@ -17,8 +17,6 @@
 EXPORT_SYMBOL(mcount);
 #endif
-EXPORT_SYMBOL(kernel_thread);
 EXPORT_SYMBOL(__get_user_1);
 EXPORT_SYMBOL(__get_user_2);
 EXPORT_SYMBOL(__get_user_4);
@@ -56,4 +54,6 @@ EXPORT_SYMBOL(__memcpy);
 EXPORT_SYMBOL(empty_zero_page);
 EXPORT_SYMBOL(init_level4_pgt);
-EXPORT_SYMBOL(load_gs_index);
+#ifndef CONFIG_PARAVIRT
+EXPORT_SYMBOL(native_load_gs_index);
+#endif
diff --git a/arch/x86/tools/gen-insn-attr-x86.awk b/arch/x86/tools/gen-insn-attr-x86.awk
index e34e92a28eb6..7a6850683c34 100644
--- a/arch/x86/tools/gen-insn-attr-x86.awk
+++ b/arch/x86/tools/gen-insn-attr-x86.awk
@@ -226,12 +226,12 @@ function add_flags(old,new) {
 }
 # convert operands to flags.
-function convert_operands(opnd,       i,imm,mod)
+function convert_operands(count,opnd,       i,j,imm,mod)
 {
        imm = null
        mod = null
-        for (i in opnd) {
+        for (j = 1; j <= count; j++) {
-                i  = opnd[i]
+                i = opnd[j]
                if (match(i, imm_expr) == 1) {
                        if (!imm_flag[i])
                                semantic_error("Unknown imm opnd: " i)
@@ -282,8 +282,8 @@ function convert_operands(opnd,       i,imm,mod)
                # parse one opcode
                if (match($i, opnd_expr)) {
                        opnd = $i
-                        split($(i++), opnds, ",")
+                        count = split($(i++), opnds, ",")
-                        flags = convert_operands(opnds)
+                        flags = convert_operands(count, opnds)
                }
                if (match($i, ext_expr))
                        ext = $(i++)
diff --git a/arch/xtensa/include/asm/elf.h b/arch/xtensa/include/asm/elf.h
index c3f53e755ca5..5eb6d695e987 100644
--- a/arch/xtensa/include/asm/elf.h
+++ b/arch/xtensa/include/asm/elf.h
@@ -123,7 +123,6 @@ extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *);
 #define ELF_CLASS       ELFCLASS32
 #define ELF_ARCH        EM_XTENSA
-#define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE       PAGE_SIZE
 /*
diff --git a/block/blk-settings.c b/block/blk-settings.c
index dd1f1e0e196f..6ae118d6e193 100644
--- a/block/blk-settings.c
+++ b/block/blk-settings.c
@@ -554,11 +554,18 @@ int blk_stack_limits(struct queue_limits *t, struct queue_limits *b,
                ret = -1;
        }
+        /*
+         * Temporarily disable discard granularity. It's currently buggy
+         * since we default to 0 for discard_granularity, hence this
+         * "failure" will always trigger for non-zero offsets.
+         */
+#if 0
        if (offset &&
            (offset & (b->discard_granularity - 1)) != b->discard_alignment) {
                t->discard_misaligned = 1;
                ret = -1;
        }
+#endif
        /* If top has no alignment offset, inherit from bottom */
        if (!t->alignment_offset)
diff --git a/drivers/atm/iphase.c b/drivers/atm/iphase.c
index f734b345ac71..25a4c86f839b 100644
--- a/drivers/atm/iphase.c
+++ b/drivers/atm/iphase.c
@@ -557,7 +557,7 @@ static int ia_cbr_setup (IADEV *dev, struct atm_vcc *vcc) {
          memcpy((caddr_t)&cbrVC,(caddr_t)TstSchedTbl,sizeof(cbrVC));
       } /* while */
       // Move this VCI number into this location of the CBR Sched table.
-       memcpy((caddr_t)TstSchedTbl, (caddr_t)&vcIndex,sizeof(TstSchedTbl));
+       memcpy((caddr_t)TstSchedTbl, (caddr_t)&vcIndex, sizeof(*TstSchedTbl));
       dev->CbrRemEntries--;
       toBeAssigned--;
   } /* while */ 
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index 8aa2443182d5..1a216c114a0f 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -23,8 +23,8 @@
 #include <linux/pm.h>
 #include <linux/pm_runtime.h>
 #include <linux/resume-trace.h>
-#include <linux/rwsem.h>
 #include <linux/interrupt.h>
+#include <linux/sched.h>
 #include "../base.h"
 #include "power.h"
@@ -172,6 +172,13 @@ static int pm_op(struct device *dev,
                 pm_message_t state)
 {
        int error = 0;
+        ktime_t calltime, delta, rettime;
+        if (initcall_debug) {
+                pr_info("calling  %s+ @ %i\n",
+                                dev_name(dev), task_pid_nr(current));
+                calltime = ktime_get();
+        }
        switch (state.event) {
 #ifdef CONFIG_SUSPEND
@@ -219,6 +226,14 @@ static int pm_op(struct device *dev,
        default:
                error = -EINVAL;
        }
+        if (initcall_debug) {
+                rettime = ktime_get();
+                delta = ktime_sub(rettime, calltime);
+                pr_info("call %s+ returned %d after %Ld usecs\n", dev_name(dev),
+                        error, (unsigned long long)ktime_to_ns(delta) >> 10);
+        }
        return error;
 }
@@ -236,6 +251,13 @@ static int pm_noirq_op(struct device *dev,
                        pm_message_t state)
 {
        int error = 0;
+        ktime_t calltime, delta, rettime;
+        if (initcall_debug) {
+                pr_info("calling  %s_i+ @ %i\n",
+                                dev_name(dev), task_pid_nr(current));
+                calltime = ktime_get();
+        }
        switch (state.event) {
 #ifdef CONFIG_SUSPEND
@@ -283,6 +305,14 @@ static int pm_noirq_op(struct device *dev,
        default:
                error = -EINVAL;
        }
+        if (initcall_debug) {
+                rettime = ktime_get();
+                delta = ktime_sub(rettime, calltime);
+                printk("initcall %s_i+ returned %d after %Ld usecs\n", dev_name(dev),
+                        error, (unsigned long long)ktime_to_ns(delta) >> 10);
+        }
        return error;
 }
@@ -341,14 +371,11 @@ static int device_resume_noirq(struct device *dev, pm_message_t state)
        TRACE_DEVICE(dev);
        TRACE_RESUME(0);
-        if (!dev->bus)
+        if (dev->bus && dev->bus->pm) {
-                goto End;
-        if (dev->bus->pm) {
                pm_dev_dbg(dev, state, "EARLY ");
                error = pm_noirq_op(dev, dev->bus->pm, state);
        }
- End:
        TRACE_RESUME(error);
        return error;
 }
@@ -584,10 +611,7 @@ static int device_suspend_noirq(struct device *dev, pm_message_t state)
 {
        int error = 0;
-        if (!dev->bus)
+        if (dev->bus && dev->bus->pm) {
-                return 0;
-        if (dev->bus->pm) {
                pm_dev_dbg(dev, state, "LATE ");
                error = pm_noirq_op(dev, dev->bus->pm, state);
        }
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
index 5a01ecef4af3..40d7720a4b21 100644
--- a/drivers/base/power/runtime.c
+++ b/drivers/base/power/runtime.c
@@ -701,15 +701,15 @@ EXPORT_SYMBOL_GPL(pm_request_resume);
 * @dev: Device to handle.
 * @sync: If set and the device is suspended, resume it synchronously.
 *
- * Increment the usage count of the device and if it was zero previously,
+ * Increment the usage count of the device and resume it or submit a resume
- * resume it or submit a resume request for it, depending on the value of @sync.
+ * request for it, depending on the value of @sync.
 */
 int __pm_runtime_get(struct device *dev, bool sync)
 {
-        int retval = 1;
+        int retval;
-        if (atomic_add_return(1, &dev->power.usage_count) == 1)
+        atomic_inc(&dev->power.usage_count);
-                retval = sync ? pm_runtime_resume(dev) : pm_request_resume(dev);
+        retval = sync ? pm_runtime_resume(dev) : pm_request_resume(dev);
        return retval;
 }
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index 6f31c9472100..31be3ac2e21b 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -502,7 +502,7 @@ config BRIQ_PANEL
 config BFIN_OTP
        tristate "Blackfin On-Chip OTP Memory Support"
-        depends on BLACKFIN && (BF52x || BF54x)
+        depends on BLACKFIN && (BF51x || BF52x || BF54x)
        default y
        help
          If you say Y here, you will get support for a character device
diff --git a/drivers/char/efirtc.c b/drivers/char/efirtc.c
index 26a47dc88f61..53c524e7b829 100644
--- a/drivers/char/efirtc.c
+++ b/drivers/char/efirtc.c
@@ -285,6 +285,7 @@ static const struct file_operations efi_rtc_fops = {
        .unlocked_ioctl = efi_rtc_ioctl,
        .open           = efi_rtc_open,
        .release        = efi_rtc_close,
+        .llseek         = no_llseek,
 };
 static struct miscdevice efi_rtc_dev= {
diff --git a/drivers/char/ipmi/ipmi_kcs_sm.c b/drivers/char/ipmi/ipmi_kcs_sm.c
index 80704875794c..cf82fedae099 100644
--- a/drivers/char/ipmi/ipmi_kcs_sm.c
+++ b/drivers/char/ipmi/ipmi_kcs_sm.c
@@ -370,7 +370,7 @@ static enum si_sm_result kcs_event(struct si_sm_data *kcs, long time)
                        return SI_SM_IDLE;
        case KCS_START_OP:
-                if (state != KCS_IDLE) {
+                if (state != KCS_IDLE_STATE) {
                        start_error_recovery(kcs,
                                             "State machine not idle at start");
                        break;
diff --git a/drivers/char/keyboard.c b/drivers/char/keyboard.c
index 5619007e7e05..f706b1dffdb3 100644
--- a/drivers/char/keyboard.c
+++ b/drivers/char/keyboard.c
@@ -233,7 +233,8 @@ int setkeycode(unsigned int scancode, unsigned int keycode)
 }
 /*
- * Making beeps and bells.
+ * Making beeps and bells. Note that we prefer beeps to bells, but when
+ * shutting the sound off we do both.
 */
 static int kd_sound_helper(struct input_handle *handle, void *data)
@@ -242,9 +243,12 @@ static int kd_sound_helper(struct input_handle *handle, void *data)
        struct input_dev *dev = handle->dev;
        if (test_bit(EV_SND, dev->evbit)) {
-                if (test_bit(SND_TONE, dev->sndbit))
+                if (test_bit(SND_TONE, dev->sndbit)) {
                        input_inject_event(handle, EV_SND, SND_TONE, *hz);
-                if (test_bit(SND_BELL, handle->dev->sndbit))
+                        if (*hz)
+                                return 0;
+                }
+                if (test_bit(SND_BELL, dev->sndbit))
                        input_inject_event(handle, EV_SND, SND_BELL, *hz ? 1 : 0);
        }
diff --git a/drivers/char/sysrq.c b/drivers/char/sysrq.c
index 44203ff599da..1ae2de7d8b4f 100644
--- a/drivers/char/sysrq.c
+++ b/drivers/char/sysrq.c
@@ -339,7 +339,7 @@ static struct sysrq_key_op sysrq_term_op = {
 static void moom_callback(struct work_struct *ignored)
 {
-        out_of_memory(node_zonelist(0, GFP_KERNEL), GFP_KERNEL, 0);
+        out_of_memory(node_zonelist(0, GFP_KERNEL), GFP_KERNEL, 0, NULL);
 }
 static DECLARE_WORK(moom_work, moom_callback);
diff --git a/drivers/char/vt.c b/drivers/char/vt.c
index e43fbc66aef0..50faa1fb0f06 100644
--- a/drivers/char/vt.c
+++ b/drivers/char/vt.c
@@ -164,6 +164,9 @@ module_param(default_utf8, int, S_IRUGO | S_IWUSR);
 int global_cursor_default = -1;
 module_param(global_cursor_default, int, S_IRUGO | S_IWUSR);
+static int cur_default = CUR_DEFAULT;
+module_param(cur_default, int, S_IRUGO | S_IWUSR);
 /*
 * ignore_poke: don't unblank the screen when things are typed.  This is
 * mainly for the privacy of braille terminal users.
@@ -1636,7 +1639,7 @@ static void reset_terminal(struct vc_data *vc, int do_clear)
        /* do not do set_leds here because this causes an endless tasklet loop
           when the keyboard hasn't been initialized yet */
-        vc->vc_cursor_type = CUR_DEFAULT;
+        vc->vc_cursor_type = cur_default;
        vc->vc_complement_mask = vc->vc_s_complement_mask;
        default_attr(vc);
@@ -1838,7 +1841,7 @@ static void do_con_trol(struct tty_struct *tty, struct vc_data *vc, int c)
                                if (vc->vc_par[0])
                                        vc->vc_cursor_type = vc->vc_par[0] | (vc->vc_par[1] << 8) | (vc->vc_par[2] << 16);
                                else
-                                        vc->vc_cursor_type = CUR_DEFAULT;
+                                        vc->vc_cursor_type = cur_default;
                                return;
                        }
                        break;
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index eb140ff38c27..e02d74b1e892 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -111,6 +111,24 @@ config SH_DMAE
        help
          Enable support for the Renesas SuperH DMA controllers.
+config COH901318
+        bool "ST-Ericsson COH901318 DMA support"
+        select DMA_ENGINE
+        depends on ARCH_U300
+        help
+          Enable support for ST-Ericsson COH 901 318 DMA.
+config AMCC_PPC440SPE_ADMA
+        tristate "AMCC PPC440SPe ADMA support"
+        depends on 440SPe || 440SP
+        select DMA_ENGINE
+        select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
+        help
+          Enable support for the AMCC PPC440SPe RAID engines.
+config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
+        bool
 config DMA_ENGINE
        bool
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index eca71ba78ae9..807053d48232 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -10,3 +10,5 @@ obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
 obj-$(CONFIG_MX3_IPU) += ipu/
 obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o
 obj-$(CONFIG_SH_DMAE) += shdma.o
+obj-$(CONFIG_COH901318) += coh901318.o coh901318_lli.o
+obj-$(CONFIG_AMCC_PPC440SPE_ADMA) += ppc4xx/
diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c
new file mode 100644
index 000000000000..4a99cd94536b
--- /dev/null
+++ b/drivers/dma/coh901318.c
@@ -0,0 +1,1325 @@
+/*
+ * driver/dma/coh901318.c
+ *
+ * Copyright (C) 2007-2009 ST-Ericsson
+ * License terms: GNU General Public License (GPL) version 2
+ * DMA driver for COH 901 318
+ * Author: Per Friden <per.friden@stericsson.com>
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h> /* printk() */
+#include <linux/fs.h> /* everything... */
+#include <linux/slab.h> /* kmalloc() */
+#include <linux/dmaengine.h>
+#include <linux/platform_device.h>
+#include <linux/device.h>
+#include <linux/irqreturn.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
+#include <linux/debugfs.h>
+#include <mach/coh901318.h>
+#include "coh901318_lli.h"
+#define COHC_2_DEV(cohc) (&cohc->chan.dev->device)
+#ifdef VERBOSE_DEBUG
+#define COH_DBG(x) ({ if (1) x; 0; })
+#else
+#define COH_DBG(x) ({ if (0) x; 0; })
+#endif
+struct coh901318_desc {
+        struct dma_async_tx_descriptor desc;
+        struct list_head node;
+        struct scatterlist *sg;
+        unsigned int sg_len;
+        struct coh901318_lli *data;
+        enum dma_data_direction dir;
+        int pending_irqs;
+        unsigned long flags;
+};
+struct coh901318_base {
+        struct device *dev;
+        void __iomem *virtbase;
+        struct coh901318_pool pool;
+        struct powersave pm;
+        struct dma_device dma_slave;
+        struct dma_device dma_memcpy;
+        struct coh901318_chan *chans;
+        struct coh901318_platform *platform;
+};
+struct coh901318_chan {
+        spinlock_t lock;
+        int allocated;
+        int completed;
+        int id;
+        int stopped;
+        struct work_struct free_work;
+        struct dma_chan chan;
+        struct tasklet_struct tasklet;
+        struct list_head active;
+        struct list_head queue;
+        struct list_head free;
+        unsigned long nbr_active_done;
+        unsigned long busy;
+        int pending_irqs;
+        struct coh901318_base *base;
+};
+static void coh901318_list_print(struct coh901318_chan *cohc,
+                                 struct coh901318_lli *lli)
+{
+        struct coh901318_lli *l;
+        dma_addr_t addr =  virt_to_phys(lli);
+        int i = 0;
+        while (addr) {
+                l = phys_to_virt(addr);
+                dev_vdbg(COHC_2_DEV(cohc), "i %d, lli %p, ctrl 0x%x, src 0x%x"
+                         ", dst 0x%x, link 0x%x link_virt 0x%p\n",
+                         i, l, l->control, l->src_addr, l->dst_addr,
+                         l->link_addr, phys_to_virt(l->link_addr));
+                i++;
+                addr = l->link_addr;
+        }
+}
+#ifdef CONFIG_DEBUG_FS
+#define COH901318_DEBUGFS_ASSIGN(x, y) (x = y)
+static struct coh901318_base *debugfs_dma_base;
+static struct dentry *dma_dentry;
+static int coh901318_debugfs_open(struct inode *inode, struct file *file)
+{
+        file->private_data = inode->i_private;
+        return 0;
+}
+static int coh901318_debugfs_read(struct file *file, char __user *buf,
+                                  size_t count, loff_t *f_pos)
+{
+        u64 started_channels = debugfs_dma_base->pm.started_channels;
+        int pool_count = debugfs_dma_base->pool.debugfs_pool_counter;
+        int i;
+        int ret = 0;
+        char *dev_buf;
+        char *tmp;
+        int dev_size;
+        dev_buf = kmalloc(4*1024, GFP_KERNEL);
+        if (dev_buf == NULL)
+                goto err_kmalloc;
+        tmp = dev_buf;
+        tmp += sprintf(tmp, "DMA -- enable dma channels\n");
+        for (i = 0; i < debugfs_dma_base->platform->max_channels; i++)
+                if (started_channels & (1 << i))
+                        tmp += sprintf(tmp, "channel %d\n", i);
+        tmp += sprintf(tmp, "Pool alloc nbr %d\n", pool_count);
+        dev_size = tmp  - dev_buf;
+        /* No more to read if offset != 0 */
+        if (*f_pos > dev_size)
+                goto out;
+        if (count > dev_size - *f_pos)
+                count = dev_size - *f_pos;
+        if (copy_to_user(buf, dev_buf + *f_pos, count))
+                ret = -EINVAL;
+        ret = count;
+        *f_pos += count;
+ out:
+        kfree(dev_buf);
+        return ret;
+ err_kmalloc:
+        return 0;
+}
+static const struct file_operations coh901318_debugfs_status_operations = {
+        .owner          = THIS_MODULE,
+        .open           = coh901318_debugfs_open,
+        .read           = coh901318_debugfs_read,
+};
+static int __init init_coh901318_debugfs(void)
+{
+        dma_dentry = debugfs_create_dir("dma", NULL);
+        (void) debugfs_create_file("status",
+                                   S_IFREG | S_IRUGO,
+                                   dma_dentry, NULL,
+                                   &coh901318_debugfs_status_operations);
+        return 0;
+}
+static void __exit exit_coh901318_debugfs(void)
+{
+        debugfs_remove_recursive(dma_dentry);
+}
+module_init(init_coh901318_debugfs);
+module_exit(exit_coh901318_debugfs);
+#else
+#define COH901318_DEBUGFS_ASSIGN(x, y)
+#endif /* CONFIG_DEBUG_FS */
+static inline struct coh901318_chan *to_coh901318_chan(struct dma_chan *chan)
+{
+        return container_of(chan, struct coh901318_chan, chan);
+}
+static inline dma_addr_t
+cohc_dev_addr(struct coh901318_chan *cohc)
+{
+        return cohc->base->platform->chan_conf[cohc->id].dev_addr;
+}
+static inline const struct coh901318_params *
+cohc_chan_param(struct coh901318_chan *cohc)
+{
+        return &cohc->base->platform->chan_conf[cohc->id].param;
+}
+static inline const struct coh_dma_channel *
+cohc_chan_conf(struct coh901318_chan *cohc)
+{
+        return &cohc->base->platform->chan_conf[cohc->id];
+}
+static void enable_powersave(struct coh901318_chan *cohc)
+{
+        unsigned long flags;
+        struct powersave *pm = &cohc->base->pm;
+        spin_lock_irqsave(&pm->lock, flags);
+        pm->started_channels &= ~(1ULL << cohc->id);
+        if (!pm->started_channels) {
+                /* DMA no longer intends to access memory */
+                cohc->base->platform->access_memory_state(cohc->base->dev,
+                                                          false);
+        }
+        spin_unlock_irqrestore(&pm->lock, flags);
+}
+static void disable_powersave(struct coh901318_chan *cohc)
+{
+        unsigned long flags;
+        struct powersave *pm = &cohc->base->pm;
+        spin_lock_irqsave(&pm->lock, flags);
+        if (!pm->started_channels) {
+                /* DMA intends to access memory */
+                cohc->base->platform->access_memory_state(cohc->base->dev,
+                                                          true);
+        }
+        pm->started_channels |= (1ULL << cohc->id);
+        spin_unlock_irqrestore(&pm->lock, flags);
+}
+static inline int coh901318_set_ctrl(struct coh901318_chan *cohc, u32 control)
+{
+        int channel = cohc->id;
+        void __iomem *virtbase = cohc->base->virtbase;
+        writel(control,
+               virtbase + COH901318_CX_CTRL +
+               COH901318_CX_CTRL_SPACING * channel);
+        return 0;
+}
+static inline int coh901318_set_conf(struct coh901318_chan *cohc, u32 conf)
+{
+        int channel = cohc->id;
+        void __iomem *virtbase = cohc->base->virtbase;
+        writel(conf,
+               virtbase + COH901318_CX_CFG +
+               COH901318_CX_CFG_SPACING*channel);
+        return 0;
+}
+static int coh901318_start(struct coh901318_chan *cohc)
+{
+        u32 val;
+        int channel = cohc->id;
+        void __iomem *virtbase = cohc->base->virtbase;
+        disable_powersave(cohc);
+        val = readl(virtbase + COH901318_CX_CFG +
+                    COH901318_CX_CFG_SPACING * channel);
+        /* Enable channel */
+        val |= COH901318_CX_CFG_CH_ENABLE;
+        writel(val, virtbase + COH901318_CX_CFG +
+               COH901318_CX_CFG_SPACING * channel);
+        return 0;
+}
+static int coh901318_prep_linked_list(struct coh901318_chan *cohc,
+                                      struct coh901318_lli *data)
+{
+        int channel = cohc->id;
+        void __iomem *virtbase = cohc->base->virtbase;
+        BUG_ON(readl(virtbase + COH901318_CX_STAT +
+                     COH901318_CX_STAT_SPACING*channel) &
+               COH901318_CX_STAT_ACTIVE);
+        writel(data->src_addr,
+               virtbase + COH901318_CX_SRC_ADDR +
+               COH901318_CX_SRC_ADDR_SPACING * channel);
+        writel(data->dst_addr, virtbase +
+               COH901318_CX_DST_ADDR +
+               COH901318_CX_DST_ADDR_SPACING * channel);
+        writel(data->link_addr, virtbase + COH901318_CX_LNK_ADDR +
+               COH901318_CX_LNK_ADDR_SPACING * channel);
+        writel(data->control, virtbase + COH901318_CX_CTRL +
+               COH901318_CX_CTRL_SPACING * channel);
+        return 0;
+}
+static dma_cookie_t
+coh901318_assign_cookie(struct coh901318_chan *cohc,
+                        struct coh901318_desc *cohd)
+{
+        dma_cookie_t cookie = cohc->chan.cookie;
+        if (++cookie < 0)
+                cookie = 1;
+        cohc->chan.cookie = cookie;
+        cohd->desc.cookie = cookie;
+        return cookie;
+}
+static struct coh901318_desc *
+coh901318_desc_get(struct coh901318_chan *cohc)
+{
+        struct coh901318_desc *desc;
+        if (list_empty(&cohc->free)) {
+                /* alloc new desc because we're out of used ones
+                 * TODO: alloc a pile of descs instead of just one,
+                 * avoid many small allocations.
+                 */
+                desc = kmalloc(sizeof(struct coh901318_desc), GFP_NOWAIT);
+                if (desc == NULL)
+                        goto out;
+                INIT_LIST_HEAD(&desc->node);
+        } else {
+                /* Reuse an old desc. */
+                desc = list_first_entry(&cohc->free,
+                                        struct coh901318_desc,
+                                        node);
+                list_del(&desc->node);
+        }
+ out:
+        return desc;
+}
+static void
+coh901318_desc_free(struct coh901318_chan *cohc, struct coh901318_desc *cohd)
+{
+        list_add_tail(&cohd->node, &cohc->free);
+}
+/* call with irq lock held */
+static void
+coh901318_desc_submit(struct coh901318_chan *cohc, struct coh901318_desc *desc)
+{
+        list_add_tail(&desc->node, &cohc->active);
+        BUG_ON(cohc->pending_irqs != 0);
+        cohc->pending_irqs = desc->pending_irqs;
+}
+static struct coh901318_desc *
+coh901318_first_active_get(struct coh901318_chan *cohc)
+{
+        struct coh901318_desc *d;
+        if (list_empty(&cohc->active))
+                return NULL;
+        d = list_first_entry(&cohc->active,
+                             struct coh901318_desc,
+                             node);
+        return d;
+}
+static void
+coh901318_desc_remove(struct coh901318_desc *cohd)
+{
+        list_del(&cohd->node);
+}
+static void
+coh901318_desc_queue(struct coh901318_chan *cohc, struct coh901318_desc *desc)
+{
+        list_add_tail(&desc->node, &cohc->queue);
+}
+static struct coh901318_desc *
+coh901318_first_queued(struct coh901318_chan *cohc)
+{
+        struct coh901318_desc *d;
+        if (list_empty(&cohc->queue))
+                return NULL;
+        d = list_first_entry(&cohc->queue,
+                             struct coh901318_desc,
+                             node);
+        return d;
+}
+/*
+ * DMA start/stop controls
+ */
+u32 coh901318_get_bytes_left(struct dma_chan *chan)
+{
+        unsigned long flags;
+        u32 ret;
+        struct coh901318_chan *cohc = to_coh901318_chan(chan);
+        spin_lock_irqsave(&cohc->lock, flags);
+        /* Read transfer count value */
+        ret = readl(cohc->base->virtbase +
+                    COH901318_CX_CTRL+COH901318_CX_CTRL_SPACING *
+                    cohc->id) & COH901318_CX_CTRL_TC_VALUE_MASK;
+        spin_unlock_irqrestore(&cohc->lock, flags);
+        return ret;
+}
+EXPORT_SYMBOL(coh901318_get_bytes_left);
+/* Stops a transfer without losing data. Enables power save.
+   Use this function in conjunction with coh901318_continue(..)
+*/
+void coh901318_stop(struct dma_chan *chan)
+{
+        u32 val;
+        unsigned long flags;
+        struct coh901318_chan *cohc = to_coh901318_chan(chan);
+        int channel = cohc->id;
+        void __iomem *virtbase = cohc->base->virtbase;
+        spin_lock_irqsave(&cohc->lock, flags);
+        /* Disable channel in HW */
+        val = readl(virtbase + COH901318_CX_CFG +
+                    COH901318_CX_CFG_SPACING * channel);
+        /* Stopping infinit transfer */
+        if ((val & COH901318_CX_CTRL_TC_ENABLE) == 0 &&
+            (val & COH901318_CX_CFG_CH_ENABLE))
+                cohc->stopped = 1;
+        val &= ~COH901318_CX_CFG_CH_ENABLE;
+        /* Enable twice, HW bug work around */
+        writel(val, virtbase + COH901318_CX_CFG +
+               COH901318_CX_CFG_SPACING * channel);
+        writel(val, virtbase + COH901318_CX_CFG +
+               COH901318_CX_CFG_SPACING * channel);
+        /* Spin-wait for it to actually go inactive */
+        while (readl(virtbase + COH901318_CX_STAT+COH901318_CX_STAT_SPACING *
+                     channel) & COH901318_CX_STAT_ACTIVE)
+                cpu_relax();
+        /* Check if we stopped an active job */
+        if ((readl(virtbase + COH901318_CX_CTRL+COH901318_CX_CTRL_SPACING *
+                   channel) & COH901318_CX_CTRL_TC_VALUE_MASK) > 0)
+                cohc->stopped = 1;
+        enable_powersave(cohc);
+        spin_unlock_irqrestore(&cohc->lock, flags);
+}
+EXPORT_SYMBOL(coh901318_stop);
+/* Continues a transfer that has been stopped via 300_dma_stop(..).
+   Power save is handled.
+*/
+void coh901318_continue(struct dma_chan *chan)
+{
+        u32 val;
+        unsigned long flags;
+        struct coh901318_chan *cohc = to_coh901318_chan(chan);
+        int channel = cohc->id;
+        spin_lock_irqsave(&cohc->lock, flags);
+        disable_powersave(cohc);
+        if (cohc->stopped) {
+                /* Enable channel in HW */
+                val = readl(cohc->base->virtbase + COH901318_CX_CFG +
+                            COH901318_CX_CFG_SPACING * channel);
+                val |= COH901318_CX_CFG_CH_ENABLE;
+                writel(val, cohc->base->virtbase + COH901318_CX_CFG +
+                       COH901318_CX_CFG_SPACING*channel);
+                cohc->stopped = 0;
+        }
+        spin_unlock_irqrestore(&cohc->lock, flags);
+}
+EXPORT_SYMBOL(coh901318_continue);
+bool coh901318_filter_id(struct dma_chan *chan, void *chan_id)
+{
+        unsigned int ch_nr = (unsigned int) chan_id;
+        if (ch_nr == to_coh901318_chan(chan)->id)
+                return true;
+        return false;
+}
+EXPORT_SYMBOL(coh901318_filter_id);
+/*
+ * DMA channel allocation
+ */
+static int coh901318_config(struct coh901318_chan *cohc,
+                            struct coh901318_params *param)
+{
+        unsigned long flags;
+        const struct coh901318_params *p;
+        int channel = cohc->id;
+        void __iomem *virtbase = cohc->base->virtbase;
+        spin_lock_irqsave(&cohc->lock, flags);
+        if (param)
+                p = param;
+        else
+                p = &cohc->base->platform->chan_conf[channel].param;
+        /* Clear any pending BE or TC interrupt */
+        if (channel < 32) {
+                writel(1 << channel, virtbase + COH901318_BE_INT_CLEAR1);
+                writel(1 << channel, virtbase + COH901318_TC_INT_CLEAR1);
+        } else {
+                writel(1 << (channel - 32), virtbase +
+                       COH901318_BE_INT_CLEAR2);
+                writel(1 << (channel - 32), virtbase +
+                       COH901318_TC_INT_CLEAR2);
+        }
+        coh901318_set_conf(cohc, p->config);
+        coh901318_set_ctrl(cohc, p->ctrl_lli_last);
+        spin_unlock_irqrestore(&cohc->lock, flags);
+        return 0;
+}
+/* must lock when calling this function
+ * start queued jobs, if any
+ * TODO: start all queued jobs in one go
+ *
+ * Returns descriptor if queued job is started otherwise NULL.
+ * If the queue is empty NULL is returned.
+ */
+static struct coh901318_desc *coh901318_queue_start(struct coh901318_chan *cohc)
+{
+        struct coh901318_desc *cohd_que;
+        /* start queued jobs, if any
+         * TODO: transmit all queued jobs in one go
+         */
+        cohd_que = coh901318_first_queued(cohc);
+        if (cohd_que != NULL) {
+                /* Remove from queue */
+                coh901318_desc_remove(cohd_que);
+                /* initiate DMA job */
+                cohc->busy = 1;
+                coh901318_desc_submit(cohc, cohd_que);
+                coh901318_prep_linked_list(cohc, cohd_que->data);
+                /* start dma job */
+                coh901318_start(cohc);
+        }
+        return cohd_que;
+}
+static void dma_tasklet(unsigned long data)
+{
+        struct coh901318_chan *cohc = (struct coh901318_chan *) data;
+        struct coh901318_desc *cohd_fin;
+        unsigned long flags;
+        dma_async_tx_callback callback;
+        void *callback_param;
+        spin_lock_irqsave(&cohc->lock, flags);
+        /* get first active entry from list */
+        cohd_fin = coh901318_first_active_get(cohc);
+        BUG_ON(cohd_fin->pending_irqs == 0);
+        if (cohd_fin == NULL)
+                goto err;
+        cohd_fin->pending_irqs--;
+        cohc->completed = cohd_fin->desc.cookie;
+        BUG_ON(cohc->nbr_active_done && cohd_fin == NULL);
+        if (cohc->nbr_active_done == 0)
+                return;
+        if (!cohd_fin->pending_irqs) {
+                /* release the lli allocation*/
+                coh901318_lli_free(&cohc->base->pool, &cohd_fin->data);
+        }
+        dev_vdbg(COHC_2_DEV(cohc), "[%s] chan_id %d pending_irqs %d"
+                 " nbr_active_done %ld\n", __func__,
+                 cohc->id, cohc->pending_irqs, cohc->nbr_active_done);
+        /* callback to client */
+        callback = cohd_fin->desc.callback;
+        callback_param = cohd_fin->desc.callback_param;
+        if (!cohd_fin->pending_irqs) {
+                coh901318_desc_remove(cohd_fin);
+                /* return desc to free-list */
+                coh901318_desc_free(cohc, cohd_fin);
+        }
+        if (cohc->nbr_active_done)
+                cohc->nbr_active_done--;
+        if (cohc->nbr_active_done) {
+                if (cohc_chan_conf(cohc)->priority_high)
+                        tasklet_hi_schedule(&cohc->tasklet);
+                else
+                        tasklet_schedule(&cohc->tasklet);
+        }
+        spin_unlock_irqrestore(&cohc->lock, flags);
+        if (callback)
+                callback(callback_param);
+        return;
+ err:
+        spin_unlock_irqrestore(&cohc->lock, flags);
+        dev_err(COHC_2_DEV(cohc), "[%s] No active dma desc\n", __func__);
+}
+/* called from interrupt context */
+static void dma_tc_handle(struct coh901318_chan *cohc)
+{
+        BUG_ON(!cohc->allocated && (list_empty(&cohc->active) ||
+                                    list_empty(&cohc->queue)));
+        if (!cohc->allocated)
+                return;
+        BUG_ON(cohc->pending_irqs == 0);
+        cohc->pending_irqs--;
+        cohc->nbr_active_done++;
+        if (cohc->pending_irqs == 0 && coh901318_queue_start(cohc) == NULL)
+                cohc->busy = 0;
+        BUG_ON(list_empty(&cohc->active));
+        if (cohc_chan_conf(cohc)->priority_high)
+                tasklet_hi_schedule(&cohc->tasklet);
+        else
+                tasklet_schedule(&cohc->tasklet);
+}
+static irqreturn_t dma_irq_handler(int irq, void *dev_id)
+{
+        u32 status1;
+        u32 status2;
+        int i;
+        int ch;
+        struct coh901318_base *base  = dev_id;
+        struct coh901318_chan *cohc;
+        void __iomem *virtbase = base->virtbase;
+        status1 = readl(virtbase + COH901318_INT_STATUS1);
+        status2 = readl(virtbase + COH901318_INT_STATUS2);
+        if (unlikely(status1 == 0 && status2 == 0)) {
+                dev_warn(base->dev, "spurious DMA IRQ from no channel!\n");
+                return IRQ_HANDLED;
+        }
+        /* TODO: consider handle IRQ in tasklet here to
+         *       minimize interrupt latency */
+        /* Check the first 32 DMA channels for IRQ */
+        while (status1) {
+                /* Find first bit set, return as a number. */
+                i = ffs(status1) - 1;
+                ch = i;
+                cohc = &base->chans[ch];
+                spin_lock(&cohc->lock);
+                /* Mask off this bit */
+                status1 &= ~(1 << i);
+                /* Check the individual channel bits */
+                if (test_bit(i, virtbase + COH901318_BE_INT_STATUS1)) {
+                        dev_crit(COHC_2_DEV(cohc),
+                                 "DMA bus error on channel %d!\n", ch);
+                        BUG_ON(1);
+                        /* Clear BE interrupt */
+                        __set_bit(i, virtbase + COH901318_BE_INT_CLEAR1);
+                } else {
+                        /* Caused by TC, really? */
+                        if (unlikely(!test_bit(i, virtbase +
+                                               COH901318_TC_INT_STATUS1))) {
+                                dev_warn(COHC_2_DEV(cohc),
+                                         "ignoring interrupt not caused by terminal count on channel %d\n", ch);
+                                /* Clear TC interrupt */
+                                BUG_ON(1);
+                                __set_bit(i, virtbase + COH901318_TC_INT_CLEAR1);
+                        } else {
+                                /* Enable powersave if transfer has finished */
+                                if (!(readl(virtbase + COH901318_CX_STAT +
+                                            COH901318_CX_STAT_SPACING*ch) &
+                                      COH901318_CX_STAT_ENABLED)) {
+                                        enable_powersave(cohc);
+                                }
+                                /* Must clear TC interrupt before calling
+                                 * dma_tc_handle
+                                 * in case tc_handle initate a new dma job
+                                 */
+                                __set_bit(i, virtbase + COH901318_TC_INT_CLEAR1);
+                                dma_tc_handle(cohc);
+                        }
+                }
+                spin_unlock(&cohc->lock);
+        }
+        /* Check the remaining 32 DMA channels for IRQ */
+        while (status2) {
+                /* Find first bit set, return as a number. */
+                i = ffs(status2) - 1;
+                ch = i + 32;
+                cohc = &base->chans[ch];
+                spin_lock(&cohc->lock);
+                /* Mask off this bit */
+                status2 &= ~(1 << i);
+                /* Check the individual channel bits */
+                if (test_bit(i, virtbase + COH901318_BE_INT_STATUS2)) {
+                        dev_crit(COHC_2_DEV(cohc),
+                                 "DMA bus error on channel %d!\n", ch);
+                        /* Clear BE interrupt */
+                        BUG_ON(1);
+                        __set_bit(i, virtbase + COH901318_BE_INT_CLEAR2);
+                } else {
+                        /* Caused by TC, really? */
+                        if (unlikely(!test_bit(i, virtbase +
+                                               COH901318_TC_INT_STATUS2))) {
+                                dev_warn(COHC_2_DEV(cohc),
+                                         "ignoring interrupt not caused by terminal count on channel %d\n", ch);
+                                /* Clear TC interrupt */
+                                __set_bit(i, virtbase + COH901318_TC_INT_CLEAR2);
+                                BUG_ON(1);
+                        } else {
+                                /* Enable powersave if transfer has finished */
+                                if (!(readl(virtbase + COH901318_CX_STAT +
+                                            COH901318_CX_STAT_SPACING*ch) &
+                                      COH901318_CX_STAT_ENABLED)) {
+                                        enable_powersave(cohc);
+                                }
+                                /* Must clear TC interrupt before calling
+                                 * dma_tc_handle
+                                 * in case tc_handle initate a new dma job
+                                 */
+                                __set_bit(i, virtbase + COH901318_TC_INT_CLEAR2);
+                                dma_tc_handle(cohc);
+                        }
+                }
+                spin_unlock(&cohc->lock);
+        }
+        return IRQ_HANDLED;
+}
+static int coh901318_alloc_chan_resources(struct dma_chan *chan)
+{
+        struct coh901318_chan   *cohc = to_coh901318_chan(chan);
+        dev_vdbg(COHC_2_DEV(cohc), "[%s] DMA channel %d\n",
+                 __func__, cohc->id);
+        if (chan->client_count > 1)
+                return -EBUSY;
+        coh901318_config(cohc, NULL);
+        cohc->allocated = 1;
+        cohc->completed = chan->cookie = 1;
+        return 1;
+}
+static void
+coh901318_free_chan_resources(struct dma_chan *chan)
+{
+        struct coh901318_chan   *cohc = to_coh901318_chan(chan);
+        int channel = cohc->id;
+        unsigned long flags;
+        spin_lock_irqsave(&cohc->lock, flags);
+        /* Disable HW */
+        writel(0x00000000U, cohc->base->virtbase + COH901318_CX_CFG +
+               COH901318_CX_CFG_SPACING*channel);
+        writel(0x00000000U, cohc->base->virtbase + COH901318_CX_CTRL +
+               COH901318_CX_CTRL_SPACING*channel);
+        cohc->allocated = 0;
+        spin_unlock_irqrestore(&cohc->lock, flags);
+        chan->device->device_terminate_all(chan);
+}
+static dma_cookie_t
+coh901318_tx_submit(struct dma_async_tx_descriptor *tx)
+{
+        struct coh901318_desc *cohd = container_of(tx, struct coh901318_desc,
+                                                   desc);
+        struct coh901318_chan *cohc = to_coh901318_chan(tx->chan);
+        unsigned long flags;
+        spin_lock_irqsave(&cohc->lock, flags);
+        tx->cookie = coh901318_assign_cookie(cohc, cohd);
+        coh901318_desc_queue(cohc, cohd);
+        spin_unlock_irqrestore(&cohc->lock, flags);
+        return tx->cookie;
+}
+static struct dma_async_tx_descriptor *
+coh901318_prep_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
+                      size_t size, unsigned long flags)
+{
+        struct coh901318_lli *data;
+        struct coh901318_desc *cohd;
+        unsigned long flg;
+        struct coh901318_chan *cohc = to_coh901318_chan(chan);
+        int lli_len;
+        u32 ctrl_last = cohc_chan_param(cohc)->ctrl_lli_last;
+        spin_lock_irqsave(&cohc->lock, flg);
+        dev_vdbg(COHC_2_DEV(cohc),
+                 "[%s] channel %d src 0x%x dest 0x%x size %d\n",
+                 __func__, cohc->id, src, dest, size);
+        if (flags & DMA_PREP_INTERRUPT)
+                /* Trigger interrupt after last lli */
+                ctrl_last |= COH901318_CX_CTRL_TC_IRQ_ENABLE;
+        lli_len = size >> MAX_DMA_PACKET_SIZE_SHIFT;
+        if ((lli_len << MAX_DMA_PACKET_SIZE_SHIFT) < size)
+                lli_len++;
+        data = coh901318_lli_alloc(&cohc->base->pool, lli_len);
+        if (data == NULL)
+                goto err;
+        cohd = coh901318_desc_get(cohc);
+        cohd->sg = NULL;
+        cohd->sg_len = 0;
+        cohd->data = data;
+        cohd->pending_irqs =
+                coh901318_lli_fill_memcpy(
+                                &cohc->base->pool, data, src, size, dest,
+                                cohc_chan_param(cohc)->ctrl_lli_chained,
+                                ctrl_last);
+        cohd->flags = flags;
+        COH_DBG(coh901318_list_print(cohc, data));
+        dma_async_tx_descriptor_init(&cohd->desc, chan);
+        cohd->desc.tx_submit = coh901318_tx_submit;
+        spin_unlock_irqrestore(&cohc->lock, flg);
+        return &cohd->desc;
+ err:
+        spin_unlock_irqrestore(&cohc->lock, flg);
+        return NULL;
+}
+static struct dma_async_tx_descriptor *
+coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
+                        unsigned int sg_len, enum dma_data_direction direction,
+                        unsigned long flags)
+{
+        struct coh901318_chan *cohc = to_coh901318_chan(chan);
+        struct coh901318_lli *data;
+        struct coh901318_desc *cohd;
+        struct scatterlist *sg;
+        int len = 0;
+        int size;
+        int i;
+        u32 ctrl_chained = cohc_chan_param(cohc)->ctrl_lli_chained;
+        u32 ctrl = cohc_chan_param(cohc)->ctrl_lli;
+        u32 ctrl_last = cohc_chan_param(cohc)->ctrl_lli_last;
+        unsigned long flg;
+        if (!sgl)
+                goto out;
+        if (sgl->length == 0)
+                goto out;
+        spin_lock_irqsave(&cohc->lock, flg);
+        dev_vdbg(COHC_2_DEV(cohc), "[%s] sg_len %d dir %d\n",
+                 __func__, sg_len, direction);
+        if (flags & DMA_PREP_INTERRUPT)
+                /* Trigger interrupt after last lli */
+                ctrl_last |= COH901318_CX_CTRL_TC_IRQ_ENABLE;
+        cohd = coh901318_desc_get(cohc);
+        cohd->sg = NULL;
+        cohd->sg_len = 0;
+        cohd->dir = direction;
+        if (direction == DMA_TO_DEVICE) {
+                u32 tx_flags = COH901318_CX_CTRL_PRDD_SOURCE |
+                        COH901318_CX_CTRL_SRC_ADDR_INC_ENABLE;
+                ctrl_chained |= tx_flags;
+                ctrl_last |= tx_flags;
+                ctrl |= tx_flags;
+        } else if (direction == DMA_FROM_DEVICE) {
+                u32 rx_flags = COH901318_CX_CTRL_PRDD_DEST |
+                        COH901318_CX_CTRL_DST_ADDR_INC_ENABLE;
+                ctrl_chained |= rx_flags;
+                ctrl_last |= rx_flags;
+                ctrl |= rx_flags;
+        } else
+                goto err_direction;
+        dma_async_tx_descriptor_init(&cohd->desc, chan);
+        cohd->desc.tx_submit = coh901318_tx_submit;
+        /* The dma only supports transmitting packages up to
+         * MAX_DMA_PACKET_SIZE. Calculate to total number of
+         * dma elemts required to send the entire sg list
+         */
+        for_each_sg(sgl, sg, sg_len, i) {
+                unsigned int factor;
+                size = sg_dma_len(sg);
+                if (size <= MAX_DMA_PACKET_SIZE) {
+                        len++;
+                        continue;
+                }
+                factor = size >> MAX_DMA_PACKET_SIZE_SHIFT;
+                if ((factor << MAX_DMA_PACKET_SIZE_SHIFT) < size)
+                        factor++;
+                len += factor;
+        }
+        data = coh901318_lli_alloc(&cohc->base->pool, len);
+        if (data == NULL)
+                goto err_dma_alloc;
+        /* initiate allocated data list */
+        cohd->pending_irqs =
+                coh901318_lli_fill_sg(&cohc->base->pool, data, sgl, sg_len,
+                                      cohc_dev_addr(cohc),
+                                      ctrl_chained,
+                                      ctrl,
+                                      ctrl_last,
+                                      direction, COH901318_CX_CTRL_TC_IRQ_ENABLE);
+        cohd->data = data;
+        cohd->flags = flags;
+        COH_DBG(coh901318_list_print(cohc, data));
+        spin_unlock_irqrestore(&cohc->lock, flg);
+        return &cohd->desc;
+ err_dma_alloc:
+ err_direction:
+        coh901318_desc_remove(cohd);
+        coh901318_desc_free(cohc, cohd);
+        spin_unlock_irqrestore(&cohc->lock, flg);
+ out:
+        return NULL;
+}
+static enum dma_status
+coh901318_is_tx_complete(struct dma_chan *chan,
+                         dma_cookie_t cookie, dma_cookie_t *done,
+                         dma_cookie_t *used)
+{
+        struct coh901318_chan *cohc = to_coh901318_chan(chan);
+        dma_cookie_t last_used;
+        dma_cookie_t last_complete;
+        int ret;
+        last_complete = cohc->completed;
+        last_used = chan->cookie;
+        ret = dma_async_is_complete(cookie, last_complete, last_used);
+        if (done)
+                *done = last_complete;
+        if (used)
+                *used = last_used;
+        return ret;
+}
+static void
+coh901318_issue_pending(struct dma_chan *chan)
+{
+        struct coh901318_chan *cohc = to_coh901318_chan(chan);
+        unsigned long flags;
+        spin_lock_irqsave(&cohc->lock, flags);
+        /* Busy means that pending jobs are already being processed */
+        if (!cohc->busy)
+                coh901318_queue_start(cohc);
+        spin_unlock_irqrestore(&cohc->lock, flags);
+}
+static void
+coh901318_terminate_all(struct dma_chan *chan)
+{
+        unsigned long flags;
+        struct coh901318_chan *cohc = to_coh901318_chan(chan);
+        struct coh901318_desc *cohd;
+        void __iomem *virtbase = cohc->base->virtbase;
+        coh901318_stop(chan);
+        spin_lock_irqsave(&cohc->lock, flags);
+        /* Clear any pending BE or TC interrupt */
+        if (cohc->id < 32) {
+                writel(1 << cohc->id, virtbase + COH901318_BE_INT_CLEAR1);
+                writel(1 << cohc->id, virtbase + COH901318_TC_INT_CLEAR1);
+        } else {
+                writel(1 << (cohc->id - 32), virtbase +
+                       COH901318_BE_INT_CLEAR2);
+                writel(1 << (cohc->id - 32), virtbase +
+                       COH901318_TC_INT_CLEAR2);
+        }
+        enable_powersave(cohc);
+        while ((cohd = coh901318_first_active_get(cohc))) {
+                /* release the lli allocation*/
+                coh901318_lli_free(&cohc->base->pool, &cohd->data);
+                coh901318_desc_remove(cohd);
+                /* return desc to free-list */
+                coh901318_desc_free(cohc, cohd);
+        }
+        while ((cohd = coh901318_first_queued(cohc))) {
+                /* release the lli allocation*/
+                coh901318_lli_free(&cohc->base->pool, &cohd->data);
+                coh901318_desc_remove(cohd);
+                /* return desc to free-list */
+                coh901318_desc_free(cohc, cohd);
+        }
+        cohc->nbr_active_done = 0;
+        cohc->busy = 0;
+        cohc->pending_irqs = 0;
+        spin_unlock_irqrestore(&cohc->lock, flags);
+}
+void coh901318_base_init(struct dma_device *dma, const int *pick_chans,
+                         struct coh901318_base *base)
+{
+        int chans_i;
+        int i = 0;
+        struct coh901318_chan *cohc;
+        INIT_LIST_HEAD(&dma->channels);
+        for (chans_i = 0; pick_chans[chans_i] != -1; chans_i += 2) {
+                for (i = pick_chans[chans_i]; i <= pick_chans[chans_i+1]; i++) {
+                        cohc = &base->chans[i];
+                        cohc->base = base;
+                        cohc->chan.device = dma;
+                        cohc->id = i;
+                        /* TODO: do we really need this lock if only one
+                         * client is connected to each channel?
+                         */
+                        spin_lock_init(&cohc->lock);
+                        cohc->pending_irqs = 0;
+                        cohc->nbr_active_done = 0;
+                        cohc->busy = 0;
+                        INIT_LIST_HEAD(&cohc->free);
+                        INIT_LIST_HEAD(&cohc->active);
+                        INIT_LIST_HEAD(&cohc->queue);
+                        tasklet_init(&cohc->tasklet, dma_tasklet,
+                                     (unsigned long) cohc);
+                        list_add_tail(&cohc->chan.device_node,
+                                      &dma->channels);
+                }
+        }
+}
+static int __init coh901318_probe(struct platform_device *pdev)
+{
+        int err = 0;
+        struct coh901318_platform *pdata;
+        struct coh901318_base *base;
+        int irq;
+        struct resource *io;
+        io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!io)
+                goto err_get_resource;
+        /* Map DMA controller registers to virtual memory */
+        if (request_mem_region(io->start,
+                               resource_size(io),
+                               pdev->dev.driver->name) == NULL) {
+                err = -EBUSY;
+                goto err_request_mem;
+        }
+        pdata = pdev->dev.platform_data;
+        if (!pdata)
+                goto err_no_platformdata;
+        base = kmalloc(ALIGN(sizeof(struct coh901318_base), 4) +
+                       pdata->max_channels *
+                       sizeof(struct coh901318_chan),
+                       GFP_KERNEL);
+        if (!base)
+                goto err_alloc_coh_dma_channels;
+        base->chans = ((void *)base) + ALIGN(sizeof(struct coh901318_base), 4);
+        base->virtbase = ioremap(io->start, resource_size(io));
+        if (!base->virtbase) {
+                err = -ENOMEM;
+                goto err_no_ioremap;
+        }
+        base->dev = &pdev->dev;
+        base->platform = pdata;
+        spin_lock_init(&base->pm.lock);
+        base->pm.started_channels = 0;
+        COH901318_DEBUGFS_ASSIGN(debugfs_dma_base, base);
+        platform_set_drvdata(pdev, base);
+        irq = platform_get_irq(pdev, 0);
+        if (irq < 0)
+                goto err_no_irq;
+        err = request_irq(irq, dma_irq_handler, IRQF_DISABLED,
+                          "coh901318", base);
+        if (err) {
+                dev_crit(&pdev->dev,
+                         "Cannot allocate IRQ for DMA controller!\n");
+                goto err_request_irq;
+        }
+        err = coh901318_pool_create(&base->pool, &pdev->dev,
+                                    sizeof(struct coh901318_lli),
+                                    32);
+        if (err)
+                goto err_pool_create;
+        /* init channels for device transfers */
+        coh901318_base_init(&base->dma_slave,  base->platform->chans_slave,
+                            base);
+        dma_cap_zero(base->dma_slave.cap_mask);
+        dma_cap_set(DMA_SLAVE, base->dma_slave.cap_mask);
+        base->dma_slave.device_alloc_chan_resources = coh901318_alloc_chan_resources;
+        base->dma_slave.device_free_chan_resources = coh901318_free_chan_resources;
+        base->dma_slave.device_prep_slave_sg = coh901318_prep_slave_sg;
+        base->dma_slave.device_is_tx_complete = coh901318_is_tx_complete;
+        base->dma_slave.device_issue_pending = coh901318_issue_pending;
+        base->dma_slave.device_terminate_all = coh901318_terminate_all;
+        base->dma_slave.dev = &pdev->dev;
+        err = dma_async_device_register(&base->dma_slave);
+        if (err)
+                goto err_register_slave;
+        /* init channels for memcpy */
+        coh901318_base_init(&base->dma_memcpy, base->platform->chans_memcpy,
+                            base);
+        dma_cap_zero(base->dma_memcpy.cap_mask);
+        dma_cap_set(DMA_MEMCPY, base->dma_memcpy.cap_mask);
+        base->dma_memcpy.device_alloc_chan_resources = coh901318_alloc_chan_resources;
+        base->dma_memcpy.device_free_chan_resources = coh901318_free_chan_resources;
+        base->dma_memcpy.device_prep_dma_memcpy = coh901318_prep_memcpy;
+        base->dma_memcpy.device_is_tx_complete = coh901318_is_tx_complete;
+        base->dma_memcpy.device_issue_pending = coh901318_issue_pending;
+        base->dma_memcpy.device_terminate_all = coh901318_terminate_all;
+        base->dma_memcpy.dev = &pdev->dev;
+        err = dma_async_device_register(&base->dma_memcpy);
+        if (err)
+                goto err_register_memcpy;
+        dev_dbg(&pdev->dev, "Initialized COH901318 DMA on virtual base 0x%08x\n",
+                (u32) base->virtbase);
+        return err;
+ err_register_memcpy:
+        dma_async_device_unregister(&base->dma_slave);
+ err_register_slave:
+        coh901318_pool_destroy(&base->pool);
+ err_pool_create:
+        free_irq(platform_get_irq(pdev, 0), base);
+ err_request_irq:
+ err_no_irq:
+        iounmap(base->virtbase);
+ err_no_ioremap:
+        kfree(base);
+ err_alloc_coh_dma_channels:
+ err_no_platformdata:
+        release_mem_region(pdev->resource->start,
+                           resource_size(pdev->resource));
+ err_request_mem:
+ err_get_resource:
+        return err;
+}
+static int __exit coh901318_remove(struct platform_device *pdev)
+{
+        struct coh901318_base *base = platform_get_drvdata(pdev);
+        dma_async_device_unregister(&base->dma_memcpy);
+        dma_async_device_unregister(&base->dma_slave);
+        coh901318_pool_destroy(&base->pool);
+        free_irq(platform_get_irq(pdev, 0), base);
+        kfree(base);
+        iounmap(base->virtbase);
+        release_mem_region(pdev->resource->start,
+                           resource_size(pdev->resource));
+        return 0;
+}
+static struct platform_driver coh901318_driver = {
+        .remove = __exit_p(coh901318_remove),
+        .driver = {
+                .name   = "coh901318",
+        },
+};
+int __init coh901318_init(void)
+{
+        return platform_driver_probe(&coh901318_driver, coh901318_probe);
+}
+subsys_initcall(coh901318_init);
+void __exit coh901318_exit(void)
+{
+        platform_driver_unregister(&coh901318_driver);
+}
+module_exit(coh901318_exit);
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Per Friden");
diff --git a/drivers/dma/coh901318_lli.c b/drivers/dma/coh901318_lli.c
new file mode 100644
index 000000000000..f5120f238a4d
--- /dev/null
+++ b/drivers/dma/coh901318_lli.c
@@ -0,0 +1,318 @@
+/*
+ * driver/dma/coh901318_lli.c
+ *
+ * Copyright (C) 2007-2009 ST-Ericsson
+ * License terms: GNU General Public License (GPL) version 2
+ * Support functions for handling lli for dma
+ * Author: Per Friden <per.friden@stericsson.com>
+ */
+#include <linux/dma-mapping.h>
+#include <linux/spinlock.h>
+#include <linux/dmapool.h>
+#include <linux/memory.h>
+#include <mach/coh901318.h>
+#include "coh901318_lli.h"
+#if (defined(CONFIG_DEBUG_FS) && defined(CONFIG_U300_DEBUG))
+#define DEBUGFS_POOL_COUNTER_RESET(pool) (pool->debugfs_pool_counter = 0)
+#define DEBUGFS_POOL_COUNTER_ADD(pool, add) (pool->debugfs_pool_counter += add)
+#else
+#define DEBUGFS_POOL_COUNTER_RESET(pool)
+#define DEBUGFS_POOL_COUNTER_ADD(pool, add)
+#endif
+static struct coh901318_lli *
+coh901318_lli_next(struct coh901318_lli *data)
+{
+        if (data == NULL || data->link_addr == 0)
+                return NULL;
+        return (struct coh901318_lli *) data->virt_link_addr;
+}
+int coh901318_pool_create(struct coh901318_pool *pool,
+                          struct device *dev,
+                          size_t size, size_t align)
+{
+        spin_lock_init(&pool->lock);
+        pool->dev = dev;
+        pool->dmapool = dma_pool_create("lli_pool", dev, size, align, 0);
+        DEBUGFS_POOL_COUNTER_RESET(pool);
+        return 0;
+}
+int coh901318_pool_destroy(struct coh901318_pool *pool)
+{
+        dma_pool_destroy(pool->dmapool);
+        return 0;
+}
+struct coh901318_lli *
+coh901318_lli_alloc(struct coh901318_pool *pool, unsigned int len)
+{
+        int i;
+        struct coh901318_lli *head;
+        struct coh901318_lli *lli;
+        struct coh901318_lli *lli_prev;
+        dma_addr_t phy;
+        if (len == 0)
+                goto err;
+        spin_lock(&pool->lock);
+        head = dma_pool_alloc(pool->dmapool, GFP_NOWAIT, &phy);
+        if (head == NULL)
+                goto err;
+        DEBUGFS_POOL_COUNTER_ADD(pool, 1);
+        lli = head;
+        lli->phy_this = phy;
+        for (i = 1; i < len; i++) {
+                lli_prev = lli;
+                lli = dma_pool_alloc(pool->dmapool, GFP_NOWAIT, &phy);
+                if (lli == NULL)
+                        goto err_clean_up;
+                DEBUGFS_POOL_COUNTER_ADD(pool, 1);
+                lli->phy_this = phy;
+                lli_prev->link_addr = phy;
+                lli_prev->virt_link_addr = lli;
+        }
+        lli->link_addr = 0x00000000U;
+        spin_unlock(&pool->lock);
+        return head;
+ err:
+        spin_unlock(&pool->lock);
+        return NULL;
+ err_clean_up:
+        lli_prev->link_addr = 0x00000000U;
+        spin_unlock(&pool->lock);
+        coh901318_lli_free(pool, &head);
+        return NULL;
+}
+void coh901318_lli_free(struct coh901318_pool *pool,
+                        struct coh901318_lli **lli)
+{
+        struct coh901318_lli *l;
+        struct coh901318_lli *next;
+        if (lli == NULL)
+                return;
+        l = *lli;
+        if (l == NULL)
+                return;
+        spin_lock(&pool->lock);
+        while (l->link_addr) {
+                next = l->virt_link_addr;
+                dma_pool_free(pool->dmapool, l, l->phy_this);
+                DEBUGFS_POOL_COUNTER_ADD(pool, -1);
+                l = next;
+        }
+        dma_pool_free(pool->dmapool, l, l->phy_this);
+        DEBUGFS_POOL_COUNTER_ADD(pool, -1);
+        spin_unlock(&pool->lock);
+        *lli = NULL;
+}
+int
+coh901318_lli_fill_memcpy(struct coh901318_pool *pool,
+                          struct coh901318_lli *lli,
+                          dma_addr_t source, unsigned int size,
+                          dma_addr_t destination, u32 ctrl_chained,
+                          u32 ctrl_eom)
+{
+        int s = size;
+        dma_addr_t src = source;
+        dma_addr_t dst = destination;
+        lli->src_addr = src;
+        lli->dst_addr = dst;
+        while (lli->link_addr) {
+                lli->control = ctrl_chained | MAX_DMA_PACKET_SIZE;
+                lli->src_addr = src;
+                lli->dst_addr = dst;
+                s -= MAX_DMA_PACKET_SIZE;
+                lli = coh901318_lli_next(lli);
+                src += MAX_DMA_PACKET_SIZE;
+                dst += MAX_DMA_PACKET_SIZE;
+        }
+        lli->control = ctrl_eom | s;
+        lli->src_addr = src;
+        lli->dst_addr = dst;
+        /* One irq per single transfer */
+        return 1;
+}
+int
+coh901318_lli_fill_single(struct coh901318_pool *pool,
+                          struct coh901318_lli *lli,
+                          dma_addr_t buf, unsigned int size,
+                          dma_addr_t dev_addr, u32 ctrl_chained, u32 ctrl_eom,
+                          enum dma_data_direction dir)
+{
+        int s = size;
+        dma_addr_t src;
+        dma_addr_t dst;
+        if (dir == DMA_TO_DEVICE) {
+                src = buf;
+                dst = dev_addr;
+        } else if (dir == DMA_FROM_DEVICE) {
+                src = dev_addr;
+                dst = buf;
+        } else {
+                return -EINVAL;
+        }
+        while (lli->link_addr) {
+                size_t block_size = MAX_DMA_PACKET_SIZE;
+                lli->control = ctrl_chained | MAX_DMA_PACKET_SIZE;
+                /* If we are on the next-to-final block and there will
+                 * be less than half a DMA packet left for the last
+                 * block, then we want to make this block a little
+                 * smaller to balance the sizes. This is meant to
+                 * avoid too small transfers if the buffer size is
+                 * (MAX_DMA_PACKET_SIZE*N + 1) */
+                if (s < (MAX_DMA_PACKET_SIZE + MAX_DMA_PACKET_SIZE/2))
+                        block_size = MAX_DMA_PACKET_SIZE/2;
+                s -= block_size;
+                lli->src_addr = src;
+                lli->dst_addr = dst;
+                lli = coh901318_lli_next(lli);
+                if (dir == DMA_TO_DEVICE)
+                        src += block_size;
+                else if (dir == DMA_FROM_DEVICE)
+                        dst += block_size;
+        }
+        lli->control = ctrl_eom | s;
+        lli->src_addr = src;
+        lli->dst_addr = dst;
+        /* One irq per single transfer */
+        return 1;
+}
+int
+coh901318_lli_fill_sg(struct coh901318_pool *pool,
+                      struct coh901318_lli *lli,
+                      struct scatterlist *sgl, unsigned int nents,
+                      dma_addr_t dev_addr, u32 ctrl_chained, u32 ctrl,
+                      u32 ctrl_last,
+                      enum dma_data_direction dir, u32 ctrl_irq_mask)
+{
+        int i;
+        struct scatterlist *sg;
+        u32 ctrl_sg;
+        dma_addr_t src = 0;
+        dma_addr_t dst = 0;
+        int nbr_of_irq = 0;
+        u32 bytes_to_transfer;
+        u32 elem_size;
+        if (lli == NULL)
+                goto err;
+        spin_lock(&pool->lock);
+        if (dir == DMA_TO_DEVICE)
+                dst = dev_addr;
+        else if (dir == DMA_FROM_DEVICE)
+                src = dev_addr;
+        else
+                goto err;
+        for_each_sg(sgl, sg, nents, i) {
+                if (sg_is_chain(sg)) {
+                        /* sg continues to the next sg-element don't
+                         * send ctrl_finish until the last
+                         * sg-element in the chain
+                         */
+                        ctrl_sg = ctrl_chained;
+                } else if (i == nents - 1)
+                        ctrl_sg = ctrl_last;
+                else
+                        ctrl_sg = ctrl ? ctrl : ctrl_last;
+                if ((ctrl_sg & ctrl_irq_mask))
+                        nbr_of_irq++;
+                if (dir == DMA_TO_DEVICE)
+                        /* increment source address */
+                        src = sg_dma_address(sg);
+                else
+                        /* increment destination address */
+                        dst =  sg_dma_address(sg);
+                bytes_to_transfer = sg_dma_len(sg);
+                while (bytes_to_transfer) {
+                        u32 val;
+                        if (bytes_to_transfer > MAX_DMA_PACKET_SIZE) {
+                                elem_size = MAX_DMA_PACKET_SIZE;
+                                val = ctrl_chained;
+                        } else {
+                                elem_size = bytes_to_transfer;
+                                val = ctrl_sg;
+                        }
+                        lli->control = val | elem_size;
+                        lli->src_addr = src;
+                        lli->dst_addr = dst;
+                        if (dir == DMA_FROM_DEVICE)
+                                dst += elem_size;
+                        else
+                                src += elem_size;
+                        BUG_ON(lli->link_addr & 3);
+                        bytes_to_transfer -= elem_size;
+                        lli = coh901318_lli_next(lli);
+                }
+        }
+        spin_unlock(&pool->lock);
+        /* There can be many IRQs per sg transfer */
+        return nbr_of_irq;
+ err:
+        spin_unlock(&pool->lock);
+        return -EINVAL;
+}
diff --git a/drivers/dma/coh901318_lli.h b/drivers/dma/coh901318_lli.h
new file mode 100644
index 000000000000..7bf713b79c6b
--- /dev/null
+++ b/drivers/dma/coh901318_lli.h
@@ -0,0 +1,124 @@
+/*
+ * driver/dma/coh901318_lli.h
+ *
+ * Copyright (C) 2007-2009 ST-Ericsson
+ * License terms: GNU General Public License (GPL) version 2
+ * Support functions for handling lli for coh901318
+ * Author: Per Friden <per.friden@stericsson.com>
+ */
+#ifndef COH901318_LLI_H
+#define COH901318_LLI_H
+#include <mach/coh901318.h>
+struct device;
+struct coh901318_pool {
+        spinlock_t lock;
+        struct dma_pool *dmapool;
+        struct device *dev;
+#ifdef CONFIG_DEBUG_FS
+        int debugfs_pool_counter;
+#endif
+};
+struct device;
+/**
+ * coh901318_pool_create() - Creates an dma pool for lli:s
+ * @pool: pool handle
+ * @dev: dma device
+ * @lli_nbr: number of lli:s in the pool
+ * @algin: adress alignemtn of lli:s
+ * returns 0 on success otherwise none zero
+ */
+int coh901318_pool_create(struct coh901318_pool *pool,
+                          struct device *dev,
+                          size_t lli_nbr, size_t align);
+/**
+ * coh901318_pool_destroy() - Destroys the dma pool
+ * @pool: pool handle
+ * returns 0 on success otherwise none zero
+ */
+int coh901318_pool_destroy(struct coh901318_pool *pool);
+/**
+ * coh901318_lli_alloc() - Allocates a linked list
+ *
+ * @pool: pool handle
+ * @len: length to list
+ * return: none NULL if success otherwise NULL
+ */
+struct coh901318_lli *
+coh901318_lli_alloc(struct coh901318_pool *pool,
+                    unsigned int len);
+/**
+ * coh901318_lli_free() - Returns the linked list items to the pool
+ * @pool: pool handle
+ * @lli: reference to lli pointer to be freed
+ */
+void coh901318_lli_free(struct coh901318_pool *pool,
+                        struct coh901318_lli **lli);
+/**
+ * coh901318_lli_fill_memcpy() - Prepares the lli:s for dma memcpy
+ * @pool: pool handle
+ * @lli: allocated lli
+ * @src: src address
+ * @size: transfer size
+ * @dst: destination address
+ * @ctrl_chained: ctrl for chained lli
+ * @ctrl_last: ctrl for the last lli
+ * returns number of CPU interrupts for the lli, negative on error.
+ */
+int
+coh901318_lli_fill_memcpy(struct coh901318_pool *pool,
+                          struct coh901318_lli *lli,
+                          dma_addr_t src, unsigned int size,
+                          dma_addr_t dst, u32 ctrl_chained, u32 ctrl_last);
+/**
+ * coh901318_lli_fill_single() - Prepares the lli:s for dma single transfer
+ * @pool: pool handle
+ * @lli: allocated lli
+ * @buf: transfer buffer
+ * @size: transfer size
+ * @dev_addr: address of periphal
+ * @ctrl_chained: ctrl for chained lli
+ * @ctrl_last: ctrl for the last lli
+ * @dir: direction of transfer (to or from device)
+ * returns number of CPU interrupts for the lli, negative on error.
+ */
+int
+coh901318_lli_fill_single(struct coh901318_pool *pool,
+                          struct coh901318_lli *lli,
+                          dma_addr_t buf, unsigned int size,
+                          dma_addr_t dev_addr, u32 ctrl_chained, u32 ctrl_last,
+                          enum dma_data_direction dir);
+/**
+ * coh901318_lli_fill_single() - Prepares the lli:s for dma scatter list transfer
+ * @pool: pool handle
+ * @lli: allocated lli
+ * @sg: scatter gather list
+ * @nents: number of entries in sg
+ * @dev_addr: address of periphal
+ * @ctrl_chained: ctrl for chained lli
+ * @ctrl: ctrl of middle lli
+ * @ctrl_last: ctrl for the last lli
+ * @dir: direction of transfer (to or from device)
+ * @ctrl_irq_mask: ctrl mask for CPU interrupt
+ * returns number of CPU interrupts for the lli, negative on error.
+ */
+int
+coh901318_lli_fill_sg(struct coh901318_pool *pool,
+                      struct coh901318_lli *lli,
+                      struct scatterlist *sg, unsigned int nents,
+                      dma_addr_t dev_addr, u32 ctrl_chained,
+                      u32 ctrl, u32 ctrl_last,
+                      enum dma_data_direction dir, u32 ctrl_irq_mask);
+#endif /* COH901318_LLI_H */
diff --git a/drivers/dma/dmatest.c b/drivers/dma/dmatest.c
index a32a4cf7b1e0..8b905161fbf4 100644
--- a/drivers/dma/dmatest.c
+++ b/drivers/dma/dmatest.c
@@ -298,10 +298,6 @@ static int dmatest_func(void *data)
                total_tests++;
-                len = dmatest_random() % test_buf_size + 1;
-                src_off = dmatest_random() % (test_buf_size - len + 1);
-                dst_off = dmatest_random() % (test_buf_size - len + 1);
                /* honor alignment restrictions */
                if (thread->type == DMA_MEMCPY)
                        align = dev->copy_align;
@@ -310,7 +306,19 @@ static int dmatest_func(void *data)
                else if (thread->type == DMA_PQ)
                        align = dev->pq_align;
+                if (1 << align > test_buf_size) {
+                        pr_err("%u-byte buffer too small for %d-byte alignment\n",
+                               test_buf_size, 1 << align);
+                        break;
+                }
+                len = dmatest_random() % test_buf_size + 1;
                len = (len >> align) << align;
+                if (!len)
+                        len = 1 << align;
+                src_off = dmatest_random() % (test_buf_size - len + 1);
+                dst_off = dmatest_random() % (test_buf_size - len + 1);
                src_off = (src_off >> align) << align;
                dst_off = (dst_off >> align) << align;
diff --git a/drivers/dma/iop-adma.c b/drivers/dma/iop-adma.c
index 645ca8d54ec4..ca6e6a0cb793 100644
--- a/drivers/dma/iop-adma.c
+++ b/drivers/dma/iop-adma.c
@@ -1470,7 +1470,7 @@ static int __devinit iop_adma_probe(struct platform_device *pdev)
                return -ENODEV;
        if (!devm_request_mem_region(&pdev->dev, res->start,
-                                res->end - res->start, pdev->name))
+                                resource_size(res), pdev->name))
                return -EBUSY;
        adev = kzalloc(sizeof(*adev), GFP_KERNEL);
@@ -1542,7 +1542,7 @@ static int __devinit iop_adma_probe(struct platform_device *pdev)
        iop_chan->device = adev;
        iop_chan->mmr_base = devm_ioremap(&pdev->dev, res->start,
-                                        res->end - res->start);
+                                        resource_size(res));
        if (!iop_chan->mmr_base) {
                ret = -ENOMEM;
                goto err_free_iop_chan;
diff --git a/drivers/dma/ppc4xx/Makefile b/drivers/dma/ppc4xx/Makefile
new file mode 100644
index 000000000000..b3d259b3e52a
--- /dev/null
+++ b/drivers/dma/ppc4xx/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_AMCC_PPC440SPE_ADMA) += adma.o
diff --git a/drivers/dma/ppc4xx/adma.c b/drivers/dma/ppc4xx/adma.c
new file mode 100644
index 000000000000..0a3478e910f0
--- /dev/null
+++ b/drivers/dma/ppc4xx/adma.c
@@ -0,0 +1,5027 @@
+/*
+ * Copyright (C) 2006-2009 DENX Software Engineering.
+ *
+ * Author: Yuri Tikhonov <yur@emcraft.com>
+ *
+ * Further porting to arch/powerpc by
+ *      Anatolij Gustschin <agust@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59
+ * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called COPYING.
+ */
+/*
+ * This driver supports the asynchrounous DMA copy and RAID engines available
+ * on the AMCC PPC440SPe Processors.
+ * Based on the Intel Xscale(R) family of I/O Processors (IOP 32x, 33x, 134x)
+ * ADMA driver written by D.Williams.
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/async_tx.h>
+#include <linux/delay.h>
+#include <linux/dma-mapping.h>
+#include <linux/spinlock.h>
+#include <linux/interrupt.h>
+#include <linux/uaccess.h>
+#include <linux/proc_fs.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <asm/dcr.h>
+#include <asm/dcr-regs.h>
+#include "adma.h"
+enum ppc_adma_init_code {
+        PPC_ADMA_INIT_OK = 0,
+        PPC_ADMA_INIT_MEMRES,
+        PPC_ADMA_INIT_MEMREG,
+        PPC_ADMA_INIT_ALLOC,
+        PPC_ADMA_INIT_COHERENT,
+        PPC_ADMA_INIT_CHANNEL,
+        PPC_ADMA_INIT_IRQ1,
+        PPC_ADMA_INIT_IRQ2,
+        PPC_ADMA_INIT_REGISTER
+};
+static char *ppc_adma_errors[] = {
+        [PPC_ADMA_INIT_OK] = "ok",
+        [PPC_ADMA_INIT_MEMRES] = "failed to get memory resource",
+        [PPC_ADMA_INIT_MEMREG] = "failed to request memory region",
+        [PPC_ADMA_INIT_ALLOC] = "failed to allocate memory for adev "
+                                "structure",
+        [PPC_ADMA_INIT_COHERENT] = "failed to allocate coherent memory for "
+                                   "hardware descriptors",
+        [PPC_ADMA_INIT_CHANNEL] = "failed to allocate memory for channel",
+        [PPC_ADMA_INIT_IRQ1] = "failed to request first irq",
+        [PPC_ADMA_INIT_IRQ2] = "failed to request second irq",
+        [PPC_ADMA_INIT_REGISTER] = "failed to register dma async device",
+};
+static enum ppc_adma_init_code
+ppc440spe_adma_devices[PPC440SPE_ADMA_ENGINES_NUM];
+struct ppc_dma_chan_ref {
+        struct dma_chan *chan;
+        struct list_head node;
+};
+/* The list of channels exported by ppc440spe ADMA */
+struct list_head
+ppc440spe_adma_chan_list = LIST_HEAD_INIT(ppc440spe_adma_chan_list);
+/* This flag is set when want to refetch the xor chain in the interrupt
+ * handler
+ */
+static u32 do_xor_refetch;
+/* Pointer to DMA0, DMA1 CP/CS FIFO */
+static void *ppc440spe_dma_fifo_buf;
+/* Pointers to last submitted to DMA0, DMA1 CDBs */
+static struct ppc440spe_adma_desc_slot *chan_last_sub[3];
+static struct ppc440spe_adma_desc_slot *chan_first_cdb[3];
+/* Pointer to last linked and submitted xor CB */
+static struct ppc440spe_adma_desc_slot *xor_last_linked;
+static struct ppc440spe_adma_desc_slot *xor_last_submit;
+/* This array is used in data-check operations for storing a pattern */
+static char ppc440spe_qword[16];
+static atomic_t ppc440spe_adma_err_irq_ref;
+static dcr_host_t ppc440spe_mq_dcr_host;
+static unsigned int ppc440spe_mq_dcr_len;
+/* Since RXOR operations use the common register (MQ0_CF2H) for setting-up
+ * the block size in transactions, then we do not allow to activate more than
+ * only one RXOR transactions simultaneously. So use this var to store
+ * the information about is RXOR currently active (PPC440SPE_RXOR_RUN bit is
+ * set) or not (PPC440SPE_RXOR_RUN is clear).
+ */
+static unsigned long ppc440spe_rxor_state;
+/* These are used in enable & check routines
+ */
+static u32 ppc440spe_r6_enabled;
+static struct ppc440spe_adma_chan *ppc440spe_r6_tchan;
+static struct completion ppc440spe_r6_test_comp;
+static int ppc440spe_adma_dma2rxor_prep_src(
+                struct ppc440spe_adma_desc_slot *desc,
+                struct ppc440spe_rxor *cursor, int index,
+                int src_cnt, u32 addr);
+static void ppc440spe_adma_dma2rxor_set_src(
+                struct ppc440spe_adma_desc_slot *desc,
+                int index, dma_addr_t addr);
+static void ppc440spe_adma_dma2rxor_set_mult(
+                struct ppc440spe_adma_desc_slot *desc,
+                int index, u8 mult);
+#ifdef ADMA_LL_DEBUG
+#define ADMA_LL_DBG(x) ({ if (1) x; 0; })
+#else
+#define ADMA_LL_DBG(x) ({ if (0) x; 0; })
+#endif
+static void print_cb(struct ppc440spe_adma_chan *chan, void *block)
+{
+        struct dma_cdb *cdb;
+        struct xor_cb *cb;
+        int i;
+        switch (chan->device->id) {
+        case 0:
+        case 1:
+                cdb = block;
+                pr_debug("CDB at %p [%d]:\n"
+                        "\t attr 0x%02x opc 0x%02x cnt 0x%08x\n"
+                        "\t sg1u 0x%08x sg1l 0x%08x\n"
+                        "\t sg2u 0x%08x sg2l 0x%08x\n"
+                        "\t sg3u 0x%08x sg3l 0x%08x\n",
+                        cdb, chan->device->id,
+                        cdb->attr, cdb->opc, le32_to_cpu(cdb->cnt),
+                        le32_to_cpu(cdb->sg1u), le32_to_cpu(cdb->sg1l),
+                        le32_to_cpu(cdb->sg2u), le32_to_cpu(cdb->sg2l),
+                        le32_to_cpu(cdb->sg3u), le32_to_cpu(cdb->sg3l)
+                );
+                break;
+        case 2:
+                cb = block;
+                pr_debug("CB at %p [%d]:\n"
+                        "\t cbc 0x%08x cbbc 0x%08x cbs 0x%08x\n"
+                        "\t cbtah 0x%08x cbtal 0x%08x\n"
+                        "\t cblah 0x%08x cblal 0x%08x\n",
+                        cb, chan->device->id,
+                        cb->cbc, cb->cbbc, cb->cbs,
+                        cb->cbtah, cb->cbtal,
+                        cb->cblah, cb->cblal);
+                for (i = 0; i < 16; i++) {
+                        if (i && !cb->ops[i].h && !cb->ops[i].l)
+                                continue;
+                        pr_debug("\t ops[%2d]: h 0x%08x l 0x%08x\n",
+                                i, cb->ops[i].h, cb->ops[i].l);
+                }
+                break;
+        }
+}
+static void print_cb_list(struct ppc440spe_adma_chan *chan,
+                          struct ppc440spe_adma_desc_slot *iter)
+{
+        for (; iter; iter = iter->hw_next)
+                print_cb(chan, iter->hw_desc);
+}
+static void prep_dma_xor_dbg(int id, dma_addr_t dst, dma_addr_t *src,
+                             unsigned int src_cnt)
+{
+        int i;
+        pr_debug("\n%s(%d):\nsrc: ", __func__, id);
+        for (i = 0; i < src_cnt; i++)
+                pr_debug("\t0x%016llx ", src[i]);
+        pr_debug("dst:\n\t0x%016llx\n", dst);
+}
+static void prep_dma_pq_dbg(int id, dma_addr_t *dst, dma_addr_t *src,
+                            unsigned int src_cnt)
+{
+        int i;
+        pr_debug("\n%s(%d):\nsrc: ", __func__, id);
+        for (i = 0; i < src_cnt; i++)
+                pr_debug("\t0x%016llx ", src[i]);
+        pr_debug("dst: ");
+        for (i = 0; i < 2; i++)
+                pr_debug("\t0x%016llx ", dst[i]);
+}
+static void prep_dma_pqzero_sum_dbg(int id, dma_addr_t *src,
+                                    unsigned int src_cnt,
+                                    const unsigned char *scf)
+{
+        int i;
+        pr_debug("\n%s(%d):\nsrc(coef): ", __func__, id);
+        if (scf) {
+                for (i = 0; i < src_cnt; i++)
+                        pr_debug("\t0x%016llx(0x%02x) ", src[i], scf[i]);
+        } else {
+                for (i = 0; i < src_cnt; i++)
+                        pr_debug("\t0x%016llx(no) ", src[i]);
+        }
+        pr_debug("dst: ");
+        for (i = 0; i < 2; i++)
+                pr_debug("\t0x%016llx ", src[src_cnt + i]);
+}
+/******************************************************************************
+ * Command (Descriptor) Blocks low-level routines
+ ******************************************************************************/
+/**
+ * ppc440spe_desc_init_interrupt - initialize the descriptor for INTERRUPT
+ * pseudo operation
+ */
+static void ppc440spe_desc_init_interrupt(struct ppc440spe_adma_desc_slot *desc,
+                                          struct ppc440spe_adma_chan *chan)
+{
+        struct xor_cb *p;
+        switch (chan->device->id) {
+        case PPC440SPE_XOR_ID:
+                p = desc->hw_desc;
+                memset(desc->hw_desc, 0, sizeof(struct xor_cb));
+                /* NOP with Command Block Complete Enable */
+                p->cbc = XOR_CBCR_CBCE_BIT;
+                break;
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                memset(desc->hw_desc, 0, sizeof(struct dma_cdb));
+                /* NOP with interrupt */
+                set_bit(PPC440SPE_DESC_INT, &desc->flags);
+                break;
+        default:
+                printk(KERN_ERR "Unsupported id %d in %s\n", chan->device->id,
+                                __func__);
+                break;
+        }
+}
+/**
+ * ppc440spe_desc_init_null_xor - initialize the descriptor for NULL XOR
+ * pseudo operation
+ */
+static void ppc440spe_desc_init_null_xor(struct ppc440spe_adma_desc_slot *desc)
+{
+        memset(desc->hw_desc, 0, sizeof(struct xor_cb));
+        desc->hw_next = NULL;
+        desc->src_cnt = 0;
+        desc->dst_cnt = 1;
+}
+/**
+ * ppc440spe_desc_init_xor - initialize the descriptor for XOR operation
+ */
+static void ppc440spe_desc_init_xor(struct ppc440spe_adma_desc_slot *desc,
+                                         int src_cnt, unsigned long flags)
+{
+        struct xor_cb *hw_desc = desc->hw_desc;
+        memset(desc->hw_desc, 0, sizeof(struct xor_cb));
+        desc->hw_next = NULL;
+        desc->src_cnt = src_cnt;
+        desc->dst_cnt = 1;
+        hw_desc->cbc = XOR_CBCR_TGT_BIT | src_cnt;
+        if (flags & DMA_PREP_INTERRUPT)
+                /* Enable interrupt on completion */
+                hw_desc->cbc |= XOR_CBCR_CBCE_BIT;
+}
+/**
+ * ppc440spe_desc_init_dma2pq - initialize the descriptor for PQ
+ * operation in DMA2 controller
+ */
+static void ppc440spe_desc_init_dma2pq(struct ppc440spe_adma_desc_slot *desc,
+                int dst_cnt, int src_cnt, unsigned long flags)
+{
+        struct xor_cb *hw_desc = desc->hw_desc;
+        memset(desc->hw_desc, 0, sizeof(struct xor_cb));
+        desc->hw_next = NULL;
+        desc->src_cnt = src_cnt;
+        desc->dst_cnt = dst_cnt;
+        memset(desc->reverse_flags, 0, sizeof(desc->reverse_flags));
+        desc->descs_per_op = 0;
+        hw_desc->cbc = XOR_CBCR_TGT_BIT;
+        if (flags & DMA_PREP_INTERRUPT)
+                /* Enable interrupt on completion */
+                hw_desc->cbc |= XOR_CBCR_CBCE_BIT;
+}
+#define DMA_CTRL_FLAGS_LAST     DMA_PREP_FENCE
+#define DMA_PREP_ZERO_P         (DMA_CTRL_FLAGS_LAST << 1)
+#define DMA_PREP_ZERO_Q         (DMA_PREP_ZERO_P << 1)
+/**
+ * ppc440spe_desc_init_dma01pq - initialize the descriptors for PQ operation
+ * with DMA0/1
+ */
+static void ppc440spe_desc_init_dma01pq(struct ppc440spe_adma_desc_slot *desc,
+                                int dst_cnt, int src_cnt, unsigned long flags,
+                                unsigned long op)
+{
+        struct dma_cdb *hw_desc;
+        struct ppc440spe_adma_desc_slot *iter;
+        u8 dopc;
+        /* Common initialization of a PQ descriptors chain */
+        set_bits(op, &desc->flags);
+        desc->src_cnt = src_cnt;
+        desc->dst_cnt = dst_cnt;
+        /* WXOR MULTICAST if both P and Q are being computed
+         * MV_SG1_SG2 if Q only
+         */
+        dopc = (desc->dst_cnt == DMA_DEST_MAX_NUM) ?
+                DMA_CDB_OPC_MULTICAST : DMA_CDB_OPC_MV_SG1_SG2;
+        list_for_each_entry(iter, &desc->group_list, chain_node) {
+                hw_desc = iter->hw_desc;
+                memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
+                if (likely(!list_is_last(&iter->chain_node,
+                                &desc->group_list))) {
+                        /* set 'next' pointer */
+                        iter->hw_next = list_entry(iter->chain_node.next,
+                                struct ppc440spe_adma_desc_slot, chain_node);
+                        clear_bit(PPC440SPE_DESC_INT, &iter->flags);
+                } else {
+                        /* this is the last descriptor.
+                         * this slot will be pasted from ADMA level
+                         * each time it wants to configure parameters
+                         * of the transaction (src, dst, ...)
+                         */
+                        iter->hw_next = NULL;
+                        if (flags & DMA_PREP_INTERRUPT)
+                                set_bit(PPC440SPE_DESC_INT, &iter->flags);
+                        else
+                                clear_bit(PPC440SPE_DESC_INT, &iter->flags);
+                }
+        }
+        /* Set OPS depending on WXOR/RXOR type of operation */
+        if (!test_bit(PPC440SPE_DESC_RXOR, &desc->flags)) {
+                /* This is a WXOR only chain:
+                 * - first descriptors are for zeroing destinations
+                 *   if PPC440SPE_ZERO_P/Q set;
+                 * - descriptors remained are for GF-XOR operations.
+                 */
+                iter = list_first_entry(&desc->group_list,
+                                        struct ppc440spe_adma_desc_slot,
+                                        chain_node);
+                if (test_bit(PPC440SPE_ZERO_P, &desc->flags)) {
+                        hw_desc = iter->hw_desc;
+                        hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
+                        iter = list_first_entry(&iter->chain_node,
+                                        struct ppc440spe_adma_desc_slot,
+                                        chain_node);
+                }
+                if (test_bit(PPC440SPE_ZERO_Q, &desc->flags)) {
+                        hw_desc = iter->hw_desc;
+                        hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
+                        iter = list_first_entry(&iter->chain_node,
+                                        struct ppc440spe_adma_desc_slot,
+                                        chain_node);
+                }
+                list_for_each_entry_from(iter, &desc->group_list, chain_node) {
+                        hw_desc = iter->hw_desc;
+                        hw_desc->opc = dopc;
+                }
+        } else {
+                /* This is either RXOR-only or mixed RXOR/WXOR */
+                /* The first 1 or 2 slots in chain are always RXOR,
+                 * if need to calculate P & Q, then there are two
+                 * RXOR slots; if only P or only Q, then there is one
+                 */
+                iter = list_first_entry(&desc->group_list,
+                                        struct ppc440spe_adma_desc_slot,
+                                        chain_node);
+                hw_desc = iter->hw_desc;
+                hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
+                if (desc->dst_cnt == DMA_DEST_MAX_NUM) {
+                        iter = list_first_entry(&iter->chain_node,
+                                                struct ppc440spe_adma_desc_slot,
+                                                chain_node);
+                        hw_desc = iter->hw_desc;
+                        hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
+                }
+                /* The remaining descs (if any) are WXORs */
+                if (test_bit(PPC440SPE_DESC_WXOR, &desc->flags)) {
+                        iter = list_first_entry(&iter->chain_node,
+                                                struct ppc440spe_adma_desc_slot,
+                                                chain_node);
+                        list_for_each_entry_from(iter, &desc->group_list,
+                                                chain_node) {
+                                hw_desc = iter->hw_desc;
+                                hw_desc->opc = dopc;
+                        }
+                }
+        }
+}
+/**
+ * ppc440spe_desc_init_dma01pqzero_sum - initialize the descriptor
+ * for PQ_ZERO_SUM operation
+ */
+static void ppc440spe_desc_init_dma01pqzero_sum(
+                                struct ppc440spe_adma_desc_slot *desc,
+                                int dst_cnt, int src_cnt)
+{
+        struct dma_cdb *hw_desc;
+        struct ppc440spe_adma_desc_slot *iter;
+        int i = 0;
+        u8 dopc = (dst_cnt == 2) ? DMA_CDB_OPC_MULTICAST :
+                                   DMA_CDB_OPC_MV_SG1_SG2;
+        /*
+         * Initialize starting from 2nd or 3rd descriptor dependent
+         * on dst_cnt. First one or two slots are for cloning P
+         * and/or Q to chan->pdest and/or chan->qdest as we have
+         * to preserve original P/Q.
+         */
+        iter = list_first_entry(&desc->group_list,
+                                struct ppc440spe_adma_desc_slot, chain_node);
+        iter = list_entry(iter->chain_node.next,
+                          struct ppc440spe_adma_desc_slot, chain_node);
+        if (dst_cnt > 1) {
+                iter = list_entry(iter->chain_node.next,
+                                  struct ppc440spe_adma_desc_slot, chain_node);
+        }
+        /* initialize each source descriptor in chain */
+        list_for_each_entry_from(iter, &desc->group_list, chain_node) {
+                hw_desc = iter->hw_desc;
+                memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
+                iter->src_cnt = 0;
+                iter->dst_cnt = 0;
+                /* This is a ZERO_SUM operation:
+                 * - <src_cnt> descriptors starting from 2nd or 3rd
+                 *   descriptor are for GF-XOR operations;
+                 * - remaining <dst_cnt> descriptors are for checking the result
+                 */
+                if (i++ < src_cnt)
+                        /* MV_SG1_SG2 if only Q is being verified
+                         * MULTICAST if both P and Q are being verified
+                         */
+                        hw_desc->opc = dopc;
+                else
+                        /* DMA_CDB_OPC_DCHECK128 operation */
+                        hw_desc->opc = DMA_CDB_OPC_DCHECK128;
+                if (likely(!list_is_last(&iter->chain_node,
+                                         &desc->group_list))) {
+                        /* set 'next' pointer */
+                        iter->hw_next = list_entry(iter->chain_node.next,
+                                                struct ppc440spe_adma_desc_slot,
+                                                chain_node);
+                } else {
+                        /* this is the last descriptor.
+                         * this slot will be pasted from ADMA level
+                         * each time it wants to configure parameters
+                         * of the transaction (src, dst, ...)
+                         */
+                        iter->hw_next = NULL;
+                        /* always enable interrupt generation since we get
+                         * the status of pqzero from the handler
+                         */
+                        set_bit(PPC440SPE_DESC_INT, &iter->flags);
+                }
+        }
+        desc->src_cnt = src_cnt;
+        desc->dst_cnt = dst_cnt;
+}
+/**
+ * ppc440spe_desc_init_memcpy - initialize the descriptor for MEMCPY operation
+ */
+static void ppc440spe_desc_init_memcpy(struct ppc440spe_adma_desc_slot *desc,
+                                        unsigned long flags)
+{
+        struct dma_cdb *hw_desc = desc->hw_desc;
+        memset(desc->hw_desc, 0, sizeof(struct dma_cdb));
+        desc->hw_next = NULL;
+        desc->src_cnt = 1;
+        desc->dst_cnt = 1;
+        if (flags & DMA_PREP_INTERRUPT)
+                set_bit(PPC440SPE_DESC_INT, &desc->flags);
+        else
+                clear_bit(PPC440SPE_DESC_INT, &desc->flags);
+        hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
+}
+/**
+ * ppc440spe_desc_init_memset - initialize the descriptor for MEMSET operation
+ */
+static void ppc440spe_desc_init_memset(struct ppc440spe_adma_desc_slot *desc,
+                                        int value, unsigned long flags)
+{
+        struct dma_cdb *hw_desc = desc->hw_desc;
+        memset(desc->hw_desc, 0, sizeof(struct dma_cdb));
+        desc->hw_next = NULL;
+        desc->src_cnt = 1;
+        desc->dst_cnt = 1;
+        if (flags & DMA_PREP_INTERRUPT)
+                set_bit(PPC440SPE_DESC_INT, &desc->flags);
+        else
+                clear_bit(PPC440SPE_DESC_INT, &desc->flags);
+        hw_desc->sg1u = hw_desc->sg1l = cpu_to_le32((u32)value);
+        hw_desc->sg3u = hw_desc->sg3l = cpu_to_le32((u32)value);
+        hw_desc->opc = DMA_CDB_OPC_DFILL128;
+}
+/**
+ * ppc440spe_desc_set_src_addr - set source address into the descriptor
+ */
+static void ppc440spe_desc_set_src_addr(struct ppc440spe_adma_desc_slot *desc,
+                                        struct ppc440spe_adma_chan *chan,
+                                        int src_idx, dma_addr_t addrh,
+                                        dma_addr_t addrl)
+{
+        struct dma_cdb *dma_hw_desc;
+        struct xor_cb *xor_hw_desc;
+        phys_addr_t addr64, tmplow, tmphi;
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                if (!addrh) {
+                        addr64 = addrl;
+                        tmphi = (addr64 >> 32);
+                        tmplow = (addr64 & 0xFFFFFFFF);
+                } else {
+                        tmphi = addrh;
+                        tmplow = addrl;
+                }
+                dma_hw_desc = desc->hw_desc;
+                dma_hw_desc->sg1l = cpu_to_le32((u32)tmplow);
+                dma_hw_desc->sg1u |= cpu_to_le32((u32)tmphi);
+                break;
+        case PPC440SPE_XOR_ID:
+                xor_hw_desc = desc->hw_desc;
+                xor_hw_desc->ops[src_idx].l = addrl;
+                xor_hw_desc->ops[src_idx].h |= addrh;
+                break;
+        }
+}
+/**
+ * ppc440spe_desc_set_src_mult - set source address mult into the descriptor
+ */
+static void ppc440spe_desc_set_src_mult(struct ppc440spe_adma_desc_slot *desc,
+                        struct ppc440spe_adma_chan *chan, u32 mult_index,
+                        int sg_index, unsigned char mult_value)
+{
+        struct dma_cdb *dma_hw_desc;
+        struct xor_cb *xor_hw_desc;
+        u32 *psgu;
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                dma_hw_desc = desc->hw_desc;
+                switch (sg_index) {
+                /* for RXOR operations set multiplier
+                 * into source cued address
+                 */
+                case DMA_CDB_SG_SRC:
+                        psgu = &dma_hw_desc->sg1u;
+                        break;
+                /* for WXOR operations set multiplier
+                 * into destination cued address(es)
+                 */
+                case DMA_CDB_SG_DST1:
+                        psgu = &dma_hw_desc->sg2u;
+                        break;
+                case DMA_CDB_SG_DST2:
+                        psgu = &dma_hw_desc->sg3u;
+                        break;
+                default:
+                        BUG();
+                }
+                *psgu |= cpu_to_le32(mult_value << mult_index);
+                break;
+        case PPC440SPE_XOR_ID:
+                xor_hw_desc = desc->hw_desc;
+                break;
+        default:
+                BUG();
+        }
+}
+/**
+ * ppc440spe_desc_set_dest_addr - set destination address into the descriptor
+ */
+static void ppc440spe_desc_set_dest_addr(struct ppc440spe_adma_desc_slot *desc,
+                                struct ppc440spe_adma_chan *chan,
+                                dma_addr_t addrh, dma_addr_t addrl,
+                                u32 dst_idx)
+{
+        struct dma_cdb *dma_hw_desc;
+        struct xor_cb *xor_hw_desc;
+        phys_addr_t addr64, tmphi, tmplow;
+        u32 *psgu, *psgl;
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                if (!addrh) {
+                        addr64 = addrl;
+                        tmphi = (addr64 >> 32);
+                        tmplow = (addr64 & 0xFFFFFFFF);
+                } else {
+                        tmphi = addrh;
+                        tmplow = addrl;
+                }
+                dma_hw_desc = desc->hw_desc;
+                psgu = dst_idx ? &dma_hw_desc->sg3u : &dma_hw_desc->sg2u;
+                psgl = dst_idx ? &dma_hw_desc->sg3l : &dma_hw_desc->sg2l;
+                *psgl = cpu_to_le32((u32)tmplow);
+                *psgu |= cpu_to_le32((u32)tmphi);
+                break;
+        case PPC440SPE_XOR_ID:
+                xor_hw_desc = desc->hw_desc;
+                xor_hw_desc->cbtal = addrl;
+                xor_hw_desc->cbtah |= addrh;
+                break;
+        }
+}
+/**
+ * ppc440spe_desc_set_byte_count - set number of data bytes involved
+ * into the operation
+ */
+static void ppc440spe_desc_set_byte_count(struct ppc440spe_adma_desc_slot *desc,
+                                struct ppc440spe_adma_chan *chan,
+                                u32 byte_count)
+{
+        struct dma_cdb *dma_hw_desc;
+        struct xor_cb *xor_hw_desc;
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                dma_hw_desc = desc->hw_desc;
+                dma_hw_desc->cnt = cpu_to_le32(byte_count);
+                break;
+        case PPC440SPE_XOR_ID:
+                xor_hw_desc = desc->hw_desc;
+                xor_hw_desc->cbbc = byte_count;
+                break;
+        }
+}
+/**
+ * ppc440spe_desc_set_rxor_block_size - set RXOR block size
+ */
+static inline void ppc440spe_desc_set_rxor_block_size(u32 byte_count)
+{
+        /* assume that byte_count is aligned on the 512-boundary;
+         * thus write it directly to the register (bits 23:31 are
+         * reserved there).
+         */
+        dcr_write(ppc440spe_mq_dcr_host, DCRN_MQ0_CF2H, byte_count);
+}
+/**
+ * ppc440spe_desc_set_dcheck - set CHECK pattern
+ */
+static void ppc440spe_desc_set_dcheck(struct ppc440spe_adma_desc_slot *desc,
+                                struct ppc440spe_adma_chan *chan, u8 *qword)
+{
+        struct dma_cdb *dma_hw_desc;
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                dma_hw_desc = desc->hw_desc;
+                iowrite32(qword[0], &dma_hw_desc->sg3l);
+                iowrite32(qword[4], &dma_hw_desc->sg3u);
+                iowrite32(qword[8], &dma_hw_desc->sg2l);
+                iowrite32(qword[12], &dma_hw_desc->sg2u);
+                break;
+        default:
+                BUG();
+        }
+}
+/**
+ * ppc440spe_xor_set_link - set link address in xor CB
+ */
+static void ppc440spe_xor_set_link(struct ppc440spe_adma_desc_slot *prev_desc,
+                                struct ppc440spe_adma_desc_slot *next_desc)
+{
+        struct xor_cb *xor_hw_desc = prev_desc->hw_desc;
+        if (unlikely(!next_desc || !(next_desc->phys))) {
+                printk(KERN_ERR "%s: next_desc=0x%p; next_desc->phys=0x%llx\n",
+                        __func__, next_desc,
+                        next_desc ? next_desc->phys : 0);
+                BUG();
+        }
+        xor_hw_desc->cbs = 0;
+        xor_hw_desc->cblal = next_desc->phys;
+        xor_hw_desc->cblah = 0;
+        xor_hw_desc->cbc |= XOR_CBCR_LNK_BIT;
+}
+/**
+ * ppc440spe_desc_set_link - set the address of descriptor following this
+ * descriptor in chain
+ */
+static void ppc440spe_desc_set_link(struct ppc440spe_adma_chan *chan,
+                                struct ppc440spe_adma_desc_slot *prev_desc,
+                                struct ppc440spe_adma_desc_slot *next_desc)
+{
+        unsigned long flags;
+        struct ppc440spe_adma_desc_slot *tail = next_desc;
+        if (unlikely(!prev_desc || !next_desc ||
+                (prev_desc->hw_next && prev_desc->hw_next != next_desc))) {
+                /* If previous next is overwritten something is wrong.
+                 * though we may refetch from append to initiate list
+                 * processing; in this case - it's ok.
+                 */
+                printk(KERN_ERR "%s: prev_desc=0x%p; next_desc=0x%p; "
+                        "prev->hw_next=0x%p\n", __func__, prev_desc,
+                        next_desc, prev_desc ? prev_desc->hw_next : 0);
+                BUG();
+        }
+        local_irq_save(flags);
+        /* do s/w chaining both for DMA and XOR descriptors */
+        prev_desc->hw_next = next_desc;
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                break;
+        case PPC440SPE_XOR_ID:
+                /* bind descriptor to the chain */
+                while (tail->hw_next)
+                        tail = tail->hw_next;
+                xor_last_linked = tail;
+                if (prev_desc == xor_last_submit)
+                        /* do not link to the last submitted CB */
+                        break;
+                ppc440spe_xor_set_link(prev_desc, next_desc);
+                break;
+        }
+        local_irq_restore(flags);
+}
+/**
+ * ppc440spe_desc_get_src_addr - extract the source address from the descriptor
+ */
+static u32 ppc440spe_desc_get_src_addr(struct ppc440spe_adma_desc_slot *desc,
+                                struct ppc440spe_adma_chan *chan, int src_idx)
+{
+        struct dma_cdb *dma_hw_desc;
+        struct xor_cb *xor_hw_desc;
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                dma_hw_desc = desc->hw_desc;
+                /* May have 0, 1, 2, or 3 sources */
+                switch (dma_hw_desc->opc) {
+                case DMA_CDB_OPC_NO_OP:
+                case DMA_CDB_OPC_DFILL128:
+                        return 0;
+                case DMA_CDB_OPC_DCHECK128:
+                        if (unlikely(src_idx)) {
+                                printk(KERN_ERR "%s: try to get %d source for"
+                                    " DCHECK128\n", __func__, src_idx);
+                                BUG();
+                        }
+                        return le32_to_cpu(dma_hw_desc->sg1l);
+                case DMA_CDB_OPC_MULTICAST:
+                case DMA_CDB_OPC_MV_SG1_SG2:
+                        if (unlikely(src_idx > 2)) {
+                                printk(KERN_ERR "%s: try to get %d source from"
+                                    " DMA descr\n", __func__, src_idx);
+                                BUG();
+                        }
+                        if (src_idx) {
+                                if (le32_to_cpu(dma_hw_desc->sg1u) &
+                                    DMA_CUED_XOR_WIN_MSK) {
+                                        u8 region;
+                                        if (src_idx == 1)
+                                                return le32_to_cpu(
+                                                    dma_hw_desc->sg1l) +
+                                                        desc->unmap_len;
+                                        region = (le32_to_cpu(
+                                            dma_hw_desc->sg1u)) >>
+                                                DMA_CUED_REGION_OFF;
+                                        region &= DMA_CUED_REGION_MSK;
+                                        switch (region) {
+                                        case DMA_RXOR123:
+                                                return le32_to_cpu(
+                                                    dma_hw_desc->sg1l) +
+                                                        (desc->unmap_len << 1);
+                                        case DMA_RXOR124:
+                                                return le32_to_cpu(
+                                                    dma_hw_desc->sg1l) +
+                                                        (desc->unmap_len * 3);
+                                        case DMA_RXOR125:
+                                                return le32_to_cpu(
+                                                    dma_hw_desc->sg1l) +
+                                                        (desc->unmap_len << 2);
+                                        default:
+                                                printk(KERN_ERR
+                                                    "%s: try to"
+                                                    " get src3 for region %02x"
+                                                    "PPC440SPE_DESC_RXOR12?\n",
+                                                    __func__, region);
+                                                BUG();
+                                        }
+                                } else {
+                                        printk(KERN_ERR
+                                                "%s: try to get %d"
+                                                " source for non-cued descr\n",
+                                                __func__, src_idx);
+                                        BUG();
+                                }
+                        }
+                        return le32_to_cpu(dma_hw_desc->sg1l);
+                default:
+                        printk(KERN_ERR "%s: unknown OPC 0x%02x\n",
+                                __func__, dma_hw_desc->opc);
+                        BUG();
+                }
+                return le32_to_cpu(dma_hw_desc->sg1l);
+        case PPC440SPE_XOR_ID:
+                /* May have up to 16 sources */
+                xor_hw_desc = desc->hw_desc;
+                return xor_hw_desc->ops[src_idx].l;
+        }
+        return 0;
+}
+/**
+ * ppc440spe_desc_get_dest_addr - extract the destination address from the
+ * descriptor
+ */
+static u32 ppc440spe_desc_get_dest_addr(struct ppc440spe_adma_desc_slot *desc,
+                                struct ppc440spe_adma_chan *chan, int idx)
+{
+        struct dma_cdb *dma_hw_desc;
+        struct xor_cb *xor_hw_desc;
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                dma_hw_desc = desc->hw_desc;
+                if (likely(!idx))
+                        return le32_to_cpu(dma_hw_desc->sg2l);
+                return le32_to_cpu(dma_hw_desc->sg3l);
+        case PPC440SPE_XOR_ID:
+                xor_hw_desc = desc->hw_desc;
+                return xor_hw_desc->cbtal;
+        }
+        return 0;
+}
+/**
+ * ppc440spe_desc_get_src_num - extract the number of source addresses from
+ * the descriptor
+ */
+static u32 ppc440spe_desc_get_src_num(struct ppc440spe_adma_desc_slot *desc,
+                                struct ppc440spe_adma_chan *chan)
+{
+        struct dma_cdb *dma_hw_desc;
+        struct xor_cb *xor_hw_desc;
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                dma_hw_desc = desc->hw_desc;
+                switch (dma_hw_desc->opc) {
+                case DMA_CDB_OPC_NO_OP:
+                case DMA_CDB_OPC_DFILL128:
+                        return 0;
+                case DMA_CDB_OPC_DCHECK128:
+                        return 1;
+                case DMA_CDB_OPC_MV_SG1_SG2:
+                case DMA_CDB_OPC_MULTICAST:
+                        /*
+                         * Only for RXOR operations we have more than
+                         * one source
+                         */
+                        if (le32_to_cpu(dma_hw_desc->sg1u) &
+                            DMA_CUED_XOR_WIN_MSK) {
+                                /* RXOR op, there are 2 or 3 sources */
+                                if (((le32_to_cpu(dma_hw_desc->sg1u) >>
+                                    DMA_CUED_REGION_OFF) &
+                                      DMA_CUED_REGION_MSK) == DMA_RXOR12) {
+                                        /* RXOR 1-2 */
+                                        return 2;
+                                } else {
+                                        /* RXOR 1-2-3/1-2-4/1-2-5 */
+                                        return 3;
+                                }
+                        }
+                        return 1;
+                default:
+                        printk(KERN_ERR "%s: unknown OPC 0x%02x\n",
+                                __func__, dma_hw_desc->opc);
+                        BUG();
+                }
+        case PPC440SPE_XOR_ID:
+                /* up to 16 sources */
+                xor_hw_desc = desc->hw_desc;
+                return xor_hw_desc->cbc & XOR_CDCR_OAC_MSK;
+        default:
+                BUG();
+        }
+        return 0;
+}
+/**
+ * ppc440spe_desc_get_dst_num - get the number of destination addresses in
+ * this descriptor
+ */
+static u32 ppc440spe_desc_get_dst_num(struct ppc440spe_adma_desc_slot *desc,
+                                struct ppc440spe_adma_chan *chan)
+{
+        struct dma_cdb *dma_hw_desc;
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                /* May be 1 or 2 destinations */
+                dma_hw_desc = desc->hw_desc;
+                switch (dma_hw_desc->opc) {
+                case DMA_CDB_OPC_NO_OP:
+                case DMA_CDB_OPC_DCHECK128:
+                        return 0;
+                case DMA_CDB_OPC_MV_SG1_SG2:
+                case DMA_CDB_OPC_DFILL128:
+                        return 1;
+                case DMA_CDB_OPC_MULTICAST:
+                        if (desc->dst_cnt == 2)
+                                return 2;
+                        else
+                                return 1;
+                default:
+                        printk(KERN_ERR "%s: unknown OPC 0x%02x\n",
+                                __func__, dma_hw_desc->opc);
+                        BUG();
+                }
+        case PPC440SPE_XOR_ID:
+                /* Always only 1 destination */
+                return 1;
+        default:
+                BUG();
+        }
+        return 0;
+}
+/**
+ * ppc440spe_desc_get_link - get the address of the descriptor that
+ * follows this one
+ */
+static inline u32 ppc440spe_desc_get_link(struct ppc440spe_adma_desc_slot *desc,
+                                        struct ppc440spe_adma_chan *chan)
+{
+        if (!desc->hw_next)
+                return 0;
+        return desc->hw_next->phys;
+}
+/**
+ * ppc440spe_desc_is_aligned - check alignment
+ */
+static inline int ppc440spe_desc_is_aligned(
+        struct ppc440spe_adma_desc_slot *desc, int num_slots)
+{
+        return (desc->idx & (num_slots - 1)) ? 0 : 1;
+}
+/**
+ * ppc440spe_chan_xor_slot_count - get the number of slots necessary for
+ * XOR operation
+ */
+static int ppc440spe_chan_xor_slot_count(size_t len, int src_cnt,
+                        int *slots_per_op)
+{
+        int slot_cnt;
+        /* each XOR descriptor provides up to 16 source operands */
+        slot_cnt = *slots_per_op = (src_cnt + XOR_MAX_OPS - 1)/XOR_MAX_OPS;
+        if (likely(len <= PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT))
+                return slot_cnt;
+        printk(KERN_ERR "%s: len %d > max %d !!\n",
+                __func__, len, PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT);
+        BUG();
+        return slot_cnt;
+}
+/**
+ * ppc440spe_dma2_pq_slot_count - get the number of slots necessary for
+ * DMA2 PQ operation
+ */
+static int ppc440spe_dma2_pq_slot_count(dma_addr_t *srcs,
+                int src_cnt, size_t len)
+{
+        signed long long order = 0;
+        int state = 0;
+        int addr_count = 0;
+        int i;
+        for (i = 1; i < src_cnt; i++) {
+                dma_addr_t cur_addr = srcs[i];
+                dma_addr_t old_addr = srcs[i-1];
+                switch (state) {
+                case 0:
+                        if (cur_addr == old_addr + len) {
+                                /* direct RXOR */
+                                order = 1;
+                                state = 1;
+                                if (i == src_cnt-1)
+                                        addr_count++;
+                        } else if (old_addr == cur_addr + len) {
+                                /* reverse RXOR */
+                                order = -1;
+                                state = 1;
+                                if (i == src_cnt-1)
+                                        addr_count++;
+                        } else {
+                                state = 3;
+                        }
+                        break;
+                case 1:
+                        if (i == src_cnt-2 || (order == -1
+                                && cur_addr != old_addr - len)) {
+                                order = 0;
+                                state = 0;
+                                addr_count++;
+                        } else if (cur_addr == old_addr + len*order) {
+                                state = 2;
+                                if (i == src_cnt-1)
+                                        addr_count++;
+                        } else if (cur_addr == old_addr + 2*len) {
+                                state = 2;
+                                if (i == src_cnt-1)
+                                        addr_count++;
+                        } else if (cur_addr == old_addr + 3*len) {
+                                state = 2;
+                                if (i == src_cnt-1)
+                                        addr_count++;
+                        } else {
+                                order = 0;
+                                state = 0;
+                                addr_count++;
+                        }
+                        break;
+                case 2:
+                        order = 0;
+                        state = 0;
+                        addr_count++;
+                                break;
+                }
+                if (state == 3)
+                        break;
+        }
+        if (src_cnt <= 1 || (state != 1 && state != 2)) {
+                pr_err("%s: src_cnt=%d, state=%d, addr_count=%d, order=%lld\n",
+                        __func__, src_cnt, state, addr_count, order);
+                for (i = 0; i < src_cnt; i++)
+                        pr_err("\t[%d] 0x%llx \n", i, srcs[i]);
+                BUG();
+        }
+        return (addr_count + XOR_MAX_OPS - 1) / XOR_MAX_OPS;
+}
+/******************************************************************************
+ * ADMA channel low-level routines
+ ******************************************************************************/
+static u32
+ppc440spe_chan_get_current_descriptor(struct ppc440spe_adma_chan *chan);
+static void ppc440spe_chan_append(struct ppc440spe_adma_chan *chan);
+/**
+ * ppc440spe_adma_device_clear_eot_status - interrupt ack to XOR or DMA engine
+ */
+static void ppc440spe_adma_device_clear_eot_status(
+                                        struct ppc440spe_adma_chan *chan)
+{
+        struct dma_regs *dma_reg;
+        struct xor_regs *xor_reg;
+        u8 *p = chan->device->dma_desc_pool_virt;
+        struct dma_cdb *cdb;
+        u32 rv, i;
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                /* read FIFO to ack */
+                dma_reg = chan->device->dma_reg;
+                while ((rv = ioread32(&dma_reg->csfpl))) {
+                        i = rv & DMA_CDB_ADDR_MSK;
+                        cdb = (struct dma_cdb *)&p[i -
+                            (u32)chan->device->dma_desc_pool];
+                        /* Clear opcode to ack. This is necessary for
+                         * ZeroSum operations only
+                         */
+                        cdb->opc = 0;
+                        if (test_bit(PPC440SPE_RXOR_RUN,
+                            &ppc440spe_rxor_state)) {
+                                /* probably this is a completed RXOR op,
+                                 * get pointer to CDB using the fact that
+                                 * physical and virtual addresses of CDB
+                                 * in pools have the same offsets
+                                 */
+                                if (le32_to_cpu(cdb->sg1u) &
+                                    DMA_CUED_XOR_BASE) {
+                                        /* this is a RXOR */
+                                        clear_bit(PPC440SPE_RXOR_RUN,
+                                                  &ppc440spe_rxor_state);
+                                }
+                        }
+                        if (rv & DMA_CDB_STATUS_MSK) {
+                                /* ZeroSum check failed
+                                 */
+                                struct ppc440spe_adma_desc_slot *iter;
+                                dma_addr_t phys = rv & ~DMA_CDB_MSK;
+                                /*
+                                 * Update the status of corresponding
+                                 * descriptor.
+                                 */
+                                list_for_each_entry(iter, &chan->chain,
+                                    chain_node) {
+                                        if (iter->phys == phys)
+                                                break;
+                                }
+                                /*
+                                 * if cannot find the corresponding
+                                 * slot it's a bug
+                                 */
+                                BUG_ON(&iter->chain_node == &chan->chain);
+                                if (iter->xor_check_result) {
+                                        if (test_bit(PPC440SPE_DESC_PCHECK,
+                                                     &iter->flags)) {
+                                                *iter->xor_check_result |=
+                                                        SUM_CHECK_P_RESULT;
+                                        } else
+                                        if (test_bit(PPC440SPE_DESC_QCHECK,
+                                                     &iter->flags)) {
+                                                *iter->xor_check_result |=
+                                                        SUM_CHECK_Q_RESULT;
+                                        } else
+                                                BUG();
+                                }
+                        }
+                }
+                rv = ioread32(&dma_reg->dsts);
+                if (rv) {
+                        pr_err("DMA%d err status: 0x%x\n",
+                               chan->device->id, rv);
+                        /* write back to clear */
+                        iowrite32(rv, &dma_reg->dsts);
+                }
+                break;
+        case PPC440SPE_XOR_ID:
+                /* reset status bits to ack */
+                xor_reg = chan->device->xor_reg;
+                rv = ioread32be(&xor_reg->sr);
+                iowrite32be(rv, &xor_reg->sr);
+                if (rv & (XOR_IE_ICBIE_BIT|XOR_IE_ICIE_BIT|XOR_IE_RPTIE_BIT)) {
+                        if (rv & XOR_IE_RPTIE_BIT) {
+                                /* Read PLB Timeout Error.
+                                 * Try to resubmit the CB
+                                 */
+                                u32 val = ioread32be(&xor_reg->ccbalr);
+                                iowrite32be(val, &xor_reg->cblalr);
+                                val = ioread32be(&xor_reg->crsr);
+                                iowrite32be(val | XOR_CRSR_XAE_BIT,
+                                            &xor_reg->crsr);
+                        } else
+                                pr_err("XOR ERR 0x%x status\n", rv);
+                        break;
+                }
+                /*  if the XORcore is idle, but there are unprocessed CBs
+                 * then refetch the s/w chain here
+                 */
+                if (!(ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT) &&
+                    do_xor_refetch)
+                        ppc440spe_chan_append(chan);
+                break;
+        }
+}
+/**
+ * ppc440spe_chan_is_busy - get the channel status
+ */
+static int ppc440spe_chan_is_busy(struct ppc440spe_adma_chan *chan)
+{
+        struct dma_regs *dma_reg;
+        struct xor_regs *xor_reg;
+        int busy = 0;
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                dma_reg = chan->device->dma_reg;
+                /*  if command FIFO's head and tail pointers are equal and
+                 * status tail is the same as command, then channel is free
+                 */
+                if (ioread16(&dma_reg->cpfhp) != ioread16(&dma_reg->cpftp) ||
+                    ioread16(&dma_reg->cpftp) != ioread16(&dma_reg->csftp))
+                        busy = 1;
+                break;
+        case PPC440SPE_XOR_ID:
+                /* use the special status bit for the XORcore
+                 */
+                xor_reg = chan->device->xor_reg;
+                busy = (ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT) ? 1 : 0;
+                break;
+        }
+        return busy;
+}
+/**
+ * ppc440spe_chan_set_first_xor_descriptor -  init XORcore chain
+ */
+static void ppc440spe_chan_set_first_xor_descriptor(
+                                struct ppc440spe_adma_chan *chan,
+                                struct ppc440spe_adma_desc_slot *next_desc)
+{
+        struct xor_regs *xor_reg = chan->device->xor_reg;
+        if (ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT)
+                printk(KERN_INFO "%s: Warn: XORcore is running "
+                        "when try to set the first CDB!\n",
+                        __func__);
+        xor_last_submit = xor_last_linked = next_desc;
+        iowrite32be(XOR_CRSR_64BA_BIT, &xor_reg->crsr);
+        iowrite32be(next_desc->phys, &xor_reg->cblalr);
+        iowrite32be(0, &xor_reg->cblahr);
+        iowrite32be(ioread32be(&xor_reg->cbcr) | XOR_CBCR_LNK_BIT,
+                    &xor_reg->cbcr);
+        chan->hw_chain_inited = 1;
+}
+/**
+ * ppc440spe_dma_put_desc - put DMA0,1 descriptor to FIFO.
+ * called with irqs disabled
+ */
+static void ppc440spe_dma_put_desc(struct ppc440spe_adma_chan *chan,
+                struct ppc440spe_adma_desc_slot *desc)
+{
+        u32 pcdb;
+        struct dma_regs *dma_reg = chan->device->dma_reg;
+        pcdb = desc->phys;
+        if (!test_bit(PPC440SPE_DESC_INT, &desc->flags))
+                pcdb |= DMA_CDB_NO_INT;
+        chan_last_sub[chan->device->id] = desc;
+        ADMA_LL_DBG(print_cb(chan, desc->hw_desc));
+        iowrite32(pcdb, &dma_reg->cpfpl);
+}
+/**
+ * ppc440spe_chan_append - update the h/w chain in the channel
+ */
+static void ppc440spe_chan_append(struct ppc440spe_adma_chan *chan)
+{
+        struct xor_regs *xor_reg;
+        struct ppc440spe_adma_desc_slot *iter;
+        struct xor_cb *xcb;
+        u32 cur_desc;
+        unsigned long flags;
+        local_irq_save(flags);
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                cur_desc = ppc440spe_chan_get_current_descriptor(chan);
+                if (likely(cur_desc)) {
+                        iter = chan_last_sub[chan->device->id];
+                        BUG_ON(!iter);
+                } else {
+                        /* first peer */
+                        iter = chan_first_cdb[chan->device->id];
+                        BUG_ON(!iter);
+                        ppc440spe_dma_put_desc(chan, iter);
+                        chan->hw_chain_inited = 1;
+                }
+                /* is there something new to append */
+                if (!iter->hw_next)
+                        break;
+                /* flush descriptors from the s/w queue to fifo */
+                list_for_each_entry_continue(iter, &chan->chain, chain_node) {
+                        ppc440spe_dma_put_desc(chan, iter);
+                        if (!iter->hw_next)
+                                break;
+                }
+                break;
+        case PPC440SPE_XOR_ID:
+                /* update h/w links and refetch */
+                if (!xor_last_submit->hw_next)
+                        break;
+                xor_reg = chan->device->xor_reg;
+                /* the last linked CDB has to generate an interrupt
+                 * that we'd be able to append the next lists to h/w
+                 * regardless of the XOR engine state at the moment of
+                 * appending of these next lists
+                 */
+                xcb = xor_last_linked->hw_desc;
+                xcb->cbc |= XOR_CBCR_CBCE_BIT;
+                if (!(ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT)) {
+                        /* XORcore is idle. Refetch now */
+                        do_xor_refetch = 0;
+                        ppc440spe_xor_set_link(xor_last_submit,
+                                xor_last_submit->hw_next);
+                        ADMA_LL_DBG(print_cb_list(chan,
+                                xor_last_submit->hw_next));
+                        xor_last_submit = xor_last_linked;
+                        iowrite32be(ioread32be(&xor_reg->crsr) |
+                                    XOR_CRSR_RCBE_BIT | XOR_CRSR_64BA_BIT,
+                                    &xor_reg->crsr);
+                } else {
+                        /* XORcore is running. Refetch later in the handler */
+                        do_xor_refetch = 1;
+                }
+                break;
+        }
+        local_irq_restore(flags);
+}
+/**
+ * ppc440spe_chan_get_current_descriptor - get the currently executed descriptor
+ */
+static u32
+ppc440spe_chan_get_current_descriptor(struct ppc440spe_adma_chan *chan)
+{
+        struct dma_regs *dma_reg;
+        struct xor_regs *xor_reg;
+        if (unlikely(!chan->hw_chain_inited))
+                /* h/w descriptor chain is not initialized yet */
+                return 0;
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                dma_reg = chan->device->dma_reg;
+                return ioread32(&dma_reg->acpl) & (~DMA_CDB_MSK);
+        case PPC440SPE_XOR_ID:
+                xor_reg = chan->device->xor_reg;
+                return ioread32be(&xor_reg->ccbalr);
+        }
+        return 0;
+}
+/**
+ * ppc440spe_chan_run - enable the channel
+ */
+static void ppc440spe_chan_run(struct ppc440spe_adma_chan *chan)
+{
+        struct xor_regs *xor_reg;
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                /* DMAs are always enabled, do nothing */
+                break;
+        case PPC440SPE_XOR_ID:
+                /* drain write buffer */
+                xor_reg = chan->device->xor_reg;
+                /* fetch descriptor pointed to in <link> */
+                iowrite32be(XOR_CRSR_64BA_BIT | XOR_CRSR_XAE_BIT,
+                            &xor_reg->crsr);
+                break;
+        }
+}
+/******************************************************************************
+ * ADMA device level
+ ******************************************************************************/
+static void ppc440spe_chan_start_null_xor(struct ppc440spe_adma_chan *chan);
+static int ppc440spe_adma_alloc_chan_resources(struct dma_chan *chan);
+static dma_cookie_t
+ppc440spe_adma_tx_submit(struct dma_async_tx_descriptor *tx);
+static void ppc440spe_adma_set_dest(struct ppc440spe_adma_desc_slot *tx,
+                                    dma_addr_t addr, int index);
+static void
+ppc440spe_adma_memcpy_xor_set_src(struct ppc440spe_adma_desc_slot *tx,
+                                  dma_addr_t addr, int index);
+static void
+ppc440spe_adma_pq_set_dest(struct ppc440spe_adma_desc_slot *tx,
+                           dma_addr_t *paddr, unsigned long flags);
+static void
+ppc440spe_adma_pq_set_src(struct ppc440spe_adma_desc_slot *tx,
+                          dma_addr_t addr, int index);
+static void
+ppc440spe_adma_pq_set_src_mult(struct ppc440spe_adma_desc_slot *tx,
+                               unsigned char mult, int index, int dst_pos);
+static void
+ppc440spe_adma_pqzero_sum_set_dest(struct ppc440spe_adma_desc_slot *tx,
+                                   dma_addr_t paddr, dma_addr_t qaddr);
+static struct page *ppc440spe_rxor_srcs[32];
+/**
+ * ppc440spe_can_rxor - check if the operands may be processed with RXOR
+ */
+static int ppc440spe_can_rxor(struct page **srcs, int src_cnt, size_t len)
+{
+        int i, order = 0, state = 0;
+        int idx = 0;
+        if (unlikely(!(src_cnt > 1)))
+                return 0;
+        BUG_ON(src_cnt > ARRAY_SIZE(ppc440spe_rxor_srcs));
+        /* Skip holes in the source list before checking */
+        for (i = 0; i < src_cnt; i++) {
+                if (!srcs[i])
+                        continue;
+                ppc440spe_rxor_srcs[idx++] = srcs[i];
+        }
+        src_cnt = idx;
+        for (i = 1; i < src_cnt; i++) {
+                char *cur_addr = page_address(ppc440spe_rxor_srcs[i]);
+                char *old_addr = page_address(ppc440spe_rxor_srcs[i - 1]);
+                switch (state) {
+                case 0:
+                        if (cur_addr == old_addr + len) {
+                                /* direct RXOR */
+                                order = 1;
+                                state = 1;
+                        } else if (old_addr == cur_addr + len) {
+                                /* reverse RXOR */
+                                order = -1;
+                                state = 1;
+                        } else
+                                goto out;
+                        break;
+                case 1:
+                        if ((i == src_cnt - 2) ||
+                            (order == -1 && cur_addr != old_addr - len)) {
+                                order = 0;
+                                state = 0;
+                        } else if ((cur_addr == old_addr + len * order) ||
+                                   (cur_addr == old_addr + 2 * len) ||
+                                   (cur_addr == old_addr + 3 * len)) {
+                                state = 2;
+                        } else {
+                                order = 0;
+                                state = 0;
+                        }
+                        break;
+                case 2:
+                        order = 0;
+                        state = 0;
+                        break;
+                }
+        }
+out:
+        if (state == 1 || state == 2)
+                return 1;
+        return 0;
+}
+/**
+ * ppc440spe_adma_device_estimate - estimate the efficiency of processing
+ *      the operation given on this channel. It's assumed that 'chan' is
+ *      capable to process 'cap' type of operation.
+ * @chan: channel to use
+ * @cap: type of transaction
+ * @dst_lst: array of destination pointers
+ * @dst_cnt: number of destination operands
+ * @src_lst: array of source pointers
+ * @src_cnt: number of source operands
+ * @src_sz: size of each source operand
+ */
+static int ppc440spe_adma_estimate(struct dma_chan *chan,
+        enum dma_transaction_type cap, struct page **dst_lst, int dst_cnt,
+        struct page **src_lst, int src_cnt, size_t src_sz)
+{
+        int ef = 1;
+        if (cap == DMA_PQ || cap == DMA_PQ_VAL) {
+                /* If RAID-6 capabilities were not activated don't try
+                 * to use them
+                 */
+                if (unlikely(!ppc440spe_r6_enabled))
+                        return -1;
+        }
+        /*  In the current implementation of ppc440spe ADMA driver it
+         * makes sense to pick out only pq case, because it may be
+         * processed:
+         * (1) either using Biskup method on DMA2;
+         * (2) or on DMA0/1.
+         *  Thus we give a favour to (1) if the sources are suitable;
+         * else let it be processed on one of the DMA0/1 engines.
+         *  In the sum_product case where destination is also the
+         * source process it on DMA0/1 only.
+         */
+        if (cap == DMA_PQ && chan->chan_id == PPC440SPE_XOR_ID) {
+                if (dst_cnt == 1 && src_cnt == 2 && dst_lst[0] == src_lst[1])
+                        ef = 0; /* sum_product case, process on DMA0/1 */
+                else if (ppc440spe_can_rxor(src_lst, src_cnt, src_sz))
+                        ef = 3; /* override (DMA0/1 + idle) */
+                else
+                        ef = 0; /* can't process on DMA2 if !rxor */
+        }
+        /* channel idleness increases the priority */
+        if (likely(ef) &&
+            !ppc440spe_chan_is_busy(to_ppc440spe_adma_chan(chan)))
+                ef++;
+        return ef;
+}
+struct dma_chan *
+ppc440spe_async_tx_find_best_channel(enum dma_transaction_type cap,
+        struct page **dst_lst, int dst_cnt, struct page **src_lst,
+        int src_cnt, size_t src_sz)
+{
+        struct dma_chan *best_chan = NULL;
+        struct ppc_dma_chan_ref *ref;
+        int best_rank = -1;
+        if (unlikely(!src_sz))
+                return NULL;
+        if (src_sz > PAGE_SIZE) {
+                /*
+                 * should a user of the api ever pass > PAGE_SIZE requests
+                 * we sort out cases where temporary page-sized buffers
+                 * are used.
+                 */
+                switch (cap) {
+                case DMA_PQ:
+                        if (src_cnt == 1 && dst_lst[1] == src_lst[0])
+                                return NULL;
+                        if (src_cnt == 2 && dst_lst[1] == src_lst[1])
+                                return NULL;
+                        break;
+                case DMA_PQ_VAL:
+                case DMA_XOR_VAL:
+                        return NULL;
+                default:
+                        break;
+                }
+        }
+        list_for_each_entry(ref, &ppc440spe_adma_chan_list, node) {
+                if (dma_has_cap(cap, ref->chan->device->cap_mask)) {
+                        int rank;
+                        rank = ppc440spe_adma_estimate(ref->chan, cap, dst_lst,
+                                        dst_cnt, src_lst, src_cnt, src_sz);
+                        if (rank > best_rank) {
+                                best_rank = rank;
+                                best_chan = ref->chan;
+                        }
+                }
+        }
+        return best_chan;
+}
+EXPORT_SYMBOL_GPL(ppc440spe_async_tx_find_best_channel);
+/**
+ * ppc440spe_get_group_entry - get group entry with index idx
+ * @tdesc: is the last allocated slot in the group.
+ */
+static struct ppc440spe_adma_desc_slot *
+ppc440spe_get_group_entry(struct ppc440spe_adma_desc_slot *tdesc, u32 entry_idx)
+{
+        struct ppc440spe_adma_desc_slot *iter = tdesc->group_head;
+        int i = 0;
+        if (entry_idx < 0 || entry_idx >= (tdesc->src_cnt + tdesc->dst_cnt)) {
+                printk("%s: entry_idx %d, src_cnt %d, dst_cnt %d\n",
+                        __func__, entry_idx, tdesc->src_cnt, tdesc->dst_cnt);
+                BUG();
+        }
+        list_for_each_entry(iter, &tdesc->group_list, chain_node) {
+                if (i++ == entry_idx)
+                        break;
+        }
+        return iter;
+}
+/**
+ * ppc440spe_adma_free_slots - flags descriptor slots for reuse
+ * @slot: Slot to free
+ * Caller must hold &ppc440spe_chan->lock while calling this function
+ */
+static void ppc440spe_adma_free_slots(struct ppc440spe_adma_desc_slot *slot,
+                                      struct ppc440spe_adma_chan *chan)
+{
+        int stride = slot->slots_per_op;
+        while (stride--) {
+                slot->slots_per_op = 0;
+                slot = list_entry(slot->slot_node.next,
+                                struct ppc440spe_adma_desc_slot,
+                                slot_node);
+        }
+}
+static void ppc440spe_adma_unmap(struct ppc440spe_adma_chan *chan,
+                                 struct ppc440spe_adma_desc_slot *desc)
+{
+        u32 src_cnt, dst_cnt;
+        dma_addr_t addr;
+        /*
+         * get the number of sources & destination
+         * included in this descriptor and unmap
+         * them all
+         */
+        src_cnt = ppc440spe_desc_get_src_num(desc, chan);
+        dst_cnt = ppc440spe_desc_get_dst_num(desc, chan);
+        /* unmap destinations */
+        if (!(desc->async_tx.flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
+                while (dst_cnt--) {
+                        addr = ppc440spe_desc_get_dest_addr(
+                                desc, chan, dst_cnt);
+                        dma_unmap_page(chan->device->dev,
+                                        addr, desc->unmap_len,
+                                        DMA_FROM_DEVICE);
+                }
+        }
+        /* unmap sources */
+        if (!(desc->async_tx.flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
+                while (src_cnt--) {
+                        addr = ppc440spe_desc_get_src_addr(
+                                desc, chan, src_cnt);
+                        dma_unmap_page(chan->device->dev,
+                                        addr, desc->unmap_len,
+                                        DMA_TO_DEVICE);
+                }
+        }
+}
+/**
+ * ppc440spe_adma_run_tx_complete_actions - call functions to be called
+ * upon completion
+ */
+static dma_cookie_t ppc440spe_adma_run_tx_complete_actions(
+                struct ppc440spe_adma_desc_slot *desc,
+                struct ppc440spe_adma_chan *chan,
+                dma_cookie_t cookie)
+{
+        int i;
+        BUG_ON(desc->async_tx.cookie < 0);
+        if (desc->async_tx.cookie > 0) {
+                cookie = desc->async_tx.cookie;
+                desc->async_tx.cookie = 0;
+                /* call the callback (must not sleep or submit new
+                 * operations to this channel)
+                 */
+                if (desc->async_tx.callback)
+                        desc->async_tx.callback(
+                                desc->async_tx.callback_param);
+                /* unmap dma addresses
+                 * (unmap_single vs unmap_page?)
+                 *
+                 * actually, ppc's dma_unmap_page() functions are empty, so
+                 * the following code is just for the sake of completeness
+                 */
+                if (chan && chan->needs_unmap && desc->group_head &&
+                     desc->unmap_len) {
+                        struct ppc440spe_adma_desc_slot *unmap =
+                                                        desc->group_head;
+                        /* assume 1 slot per op always */
+                        u32 slot_count = unmap->slot_cnt;
+                        /* Run through the group list and unmap addresses */
+                        for (i = 0; i < slot_count; i++) {
+                                BUG_ON(!unmap);
+                                ppc440spe_adma_unmap(chan, unmap);
+                                unmap = unmap->hw_next;
+                        }
+                }
+        }
+        /* run dependent operations */
+        dma_run_dependencies(&desc->async_tx);
+        return cookie;
+}
+/**
+ * ppc440spe_adma_clean_slot - clean up CDB slot (if ack is set)
+ */
+static int ppc440spe_adma_clean_slot(struct ppc440spe_adma_desc_slot *desc,
+                struct ppc440spe_adma_chan *chan)
+{
+        /* the client is allowed to attach dependent operations
+         * until 'ack' is set
+         */
+        if (!async_tx_test_ack(&desc->async_tx))
+                return 0;
+        /* leave the last descriptor in the chain
+         * so we can append to it
+         */
+        if (list_is_last(&desc->chain_node, &chan->chain) ||
+            desc->phys == ppc440spe_chan_get_current_descriptor(chan))
+                return 1;
+        if (chan->device->id != PPC440SPE_XOR_ID) {
+                /* our DMA interrupt handler clears opc field of
+                 * each processed descriptor. For all types of
+                 * operations except for ZeroSum we do not actually
+                 * need ack from the interrupt handler. ZeroSum is a
+                 * special case since the result of this operation
+                 * is available from the handler only, so if we see
+                 * such type of descriptor (which is unprocessed yet)
+                 * then leave it in chain.
+                 */
+                struct dma_cdb *cdb = desc->hw_desc;
+                if (cdb->opc == DMA_CDB_OPC_DCHECK128)
+                        return 1;
+        }
+        dev_dbg(chan->device->common.dev, "\tfree slot %llx: %d stride: %d\n",
+                desc->phys, desc->idx, desc->slots_per_op);
+        list_del(&desc->chain_node);
+        ppc440spe_adma_free_slots(desc, chan);
+        return 0;
+}
+/**
+ * __ppc440spe_adma_slot_cleanup - this is the common clean-up routine
+ *      which runs through the channel CDBs list until reach the descriptor
+ *      currently processed. When routine determines that all CDBs of group
+ *      are completed then corresponding callbacks (if any) are called and slots
+ *      are freed.
+ */
+static void __ppc440spe_adma_slot_cleanup(struct ppc440spe_adma_chan *chan)
+{
+        struct ppc440spe_adma_desc_slot *iter, *_iter, *group_start = NULL;
+        dma_cookie_t cookie = 0;
+        u32 current_desc = ppc440spe_chan_get_current_descriptor(chan);
+        int busy = ppc440spe_chan_is_busy(chan);
+        int seen_current = 0, slot_cnt = 0, slots_per_op = 0;
+        dev_dbg(chan->device->common.dev, "ppc440spe adma%d: %s\n",
+                chan->device->id, __func__);
+        if (!current_desc) {
+                /*  There were no transactions yet, so
+                 * nothing to clean
+                 */
+                return;
+        }
+        /* free completed slots from the chain starting with
+         * the oldest descriptor
+         */
+        list_for_each_entry_safe(iter, _iter, &chan->chain,
+                                        chain_node) {
+                dev_dbg(chan->device->common.dev, "\tcookie: %d slot: %d "
+                    "busy: %d this_desc: %#llx next_desc: %#x "
+                    "cur: %#x ack: %d\n",
+                    iter->async_tx.cookie, iter->idx, busy, iter->phys,
+                    ppc440spe_desc_get_link(iter, chan), current_desc,
+                    async_tx_test_ack(&iter->async_tx));
+                prefetch(_iter);
+                prefetch(&_iter->async_tx);
+                /* do not advance past the current descriptor loaded into the
+                 * hardware channel,subsequent descriptors are either in process
+                 * or have not been submitted
+                 */
+                if (seen_current)
+                        break;
+                /* stop the search if we reach the current descriptor and the
+                 * channel is busy, or if it appears that the current descriptor
+                 * needs to be re-read (i.e. has been appended to)
+                 */
+                if (iter->phys == current_desc) {
+                        BUG_ON(seen_current++);
+                        if (busy || ppc440spe_desc_get_link(iter, chan)) {
+                                /* not all descriptors of the group have
+                                 * been completed; exit.
+                                 */
+                                break;
+                        }
+                }
+                /* detect the start of a group transaction */
+                if (!slot_cnt && !slots_per_op) {
+                        slot_cnt = iter->slot_cnt;
+                        slots_per_op = iter->slots_per_op;
+                        if (slot_cnt <= slots_per_op) {
+                                slot_cnt = 0;
+                                slots_per_op = 0;
+                        }
+                }
+                if (slot_cnt) {
+                        if (!group_start)
+                                group_start = iter;
+                        slot_cnt -= slots_per_op;
+                }
+                /* all the members of a group are complete */
+                if (slots_per_op != 0 && slot_cnt == 0) {
+                        struct ppc440spe_adma_desc_slot *grp_iter, *_grp_iter;
+                        int end_of_chain = 0;
+                        /* clean up the group */
+                        slot_cnt = group_start->slot_cnt;
+                        grp_iter = group_start;
+                        list_for_each_entry_safe_from(grp_iter, _grp_iter,
+                                &chan->chain, chain_node) {
+                                cookie = ppc440spe_adma_run_tx_complete_actions(
+                                        grp_iter, chan, cookie);
+                                slot_cnt -= slots_per_op;
+                                end_of_chain = ppc440spe_adma_clean_slot(
+                                    grp_iter, chan);
+                                if (end_of_chain && slot_cnt) {
+                                        /* Should wait for ZeroSum completion */
+                                        if (cookie > 0)
+                                                chan->completed_cookie = cookie;
+                                        return;
+                                }
+                                if (slot_cnt == 0 || end_of_chain)
+                                        break;
+                        }
+                        /* the group should be complete at this point */
+                        BUG_ON(slot_cnt);
+                        slots_per_op = 0;
+                        group_start = NULL;
+                        if (end_of_chain)
+                                break;
+                        else
+                                continue;
+                } else if (slots_per_op) /* wait for group completion */
+                        continue;
+                cookie = ppc440spe_adma_run_tx_complete_actions(iter, chan,
+                    cookie);
+                if (ppc440spe_adma_clean_slot(iter, chan))
+                        break;
+        }
+        BUG_ON(!seen_current);
+        if (cookie > 0) {
+                chan->completed_cookie = cookie;
+                pr_debug("\tcompleted cookie %d\n", cookie);
+        }
+}
+/**
+ * ppc440spe_adma_tasklet - clean up watch-dog initiator
+ */
+static void ppc440spe_adma_tasklet(unsigned long data)
+{
+        struct ppc440spe_adma_chan *chan = (struct ppc440spe_adma_chan *) data;
+        spin_lock_nested(&chan->lock, SINGLE_DEPTH_NESTING);
+        __ppc440spe_adma_slot_cleanup(chan);
+        spin_unlock(&chan->lock);
+}
+/**
+ * ppc440spe_adma_slot_cleanup - clean up scheduled initiator
+ */
+static void ppc440spe_adma_slot_cleanup(struct ppc440spe_adma_chan *chan)
+{
+        spin_lock_bh(&chan->lock);
+        __ppc440spe_adma_slot_cleanup(chan);
+        spin_unlock_bh(&chan->lock);
+}
+/**
+ * ppc440spe_adma_alloc_slots - allocate free slots (if any)
+ */
+static struct ppc440spe_adma_desc_slot *ppc440spe_adma_alloc_slots(
+                struct ppc440spe_adma_chan *chan, int num_slots,
+                int slots_per_op)
+{
+        struct ppc440spe_adma_desc_slot *iter = NULL, *_iter;
+        struct ppc440spe_adma_desc_slot *alloc_start = NULL;
+        struct list_head chain = LIST_HEAD_INIT(chain);
+        int slots_found, retry = 0;
+        BUG_ON(!num_slots || !slots_per_op);
+        /* start search from the last allocated descrtiptor
+         * if a contiguous allocation can not be found start searching
+         * from the beginning of the list
+         */
+retry:
+        slots_found = 0;
+        if (retry == 0)
+                iter = chan->last_used;
+        else
+                iter = list_entry(&chan->all_slots,
+                                  struct ppc440spe_adma_desc_slot,
+                                  slot_node);
+        list_for_each_entry_safe_continue(iter, _iter, &chan->all_slots,
+            slot_node) {
+                prefetch(_iter);
+                prefetch(&_iter->async_tx);
+                if (iter->slots_per_op) {
+                        slots_found = 0;
+                        continue;
+                }
+                /* start the allocation if the slot is correctly aligned */
+                if (!slots_found++)
+                        alloc_start = iter;
+                if (slots_found == num_slots) {
+                        struct ppc440spe_adma_desc_slot *alloc_tail = NULL;
+                        struct ppc440spe_adma_desc_slot *last_used = NULL;
+                        iter = alloc_start;
+                        while (num_slots) {
+                                int i;
+                                /* pre-ack all but the last descriptor */
+                                if (num_slots != slots_per_op)
+                                        async_tx_ack(&iter->async_tx);
+                                list_add_tail(&iter->chain_node, &chain);
+                                alloc_tail = iter;
+                                iter->async_tx.cookie = 0;
+                                iter->hw_next = NULL;
+                                iter->flags = 0;
+                                iter->slot_cnt = num_slots;
+                                iter->xor_check_result = NULL;
+                                for (i = 0; i < slots_per_op; i++) {
+                                        iter->slots_per_op = slots_per_op - i;
+                                        last_used = iter;
+                                        iter = list_entry(iter->slot_node.next,
+                                                struct ppc440spe_adma_desc_slot,
+                                                slot_node);
+                                }
+                                num_slots -= slots_per_op;
+                        }
+                        alloc_tail->group_head = alloc_start;
+                        alloc_tail->async_tx.cookie = -EBUSY;
+                        list_splice(&chain, &alloc_tail->group_list);
+                        chan->last_used = last_used;
+                        return alloc_tail;
+                }
+        }
+        if (!retry++)
+                goto retry;
+        /* try to free some slots if the allocation fails */
+        tasklet_schedule(&chan->irq_tasklet);
+        return NULL;
+}
+/**
+ * ppc440spe_adma_alloc_chan_resources -  allocate pools for CDB slots
+ */
+static int ppc440spe_adma_alloc_chan_resources(struct dma_chan *chan)
+{
+        struct ppc440spe_adma_chan *ppc440spe_chan;
+        struct ppc440spe_adma_desc_slot *slot = NULL;
+        char *hw_desc;
+        int i, db_sz;
+        int init;
+        ppc440spe_chan = to_ppc440spe_adma_chan(chan);
+        init = ppc440spe_chan->slots_allocated ? 0 : 1;
+        chan->chan_id = ppc440spe_chan->device->id;
+        /* Allocate descriptor slots */
+        i = ppc440spe_chan->slots_allocated;
+        if (ppc440spe_chan->device->id != PPC440SPE_XOR_ID)
+                db_sz = sizeof(struct dma_cdb);
+        else
+                db_sz = sizeof(struct xor_cb);
+        for (; i < (ppc440spe_chan->device->pool_size / db_sz); i++) {
+                slot = kzalloc(sizeof(struct ppc440spe_adma_desc_slot),
+                               GFP_KERNEL);
+                if (!slot) {
+                        printk(KERN_INFO "SPE ADMA Channel only initialized"
+                                " %d descriptor slots", i--);
+                        break;
+                }
+                hw_desc = (char *) ppc440spe_chan->device->dma_desc_pool_virt;
+                slot->hw_desc = (void *) &hw_desc[i * db_sz];
+                dma_async_tx_descriptor_init(&slot->async_tx, chan);
+                slot->async_tx.tx_submit = ppc440spe_adma_tx_submit;
+                INIT_LIST_HEAD(&slot->chain_node);
+                INIT_LIST_HEAD(&slot->slot_node);
+                INIT_LIST_HEAD(&slot->group_list);
+                slot->phys = ppc440spe_chan->device->dma_desc_pool + i * db_sz;
+                slot->idx = i;
+                spin_lock_bh(&ppc440spe_chan->lock);
+                ppc440spe_chan->slots_allocated++;
+                list_add_tail(&slot->slot_node, &ppc440spe_chan->all_slots);
+                spin_unlock_bh(&ppc440spe_chan->lock);
+        }
+        if (i && !ppc440spe_chan->last_used) {
+                ppc440spe_chan->last_used =
+                        list_entry(ppc440spe_chan->all_slots.next,
+                                struct ppc440spe_adma_desc_slot,
+                                slot_node);
+        }
+        dev_dbg(ppc440spe_chan->device->common.dev,
+                "ppc440spe adma%d: allocated %d descriptor slots\n",
+                ppc440spe_chan->device->id, i);
+        /* initialize the channel and the chain with a null operation */
+        if (init) {
+                switch (ppc440spe_chan->device->id) {
+                case PPC440SPE_DMA0_ID:
+                case PPC440SPE_DMA1_ID:
+                        ppc440spe_chan->hw_chain_inited = 0;
+                        /* Use WXOR for self-testing */
+                        if (!ppc440spe_r6_tchan)
+                                ppc440spe_r6_tchan = ppc440spe_chan;
+                        break;
+                case PPC440SPE_XOR_ID:
+                        ppc440spe_chan_start_null_xor(ppc440spe_chan);
+                        break;
+                default:
+                        BUG();
+                }
+                ppc440spe_chan->needs_unmap = 1;
+        }
+        return (i > 0) ? i : -ENOMEM;
+}
+/**
+ * ppc440spe_desc_assign_cookie - assign a cookie
+ */
+static dma_cookie_t ppc440spe_desc_assign_cookie(
+                struct ppc440spe_adma_chan *chan,
+                struct ppc440spe_adma_desc_slot *desc)
+{
+        dma_cookie_t cookie = chan->common.cookie;
+        cookie++;
+        if (cookie < 0)
+                cookie = 1;
+        chan->common.cookie = desc->async_tx.cookie = cookie;
+        return cookie;
+}
+/**
+ * ppc440spe_rxor_set_region_data -
+ */
+static void ppc440spe_rxor_set_region(struct ppc440spe_adma_desc_slot *desc,
+        u8 xor_arg_no, u32 mask)
+{
+        struct xor_cb *xcb = desc->hw_desc;
+        xcb->ops[xor_arg_no].h |= mask;
+}
+/**
+ * ppc440spe_rxor_set_src -
+ */
+static void ppc440spe_rxor_set_src(struct ppc440spe_adma_desc_slot *desc,
+        u8 xor_arg_no, dma_addr_t addr)
+{
+        struct xor_cb *xcb = desc->hw_desc;
+        xcb->ops[xor_arg_no].h |= DMA_CUED_XOR_BASE;
+        xcb->ops[xor_arg_no].l = addr;
+}
+/**
+ * ppc440spe_rxor_set_mult -
+ */
+static void ppc440spe_rxor_set_mult(struct ppc440spe_adma_desc_slot *desc,
+        u8 xor_arg_no, u8 idx, u8 mult)
+{
+        struct xor_cb *xcb = desc->hw_desc;
+        xcb->ops[xor_arg_no].h |= mult << (DMA_CUED_MULT1_OFF + idx * 8);
+}
+/**
+ * ppc440spe_adma_check_threshold - append CDBs to h/w chain if threshold
+ *      has been achieved
+ */
+static void ppc440spe_adma_check_threshold(struct ppc440spe_adma_chan *chan)
+{
+        dev_dbg(chan->device->common.dev, "ppc440spe adma%d: pending: %d\n",
+                chan->device->id, chan->pending);
+        if (chan->pending >= PPC440SPE_ADMA_THRESHOLD) {
+                chan->pending = 0;
+                ppc440spe_chan_append(chan);
+        }
+}
+/**
+ * ppc440spe_adma_tx_submit - submit new descriptor group to the channel
+ *      (it's not necessary that descriptors will be submitted to the h/w
+ *      chains too right now)
+ */
+static dma_cookie_t ppc440spe_adma_tx_submit(struct dma_async_tx_descriptor *tx)
+{
+        struct ppc440spe_adma_desc_slot *sw_desc;
+        struct ppc440spe_adma_chan *chan = to_ppc440spe_adma_chan(tx->chan);
+        struct ppc440spe_adma_desc_slot *group_start, *old_chain_tail;
+        int slot_cnt;
+        int slots_per_op;
+        dma_cookie_t cookie;
+        sw_desc = tx_to_ppc440spe_adma_slot(tx);
+        group_start = sw_desc->group_head;
+        slot_cnt = group_start->slot_cnt;
+        slots_per_op = group_start->slots_per_op;
+        spin_lock_bh(&chan->lock);
+        cookie = ppc440spe_desc_assign_cookie(chan, sw_desc);
+        if (unlikely(list_empty(&chan->chain))) {
+                /* first peer */
+                list_splice_init(&sw_desc->group_list, &chan->chain);
+                chan_first_cdb[chan->device->id] = group_start;
+        } else {
+                /* isn't first peer, bind CDBs to chain */
+                old_chain_tail = list_entry(chan->chain.prev,
+                                        struct ppc440spe_adma_desc_slot,
+                                        chain_node);
+                list_splice_init(&sw_desc->group_list,
+                    &old_chain_tail->chain_node);
+                /* fix up the hardware chain */
+                ppc440spe_desc_set_link(chan, old_chain_tail, group_start);
+        }
+        /* increment the pending count by the number of operations */
+        chan->pending += slot_cnt / slots_per_op;
+        ppc440spe_adma_check_threshold(chan);
+        spin_unlock_bh(&chan->lock);
+        dev_dbg(chan->device->common.dev,
+                "ppc440spe adma%d: %s cookie: %d slot: %d tx %p\n",
+                chan->device->id, __func__,
+                sw_desc->async_tx.cookie, sw_desc->idx, sw_desc);
+        return cookie;
+}
+/**
+ * ppc440spe_adma_prep_dma_interrupt - prepare CDB for a pseudo DMA operation
+ */
+static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_interrupt(
+                struct dma_chan *chan, unsigned long flags)
+{
+        struct ppc440spe_adma_chan *ppc440spe_chan;
+        struct ppc440spe_adma_desc_slot *sw_desc, *group_start;
+        int slot_cnt, slots_per_op;
+        ppc440spe_chan = to_ppc440spe_adma_chan(chan);
+        dev_dbg(ppc440spe_chan->device->common.dev,
+                "ppc440spe adma%d: %s\n", ppc440spe_chan->device->id,
+                __func__);
+        spin_lock_bh(&ppc440spe_chan->lock);
+        slot_cnt = slots_per_op = 1;
+        sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt,
+                        slots_per_op);
+        if (sw_desc) {
+                group_start = sw_desc->group_head;
+                ppc440spe_desc_init_interrupt(group_start, ppc440spe_chan);
+                group_start->unmap_len = 0;
+                sw_desc->async_tx.flags = flags;
+        }
+        spin_unlock_bh(&ppc440spe_chan->lock);
+        return sw_desc ? &sw_desc->async_tx : NULL;
+}
+/**
+ * ppc440spe_adma_prep_dma_memcpy - prepare CDB for a MEMCPY operation
+ */
+static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_memcpy(
+                struct dma_chan *chan, dma_addr_t dma_dest,
+                dma_addr_t dma_src, size_t len, unsigned long flags)
+{
+        struct ppc440spe_adma_chan *ppc440spe_chan;
+        struct ppc440spe_adma_desc_slot *sw_desc, *group_start;
+        int slot_cnt, slots_per_op;
+        ppc440spe_chan = to_ppc440spe_adma_chan(chan);
+        if (unlikely(!len))
+                return NULL;
+        BUG_ON(unlikely(len > PPC440SPE_ADMA_DMA_MAX_BYTE_COUNT));
+        spin_lock_bh(&ppc440spe_chan->lock);
+        dev_dbg(ppc440spe_chan->device->common.dev,
+                "ppc440spe adma%d: %s len: %u int_en %d\n",
+                ppc440spe_chan->device->id, __func__, len,
+                flags & DMA_PREP_INTERRUPT ? 1 : 0);
+        slot_cnt = slots_per_op = 1;
+        sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt,
+                slots_per_op);
+        if (sw_desc) {
+                group_start = sw_desc->group_head;
+                ppc440spe_desc_init_memcpy(group_start, flags);
+                ppc440spe_adma_set_dest(group_start, dma_dest, 0);
+                ppc440spe_adma_memcpy_xor_set_src(group_start, dma_src, 0);
+                ppc440spe_desc_set_byte_count(group_start, ppc440spe_chan, len);
+                sw_desc->unmap_len = len;
+                sw_desc->async_tx.flags = flags;
+        }
+        spin_unlock_bh(&ppc440spe_chan->lock);
+        return sw_desc ? &sw_desc->async_tx : NULL;
+}
+/**
+ * ppc440spe_adma_prep_dma_memset - prepare CDB for a MEMSET operation
+ */
+static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_memset(
+                struct dma_chan *chan, dma_addr_t dma_dest, int value,
+                size_t len, unsigned long flags)
+{
+        struct ppc440spe_adma_chan *ppc440spe_chan;
+        struct ppc440spe_adma_desc_slot *sw_desc, *group_start;
+        int slot_cnt, slots_per_op;
+        ppc440spe_chan = to_ppc440spe_adma_chan(chan);
+        if (unlikely(!len))
+                return NULL;
+        BUG_ON(unlikely(len > PPC440SPE_ADMA_DMA_MAX_BYTE_COUNT));
+        spin_lock_bh(&ppc440spe_chan->lock);
+        dev_dbg(ppc440spe_chan->device->common.dev,
+                "ppc440spe adma%d: %s cal: %u len: %u int_en %d\n",
+                ppc440spe_chan->device->id, __func__, value, len,
+                flags & DMA_PREP_INTERRUPT ? 1 : 0);
+        slot_cnt = slots_per_op = 1;
+        sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt,
+                slots_per_op);
+        if (sw_desc) {
+                group_start = sw_desc->group_head;
+                ppc440spe_desc_init_memset(group_start, value, flags);
+                ppc440spe_adma_set_dest(group_start, dma_dest, 0);
+                ppc440spe_desc_set_byte_count(group_start, ppc440spe_chan, len);
+                sw_desc->unmap_len = len;
+                sw_desc->async_tx.flags = flags;
+        }
+        spin_unlock_bh(&ppc440spe_chan->lock);
+        return sw_desc ? &sw_desc->async_tx : NULL;
+}
+/**
+ * ppc440spe_adma_prep_dma_xor - prepare CDB for a XOR operation
+ */
+static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_xor(
+                struct dma_chan *chan, dma_addr_t dma_dest,
+                dma_addr_t *dma_src, u32 src_cnt, size_t len,
+                unsigned long flags)
+{
+        struct ppc440spe_adma_chan *ppc440spe_chan;
+        struct ppc440spe_adma_desc_slot *sw_desc, *group_start;
+        int slot_cnt, slots_per_op;
+        ppc440spe_chan = to_ppc440spe_adma_chan(chan);
+        ADMA_LL_DBG(prep_dma_xor_dbg(ppc440spe_chan->device->id,
+                                     dma_dest, dma_src, src_cnt));
+        if (unlikely(!len))
+                return NULL;
+        BUG_ON(unlikely(len > PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT));
+        dev_dbg(ppc440spe_chan->device->common.dev,
+                "ppc440spe adma%d: %s src_cnt: %d len: %u int_en: %d\n",
+                ppc440spe_chan->device->id, __func__, src_cnt, len,
+                flags & DMA_PREP_INTERRUPT ? 1 : 0);
+        spin_lock_bh(&ppc440spe_chan->lock);
+        slot_cnt = ppc440spe_chan_xor_slot_count(len, src_cnt, &slots_per_op);
+        sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt,
+                        slots_per_op);
+        if (sw_desc) {
+                group_start = sw_desc->group_head;
+                ppc440spe_desc_init_xor(group_start, src_cnt, flags);
+                ppc440spe_adma_set_dest(group_start, dma_dest, 0);
+                while (src_cnt--)
+                        ppc440spe_adma_memcpy_xor_set_src(group_start,
+                                dma_src[src_cnt], src_cnt);
+                ppc440spe_desc_set_byte_count(group_start, ppc440spe_chan, len);
+                sw_desc->unmap_len = len;
+                sw_desc->async_tx.flags = flags;
+        }
+        spin_unlock_bh(&ppc440spe_chan->lock);
+        return sw_desc ? &sw_desc->async_tx : NULL;
+}
+static inline void
+ppc440spe_desc_set_xor_src_cnt(struct ppc440spe_adma_desc_slot *desc,
+                                int src_cnt);
+static void ppc440spe_init_rxor_cursor(struct ppc440spe_rxor *cursor);
+/**
+ * ppc440spe_adma_init_dma2rxor_slot -
+ */
+static void ppc440spe_adma_init_dma2rxor_slot(
+                struct ppc440spe_adma_desc_slot *desc,
+                dma_addr_t *src, int src_cnt)
+{
+        int i;
+        /* initialize CDB */
+        for (i = 0; i < src_cnt; i++) {
+                ppc440spe_adma_dma2rxor_prep_src(desc, &desc->rxor_cursor, i,
+                                                 desc->src_cnt, (u32)src[i]);
+        }
+}
+/**
+ * ppc440spe_dma01_prep_mult -
+ * for Q operation where destination is also the source
+ */
+static struct ppc440spe_adma_desc_slot *ppc440spe_dma01_prep_mult(
+                struct ppc440spe_adma_chan *ppc440spe_chan,
+                dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt,
+                const unsigned char *scf, size_t len, unsigned long flags)
+{
+        struct ppc440spe_adma_desc_slot *sw_desc = NULL;
+        unsigned long op = 0;
+        int slot_cnt;
+        set_bit(PPC440SPE_DESC_WXOR, &op);
+        slot_cnt = 2;
+        spin_lock_bh(&ppc440spe_chan->lock);
+        /* use WXOR, each descriptor occupies one slot */
+        sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt, 1);
+        if (sw_desc) {
+                struct ppc440spe_adma_chan *chan;
+                struct ppc440spe_adma_desc_slot *iter;
+                struct dma_cdb *hw_desc;
+                chan = to_ppc440spe_adma_chan(sw_desc->async_tx.chan);
+                set_bits(op, &sw_desc->flags);
+                sw_desc->src_cnt = src_cnt;
+                sw_desc->dst_cnt = dst_cnt;
+                /* First descriptor, zero data in the destination and copy it
+                 * to q page using MULTICAST transfer.
+                 */
+                iter = list_first_entry(&sw_desc->group_list,
+                                        struct ppc440spe_adma_desc_slot,
+                                        chain_node);
+                memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
+                /* set 'next' pointer */
+                iter->hw_next = list_entry(iter->chain_node.next,
+                                           struct ppc440spe_adma_desc_slot,
+                                           chain_node);
+                clear_bit(PPC440SPE_DESC_INT, &iter->flags);
+                hw_desc = iter->hw_desc;
+                hw_desc->opc = DMA_CDB_OPC_MULTICAST;
+                ppc440spe_desc_set_dest_addr(iter, chan,
+                                             DMA_CUED_XOR_BASE, dst[0], 0);
+                ppc440spe_desc_set_dest_addr(iter, chan, 0, dst[1], 1);
+                ppc440spe_desc_set_src_addr(iter, chan, 0, DMA_CUED_XOR_HB,
+                                            src[0]);
+                ppc440spe_desc_set_byte_count(iter, ppc440spe_chan, len);
+                iter->unmap_len = len;
+                /*
+                 * Second descriptor, multiply data from the q page
+                 * and store the result in real destination.
+                 */
+                iter = list_first_entry(&iter->chain_node,
+                                        struct ppc440spe_adma_desc_slot,
+                                        chain_node);
+                memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
+                iter->hw_next = NULL;
+                if (flags & DMA_PREP_INTERRUPT)
+                        set_bit(PPC440SPE_DESC_INT, &iter->flags);
+                else
+                        clear_bit(PPC440SPE_DESC_INT, &iter->flags);
+                hw_desc = iter->hw_desc;
+                hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
+                ppc440spe_desc_set_src_addr(iter, chan, 0,
+                                            DMA_CUED_XOR_HB, dst[1]);
+                ppc440spe_desc_set_dest_addr(iter, chan,
+                                             DMA_CUED_XOR_BASE, dst[0], 0);
+                ppc440spe_desc_set_src_mult(iter, chan, DMA_CUED_MULT1_OFF,
+                                            DMA_CDB_SG_DST1, scf[0]);
+                ppc440spe_desc_set_byte_count(iter, ppc440spe_chan, len);
+                iter->unmap_len = len;
+                sw_desc->async_tx.flags = flags;
+        }
+        spin_unlock_bh(&ppc440spe_chan->lock);
+        return sw_desc;
+}
+/**
+ * ppc440spe_dma01_prep_sum_product -
+ * Dx = A*(P+Pxy) + B*(Q+Qxy) operation where destination is also
+ * the source.
+ */
+static struct ppc440spe_adma_desc_slot *ppc440spe_dma01_prep_sum_product(
+                struct ppc440spe_adma_chan *ppc440spe_chan,
+                dma_addr_t *dst, dma_addr_t *src, int src_cnt,
+                const unsigned char *scf, size_t len, unsigned long flags)
+{
+        struct ppc440spe_adma_desc_slot *sw_desc = NULL;
+        unsigned long op = 0;
+        int slot_cnt;
+        set_bit(PPC440SPE_DESC_WXOR, &op);
+        slot_cnt = 3;
+        spin_lock_bh(&ppc440spe_chan->lock);
+        /* WXOR, each descriptor occupies one slot */
+        sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt, 1);
+        if (sw_desc) {
+                struct ppc440spe_adma_chan *chan;
+                struct ppc440spe_adma_desc_slot *iter;
+                struct dma_cdb *hw_desc;
+                chan = to_ppc440spe_adma_chan(sw_desc->async_tx.chan);
+                set_bits(op, &sw_desc->flags);
+                sw_desc->src_cnt = src_cnt;
+                sw_desc->dst_cnt = 1;
+                /* 1st descriptor, src[1] data to q page and zero destination */
+                iter = list_first_entry(&sw_desc->group_list,
+                                        struct ppc440spe_adma_desc_slot,
+                                        chain_node);
+                memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
+                iter->hw_next = list_entry(iter->chain_node.next,
+                                           struct ppc440spe_adma_desc_slot,
+                                           chain_node);
+                clear_bit(PPC440SPE_DESC_INT, &iter->flags);
+                hw_desc = iter->hw_desc;
+                hw_desc->opc = DMA_CDB_OPC_MULTICAST;
+                ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,
+                                             *dst, 0);
+                ppc440spe_desc_set_dest_addr(iter, chan, 0,
+                                             ppc440spe_chan->qdest, 1);
+                ppc440spe_desc_set_src_addr(iter, chan, 0, DMA_CUED_XOR_HB,
+                                            src[1]);
+                ppc440spe_desc_set_byte_count(iter, ppc440spe_chan, len);
+                iter->unmap_len = len;
+                /* 2nd descriptor, multiply src[1] data and store the
+                 * result in destination */
+                iter = list_first_entry(&iter->chain_node,
+                                        struct ppc440spe_adma_desc_slot,
+                                        chain_node);
+                memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
+                /* set 'next' pointer */
+                iter->hw_next = list_entry(iter->chain_node.next,
+                                           struct ppc440spe_adma_desc_slot,
+                                           chain_node);
+                if (flags & DMA_PREP_INTERRUPT)
+                        set_bit(PPC440SPE_DESC_INT, &iter->flags);
+                else
+                        clear_bit(PPC440SPE_DESC_INT, &iter->flags);
+                hw_desc = iter->hw_desc;
+                hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
+                ppc440spe_desc_set_src_addr(iter, chan, 0, DMA_CUED_XOR_HB,
+                                            ppc440spe_chan->qdest);
+                ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,
+                                             *dst, 0);
+                ppc440spe_desc_set_src_mult(iter, chan, DMA_CUED_MULT1_OFF,
+                                            DMA_CDB_SG_DST1, scf[1]);
+                ppc440spe_desc_set_byte_count(iter, ppc440spe_chan, len);
+                iter->unmap_len = len;
+                /*
+                 * 3rd descriptor, multiply src[0] data and xor it
+                 * with destination
+                 */
+                iter = list_first_entry(&iter->chain_node,
+                                        struct ppc440spe_adma_desc_slot,
+                                        chain_node);
+                memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
+                iter->hw_next = NULL;
+                if (flags & DMA_PREP_INTERRUPT)
+                        set_bit(PPC440SPE_DESC_INT, &iter->flags);
+                else
+                        clear_bit(PPC440SPE_DESC_INT, &iter->flags);
+                hw_desc = iter->hw_desc;
+                hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
+                ppc440spe_desc_set_src_addr(iter, chan, 0, DMA_CUED_XOR_HB,
+                                            src[0]);
+                ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,
+                                             *dst, 0);
+                ppc440spe_desc_set_src_mult(iter, chan, DMA_CUED_MULT1_OFF,
+                                            DMA_CDB_SG_DST1, scf[0]);
+                ppc440spe_desc_set_byte_count(iter, ppc440spe_chan, len);
+                iter->unmap_len = len;
+                sw_desc->async_tx.flags = flags;
+        }
+        spin_unlock_bh(&ppc440spe_chan->lock);
+        return sw_desc;
+}
+static struct ppc440spe_adma_desc_slot *ppc440spe_dma01_prep_pq(
+                struct ppc440spe_adma_chan *ppc440spe_chan,
+                dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt,
+                const unsigned char *scf, size_t len, unsigned long flags)
+{
+        int slot_cnt;
+        struct ppc440spe_adma_desc_slot *sw_desc = NULL, *iter;
+        unsigned long op = 0;
+        unsigned char mult = 1;
+        pr_debug("%s: dst_cnt %d, src_cnt %d, len %d\n",
+                 __func__, dst_cnt, src_cnt, len);
+        /*  select operations WXOR/RXOR depending on the
+         * source addresses of operators and the number
+         * of destinations (RXOR support only Q-parity calculations)
+         */
+        set_bit(PPC440SPE_DESC_WXOR, &op);
+        if (!test_and_set_bit(PPC440SPE_RXOR_RUN, &ppc440spe_rxor_state)) {
+                /* no active RXOR;
+                 * do RXOR if:
+                 * - there are more than 1 source,
+                 * - len is aligned on 512-byte boundary,
+                 * - source addresses fit to one of 4 possible regions.
+                 */
+                if (src_cnt > 1 &&
+                    !(len & MQ0_CF2H_RXOR_BS_MASK) &&
+                    (src[0] + len) == src[1]) {
+                        /* may do RXOR R1 R2 */
+                        set_bit(PPC440SPE_DESC_RXOR, &op);
+                        if (src_cnt != 2) {
+                                /* may try to enhance region of RXOR */
+                                if ((src[1] + len) == src[2]) {
+                                        /* do RXOR R1 R2 R3 */
+                                        set_bit(PPC440SPE_DESC_RXOR123,
+                                                &op);
+                                } else if ((src[1] + len * 2) == src[2]) {
+                                        /* do RXOR R1 R2 R4 */
+                                        set_bit(PPC440SPE_DESC_RXOR124, &op);
+                                } else if ((src[1] + len * 3) == src[2]) {
+                                        /* do RXOR R1 R2 R5 */
+                                        set_bit(PPC440SPE_DESC_RXOR125,
+                                                &op);
+                                } else {
+                                        /* do RXOR R1 R2 */
+                                        set_bit(PPC440SPE_DESC_RXOR12,
+                                                &op);
+                                }
+                        } else {
+                                /* do RXOR R1 R2 */
+                                set_bit(PPC440SPE_DESC_RXOR12, &op);
+                        }
+                }
+                if (!test_bit(PPC440SPE_DESC_RXOR, &op)) {
+                        /* can not do this operation with RXOR */
+                        clear_bit(PPC440SPE_RXOR_RUN,
+                                &ppc440spe_rxor_state);
+                } else {
+                        /* can do; set block size right now */
+                        ppc440spe_desc_set_rxor_block_size(len);
+                }
+        }
+        /* Number of necessary slots depends on operation type selected */
+        if (!test_bit(PPC440SPE_DESC_RXOR, &op)) {
+                /*  This is a WXOR only chain. Need descriptors for each
+                 * source to GF-XOR them with WXOR, and need descriptors
+                 * for each destination to zero them with WXOR
+                 */
+                slot_cnt = src_cnt;
+                if (flags & DMA_PREP_ZERO_P) {
+                        slot_cnt++;
+                        set_bit(PPC440SPE_ZERO_P, &op);
+                }
+                if (flags & DMA_PREP_ZERO_Q) {
+                        slot_cnt++;
+                        set_bit(PPC440SPE_ZERO_Q, &op);
+                }
+        } else {
+                /*  Need 1/2 descriptor for RXOR operation, and
+                 * need (src_cnt - (2 or 3)) for WXOR of sources
+                 * remained (if any)
+                 */
+                slot_cnt = dst_cnt;
+                if (flags & DMA_PREP_ZERO_P)
+                        set_bit(PPC440SPE_ZERO_P, &op);
+                if (flags & DMA_PREP_ZERO_Q)
+                        set_bit(PPC440SPE_ZERO_Q, &op);
+                if (test_bit(PPC440SPE_DESC_RXOR12, &op))
+                        slot_cnt += src_cnt - 2;
+                else
+                        slot_cnt += src_cnt - 3;
+                /*  Thus we have either RXOR only chain or
+                 * mixed RXOR/WXOR
+                 */
+                if (slot_cnt == dst_cnt)
+                        /* RXOR only chain */
+                        clear_bit(PPC440SPE_DESC_WXOR, &op);
+        }
+        spin_lock_bh(&ppc440spe_chan->lock);
+        /* for both RXOR/WXOR each descriptor occupies one slot */
+        sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt, 1);
+        if (sw_desc) {
+                ppc440spe_desc_init_dma01pq(sw_desc, dst_cnt, src_cnt,
+                                flags, op);
+                /* setup dst/src/mult */
+                pr_debug("%s: set dst descriptor 0, 1: 0x%016llx, 0x%016llx\n",
+                         __func__, dst[0], dst[1]);
+                ppc440spe_adma_pq_set_dest(sw_desc, dst, flags);
+                while (src_cnt--) {
+                        ppc440spe_adma_pq_set_src(sw_desc, src[src_cnt],
+                                                  src_cnt);
+                        /* NOTE: "Multi = 0 is equivalent to = 1" as it
+                         * stated in 440SPSPe_RAID6_Addendum_UM_1_17.pdf
+                         * doesn't work for RXOR with DMA0/1! Instead, multi=0
+                         * leads to zeroing source data after RXOR.
+                         * So, for P case set-up mult=1 explicitly.
+                         */
+                        if (!(flags & DMA_PREP_PQ_DISABLE_Q))
+                                mult = scf[src_cnt];
+                        ppc440spe_adma_pq_set_src_mult(sw_desc,
+                                mult, src_cnt,  dst_cnt - 1);
+                }
+                /* Setup byte count foreach slot just allocated */
+                sw_desc->async_tx.flags = flags;
+                list_for_each_entry(iter, &sw_desc->group_list,
+                                chain_node) {
+                        ppc440spe_desc_set_byte_count(iter,
+                                ppc440spe_chan, len);
+                        iter->unmap_len = len;
+                }
+        }
+        spin_unlock_bh(&ppc440spe_chan->lock);
+        return sw_desc;
+}
+static struct ppc440spe_adma_desc_slot *ppc440spe_dma2_prep_pq(
+                struct ppc440spe_adma_chan *ppc440spe_chan,
+                dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt,
+                const unsigned char *scf, size_t len, unsigned long flags)
+{
+        int slot_cnt, descs_per_op;
+        struct ppc440spe_adma_desc_slot *sw_desc = NULL, *iter;
+        unsigned long op = 0;
+        unsigned char mult = 1;
+        BUG_ON(!dst_cnt);
+        /*pr_debug("%s: dst_cnt %d, src_cnt %d, len %d\n",
+                 __func__, dst_cnt, src_cnt, len);*/
+        spin_lock_bh(&ppc440spe_chan->lock);
+        descs_per_op = ppc440spe_dma2_pq_slot_count(src, src_cnt, len);
+        if (descs_per_op < 0) {
+                spin_unlock_bh(&ppc440spe_chan->lock);
+                return NULL;
+        }
+        /* depending on number of sources we have 1 or 2 RXOR chains */
+        slot_cnt = descs_per_op * dst_cnt;
+        sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt, 1);
+        if (sw_desc) {
+                op = slot_cnt;
+                sw_desc->async_tx.flags = flags;
+                list_for_each_entry(iter, &sw_desc->group_list, chain_node) {
+                        ppc440spe_desc_init_dma2pq(iter, dst_cnt, src_cnt,
+                                --op ? 0 : flags);
+                        ppc440spe_desc_set_byte_count(iter, ppc440spe_chan,
+                                len);
+                        iter->unmap_len = len;
+                        ppc440spe_init_rxor_cursor(&(iter->rxor_cursor));
+                        iter->rxor_cursor.len = len;
+                        iter->descs_per_op = descs_per_op;
+                }
+                op = 0;
+                list_for_each_entry(iter, &sw_desc->group_list, chain_node) {
+                        op++;
+                        if (op % descs_per_op == 0)
+                                ppc440spe_adma_init_dma2rxor_slot(iter, src,
+                                                                  src_cnt);
+                        if (likely(!list_is_last(&iter->chain_node,
+                                                 &sw_desc->group_list))) {
+                                /* set 'next' pointer */
+                                iter->hw_next =
+                                        list_entry(iter->chain_node.next,
+                                                struct ppc440spe_adma_desc_slot,
+                                                chain_node);
+                                ppc440spe_xor_set_link(iter, iter->hw_next);
+                        } else {
+                                /* this is the last descriptor. */
+                                iter->hw_next = NULL;
+                        }
+                }
+                /* fixup head descriptor */
+                sw_desc->dst_cnt = dst_cnt;
+                if (flags & DMA_PREP_ZERO_P)
+                        set_bit(PPC440SPE_ZERO_P, &sw_desc->flags);
+                if (flags & DMA_PREP_ZERO_Q)
+                        set_bit(PPC440SPE_ZERO_Q, &sw_desc->flags);
+                /* setup dst/src/mult */
+                ppc440spe_adma_pq_set_dest(sw_desc, dst, flags);
+                while (src_cnt--) {
+                        /* handle descriptors (if dst_cnt == 2) inside
+                         * the ppc440spe_adma_pq_set_srcxxx() functions
+                         */
+                        ppc440spe_adma_pq_set_src(sw_desc, src[src_cnt],
+                                                  src_cnt);
+                        if (!(flags & DMA_PREP_PQ_DISABLE_Q))
+                                mult = scf[src_cnt];
+                        ppc440spe_adma_pq_set_src_mult(sw_desc,
+                                        mult, src_cnt, dst_cnt - 1);
+                }
+        }
+        spin_unlock_bh(&ppc440spe_chan->lock);
+        ppc440spe_desc_set_rxor_block_size(len);
+        return sw_desc;
+}
+/**
+ * ppc440spe_adma_prep_dma_pq - prepare CDB (group) for a GF-XOR operation
+ */
+static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_pq(
+                struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src,
+                unsigned int src_cnt, const unsigned char *scf,
+                size_t len, unsigned long flags)
+{
+        struct ppc440spe_adma_chan *ppc440spe_chan;
+        struct ppc440spe_adma_desc_slot *sw_desc = NULL;
+        int dst_cnt = 0;
+        ppc440spe_chan = to_ppc440spe_adma_chan(chan);
+        ADMA_LL_DBG(prep_dma_pq_dbg(ppc440spe_chan->device->id,
+                                    dst, src, src_cnt));
+        BUG_ON(!len);
+        BUG_ON(unlikely(len > PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT));
+        BUG_ON(!src_cnt);
+        if (src_cnt == 1 && dst[1] == src[0]) {
+                dma_addr_t dest[2];
+                /* dst[1] is real destination (Q) */
+                dest[0] = dst[1];
+                /* this is the page to multicast source data to */
+                dest[1] = ppc440spe_chan->qdest;
+                sw_desc = ppc440spe_dma01_prep_mult(ppc440spe_chan,
+                                dest, 2, src, src_cnt, scf, len, flags);
+                return sw_desc ? &sw_desc->async_tx : NULL;
+        }
+        if (src_cnt == 2 && dst[1] == src[1]) {
+                sw_desc = ppc440spe_dma01_prep_sum_product(ppc440spe_chan,
+                                        &dst[1], src, 2, scf, len, flags);
+                return sw_desc ? &sw_desc->async_tx : NULL;
+        }
+        if (!(flags & DMA_PREP_PQ_DISABLE_P)) {
+                BUG_ON(!dst[0]);
+                dst_cnt++;
+                flags |= DMA_PREP_ZERO_P;
+        }
+        if (!(flags & DMA_PREP_PQ_DISABLE_Q)) {
+                BUG_ON(!dst[1]);
+                dst_cnt++;
+                flags |= DMA_PREP_ZERO_Q;
+        }
+        BUG_ON(!dst_cnt);
+        dev_dbg(ppc440spe_chan->device->common.dev,
+                "ppc440spe adma%d: %s src_cnt: %d len: %u int_en: %d\n",
+                ppc440spe_chan->device->id, __func__, src_cnt, len,
+                flags & DMA_PREP_INTERRUPT ? 1 : 0);
+        switch (ppc440spe_chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                sw_desc = ppc440spe_dma01_prep_pq(ppc440spe_chan,
+                                dst, dst_cnt, src, src_cnt, scf,
+                                len, flags);
+                break;
+        case PPC440SPE_XOR_ID:
+                sw_desc = ppc440spe_dma2_prep_pq(ppc440spe_chan,
+                                dst, dst_cnt, src, src_cnt, scf,
+                                len, flags);
+                break;
+        }
+        return sw_desc ? &sw_desc->async_tx : NULL;
+}
+/**
+ * ppc440spe_adma_prep_dma_pqzero_sum - prepare CDB group for
+ * a PQ_ZERO_SUM operation
+ */
+static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_pqzero_sum(
+                struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src,
+                unsigned int src_cnt, const unsigned char *scf, size_t len,
+                enum sum_check_flags *pqres, unsigned long flags)
+{
+        struct ppc440spe_adma_chan *ppc440spe_chan;
+        struct ppc440spe_adma_desc_slot *sw_desc, *iter;
+        dma_addr_t pdest, qdest;
+        int slot_cnt, slots_per_op, idst, dst_cnt;
+        ppc440spe_chan = to_ppc440spe_adma_chan(chan);
+        if (flags & DMA_PREP_PQ_DISABLE_P)
+                pdest = 0;
+        else
+                pdest = pq[0];
+        if (flags & DMA_PREP_PQ_DISABLE_Q)
+                qdest = 0;
+        else
+                qdest = pq[1];
+        ADMA_LL_DBG(prep_dma_pqzero_sum_dbg(ppc440spe_chan->device->id,
+                                            src, src_cnt, scf));
+        /* Always use WXOR for P/Q calculations (two destinations).
+         * Need 1 or 2 extra slots to verify results are zero.
+         */
+        idst = dst_cnt = (pdest && qdest) ? 2 : 1;
+        /* One additional slot per destination to clone P/Q
+         * before calculation (we have to preserve destinations).
+         */
+        slot_cnt = src_cnt + dst_cnt * 2;
+        slots_per_op = 1;
+        spin_lock_bh(&ppc440spe_chan->lock);
+        sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt,
+                                             slots_per_op);
+        if (sw_desc) {
+                ppc440spe_desc_init_dma01pqzero_sum(sw_desc, dst_cnt, src_cnt);
+                /* Setup byte count for each slot just allocated */
+                sw_desc->async_tx.flags = flags;
+                list_for_each_entry(iter, &sw_desc->group_list, chain_node) {
+                        ppc440spe_desc_set_byte_count(iter, ppc440spe_chan,
+                                                      len);
+                        iter->unmap_len = len;
+                }
+                if (pdest) {
+                        struct dma_cdb *hw_desc;
+                        struct ppc440spe_adma_chan *chan;
+                        iter = sw_desc->group_head;
+                        chan = to_ppc440spe_adma_chan(iter->async_tx.chan);
+                        memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
+                        iter->hw_next = list_entry(iter->chain_node.next,
+                                                struct ppc440spe_adma_desc_slot,
+                                                chain_node);
+                        hw_desc = iter->hw_desc;
+                        hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
+                        iter->src_cnt = 0;
+                        iter->dst_cnt = 0;
+                        ppc440spe_desc_set_dest_addr(iter, chan, 0,
+                                                     ppc440spe_chan->pdest, 0);
+                        ppc440spe_desc_set_src_addr(iter, chan, 0, 0, pdest);
+                        ppc440spe_desc_set_byte_count(iter, ppc440spe_chan,
+                                                      len);
+                        iter->unmap_len = 0;
+                        /* override pdest to preserve original P */
+                        pdest = ppc440spe_chan->pdest;
+                }
+                if (qdest) {
+                        struct dma_cdb *hw_desc;
+                        struct ppc440spe_adma_chan *chan;
+                        iter = list_first_entry(&sw_desc->group_list,
+                                                struct ppc440spe_adma_desc_slot,
+                                                chain_node);
+                        chan = to_ppc440spe_adma_chan(iter->async_tx.chan);
+                        if (pdest) {
+                                iter = list_entry(iter->chain_node.next,
+                                                struct ppc440spe_adma_desc_slot,
+                                                chain_node);
+                        }
+                        memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
+                        iter->hw_next = list_entry(iter->chain_node.next,
+                                                struct ppc440spe_adma_desc_slot,
+                                                chain_node);
+                        hw_desc = iter->hw_desc;
+                        hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
+                        iter->src_cnt = 0;
+                        iter->dst_cnt = 0;
+                        ppc440spe_desc_set_dest_addr(iter, chan, 0,
+                                                     ppc440spe_chan->qdest, 0);
+                        ppc440spe_desc_set_src_addr(iter, chan, 0, 0, qdest);
+                        ppc440spe_desc_set_byte_count(iter, ppc440spe_chan,
+                                                      len);
+                        iter->unmap_len = 0;
+                        /* override qdest to preserve original Q */
+                        qdest = ppc440spe_chan->qdest;
+                }
+                /* Setup destinations for P/Q ops */
+                ppc440spe_adma_pqzero_sum_set_dest(sw_desc, pdest, qdest);
+                /* Setup zero QWORDs into DCHECK CDBs */
+                idst = dst_cnt;
+                list_for_each_entry_reverse(iter, &sw_desc->group_list,
+                                            chain_node) {
+                        /*
+                         * The last CDB corresponds to Q-parity check,
+                         * the one before last CDB corresponds
+                         * P-parity check
+                         */
+                        if (idst == DMA_DEST_MAX_NUM) {
+                                if (idst == dst_cnt) {
+                                        set_bit(PPC440SPE_DESC_QCHECK,
+                                                &iter->flags);
+                                } else {
+                                        set_bit(PPC440SPE_DESC_PCHECK,
+                                                &iter->flags);
+                                }
+                        } else {
+                                if (qdest) {
+                                        set_bit(PPC440SPE_DESC_QCHECK,
+                                                &iter->flags);
+                                } else {
+                                        set_bit(PPC440SPE_DESC_PCHECK,
+                                                &iter->flags);
+                                }
+                        }
+                        iter->xor_check_result = pqres;
+                        /*
+                         * set it to zero, if check fail then result will
+                         * be updated
+                         */
+                        *iter->xor_check_result = 0;
+                        ppc440spe_desc_set_dcheck(iter, ppc440spe_chan,
+                                ppc440spe_qword);
+                        if (!(--dst_cnt))
+                                break;
+                }
+                /* Setup sources and mults for P/Q ops */
+                list_for_each_entry_continue_reverse(iter, &sw_desc->group_list,
+                                                     chain_node) {
+                        struct ppc440spe_adma_chan *chan;
+                        u32 mult_dst;
+                        chan = to_ppc440spe_adma_chan(iter->async_tx.chan);
+                        ppc440spe_desc_set_src_addr(iter, chan, 0,
+                                                    DMA_CUED_XOR_HB,
+                                                    src[src_cnt - 1]);
+                        if (qdest) {
+                                mult_dst = (dst_cnt - 1) ? DMA_CDB_SG_DST2 :
+                                                           DMA_CDB_SG_DST1;
+                                ppc440spe_desc_set_src_mult(iter, chan,
+                                                            DMA_CUED_MULT1_OFF,
+                                                            mult_dst,
+                                                            scf[src_cnt - 1]);
+                        }
+                        if (!(--src_cnt))
+                                break;
+                }
+        }
+        spin_unlock_bh(&ppc440spe_chan->lock);
+        return sw_desc ? &sw_desc->async_tx : NULL;
+}
+/**
+ * ppc440spe_adma_prep_dma_xor_zero_sum - prepare CDB group for
+ * XOR ZERO_SUM operation
+ */
+static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_xor_zero_sum(
+                struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt,
+                size_t len, enum sum_check_flags *result, unsigned long flags)
+{
+        struct dma_async_tx_descriptor *tx;
+        dma_addr_t pq[2];
+        /* validate P, disable Q */
+        pq[0] = src[0];
+        pq[1] = 0;
+        flags |= DMA_PREP_PQ_DISABLE_Q;
+        tx = ppc440spe_adma_prep_dma_pqzero_sum(chan, pq, &src[1],
+                                                src_cnt - 1, 0, len,
+                                                result, flags);
+        return tx;
+}
+/**
+ * ppc440spe_adma_set_dest - set destination address into descriptor
+ */
+static void ppc440spe_adma_set_dest(struct ppc440spe_adma_desc_slot *sw_desc,
+                dma_addr_t addr, int index)
+{
+        struct ppc440spe_adma_chan *chan;
+        BUG_ON(index >= sw_desc->dst_cnt);
+        chan = to_ppc440spe_adma_chan(sw_desc->async_tx.chan);
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                /* to do: support transfers lengths >
+                 * PPC440SPE_ADMA_DMA/XOR_MAX_BYTE_COUNT
+                 */
+                ppc440spe_desc_set_dest_addr(sw_desc->group_head,
+                        chan, 0, addr, index);
+                break;
+        case PPC440SPE_XOR_ID:
+                sw_desc = ppc440spe_get_group_entry(sw_desc, index);
+                ppc440spe_desc_set_dest_addr(sw_desc,
+                        chan, 0, addr, index);
+                break;
+        }
+}
+static void ppc440spe_adma_pq_zero_op(struct ppc440spe_adma_desc_slot *iter,
+                struct ppc440spe_adma_chan *chan, dma_addr_t addr)
+{
+        /*  To clear destinations update the descriptor
+         * (P or Q depending on index) as follows:
+         * addr is destination (0 corresponds to SG2):
+         */
+        ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE, addr, 0);
+        /* ... and the addr is source: */
+        ppc440spe_desc_set_src_addr(iter, chan, 0, DMA_CUED_XOR_HB, addr);
+        /* addr is always SG2 then the mult is always DST1 */
+        ppc440spe_desc_set_src_mult(iter, chan, DMA_CUED_MULT1_OFF,
+                                    DMA_CDB_SG_DST1, 1);
+}
+/**
+ * ppc440spe_adma_pq_set_dest - set destination address into descriptor
+ * for the PQXOR operation
+ */
+static void ppc440spe_adma_pq_set_dest(struct ppc440spe_adma_desc_slot *sw_desc,
+                dma_addr_t *addrs, unsigned long flags)
+{
+        struct ppc440spe_adma_desc_slot *iter;
+        struct ppc440spe_adma_chan *chan;
+        dma_addr_t paddr, qaddr;
+        dma_addr_t addr = 0, ppath, qpath;
+        int index = 0, i;
+        chan = to_ppc440spe_adma_chan(sw_desc->async_tx.chan);
+        if (flags & DMA_PREP_PQ_DISABLE_P)
+                paddr = 0;
+        else
+                paddr = addrs[0];
+        if (flags & DMA_PREP_PQ_DISABLE_Q)
+                qaddr = 0;
+        else
+                qaddr = addrs[1];
+        if (!paddr || !qaddr)
+                addr = paddr ? paddr : qaddr;
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                /* walk through the WXOR source list and set P/Q-destinations
+                 * for each slot:
+                 */
+                if (!test_bit(PPC440SPE_DESC_RXOR, &sw_desc->flags)) {
+                        /* This is WXOR-only chain; may have 1/2 zero descs */
+                        if (test_bit(PPC440SPE_ZERO_P, &sw_desc->flags))
+                                index++;
+                        if (test_bit(PPC440SPE_ZERO_Q, &sw_desc->flags))
+                                index++;
+                        iter = ppc440spe_get_group_entry(sw_desc, index);
+                        if (addr) {
+                                /* one destination */
+                                list_for_each_entry_from(iter,
+                                        &sw_desc->group_list, chain_node)
+                                        ppc440spe_desc_set_dest_addr(iter, chan,
+                                                DMA_CUED_XOR_BASE, addr, 0);
+                        } else {
+                                /* two destinations */
+                                list_for_each_entry_from(iter,
+                                        &sw_desc->group_list, chain_node) {
+                                        ppc440spe_desc_set_dest_addr(iter, chan,
+                                                DMA_CUED_XOR_BASE, paddr, 0);
+                                        ppc440spe_desc_set_dest_addr(iter, chan,
+                                                DMA_CUED_XOR_BASE, qaddr, 1);
+                                }
+                        }
+                        if (index) {
+                                /*  To clear destinations update the descriptor
+                                 * (1st,2nd, or both depending on flags)
+                                 */
+                                index = 0;
+                                if (test_bit(PPC440SPE_ZERO_P,
+                                                &sw_desc->flags)) {
+                                        iter = ppc440spe_get_group_entry(
+                                                        sw_desc, index++);
+                                        ppc440spe_adma_pq_zero_op(iter, chan,
+                                                        paddr);
+                                }
+                                if (test_bit(PPC440SPE_ZERO_Q,
+                                                &sw_desc->flags)) {
+                                        iter = ppc440spe_get_group_entry(
+                                                        sw_desc, index++);
+                                        ppc440spe_adma_pq_zero_op(iter, chan,
+                                                        qaddr);
+                                }
+                                return;
+                        }
+                } else {
+                        /* This is RXOR-only or RXOR/WXOR mixed chain */
+                        /* If we want to include destination into calculations,
+                         * then make dest addresses cued with mult=1 (XOR).
+                         */
+                        ppath = test_bit(PPC440SPE_ZERO_P, &sw_desc->flags) ?
+                                        DMA_CUED_XOR_HB :
+                                        DMA_CUED_XOR_BASE |
+                                                (1 << DMA_CUED_MULT1_OFF);
+                        qpath = test_bit(PPC440SPE_ZERO_Q, &sw_desc->flags) ?
+                                        DMA_CUED_XOR_HB :
+                                        DMA_CUED_XOR_BASE |
+                                                (1 << DMA_CUED_MULT1_OFF);
+                        /* Setup destination(s) in RXOR slot(s) */
+                        iter = ppc440spe_get_group_entry(sw_desc, index++);
+                        ppc440spe_desc_set_dest_addr(iter, chan,
+                                                paddr ? ppath : qpath,
+                                                paddr ? paddr : qaddr, 0);
+                        if (!addr) {
+                                /* two destinations */
+                                iter = ppc440spe_get_group_entry(sw_desc,
+                                                                 index++);
+                                ppc440spe_desc_set_dest_addr(iter, chan,
+                                                qpath, qaddr, 0);
+                        }
+                        if (test_bit(PPC440SPE_DESC_WXOR, &sw_desc->flags)) {
+                                /* Setup destination(s) in remaining WXOR
+                                 * slots
+                                 */
+                                iter = ppc440spe_get_group_entry(sw_desc,
+                                                                 index);
+                                if (addr) {
+                                        /* one destination */
+                                        list_for_each_entry_from(iter,
+                                            &sw_desc->group_list,
+                                            chain_node)
+                                                ppc440spe_desc_set_dest_addr(
+                                                        iter, chan,
+                                                        DMA_CUED_XOR_BASE,
+                                                        addr, 0);
+                                } else {
+                                        /* two destinations */
+                                        list_for_each_entry_from(iter,
+                                            &sw_desc->group_list,
+                                            chain_node) {
+                                                ppc440spe_desc_set_dest_addr(
+                                                        iter, chan,
+                                                        DMA_CUED_XOR_BASE,
+                                                        paddr, 0);
+                                                ppc440spe_desc_set_dest_addr(
+                                                        iter, chan,
+                                                        DMA_CUED_XOR_BASE,
+                                                        qaddr, 1);
+                                        }
+                                }
+                        }
+                }
+                break;
+        case PPC440SPE_XOR_ID:
+                /* DMA2 descriptors have only 1 destination, so there are
+                 * two chains - one for each dest.
+                 * If we want to include destination into calculations,
+                 * then make dest addresses cued with mult=1 (XOR).
+                 */
+                ppath = test_bit(PPC440SPE_ZERO_P, &sw_desc->flags) ?
+                                DMA_CUED_XOR_HB :
+                                DMA_CUED_XOR_BASE |
+                                        (1 << DMA_CUED_MULT1_OFF);
+                qpath = test_bit(PPC440SPE_ZERO_Q, &sw_desc->flags) ?
+                                DMA_CUED_XOR_HB :
+                                DMA_CUED_XOR_BASE |
+                                        (1 << DMA_CUED_MULT1_OFF);
+                iter = ppc440spe_get_group_entry(sw_desc, 0);
+                for (i = 0; i < sw_desc->descs_per_op; i++) {
+                        ppc440spe_desc_set_dest_addr(iter, chan,
+                                paddr ? ppath : qpath,
+                                paddr ? paddr : qaddr, 0);
+                        iter = list_entry(iter->chain_node.next,
+                                          struct ppc440spe_adma_desc_slot,
+                                          chain_node);
+                }
+                if (!addr) {
+                        /* Two destinations; setup Q here */
+                        iter = ppc440spe_get_group_entry(sw_desc,
+                                sw_desc->descs_per_op);
+                        for (i = 0; i < sw_desc->descs_per_op; i++) {
+                                ppc440spe_desc_set_dest_addr(iter,
+                                        chan, qpath, qaddr, 0);
+                                iter = list_entry(iter->chain_node.next,
+                                                struct ppc440spe_adma_desc_slot,
+                                                chain_node);
+                        }
+                }
+                break;
+        }
+}
+/**
+ * ppc440spe_adma_pq_zero_sum_set_dest - set destination address into descriptor
+ * for the PQ_ZERO_SUM operation
+ */
+static void ppc440spe_adma_pqzero_sum_set_dest(
+                struct ppc440spe_adma_desc_slot *sw_desc,
+                dma_addr_t paddr, dma_addr_t qaddr)
+{
+        struct ppc440spe_adma_desc_slot *iter, *end;
+        struct ppc440spe_adma_chan *chan;
+        dma_addr_t addr = 0;
+        int idx;
+        chan = to_ppc440spe_adma_chan(sw_desc->async_tx.chan);
+        /* walk through the WXOR source list and set P/Q-destinations
+         * for each slot
+         */
+        idx = (paddr && qaddr) ? 2 : 1;
+        /* set end */
+        list_for_each_entry_reverse(end, &sw_desc->group_list,
+                                    chain_node) {
+                if (!(--idx))
+                        break;
+        }
+        /* set start */
+        idx = (paddr && qaddr) ? 2 : 1;
+        iter = ppc440spe_get_group_entry(sw_desc, idx);
+        if (paddr && qaddr) {
+                /* two destinations */
+                list_for_each_entry_from(iter, &sw_desc->group_list,
+                                         chain_node) {
+                        if (unlikely(iter == end))
+                                break;
+                        ppc440spe_desc_set_dest_addr(iter, chan,
+                                                DMA_CUED_XOR_BASE, paddr, 0);
+                        ppc440spe_desc_set_dest_addr(iter, chan,
+                                                DMA_CUED_XOR_BASE, qaddr, 1);
+                }
+        } else {
+                /* one destination */
+                addr = paddr ? paddr : qaddr;
+                list_for_each_entry_from(iter, &sw_desc->group_list,
+                                         chain_node) {
+                        if (unlikely(iter == end))
+                                break;
+                        ppc440spe_desc_set_dest_addr(iter, chan,
+                                                DMA_CUED_XOR_BASE, addr, 0);
+                }
+        }
+        /*  The remaining descriptors are DATACHECK. These have no need in
+         * destination. Actually, these destinations are used there
+         * as sources for check operation. So, set addr as source.
+         */
+        ppc440spe_desc_set_src_addr(end, chan, 0, 0, addr ? addr : paddr);
+        if (!addr) {
+                end = list_entry(end->chain_node.next,
+                                 struct ppc440spe_adma_desc_slot, chain_node);
+                ppc440spe_desc_set_src_addr(end, chan, 0, 0, qaddr);
+        }
+}
+/**
+ * ppc440spe_desc_set_xor_src_cnt - set source count into descriptor
+ */
+static inline void ppc440spe_desc_set_xor_src_cnt(
+                        struct ppc440spe_adma_desc_slot *desc,
+                        int src_cnt)
+{
+        struct xor_cb *hw_desc = desc->hw_desc;
+        hw_desc->cbc &= ~XOR_CDCR_OAC_MSK;
+        hw_desc->cbc |= src_cnt;
+}
+/**
+ * ppc440spe_adma_pq_set_src - set source address into descriptor
+ */
+static void ppc440spe_adma_pq_set_src(struct ppc440spe_adma_desc_slot *sw_desc,
+                dma_addr_t addr, int index)
+{
+        struct ppc440spe_adma_chan *chan;
+        dma_addr_t haddr = 0;
+        struct ppc440spe_adma_desc_slot *iter = NULL;
+        chan = to_ppc440spe_adma_chan(sw_desc->async_tx.chan);
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                /* DMA0,1 may do: WXOR, RXOR, RXOR+WXORs chain
+                 */
+                if (test_bit(PPC440SPE_DESC_RXOR, &sw_desc->flags)) {
+                        /* RXOR-only or RXOR/WXOR operation */
+                        int iskip = test_bit(PPC440SPE_DESC_RXOR12,
+                                &sw_desc->flags) ?  2 : 3;
+                        if (index == 0) {
+                                /* 1st slot (RXOR) */
+                                /* setup sources region (R1-2-3, R1-2-4,
+                                 * or R1-2-5)
+                                 */
+                                if (test_bit(PPC440SPE_DESC_RXOR12,
+                                                &sw_desc->flags))
+                                        haddr = DMA_RXOR12 <<
+                                                DMA_CUED_REGION_OFF;
+                                else if (test_bit(PPC440SPE_DESC_RXOR123,
+                                    &sw_desc->flags))
+                                        haddr = DMA_RXOR123 <<
+                                                DMA_CUED_REGION_OFF;
+                                else if (test_bit(PPC440SPE_DESC_RXOR124,
+                                    &sw_desc->flags))
+                                        haddr = DMA_RXOR124 <<
+                                                DMA_CUED_REGION_OFF;
+                                else if (test_bit(PPC440SPE_DESC_RXOR125,
+                                    &sw_desc->flags))
+                                        haddr = DMA_RXOR125 <<
+                                                DMA_CUED_REGION_OFF;
+                                else
+                                        BUG();
+                                haddr |= DMA_CUED_XOR_BASE;
+                                iter = ppc440spe_get_group_entry(sw_desc, 0);
+                        } else if (index < iskip) {
+                                /* 1st slot (RXOR)
+                                 * shall actually set source address only once
+                                 * instead of first <iskip>
+                                 */
+                                iter = NULL;
+                        } else {
+                                /* 2nd/3d and next slots (WXOR);
+                                 * skip first slot with RXOR
+                                 */
+                                haddr = DMA_CUED_XOR_HB;
+                                iter = ppc440spe_get_group_entry(sw_desc,
+                                    index - iskip + sw_desc->dst_cnt);
+                        }
+                } else {
+                        int znum = 0;
+                        /* WXOR-only operation; skip first slots with
+                         * zeroing destinations
+                         */
+                        if (test_bit(PPC440SPE_ZERO_P, &sw_desc->flags))
+                                znum++;
+                        if (test_bit(PPC440SPE_ZERO_Q, &sw_desc->flags))
+                                znum++;
+                        haddr = DMA_CUED_XOR_HB;
+                        iter = ppc440spe_get_group_entry(sw_desc,
+                                        index + znum);
+                }
+                if (likely(iter)) {
+                        ppc440spe_desc_set_src_addr(iter, chan, 0, haddr, addr);
+                        if (!index &&
+                            test_bit(PPC440SPE_DESC_RXOR, &sw_desc->flags) &&
+                            sw_desc->dst_cnt == 2) {
+                                /* if we have two destinations for RXOR, then
+                                 * setup source in the second descr too
+                                 */
+                                iter = ppc440spe_get_group_entry(sw_desc, 1);
+                                ppc440spe_desc_set_src_addr(iter, chan, 0,
+                                        haddr, addr);
+                        }
+                }
+                break;
+        case PPC440SPE_XOR_ID:
+                /* DMA2 may do Biskup */
+                iter = sw_desc->group_head;
+                if (iter->dst_cnt == 2) {
+                        /* both P & Q calculations required; set P src here */
+                        ppc440spe_adma_dma2rxor_set_src(iter, index, addr);
+                        /* this is for Q */
+                        iter = ppc440spe_get_group_entry(sw_desc,
+                                sw_desc->descs_per_op);
+                }
+                ppc440spe_adma_dma2rxor_set_src(iter, index, addr);
+                break;
+        }
+}
+/**
+ * ppc440spe_adma_memcpy_xor_set_src - set source address into descriptor
+ */
+static void ppc440spe_adma_memcpy_xor_set_src(
+                struct ppc440spe_adma_desc_slot *sw_desc,
+                dma_addr_t addr, int index)
+{
+        struct ppc440spe_adma_chan *chan;
+        chan = to_ppc440spe_adma_chan(sw_desc->async_tx.chan);
+        sw_desc = sw_desc->group_head;
+        if (likely(sw_desc))
+                ppc440spe_desc_set_src_addr(sw_desc, chan, index, 0, addr);
+}
+/**
+ * ppc440spe_adma_dma2rxor_inc_addr  -
+ */
+static void ppc440spe_adma_dma2rxor_inc_addr(
+                struct ppc440spe_adma_desc_slot *desc,
+                struct ppc440spe_rxor *cursor, int index, int src_cnt)
+{
+        cursor->addr_count++;
+        if (index == src_cnt - 1) {
+                ppc440spe_desc_set_xor_src_cnt(desc, cursor->addr_count);
+        } else if (cursor->addr_count == XOR_MAX_OPS) {
+                ppc440spe_desc_set_xor_src_cnt(desc, cursor->addr_count);
+                cursor->addr_count = 0;
+                cursor->desc_count++;
+        }
+}
+/**
+ * ppc440spe_adma_dma2rxor_prep_src - setup RXOR types in DMA2 CDB
+ */
+static int ppc440spe_adma_dma2rxor_prep_src(
+                struct ppc440spe_adma_desc_slot *hdesc,
+                struct ppc440spe_rxor *cursor, int index,
+                int src_cnt, u32 addr)
+{
+        int rval = 0;
+        u32 sign;
+        struct ppc440spe_adma_desc_slot *desc = hdesc;
+        int i;
+        for (i = 0; i < cursor->desc_count; i++) {
+                desc = list_entry(hdesc->chain_node.next,
+                                  struct ppc440spe_adma_desc_slot,
+                                  chain_node);
+        }
+        switch (cursor->state) {
+        case 0:
+                if (addr == cursor->addrl + cursor->len) {
+                        /* direct RXOR */
+                        cursor->state = 1;
+                        cursor->xor_count++;
+                        if (index == src_cnt-1) {
+                                ppc440spe_rxor_set_region(desc,
+                                        cursor->addr_count,
+                                        DMA_RXOR12 << DMA_CUED_REGION_OFF);
+                                ppc440spe_adma_dma2rxor_inc_addr(
+                                        desc, cursor, index, src_cnt);
+                        }
+                } else if (cursor->addrl == addr + cursor->len) {
+                        /* reverse RXOR */
+                        cursor->state = 1;
+                        cursor->xor_count++;
+                        set_bit(cursor->addr_count, &desc->reverse_flags[0]);
+                        if (index == src_cnt-1) {
+                                ppc440spe_rxor_set_region(desc,
+                                        cursor->addr_count,
+                                        DMA_RXOR12 << DMA_CUED_REGION_OFF);
+                                ppc440spe_adma_dma2rxor_inc_addr(
+                                        desc, cursor, index, src_cnt);
+                        }
+                } else {
+                        printk(KERN_ERR "Cannot build "
+                                "DMA2 RXOR command block.\n");
+                        BUG();
+                }
+                break;
+        case 1:
+                sign = test_bit(cursor->addr_count,
+                                desc->reverse_flags)
+                        ? -1 : 1;
+                if (index == src_cnt-2 || (sign == -1
+                        && addr != cursor->addrl - 2*cursor->len)) {
+                        cursor->state = 0;
+                        cursor->xor_count = 1;
+                        cursor->addrl = addr;
+                        ppc440spe_rxor_set_region(desc,
+                                cursor->addr_count,
+                                DMA_RXOR12 << DMA_CUED_REGION_OFF);
+                        ppc440spe_adma_dma2rxor_inc_addr(
+                                desc, cursor, index, src_cnt);
+                } else if (addr == cursor->addrl + 2*sign*cursor->len) {
+                        cursor->state = 2;
+                        cursor->xor_count = 0;
+                        ppc440spe_rxor_set_region(desc,
+                                cursor->addr_count,
+                                DMA_RXOR123 << DMA_CUED_REGION_OFF);
+                        if (index == src_cnt-1) {
+                                ppc440spe_adma_dma2rxor_inc_addr(
+                                        desc, cursor, index, src_cnt);
+                        }
+                } else if (addr == cursor->addrl + 3*cursor->len) {
+                        cursor->state = 2;
+                        cursor->xor_count = 0;
+                        ppc440spe_rxor_set_region(desc,
+                                cursor->addr_count,
+                                DMA_RXOR124 << DMA_CUED_REGION_OFF);
+                        if (index == src_cnt-1) {
+                                ppc440spe_adma_dma2rxor_inc_addr(
+                                        desc, cursor, index, src_cnt);
+                        }
+                } else if (addr == cursor->addrl + 4*cursor->len) {
+                        cursor->state = 2;
+                        cursor->xor_count = 0;
+                        ppc440spe_rxor_set_region(desc,
+                                cursor->addr_count,
+                                DMA_RXOR125 << DMA_CUED_REGION_OFF);
+                        if (index == src_cnt-1) {
+                                ppc440spe_adma_dma2rxor_inc_addr(
+                                        desc, cursor, index, src_cnt);
+                        }
+                } else {
+                        cursor->state = 0;
+                        cursor->xor_count = 1;
+                        cursor->addrl = addr;
+                        ppc440spe_rxor_set_region(desc,
+                                cursor->addr_count,
+                                DMA_RXOR12 << DMA_CUED_REGION_OFF);
+                        ppc440spe_adma_dma2rxor_inc_addr(
+                                desc, cursor, index, src_cnt);
+                }
+                break;
+        case 2:
+                cursor->state = 0;
+                cursor->addrl = addr;
+                cursor->xor_count++;
+                if (index) {
+                        ppc440spe_adma_dma2rxor_inc_addr(
+                                desc, cursor, index, src_cnt);
+                }
+                break;
+        }
+        return rval;
+}
+/**
+ * ppc440spe_adma_dma2rxor_set_src - set RXOR source address; it's assumed that
+ *      ppc440spe_adma_dma2rxor_prep_src() has already done prior this call
+ */
+static void ppc440spe_adma_dma2rxor_set_src(
+                struct ppc440spe_adma_desc_slot *desc,
+                int index, dma_addr_t addr)
+{
+        struct xor_cb *xcb = desc->hw_desc;
+        int k = 0, op = 0, lop = 0;
+        /* get the RXOR operand which corresponds to index addr */
+        while (op <= index) {
+                lop = op;
+                if (k == XOR_MAX_OPS) {
+                        k = 0;
+                        desc = list_entry(desc->chain_node.next,
+                                struct ppc440spe_adma_desc_slot, chain_node);
+                        xcb = desc->hw_desc;
+                }
+                if ((xcb->ops[k++].h & (DMA_RXOR12 << DMA_CUED_REGION_OFF)) ==
+                    (DMA_RXOR12 << DMA_CUED_REGION_OFF))
+                        op += 2;
+                else
+                        op += 3;
+        }
+        BUG_ON(k < 1);
+        if (test_bit(k-1, desc->reverse_flags)) {
+                /* reverse operand order; put last op in RXOR group */
+                if (index == op - 1)
+                        ppc440spe_rxor_set_src(desc, k - 1, addr);
+        } else {
+                /* direct operand order; put first op in RXOR group */
+                if (index == lop)
+                        ppc440spe_rxor_set_src(desc, k - 1, addr);
+        }
+}
+/**
+ * ppc440spe_adma_dma2rxor_set_mult - set RXOR multipliers; it's assumed that
+ *      ppc440spe_adma_dma2rxor_prep_src() has already done prior this call
+ */
+static void ppc440spe_adma_dma2rxor_set_mult(
+                struct ppc440spe_adma_desc_slot *desc,
+                int index, u8 mult)
+{
+        struct xor_cb *xcb = desc->hw_desc;
+        int k = 0, op = 0, lop = 0;
+        /* get the RXOR operand which corresponds to index mult */
+        while (op <= index) {
+                lop = op;
+                if (k == XOR_MAX_OPS) {
+                        k = 0;
+                        desc = list_entry(desc->chain_node.next,
+                                          struct ppc440spe_adma_desc_slot,
+                                          chain_node);
+                        xcb = desc->hw_desc;
+                }
+                if ((xcb->ops[k++].h & (DMA_RXOR12 << DMA_CUED_REGION_OFF)) ==
+                    (DMA_RXOR12 << DMA_CUED_REGION_OFF))
+                        op += 2;
+                else
+                        op += 3;
+        }
+        BUG_ON(k < 1);
+        if (test_bit(k-1, desc->reverse_flags)) {
+                /* reverse order */
+                ppc440spe_rxor_set_mult(desc, k - 1, op - index - 1, mult);
+        } else {
+                /* direct order */
+                ppc440spe_rxor_set_mult(desc, k - 1, index - lop, mult);
+        }
+}
+/**
+ * ppc440spe_init_rxor_cursor -
+ */
+static void ppc440spe_init_rxor_cursor(struct ppc440spe_rxor *cursor)
+{
+        memset(cursor, 0, sizeof(struct ppc440spe_rxor));
+        cursor->state = 2;
+}
+/**
+ * ppc440spe_adma_pq_set_src_mult - set multiplication coefficient into
+ * descriptor for the PQXOR operation
+ */
+static void ppc440spe_adma_pq_set_src_mult(
+                struct ppc440spe_adma_desc_slot *sw_desc,
+                unsigned char mult, int index, int dst_pos)
+{
+        struct ppc440spe_adma_chan *chan;
+        u32 mult_idx, mult_dst;
+        struct ppc440spe_adma_desc_slot *iter = NULL, *iter1 = NULL;
+        chan = to_ppc440spe_adma_chan(sw_desc->async_tx.chan);
+        switch (chan->device->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                if (test_bit(PPC440SPE_DESC_RXOR, &sw_desc->flags)) {
+                        int region = test_bit(PPC440SPE_DESC_RXOR12,
+                                        &sw_desc->flags) ? 2 : 3;
+                        if (index < region) {
+                                /* RXOR multipliers */
+                                iter = ppc440spe_get_group_entry(sw_desc,
+                                        sw_desc->dst_cnt - 1);
+                                if (sw_desc->dst_cnt == 2)
+                                        iter1 = ppc440spe_get_group_entry(
+                                                        sw_desc, 0);
+                                mult_idx = DMA_CUED_MULT1_OFF + (index << 3);
+                                mult_dst = DMA_CDB_SG_SRC;
+                        } else {
+                                /* WXOR multiplier */
+                                iter = ppc440spe_get_group_entry(sw_desc,
+                                                        index - region +
+                                                        sw_desc->dst_cnt);
+                                mult_idx = DMA_CUED_MULT1_OFF;
+                                mult_dst = dst_pos ? DMA_CDB_SG_DST2 :
+                                                     DMA_CDB_SG_DST1;
+                        }
+                } else {
+                        int znum = 0;
+                        /* WXOR-only;
+                         * skip first slots with destinations (if ZERO_DST has
+                         * place)
+                         */
+                        if (test_bit(PPC440SPE_ZERO_P, &sw_desc->flags))
+                                znum++;
+                        if (test_bit(PPC440SPE_ZERO_Q, &sw_desc->flags))
+                                znum++;
+                        iter = ppc440spe_get_group_entry(sw_desc, index + znum);
+                        mult_idx = DMA_CUED_MULT1_OFF;
+                        mult_dst = dst_pos ? DMA_CDB_SG_DST2 : DMA_CDB_SG_DST1;
+                }
+                if (likely(iter)) {
+                        ppc440spe_desc_set_src_mult(iter, chan,
+                                mult_idx, mult_dst, mult);
+                        if (unlikely(iter1)) {
+                                /* if we have two destinations for RXOR, then
+                                 * we've just set Q mult. Set-up P now.
+                                 */
+                                ppc440spe_desc_set_src_mult(iter1, chan,
+                                        mult_idx, mult_dst, 1);
+                        }
+                }
+                break;
+        case PPC440SPE_XOR_ID:
+                iter = sw_desc->group_head;
+                if (sw_desc->dst_cnt == 2) {
+                        /* both P & Q calculations required; set P mult here */
+                        ppc440spe_adma_dma2rxor_set_mult(iter, index, 1);
+                        /* and then set Q mult */
+                        iter = ppc440spe_get_group_entry(sw_desc,
+                               sw_desc->descs_per_op);
+                }
+                ppc440spe_adma_dma2rxor_set_mult(iter, index, mult);
+                break;
+        }
+}
+/**
+ * ppc440spe_adma_free_chan_resources - free the resources allocated
+ */
+static void ppc440spe_adma_free_chan_resources(struct dma_chan *chan)
+{
+        struct ppc440spe_adma_chan *ppc440spe_chan;
+        struct ppc440spe_adma_desc_slot *iter, *_iter;
+        int in_use_descs = 0;
+        ppc440spe_chan = to_ppc440spe_adma_chan(chan);
+        ppc440spe_adma_slot_cleanup(ppc440spe_chan);
+        spin_lock_bh(&ppc440spe_chan->lock);
+        list_for_each_entry_safe(iter, _iter, &ppc440spe_chan->chain,
+                                        chain_node) {
+                in_use_descs++;
+                list_del(&iter->chain_node);
+        }
+        list_for_each_entry_safe_reverse(iter, _iter,
+                        &ppc440spe_chan->all_slots, slot_node) {
+                list_del(&iter->slot_node);
+                kfree(iter);
+                ppc440spe_chan->slots_allocated--;
+        }
+        ppc440spe_chan->last_used = NULL;
+        dev_dbg(ppc440spe_chan->device->common.dev,
+                "ppc440spe adma%d %s slots_allocated %d\n",
+                ppc440spe_chan->device->id,
+                __func__, ppc440spe_chan->slots_allocated);
+        spin_unlock_bh(&ppc440spe_chan->lock);
+        /* one is ok since we left it on there on purpose */
+        if (in_use_descs > 1)
+                printk(KERN_ERR "SPE: Freeing %d in use descriptors!\n",
+                        in_use_descs - 1);
+}
+/**
+ * ppc440spe_adma_is_complete - poll the status of an ADMA transaction
+ * @chan: ADMA channel handle
+ * @cookie: ADMA transaction identifier
+ */
+static enum dma_status ppc440spe_adma_is_complete(struct dma_chan *chan,
+        dma_cookie_t cookie, dma_cookie_t *done, dma_cookie_t *used)
+{
+        struct ppc440spe_adma_chan *ppc440spe_chan;
+        dma_cookie_t last_used;
+        dma_cookie_t last_complete;
+        enum dma_status ret;
+        ppc440spe_chan = to_ppc440spe_adma_chan(chan);
+        last_used = chan->cookie;
+        last_complete = ppc440spe_chan->completed_cookie;
+        if (done)
+                *done = last_complete;
+        if (used)
+                *used = last_used;
+        ret = dma_async_is_complete(cookie, last_complete, last_used);
+        if (ret == DMA_SUCCESS)
+                return ret;
+        ppc440spe_adma_slot_cleanup(ppc440spe_chan);
+        last_used = chan->cookie;
+        last_complete = ppc440spe_chan->completed_cookie;
+        if (done)
+                *done = last_complete;
+        if (used)
+                *used = last_used;
+        return dma_async_is_complete(cookie, last_complete, last_used);
+}
+/**
+ * ppc440spe_adma_eot_handler - end of transfer interrupt handler
+ */
+static irqreturn_t ppc440spe_adma_eot_handler(int irq, void *data)
+{
+        struct ppc440spe_adma_chan *chan = data;
+        dev_dbg(chan->device->common.dev,
+                "ppc440spe adma%d: %s\n", chan->device->id, __func__);
+        tasklet_schedule(&chan->irq_tasklet);
+        ppc440spe_adma_device_clear_eot_status(chan);
+        return IRQ_HANDLED;
+}
+/**
+ * ppc440spe_adma_err_handler - DMA error interrupt handler;
+ *      do the same things as a eot handler
+ */
+static irqreturn_t ppc440spe_adma_err_handler(int irq, void *data)
+{
+        struct ppc440spe_adma_chan *chan = data;
+        dev_dbg(chan->device->common.dev,
+                "ppc440spe adma%d: %s\n", chan->device->id, __func__);
+        tasklet_schedule(&chan->irq_tasklet);
+        ppc440spe_adma_device_clear_eot_status(chan);
+        return IRQ_HANDLED;
+}
+/**
+ * ppc440spe_test_callback - called when test operation has been done
+ */
+static void ppc440spe_test_callback(void *unused)
+{
+        complete(&ppc440spe_r6_test_comp);
+}
+/**
+ * ppc440spe_adma_issue_pending - flush all pending descriptors to h/w
+ */
+static void ppc440spe_adma_issue_pending(struct dma_chan *chan)
+{
+        struct ppc440spe_adma_chan *ppc440spe_chan;
+        ppc440spe_chan = to_ppc440spe_adma_chan(chan);
+        dev_dbg(ppc440spe_chan->device->common.dev,
+                "ppc440spe adma%d: %s %d \n", ppc440spe_chan->device->id,
+                __func__, ppc440spe_chan->pending);
+        if (ppc440spe_chan->pending) {
+                ppc440spe_chan->pending = 0;
+                ppc440spe_chan_append(ppc440spe_chan);
+        }
+}
+/**
+ * ppc440spe_chan_start_null_xor - initiate the first XOR operation (DMA engines
+ *      use FIFOs (as opposite to chains used in XOR) so this is a XOR
+ *      specific operation)
+ */
+static void ppc440spe_chan_start_null_xor(struct ppc440spe_adma_chan *chan)
+{
+        struct ppc440spe_adma_desc_slot *sw_desc, *group_start;
+        dma_cookie_t cookie;
+        int slot_cnt, slots_per_op;
+        dev_dbg(chan->device->common.dev,
+                "ppc440spe adma%d: %s\n", chan->device->id, __func__);
+        spin_lock_bh(&chan->lock);
+        slot_cnt = ppc440spe_chan_xor_slot_count(0, 2, &slots_per_op);
+        sw_desc = ppc440spe_adma_alloc_slots(chan, slot_cnt, slots_per_op);
+        if (sw_desc) {
+                group_start = sw_desc->group_head;
+                list_splice_init(&sw_desc->group_list, &chan->chain);
+                async_tx_ack(&sw_desc->async_tx);
+                ppc440spe_desc_init_null_xor(group_start);
+                cookie = chan->common.cookie;
+                cookie++;
+                if (cookie <= 1)
+                        cookie = 2;
+                /* initialize the completed cookie to be less than
+                 * the most recently used cookie
+                 */
+                chan->completed_cookie = cookie - 1;
+                chan->common.cookie = sw_desc->async_tx.cookie = cookie;
+                /* channel should not be busy */
+                BUG_ON(ppc440spe_chan_is_busy(chan));
+                /* set the descriptor address */
+                ppc440spe_chan_set_first_xor_descriptor(chan, sw_desc);
+                /* run the descriptor */
+                ppc440spe_chan_run(chan);
+        } else
+                printk(KERN_ERR "ppc440spe adma%d"
+                        " failed to allocate null descriptor\n",
+                        chan->device->id);
+        spin_unlock_bh(&chan->lock);
+}
+/**
+ * ppc440spe_test_raid6 - test are RAID-6 capabilities enabled successfully.
+ *      For this we just perform one WXOR operation with the same source
+ *      and destination addresses, the GF-multiplier is 1; so if RAID-6
+ *      capabilities are enabled then we'll get src/dst filled with zero.
+ */
+static int ppc440spe_test_raid6(struct ppc440spe_adma_chan *chan)
+{
+        struct ppc440spe_adma_desc_slot *sw_desc, *iter;
+        struct page *pg;
+        char *a;
+        dma_addr_t dma_addr, addrs[2];
+        unsigned long op = 0;
+        int rval = 0;
+        set_bit(PPC440SPE_DESC_WXOR, &op);
+        pg = alloc_page(GFP_KERNEL);
+        if (!pg)
+                return -ENOMEM;
+        spin_lock_bh(&chan->lock);
+        sw_desc = ppc440spe_adma_alloc_slots(chan, 1, 1);
+        if (sw_desc) {
+                /* 1 src, 1 dsr, int_ena, WXOR */
+                ppc440spe_desc_init_dma01pq(sw_desc, 1, 1, 1, op);
+                list_for_each_entry(iter, &sw_desc->group_list, chain_node) {
+                        ppc440spe_desc_set_byte_count(iter, chan, PAGE_SIZE);
+                        iter->unmap_len = PAGE_SIZE;
+                }
+        } else {
+                rval = -EFAULT;
+                spin_unlock_bh(&chan->lock);
+                goto exit;
+        }
+        spin_unlock_bh(&chan->lock);
+        /* Fill the test page with ones */
+        memset(page_address(pg), 0xFF, PAGE_SIZE);
+        dma_addr = dma_map_page(chan->device->dev, pg, 0,
+                                PAGE_SIZE, DMA_BIDIRECTIONAL);
+        /* Setup addresses */
+        ppc440spe_adma_pq_set_src(sw_desc, dma_addr, 0);
+        ppc440spe_adma_pq_set_src_mult(sw_desc, 1, 0, 0);
+        addrs[0] = dma_addr;
+        addrs[1] = 0;
+        ppc440spe_adma_pq_set_dest(sw_desc, addrs, DMA_PREP_PQ_DISABLE_Q);
+        async_tx_ack(&sw_desc->async_tx);
+        sw_desc->async_tx.callback = ppc440spe_test_callback;
+        sw_desc->async_tx.callback_param = NULL;
+        init_completion(&ppc440spe_r6_test_comp);
+        ppc440spe_adma_tx_submit(&sw_desc->async_tx);
+        ppc440spe_adma_issue_pending(&chan->common);
+        wait_for_completion(&ppc440spe_r6_test_comp);
+        /* Now check if the test page is zeroed */
+        a = page_address(pg);
+        if ((*(u32 *)a) == 0 && memcmp(a, a+4, PAGE_SIZE-4) == 0) {
+                /* page is zero - RAID-6 enabled */
+                rval = 0;
+        } else {
+                /* RAID-6 was not enabled */
+                rval = -EINVAL;
+        }
+exit:
+        __free_page(pg);
+        return rval;
+}
+static void ppc440spe_adma_init_capabilities(struct ppc440spe_adma_device *adev)
+{
+        switch (adev->id) {
+        case PPC440SPE_DMA0_ID:
+        case PPC440SPE_DMA1_ID:
+                dma_cap_set(DMA_MEMCPY, adev->common.cap_mask);
+                dma_cap_set(DMA_INTERRUPT, adev->common.cap_mask);
+                dma_cap_set(DMA_MEMSET, adev->common.cap_mask);
+                dma_cap_set(DMA_PQ, adev->common.cap_mask);
+                dma_cap_set(DMA_PQ_VAL, adev->common.cap_mask);
+                dma_cap_set(DMA_XOR_VAL, adev->common.cap_mask);
+                break;
+        case PPC440SPE_XOR_ID:
+                dma_cap_set(DMA_XOR, adev->common.cap_mask);
+                dma_cap_set(DMA_PQ, adev->common.cap_mask);
+                dma_cap_set(DMA_INTERRUPT, adev->common.cap_mask);
+                adev->common.cap_mask = adev->common.cap_mask;
+                break;
+        }
+        /* Set base routines */
+        adev->common.device_alloc_chan_resources =
+                                ppc440spe_adma_alloc_chan_resources;
+        adev->common.device_free_chan_resources =
+                                ppc440spe_adma_free_chan_resources;
+        adev->common.device_is_tx_complete = ppc440spe_adma_is_complete;
+        adev->common.device_issue_pending = ppc440spe_adma_issue_pending;
+        /* Set prep routines based on capability */
+        if (dma_has_cap(DMA_MEMCPY, adev->common.cap_mask)) {
+                adev->common.device_prep_dma_memcpy =
+                        ppc440spe_adma_prep_dma_memcpy;
+        }
+        if (dma_has_cap(DMA_MEMSET, adev->common.cap_mask)) {
+                adev->common.device_prep_dma_memset =
+                        ppc440spe_adma_prep_dma_memset;
+        }
+        if (dma_has_cap(DMA_XOR, adev->common.cap_mask)) {
+                adev->common.max_xor = XOR_MAX_OPS;
+                adev->common.device_prep_dma_xor =
+                        ppc440spe_adma_prep_dma_xor;
+        }
+        if (dma_has_cap(DMA_PQ, adev->common.cap_mask)) {
+                switch (adev->id) {
+                case PPC440SPE_DMA0_ID:
+                        dma_set_maxpq(&adev->common,
+                                DMA0_FIFO_SIZE / sizeof(struct dma_cdb), 0);
+                        break;
+                case PPC440SPE_DMA1_ID:
+                        dma_set_maxpq(&adev->common,
+                                DMA1_FIFO_SIZE / sizeof(struct dma_cdb), 0);
+                        break;
+                case PPC440SPE_XOR_ID:
+                        adev->common.max_pq = XOR_MAX_OPS * 3;
+                        break;
+                }
+                adev->common.device_prep_dma_pq =
+                        ppc440spe_adma_prep_dma_pq;
+        }
+        if (dma_has_cap(DMA_PQ_VAL, adev->common.cap_mask)) {
+                switch (adev->id) {
+                case PPC440SPE_DMA0_ID:
+                        adev->common.max_pq = DMA0_FIFO_SIZE /
+                                                sizeof(struct dma_cdb);
+                        break;
+                case PPC440SPE_DMA1_ID:
+                        adev->common.max_pq = DMA1_FIFO_SIZE /
+                                                sizeof(struct dma_cdb);
+                        break;
+                }
+                adev->common.device_prep_dma_pq_val =
+                        ppc440spe_adma_prep_dma_pqzero_sum;
+        }
+        if (dma_has_cap(DMA_XOR_VAL, adev->common.cap_mask)) {
+                switch (adev->id) {
+                case PPC440SPE_DMA0_ID:
+                        adev->common.max_xor = DMA0_FIFO_SIZE /
+                                                sizeof(struct dma_cdb);
+                        break;
+                case PPC440SPE_DMA1_ID:
+                        adev->common.max_xor = DMA1_FIFO_SIZE /
+                                                sizeof(struct dma_cdb);
+                        break;
+                }
+                adev->common.device_prep_dma_xor_val =
+                        ppc440spe_adma_prep_dma_xor_zero_sum;
+        }
+        if (dma_has_cap(DMA_INTERRUPT, adev->common.cap_mask)) {
+                adev->common.device_prep_dma_interrupt =
+                        ppc440spe_adma_prep_dma_interrupt;
+        }
+        pr_info("%s: AMCC(R) PPC440SP(E) ADMA Engine: "
+          "( %s%s%s%s%s%s%s)\n",
+          dev_name(adev->dev),
+          dma_has_cap(DMA_PQ, adev->common.cap_mask) ? "pq " : "",
+          dma_has_cap(DMA_PQ_VAL, adev->common.cap_mask) ? "pq_val " : "",
+          dma_has_cap(DMA_XOR, adev->common.cap_mask) ? "xor " : "",
+          dma_has_cap(DMA_XOR_VAL, adev->common.cap_mask) ? "xor_val " : "",
+          dma_has_cap(DMA_MEMCPY, adev->common.cap_mask) ? "memcpy " : "",
+          dma_has_cap(DMA_MEMSET, adev->common.cap_mask)  ? "memset " : "",
+          dma_has_cap(DMA_INTERRUPT, adev->common.cap_mask) ? "intr " : "");
+}
+static int ppc440spe_adma_setup_irqs(struct ppc440spe_adma_device *adev,
+                                     struct ppc440spe_adma_chan *chan,
+                                     int *initcode)
+{
+        struct device_node *np;
+        int ret;
+        np = container_of(adev->dev, struct of_device, dev)->node;
+        if (adev->id != PPC440SPE_XOR_ID) {
+                adev->err_irq = irq_of_parse_and_map(np, 1);
+                if (adev->err_irq == NO_IRQ) {
+                        dev_warn(adev->dev, "no err irq resource?\n");
+                        *initcode = PPC_ADMA_INIT_IRQ2;
+                        adev->err_irq = -ENXIO;
+                } else
+                        atomic_inc(&ppc440spe_adma_err_irq_ref);
+        } else {
+                adev->err_irq = -ENXIO;
+        }
+        adev->irq = irq_of_parse_and_map(np, 0);
+        if (adev->irq == NO_IRQ) {
+                dev_err(adev->dev, "no irq resource\n");
+                *initcode = PPC_ADMA_INIT_IRQ1;
+                ret = -ENXIO;
+                goto err_irq_map;
+        }
+        dev_dbg(adev->dev, "irq %d, err irq %d\n",
+                adev->irq, adev->err_irq);
+        ret = request_irq(adev->irq, ppc440spe_adma_eot_handler,
+                          0, dev_driver_string(adev->dev), chan);
+        if (ret) {
+                dev_err(adev->dev, "can't request irq %d\n",
+                        adev->irq);
+                *initcode = PPC_ADMA_INIT_IRQ1;
+                ret = -EIO;
+                goto err_req1;
+        }
+        /* only DMA engines have a separate error IRQ
+         * so it's Ok if err_irq < 0 in XOR engine case.
+         */
+        if (adev->err_irq > 0) {
+                /* both DMA engines share common error IRQ */
+                ret = request_irq(adev->err_irq,
+                                  ppc440spe_adma_err_handler,
+                                  IRQF_SHARED,
+                                  dev_driver_string(adev->dev),
+                                  chan);
+                if (ret) {
+                        dev_err(adev->dev, "can't request irq %d\n",
+                                adev->err_irq);
+                        *initcode = PPC_ADMA_INIT_IRQ2;
+                        ret = -EIO;
+                        goto err_req2;
+                }
+        }
+        if (adev->id == PPC440SPE_XOR_ID) {
+                /* enable XOR engine interrupts */
+                iowrite32be(XOR_IE_CBCIE_BIT | XOR_IE_ICBIE_BIT |
+                            XOR_IE_ICIE_BIT | XOR_IE_RPTIE_BIT,
+                            &adev->xor_reg->ier);
+        } else {
+                u32 mask, enable;
+                np = of_find_compatible_node(NULL, NULL, "ibm,i2o-440spe");
+                if (!np) {
+                        pr_err("%s: can't find I2O device tree node\n",
+                                __func__);
+                        ret = -ENODEV;
+                        goto err_req2;
+                }
+                adev->i2o_reg = of_iomap(np, 0);
+                if (!adev->i2o_reg) {
+                        pr_err("%s: failed to map I2O registers\n", __func__);
+                        of_node_put(np);
+                        ret = -EINVAL;
+                        goto err_req2;
+                }
+                of_node_put(np);
+                /* Unmask 'CS FIFO Attention' interrupts and
+                 * enable generating interrupts on errors
+                 */
+                enable = (adev->id == PPC440SPE_DMA0_ID) ?
+                         ~(I2O_IOPIM_P0SNE | I2O_IOPIM_P0EM) :
+                         ~(I2O_IOPIM_P1SNE | I2O_IOPIM_P1EM);
+                mask = ioread32(&adev->i2o_reg->iopim) & enable;
+                iowrite32(mask, &adev->i2o_reg->iopim);
+        }
+        return 0;
+err_req2:
+        free_irq(adev->irq, chan);
+err_req1:
+        irq_dispose_mapping(adev->irq);
+err_irq_map:
+        if (adev->err_irq > 0) {
+                if (atomic_dec_and_test(&ppc440spe_adma_err_irq_ref))
+                        irq_dispose_mapping(adev->err_irq);
+        }
+        return ret;
+}
+static void ppc440spe_adma_release_irqs(struct ppc440spe_adma_device *adev,
+                                        struct ppc440spe_adma_chan *chan)
+{
+        u32 mask, disable;
+        if (adev->id == PPC440SPE_XOR_ID) {
+                /* disable XOR engine interrupts */
+                mask = ioread32be(&adev->xor_reg->ier);
+                mask &= ~(XOR_IE_CBCIE_BIT | XOR_IE_ICBIE_BIT |
+                          XOR_IE_ICIE_BIT | XOR_IE_RPTIE_BIT);
+                iowrite32be(mask, &adev->xor_reg->ier);
+        } else {
+                /* disable DMAx engine interrupts */
+                disable = (adev->id == PPC440SPE_DMA0_ID) ?
+                          (I2O_IOPIM_P0SNE | I2O_IOPIM_P0EM) :
+                          (I2O_IOPIM_P1SNE | I2O_IOPIM_P1EM);
+                mask = ioread32(&adev->i2o_reg->iopim) | disable;
+                iowrite32(mask, &adev->i2o_reg->iopim);
+        }
+        free_irq(adev->irq, chan);
+        irq_dispose_mapping(adev->irq);
+        if (adev->err_irq > 0) {
+                free_irq(adev->err_irq, chan);
+                if (atomic_dec_and_test(&ppc440spe_adma_err_irq_ref)) {
+                        irq_dispose_mapping(adev->err_irq);
+                        iounmap(adev->i2o_reg);
+                }
+        }
+}
+/**
+ * ppc440spe_adma_probe - probe the asynch device
+ */
+static int __devinit ppc440spe_adma_probe(struct of_device *ofdev,
+                                          const struct of_device_id *match)
+{
+        struct device_node *np = ofdev->node;
+        struct resource res;
+        struct ppc440spe_adma_device *adev;
+        struct ppc440spe_adma_chan *chan;
+        struct ppc_dma_chan_ref *ref, *_ref;
+        int ret = 0, initcode = PPC_ADMA_INIT_OK;
+        const u32 *idx;
+        int len;
+        void *regs;
+        u32 id, pool_size;
+        if (of_device_is_compatible(np, "amcc,xor-accelerator")) {
+                id = PPC440SPE_XOR_ID;
+                /* As far as the XOR engine is concerned, it does not
+                 * use FIFOs but uses linked list. So there is no dependency
+                 * between pool size to allocate and the engine configuration.
+                 */
+                pool_size = PAGE_SIZE << 1;
+        } else {
+                /* it is DMA0 or DMA1 */
+                idx = of_get_property(np, "cell-index", &len);
+                if (!idx || (len != sizeof(u32))) {
+                        dev_err(&ofdev->dev, "Device node %s has missing "
+                                "or invalid cell-index property\n",
+                                np->full_name);
+                        return -EINVAL;
+                }
+                id = *idx;
+                /* DMA0,1 engines use FIFO to maintain CDBs, so we
+                 * should allocate the pool accordingly to size of this
+                 * FIFO. Thus, the pool size depends on the FIFO depth:
+                 * how much CDBs pointers the FIFO may contain then so
+                 * much CDBs we should provide in the pool.
+                 * That is
+                 *   CDB size = 32B;
+                 *   CDBs number = (DMA0_FIFO_SIZE >> 3);
+                 *   Pool size = CDBs number * CDB size =
+                 *      = (DMA0_FIFO_SIZE >> 3) << 5 = DMA0_FIFO_SIZE << 2.
+                 */
+                pool_size = (id == PPC440SPE_DMA0_ID) ?
+                            DMA0_FIFO_SIZE : DMA1_FIFO_SIZE;
+                pool_size <<= 2;
+        }
+        if (of_address_to_resource(np, 0, &res)) {
+                dev_err(&ofdev->dev, "failed to get memory resource\n");
+                initcode = PPC_ADMA_INIT_MEMRES;
+                ret = -ENODEV;
+                goto out;
+        }
+        if (!request_mem_region(res.start, resource_size(&res),
+                                dev_driver_string(&ofdev->dev))) {
+                dev_err(&ofdev->dev, "failed to request memory region "
+                        "(0x%016llx-0x%016llx)\n",
+                        (u64)res.start, (u64)res.end);
+                initcode = PPC_ADMA_INIT_MEMREG;
+                ret = -EBUSY;
+                goto out;
+        }
+        /* create a device */
+        adev = kzalloc(sizeof(*adev), GFP_KERNEL);
+        if (!adev) {
+                dev_err(&ofdev->dev, "failed to allocate device\n");
+                initcode = PPC_ADMA_INIT_ALLOC;
+                ret = -ENOMEM;
+                goto err_adev_alloc;
+        }
+        adev->id = id;
+        adev->pool_size = pool_size;
+        /* allocate coherent memory for hardware descriptors */
+        adev->dma_desc_pool_virt = dma_alloc_coherent(&ofdev->dev,
+                                        adev->pool_size, &adev->dma_desc_pool,
+                                        GFP_KERNEL);
+        if (adev->dma_desc_pool_virt == NULL) {
+                dev_err(&ofdev->dev, "failed to allocate %d bytes of coherent "
+                        "memory for hardware descriptors\n",
+                        adev->pool_size);
+                initcode = PPC_ADMA_INIT_COHERENT;
+                ret = -ENOMEM;
+                goto err_dma_alloc;
+        }
+        dev_dbg(&ofdev->dev, "allocted descriptor pool virt 0x%p phys 0x%llx\n",
+                adev->dma_desc_pool_virt, (u64)adev->dma_desc_pool);
+        regs = ioremap(res.start, resource_size(&res));
+        if (!regs) {
+                dev_err(&ofdev->dev, "failed to ioremap regs!\n");
+                goto err_regs_alloc;
+        }
+        if (adev->id == PPC440SPE_XOR_ID) {
+                adev->xor_reg = regs;
+                /* Reset XOR */
+                iowrite32be(XOR_CRSR_XASR_BIT, &adev->xor_reg->crsr);
+                iowrite32be(XOR_CRSR_64BA_BIT, &adev->xor_reg->crrr);
+        } else {
+                size_t fifo_size = (adev->id == PPC440SPE_DMA0_ID) ?
+                                   DMA0_FIFO_SIZE : DMA1_FIFO_SIZE;
+                adev->dma_reg = regs;
+                /* DMAx_FIFO_SIZE is defined in bytes,
+                 * <fsiz> - is defined in number of CDB pointers (8byte).
+                 * DMA FIFO Length = CSlength + CPlength, where
+                 * CSlength = CPlength = (fsiz + 1) * 8.
+                 */
+                iowrite32(DMA_FIFO_ENABLE | ((fifo_size >> 3) - 2),
+                          &adev->dma_reg->fsiz);
+                /* Configure DMA engine */
+                iowrite32(DMA_CFG_DXEPR_HP | DMA_CFG_DFMPP_HP | DMA_CFG_FALGN,
+                          &adev->dma_reg->cfg);
+                /* Clear Status */
+                iowrite32(~0, &adev->dma_reg->dsts);
+        }
+        adev->dev = &ofdev->dev;
+        adev->common.dev = &ofdev->dev;
+        INIT_LIST_HEAD(&adev->common.channels);
+        dev_set_drvdata(&ofdev->dev, adev);
+        /* create a channel */
+        chan = kzalloc(sizeof(*chan), GFP_KERNEL);
+        if (!chan) {
+                dev_err(&ofdev->dev, "can't allocate channel structure\n");
+                initcode = PPC_ADMA_INIT_CHANNEL;
+                ret = -ENOMEM;
+                goto err_chan_alloc;
+        }
+        spin_lock_init(&chan->lock);
+        INIT_LIST_HEAD(&chan->chain);
+        INIT_LIST_HEAD(&chan->all_slots);
+        chan->device = adev;
+        chan->common.device = &adev->common;
+        list_add_tail(&chan->common.device_node, &adev->common.channels);
+        tasklet_init(&chan->irq_tasklet, ppc440spe_adma_tasklet,
+                     (unsigned long)chan);
+        /* allocate and map helper pages for async validation or
+         * async_mult/async_sum_product operations on DMA0/1.
+         */
+        if (adev->id != PPC440SPE_XOR_ID) {
+                chan->pdest_page = alloc_page(GFP_KERNEL);
+                chan->qdest_page = alloc_page(GFP_KERNEL);
+                if (!chan->pdest_page ||
+                    !chan->qdest_page) {
+                        if (chan->pdest_page)
+                                __free_page(chan->pdest_page);
+                        if (chan->qdest_page)
+                                __free_page(chan->qdest_page);
+                        ret = -ENOMEM;
+                        goto err_page_alloc;
+                }
+                chan->pdest = dma_map_page(&ofdev->dev, chan->pdest_page, 0,
+                                           PAGE_SIZE, DMA_BIDIRECTIONAL);
+                chan->qdest = dma_map_page(&ofdev->dev, chan->qdest_page, 0,
+                                           PAGE_SIZE, DMA_BIDIRECTIONAL);
+        }
+        ref = kmalloc(sizeof(*ref), GFP_KERNEL);
+        if (ref) {
+                ref->chan = &chan->common;
+                INIT_LIST_HEAD(&ref->node);
+                list_add_tail(&ref->node, &ppc440spe_adma_chan_list);
+        } else {
+                dev_err(&ofdev->dev, "failed to allocate channel reference!\n");
+                ret = -ENOMEM;
+                goto err_ref_alloc;
+        }
+        ret = ppc440spe_adma_setup_irqs(adev, chan, &initcode);
+        if (ret)
+                goto err_irq;
+        ppc440spe_adma_init_capabilities(adev);
+        ret = dma_async_device_register(&adev->common);
+        if (ret) {
+                initcode = PPC_ADMA_INIT_REGISTER;
+                dev_err(&ofdev->dev, "failed to register dma device\n");
+                goto err_dev_reg;
+        }
+        goto out;
+err_dev_reg:
+        ppc440spe_adma_release_irqs(adev, chan);
+err_irq:
+        list_for_each_entry_safe(ref, _ref, &ppc440spe_adma_chan_list, node) {
+                if (chan == to_ppc440spe_adma_chan(ref->chan)) {
+                        list_del(&ref->node);
+                        kfree(ref);
+                }
+        }
+err_ref_alloc:
+        if (adev->id != PPC440SPE_XOR_ID) {
+                dma_unmap_page(&ofdev->dev, chan->pdest,
+                               PAGE_SIZE, DMA_BIDIRECTIONAL);
+                dma_unmap_page(&ofdev->dev, chan->qdest,
+                               PAGE_SIZE, DMA_BIDIRECTIONAL);
+                __free_page(chan->pdest_page);
+                __free_page(chan->qdest_page);
+        }
+err_page_alloc:
+        kfree(chan);
+err_chan_alloc:
+        if (adev->id == PPC440SPE_XOR_ID)
+                iounmap(adev->xor_reg);
+        else
+                iounmap(adev->dma_reg);
+err_regs_alloc:
+        dma_free_coherent(adev->dev, adev->pool_size,
+                          adev->dma_desc_pool_virt,
+                          adev->dma_desc_pool);
+err_dma_alloc:
+        kfree(adev);
+err_adev_alloc:
+        release_mem_region(res.start, resource_size(&res));
+out:
+        if (id < PPC440SPE_ADMA_ENGINES_NUM)
+                ppc440spe_adma_devices[id] = initcode;
+        return ret;
+}
+/**
+ * ppc440spe_adma_remove - remove the asynch device
+ */
+static int __devexit ppc440spe_adma_remove(struct of_device *ofdev)
+{
+        struct ppc440spe_adma_device *adev = dev_get_drvdata(&ofdev->dev);
+        struct device_node *np = ofdev->node;
+        struct resource res;
+        struct dma_chan *chan, *_chan;
+        struct ppc_dma_chan_ref *ref, *_ref;
+        struct ppc440spe_adma_chan *ppc440spe_chan;
+        dev_set_drvdata(&ofdev->dev, NULL);
+        if (adev->id < PPC440SPE_ADMA_ENGINES_NUM)
+                ppc440spe_adma_devices[adev->id] = -1;
+        dma_async_device_unregister(&adev->common);
+        list_for_each_entry_safe(chan, _chan, &adev->common.channels,
+                                 device_node) {
+                ppc440spe_chan = to_ppc440spe_adma_chan(chan);
+                ppc440spe_adma_release_irqs(adev, ppc440spe_chan);
+                tasklet_kill(&ppc440spe_chan->irq_tasklet);
+                if (adev->id != PPC440SPE_XOR_ID) {
+                        dma_unmap_page(&ofdev->dev, ppc440spe_chan->pdest,
+                                        PAGE_SIZE, DMA_BIDIRECTIONAL);
+                        dma_unmap_page(&ofdev->dev, ppc440spe_chan->qdest,
+                                        PAGE_SIZE, DMA_BIDIRECTIONAL);
+                        __free_page(ppc440spe_chan->pdest_page);
+                        __free_page(ppc440spe_chan->qdest_page);
+                }
+                list_for_each_entry_safe(ref, _ref, &ppc440spe_adma_chan_list,
+                                         node) {
+                        if (ppc440spe_chan ==
+                            to_ppc440spe_adma_chan(ref->chan)) {
+                                list_del(&ref->node);
+                                kfree(ref);
+                        }
+                }
+                list_del(&chan->device_node);
+                kfree(ppc440spe_chan);
+        }
+        dma_free_coherent(adev->dev, adev->pool_size,
+                          adev->dma_desc_pool_virt, adev->dma_desc_pool);
+        if (adev->id == PPC440SPE_XOR_ID)
+                iounmap(adev->xor_reg);
+        else
+                iounmap(adev->dma_reg);
+        of_address_to_resource(np, 0, &res);
+        release_mem_region(res.start, resource_size(&res));
+        kfree(adev);
+        return 0;
+}
+/*
+ * /sys driver interface to enable h/w RAID-6 capabilities
+ * Files created in e.g. /sys/devices/plb.0/400100100.dma0/driver/
+ * directory are "devices", "enable" and "poly".
+ * "devices" shows available engines.
+ * "enable" is used to enable RAID-6 capabilities or to check
+ * whether these has been activated.
+ * "poly" allows setting/checking used polynomial (for PPC440SPe only).
+ */
+static ssize_t show_ppc440spe_devices(struct device_driver *dev, char *buf)
+{
+        ssize_t size = 0;
+        int i;
+        for (i = 0; i < PPC440SPE_ADMA_ENGINES_NUM; i++) {
+                if (ppc440spe_adma_devices[i] == -1)
+                        continue;
+                size += snprintf(buf + size, PAGE_SIZE - size,
+                                 "PPC440SP(E)-ADMA.%d: %s\n", i,
+                                 ppc_adma_errors[ppc440spe_adma_devices[i]]);
+        }
+        return size;
+}
+static ssize_t show_ppc440spe_r6enable(struct device_driver *dev, char *buf)
+{
+        return snprintf(buf, PAGE_SIZE,
+                        "PPC440SP(e) RAID-6 capabilities are %sABLED.\n",
+                        ppc440spe_r6_enabled ? "EN" : "DIS");
+}
+static ssize_t store_ppc440spe_r6enable(struct device_driver *dev,
+                                        const char *buf, size_t count)
+{
+        unsigned long val;
+        if (!count || count > 11)
+                return -EINVAL;
+        if (!ppc440spe_r6_tchan)
+                return -EFAULT;
+        /* Write a key */
+        sscanf(buf, "%lx", &val);
+        dcr_write(ppc440spe_mq_dcr_host, DCRN_MQ0_XORBA, val);
+        isync();
+        /* Verify whether it really works now */
+        if (ppc440spe_test_raid6(ppc440spe_r6_tchan) == 0) {
+                pr_info("PPC440SP(e) RAID-6 has been activated "
+                        "successfully\n");
+                ppc440spe_r6_enabled = 1;
+        } else {
+                pr_info("PPC440SP(e) RAID-6 hasn't been activated!"
+                        " Error key ?\n");
+                ppc440spe_r6_enabled = 0;
+        }
+        return count;
+}
+static ssize_t show_ppc440spe_r6poly(struct device_driver *dev, char *buf)
+{
+        ssize_t size = 0;
+        u32 reg;
+#ifdef CONFIG_440SP
+        /* 440SP has fixed polynomial */
+        reg = 0x4d;
+#else
+        reg = dcr_read(ppc440spe_mq_dcr_host, DCRN_MQ0_CFBHL);
+        reg >>= MQ0_CFBHL_POLY;
+        reg &= 0xFF;
+#endif
+        size = snprintf(buf, PAGE_SIZE, "PPC440SP(e) RAID-6 driver "
+                        "uses 0x1%02x polynomial.\n", reg);
+        return size;
+}
+static ssize_t store_ppc440spe_r6poly(struct device_driver *dev,
+                                      const char *buf, size_t count)
+{
+        unsigned long reg, val;
+#ifdef CONFIG_440SP
+        /* 440SP uses default 0x14D polynomial only */
+        return -EINVAL;
+#endif
+        if (!count || count > 6)
+                return -EINVAL;
+        /* e.g., 0x14D or 0x11D */
+        sscanf(buf, "%lx", &val);
+        if (val & ~0x1FF)
+                return -EINVAL;
+        val &= 0xFF;
+        reg = dcr_read(ppc440spe_mq_dcr_host, DCRN_MQ0_CFBHL);
+        reg &= ~(0xFF << MQ0_CFBHL_POLY);
+        reg |= val << MQ0_CFBHL_POLY;
+        dcr_write(ppc440spe_mq_dcr_host, DCRN_MQ0_CFBHL, reg);
+        return count;
+}
+static DRIVER_ATTR(devices, S_IRUGO, show_ppc440spe_devices, NULL);
+static DRIVER_ATTR(enable, S_IRUGO | S_IWUSR, show_ppc440spe_r6enable,
+                   store_ppc440spe_r6enable);
+static DRIVER_ATTR(poly, S_IRUGO | S_IWUSR, show_ppc440spe_r6poly,
+                   store_ppc440spe_r6poly);
+/*
+ * Common initialisation for RAID engines; allocate memory for
+ * DMAx FIFOs, perform configuration common for all DMA engines.
+ * Further DMA engine specific configuration is done at probe time.
+ */
+static int ppc440spe_configure_raid_devices(void)
+{
+        struct device_node *np;
+        struct resource i2o_res;
+        struct i2o_regs __iomem *i2o_reg;
+        dcr_host_t i2o_dcr_host;
+        unsigned int dcr_base, dcr_len;
+        int i, ret;
+        np = of_find_compatible_node(NULL, NULL, "ibm,i2o-440spe");
+        if (!np) {
+                pr_err("%s: can't find I2O device tree node\n",
+                        __func__);
+                return -ENODEV;
+        }
+        if (of_address_to_resource(np, 0, &i2o_res)) {
+                of_node_put(np);
+                return -EINVAL;
+        }
+        i2o_reg = of_iomap(np, 0);
+        if (!i2o_reg) {
+                pr_err("%s: failed to map I2O registers\n", __func__);
+                of_node_put(np);
+                return -EINVAL;
+        }
+        /* Get I2O DCRs base */
+        dcr_base = dcr_resource_start(np, 0);
+        dcr_len = dcr_resource_len(np, 0);
+        if (!dcr_base && !dcr_len) {
+                pr_err("%s: can't get DCR registers base/len!\n",
+                        np->full_name);
+                of_node_put(np);
+                iounmap(i2o_reg);
+                return -ENODEV;
+        }
+        i2o_dcr_host = dcr_map(np, dcr_base, dcr_len);
+        if (!DCR_MAP_OK(i2o_dcr_host)) {
+                pr_err("%s: failed to map DCRs!\n", np->full_name);
+                of_node_put(np);
+                iounmap(i2o_reg);
+                return -ENODEV;
+        }
+        of_node_put(np);
+        /* Provide memory regions for DMA's FIFOs: I2O, DMA0 and DMA1 share
+         * the base address of FIFO memory space.
+         * Actually we need twice more physical memory than programmed in the
+         * <fsiz> register (because there are two FIFOs for each DMA: CP and CS)
+         */
+        ppc440spe_dma_fifo_buf = kmalloc((DMA0_FIFO_SIZE + DMA1_FIFO_SIZE) << 1,
+                                         GFP_KERNEL);
+        if (!ppc440spe_dma_fifo_buf) {
+                pr_err("%s: DMA FIFO buffer allocation failed.\n", __func__);
+                iounmap(i2o_reg);
+                dcr_unmap(i2o_dcr_host, dcr_len);
+                return -ENOMEM;
+        }
+        /*
+         * Configure h/w
+         */
+        /* Reset I2O/DMA */
+        mtdcri(SDR0, DCRN_SDR0_SRST, DCRN_SDR0_SRST_I2ODMA);
+        mtdcri(SDR0, DCRN_SDR0_SRST, 0);
+        /* Setup the base address of mmaped registers */
+        dcr_write(i2o_dcr_host, DCRN_I2O0_IBAH, (u32)(i2o_res.start >> 32));
+        dcr_write(i2o_dcr_host, DCRN_I2O0_IBAL, (u32)(i2o_res.start) |
+                                                I2O_REG_ENABLE);
+        dcr_unmap(i2o_dcr_host, dcr_len);
+        /* Setup FIFO memory space base address */
+        iowrite32(0, &i2o_reg->ifbah);
+        iowrite32(((u32)__pa(ppc440spe_dma_fifo_buf)), &i2o_reg->ifbal);
+        /* set zero FIFO size for I2O, so the whole
+         * ppc440spe_dma_fifo_buf is used by DMAs.
+         * DMAx_FIFOs will be configured while probe.
+         */
+        iowrite32(0, &i2o_reg->ifsiz);
+        iounmap(i2o_reg);
+        /* To prepare WXOR/RXOR functionality we need access to
+         * Memory Queue Module DCRs (finally it will be enabled
+         * via /sys interface of the ppc440spe ADMA driver).
+         */
+        np = of_find_compatible_node(NULL, NULL, "ibm,mq-440spe");
+        if (!np) {
+                pr_err("%s: can't find MQ device tree node\n",
+                        __func__);
+                ret = -ENODEV;
+                goto out_free;
+        }
+        /* Get MQ DCRs base */
+        dcr_base = dcr_resource_start(np, 0);
+        dcr_len = dcr_resource_len(np, 0);
+        if (!dcr_base && !dcr_len) {
+                pr_err("%s: can't get DCR registers base/len!\n",
+                        np->full_name);
+                ret = -ENODEV;
+                goto out_mq;
+        }
+        ppc440spe_mq_dcr_host = dcr_map(np, dcr_base, dcr_len);
+        if (!DCR_MAP_OK(ppc440spe_mq_dcr_host)) {
+                pr_err("%s: failed to map DCRs!\n", np->full_name);
+                ret = -ENODEV;
+                goto out_mq;
+        }
+        of_node_put(np);
+        ppc440spe_mq_dcr_len = dcr_len;
+        /* Set HB alias */
+        dcr_write(ppc440spe_mq_dcr_host, DCRN_MQ0_BAUH, DMA_CUED_XOR_HB);
+        /* Set:
+         * - LL transaction passing limit to 1;
+         * - Memory controller cycle limit to 1;
+         * - Galois Polynomial to 0x14d (default)
+         */
+        dcr_write(ppc440spe_mq_dcr_host, DCRN_MQ0_CFBHL,
+                  (1 << MQ0_CFBHL_TPLM) | (1 << MQ0_CFBHL_HBCL) |
+                  (PPC440SPE_DEFAULT_POLY << MQ0_CFBHL_POLY));
+        atomic_set(&ppc440spe_adma_err_irq_ref, 0);
+        for (i = 0; i < PPC440SPE_ADMA_ENGINES_NUM; i++)
+                ppc440spe_adma_devices[i] = -1;
+        return 0;
+out_mq:
+        of_node_put(np);
+out_free:
+        kfree(ppc440spe_dma_fifo_buf);
+        return ret;
+}
+static struct of_device_id __devinitdata ppc440spe_adma_of_match[] = {
+        { .compatible   = "ibm,dma-440spe", },
+        { .compatible   = "amcc,xor-accelerator", },
+        {},
+};
+MODULE_DEVICE_TABLE(of, ppc440spe_adma_of_match);
+static struct of_platform_driver ppc440spe_adma_driver = {
+        .match_table = ppc440spe_adma_of_match,
+        .probe = ppc440spe_adma_probe,
+        .remove = __devexit_p(ppc440spe_adma_remove),
+        .driver = {
+                .name = "PPC440SP(E)-ADMA",
+                .owner = THIS_MODULE,
+        },
+};
+static __init int ppc440spe_adma_init(void)
+{
+        int ret;
+        ret = ppc440spe_configure_raid_devices();
+        if (ret)
+                return ret;
+        ret = of_register_platform_driver(&ppc440spe_adma_driver);
+        if (ret) {
+                pr_err("%s: failed to register platform driver\n",
+                        __func__);
+                goto out_reg;
+        }
+        /* Initialization status */
+        ret = driver_create_file(&ppc440spe_adma_driver.driver,
+                                 &driver_attr_devices);
+        if (ret)
+                goto out_dev;
+        /* RAID-6 h/w enable entry */
+        ret = driver_create_file(&ppc440spe_adma_driver.driver,
+                                 &driver_attr_enable);
+        if (ret)
+                goto out_en;
+        /* GF polynomial to use */
+        ret = driver_create_file(&ppc440spe_adma_driver.driver,
+                                 &driver_attr_poly);
+        if (!ret)
+                return ret;
+        driver_remove_file(&ppc440spe_adma_driver.driver,
+                           &driver_attr_enable);
+out_en:
+        driver_remove_file(&ppc440spe_adma_driver.driver,
+                           &driver_attr_devices);
+out_dev:
+        /* User will not be able to enable h/w RAID-6 */
+        pr_err("%s: failed to create RAID-6 driver interface\n",
+                __func__);
+        of_unregister_platform_driver(&ppc440spe_adma_driver);
+out_reg:
+        dcr_unmap(ppc440spe_mq_dcr_host, ppc440spe_mq_dcr_len);
+        kfree(ppc440spe_dma_fifo_buf);
+        return ret;
+}
+static void __exit ppc440spe_adma_exit(void)
+{
+        driver_remove_file(&ppc440spe_adma_driver.driver,
+                           &driver_attr_poly);
+        driver_remove_file(&ppc440spe_adma_driver.driver,
+                           &driver_attr_enable);
+        driver_remove_file(&ppc440spe_adma_driver.driver,
+                           &driver_attr_devices);
+        of_unregister_platform_driver(&ppc440spe_adma_driver);
+        dcr_unmap(ppc440spe_mq_dcr_host, ppc440spe_mq_dcr_len);
+        kfree(ppc440spe_dma_fifo_buf);
+}
+arch_initcall(ppc440spe_adma_init);
+module_exit(ppc440spe_adma_exit);
+MODULE_AUTHOR("Yuri Tikhonov <yur@emcraft.com>");
+MODULE_DESCRIPTION("PPC440SPE ADMA Engine Driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/dma/ppc4xx/adma.h b/drivers/dma/ppc4xx/adma.h
new file mode 100644
index 000000000000..8ada5a812e3b
--- /dev/null
+++ b/drivers/dma/ppc4xx/adma.h
@@ -0,0 +1,195 @@
+/*
+ * 2006-2009 (C) DENX Software Engineering.
+ *
+ * Author: Yuri Tikhonov <yur@emcraft.com>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of
+ * any kind, whether express or implied.
+ */
+#ifndef _PPC440SPE_ADMA_H
+#define _PPC440SPE_ADMA_H
+#include <linux/types.h>
+#include "dma.h"
+#include "xor.h"
+#define to_ppc440spe_adma_chan(chan) \
+                container_of(chan, struct ppc440spe_adma_chan, common)
+#define to_ppc440spe_adma_device(dev) \
+                container_of(dev, struct ppc440spe_adma_device, common)
+#define tx_to_ppc440spe_adma_slot(tx) \
+                container_of(tx, struct ppc440spe_adma_desc_slot, async_tx)
+/* Default polynomial (for 440SP is only available) */
+#define PPC440SPE_DEFAULT_POLY  0x4d
+#define PPC440SPE_ADMA_ENGINES_NUM      (XOR_ENGINES_NUM + DMA_ENGINES_NUM)
+#define PPC440SPE_ADMA_WATCHDOG_MSEC    3
+#define PPC440SPE_ADMA_THRESHOLD        1
+#define PPC440SPE_DMA0_ID       0
+#define PPC440SPE_DMA1_ID       1
+#define PPC440SPE_XOR_ID        2
+#define PPC440SPE_ADMA_DMA_MAX_BYTE_COUNT       0xFFFFFFUL
+/* this is the XOR_CBBCR width */
+#define PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT       (1 << 31)
+#define PPC440SPE_ADMA_ZERO_SUM_MAX_BYTE_COUNT PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT
+#define PPC440SPE_RXOR_RUN      0
+#define MQ0_CF2H_RXOR_BS_MASK   0x1FF
+#undef ADMA_LL_DEBUG
+/**
+ * struct ppc440spe_adma_device - internal representation of an ADMA device
+ * @dev: device
+ * @dma_reg: base for DMAx register access
+ * @xor_reg: base for XOR register access
+ * @i2o_reg: base for I2O register access
+ * @id: HW ADMA Device selector
+ * @dma_desc_pool_virt: base of DMA descriptor region (CPU address)
+ * @dma_desc_pool: base of DMA descriptor region (DMA address)
+ * @pool_size: size of the pool
+ * @irq: DMAx or XOR irq number
+ * @err_irq: DMAx error irq number
+ * @common: embedded struct dma_device
+ */
+struct ppc440spe_adma_device {
+        struct device *dev;
+        struct dma_regs __iomem *dma_reg;
+        struct xor_regs __iomem *xor_reg;
+        struct i2o_regs __iomem *i2o_reg;
+        int id;
+        void *dma_desc_pool_virt;
+        dma_addr_t dma_desc_pool;
+        size_t pool_size;
+        int irq;
+        int err_irq;
+        struct dma_device common;
+};
+/**
+ * struct ppc440spe_adma_chan - internal representation of an ADMA channel
+ * @lock: serializes enqueue/dequeue operations to the slot pool
+ * @device: parent device
+ * @chain: device chain view of the descriptors
+ * @common: common dmaengine channel object members
+ * @all_slots: complete domain of slots usable by the channel
+ * @pending: allows batching of hardware operations
+ * @completed_cookie: identifier for the most recently completed operation
+ * @slots_allocated: records the actual size of the descriptor slot pool
+ * @hw_chain_inited: h/w descriptor chain initialization flag
+ * @irq_tasklet: bottom half where ppc440spe_adma_slot_cleanup runs
+ * @needs_unmap: if buffers should not be unmapped upon final processing
+ * @pdest_page: P destination page for async validate operation
+ * @qdest_page: Q destination page for async validate operation
+ * @pdest: P dma addr for async validate operation
+ * @qdest: Q dma addr for async validate operation
+ */
+struct ppc440spe_adma_chan {
+        spinlock_t lock;
+        struct ppc440spe_adma_device *device;
+        struct list_head chain;
+        struct dma_chan common;
+        struct list_head all_slots;
+        struct ppc440spe_adma_desc_slot *last_used;
+        int pending;
+        dma_cookie_t completed_cookie;
+        int slots_allocated;
+        int hw_chain_inited;
+        struct tasklet_struct irq_tasklet;
+        u8 needs_unmap;
+        struct page *pdest_page;
+        struct page *qdest_page;
+        dma_addr_t pdest;
+        dma_addr_t qdest;
+};
+struct ppc440spe_rxor {
+        u32 addrl;
+        u32 addrh;
+        int len;
+        int xor_count;
+        int addr_count;
+        int desc_count;
+        int state;
+};
+/**
+ * struct ppc440spe_adma_desc_slot - PPC440SPE-ADMA software descriptor
+ * @phys: hardware address of the hardware descriptor chain
+ * @group_head: first operation in a transaction
+ * @hw_next: pointer to the next descriptor in chain
+ * @async_tx: support for the async_tx api
+ * @slot_node: node on the iop_adma_chan.all_slots list
+ * @chain_node: node on the op_adma_chan.chain list
+ * @group_list: list of slots that make up a multi-descriptor transaction
+ *              for example transfer lengths larger than the supported hw max
+ * @unmap_len: transaction bytecount
+ * @hw_desc: virtual address of the hardware descriptor chain
+ * @stride: currently chained or not
+ * @idx: pool index
+ * @slot_cnt: total slots used in an transaction (group of operations)
+ * @src_cnt: number of sources set in this descriptor
+ * @dst_cnt: number of destinations set in the descriptor
+ * @slots_per_op: number of slots per operation
+ * @descs_per_op: number of slot per P/Q operation see comment
+ *                for ppc440spe_prep_dma_pqxor function
+ * @flags: desc state/type
+ * @reverse_flags: 1 if a corresponding rxor address uses reversed address order
+ * @xor_check_result: result of zero sum
+ * @crc32_result: result crc calculation
+ */
+struct ppc440spe_adma_desc_slot {
+        dma_addr_t phys;
+        struct ppc440spe_adma_desc_slot *group_head;
+        struct ppc440spe_adma_desc_slot *hw_next;
+        struct dma_async_tx_descriptor async_tx;
+        struct list_head slot_node;
+        struct list_head chain_node; /* node in channel ops list */
+        struct list_head group_list; /* list */
+        unsigned int unmap_len;
+        void *hw_desc;
+        u16 stride;
+        u16 idx;
+        u16 slot_cnt;
+        u8 src_cnt;
+        u8 dst_cnt;
+        u8 slots_per_op;
+        u8 descs_per_op;
+        unsigned long flags;
+        unsigned long reverse_flags[8];
+#define PPC440SPE_DESC_INT      0       /* generate interrupt on complete */
+#define PPC440SPE_ZERO_P        1       /* clear P destionaion */
+#define PPC440SPE_ZERO_Q        2       /* clear Q destination */
+#define PPC440SPE_COHERENT      3       /* src/dst are coherent */
+#define PPC440SPE_DESC_WXOR     4       /* WXORs are in chain */
+#define PPC440SPE_DESC_RXOR     5       /* RXOR is in chain */
+#define PPC440SPE_DESC_RXOR123  8       /* CDB for RXOR123 operation */
+#define PPC440SPE_DESC_RXOR124  9       /* CDB for RXOR124 operation */
+#define PPC440SPE_DESC_RXOR125  10      /* CDB for RXOR125 operation */
+#define PPC440SPE_DESC_RXOR12   11      /* CDB for RXOR12 operation */
+#define PPC440SPE_DESC_RXOR_REV 12      /* CDB has srcs in reversed order */
+#define PPC440SPE_DESC_PCHECK   13
+#define PPC440SPE_DESC_QCHECK   14
+#define PPC440SPE_DESC_RXOR_MSK 0x3
+        struct ppc440spe_rxor rxor_cursor;
+        union {
+                u32 *xor_check_result;
+                u32 *crc32_result;
+        };
+};
+#endif /* _PPC440SPE_ADMA_H */
diff --git a/drivers/dma/ppc4xx/dma.h b/drivers/dma/ppc4xx/dma.h
new file mode 100644
index 000000000000..bcde2df2f373
--- /dev/null
+++ b/drivers/dma/ppc4xx/dma.h
@@ -0,0 +1,223 @@
+/*
+ * 440SPe's DMA engines support header file
+ *
+ * 2006-2009 (C) DENX Software Engineering.
+ *
+ * Author: Yuri Tikhonov <yur@emcraft.com>
+ *
+ * This file is licensed under the term of  the GNU General Public License
+ * version 2. The program licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+#ifndef _PPC440SPE_DMA_H
+#define _PPC440SPE_DMA_H
+#include <linux/types.h>
+/* Number of elements in the array with statical CDBs */
+#define MAX_STAT_DMA_CDBS       16
+/* Number of DMA engines available on the contoller */
+#define DMA_ENGINES_NUM         2
+/* Maximum h/w supported number of destinations */
+#define DMA_DEST_MAX_NUM        2
+/* FIFO's params */
+#define DMA0_FIFO_SIZE          0x1000
+#define DMA1_FIFO_SIZE          0x1000
+#define DMA_FIFO_ENABLE         (1<<12)
+/* DMA Configuration Register. Data Transfer Engine PLB Priority: */
+#define DMA_CFG_DXEPR_LP        (0<<26)
+#define DMA_CFG_DXEPR_HP        (3<<26)
+#define DMA_CFG_DXEPR_HHP       (2<<26)
+#define DMA_CFG_DXEPR_HHHP      (1<<26)
+/* DMA Configuration Register. DMA FIFO Manager PLB Priority: */
+#define DMA_CFG_DFMPP_LP        (0<<23)
+#define DMA_CFG_DFMPP_HP        (3<<23)
+#define DMA_CFG_DFMPP_HHP       (2<<23)
+#define DMA_CFG_DFMPP_HHHP      (1<<23)
+/* DMA Configuration Register. Force 64-byte Alignment */
+#define DMA_CFG_FALGN           (1 << 19)
+/*UIC0:*/
+#define D0CPF_INT               (1<<12)
+#define D0CSF_INT               (1<<11)
+#define D1CPF_INT               (1<<10)
+#define D1CSF_INT               (1<<9)
+/*UIC1:*/
+#define DMAE_INT                (1<<9)
+/* I2O IOP Interrupt Mask Register */
+#define I2O_IOPIM_P0SNE         (1<<3)
+#define I2O_IOPIM_P0EM          (1<<5)
+#define I2O_IOPIM_P1SNE         (1<<6)
+#define I2O_IOPIM_P1EM          (1<<8)
+/* DMA CDB fields */
+#define DMA_CDB_MSK             (0xF)
+#define DMA_CDB_64B_ADDR        (1<<2)
+#define DMA_CDB_NO_INT          (1<<3)
+#define DMA_CDB_STATUS_MSK      (0x3)
+#define DMA_CDB_ADDR_MSK        (0xFFFFFFF0)
+/* DMA CDB OpCodes */
+#define DMA_CDB_OPC_NO_OP       (0x00)
+#define DMA_CDB_OPC_MV_SG1_SG2  (0x01)
+#define DMA_CDB_OPC_MULTICAST   (0x05)
+#define DMA_CDB_OPC_DFILL128    (0x24)
+#define DMA_CDB_OPC_DCHECK128   (0x23)
+#define DMA_CUED_XOR_BASE       (0x10000000)
+#define DMA_CUED_XOR_HB         (0x00000008)
+#ifdef CONFIG_440SP
+#define DMA_CUED_MULT1_OFF      0
+#define DMA_CUED_MULT2_OFF      8
+#define DMA_CUED_MULT3_OFF      16
+#define DMA_CUED_REGION_OFF     24
+#define DMA_CUED_XOR_WIN_MSK    (0xFC000000)
+#else
+#define DMA_CUED_MULT1_OFF      2
+#define DMA_CUED_MULT2_OFF      10
+#define DMA_CUED_MULT3_OFF      18
+#define DMA_CUED_REGION_OFF     26
+#define DMA_CUED_XOR_WIN_MSK    (0xF0000000)
+#endif
+#define DMA_CUED_REGION_MSK     0x3
+#define DMA_RXOR123             0x0
+#define DMA_RXOR124             0x1
+#define DMA_RXOR125             0x2
+#define DMA_RXOR12              0x3
+/* S/G addresses */
+#define DMA_CDB_SG_SRC          1
+#define DMA_CDB_SG_DST1         2
+#define DMA_CDB_SG_DST2         3
+/*
+ * DMAx engines Command Descriptor Block Type
+ */
+struct dma_cdb {
+        /*
+         * Basic CDB structure (Table 20-17, p.499, 440spe_um_1_22.pdf)
+         */
+        u8      pad0[2];        /* reserved */
+        u8      attr;           /* attributes */
+        u8      opc;            /* opcode */
+        u32     sg1u;           /* upper SG1 address */
+        u32     sg1l;           /* lower SG1 address */
+        u32     cnt;            /* SG count, 3B used */
+        u32     sg2u;           /* upper SG2 address */
+        u32     sg2l;           /* lower SG2 address */
+        u32     sg3u;           /* upper SG3 address */
+        u32     sg3l;           /* lower SG3 address */
+};
+/*
+ * DMAx hardware registers (p.515 in 440SPe UM 1.22)
+ */
+struct dma_regs {
+        u32     cpfpl;
+        u32     cpfph;
+        u32     csfpl;
+        u32     csfph;
+        u32     dsts;
+        u32     cfg;
+        u8      pad0[0x8];
+        u16     cpfhp;
+        u16     cpftp;
+        u16     csfhp;
+        u16     csftp;
+        u8      pad1[0x8];
+        u32     acpl;
+        u32     acph;
+        u32     s1bpl;
+        u32     s1bph;
+        u32     s2bpl;
+        u32     s2bph;
+        u32     s3bpl;
+        u32     s3bph;
+        u8      pad2[0x10];
+        u32     earl;
+        u32     earh;
+        u8      pad3[0x8];
+        u32     seat;
+        u32     sead;
+        u32     op;
+        u32     fsiz;
+};
+/*
+ * I2O hardware registers (p.528 in 440SPe UM 1.22)
+ */
+struct i2o_regs {
+        u32     ists;
+        u32     iseat;
+        u32     isead;
+        u8      pad0[0x14];
+        u32     idbel;
+        u8      pad1[0xc];
+        u32     ihis;
+        u32     ihim;
+        u8      pad2[0x8];
+        u32     ihiq;
+        u32     ihoq;
+        u8      pad3[0x8];
+        u32     iopis;
+        u32     iopim;
+        u32     iopiq;
+        u8      iopoq;
+        u8      pad4[3];
+        u16     iiflh;
+        u16     iiflt;
+        u16     iiplh;
+        u16     iiplt;
+        u16     ioflh;
+        u16     ioflt;
+        u16     ioplh;
+        u16     ioplt;
+        u32     iidc;
+        u32     ictl;
+        u32     ifcpp;
+        u8      pad5[0x4];
+        u16     mfac0;
+        u16     mfac1;
+        u16     mfac2;
+        u16     mfac3;
+        u16     mfac4;
+        u16     mfac5;
+        u16     mfac6;
+        u16     mfac7;
+        u16     ifcfh;
+        u16     ifcht;
+        u8      pad6[0x4];
+        u32     iifmc;
+        u32     iodb;
+        u32     iodbc;
+        u32     ifbal;
+        u32     ifbah;
+        u32     ifsiz;
+        u32     ispd0;
+        u32     ispd1;
+        u32     ispd2;
+        u32     ispd3;
+        u32     ihipl;
+        u32     ihiph;
+        u32     ihopl;
+        u32     ihoph;
+        u32     iiipl;
+        u32     iiiph;
+        u32     iiopl;
+        u32     iioph;
+        u32     ifcpl;
+        u32     ifcph;
+        u8      pad7[0x8];
+        u32     iopt;
+};
+#endif /* _PPC440SPE_DMA_H */
diff --git a/drivers/dma/ppc4xx/xor.h b/drivers/dma/ppc4xx/xor.h
new file mode 100644
index 000000000000..daed7384daac
--- /dev/null
+++ b/drivers/dma/ppc4xx/xor.h
@@ -0,0 +1,110 @@
+/*
+ * 440SPe's XOR engines support header file
+ *
+ * 2006-2009 (C) DENX Software Engineering.
+ *
+ * Author: Yuri Tikhonov <yur@emcraft.com>
+ *
+ * This file is licensed under the term of  the GNU General Public License
+ * version 2. The program licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+#ifndef _PPC440SPE_XOR_H
+#define _PPC440SPE_XOR_H
+#include <linux/types.h>
+/* Number of XOR engines available on the contoller */
+#define XOR_ENGINES_NUM         1
+/* Number of operands supported in the h/w */
+#define XOR_MAX_OPS             16
+/*
+ * XOR Command Block Control Register bits
+ */
+#define XOR_CBCR_LNK_BIT        (1<<31) /* link present */
+#define XOR_CBCR_TGT_BIT        (1<<30) /* target present */
+#define XOR_CBCR_CBCE_BIT       (1<<29) /* command block compete enable */
+#define XOR_CBCR_RNZE_BIT       (1<<28) /* result not zero enable */
+#define XOR_CBCR_XNOR_BIT       (1<<15) /* XOR/XNOR */
+#define XOR_CDCR_OAC_MSK        (0x7F)  /* operand address count */
+/*
+ * XORCore Status Register bits
+ */
+#define XOR_SR_XCP_BIT          (1<<31) /* core processing */
+#define XOR_SR_ICB_BIT          (1<<17) /* invalid CB */
+#define XOR_SR_IC_BIT           (1<<16) /* invalid command */
+#define XOR_SR_IPE_BIT          (1<<15) /* internal parity error */
+#define XOR_SR_RNZ_BIT          (1<<2)  /* result not Zero */
+#define XOR_SR_CBC_BIT          (1<<1)  /* CB complete */
+#define XOR_SR_CBLC_BIT         (1<<0)  /* CB list complete */
+/*
+ * XORCore Control Set and Reset Register bits
+ */
+#define XOR_CRSR_XASR_BIT       (1<<31) /* soft reset */
+#define XOR_CRSR_XAE_BIT        (1<<30) /* enable */
+#define XOR_CRSR_RCBE_BIT       (1<<29) /* refetch CB enable */
+#define XOR_CRSR_PAUS_BIT       (1<<28) /* pause */
+#define XOR_CRSR_64BA_BIT       (1<<27) /* 64/32 CB format */
+#define XOR_CRSR_CLP_BIT        (1<<25) /* continue list processing */
+/*
+ * XORCore Interrupt Enable Register
+ */
+#define XOR_IE_ICBIE_BIT        (1<<17) /* Invalid Command Block IRQ Enable */
+#define XOR_IE_ICIE_BIT         (1<<16) /* Invalid Command IRQ Enable */
+#define XOR_IE_RPTIE_BIT        (1<<14) /* Read PLB Timeout Error IRQ Enable */
+#define XOR_IE_CBCIE_BIT        (1<<1)  /* CB complete interrupt enable */
+#define XOR_IE_CBLCI_BIT        (1<<0)  /* CB list complete interrupt enable */
+/*
+ * XOR Accelerator engine Command Block Type
+ */
+struct xor_cb {
+        /*
+         * Basic 64-bit format XOR CB (Table 19-1, p.463, 440spe_um_1_22.pdf)
+         */
+        u32     cbc;            /* control */
+        u32     cbbc;           /* byte count */
+        u32     cbs;            /* status */
+        u8      pad0[4];        /* reserved */
+        u32     cbtah;          /* target address high */
+        u32     cbtal;          /* target address low */
+        u32     cblah;          /* link address high */
+        u32     cblal;          /* link address low */
+        struct {
+                u32 h;
+                u32 l;
+        } __attribute__ ((packed)) ops[16];
+} __attribute__ ((packed));
+/*
+ * XOR hardware registers Table 19-3, UM 1.22
+ */
+struct xor_regs {
+        u32     op_ar[16][2];   /* operand address[0]-high,[1]-low registers */
+        u8      pad0[352];      /* reserved */
+        u32     cbcr;           /* CB control register */
+        u32     cbbcr;          /* CB byte count register */
+        u32     cbsr;           /* CB status register */
+        u8      pad1[4];        /* reserved */
+        u32     cbtahr;         /* operand target address high register */
+        u32     cbtalr;         /* operand target address low register */
+        u32     cblahr;         /* CB link address high register */
+        u32     cblalr;         /* CB link address low register */
+        u32     crsr;           /* control set register */
+        u32     crrr;           /* control reset register */
+        u32     ccbahr;         /* current CB address high register */
+        u32     ccbalr;         /* current CB address low register */
+        u32     plbr;           /* PLB configuration register */
+        u32     ier;            /* interrupt enable register */
+        u32     pecr;           /* parity error count register */
+        u32     sr;             /* status register */
+        u32     revidr;         /* revision ID register */
+};
+#endif /* _PPC440SPE_XOR_H */
diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c
index 034ecf0ace03..2e4a54c8afeb 100644
--- a/drivers/dma/shdma.c
+++ b/drivers/dma/shdma.c
@@ -80,17 +80,17 @@ static int sh_dmae_rst(int id)
        unsigned short dmaor;
        sh_dmae_ctl_stop(id);
-        dmaor = (dmaor_read_reg(id)|DMAOR_INIT);
+        dmaor = dmaor_read_reg(id) | DMAOR_INIT;
        dmaor_write_reg(id, dmaor);
-        if ((dmaor_read_reg(id) & (DMAOR_AE | DMAOR_NMIF))) {
+        if (dmaor_read_reg(id) & (DMAOR_AE | DMAOR_NMIF)) {
                pr_warning(KERN_ERR "dma-sh: Can't initialize DMAOR.\n");
                return -EINVAL;
        }
        return 0;
 }
-static int dmae_is_idle(struct sh_dmae_chan *sh_chan)
+static int dmae_is_busy(struct sh_dmae_chan *sh_chan)
 {
        u32 chcr = sh_dmae_readl(sh_chan, CHCR);
        if (chcr & CHCR_DE) {
@@ -110,15 +110,14 @@ static void dmae_set_reg(struct sh_dmae_chan *sh_chan, struct sh_dmae_regs hw)
 {
        sh_dmae_writel(sh_chan, hw.sar, SAR);
        sh_dmae_writel(sh_chan, hw.dar, DAR);
-        sh_dmae_writel(sh_chan,
+        sh_dmae_writel(sh_chan, hw.tcr >> calc_xmit_shift(sh_chan), TCR);
-                (hw.tcr >> calc_xmit_shift(sh_chan)), TCR);
 }
 static void dmae_start(struct sh_dmae_chan *sh_chan)
 {
        u32 chcr = sh_dmae_readl(sh_chan, CHCR);
-        chcr |= (CHCR_DE|CHCR_IE);
+        chcr |= CHCR_DE | CHCR_IE;
        sh_dmae_writel(sh_chan, chcr, CHCR);
 }
@@ -132,7 +131,7 @@ static void dmae_halt(struct sh_dmae_chan *sh_chan)
 static int dmae_set_chcr(struct sh_dmae_chan *sh_chan, u32 val)
 {
-        int ret = dmae_is_idle(sh_chan);
+        int ret = dmae_is_busy(sh_chan);
        /* When DMA was working, can not set data to CHCR */
        if (ret)
                return ret;
@@ -149,7 +148,7 @@ static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val)
 {
        u32 addr;
        int shift = 0;
-        int ret = dmae_is_idle(sh_chan);
+        int ret = dmae_is_busy(sh_chan);
        if (ret)
                return ret;
@@ -307,7 +306,7 @@ static struct dma_async_tx_descriptor *sh_dmae_prep_memcpy(
                new = sh_dmae_get_desc(sh_chan);
                if (!new) {
                        dev_err(sh_chan->dev,
-                                        "No free memory for link descriptor\n");
+                                "No free memory for link descriptor\n");
                        goto err_get_desc;
                }
@@ -388,7 +387,7 @@ static void sh_chan_xfer_ld_queue(struct sh_dmae_chan *sh_chan)
        struct sh_dmae_regs hw;
        /* DMA work check */
-        if (dmae_is_idle(sh_chan))
+        if (dmae_is_busy(sh_chan))
                return;
        /* Find the first un-transfer desciptor */
@@ -497,8 +496,9 @@ static void dmae_do_tasklet(unsigned long data)
        struct sh_dmae_chan *sh_chan = (struct sh_dmae_chan *)data;
        struct sh_desc *desc, *_desc, *cur_desc = NULL;
        u32 sar_buf = sh_dmae_readl(sh_chan, SAR);
        list_for_each_entry_safe(desc, _desc,
-                                        &sh_chan->ld_queue, node) {
+                                 &sh_chan->ld_queue, node) {
                if ((desc->hw.sar + desc->hw.tcr) == sar_buf) {
                        cur_desc = desc;
                        break;
@@ -543,8 +543,8 @@ static int __devinit sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id)
        /* alloc channel */
        new_sh_chan = kzalloc(sizeof(struct sh_dmae_chan), GFP_KERNEL);
        if (!new_sh_chan) {
-                dev_err(shdev->common.dev, "No free memory for allocating "
+                dev_err(shdev->common.dev,
-                                "dma channels!\n");
+                        "No free memory for allocating dma channels!\n");
                return -ENOMEM;
        }
@@ -586,8 +586,8 @@ static int __devinit sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id)
                        "sh-dmae%d", new_sh_chan->id);
        /* set up channel irq */
-        err = request_irq(irq, &sh_dmae_interrupt,
+        err = request_irq(irq, &sh_dmae_interrupt, irqflags,
-                irqflags, new_sh_chan->dev_id, new_sh_chan);
+                          new_sh_chan->dev_id, new_sh_chan);
        if (err) {
                dev_err(shdev->common.dev, "DMA channel %d request_irq error "
                        "with return %d\n", id, err);
@@ -676,6 +676,8 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
        shdev->common.device_is_tx_complete = sh_dmae_is_complete;
        shdev->common.device_issue_pending = sh_dmae_memcpy_issue_pending;
        shdev->common.dev = &pdev->dev;
+        /* Default transfer size of 32 bytes requires 32-byte alignment */
+        shdev->common.copy_align = 5;
 #if defined(CONFIG_CPU_SH4)
        /* Non Mix IRQ mode SH7722/SH7730 etc... */
@@ -688,8 +690,8 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
        }
        for (ecnt = 0 ; ecnt < ARRAY_SIZE(eirq); ecnt++) {
-                err = request_irq(eirq[ecnt], sh_dmae_err,
+                err = request_irq(eirq[ecnt], sh_dmae_err, irqflags,
-                        irqflags, "DMAC Address Error", shdev);
+                                  "DMAC Address Error", shdev);
                if (err) {
                        dev_err(&pdev->dev, "DMA device request_irq"
                                "error (irq %d) with return %d\n",
diff --git a/drivers/dma/shdma.h b/drivers/dma/shdma.h
index 2b4bc15a2c0a..60b81e529b42 100644
--- a/drivers/dma/shdma.h
+++ b/drivers/dma/shdma.h
@@ -35,15 +35,15 @@ struct sh_desc {
 struct sh_dmae_chan {
        dma_cookie_t completed_cookie;  /* The maximum cookie completed */
-        spinlock_t desc_lock;                   /* Descriptor operation lock */
+        spinlock_t desc_lock;           /* Descriptor operation lock */
-        struct list_head ld_queue;              /* Link descriptors queue */
+        struct list_head ld_queue;      /* Link descriptors queue */
-        struct list_head ld_free;               /* Link descriptors free */
+        struct list_head ld_free;       /* Link descriptors free */
-        struct dma_chan common;                 /* DMA common channel */
+        struct dma_chan common;         /* DMA common channel */
-        struct device *dev;                             /* Channel device */
+        struct device *dev;             /* Channel device */
        struct tasklet_struct tasklet;  /* Tasklet */
-        int descs_allocated;                    /* desc count */
+        int descs_allocated;            /* desc count */
        int id;                         /* Raw id of this channel */
-        char dev_id[16];        /* unique name per DMAC of channel */
+        char dev_id[16];                /* unique name per DMAC of channel */
        /* Set chcr */
        int (*set_chcr)(struct sh_dmae_chan *sh_chan, u32 regs);
diff --git a/drivers/edac/edac_mce_amd.c b/drivers/edac/edac_mce_amd.c
index c693fcc2213c..8fc91a019620 100644
--- a/drivers/edac/edac_mce_amd.c
+++ b/drivers/edac/edac_mce_amd.c
@@ -299,6 +299,12 @@ void amd_decode_nb_mce(int node_id, struct err_regs *regs, int handle_errors)
        if (!handle_errors)
                return;
+        /*
+         * GART TLB error reporting is disabled by default. Bail out early.
+         */
+        if (TLB_ERROR(ec) && !report_gart_errors)
+                return;
        pr_emerg(" Northbridge Error, node %d", node_id);
        /*
@@ -310,10 +316,9 @@ void amd_decode_nb_mce(int node_id, struct err_regs *regs, int handle_errors)
                if (regs->nbsh & K8_NBSH_ERR_CPU_VAL)
                        pr_cont(", core: %u\n", (u8)(regs->nbsh & 0xf));
        } else {
-                pr_cont(", core: %d\n", ilog2((regs->nbsh & 0xf)));
+                pr_cont(", core: %d\n", fls((regs->nbsh & 0xf) - 1));
        }
        pr_emerg("%s.\n", EXT_ERR_MSG(xec));
        if (BUS_ERROR(ec) && nb_bus_decoder)
@@ -333,21 +338,6 @@ static void amd_decode_fr_mce(u64 mc5_status)
 static inline void amd_decode_err_code(unsigned int ec)
 {
        if (TLB_ERROR(ec)) {
-                /*
-                 * GART errors are intended to help graphics driver developers
-                 * to detect bad GART PTEs. It is recommended by AMD to disable
-                 * GART table walk error reporting by default[1] (currently
-                 * being disabled in mce_cpu_quirks()) and according to the
-                 * comment in mce_cpu_quirks(), such GART errors can be
-                 * incorrectly triggered. We may see these errors anyway and
-                 * unless requested by the user, they won't be reported.
-                 *
-                 * [1] section 13.10.1 on BIOS and Kernel Developers Guide for
-                 *     AMD NPT family 0Fh processors
-                 */
-                if (!report_gart_errors)
-                        return;
                pr_emerg(" Transaction: %s, Cache Level %s\n",
                         TT_MSG(ec), LL_MSG(ec));
        } else if (MEM_ERROR(ec)) {
diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c
index 22db05a67bfb..7785d8ffa404 100644
--- a/drivers/edac/i5100_edac.c
+++ b/drivers/edac/i5100_edac.c
@@ -9,6 +9,11 @@
 * Intel 5100X Chipset Memory Controller Hub (MCH) - Datasheet
 *      http://download.intel.com/design/chipsets/datashts/318378.pdf
 *
+ * The intel 5100 has two independent channels. EDAC core currently
+ * can not reflect this configuration so instead the chip-select
+ * rows for each respective channel are layed out one after another,
+ * the first half belonging to channel 0, the second half belonging
+ * to channel 1.
 */
 #include <linux/module.h>
 #include <linux/init.h>
@@ -25,6 +30,8 @@
 /* device 16, func 1 */
 #define I5100_MC                0x40    /* Memory Control Register */
+#define         I5100_MC_SCRBEN_MASK    (1 << 7)
+#define         I5100_MC_SCRBDONE_MASK  (1 << 4)
 #define I5100_MS                0x44    /* Memory Status Register */
 #define I5100_SPDDATA           0x48    /* Serial Presence Detect Status Reg */
 #define I5100_SPDCMD            0x4c    /* Serial Presence Detect Command Reg */
@@ -72,11 +79,21 @@
 /* bit field accessors */
+static inline u32 i5100_mc_scrben(u32 mc)
+{
+        return mc >> 7 & 1;
+}
 static inline u32 i5100_mc_errdeten(u32 mc)
 {
        return mc >> 5 & 1;
 }
+static inline u32 i5100_mc_scrbdone(u32 mc)
+{
+        return mc >> 4 & 1;
+}
 static inline u16 i5100_spddata_rdo(u16 a)
 {
        return a >> 15 & 1;
@@ -265,42 +282,43 @@ static inline u32 i5100_recmemb_ras(u32 a)
 }
 /* some generic limits */
-#define I5100_MAX_RANKS_PER_CTLR        6
+#define I5100_MAX_RANKS_PER_CHAN        6
-#define I5100_MAX_CTLRS                 2
+#define I5100_CHANNELS                      2
 #define I5100_MAX_RANKS_PER_DIMM        4
 #define I5100_DIMM_ADDR_LINES           (6 - 3) /* 64 bits / 8 bits per byte */
-#define I5100_MAX_DIMM_SLOTS_PER_CTLR   4
+#define I5100_MAX_DIMM_SLOTS_PER_CHAN   4
 #define I5100_MAX_RANK_INTERLEAVE       4
 #define I5100_MAX_DMIRS                 5
+#define I5100_SCRUB_REFRESH_RATE        (5 * 60 * HZ)
 struct i5100_priv {
        /* ranks on each dimm -- 0 maps to not present -- obtained via SPD */
-        int dimm_numrank[I5100_MAX_CTLRS][I5100_MAX_DIMM_SLOTS_PER_CTLR];
+        int dimm_numrank[I5100_CHANNELS][I5100_MAX_DIMM_SLOTS_PER_CHAN];
        /*
         * mainboard chip select map -- maps i5100 chip selects to
         * DIMM slot chip selects.  In the case of only 4 ranks per
-         * controller, the mapping is fairly obvious but not unique.
+         * channel, the mapping is fairly obvious but not unique.
-         * we map -1 -> NC and assume both controllers use the same
+         * we map -1 -> NC and assume both channels use the same
         * map...
         *
         */
-        int dimm_csmap[I5100_MAX_DIMM_SLOTS_PER_CTLR][I5100_MAX_RANKS_PER_DIMM];
+        int dimm_csmap[I5100_MAX_DIMM_SLOTS_PER_CHAN][I5100_MAX_RANKS_PER_DIMM];
        /* memory interleave range */
        struct {
                u64      limit;
                unsigned way[2];
-        } mir[I5100_MAX_CTLRS];
+        } mir[I5100_CHANNELS];
        /* adjusted memory interleave range register */
-        unsigned amir[I5100_MAX_CTLRS];
+        unsigned amir[I5100_CHANNELS];
        /* dimm interleave range */
        struct {
                unsigned rank[I5100_MAX_RANK_INTERLEAVE];
                u64      limit;
-        } dmir[I5100_MAX_CTLRS][I5100_MAX_DMIRS];
+        } dmir[I5100_CHANNELS][I5100_MAX_DMIRS];
        /* memory technology registers... */
        struct {
@@ -310,30 +328,33 @@ struct i5100_priv {
                unsigned numbank;       /* 2 or 3 lines */
                unsigned numrow;        /* 13 .. 16 lines */
                unsigned numcol;        /* 11 .. 12 lines */
-        } mtr[I5100_MAX_CTLRS][I5100_MAX_RANKS_PER_CTLR];
+        } mtr[I5100_CHANNELS][I5100_MAX_RANKS_PER_CHAN];
        u64 tolm;               /* top of low memory in bytes */
-        unsigned ranksperctlr;  /* number of ranks per controller */
+        unsigned ranksperchan;  /* number of ranks per channel */
        struct pci_dev *mc;     /* device 16 func 1 */
        struct pci_dev *ch0mm;  /* device 21 func 0 */
        struct pci_dev *ch1mm;  /* device 22 func 0 */
+        struct delayed_work i5100_scrubbing;
+        int scrub_enable;
 };
-/* map a rank/ctlr to a slot number on the mainboard */
+/* map a rank/chan to a slot number on the mainboard */
 static int i5100_rank_to_slot(const struct mem_ctl_info *mci,
-                              int ctlr, int rank)
+                              int chan, int rank)
 {
        const struct i5100_priv *priv = mci->pvt_info;
        int i;
-        for (i = 0; i < I5100_MAX_DIMM_SLOTS_PER_CTLR; i++) {
+        for (i = 0; i < I5100_MAX_DIMM_SLOTS_PER_CHAN; i++) {
                int j;
-                const int numrank = priv->dimm_numrank[ctlr][i];
+                const int numrank = priv->dimm_numrank[chan][i];
                for (j = 0; j < numrank; j++)
                        if (priv->dimm_csmap[i][j] == rank)
-                                return i * 2 + ctlr;
+                                return i * 2 + chan;
        }
        return -1;
@@ -374,32 +395,32 @@ static const char *i5100_err_msg(unsigned err)
        return "none";
 }
-/* convert csrow index into a rank (per controller -- 0..5) */
+/* convert csrow index into a rank (per channel -- 0..5) */
 static int i5100_csrow_to_rank(const struct mem_ctl_info *mci, int csrow)
 {
        const struct i5100_priv *priv = mci->pvt_info;
-        return csrow % priv->ranksperctlr;
+        return csrow % priv->ranksperchan;
 }
-/* convert csrow index into a controller (0..1) */
+/* convert csrow index into a channel (0..1) */
-static int i5100_csrow_to_cntlr(const struct mem_ctl_info *mci, int csrow)
+static int i5100_csrow_to_chan(const struct mem_ctl_info *mci, int csrow)
 {
        const struct i5100_priv *priv = mci->pvt_info;
-        return csrow / priv->ranksperctlr;
+        return csrow / priv->ranksperchan;
 }
 static unsigned i5100_rank_to_csrow(const struct mem_ctl_info *mci,
-                                    int ctlr, int rank)
+                                    int chan, int rank)
 {
        const struct i5100_priv *priv = mci->pvt_info;
-        return ctlr * priv->ranksperctlr + rank;
+        return chan * priv->ranksperchan + rank;
 }
 static void i5100_handle_ce(struct mem_ctl_info *mci,
-                            int ctlr,
+                            int chan,
                            unsigned bank,
                            unsigned rank,
                            unsigned long syndrome,
@@ -407,12 +428,12 @@ static void i5100_handle_ce(struct mem_ctl_info *mci,
                            unsigned ras,
                            const char *msg)
 {
-        const int csrow = i5100_rank_to_csrow(mci, ctlr, rank);
+        const int csrow = i5100_rank_to_csrow(mci, chan, rank);
        printk(KERN_ERR
-                "CE ctlr %d, bank %u, rank %u, syndrome 0x%lx, "
+                "CE chan %d, bank %u, rank %u, syndrome 0x%lx, "
                "cas %u, ras %u, csrow %u, label \"%s\": %s\n",
-                ctlr, bank, rank, syndrome, cas, ras,
+                chan, bank, rank, syndrome, cas, ras,
                csrow, mci->csrows[csrow].channels[0].label, msg);
        mci->ce_count++;
@@ -421,7 +442,7 @@ static void i5100_handle_ce(struct mem_ctl_info *mci,
 }
 static void i5100_handle_ue(struct mem_ctl_info *mci,
-                            int ctlr,
+                            int chan,
                            unsigned bank,
                            unsigned rank,
                            unsigned long syndrome,
@@ -429,23 +450,23 @@ static void i5100_handle_ue(struct mem_ctl_info *mci,
                            unsigned ras,
                            const char *msg)
 {
-        const int csrow = i5100_rank_to_csrow(mci, ctlr, rank);
+        const int csrow = i5100_rank_to_csrow(mci, chan, rank);
        printk(KERN_ERR
-                "UE ctlr %d, bank %u, rank %u, syndrome 0x%lx, "
+                "UE chan %d, bank %u, rank %u, syndrome 0x%lx, "
                "cas %u, ras %u, csrow %u, label \"%s\": %s\n",
-                ctlr, bank, rank, syndrome, cas, ras,
+                chan, bank, rank, syndrome, cas, ras,
                csrow, mci->csrows[csrow].channels[0].label, msg);
        mci->ue_count++;
        mci->csrows[csrow].ue_count++;
 }
-static void i5100_read_log(struct mem_ctl_info *mci, int ctlr,
+static void i5100_read_log(struct mem_ctl_info *mci, int chan,
                           u32 ferr, u32 nerr)
 {
        struct i5100_priv *priv = mci->pvt_info;
-        struct pci_dev *pdev = (ctlr) ? priv->ch1mm : priv->ch0mm;
+        struct pci_dev *pdev = (chan) ? priv->ch1mm : priv->ch0mm;
        u32 dw;
        u32 dw2;
        unsigned syndrome = 0;
@@ -484,7 +505,7 @@ static void i5100_read_log(struct mem_ctl_info *mci, int ctlr,
                else
                        msg = i5100_err_msg(nerr);
-                i5100_handle_ce(mci, ctlr, bank, rank, syndrome, cas, ras, msg);
+                i5100_handle_ce(mci, chan, bank, rank, syndrome, cas, ras, msg);
        }
        if (i5100_validlog_nrecmemvalid(dw)) {
@@ -506,7 +527,7 @@ static void i5100_read_log(struct mem_ctl_info *mci, int ctlr,
                else
                        msg = i5100_err_msg(nerr);
-                i5100_handle_ue(mci, ctlr, bank, rank, syndrome, cas, ras, msg);
+                i5100_handle_ue(mci, chan, bank, rank, syndrome, cas, ras, msg);
        }
        pci_write_config_dword(pdev, I5100_VALIDLOG, dw);
@@ -534,6 +555,80 @@ static void i5100_check_error(struct mem_ctl_info *mci)
        }
 }
+/* The i5100 chipset will scrub the entire memory once, then
+ * set a done bit. Continuous scrubbing is achieved by enqueing
+ * delayed work to a workqueue, checking every few minutes if
+ * the scrubbing has completed and if so reinitiating it.
+ */
+static void i5100_refresh_scrubbing(struct work_struct *work)
+{
+        struct delayed_work *i5100_scrubbing = container_of(work,
+                                                            struct delayed_work,
+                                                            work);
+        struct i5100_priv *priv = container_of(i5100_scrubbing,
+                                               struct i5100_priv,
+                                               i5100_scrubbing);
+        u32 dw;
+        pci_read_config_dword(priv->mc, I5100_MC, &dw);
+        if (priv->scrub_enable) {
+                pci_read_config_dword(priv->mc, I5100_MC, &dw);
+                if (i5100_mc_scrbdone(dw)) {
+                        dw |= I5100_MC_SCRBEN_MASK;
+                        pci_write_config_dword(priv->mc, I5100_MC, dw);
+                        pci_read_config_dword(priv->mc, I5100_MC, &dw);
+                }
+                schedule_delayed_work(&(priv->i5100_scrubbing),
+                                      I5100_SCRUB_REFRESH_RATE);
+        }
+}
+/*
+ * The bandwidth is based on experimentation, feel free to refine it.
+ */
+static int i5100_set_scrub_rate(struct mem_ctl_info *mci,
+                                       u32 *bandwidth)
+{
+        struct i5100_priv *priv = mci->pvt_info;
+        u32 dw;
+        pci_read_config_dword(priv->mc, I5100_MC, &dw);
+        if (*bandwidth) {
+                priv->scrub_enable = 1;
+                dw |= I5100_MC_SCRBEN_MASK;
+                schedule_delayed_work(&(priv->i5100_scrubbing),
+                                      I5100_SCRUB_REFRESH_RATE);
+        } else {
+                priv->scrub_enable = 0;
+                dw &= ~I5100_MC_SCRBEN_MASK;
+                cancel_delayed_work(&(priv->i5100_scrubbing));
+        }
+        pci_write_config_dword(priv->mc, I5100_MC, dw);
+        pci_read_config_dword(priv->mc, I5100_MC, &dw);
+        *bandwidth = 5900000 * i5100_mc_scrben(dw);
+        return 0;
+}
+static int i5100_get_scrub_rate(struct mem_ctl_info *mci,
+                                u32 *bandwidth)
+{
+        struct i5100_priv *priv = mci->pvt_info;
+        u32 dw;
+        pci_read_config_dword(priv->mc, I5100_MC, &dw);
+        *bandwidth = 5900000 * i5100_mc_scrben(dw);
+        return 0;
+}
 static struct pci_dev *pci_get_device_func(unsigned vendor,
                                           unsigned device,
                                           unsigned func)
@@ -557,19 +652,19 @@ static unsigned long __devinit i5100_npages(struct mem_ctl_info *mci,
                                            int csrow)
 {
        struct i5100_priv *priv = mci->pvt_info;
-        const unsigned ctlr_rank = i5100_csrow_to_rank(mci, csrow);
+        const unsigned chan_rank = i5100_csrow_to_rank(mci, csrow);
-        const unsigned ctlr = i5100_csrow_to_cntlr(mci, csrow);
+        const unsigned chan = i5100_csrow_to_chan(mci, csrow);
        unsigned addr_lines;
        /* dimm present? */
-        if (!priv->mtr[ctlr][ctlr_rank].present)
+        if (!priv->mtr[chan][chan_rank].present)
                return 0ULL;
        addr_lines =
                I5100_DIMM_ADDR_LINES +
-                priv->mtr[ctlr][ctlr_rank].numcol +
+                priv->mtr[chan][chan_rank].numcol +
-                priv->mtr[ctlr][ctlr_rank].numrow +
+                priv->mtr[chan][chan_rank].numrow +
-                priv->mtr[ctlr][ctlr_rank].numbank;
+                priv->mtr[chan][chan_rank].numbank;
        return (unsigned long)
                ((unsigned long long) (1ULL << addr_lines) / PAGE_SIZE);
@@ -581,11 +676,11 @@ static void __devinit i5100_init_mtr(struct mem_ctl_info *mci)
        struct pci_dev *mms[2] = { priv->ch0mm, priv->ch1mm };
        int i;
-        for (i = 0; i < I5100_MAX_CTLRS; i++) {
+        for (i = 0; i < I5100_CHANNELS; i++) {
                int j;
                struct pci_dev *pdev = mms[i];
-                for (j = 0; j < I5100_MAX_RANKS_PER_CTLR; j++) {
+                for (j = 0; j < I5100_MAX_RANKS_PER_CHAN; j++) {
                        const unsigned addr =
                                (j < 4) ? I5100_MTR_0 + j * 2 :
                                          I5100_MTR_4 + (j - 4) * 2;
@@ -644,7 +739,6 @@ static int i5100_read_spd_byte(const struct mem_ctl_info *mci,
 * fill dimm chip select map
 *
 * FIXME:
- *   o only valid for 4 ranks per controller
 *   o not the only way to may chip selects to dimm slots
 *   o investigate if there is some way to obtain this map from the bios
 */
@@ -653,9 +747,7 @@ static void __devinit i5100_init_dimm_csmap(struct mem_ctl_info *mci)
        struct i5100_priv *priv = mci->pvt_info;
        int i;
-        WARN_ON(priv->ranksperctlr != 4);
+        for (i = 0; i < I5100_MAX_DIMM_SLOTS_PER_CHAN; i++) {
-        for (i = 0; i < I5100_MAX_DIMM_SLOTS_PER_CTLR; i++) {
                int j;
                for (j = 0; j < I5100_MAX_RANKS_PER_DIMM; j++)
@@ -663,12 +755,21 @@ static void __devinit i5100_init_dimm_csmap(struct mem_ctl_info *mci)
        }
        /* only 2 chip selects per slot... */
-        priv->dimm_csmap[0][0] = 0;
+        if (priv->ranksperchan == 4) {
-        priv->dimm_csmap[0][1] = 3;
+                priv->dimm_csmap[0][0] = 0;
-        priv->dimm_csmap[1][0] = 1;
+                priv->dimm_csmap[0][1] = 3;
-        priv->dimm_csmap[1][1] = 2;
+                priv->dimm_csmap[1][0] = 1;
-        priv->dimm_csmap[2][0] = 2;
+                priv->dimm_csmap[1][1] = 2;
-        priv->dimm_csmap[3][0] = 3;
+                priv->dimm_csmap[2][0] = 2;
+                priv->dimm_csmap[3][0] = 3;
+        } else {
+                priv->dimm_csmap[0][0] = 0;
+                priv->dimm_csmap[0][1] = 1;
+                priv->dimm_csmap[1][0] = 2;
+                priv->dimm_csmap[1][1] = 3;
+                priv->dimm_csmap[2][0] = 4;
+                priv->dimm_csmap[2][1] = 5;
+        }
 }
 static void __devinit i5100_init_dimm_layout(struct pci_dev *pdev,
@@ -677,10 +778,10 @@ static void __devinit i5100_init_dimm_layout(struct pci_dev *pdev,
        struct i5100_priv *priv = mci->pvt_info;
        int i;
-        for (i = 0; i < I5100_MAX_CTLRS; i++) {
+        for (i = 0; i < I5100_CHANNELS; i++) {
                int j;
-                for (j = 0; j < I5100_MAX_DIMM_SLOTS_PER_CTLR; j++) {
+                for (j = 0; j < I5100_MAX_DIMM_SLOTS_PER_CHAN; j++) {
                        u8 rank;
                        if (i5100_read_spd_byte(mci, i, j, 5, &rank) < 0)
@@ -720,7 +821,7 @@ static void __devinit i5100_init_interleaving(struct pci_dev *pdev,
        pci_read_config_word(pdev, I5100_AMIR_1, &w);
        priv->amir[1] = w;
-        for (i = 0; i < I5100_MAX_CTLRS; i++) {
+        for (i = 0; i < I5100_CHANNELS; i++) {
                int j;
                for (j = 0; j < 5; j++) {
@@ -747,7 +848,7 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci)
        for (i = 0; i < mci->nr_csrows; i++) {
                const unsigned long npages = i5100_npages(mci, i);
-                const unsigned cntlr = i5100_csrow_to_cntlr(mci, i);
+                const unsigned chan = i5100_csrow_to_chan(mci, i);
                const unsigned rank = i5100_csrow_to_rank(mci, i);
                if (!npages)
@@ -765,7 +866,7 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci)
                mci->csrows[i].grain = 32;
                mci->csrows[i].csrow_idx = i;
                mci->csrows[i].dtype =
-                        (priv->mtr[cntlr][rank].width == 4) ? DEV_X4 : DEV_X8;
+                        (priv->mtr[chan][rank].width == 4) ? DEV_X4 : DEV_X8;
                mci->csrows[i].ue_count = 0;
                mci->csrows[i].ce_count = 0;
                mci->csrows[i].mtype = MEM_RDDR2;
@@ -777,7 +878,7 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci)
                mci->csrows[i].channels[0].csrow = mci->csrows + i;
                snprintf(mci->csrows[i].channels[0].label,
                         sizeof(mci->csrows[i].channels[0].label),
-                         "DIMM%u", i5100_rank_to_slot(mci, cntlr, rank));
+                         "DIMM%u", i5100_rank_to_slot(mci, chan, rank));
                total_pages += npages;
        }
@@ -815,13 +916,6 @@ static int __devinit i5100_init_one(struct pci_dev *pdev,
        pci_read_config_dword(pdev, I5100_MS, &dw);
        ranksperch = !!(dw & (1 << 8)) * 2 + 4;
-        if (ranksperch != 4) {
-                /* FIXME: get 6 ranks / controller to work - need hw... */
-                printk(KERN_INFO "i5100_edac: unsupported configuration.\n");
-                ret = -ENODEV;
-                goto bail_pdev;
-        }
        /* enable error reporting... */
        pci_read_config_dword(pdev, I5100_EMASK_MEM, &dw);
        dw &= ~I5100_FERR_NF_MEM_ANY_MASK;
@@ -864,11 +958,21 @@ static int __devinit i5100_init_one(struct pci_dev *pdev,
        mci->dev = &pdev->dev;
        priv = mci->pvt_info;
-        priv->ranksperctlr = ranksperch;
+        priv->ranksperchan = ranksperch;
        priv->mc = pdev;
        priv->ch0mm = ch0mm;
        priv->ch1mm = ch1mm;
+        INIT_DELAYED_WORK(&(priv->i5100_scrubbing), i5100_refresh_scrubbing);
+        /* If scrubbing was already enabled by the bios, start maintaining it */
+        pci_read_config_dword(pdev, I5100_MC, &dw);
+        if (i5100_mc_scrben(dw)) {
+                priv->scrub_enable = 1;
+                schedule_delayed_work(&(priv->i5100_scrubbing),
+                                      I5100_SCRUB_REFRESH_RATE);
+        }
        i5100_init_dimm_layout(pdev, mci);
        i5100_init_interleaving(pdev, mci);
@@ -882,6 +986,8 @@ static int __devinit i5100_init_one(struct pci_dev *pdev,
        mci->ctl_page_to_phys = NULL;
        mci->edac_check = i5100_check_error;
+        mci->set_sdram_scrub_rate = i5100_set_scrub_rate;
+        mci->get_sdram_scrub_rate = i5100_get_scrub_rate;
        i5100_init_csrows(mci);
@@ -897,12 +1003,14 @@ static int __devinit i5100_init_one(struct pci_dev *pdev,
        if (edac_mc_add_mc(mci)) {
                ret = -ENODEV;
-                goto bail_mc;
+                goto bail_scrub;
        }
        return ret;
-bail_mc:
+bail_scrub:
+        priv->scrub_enable = 0;
+        cancel_delayed_work_sync(&(priv->i5100_scrubbing));
        edac_mc_free(mci);
 bail_disable_ch1:
@@ -935,6 +1043,10 @@ static void __devexit i5100_remove_one(struct pci_dev *pdev)
                return;
        priv = mci->pvt_info;
+        priv->scrub_enable = 0;
+        cancel_delayed_work_sync(&(priv->i5100_scrubbing));
        pci_disable_device(pdev);
        pci_disable_device(priv->ch0mm);
        pci_disable_device(priv->ch1mm);
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 57ca339924ef..a019b49ecc9b 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -206,6 +206,12 @@ config GPIO_LANGWELL
        help
          Say Y here to support Intel Moorestown platform GPIO.
+config GPIO_TIMBERDALE
+        bool "Support for timberdale GPIO IP"
+        depends on MFD_TIMBERDALE && GPIOLIB && HAS_IOMEM
+        ---help---
+        Add support for the GPIO IP in the timberdale FPGA.
 comment "SPI GPIO expanders:"
 config GPIO_MAX7301
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 270b6d7839f5..52fe4cf734c7 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_GPIO_MCP23S08)	+= mcp23s08.o
 obj-$(CONFIG_GPIO_PCA953X)      += pca953x.o
 obj-$(CONFIG_GPIO_PCF857X)      += pcf857x.o
 obj-$(CONFIG_GPIO_PL061)        += pl061.o
+obj-$(CONFIG_GPIO_TIMBERDALE)   += timbgpio.o
 obj-$(CONFIG_GPIO_TWL4030)      += twl4030-gpio.o
 obj-$(CONFIG_GPIO_UCB1400)      += ucb1400_gpio.o
 obj-$(CONFIG_GPIO_XILINX)       += xilinx_gpio.o
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 50de0f5750d8..a25ad284a272 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -53,6 +53,7 @@ struct gpio_desc {
 #define FLAG_SYSFS      4       /* exported via /sys/class/gpio/control */
 #define FLAG_TRIG_FALL  5       /* trigger on falling edge */
 #define FLAG_TRIG_RISE  6       /* trigger on rising edge */
+#define FLAG_ACTIVE_LOW 7       /* sysfs value has active low */
 #define PDESC_ID_SHIFT  16      /* add new flags before this one */
@@ -210,6 +211,11 @@ static DEFINE_MUTEX(sysfs_lock);
 *      * configures behavior of poll(2) on /value
 *      * available only if pin can generate IRQs on input
 *      * is read/write as "none", "falling", "rising", or "both"
+ *   /active_low
+ *      * configures polarity of /value
+ *      * is read/write as zero/nonzero
+ *      * also affects existing and subsequent "falling" and "rising"
+ *        /edge configuration
 */
 static ssize_t gpio_direction_show(struct device *dev,
@@ -255,7 +261,7 @@ static ssize_t gpio_direction_store(struct device *dev,
        return status ? : size;
 }
-static const DEVICE_ATTR(direction, 0644,
+static /* const */ DEVICE_ATTR(direction, 0644,
                gpio_direction_show, gpio_direction_store);
 static ssize_t gpio_value_show(struct device *dev,
@@ -267,10 +273,17 @@ static ssize_t gpio_value_show(struct device *dev,
        mutex_lock(&sysfs_lock);
-        if (!test_bit(FLAG_EXPORT, &desc->flags))
+        if (!test_bit(FLAG_EXPORT, &desc->flags)) {
                status = -EIO;
-        else
+        } else {
-                status = sprintf(buf, "%d\n", !!gpio_get_value_cansleep(gpio));
+                int value;
+                value = !!gpio_get_value_cansleep(gpio);
+                if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
+                        value = !value;
+                status = sprintf(buf, "%d\n", value);
+        }
        mutex_unlock(&sysfs_lock);
        return status;
@@ -294,6 +307,8 @@ static ssize_t gpio_value_store(struct device *dev,
                status = strict_strtol(buf, 0, &value);
                if (status == 0) {
+                        if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
+                                value = !value;
                        gpio_set_value_cansleep(gpio, value != 0);
                        status = size;
                }
@@ -303,7 +318,7 @@ static ssize_t gpio_value_store(struct device *dev,
        return status;
 }
-static /*const*/ DEVICE_ATTR(value, 0644,
+static const DEVICE_ATTR(value, 0644,
                gpio_value_show, gpio_value_store);
 static irqreturn_t gpio_sysfs_irq(int irq, void *priv)
@@ -352,9 +367,11 @@ static int gpio_setup_irq(struct gpio_desc *desc, struct device *dev,
        irq_flags = IRQF_SHARED;
        if (test_bit(FLAG_TRIG_FALL, &gpio_flags))
-                irq_flags |= IRQF_TRIGGER_FALLING;
+                irq_flags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
+                        IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
        if (test_bit(FLAG_TRIG_RISE, &gpio_flags))
-                irq_flags |= IRQF_TRIGGER_RISING;
+                irq_flags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
+                        IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
        if (!pdesc) {
                pdesc = kmalloc(sizeof(*pdesc), GFP_KERNEL);
@@ -475,9 +492,79 @@ found:
 static DEVICE_ATTR(edge, 0644, gpio_edge_show, gpio_edge_store);
+static int sysfs_set_active_low(struct gpio_desc *desc, struct device *dev,
+                                int value)
+{
+        int                     status = 0;
+        if (!!test_bit(FLAG_ACTIVE_LOW, &desc->flags) == !!value)
+                return 0;
+        if (value)
+                set_bit(FLAG_ACTIVE_LOW, &desc->flags);
+        else
+                clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
+        /* reconfigure poll(2) support if enabled on one edge only */
+        if (dev != NULL && (!!test_bit(FLAG_TRIG_RISE, &desc->flags) ^
+                                !!test_bit(FLAG_TRIG_FALL, &desc->flags))) {
+                unsigned long trigger_flags = desc->flags & GPIO_TRIGGER_MASK;
+                gpio_setup_irq(desc, dev, 0);
+                status = gpio_setup_irq(desc, dev, trigger_flags);
+        }
+        return status;
+}
+static ssize_t gpio_active_low_show(struct device *dev,
+                struct device_attribute *attr, char *buf)
+{
+        const struct gpio_desc  *desc = dev_get_drvdata(dev);
+        ssize_t                 status;
+        mutex_lock(&sysfs_lock);
+        if (!test_bit(FLAG_EXPORT, &desc->flags))
+                status = -EIO;
+        else
+                status = sprintf(buf, "%d\n",
+                                !!test_bit(FLAG_ACTIVE_LOW, &desc->flags));
+        mutex_unlock(&sysfs_lock);
+        return status;
+}
+static ssize_t gpio_active_low_store(struct device *dev,
+                struct device_attribute *attr, const char *buf, size_t size)
+{
+        struct gpio_desc        *desc = dev_get_drvdata(dev);
+        ssize_t                 status;
+        mutex_lock(&sysfs_lock);
+        if (!test_bit(FLAG_EXPORT, &desc->flags)) {
+                status = -EIO;
+        } else {
+                long            value;
+                status = strict_strtol(buf, 0, &value);
+                if (status == 0)
+                        status = sysfs_set_active_low(desc, dev, value != 0);
+        }
+        mutex_unlock(&sysfs_lock);
+        return status ? : size;
+}
+static const DEVICE_ATTR(active_low, 0644,
+                gpio_active_low_show, gpio_active_low_store);
 static const struct attribute *gpio_attrs[] = {
-        &dev_attr_direction.attr,
        &dev_attr_value.attr,
+        &dev_attr_active_low.attr,
        NULL,
 };
@@ -662,12 +749,12 @@ int gpio_export(unsigned gpio, bool direction_may_change)
                dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0),
                                desc, ioname ? ioname : "gpio%d", gpio);
                if (!IS_ERR(dev)) {
-                        if (direction_may_change)
+                        status = sysfs_create_group(&dev->kobj,
-                                status = sysfs_create_group(&dev->kobj,
                                                &gpio_attr_group);
-                        else
+                        if (!status && direction_may_change)
                                status = device_create_file(dev,
-                                                &dev_attr_value);
+                                                &dev_attr_direction);
                        if (!status && gpio_to_irq(gpio) >= 0
                                        && (direction_may_change
@@ -744,6 +831,55 @@ done:
 }
 EXPORT_SYMBOL_GPL(gpio_export_link);
+/**
+ * gpio_sysfs_set_active_low - set the polarity of gpio sysfs value
+ * @gpio: gpio to change
+ * @value: non-zero to use active low, i.e. inverted values
+ *
+ * Set the polarity of /sys/class/gpio/gpioN/value sysfs attribute.
+ * The GPIO does not have to be exported yet.  If poll(2) support has
+ * been enabled for either rising or falling edge, it will be
+ * reconfigured to follow the new polarity.
+ *
+ * Returns zero on success, else an error.
+ */
+int gpio_sysfs_set_active_low(unsigned gpio, int value)
+{
+        struct gpio_desc        *desc;
+        struct device           *dev = NULL;
+        int                     status = -EINVAL;
+        if (!gpio_is_valid(gpio))
+                goto done;
+        mutex_lock(&sysfs_lock);
+        desc = &gpio_desc[gpio];
+        if (test_bit(FLAG_EXPORT, &desc->flags)) {
+                struct device *dev;
+                dev = class_find_device(&gpio_class, NULL, desc, match_export);
+                if (dev == NULL) {
+                        status = -ENODEV;
+                        goto unlock;
+                }
+        }
+        status = sysfs_set_active_low(desc, dev, value);
+unlock:
+        mutex_unlock(&sysfs_lock);
+done:
+        if (status)
+                pr_debug("%s: gpio%d status %d\n", __func__, gpio, status);
+        return status;
+}
+EXPORT_SYMBOL_GPL(gpio_sysfs_set_active_low);
 /**
 * gpio_unexport - reverse effect of gpio_export()
 * @gpio: gpio to make unavailable
@@ -1094,6 +1230,7 @@ void gpio_free(unsigned gpio)
                }
                desc_set_label(desc, NULL);
                module_put(desc->chip->owner);
+                clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
                clear_bit(FLAG_REQUESTED, &desc->flags);
        } else
                WARN_ON(extra_checks);
diff --git a/drivers/gpio/langwell_gpio.c b/drivers/gpio/langwell_gpio.c
index 4baf3d7d0f8e..6c0ebbdc659e 100644
--- a/drivers/gpio/langwell_gpio.c
+++ b/drivers/gpio/langwell_gpio.c
@@ -123,7 +123,7 @@ static int lnw_irq_type(unsigned irq, unsigned type)
        void __iomem *grer = (void __iomem *)(&lnw->reg_base->GRER[reg]);
        void __iomem *gfer = (void __iomem *)(&lnw->reg_base->GFER[reg]);
-        if (gpio < 0 || gpio > lnw->chip.ngpio)
+        if (gpio >= lnw->chip.ngpio)
                return -EINVAL;
        spin_lock_irqsave(&lnw->lock, flags);
        if (type & IRQ_TYPE_EDGE_RISING)
diff --git a/drivers/gpio/timbgpio.c b/drivers/gpio/timbgpio.c
new file mode 100644
index 000000000000..a4d344ba8e5c
--- /dev/null
+++ b/drivers/gpio/timbgpio.c
@@ -0,0 +1,342 @@
+/*
+ * timbgpio.c timberdale FPGA GPIO driver
+ * Copyright (c) 2009 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+/* Supports:
+ * Timberdale FPGA GPIO
+ */
+#include <linux/module.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/timb_gpio.h>
+#include <linux/interrupt.h>
+#define DRIVER_NAME "timb-gpio"
+#define TGPIOVAL        0x00
+#define TGPIODIR        0x04
+#define TGPIO_IER       0x08
+#define TGPIO_ISR       0x0c
+#define TGPIO_IPR       0x10
+#define TGPIO_ICR       0x14
+#define TGPIO_FLR       0x18
+#define TGPIO_LVR       0x1c
+struct timbgpio {
+        void __iomem            *membase;
+        spinlock_t              lock; /* mutual exclusion */
+        struct gpio_chip        gpio;
+        int                     irq_base;
+};
+static int timbgpio_update_bit(struct gpio_chip *gpio, unsigned index,
+        unsigned offset, bool enabled)
+{
+        struct timbgpio *tgpio = container_of(gpio, struct timbgpio, gpio);
+        u32 reg;
+        spin_lock(&tgpio->lock);
+        reg = ioread32(tgpio->membase + offset);
+        if (enabled)
+                reg |= (1 << index);
+        else
+                reg &= ~(1 << index);
+        iowrite32(reg, tgpio->membase + offset);
+        spin_unlock(&tgpio->lock);
+        return 0;
+}
+static int timbgpio_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
+{
+        return timbgpio_update_bit(gpio, nr, TGPIODIR, true);
+}
+static int timbgpio_gpio_get(struct gpio_chip *gpio, unsigned nr)
+{
+        struct timbgpio *tgpio = container_of(gpio, struct timbgpio, gpio);
+        u32 value;
+        value = ioread32(tgpio->membase + TGPIOVAL);
+        return (value & (1 << nr)) ? 1 : 0;
+}
+static int timbgpio_gpio_direction_output(struct gpio_chip *gpio,
+                                                unsigned nr, int val)
+{
+        return timbgpio_update_bit(gpio, nr, TGPIODIR, false);
+}
+static void timbgpio_gpio_set(struct gpio_chip *gpio,
+                                unsigned nr, int val)
+{
+        timbgpio_update_bit(gpio, nr, TGPIOVAL, val != 0);
+}
+static int timbgpio_to_irq(struct gpio_chip *gpio, unsigned offset)
+{
+        struct timbgpio *tgpio = container_of(gpio, struct timbgpio, gpio);
+        if (tgpio->irq_base <= 0)
+                return -EINVAL;
+        return tgpio->irq_base + offset;
+}
+/*
+ * GPIO IRQ
+ */
+static void timbgpio_irq_disable(unsigned irq)
+{
+        struct timbgpio *tgpio = get_irq_chip_data(irq);
+        int offset = irq - tgpio->irq_base;
+        timbgpio_update_bit(&tgpio->gpio, offset, TGPIO_IER, 0);
+}
+static void timbgpio_irq_enable(unsigned irq)
+{
+        struct timbgpio *tgpio = get_irq_chip_data(irq);
+        int offset = irq - tgpio->irq_base;
+        timbgpio_update_bit(&tgpio->gpio, offset, TGPIO_IER, 1);
+}
+static int timbgpio_irq_type(unsigned irq, unsigned trigger)
+{
+        struct timbgpio *tgpio = get_irq_chip_data(irq);
+        int offset = irq - tgpio->irq_base;
+        unsigned long flags;
+        u32 lvr, flr;
+        if (offset < 0 || offset > tgpio->gpio.ngpio)
+                return -EINVAL;
+        spin_lock_irqsave(&tgpio->lock, flags);
+        lvr = ioread32(tgpio->membase + TGPIO_LVR);
+        flr = ioread32(tgpio->membase + TGPIO_FLR);
+        if (trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
+                flr &= ~(1 << offset);
+                if (trigger & IRQ_TYPE_LEVEL_HIGH)
+                        lvr |= 1 << offset;
+                else
+                        lvr &= ~(1 << offset);
+        }
+        if ((trigger & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH)
+                return -EINVAL;
+        else {
+                flr |= 1 << offset;
+                /* opposite compared to the datasheet, but it mirrors the
+                 * reality
+                 */
+                if (trigger & IRQ_TYPE_EDGE_FALLING)
+                        lvr |= 1 << offset;
+                else
+                        lvr &= ~(1 << offset);
+        }
+        iowrite32(lvr, tgpio->membase + TGPIO_LVR);
+        iowrite32(flr, tgpio->membase + TGPIO_FLR);
+        iowrite32(1 << offset, tgpio->membase + TGPIO_ICR);
+        spin_unlock_irqrestore(&tgpio->lock, flags);
+        return 0;
+}
+static void timbgpio_irq(unsigned int irq, struct irq_desc *desc)
+{
+        struct timbgpio *tgpio = get_irq_data(irq);
+        unsigned long ipr;
+        int offset;
+        desc->chip->ack(irq);
+        ipr = ioread32(tgpio->membase + TGPIO_IPR);
+        iowrite32(ipr, tgpio->membase + TGPIO_ICR);
+        for_each_bit(offset, &ipr, tgpio->gpio.ngpio)
+                generic_handle_irq(timbgpio_to_irq(&tgpio->gpio, offset));
+}
+static struct irq_chip timbgpio_irqchip = {
+        .name           = "GPIO",
+        .enable         = timbgpio_irq_enable,
+        .disable        = timbgpio_irq_disable,
+        .set_type       = timbgpio_irq_type,
+};
+static int __devinit timbgpio_probe(struct platform_device *pdev)
+{
+        int err, i;
+        struct gpio_chip *gc;
+        struct timbgpio *tgpio;
+        struct resource *iomem;
+        struct timbgpio_platform_data *pdata = pdev->dev.platform_data;
+        int irq = platform_get_irq(pdev, 0);
+        if (!pdata || pdata->nr_pins > 32) {
+                err = -EINVAL;
+                goto err_mem;
+        }
+        iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!iomem) {
+                err = -EINVAL;
+                goto err_mem;
+        }
+        tgpio = kzalloc(sizeof(*tgpio), GFP_KERNEL);
+        if (!tgpio) {
+                err = -EINVAL;
+                goto err_mem;
+        }
+        tgpio->irq_base = pdata->irq_base;
+        spin_lock_init(&tgpio->lock);
+        if (!request_mem_region(iomem->start, resource_size(iomem),
+                DRIVER_NAME)) {
+                err = -EBUSY;
+                goto err_request;
+        }
+        tgpio->membase = ioremap(iomem->start, resource_size(iomem));
+        if (!tgpio->membase) {
+                err = -ENOMEM;
+                goto err_ioremap;
+        }
+        gc = &tgpio->gpio;
+        gc->label = dev_name(&pdev->dev);
+        gc->owner = THIS_MODULE;
+        gc->dev = &pdev->dev;
+        gc->direction_input = timbgpio_gpio_direction_input;
+        gc->get = timbgpio_gpio_get;
+        gc->direction_output = timbgpio_gpio_direction_output;
+        gc->set = timbgpio_gpio_set;
+        gc->to_irq = (irq >= 0 && tgpio->irq_base > 0) ? timbgpio_to_irq : NULL;
+        gc->dbg_show = NULL;
+        gc->base = pdata->gpio_base;
+        gc->ngpio = pdata->nr_pins;
+        gc->can_sleep = 0;
+        err = gpiochip_add(gc);
+        if (err)
+                goto err_chipadd;
+        platform_set_drvdata(pdev, tgpio);
+        /* make sure to disable interrupts */
+        iowrite32(0x0, tgpio->membase + TGPIO_IER);
+        if (irq < 0 || tgpio->irq_base <= 0)
+                return 0;
+        for (i = 0; i < pdata->nr_pins; i++) {
+                set_irq_chip_and_handler_name(tgpio->irq_base + i,
+                        &timbgpio_irqchip, handle_simple_irq, "mux");
+                set_irq_chip_data(tgpio->irq_base + i, tgpio);
+#ifdef CONFIG_ARM
+                set_irq_flags(tgpio->irq_base + i, IRQF_VALID | IRQF_PROBE);
+#endif
+        }
+        set_irq_data(irq, tgpio);
+        set_irq_chained_handler(irq, timbgpio_irq);
+        return 0;
+err_chipadd:
+        iounmap(tgpio->membase);
+err_ioremap:
+        release_mem_region(iomem->start, resource_size(iomem));
+err_request:
+        kfree(tgpio);
+err_mem:
+        printk(KERN_ERR DRIVER_NAME": Failed to register GPIOs: %d\n", err);
+        return err;
+}
+static int __devexit timbgpio_remove(struct platform_device *pdev)
+{
+        int err;
+        struct timbgpio_platform_data *pdata = pdev->dev.platform_data;
+        struct timbgpio *tgpio = platform_get_drvdata(pdev);
+        struct resource *iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        int irq = platform_get_irq(pdev, 0);
+        if (irq >= 0 && tgpio->irq_base > 0) {
+                int i;
+                for (i = 0; i < pdata->nr_pins; i++) {
+                        set_irq_chip(tgpio->irq_base + i, NULL);
+                        set_irq_chip_data(tgpio->irq_base + i, NULL);
+                }
+                set_irq_handler(irq, NULL);
+                set_irq_data(irq, NULL);
+        }
+        err = gpiochip_remove(&tgpio->gpio);
+        if (err)
+                printk(KERN_ERR DRIVER_NAME": failed to remove gpio_chip\n");
+        iounmap(tgpio->membase);
+        release_mem_region(iomem->start, resource_size(iomem));
+        kfree(tgpio);
+        platform_set_drvdata(pdev, NULL);
+        return 0;
+}
+static struct platform_driver timbgpio_platform_driver = {
+        .driver = {
+                .name   = DRIVER_NAME,
+                .owner  = THIS_MODULE,
+        },
+        .probe          = timbgpio_probe,
+        .remove         = timbgpio_remove,
+};
+/*--------------------------------------------------------------------------*/
+static int __init timbgpio_init(void)
+{
+        return platform_driver_register(&timbgpio_platform_driver);
+}
+static void __exit timbgpio_exit(void)
+{
+        platform_driver_unregister(&timbgpio_platform_driver);
+}
+module_init(timbgpio_init);
+module_exit(timbgpio_exit);
+MODULE_DESCRIPTION("Timberdale GPIO driver");
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Mocean Laboratories");
+MODULE_ALIAS("platform:"DRIVER_NAME);
diff --git a/drivers/gpu/drm/nouveau/Kconfig b/drivers/gpu/drm/nouveau/Kconfig
index d823e6319516..b1bc1ea182b8 100644
--- a/drivers/gpu/drm/nouveau/Kconfig
+++ b/drivers/gpu/drm/nouveau/Kconfig
@@ -30,11 +30,12 @@ config DRM_NOUVEAU_DEBUG
          via debugfs.
 menu "I2C encoder or helper chips"
-     depends on DRM
+     depends on DRM && I2C
 config DRM_I2C_CH7006
        tristate "Chrontel ch7006 TV encoder"
-        default m if DRM_NOUVEAU
+        depends on DRM_NOUVEAU
+        default m
        help
          Support for Chrontel ch7006 and similar TV encoders, found
          on some nVidia video cards.
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 320a14bceb99..aa2dfbc3e351 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -311,8 +311,10 @@ nouveau_bo_create_ttm_backend_entry(struct ttm_bo_device *bdev)
        struct drm_device *dev = dev_priv->dev;
        switch (dev_priv->gart_info.type) {
+#if __OS_HAS_AGP
        case NOUVEAU_GART_AGP:
                return ttm_agp_backend_init(bdev, dev->agp->bridge);
+#endif
        case NOUVEAU_GART_SGDMA:
                return nouveau_sgdma_init_ttm(dev);
        default:
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c
index 0cff7eb3690a..dacac9a0842a 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -205,7 +205,7 @@ nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)
                        schedule_timeout(1);
                if (intr && signal_pending(current)) {
-                        ret = -ERESTART;
+                        ret = -ERESTARTSYS;
                        break;
                }
        }
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 11f831f0ddc5..18fd8ac9fca7 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -342,8 +342,6 @@ retry:
                        }
                        ret = ttm_bo_wait_cpu(&nvbo->bo, false);
-                        if (ret == -ERESTART)
-                                ret = -EAGAIN;
                        if (ret)
                                return ret;
                        goto retry;
@@ -915,8 +913,6 @@ nouveau_gem_ioctl_cpu_prep(struct drm_device *dev, void *data,
                        goto out;
                ret = ttm_bo_wait_cpu(&nvbo->bo, no_wait);
-                if (ret == -ERESTART)
-                        ret = -EAGAIN;
                if (ret)
                        goto out;
        }
@@ -925,9 +921,6 @@ nouveau_gem_ioctl_cpu_prep(struct drm_device *dev, void *data,
                ret = ttm_bo_wait(&nvbo->bo, false, false, no_wait);
        } else {
                ret = ttm_bo_synccpu_write_grab(&nvbo->bo, no_wait);
-                if (ret == -ERESTART)
-                        ret = -EAGAIN;
-                else
                if (ret == 0)
                        nvbo->cpu_filp = file_priv;
        }
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
index 02755712ed3d..5158a12f7844 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -407,6 +407,7 @@ uint64_t nouveau_mem_fb_amount(struct drm_device *dev)
        return 0;
 }
+#if __OS_HAS_AGP
 static void nouveau_mem_reset_agp(struct drm_device *dev)
 {
        uint32_t saved_pci_nv_1, saved_pci_nv_19, pmc_enable;
@@ -432,10 +433,12 @@ static void nouveau_mem_reset_agp(struct drm_device *dev)
        nv_wr32(dev, NV04_PBUS_PCI_NV_19, saved_pci_nv_19);
        nv_wr32(dev, NV04_PBUS_PCI_NV_1, saved_pci_nv_1);
 }
+#endif
 int
 nouveau_mem_init_agp(struct drm_device *dev)
 {
+#if __OS_HAS_AGP
        struct drm_nouveau_private *dev_priv = dev->dev_private;
        struct drm_agp_info info;
        struct drm_agp_mode mode;
@@ -471,6 +474,7 @@ nouveau_mem_init_agp(struct drm_device *dev)
        dev_priv->gart_info.type        = NOUVEAU_GART_AGP;
        dev_priv->gart_info.aper_base   = info.aperture_base;
        dev_priv->gart_info.aper_size   = info.aperture_size;
+#endif
        return 0;
 }
diff --git a/drivers/gpu/drm/nouveau/nv40_graph.c b/drivers/gpu/drm/nouveau/nv40_graph.c
index d3e0a2a6acf8..7e8547cb5833 100644
--- a/drivers/gpu/drm/nouveau/nv40_graph.c
+++ b/drivers/gpu/drm/nouveau/nv40_graph.c
@@ -252,8 +252,9 @@ nv40_grctx_init(struct drm_device *dev)
                memcpy(pgraph->ctxprog, fw->data, fw->size);
                cp = pgraph->ctxprog;
-                if (cp->signature != 0x5043564e || cp->version != 0 ||
+                if (le32_to_cpu(cp->signature) != 0x5043564e ||
-                    cp->length != ((fw->size - 7) / 4)) {
+                    cp->version != 0 ||
+                    le16_to_cpu(cp->length) != ((fw->size - 7) / 4)) {
                        NV_ERROR(dev, "ctxprog invalid\n");
                        release_firmware(fw);
                        nv40_grctx_fini(dev);
@@ -281,8 +282,9 @@ nv40_grctx_init(struct drm_device *dev)
                memcpy(pgraph->ctxvals, fw->data, fw->size);
                cv = (void *)pgraph->ctxvals;
-                if (cv->signature != 0x5643564e || cv->version != 0 ||
+                if (le32_to_cpu(cv->signature) != 0x5643564e ||
-                    cv->length != ((fw->size - 9) / 8)) {
+                    cv->version != 0 ||
+                    le32_to_cpu(cv->length) != ((fw->size - 9) / 8)) {
                        NV_ERROR(dev, "ctxvals invalid\n");
                        release_firmware(fw);
                        nv40_grctx_fini(dev);
@@ -294,8 +296,9 @@ nv40_grctx_init(struct drm_device *dev)
        cp = pgraph->ctxprog;
        nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);
-        for (i = 0; i < cp->length; i++)
+        for (i = 0; i < le16_to_cpu(cp->length); i++)
-                nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA, cp->data[i]);
+                nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA,
+                        le32_to_cpu(cp->data[i]));
        pgraph->accel_blocked = false;
        return 0;
@@ -329,8 +332,9 @@ nv40_grctx_vals_load(struct drm_device *dev, struct nouveau_gpuobj *ctx)
        if (!cv)
                return;
-        for (i = 0; i < cv->length; i++)
+        for (i = 0; i < le32_to_cpu(cv->length); i++)
-                nv_wo32(dev, ctx, cv->data[i].offset, cv->data[i].value);
+                nv_wo32(dev, ctx, le32_to_cpu(cv->data[i].offset),
+                        le32_to_cpu(cv->data[i].value));
 }
 /*
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index feb52eee4314..b5f5fe75e6af 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -49,7 +49,7 @@ radeon-y += radeon_device.o radeon_kms.o \
        radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \
        rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \
        r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \
-        r600_blit_kms.o radeon_pm.o atombios_dp.o
+        r600_blit_kms.o radeon_pm.o atombios_dp.o r600_audio.o r600_hdmi.o
 radeon-$(CONFIG_COMPAT) += radeon_ioc32.o
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 824cc6480a06..84e5df766d3f 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -1374,7 +1374,6 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
                case RADEON_TXFORMAT_ARGB4444:
                case RADEON_TXFORMAT_VYUY422:
                case RADEON_TXFORMAT_YVYU422:
-                case RADEON_TXFORMAT_DXT1:
                case RADEON_TXFORMAT_SHADOW16:
                case RADEON_TXFORMAT_LDUDV655:
                case RADEON_TXFORMAT_DUDV88:
@@ -1382,12 +1381,19 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
                        break;
                case RADEON_TXFORMAT_ARGB8888:
                case RADEON_TXFORMAT_RGBA8888:
-                case RADEON_TXFORMAT_DXT23:
-                case RADEON_TXFORMAT_DXT45:
                case RADEON_TXFORMAT_SHADOW32:
                case RADEON_TXFORMAT_LDUDUV8888:
                        track->textures[i].cpp = 4;
                        break;
+                case RADEON_TXFORMAT_DXT1:
+                        track->textures[i].cpp = 1;
+                        track->textures[i].compress_format = R100_TRACK_COMP_DXT1;
+                        break;
+                case RADEON_TXFORMAT_DXT23:
+                case RADEON_TXFORMAT_DXT45:
+                        track->textures[i].cpp = 1;
+                        track->textures[i].compress_format = R100_TRACK_COMP_DXT35;
+                        break;
                }
                track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf);
                track->textures[i].cube_info[4].height = 1 << ((idx_value >> 20) & 0xf);
@@ -2731,6 +2737,7 @@ static inline void r100_cs_track_texture_print(struct r100_cs_track_texture *t)
        DRM_ERROR("coordinate type            %d\n", t->tex_coord_type);
        DRM_ERROR("width round to power of 2  %d\n", t->roundup_w);
        DRM_ERROR("height round to power of 2 %d\n", t->roundup_h);
+        DRM_ERROR("compress format            %d\n", t->compress_format);
 }
 static int r100_cs_track_cube(struct radeon_device *rdev,
@@ -2760,6 +2767,36 @@ static int r100_cs_track_cube(struct radeon_device *rdev,
        return 0;
 }
+static int r100_track_compress_size(int compress_format, int w, int h)
+{
+        int block_width, block_height, block_bytes;
+        int wblocks, hblocks;
+        int min_wblocks;
+        int sz;
+        block_width = 4;
+        block_height = 4;
+        switch (compress_format) {
+        case R100_TRACK_COMP_DXT1:
+                block_bytes = 8;
+                min_wblocks = 4;
+                break;
+        default:
+        case R100_TRACK_COMP_DXT35:
+                block_bytes = 16;
+                min_wblocks = 2;
+                break;
+        }
+        hblocks = (h + block_height - 1) / block_height;
+        wblocks = (w + block_width - 1) / block_width;
+        if (wblocks < min_wblocks)
+                wblocks = min_wblocks;
+        sz = wblocks * hblocks * block_bytes;
+        return sz;
+}
 static int r100_cs_track_texture_check(struct radeon_device *rdev,
                                       struct r100_cs_track *track)
 {
@@ -2797,9 +2834,15 @@ static int r100_cs_track_texture_check(struct radeon_device *rdev,
                        h = h / (1 << i);
                        if (track->textures[u].roundup_h)
                                h = roundup_pow_of_two(h);
-                        size += w * h;
+                        if (track->textures[u].compress_format) {
+                                size += r100_track_compress_size(track->textures[u].compress_format, w, h);
+                                /* compressed textures are block based */
+                        } else
+                                size += w * h;
                }
                size *= track->textures[u].cpp;
                switch (track->textures[u].tex_coord_type) {
                case 0:
                        break;
@@ -2967,6 +3010,7 @@ void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track
                track->arrays[i].esize = 0x7F;
        }
        for (i = 0; i < track->num_texture; i++) {
+                track->textures[i].compress_format = R100_TRACK_COMP_NONE;
                track->textures[i].pitch = 16536;
                track->textures[i].width = 16536;
                track->textures[i].height = 16536;
@@ -3399,6 +3443,8 @@ int r100_init(struct radeon_device *rdev)
        r100_errata(rdev);
        /* Initialize clocks */
        radeon_get_clock_info(rdev->ddev);
+        /* Initialize power management */
+        radeon_pm_init(rdev);
        /* Get vram informations */
        r100_vram_info(rdev);
        /* Initialize memory controller (also test AGP) */
diff --git a/drivers/gpu/drm/radeon/r100_track.h b/drivers/gpu/drm/radeon/r100_track.h
index ca50903dd2bb..7188c3778ee2 100644
--- a/drivers/gpu/drm/radeon/r100_track.h
+++ b/drivers/gpu/drm/radeon/r100_track.h
@@ -28,6 +28,10 @@ struct r100_cs_cube_info {
        unsigned                height;
 };
+#define R100_TRACK_COMP_NONE   0
+#define R100_TRACK_COMP_DXT1   1
+#define R100_TRACK_COMP_DXT35  2
 struct r100_cs_track_texture {
        struct radeon_bo        *robj;
        struct r100_cs_cube_info cube_info[5]; /* info for 5 non-primary faces */
@@ -44,6 +48,7 @@ struct r100_cs_track_texture {
        bool                    enabled;
        bool                    roundup_w;
        bool                    roundup_h;
+        unsigned                compress_format;
 };
 struct r100_cs_track_limits {
diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c
index eb740fc3549f..20942127c46b 100644
--- a/drivers/gpu/drm/radeon/r200.c
+++ b/drivers/gpu/drm/radeon/r200.c
@@ -401,7 +401,6 @@ int r200_packet0_check(struct radeon_cs_parser *p,
                case R200_TXFORMAT_Y8:
                        track->textures[i].cpp = 1;
                        break;
-                case R200_TXFORMAT_DXT1:
                case R200_TXFORMAT_AI88:
                case R200_TXFORMAT_ARGB1555:
                case R200_TXFORMAT_RGB565:
@@ -418,9 +417,16 @@ int r200_packet0_check(struct radeon_cs_parser *p,
                case R200_TXFORMAT_ABGR8888:
                case R200_TXFORMAT_BGR111110:
                case R200_TXFORMAT_LDVDU8888:
+                        track->textures[i].cpp = 4;
+                        break;
+                case R200_TXFORMAT_DXT1:
+                        track->textures[i].cpp = 1;
+                        track->textures[i].compress_format = R100_TRACK_COMP_DXT1;
+                        break;
                case R200_TXFORMAT_DXT23:
                case R200_TXFORMAT_DXT45:
-                        track->textures[i].cpp = 4;
+                        track->textures[i].cpp = 1;
+                        track->textures[i].compress_format = R100_TRACK_COMP_DXT1;
                        break;
                }
                track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf);
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 83378c39d0e3..83490c2b5061 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -686,7 +686,15 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
                        r100_cs_dump_packet(p, pkt);
                        return r;
                }
-                ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
+                if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
+                        tile_flags |= R300_TXO_MACRO_TILE;
+                if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
+                        tile_flags |= R300_TXO_MICRO_TILE;
+                tmp = idx_value + ((u32)reloc->lobj.gpu_offset);
+                tmp |= tile_flags;
+                ib[idx] = tmp;
                track->textures[i].robj = reloc->robj;
                break;
        /* Tracked registers */
@@ -852,7 +860,6 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
                case R300_TX_FORMAT_Z6Y5X5:
                case R300_TX_FORMAT_W4Z4Y4X4:
                case R300_TX_FORMAT_W1Z5Y5X5:
-                case R300_TX_FORMAT_DXT1:
                case R300_TX_FORMAT_D3DMFT_CxV8U8:
                case R300_TX_FORMAT_B8G8_B8G8:
                case R300_TX_FORMAT_G8R8_G8B8:
@@ -866,8 +873,6 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
                case 0x17:
                case R300_TX_FORMAT_FL_I32:
                case 0x1e:
-                case R300_TX_FORMAT_DXT3:
-                case R300_TX_FORMAT_DXT5:
                        track->textures[i].cpp = 4;
                        break;
                case R300_TX_FORMAT_W16Z16Y16X16:
@@ -878,6 +883,15 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
                case R300_TX_FORMAT_FL_R32G32B32A32:
                        track->textures[i].cpp = 16;
                        break;
+                case R300_TX_FORMAT_DXT1:
+                        track->textures[i].cpp = 1;
+                        track->textures[i].compress_format = R100_TRACK_COMP_DXT1;
+                        break;
+                case R300_TX_FORMAT_DXT3:
+                case R300_TX_FORMAT_DXT5:
+                        track->textures[i].cpp = 1;
+                        track->textures[i].compress_format = R100_TRACK_COMP_DXT35;
+                        break;
                default:
                        DRM_ERROR("Invalid texture format %u\n",
                                  (idx_value & 0x1F));
@@ -1324,6 +1338,8 @@ int r300_init(struct radeon_device *rdev)
        r300_errata(rdev);
        /* Initialize clocks */
        radeon_get_clock_info(rdev->ddev);
+        /* Initialize power management */
+        radeon_pm_init(rdev);
        /* Get vram informations */
        r300_vram_info(rdev);
        /* Initialize memory controller (also test AGP) */
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 36656bd110bf..a0ac3c134b1b 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1863,6 +1863,14 @@ int r600_startup(struct radeon_device *rdev)
        }
        r600_gpu_init(rdev);
+        if (!rdev->r600_blit.shader_obj) {
+                r = r600_blit_init(rdev);
+                if (r) {
+                        DRM_ERROR("radeon: failed blitter (%d).\n", r);
+                        return r;
+                }
+        }
        r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
        if (unlikely(r != 0))
                return r;
@@ -2038,12 +2046,6 @@ int r600_init(struct radeon_device *rdev)
        if (r)
                return r;
-        r = r600_blit_init(rdev);
-        if (r) {
-                DRM_ERROR("radeon: failed blitter (%d).\n", r);
-                return r;
-        }
        rdev->accel_working = true;
        r = r600_startup(rdev);
        if (r) {
@@ -2065,6 +2067,10 @@ int r600_init(struct radeon_device *rdev)
                        rdev->accel_working = false;
                }
        }
+        r = r600_audio_init(rdev);
+        if (r)
+                return r; /* TODO error handling */
        return 0;
 }
@@ -2073,6 +2079,7 @@ void r600_fini(struct radeon_device *rdev)
        /* Suspend operations */
        r600_suspend(rdev);
+        r600_audio_fini(rdev);
        r600_blit_fini(rdev);
        r600_irq_fini(rdev);
        radeon_irq_kms_fini(rdev);
diff --git a/drivers/gpu/drm/radeon/r600_audio.c b/drivers/gpu/drm/radeon/r600_audio.c
new file mode 100644
index 000000000000..99e2c3891a7d
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r600_audio.c
@@ -0,0 +1,267 @@
+/*
+ * Copyright 2008 Advanced Micro Devices, Inc.
+ * Copyright 2008 Red Hat Inc.
+ * Copyright 2009 Christian König.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Christian König
+ */
+#include "drmP.h"
+#include "radeon.h"
+#include "radeon_reg.h"
+#include "atom.h"
+#define AUDIO_TIMER_INTERVALL 100 /* 1/10 sekund should be enough */
+/*
+ * check if the chipset is supported
+ */
+static int r600_audio_chipset_supported(struct radeon_device *rdev)
+{
+        return rdev->family >= CHIP_R600
+                || rdev->family == CHIP_RS600
+                || rdev->family == CHIP_RS690
+                || rdev->family == CHIP_RS740;
+}
+/*
+ * current number of channels
+ */
+static int r600_audio_channels(struct radeon_device *rdev)
+{
+        return (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0x7) + 1;
+}
+/*
+ * current bits per sample
+ */
+static int r600_audio_bits_per_sample(struct radeon_device *rdev)
+{
+        uint32_t value = (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0xF0) >> 4;
+        switch (value) {
+        case 0x0: return  8;
+        case 0x1: return 16;
+        case 0x2: return 20;
+        case 0x3: return 24;
+        case 0x4: return 32;
+        }
+        DRM_ERROR("Unknown bits per sample 0x%x using 16 instead.\n", (int)value);
+        return 16;
+}
+/*
+ * current sampling rate in HZ
+ */
+static int r600_audio_rate(struct radeon_device *rdev)
+{
+        uint32_t value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);
+        uint32_t result;
+        if (value & 0x4000)
+                result = 44100;
+        else
+                result = 48000;
+        result *= ((value >> 11) & 0x7) + 1;
+        result /= ((value >> 8) & 0x7) + 1;
+        return result;
+}
+/*
+ * iec 60958 status bits
+ */
+static uint8_t r600_audio_status_bits(struct radeon_device *rdev)
+{
+        return RREG32(R600_AUDIO_STATUS_BITS) & 0xff;
+}
+/*
+ * iec 60958 category code
+ */
+static uint8_t r600_audio_category_code(struct radeon_device *rdev)
+{
+        return (RREG32(R600_AUDIO_STATUS_BITS) >> 8) & 0xff;
+}
+/*
+ * update all hdmi interfaces with current audio parameters
+ */
+static void r600_audio_update_hdmi(unsigned long param)
+{
+        struct radeon_device *rdev = (struct radeon_device *)param;
+        struct drm_device *dev = rdev->ddev;
+        int channels = r600_audio_channels(rdev);
+        int rate = r600_audio_rate(rdev);
+        int bps = r600_audio_bits_per_sample(rdev);
+        uint8_t status_bits = r600_audio_status_bits(rdev);
+        uint8_t category_code = r600_audio_category_code(rdev);
+        struct drm_encoder *encoder;
+        int changes = 0;
+        changes |= channels != rdev->audio_channels;
+        changes |= rate != rdev->audio_rate;
+        changes |= bps != rdev->audio_bits_per_sample;
+        changes |= status_bits != rdev->audio_status_bits;
+        changes |= category_code != rdev->audio_category_code;
+        if (changes) {
+                rdev->audio_channels = channels;
+                rdev->audio_rate = rate;
+                rdev->audio_bits_per_sample = bps;
+                rdev->audio_status_bits = status_bits;
+                rdev->audio_category_code = category_code;
+        }
+        list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+                if (changes || r600_hdmi_buffer_status_changed(encoder))
+                        r600_hdmi_update_audio_settings(
+                                encoder, channels,
+                                rate, bps, status_bits,
+                                category_code);
+        }
+        mod_timer(&rdev->audio_timer,
+                jiffies + msecs_to_jiffies(AUDIO_TIMER_INTERVALL));
+}
+/*
+ * initialize the audio vars and register the update timer
+ */
+int r600_audio_init(struct radeon_device *rdev)
+{
+        if (!r600_audio_chipset_supported(rdev))
+                return 0;
+        DRM_INFO("%s audio support", radeon_audio ? "Enabling" : "Disabling");
+        WREG32_P(R600_AUDIO_ENABLE, radeon_audio ? 0x81000000 : 0x0, ~0x81000000);
+        rdev->audio_channels = -1;
+        rdev->audio_rate = -1;
+        rdev->audio_bits_per_sample = -1;
+        rdev->audio_status_bits = 0;
+        rdev->audio_category_code = 0;
+        setup_timer(
+                &rdev->audio_timer,
+                r600_audio_update_hdmi,
+                (unsigned long)rdev);
+        mod_timer(&rdev->audio_timer, jiffies + 1);
+        return 0;
+}
+/*
+ * determin how the encoders and audio interface is wired together
+ */
+int r600_audio_tmds_index(struct drm_encoder *encoder)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        struct drm_encoder *other;
+        switch (radeon_encoder->encoder_id) {
+        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
+        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
+                return 0;
+        case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
+                /* special case check if an TMDS1 is present */
+                list_for_each_entry(other, &dev->mode_config.encoder_list, head) {
+                        if (to_radeon_encoder(other)->encoder_id ==
+                                ENCODER_OBJECT_ID_INTERNAL_TMDS1)
+                                return 1;
+                }
+                return 0;
+        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
+        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
+                return 1;
+        default:
+                DRM_ERROR("Unsupported encoder type 0x%02X\n",
+                          radeon_encoder->encoder_id);
+                return -1;
+        }
+}
+/*
+ * atach the audio codec to the clock source of the encoder
+ */
+void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        int base_rate = 48000;
+        switch (radeon_encoder->encoder_id) {
+        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
+        case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
+                WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
+                break;
+        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
+        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
+        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
+                WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
+                break;
+        default:
+                DRM_ERROR("Unsupported encoder type 0x%02X\n",
+                          radeon_encoder->encoder_id);
+                return;
+        }
+        switch (r600_audio_tmds_index(encoder)) {
+        case 0:
+                WREG32(R600_AUDIO_PLL1_MUL, base_rate*50);
+                WREG32(R600_AUDIO_PLL1_DIV, clock*100);
+                WREG32(R600_AUDIO_CLK_SRCSEL, 0);
+                break;
+        case 1:
+                WREG32(R600_AUDIO_PLL2_MUL, base_rate*50);
+                WREG32(R600_AUDIO_PLL2_DIV, clock*100);
+                WREG32(R600_AUDIO_CLK_SRCSEL, 1);
+                break;
+        }
+}
+/*
+ * release the audio timer
+ * TODO: How to do this correctly on SMP systems?
+ */
+void r600_audio_fini(struct radeon_device *rdev)
+{
+        if (!r600_audio_chipset_supported(rdev))
+                return;
+        WREG32_P(R600_AUDIO_ENABLE, 0x0, ~0x81000000);
+        del_timer(&rdev->audio_timer);
+}
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c
new file mode 100644
index 000000000000..fcc949df0e5d
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r600_hdmi.c
@@ -0,0 +1,506 @@
+/*
+ * Copyright 2008 Advanced Micro Devices, Inc.
+ * Copyright 2008 Red Hat Inc.
+ * Copyright 2009 Christian König.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Christian König
+ */
+#include "drmP.h"
+#include "radeon_drm.h"
+#include "radeon.h"
+#include "atom.h"
+/*
+ * HDMI color format
+ */
+enum r600_hdmi_color_format {
+        RGB = 0,
+        YCC_422 = 1,
+        YCC_444 = 2
+};
+/*
+ * IEC60958 status bits
+ */
+enum r600_hdmi_iec_status_bits {
+        AUDIO_STATUS_DIG_ENABLE   = 0x01,
+        AUDIO_STATUS_V      = 0x02,
+        AUDIO_STATUS_VCFG        = 0x04,
+        AUDIO_STATUS_EMPHASIS     = 0x08,
+        AUDIO_STATUS_COPYRIGHT    = 0x10,
+        AUDIO_STATUS_NONAUDIO     = 0x20,
+        AUDIO_STATUS_PROFESSIONAL = 0x40,
+        AUDIO_STATUS_LEVEL      = 0x80
+};
+struct {
+        uint32_t Clock;
+        int N_32kHz;
+        int CTS_32kHz;
+        int N_44_1kHz;
+        int CTS_44_1kHz;
+        int N_48kHz;
+        int CTS_48kHz;
+} r600_hdmi_ACR[] = {
+    /*       32kHz        44.1kHz       48kHz    */
+    /* Clock      N     CTS      N     CTS      N     CTS */
+    {  25174,  4576,  28125,  7007,  31250,  6864,  28125 }, /*  25,20/1.001 MHz */
+    {  25200,  4096,  25200,  6272,  28000,  6144,  25200 }, /*  25.20       MHz */
+    {  27000,  4096,  27000,  6272,  30000,  6144,  27000 }, /*  27.00       MHz */
+    {  27027,  4096,  27027,  6272,  30030,  6144,  27027 }, /*  27.00*1.001 MHz */
+    {  54000,  4096,  54000,  6272,  60000,  6144,  54000 }, /*  54.00       MHz */
+    {  54054,  4096,  54054,  6272,  60060,  6144,  54054 }, /*  54.00*1.001 MHz */
+    {  74175, 11648, 210937, 17836, 234375, 11648, 140625 }, /*  74.25/1.001 MHz */
+    {  74250,  4096,  74250,  6272,  82500,  6144,  74250 }, /*  74.25       MHz */
+    { 148351, 11648, 421875,  8918, 234375,  5824, 140625 }, /* 148.50/1.001 MHz */
+    { 148500,  4096, 148500,  6272, 165000,  6144, 148500 }, /* 148.50       MHz */
+    {      0,  4096,      0,  6272,      0,  6144,      0 }  /* Other */
+};
+/*
+ * calculate CTS value if it's not found in the table
+ */
+static void r600_hdmi_calc_CTS(uint32_t clock, int *CTS, int N, int freq)
+{
+        if (*CTS == 0)
+                *CTS = clock*N/(128*freq)*1000;
+        DRM_DEBUG("Using ACR timing N=%d CTS=%d for frequency %d\n",
+                  N, *CTS, freq);
+}
+/*
+ * update the N and CTS parameters for a given pixel clock rate
+ */
+static void r600_hdmi_update_ACR(struct drm_encoder *encoder, uint32_t clock)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
+        int CTS;
+        int N;
+        int i;
+        for (i = 0; r600_hdmi_ACR[i].Clock != clock && r600_hdmi_ACR[i].Clock != 0; i++);
+        CTS = r600_hdmi_ACR[i].CTS_32kHz;
+        N = r600_hdmi_ACR[i].N_32kHz;
+        r600_hdmi_calc_CTS(clock, &CTS, N, 32000);
+        WREG32(offset+R600_HDMI_32kHz_CTS, CTS << 12);
+        WREG32(offset+R600_HDMI_32kHz_N, N);
+        CTS = r600_hdmi_ACR[i].CTS_44_1kHz;
+        N = r600_hdmi_ACR[i].N_44_1kHz;
+        r600_hdmi_calc_CTS(clock, &CTS, N, 44100);
+        WREG32(offset+R600_HDMI_44_1kHz_CTS, CTS << 12);
+        WREG32(offset+R600_HDMI_44_1kHz_N, N);
+        CTS = r600_hdmi_ACR[i].CTS_48kHz;
+        N = r600_hdmi_ACR[i].N_48kHz;
+        r600_hdmi_calc_CTS(clock, &CTS, N, 48000);
+        WREG32(offset+R600_HDMI_48kHz_CTS, CTS << 12);
+        WREG32(offset+R600_HDMI_48kHz_N, N);
+}
+/*
+ * calculate the crc for a given info frame
+ */
+static void r600_hdmi_infoframe_checksum(uint8_t packetType,
+                                         uint8_t versionNumber,
+                                         uint8_t length,
+                                         uint8_t *frame)
+{
+    int i;
+    frame[0] = packetType + versionNumber + length;
+    for (i = 1; i <= length; i++)
+        frame[0] += frame[i];
+    frame[0] = 0x100 - frame[0];
+}
+/*
+ * build a HDMI Video Info Frame
+ */
+static void r600_hdmi_videoinfoframe(
+        struct drm_encoder *encoder,
+        enum r600_hdmi_color_format color_format,
+        int active_information_present,
+        uint8_t active_format_aspect_ratio,
+        uint8_t scan_information,
+        uint8_t colorimetry,
+        uint8_t ex_colorimetry,
+        uint8_t quantization,
+        int ITC,
+        uint8_t picture_aspect_ratio,
+        uint8_t video_format_identification,
+        uint8_t pixel_repetition,
+        uint8_t non_uniform_picture_scaling,
+        uint8_t bar_info_data_valid,
+        uint16_t top_bar,
+        uint16_t bottom_bar,
+        uint16_t left_bar,
+        uint16_t right_bar
+)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
+        uint8_t frame[14];
+        frame[0x0] = 0;
+        frame[0x1] =
+                (scan_information & 0x3) |
+                ((bar_info_data_valid & 0x3) << 2) |
+                ((active_information_present & 0x1) << 4) |
+                ((color_format & 0x3) << 5);
+        frame[0x2] =
+                (active_format_aspect_ratio & 0xF) |
+                ((picture_aspect_ratio & 0x3) << 4) |
+                ((colorimetry & 0x3) << 6);
+        frame[0x3] =
+                (non_uniform_picture_scaling & 0x3) |
+                ((quantization & 0x3) << 2) |
+                ((ex_colorimetry & 0x7) << 4) |
+                ((ITC & 0x1) << 7);
+        frame[0x4] = (video_format_identification & 0x7F);
+        frame[0x5] = (pixel_repetition & 0xF);
+        frame[0x6] = (top_bar & 0xFF);
+        frame[0x7] = (top_bar >> 8);
+        frame[0x8] = (bottom_bar & 0xFF);
+        frame[0x9] = (bottom_bar >> 8);
+        frame[0xA] = (left_bar & 0xFF);
+        frame[0xB] = (left_bar >> 8);
+        frame[0xC] = (right_bar & 0xFF);
+        frame[0xD] = (right_bar >> 8);
+        r600_hdmi_infoframe_checksum(0x82, 0x02, 0x0D, frame);
+        WREG32(offset+R600_HDMI_VIDEOINFOFRAME_0,
+                frame[0x0] | (frame[0x1] << 8) | (frame[0x2] << 16) | (frame[0x3] << 24));
+        WREG32(offset+R600_HDMI_VIDEOINFOFRAME_1,
+                frame[0x4] | (frame[0x5] << 8) | (frame[0x6] << 16) | (frame[0x7] << 24));
+        WREG32(offset+R600_HDMI_VIDEOINFOFRAME_2,
+                frame[0x8] | (frame[0x9] << 8) | (frame[0xA] << 16) | (frame[0xB] << 24));
+        WREG32(offset+R600_HDMI_VIDEOINFOFRAME_3,
+                frame[0xC] | (frame[0xD] << 8));
+}
+/*
+ * build a Audio Info Frame
+ */
+static void r600_hdmi_audioinfoframe(
+        struct drm_encoder *encoder,
+        uint8_t channel_count,
+        uint8_t coding_type,
+        uint8_t sample_size,
+        uint8_t sample_frequency,
+        uint8_t format,
+        uint8_t channel_allocation,
+        uint8_t level_shift,
+        int downmix_inhibit
+)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
+        uint8_t frame[11];
+        frame[0x0] = 0;
+        frame[0x1] = (channel_count & 0x7) | ((coding_type & 0xF) << 4);
+        frame[0x2] = (sample_size & 0x3) | ((sample_frequency & 0x7) << 2);
+        frame[0x3] = format;
+        frame[0x4] = channel_allocation;
+        frame[0x5] = ((level_shift & 0xF) << 3) | ((downmix_inhibit & 0x1) << 7);
+        frame[0x6] = 0;
+        frame[0x7] = 0;
+        frame[0x8] = 0;
+        frame[0x9] = 0;
+        frame[0xA] = 0;
+        r600_hdmi_infoframe_checksum(0x84, 0x01, 0x0A, frame);
+        WREG32(offset+R600_HDMI_AUDIOINFOFRAME_0,
+                frame[0x0] | (frame[0x1] << 8) | (frame[0x2] << 16) | (frame[0x3] << 24));
+        WREG32(offset+R600_HDMI_AUDIOINFOFRAME_1,
+                frame[0x4] | (frame[0x5] << 8) | (frame[0x6] << 16) | (frame[0x8] << 24));
+}
+/*
+ * test if audio buffer is filled enough to start playing
+ */
+static int r600_hdmi_is_audio_buffer_filled(struct drm_encoder *encoder)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
+        return (RREG32(offset+R600_HDMI_STATUS) & 0x10) != 0;
+}
+/*
+ * have buffer status changed since last call?
+ */
+int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder)
+{
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        int status, result;
+        if (!radeon_encoder->hdmi_offset)
+                return 0;
+        status = r600_hdmi_is_audio_buffer_filled(encoder);
+        result = radeon_encoder->hdmi_buffer_status != status;
+        radeon_encoder->hdmi_buffer_status = status;
+        return result;
+}
+/*
+ * write the audio workaround status to the hardware
+ */
+void r600_hdmi_audio_workaround(struct drm_encoder *encoder)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        uint32_t offset = radeon_encoder->hdmi_offset;
+        if (!offset)
+                return;
+        if (r600_hdmi_is_audio_buffer_filled(encoder)) {
+                /* disable audio workaround and start delivering of audio frames */
+                WREG32_P(offset+R600_HDMI_CNTL, 0x00000001, ~0x00001001);
+        } else if (radeon_encoder->hdmi_audio_workaround) {
+                /* enable audio workaround and start delivering of audio frames */
+                WREG32_P(offset+R600_HDMI_CNTL, 0x00001001, ~0x00001001);
+        } else {
+                /* disable audio workaround and stop delivering of audio frames */
+                WREG32_P(offset+R600_HDMI_CNTL, 0x00000000, ~0x00001001);
+        }
+}
+/*
+ * update the info frames with the data from the current display mode
+ */
+void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
+        if (!offset)
+                return;
+        r600_audio_set_clock(encoder, mode->clock);
+        WREG32(offset+R600_HDMI_UNKNOWN_0, 0x1000);
+        WREG32(offset+R600_HDMI_UNKNOWN_1, 0x0);
+        WREG32(offset+R600_HDMI_UNKNOWN_2, 0x1000);
+        r600_hdmi_update_ACR(encoder, mode->clock);
+        WREG32(offset+R600_HDMI_VIDEOCNTL, 0x13);
+        WREG32(offset+R600_HDMI_VERSION, 0x202);
+        r600_hdmi_videoinfoframe(encoder, RGB, 0, 0, 0, 0,
+                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+        /* it's unknown what these bits do excatly, but it's indeed quite usefull for debugging */
+        WREG32(offset+R600_HDMI_AUDIO_DEBUG_0, 0x00FFFFFF);
+        WREG32(offset+R600_HDMI_AUDIO_DEBUG_1, 0x007FFFFF);
+        WREG32(offset+R600_HDMI_AUDIO_DEBUG_2, 0x00000001);
+        WREG32(offset+R600_HDMI_AUDIO_DEBUG_3, 0x00000001);
+        r600_hdmi_audio_workaround(encoder);
+        /* audio packets per line, does anyone know how to calc this ? */
+        WREG32_P(offset+R600_HDMI_CNTL, 0x00040000, ~0x001F0000);
+        /* update? reset? don't realy know */
+        WREG32_P(offset+R600_HDMI_CNTL, 0x14000000, ~0x14000000);
+}
+/*
+ * update settings with current parameters from audio engine
+ */
+void r600_hdmi_update_audio_settings(struct drm_encoder *encoder,
+                                     int channels,
+                                     int rate,
+                                     int bps,
+                                     uint8_t status_bits,
+                                     uint8_t category_code)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
+        uint32_t iec;
+        if (!offset)
+                return;
+        DRM_DEBUG("%s with %d channels, %d Hz sampling rate, %d bits per sample,\n",
+                 r600_hdmi_is_audio_buffer_filled(encoder) ? "playing" : "stopped",
+                channels, rate, bps);
+        DRM_DEBUG("0x%02X IEC60958 status bits and 0x%02X category code\n",
+                  (int)status_bits, (int)category_code);
+        iec = 0;
+        if (status_bits & AUDIO_STATUS_PROFESSIONAL)
+                iec |= 1 << 0;
+        if (status_bits & AUDIO_STATUS_NONAUDIO)
+                iec |= 1 << 1;
+        if (status_bits & AUDIO_STATUS_COPYRIGHT)
+                iec |= 1 << 2;
+        if (status_bits & AUDIO_STATUS_EMPHASIS)
+                iec |= 1 << 3;
+        iec |= category_code << 8;
+        switch (rate) {
+        case  32000: iec |= 0x3 << 24; break;
+        case  44100: iec |= 0x0 << 24; break;
+        case  88200: iec |= 0x8 << 24; break;
+        case 176400: iec |= 0xc << 24; break;
+        case  48000: iec |= 0x2 << 24; break;
+        case  96000: iec |= 0xa << 24; break;
+        case 192000: iec |= 0xe << 24; break;
+        }
+        WREG32(offset+R600_HDMI_IEC60958_1, iec);
+        iec = 0;
+        switch (bps) {
+        case 16: iec |= 0x2; break;
+        case 20: iec |= 0x3; break;
+        case 24: iec |= 0xb; break;
+        }
+        if (status_bits & AUDIO_STATUS_V)
+                iec |= 0x5 << 16;
+        WREG32_P(offset+R600_HDMI_IEC60958_2, iec, ~0x5000f);
+        /* 0x021 or 0x031 sets the audio frame length */
+        WREG32(offset+R600_HDMI_AUDIOCNTL, 0x31);
+        r600_hdmi_audioinfoframe(encoder, channels-1, 0, 0, 0, 0, 0, 0, 0);
+        r600_hdmi_audio_workaround(encoder);
+        /* update? reset? don't realy know */
+        WREG32_P(offset+R600_HDMI_CNTL, 0x04000000, ~0x04000000);
+}
+/*
+ * enable/disable the HDMI engine
+ */
+void r600_hdmi_enable(struct drm_encoder *encoder, int enable)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
+        if (!offset)
+                return;
+        DRM_DEBUG("%s HDMI interface @ 0x%04X\n", enable ? "Enabling" : "Disabling", offset);
+        /* some version of atombios ignore the enable HDMI flag
+         * so enabling/disabling HDMI was moved here for TMDS1+2 */
+        switch (radeon_encoder->encoder_id) {
+        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
+                WREG32_P(AVIVO_TMDSA_CNTL, enable ? 0x4 : 0x0, ~0x4);
+                WREG32(offset+R600_HDMI_ENABLE, enable ? 0x101 : 0x0);
+                break;
+        case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
+                WREG32_P(AVIVO_LVTMA_CNTL, enable ? 0x4 : 0x0, ~0x4);
+                WREG32(offset+R600_HDMI_ENABLE, enable ? 0x105 : 0x0);
+                break;
+        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
+        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
+        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
+                /* This part is doubtfull in my opinion */
+                WREG32(offset+R600_HDMI_ENABLE, enable ? 0x110 : 0x0);
+                break;
+        default:
+                DRM_ERROR("unknown HDMI output type\n");
+                break;
+        }
+}
+/*
+ * determin at which register offset the HDMI encoder is
+ */
+void r600_hdmi_init(struct drm_encoder *encoder)
+{
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        switch (radeon_encoder->encoder_id) {
+        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
+        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
+                radeon_encoder->hdmi_offset = R600_HDMI_TMDS1;
+                break;
+        case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
+                switch (r600_audio_tmds_index(encoder)) {
+                case 0:
+                        radeon_encoder->hdmi_offset = R600_HDMI_TMDS1;
+                        break;
+                case 1:
+                        radeon_encoder->hdmi_offset = R600_HDMI_TMDS2;
+                        break;
+                default:
+                        radeon_encoder->hdmi_offset = 0;
+                        break;
+                }
+        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
+                radeon_encoder->hdmi_offset = R600_HDMI_TMDS2;
+                break;
+        case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
+                radeon_encoder->hdmi_offset = R600_HDMI_DIG;
+                break;
+        default:
+                radeon_encoder->hdmi_offset = 0;
+                break;
+        }
+        DRM_DEBUG("using HDMI engine at offset 0x%04X for encoder 0x%x\n",
+                  radeon_encoder->hdmi_offset, radeon_encoder->encoder_id);
+        /* TODO: make this configureable */
+        radeon_encoder->hdmi_audio_workaround = 0;
+}
diff --git a/drivers/gpu/drm/radeon/r600_reg.h b/drivers/gpu/drm/radeon/r600_reg.h
index e2d1f5f33f7e..d0e28ffdeda9 100644
--- a/drivers/gpu/drm/radeon/r600_reg.h
+++ b/drivers/gpu/drm/radeon/r600_reg.h
@@ -110,5 +110,79 @@
 #define R600_BIOS_6_SCRATCH               0x173c
 #define R600_BIOS_7_SCRATCH               0x1740
+/* Audio, these regs were reverse enginered,
+ * so the chance is high that the naming is wrong
+ * R6xx+ ??? */
+/* Audio clocks */
+#define R600_AUDIO_PLL1_MUL               0x0514
+#define R600_AUDIO_PLL1_DIV               0x0518
+#define R600_AUDIO_PLL2_MUL               0x0524
+#define R600_AUDIO_PLL2_DIV               0x0528
+#define R600_AUDIO_CLK_SRCSEL             0x0534
+/* Audio general */
+#define R600_AUDIO_ENABLE                 0x7300
+#define R600_AUDIO_TIMING                 0x7344
+/* Audio params */
+#define R600_AUDIO_VENDOR_ID              0x7380
+#define R600_AUDIO_REVISION_ID            0x7384
+#define R600_AUDIO_ROOT_NODE_COUNT        0x7388
+#define R600_AUDIO_NID1_NODE_COUNT        0x738c
+#define R600_AUDIO_NID1_TYPE              0x7390
+#define R600_AUDIO_SUPPORTED_SIZE_RATE    0x7394
+#define R600_AUDIO_SUPPORTED_CODEC        0x7398
+#define R600_AUDIO_SUPPORTED_POWER_STATES 0x739c
+#define R600_AUDIO_NID2_CAPS              0x73a0
+#define R600_AUDIO_NID3_CAPS              0x73a4
+#define R600_AUDIO_NID3_PIN_CAPS          0x73a8
+/* Audio conn list */
+#define R600_AUDIO_CONN_LIST_LEN          0x73ac
+#define R600_AUDIO_CONN_LIST              0x73b0
+/* Audio verbs */
+#define R600_AUDIO_RATE_BPS_CHANNEL       0x73c0
+#define R600_AUDIO_PLAYING                0x73c4
+#define R600_AUDIO_IMPLEMENTATION_ID      0x73c8
+#define R600_AUDIO_CONFIG_DEFAULT         0x73cc
+#define R600_AUDIO_PIN_SENSE              0x73d0
+#define R600_AUDIO_PIN_WIDGET_CNTL        0x73d4
+#define R600_AUDIO_STATUS_BITS            0x73d8
+/* HDMI base register addresses */
+#define R600_HDMI_TMDS1                   0x7400
+#define R600_HDMI_TMDS2                   0x7700
+#define R600_HDMI_DIG                     0x7800
+/* HDMI registers */
+#define R600_HDMI_ENABLE           0x00
+#define R600_HDMI_STATUS           0x04
+#define R600_HDMI_CNTL             0x08
+#define R600_HDMI_UNKNOWN_0        0x0C
+#define R600_HDMI_AUDIOCNTL        0x10
+#define R600_HDMI_VIDEOCNTL        0x14
+#define R600_HDMI_VERSION          0x18
+#define R600_HDMI_UNKNOWN_1        0x28
+#define R600_HDMI_VIDEOINFOFRAME_0 0x54
+#define R600_HDMI_VIDEOINFOFRAME_1 0x58
+#define R600_HDMI_VIDEOINFOFRAME_2 0x5c
+#define R600_HDMI_VIDEOINFOFRAME_3 0x60
+#define R600_HDMI_32kHz_CTS        0xac
+#define R600_HDMI_32kHz_N          0xb0
+#define R600_HDMI_44_1kHz_CTS      0xb4
+#define R600_HDMI_44_1kHz_N        0xb8
+#define R600_HDMI_48kHz_CTS        0xbc
+#define R600_HDMI_48kHz_N          0xc0
+#define R600_HDMI_AUDIOINFOFRAME_0 0xcc
+#define R600_HDMI_AUDIOINFOFRAME_1 0xd0
+#define R600_HDMI_IEC60958_1       0xd4
+#define R600_HDMI_IEC60958_2       0xd8
+#define R600_HDMI_UNKNOWN_2        0xdc
+#define R600_HDMI_AUDIO_DEBUG_0    0xe0
+#define R600_HDMI_AUDIO_DEBUG_1    0xe4
+#define R600_HDMI_AUDIO_DEBUG_2    0xe8
+#define R600_HDMI_AUDIO_DEBUG_3    0xec
 #endif
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index c938bb54123c..cd650fd3964e 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -89,6 +89,7 @@ extern int radeon_testing;
 extern int radeon_connector_table;
 extern int radeon_tv;
 extern int radeon_new_pll;
+extern int radeon_audio;
 /*
 * Copy from radeon_drv.h so we don't have to include both and have conflicting
@@ -814,6 +815,14 @@ struct radeon_device {
        struct r600_ih ih; /* r6/700 interrupt ring */
        struct workqueue_struct *wq;
        struct work_struct hotplug_work;
+        /* audio stuff */
+        struct timer_list       audio_timer;
+        int                     audio_channels;
+        int                     audio_rate;
+        int                     audio_bits_per_sample;
+        uint8_t                 audio_status_bits;
+        uint8_t                 audio_category_code;
 };
 int radeon_device_init(struct radeon_device *rdev,
@@ -1016,6 +1025,7 @@ extern int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data);
 extern void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable);
 extern void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable);
 extern void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain);
+extern bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_object *bo);
 /* r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280 */
 struct r100_mc_save {
@@ -1146,6 +1156,21 @@ extern void r600_irq_fini(struct radeon_device *rdev);
 extern void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size);
 extern int r600_irq_set(struct radeon_device *rdev);
+extern int r600_audio_init(struct radeon_device *rdev);
+extern int r600_audio_tmds_index(struct drm_encoder *encoder);
+extern void r600_audio_set_clock(struct drm_encoder *encoder, int clock);
+extern void r600_audio_fini(struct radeon_device *rdev);
+extern void r600_hdmi_init(struct drm_encoder *encoder);
+extern void r600_hdmi_enable(struct drm_encoder *encoder, int enable);
+extern void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode);
+extern int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder);
+extern void r600_hdmi_update_audio_settings(struct drm_encoder *encoder,
+                                            int channels,
+                                            int rate,
+                                            int bps,
+                                            uint8_t status_bits,
+                                            uint8_t category_code);
 #include "radeon_object.h"
 #endif
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index c5c45e626d74..dbd56ef82f9c 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -87,6 +87,7 @@ int radeon_testing = 0;
 int radeon_connector_table = 0;
 int radeon_tv = 1;
 int radeon_new_pll = 1;
+int radeon_audio = 1;
 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
 module_param_named(no_wb, radeon_no_wb, int, 0444);
@@ -124,6 +125,9 @@ module_param_named(tv, radeon_tv, int, 0444);
 MODULE_PARM_DESC(new_pll, "Select new PLL code for AVIVO chips");
 module_param_named(new_pll, radeon_new_pll, int, 0444);
+MODULE_PARM_DESC(audio, "Audio enable (0 = disable)");
+module_param_named(audio, radeon_audio, int, 0444);
 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
 {
        drm_radeon_private_t *dev_priv = dev->dev_private;
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index b4f23ec93201..0d1d908e5225 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -438,6 +438,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
        union lvds_encoder_control args;
        int index = 0;
+        int hdmi_detected = 0;
        uint8_t frev, crev;
        struct radeon_encoder_atom_dig *dig;
        struct drm_connector *connector;
@@ -458,6 +459,9 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
        if (!radeon_connector->con_priv)
                return;
+        if (drm_detect_hdmi_monitor(radeon_connector->edid))
+                hdmi_detected = 1;
        dig_connector = radeon_connector->con_priv;
        memset(&args, 0, sizeof(args));
@@ -487,7 +491,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
                case 1:
                        args.v1.ucMisc = 0;
                        args.v1.ucAction = action;
-                        if (drm_detect_hdmi_monitor(radeon_connector->edid))
+                        if (hdmi_detected)
                                args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE;
                        args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
                        if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
@@ -512,7 +516,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
                                if (dig->coherent_mode)
                                        args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT;
                        }
-                        if (drm_detect_hdmi_monitor(radeon_connector->edid))
+                        if (hdmi_detected)
                                args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE;
                        args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
                        args.v2.ucTruncate = 0;
@@ -552,7 +556,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
        }
        atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
+        r600_hdmi_enable(encoder, hdmi_detected);
 }
 int
@@ -893,7 +897,6 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
        }
        atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
 }
 static void
@@ -1162,7 +1165,6 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder)
        }
        atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
 }
 static void
@@ -1265,6 +1267,8 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
                break;
        }
        atombios_apply_encoder_quirks(encoder, adjusted_mode);
+        r600_hdmi_setmode(encoder, adjusted_mode);
 }
 static bool
@@ -1510,4 +1514,6 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su
                drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs);
                break;
        }
+        r600_hdmi_init(encoder);
 }
diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c
index 2944486871b0..60df2d7e7e4c 100644
--- a/drivers/gpu/drm/radeon/radeon_gem.c
+++ b/drivers/gpu/drm/radeon/radeon_gem.c
@@ -66,8 +66,9 @@ int radeon_gem_object_create(struct radeon_device *rdev, int size,
        }
        r = radeon_bo_create(rdev, gobj, size, kernel, initial_domain, &robj);
        if (r) {
-                DRM_ERROR("Failed to allocate GEM object (%d, %d, %u)\n",
+                if (r != -ERESTARTSYS)
-                          size, initial_domain, alignment);
+                        DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
+                                  size, initial_domain, alignment, r);
                mutex_lock(&rdev->ddev->struct_mutex);
                drm_gem_object_unreference(gobj);
                mutex_unlock(&rdev->ddev->struct_mutex);
@@ -350,9 +351,10 @@ int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
        rbo = gobj->driver_private;
        r = radeon_bo_reserve(rbo, false);
        if (unlikely(r != 0))
-                return r;
+                goto out;
        radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
        radeon_bo_unreserve(rbo);
+out:
        mutex_lock(&dev->struct_mutex);
        drm_gem_object_unreference(gobj);
        mutex_unlock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 44d4b652ea12..3dcbe130c422 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -334,6 +334,9 @@ struct radeon_encoder {
        enum radeon_rmx_type rmx_type;
        struct drm_display_mode native_mode;
        void *enc_priv;
+        int hdmi_offset;
+        int hdmi_audio_workaround;
+        int hdmi_buffer_status;
 };
 struct radeon_connector_atom_dig {
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index 544e18ffaf22..d9ffe1f56e8f 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -56,6 +56,13 @@ static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo)
        kfree(bo);
 }
+bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_object *bo)
+{
+        if (bo->destroy == &radeon_ttm_bo_destroy)
+                return true;
+        return false;
+}
 void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
 {
        u32 c = 0;
@@ -71,6 +78,8 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
                rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
        if (domain & RADEON_GEM_DOMAIN_CPU)
                rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
+        if (!c)
+                rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
        rbo->placement.num_placement = c;
        rbo->placement.num_busy_placement = c;
 }
@@ -481,14 +490,20 @@ int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
 }
 void radeon_bo_move_notify(struct ttm_buffer_object *bo,
-                                struct ttm_mem_reg *mem)
+                           struct ttm_mem_reg *mem)
 {
-        struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
+        struct radeon_bo *rbo;
+        if (!radeon_ttm_bo_is_radeon_bo(bo))
+                return;
+        rbo = container_of(bo, struct radeon_bo, tbo);
        radeon_bo_check_tiling(rbo, 0, 1);
 }
 void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
 {
-        struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
+        struct radeon_bo *rbo;
+        if (!radeon_ttm_bo_is_radeon_bo(bo))
+                return;
+        rbo = container_of(bo, struct radeon_bo, tbo);
        radeon_bo_check_tiling(rbo, 0, 0);
 }
diff --git a/drivers/gpu/drm/radeon/radeon_object.h b/drivers/gpu/drm/radeon/radeon_object.h
index f6b69c2c0d00..a02f18011ad1 100644
--- a/drivers/gpu/drm/radeon/radeon_object.h
+++ b/drivers/gpu/drm/radeon/radeon_object.h
@@ -59,19 +59,17 @@ static inline unsigned radeon_mem_type_to_domain(u32 mem_type)
 *
 * Returns:
 * -EBUSY: buffer is busy and @no_wait is true
- * -ERESTART: A wait for the buffer to become unreserved was interrupted by
+ * -ERESTARTSYS: A wait for the buffer to become unreserved was interrupted by
 * a signal. Release all buffer reservations and return to user-space.
 */
 static inline int radeon_bo_reserve(struct radeon_bo *bo, bool no_wait)
 {
        int r;
-retry:
        r = ttm_bo_reserve(&bo->tbo, true, no_wait, false, 0);
        if (unlikely(r != 0)) {
-                if (r == -ERESTART)
+                if (r != -ERESTARTSYS)
-                        goto retry;
+                        dev_err(bo->rdev->dev, "%p reserve failed\n", bo);
-                dev_err(bo->rdev->dev, "%p reserve failed\n", bo);
                return r;
        }
        return 0;
@@ -125,12 +123,10 @@ static inline int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type,
 {
        int r;
-retry:
        r = ttm_bo_reserve(&bo->tbo, true, no_wait, false, 0);
        if (unlikely(r != 0)) {
-                if (r == -ERESTART)
+                if (r != -ERESTARTSYS)
-                        goto retry;
+                        dev_err(bo->rdev->dev, "%p reserve failed for wait\n", bo);
-                dev_err(bo->rdev->dev, "%p reserve failed for wait\n", bo);
                return r;
        }
        spin_lock(&bo->tbo.lock);
@@ -140,8 +136,6 @@ retry:
                r = ttm_bo_wait(&bo->tbo, true, true, no_wait);
        spin_unlock(&bo->tbo.lock);
        ttm_bo_unreserve(&bo->tbo);
-        if (unlikely(r == -ERESTART))
-                goto retry;
        return r;
 }
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 34b08d307c81..8bce64cdc320 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -44,8 +44,11 @@ static int radeon_debugfs_pm_info(struct seq_file *m, void *data)
        struct drm_device *dev = node->minor->dev;
        struct radeon_device *rdev = dev->dev_private;
-        seq_printf(m, "engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev));
+        seq_printf(m, "default engine clock: %u0 kHz\n", rdev->clock.default_sclk);
-        seq_printf(m, "memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev));
+        seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev));
+        seq_printf(m, "default memory clock: %u0 kHz\n", rdev->clock.default_mclk);
+        if (rdev->asic->get_memory_clock)
+                seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev));
        return 0;
 }
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 5a19d529d1c0..d7fd160cc671 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -200,7 +200,19 @@ static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
 static void radeon_evict_flags(struct ttm_buffer_object *bo,
                                struct ttm_placement *placement)
 {
-        struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
+        struct radeon_bo *rbo;
+        static u32 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
+        if (!radeon_ttm_bo_is_radeon_bo(bo)) {
+                placement->fpfn = 0;
+                placement->lpfn = 0;
+                placement->placement = &placements;
+                placement->busy_placement = &placements;
+                placement->num_placement = 1;
+                placement->num_busy_placement = 1;
+                return;
+        }
+        rbo = container_of(bo, struct radeon_bo, tbo);
        switch (bo->mem.mem_type) {
        case TTM_PL_VRAM:
                radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index c1fcdddb6be6..368415df5f3a 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -497,6 +497,8 @@ int rs400_init(struct radeon_device *rdev)
        /* Initialize clocks */
        radeon_get_clock_info(rdev->ddev);
+        /* Initialize power management */
+        radeon_pm_init(rdev);
        /* Get vram informations */
        rs400_vram_info(rdev);
        /* Initialize memory controller (also test AGP) */
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index fbb0357f1ec3..3bcb66e52786 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -892,6 +892,14 @@ static int rv770_startup(struct radeon_device *rdev)
        }
        rv770_gpu_init(rdev);
+        if (!rdev->r600_blit.shader_obj) {
+                r = r600_blit_init(rdev);
+                if (r) {
+                        DRM_ERROR("radeon: failed blitter (%d).\n", r);
+                        return r;
+                }
+        }
        r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
        if (unlikely(r != 0))
                return r;
@@ -1051,12 +1059,6 @@ int rv770_init(struct radeon_device *rdev)
        if (r)
                return r;
-        r = r600_blit_init(rdev);
-        if (r) {
-                DRM_ERROR("radeon: failed blitter (%d).\n", r);
-                return r;
-        }
        rdev->accel_working = true;
        r = rv770_startup(rdev);
        if (r) {
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 1fbb2eea5e88..2920f9a279e1 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -71,34 +71,34 @@ static inline int ttm_mem_type_from_flags(uint32_t flags, uint32_t *mem_type)
        return -EINVAL;
 }
-static void ttm_mem_type_manager_debug(struct ttm_bo_global *glob,
+static void ttm_mem_type_debug(struct ttm_bo_device *bdev, int mem_type)
-                                        struct ttm_mem_type_manager *man)
 {
+        struct ttm_mem_type_manager *man = &bdev->man[mem_type];
        printk(KERN_ERR TTM_PFX "    has_type: %d\n", man->has_type);
        printk(KERN_ERR TTM_PFX "    use_type: %d\n", man->use_type);
        printk(KERN_ERR TTM_PFX "    flags: 0x%08X\n", man->flags);
        printk(KERN_ERR TTM_PFX "    gpu_offset: 0x%08lX\n", man->gpu_offset);
        printk(KERN_ERR TTM_PFX "    io_offset: 0x%08lX\n", man->io_offset);
        printk(KERN_ERR TTM_PFX "    io_size: %ld\n", man->io_size);
-        printk(KERN_ERR TTM_PFX "    size: %ld\n", (unsigned long)man->size);
+        printk(KERN_ERR TTM_PFX "    size: %llu\n", man->size);
        printk(KERN_ERR TTM_PFX "    available_caching: 0x%08X\n",
                man->available_caching);
        printk(KERN_ERR TTM_PFX "    default_caching: 0x%08X\n",
                man->default_caching);
-        spin_lock(&glob->lru_lock);
+        if (mem_type != TTM_PL_SYSTEM) {
-        drm_mm_debug_table(&man->manager, TTM_PFX);
+                spin_lock(&bdev->glob->lru_lock);
-        spin_unlock(&glob->lru_lock);
+                drm_mm_debug_table(&man->manager, TTM_PFX);
+                spin_unlock(&bdev->glob->lru_lock);
+        }
 }
 static void ttm_bo_mem_space_debug(struct ttm_buffer_object *bo,
                                        struct ttm_placement *placement)
 {
-        struct ttm_bo_device *bdev = bo->bdev;
-        struct ttm_bo_global *glob = bo->glob;
-        struct ttm_mem_type_manager *man;
        int i, ret, mem_type;
-        printk(KERN_ERR TTM_PFX "No space for %p (%ld pages, %ldK, %ldM)\n",
+        printk(KERN_ERR TTM_PFX "No space for %p (%lu pages, %luK, %luM)\n",
                bo, bo->mem.num_pages, bo->mem.size >> 10,
                bo->mem.size >> 20);
        for (i = 0; i < placement->num_placement; i++) {
@@ -106,10 +106,9 @@ static void ttm_bo_mem_space_debug(struct ttm_buffer_object *bo,
                                                &mem_type);
                if (ret)
                        return;
-                man = &bdev->man[mem_type];
                printk(KERN_ERR TTM_PFX "  placement[%d]=0x%08X (%d)\n",
                        i, placement->placement[i], mem_type);
-                ttm_mem_type_manager_debug(glob, man);
+                ttm_mem_type_debug(bo->bdev, mem_type);
        }
 }
@@ -465,6 +464,8 @@ static int ttm_bo_cleanup_refs(struct ttm_buffer_object *bo, bool remove_all)
                spin_unlock(&bo->lock);
                spin_lock(&glob->lru_lock);
+                put_count = ttm_bo_del_from_lru(bo);
                ret = ttm_bo_reserve_locked(bo, false, false, false, 0);
                BUG_ON(ret);
                if (bo->ttm)
@@ -472,20 +473,19 @@ static int ttm_bo_cleanup_refs(struct ttm_buffer_object *bo, bool remove_all)
                if (!list_empty(&bo->ddestroy)) {
                        list_del_init(&bo->ddestroy);
-                        kref_put(&bo->list_kref, ttm_bo_ref_bug);
+                        ++put_count;
                }
                if (bo->mem.mm_node) {
                        bo->mem.mm_node->private = NULL;
                        drm_mm_put_block(bo->mem.mm_node);
                        bo->mem.mm_node = NULL;
                }
-                put_count = ttm_bo_del_from_lru(bo);
                spin_unlock(&glob->lru_lock);
                atomic_set(&bo->reserved, 0);
                while (put_count--)
-                        kref_put(&bo->list_kref, ttm_bo_release_list);
+                        kref_put(&bo->list_kref, ttm_bo_ref_bug);
                return 0;
        }
@@ -684,19 +684,45 @@ static int ttm_mem_evict_first(struct ttm_bo_device *bdev,
        struct ttm_buffer_object *bo;
        int ret, put_count = 0;
+retry:
        spin_lock(&glob->lru_lock);
+        if (list_empty(&man->lru)) {
+                spin_unlock(&glob->lru_lock);
+                return -EBUSY;
+        }
        bo = list_first_entry(&man->lru, struct ttm_buffer_object, lru);
        kref_get(&bo->list_kref);
-        ret = ttm_bo_reserve_locked(bo, interruptible, no_wait, false, 0);
-        if (likely(ret == 0))
+        ret = ttm_bo_reserve_locked(bo, false, true, false, 0);
-                put_count = ttm_bo_del_from_lru(bo);
+        if (unlikely(ret == -EBUSY)) {
+                spin_unlock(&glob->lru_lock);
+                if (likely(!no_wait))
+                        ret = ttm_bo_wait_unreserved(bo, interruptible);
+                kref_put(&bo->list_kref, ttm_bo_release_list);
+                /**
+                 * We *need* to retry after releasing the lru lock.
+                 */
+                if (unlikely(ret != 0))
+                        return ret;
+                goto retry;
+        }
+        put_count = ttm_bo_del_from_lru(bo);
        spin_unlock(&glob->lru_lock);
-        if (unlikely(ret != 0))
-                return ret;
+        BUG_ON(ret != 0);
        while (put_count--)
                kref_put(&bo->list_kref, ttm_bo_ref_bug);
        ret = ttm_bo_evict(bo, interruptible, no_wait);
        ttm_bo_unreserve(bo);
        kref_put(&bo->list_kref, ttm_bo_release_list);
        return ret;
 }
@@ -849,7 +875,7 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
        int i, ret;
        mem->mm_node = NULL;
-        for (i = 0; i <= placement->num_placement; ++i) {
+        for (i = 0; i < placement->num_placement; ++i) {
                ret = ttm_mem_type_from_flags(placement->placement[i],
                                                &mem_type);
                if (ret)
@@ -900,8 +926,8 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
        if (!type_found)
                return -EINVAL;
-        for (i = 0; i <= placement->num_busy_placement; ++i) {
+        for (i = 0; i < placement->num_busy_placement; ++i) {
-                ret = ttm_mem_type_from_flags(placement->placement[i],
+                ret = ttm_mem_type_from_flags(placement->busy_placement[i],
                                                &mem_type);
                if (ret)
                        return ret;
@@ -911,7 +937,7 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
                if (!ttm_bo_mt_compatible(man,
                                                bo->type == ttm_bo_type_user,
                                                mem_type,
-                                                placement->placement[i],
+                                                placement->busy_placement[i],
                                                &cur_flags))
                        continue;
@@ -921,7 +947,7 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
                 * Use the access and other non-mapping-related flag bits from
                 * the memory placement flags to the current flags
                 */
-                ttm_flag_masked(&cur_flags, placement->placement[i],
+                ttm_flag_masked(&cur_flags, placement->busy_placement[i],
                                ~TTM_PL_MASK_MEMTYPE);
                ret = ttm_bo_mem_force_space(bo, mem_type, placement, mem,
@@ -1115,6 +1141,7 @@ int ttm_bo_init(struct ttm_bo_device *bdev,
        bo->glob = bdev->glob;
        bo->type = type;
        bo->num_pages = num_pages;
+        bo->mem.size = num_pages << PAGE_SHIFT;
        bo->mem.mem_type = TTM_PL_SYSTEM;
        bo->mem.num_pages = bo->num_pages;
        bo->mem.mm_node = NULL;
diff --git a/drivers/gpu/drm/ttm/ttm_bo_vm.c b/drivers/gpu/drm/ttm/ttm_bo_vm.c
index 609a85a4d855..668dbe8b8dd3 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_vm.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_vm.c
@@ -320,7 +320,7 @@ ssize_t ttm_bo_io(struct ttm_bo_device *bdev, struct file *filp,
                return -EFAULT;
        driver = bo->bdev->driver;
-        if (unlikely(driver->verify_access)) {
+        if (unlikely(!driver->verify_access)) {
                ret = -EPERM;
                goto out_unref;
        }
diff --git a/drivers/infiniband/core/addr.c b/drivers/infiniband/core/addr.c
index bd07803e9183..abbb06996f9e 100644
--- a/drivers/infiniband/core/addr.c
+++ b/drivers/infiniband/core/addr.c
@@ -36,7 +36,6 @@
 #include <linux/mutex.h>
 #include <linux/inetdevice.h>
 #include <linux/workqueue.h>
-#include <linux/if_arp.h>
 #include <net/arp.h>
 #include <net/neighbour.h>
 #include <net/route.h>
@@ -92,22 +91,12 @@ EXPORT_SYMBOL(rdma_addr_unregister_client);
 int rdma_copy_addr(struct rdma_dev_addr *dev_addr, struct net_device *dev,
                     const unsigned char *dst_dev_addr)
 {
-        switch (dev->type) {
+        dev_addr->dev_type = dev->type;
-        case ARPHRD_INFINIBAND:
-                dev_addr->dev_type = RDMA_NODE_IB_CA;
-                break;
-        case ARPHRD_ETHER:
-                dev_addr->dev_type = RDMA_NODE_RNIC;
-                break;
-        default:
-                return -EADDRNOTAVAIL;
-        }
        memcpy(dev_addr->src_dev_addr, dev->dev_addr, MAX_ADDR_LEN);
        memcpy(dev_addr->broadcast, dev->broadcast, MAX_ADDR_LEN);
        if (dst_dev_addr)
                memcpy(dev_addr->dst_dev_addr, dst_dev_addr, MAX_ADDR_LEN);
-        dev_addr->src_dev = dev;
+        dev_addr->bound_dev_if = dev->ifindex;
        return 0;
 }
 EXPORT_SYMBOL(rdma_copy_addr);
@@ -117,6 +106,15 @@ int rdma_translate_ip(struct sockaddr *addr, struct rdma_dev_addr *dev_addr)
        struct net_device *dev;
        int ret = -EADDRNOTAVAIL;
+        if (dev_addr->bound_dev_if) {
+                dev = dev_get_by_index(&init_net, dev_addr->bound_dev_if);
+                if (!dev)
+                        return -ENODEV;
+                ret = rdma_copy_addr(dev_addr, dev, NULL);
+                dev_put(dev);
+                return ret;
+        }
        switch (addr->sa_family) {
        case AF_INET:
                dev = ip_dev_find(&init_net,
@@ -131,6 +129,7 @@ int rdma_translate_ip(struct sockaddr *addr, struct rdma_dev_addr *dev_addr)
 #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
        case AF_INET6:
+                read_lock(&dev_base_lock);
                for_each_netdev(&init_net, dev) {
                        if (ipv6_chk_addr(&init_net,
                                          &((struct sockaddr_in6 *) addr)->sin6_addr,
@@ -139,6 +138,7 @@ int rdma_translate_ip(struct sockaddr *addr, struct rdma_dev_addr *dev_addr)
                                break;
                        }
                }
+                read_unlock(&dev_base_lock);
                break;
 #endif
        }
@@ -176,48 +176,9 @@ static void queue_req(struct addr_req *req)
        mutex_unlock(&lock);
 }
-static void addr_send_arp(struct sockaddr *dst_in)
+static int addr4_resolve(struct sockaddr_in *src_in,
-{
+                         struct sockaddr_in *dst_in,
-        struct rtable *rt;
+                         struct rdma_dev_addr *addr)
-        struct flowi fl;
-        memset(&fl, 0, sizeof fl);
-        switch (dst_in->sa_family) {
-        case AF_INET:
-                fl.nl_u.ip4_u.daddr =
-                        ((struct sockaddr_in *) dst_in)->sin_addr.s_addr;
-                if (ip_route_output_key(&init_net, &rt, &fl))
-                        return;
-                neigh_event_send(rt->u.dst.neighbour, NULL);
-                ip_rt_put(rt);
-                break;
-#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
-        case AF_INET6:
-        {
-                struct dst_entry *dst;
-                fl.nl_u.ip6_u.daddr =
-                        ((struct sockaddr_in6 *) dst_in)->sin6_addr;
-                dst = ip6_route_output(&init_net, NULL, &fl);
-                if (!dst)
-                        return;
-                neigh_event_send(dst->neighbour, NULL);
-                dst_release(dst);
-                break;
-        }
-#endif
-        }
-}
-static int addr4_resolve_remote(struct sockaddr_in *src_in,
-                               struct sockaddr_in *dst_in,
-                               struct rdma_dev_addr *addr)
 {
        __be32 src_ip = src_in->sin_addr.s_addr;
        __be32 dst_ip = dst_in->sin_addr.s_addr;
@@ -229,10 +190,22 @@ static int addr4_resolve_remote(struct sockaddr_in *src_in,
        memset(&fl, 0, sizeof fl);
        fl.nl_u.ip4_u.daddr = dst_ip;
        fl.nl_u.ip4_u.saddr = src_ip;
+        fl.oif = addr->bound_dev_if;
        ret = ip_route_output_key(&init_net, &rt, &fl);
        if (ret)
                goto out;
+        src_in->sin_family = AF_INET;
+        src_in->sin_addr.s_addr = rt->rt_src;
+        if (rt->idev->dev->flags & IFF_LOOPBACK) {
+                ret = rdma_translate_ip((struct sockaddr *) dst_in, addr);
+                if (!ret)
+                        memcpy(addr->dst_dev_addr, addr->src_dev_addr, MAX_ADDR_LEN);
+                goto put;
+        }
        /* If the device does ARP internally, return 'done' */
        if (rt->idev->dev->flags & IFF_NOARP) {
                rdma_copy_addr(addr, rt->idev->dev, NULL);
@@ -240,21 +213,14 @@ static int addr4_resolve_remote(struct sockaddr_in *src_in,
        }
        neigh = neigh_lookup(&arp_tbl, &rt->rt_gateway, rt->idev->dev);
-        if (!neigh) {
+        if (!neigh || !(neigh->nud_state & NUD_VALID)) {
+                neigh_event_send(rt->u.dst.neighbour, NULL);
                ret = -ENODATA;
+                if (neigh)
+                        goto release;
                goto put;
        }
-        if (!(neigh->nud_state & NUD_VALID)) {
-                ret = -ENODATA;
-                goto release;
-        }
-        if (!src_ip) {
-                src_in->sin_family = dst_in->sin_family;
-                src_in->sin_addr.s_addr = rt->rt_src;
-        }
        ret = rdma_copy_addr(addr, neigh->dev, neigh->ha);
 release:
        neigh_release(neigh);
@@ -265,52 +231,77 @@ out:
 }
 #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
-static int addr6_resolve_remote(struct sockaddr_in6 *src_in,
+static int addr6_resolve(struct sockaddr_in6 *src_in,
-                               struct sockaddr_in6 *dst_in,
+                         struct sockaddr_in6 *dst_in,
-                               struct rdma_dev_addr *addr)
+                         struct rdma_dev_addr *addr)
 {
        struct flowi fl;
        struct neighbour *neigh;
        struct dst_entry *dst;
-        int ret = -ENODATA;
+        int ret;
        memset(&fl, 0, sizeof fl);
-        fl.nl_u.ip6_u.daddr = dst_in->sin6_addr;
+        ipv6_addr_copy(&fl.fl6_dst, &dst_in->sin6_addr);
-        fl.nl_u.ip6_u.saddr = src_in->sin6_addr;
+        ipv6_addr_copy(&fl.fl6_src, &src_in->sin6_addr);
+        fl.oif = addr->bound_dev_if;
        dst = ip6_route_output(&init_net, NULL, &fl);
-        if (!dst)
+        if ((ret = dst->error))
-                return ret;
+                goto put;
+        if (ipv6_addr_any(&fl.fl6_src)) {
+                ret = ipv6_dev_get_saddr(&init_net, ip6_dst_idev(dst)->dev,
+                                         &fl.fl6_dst, 0, &fl.fl6_src);
+                if (ret)
+                        goto put;
+                src_in->sin6_family = AF_INET6;
+                ipv6_addr_copy(&src_in->sin6_addr, &fl.fl6_src);
+        }
+        if (dst->dev->flags & IFF_LOOPBACK) {
+                ret = rdma_translate_ip((struct sockaddr *) dst_in, addr);
+                if (!ret)
+                        memcpy(addr->dst_dev_addr, addr->src_dev_addr, MAX_ADDR_LEN);
+                goto put;
+        }
+        /* If the device does ARP internally, return 'done' */
        if (dst->dev->flags & IFF_NOARP) {
                ret = rdma_copy_addr(addr, dst->dev, NULL);
-        } else {
+                goto put;
-                neigh = dst->neighbour;
+        }
-                if (neigh && (neigh->nud_state & NUD_VALID))
-                        ret = rdma_copy_addr(addr, neigh->dev, neigh->ha);
+        neigh = dst->neighbour;
+        if (!neigh || !(neigh->nud_state & NUD_VALID)) {
+                neigh_event_send(dst->neighbour, NULL);
+                ret = -ENODATA;
+                goto put;
        }
+        ret = rdma_copy_addr(addr, dst->dev, neigh->ha);
+put:
        dst_release(dst);
        return ret;
 }
 #else
-static int addr6_resolve_remote(struct sockaddr_in6 *src_in,
+static int addr6_resolve(struct sockaddr_in6 *src_in,
-                               struct sockaddr_in6 *dst_in,
+                         struct sockaddr_in6 *dst_in,
-                               struct rdma_dev_addr *addr)
+                         struct rdma_dev_addr *addr)
 {
        return -EADDRNOTAVAIL;
 }
 #endif
-static int addr_resolve_remote(struct sockaddr *src_in,
+static int addr_resolve(struct sockaddr *src_in,
-                                struct sockaddr *dst_in,
+                        struct sockaddr *dst_in,
-                                struct rdma_dev_addr *addr)
+                        struct rdma_dev_addr *addr)
 {
        if (src_in->sa_family == AF_INET) {
-                return addr4_resolve_remote((struct sockaddr_in *) src_in,
+                return addr4_resolve((struct sockaddr_in *) src_in,
                        (struct sockaddr_in *) dst_in, addr);
        } else
-                return addr6_resolve_remote((struct sockaddr_in6 *) src_in,
+                return addr6_resolve((struct sockaddr_in6 *) src_in,
                        (struct sockaddr_in6 *) dst_in, addr);
 }
@@ -327,8 +318,7 @@ static void process_req(struct work_struct *work)
                if (req->status == -ENODATA) {
                        src_in = (struct sockaddr *) &req->src_addr;
                        dst_in = (struct sockaddr *) &req->dst_addr;
-                        req->status = addr_resolve_remote(src_in, dst_in,
+                        req->status = addr_resolve(src_in, dst_in, req->addr);
-                                                          req->addr);
                        if (req->status && time_after_eq(jiffies, req->timeout))
                                req->status = -ETIMEDOUT;
                        else if (req->status == -ENODATA)
@@ -352,82 +342,6 @@ static void process_req(struct work_struct *work)
        }
 }
-static int addr_resolve_local(struct sockaddr *src_in,
-                              struct sockaddr *dst_in,
-                              struct rdma_dev_addr *addr)
-{
-        struct net_device *dev;
-        int ret;
-        switch (dst_in->sa_family) {
-        case AF_INET:
-        {
-                __be32 src_ip = ((struct sockaddr_in *) src_in)->sin_addr.s_addr;
-                __be32 dst_ip = ((struct sockaddr_in *) dst_in)->sin_addr.s_addr;
-                dev = ip_dev_find(&init_net, dst_ip);
-                if (!dev)
-                        return -EADDRNOTAVAIL;
-                if (ipv4_is_zeronet(src_ip)) {
-                        src_in->sa_family = dst_in->sa_family;
-                        ((struct sockaddr_in *) src_in)->sin_addr.s_addr = dst_ip;
-                        ret = rdma_copy_addr(addr, dev, dev->dev_addr);
-                } else if (ipv4_is_loopback(src_ip)) {
-                        ret = rdma_translate_ip(dst_in, addr);
-                        if (!ret)
-                                memcpy(addr->dst_dev_addr, dev->dev_addr, MAX_ADDR_LEN);
-                } else {
-                        ret = rdma_translate_ip(src_in, addr);
-                        if (!ret)
-                                memcpy(addr->dst_dev_addr, dev->dev_addr, MAX_ADDR_LEN);
-                }
-                dev_put(dev);
-                break;
-        }
-#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
-        case AF_INET6:
-        {
-                struct in6_addr *a;
-                for_each_netdev(&init_net, dev)
-                        if (ipv6_chk_addr(&init_net,
-                                          &((struct sockaddr_in6 *) dst_in)->sin6_addr,
-                                          dev, 1))
-                                break;
-                if (!dev)
-                        return -EADDRNOTAVAIL;
-                a = &((struct sockaddr_in6 *) src_in)->sin6_addr;
-                if (ipv6_addr_any(a)) {
-                        src_in->sa_family = dst_in->sa_family;
-                        ((struct sockaddr_in6 *) src_in)->sin6_addr =
-                                ((struct sockaddr_in6 *) dst_in)->sin6_addr;
-                        ret = rdma_copy_addr(addr, dev, dev->dev_addr);
-                } else if (ipv6_addr_loopback(a)) {
-                        ret = rdma_translate_ip(dst_in, addr);
-                        if (!ret)
-                                memcpy(addr->dst_dev_addr, dev->dev_addr, MAX_ADDR_LEN);
-                } else  {
-                        ret = rdma_translate_ip(src_in, addr);
-                        if (!ret)
-                                memcpy(addr->dst_dev_addr, dev->dev_addr, MAX_ADDR_LEN);
-                }
-                break;
-        }
-#endif
-        default:
-                ret = -EADDRNOTAVAIL;
-                break;
-        }
-        return ret;
-}
 int rdma_resolve_ip(struct rdma_addr_client *client,
                    struct sockaddr *src_addr, struct sockaddr *dst_addr,
                    struct rdma_dev_addr *addr, int timeout_ms,
@@ -443,22 +357,28 @@ int rdma_resolve_ip(struct rdma_addr_client *client,
        if (!req)
                return -ENOMEM;
-        if (src_addr)
+        src_in = (struct sockaddr *) &req->src_addr;
-                memcpy(&req->src_addr, src_addr, ip_addr_size(src_addr));
+        dst_in = (struct sockaddr *) &req->dst_addr;
-        memcpy(&req->dst_addr, dst_addr, ip_addr_size(dst_addr));
+        if (src_addr) {
+                if (src_addr->sa_family != dst_addr->sa_family) {
+                        ret = -EINVAL;
+                        goto err;
+                }
+                memcpy(src_in, src_addr, ip_addr_size(src_addr));
+        } else {
+                src_in->sa_family = dst_addr->sa_family;
+        }
+        memcpy(dst_in, dst_addr, ip_addr_size(dst_addr));
        req->addr = addr;
        req->callback = callback;
        req->context = context;
        req->client = client;
        atomic_inc(&client->refcount);
-        src_in = (struct sockaddr *) &req->src_addr;
+        req->status = addr_resolve(src_in, dst_in, addr);
-        dst_in = (struct sockaddr *) &req->dst_addr;
-        req->status = addr_resolve_local(src_in, dst_in, addr);
-        if (req->status == -EADDRNOTAVAIL)
-                req->status = addr_resolve_remote(src_in, dst_in, addr);
        switch (req->status) {
        case 0:
                req->timeout = jiffies;
@@ -467,15 +387,16 @@ int rdma_resolve_ip(struct rdma_addr_client *client,
        case -ENODATA:
                req->timeout = msecs_to_jiffies(timeout_ms) + jiffies;
                queue_req(req);
-                addr_send_arp(dst_in);
                break;
        default:
                ret = req->status;
                atomic_dec(&client->refcount);
-                kfree(req);
+                goto err;
-                break;
        }
        return ret;
+err:
+        kfree(req);
+        return ret;
 }
 EXPORT_SYMBOL(rdma_resolve_ip);
diff --git a/drivers/infiniband/core/cma.c b/drivers/infiniband/core/cma.c
index 075317884b53..fbdd73106000 100644
--- a/drivers/infiniband/core/cma.c
+++ b/drivers/infiniband/core/cma.c
@@ -330,17 +330,7 @@ static int cma_acquire_dev(struct rdma_id_private *id_priv)
        union ib_gid gid;
        int ret = -ENODEV;
-        switch (rdma_node_get_transport(dev_addr->dev_type)) {
+        rdma_addr_get_sgid(dev_addr, &gid);
-        case RDMA_TRANSPORT_IB:
-                ib_addr_get_sgid(dev_addr, &gid);
-                break;
-        case RDMA_TRANSPORT_IWARP:
-                iw_addr_get_sgid(dev_addr, &gid);
-                break;
-        default:
-                return -ENODEV;
-        }
        list_for_each_entry(cma_dev, &dev_list, list) {
                ret = ib_find_cached_gid(cma_dev->device, &gid,
                                         &id_priv->id.port_num, NULL);
@@ -1032,11 +1022,17 @@ static struct rdma_id_private *cma_new_conn_id(struct rdma_cm_id *listen_id,
        if (rt->num_paths == 2)
                rt->path_rec[1] = *ib_event->param.req_rcvd.alternate_path;
-        ib_addr_set_dgid(&rt->addr.dev_addr, &rt->path_rec[0].dgid);
+        if (cma_any_addr((struct sockaddr *) &rt->addr.src_addr)) {
-        ret = rdma_translate_ip((struct sockaddr *) &id->route.addr.src_addr,
+                rt->addr.dev_addr.dev_type = ARPHRD_INFINIBAND;
-                                &id->route.addr.dev_addr);
+                rdma_addr_set_sgid(&rt->addr.dev_addr, &rt->path_rec[0].sgid);
-        if (ret)
+                ib_addr_set_pkey(&rt->addr.dev_addr, rt->path_rec[0].pkey);
-                goto destroy_id;
+        } else {
+                ret = rdma_translate_ip((struct sockaddr *) &rt->addr.src_addr,
+                                        &rt->addr.dev_addr);
+                if (ret)
+                        goto destroy_id;
+        }
+        rdma_addr_set_dgid(&rt->addr.dev_addr, &rt->path_rec[0].dgid);
        id_priv = container_of(id, struct rdma_id_private, id);
        id_priv->state = CMA_CONNECT;
@@ -1071,10 +1067,12 @@ static struct rdma_id_private *cma_new_udp_id(struct rdma_cm_id *listen_id,
        cma_save_net_info(&id->route.addr, &listen_id->route.addr,
                          ip_ver, port, src, dst);
-        ret = rdma_translate_ip((struct sockaddr *) &id->route.addr.src_addr,
+        if (!cma_any_addr((struct sockaddr *) &id->route.addr.src_addr)) {
-                                &id->route.addr.dev_addr);
+                ret = rdma_translate_ip((struct sockaddr *) &id->route.addr.src_addr,
-        if (ret)
+                                        &id->route.addr.dev_addr);
-                goto err;
+                if (ret)
+                        goto err;
+        }
        id_priv = container_of(id, struct rdma_id_private, id);
        id_priv->state = CMA_CONNECT;
@@ -1474,15 +1472,6 @@ static void cma_listen_on_all(struct rdma_id_private *id_priv)
        mutex_unlock(&lock);
 }
-static int cma_bind_any(struct rdma_cm_id *id, sa_family_t af)
-{
-        struct sockaddr_storage addr_in;
-        memset(&addr_in, 0, sizeof addr_in);
-        addr_in.ss_family = af;
-        return rdma_bind_addr(id, (struct sockaddr *) &addr_in);
-}
 int rdma_listen(struct rdma_cm_id *id, int backlog)
 {
        struct rdma_id_private *id_priv;
@@ -1490,7 +1479,8 @@ int rdma_listen(struct rdma_cm_id *id, int backlog)
        id_priv = container_of(id, struct rdma_id_private, id);
        if (id_priv->state == CMA_IDLE) {
-                ret = cma_bind_any(id, AF_INET);
+                ((struct sockaddr *) &id->route.addr.src_addr)->sa_family = AF_INET;
+                ret = rdma_bind_addr(id, (struct sockaddr *) &id->route.addr.src_addr);
                if (ret)
                        return ret;
        }
@@ -1565,8 +1555,8 @@ static int cma_query_ib_route(struct rdma_id_private *id_priv, int timeout_ms,
        struct sockaddr_in6 *sin6;
        memset(&path_rec, 0, sizeof path_rec);
-        ib_addr_get_sgid(&addr->dev_addr, &path_rec.sgid);
+        rdma_addr_get_sgid(&addr->dev_addr, &path_rec.sgid);
-        ib_addr_get_dgid(&addr->dev_addr, &path_rec.dgid);
+        rdma_addr_get_dgid(&addr->dev_addr, &path_rec.dgid);
        path_rec.pkey = cpu_to_be16(ib_addr_get_pkey(&addr->dev_addr));
        path_rec.numb_path = 1;
        path_rec.reversible = 1;
@@ -1781,7 +1771,11 @@ port_found:
        if (ret)
                goto out;
-        ib_addr_set_sgid(&id_priv->id.route.addr.dev_addr, &gid);
+        id_priv->id.route.addr.dev_addr.dev_type =
+                (rdma_node_get_transport(cma_dev->device->node_type) == RDMA_TRANSPORT_IB) ?
+                ARPHRD_INFINIBAND : ARPHRD_ETHER;
+        rdma_addr_set_sgid(&id_priv->id.route.addr.dev_addr, &gid);
        ib_addr_set_pkey(&id_priv->id.route.addr.dev_addr, pkey);
        id_priv->id.port_num = p;
        cma_attach_to_dev(id_priv, cma_dev);
@@ -1839,7 +1833,7 @@ out:
 static int cma_resolve_loopback(struct rdma_id_private *id_priv)
 {
        struct cma_work *work;
-        struct sockaddr_in *src_in, *dst_in;
+        struct sockaddr *src, *dst;
        union ib_gid gid;
        int ret;
@@ -1853,14 +1847,19 @@ static int cma_resolve_loopback(struct rdma_id_private *id_priv)
                        goto err;
        }
-        ib_addr_get_sgid(&id_priv->id.route.addr.dev_addr, &gid);
+        rdma_addr_get_sgid(&id_priv->id.route.addr.dev_addr, &gid);
-        ib_addr_set_dgid(&id_priv->id.route.addr.dev_addr, &gid);
+        rdma_addr_set_dgid(&id_priv->id.route.addr.dev_addr, &gid);
-        if (cma_zero_addr((struct sockaddr *) &id_priv->id.route.addr.src_addr)) {
+        src = (struct sockaddr *) &id_priv->id.route.addr.src_addr;
-                src_in = (struct sockaddr_in *)&id_priv->id.route.addr.src_addr;
+        if (cma_zero_addr(src)) {
-                dst_in = (struct sockaddr_in *)&id_priv->id.route.addr.dst_addr;
+                dst = (struct sockaddr *) &id_priv->id.route.addr.dst_addr;
-                src_in->sin_family = dst_in->sin_family;
+                if ((src->sa_family = dst->sa_family) == AF_INET) {
-                src_in->sin_addr.s_addr = dst_in->sin_addr.s_addr;
+                        ((struct sockaddr_in *) src)->sin_addr.s_addr =
+                                ((struct sockaddr_in *) dst)->sin_addr.s_addr;
+                } else {
+                        ipv6_addr_copy(&((struct sockaddr_in6 *) src)->sin6_addr,
+                                       &((struct sockaddr_in6 *) dst)->sin6_addr);
+                }
        }
        work->id = id_priv;
@@ -1878,10 +1877,14 @@ err:
 static int cma_bind_addr(struct rdma_cm_id *id, struct sockaddr *src_addr,
                         struct sockaddr *dst_addr)
 {
-        if (src_addr && src_addr->sa_family)
+        if (!src_addr || !src_addr->sa_family) {
-                return rdma_bind_addr(id, src_addr);
+                src_addr = (struct sockaddr *) &id->route.addr.src_addr;
-        else
+                if ((src_addr->sa_family = dst_addr->sa_family) == AF_INET6) {
-                return cma_bind_any(id, dst_addr->sa_family);
+                        ((struct sockaddr_in6 *) src_addr)->sin6_scope_id =
+                                ((struct sockaddr_in6 *) dst_addr)->sin6_scope_id;
+                }
+        }
+        return rdma_bind_addr(id, src_addr);
 }
 int rdma_resolve_addr(struct rdma_cm_id *id, struct sockaddr *src_addr,
@@ -2077,6 +2080,25 @@ static int cma_get_port(struct rdma_id_private *id_priv)
        return ret;
 }
+static int cma_check_linklocal(struct rdma_dev_addr *dev_addr,
+                               struct sockaddr *addr)
+{
+#if defined(CONFIG_IPv6) || defined(CONFIG_IPV6_MODULE)
+        struct sockaddr_in6 *sin6;
+        if (addr->sa_family != AF_INET6)
+                return 0;
+        sin6 = (struct sockaddr_in6 *) addr;
+        if ((ipv6_addr_type(&sin6->sin6_addr) & IPV6_ADDR_LINKLOCAL) &&
+            !sin6->sin6_scope_id)
+                        return -EINVAL;
+        dev_addr->bound_dev_if = sin6->sin6_scope_id;
+#endif
+        return 0;
+}
 int rdma_bind_addr(struct rdma_cm_id *id, struct sockaddr *addr)
 {
        struct rdma_id_private *id_priv;
@@ -2089,7 +2111,13 @@ int rdma_bind_addr(struct rdma_cm_id *id, struct sockaddr *addr)
        if (!cma_comp_exch(id_priv, CMA_IDLE, CMA_ADDR_BOUND))
                return -EINVAL;
-        if (!cma_any_addr(addr)) {
+        ret = cma_check_linklocal(&id->route.addr.dev_addr, addr);
+        if (ret)
+                goto err1;
+        if (cma_loopback_addr(addr)) {
+                ret = cma_bind_loopback(id_priv);
+        } else if (!cma_zero_addr(addr)) {
                ret = rdma_translate_ip(addr, &id->route.addr.dev_addr);
                if (ret)
                        goto err1;
@@ -2108,7 +2136,7 @@ int rdma_bind_addr(struct rdma_cm_id *id, struct sockaddr *addr)
        return 0;
 err2:
-        if (!cma_any_addr(addr)) {
+        if (id_priv->cma_dev) {
                mutex_lock(&lock);
                cma_detach_from_dev(id_priv);
                mutex_unlock(&lock);
@@ -2687,10 +2715,15 @@ static void cma_set_mgid(struct rdma_id_private *id_priv,
        if (cma_any_addr(addr)) {
                memset(mgid, 0, sizeof *mgid);
        } else if ((addr->sa_family == AF_INET6) &&
-                   ((be32_to_cpu(sin6->sin6_addr.s6_addr32[0]) & 0xFF10A01B) ==
+                   ((be32_to_cpu(sin6->sin6_addr.s6_addr32[0]) & 0xFFF0FFFF) ==
                                                                 0xFF10A01B)) {
                /* IPv6 address is an SA assigned MGID. */
                memcpy(mgid, &sin6->sin6_addr, sizeof *mgid);
+        } else if ((addr->sa_family == AF_INET6)) {
+                ipv6_ib_mc_map(&sin6->sin6_addr, dev_addr->broadcast, mc_map);
+                if (id_priv->id.ps == RDMA_PS_UDP)
+                        mc_map[7] = 0x01;       /* Use RDMA CM signature */
+                *mgid = *(union ib_gid *) (mc_map + 4);
        } else {
                ip_ib_mc_map(sin->sin_addr.s_addr, dev_addr->broadcast, mc_map);
                if (id_priv->id.ps == RDMA_PS_UDP)
@@ -2716,7 +2749,7 @@ static int cma_join_ib_multicast(struct rdma_id_private *id_priv,
        cma_set_mgid(id_priv, (struct sockaddr *) &mc->addr, &rec.mgid);
        if (id_priv->id.ps == RDMA_PS_UDP)
                rec.qkey = cpu_to_be32(RDMA_UDP_QKEY);
-        ib_addr_get_sgid(dev_addr, &rec.port_gid);
+        rdma_addr_get_sgid(dev_addr, &rec.port_gid);
        rec.pkey = cpu_to_be16(ib_addr_get_pkey(dev_addr));
        rec.join_state = 1;
@@ -2815,7 +2848,7 @@ static int cma_netdev_change(struct net_device *ndev, struct rdma_id_private *id
        dev_addr = &id_priv->id.route.addr.dev_addr;
-        if ((dev_addr->src_dev == ndev) &&
+        if ((dev_addr->bound_dev_if == ndev->ifindex) &&
            memcmp(dev_addr->src_dev_addr, ndev->dev_addr, ndev->addr_len)) {
                printk(KERN_INFO "RDMA CM addr change for ndev %s used by id %p\n",
                       ndev->name, &id_priv->id);
diff --git a/drivers/infiniband/core/sa_query.c b/drivers/infiniband/core/sa_query.c
index 82543716d59e..7e1ffd8ccd5c 100644
--- a/drivers/infiniband/core/sa_query.c
+++ b/drivers/infiniband/core/sa_query.c
@@ -604,6 +604,12 @@ retry:
        return ret ? ret : id;
 }
+void ib_sa_unpack_path(void *attribute, struct ib_sa_path_rec *rec)
+{
+        ib_unpack(path_rec_table, ARRAY_SIZE(path_rec_table), attribute, rec);
+}
+EXPORT_SYMBOL(ib_sa_unpack_path);
 static void ib_sa_path_rec_callback(struct ib_sa_query *sa_query,
                                    int status,
                                    struct ib_sa_mad *mad)
diff --git a/drivers/infiniband/core/ucma.c b/drivers/infiniband/core/ucma.c
index bb96d3c4b0f4..b2e16c332d5b 100644
--- a/drivers/infiniband/core/ucma.c
+++ b/drivers/infiniband/core/ucma.c
@@ -43,6 +43,7 @@
 #include <rdma/rdma_user_cm.h>
 #include <rdma/ib_marshall.h>
 #include <rdma/rdma_cm.h>
+#include <rdma/rdma_cm_ib.h>
 MODULE_AUTHOR("Sean Hefty");
 MODULE_DESCRIPTION("RDMA Userspace Connection Manager Access");
@@ -562,10 +563,10 @@ static void ucma_copy_ib_route(struct rdma_ucm_query_route_resp *resp,
        switch (route->num_paths) {
        case 0:
                dev_addr = &route->addr.dev_addr;
-                ib_addr_get_dgid(dev_addr,
+                rdma_addr_get_dgid(dev_addr,
-                                 (union ib_gid *) &resp->ib_route[0].dgid);
+                                   (union ib_gid *) &resp->ib_route[0].dgid);
-                ib_addr_get_sgid(dev_addr,
+                rdma_addr_get_sgid(dev_addr,
-                                 (union ib_gid *) &resp->ib_route[0].sgid);
+                                   (union ib_gid *) &resp->ib_route[0].sgid);
                resp->ib_route[0].pkey = cpu_to_be16(ib_addr_get_pkey(dev_addr));
                break;
        case 2:
@@ -812,6 +813,51 @@ static int ucma_set_option_id(struct ucma_context *ctx, int optname,
        return ret;
 }
+static int ucma_set_ib_path(struct ucma_context *ctx,
+                            struct ib_path_rec_data *path_data, size_t optlen)
+{
+        struct ib_sa_path_rec sa_path;
+        struct rdma_cm_event event;
+        int ret;
+        if (optlen % sizeof(*path_data))
+                return -EINVAL;
+        for (; optlen; optlen -= sizeof(*path_data), path_data++) {
+                if (path_data->flags == (IB_PATH_GMP | IB_PATH_PRIMARY |
+                                         IB_PATH_BIDIRECTIONAL))
+                        break;
+        }
+        if (!optlen)
+                return -EINVAL;
+        ib_sa_unpack_path(path_data->path_rec, &sa_path);
+        ret = rdma_set_ib_paths(ctx->cm_id, &sa_path, 1);
+        if (ret)
+                return ret;
+        memset(&event, 0, sizeof event);
+        event.event = RDMA_CM_EVENT_ROUTE_RESOLVED;
+        return ucma_event_handler(ctx->cm_id, &event);
+}
+static int ucma_set_option_ib(struct ucma_context *ctx, int optname,
+                              void *optval, size_t optlen)
+{
+        int ret;
+        switch (optname) {
+        case RDMA_OPTION_IB_PATH:
+                ret = ucma_set_ib_path(ctx, optval, optlen);
+                break;
+        default:
+                ret = -ENOSYS;
+        }
+        return ret;
+}
 static int ucma_set_option_level(struct ucma_context *ctx, int level,
                                 int optname, void *optval, size_t optlen)
 {
@@ -821,6 +867,9 @@ static int ucma_set_option_level(struct ucma_context *ctx, int level,
        case RDMA_OPTION_ID:
                ret = ucma_set_option_id(ctx, optname, optval, optlen);
                break;
+        case RDMA_OPTION_IB:
+                ret = ucma_set_option_ib(ctx, optname, optval, optlen);
+                break;
        default:
                ret = -ENOSYS;
        }
diff --git a/drivers/infiniband/core/uverbs_cmd.c b/drivers/infiniband/core/uverbs_cmd.c
index 56feab6c251e..112d3970222a 100644
--- a/drivers/infiniband/core/uverbs_cmd.c
+++ b/drivers/infiniband/core/uverbs_cmd.c
@@ -285,7 +285,7 @@ ssize_t ib_uverbs_get_context(struct ib_uverbs_file *file,
        ucontext = ibdev->alloc_ucontext(ibdev, &udata);
        if (IS_ERR(ucontext)) {
-                ret = PTR_ERR(file->ucontext);
+                ret = PTR_ERR(ucontext);
                goto err;
        }
diff --git a/drivers/infiniband/hw/amso1100/c2_qp.c b/drivers/infiniband/hw/amso1100/c2_qp.c
index a6d89440ad2c..ad518868df77 100644
--- a/drivers/infiniband/hw/amso1100/c2_qp.c
+++ b/drivers/infiniband/hw/amso1100/c2_qp.c
@@ -798,8 +798,10 @@ int c2_post_send(struct ib_qp *ibqp, struct ib_send_wr *ib_wr,
        u8 actual_sge_count;
        u32 msg_size;
-        if (qp->state > IB_QPS_RTS)
+        if (qp->state > IB_QPS_RTS) {
-                return -EINVAL;
+                err = -EINVAL;
+                goto out;
+        }
        while (ib_wr) {
@@ -930,6 +932,7 @@ int c2_post_send(struct ib_qp *ibqp, struct ib_send_wr *ib_wr,
                ib_wr = ib_wr->next;
        }
+out:
        if (err)
                *bad_wr = ib_wr;
        return err;
@@ -944,8 +947,10 @@ int c2_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *ib_wr,
        unsigned long lock_flags;
        int err = 0;
-        if (qp->state > IB_QPS_RTS)
+        if (qp->state > IB_QPS_RTS) {
-                return -EINVAL;
+                err = -EINVAL;
+                goto out;
+        }
        /*
         * Try and post each work request
@@ -998,6 +1003,7 @@ int c2_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *ib_wr,
                ib_wr = ib_wr->next;
        }
+out:
        if (err)
                *bad_wr = ib_wr;
        return err;
diff --git a/drivers/infiniband/hw/cxgb3/iwch_qp.c b/drivers/infiniband/hw/cxgb3/iwch_qp.c
index 1cecf98829ac..3eb8cecf81d7 100644
--- a/drivers/infiniband/hw/cxgb3/iwch_qp.c
+++ b/drivers/infiniband/hw/cxgb3/iwch_qp.c
@@ -365,18 +365,19 @@ int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
        spin_lock_irqsave(&qhp->lock, flag);
        if (qhp->attr.state > IWCH_QP_STATE_RTS) {
                spin_unlock_irqrestore(&qhp->lock, flag);
-                return -EINVAL;
+                err = -EINVAL;
+                goto out;
        }
        num_wrs = Q_FREECNT(qhp->wq.sq_rptr, qhp->wq.sq_wptr,
                  qhp->wq.sq_size_log2);
        if (num_wrs <= 0) {
                spin_unlock_irqrestore(&qhp->lock, flag);
-                return -ENOMEM;
+                err = -ENOMEM;
+                goto out;
        }
        while (wr) {
                if (num_wrs == 0) {
                        err = -ENOMEM;
-                        *bad_wr = wr;
                        break;
                }
                idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2);
@@ -428,10 +429,8 @@ int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
                             wr->opcode);
                        err = -EINVAL;
                }
-                if (err) {
+                if (err)
-                        *bad_wr = wr;
                        break;
-                }
                wqe->send.wrid.id0.hi = qhp->wq.sq_wptr;
                sqp->wr_id = wr->wr_id;
                sqp->opcode = wr2opcode(t3_wr_opcode);
@@ -454,6 +453,10 @@ int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
        }
        spin_unlock_irqrestore(&qhp->lock, flag);
        ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid);
+out:
+        if (err)
+                *bad_wr = wr;
        return err;
 }
@@ -471,18 +474,19 @@ int iwch_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
        spin_lock_irqsave(&qhp->lock, flag);
        if (qhp->attr.state > IWCH_QP_STATE_RTS) {
                spin_unlock_irqrestore(&qhp->lock, flag);
-                return -EINVAL;
+                err = -EINVAL;
+                goto out;
        }
        num_wrs = Q_FREECNT(qhp->wq.rq_rptr, qhp->wq.rq_wptr,
                            qhp->wq.rq_size_log2) - 1;
        if (!wr) {
                spin_unlock_irqrestore(&qhp->lock, flag);
-                return -EINVAL;
+                err = -ENOMEM;
+                goto out;
        }
        while (wr) {
                if (wr->num_sge > T3_MAX_SGE) {
                        err = -EINVAL;
-                        *bad_wr = wr;
                        break;
                }
                idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2);
@@ -494,10 +498,10 @@ int iwch_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
                                err = build_zero_stag_recv(qhp, wqe, wr);
                else
                        err = -ENOMEM;
-                if (err) {
-                        *bad_wr = wr;
+                if (err)
                        break;
-                }
                build_fw_riwrh((void *) wqe, T3_WR_RCV, T3_COMPLETION_FLAG,
                               Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2),
                               0, sizeof(struct t3_receive_wr) >> 3, T3_SOPEOP);
@@ -511,6 +515,10 @@ int iwch_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
        }
        spin_unlock_irqrestore(&qhp->lock, flag);
        ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid);
+out:
+        if (err)
+                *bad_wr = wr;
        return err;
 }
diff --git a/drivers/infiniband/hw/ehca/ehca_classes.h b/drivers/infiniband/hw/ehca/ehca_classes.h
index c825142a2fb7..0136abd50dd4 100644
--- a/drivers/infiniband/hw/ehca/ehca_classes.h
+++ b/drivers/infiniband/hw/ehca/ehca_classes.h
@@ -375,6 +375,7 @@ extern rwlock_t ehca_qp_idr_lock;
 extern rwlock_t ehca_cq_idr_lock;
 extern struct idr ehca_qp_idr;
 extern struct idr ehca_cq_idr;
+extern spinlock_t shca_list_lock;
 extern int ehca_static_rate;
 extern int ehca_port_act_time;
diff --git a/drivers/infiniband/hw/ehca/ehca_eq.c b/drivers/infiniband/hw/ehca/ehca_eq.c
index 523e733c630e..3b87589b8ea0 100644
--- a/drivers/infiniband/hw/ehca/ehca_eq.c
+++ b/drivers/infiniband/hw/ehca/ehca_eq.c
@@ -169,12 +169,15 @@ int ehca_destroy_eq(struct ehca_shca *shca, struct ehca_eq *eq)
        unsigned long flags;
        u64 h_ret;
-        spin_lock_irqsave(&eq->spinlock, flags);
        ibmebus_free_irq(eq->ist, (void *)shca);
-        h_ret = hipz_h_destroy_eq(shca->ipz_hca_handle, eq);
+        spin_lock_irqsave(&shca_list_lock, flags);
+        eq->is_initialized = 0;
+        spin_unlock_irqrestore(&shca_list_lock, flags);
-        spin_unlock_irqrestore(&eq->spinlock, flags);
+        tasklet_kill(&eq->interrupt_task);
+        h_ret = hipz_h_destroy_eq(shca->ipz_hca_handle, eq);
        if (h_ret != H_SUCCESS) {
                ehca_err(&shca->ib_device, "Can't free EQ resources.");
diff --git a/drivers/infiniband/hw/ehca/ehca_main.c b/drivers/infiniband/hw/ehca/ehca_main.c
index fb2d83c5bf01..129a6bebd6e3 100644
--- a/drivers/infiniband/hw/ehca/ehca_main.c
+++ b/drivers/infiniband/hw/ehca/ehca_main.c
@@ -123,7 +123,7 @@ DEFINE_IDR(ehca_qp_idr);
 DEFINE_IDR(ehca_cq_idr);
 static LIST_HEAD(shca_list); /* list of all registered ehcas */
-static DEFINE_SPINLOCK(shca_list_lock);
+DEFINE_SPINLOCK(shca_list_lock);
 static struct timer_list poll_eqs_timer;
diff --git a/drivers/infiniband/hw/ehca/ehca_reqs.c b/drivers/infiniband/hw/ehca/ehca_reqs.c
index 8fd88cd828fd..e3ec7fdd67bd 100644
--- a/drivers/infiniband/hw/ehca/ehca_reqs.c
+++ b/drivers/infiniband/hw/ehca/ehca_reqs.c
@@ -400,7 +400,6 @@ static inline void map_ib_wc_status(u32 cqe_status,
 static inline int post_one_send(struct ehca_qp *my_qp,
                         struct ib_send_wr *cur_send_wr,
-                         struct ib_send_wr **bad_send_wr,
                         int hidden)
 {
        struct ehca_wqe *wqe_p;
@@ -412,8 +411,6 @@ static inline int post_one_send(struct ehca_qp *my_qp,
        wqe_p = ipz_qeit_get_inc(&my_qp->ipz_squeue);
        if (unlikely(!wqe_p)) {
                /* too many posted work requests: queue overflow */
-                if (bad_send_wr)
-                        *bad_send_wr = cur_send_wr;
                ehca_err(my_qp->ib_qp.device, "Too many posted WQEs "
                         "qp_num=%x", my_qp->ib_qp.qp_num);
                return -ENOMEM;
@@ -433,8 +430,6 @@ static inline int post_one_send(struct ehca_qp *my_qp,
         */
        if (unlikely(ret)) {
                my_qp->ipz_squeue.current_q_offset = start_offset;
-                if (bad_send_wr)
-                        *bad_send_wr = cur_send_wr;
                ehca_err(my_qp->ib_qp.device, "Could not write WQE "
                         "qp_num=%x", my_qp->ib_qp.qp_num);
                return -EINVAL;
@@ -448,7 +443,6 @@ int ehca_post_send(struct ib_qp *qp,
                   struct ib_send_wr **bad_send_wr)
 {
        struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
-        struct ib_send_wr *cur_send_wr;
        int wqe_cnt = 0;
        int ret = 0;
        unsigned long flags;
@@ -457,7 +451,8 @@ int ehca_post_send(struct ib_qp *qp,
        if (unlikely(my_qp->state < IB_QPS_RTS)) {
                ehca_err(qp->device, "Invalid QP state  qp_state=%d qpn=%x",
                         my_qp->state, qp->qp_num);
-                return -EINVAL;
+                ret = -EINVAL;
+                goto out;
        }
        /* LOCK the QUEUE */
@@ -476,24 +471,21 @@ int ehca_post_send(struct ib_qp *qp,
                struct ib_send_wr circ_wr;
                memset(&circ_wr, 0, sizeof(circ_wr));
                circ_wr.opcode = IB_WR_RDMA_READ;
-                post_one_send(my_qp, &circ_wr, NULL, 1); /* ignore retcode */
+                post_one_send(my_qp, &circ_wr, 1); /* ignore retcode */
                wqe_cnt++;
                ehca_dbg(qp->device, "posted circ wr  qp_num=%x", qp->qp_num);
                my_qp->message_count = my_qp->packet_count = 0;
        }
        /* loop processes list of send reqs */
-        for (cur_send_wr = send_wr; cur_send_wr != NULL;
+        while (send_wr) {
-             cur_send_wr = cur_send_wr->next) {
+                ret = post_one_send(my_qp, send_wr, 0);
-                ret = post_one_send(my_qp, cur_send_wr, bad_send_wr, 0);
                if (unlikely(ret)) {
-                        /* if one or more WQEs were successful, don't fail */
-                        if (wqe_cnt)
-                                ret = 0;
                        goto post_send_exit0;
                }
                wqe_cnt++;
-        } /* eof for cur_send_wr */
+                send_wr = send_wr->next;
+        }
 post_send_exit0:
        iosync(); /* serialize GAL register access */
@@ -503,6 +495,10 @@ post_send_exit0:
                         my_qp, qp->qp_num, wqe_cnt, ret);
        my_qp->message_count += wqe_cnt;
        spin_unlock_irqrestore(&my_qp->spinlock_s, flags);
+out:
+        if (ret)
+                *bad_send_wr = send_wr;
        return ret;
 }
@@ -511,7 +507,6 @@ static int internal_post_recv(struct ehca_qp *my_qp,
                              struct ib_recv_wr *recv_wr,
                              struct ib_recv_wr **bad_recv_wr)
 {
-        struct ib_recv_wr *cur_recv_wr;
        struct ehca_wqe *wqe_p;
        int wqe_cnt = 0;
        int ret = 0;
@@ -522,27 +517,23 @@ static int internal_post_recv(struct ehca_qp *my_qp,
        if (unlikely(!HAS_RQ(my_qp))) {
                ehca_err(dev, "QP has no RQ  ehca_qp=%p qp_num=%x ext_type=%d",
                         my_qp, my_qp->real_qp_num, my_qp->ext_type);
-                return -ENODEV;
+                ret = -ENODEV;
+                goto out;
        }
        /* LOCK the QUEUE */
        spin_lock_irqsave(&my_qp->spinlock_r, flags);
-        /* loop processes list of send reqs */
+        /* loop processes list of recv reqs */
-        for (cur_recv_wr = recv_wr; cur_recv_wr != NULL;
+        while (recv_wr) {
-             cur_recv_wr = cur_recv_wr->next) {
                u64 start_offset = my_qp->ipz_rqueue.current_q_offset;
                /* get pointer next to free WQE */
                wqe_p = ipz_qeit_get_inc(&my_qp->ipz_rqueue);
                if (unlikely(!wqe_p)) {
                        /* too many posted work requests: queue overflow */
-                        if (bad_recv_wr)
+                        ret = -ENOMEM;
-                                *bad_recv_wr = cur_recv_wr;
+                        ehca_err(dev, "Too many posted WQEs "
-                        if (wqe_cnt == 0) {
+                                "qp_num=%x", my_qp->real_qp_num);
-                                ret = -ENOMEM;
-                                ehca_err(dev, "Too many posted WQEs "
-                                         "qp_num=%x", my_qp->real_qp_num);
-                        }
                        goto post_recv_exit0;
                }
                /*
@@ -552,7 +543,7 @@ static int internal_post_recv(struct ehca_qp *my_qp,
                rq_map_idx = start_offset / my_qp->ipz_rqueue.qe_size;
                /* write a RECV WQE into the QUEUE */
-                ret = ehca_write_rwqe(&my_qp->ipz_rqueue, wqe_p, cur_recv_wr,
+                ret = ehca_write_rwqe(&my_qp->ipz_rqueue, wqe_p, recv_wr,
                                rq_map_idx);
                /*
                 * if something failed,
@@ -560,22 +551,20 @@ static int internal_post_recv(struct ehca_qp *my_qp,
                 */
                if (unlikely(ret)) {
                        my_qp->ipz_rqueue.current_q_offset = start_offset;
-                        *bad_recv_wr = cur_recv_wr;
+                        ret = -EINVAL;
-                        if (wqe_cnt == 0) {
+                        ehca_err(dev, "Could not write WQE "
-                                ret = -EINVAL;
+                                "qp_num=%x", my_qp->real_qp_num);
-                                ehca_err(dev, "Could not write WQE "
-                                         "qp_num=%x", my_qp->real_qp_num);
-                        }
                        goto post_recv_exit0;
                }
                qmap_entry = &my_qp->rq_map.map[rq_map_idx];
-                qmap_entry->app_wr_id = get_app_wr_id(cur_recv_wr->wr_id);
+                qmap_entry->app_wr_id = get_app_wr_id(recv_wr->wr_id);
                qmap_entry->reported = 0;
                qmap_entry->cqe_req = 1;
                wqe_cnt++;
-        } /* eof for cur_recv_wr */
+                recv_wr = recv_wr->next;
+        } /* eof for recv_wr */
 post_recv_exit0:
        iosync(); /* serialize GAL register access */
@@ -584,6 +573,11 @@ post_recv_exit0:
            ehca_dbg(dev, "ehca_qp=%p qp_num=%x wqe_cnt=%d ret=%i",
                     my_qp, my_qp->real_qp_num, wqe_cnt, ret);
        spin_unlock_irqrestore(&my_qp->spinlock_r, flags);
+out:
+        if (ret)
+                *bad_recv_wr = recv_wr;
        return ret;
 }
@@ -597,6 +591,7 @@ int ehca_post_recv(struct ib_qp *qp,
        if (unlikely(my_qp->state == IB_QPS_RESET)) {
                ehca_err(qp->device, "Invalid QP state  qp_state=%d qpn=%x",
                         my_qp->state, qp->qp_num);
+                *bad_recv_wr = recv_wr;
                return -EINVAL;
        }
diff --git a/drivers/infiniband/hw/ipath/ipath_driver.c b/drivers/infiniband/hw/ipath/ipath_driver.c
index 013d1380e77c..d2787fe80304 100644
--- a/drivers/infiniband/hw/ipath/ipath_driver.c
+++ b/drivers/infiniband/hw/ipath/ipath_driver.c
@@ -39,6 +39,7 @@
 #include <linux/delay.h>
 #include <linux/netdevice.h>
 #include <linux/vmalloc.h>
+#include <linux/bitmap.h>
 #include "ipath_kernel.h"
 #include "ipath_verbs.h"
@@ -1697,7 +1698,7 @@ void ipath_chg_pioavailkernel(struct ipath_devdata *dd, unsigned start,
                              unsigned len, int avail)
 {
        unsigned long flags;
-        unsigned end, cnt = 0, next;
+        unsigned end, cnt = 0;
        /* There are two bits per send buffer (busy and generation) */
        start *= 2;
@@ -1748,12 +1749,7 @@ void ipath_chg_pioavailkernel(struct ipath_devdata *dd, unsigned start,
        if (dd->ipath_pioupd_thresh) {
                end = 2 * (dd->ipath_piobcnt2k + dd->ipath_piobcnt4k);
-                next = find_first_bit(dd->ipath_pioavailkernel, end);
+                cnt = bitmap_weight(dd->ipath_pioavailkernel, end);
-                while (next < end) {
-                        cnt++;
-                        next = find_next_bit(dd->ipath_pioavailkernel, end,
-                                        next + 1);
-                }
        }
        spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c
index 3cb3f47a10b8..e596537ff353 100644
--- a/drivers/infiniband/hw/mlx4/main.c
+++ b/drivers/infiniband/hw/mlx4/main.c
@@ -103,7 +103,7 @@ static int mlx4_ib_query_device(struct ib_device *ibdev,
                props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
        if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
                props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
-        if (dev->dev->caps.max_gso_sz)
+        if (dev->dev->caps.max_gso_sz && dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)
                props->device_cap_flags |= IB_DEVICE_UD_TSO;
        if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
                props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
diff --git a/drivers/infiniband/hw/mlx4/qp.c b/drivers/infiniband/hw/mlx4/qp.c
index 256a00c6aeea..989555cee883 100644
--- a/drivers/infiniband/hw/mlx4/qp.c
+++ b/drivers/infiniband/hw/mlx4/qp.c
@@ -54,7 +54,8 @@ enum {
        /*
         * Largest possible UD header: send with GRH and immediate data.
         */
-        MLX4_IB_UD_HEADER_SIZE          = 72
+        MLX4_IB_UD_HEADER_SIZE          = 72,
+        MLX4_IB_LSO_HEADER_SPARE        = 128,
 };
 struct mlx4_ib_sqp {
@@ -67,7 +68,8 @@ struct mlx4_ib_sqp {
 };
 enum {
-        MLX4_IB_MIN_SQ_STRIDE = 6
+        MLX4_IB_MIN_SQ_STRIDE   = 6,
+        MLX4_IB_CACHE_LINE_SIZE = 64,
 };
 static const __be32 mlx4_ib_opcode[] = {
@@ -261,7 +263,7 @@ static int send_wqe_overhead(enum ib_qp_type type, u32 flags)
        case IB_QPT_UD:
                return sizeof (struct mlx4_wqe_ctrl_seg) +
                        sizeof (struct mlx4_wqe_datagram_seg) +
-                        ((flags & MLX4_IB_QP_LSO) ? 64 : 0);
+                        ((flags & MLX4_IB_QP_LSO) ? MLX4_IB_LSO_HEADER_SPARE : 0);
        case IB_QPT_UC:
                return sizeof (struct mlx4_wqe_ctrl_seg) +
                        sizeof (struct mlx4_wqe_raddr_seg);
@@ -897,7 +899,6 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp,
        context->flags = cpu_to_be32((to_mlx4_state(new_state) << 28) |
                                     (to_mlx4_st(ibqp->qp_type) << 16));
-        context->flags     |= cpu_to_be32(1 << 8); /* DE? */
        if (!(attr_mask & IB_QP_PATH_MIG_STATE))
                context->flags |= cpu_to_be32(MLX4_QP_PM_MIGRATED << 11);
@@ -1467,16 +1468,12 @@ static void __set_data_seg(struct mlx4_wqe_data_seg *dseg, struct ib_sge *sg)
 static int build_lso_seg(struct mlx4_wqe_lso_seg *wqe, struct ib_send_wr *wr,
                         struct mlx4_ib_qp *qp, unsigned *lso_seg_len,
-                         __be32 *lso_hdr_sz)
+                         __be32 *lso_hdr_sz, __be32 *blh)
 {
        unsigned halign = ALIGN(sizeof *wqe + wr->wr.ud.hlen, 16);
-        /*
+        if (unlikely(halign > MLX4_IB_CACHE_LINE_SIZE))
-         * This is a temporary limitation and will be removed in
+                *blh = cpu_to_be32(1 << 6);
-         * a forthcoming FW release:
-         */
-        if (unlikely(halign > 64))
-                return -EINVAL;
        if (unlikely(!(qp->flags & MLX4_IB_QP_LSO) &&
                     wr->num_sge > qp->sq.max_gs - (halign >> 4)))
@@ -1522,6 +1519,7 @@ int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
        __be32 dummy;
        __be32 *lso_wqe;
        __be32 uninitialized_var(lso_hdr_sz);
+        __be32 blh;
        int i;
        spin_lock_irqsave(&qp->sq.lock, flags);
@@ -1530,6 +1528,7 @@ int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
        for (nreq = 0; wr; ++nreq, wr = wr->next) {
                lso_wqe = &dummy;
+                blh = 0;
                if (mlx4_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq)) {
                        err = -ENOMEM;
@@ -1616,7 +1615,7 @@ int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
                        size += sizeof (struct mlx4_wqe_datagram_seg) / 16;
                        if (wr->opcode == IB_WR_LSO) {
-                                err = build_lso_seg(wqe, wr, qp, &seglen, &lso_hdr_sz);
+                                err = build_lso_seg(wqe, wr, qp, &seglen, &lso_hdr_sz, &blh);
                                if (unlikely(err)) {
                                        *bad_wr = wr;
                                        goto out;
@@ -1687,7 +1686,7 @@ int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
                }
                ctrl->owner_opcode = mlx4_ib_opcode[wr->opcode] |
-                        (ind & qp->sq.wqe_cnt ? cpu_to_be32(1 << 31) : 0);
+                        (ind & qp->sq.wqe_cnt ? cpu_to_be32(1 << 31) : 0) | blh;
                stamp = ind + qp->sq_spare_wqes;
                ind += DIV_ROUND_UP(size * 16, 1U << qp->sq.wqe_shift);
diff --git a/drivers/infiniband/hw/nes/Kconfig b/drivers/infiniband/hw/nes/Kconfig
index d449eb6ec78e..846dc97cf260 100644
--- a/drivers/infiniband/hw/nes/Kconfig
+++ b/drivers/infiniband/hw/nes/Kconfig
@@ -4,14 +4,13 @@ config INFINIBAND_NES
        select LIBCRC32C
        select INET_LRO
        ---help---
-          This is a low-level driver for NetEffect RDMA enabled
+          This is the RDMA Network Interface Card (RNIC) driver for
-          Network Interface Cards (RNIC).
+          NetEffect Ethernet Cluster Server Adapters.
 config INFINIBAND_NES_DEBUG
        bool "Verbose debugging output"
        depends on INFINIBAND_NES
        default n
        ---help---
-          This option causes the NetEffect RNIC driver to produce debug
+          This option enables debug messages from the NetEffect RNIC
-          messages.  Select this if you are developing the driver
+          driver.  Select this if you are diagnosing a problem.
-          or trying to diagnose a problem.
diff --git a/drivers/infiniband/hw/nes/nes.c b/drivers/infiniband/hw/nes/nes.c
index cbde0cfe27e0..b9d09bafd6c1 100644
--- a/drivers/infiniband/hw/nes/nes.c
+++ b/drivers/infiniband/hw/nes/nes.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006 - 2009 Intel-NE, Inc.  All rights reserved.
+ * Copyright (c) 2006 - 2009 Intel Corporation.  All rights reserved.
 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
 *
 * This software is available to you under a choice of one of two
@@ -521,7 +521,8 @@ static int __devinit nes_probe(struct pci_dev *pcidev, const struct pci_device_i
        spin_lock_init(&nesdev->indexed_regs_lock);
        /* Remap the PCI registers in adapter BAR0 to kernel VA space */
-        mmio_regs = ioremap_nocache(pci_resource_start(pcidev, BAR_0), sizeof(mmio_regs));
+        mmio_regs = ioremap_nocache(pci_resource_start(pcidev, BAR_0),
+                                    pci_resource_len(pcidev, BAR_0));
        if (mmio_regs == NULL) {
                printk(KERN_ERR PFX "Unable to remap BAR0\n");
                ret = -EIO;
diff --git a/drivers/infiniband/hw/nes/nes.h b/drivers/infiniband/hw/nes/nes.h
index bcc6abc4faff..98840564bb2f 100644
--- a/drivers/infiniband/hw/nes/nes.h
+++ b/drivers/infiniband/hw/nes/nes.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006 - 2009 Intel-NE, Inc.  All rights reserved.
+ * Copyright (c) 2006 - 2009 Intel Corporation.  All rights reserved.
 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
 *
 * This software is available to you under a choice of one of two
diff --git a/drivers/infiniband/hw/nes/nes_cm.c b/drivers/infiniband/hw/nes/nes_cm.c
index 73473db19863..39468c277036 100644
--- a/drivers/infiniband/hw/nes/nes_cm.c
+++ b/drivers/infiniband/hw/nes/nes_cm.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006 - 2009 Intel-NE, Inc.  All rights reserved.
+ * Copyright (c) 2006 - 2009 Intel Corporation.  All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
@@ -52,6 +52,7 @@
 #include <linux/random.h>
 #include <linux/list.h>
 #include <linux/threads.h>
+#include <linux/highmem.h>
 #include <net/arp.h>
 #include <net/neighbour.h>
 #include <net/route.h>
@@ -251,6 +252,33 @@ static int parse_mpa(struct nes_cm_node *cm_node, u8 *buffer, u32 *type,
        mpa_frame = (struct ietf_mpa_frame *)buffer;
        cm_node->mpa_frame_size = ntohs(mpa_frame->priv_data_len);
+        /* make sure mpa private data len is less than 512 bytes */
+        if (cm_node->mpa_frame_size > IETF_MAX_PRIV_DATA_LEN) {
+                nes_debug(NES_DBG_CM, "The received Length of Private"
+                        " Data field exceeds 512 octets\n");
+                return -EINVAL;
+        }
+        /*
+         * make sure MPA receiver interoperate with the
+         * received MPA version and MPA key information
+         *
+         */
+        if (mpa_frame->rev != mpa_version) {
+                nes_debug(NES_DBG_CM, "The received mpa version"
+                                " can not be interoperated\n");
+                return -EINVAL;
+        }
+        if (cm_node->state != NES_CM_STATE_MPAREQ_SENT) {
+                if (memcmp(mpa_frame->key, IEFT_MPA_KEY_REQ, IETF_MPA_KEY_SIZE)) {
+                        nes_debug(NES_DBG_CM, "Unexpected MPA Key received \n");
+                        return -EINVAL;
+                }
+        } else {
+                if (memcmp(mpa_frame->key, IEFT_MPA_KEY_REP, IETF_MPA_KEY_SIZE)) {
+                        nes_debug(NES_DBG_CM, "Unexpected MPA Key received \n");
+                        return -EINVAL;
+                }
+        }
        if (cm_node->mpa_frame_size + sizeof(struct ietf_mpa_frame) != len) {
                nes_debug(NES_DBG_CM, "The received ietf buffer was not right"
@@ -486,6 +514,8 @@ static void nes_retrans_expired(struct nes_cm_node *cm_node)
                send_reset(cm_node, NULL);
                break;
        default:
+                add_ref_cm_node(cm_node);
+                send_reset(cm_node, NULL);
                create_event(cm_node, NES_CM_EVENT_ABORTED);
        }
 }
@@ -949,6 +979,7 @@ static int mini_cm_dec_refcnt_listen(struct nes_cm_core *cm_core,
                                reset_entry);
                {
                        struct nes_cm_node *loopback = cm_node->loopbackpartner;
+                        enum nes_cm_node_state old_state;
                        if (NES_CM_STATE_FIN_WAIT1 <= cm_node->state) {
                                rem_ref_cm_node(cm_node->cm_core, cm_node);
                        } else {
@@ -960,11 +991,12 @@ static int mini_cm_dec_refcnt_listen(struct nes_cm_core *cm_core,
                                                         NES_CM_STATE_CLOSED;
                                                WARN_ON(1);
                                        } else {
-                                                cm_node->state =
+                                                old_state = cm_node->state;
-                                                        NES_CM_STATE_CLOSED;
+                                                cm_node->state = NES_CM_STATE_LISTENER_DESTROYED;
-                                                rem_ref_cm_node(
+                                                if (old_state != NES_CM_STATE_MPAREQ_RCVD)
-                                                        cm_node->cm_core,
+                                                        rem_ref_cm_node(
-                                                        cm_node);
+                                                                cm_node->cm_core,
+                                                                cm_node);
                                        }
                                } else {
                                        struct nes_cm_event event;
@@ -980,20 +1012,9 @@ static int mini_cm_dec_refcnt_listen(struct nes_cm_core *cm_core,
                                                         loopback->loc_port;
                                        event.cm_info.cm_id = loopback->cm_id;
                                        cm_event_connect_error(&event);
+                                        cm_node->state = NES_CM_STATE_LISTENER_DESTROYED;
                                        loopback->state = NES_CM_STATE_CLOSED;
-                                        event.cm_node = cm_node;
-                                        event.cm_info.rem_addr =
-                                                         cm_node->rem_addr;
-                                        event.cm_info.loc_addr =
-                                                         cm_node->loc_addr;
-                                        event.cm_info.rem_port =
-                                                         cm_node->rem_port;
-                                        event.cm_info.loc_port =
-                                                         cm_node->loc_port;
-                                        event.cm_info.cm_id = cm_node->cm_id;
-                                        cm_event_reset(&event);
                                        rem_ref_cm_node(cm_node->cm_core,
                                                         cm_node);
@@ -1077,12 +1098,13 @@ static inline int mini_cm_accelerated(struct nes_cm_core *cm_core,
 /**
 * nes_addr_resolve_neigh
 */
-static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip)
+static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip, int arpindex)
 {
        struct rtable *rt;
        struct flowi fl;
        struct neighbour *neigh;
-        int rc = -1;
+        int rc = arpindex;
+        struct nes_adapter *nesadapter = nesvnic->nesdev->nesadapter;
        memset(&fl, 0, sizeof fl);
        fl.nl_u.ip4_u.daddr = htonl(dst_ip);
@@ -1098,6 +1120,21 @@ static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip)
                        nes_debug(NES_DBG_CM, "Neighbor MAC address for 0x%08X"
                                  " is %pM, Gateway is 0x%08X \n", dst_ip,
                                  neigh->ha, ntohl(rt->rt_gateway));
+                        if (arpindex >= 0) {
+                                if (!memcmp(nesadapter->arp_table[arpindex].mac_addr,
+                                                        neigh->ha, ETH_ALEN)){
+                                        /* Mac address same as in nes_arp_table */
+                                        neigh_release(neigh);
+                                        ip_rt_put(rt);
+                                        return rc;
+                                }
+                                nes_manage_arp_cache(nesvnic->netdev,
+                                                nesadapter->arp_table[arpindex].mac_addr,
+                                                dst_ip, NES_ARP_DELETE);
+                        }
                        nes_manage_arp_cache(nesvnic->netdev, neigh->ha,
                                             dst_ip, NES_ARP_ADD);
                        rc = nes_arp_table(nesvnic->nesdev, dst_ip, NULL,
@@ -1113,7 +1150,6 @@ static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip)
        return rc;
 }
 /**
 * make_cm_node - create a new instance of a cm node
 */
@@ -1123,6 +1159,7 @@ static struct nes_cm_node *make_cm_node(struct nes_cm_core *cm_core,
 {
        struct nes_cm_node *cm_node;
        struct timespec ts;
+        int oldarpindex = 0;
        int arpindex = 0;
        struct nes_device *nesdev;
        struct nes_adapter *nesadapter;
@@ -1176,17 +1213,18 @@ static struct nes_cm_node *make_cm_node(struct nes_cm_core *cm_core,
        nesadapter = nesdev->nesadapter;
        cm_node->loopbackpartner = NULL;
        /* get the mac addr for the remote node */
        if (ipv4_is_loopback(htonl(cm_node->rem_addr)))
                arpindex = nes_arp_table(nesdev, ntohl(nesvnic->local_ipaddr), NULL, NES_ARP_RESOLVE);
-        else
+        else {
-                arpindex = nes_arp_table(nesdev, cm_node->rem_addr, NULL, NES_ARP_RESOLVE);
+                oldarpindex = nes_arp_table(nesdev, cm_node->rem_addr, NULL, NES_ARP_RESOLVE);
+                arpindex = nes_addr_resolve_neigh(nesvnic, cm_info->rem_addr, oldarpindex);
+        }
        if (arpindex < 0) {
-                arpindex = nes_addr_resolve_neigh(nesvnic, cm_info->rem_addr);
+                kfree(cm_node);
-                if (arpindex < 0) {
+                return NULL;
-                        kfree(cm_node);
-                        return NULL;
-                }
        }
        /* copy the mac addr to node context */
@@ -1333,13 +1371,20 @@ static void handle_fin_pkt(struct nes_cm_node *cm_node)
        case NES_CM_STATE_SYN_RCVD:
        case NES_CM_STATE_SYN_SENT:
        case NES_CM_STATE_ESTABLISHED:
-        case NES_CM_STATE_MPAREQ_SENT:
        case NES_CM_STATE_MPAREJ_RCVD:
                cm_node->tcp_cntxt.rcv_nxt++;
                cleanup_retrans_entry(cm_node);
                cm_node->state = NES_CM_STATE_LAST_ACK;
                send_fin(cm_node, NULL);
                break;
+        case NES_CM_STATE_MPAREQ_SENT:
+                create_event(cm_node, NES_CM_EVENT_ABORTED);
+                cm_node->tcp_cntxt.rcv_nxt++;
+                cleanup_retrans_entry(cm_node);
+                cm_node->state = NES_CM_STATE_CLOSED;
+                add_ref_cm_node(cm_node);
+                send_reset(cm_node, NULL);
+                break;
        case NES_CM_STATE_FIN_WAIT1:
                cm_node->tcp_cntxt.rcv_nxt++;
                cleanup_retrans_entry(cm_node);
@@ -1590,6 +1635,7 @@ static void handle_syn_pkt(struct nes_cm_node *cm_node, struct sk_buff *skb,
                break;
        case NES_CM_STATE_CLOSED:
                cleanup_retrans_entry(cm_node);
+                add_ref_cm_node(cm_node);
                send_reset(cm_node, skb);
                break;
        case NES_CM_STATE_TSA:
@@ -1641,9 +1687,15 @@ static void handle_synack_pkt(struct nes_cm_node *cm_node, struct sk_buff *skb,
                passive_open_err(cm_node, skb, 1);
                break;
        case NES_CM_STATE_LISTENING:
+                cm_node->tcp_cntxt.loc_seq_num = ntohl(tcph->ack_seq);
+                cleanup_retrans_entry(cm_node);
+                cm_node->state = NES_CM_STATE_CLOSED;
+                send_reset(cm_node, skb);
+                break;
        case NES_CM_STATE_CLOSED:
                cm_node->tcp_cntxt.loc_seq_num = ntohl(tcph->ack_seq);
                cleanup_retrans_entry(cm_node);
+                add_ref_cm_node(cm_node);
                send_reset(cm_node, skb);
                break;
        case NES_CM_STATE_ESTABLISHED:
@@ -1712,8 +1764,13 @@ static int handle_ack_pkt(struct nes_cm_node *cm_node, struct sk_buff *skb,
                        dev_kfree_skb_any(skb);
                break;
        case NES_CM_STATE_LISTENING:
+                cleanup_retrans_entry(cm_node);
+                cm_node->state = NES_CM_STATE_CLOSED;
+                send_reset(cm_node, skb);
+                break;
        case NES_CM_STATE_CLOSED:
                cleanup_retrans_entry(cm_node);
+                add_ref_cm_node(cm_node);
                send_reset(cm_node, skb);
                break;
        case NES_CM_STATE_LAST_ACK:
@@ -1974,7 +2031,7 @@ static struct nes_cm_node *mini_cm_connect(struct nes_cm_core *cm_core,
        if (!cm_node)
                return NULL;
        mpa_frame = &cm_node->mpa_frame;
-        strcpy(mpa_frame->key, IEFT_MPA_KEY_REQ);
+        memcpy(mpa_frame->key, IEFT_MPA_KEY_REQ, IETF_MPA_KEY_SIZE);
        mpa_frame->flags = IETF_MPA_FLAGS_CRC;
        mpa_frame->rev =  IETF_MPA_VERSION;
        mpa_frame->priv_data_len = htons(private_data_len);
@@ -2102,30 +2159,39 @@ static int mini_cm_reject(struct nes_cm_core *cm_core,
                        cm_node->state = NES_CM_STATE_CLOSED;
                        rem_ref_cm_node(cm_core, cm_node);
                } else {
-                        ret = send_mpa_reject(cm_node);
+                        if (cm_node->state == NES_CM_STATE_LISTENER_DESTROYED) {
-                        if (ret) {
+                                rem_ref_cm_node(cm_core, cm_node);
-                                cm_node->state = NES_CM_STATE_CLOSED;
+                        } else {
-                                err = send_reset(cm_node, NULL);
+                                ret = send_mpa_reject(cm_node);
-                                if (err)
+                                if (ret) {
-                                        WARN_ON(1);
+                                        cm_node->state = NES_CM_STATE_CLOSED;
-                        } else
+                                        err = send_reset(cm_node, NULL);
-                                cm_id->add_ref(cm_id);
+                                        if (err)
+                                                WARN_ON(1);
+                                } else
+                                        cm_id->add_ref(cm_id);
+                        }
                }
        } else {
                cm_node->cm_id = NULL;
-                event.cm_node = loopback;
+                if (cm_node->state == NES_CM_STATE_LISTENER_DESTROYED) {
-                event.cm_info.rem_addr = loopback->rem_addr;
+                        rem_ref_cm_node(cm_core, cm_node);
-                event.cm_info.loc_addr = loopback->loc_addr;
+                        rem_ref_cm_node(cm_core, loopback);
-                event.cm_info.rem_port = loopback->rem_port;
+                } else {
-                event.cm_info.loc_port = loopback->loc_port;
+                        event.cm_node = loopback;
-                event.cm_info.cm_id = loopback->cm_id;
+                        event.cm_info.rem_addr = loopback->rem_addr;
-                cm_event_mpa_reject(&event);
+                        event.cm_info.loc_addr = loopback->loc_addr;
-                rem_ref_cm_node(cm_core, cm_node);
+                        event.cm_info.rem_port = loopback->rem_port;
-                loopback->state = NES_CM_STATE_CLOSING;
+                        event.cm_info.loc_port = loopback->loc_port;
+                        event.cm_info.cm_id = loopback->cm_id;
+                        cm_event_mpa_reject(&event);
+                        rem_ref_cm_node(cm_core, cm_node);
+                        loopback->state = NES_CM_STATE_CLOSING;
-                cm_id = loopback->cm_id;
+                        cm_id = loopback->cm_id;
-                rem_ref_cm_node(cm_core, loopback);
+                        rem_ref_cm_node(cm_core, loopback);
-                cm_id->rem_ref(cm_id);
+                        cm_id->rem_ref(cm_id);
+                }
        }
        return ret;
@@ -2164,11 +2230,15 @@ static int mini_cm_close(struct nes_cm_core *cm_core, struct nes_cm_node *cm_nod
        case NES_CM_STATE_CLOSING:
                ret = -1;
                break;
-        case NES_CM_STATE_MPAREJ_RCVD:
        case NES_CM_STATE_LISTENING:
+                cleanup_retrans_entry(cm_node);
+                send_reset(cm_node, NULL);
+                break;
+        case NES_CM_STATE_MPAREJ_RCVD:
        case NES_CM_STATE_UNKNOWN:
        case NES_CM_STATE_INITED:
        case NES_CM_STATE_CLOSED:
+        case NES_CM_STATE_LISTENER_DESTROYED:
                ret = rem_ref_cm_node(cm_core, cm_node);
                break;
        case NES_CM_STATE_TSA:
@@ -2687,8 +2757,6 @@ int nes_accept(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
        struct nes_pd *nespd;
        u64 tagged_offset;
        ibqp = nes_get_qp(cm_id->device, conn_param->qpn);
        if (!ibqp)
                return -EINVAL;
@@ -2704,6 +2772,13 @@ int nes_accept(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
                "%s\n", cm_node, nesvnic, nesvnic->netdev,
                nesvnic->netdev->name);
+        if (NES_CM_STATE_LISTENER_DESTROYED == cm_node->state) {
+                if (cm_node->loopbackpartner)
+                        rem_ref_cm_node(cm_node->cm_core, cm_node->loopbackpartner);
+                rem_ref_cm_node(cm_node->cm_core, cm_node);
+                return -EINVAL;
+        }
        /* associate the node with the QP */
        nesqp->cm_node = (void *)cm_node;
        cm_node->nesqp = nesqp;
@@ -2786,6 +2861,10 @@ int nes_accept(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
                        cpu_to_le32(conn_param->private_data_len +
                        sizeof(struct ietf_mpa_frame));
                wqe->wqe_words[NES_IWARP_SQ_WQE_STAG0_IDX] = ibmr->lkey;
+                if (nesqp->sq_kmapped) {
+                        nesqp->sq_kmapped = 0;
+                        kunmap(nesqp->page);
+                }
                nesqp->nesqp_context->ird_ord_sizes |=
                        cpu_to_le32(NES_QPCONTEXT_ORDIRD_LSMM_PRESENT |
@@ -2929,7 +3008,7 @@ int nes_reject(struct iw_cm_id *cm_id, const void *pdata, u8 pdata_len)
        if (cm_node->mpa_frame_size > MAX_CM_BUFFER)
                return -EINVAL;
-        strcpy(&cm_node->mpa_frame.key[0], IEFT_MPA_KEY_REP);
+        memcpy(&cm_node->mpa_frame.key[0], IEFT_MPA_KEY_REP, IETF_MPA_KEY_SIZE);
        if (loopback) {
                memcpy(&loopback->mpa_frame.priv_data, pdata, pdata_len);
                loopback->mpa_frame.priv_data_len = pdata_len;
@@ -2974,6 +3053,9 @@ int nes_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
        if (!nesdev)
                return -EINVAL;
+        if (!(cm_id->local_addr.sin_port) || !(cm_id->remote_addr.sin_port))
+                return -EINVAL;
        nes_debug(NES_DBG_CM, "QP%u, current IP = 0x%08X, Destination IP = "
                "0x%08X:0x%04X, local = 0x%08X:0x%04X.\n", nesqp->hwqp.qp_id,
                ntohl(nesvnic->local_ipaddr),
@@ -3251,6 +3333,11 @@ static void cm_event_connected(struct nes_cm_event *event)
                wqe->wqe_words[NES_IWARP_SQ_WQE_LENGTH0_IDX] = 0;
                wqe->wqe_words[NES_IWARP_SQ_WQE_STAG0_IDX] = 0;
+                if (nesqp->sq_kmapped) {
+                        nesqp->sq_kmapped = 0;
+                        kunmap(nesqp->page);
+                }
                /* use the reserved spot on the WQ for the extra first WQE */
                nesqp->nesqp_context->ird_ord_sizes &=
                        cpu_to_le32(~(NES_QPCONTEXT_ORDIRD_LSMM_PRESENT |
@@ -3346,7 +3433,7 @@ static void cm_event_connect_error(struct nes_cm_event *event)
        nesqp->cm_id = NULL;
        cm_id->provider_data = NULL;
        cm_event.event = IW_CM_EVENT_CONNECT_REPLY;
-        cm_event.status = IW_CM_EVENT_STATUS_REJECTED;
+        cm_event.status = -ECONNRESET;
        cm_event.provider_data = cm_id->provider_data;
        cm_event.local_addr = cm_id->local_addr;
        cm_event.remote_addr = cm_id->remote_addr;
@@ -3390,6 +3477,8 @@ static void cm_event_reset(struct nes_cm_event *event)
        nes_debug(NES_DBG_CM, "%p - cm_id = %p\n", event->cm_node, cm_id);
        nesqp = cm_id->provider_data;
+        if (!nesqp)
+                return;
        nesqp->cm_id = NULL;
        /* cm_id->provider_data = NULL; */
@@ -3401,8 +3490,8 @@ static void cm_event_reset(struct nes_cm_event *event)
        cm_event.private_data = NULL;
        cm_event.private_data_len = 0;
-        ret = cm_id->event_handler(cm_id, &cm_event);
        cm_id->add_ref(cm_id);
+        ret = cm_id->event_handler(cm_id, &cm_event);
        atomic_inc(&cm_closes);
        cm_event.event = IW_CM_EVENT_CLOSE;
        cm_event.status = IW_CM_EVENT_STATUS_OK;
diff --git a/drivers/infiniband/hw/nes/nes_cm.h b/drivers/infiniband/hw/nes/nes_cm.h
index 90e8e4d8a5ce..d9825fda70a1 100644
--- a/drivers/infiniband/hw/nes/nes_cm.h
+++ b/drivers/infiniband/hw/nes/nes_cm.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006 - 2009 Intel-NE, Inc.  All rights reserved.
+ * Copyright (c) 2006 - 2009 Intel Corporation.  All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
@@ -47,6 +47,8 @@
 #define IEFT_MPA_KEY_REP  "MPA ID Rep Frame"
 #define IETF_MPA_KEY_SIZE 16
 #define IETF_MPA_VERSION  1
+#define IETF_MAX_PRIV_DATA_LEN 512
+#define IETF_MPA_FRAME_SIZE     20
 enum ietf_mpa_flags {
        IETF_MPA_FLAGS_MARKERS = 0x80,  /* receive Markers */
@@ -169,7 +171,7 @@ struct nes_timer_entry {
 #define NES_CM_DEF_SEQ2      0x18ed5740
 #define NES_CM_DEF_LOCAL_ID2 0xb807
-#define MAX_CM_BUFFER   512
+#define MAX_CM_BUFFER   (IETF_MPA_FRAME_SIZE + IETF_MAX_PRIV_DATA_LEN)
 typedef u32 nes_addr_t;
@@ -198,6 +200,7 @@ enum nes_cm_node_state {
        NES_CM_STATE_TIME_WAIT,
        NES_CM_STATE_LAST_ACK,
        NES_CM_STATE_CLOSING,
+        NES_CM_STATE_LISTENER_DESTROYED,
        NES_CM_STATE_CLOSED
 };
diff --git a/drivers/infiniband/hw/nes/nes_context.h b/drivers/infiniband/hw/nes/nes_context.h
index 0fb8d81d9a62..b4393a16099d 100644
--- a/drivers/infiniband/hw/nes/nes_context.h
+++ b/drivers/infiniband/hw/nes/nes_context.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006 - 2009 Intel-NE, Inc.  All rights reserved.
+ * Copyright (c) 2006 - 2009 Intel Corporation.  All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
diff --git a/drivers/infiniband/hw/nes/nes_hw.c b/drivers/infiniband/hw/nes/nes_hw.c
index 3512d6de3019..b1c2cbb88f09 100644
--- a/drivers/infiniband/hw/nes/nes_hw.c
+++ b/drivers/infiniband/hw/nes/nes_hw.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006 - 2009 Intel-NE, Inc.  All rights reserved.
+ * Copyright (c) 2006 - 2009 Intel Corporation.  All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
@@ -424,8 +424,9 @@ struct nes_adapter *nes_init_adapter(struct nes_device *nesdev, u8 hw_rev) {
        nesadapter->base_pd = 1;
-        nesadapter->device_cap_flags =
+        nesadapter->device_cap_flags = IB_DEVICE_LOCAL_DMA_LKEY |
-                IB_DEVICE_LOCAL_DMA_LKEY | IB_DEVICE_MEM_WINDOW;
+                                       IB_DEVICE_MEM_WINDOW |
+                                       IB_DEVICE_MEM_MGT_EXTENSIONS;
        nesadapter->allocated_qps = (unsigned long *)&(((unsigned char *)nesadapter)
                        [(sizeof(struct nes_adapter)+(sizeof(unsigned long)-1))&(~(sizeof(unsigned long)-1))]);
@@ -436,11 +437,12 @@ struct nes_adapter *nes_init_adapter(struct nes_device *nesdev, u8 hw_rev) {
        nesadapter->qp_table = (struct nes_qp **)(&nesadapter->allocated_arps[BITS_TO_LONGS(arp_table_size)]);
-        /* mark the usual suspect QPs and CQs as in use */
+        /* mark the usual suspect QPs, MR and CQs as in use */
        for (u32temp = 0; u32temp < NES_FIRST_QPN; u32temp++) {
                set_bit(u32temp, nesadapter->allocated_qps);
                set_bit(u32temp, nesadapter->allocated_cqs);
        }
+        set_bit(0, nesadapter->allocated_mrs);
        for (u32temp = 0; u32temp < 20; u32temp++)
                set_bit(u32temp, nesadapter->allocated_pds);
@@ -481,7 +483,7 @@ struct nes_adapter *nes_init_adapter(struct nes_device *nesdev, u8 hw_rev) {
        nesadapter->max_irrq_wr = (u32temp >> 16) & 3;
        nesadapter->max_sge = 4;
-        nesadapter->max_cqe = 32767;
+        nesadapter->max_cqe = 32766;
        if (nes_read_eeprom_values(nesdev, nesadapter)) {
                printk(KERN_ERR PFX "Unable to read EEPROM data.\n");
@@ -1355,6 +1357,8 @@ int nes_init_phy(struct nes_device *nesdev)
        }
        if ((phy_type == NES_PHY_TYPE_ARGUS) ||
            (phy_type == NES_PHY_TYPE_SFP_D)) {
+                u32 first_time = 1;
                /* Check firmware heartbeat */
                nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7ee);
                temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
@@ -1362,8 +1366,13 @@ int nes_init_phy(struct nes_device *nesdev)
                nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7ee);
                temp_phy_data2 = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
-                if (temp_phy_data != temp_phy_data2)
+                if (temp_phy_data != temp_phy_data2) {
-                        return 0;
+                        nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7fd);
+                        temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
+                        if ((temp_phy_data & 0xff) > 0x20)
+                                return 0;
+                        printk(PFX "Reinitializing PHY\n");
+                }
                /* no heartbeat, configure the PHY */
                nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0x0000, 0x8000);
@@ -1399,7 +1408,7 @@ int nes_init_phy(struct nes_device *nesdev)
                temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
                do {
                        if (counter++ > 150) {
-                                nes_debug(NES_DBG_PHY, "No PHY heartbeat\n");
+                                printk(PFX "No PHY heartbeat\n");
                                break;
                        }
                        mdelay(1);
@@ -1413,11 +1422,20 @@ int nes_init_phy(struct nes_device *nesdev)
                        nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7fd);
                        temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
                        if (counter++ > 300) {
-                                nes_debug(NES_DBG_PHY, "PHY did not track\n");
+                                if (((temp_phy_data & 0xff) == 0x0) && first_time) {
-                                break;
+                                        first_time = 0;
+                                        counter = 0;
+                                        /* reset AMCC PHY and try again */
+                                        nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0xe854, 0x00c0);
+                                        nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0xe854, 0x0040);
+                                        continue;
+                                } else {
+                                        printk(PFX "PHY did not track\n");
+                                        break;
+                                }
                        }
                        mdelay(10);
-                } while (((temp_phy_data & 0xff) != 0x50) && ((temp_phy_data & 0xff) != 0x70));
+                } while ((temp_phy_data & 0xff) < 0x30);
                /* setup signal integrity */
                nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xd003, 0x0000);
diff --git a/drivers/infiniband/hw/nes/nes_hw.h b/drivers/infiniband/hw/nes/nes_hw.h
index f28a41ba9fa1..084be0ee689b 100644
--- a/drivers/infiniband/hw/nes/nes_hw.h
+++ b/drivers/infiniband/hw/nes/nes_hw.h
@@ -1,5 +1,5 @@
 /*
-* Copyright (c) 2006 - 2009 Intel-NE, Inc.  All rights reserved.
+* Copyright (c) 2006 - 2009 Intel Corporation.  All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
@@ -546,11 +546,23 @@ enum nes_iwarp_sq_fmr_wqe_word_idx {
        NES_IWARP_SQ_FMR_WQE_PBL_LENGTH_IDX = 14,
 };
+enum nes_iwarp_sq_fmr_opcodes {
+        NES_IWARP_SQ_FMR_WQE_ZERO_BASED                 = (1<<6),
+        NES_IWARP_SQ_FMR_WQE_PAGE_SIZE_4K               = (0<<7),
+        NES_IWARP_SQ_FMR_WQE_PAGE_SIZE_2M               = (1<<7),
+        NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_LOCAL_READ   = (1<<16),
+        NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_LOCAL_WRITE  = (1<<17),
+        NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_REMOTE_READ  = (1<<18),
+        NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_REMOTE_WRITE = (1<<19),
+        NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_WINDOW_BIND  = (1<<20),
+};
+#define NES_IWARP_SQ_FMR_WQE_MR_LENGTH_HIGH_MASK        0xFF;
 enum nes_iwarp_sq_locinv_wqe_word_idx {
        NES_IWARP_SQ_LOCINV_WQE_INV_STAG_IDX = 6,
 };
 enum nes_iwarp_rq_wqe_word_idx {
        NES_IWARP_RQ_WQE_TOTAL_PAYLOAD_IDX = 1,
        NES_IWARP_RQ_WQE_COMP_CTX_LOW_IDX = 2,
@@ -1153,6 +1165,19 @@ struct nes_pbl {
        /* TODO: need to add list for two level tables */
 };
+#define NES_4K_PBL_CHUNK_SIZE   4096
+struct nes_fast_mr_wqe_pbl {
+        u64             *kva;
+        dma_addr_t      paddr;
+};
+struct nes_ib_fast_reg_page_list {
+        struct ib_fast_reg_page_list    ibfrpl;
+        struct nes_fast_mr_wqe_pbl      nes_wqe_pbl;
+        u64                             pbl;
+};
 struct nes_listener {
        struct work_struct      work;
        struct workqueue_struct *wq;
diff --git a/drivers/infiniband/hw/nes/nes_nic.c b/drivers/infiniband/hw/nes/nes_nic.c
index de18fdfdadf2..ab1102780186 100644
--- a/drivers/infiniband/hw/nes/nes_nic.c
+++ b/drivers/infiniband/hw/nes/nes_nic.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006 - 2009 Intel-NE, Inc.  All rights reserved.
+ * Copyright (c) 2006 - 2009 Intel Corporation.  All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
diff --git a/drivers/infiniband/hw/nes/nes_user.h b/drivers/infiniband/hw/nes/nes_user.h
index cc90c14b49eb..71e133ab209b 100644
--- a/drivers/infiniband/hw/nes/nes_user.h
+++ b/drivers/infiniband/hw/nes/nes_user.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006 - 2009 Intel-NE, Inc.  All rights reserved.
+ * Copyright (c) 2006 - 2009 Intel Corporation.  All rights reserved.
 * Copyright (c) 2005 Topspin Communications.  All rights reserved.
 * Copyright (c) 2005 Cisco Systems.  All rights reserved.
 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
@@ -86,6 +86,7 @@ enum iwnes_memreg_type {
        IWNES_MEMREG_TYPE_CQ = 0x0002,
        IWNES_MEMREG_TYPE_MW = 0x0003,
        IWNES_MEMREG_TYPE_FMR = 0x0004,
+        IWNES_MEMREG_TYPE_FMEM = 0x0005,
 };
 struct nes_mem_reg_req {
diff --git a/drivers/infiniband/hw/nes/nes_utils.c b/drivers/infiniband/hw/nes/nes_utils.c
index 9687c397ce1a..729d525c5b70 100644
--- a/drivers/infiniband/hw/nes/nes_utils.c
+++ b/drivers/infiniband/hw/nes/nes_utils.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006 - 2009 Intel-NE, Inc.  All rights reserved.
+ * Copyright (c) 2006 - 2009 Intel Corporation.  All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
diff --git a/drivers/infiniband/hw/nes/nes_verbs.c b/drivers/infiniband/hw/nes/nes_verbs.c
index a680c42d6e8c..64d3136e3747 100644
--- a/drivers/infiniband/hw/nes/nes_verbs.c
+++ b/drivers/infiniband/hw/nes/nes_verbs.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006 - 2009 Intel-NE, Inc.  All rights reserved.
+ * Copyright (c) 2006 - 2009 Intel Corporation.  All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
@@ -275,342 +275,236 @@ static int nes_bind_mw(struct ib_qp *ibqp, struct ib_mw *ibmw,
 }
-/**
+/*
- * nes_alloc_fmr
+ * nes_alloc_fast_mr
 */
-static struct ib_fmr *nes_alloc_fmr(struct ib_pd *ibpd,
+static int alloc_fast_reg_mr(struct nes_device *nesdev, struct nes_pd *nespd,
-                int ibmr_access_flags,
+                             u32 stag, u32 page_count)
-                struct ib_fmr_attr *ibfmr_attr)
 {
-        unsigned long flags;
-        struct nes_pd *nespd = to_nespd(ibpd);
-        struct nes_vnic *nesvnic = to_nesvnic(ibpd->device);
-        struct nes_device *nesdev = nesvnic->nesdev;
-        struct nes_adapter *nesadapter = nesdev->nesadapter;
-        struct nes_fmr *nesfmr;
-        struct nes_cqp_request *cqp_request;
        struct nes_hw_cqp_wqe *cqp_wqe;
+        struct nes_cqp_request *cqp_request;
+        unsigned long flags;
        int ret;
-        u32 stag;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
-        u32 stag_index = 0;
-        u32 next_stag_index = 0;
-        u32 driver_key = 0;
        u32 opcode = 0;
-        u8 stag_key = 0;
+        u16 major_code;
-        int i=0;
+        u64 region_length = page_count * PAGE_SIZE;
-        struct nes_vpbl vpbl;
-        get_random_bytes(&next_stag_index, sizeof(next_stag_index));
-        stag_key = (u8)next_stag_index;
-        driver_key = 0;
-        next_stag_index >>= 8;
-        next_stag_index %= nesadapter->max_mr;
-        ret = nes_alloc_resource(nesadapter, nesadapter->allocated_mrs,
-                        nesadapter->max_mr, &stag_index, &next_stag_index);
-        if (ret) {
-                goto failed_resource_alloc;
-        }
-        nesfmr = kzalloc(sizeof(*nesfmr), GFP_KERNEL);
-        if (!nesfmr) {
-                ret = -ENOMEM;
-                goto failed_fmr_alloc;
-        }
-        nesfmr->nesmr.mode = IWNES_MEMREG_TYPE_FMR;
-        if (ibfmr_attr->max_pages == 1) {
-                /* use zero length PBL */
-                nesfmr->nesmr.pbl_4k = 0;
-                nesfmr->nesmr.pbls_used = 0;
-        } else if (ibfmr_attr->max_pages <= 32) {
-                /* use PBL 256 */
-                nesfmr->nesmr.pbl_4k = 0;
-                nesfmr->nesmr.pbls_used = 1;
-        } else if (ibfmr_attr->max_pages <= 512) {
-                /* use 4K PBLs */
-                nesfmr->nesmr.pbl_4k = 1;
-                nesfmr->nesmr.pbls_used = 1;
-        } else {
-                /* use two level 4K PBLs */
-                /* add support for two level 256B PBLs */
-                nesfmr->nesmr.pbl_4k = 1;
-                nesfmr->nesmr.pbls_used = 1 + (ibfmr_attr->max_pages >> 9) +
-                                ((ibfmr_attr->max_pages & 511) ? 1 : 0);
-        }
-        /* Register the region with the adapter */
-        spin_lock_irqsave(&nesadapter->pbl_lock, flags);
-        /* track PBL resources */
-        if (nesfmr->nesmr.pbls_used != 0) {
-                if (nesfmr->nesmr.pbl_4k) {
-                        if (nesfmr->nesmr.pbls_used > nesadapter->free_4kpbl) {
-                                spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
-                                ret = -ENOMEM;
-                                goto failed_vpbl_avail;
-                        } else {
-                                nesadapter->free_4kpbl -= nesfmr->nesmr.pbls_used;
-                        }
-                } else {
-                        if (nesfmr->nesmr.pbls_used > nesadapter->free_256pbl) {
-                                spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
-                                ret = -ENOMEM;
-                                goto failed_vpbl_avail;
-                        } else {
-                                nesadapter->free_256pbl -= nesfmr->nesmr.pbls_used;
-                        }
-                }
-        }
-        /* one level pbl */
-        if (nesfmr->nesmr.pbls_used == 0) {
-                nesfmr->root_vpbl.pbl_vbase = NULL;
-                nes_debug(NES_DBG_MR,  "zero level pbl \n");
-        } else if (nesfmr->nesmr.pbls_used == 1) {
-                /* can change it to kmalloc & dma_map_single */
-                nesfmr->root_vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 4096,
-                                &nesfmr->root_vpbl.pbl_pbase);
-                if (!nesfmr->root_vpbl.pbl_vbase) {
-                        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
-                        ret = -ENOMEM;
-                        goto failed_vpbl_alloc;
-                }
-                nesfmr->leaf_pbl_cnt = 0;
-                nes_debug(NES_DBG_MR, "one level pbl, root_vpbl.pbl_vbase=%p \n",
-                                nesfmr->root_vpbl.pbl_vbase);
-        }
-        /* two level pbl */
-        else {
-                nesfmr->root_vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 8192,
-                                &nesfmr->root_vpbl.pbl_pbase);
-                if (!nesfmr->root_vpbl.pbl_vbase) {
-                        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
-                        ret = -ENOMEM;
-                        goto failed_vpbl_alloc;
-                }
-                nesfmr->leaf_pbl_cnt = nesfmr->nesmr.pbls_used-1;
-                nesfmr->root_vpbl.leaf_vpbl = kzalloc(sizeof(*nesfmr->root_vpbl.leaf_vpbl)*1024, GFP_ATOMIC);
-                if (!nesfmr->root_vpbl.leaf_vpbl) {
-                        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
-                        ret = -ENOMEM;
-                        goto failed_leaf_vpbl_alloc;
-                }
-                nes_debug(NES_DBG_MR, "two level pbl, root_vpbl.pbl_vbase=%p"
-                                " leaf_pbl_cnt=%d root_vpbl.leaf_vpbl=%p\n",
-                                nesfmr->root_vpbl.pbl_vbase, nesfmr->leaf_pbl_cnt, nesfmr->root_vpbl.leaf_vpbl);
-                for (i=0; i<nesfmr->leaf_pbl_cnt; i++)
-                        nesfmr->root_vpbl.leaf_vpbl[i].pbl_vbase = NULL;
-                for (i=0; i<nesfmr->leaf_pbl_cnt; i++) {
-                        vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 4096,
-                                        &vpbl.pbl_pbase);
-                        if (!vpbl.pbl_vbase) {
-                                ret = -ENOMEM;
-                                spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
-                                goto failed_leaf_vpbl_pages_alloc;
-                        }
-                        nesfmr->root_vpbl.pbl_vbase[i].pa_low = cpu_to_le32((u32)vpbl.pbl_pbase);
-                        nesfmr->root_vpbl.pbl_vbase[i].pa_high = cpu_to_le32((u32)((((u64)vpbl.pbl_pbase)>>32)));
-                        nesfmr->root_vpbl.leaf_vpbl[i] = vpbl;
-                        nes_debug(NES_DBG_MR, "pbase_low=0x%x, pbase_high=0x%x, vpbl=%p\n",
-                                        nesfmr->root_vpbl.pbl_vbase[i].pa_low,
-                                        nesfmr->root_vpbl.pbl_vbase[i].pa_high,
-                                        &nesfmr->root_vpbl.leaf_vpbl[i]);
-                }
-        }
-        nesfmr->ib_qp = NULL;
-        nesfmr->access_rights =0;
-        stag = stag_index << 8;
-        stag |= driver_key;
-        stag += (u32)stag_key;
-        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
        cqp_request = nes_get_cqp_request(nesdev);
        if (cqp_request == NULL) {
                nes_debug(NES_DBG_MR, "Failed to get a cqp_request.\n");
-                ret = -ENOMEM;
+                return -ENOMEM;
-                goto failed_leaf_vpbl_pages_alloc;
        }
+        nes_debug(NES_DBG_MR, "alloc_fast_reg_mr: page_count = %d, "
+                              "region_length = %llu\n",
+                              page_count, region_length);
        cqp_request->waiting = 1;
        cqp_wqe = &cqp_request->cqp_wqe;
-        nes_debug(NES_DBG_MR, "Registering STag 0x%08X, index = 0x%08X\n",
+        spin_lock_irqsave(&nesadapter->pbl_lock, flags);
-                        stag, stag_index);
+        if (nesadapter->free_4kpbl > 0) {
+                nesadapter->free_4kpbl--;
-        opcode = NES_CQP_ALLOCATE_STAG | NES_CQP_STAG_VA_TO | NES_CQP_STAG_MR;
+                spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+        } else {
-        if (nesfmr->nesmr.pbl_4k == 1)
+                /* No 4kpbl's available: */
-                opcode |= NES_CQP_STAG_PBL_BLK_SIZE;
+                spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                nes_debug(NES_DBG_MR, "Out of Pbls\n");
-        if (ibmr_access_flags & IB_ACCESS_REMOTE_WRITE) {
+                nes_free_cqp_request(nesdev, cqp_request);
-                opcode |= NES_CQP_STAG_RIGHTS_REMOTE_WRITE |
+                return -ENOMEM;
-                                NES_CQP_STAG_RIGHTS_LOCAL_WRITE | NES_CQP_STAG_REM_ACC_EN;
-                nesfmr->access_rights |=
-                                NES_CQP_STAG_RIGHTS_REMOTE_WRITE | NES_CQP_STAG_RIGHTS_LOCAL_WRITE |
-                                NES_CQP_STAG_REM_ACC_EN;
        }
-        if (ibmr_access_flags & IB_ACCESS_REMOTE_READ) {
+        opcode = NES_CQP_ALLOCATE_STAG | NES_CQP_STAG_MR |
-                opcode |= NES_CQP_STAG_RIGHTS_REMOTE_READ |
+                 NES_CQP_STAG_PBL_BLK_SIZE | NES_CQP_STAG_VA_TO |
-                                NES_CQP_STAG_RIGHTS_LOCAL_READ | NES_CQP_STAG_REM_ACC_EN;
+                 NES_CQP_STAG_REM_ACC_EN;
-                nesfmr->access_rights |=
+        /*
-                                NES_CQP_STAG_RIGHTS_REMOTE_READ | NES_CQP_STAG_RIGHTS_LOCAL_READ |
+         * The current OFED API does not support the zero based TO option.
-                                NES_CQP_STAG_REM_ACC_EN;
+         * If added then need to changed the NES_CQP_STAG_VA* option.  Also,
-        }
+         * the API does not support that ability to have the MR set for local
+         * access only when created and not allow the SQ op to override. Given
+         * this the remote enable must be set here.
+         */
        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
-        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX, (nespd->pd_id & 0x00007fff));
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX, 1);
-        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, stag);
-        cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX] =
+        cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX] =
-                        cpu_to_le32((nesfmr->nesmr.pbls_used>1) ?
+                        cpu_to_le32((u32)(region_length >> 8) & 0xff000000);
-                        (nesfmr->nesmr.pbls_used-1) : nesfmr->nesmr.pbls_used);
+        cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX] |=
+                        cpu_to_le32(nespd->pd_id & 0x00007fff);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, stag);
+        set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_VA_LOW_IDX, 0);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_LEN_LOW_IDX, 0);
+        set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PA_LOW_IDX, 0);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PBL_LEN_IDX, (page_count * 8));
+        cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] |= cpu_to_le32(NES_CQP_STAG_PBL_BLK_SIZE);
+        barrier();
        atomic_set(&cqp_request->refcount, 2);
        nes_post_cqp_request(nesdev, cqp_request);
        /* Wait for CQP */
-        ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0),
+        ret = wait_event_timeout(cqp_request->waitq,
-                        NES_EVENT_TIMEOUT);
+                                 (0 != cqp_request->request_done),
-        nes_debug(NES_DBG_MR, "Register STag 0x%08X completed, wait_event_timeout ret = %u,"
+                                 NES_EVENT_TIMEOUT);
-                        " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
-                        stag, ret, cqp_request->major_code, cqp_request->minor_code);
+        nes_debug(NES_DBG_MR, "Allocate STag 0x%08X completed, "
+                  "wait_event_timeout ret = %u, CQP Major:Minor codes = "
-        if ((!ret) || (cqp_request->major_code)) {
+                  "0x%04X:0x%04X.\n", stag, ret, cqp_request->major_code,
-                nes_put_cqp_request(nesdev, cqp_request);
+                  cqp_request->minor_code);
-                ret = (!ret) ? -ETIME : -EIO;
+        major_code = cqp_request->major_code;
-                goto failed_leaf_vpbl_pages_alloc;
-        }
        nes_put_cqp_request(nesdev, cqp_request);
-        nesfmr->nesmr.ibfmr.lkey = stag;
-        nesfmr->nesmr.ibfmr.rkey = stag;
-        nesfmr->attr = *ibfmr_attr;
-        return &nesfmr->nesmr.ibfmr;
-        failed_leaf_vpbl_pages_alloc:
-        /* unroll all allocated pages */
-        for (i=0; i<nesfmr->leaf_pbl_cnt; i++) {
-                if (nesfmr->root_vpbl.leaf_vpbl[i].pbl_vbase) {
-                        pci_free_consistent(nesdev->pcidev, 4096, nesfmr->root_vpbl.leaf_vpbl[i].pbl_vbase,
-                                        nesfmr->root_vpbl.leaf_vpbl[i].pbl_pbase);
-                }
-        }
-        if (nesfmr->root_vpbl.leaf_vpbl)
-                kfree(nesfmr->root_vpbl.leaf_vpbl);
-        failed_leaf_vpbl_alloc:
+        if (!ret || major_code) {
-        if (nesfmr->leaf_pbl_cnt == 0) {
-                if (nesfmr->root_vpbl.pbl_vbase)
-                        pci_free_consistent(nesdev->pcidev, 4096, nesfmr->root_vpbl.pbl_vbase,
-                                        nesfmr->root_vpbl.pbl_pbase);
-        } else
-                pci_free_consistent(nesdev->pcidev, 8192, nesfmr->root_vpbl.pbl_vbase,
-                                nesfmr->root_vpbl.pbl_pbase);
-        failed_vpbl_alloc:
-        if (nesfmr->nesmr.pbls_used != 0) {
                spin_lock_irqsave(&nesadapter->pbl_lock, flags);
-                if (nesfmr->nesmr.pbl_4k)
+                nesadapter->free_4kpbl++;
-                        nesadapter->free_4kpbl += nesfmr->nesmr.pbls_used;
-                else
-                        nesadapter->free_256pbl += nesfmr->nesmr.pbls_used;
                spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
        }
-failed_vpbl_avail:
+        if (!ret)
-        kfree(nesfmr);
+                return -ETIME;
+        else if (major_code)
-        failed_fmr_alloc:
+                return -EIO;
-        nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
+        return 0;
-        failed_resource_alloc:
-        return ERR_PTR(ret);
 }
+/*
-/**
+ * nes_alloc_fast_reg_mr
- * nes_dealloc_fmr
 */
-static int nes_dealloc_fmr(struct ib_fmr *ibfmr)
+struct ib_mr *nes_alloc_fast_reg_mr(struct ib_pd *ibpd, int max_page_list_len)
 {
-        unsigned long flags;
+        struct nes_pd *nespd = to_nespd(ibpd);
-        struct nes_mr *nesmr = to_nesmr_from_ibfmr(ibfmr);
+        struct nes_vnic *nesvnic = to_nesvnic(ibpd->device);
-        struct nes_fmr *nesfmr = to_nesfmr(nesmr);
-        struct nes_vnic *nesvnic = to_nesvnic(ibfmr->device);
        struct nes_device *nesdev = nesvnic->nesdev;
        struct nes_adapter *nesadapter = nesdev->nesadapter;
-        int i = 0;
-        int rc;
-        /* free the resources */
+        u32 next_stag_index;
-        if (nesfmr->leaf_pbl_cnt == 0) {
+        u8 stag_key = 0;
-                /* single PBL case */
+        u32 driver_key = 0;
-                if (nesfmr->root_vpbl.pbl_vbase)
+        int err = 0;
-                        pci_free_consistent(nesdev->pcidev, 4096, nesfmr->root_vpbl.pbl_vbase,
+        u32 stag_index = 0;
-                                        nesfmr->root_vpbl.pbl_pbase);
+        struct nes_mr *nesmr;
-        } else {
+        u32 stag;
-                for (i = 0; i < nesfmr->leaf_pbl_cnt; i++) {
+        int ret;
-                        pci_free_consistent(nesdev->pcidev, 4096, nesfmr->root_vpbl.leaf_vpbl[i].pbl_vbase,
+        struct ib_mr *ibmr;
-                                        nesfmr->root_vpbl.leaf_vpbl[i].pbl_pbase);
+/*
-                }
+ * Note:  Set to always use a fixed length single page entry PBL.  This is to allow
-                kfree(nesfmr->root_vpbl.leaf_vpbl);
+ *       for the fast_reg_mr operation to always know the size of the PBL.
-                pci_free_consistent(nesdev->pcidev, 8192, nesfmr->root_vpbl.pbl_vbase,
+ */
-                                nesfmr->root_vpbl.pbl_pbase);
+        if (max_page_list_len > (NES_4K_PBL_CHUNK_SIZE / sizeof(u64)))
-        }
+                return ERR_PTR(-E2BIG);
-        nesmr->ibmw.device = ibfmr->device;
-        nesmr->ibmw.pd = ibfmr->pd;
-        nesmr->ibmw.rkey = ibfmr->rkey;
-        nesmr->ibmw.uobject = NULL;
-        rc = nes_dealloc_mw(&nesmr->ibmw);
+        get_random_bytes(&next_stag_index, sizeof(next_stag_index));
+        stag_key = (u8)next_stag_index;
+        next_stag_index >>= 8;
+        next_stag_index %= nesadapter->max_mr;
-        if ((rc == 0) && (nesfmr->nesmr.pbls_used != 0)) {
+        err = nes_alloc_resource(nesadapter, nesadapter->allocated_mrs,
-                spin_lock_irqsave(&nesadapter->pbl_lock, flags);
+                                 nesadapter->max_mr, &stag_index,
-                if (nesfmr->nesmr.pbl_4k) {
+                                 &next_stag_index);
-                        nesadapter->free_4kpbl += nesfmr->nesmr.pbls_used;
+        if (err)
-                        WARN_ON(nesadapter->free_4kpbl > nesadapter->max_4kpbl);
+                return ERR_PTR(err);
-                } else {
-                        nesadapter->free_256pbl += nesfmr->nesmr.pbls_used;
+        nesmr = kzalloc(sizeof(*nesmr), GFP_KERNEL);
-                        WARN_ON(nesadapter->free_256pbl > nesadapter->max_256pbl);
+        if (!nesmr) {
-                }
+                nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
-                spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                return ERR_PTR(-ENOMEM);
        }
-        return rc;
+        stag = stag_index << 8;
-}
+        stag |= driver_key;
+        stag += (u32)stag_key;
+        nes_debug(NES_DBG_MR, "Allocating STag 0x%08X index = 0x%08X\n",
+                  stag, stag_index);
-/**
+        ret = alloc_fast_reg_mr(nesdev, nespd, stag, max_page_list_len);
- * nes_map_phys_fmr
+        if (ret == 0) {
+                nesmr->ibmr.rkey = stag;
+                nesmr->ibmr.lkey = stag;
+                nesmr->mode = IWNES_MEMREG_TYPE_FMEM;
+                ibmr = &nesmr->ibmr;
+        } else {
+                kfree(nesmr);
+                nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
+                ibmr = ERR_PTR(-ENOMEM);
+        }
+        return ibmr;
+}
+/*
+ * nes_alloc_fast_reg_page_list
 */
-static int nes_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
+static struct ib_fast_reg_page_list *nes_alloc_fast_reg_page_list(
-                int list_len, u64 iova)
+                                                        struct ib_device *ibdev,
+                                                        int page_list_len)
 {
-        return 0;
+        struct nes_vnic *nesvnic = to_nesvnic(ibdev);
-}
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct ib_fast_reg_page_list *pifrpl;
+        struct nes_ib_fast_reg_page_list *pnesfrpl;
+        if (page_list_len > (NES_4K_PBL_CHUNK_SIZE / sizeof(u64)))
+                return ERR_PTR(-E2BIG);
+        /*
+         * Allocate the ib_fast_reg_page_list structure, the
+         * nes_fast_bpl structure, and the PLB table.
+         */
+        pnesfrpl = kmalloc(sizeof(struct nes_ib_fast_reg_page_list) +
+                           page_list_len * sizeof(u64), GFP_KERNEL);
+        if (!pnesfrpl)
+                return ERR_PTR(-ENOMEM);
-/**
+        pifrpl = &pnesfrpl->ibfrpl;
- * nes_unmap_frm
+        pifrpl->page_list = &pnesfrpl->pbl;
+        pifrpl->max_page_list_len = page_list_len;
+        /*
+         * Allocate the WQE PBL
+         */
+        pnesfrpl->nes_wqe_pbl.kva = pci_alloc_consistent(nesdev->pcidev,
+                                                         page_list_len * sizeof(u64),
+                                                         &pnesfrpl->nes_wqe_pbl.paddr);
+        if (!pnesfrpl->nes_wqe_pbl.kva) {
+                kfree(pnesfrpl);
+                return ERR_PTR(-ENOMEM);
+        }
+        nes_debug(NES_DBG_MR, "nes_alloc_fast_reg_pbl: nes_frpl = %p, "
+                  "ibfrpl = %p, ibfrpl.page_list = %p, pbl.kva = %p, "
+                  "pbl.paddr= %p\n", pnesfrpl, &pnesfrpl->ibfrpl,
+                  pnesfrpl->ibfrpl.page_list, pnesfrpl->nes_wqe_pbl.kva,
+                  (void *)pnesfrpl->nes_wqe_pbl.paddr);
+        return pifrpl;
+}
+/*
+ * nes_free_fast_reg_page_list
 */
-static int nes_unmap_fmr(struct list_head *ibfmr_list)
+static void nes_free_fast_reg_page_list(struct ib_fast_reg_page_list *pifrpl)
 {
-        return 0;
+        struct nes_vnic *nesvnic = to_nesvnic(pifrpl->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_ib_fast_reg_page_list *pnesfrpl;
+        pnesfrpl = container_of(pifrpl, struct nes_ib_fast_reg_page_list, ibfrpl);
+        /*
+         * Free the WQE PBL.
+         */
+        pci_free_consistent(nesdev->pcidev,
+                            pifrpl->max_page_list_len * sizeof(u64),
+                            pnesfrpl->nes_wqe_pbl.kva,
+                            pnesfrpl->nes_wqe_pbl.paddr);
+        /*
+         * Free the PBL structure
+         */
+        kfree(pnesfrpl);
 }
 /**
 * nes_query_device
 */
@@ -633,23 +527,23 @@ static int nes_query_device(struct ib_device *ibdev, struct ib_device_attr *prop
        props->max_qp_wr = nesdev->nesadapter->max_qp_wr - 2;
        props->max_sge = nesdev->nesadapter->max_sge;
        props->max_cq = nesibdev->max_cq;
-        props->max_cqe = nesdev->nesadapter->max_cqe - 1;
+        props->max_cqe = nesdev->nesadapter->max_cqe;
        props->max_mr = nesibdev->max_mr;
        props->max_mw = nesibdev->max_mr;
        props->max_pd = nesibdev->max_pd;
        props->max_sge_rd = 1;
        switch (nesdev->nesadapter->max_irrq_wr) {
                case 0:
-                        props->max_qp_rd_atom = 1;
+                        props->max_qp_rd_atom = 2;
                        break;
                case 1:
-                        props->max_qp_rd_atom = 4;
+                        props->max_qp_rd_atom = 8;
                        break;
                case 2:
-                        props->max_qp_rd_atom = 16;
+                        props->max_qp_rd_atom = 32;
                        break;
                case 3:
-                        props->max_qp_rd_atom = 32;
+                        props->max_qp_rd_atom = 64;
                        break;
                default:
                        props->max_qp_rd_atom = 0;
@@ -1121,6 +1015,7 @@ static int nes_setup_virt_qp(struct nes_qp *nesqp, struct nes_pbl *nespbl,
                kunmap(nesqp->page);
                return -ENOMEM;
        }
+        nesqp->sq_kmapped = 1;
        nesqp->hwqp.q2_vbase = mem;
        mem += 256;
        memset(nesqp->hwqp.q2_vbase, 0, 256);
@@ -1198,7 +1093,10 @@ static inline void nes_free_qp_mem(struct nes_device *nesdev,
                pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size, nesqp->hwqp.q2_vbase, nesqp->hwqp.q2_pbase);
                pci_free_consistent(nesdev->pcidev, 256, nesqp->pbl_vbase, nesqp->pbl_pbase );
                nesqp->pbl_vbase = NULL;
-                kunmap(nesqp->page);
+                if (nesqp->sq_kmapped) {
+                        nesqp->sq_kmapped = 0;
+                        kunmap(nesqp->page);
+                }
        }
 }
@@ -1504,8 +1402,6 @@ static struct ib_qp *nes_create_qp(struct ib_pd *ibpd,
                        nes_debug(NES_DBG_QP, "QP%u structure located @%p.Size = %u.\n",
                                        nesqp->hwqp.qp_id, nesqp, (u32)sizeof(*nesqp));
                        spin_lock_init(&nesqp->lock);
-                        init_waitqueue_head(&nesqp->state_waitq);
-                        init_waitqueue_head(&nesqp->kick_waitq);
                        nes_add_ref(&nesqp->ibqp);
                        break;
                default:
@@ -1513,6 +1409,8 @@ static struct ib_qp *nes_create_qp(struct ib_pd *ibpd,
                        return ERR_PTR(-EINVAL);
        }
+        nesqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR);
        /* update the QP table */
        nesdev->nesadapter->qp_table[nesqp->hwqp.qp_id-NES_FIRST_QPN] = nesqp;
        nes_debug(NES_DBG_QP, "netdev refcnt=%u\n",
@@ -1607,8 +1505,10 @@ static int nes_destroy_qp(struct ib_qp *ibqp)
                                nes_ucontext->first_free_wq = nesqp->mmap_sq_db_index;
                        }
                }
-                if (nesqp->pbl_pbase)
+                if (nesqp->pbl_pbase && nesqp->sq_kmapped) {
+                        nesqp->sq_kmapped = 0;
                        kunmap(nesqp->page);
+                }
        } else {
                /* Clean any pending completions from the cq(s) */
                if (nesqp->nesscq)
@@ -1649,6 +1549,9 @@ static struct ib_cq *nes_create_cq(struct ib_device *ibdev, int entries,
        unsigned long flags;
        int ret;
+        if (entries > nesadapter->max_cqe)
+                return ERR_PTR(-EINVAL);
        err = nes_alloc_resource(nesadapter, nesadapter->allocated_cqs,
                        nesadapter->max_cq, &cq_num, &nesadapter->next_cq);
        if (err) {
@@ -2606,9 +2509,6 @@ static struct ib_mr *nes_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
                        stag = stag_index << 8;
                        stag |= driver_key;
                        stag += (u32)stag_key;
-                        if (stag == 0) {
-                                stag = 1;
-                        }
                        iova_start = virt;
                        /* Make the leaf PBL the root if only one PBL */
@@ -3109,7 +3009,6 @@ int nes_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
                                                                " already done based on hw state.\n",
                                                                nesqp->hwqp.qp_id);
                                                issue_modify_qp = 0;
-                                                nesqp->in_disconnect = 0;
                                        }
                                        switch (nesqp->hw_iwarp_state) {
                                                case NES_AEQE_IWARP_STATE_CLOSING:
@@ -3122,7 +3021,6 @@ int nes_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
                                                        break;
                                                default:
                                                        next_iwarp_state = NES_CQP_QP_IWARP_STATE_CLOSING;
-                                                        nesqp->in_disconnect = 1;
                                                        nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_CLOSING;
                                                        break;
                                        }
@@ -3139,7 +3037,6 @@ int nes_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
                                next_iwarp_state = NES_CQP_QP_IWARP_STATE_TERMINATE;
                                nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_TERMINATE;
                                issue_modify_qp = 1;
-                                nesqp->in_disconnect = 1;
                                break;
                        case IB_QPS_ERR:
                        case IB_QPS_RESET:
@@ -3162,7 +3059,6 @@ int nes_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
                                if ((nesqp->hw_tcp_state > NES_AEQE_TCP_STATE_CLOSED) &&
                                                (nesqp->hw_tcp_state != NES_AEQE_TCP_STATE_TIME_WAIT)) {
                                        next_iwarp_state |= NES_CQP_QP_RESET;
-                                        nesqp->in_disconnect = 1;
                                } else {
                                        nes_debug(NES_DBG_MOD_QP, "QP%u NOT setting NES_CQP_QP_RESET since TCP state = %u\n",
                                                        nesqp->hwqp.qp_id, nesqp->hw_tcp_state);
@@ -3373,21 +3269,17 @@ static int nes_post_send(struct ib_qp *ibqp, struct ib_send_wr *ib_wr,
        struct nes_device *nesdev = nesvnic->nesdev;
        struct nes_qp *nesqp = to_nesqp(ibqp);
        struct nes_hw_qp_wqe *wqe;
-        int err;
+        int err = 0;
        u32 qsize = nesqp->hwqp.sq_size;
        u32 head;
-        u32 wqe_misc;
+        u32 wqe_misc = 0;
-        u32 wqe_count;
+        u32 wqe_count = 0;
        u32 counter;
-        u32 total_payload_length;
-        err = 0;
-        wqe_misc = 0;
-        wqe_count = 0;
-        total_payload_length = 0;
-        if (nesqp->ibqp_state > IB_QPS_RTS)
+        if (nesqp->ibqp_state > IB_QPS_RTS) {
-                return -EINVAL;
+                err = -EINVAL;
+                goto out;
+        }
        spin_lock_irqsave(&nesqp->lock, flags);
@@ -3413,94 +3305,208 @@ static int nes_post_send(struct ib_qp *ibqp, struct ib_send_wr *ib_wr,
                u64temp = (u64)(ib_wr->wr_id);
                set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_SCRATCH_LOW_IDX,
                                        u64temp);
-                        switch (ib_wr->opcode) {
+                switch (ib_wr->opcode) {
-                                case IB_WR_SEND:
+                case IB_WR_SEND:
-                                        if (ib_wr->send_flags & IB_SEND_SOLICITED) {
+                case IB_WR_SEND_WITH_INV:
-                                                wqe_misc = NES_IWARP_SQ_OP_SENDSE;
+                        if (IB_WR_SEND == ib_wr->opcode) {
-                                        } else {
+                                if (ib_wr->send_flags & IB_SEND_SOLICITED)
-                                                wqe_misc = NES_IWARP_SQ_OP_SEND;
+                                        wqe_misc = NES_IWARP_SQ_OP_SENDSE;
-                                        }
+                                else
-                                        if (ib_wr->num_sge > nesdev->nesadapter->max_sge) {
+                                        wqe_misc = NES_IWARP_SQ_OP_SEND;
-                                                err = -EINVAL;
+                        } else {
-                                                break;
+                                if (ib_wr->send_flags & IB_SEND_SOLICITED)
-                                        }
+                                        wqe_misc = NES_IWARP_SQ_OP_SENDSEINV;
-                                        if (ib_wr->send_flags & IB_SEND_FENCE) {
+                                else
-                                                wqe_misc |= NES_IWARP_SQ_WQE_LOCAL_FENCE;
+                                        wqe_misc = NES_IWARP_SQ_OP_SENDINV;
-                                        }
-                                        if ((ib_wr->send_flags & IB_SEND_INLINE) &&
-                                                        ((nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) == 0) &&
-                                                        (ib_wr->sg_list[0].length <= 64)) {
-                                                memcpy(&wqe->wqe_words[NES_IWARP_SQ_WQE_IMM_DATA_START_IDX],
-                                                               (void *)(unsigned long)ib_wr->sg_list[0].addr, ib_wr->sg_list[0].length);
-                                                set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
-                                                                ib_wr->sg_list[0].length);
-                                                wqe_misc |= NES_IWARP_SQ_WQE_IMM_DATA;
-                                        } else {
-                                                fill_wqe_sg_send(wqe, ib_wr, 1);
-                                        }
-                                        break;
+                                set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_INV_STAG_LOW_IDX,
-                                case IB_WR_RDMA_WRITE:
+                                                    ib_wr->ex.invalidate_rkey);
-                                        wqe_misc = NES_IWARP_SQ_OP_RDMAW;
+                        }
-                                        if (ib_wr->num_sge > nesdev->nesadapter->max_sge) {
-                                                nes_debug(NES_DBG_IW_TX, "Exceeded max sge, ib_wr=%u, max=%u\n",
-                                                                ib_wr->num_sge,
-                                                                nesdev->nesadapter->max_sge);
-                                                err = -EINVAL;
-                                                break;
-                                        }
-                                        if (ib_wr->send_flags & IB_SEND_FENCE) {
-                                                wqe_misc |= NES_IWARP_SQ_WQE_LOCAL_FENCE;
-                                        }
-                                        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_STAG_IDX,
+                        if (ib_wr->num_sge > nesdev->nesadapter->max_sge) {
-                                                        ib_wr->wr.rdma.rkey);
+                                err = -EINVAL;
-                                        set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_TO_LOW_IDX,
+                                break;
-                                                        ib_wr->wr.rdma.remote_addr);
-                                        if ((ib_wr->send_flags & IB_SEND_INLINE) &&
-                                                        ((nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) == 0) &&
-                                                        (ib_wr->sg_list[0].length <= 64)) {
-                                                memcpy(&wqe->wqe_words[NES_IWARP_SQ_WQE_IMM_DATA_START_IDX],
-                                                               (void *)(unsigned long)ib_wr->sg_list[0].addr, ib_wr->sg_list[0].length);
-                                                set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
-                                                                ib_wr->sg_list[0].length);
-                                                wqe_misc |= NES_IWARP_SQ_WQE_IMM_DATA;
-                                        } else {
-                                                fill_wqe_sg_send(wqe, ib_wr, 1);
-                                        }
-                                        wqe->wqe_words[NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX] =
-                                                        wqe->wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX];
-                                        break;
-                                case IB_WR_RDMA_READ:
-                                        /* iWARP only supports 1 sge for RDMA reads */
-                                        if (ib_wr->num_sge > 1) {
-                                                nes_debug(NES_DBG_IW_TX, "Exceeded max sge, ib_wr=%u, max=1\n",
-                                                                ib_wr->num_sge);
-                                                err = -EINVAL;
-                                                break;
-                                        }
-                                        wqe_misc = NES_IWARP_SQ_OP_RDMAR;
-                                        set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_TO_LOW_IDX,
-                                                        ib_wr->wr.rdma.remote_addr);
-                                        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_STAG_IDX,
-                                                        ib_wr->wr.rdma.rkey);
-                                        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX,
-                                                        ib_wr->sg_list->length);
-                                        set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_FRAG0_LOW_IDX,
-                                                        ib_wr->sg_list->addr);
-                                        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_STAG0_IDX,
-                                                        ib_wr->sg_list->lkey);
-                                        break;
-                                default:
-                                        /* error */
-                                        err = -EINVAL;
-                                        break;
                        }
-                if (ib_wr->send_flags & IB_SEND_SIGNALED) {
+                        if (ib_wr->send_flags & IB_SEND_FENCE)
-                        wqe_misc |= NES_IWARP_SQ_WQE_SIGNALED_COMPL;
+                                wqe_misc |= NES_IWARP_SQ_WQE_LOCAL_FENCE;
+                        if ((ib_wr->send_flags & IB_SEND_INLINE) &&
+                            ((nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) == 0) &&
+                             (ib_wr->sg_list[0].length <= 64)) {
+                                memcpy(&wqe->wqe_words[NES_IWARP_SQ_WQE_IMM_DATA_START_IDX],
+                                       (void *)(unsigned long)ib_wr->sg_list[0].addr, ib_wr->sg_list[0].length);
+                                set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
+                                                    ib_wr->sg_list[0].length);
+                                wqe_misc |= NES_IWARP_SQ_WQE_IMM_DATA;
+                        } else {
+                                fill_wqe_sg_send(wqe, ib_wr, 1);
+                        }
+                        break;
+                case IB_WR_RDMA_WRITE:
+                        wqe_misc = NES_IWARP_SQ_OP_RDMAW;
+                        if (ib_wr->num_sge > nesdev->nesadapter->max_sge) {
+                                nes_debug(NES_DBG_IW_TX, "Exceeded max sge, ib_wr=%u, max=%u\n",
+                                          ib_wr->num_sge, nesdev->nesadapter->max_sge);
+                                err = -EINVAL;
+                                break;
+                        }
+                        if (ib_wr->send_flags & IB_SEND_FENCE)
+                                wqe_misc |= NES_IWARP_SQ_WQE_LOCAL_FENCE;
+                        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_STAG_IDX,
+                                            ib_wr->wr.rdma.rkey);
+                        set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_TO_LOW_IDX,
+                                            ib_wr->wr.rdma.remote_addr);
+                        if ((ib_wr->send_flags & IB_SEND_INLINE) &&
+                            ((nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) == 0) &&
+                             (ib_wr->sg_list[0].length <= 64)) {
+                                memcpy(&wqe->wqe_words[NES_IWARP_SQ_WQE_IMM_DATA_START_IDX],
+                                       (void *)(unsigned long)ib_wr->sg_list[0].addr, ib_wr->sg_list[0].length);
+                                set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
+                                                    ib_wr->sg_list[0].length);
+                                wqe_misc |= NES_IWARP_SQ_WQE_IMM_DATA;
+                        } else {
+                                fill_wqe_sg_send(wqe, ib_wr, 1);
+                        }
+                        wqe->wqe_words[NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX] =
+                                wqe->wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX];
+                        break;
+                case IB_WR_RDMA_READ:
+                case IB_WR_RDMA_READ_WITH_INV:
+                        /* iWARP only supports 1 sge for RDMA reads */
+                        if (ib_wr->num_sge > 1) {
+                                nes_debug(NES_DBG_IW_TX, "Exceeded max sge, ib_wr=%u, max=1\n",
+                                          ib_wr->num_sge);
+                                err = -EINVAL;
+                                break;
+                        }
+                        if (ib_wr->opcode == IB_WR_RDMA_READ) {
+                                wqe_misc = NES_IWARP_SQ_OP_RDMAR;
+                        } else {
+                                wqe_misc = NES_IWARP_SQ_OP_RDMAR_LOCINV;
+                                set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_INV_STAG_LOW_IDX,
+                                                    ib_wr->ex.invalidate_rkey);
+                        }
+                        set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_TO_LOW_IDX,
+                                            ib_wr->wr.rdma.remote_addr);
+                        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_STAG_IDX,
+                                            ib_wr->wr.rdma.rkey);
+                        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX,
+                                            ib_wr->sg_list->length);
+                        set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_FRAG0_LOW_IDX,
+                                            ib_wr->sg_list->addr);
+                        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_STAG0_IDX,
+                                            ib_wr->sg_list->lkey);
+                        break;
+                case IB_WR_LOCAL_INV:
+                        wqe_misc = NES_IWARP_SQ_OP_LOCINV;
+                        set_wqe_32bit_value(wqe->wqe_words,
+                                            NES_IWARP_SQ_LOCINV_WQE_INV_STAG_IDX,
+                                            ib_wr->ex.invalidate_rkey);
+                        break;
+                case IB_WR_FAST_REG_MR:
+                {
+                        int i;
+                        int flags = ib_wr->wr.fast_reg.access_flags;
+                        struct nes_ib_fast_reg_page_list *pnesfrpl =
+                                container_of(ib_wr->wr.fast_reg.page_list,
+                                             struct nes_ib_fast_reg_page_list,
+                                             ibfrpl);
+                        u64 *src_page_list = pnesfrpl->ibfrpl.page_list;
+                        u64 *dst_page_list = pnesfrpl->nes_wqe_pbl.kva;
+                        if (ib_wr->wr.fast_reg.page_list_len >
+                            (NES_4K_PBL_CHUNK_SIZE / sizeof(u64))) {
+                                nes_debug(NES_DBG_IW_TX, "SQ_FMR: bad page_list_len\n");
+                                err = -EINVAL;
+                                break;
+                        }
+                        wqe_misc = NES_IWARP_SQ_OP_FAST_REG;
+                        set_wqe_64bit_value(wqe->wqe_words,
+                                            NES_IWARP_SQ_FMR_WQE_VA_FBO_LOW_IDX,
+                                            ib_wr->wr.fast_reg.iova_start);
+                        set_wqe_32bit_value(wqe->wqe_words,
+                                            NES_IWARP_SQ_FMR_WQE_LENGTH_LOW_IDX,
+                                            ib_wr->wr.fast_reg.length);
+                        set_wqe_32bit_value(wqe->wqe_words,
+                                            NES_IWARP_SQ_FMR_WQE_MR_STAG_IDX,
+                                            ib_wr->wr.fast_reg.rkey);
+                        /* Set page size: */
+                        if (ib_wr->wr.fast_reg.page_shift == 12) {
+                                wqe_misc |= NES_IWARP_SQ_FMR_WQE_PAGE_SIZE_4K;
+                        } else if (ib_wr->wr.fast_reg.page_shift == 21) {
+                                wqe_misc |= NES_IWARP_SQ_FMR_WQE_PAGE_SIZE_2M;
+                        } else {
+                                nes_debug(NES_DBG_IW_TX, "Invalid page shift,"
+                                          " ib_wr=%u, max=1\n", ib_wr->num_sge);
+                                err = -EINVAL;
+                                break;
+                        }
+                        /* Set access_flags */
+                        wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_LOCAL_READ;
+                        if (flags & IB_ACCESS_LOCAL_WRITE)
+                                wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_LOCAL_WRITE;
+                        if (flags & IB_ACCESS_REMOTE_WRITE)
+                                wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_REMOTE_WRITE;
+                        if (flags & IB_ACCESS_REMOTE_READ)
+                                wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_REMOTE_READ;
+                        if (flags & IB_ACCESS_MW_BIND)
+                                wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_WINDOW_BIND;
+                        /* Fill in PBL info: */
+                        if (ib_wr->wr.fast_reg.page_list_len >
+                            pnesfrpl->ibfrpl.max_page_list_len) {
+                                nes_debug(NES_DBG_IW_TX, "Invalid page list length,"
+                                          " ib_wr=%p, value=%u, max=%u\n",
+                                          ib_wr, ib_wr->wr.fast_reg.page_list_len,
+                                          pnesfrpl->ibfrpl.max_page_list_len);
+                                err = -EINVAL;
+                                break;
+                        }
+                        set_wqe_64bit_value(wqe->wqe_words,
+                                            NES_IWARP_SQ_FMR_WQE_PBL_ADDR_LOW_IDX,
+                                            pnesfrpl->nes_wqe_pbl.paddr);
+                        set_wqe_32bit_value(wqe->wqe_words,
+                                            NES_IWARP_SQ_FMR_WQE_PBL_LENGTH_IDX,
+                                            ib_wr->wr.fast_reg.page_list_len * 8);
+                        for (i = 0; i < ib_wr->wr.fast_reg.page_list_len; i++)
+                                dst_page_list[i] = cpu_to_le64(src_page_list[i]);
+                        nes_debug(NES_DBG_IW_TX, "SQ_FMR: iova_start: %p, "
+                                  "length: %d, rkey: %0x, pgl_paddr: %p, "
+                                  "page_list_len: %u, wqe_misc: %x\n",
+                                  (void *)ib_wr->wr.fast_reg.iova_start,
+                                  ib_wr->wr.fast_reg.length,
+                                  ib_wr->wr.fast_reg.rkey,
+                                  (void *)pnesfrpl->nes_wqe_pbl.paddr,
+                                  ib_wr->wr.fast_reg.page_list_len,
+                                  wqe_misc);
+                        break;
+                }
+                default:
+                        /* error */
+                        err = -EINVAL;
+                        break;
                }
+                if (err)
+                        break;
+                if ((ib_wr->send_flags & IB_SEND_SIGNALED) || nesqp->sig_all)
+                        wqe_misc |= NES_IWARP_SQ_WQE_SIGNALED_COMPL;
                wqe->wqe_words[NES_IWARP_SQ_WQE_MISC_IDX] = cpu_to_le32(wqe_misc);
                ib_wr = ib_wr->next;
@@ -3522,6 +3528,7 @@ static int nes_post_send(struct ib_qp *ibqp, struct ib_send_wr *ib_wr,
        spin_unlock_irqrestore(&nesqp->lock, flags);
+out:
        if (err)
                *bad_wr = ib_wr;
        return err;
@@ -3548,8 +3555,10 @@ static int nes_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *ib_wr,
        u32 counter;
        u32 total_payload_length;
-        if (nesqp->ibqp_state > IB_QPS_RTS)
+        if (nesqp->ibqp_state > IB_QPS_RTS) {
-                return -EINVAL;
+                err = -EINVAL;
+                goto out;
+        }
        spin_lock_irqsave(&nesqp->lock, flags);
@@ -3612,6 +3621,7 @@ static int nes_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *ib_wr,
        spin_unlock_irqrestore(&nesqp->lock, flags);
+out:
        if (err)
                *bad_wr = ib_wr;
        return err;
@@ -3720,6 +3730,12 @@ static int nes_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *entry)
                                                nes_debug(NES_DBG_CQ, "Operation = Send.\n");
                                                entry->opcode = IB_WC_SEND;
                                                break;
+                                        case NES_IWARP_SQ_OP_LOCINV:
+                                                entry->opcode = IB_WR_LOCAL_INV;
+                                                break;
+                                        case NES_IWARP_SQ_OP_FAST_REG:
+                                                entry->opcode = IB_WC_FAST_REG_MR;
+                                                break;
                                }
                                nesqp->hwqp.sq_tail = (wqe_index+1)&(nesqp->hwqp.sq_size - 1);
@@ -3890,10 +3906,9 @@ struct nes_ib_device *nes_init_ofa_device(struct net_device *netdev)
        nesibdev->ibdev.dealloc_mw = nes_dealloc_mw;
        nesibdev->ibdev.bind_mw = nes_bind_mw;
-        nesibdev->ibdev.alloc_fmr = nes_alloc_fmr;
+        nesibdev->ibdev.alloc_fast_reg_mr = nes_alloc_fast_reg_mr;
-        nesibdev->ibdev.unmap_fmr = nes_unmap_fmr;
+        nesibdev->ibdev.alloc_fast_reg_page_list = nes_alloc_fast_reg_page_list;
-        nesibdev->ibdev.dealloc_fmr = nes_dealloc_fmr;
+        nesibdev->ibdev.free_fast_reg_page_list = nes_free_fast_reg_page_list;
-        nesibdev->ibdev.map_phys_fmr = nes_map_phys_fmr;
        nesibdev->ibdev.attach_mcast = nes_multicast_attach;
        nesibdev->ibdev.detach_mcast = nes_multicast_detach;
diff --git a/drivers/infiniband/hw/nes/nes_verbs.h b/drivers/infiniband/hw/nes/nes_verbs.h
index 89822d75f82e..2df9993e0cac 100644
--- a/drivers/infiniband/hw/nes/nes_verbs.h
+++ b/drivers/infiniband/hw/nes/nes_verbs.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006 - 2009 Intel-NE, Inc.  All rights reserved.
+ * Copyright (c) 2006 - 2009 Intel Corporation.  All rights reserved.
 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
 *
 * This software is available to you under a choice of one of two
@@ -135,19 +135,15 @@ struct nes_qp {
        struct ib_qp          ibqp;
        void                  *allocated_buffer;
        struct iw_cm_id       *cm_id;
-        struct workqueue_struct *wq;
        struct nes_cq         *nesscq;
        struct nes_cq         *nesrcq;
        struct nes_pd         *nespd;
        void *cm_node; /* handle of the node this QP is associated with */
        struct ietf_mpa_frame *ietf_frame;
        dma_addr_t            ietf_frame_pbase;
-        wait_queue_head_t     state_waitq;
        struct ib_mr          *lsmm_mr;
-        unsigned long         socket;
        struct nes_hw_qp      hwqp;
        struct work_struct    work;
-        struct work_struct    ae_work;
        enum ib_qp_state      ibqp_state;
        u32                   iwarp_state;
        u32                   hte_index;
@@ -165,19 +161,20 @@ struct nes_qp {
        struct page           *page;
        struct timer_list     terminate_timer;
        enum ib_event_type    terminate_eventtype;
-        wait_queue_head_t     kick_waitq;
+        u16                   active_conn:1;
-        u16                   in_disconnect;
+        u16                   skip_lsmm:1;
+        u16                   user_mode:1;
+        u16                   hte_added:1;
+        u16                   flush_issued:1;
+        u16                   destroyed:1;
+        u16                   sig_all:1;
+        u16                   rsvd:9;
        u16                   private_data_len;
        u16                   term_sq_flush_code;
        u16                   term_rq_flush_code;
-        u8                    active_conn;
-        u8                    skip_lsmm;
-        u8                    user_mode;
-        u8                    hte_added;
        u8                    hw_iwarp_state;
-        u8                    flush_issued;
        u8                    hw_tcp_state;
        u8                    term_flags;
-        u8                    destroyed;
+        u8                    sq_kmapped;
 };
 #endif                  /* NES_VERBS_H */
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_main.c b/drivers/infiniband/ulp/ipoib/ipoib_main.c
index 2bf5116deec4..df3eb8c9fd96 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_main.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_main.c
@@ -884,6 +884,7 @@ struct ipoib_neigh *ipoib_neigh_alloc(struct neighbour *neighbour,
        neigh->neighbour = neighbour;
        neigh->dev = dev;
+        memset(&neigh->dgid.raw, 0, sizeof (union ib_gid));
        *to_ipoib_neigh(neighbour) = neigh;
        skb_queue_head_init(&neigh->queue);
        ipoib_cm_set(neigh, NULL);
diff --git a/drivers/infiniband/ulp/iser/iser_memory.c b/drivers/infiniband/ulp/iser/iser_memory.c
index b9453d068e9d..274c883ef3ea 100644
--- a/drivers/infiniband/ulp/iser/iser_memory.c
+++ b/drivers/infiniband/ulp/iser/iser_memory.c
@@ -209,6 +209,8 @@ void iser_finalize_rdma_unaligned_sg(struct iscsi_iser_task *iser_task,
        mem_copy->copy_buf = NULL;
 }
+#define IS_4K_ALIGNED(addr)     ((((unsigned long)addr) & ~MASK_4K) == 0)
 /**
 * iser_sg_to_page_vec - Translates scatterlist entries to physical addresses
 * and returns the length of resulting physical address array (may be less than
@@ -221,62 +223,52 @@ void iser_finalize_rdma_unaligned_sg(struct iscsi_iser_task *iser_task,
 * where --few fragments of the same page-- are present in the SG as
 * consecutive elements. Also, it handles one entry SG.
 */
 static int iser_sg_to_page_vec(struct iser_data_buf *data,
                               struct iser_page_vec *page_vec,
                               struct ib_device *ibdev)
 {
-        struct scatterlist *sgl = (struct scatterlist *)data->buf;
+        struct scatterlist *sg, *sgl = (struct scatterlist *)data->buf;
-        struct scatterlist *sg;
+        u64 start_addr, end_addr, page, chunk_start = 0;
-        u64 first_addr, last_addr, page;
-        int end_aligned;
-        unsigned int cur_page = 0;
        unsigned long total_sz = 0;
-        int i;
+        unsigned int dma_len;
+        int i, new_chunk, cur_page, last_ent = data->dma_nents - 1;
        /* compute the offset of first element */
        page_vec->offset = (u64) sgl[0].offset & ~MASK_4K;
+        new_chunk = 1;
+        cur_page  = 0;
        for_each_sg(sgl, sg, data->dma_nents, i) {
-                unsigned int dma_len = ib_sg_dma_len(ibdev, sg);
+                start_addr = ib_sg_dma_address(ibdev, sg);
+                if (new_chunk)
+                        chunk_start = start_addr;
+                dma_len = ib_sg_dma_len(ibdev, sg);
+                end_addr = start_addr + dma_len;
                total_sz += dma_len;
-                first_addr = ib_sg_dma_address(ibdev, sg);
+                /* collect page fragments until aligned or end of SG list */
-                last_addr  = first_addr + dma_len;
+                if (!IS_4K_ALIGNED(end_addr) && i < last_ent) {
+                        new_chunk = 0;
-                end_aligned   = !(last_addr  & ~MASK_4K);
+                        continue;
-                /* continue to collect page fragments till aligned or SG ends */
-                while (!end_aligned && (i + 1 < data->dma_nents)) {
-                        sg = sg_next(sg);
-                        i++;
-                        dma_len = ib_sg_dma_len(ibdev, sg);
-                        total_sz += dma_len;
-                        last_addr = ib_sg_dma_address(ibdev, sg) + dma_len;
-                        end_aligned = !(last_addr  & ~MASK_4K);
                }
+                new_chunk = 1;
-                /* handle the 1st page in the 1st DMA element */
-                if (cur_page == 0) {
+                /* address of the first page in the contiguous chunk;
-                        page = first_addr & MASK_4K;
+                   masking relevant for the very first SG entry,
-                        page_vec->pages[cur_page] = page;
+                   which might be unaligned */
-                        cur_page++;
+                page = chunk_start & MASK_4K;
+                do {
+                        page_vec->pages[cur_page++] = page;
                        page += SIZE_4K;
-                } else
+                } while (page < end_addr);
-                        page = first_addr;
-                for (; page < last_addr; page += SIZE_4K) {
-                        page_vec->pages[cur_page] = page;
-                        cur_page++;
-                }
        }
        page_vec->data_size = total_sz;
        iser_dbg("page_vec->data_size:%d cur_page %d\n", page_vec->data_size,cur_page);
        return cur_page;
 }
-#define IS_4K_ALIGNED(addr)     ((((unsigned long)addr) & ~MASK_4K) == 0)
 /**
 * iser_data_buf_aligned_len - Tries to determine the maximal correctly aligned
@@ -284,42 +276,40 @@ static int iser_sg_to_page_vec(struct iser_data_buf *data,
 * the number of entries which are aligned correctly. Supports the case where
 * consecutive SG elements are actually fragments of the same physcial page.
 */
-static unsigned int iser_data_buf_aligned_len(struct iser_data_buf *data,
+static int iser_data_buf_aligned_len(struct iser_data_buf *data,
-                                              struct ib_device *ibdev)
+                                      struct ib_device *ibdev)
 {
-        struct scatterlist *sgl, *sg;
+        struct scatterlist *sgl, *sg, *next_sg = NULL;
-        u64 end_addr, next_addr;
+        u64 start_addr, end_addr;
-        int i, cnt;
+        int i, ret_len, start_check = 0;
-        unsigned int ret_len = 0;
+        if (data->dma_nents == 1)
+                return 1;
        sgl = (struct scatterlist *)data->buf;
+        start_addr  = ib_sg_dma_address(ibdev, sgl);
-        cnt = 0;
        for_each_sg(sgl, sg, data->dma_nents, i) {
-                /* iser_dbg("Checking sg iobuf [%d]: phys=0x%08lX "
+                if (start_check && !IS_4K_ALIGNED(start_addr))
-                   "offset: %ld sz: %ld\n", i,
+                        break;
-                   (unsigned long)sg_phys(sg),
-                   (unsigned long)sg->offset,
+                next_sg = sg_next(sg);
-                   (unsigned long)sg->length); */
+                if (!next_sg)
-                end_addr = ib_sg_dma_address(ibdev, sg) +
+                        break;
-                           ib_sg_dma_len(ibdev, sg);
-                /* iser_dbg("Checking sg iobuf end address "
+                end_addr    = start_addr + ib_sg_dma_len(ibdev, sg);
-                       "0x%08lX\n", end_addr); */
+                start_addr  = ib_sg_dma_address(ibdev, next_sg);
-                if (i + 1 < data->dma_nents) {
-                        next_addr = ib_sg_dma_address(ibdev, sg_next(sg));
+                if (end_addr == start_addr) {
-                        /* are i, i+1 fragments of the same page? */
+                        start_check = 0;
-                        if (end_addr == next_addr) {
+                        continue;
-                                cnt++;
+                } else
-                                continue;
+                        start_check = 1;
-                        } else if (!IS_4K_ALIGNED(end_addr)) {
-                                ret_len = cnt + 1;
+                if (!IS_4K_ALIGNED(end_addr))
-                                break;
+                        break;
-                        }
-                }
-                cnt++;
        }
-        if (i == data->dma_nents)
+        ret_len = (next_sg) ? i : i+1;
-                ret_len = cnt;  /* loop ended */
        iser_dbg("Found %d aligned entries out of %d in sg:0x%p\n",
                 ret_len, data->dma_nents, data);
        return ret_len;
diff --git a/drivers/input/input.c b/drivers/input/input.c
index 5c16001959cc..ab060710688f 100644
--- a/drivers/input/input.c
+++ b/drivers/input/input.c
@@ -296,9 +296,15 @@ static void input_handle_event(struct input_dev *dev,
 * @value: value of the event
 *
 * This function should be used by drivers implementing various input
- * devices. See also input_inject_event().
+ * devices to report input events. See also input_inject_event().
+ *
+ * NOTE: input_event() may be safely used right after input device was
+ * allocated with input_allocate_device(), even before it is registered
+ * with input_register_device(), but the event will not reach any of the
+ * input handlers. Such early invocation of input_event() may be used
+ * to 'seed' initial state of a switch or initial position of absolute
+ * axis, etc.
 */
 void input_event(struct input_dev *dev,
                 unsigned int type, unsigned int code, int value)
 {
diff --git a/drivers/input/keyboard/ep93xx_keypad.c b/drivers/input/keyboard/ep93xx_keypad.c
index 181d30e3018e..e45740429f7e 100644
--- a/drivers/input/keyboard/ep93xx_keypad.c
+++ b/drivers/input/keyboard/ep93xx_keypad.c
@@ -22,11 +22,11 @@
 #include <linux/platform_device.h>
 #include <linux/interrupt.h>
-#include <linux/input.h>
 #include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/input/matrix_keypad.h>
 #include <mach/hardware.h>
-#include <mach/gpio.h>
 #include <mach/ep93xx_keypad.h>
 /*
@@ -60,38 +60,37 @@
 #define KEY_REG_KEY1_MASK       (0x0000003f)
 #define KEY_REG_KEY1_SHIFT      (0)
-#define keypad_readl(off)       __raw_readl(keypad->mmio_base + (off))
+#define EP93XX_MATRIX_SIZE      (EP93XX_MATRIX_ROWS * EP93XX_MATRIX_COLS)
-#define keypad_writel(v, off)   __raw_writel((v), keypad->mmio_base + (off))
-#define MAX_MATRIX_KEY_NUM      (MAX_MATRIX_KEY_ROWS * MAX_MATRIX_KEY_COLS)
 struct ep93xx_keypad {
        struct ep93xx_keypad_platform_data *pdata;
-        struct clk *clk;
        struct input_dev *input_dev;
+        struct clk *clk;
        void __iomem *mmio_base;
-        int irq;
+        unsigned int matrix_keycodes[EP93XX_MATRIX_SIZE];
-        int enabled;
        int key1;
        int key2;
-        unsigned int matrix_keycodes[MAX_MATRIX_KEY_NUM];
+        int irq;
+        bool enabled;
 };
 static void ep93xx_keypad_build_keycode(struct ep93xx_keypad *keypad)
 {
        struct ep93xx_keypad_platform_data *pdata = keypad->pdata;
        struct input_dev *input_dev = keypad->input_dev;
+        unsigned int *key;
        int i;
-        for (i = 0; i < pdata->matrix_key_map_size; i++) {
+        key = &pdata->matrix_key_map[0];
-                unsigned int key = pdata->matrix_key_map[i];
+        for (i = 0; i < pdata->matrix_key_map_size; i++, key++) {
-                int row = (key >> 28) & 0xf;
+                int row = KEY_ROW(*key);
-                int col = (key >> 24) & 0xf;
+                int col = KEY_COL(*key);
-                int code = key & 0xffffff;
+                int code = KEY_VAL(*key);
                keypad->matrix_keycodes[(row << 3) + col] = code;
                __set_bit(code, input_dev->keybit);
@@ -102,9 +101,11 @@ static irqreturn_t ep93xx_keypad_irq_handler(int irq, void *dev_id)
 {
        struct ep93xx_keypad *keypad = dev_id;
        struct input_dev *input_dev = keypad->input_dev;
-        unsigned int status = keypad_readl(KEY_REG);
+        unsigned int status;
        int keycode, key1, key2;
+        status = __raw_readl(keypad->mmio_base + KEY_REG);
        keycode = (status & KEY_REG_KEY1_MASK) >> KEY_REG_KEY1_SHIFT;
        key1 = keypad->matrix_keycodes[keycode];
@@ -152,7 +153,10 @@ static void ep93xx_keypad_config(struct ep93xx_keypad *keypad)
        struct ep93xx_keypad_platform_data *pdata = keypad->pdata;
        unsigned int val = 0;
-        clk_set_rate(keypad->clk, pdata->flags & EP93XX_KEYPAD_KDIV);
+        if (pdata->flags & EP93XX_KEYPAD_KDIV)
+                clk_set_rate(keypad->clk, EP93XX_KEYTCHCLK_DIV4);
+        else
+                clk_set_rate(keypad->clk, EP93XX_KEYTCHCLK_DIV16);
        if (pdata->flags & EP93XX_KEYPAD_DISABLE_3_KEY)
                val |= KEY_INIT_DIS3KY;
@@ -167,7 +171,7 @@ static void ep93xx_keypad_config(struct ep93xx_keypad *keypad)
        val |= ((pdata->prescale << KEY_INIT_PRSCL_SHIFT) & KEY_INIT_PRSCL_MASK);
-        keypad_writel(val, KEY_INIT);
+        __raw_writel(val, keypad->mmio_base + KEY_INIT);
 }
 static int ep93xx_keypad_open(struct input_dev *pdev)
@@ -177,7 +181,7 @@ static int ep93xx_keypad_open(struct input_dev *pdev)
        if (!keypad->enabled) {
                ep93xx_keypad_config(keypad);
                clk_enable(keypad->clk);
-                keypad->enabled = 1;
+                keypad->enabled = true;
        }
        return 0;
@@ -189,7 +193,7 @@ static void ep93xx_keypad_close(struct input_dev *pdev)
        if (keypad->enabled) {
                clk_disable(keypad->clk);
-                keypad->enabled = 0;
+                keypad->enabled = false;
        }
 }
@@ -211,7 +215,7 @@ static int ep93xx_keypad_suspend(struct platform_device *pdev,
        if (keypad->enabled) {
                clk_disable(keypad->clk);
-                keypad->enabled = 0;
+                keypad->enabled = false;
        }
        mutex_unlock(&input_dev->mutex);
@@ -236,7 +240,7 @@ static int ep93xx_keypad_resume(struct platform_device *pdev)
                if (!keypad->enabled) {
                        ep93xx_keypad_config(keypad);
                        clk_enable(keypad->clk);
-                        keypad->enabled = 1;
+                        keypad->enabled = true;
                }
        }
@@ -252,88 +256,56 @@ static int ep93xx_keypad_resume(struct platform_device *pdev)
 static int __devinit ep93xx_keypad_probe(struct platform_device *pdev)
 {
        struct ep93xx_keypad *keypad;
-        struct ep93xx_keypad_platform_data *pdata = pdev->dev.platform_data;
        struct input_dev *input_dev;
        struct resource *res;
-        int irq, err, i, gpio;
+        int err;
-        if (!pdata ||
-            !pdata->matrix_key_rows ||
-            pdata->matrix_key_rows > MAX_MATRIX_KEY_ROWS ||
-            !pdata->matrix_key_cols ||
-            pdata->matrix_key_cols > MAX_MATRIX_KEY_COLS) {
-                dev_err(&pdev->dev, "invalid or missing platform data\n");
-                return -EINVAL;
-        }
        keypad = kzalloc(sizeof(struct ep93xx_keypad), GFP_KERNEL);
-        if (!keypad) {
+        if (!keypad)
-                dev_err(&pdev->dev, "failed to allocate driver data\n");
                return -ENOMEM;
-        }
-        keypad->pdata = pdata;
+        keypad->pdata = pdev->dev.platform_data;
+        if (!keypad->pdata) {
+                err = -EINVAL;
+                goto failed_free;
+        }
-        irq = platform_get_irq(pdev, 0);
+        keypad->irq = platform_get_irq(pdev, 0);
-        if (irq < 0) {
+        if (!keypad->irq) {
-                dev_err(&pdev->dev, "failed to get keypad irq\n");
                err = -ENXIO;
                goto failed_free;
        }
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        if (!res) {
-                dev_err(&pdev->dev, "failed to get I/O memory\n");
                err = -ENXIO;
                goto failed_free;
        }
        res = request_mem_region(res->start, resource_size(res), pdev->name);
        if (!res) {
-                dev_err(&pdev->dev, "failed to request I/O memory\n");
                err = -EBUSY;
                goto failed_free;
        }
        keypad->mmio_base = ioremap(res->start, resource_size(res));
        if (keypad->mmio_base == NULL) {
-                dev_err(&pdev->dev, "failed to remap I/O memory\n");
                err = -ENXIO;
                goto failed_free_mem;
        }
-        /* Request the needed GPIO's */
+        err = ep93xx_keypad_acquire_gpio(pdev);
-        gpio = EP93XX_GPIO_LINE_ROW0;
+        if (err)
-        for (i = 0; i < keypad->pdata->matrix_key_rows; i++, gpio++) {
+                goto failed_free_io;
-                err = gpio_request(gpio, pdev->name);
-                if (err) {
-                        dev_err(&pdev->dev, "failed to request gpio-%d\n",
-                                gpio);
-                        goto failed_free_rows;
-                }
-        }
-        gpio = EP93XX_GPIO_LINE_COL0;
-        for (i = 0; i < keypad->pdata->matrix_key_cols; i++, gpio++) {
-                err = gpio_request(gpio, pdev->name);
-                if (err) {
-                        dev_err(&pdev->dev, "failed to request gpio-%d\n",
-                                gpio);
-                        goto failed_free_cols;
-                }
-        }
-        keypad->clk = clk_get(&pdev->dev, "key_clk");
+        keypad->clk = clk_get(&pdev->dev, NULL);
        if (IS_ERR(keypad->clk)) {
-                dev_err(&pdev->dev, "failed to get keypad clock\n");
                err = PTR_ERR(keypad->clk);
-                goto failed_free_io;
+                goto failed_free_gpio;
        }
-        /* Create and register the input driver */
        input_dev = input_allocate_device();
        if (!input_dev) {
-                dev_err(&pdev->dev, "failed to allocate input device\n");
                err = -ENOMEM;
                goto failed_put_clk;
        }
@@ -358,44 +330,29 @@ static int __devinit ep93xx_keypad_probe(struct platform_device *pdev)
        ep93xx_keypad_build_keycode(keypad);
        platform_set_drvdata(pdev, keypad);
-        err = request_irq(irq, ep93xx_keypad_irq_handler, IRQF_DISABLED,
+        err = request_irq(keypad->irq, ep93xx_keypad_irq_handler,
-                                pdev->name, keypad);
+                          IRQF_DISABLED, pdev->name, keypad);
-        if (err) {
+        if (err)
-                dev_err(&pdev->dev, "failed to request IRQ\n");
                goto failed_free_dev;
-        }
-        keypad->irq = irq;
-        /* Register the input device */
        err = input_register_device(input_dev);
-        if (err) {
+        if (err)
-                dev_err(&pdev->dev, "failed to register input device\n");
                goto failed_free_irq;
-        }
        device_init_wakeup(&pdev->dev, 1);
        return 0;
 failed_free_irq:
-        free_irq(irq, pdev);
+        free_irq(keypad->irq, pdev);
        platform_set_drvdata(pdev, NULL);
 failed_free_dev:
        input_free_device(input_dev);
 failed_put_clk:
        clk_put(keypad->clk);
+failed_free_gpio:
+        ep93xx_keypad_release_gpio(pdev);
 failed_free_io:
-        i = keypad->pdata->matrix_key_cols - 1;
-        gpio = EP93XX_GPIO_LINE_COL0 + i;
-failed_free_cols:
-        for ( ; i >= 0; i--, gpio--)
-                gpio_free(gpio);
-        i = keypad->pdata->matrix_key_rows - 1;
-        gpio = EP93XX_GPIO_LINE_ROW0 + i;
-failed_free_rows:
-        for ( ; i >= 0; i--, gpio--)
-                gpio_free(gpio);
        iounmap(keypad->mmio_base);
 failed_free_mem:
        release_mem_region(res->start, resource_size(res));
@@ -408,7 +365,6 @@ static int __devexit ep93xx_keypad_remove(struct platform_device *pdev)
 {
        struct ep93xx_keypad *keypad = platform_get_drvdata(pdev);
        struct resource *res;
-        int i, gpio;
        free_irq(keypad->irq, pdev);
@@ -420,15 +376,7 @@ static int __devexit ep93xx_keypad_remove(struct platform_device *pdev)
        input_unregister_device(keypad->input_dev);
-        i = keypad->pdata->matrix_key_cols - 1;
+        ep93xx_keypad_release_gpio(pdev);
-        gpio = EP93XX_GPIO_LINE_COL0 + i;
-        for ( ; i >= 0; i--, gpio--)
-                gpio_free(gpio);
-        i = keypad->pdata->matrix_key_rows - 1;
-        gpio = EP93XX_GPIO_LINE_ROW0 + i;
-        for ( ; i >= 0; i--, gpio--)
-                gpio_free(gpio);
        iounmap(keypad->mmio_base);
diff --git a/drivers/input/mouse/alps.c b/drivers/input/mouse/alps.c
index a3f492a50850..f93c2c0daf1f 100644
--- a/drivers/input/mouse/alps.c
+++ b/drivers/input/mouse/alps.c
@@ -5,6 +5,7 @@
 * Copyright (c) 2003-2005 Peter Osterlund <petero2@telia.com>
 * Copyright (c) 2004 Dmitry Torokhov <dtor@mail.ru>
 * Copyright (c) 2005 Vojtech Pavlik <vojtech@suse.cz>
+ * Copyright (c) 2009 Sebastian Kapfer <sebastian_kapfer@gmx.net>
 *
 * ALPS detection, tap switching and status querying info is taken from
 * tpconfig utility (by C. Scott Ananian and Bruce Kall).
@@ -28,7 +29,6 @@
 #define dbg(format, arg...) do {} while (0)
 #endif
 #define ALPS_OLDPROTO           0x01    /* old style input */
 #define ALPS_DUALPOINT          0x02    /* touchpad has trackstick */
 #define ALPS_PASS               0x04    /* device has a pass-through port */
@@ -37,7 +37,8 @@
 #define ALPS_FW_BK_1            0x10    /* front & back buttons present */
 #define ALPS_FW_BK_2            0x20    /* front & back buttons present */
 #define ALPS_FOUR_BUTTONS       0x40    /* 4 direction button present */
+#define ALPS_PS2_INTERLEAVED    0x80    /* 3-byte PS/2 packet interleaved with
+                                           6-byte ALPS packet */
 static const struct alps_model_info alps_model_data[] = {
        { { 0x32, 0x02, 0x14 }, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, /* Toshiba Salellite Pro M10 */
@@ -58,7 +59,9 @@ static const struct alps_model_info alps_model_data[] = {
        { { 0x20, 0x02, 0x0e }, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, /* XXX */
        { { 0x22, 0x02, 0x0a }, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT },
        { { 0x22, 0x02, 0x14 }, 0xff, 0xff, ALPS_PASS | ALPS_DUALPOINT }, /* Dell Latitude D600 */
-        { { 0x62, 0x02, 0x14 }, 0xcf, 0xcf, ALPS_PASS | ALPS_DUALPOINT }, /* Dell Latitude E6500 */
+        /* Dell Latitude E5500, E6400, E6500, Precision M4400 */
+        { { 0x62, 0x02, 0x14 }, 0xcf, 0xcf,
+                ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED },
        { { 0x73, 0x02, 0x50 }, 0xcf, 0xcf, ALPS_FOUR_BUTTONS },          /* Dell Vostro 1400 */
 };
@@ -69,20 +72,88 @@ static const struct alps_model_info alps_model_data[] = {
 */
 /*
- * ALPS abolute Mode - new format
+ * PS/2 packet format
+ *
+ * byte 0:  0    0 YSGN XSGN    1    M    R    L
+ * byte 1: X7   X6   X5   X4   X3   X2   X1   X0
+ * byte 2: Y7   Y6   Y5   Y4   Y3   Y2   Y1   Y0
+ *
+ * Note that the device never signals overflow condition.
+ *
+ * ALPS absolute Mode - new format
 *
 * byte 0:  1    ?    ?    ?    1    ?    ?    ?
 * byte 1:  0   x6   x5   x4   x3   x2   x1   x0
- * byte 2:  0   x10  x9   x8   x7    ?  fin  ges
+ * byte 2:  0  x10   x9   x8   x7    ?  fin  ges
 * byte 3:  0   y9   y8   y7    1    M    R    L
 * byte 4:  0   y6   y5   y4   y3   y2   y1   y0
 * byte 5:  0   z6   z5   z4   z3   z2   z1   z0
 *
+ * Dualpoint device -- interleaved packet format
+ *
+ * byte 0:    1    1    0    0    1    1    1    1
+ * byte 1:    0   x6   x5   x4   x3   x2   x1   x0
+ * byte 2:    0  x10   x9   x8   x7    0  fin  ges
+ * byte 3:    0    0 YSGN XSGN    1    1    1    1
+ * byte 4:   X7   X6   X5   X4   X3   X2   X1   X0
+ * byte 5:   Y7   Y6   Y5   Y4   Y3   Y2   Y1   Y0
+ * byte 6:    0   y9   y8   y7    1    m    r    l
+ * byte 7:    0   y6   y5   y4   y3   y2   y1   y0
+ * byte 8:    0   z6   z5   z4   z3   z2   z1   z0
+ *
+ * CAPITALS = stick, miniscules = touchpad
+ *
 * ?'s can have different meanings on different models,
 * such as wheel rotation, extra buttons, stick buttons
 * on a dualpoint, etc.
 */
+static bool alps_is_valid_first_byte(const struct alps_model_info *model,
+                                     unsigned char data)
+{
+        return (data & model->mask0) == model->byte0;
+}
+static void alps_report_buttons(struct psmouse *psmouse,
+                                struct input_dev *dev1, struct input_dev *dev2,
+                                int left, int right, int middle)
+{
+        struct alps_data *priv = psmouse->private;
+        const struct alps_model_info *model = priv->i;
+        if (model->flags & ALPS_PS2_INTERLEAVED) {
+                struct input_dev *dev;
+                /*
+                 * If shared button has already been reported on the
+                 * other device (dev2) then this event should be also
+                 * sent through that device.
+                 */
+                dev = test_bit(BTN_LEFT, dev2->key) ? dev2 : dev1;
+                input_report_key(dev, BTN_LEFT, left);
+                dev = test_bit(BTN_RIGHT, dev2->key) ? dev2 : dev1;
+                input_report_key(dev, BTN_RIGHT, right);
+                dev = test_bit(BTN_MIDDLE, dev2->key) ? dev2 : dev1;
+                input_report_key(dev, BTN_MIDDLE, middle);
+                /*
+                 * Sync the _other_ device now, we'll do the first
+                 * device later once we report the rest of the events.
+                 */
+                input_sync(dev2);
+        } else {
+                /*
+                 * For devices with non-interleaved packets we know what
+                 * device buttons belong to so we can simply report them.
+                 */
+                input_report_key(dev1, BTN_LEFT, left);
+                input_report_key(dev1, BTN_RIGHT, right);
+                input_report_key(dev1, BTN_MIDDLE, middle);
+        }
+}
 static void alps_process_packet(struct psmouse *psmouse)
 {
        struct alps_data *priv = psmouse->private;
@@ -93,18 +164,6 @@ static void alps_process_packet(struct psmouse *psmouse)
        int x, y, z, ges, fin, left, right, middle;
        int back = 0, forward = 0;
-        if ((packet[0] & 0xc8) == 0x08) {   /* 3-byte PS/2 packet */
-                input_report_key(dev2, BTN_LEFT,   packet[0] & 1);
-                input_report_key(dev2, BTN_RIGHT,  packet[0] & 2);
-                input_report_key(dev2, BTN_MIDDLE, packet[0] & 4);
-                input_report_rel(dev2, REL_X,
-                        packet[1] ? packet[1] - ((packet[0] << 4) & 0x100) : 0);
-                input_report_rel(dev2, REL_Y,
-                        packet[2] ? ((packet[0] << 3) & 0x100) - packet[2] : 0);
-                input_sync(dev2);
-                return;
-        }
        if (model->flags & ALPS_OLDPROTO) {
                left = packet[2] & 0x10;
                right = packet[2] & 0x08;
@@ -140,18 +199,13 @@ static void alps_process_packet(struct psmouse *psmouse)
                input_report_rel(dev2, REL_X,  (x > 383 ? (x - 768) : x));
                input_report_rel(dev2, REL_Y, -(y > 255 ? (y - 512) : y));
-                input_report_key(dev2, BTN_LEFT, left);
+                alps_report_buttons(psmouse, dev2, dev, left, right, middle);
-                input_report_key(dev2, BTN_RIGHT, right);
-                input_report_key(dev2, BTN_MIDDLE, middle);
-                input_sync(dev);
                input_sync(dev2);
                return;
        }
-        input_report_key(dev, BTN_LEFT, left);
+        alps_report_buttons(psmouse, dev, dev2, left, right, middle);
-        input_report_key(dev, BTN_RIGHT, right);
-        input_report_key(dev, BTN_MIDDLE, middle);
        /* Convert hardware tap to a reasonable Z value */
        if (ges && !fin)
@@ -202,25 +256,168 @@ static void alps_process_packet(struct psmouse *psmouse)
        input_sync(dev);
 }
+static void alps_report_bare_ps2_packet(struct psmouse *psmouse,
+                                        unsigned char packet[],
+                                        bool report_buttons)
+{
+        struct alps_data *priv = psmouse->private;
+        struct input_dev *dev2 = priv->dev2;
+        if (report_buttons)
+                alps_report_buttons(psmouse, dev2, psmouse->dev,
+                                packet[0] & 1, packet[0] & 2, packet[0] & 4);
+        input_report_rel(dev2, REL_X,
+                packet[1] ? packet[1] - ((packet[0] << 4) & 0x100) : 0);
+        input_report_rel(dev2, REL_Y,
+                packet[2] ? ((packet[0] << 3) & 0x100) - packet[2] : 0);
+        input_sync(dev2);
+}
+static psmouse_ret_t alps_handle_interleaved_ps2(struct psmouse *psmouse)
+{
+        struct alps_data *priv = psmouse->private;
+        if (psmouse->pktcnt < 6)
+                return PSMOUSE_GOOD_DATA;
+        if (psmouse->pktcnt == 6) {
+                /*
+                 * Start a timer to flush the packet if it ends up last
+                 * 6-byte packet in the stream. Timer needs to fire
+                 * psmouse core times out itself. 20 ms should be enough
+                 * to decide if we are getting more data or not.
+                 */
+                mod_timer(&priv->timer, jiffies + msecs_to_jiffies(20));
+                return PSMOUSE_GOOD_DATA;
+        }
+        del_timer(&priv->timer);
+        if (psmouse->packet[6] & 0x80) {
+                /*
+                 * Highest bit is set - that means we either had
+                 * complete ALPS packet and this is start of the
+                 * next packet or we got garbage.
+                 */
+                if (((psmouse->packet[3] |
+                      psmouse->packet[4] |
+                      psmouse->packet[5]) & 0x80) ||
+                    (!alps_is_valid_first_byte(priv->i, psmouse->packet[6]))) {
+                        dbg("refusing packet %x %x %x %x "
+                            "(suspected interleaved ps/2)\n",
+                            psmouse->packet[3], psmouse->packet[4],
+                            psmouse->packet[5], psmouse->packet[6]);
+                        return PSMOUSE_BAD_DATA;
+                }
+                alps_process_packet(psmouse);
+                /* Continue with the next packet */
+                psmouse->packet[0] = psmouse->packet[6];
+                psmouse->pktcnt = 1;
+        } else {
+                /*
+                 * High bit is 0 - that means that we indeed got a PS/2
+                 * packet in the middle of ALPS packet.
+                 *
+                 * There is also possibility that we got 6-byte ALPS
+                 * packet followed  by 3-byte packet from trackpoint. We
+                 * can not distinguish between these 2 scenarios but
+                 * becase the latter is unlikely to happen in course of
+                 * normal operation (user would need to press all
+                 * buttons on the pad and start moving trackpoint
+                 * without touching the pad surface) we assume former.
+                 * Even if we are wrong the wost thing that would happen
+                 * the cursor would jump but we should not get protocol
+                 * desynchronization.
+                 */
+                alps_report_bare_ps2_packet(psmouse, &psmouse->packet[3],
+                                            false);
+                /*
+                 * Continue with the standard ALPS protocol handling,
+                 * but make sure we won't process it as an interleaved
+                 * packet again, which may happen if all buttons are
+                 * pressed. To avoid this let's reset the 4th bit which
+                 * is normally 1.
+                 */
+                psmouse->packet[3] = psmouse->packet[6] & 0xf7;
+                psmouse->pktcnt = 4;
+        }
+        return PSMOUSE_GOOD_DATA;
+}
+static void alps_flush_packet(unsigned long data)
+{
+        struct psmouse *psmouse = (struct psmouse *)data;
+        serio_pause_rx(psmouse->ps2dev.serio);
+        if (psmouse->pktcnt == 6) {
+                /*
+                 * We did not any more data in reasonable amount of time.
+                 * Validate the last 3 bytes and process as a standard
+                 * ALPS packet.
+                 */
+                if ((psmouse->packet[3] |
+                     psmouse->packet[4] |
+                     psmouse->packet[5]) & 0x80) {
+                        dbg("refusing packet %x %x %x "
+                            "(suspected interleaved ps/2)\n",
+                            psmouse->packet[3], psmouse->packet[4],
+                            psmouse->packet[5]);
+                } else {
+                        alps_process_packet(psmouse);
+                }
+                psmouse->pktcnt = 0;
+        }
+        serio_continue_rx(psmouse->ps2dev.serio);
+}
 static psmouse_ret_t alps_process_byte(struct psmouse *psmouse)
 {
        struct alps_data *priv = psmouse->private;
+        const struct alps_model_info *model = priv->i;
        if ((psmouse->packet[0] & 0xc8) == 0x08) { /* PS/2 packet */
                if (psmouse->pktcnt == 3) {
-                        alps_process_packet(psmouse);
+                        alps_report_bare_ps2_packet(psmouse, psmouse->packet,
+                                                    true);
                        return PSMOUSE_FULL_PACKET;
                }
                return PSMOUSE_GOOD_DATA;
        }
-        if ((psmouse->packet[0] & priv->i->mask0) != priv->i->byte0)
+        /* Check for PS/2 packet stuffed in the middle of ALPS packet. */
+        if ((model->flags & ALPS_PS2_INTERLEAVED) &&
+            psmouse->pktcnt >= 4 && (psmouse->packet[3] & 0x0f) == 0x0f) {
+                return alps_handle_interleaved_ps2(psmouse);
+        }
+        if (!alps_is_valid_first_byte(model, psmouse->packet[0])) {
+                dbg("refusing packet[0] = %x (mask0 = %x, byte0 = %x)\n",
+                    psmouse->packet[0], model->mask0, model->byte0);
                return PSMOUSE_BAD_DATA;
+        }
        /* Bytes 2 - 6 should have 0 in the highest bit */
        if (psmouse->pktcnt >= 2 && psmouse->pktcnt <= 6 &&
-            (psmouse->packet[psmouse->pktcnt - 1] & 0x80))
+            (psmouse->packet[psmouse->pktcnt - 1] & 0x80)) {
+                dbg("refusing packet[%i] = %x\n",
+                    psmouse->pktcnt - 1, psmouse->packet[psmouse->pktcnt - 1]);
                return PSMOUSE_BAD_DATA;
+        }
        if (psmouse->pktcnt == 6) {
                alps_process_packet(psmouse);
@@ -459,6 +656,7 @@ static void alps_disconnect(struct psmouse *psmouse)
        struct alps_data *priv = psmouse->private;
        psmouse_reset(psmouse);
+        del_timer_sync(&priv->timer);
        input_unregister_device(priv->dev2);
        kfree(priv);
 }
@@ -476,6 +674,8 @@ int alps_init(struct psmouse *psmouse)
                goto init_fail;
        priv->dev2 = dev2;
+        setup_timer(&priv->timer, alps_flush_packet, (unsigned long)psmouse);
        psmouse->private = priv;
        model = alps_get_model(psmouse, &version);
@@ -487,6 +687,17 @@ int alps_init(struct psmouse *psmouse)
        if (alps_hw_init(psmouse))
                goto init_fail;
+        /*
+         * Undo part of setup done for us by psmouse core since touchpad
+         * is not a relative device.
+         */
+        __clear_bit(EV_REL, dev1->evbit);
+        __clear_bit(REL_X, dev1->relbit);
+        __clear_bit(REL_Y, dev1->relbit);
+        /*
+         * Now set up our capabilities.
+         */
        dev1->evbit[BIT_WORD(EV_KEY)] |= BIT_MASK(EV_KEY);
        dev1->keybit[BIT_WORD(BTN_TOUCH)] |= BIT_MASK(BTN_TOUCH);
        dev1->keybit[BIT_WORD(BTN_TOOL_FINGER)] |= BIT_MASK(BTN_TOOL_FINGER);
diff --git a/drivers/input/mouse/alps.h b/drivers/input/mouse/alps.h
index bc87936fee1a..904ed8b3c8be 100644
--- a/drivers/input/mouse/alps.h
+++ b/drivers/input/mouse/alps.h
@@ -23,6 +23,7 @@ struct alps_data {
        char phys[32];                  /* Phys */
        const struct alps_model_info *i;/* Info */
        int prev_fin;                   /* Finger bit from previous packet */
+        struct timer_list timer;
 };
 #ifdef CONFIG_MOUSE_PS2_ALPS
diff --git a/drivers/input/serio/altera_ps2.c b/drivers/input/serio/altera_ps2.c
index f479ea50919f..320b7ca48bf8 100644
--- a/drivers/input/serio/altera_ps2.c
+++ b/drivers/input/serio/altera_ps2.c
@@ -79,11 +79,11 @@ static void altera_ps2_close(struct serio *io)
 /*
 * Add one device to this driver.
 */
-static int altera_ps2_probe(struct platform_device *pdev)
+static int __devinit altera_ps2_probe(struct platform_device *pdev)
 {
        struct ps2if *ps2if;
        struct serio *serio;
-        int error;
+        int error, irq;
        ps2if = kzalloc(sizeof(struct ps2if), GFP_KERNEL);
        serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
@@ -108,11 +108,13 @@ static int altera_ps2_probe(struct platform_device *pdev)
                goto err_free_mem;
        }
-        ps2if->irq  = platform_get_irq(pdev, 0);
-        if (ps2if->irq < 0) {
+        irq = platform_get_irq(pdev, 0);
+        if (irq < 0) {
                error = -ENXIO;
                goto err_free_mem;
        }
+        ps2if->irq = irq;
        if (!request_mem_region(ps2if->iomem_res->start,
                                resource_size(ps2if->iomem_res), pdev->name)) {
@@ -155,7 +157,7 @@ static int altera_ps2_probe(struct platform_device *pdev)
 /*
 * Remove one device from this driver.
 */
-static int altera_ps2_remove(struct platform_device *pdev)
+static int __devexit altera_ps2_remove(struct platform_device *pdev)
 {
        struct ps2if *ps2if = platform_get_drvdata(pdev);
@@ -175,9 +177,10 @@ static int altera_ps2_remove(struct platform_device *pdev)
 */
 static struct platform_driver altera_ps2_driver = {
        .probe          = altera_ps2_probe,
-        .remove         = altera_ps2_remove,
+        .remove         = __devexit_p(altera_ps2_remove),
        .driver = {
                .name   = DRV_NAME,
+                .owner  = THIS_MODULE,
        },
 };
diff --git a/drivers/input/serio/ambakmi.c b/drivers/input/serio/ambakmi.c
index 89b394183a75..92563a681d65 100644
--- a/drivers/input/serio/ambakmi.c
+++ b/drivers/input/serio/ambakmi.c
@@ -107,7 +107,7 @@ static void amba_kmi_close(struct serio *io)
        clk_disable(kmi->clk);
 }
-static int amba_kmi_probe(struct amba_device *dev, struct amba_id *id)
+static int __devinit amba_kmi_probe(struct amba_device *dev, struct amba_id *id)
 {
        struct amba_kmi_port *kmi;
        struct serio *io;
@@ -134,7 +134,7 @@ static int amba_kmi_probe(struct amba_device *dev, struct amba_id *id)
        io->port_data   = kmi;
        io->dev.parent  = &dev->dev;
-        kmi->io         = io;
+        kmi->io         = io;
        kmi->base       = ioremap(dev->res.start, resource_size(&dev->res));
        if (!kmi->base) {
                ret = -ENOMEM;
@@ -162,7 +162,7 @@ static int amba_kmi_probe(struct amba_device *dev, struct amba_id *id)
        return ret;
 }
-static int amba_kmi_remove(struct amba_device *dev)
+static int __devexit amba_kmi_remove(struct amba_device *dev)
 {
        struct amba_kmi_port *kmi = amba_get_drvdata(dev);
@@ -197,10 +197,11 @@ static struct amba_id amba_kmi_idtable[] = {
 static struct amba_driver ambakmi_driver = {
        .drv            = {
                .name   = "kmi-pl050",
+                .owner  = THIS_MODULE,
        },
        .id_table       = amba_kmi_idtable,
        .probe          = amba_kmi_probe,
-        .remove         = amba_kmi_remove,
+        .remove         = __devexit_p(amba_kmi_remove),
        .resume         = amba_kmi_resume,
 };
diff --git a/drivers/input/serio/at32psif.c b/drivers/input/serio/at32psif.c
index a6fb7a3dcc46..b54452a8c771 100644
--- a/drivers/input/serio/at32psif.c
+++ b/drivers/input/serio/at32psif.c
@@ -137,7 +137,7 @@ static int psif_write(struct serio *io, unsigned char val)
        spin_lock_irqsave(&psif->lock, flags);
        while (!(psif_readl(psif, SR) & PSIF_BIT(TXEMPTY)) && timeout--)
-                msleep(10);
+                udelay(50);
        if (timeout >= 0) {
                psif_writel(psif, THR, val);
@@ -352,6 +352,7 @@ static struct platform_driver psif_driver = {
        .remove         = __exit_p(psif_remove),
        .driver         = {
                .name   = "atmel_psif",
+                .owner  = THIS_MODULE,
        },
        .suspend        = psif_suspend,
        .resume         = psif_resume,
diff --git a/drivers/input/serio/gscps2.c b/drivers/input/serio/gscps2.c
index bd0f92d9f40f..06addfa7cc47 100644
--- a/drivers/input/serio/gscps2.c
+++ b/drivers/input/serio/gscps2.c
@@ -6,7 +6,7 @@
 * Copyright (c) 2002 Thibaut Varene <varenet@parisc-linux.org>
 *
 * Pieces of code based on linux-2.4's hp_mouse.c & hp_keyb.c
- *      Copyright (c) 1999 Alex deVries <alex@onefishtwo.ca>
+ *      Copyright (c) 1999 Alex deVries <alex@onefishtwo.ca>
 *      Copyright (c) 1999-2000 Philipp Rumpf <prumpf@tux.org>
 *      Copyright (c) 2000 Xavier Debacker <debackex@esiee.fr>
 *      Copyright (c) 2000-2001 Thomas Marteau <marteaut@esiee.fr>
@@ -326,7 +326,7 @@ static void gscps2_close(struct serio *port)
 * @return: success/error report
 */
-static int __init gscps2_probe(struct parisc_device *dev)
+static int __devinit gscps2_probe(struct parisc_device *dev)
 {
        struct gscps2port *ps2port;
        struct serio *serio;
@@ -443,7 +443,7 @@ static struct parisc_driver parisc_ps2_driver = {
        .name           = "gsc_ps2",
        .id_table       = gscps2_device_tbl,
        .probe          = gscps2_probe,
-        .remove         = gscps2_remove,
+        .remove         = __devexit_p(gscps2_remove),
 };
 static int __init gscps2_init(void)
diff --git a/drivers/input/serio/hil_mlc.c b/drivers/input/serio/hil_mlc.c
index 7ba9f2b2c041..6cd03ebaf5fb 100644
--- a/drivers/input/serio/hil_mlc.c
+++ b/drivers/input/serio/hil_mlc.c
@@ -993,10 +993,8 @@ int hil_mlc_unregister(hil_mlc *mlc)
 static int __init hil_mlc_init(void)
 {
-        init_timer(&hil_mlcs_kicker);
+        setup_timer(&hil_mlcs_kicker, &hil_mlcs_timer, 0);
-        hil_mlcs_kicker.expires = jiffies + HZ;
+        mod_timer(&hil_mlcs_kicker, jiffies + HZ);
-        hil_mlcs_kicker.function = &hil_mlcs_timer;
-        add_timer(&hil_mlcs_kicker);
        tasklet_enable(&hil_mlcs_tasklet);
@@ -1005,7 +1003,7 @@ static int __init hil_mlc_init(void)
 static void __exit hil_mlc_exit(void)
 {
-        del_timer(&hil_mlcs_kicker);
+        del_timer_sync(&hil_mlcs_kicker);
        tasklet_disable(&hil_mlcs_tasklet);
        tasklet_kill(&hil_mlcs_tasklet);
diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h
index 7fbffe431bc5..64b688daf48a 100644
--- a/drivers/input/serio/i8042-x86ia64io.h
+++ b/drivers/input/serio/i8042-x86ia64io.h
@@ -158,6 +158,14 @@ static const struct dmi_system_id __initconst i8042_dmi_noloop_table[] = {
                },
        },
        {
+                /* Gigabyte M1022M netbook */
+                .matches = {
+                        DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co.,Ltd."),
+                        DMI_MATCH(DMI_BOARD_NAME, "M1022E"),
+                        DMI_MATCH(DMI_BOARD_VERSION, "1.02"),
+                },
+        },
+        {
                .matches = {
                        DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
                        DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv9700"),
diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c
index 1df02d25aca5..d84a36e545f6 100644
--- a/drivers/input/serio/i8042.c
+++ b/drivers/input/serio/i8042.c
@@ -126,6 +126,8 @@ static unsigned char i8042_suppress_kbd_ack;
 static struct platform_device *i8042_platform_device;
 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
+static bool (*i8042_platform_filter)(unsigned char data, unsigned char str,
+                                     struct serio *serio);
 void i8042_lock_chip(void)
 {
@@ -139,6 +141,48 @@ void i8042_unlock_chip(void)
 }
 EXPORT_SYMBOL(i8042_unlock_chip);
+int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
+                                        struct serio *serio))
+{
+        unsigned long flags;
+        int ret = 0;
+        spin_lock_irqsave(&i8042_lock, flags);
+        if (i8042_platform_filter) {
+                ret = -EBUSY;
+                goto out;
+        }
+        i8042_platform_filter = filter;
+out:
+        spin_unlock_irqrestore(&i8042_lock, flags);
+        return ret;
+}
+EXPORT_SYMBOL(i8042_install_filter);
+int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
+                                       struct serio *port))
+{
+        unsigned long flags;
+        int ret = 0;
+        spin_lock_irqsave(&i8042_lock, flags);
+        if (i8042_platform_filter != filter) {
+                ret = -EINVAL;
+                goto out;
+        }
+        i8042_platform_filter = NULL;
+out:
+        spin_unlock_irqrestore(&i8042_lock, flags);
+        return ret;
+}
+EXPORT_SYMBOL(i8042_remove_filter);
 /*
 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
 * be ready for reading values from it / writing values to it.
@@ -369,6 +413,31 @@ static void i8042_stop(struct serio *serio)
 }
 /*
+ * i8042_filter() filters out unwanted bytes from the input data stream.
+ * It is called from i8042_interrupt and thus is running with interrupts
+ * off and i8042_lock held.
+ */
+static bool i8042_filter(unsigned char data, unsigned char str,
+                         struct serio *serio)
+{
+        if (unlikely(i8042_suppress_kbd_ack)) {
+                if ((~str & I8042_STR_AUXDATA) &&
+                    (data == 0xfa || data == 0xfe)) {
+                        i8042_suppress_kbd_ack--;
+                        dbg("Extra keyboard ACK - filtered out\n");
+                        return true;
+                }
+        }
+        if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
+                dbg("Filtered out by platfrom filter\n");
+                return true;
+        }
+        return false;
+}
+/*
 * i8042_interrupt() is the most important function in this driver -
 * it handles the interrupts from the i8042, and sends incoming bytes
 * to the upper layers.
@@ -377,13 +446,16 @@ static void i8042_stop(struct serio *serio)
 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
 {
        struct i8042_port *port;
+        struct serio *serio;
        unsigned long flags;
        unsigned char str, data;
        unsigned int dfl;
        unsigned int port_no;
+        bool filtered;
        int ret = 1;
        spin_lock_irqsave(&i8042_lock, flags);
        str = i8042_read_status();
        if (unlikely(~str & I8042_STR_OBF)) {
                spin_unlock_irqrestore(&i8042_lock, flags);
@@ -391,8 +463,8 @@ static irqreturn_t i8042_interrupt(int irq, void *dev_id)
                ret = 0;
                goto out;
        }
        data = i8042_read_data();
-        spin_unlock_irqrestore(&i8042_lock, flags);
        if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
                static unsigned long last_transmit;
@@ -441,21 +513,19 @@ static irqreturn_t i8042_interrupt(int irq, void *dev_id)
        }
        port = &i8042_ports[port_no];
+        serio = port->exists ? port->serio : NULL;
        dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
            data, port_no, irq,
            dfl & SERIO_PARITY ? ", bad parity" : "",
            dfl & SERIO_TIMEOUT ? ", timeout" : "");
-        if (unlikely(i8042_suppress_kbd_ack))
+        filtered = i8042_filter(data, str, serio);
-                if (port_no == I8042_KBD_PORT_NO &&
-                    (data == 0xfa || data == 0xfe)) {
+        spin_unlock_irqrestore(&i8042_lock, flags);
-                        i8042_suppress_kbd_ack--;
-                        goto out;
-                }
-        if (likely(port->exists))
+        if (likely(port->exists && !filtered))
-                serio_interrupt(port->serio, data, dfl);
+                serio_interrupt(serio, data, dfl);
 out:
        return IRQ_RETVAL(ret);
diff --git a/drivers/input/serio/sa1111ps2.c b/drivers/input/serio/sa1111ps2.c
index f412c69478a8..d55874e5d1c2 100644
--- a/drivers/input/serio/sa1111ps2.c
+++ b/drivers/input/serio/sa1111ps2.c
@@ -180,8 +180,8 @@ static void __devinit ps2_clear_input(struct ps2if *ps2if)
        }
 }
-static inline unsigned int
+static unsigned int __devinit ps2_test_one(struct ps2if *ps2if,
-ps2_test_one(struct ps2if *ps2if, unsigned int mask)
+                                           unsigned int mask)
 {
        unsigned int val;
@@ -197,7 +197,7 @@ ps2_test_one(struct ps2if *ps2if, unsigned int mask)
 * Test the keyboard interface.  We basically check to make sure that
 * we can drive each line to the keyboard independently of each other.
 */
-static int __init ps2_test(struct ps2if *ps2if)
+static int __devinit ps2_test(struct ps2if *ps2if)
 {
        unsigned int stat;
        int ret = 0;
@@ -312,7 +312,7 @@ static int __devinit ps2_probe(struct sa1111_dev *dev)
 /*
 * Remove one device from this driver.
 */
-static int ps2_remove(struct sa1111_dev *dev)
+static int __devexit ps2_remove(struct sa1111_dev *dev)
 {
        struct ps2if *ps2if = sa1111_get_drvdata(dev);
@@ -335,7 +335,7 @@ static struct sa1111_driver ps2_driver = {
        },
        .devid          = SA1111_DEVID_PS2,
        .probe          = ps2_probe,
-        .remove         = ps2_remove,
+        .remove         = __devexit_p(ps2_remove),
 };
 static int __init ps2_init(void)
diff --git a/drivers/input/tablet/wacom.h b/drivers/input/tablet/wacom.h
index 9114ae1c7488..16310f368dab 100644
--- a/drivers/input/tablet/wacom.h
+++ b/drivers/input/tablet/wacom.h
@@ -1,7 +1,7 @@
 /*
 * drivers/input/tablet/wacom.h
 *
- *  USB Wacom Graphire and Wacom Intuos tablet support
+ *  USB Wacom tablet support
 *
 *  Copyright (c) 2000-2004 Vojtech Pavlik      <vojtech@ucw.cz>
 *  Copyright (c) 2000 Andreas Bach Aaen        <abach@stofanet.dk>
@@ -69,6 +69,9 @@
 *      v1.49 (pc) - Added support for USB Tablet PC (0x90, 0x93, and 0x9A)
 *      v1.50 (pc) - Fixed a TabletPC touch bug in 2.6.28
 *      v1.51 (pc) - Added support for Intuos4
+ *      v1.52 (pc) - Query Wacom data upon system resume
+ *                 - add defines for features->type
+ *                 - add new devices (0x9F, 0xE2, and 0XE3)
 */
 /*
@@ -89,9 +92,9 @@
 /*
 * Version Information
 */
-#define DRIVER_VERSION "v1.51"
+#define DRIVER_VERSION "v1.52"
 #define DRIVER_AUTHOR "Vojtech Pavlik <vojtech@ucw.cz>"
-#define DRIVER_DESC "USB Wacom Graphire and Wacom Intuos tablet driver"
+#define DRIVER_DESC "USB Wacom tablet driver"
 #define DRIVER_LICENSE "GPL"
 MODULE_AUTHOR(DRIVER_AUTHOR);
@@ -133,6 +136,8 @@ extern void input_dev_i4s(struct input_dev *input_dev, struct wacom_wac *wacom_w
 extern void input_dev_i4(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
 extern void input_dev_pl(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
 extern void input_dev_pt(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
+extern void input_dev_tpc(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
+extern void input_dev_tpc2fg(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
 extern void input_dev_mo(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
 extern void input_dev_bee(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
 extern __u16 wacom_le16_to_cpu(unsigned char *data);
diff --git a/drivers/input/tablet/wacom_sys.c b/drivers/input/tablet/wacom_sys.c
index ea30c983a33e..072f33b3b2b0 100644
--- a/drivers/input/tablet/wacom_sys.c
+++ b/drivers/input/tablet/wacom_sys.c
@@ -1,7 +1,7 @@
 /*
 * drivers/input/tablet/wacom_sys.c
 *
- *  USB Wacom Graphire and Wacom Intuos tablet support - system specific code
+ *  USB Wacom tablet support - system specific code
 */
 /*
@@ -209,6 +209,7 @@ void input_dev_g(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
        input_dev->keybit[BIT_WORD(BTN_MOUSE)] |= BIT_MASK(BTN_LEFT) |
                BIT_MASK(BTN_RIGHT) | BIT_MASK(BTN_MIDDLE);
        input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_RUBBER) |
+                BIT_MASK(BTN_TOOL_PEN) | BIT_MASK(BTN_STYLUS) |
                BIT_MASK(BTN_TOOL_MOUSE) | BIT_MASK(BTN_STYLUS2);
        input_set_abs_params(input_dev, ABS_DISTANCE, 0, wacom_wac->features->distance_max, 0, 0);
 }
@@ -256,6 +257,7 @@ void input_dev_i(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
                BIT_MASK(BTN_RIGHT) | BIT_MASK(BTN_MIDDLE) |
                BIT_MASK(BTN_SIDE) | BIT_MASK(BTN_EXTRA);
        input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_RUBBER) |
+                BIT_MASK(BTN_TOOL_PEN) | BIT_MASK(BTN_STYLUS) |
                BIT_MASK(BTN_TOOL_MOUSE) | BIT_MASK(BTN_TOOL_BRUSH) |
                BIT_MASK(BTN_TOOL_PENCIL) | BIT_MASK(BTN_TOOL_AIRBRUSH) |
                BIT_MASK(BTN_TOOL_LENS) | BIT_MASK(BTN_STYLUS2);
@@ -269,7 +271,8 @@ void input_dev_i(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
 void input_dev_pl(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
 {
-        input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_STYLUS2);
+        input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_PEN) |
+                BIT_MASK(BTN_STYLUS) | BIT_MASK(BTN_STYLUS2);
 }
 void input_dev_pt(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
@@ -277,12 +280,32 @@ void input_dev_pt(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
        input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_RUBBER);
 }
+void input_dev_tpc(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
+{
+        if (wacom_wac->features->device_type == BTN_TOOL_DOUBLETAP ||
+            wacom_wac->features->device_type == BTN_TOOL_TRIPLETAP) {
+                input_set_abs_params(input_dev, ABS_RX, 0, wacom_wac->features->x_phy, 0, 0);
+                input_set_abs_params(input_dev, ABS_RY, 0, wacom_wac->features->y_phy, 0, 0);
+                input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_DOUBLETAP);
+        }
+}
+void input_dev_tpc2fg(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
+{
+        if (wacom_wac->features->device_type == BTN_TOOL_TRIPLETAP) {
+                input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_TRIPLETAP);
+                input_dev->evbit[0] |= BIT_MASK(EV_MSC);
+                input_dev->mscbit[0] |= BIT_MASK(MSC_SERIAL);
+        }
+}
 static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hid_desc,
-                           struct wacom_wac *wacom_wac)
+                           struct wacom_features *features)
 {
        struct usb_device *dev = interface_to_usbdev(intf);
-        struct wacom_features *features = wacom_wac->features;
+        char limit = 0;
-        char limit = 0, result = 0;
+        /* result has to be defined as int for some devices */
+        int result = 0;
        int i = 0, usage = WCM_UNDEFINED, finger = 0, pen = 0;
        unsigned char *report;
@@ -328,13 +351,24 @@ static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hi
                        case HID_USAGE_X:
                                if (usage == WCM_DESKTOP) {
                                        if (finger) {
-                                                features->touch_x_max =
+                                                features->device_type = BTN_TOOL_DOUBLETAP;
-                                                        features->touch_y_max =
+                                                if (features->type == TABLETPC2FG) {
-                                                        wacom_le16_to_cpu(&report[i + 3]);
+                                                        /* need to reset back */
+                                                        features->pktlen = WACOM_PKGLEN_TPC2FG;
+                                                        features->device_type = BTN_TOOL_TRIPLETAP;
+                                                }
                                                features->x_max =
+                                                        wacom_le16_to_cpu(&report[i + 3]);
+                                                features->x_phy =
                                                        wacom_le16_to_cpu(&report[i + 6]);
-                                                i += 7;
+                                                features->unit = report[i + 9];
+                                                features->unitExpo = report[i + 11];
+                                                i += 12;
                                        } else if (pen) {
+                                                /* penabled only accepts exact bytes of data */
+                                                if (features->type == TABLETPC2FG)
+                                                        features->pktlen = WACOM_PKGLEN_PENABLED;
+                                                features->device_type = BTN_TOOL_PEN;
                                                features->x_max =
                                                        wacom_le16_to_cpu(&report[i + 3]);
                                                i += 4;
@@ -350,10 +384,35 @@ static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hi
                                break;
                        case HID_USAGE_Y:
-                                if (usage == WCM_DESKTOP)
+                                if (usage == WCM_DESKTOP) {
-                                        features->y_max =
+                                        if (finger) {
-                                                wacom_le16_to_cpu(&report[i + 3]);
+                                                features->device_type = BTN_TOOL_DOUBLETAP;
-                                i += 4;
+                                                if (features->type == TABLETPC2FG) {
+                                                        /* need to reset back */
+                                                        features->pktlen = WACOM_PKGLEN_TPC2FG;
+                                                        features->device_type = BTN_TOOL_TRIPLETAP;
+                                                        features->y_max =
+                                                                wacom_le16_to_cpu(&report[i + 3]);
+                                                        features->y_phy =
+                                                                wacom_le16_to_cpu(&report[i + 6]);
+                                                        i += 7;
+                                                } else {
+                                                        features->y_max =
+                                                                features->x_max;
+                                                        features->y_phy =
+                                                                wacom_le16_to_cpu(&report[i + 3]);
+                                                        i += 4;
+                                                }
+                                        } else if (pen) {
+                                                /* penabled only accepts exact bytes of data */
+                                                if (features->type == TABLETPC2FG)
+                                                        features->pktlen = WACOM_PKGLEN_PENABLED;
+                                                features->device_type = BTN_TOOL_PEN;
+                                                features->y_max =
+                                                        wacom_le16_to_cpu(&report[i + 3]);
+                                                i += 4;
+                                        }
+                                }
                                break;
                        case HID_USAGE_FINGER:
@@ -376,7 +435,7 @@ static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hi
                        break;
                case HID_COLLECTION:
-                        /* reset UsagePage ans Finger */
+                        /* reset UsagePage and Finger */
                        finger = usage = 0;
                        break;
                }
@@ -388,43 +447,92 @@ static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hi
        return result;
 }
-static int wacom_query_tablet_data(struct usb_interface *intf)
+static int wacom_query_tablet_data(struct usb_interface *intf, struct wacom_features *features)
 {
        unsigned char *rep_data;
-        int limit = 0;
+        int limit = 0, report_id = 2;
-        int error;
+        int error = -ENOMEM;
        rep_data = kmalloc(2, GFP_KERNEL);
        if (!rep_data)
-                return -ENOMEM;
+                return error;
-        do {
+        /* ask to report tablet data if it is 2FGT or not a Tablet PC */
-                rep_data[0] = 2;
+        if (features->device_type == BTN_TOOL_TRIPLETAP) {
-                rep_data[1] = 2;
+                do {
-                error = usb_set_report(intf, WAC_HID_FEATURE_REPORT,
+                        rep_data[0] = 3;
-                                        2, rep_data, 2);
+                        rep_data[1] = 4;
-                if (error >= 0)
+                        report_id = 3;
-                        error = usb_get_report(intf,
+                        error = usb_set_report(intf, WAC_HID_FEATURE_REPORT,
-                                                WAC_HID_FEATURE_REPORT, 2,
+                                report_id, rep_data, 2);
-                                                rep_data, 2);
+                        if (error >= 0)
-        } while ((error < 0 || rep_data[1] != 2) && limit++ < 5);
+                                error = usb_get_report(intf,
+                                        WAC_HID_FEATURE_REPORT, report_id,
+                                        rep_data, 3);
+                } while ((error < 0 || rep_data[1] != 4) && limit++ < 5);
+        } else if (features->type != TABLETPC && features->type != TABLETPC2FG) {
+                do {
+                        rep_data[0] = 2;
+                        rep_data[1] = 2;
+                        error = usb_set_report(intf, WAC_HID_FEATURE_REPORT,
+                                report_id, rep_data, 2);
+                        if (error >= 0)
+                                error = usb_get_report(intf,
+                                        WAC_HID_FEATURE_REPORT, report_id,
+                                        rep_data, 2);
+                } while ((error < 0 || rep_data[1] != 2) && limit++ < 5);
+        }
        kfree(rep_data);
        return error < 0 ? error : 0;
 }
+static int wacom_retrieve_hid_descriptor(struct usb_interface *intf,
+                struct wacom_features *features)
+{
+        int error = 0;
+        struct usb_host_interface *interface = intf->cur_altsetting;
+        struct hid_descriptor *hid_desc;
+        /* default device to penabled */
+        features->device_type = BTN_TOOL_PEN;
+        /* only Tablet PCs need to retrieve the info */
+        if ((features->type != TABLETPC) && (features->type != TABLETPC2FG))
+                goto out;
+        if (usb_get_extra_descriptor(interface, HID_DEVICET_HID, &hid_desc)) {
+                if (usb_get_extra_descriptor(&interface->endpoint[0],
+                                HID_DEVICET_REPORT, &hid_desc)) {
+                        printk("wacom: can not retrieve extra class descriptor\n");
+                        error = 1;
+                        goto out;
+                }
+        }
+        error = wacom_parse_hid(intf, hid_desc, features);
+        if (error)
+                goto out;
+        /* touch device found but size is not defined. use default */
+        if (features->device_type == BTN_TOOL_DOUBLETAP && !features->x_max) {
+                features->x_max = 1023;
+                features->y_max = 1023;
+        }
+ out:
+        return error;
+}
 static int wacom_probe(struct usb_interface *intf, const struct usb_device_id *id)
 {
        struct usb_device *dev = interface_to_usbdev(intf);
-        struct usb_host_interface *interface = intf->cur_altsetting;
        struct usb_endpoint_descriptor *endpoint;
        struct wacom *wacom;
        struct wacom_wac *wacom_wac;
        struct wacom_features *features;
        struct input_dev *input_dev;
        int error = -ENOMEM;
-        struct hid_descriptor *hid_desc;
        wacom = kzalloc(sizeof(struct wacom), GFP_KERNEL);
        wacom_wac = kzalloc(sizeof(struct wacom_wac), GFP_KERNEL);
@@ -432,7 +540,7 @@ static int wacom_probe(struct usb_interface *intf, const struct usb_device_id *i
        if (!wacom || !input_dev || !wacom_wac)
                goto fail1;
-        wacom_wac->data = usb_buffer_alloc(dev, 10, GFP_KERNEL, &wacom->data_dma);
+        wacom_wac->data = usb_buffer_alloc(dev, WACOM_PKGLEN_MAX, GFP_KERNEL, &wacom->data_dma);
        if (!wacom_wac->data)
                goto fail1;
@@ -448,7 +556,7 @@ static int wacom_probe(struct usb_interface *intf, const struct usb_device_id *i
        strlcat(wacom->phys, "/input0", sizeof(wacom->phys));
        wacom_wac->features = features = get_wacom_feature(id);
-        BUG_ON(features->pktlen > 10);
+        BUG_ON(features->pktlen > WACOM_PKGLEN_MAX);
        input_dev->name = wacom_wac->features->name;
        wacom->wacom_wac = wacom_wac;
@@ -463,47 +571,24 @@ static int wacom_probe(struct usb_interface *intf, const struct usb_device_id *i
        endpoint = &intf->cur_altsetting->endpoint[0].desc;
-        /* Initialize touch_x_max and touch_y_max in case it is not defined */
+        /* Retrieve the physical and logical size for OEM devices */
-        if (wacom_wac->features->type == TABLETPC) {
+        error = wacom_retrieve_hid_descriptor(intf, features);
-                features->touch_x_max = 1023;
+        if (error)
-                features->touch_y_max = 1023;
+                goto fail2;
-        } else {
-                features->touch_x_max = 0;
-                features->touch_y_max = 0;
-        }
-        /* TabletPC need to retrieve the physical and logical maximum from report descriptor */
-        if (wacom_wac->features->type == TABLETPC) {
-                if (usb_get_extra_descriptor(interface, HID_DEVICET_HID, &hid_desc)) {
-                        if (usb_get_extra_descriptor(&interface->endpoint[0],
-                                                     HID_DEVICET_REPORT, &hid_desc)) {
-                                printk("wacom: can not retrive extra class descriptor\n");
-                                goto fail2;
-                        }
-                }
-                error = wacom_parse_hid(intf, hid_desc, wacom_wac);
-                if (error)
-                        goto fail2;
-        }
        input_dev->evbit[0] |= BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
-        input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_PEN) |
+        input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOUCH);
-                BIT_MASK(BTN_TOUCH) | BIT_MASK(BTN_STYLUS);
        input_set_abs_params(input_dev, ABS_X, 0, features->x_max, 4, 0);
        input_set_abs_params(input_dev, ABS_Y, 0, features->y_max, 4, 0);
        input_set_abs_params(input_dev, ABS_PRESSURE, 0, features->pressure_max, 0, 0);
-        if (features->type == TABLETPC) {
-                input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_DOUBLETAP);
-                input_set_abs_params(input_dev, ABS_RX, 0, features->touch_x_max, 4, 0);
-                input_set_abs_params(input_dev, ABS_RY, 0, features->touch_y_max, 4, 0);
-        }
        input_dev->absbit[BIT_WORD(ABS_MISC)] |= BIT_MASK(ABS_MISC);
        wacom_init_input_dev(input_dev, wacom_wac);
        usb_fill_int_urb(wacom->irq, dev,
                         usb_rcvintpipe(dev, endpoint->bEndpointAddress),
-                         wacom_wac->data, wacom_wac->features->pktlen,
+                         wacom_wac->data, features->pktlen,
                         wacom_sys_irq, wacom, endpoint->bInterval);
        wacom->irq->transfer_dma = wacom->data_dma;
        wacom->irq->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
@@ -512,18 +597,14 @@ static int wacom_probe(struct usb_interface *intf, const struct usb_device_id *i
        if (error)
                goto fail3;
-        /*
+        /* Note that if query fails it is not a hard failure */
-         * Ask the tablet to report tablet data if it is not a Tablet PC.
+        wacom_query_tablet_data(intf, features);
-         * Note that if query fails it is not a hard failure.
-         */
-        if (wacom_wac->features->type != TABLETPC)
-                wacom_query_tablet_data(intf);
        usb_set_intfdata(intf, wacom);
        return 0;
 fail3: usb_free_urb(wacom->irq);
- fail2: usb_buffer_free(dev, 10, wacom_wac->data, wacom->data_dma);
+ fail2: usb_buffer_free(dev, WACOM_PKGLEN_MAX, wacom_wac->data, wacom->data_dma);
 fail1: input_free_device(input_dev);
        kfree(wacom);
        kfree(wacom_wac);
@@ -539,7 +620,7 @@ static void wacom_disconnect(struct usb_interface *intf)
        usb_kill_urb(wacom->irq);
        input_unregister_device(wacom->dev);
        usb_free_urb(wacom->irq);
-        usb_buffer_free(interface_to_usbdev(intf), 10,
+        usb_buffer_free(interface_to_usbdev(intf), WACOM_PKGLEN_MAX,
                        wacom->wacom_wac->data, wacom->data_dma);
        kfree(wacom->wacom_wac);
        kfree(wacom);
@@ -559,12 +640,16 @@ static int wacom_suspend(struct usb_interface *intf, pm_message_t message)
 static int wacom_resume(struct usb_interface *intf)
 {
        struct wacom *wacom = usb_get_intfdata(intf);
+        struct wacom_features *features = wacom->wacom_wac->features;
        int rv;
        mutex_lock(&wacom->lock);
-        if (wacom->open)
+        if (wacom->open) {
                rv = usb_submit_urb(wacom->irq, GFP_NOIO);
-        else
+                /* switch to wacom mode if needed */
+                if (!wacom_retrieve_hid_descriptor(intf, features))
+                        wacom_query_tablet_data(intf, features);
+        } else
                rv = 0;
        mutex_unlock(&wacom->lock);
diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c
index c896d6a21b7e..1056f149fe31 100644
--- a/drivers/input/tablet/wacom_wac.c
+++ b/drivers/input/tablet/wacom_wac.c
@@ -1,7 +1,7 @@
 /*
 * drivers/input/tablet/wacom_wac.c
 *
- *  USB Wacom Graphire and Wacom Intuos tablet support - Wacom specific code
+ *  USB Wacom tablet support - Wacom specific code
 *
 */
@@ -58,16 +58,15 @@ static int wacom_pl_irq(struct wacom_wac *wacom, void *wcombo)
        unsigned char *data = wacom->data;
        int prox, pressure;
-        if (data[0] != 2) {
+        if (data[0] != WACOM_REPORT_PENABLED) {
                dbg("wacom_pl_irq: received unknown report #%d", data[0]);
                return 0;
        }
        prox = data[1] & 0x40;
-        wacom->id[0] = ERASER_DEVICE_ID;
        if (prox) {
+                wacom->id[0] = ERASER_DEVICE_ID;
                pressure = (signed char)((data[7] << 1) | ((data[4] >> 2) & 1));
                if (wacom->features->pressure_max > 255)
                        pressure = (pressure << 1) | ((data[4] >> 6) & 1);
@@ -128,7 +127,7 @@ static int wacom_ptu_irq(struct wacom_wac *wacom, void *wcombo)
 {
        unsigned char *data = wacom->data;
-        if (data[0] != 2) {
+        if (data[0] != WACOM_REPORT_PENABLED) {
                printk(KERN_INFO "wacom_ptu_irq: received unknown report #%d\n", data[0]);
                return 0;
        }
@@ -155,14 +154,16 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo)
 {
        unsigned char *data = wacom->data;
        int x, y, rw;
+        static int penData = 0;
-        if (data[0] != 2) {
+        if (data[0] != WACOM_REPORT_PENABLED) {
                dbg("wacom_graphire_irq: received unknown report #%d", data[0]);
                return 0;
        }
        if (data[1] & 0x80) {
                /* in prox and not a pad data */
+                penData = 1;
                switch ((data[1] >> 5) & 3) {
@@ -232,7 +233,11 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo)
        switch (wacom->features->type) {
            case WACOM_G4:
                if (data[7] & 0xf8) {
-                        wacom_input_sync(wcombo); /* sync last event */
+                        if (penData) {
+                                wacom_input_sync(wcombo); /* sync last event */
+                                if (!wacom->id[0])
+                                        penData = 0;
+                        }
                        wacom->id[1] = PAD_DEVICE_ID;
                        wacom_report_key(wcombo, BTN_0, (data[7] & 0x40));
                        wacom_report_key(wcombo, BTN_4, (data[7] & 0x80));
@@ -242,10 +247,15 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo)
                        wacom_report_abs(wcombo, ABS_MISC, wacom->id[1]);
                        wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0);
                } else if (wacom->id[1]) {
-                        wacom_input_sync(wcombo); /* sync last event */
+                        if (penData) {
+                                wacom_input_sync(wcombo); /* sync last event */
+                                if (!wacom->id[0])
+                                        penData = 0;
+                        }
                        wacom->id[1] = 0;
                        wacom_report_key(wcombo, BTN_0, (data[7] & 0x40));
                        wacom_report_key(wcombo, BTN_4, (data[7] & 0x80));
+                        wacom_report_rel(wcombo, REL_WHEEL, 0);
                        wacom_report_key(wcombo, BTN_TOOL_FINGER, 0);
                        wacom_report_abs(wcombo, ABS_MISC, 0);
                        wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0);
@@ -253,7 +263,11 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo)
                break;
            case WACOM_MO:
                if ((data[7] & 0xf8) || (data[8] & 0xff)) {
-                        wacom_input_sync(wcombo); /* sync last event */
+                        if (penData) {
+                                wacom_input_sync(wcombo); /* sync last event */
+                                if (!wacom->id[0])
+                                        penData = 0;
+                        }
                        wacom->id[1] = PAD_DEVICE_ID;
                        wacom_report_key(wcombo, BTN_0, (data[7] & 0x08));
                        wacom_report_key(wcombo, BTN_1, (data[7] & 0x20));
@@ -264,7 +278,11 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo)
                        wacom_report_abs(wcombo, ABS_MISC, wacom->id[1]);
                        wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0);
                } else if (wacom->id[1]) {
-                        wacom_input_sync(wcombo); /* sync last event */
+                        if (penData) {
+                                wacom_input_sync(wcombo); /* sync last event */
+                                if (!wacom->id[0])
+                                        penData = 0;
+                        }
                        wacom->id[1] = 0;
                        wacom_report_key(wcombo, BTN_0, (data[7] & 0x08));
                        wacom_report_key(wcombo, BTN_1, (data[7] & 0x20));
@@ -432,7 +450,8 @@ static int wacom_intuos_irq(struct wacom_wac *wacom, void *wcombo)
        unsigned int t;
        int idx = 0, result;
-        if (data[0] != 2 && data[0] != 5 && data[0] != 6 && data[0] != 12) {
+        if (data[0] != WACOM_REPORT_PENABLED && data[0] != WACOM_REPORT_INTUOSREAD
+                && data[0] != WACOM_REPORT_INTUOSWRITE && data[0] != WACOM_REPORT_INTUOSPAD) {
                dbg("wacom_intuos_irq: received unknown report #%d", data[0]);
                return 0;
        }
@@ -442,7 +461,7 @@ static int wacom_intuos_irq(struct wacom_wac *wacom, void *wcombo)
                idx = data[1] & 0x01;
        /* pad packets. Works as a second tool and is always in prox */
-        if (data[0] == 12) {
+        if (data[0] == WACOM_REPORT_INTUOSPAD) {
                /* initiate the pad as a device */
                if (wacom->tool[1] != BTN_TOOL_FINGER)
                        wacom->tool[1] = BTN_TOOL_FINGER;
@@ -608,95 +627,163 @@ static int wacom_intuos_irq(struct wacom_wac *wacom, void *wcombo)
        return 1;
 }
+static void wacom_tpc_finger_in(struct wacom_wac *wacom, void *wcombo, char *data, int idx)
+{
+        wacom_report_abs(wcombo, ABS_X,
+                (data[2 + idx * 2] & 0xff) | ((data[3 + idx * 2] & 0x7f) << 8));
+        wacom_report_abs(wcombo, ABS_Y,
+                (data[6 + idx * 2] & 0xff) | ((data[7 + idx * 2] & 0x7f) << 8));
+        wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
+        wacom_report_key(wcombo, wacom->tool[idx], 1);
+        if (idx)
+                wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0);
+        else
+                wacom_report_key(wcombo, BTN_TOUCH, 1);
+}
+static void wacom_tpc_touch_out(struct wacom_wac *wacom, void *wcombo, int idx)
+{
+        wacom_report_abs(wcombo, ABS_X, 0);
+        wacom_report_abs(wcombo, ABS_Y, 0);
+        wacom_report_abs(wcombo, ABS_MISC, 0);
+        wacom_report_key(wcombo, wacom->tool[idx], 0);
+        if (idx)
+                wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0);
+        else
+                wacom_report_key(wcombo, BTN_TOUCH, 0);
+        return;
+}
+static void wacom_tpc_touch_in(struct wacom_wac *wacom, void *wcombo)
+{
+        char *data = wacom->data;
+        struct urb *urb = ((struct wacom_combo *)wcombo)->urb;
+        static int firstFinger = 0;
+        static int secondFinger = 0;
+        wacom->tool[0] = BTN_TOOL_DOUBLETAP;
+        wacom->id[0] = TOUCH_DEVICE_ID;
+        wacom->tool[1] = BTN_TOOL_TRIPLETAP;
+        if (urb->actual_length != WACOM_PKGLEN_TPC1FG) {
+                switch (data[0]) {
+                        case WACOM_REPORT_TPC1FG:
+                                wacom_report_abs(wcombo, ABS_X, wacom_le16_to_cpu(&data[2]));
+                                wacom_report_abs(wcombo, ABS_Y, wacom_le16_to_cpu(&data[4]));
+                                wacom_report_abs(wcombo, ABS_PRESSURE, wacom_le16_to_cpu(&data[6]));
+                                wacom_report_key(wcombo, BTN_TOUCH, wacom_le16_to_cpu(&data[6]));
+                                wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
+                                wacom_report_key(wcombo, wacom->tool[0], 1);
+                                break;
+                        case WACOM_REPORT_TPC2FG:
+                                /* keep this byte to send proper out-prox event */
+                                wacom->id[1] = data[1] & 0x03;
+                                if (data[1] & 0x01) {
+                                        wacom_tpc_finger_in(wacom, wcombo, data, 0);
+                                        firstFinger = 1;
+                                } else if (firstFinger) {
+                                        wacom_tpc_touch_out(wacom, wcombo, 0);
+                                }
+                                if (data[1] & 0x02) {
+                                        /* sync first finger data */
+                                        if (firstFinger)
+                                                wacom_input_sync(wcombo);
+                                        wacom_tpc_finger_in(wacom, wcombo, data, 1);
+                                        secondFinger = 1;
+                                } else if (secondFinger) {
+                                        /* sync first finger data */
+                                        if (firstFinger)
+                                                wacom_input_sync(wcombo);
+                                        wacom_tpc_touch_out(wacom, wcombo, 1);
+                                        secondFinger = 0;
+                                }
+                                if (!(data[1] & 0x01))
+                                        firstFinger = 0;
+                                break;
+                }
+        } else {
+                wacom_report_abs(wcombo, ABS_X, wacom_le16_to_cpu(&data[1]));
+                wacom_report_abs(wcombo, ABS_Y, wacom_le16_to_cpu(&data[3]));
+                wacom_report_key(wcombo, BTN_TOUCH, 1);
+                wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
+                wacom_report_key(wcombo, wacom->tool[0], 1);
+        }
+        return;
+}
 static int wacom_tpc_irq(struct wacom_wac *wacom, void *wcombo)
 {
        char *data = wacom->data;
-        int prox = 0, pressure;
+        int prox = 0, pressure, idx = -1;
        static int stylusInProx, touchInProx = 1, touchOut;
        struct urb *urb = ((struct wacom_combo *)wcombo)->urb;
        dbg("wacom_tpc_irq: received report #%d", data[0]);
-        if (urb->actual_length == 5 || data[0] == 6) { /* Touch data */
+        if (urb->actual_length == WACOM_PKGLEN_TPC1FG || /* single touch */
-                if (urb->actual_length == 5) {  /* with touch */
+            data[0] == WACOM_REPORT_TPC1FG ||            /* single touch */
-                        prox = data[0] & 0x03;
+            data[0] == WACOM_REPORT_TPC2FG) {            /* 2FG touch */
+                if (urb->actual_length == WACOM_PKGLEN_TPC1FG) {  /* with touch */
+                        prox = data[0] & 0x01;
                } else {  /* with capacity */
-                        prox = data[1] & 0x03;
+                        if (data[0] == WACOM_REPORT_TPC1FG)
+                                /* single touch */
+                                prox = data[1] & 0x01;
+                        else
+                                /* 2FG touch data */
+                                prox = data[1] & 0x03;
                }
                if (!stylusInProx) { /* stylus not in prox */
                        if (prox) {
                                if (touchInProx) {
-                                        wacom->tool[1] = BTN_TOOL_DOUBLETAP;
+                                        wacom_tpc_touch_in(wacom, wcombo);
-                                        wacom->id[0] = TOUCH_DEVICE_ID;
-                                        if (urb->actual_length != 5) {
-                                                wacom_report_abs(wcombo, ABS_X, wacom_le16_to_cpu(&data[2]));
-                                                wacom_report_abs(wcombo, ABS_Y, wacom_le16_to_cpu(&data[4]));
-                                                wacom_report_abs(wcombo, ABS_PRESSURE, wacom_le16_to_cpu(&data[6]));
-                                                wacom_report_key(wcombo, BTN_TOUCH, wacom_le16_to_cpu(&data[6]));
-                                        } else {
-                                                wacom_report_abs(wcombo, ABS_X, wacom_le16_to_cpu(&data[1]));
-                                                wacom_report_abs(wcombo, ABS_Y, wacom_le16_to_cpu(&data[3]));
-                                                wacom_report_key(wcombo, BTN_TOUCH, 1);
-                                        }
-                                        wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
-                                        wacom_report_key(wcombo, wacom->tool[1], prox & 0x01);
                                        touchOut = 1;
                                        return 1;
                                }
                        } else {
-                                wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
+                                /* 2FGT out-prox */
-                                wacom_report_key(wcombo, wacom->tool[1], prox & 0x01);
+                                if (data[0] == WACOM_REPORT_TPC2FG) {
-                                wacom_report_key(wcombo, BTN_TOUCH, 0);
+                                        idx = (wacom->id[1] & 0x01) - 1;
+                                        if (idx == 0) {
+                                                wacom_tpc_touch_out(wacom, wcombo, idx);
+                                                /* sync first finger event */
+                                                if (wacom->id[1] & 0x02)
+                                                        wacom_input_sync(wcombo);
+                                        }
+                                        idx = (wacom->id[1] & 0x02) - 1;
+                                        if (idx == 1)
+                                                wacom_tpc_touch_out(wacom, wcombo, idx);
+                                } else /* one finger touch */
+                                        wacom_tpc_touch_out(wacom, wcombo, 0);
                                touchOut = 0;
                                touchInProx = 1;
                                return 1;
                        }
                } else if (touchOut || !prox) { /* force touch out-prox */
-                        wacom_report_abs(wcombo, ABS_MISC, TOUCH_DEVICE_ID);
+                        wacom_tpc_touch_out(wacom, wcombo, 0);
-                        wacom_report_key(wcombo, wacom->tool[1], 0);
-                        wacom_report_key(wcombo, BTN_TOUCH, 0);
                        touchOut = 0;
                        touchInProx = 1;
                        return 1;
                }
-        } else if (data[0] == 2) { /* Penabled */
+        } else if (data[0] == WACOM_REPORT_PENABLED) { /* Penabled */
                prox = data[1] & 0x20;
                touchInProx = 0;
-                wacom->id[0] = ERASER_DEVICE_ID;
-                /*
-                 * if going from out of proximity into proximity select between the eraser
-                 * and the pen based on the state of the stylus2 button, choose eraser if
-                 * pressed else choose pen. if not a proximity change from out to in, send
-                 * an out of proximity for previous tool then a in for new tool.
-                 */
                if (prox) { /* in prox */
-                        if (!wacom->tool[0]) {
+                        if (!wacom->id[0]) {
                                /* Going into proximity select tool */
-                                wacom->tool[1] = (data[1] & 0x08) ? BTN_TOOL_RUBBER : BTN_TOOL_PEN;
+                                wacom->tool[0] = (data[1] & 0x0c) ? BTN_TOOL_RUBBER : BTN_TOOL_PEN;
-                                if (wacom->tool[1] == BTN_TOOL_PEN)
+                                if (wacom->tool[0] == BTN_TOOL_PEN)
                                        wacom->id[0] = STYLUS_DEVICE_ID;
-                        } else if (wacom->tool[1] == BTN_TOOL_RUBBER && !(data[1] & 0x08)) {
+                                else
-                                /*
+                                        wacom->id[0] = ERASER_DEVICE_ID;
-                                 * was entered with stylus2 pressed
-                                 * report out proximity for previous tool
-                                */
-                                wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
-                                wacom_report_key(wcombo, wacom->tool[1], 0);
-                                wacom_input_sync(wcombo);
-                                /* set new tool */
-                                wacom->tool[1] = BTN_TOOL_PEN;
-                                wacom->id[0] = STYLUS_DEVICE_ID;
-                                return 0;
-                        }
-                        if (wacom->tool[1] != BTN_TOOL_RUBBER) {
-                                /* Unknown tool selected default to pen tool */
-                                wacom->tool[1] = BTN_TOOL_PEN;
-                                wacom->id[0] = STYLUS_DEVICE_ID;
                        }
                        wacom_report_key(wcombo, BTN_STYLUS, data[1] & 0x02);
                        wacom_report_key(wcombo, BTN_STYLUS2, data[1] & 0x10);
@@ -706,17 +793,21 @@ static int wacom_tpc_irq(struct wacom_wac *wacom, void *wcombo)
                        if (pressure < 0)
                                pressure = wacom->features->pressure_max + pressure + 1;
                        wacom_report_abs(wcombo, ABS_PRESSURE, pressure);
-                        wacom_report_key(wcombo, BTN_TOUCH, pressure);
+                        wacom_report_key(wcombo, BTN_TOUCH, data[1] & 0x05);
                } else {
+                        wacom_report_abs(wcombo, ABS_X, 0);
+                        wacom_report_abs(wcombo, ABS_Y, 0);
                        wacom_report_abs(wcombo, ABS_PRESSURE, 0);
                        wacom_report_key(wcombo, BTN_STYLUS, 0);
                        wacom_report_key(wcombo, BTN_STYLUS2, 0);
                        wacom_report_key(wcombo, BTN_TOUCH, 0);
+                        wacom->id[0] = 0;
+                        /* pen is out so touch can be enabled now */
+                        touchInProx = 1;
                }
-                wacom_report_key(wcombo, wacom->tool[1], prox);
+                wacom_report_key(wcombo, wacom->tool[0], prox);
                wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
                stylusInProx = prox;
-                wacom->tool[0] = prox;
                return 1;
        }
        return 0;
@@ -751,6 +842,7 @@ int wacom_wac_irq(struct wacom_wac *wacom_wac, void *wcombo)
                        return wacom_intuos_irq(wacom_wac, wcombo);
                case TABLETPC:
+                case TABLETPC2FG:
                        return wacom_tpc_irq(wacom_wac, wcombo);
                default:
@@ -791,9 +883,17 @@ void wacom_init_input_dev(struct input_dev *input_dev, struct wacom_wac *wacom_w
                        input_dev_i4s(input_dev, wacom_wac);
                        input_dev_i(input_dev, wacom_wac);
                        break;
+                case TABLETPC2FG:
+                        input_dev_tpc2fg(input_dev, wacom_wac);
+                        /* fall through */
+                case TABLETPC:
+                        input_dev_tpc(input_dev, wacom_wac);
+                        if (wacom_wac->features->device_type != BTN_TOOL_PEN)
+                                break;  /* no need to process stylus stuff */
+                        /* fall through */
                case PL:
                case PTU:
-                case TABLETPC:
                        input_dev_pl(input_dev, wacom_wac);
                        /* fall through */
                case PENPARTNER:
@@ -804,66 +904,69 @@ void wacom_init_input_dev(struct input_dev *input_dev, struct wacom_wac *wacom_w
 }
 static struct wacom_features wacom_features[] = {
-        { "Wacom Penpartner",    7,   5040,  3780,  255,  0, PENPARTNER },
+        { "Wacom Penpartner",     WACOM_PKGLEN_PENPRTN,    5040,  3780,  255,  0, PENPARTNER },
-        { "Wacom Graphire",      8,  10206,  7422,  511, 63, GRAPHIRE },
+        { "Wacom Graphire",       WACOM_PKGLEN_GRAPHIRE,  10206,  7422,  511, 63, GRAPHIRE },
-        { "Wacom Graphire2 4x5", 8,  10206,  7422,  511, 63, GRAPHIRE },
+        { "Wacom Graphire2 4x5",  WACOM_PKGLEN_GRAPHIRE,  10206,  7422,  511, 63, GRAPHIRE },
-        { "Wacom Graphire2 5x7", 8,  13918, 10206,  511, 63, GRAPHIRE },
+        { "Wacom Graphire2 5x7",  WACOM_PKGLEN_GRAPHIRE,  13918, 10206,  511, 63, GRAPHIRE },
-        { "Wacom Graphire3",     8,  10208,  7424,  511, 63, GRAPHIRE },
+        { "Wacom Graphire3",      WACOM_PKGLEN_GRAPHIRE,  10208,  7424,  511, 63, GRAPHIRE },
-        { "Wacom Graphire3 6x8", 8,  16704, 12064,  511, 63, GRAPHIRE },
+        { "Wacom Graphire3 6x8",  WACOM_PKGLEN_GRAPHIRE,  16704, 12064,  511, 63, GRAPHIRE },
-        { "Wacom Graphire4 4x5", 8,  10208,  7424,  511, 63, WACOM_G4 },
+        { "Wacom Graphire4 4x5",  WACOM_PKGLEN_GRAPHIRE,  10208,  7424,  511, 63, WACOM_G4 },
-        { "Wacom Graphire4 6x8", 8,  16704, 12064,  511, 63, WACOM_G4 },
+        { "Wacom Graphire4 6x8",  WACOM_PKGLEN_GRAPHIRE,  16704, 12064,  511, 63, WACOM_G4 },
-        { "Wacom BambooFun 4x5", 9,  14760,  9225,  511, 63, WACOM_MO },
+        { "Wacom BambooFun 4x5",  WACOM_PKGLEN_BBFUN,     14760,  9225,  511, 63, WACOM_MO },
-        { "Wacom BambooFun 6x8", 9,  21648, 13530,  511, 63, WACOM_MO },
+        { "Wacom BambooFun 6x8",  WACOM_PKGLEN_BBFUN,     21648, 13530,  511, 63, WACOM_MO },
-        { "Wacom Bamboo1 Medium",8,  16704, 12064,  511, 63, GRAPHIRE },
+        { "Wacom Bamboo1 Medium", WACOM_PKGLEN_GRAPHIRE,  16704, 12064,  511, 63, GRAPHIRE },
-        { "Wacom Volito",        8,   5104,  3712,  511, 63, GRAPHIRE },
+        { "Wacom Volito",         WACOM_PKGLEN_GRAPHIRE,   5104,  3712,  511, 63, GRAPHIRE },
-        { "Wacom PenStation2",   8,   3250,  2320,  255, 63, GRAPHIRE },
+        { "Wacom PenStation2",    WACOM_PKGLEN_GRAPHIRE,   3250,  2320,  255, 63, GRAPHIRE },
-        { "Wacom Volito2 4x5",   8,   5104,  3712,  511, 63, GRAPHIRE },
+        { "Wacom Volito2 4x5",    WACOM_PKGLEN_GRAPHIRE,   5104,  3712,  511, 63, GRAPHIRE },
-        { "Wacom Volito2 2x3",   8,   3248,  2320,  511, 63, GRAPHIRE },
+        { "Wacom Volito2 2x3",    WACOM_PKGLEN_GRAPHIRE,   3248,  2320,  511, 63, GRAPHIRE },
-        { "Wacom PenPartner2",   8,   3250,  2320,  511, 63, GRAPHIRE },
+        { "Wacom PenPartner2",    WACOM_PKGLEN_GRAPHIRE,   3250,  2320,  511, 63, GRAPHIRE },
-        { "Wacom Bamboo",        9,  14760,  9225,  511, 63, WACOM_MO },
+        { "Wacom Bamboo",         WACOM_PKGLEN_BBFUN,     14760,  9225,  511, 63, WACOM_MO },
-        { "Wacom Bamboo1",       8,   5104,  3712,  511, 63, GRAPHIRE },
+        { "Wacom Bamboo1",        WACOM_PKGLEN_GRAPHIRE,   5104,  3712,  511, 63, GRAPHIRE },
-        { "Wacom Intuos 4x5",   10,  12700, 10600, 1023, 31, INTUOS },
+        { "Wacom Intuos 4x5",     WACOM_PKGLEN_INTUOS,    12700, 10600, 1023, 31, INTUOS },
-        { "Wacom Intuos 6x8",   10,  20320, 16240, 1023, 31, INTUOS },
+        { "Wacom Intuos 6x8",     WACOM_PKGLEN_INTUOS,    20320, 16240, 1023, 31, INTUOS },
-        { "Wacom Intuos 9x12",  10,  30480, 24060, 1023, 31, INTUOS },
+        { "Wacom Intuos 9x12",    WACOM_PKGLEN_INTUOS,    30480, 24060, 1023, 31, INTUOS },
-        { "Wacom Intuos 12x12", 10,  30480, 31680, 1023, 31, INTUOS },
+        { "Wacom Intuos 12x12",   WACOM_PKGLEN_INTUOS,    30480, 31680, 1023, 31, INTUOS },
-        { "Wacom Intuos 12x18", 10,  45720, 31680, 1023, 31, INTUOS },
+        { "Wacom Intuos 12x18",   WACOM_PKGLEN_INTUOS,    45720, 31680, 1023, 31, INTUOS },
-        { "Wacom PL400",         8,   5408,  4056,  255,  0, PL },
+        { "Wacom PL400",          WACOM_PKGLEN_GRAPHIRE,   5408,  4056,  255,  0, PL },
-        { "Wacom PL500",         8,   6144,  4608,  255,  0, PL },
+        { "Wacom PL500",          WACOM_PKGLEN_GRAPHIRE,   6144,  4608,  255,  0, PL },
-        { "Wacom PL600",         8,   6126,  4604,  255,  0, PL },
+        { "Wacom PL600",          WACOM_PKGLEN_GRAPHIRE,   6126,  4604,  255,  0, PL },
-        { "Wacom PL600SX",       8,   6260,  5016,  255,  0, PL },
+        { "Wacom PL600SX",        WACOM_PKGLEN_GRAPHIRE,   6260,  5016,  255,  0, PL },
-        { "Wacom PL550",         8,   6144,  4608,  511,  0, PL },
+        { "Wacom PL550",          WACOM_PKGLEN_GRAPHIRE,   6144,  4608,  511,  0, PL },
-        { "Wacom PL800",         8,   7220,  5780,  511,  0, PL },
+        { "Wacom PL800",          WACOM_PKGLEN_GRAPHIRE,   7220,  5780,  511,  0, PL },
-        { "Wacom PL700",         8,   6758,  5406,  511,  0, PL },
+        { "Wacom PL700",          WACOM_PKGLEN_GRAPHIRE,   6758,  5406,  511,  0, PL },
-        { "Wacom PL510",         8,   6282,  4762,  511,  0, PL },
+        { "Wacom PL510",          WACOM_PKGLEN_GRAPHIRE,   6282,  4762,  511,  0, PL },
-        { "Wacom DTU710",        8,  34080, 27660,  511,  0, PL },
+        { "Wacom DTU710",         WACOM_PKGLEN_GRAPHIRE,  34080, 27660,  511,  0, PL },
-        { "Wacom DTF521",        8,   6282,  4762,  511,  0, PL },
+        { "Wacom DTF521",         WACOM_PKGLEN_GRAPHIRE,   6282,  4762,  511,  0, PL },
-        { "Wacom DTF720",        8,   6858,  5506,  511,  0, PL },
+        { "Wacom DTF720",         WACOM_PKGLEN_GRAPHIRE,   6858,  5506,  511,  0, PL },
-        { "Wacom DTF720a",       8,   6858,  5506,  511,  0, PL },
+        { "Wacom DTF720a",        WACOM_PKGLEN_GRAPHIRE,   6858,  5506,  511,  0, PL },
-        { "Wacom Cintiq Partner",8,  20480, 15360,  511,  0, PTU },
+        { "Wacom Cintiq Partner", WACOM_PKGLEN_GRAPHIRE,  20480, 15360,  511,  0, PTU },
-        { "Wacom Intuos2 4x5",   10, 12700, 10600, 1023, 31, INTUOS },
+        { "Wacom Intuos2 4x5",    WACOM_PKGLEN_INTUOS,    12700, 10600, 1023, 31, INTUOS },
-        { "Wacom Intuos2 6x8",   10, 20320, 16240, 1023, 31, INTUOS },
+        { "Wacom Intuos2 6x8",    WACOM_PKGLEN_INTUOS,    20320, 16240, 1023, 31, INTUOS },
-        { "Wacom Intuos2 9x12",  10, 30480, 24060, 1023, 31, INTUOS },
+        { "Wacom Intuos2 9x12",   WACOM_PKGLEN_INTUOS,    30480, 24060, 1023, 31, INTUOS },
-        { "Wacom Intuos2 12x12", 10, 30480, 31680, 1023, 31, INTUOS },
+        { "Wacom Intuos2 12x12",  WACOM_PKGLEN_INTUOS,    30480, 31680, 1023, 31, INTUOS },
-        { "Wacom Intuos2 12x18", 10, 45720, 31680, 1023, 31, INTUOS },
+        { "Wacom Intuos2 12x18",  WACOM_PKGLEN_INTUOS,    45720, 31680, 1023, 31, INTUOS },
-        { "Wacom Intuos3 4x5",   10, 25400, 20320, 1023, 63, INTUOS3S },
+        { "Wacom Intuos3 4x5",    WACOM_PKGLEN_INTUOS,    25400, 20320, 1023, 63, INTUOS3S },
-        { "Wacom Intuos3 6x8",   10, 40640, 30480, 1023, 63, INTUOS3 },
+        { "Wacom Intuos3 6x8",    WACOM_PKGLEN_INTUOS,    40640, 30480, 1023, 63, INTUOS3 },
-        { "Wacom Intuos3 9x12",  10, 60960, 45720, 1023, 63, INTUOS3 },
+        { "Wacom Intuos3 9x12",   WACOM_PKGLEN_INTUOS,    60960, 45720, 1023, 63, INTUOS3 },
-        { "Wacom Intuos3 12x12", 10, 60960, 60960, 1023, 63, INTUOS3L },
+        { "Wacom Intuos3 12x12",  WACOM_PKGLEN_INTUOS,    60960, 60960, 1023, 63, INTUOS3L },
-        { "Wacom Intuos3 12x19", 10, 97536, 60960, 1023, 63, INTUOS3L },
+        { "Wacom Intuos3 12x19",  WACOM_PKGLEN_INTUOS,    97536, 60960, 1023, 63, INTUOS3L },
-        { "Wacom Intuos3 6x11",  10, 54204, 31750, 1023, 63, INTUOS3 },
+        { "Wacom Intuos3 6x11",   WACOM_PKGLEN_INTUOS,    54204, 31750, 1023, 63, INTUOS3 },
-        { "Wacom Intuos3 4x6",   10, 31496, 19685, 1023, 63, INTUOS3S },
+        { "Wacom Intuos3 4x6",    WACOM_PKGLEN_INTUOS,    31496, 19685, 1023, 63, INTUOS3S },
-        { "Wacom Intuos4 4x6",   10, 31496, 19685, 2047, 63, INTUOS4S },
+        { "Wacom Intuos4 4x6",    WACOM_PKGLEN_INTUOS,    31496, 19685, 2047, 63, INTUOS4S },
-        { "Wacom Intuos4 6x9",   10, 44704, 27940, 2047, 63, INTUOS4 },
+        { "Wacom Intuos4 6x9",    WACOM_PKGLEN_INTUOS,    44704, 27940, 2047, 63, INTUOS4 },
-        { "Wacom Intuos4 8x13",  10, 65024, 40640, 2047, 63, INTUOS4L },
+        { "Wacom Intuos4 8x13",   WACOM_PKGLEN_INTUOS,    65024, 40640, 2047, 63, INTUOS4L },
-        { "Wacom Intuos4 12x19", 10, 97536, 60960, 2047, 63, INTUOS4L },
+        { "Wacom Intuos4 12x19",  WACOM_PKGLEN_INTUOS,    97536, 60960, 2047, 63, INTUOS4L },
-        { "Wacom Cintiq 21UX",   10, 87200, 65600, 1023, 63, CINTIQ },
+        { "Wacom Cintiq 21UX",    WACOM_PKGLEN_INTUOS,    87200, 65600, 1023, 63, CINTIQ },
-        { "Wacom Cintiq 20WSX",  10, 86680, 54180, 1023, 63, WACOM_BEE },
+        { "Wacom Cintiq 20WSX",   WACOM_PKGLEN_INTUOS,    86680, 54180, 1023, 63, WACOM_BEE },
-        { "Wacom Cintiq 12WX",   10, 53020, 33440, 1023, 63, WACOM_BEE },
+        { "Wacom Cintiq 12WX",    WACOM_PKGLEN_INTUOS,    53020, 33440, 1023, 63, WACOM_BEE },
-        { "Wacom DTU1931",        8, 37832, 30305,  511,  0, PL },
+        { "Wacom DTU1931",        WACOM_PKGLEN_GRAPHIRE,  37832, 30305,  511,  0, PL },
-        { "Wacom ISDv4 90",       8, 26202, 16325,  255,  0, TABLETPC },
+        { "Wacom ISDv4 90",       WACOM_PKGLEN_GRAPHIRE,  26202, 16325,  255,  0, TABLETPC },
-        { "Wacom ISDv4 93",       8, 26202, 16325,  255,  0, TABLETPC },
+        { "Wacom ISDv4 93",       WACOM_PKGLEN_GRAPHIRE,  26202, 16325,  255,  0, TABLETPC },
-        { "Wacom ISDv4 9A",       8, 26202, 16325,  255,  0, TABLETPC },
+        { "Wacom ISDv4 9A",       WACOM_PKGLEN_GRAPHIRE,  26202, 16325,  255,  0, TABLETPC },
-        { "Wacom Intuos2 6x8",   10, 20320, 16240, 1023, 31, INTUOS },
+        { "Wacom ISDv4 9F",       WACOM_PKGLEN_PENABLED,  26202, 16325,  255,  0, TABLETPC },
+        { "Wacom ISDv4 E2",       WACOM_PKGLEN_TPC2FG,    26202, 16325,  255,  0, TABLETPC2FG },
+        { "Wacom ISDv4 E3",       WACOM_PKGLEN_TPC2FG,    26202, 16325,  255,  0, TABLETPC2FG },
+        { "Wacom Intuos2 6x8",    WACOM_PKGLEN_INTUOS,    20320, 16240, 1023, 31, INTUOS },
        { }
 };
@@ -927,6 +1030,9 @@ static struct usb_device_id wacom_ids[] = {
        { USB_DEVICE(USB_VENDOR_ID_WACOM, 0x90) },
        { USB_DEVICE(USB_VENDOR_ID_WACOM, 0x93) },
        { USB_DEVICE(USB_VENDOR_ID_WACOM, 0x9A) },
+        { USB_DEVICE(USB_VENDOR_ID_WACOM, 0x9F) },
+        { USB_DEVICE(USB_VENDOR_ID_WACOM, 0xE2) },
+        { USB_DEVICE(USB_VENDOR_ID_WACOM, 0xE3) },
        { USB_DEVICE(USB_VENDOR_ID_WACOM, 0x47) },
        { }
 };
diff --git a/drivers/input/tablet/wacom_wac.h b/drivers/input/tablet/wacom_wac.h
index c10235aba7e5..ee01e1902785 100644
--- a/drivers/input/tablet/wacom_wac.h
+++ b/drivers/input/tablet/wacom_wac.h
@@ -9,12 +9,33 @@
 #ifndef WACOM_WAC_H
 #define WACOM_WAC_H
+/* maximum packet length for USB devices */
+#define WACOM_PKGLEN_MAX        32
+/* packet length for individual models */
+#define WACOM_PKGLEN_PENPRTN     7
+#define WACOM_PKGLEN_GRAPHIRE    8
+#define WACOM_PKGLEN_BBFUN       9
+#define WACOM_PKGLEN_INTUOS     10
+#define WACOM_PKGLEN_PENABLED    8
+#define WACOM_PKGLEN_TPC1FG      5
+#define WACOM_PKGLEN_TPC2FG     14
+/* device IDs */
 #define STYLUS_DEVICE_ID        0x02
 #define TOUCH_DEVICE_ID         0x03
 #define CURSOR_DEVICE_ID        0x06
 #define ERASER_DEVICE_ID        0x0A
 #define PAD_DEVICE_ID           0x0F
+/* wacom data packet report IDs */
+#define WACOM_REPORT_PENABLED           2
+#define WACOM_REPORT_INTUOSREAD         5
+#define WACOM_REPORT_INTUOSWRITE        6
+#define WACOM_REPORT_INTUOSPAD          12
+#define WACOM_REPORT_TPC1FG             6
+#define WACOM_REPORT_TPC2FG             13
 enum {
        PENPARTNER = 0,
        GRAPHIRE,
@@ -32,6 +53,7 @@ enum {
        WACOM_BEE,
        WACOM_MO,
        TABLETPC,
+        TABLETPC2FG,
        MAX_TYPE
 };
@@ -43,8 +65,11 @@ struct wacom_features {
        int pressure_max;
        int distance_max;
        int type;
-        int touch_x_max;
+        int device_type;
-        int touch_y_max;
+        int x_phy;
+        int y_phy;
+        unsigned char unit;
+        unsigned char unitExpo;
 };
 struct wacom_wac {
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
index 32fc8ba039aa..dfafc76da4fb 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -450,6 +450,18 @@ config TOUCHSCREEN_USB_COMPOSITE
          To compile this driver as a module, choose M here: the
          module will be called usbtouchscreen.
+config TOUCHSCREEN_MC13783
+        tristate "Freescale MC13783 touchscreen input driver"
+        depends on MFD_MC13783
+        help
+          Say Y here if you have an Freescale MC13783 PMIC on your
+          board and want to use its touchscreen
+          If unsure, say N.
+          To compile this driver as a module, choose M here: the
+          module will be called mc13783_ts.
 config TOUCHSCREEN_USB_EGALAX
        default y
        bool "eGalax, eTurboTouch CT-410/510/700 device support" if EMBEDDED
diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
index f1f59c9e1211..d61a3b4def9a 100644
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_TOUCHSCREEN_EETI)		+= eeti_ts.o
 obj-$(CONFIG_TOUCHSCREEN_ELO)           += elo.o
 obj-$(CONFIG_TOUCHSCREEN_FUJITSU)       += fujitsu_ts.o
 obj-$(CONFIG_TOUCHSCREEN_INEXIO)        += inexio.o
+obj-$(CONFIG_TOUCHSCREEN_MC13783)       += mc13783_ts.o
 obj-$(CONFIG_TOUCHSCREEN_MCS5000)       += mcs5000_ts.o
 obj-$(CONFIG_TOUCHSCREEN_MIGOR)         += migor_ts.o
 obj-$(CONFIG_TOUCHSCREEN_MTOUCH)        += mtouch.o
diff --git a/drivers/input/touchscreen/mc13783_ts.c b/drivers/input/touchscreen/mc13783_ts.c
new file mode 100644
index 000000000000..be115b3b65eb
--- /dev/null
+++ b/drivers/input/touchscreen/mc13783_ts.c
@@ -0,0 +1,258 @@
+/*
+ * Driver for the Freescale Semiconductor MC13783 touchscreen.
+ *
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2009 Sascha Hauer, Pengutronix
+ *
+ * Initial development of this code was funded by
+ * Phytec Messtechnik GmbH, http://www.phytec.de/
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#include <linux/platform_device.h>
+#include <linux/mfd/mc13783.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/input.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#define MC13783_TS_NAME "mc13783-ts"
+#define DEFAULT_SAMPLE_TOLERANCE 300
+static unsigned int sample_tolerance = DEFAULT_SAMPLE_TOLERANCE;
+module_param(sample_tolerance, uint, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(sample_tolerance,
+                "If the minimal and maximal value read out for one axis (out "
+                "of three) differ by this value (default: "
+                __stringify(DEFAULT_SAMPLE_TOLERANCE) ") or more, the reading "
+                "is supposed to be wrong and is discarded.  Set to 0 to "
+                "disable this check.");
+struct mc13783_ts_priv {
+        struct input_dev *idev;
+        struct mc13783 *mc13783;
+        struct delayed_work work;
+        struct workqueue_struct *workq;
+        unsigned int sample[4];
+};
+static irqreturn_t mc13783_ts_handler(int irq, void *data)
+{
+        struct mc13783_ts_priv *priv = data;
+        mc13783_ackirq(priv->mc13783, irq);
+        /*
+         * Kick off reading coordinates. Note that if work happens already
+         * be queued for future execution (it rearms itself) it will not
+         * be rescheduled for immediate execution here. However the rearm
+         * delay is HZ / 50 which is acceptable.
+         */
+        queue_delayed_work(priv->workq, &priv->work, 0);
+        return IRQ_HANDLED;
+}
+#define sort3(a0, a1, a2) ({                                            \
+                if (a0 > a1)                                            \
+                        swap(a0, a1);                                   \
+                if (a1 > a2)                                            \
+                        swap(a1, a2);                                   \
+                if (a0 > a1)                                            \
+                        swap(a0, a1);                                   \
+                })
+static void mc13783_ts_report_sample(struct mc13783_ts_priv *priv)
+{
+        struct input_dev *idev = priv->idev;
+        int x0, x1, x2, y0, y1, y2;
+        int cr0, cr1;
+        /*
+         * the values are 10-bit wide only, but the two least significant
+         * bits are for future 12 bit use and reading yields 0
+         */
+        x0 = priv->sample[0] & 0xfff;
+        x1 = priv->sample[1] & 0xfff;
+        x2 = priv->sample[2] & 0xfff;
+        y0 = priv->sample[3] & 0xfff;
+        y1 = (priv->sample[0] >> 12) & 0xfff;
+        y2 = (priv->sample[1] >> 12) & 0xfff;
+        cr0 = (priv->sample[2] >> 12) & 0xfff;
+        cr1 = (priv->sample[3] >> 12) & 0xfff;
+        dev_dbg(&idev->dev,
+                "x: (% 4d,% 4d,% 4d) y: (% 4d, % 4d,% 4d) cr: (% 4d, % 4d)\n",
+                x0, x1, x2, y0, y1, y2, cr0, cr1);
+        sort3(x0, x1, x2);
+        sort3(y0, y1, y2);
+        cr0 = (cr0 + cr1) / 2;
+        if (!cr0 || !sample_tolerance ||
+                        (x2 - x0 < sample_tolerance &&
+                         y2 - y0 < sample_tolerance)) {
+                /* report the median coordinate and average pressure */
+                if (cr0) {
+                        input_report_abs(idev, ABS_X, x1);
+                        input_report_abs(idev, ABS_Y, y1);
+                        dev_dbg(&idev->dev, "report (%d, %d, %d)\n",
+                                        x1, y1, 0x1000 - cr0);
+                        queue_delayed_work(priv->workq, &priv->work, HZ / 50);
+                } else
+                        dev_dbg(&idev->dev, "report release\n");
+                input_report_abs(idev, ABS_PRESSURE,
+                                cr0 ? 0x1000 - cr0 : cr0);
+                input_report_key(idev, BTN_TOUCH, cr0);
+                input_sync(idev);
+        } else
+                dev_dbg(&idev->dev, "discard event\n");
+}
+static void mc13783_ts_work(struct work_struct *work)
+{
+        struct mc13783_ts_priv *priv =
+                container_of(work, struct mc13783_ts_priv, work.work);
+        unsigned int mode = MC13783_ADC_MODE_TS;
+        unsigned int channel = 12;
+        if (mc13783_adc_do_conversion(priv->mc13783,
+                                mode, channel, priv->sample) == 0)
+                mc13783_ts_report_sample(priv);
+}
+static int mc13783_ts_open(struct input_dev *dev)
+{
+        struct mc13783_ts_priv *priv = input_get_drvdata(dev);
+        int ret;
+        mc13783_lock(priv->mc13783);
+        mc13783_ackirq(priv->mc13783, MC13783_IRQ_TS);
+        ret = mc13783_irq_request(priv->mc13783, MC13783_IRQ_TS,
+                mc13783_ts_handler, MC13783_TS_NAME, priv);
+        if (ret)
+                goto out;
+        ret = mc13783_reg_rmw(priv->mc13783, MC13783_ADC0,
+                        MC13783_ADC0_TSMOD_MASK, MC13783_ADC0_TSMOD0);
+        if (ret)
+                mc13783_irq_free(priv->mc13783, MC13783_IRQ_TS, priv);
+out:
+        mc13783_unlock(priv->mc13783);
+        return ret;
+}
+static void mc13783_ts_close(struct input_dev *dev)
+{
+        struct mc13783_ts_priv *priv = input_get_drvdata(dev);
+        mc13783_lock(priv->mc13783);
+        mc13783_reg_rmw(priv->mc13783, MC13783_ADC0,
+                        MC13783_ADC0_TSMOD_MASK, 0);
+        mc13783_irq_free(priv->mc13783, MC13783_IRQ_TS, priv);
+        mc13783_unlock(priv->mc13783);
+        cancel_delayed_work_sync(&priv->work);
+}
+static int __init mc13783_ts_probe(struct platform_device *pdev)
+{
+        struct mc13783_ts_priv *priv;
+        struct input_dev *idev;
+        int ret = -ENOMEM;
+        priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+        idev = input_allocate_device();
+        if (!priv || !idev)
+                goto err_free_mem;
+        INIT_DELAYED_WORK(&priv->work, mc13783_ts_work);
+        priv->mc13783 = dev_get_drvdata(pdev->dev.parent);
+        priv->idev = idev;
+        /*
+         * We need separate workqueue because mc13783_adc_do_conversion
+         * uses keventd and thus would deadlock.
+         */
+        priv->workq = create_singlethread_workqueue("mc13783_ts");
+        if (!priv->workq)
+                goto err_free_mem;
+        idev->name = MC13783_TS_NAME;
+        idev->dev.parent = &pdev->dev;
+        idev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
+        idev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
+        input_set_abs_params(idev, ABS_X, 0, 0xfff, 0, 0);
+        input_set_abs_params(idev, ABS_Y, 0, 0xfff, 0, 0);
+        input_set_abs_params(idev, ABS_PRESSURE, 0, 0xfff, 0, 0);
+        idev->open = mc13783_ts_open;
+        idev->close = mc13783_ts_close;
+        input_set_drvdata(idev, priv);
+        ret = input_register_device(priv->idev);
+        if (ret) {
+                dev_err(&pdev->dev,
+                        "register input device failed with %d\n", ret);
+                goto err_destroy_wq;
+        }
+        platform_set_drvdata(pdev, priv);
+        return 0;
+err_destroy_wq:
+        destroy_workqueue(priv->workq);
+err_free_mem:
+        input_free_device(idev);
+        kfree(priv);
+        return ret;
+}
+static int __devexit mc13783_ts_remove(struct platform_device *pdev)
+{
+        struct mc13783_ts_priv *priv = platform_get_drvdata(pdev);
+        platform_set_drvdata(pdev, NULL);
+        destroy_workqueue(priv->workq);
+        input_unregister_device(priv->idev);
+        kfree(priv);
+        return 0;
+}
+static struct platform_driver mc13783_ts_driver = {
+        .remove         = __devexit_p(mc13783_ts_remove),
+        .driver         = {
+                .owner  = THIS_MODULE,
+                .name   = MC13783_TS_NAME,
+        },
+};
+static int __init mc13783_ts_init(void)
+{
+        return platform_driver_probe(&mc13783_ts_driver, &mc13783_ts_probe);
+}
+module_init(mc13783_ts_init);
+static void __exit mc13783_ts_exit(void)
+{
+        platform_driver_unregister(&mc13783_ts_driver);
+}
+module_exit(mc13783_ts_exit);
+MODULE_DESCRIPTION("MC13783 input touchscreen driver");
+MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:" MC13783_TS_NAME);
diff --git a/drivers/media/IR/Kconfig b/drivers/media/IR/Kconfig
new file mode 100644
index 000000000000..4dde7d180a32
--- /dev/null
+++ b/drivers/media/IR/Kconfig
@@ -0,0 +1,9 @@
+config IR_CORE
+        tristate
+        depends on INPUT
+        default INPUT
+config VIDEO_IR
+        tristate
+        depends on IR_CORE
+        default IR_CORE
diff --git a/drivers/media/IR/Makefile b/drivers/media/IR/Makefile
new file mode 100644
index 000000000000..df5ddb4bbbf7
--- /dev/null
+++ b/drivers/media/IR/Makefile
@@ -0,0 +1,5 @@
+ir-common-objs  := ir-functions.o ir-keymaps.o
+ir-core-objs    := ir-keytable.o
+obj-$(CONFIG_IR_CORE) += ir-core.o
+obj-$(CONFIG_VIDEO_IR) += ir-common.o
diff --git a/drivers/media/common/ir-functions.c b/drivers/media/IR/ir-functions.c
index e616f624ceaa..776a136616d6 100644
--- a/drivers/media/common/ir-functions.c
+++ b/drivers/media/IR/ir-functions.c
@@ -34,9 +34,6 @@ static int repeat = 1;
 module_param(repeat, int, 0444);
 MODULE_PARM_DESC(repeat,"auto-repeat for IR keys (default: on)");
-int media_ir_debug;    /* media_ir_debug level (0,1,2) */
-module_param_named(debug, media_ir_debug, int, 0644);
 /* -------------------------------------------------------------------------- */
 static void ir_input_key_event(struct input_dev *dev, struct ir_input_state *ir)
@@ -55,25 +52,10 @@ static void ir_input_key_event(struct input_dev *dev, struct ir_input_state *ir)
 /* -------------------------------------------------------------------------- */
 int ir_input_init(struct input_dev *dev, struct ir_input_state *ir,
-                   int ir_type, struct ir_scancode_table *ir_codes)
+                   int ir_type)
 {
        ir->ir_type = ir_type;
-        ir->keytable.size = ir_roundup_tablesize(ir_codes->size);
-        ir->keytable.scan = kzalloc(ir->keytable.size *
-                                    sizeof(struct ir_scancode), GFP_KERNEL);
-        if (!ir->keytable.scan)
-                return -ENOMEM;
-        IR_dprintk(1, "Allocated space for %d keycode entries (%zd bytes)\n",
-                ir->keytable.size,
-                ir->keytable.size * sizeof(ir->keytable.scan));
-        ir_copy_table(&ir->keytable, ir_codes);
-        ir_set_keycode_table(dev, &ir->keytable);
-        clear_bit(0, dev->keybit);
-        set_bit(EV_KEY, dev->evbit);
        if (repeat)
                set_bit(EV_REP, dev->evbit);
diff --git a/drivers/media/common/ir-keymaps.c b/drivers/media/IR/ir-keymaps.c
index 328c973a0838..9bbe6b1e9871 100644
--- a/drivers/media/common/ir-keymaps.c
+++ b/drivers/media/IR/ir-keymaps.c
@@ -1847,76 +1847,6 @@ struct ir_scancode_table ir_codes_hauppauge_new_table = {
 };
 EXPORT_SYMBOL_GPL(ir_codes_hauppauge_new_table);
-/*
- * Hauppauge:the newer, gray remotes (seems there are multiple
- * slightly different versions), shipped with cx88+ivtv cards.
- *
- * This table contains the complete RC5 code, instead of just the data part
- */
-static struct ir_scancode ir_codes_rc5_hauppauge_new[] = {
-        /* Keys 0 to 9 */
-        { 0x1e00, KEY_0 },
-        { 0x1e01, KEY_1 },
-        { 0x1e02, KEY_2 },
-        { 0x1e03, KEY_3 },
-        { 0x1e04, KEY_4 },
-        { 0x1e05, KEY_5 },
-        { 0x1e06, KEY_6 },
-        { 0x1e07, KEY_7 },
-        { 0x1e08, KEY_8 },
-        { 0x1e09, KEY_9 },
-        { 0x1e0a, KEY_TEXT },           /* keypad asterisk as well */
-        { 0x1e0b, KEY_RED },            /* red button */
-        { 0x1e0c, KEY_RADIO },
-        { 0x1e0d, KEY_MENU },
-        { 0x1e0e, KEY_SUBTITLE },               /* also the # key */
-        { 0x1e0f, KEY_MUTE },
-        { 0x1e10, KEY_VOLUMEUP },
-        { 0x1e11, KEY_VOLUMEDOWN },
-        { 0x1e12, KEY_PREVIOUS },               /* previous channel */
-        { 0x1e14, KEY_UP },
-        { 0x1e15, KEY_DOWN },
-        { 0x1e16, KEY_LEFT },
-        { 0x1e17, KEY_RIGHT },
-        { 0x1e18, KEY_VIDEO },          /* Videos */
-        { 0x1e19, KEY_AUDIO },          /* Music */
-        /* 0x1e1a: Pictures - presume this means
-           "Multimedia Home Platform" -
-           no "PICTURES" key in input.h
-         */
-        { 0x1e1a, KEY_MHP },
-        { 0x1e1b, KEY_EPG },            /* Guide */
-        { 0x1e1c, KEY_TV },
-        { 0x1e1e, KEY_NEXTSONG },               /* skip >| */
-        { 0x1e1f, KEY_EXIT },           /* back/exit */
-        { 0x1e20, KEY_CHANNELUP },      /* channel / program + */
-        { 0x1e21, KEY_CHANNELDOWN },    /* channel / program - */
-        { 0x1e22, KEY_CHANNEL },                /* source (old black remote) */
-        { 0x1e24, KEY_PREVIOUSSONG },   /* replay |< */
-        { 0x1e25, KEY_ENTER },          /* OK */
-        { 0x1e26, KEY_SLEEP },          /* minimize (old black remote) */
-        { 0x1e29, KEY_BLUE },           /* blue key */
-        { 0x1e2e, KEY_GREEN },          /* green button */
-        { 0x1e30, KEY_PAUSE },          /* pause */
-        { 0x1e32, KEY_REWIND },         /* backward << */
-        { 0x1e34, KEY_FASTFORWARD },    /* forward >> */
-        { 0x1e35, KEY_PLAY },
-        { 0x1e36, KEY_STOP },
-        { 0x1e37, KEY_RECORD },         /* recording */
-        { 0x1e38, KEY_YELLOW },         /* yellow key */
-        { 0x1e3b, KEY_SELECT },         /* top right button */
-        { 0x1e3c, KEY_ZOOM },           /* full */
-        { 0x1e3d, KEY_POWER },          /* system power (green button) */
-};
-struct ir_scancode_table ir_codes_rc5_hauppauge_new_table = {
-        .scan = ir_codes_rc5_hauppauge_new,
-        .size = ARRAY_SIZE(ir_codes_rc5_hauppauge_new),
-};
-EXPORT_SYMBOL_GPL(ir_codes_rc5_hauppauge_new_table);
 static struct ir_scancode ir_codes_npgtech[] = {
        { 0x1d, KEY_SWITCHVIDEOMODE },  /* switch inputs */
        { 0x2a, KEY_FRONT },
@@ -3314,3 +3244,152 @@ struct ir_scancode_table ir_codes_gadmei_rm008z_table = {
 };
 EXPORT_SYMBOL_GPL(ir_codes_gadmei_rm008z_table);
+/*************************************************************
+ *              COMPLETE SCANCODE TABLES
+ * Instead of just a partial scancode, the tables bellow
+ * contains the complete scancode and the receiver protocol
+ *************************************************************/
+/*
+ * Hauppauge:the newer, gray remotes (seems there are multiple
+ * slightly different versions), shipped with cx88+ivtv cards.
+ *
+ * This table contains the complete RC5 code, instead of just the data part
+ */
+static struct ir_scancode ir_codes_rc5_hauppauge_new[] = {
+        /* Keys 0 to 9 */
+        { 0x1e00, KEY_0 },
+        { 0x1e01, KEY_1 },
+        { 0x1e02, KEY_2 },
+        { 0x1e03, KEY_3 },
+        { 0x1e04, KEY_4 },
+        { 0x1e05, KEY_5 },
+        { 0x1e06, KEY_6 },
+        { 0x1e07, KEY_7 },
+        { 0x1e08, KEY_8 },
+        { 0x1e09, KEY_9 },
+        { 0x1e0a, KEY_TEXT },           /* keypad asterisk as well */
+        { 0x1e0b, KEY_RED },            /* red button */
+        { 0x1e0c, KEY_RADIO },
+        { 0x1e0d, KEY_MENU },
+        { 0x1e0e, KEY_SUBTITLE },               /* also the # key */
+        { 0x1e0f, KEY_MUTE },
+        { 0x1e10, KEY_VOLUMEUP },
+        { 0x1e11, KEY_VOLUMEDOWN },
+        { 0x1e12, KEY_PREVIOUS },               /* previous channel */
+        { 0x1e14, KEY_UP },
+        { 0x1e15, KEY_DOWN },
+        { 0x1e16, KEY_LEFT },
+        { 0x1e17, KEY_RIGHT },
+        { 0x1e18, KEY_VIDEO },          /* Videos */
+        { 0x1e19, KEY_AUDIO },          /* Music */
+        /* 0x1e1a: Pictures - presume this means
+           "Multimedia Home Platform" -
+           no "PICTURES" key in input.h
+         */
+        { 0x1e1a, KEY_MHP },
+        { 0x1e1b, KEY_EPG },            /* Guide */
+        { 0x1e1c, KEY_TV },
+        { 0x1e1e, KEY_NEXTSONG },               /* skip >| */
+        { 0x1e1f, KEY_EXIT },           /* back/exit */
+        { 0x1e20, KEY_CHANNELUP },      /* channel / program + */
+        { 0x1e21, KEY_CHANNELDOWN },    /* channel / program - */
+        { 0x1e22, KEY_CHANNEL },                /* source (old black remote) */
+        { 0x1e24, KEY_PREVIOUSSONG },   /* replay |< */
+        { 0x1e25, KEY_ENTER },          /* OK */
+        { 0x1e26, KEY_SLEEP },          /* minimize (old black remote) */
+        { 0x1e29, KEY_BLUE },           /* blue key */
+        { 0x1e2e, KEY_GREEN },          /* green button */
+        { 0x1e30, KEY_PAUSE },          /* pause */
+        { 0x1e32, KEY_REWIND },         /* backward << */
+        { 0x1e34, KEY_FASTFORWARD },    /* forward >> */
+        { 0x1e35, KEY_PLAY },
+        { 0x1e36, KEY_STOP },
+        { 0x1e37, KEY_RECORD },         /* recording */
+        { 0x1e38, KEY_YELLOW },         /* yellow key */
+        { 0x1e3b, KEY_SELECT },         /* top right button */
+        { 0x1e3c, KEY_ZOOM },           /* full */
+        { 0x1e3d, KEY_POWER },          /* system power (green button) */
+};
+struct ir_scancode_table ir_codes_rc5_hauppauge_new_table = {
+        .scan = ir_codes_rc5_hauppauge_new,
+        .size = ARRAY_SIZE(ir_codes_rc5_hauppauge_new),
+        .ir_type = IR_TYPE_RC5,
+};
+EXPORT_SYMBOL_GPL(ir_codes_rc5_hauppauge_new_table);
+/* Terratec Cinergy Hybrid T USB XS FM
+   Mauro Carvalho Chehab <mchehab@redhat.com>
+ */
+static struct ir_scancode ir_codes_nec_terratec_cinergy_xs[] = {
+        { 0x1441, KEY_HOME},
+        { 0x1401, KEY_POWER2},
+        { 0x1442, KEY_MENU},            /* DVD menu */
+        { 0x1443, KEY_SUBTITLE},
+        { 0x1444, KEY_TEXT},            /* Teletext */
+        { 0x1445, KEY_DELETE},
+        { 0x1402, KEY_1},
+        { 0x1403, KEY_2},
+        { 0x1404, KEY_3},
+        { 0x1405, KEY_4},
+        { 0x1406, KEY_5},
+        { 0x1407, KEY_6},
+        { 0x1408, KEY_7},
+        { 0x1409, KEY_8},
+        { 0x140a, KEY_9},
+        { 0x140c, KEY_0},
+        { 0x140b, KEY_TUNER},           /* AV */
+        { 0x140d, KEY_MODE},            /* A.B */
+        { 0x1446, KEY_TV},
+        { 0x1447, KEY_DVD},
+        { 0x1449, KEY_VIDEO},
+        { 0x144a, KEY_RADIO},           /* Music */
+        { 0x144b, KEY_CAMERA},          /* PIC */
+        { 0x1410, KEY_UP},
+        { 0x1411, KEY_LEFT},
+        { 0x1412, KEY_OK},
+        { 0x1413, KEY_RIGHT},
+        { 0x1414, KEY_DOWN},
+        { 0x140f, KEY_EPG},
+        { 0x1416, KEY_INFO},
+        { 0x144d, KEY_BACKSPACE},
+        { 0x141c, KEY_VOLUMEUP},
+        { 0x141e, KEY_VOLUMEDOWN},
+        { 0x144c, KEY_PLAY},
+        { 0x141d, KEY_MUTE},
+        { 0x141b, KEY_CHANNELUP},
+        { 0x141f, KEY_CHANNELDOWN},
+        { 0x1417, KEY_RED},
+        { 0x1418, KEY_GREEN},
+        { 0x1419, KEY_YELLOW},
+        { 0x141a, KEY_BLUE},
+        { 0x1458, KEY_RECORD},
+        { 0x1448, KEY_STOP},
+        { 0x1440, KEY_PAUSE},
+        { 0x1454, KEY_LAST},
+        { 0x144e, KEY_REWIND},
+        { 0x144f, KEY_FASTFORWARD},
+        { 0x145c, KEY_NEXT},
+};
+struct ir_scancode_table ir_codes_nec_terratec_cinergy_xs_table = {
+        .scan = ir_codes_nec_terratec_cinergy_xs,
+        .size = ARRAY_SIZE(ir_codes_nec_terratec_cinergy_xs),
+        .ir_type = IR_TYPE_NEC,
+};
+EXPORT_SYMBOL_GPL(ir_codes_nec_terratec_cinergy_xs_table);
diff --git a/drivers/media/common/ir-keytable.c b/drivers/media/IR/ir-keytable.c
index 26ce5bc2fdd5..bff7a5356037 100644
--- a/drivers/media/common/ir-keytable.c
+++ b/drivers/media/IR/ir-keytable.c
@@ -1,10 +1,19 @@
 /* ir-register.c - handle IR scancode->keycode tables
 *
 * Copyright (C) 2009 by Mauro Carvalho Chehab <mchehab@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation version 2 of the License.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
 */
-#include <linux/usb/input.h>
+#include <linux/usb/input.h>
 #include <media/ir-common.h>
 #define IR_TAB_MIN_SIZE 32
@@ -72,6 +81,7 @@ int ir_roundup_tablesize(int n_elems)
        return n_elems;
 }
+EXPORT_SYMBOL_GPL(ir_roundup_tablesize);
 /**
 * ir_copy_table() - copies a keytable, discarding the unused entries
@@ -100,6 +110,7 @@ int ir_copy_table(struct ir_scancode_table *destin,
        return 0;
 }
+EXPORT_SYMBOL_GPL(ir_copy_table);
 /**
 * ir_getkeycode() - get a keycode at the evdev scancode ->keycode table
@@ -114,7 +125,8 @@ static int ir_getkeycode(struct input_dev *dev,
                         int scancode, int *keycode)
 {
        int elem;
-        struct ir_scancode_table *rc_tab = input_get_drvdata(dev);
+        struct ir_input_dev *ir_dev = input_get_drvdata(dev);
+        struct ir_scancode_table *rc_tab = &ir_dev->rc_tab;
        elem = ir_seek_table(rc_tab, scancode);
        if (elem >= 0) {
@@ -136,7 +148,6 @@ static int ir_getkeycode(struct input_dev *dev,
        return 0;
 }
 /**
 * ir_is_resize_needed() - Check if the table needs rezise
 * @table:              keycode table that may need to resize
@@ -286,7 +297,8 @@ static int ir_setkeycode(struct input_dev *dev,
                         int scancode, int keycode)
 {
        int rc = 0;
-        struct ir_scancode_table *rc_tab = input_get_drvdata(dev);
+        struct ir_input_dev *ir_dev = input_get_drvdata(dev);
+        struct ir_scancode_table *rc_tab = &ir_dev->rc_tab;
        struct ir_scancode *keymap = rc_tab->scan;
        unsigned long flags;
@@ -360,7 +372,8 @@ static int ir_setkeycode(struct input_dev *dev,
 */
 u32 ir_g_keycode_from_table(struct input_dev *dev, u32 scancode)
 {
-        struct ir_scancode_table *rc_tab = input_get_drvdata(dev);
+        struct ir_input_dev *ir_dev = input_get_drvdata(dev);
+        struct ir_scancode_table *rc_tab = &ir_dev->rc_tab;
        struct ir_scancode *keymap = rc_tab->scan;
        int elem;
@@ -378,9 +391,10 @@ u32 ir_g_keycode_from_table(struct input_dev *dev, u32 scancode)
        /* Reports userspace that an unknown keycode were got */
        return KEY_RESERVED;
 }
+EXPORT_SYMBOL_GPL(ir_g_keycode_from_table);
 /**
- * ir_set_keycode_table() - sets the IR keycode table and add the handlers
+ * ir_input_register() - sets the IR keycode table and add the handlers
 *                          for keymap table get/set
 * @input_dev:  the struct input_dev descriptor of the device
 * @rc_tab:     the struct ir_scancode_table table of scancode/keymap
@@ -389,17 +403,34 @@ u32 ir_g_keycode_from_table(struct input_dev *dev, u32 scancode)
 * an IR.
 * It should be called before registering the IR device.
 */
-int ir_set_keycode_table(struct input_dev *input_dev,
+int ir_input_register(struct input_dev *input_dev,
-                         struct ir_scancode_table *rc_tab)
+                      struct ir_scancode_table *rc_tab)
 {
-        struct ir_scancode *keymap = rc_tab->scan;
+        struct ir_input_dev *ir_dev;
-        int i;
+        struct ir_scancode  *keymap    = rc_tab->scan;
+        int i, rc;
-        spin_lock_init(&rc_tab->lock);
        if (rc_tab->scan == NULL || !rc_tab->size)
                return -EINVAL;
+        ir_dev = kzalloc(sizeof(*ir_dev), GFP_KERNEL);
+        if (!ir_dev)
+                return -ENOMEM;
+        spin_lock_init(&rc_tab->lock);
+        ir_dev->rc_tab.size = ir_roundup_tablesize(rc_tab->size);
+        ir_dev->rc_tab.scan = kzalloc(ir_dev->rc_tab.size *
+                                    sizeof(struct ir_scancode), GFP_KERNEL);
+        if (!ir_dev->rc_tab.scan)
+                return -ENOMEM;
+        IR_dprintk(1, "Allocated space for %d keycode entries (%zd bytes)\n",
+                ir_dev->rc_tab.size,
+                ir_dev->rc_tab.size * sizeof(ir_dev->rc_tab.scan));
+        ir_copy_table(&ir_dev->rc_tab, rc_tab);
        /* set the bits for the keys */
        IR_dprintk(1, "key map size: %d\n", rc_tab->size);
        for (i = 0; i < rc_tab->size; i++) {
@@ -407,23 +438,48 @@ int ir_set_keycode_table(struct input_dev *input_dev,
                        i, keymap[i].keycode);
                set_bit(keymap[i].keycode, input_dev->keybit);
        }
+        clear_bit(0, input_dev->keybit);
+        set_bit(EV_KEY, input_dev->evbit);
        input_dev->getkeycode = ir_getkeycode;
        input_dev->setkeycode = ir_setkeycode;
-        input_set_drvdata(input_dev, rc_tab);
+        input_set_drvdata(input_dev, ir_dev);
-        return 0;
+        rc = input_register_device(input_dev);
+        if (rc < 0) {
+                kfree(rc_tab->scan);
+                kfree(ir_dev);
+                input_set_drvdata(input_dev, NULL);
+        }
+        return rc;
 }
+EXPORT_SYMBOL_GPL(ir_input_register);
-void ir_input_free(struct input_dev *dev)
+void ir_input_unregister(struct input_dev *dev)
 {
-        struct ir_scancode_table *rc_tab = input_get_drvdata(dev);
+        struct ir_input_dev *ir_dev = input_get_drvdata(dev);
+        struct ir_scancode_table *rc_tab;
+        if (!ir_dev)
+                return;
        IR_dprintk(1, "Freed keycode table\n");
+        rc_tab = &ir_dev->rc_tab;
        rc_tab->size = 0;
        kfree(rc_tab->scan);
        rc_tab->scan = NULL;
+        kfree(ir_dev);
+        input_unregister_device(dev);
 }
-EXPORT_SYMBOL_GPL(ir_input_free);
+EXPORT_SYMBOL_GPL(ir_input_unregister);
+int ir_core_debug;    /* ir_debug level (0,1,2) */
+EXPORT_SYMBOL_GPL(ir_core_debug);
+module_param_named(debug, ir_core_debug, int, 0644);
+MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig
index ba69beeb0e21..a28541b2b1a2 100644
--- a/drivers/media/Kconfig
+++ b/drivers/media/Kconfig
@@ -99,6 +99,7 @@ config VIDEO_MEDIA
 comment "Multimedia drivers"
 source "drivers/media/common/Kconfig"
+source "drivers/media/IR/Kconfig"
 #
 # Tuner drivers for DVB and V4L
diff --git a/drivers/media/Makefile b/drivers/media/Makefile
index 09a829d8a7e7..499b0810d019 100644
--- a/drivers/media/Makefile
+++ b/drivers/media/Makefile
@@ -2,7 +2,7 @@
 # Makefile for the kernel multimedia device drivers.
 #
-obj-y += common/ video/
+obj-y += common/ IR/ video/
 obj-$(CONFIG_VIDEO_DEV) += radio/
 obj-$(CONFIG_DVB_CORE)  += dvb/
diff --git a/drivers/media/common/Makefile b/drivers/media/common/Makefile
index 169b337b7c9d..e3ec9639321b 100644
--- a/drivers/media/common/Makefile
+++ b/drivers/media/common/Makefile
@@ -1,8 +1,6 @@
 saa7146-objs    := saa7146_i2c.o saa7146_core.o
 saa7146_vv-objs := saa7146_fops.o saa7146_video.o saa7146_hlp.o saa7146_vbi.o
-ir-common-objs  := ir-functions.o ir-keymaps.o ir-keytable.o
 obj-y += tuners/
 obj-$(CONFIG_VIDEO_SAA7146) += saa7146.o
 obj-$(CONFIG_VIDEO_SAA7146_VV) += saa7146_vv.o
-obj-$(CONFIG_VIDEO_IR) += ir-common.o
diff --git a/drivers/media/common/saa7146_fops.c b/drivers/media/common/saa7146_fops.c
index 620f655fa9c5..7364b9642d00 100644
--- a/drivers/media/common/saa7146_fops.c
+++ b/drivers/media/common/saa7146_fops.c
@@ -1,7 +1,5 @@
 #include <media/saa7146_vv.h>
-#define BOARD_CAN_DO_VBI(dev)   (dev->revision != 0 && dev->vv_data->vbi_minor != -1)
 /****************************************************************************/
 /* resource management functions, shamelessly stolen from saa7134 driver */
@@ -194,43 +192,24 @@ void saa7146_buffer_timeout(unsigned long data)
 static int fops_open(struct file *file)
 {
-        unsigned int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct saa7146_dev *h = NULL, *dev = NULL;
+        struct saa7146_dev *dev = video_drvdata(file);
-        struct list_head *list;
        struct saa7146_fh *fh = NULL;
        int result = 0;
-        enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+        enum v4l2_buf_type type;
-        DEB_EE(("file:%p, minor:%d\n", file, minor));
+        DEB_EE(("file:%p, dev:%s\n", file, video_device_node_name(vdev)));
        if (mutex_lock_interruptible(&saa7146_devices_lock))
                return -ERESTARTSYS;
-        list_for_each(list,&saa7146_devices) {
-                h = list_entry(list, struct saa7146_dev, item);
-                if( NULL == h->vv_data ) {
-                        DEB_D(("device %p has not registered video devices.\n",h));
-                        continue;
-                }
-                DEB_D(("trying: %p @ major %d,%d\n",h,h->vv_data->video_minor,h->vv_data->vbi_minor));
-                if (h->vv_data->video_minor == minor) {
-                        dev = h;
-                }
-                if (h->vv_data->vbi_minor == minor) {
-                        type = V4L2_BUF_TYPE_VBI_CAPTURE;
-                        dev = h;
-                }
-        }
-        if (NULL == dev) {
-                DEB_S(("no such video device.\n"));
-                result = -ENODEV;
-                goto out;
-        }
        DEB_D(("using: %p\n",dev));
+        type = vdev->vfl_type == VFL_TYPE_GRABBER
+             ? V4L2_BUF_TYPE_VIDEO_CAPTURE
+             : V4L2_BUF_TYPE_VBI_CAPTURE;
        /* check if an extension is registered */
        if( NULL == dev->ext ) {
                DEB_S(("no extension registered for this device.\n"));
@@ -474,9 +453,6 @@ int saa7146_vv_init(struct saa7146_dev* dev, struct saa7146_ext_vv *ext_vv)
           configuration data) */
        dev->ext_vv_data = ext_vv;
-        vv->video_minor = -1;
-        vv->vbi_minor = -1;
        vv->d_clipping.cpu_addr = pci_alloc_consistent(dev->pci, SAA7146_CLIPPING_MEM, &vv->d_clipping.dma_handle);
        if( NULL == vv->d_clipping.cpu_addr ) {
                ERR(("out of memory. aborting.\n"));
@@ -515,7 +491,6 @@ EXPORT_SYMBOL_GPL(saa7146_vv_release);
 int saa7146_register_device(struct video_device **vid, struct saa7146_dev* dev,
                            char *name, int type)
 {
-        struct saa7146_vv *vv = dev->vv_data;
        struct video_device *vfd;
        int err;
        int i;
@@ -543,15 +518,8 @@ int saa7146_register_device(struct video_device **vid, struct saa7146_dev* dev,
                return err;
        }
-        if( VFL_TYPE_GRABBER == type ) {
+        INFO(("%s: registered device %s [v4l2]\n",
-                vv->video_minor = vfd->minor;
+                dev->name, video_device_node_name(vfd)));
-                INFO(("%s: registered device video%d [v4l2]\n",
-                        dev->name, vfd->num));
-        } else {
-                vv->vbi_minor = vfd->minor;
-                INFO(("%s: registered device vbi%d [v4l2]\n",
-                        dev->name, vfd->num));
-        }
        *vid = vfd;
        return 0;
@@ -560,16 +528,8 @@ EXPORT_SYMBOL_GPL(saa7146_register_device);
 int saa7146_unregister_device(struct video_device **vid, struct saa7146_dev* dev)
 {
-        struct saa7146_vv *vv = dev->vv_data;
        DEB_EE(("dev:%p\n",dev));
-        if ((*vid)->vfl_type == VFL_TYPE_GRABBER) {
-                vv->video_minor = -1;
-        } else {
-                vv->vbi_minor = -1;
-        }
        video_unregister_device(*vid);
        *vid = NULL;
diff --git a/drivers/media/dvb/dm1105/dm1105.c b/drivers/media/dvb/dm1105/dm1105.c
index 53e3f2a7d31a..f0f483ac8b89 100644
--- a/drivers/media/dvb/dm1105/dm1105.c
+++ b/drivers/media/dvb/dm1105/dm1105.c
@@ -589,7 +589,7 @@ int __devinit dm1105_ir_init(struct dm1105dvb *dm1105)
        snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
                "pci-%s/ir0", pci_name(dm1105->pdev));
-        err = ir_input_init(input_dev, &dm1105->ir.ir, ir_type, ir_codes);
+        err = ir_input_init(input_dev, &dm1105->ir.ir, ir_type);
        if (err < 0) {
                input_free_device(input_dev);
                return err;
@@ -611,20 +611,14 @@ int __devinit dm1105_ir_init(struct dm1105dvb *dm1105)
        INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
-        err = input_register_device(input_dev);
+        err = ir_input_register(input_dev, ir_codes);
-        if (err) {
-                ir_input_free(input_dev);
-                input_free_device(input_dev);
-                return err;
-        }
-        return 0;
+        return err;
 }
 void __devexit dm1105_ir_exit(struct dm1105dvb *dm1105)
 {
-        ir_input_free(dm1105->ir.input_dev);
+        ir_input_unregister(dm1105->ir.input_dev);
-        input_unregister_device(dm1105->ir.input_dev);
 }
 static int __devinit dm1105dvb_hw_init(struct dm1105dvb *dm1105dvb)
diff --git a/drivers/media/dvb/dvb-usb/Kconfig b/drivers/media/dvb/dvb-usb/Kconfig
index 2dee1bf73577..1b249897c9fb 100644
--- a/drivers/media/dvb/dvb-usb/Kconfig
+++ b/drivers/media/dvb/dvb-usb/Kconfig
@@ -265,9 +265,13 @@ config DVB_USB_DW2102
        select DVB_TDA10021 if !DVB_FE_CUSTOMISE
        select DVB_MT312 if !DVB_FE_CUSTOMISE
        select DVB_ZL10039 if !DVB_FE_CUSTOMISE
+        select DVB_DS3000 if !DVB_FE_CUSTOMISE
+        select DVB_STB6100 if !DVB_FE_CUSTOMISE
+        select DVB_STV6110 if !DVB_FE_CUSTOMISE
+        select DVB_STV0900 if !DVB_FE_CUSTOMISE
        help
-          Say Y here to support the DvbWorld DVB-S/S2 USB2.0 receivers
+          Say Y here to support the DvbWorld, TeVii, Prof DVB-S/S2 USB2.0
-          and the TeVii S650, S630.
+          receivers.
 config DVB_USB_CINERGY_T2
        tristate "Terratec CinergyT2/qanu USB 2.0 DVB-T receiver"
diff --git a/drivers/media/dvb/dvb-usb/dib0700.h b/drivers/media/dvb/dvb-usb/dib0700.h
index 8b544fe79b0d..495a90577c5f 100644
--- a/drivers/media/dvb/dvb-usb/dib0700.h
+++ b/drivers/media/dvb/dvb-usb/dib0700.h
@@ -20,20 +20,22 @@ extern int dvb_usb_dib0700_debug;
 #define deb_fwdata(args...) dprintk(dvb_usb_dib0700_debug,0x04,args)
 #define deb_data(args...)   dprintk(dvb_usb_dib0700_debug,0x08,args)
-#define REQUEST_I2C_READ     0x2
+#define REQUEST_SET_USB_XFER_LEN    0x0 /* valid only for firmware version */
-#define REQUEST_I2C_WRITE    0x3
+                                        /* higher than 1.21 */
-#define REQUEST_POLL_RC      0x4 /* deprecated in firmware v1.20 */
+#define REQUEST_I2C_READ            0x2
-#define REQUEST_JUMPRAM      0x8
+#define REQUEST_I2C_WRITE           0x3
-#define REQUEST_SET_CLOCK    0xB
+#define REQUEST_POLL_RC             0x4 /* deprecated in firmware v1.20 */
-#define REQUEST_SET_GPIO     0xC
+#define REQUEST_JUMPRAM             0x8
-#define REQUEST_ENABLE_VIDEO 0xF
+#define REQUEST_SET_CLOCK           0xB
+#define REQUEST_SET_GPIO            0xC
+#define REQUEST_ENABLE_VIDEO        0xF
        // 1 Byte: 4MSB(1 = enable streaming, 0 = disable streaming) 4LSB(Video Mode: 0 = MPEG2 188Bytes, 1 = Analog)
        // 2 Byte: MPEG2 mode:  4MSB(1 = Master Mode, 0 = Slave Mode) 4LSB(Channel 1 = bit0, Channel 2 = bit1)
        // 2 Byte: Analog mode: 4MSB(0 = 625 lines, 1 = 525 lines)    4LSB(     "                "           )
-#define REQUEST_SET_RC       0x11
+#define REQUEST_SET_RC              0x11
-#define REQUEST_NEW_I2C_READ 0x12
+#define REQUEST_NEW_I2C_READ        0x12
-#define REQUEST_NEW_I2C_WRITE 0x13
+#define REQUEST_NEW_I2C_WRITE       0x13
-#define REQUEST_GET_VERSION  0x15
+#define REQUEST_GET_VERSION         0x15
 struct dib0700_state {
        u8 channel_state;
@@ -44,6 +46,8 @@ struct dib0700_state {
        u8 is_dib7000pc;
        u8 fw_use_new_i2c_api;
        u8 disable_streaming_master_mode;
+    u32 fw_version;
+    u32 nb_packet_buffer_size;
 };
 extern int dib0700_get_version(struct dvb_usb_device *d, u32 *hwversion,
diff --git a/drivers/media/dvb/dvb-usb/dib0700_core.c b/drivers/media/dvb/dvb-usb/dib0700_core.c
index db7f7f79a66c..0d3c9a9a33be 100644
--- a/drivers/media/dvb/dvb-usb/dib0700_core.c
+++ b/drivers/media/dvb/dvb-usb/dib0700_core.c
@@ -17,6 +17,14 @@ int dvb_usb_dib0700_ir_proto = 1;
 module_param(dvb_usb_dib0700_ir_proto, int, 0644);
 MODULE_PARM_DESC(dvb_usb_dib0700_ir_proto, "set ir protocol (0=NEC, 1=RC5 (default), 2=RC6).");
+static int nb_packet_buffer_size = 21;
+module_param(nb_packet_buffer_size, int, 0644);
+MODULE_PARM_DESC(nb_packet_buffer_size,
+        "Set the dib0700 driver data buffer size. This parameter "
+        "corresponds to the number of TS packets. The actual size of "
+        "the data buffer corresponds to this parameter "
+        "multiplied by 188 (default: 21)");
 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
@@ -28,10 +36,14 @@ int dib0700_get_version(struct dvb_usb_device *d, u32 *hwversion,
                                  REQUEST_GET_VERSION,
                                  USB_TYPE_VENDOR | USB_DIR_IN, 0, 0,
                                  b, sizeof(b), USB_CTRL_GET_TIMEOUT);
-        *hwversion  = (b[0] << 24)  | (b[1] << 16)  | (b[2] << 8)  | b[3];
+        if (hwversion != NULL)
-        *romversion = (b[4] << 24)  | (b[5] << 16)  | (b[6] << 8)  | b[7];
+                *hwversion  = (b[0] << 24)  | (b[1] << 16)  | (b[2] << 8)  | b[3];
-        *ramversion = (b[8] << 24)  | (b[9] << 16)  | (b[10] << 8) | b[11];
+        if (romversion != NULL)
-        *fwtype     = (b[12] << 24) | (b[13] << 16) | (b[14] << 8) | b[15];
+                *romversion = (b[4] << 24)  | (b[5] << 16)  | (b[6] << 8)  | b[7];
+        if (ramversion != NULL)
+                *ramversion = (b[8] << 24)  | (b[9] << 16)  | (b[10] << 8) | b[11];
+        if (fwtype != NULL)
+                *fwtype     = (b[12] << 24) | (b[13] << 16) | (b[14] << 8) | b[15];
        return ret;
 }
@@ -97,6 +109,27 @@ int dib0700_set_gpio(struct dvb_usb_device *d, enum dib07x0_gpios gpio, u8 gpio_
        return dib0700_ctrl_wr(d,buf,3);
 }
+static int dib0700_set_usb_xfer_len(struct dvb_usb_device *d, u16 nb_ts_packets)
+{
+    struct dib0700_state *st = d->priv;
+    u8 b[3];
+    int ret;
+    if (st->fw_version >= 0x10201) {
+        b[0] = REQUEST_SET_USB_XFER_LEN;
+        b[1] = (nb_ts_packets >> 8)&0xff;
+        b[2] = nb_ts_packets & 0xff;
+        deb_info("set the USB xfer len to %i Ts packet\n", nb_ts_packets);
+        ret = dib0700_ctrl_wr(d, b, 3);
+    } else {
+        deb_info("this firmware does not allow to change the USB xfer len\n");
+        ret = -EIO;
+    }
+    return ret;
+}
 /*
 * I2C master xfer function (supported in 1.20 firmware)
 */
@@ -328,7 +361,9 @@ static int dib0700_jumpram(struct usb_device *udev, u32 address)
 int dib0700_download_firmware(struct usb_device *udev, const struct firmware *fw)
 {
        struct hexline hx;
-        int pos = 0, ret, act_len;
+        int pos = 0, ret, act_len, i, adap_num;
+        u8 b[16];
+        u32 fw_version;
        u8 buf[260];
@@ -364,6 +399,34 @@ int dib0700_download_firmware(struct usb_device *udev, const struct firmware *fw
        } else
                ret = -EIO;
+        /* the number of ts packet has to be at least 1 */
+        if (nb_packet_buffer_size < 1)
+                nb_packet_buffer_size = 1;
+        /* get the fimware version */
+        usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
+                                  REQUEST_GET_VERSION,
+                                  USB_TYPE_VENDOR | USB_DIR_IN, 0, 0,
+                                  b, sizeof(b), USB_CTRL_GET_TIMEOUT);
+        fw_version = (b[8] << 24)  | (b[9] << 16)  | (b[10] << 8) | b[11];
+        /* set the buffer size - DVB-USB is allocating URB buffers
+         * only after the firwmare download was successful */
+        for (i = 0; i < dib0700_device_count; i++) {
+                for (adap_num = 0; adap_num < dib0700_devices[i].num_adapters;
+                                adap_num++) {
+                        if (fw_version >= 0x10201)
+                                dib0700_devices[i].adapter[adap_num].stream.u.bulk.buffersize = 188*nb_packet_buffer_size;
+                        else {
+                                /* for fw version older than 1.20.1,
+                                 * the buffersize has to be n times 512 */
+                                dib0700_devices[i].adapter[adap_num].stream.u.bulk.buffersize = ((188*nb_packet_buffer_size+188/2)/512)*512;
+                                if (dib0700_devices[i].adapter[adap_num].stream.u.bulk.buffersize < 512)
+                                        dib0700_devices[i].adapter[adap_num].stream.u.bulk.buffersize = 512;
+                        }
+                }
+        }
        return ret;
 }
@@ -371,6 +434,18 @@ int dib0700_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
 {
        struct dib0700_state *st = adap->dev->priv;
        u8 b[4];
+        int ret;
+        if ((onoff != 0) && (st->fw_version >= 0x10201)) {
+                /* for firmware later than 1.20.1,
+                 * the USB xfer length can be set  */
+                ret = dib0700_set_usb_xfer_len(adap->dev,
+                        st->nb_packet_buffer_size);
+                if (ret < 0) {
+                        deb_info("can not set the USB xfer len\n");
+                        return ret;
+                }
+        }
        b[0] = REQUEST_ENABLE_VIDEO;
        b[1] = (onoff << 4) | 0x00; /* this bit gives a kind of command, rather than enabling something or not */
@@ -415,9 +490,21 @@ static int dib0700_probe(struct usb_interface *intf,
        for (i = 0; i < dib0700_device_count; i++)
                if (dvb_usb_device_init(intf, &dib0700_devices[i], THIS_MODULE,
-                                        &dev, adapter_nr) == 0)
+                    &dev, adapter_nr) == 0) {
-                {
+                        struct dib0700_state *st = dev->priv;
+                        u32 hwversion, romversion, fw_version, fwtype;
+                        dib0700_get_version(dev, &hwversion, &romversion,
+                                &fw_version, &fwtype);
+                        deb_info("Firmware version: %x, %d, 0x%x, %d\n",
+                                hwversion, romversion, fw_version, fwtype);
+                        st->fw_version = fw_version;
+                        st->nb_packet_buffer_size = (u32)nb_packet_buffer_size;
                        dib0700_rc_setup(dev);
                        return 0;
                }
diff --git a/drivers/media/dvb/dvb-usb/dib0700_devices.c b/drivers/media/dvb/dvb-usb/dib0700_devices.c
index 684146f98eb7..44972d01bbd0 100644
--- a/drivers/media/dvb/dvb-usb/dib0700_devices.c
+++ b/drivers/media/dvb/dvb-usb/dib0700_devices.c
@@ -18,6 +18,7 @@
 #include "xc5000.h"
 #include "s5h1411.h"
 #include "dib0070.h"
+#include "dib0090.h"
 #include "lgdt3305.h"
 #include "mxl5007t.h"
@@ -130,93 +131,95 @@ static int bristol_tuner_attach(struct dvb_usb_adapter *adap)
 /* MT226x */
 static struct dibx000_agc_config stk7700d_7000p_mt2266_agc_config[2] = {
        {
-                BAND_UHF, // band_caps
+                BAND_UHF,
                /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
                * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
-                (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), // setup
+                (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
+            | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
-                1130,  // inv_gain
-                21,  // time_stabiliz
+                1130,
+                21,
-                0,  // alpha_level
-                118,  // thlock
+                0,
+                118,
-                0,     // wbd_inv
-                3530,  // wbd_ref
+                0,
-                1,     // wbd_sel
+                3530,
-                0,     // wbd_alpha
+                1,
+                0,
-                65535,  // agc1_max
-                33770,  // agc1_min
+                65535,
-                65535,  // agc2_max
+                33770,
-                23592,  // agc2_min
+                65535,
+                23592,
-                0,    // agc1_pt1
-                62,   // agc1_pt2
+                0,
-                255,  // agc1_pt3
+                62,
-                64,   // agc1_slope1
+                255,
-                64,   // agc1_slope2
+                64,
-                132,  // agc2_pt1
+                64,
-                192,  // agc2_pt2
+                132,
-                80,   // agc2_slope1
+                192,
-                80,   // agc2_slope2
+                80,
+                80,
-                17,  // alpha_mant
-                27,  // alpha_exp
+                17,
-                23,  // beta_mant
+                27,
-                51,  // beta_exp
+                23,
+                51,
-                1,  // perform_agc_softsplit
+                1,
        }, {
-                BAND_VHF | BAND_LBAND, // band_caps
+                BAND_VHF | BAND_LBAND,
                /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
                * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
-                (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), // setup
+                (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
+            | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
-                2372, // inv_gain
-                21,   // time_stabiliz
+                2372,
+                21,
-                0,    // alpha_level
-                118,  // thlock
+                0,
+                118,
-                0,    // wbd_inv
-                3530, // wbd_ref
+                0,
-                1,     // wbd_sel
+                3530,
-                0,    // wbd_alpha
+                1,
+                0,
-                65535, // agc1_max
-                0,     // agc1_min
+                65535,
-                65535, // agc2_max
+                0,
-                23592, // agc2_min
+                65535,
+                23592,
-                0,    // agc1_pt1
-                128,  // agc1_pt2
+                0,
-                128,  // agc1_pt3
+                128,
-                128,  // agc1_slope1
+                128,
-                0,    // agc1_slope2
+                128,
-                128,  // agc2_pt1
+                0,
-                253,  // agc2_pt2
+                128,
-                81,   // agc2_slope1
+                253,
-                0,    // agc2_slope2
+                81,
+                0,
-                17,  // alpha_mant
-                27,  // alpha_exp
+                17,
-                23,  // beta_mant
+                27,
-                51,  // beta_exp
+                23,
+                51,
-                1,  // perform_agc_softsplit
+                1,
        }
 };
 static struct dibx000_bandwidth_config stk7700d_mt2266_pll_config = {
-        60000, 30000, // internal, sampling
+        60000, 30000,
-        1, 8, 3, 1, 0, // pll_cfg: prediv, ratio, range, reset, bypass
+        1, 8, 3, 1, 0,
-        0, 0, 1, 1, 2, // misc: refdiv, bypclk_div, IO_CLK_en_core, ADClkSrc, modulo
+        0, 0, 1, 1, 2,
-        (3 << 14) | (1 << 12) | (524 << 0), // sad_cfg: refsel, sel, freq_15k
+        (3 << 14) | (1 << 12) | (524 << 0),
-        0, // ifreq
+        0,
-        20452225, // timf
+        20452225,
 };
 static struct dib7000p_config stk7700d_dib7000p_mt2266_config[] = {
@@ -605,17 +608,17 @@ static int dib0700_rc_query_v1_20(struct dvb_usb_device *d, u32 *event,
                }
                break;
        default:
-                if (actlen != sizeof(buf)) {
+        if (actlen != sizeof(buf)) {
-                        /* We didn't get back the 6 byte message we expected */
+                /* We didn't get back the 6 byte message we expected */
-                        err("Unexpected RC response size [%d]", actlen);
+                err("Unexpected RC response size [%d]", actlen);
-                        return -1;
+                return -1;
-                }
+        }
-                poll_reply.report_id  = buf[0];
+        poll_reply.report_id  = buf[0];
-                poll_reply.data_state = buf[1];
+        poll_reply.data_state = buf[1];
                poll_reply.system     = (buf[2] << 8) | buf[3];
-                poll_reply.data       = buf[4];
+        poll_reply.data       = buf[4];
-                poll_reply.not_data   = buf[5];
+        poll_reply.not_data   = buf[5];
                break;
        }
@@ -632,7 +635,7 @@ static int dib0700_rc_query_v1_20(struct dvb_usb_device *d, u32 *event,
        /* Find the key in the map */
        for (i = 0; i < d->props.rc_key_map_size; i++) {
                if (rc5_custom(&keymap[i]) == (poll_reply.system & 0xff) &&
-                    rc5_data(&keymap[i]) == poll_reply.data) {
+                        rc5_data(&keymap[i]) == poll_reply.data) {
                        *event = keymap[i].event;
                        found = 1;
                        break;
@@ -641,8 +644,8 @@ static int dib0700_rc_query_v1_20(struct dvb_usb_device *d, u32 *event,
        if (found == 0) {
                err("Unknown remote controller key: %04x %02x %02x",
-                    poll_reply.system,
+                        poll_reply.system,
-                    poll_reply.data, poll_reply.not_data);
+                        poll_reply.data, poll_reply.not_data);
                d->last_event = 0;
                return 0;
        }
@@ -933,47 +936,48 @@ static struct dvb_usb_rc_key dib0700_rc_keys[] = {
 /* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */
 static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = {
-        BAND_UHF | BAND_VHF,       // band_caps
+        BAND_UHF | BAND_VHF,
        /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
         * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
-        (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), // setup
+        (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
+        | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
-        712,  // inv_gain
-        41,  // time_stabiliz
+        712,
+        41,
-        0,  // alpha_level
-        118,  // thlock
+        0,
+        118,
-        0,     // wbd_inv
-        4095,  // wbd_ref
+        0,
-        0,     // wbd_sel
+        4095,
-        0,     // wbd_alpha
+        0,
+        0,
-        42598,  // agc1_max
-        17694,  // agc1_min
+        42598,
-        45875,  // agc2_max
+        17694,
-        2621,  // agc2_min
+        45875,
-        0,  // agc1_pt1
+        2621,
-        76,  // agc1_pt2
+        0,
-        139,  // agc1_pt3
+        76,
-        52,  // agc1_slope1
+        139,
-        59,  // agc1_slope2
+        52,
-        107,  // agc2_pt1
+        59,
-        172,  // agc2_pt2
+        107,
-        57,  // agc2_slope1
+        172,
-        70,  // agc2_slope2
+        57,
+        70,
-        21,  // alpha_mant
-        25,  // alpha_exp
+        21,
-        28,  // beta_mant
+        25,
-        48,  // beta_exp
+        28,
+        48,
-        1,  // perform_agc_softsplit
-        {  0,     // split_min
+        1,
-           107,   // split_max
+        {  0,
-           51800, // global_split_min
+           107,
-           24700  // global_split_max
+           51800,
+           24700
        },
 };
@@ -982,54 +986,55 @@ static struct dibx000_agc_config stk7700p_7000p_mt2060_agc_config = {
        /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
         * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
-        (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), // setup
+        (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
+        | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
-        712, // inv_gain
+        712,
-        41,  // time_stabiliz
+        41,
-        0,   // alpha_level
+        0,
-        118, // thlock
+        118,
-        0,    // wbd_inv
+        0,
-        4095, // wbd_ref
+        4095,
-        0,    // wbd_sel
+        0,
-        0,    // wbd_alpha
+        0,
-        42598, // agc1_max
+        42598,
-        16384, // agc1_min
+        16384,
-        42598, // agc2_max
+        42598,
-            0, // agc2_min
+            0,
-          0,   // agc1_pt1
+          0,
-        137,   // agc1_pt2
+        137,
-        255,   // agc1_pt3
+        255,
-          0,   // agc1_slope1
+          0,
-        255,   // agc1_slope2
+        255,
-        0,     // agc2_pt1
+        0,
-        0,     // agc2_pt2
+        0,
-         0,    // agc2_slope1
+         0,
-        41,    // agc2_slope2
+        41,
-        15, // alpha_mant
+        15,
-        25, // alpha_exp
+        25,
-        28, // beta_mant
+        28,
-        48, // beta_exp
+        48,
-        0, // perform_agc_softsplit
+        0,
 };
 static struct dibx000_bandwidth_config stk7700p_pll_config = {
-        60000, 30000, // internal, sampling
+        60000, 30000,
-        1, 8, 3, 1, 0, // pll_cfg: prediv, ratio, range, reset, bypass
+        1, 8, 3, 1, 0,
-        0, 0, 1, 1, 0, // misc: refdiv, bypclk_div, IO_CLK_en_core, ADClkSrc, modulo
+        0, 0, 1, 1, 0,
-        (3 << 14) | (1 << 12) | (524 << 0), // sad_cfg: refsel, sel, freq_15k
+        (3 << 14) | (1 << 12) | (524 << 0),
-        60258167, // ifreq
+        60258167,
-        20452225, // timf
+        20452225,
-        30000000, // xtal
+        30000000,
 };
 static struct dib7000m_config stk7700p_dib7000m_config = {
@@ -1115,41 +1120,42 @@ static struct dibx000_agc_config dib7070_agc_config = {
        BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
        /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
         * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
-        (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), // setup
+        (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
+        | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
-        600, // inv_gain
-        10,  // time_stabiliz
+        600,
+        10,
-        0,  // alpha_level
-        118,  // thlock
+        0,
+        118,
-        0,     // wbd_inv
-        3530,  // wbd_ref
+        0,
-        1,     // wbd_sel
+        3530,
-        5,     // wbd_alpha
+        1,
+        5,
-        65535,  // agc1_max
-                0,  // agc1_min
+        65535,
+                0,
-        65535,  // agc2_max
-        0,      // agc2_min
+        65535,
+        0,
-        0,      // agc1_pt1
-        40,     // agc1_pt2
+        0,
-        183,    // agc1_pt3
+        40,
-        206,    // agc1_slope1
+        183,
-        255,    // agc1_slope2
+        206,
-        72,     // agc2_pt1
+        255,
-        152,    // agc2_pt2
+        72,
-        88,     // agc2_slope1
+        152,
-        90,     // agc2_slope2
+        88,
+        90,
-        17,  // alpha_mant
-        27,  // alpha_exp
+        17,
-        23,  // beta_mant
+        27,
-        51,  // beta_exp
+        23,
+        51,
-        0,  // perform_agc_softsplit
+        0,
 };
 static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
@@ -1276,13 +1282,13 @@ static int stk70x0p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
 }
 static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
-        60000, 15000, // internal, sampling
+        60000, 15000,
-        1, 20, 3, 1, 0, // pll_cfg: prediv, ratio, range, reset, bypass
+        1, 20, 3, 1, 0,
-        0, 0, 1, 1, 2, // misc: refdiv, bypclk_div, IO_CLK_en_core, ADClkSrc, modulo
+        0, 0, 1, 1, 2,
-        (3 << 14) | (1 << 12) | (524 << 0), // sad_cfg: refsel, sel, freq_15k
+        (3 << 14) | (1 << 12) | (524 << 0),
-        (0 << 25) | 0, // ifreq = 0.000000 MHz
+        (0 << 25) | 0,
-        20452225, // timf
+        20452225,
-        12000000, // xtal_hz
+        12000000,
 };
 static struct dib7000p_config dib7070p_dib7000p_config = {
@@ -1476,12 +1482,12 @@ static struct dib8000_config dib807x_dib8000_config[2] = {
        }
 };
-static int dib807x_tuner_reset(struct dvb_frontend *fe, int onoff)
+static int dib80xx_tuner_reset(struct dvb_frontend *fe, int onoff)
 {
        return dib8000_set_gpio(fe, 5, 0, !onoff);
 }
-static int dib807x_tuner_sleep(struct dvb_frontend *fe, int onoff)
+static int dib80xx_tuner_sleep(struct dvb_frontend *fe, int onoff)
 {
        return dib8000_set_gpio(fe, 0, 0, onoff);
 }
@@ -1494,8 +1500,8 @@ static const struct dib0070_wbd_gain_cfg dib8070_wbd_gain_cfg[] = {
 static struct dib0070_config dib807x_dib0070_config[2] = {
        {
                .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
-                .reset = dib807x_tuner_reset,
+                .reset = dib80xx_tuner_reset,
-                .sleep = dib807x_tuner_sleep,
+                .sleep = dib80xx_tuner_sleep,
                .clock_khz = 12000,
                .clock_pad_drive = 4,
                .vga_filter = 1,
@@ -1508,8 +1514,8 @@ static struct dib0070_config dib807x_dib0070_config[2] = {
                .freq_offset_khz_vhf = -100,
        }, {
                .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
-                .reset = dib807x_tuner_reset,
+                .reset = dib80xx_tuner_reset,
-                .sleep = dib807x_tuner_sleep,
+                .sleep = dib80xx_tuner_sleep,
                .clock_khz = 12000,
                .clock_pad_drive = 2,
                .vga_filter = 1,
@@ -1566,12 +1572,14 @@ static int dib807x_tuner_attach(struct dvb_usb_adapter *adap)
        return 0;
 }
-static int stk807x_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
+static int stk80xx_pid_filter(struct dvb_usb_adapter *adapter, int index,
+        u16 pid, int onoff)
 {
    return dib8000_pid_filter(adapter->fe, index, pid, onoff);
 }
-static int stk807x_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
+static int stk80xx_pid_filter_ctrl(struct dvb_usb_adapter *adapter,
+        int onoff)
 {
    return dib8000_pid_filter_ctrl(adapter->fe, onoff);
 }
@@ -1624,7 +1632,7 @@ static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap)
        dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
        /* initialize IC 0 */
-        dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x80);
+        dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x80);
        adap->fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80,
                              &dib807x_dib8000_config[0]);
@@ -1635,7 +1643,7 @@ static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap)
 static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
 {
        /* initialize IC 1 */
-        dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x82);
+        dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x82);
        adap->fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x82,
                              &dib807x_dib8000_config[1]);
@@ -1643,6 +1651,245 @@ static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
        return adap->fe == NULL ? -ENODEV : 0;
 }
+/* STK8096GP */
+struct dibx000_agc_config dib8090_agc_config[2] = {
+    {
+        BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
+        /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
+     * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
+     * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
+        (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
+        | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
+        787,
+        10,
+        0,
+        118,
+        0,
+        3530,
+        1,
+        5,
+        65535,
+        0,
+        65535,
+        0,
+        0,
+        32,
+        114,
+        143,
+        144,
+        114,
+        227,
+        116,
+        117,
+        28,
+        26,
+        31,
+        51,
+        0,
+    },
+    {
+        BAND_CBAND,
+        /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
+     * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
+     * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
+        (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
+        | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
+        787,
+        10,
+        0,
+        118,
+        0,
+        3530,
+        1,
+        5,
+        0,
+        0,
+        65535,
+        0,
+        0,
+        32,
+        114,
+        143,
+        144,
+        114,
+        227,
+        116,
+        117,
+        28,
+        26,
+        31,
+        51,
+        0,
+    }
+};
+static struct dibx000_bandwidth_config dib8090_pll_config_12mhz = {
+    54000, 13500,
+    1, 18, 3, 1, 0,
+    0, 0, 1, 1, 2,
+    (3 << 14) | (1 << 12) | (599 << 0),
+    (0 << 25) | 0,
+    20199727,
+    12000000,
+};
+static int dib8090_get_adc_power(struct dvb_frontend *fe)
+{
+    return dib8000_get_adc_power(fe, 1);
+}
+static struct dib8000_config dib809x_dib8000_config = {
+    .output_mpeg2_in_188_bytes = 1,
+    .agc_config_count = 2,
+    .agc = dib8090_agc_config,
+    .agc_control = dib0090_dcc_freq,
+    .pll = &dib8090_pll_config_12mhz,
+    .tuner_is_baseband = 1,
+    .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
+    .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
+    .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
+    .hostbus_diversity = 1,
+    .div_cfg = 0x31,
+    .output_mode = OUTMODE_MPEG2_FIFO,
+    .drives = 0x2d98,
+    .diversity_delay = 144,
+    .refclksel = 3,
+};
+static struct dib0090_config dib809x_dib0090_config = {
+    .io.pll_bypass = 1,
+    .io.pll_range = 1,
+    .io.pll_prediv = 1,
+    .io.pll_loopdiv = 20,
+    .io.adc_clock_ratio = 8,
+    .io.pll_int_loop_filt = 0,
+    .io.clock_khz = 12000,
+    .reset = dib80xx_tuner_reset,
+    .sleep = dib80xx_tuner_sleep,
+    .clkouttobamse = 1,
+    .analog_output = 1,
+    .i2c_address = DEFAULT_DIB0090_I2C_ADDRESS,
+    .wbd_vhf_offset = 100,
+    .wbd_cband_offset = 450,
+    .use_pwm_agc = 1,
+    .clkoutdrive = 1,
+    .get_adc_power = dib8090_get_adc_power,
+        .freq_offset_khz_uhf = 0,
+        .freq_offset_khz_vhf = -143,
+};
+static int dib8096_set_param_override(struct dvb_frontend *fe,
+                struct dvb_frontend_parameters *fep)
+{
+    struct dvb_usb_adapter *adap = fe->dvb->priv;
+    struct dib0700_adapter_state *state = adap->priv;
+    u8 band = BAND_OF_FREQUENCY(fep->frequency/1000);
+    u16 offset;
+    int ret = 0;
+    enum frontend_tune_state tune_state = CT_SHUTDOWN;
+    u16 ltgain, rf_gain_limit;
+    ret = state->set_param_save(fe, fep);
+    if (ret < 0)
+        return ret;
+    switch (band) {
+    case BAND_VHF:
+            offset = 100;
+            break;
+    case BAND_UHF:
+            offset = 550;
+            break;
+    default:
+            offset = 0;
+            break;
+    }
+    offset += (dib0090_get_wbd_offset(fe) * 8 * 18 / 33 + 1) / 2;
+    dib8000_set_wbd_ref(fe, offset);
+    if (band == BAND_CBAND) {
+        deb_info("tuning in CBAND - soft-AGC startup\n");
+        /* TODO specific wbd target for dib0090 - needed for startup ? */
+        dib0090_set_tune_state(fe, CT_AGC_START);
+        do {
+                ret = dib0090_gain_control(fe);
+                msleep(ret);
+                tune_state = dib0090_get_tune_state(fe);
+                if (tune_state == CT_AGC_STEP_0)
+                        dib8000_set_gpio(fe, 6, 0, 1);
+                else if (tune_state == CT_AGC_STEP_1) {
+                        dib0090_get_current_gain(fe, NULL, NULL, &rf_gain_limit, &ltgain);
+                        if (rf_gain_limit == 0)
+                                dib8000_set_gpio(fe, 6, 0, 0);
+                }
+        } while (tune_state < CT_AGC_STOP);
+        dib0090_pwm_gain_reset(fe);
+        dib8000_pwm_agc_reset(fe);
+        dib8000_set_tune_state(fe, CT_DEMOD_START);
+    } else {
+        deb_info("not tuning in CBAND - standard AGC startup\n");
+        dib0090_pwm_gain_reset(fe);
+    }
+    return 0;
+}
+static int dib809x_tuner_attach(struct dvb_usb_adapter *adap)
+{
+    struct dib0700_adapter_state *st = adap->priv;
+    struct i2c_adapter *tun_i2c = dib8000_get_i2c_master(adap->fe, DIBX000_I2C_INTERFACE_TUNER, 1);
+    if (dvb_attach(dib0090_register, adap->fe, tun_i2c, &dib809x_dib0090_config) == NULL)
+        return -ENODEV;
+    st->set_param_save = adap->fe->ops.tuner_ops.set_params;
+    adap->fe->ops.tuner_ops.set_params = dib8096_set_param_override;
+    return 0;
+}
+static int stk809x_frontend_attach(struct dvb_usb_adapter *adap)
+{
+        dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
+        msleep(10);
+        dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
+        dib0700_ctrl_clock(adap->dev, 72, 1);
+        msleep(10);
+        dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
+        msleep(10);
+        dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
+        dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 0x80);
+        adap->fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config);
+        return adap->fe == NULL ?  -ENODEV : 0;
+}
 /* STK7070PD */
 static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
@@ -1929,14 +2176,17 @@ struct usb_device_id dib0700_usb_id_table[] = {
        { USB_DEVICE(USB_VID_YUAN,      USB_PID_YUAN_STK7700D) },
 /* 55 */{ USB_DEVICE(USB_VID_YUAN,      USB_PID_YUAN_STK7700D_2) },
        { USB_DEVICE(USB_VID_PINNACLE,  USB_PID_PINNACLE_PCTV73A) },
-        { USB_DEVICE(USB_VID_PINNACLE,  USB_PID_PINNACLE_PCTV73ESE) },
+        { USB_DEVICE(USB_VID_PCTV,      USB_PID_PINNACLE_PCTV73ESE) },
-        { USB_DEVICE(USB_VID_PINNACLE,  USB_PID_PINNACLE_PCTV282E) },
+        { USB_DEVICE(USB_VID_PCTV,      USB_PID_PINNACLE_PCTV282E) },
        { USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_STK7770P) },
 /* 60 */{ USB_DEVICE(USB_VID_TERRATEC,  USB_PID_TERRATEC_CINERGY_T_XXS_2) },
        { USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_STK807XPVR) },
        { USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_STK807XP) },
        { USB_DEVICE(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD) },
        { USB_DEVICE(USB_VID_EVOLUTEPC, USB_PID_TVWAY_PLUS) },
+/* 65 */{ USB_DEVICE(USB_VID_PINNACLE,  USB_PID_PINNACLE_PCTV73ESE) },
+        { USB_DEVICE(USB_VID_PINNACLE,  USB_PID_PINNACLE_PCTV282E) },
+        { USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_STK8096GP) },
        { 0 }           /* Terminating entry */
 };
 MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
@@ -2238,11 +2488,11 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                                { NULL },
                        },
                        {   "Pinnacle PCTV 73e SE",
-                                { &dib0700_usb_id_table[57], NULL },
+                                { &dib0700_usb_id_table[57], &dib0700_usb_id_table[65], NULL },
                                { NULL },
                        },
                        {   "Pinnacle PCTV 282e",
-                                { &dib0700_usb_id_table[58], NULL },
+                                { &dib0700_usb_id_table[58], &dib0700_usb_id_table[66], NULL },
                                { NULL },
                        },
                },
@@ -2471,8 +2721,8 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                        {
                                .caps  = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
                                .pid_filter_count = 32,
-                                .pid_filter = stk807x_pid_filter,
+                                .pid_filter = stk80xx_pid_filter,
-                                .pid_filter_ctrl = stk807x_pid_filter_ctrl,
+                                .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
                                .frontend_attach  = stk807x_frontend_attach,
                                .tuner_attach     = dib807x_tuner_attach,
@@ -2510,8 +2760,8 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                        {
                                .caps  = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
                                .pid_filter_count = 32,
-                                .pid_filter = stk807x_pid_filter,
+                                .pid_filter = stk80xx_pid_filter,
-                                .pid_filter_ctrl = stk807x_pid_filter_ctrl,
+                                .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
                                .frontend_attach  = stk807xpvr_frontend_attach0,
                                .tuner_attach     = dib807x_tuner_attach,
@@ -2523,8 +2773,8 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                        {
                                .caps  = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
                                .pid_filter_count = 32,
-                                .pid_filter = stk807x_pid_filter,
+                                .pid_filter = stk80xx_pid_filter,
-                                .pid_filter_ctrl = stk807x_pid_filter_ctrl,
+                                .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
                                .frontend_attach  = stk807xpvr_frontend_attach1,
                                .tuner_attach     = dib807x_tuner_attach,
@@ -2547,6 +2797,37 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                .rc_key_map       = dib0700_rc_keys,
                .rc_key_map_size  = ARRAY_SIZE(dib0700_rc_keys),
                .rc_query         = dib0700_rc_query
+        }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
+                .num_adapters = 1,
+                .adapter = {
+                        {
+                                .caps  = DVB_USB_ADAP_HAS_PID_FILTER |
+                                        DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
+                                .pid_filter_count = 32,
+                                .pid_filter = stk80xx_pid_filter,
+                                .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
+                                .frontend_attach  = stk809x_frontend_attach,
+                                .tuner_attach     = dib809x_tuner_attach,
+                                DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
+                                .size_of_priv =
+                                        sizeof(struct dib0700_adapter_state),
+                        },
+                },
+                .num_device_descs = 1,
+                .devices = {
+                        {   "DiBcom STK8096GP reference design",
+                                { &dib0700_usb_id_table[67], NULL },
+                                { NULL },
+                        },
+                },
+                .rc_interval      = DEFAULT_RC_INTERVAL,
+                .rc_key_map       = dib0700_rc_keys,
+                .rc_key_map_size  = ARRAY_SIZE(dib0700_rc_keys),
+                .rc_query         = dib0700_rc_query
        },
 };
diff --git a/drivers/media/dvb/dvb-usb/dibusb-common.c b/drivers/media/dvb/dvb-usb/dibusb-common.c
index da34979b5337..9143b5631e88 100644
--- a/drivers/media/dvb/dvb-usb/dibusb-common.c
+++ b/drivers/media/dvb/dvb-usb/dibusb-common.c
@@ -142,8 +142,13 @@ static int dibusb_i2c_xfer(struct i2c_adapter *adap,struct i2c_msg msg[],int num
                } else if ((msg[i].flags & I2C_M_RD) == 0) {
                        if (dibusb_i2c_msg(d, msg[i].addr, msg[i].buf,msg[i].len,NULL,0) < 0)
                                break;
-                } else
+                } else if (msg[i].addr != 0x50) {
-                        break;
+                        /* 0x50 is the address of the eeprom - we need to protect it
+                         * from dibusb's bad i2c implementation: reads without
+                         * writing the offset before are forbidden */
+                        if (dibusb_i2c_msg(d, msg[i].addr, NULL, 0, msg[i].buf, msg[i].len) < 0)
+                                break;
+                }
        }
        mutex_unlock(&d->i2c_mutex);
@@ -243,6 +248,12 @@ static struct dib3000mc_config mod3000p_dib3000p_config = {
 int dibusb_dib3000mc_frontend_attach(struct dvb_usb_adapter *adap)
 {
+        if (adap->dev->udev->descriptor.idVendor  == USB_VID_LITEON &&
+                        adap->dev->udev->descriptor.idProduct ==
+                        USB_PID_LITEON_DVB_T_WARM) {
+                msleep(1000);
+        }
        if ((adap->fe = dvb_attach(dib3000mc_attach, &adap->dev->i2c_adap, DEFAULT_DIB3000P_I2C_ADDRESS,  &mod3000p_dib3000p_config)) != NULL ||
                (adap->fe = dvb_attach(dib3000mc_attach, &adap->dev->i2c_adap, DEFAULT_DIB3000MC_I2C_ADDRESS, &mod3000p_dib3000p_config)) != NULL) {
                if (adap->priv != NULL) {
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
index f1602d4ace6d..bc3581d58ced 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
+++ b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
@@ -47,6 +47,7 @@
 #define USB_VID_MSI_2                           0x1462
 #define USB_VID_OPERA1                          0x695c
 #define USB_VID_PINNACLE                        0x2304
+#define USB_VID_PCTV                            0x2013
 #define USB_VID_PIXELVIEW                       0x1554
 #define USB_VID_TECHNOTREND                     0x0b48
 #define USB_VID_TERRATEC                        0x0ccd
@@ -101,6 +102,7 @@
 #define USB_PID_DIBCOM_STK7070PD                        0x1ebe
 #define USB_PID_DIBCOM_STK807XP                         0x1f90
 #define USB_PID_DIBCOM_STK807XPVR                       0x1f98
+#define USB_PID_DIBCOM_STK8096GP                        0x1fa0
 #define USB_PID_DIBCOM_ANCHOR_2135_COLD                 0x2131
 #define USB_PID_DIBCOM_STK7770P                         0x1e80
 #define USB_PID_DPOSH_M9206_COLD                        0x9206
@@ -211,6 +213,7 @@
 #define USB_PID_PINNACLE_PCTV801E_SE                    0x023b
 #define USB_PID_PINNACLE_PCTV73A                        0x0243
 #define USB_PID_PINNACLE_PCTV73ESE                      0x0245
+#define USB_PID_PINNACLE_PCTV74E                        0x0246
 #define USB_PID_PINNACLE_PCTV282E                       0x0248
 #define USB_PID_PIXELVIEW_SBTVD                         0x5010
 #define USB_PID_PCTV_200E                               0x020e
diff --git a/drivers/media/dvb/dvb-usb/dw2102.c b/drivers/media/dvb/dvb-usb/dw2102.c
index 5bb9479d154e..64132c0cf80d 100644
--- a/drivers/media/dvb/dvb-usb/dw2102.c
+++ b/drivers/media/dvb/dvb-usb/dw2102.c
@@ -20,6 +20,11 @@
 #include "tda1002x.h"
 #include "mt312.h"
 #include "zl10039.h"
+#include "ds3000.h"
+#include "stv0900.h"
+#include "stv6110.h"
+#include "stb6100.h"
+#include "stb6100_proc.h"
 #ifndef USB_PID_DW2102
 #define USB_PID_DW2102 0x2102
@@ -37,12 +42,20 @@
 #define USB_PID_CINERGY_S 0x0064
 #endif
+#ifndef USB_PID_TEVII_S630
+#define USB_PID_TEVII_S630 0xd630
+#endif
 #ifndef USB_PID_TEVII_S650
 #define USB_PID_TEVII_S650 0xd650
 #endif
-#ifndef USB_PID_TEVII_S630
+#ifndef USB_PID_TEVII_S660
-#define USB_PID_TEVII_S630 0xd630
+#define USB_PID_TEVII_S660 0xd660
+#endif
+#ifndef USB_PID_PROF_1100
+#define USB_PID_PROF_1100 0xb012
 #endif
 #define DW210X_READ_MSG 0
@@ -55,6 +68,10 @@
 #define DW2102_VOLTAGE_CTRL (0x1800)
 #define DW2102_RC_QUERY (0x1a00)
+#define err_str "did not find the firmware file. (%s) " \
+                "Please see linux/Documentation/dvb/ for more details " \
+                "on firmware-problems."
 struct dvb_usb_rc_keys_table {
        struct dvb_usb_rc_key *rc_keys;
        int rc_keys_size;
@@ -71,6 +88,12 @@ static int ir_keymap;
 module_param_named(keymap, ir_keymap, int, 0644);
 MODULE_PARM_DESC(keymap, "set keymap 0=default 1=dvbworld 2=tevii 3=tbs  ...");
+/* demod probe */
+static int demod_probe = 1;
+module_param_named(demod, demod_probe, int, 0644);
+MODULE_PARM_DESC(demod, "demod to probe (1=cx24116 2=stv0903+stv6110 "
+                        "4=stv0903+stb6100(or-able)).");
 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
 static int dw210x_op_rw(struct usb_device *dev, u8 request, u16 value,
@@ -183,7 +206,7 @@ static int dw2102_serit_i2c_transfer(struct i2c_adapter *adap,
        switch (num) {
        case 2:
                /* read si2109 register by number */
-                buf6[0] = 0xd0;
+                buf6[0] = msg[0].addr << 1;
                buf6[1] = msg[0].len;
                buf6[2] = msg[0].buf[0];
                ret = dw210x_op_rw(d->udev, 0xc2, 0, 0,
@@ -198,7 +221,7 @@ static int dw2102_serit_i2c_transfer(struct i2c_adapter *adap,
                switch (msg[0].addr) {
                case 0x68:
                        /* write to si2109 register */
-                        buf6[0] = 0xd0;
+                        buf6[0] = msg[0].addr << 1;
                        buf6[1] = msg[0].len;
                        memcpy(buf6 + 2, msg[0].buf, msg[0].len);
                        ret = dw210x_op_rw(d->udev, 0xc2, 0, 0, buf6,
@@ -239,7 +262,7 @@ static int dw2102_earda_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg ms
                /* read */
                /* first write first register number */
                u8 ibuf[msg[1].len + 2], obuf[3];
-                obuf[0] = 0xd0;
+                obuf[0] = msg[0].addr << 1;
                obuf[1] = msg[0].len;
                obuf[2] = msg[0].buf[0];
                ret = dw210x_op_rw(d->udev, 0xc2, 0, 0,
@@ -256,7 +279,7 @@ static int dw2102_earda_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg ms
                case 0x68: {
                        /* write to register */
                        u8 obuf[msg[0].len + 2];
-                        obuf[0] = 0xd0;
+                        obuf[0] = msg[0].addr << 1;
                        obuf[1] = msg[0].len;
                        memcpy(obuf + 2, msg[0].buf, msg[0].len);
                        ret = dw210x_op_rw(d->udev, 0xc2, 0, 0,
@@ -266,7 +289,7 @@ static int dw2102_earda_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg ms
                case 0x61: {
                        /* write to tuner */
                        u8 obuf[msg[0].len + 2];
-                        obuf[0] = 0xc2;
+                        obuf[0] = msg[0].addr << 1;
                        obuf[1] = msg[0].len;
                        memcpy(obuf + 2, msg[0].buf, msg[0].len);
                        ret = dw210x_op_rw(d->udev, 0xc2, 0, 0,
@@ -301,78 +324,78 @@ static int dw2104_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[], i
 {
        struct dvb_usb_device *d = i2c_get_adapdata(adap);
        int ret = 0;
-        int len, i;
+        int len, i, j;
        if (!d)
                return -ENODEV;
        if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
                return -EAGAIN;
-        switch (num) {
+        for (j = 0; j < num; j++) {
-        case 2: {
+                switch (msg[j].addr) {
-                /* read */
-                /* first write first register number */
-                u8 ibuf[msg[1].len + 2], obuf[3];
-                obuf[0] = 0xaa;
-                obuf[1] = msg[0].len;
-                obuf[2] = msg[0].buf[0];
-                ret = dw210x_op_rw(d->udev, 0xc2, 0, 0,
-                                obuf, msg[0].len + 2, DW210X_WRITE_MSG);
-                /* second read registers */
-                ret = dw210x_op_rw(d->udev, 0xc3, 0xab , 0,
-                                ibuf, msg[1].len + 2, DW210X_READ_MSG);
-                memcpy(msg[1].buf, ibuf + 2, msg[1].len);
-                break;
-        }
-        case 1:
-                switch (msg[0].addr) {
-                case 0x55: {
-                        if (msg[0].buf[0] == 0xf7) {
-                                /* firmware */
-                                /* Write in small blocks */
-                                u8 obuf[19];
-                                obuf[0] = 0xaa;
-                                obuf[1] = 0x11;
-                                obuf[2] = 0xf7;
-                                len = msg[0].len - 1;
-                                i = 1;
-                                do {
-                                        memcpy(obuf + 3, msg[0].buf + i, (len > 16 ? 16 : len));
-                                        ret = dw210x_op_rw(d->udev, 0xc2, 0, 0,
-                                                obuf, (len > 16 ? 16 : len) + 3, DW210X_WRITE_MSG);
-                                        i += 16;
-                                        len -= 16;
-                                } while (len > 0);
-                        } else {
-                                /* write to register */
-                                u8 obuf[msg[0].len + 2];
-                                obuf[0] = 0xaa;
-                                obuf[1] = msg[0].len;
-                                memcpy(obuf + 2, msg[0].buf, msg[0].len);
-                                ret = dw210x_op_rw(d->udev, 0xc2, 0, 0,
-                                                obuf, msg[0].len + 2, DW210X_WRITE_MSG);
-                        }
-                        break;
-                }
                case(DW2102_RC_QUERY): {
                        u8 ibuf[2];
                        ret  = dw210x_op_rw(d->udev, 0xb8, 0, 0,
                                        ibuf, 2, DW210X_READ_MSG);
-                        memcpy(msg[0].buf, ibuf , 2);
+                        memcpy(msg[j].buf, ibuf , 2);
                        break;
                }
                case(DW2102_VOLTAGE_CTRL): {
                        u8 obuf[2];
                        obuf[0] = 0x30;
-                        obuf[1] = msg[0].buf[0];
+                        obuf[1] = msg[j].buf[0];
                        ret = dw210x_op_rw(d->udev, 0xb2, 0, 0,
                                        obuf, 2, DW210X_WRITE_MSG);
                        break;
                }
+                /*case 0x55: cx24116
+                case 0x6a: stv0903
+                case 0x68: ds3000, stv0903
+                case 0x60: ts2020, stv6110, stb6100 */
+                default: {
+                        if (msg[j].flags == I2C_M_RD) {
+                                /* read registers */
+                                u8  ibuf[msg[j].len + 2];
+                                ret = dw210x_op_rw(d->udev, 0xc3,
+                                                (msg[j].addr << 1) + 1, 0,
+                                                ibuf, msg[j].len + 2,
+                                                DW210X_READ_MSG);
+                                memcpy(msg[j].buf, ibuf + 2, msg[j].len);
+                        mdelay(10);
+                        } else if (((msg[j].buf[0] == 0xb0) &&
+                                                (msg[j].addr == 0x68)) ||
+                                                ((msg[j].buf[0] == 0xf7) &&
+                                                (msg[j].addr == 0x55))) {
+                                /* write firmware */
+                                u8 obuf[19];
+                                obuf[0] = msg[j].addr << 1;
+                                obuf[1] = (msg[j].len > 15 ? 17 : msg[j].len);
+                                obuf[2] = msg[j].buf[0];
+                                len = msg[j].len - 1;
+                                i = 1;
+                                do {
+                                        memcpy(obuf + 3, msg[j].buf + i,
+                                                        (len > 16 ? 16 : len));
+                                        ret = dw210x_op_rw(d->udev, 0xc2, 0, 0,
+                                                obuf, (len > 16 ? 16 : len) + 3,
+                                                DW210X_WRITE_MSG);
+                                        i += 16;
+                                        len -= 16;
+                                } while (len > 0);
+                        } else {
+                                /* write registers */
+                                u8 obuf[msg[j].len + 2];
+                                obuf[0] = msg[j].addr << 1;
+                                obuf[1] = msg[j].len;
+                                memcpy(obuf + 2, msg[j].buf, msg[j].len);
+                                ret = dw210x_op_rw(d->udev, 0xc2, 0, 0,
+                                                obuf, msg[j].len + 2,
+                                                DW210X_WRITE_MSG);
+                        }
+                        break;
+                }
                }
-                break;
        }
        mutex_unlock(&d->i2c_mutex);
@@ -442,63 +465,85 @@ static int dw3101_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],
        return num;
 }
-static int s630_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],
+static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],
                                                                int num)
 {
        struct dvb_usb_device *d = i2c_get_adapdata(adap);
        int ret = 0;
+        int len, i, j;
        if (!d)
                return -ENODEV;
        if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
                return -EAGAIN;
-        switch (num) {
+        for (j = 0; j < num; j++) {
-        case 2: { /* read */
+                switch (msg[j].addr) {
-                u8 ibuf[msg[1].len], obuf[3];
-                obuf[0] = msg[1].len;
-                obuf[1] = (msg[0].addr << 1);
-                obuf[2] = msg[0].buf[0];
-                ret = dw210x_op_rw(d->udev, 0x90, 0, 0,
-                                        obuf, 3, DW210X_WRITE_MSG);
-                msleep(5);
-                ret = dw210x_op_rw(d->udev, 0x91, 0, 0,
-                                        ibuf, msg[1].len, DW210X_READ_MSG);
-                memcpy(msg[1].buf, ibuf, msg[1].len);
-                break;
-        }
-        case 1:
-                switch (msg[0].addr) {
-                case 0x60:
-                case 0x0e: {
-                        /* write to zl10313, zl10039 register, */
-                        u8 obuf[msg[0].len + 2];
-                        obuf[0] = msg[0].len + 1;
-                        obuf[1] = (msg[0].addr << 1);
-                        memcpy(obuf + 2, msg[0].buf, msg[0].len);
-                        ret = dw210x_op_rw(d->udev, 0x80, 0, 0,
-                                        obuf, msg[0].len + 2, DW210X_WRITE_MSG);
-                        break;
-                }
                case (DW2102_RC_QUERY): {
                        u8 ibuf[4];
                        ret  = dw210x_op_rw(d->udev, 0xb8, 0, 0,
                                        ibuf, 4, DW210X_READ_MSG);
-                        msg[0].buf[0] = ibuf[3];
+                        memcpy(msg[j].buf, ibuf + 1, 2);
                        break;
                }
                case (DW2102_VOLTAGE_CTRL): {
                        u8 obuf[2];
-                        obuf[0] = 0x03;
+                        obuf[0] = 3;
-                        obuf[1] = msg[0].buf[0];
+                        obuf[1] = msg[j].buf[0];
                        ret = dw210x_op_rw(d->udev, 0x8a, 0, 0,
                                        obuf, 2, DW210X_WRITE_MSG);
                        break;
                }
+                /*case 0x55: cx24116
+                case 0x6a: stv0903
+                case 0x68: ds3000, stv0903
+                case 0x60: ts2020, stv6110, stb6100
+                case 0xa0: eeprom */
+                default: {
+                        if (msg[j].flags == I2C_M_RD) {
+                                /* read registers */
+                                u8 ibuf[msg[j].len];
+                                ret = dw210x_op_rw(d->udev, 0x91, 0, 0,
+                                                ibuf, msg[j].len,
+                                                DW210X_READ_MSG);
+                                memcpy(msg[j].buf, ibuf, msg[j].len);
+                                break;
+                        } else if ((msg[j].buf[0] == 0xb0) &&
+                                                (msg[j].addr == 0x68)) {
+                                /* write firmware */
+                                u8 obuf[19];
+                                obuf[0] = (msg[j].len > 16 ?
+                                                18 : msg[j].len + 1);
+                                obuf[1] = msg[j].addr << 1;
+                                obuf[2] = msg[j].buf[0];
+                                len = msg[j].len - 1;
+                                i = 1;
+                                do {
+                                        memcpy(obuf + 3, msg[j].buf + i,
+                                                        (len > 16 ? 16 : len));
+                                        ret = dw210x_op_rw(d->udev, 0x80, 0, 0,
+                                                obuf, (len > 16 ? 16 : len) + 3,
+                                                DW210X_WRITE_MSG);
+                                        i += 16;
+                                        len -= 16;
+                                } while (len > 0);
+                        } else {
+                                /* write registers */
+                                u8 obuf[msg[j].len + 2];
+                                obuf[0] = msg[j].len + 1;
+                                obuf[1] = (msg[j].addr << 1);
+                                memcpy(obuf + 2, msg[j].buf, msg[j].len);
+                                ret = dw210x_op_rw(d->udev,
+                                                (num > 1 ? 0x90 : 0x80), 0, 0,
+                                                obuf, msg[j].len + 2,
+                                                DW210X_WRITE_MSG);
+                                break;
+                        }
+                        break;
+                }
                }
-                break;
+                msleep(3);
        }
        mutex_unlock(&d->i2c_mutex);
@@ -535,8 +580,8 @@ static struct i2c_algorithm dw3101_i2c_algo = {
        .functionality = dw210x_i2c_func,
 };
-static struct i2c_algorithm s630_i2c_algo = {
+static struct i2c_algorithm s6x0_i2c_algo = {
-        .master_xfer = s630_i2c_transfer,
+        .master_xfer = s6x0_i2c_transfer,
        .functionality = dw210x_i2c_func,
 };
@@ -564,25 +609,34 @@ static int dw210x_read_mac_address(struct dvb_usb_device *d, u8 mac[6])
        return 0;
 };
-static int s630_read_mac_address(struct dvb_usb_device *d, u8 mac[6])
+static int s6x0_read_mac_address(struct dvb_usb_device *d, u8 mac[6])
 {
        int i, ret;
-        u8 buf[3], eeprom[256], eepromline[16];
+        u8 ibuf[] = { 0 }, obuf[] = { 0 };
+        u8 eeprom[256], eepromline[16];
+        struct i2c_msg msg[] = {
+                {
+                        .addr = 0xa0 >> 1,
+                        .flags = 0,
+                        .buf = obuf,
+                        .len = 1,
+                }, {
+                        .addr = 0xa0 >> 1,
+                        .flags = I2C_M_RD,
+                        .buf = ibuf,
+                        .len = 1,
+                }
+        };
        for (i = 0; i < 256; i++) {
-                buf[0] = 1;
+                obuf[0] = i;
-                buf[1] = 0xa0;
+                ret = s6x0_i2c_transfer(&d->i2c_adap, msg, 2);
-                buf[2] = i;
+                if (ret != 2) {
-                ret = dw210x_op_rw(d->udev, 0x90, 0, 0,
-                                        buf, 3, DW210X_WRITE_MSG);
-                ret = dw210x_op_rw(d->udev, 0x91, 0, 0,
-                                        buf, 1, DW210X_READ_MSG);
-                if (ret < 0) {
                        err("read eeprom failed.");
                        return -1;
                } else {
-                        eepromline[i % 16] = buf[0];
+                        eepromline[i % 16] = ibuf[0];
-                        eeprom[i] = buf[0];
+                        eeprom[i] = ibuf[0];
                }
                if ((i % 16) == 15) {
@@ -644,19 +698,104 @@ static struct mt312_config zl313_config = {
        .demod_address = 0x0e,
 };
+static struct ds3000_config dw2104_ds3000_config = {
+        .demod_address = 0x68,
+};
+static struct stv0900_config dw2104a_stv0900_config = {
+        .demod_address = 0x6a,
+        .demod_mode = 0,
+        .xtal = 27000000,
+        .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
+        .diseqc_mode = 2,/* 2/3 PWM */
+        .tun1_maddress = 0,/* 0x60 */
+        .tun1_adc = 0,/* 2 Vpp */
+        .path1_mode = 3,
+};
+static struct stb6100_config dw2104a_stb6100_config = {
+        .tuner_address = 0x60,
+        .refclock = 27000000,
+};
+static struct stv0900_config dw2104_stv0900_config = {
+        .demod_address = 0x68,
+        .demod_mode = 0,
+        .xtal = 8000000,
+        .clkmode = 3,
+        .diseqc_mode = 2,
+        .tun1_maddress = 0,
+        .tun1_adc = 1,/* 1 Vpp */
+        .path1_mode = 3,
+};
+static struct stv6110_config dw2104_stv6110_config = {
+        .i2c_address = 0x60,
+        .mclk = 16000000,
+        .clk_div = 1,
+};
 static int dw2104_frontend_attach(struct dvb_usb_adapter *d)
 {
-        if ((d->fe = dvb_attach(cx24116_attach, &dw2104_config,
+        struct dvb_tuner_ops *tuner_ops = NULL;
-                        &d->dev->i2c_adap)) != NULL) {
+        if (demod_probe & 4) {
+                d->fe = dvb_attach(stv0900_attach, &dw2104a_stv0900_config,
+                                &d->dev->i2c_adap, 0);
+                if (d->fe != NULL) {
+                        if (dvb_attach(stb6100_attach, d->fe,
+                                        &dw2104a_stb6100_config,
+                                        &d->dev->i2c_adap)) {
+                                tuner_ops = &d->fe->ops.tuner_ops;
+                                tuner_ops->set_frequency = stb6100_set_freq;
+                                tuner_ops->get_frequency = stb6100_get_freq;
+                                tuner_ops->set_bandwidth = stb6100_set_bandw;
+                                tuner_ops->get_bandwidth = stb6100_get_bandw;
+                                d->fe->ops.set_voltage = dw210x_set_voltage;
+                                info("Attached STV0900+STB6100!\n");
+                                return 0;
+                        }
+                }
+        }
+        if (demod_probe & 2) {
+                d->fe = dvb_attach(stv0900_attach, &dw2104_stv0900_config,
+                                &d->dev->i2c_adap, 0);
+                if (d->fe != NULL) {
+                        if (dvb_attach(stv6110_attach, d->fe,
+                                        &dw2104_stv6110_config,
+                                        &d->dev->i2c_adap)) {
+                                d->fe->ops.set_voltage = dw210x_set_voltage;
+                                info("Attached STV0900+STV6110A!\n");
+                                return 0;
+                        }
+                }
+        }
+        if (demod_probe & 1) {
+                d->fe = dvb_attach(cx24116_attach, &dw2104_config,
+                                &d->dev->i2c_adap);
+                if (d->fe != NULL) {
+                        d->fe->ops.set_voltage = dw210x_set_voltage;
+                        info("Attached cx24116!\n");
+                        return 0;
+                }
+        }
+        d->fe = dvb_attach(ds3000_attach, &dw2104_ds3000_config,
+                        &d->dev->i2c_adap);
+        if (d->fe != NULL) {
                d->fe->ops.set_voltage = dw210x_set_voltage;
-                info("Attached cx24116!\n");
+                info("Attached DS3000!\n");
                return 0;
        }
        return -EIO;
 }
 static struct dvb_usb_device_properties dw2102_properties;
 static struct dvb_usb_device_properties dw2104_properties;
+static struct dvb_usb_device_properties s6x0_properties;
 static int dw2102_frontend_attach(struct dvb_usb_adapter *d)
 {
@@ -670,14 +809,17 @@ static int dw2102_frontend_attach(struct dvb_usb_adapter *d)
                        return 0;
                }
        }
        if (dw2102_properties.i2c_algo == &dw2102_earda_i2c_algo) {
-                /*dw2102_properties.adapter->tuner_attach = dw2102_tuner_attach;*/
                d->fe = dvb_attach(stv0288_attach, &earda_config,
                                        &d->dev->i2c_adap);
                if (d->fe != NULL) {
-                        d->fe->ops.set_voltage = dw210x_set_voltage;
+                        if (dvb_attach(stb6000_attach, d->fe, 0x61,
-                        info("Attached stv0288!\n");
+                                        &d->dev->i2c_adap)) {
-                        return 0;
+                                d->fe->ops.set_voltage = dw210x_set_voltage;
+                                info("Attached stv0288!\n");
+                                return 0;
+                        }
                }
        }
@@ -705,15 +847,38 @@ static int dw3101_frontend_attach(struct dvb_usb_adapter *d)
        return -EIO;
 }
-static int s630_frontend_attach(struct dvb_usb_adapter *d)
+static int s6x0_frontend_attach(struct dvb_usb_adapter *d)
 {
        d->fe = dvb_attach(mt312_attach, &zl313_config,
-                                &d->dev->i2c_adap);
+                        &d->dev->i2c_adap);
+        if (d->fe != NULL) {
+                if (dvb_attach(zl10039_attach, d->fe, 0x60,
+                                &d->dev->i2c_adap)) {
+                        d->fe->ops.set_voltage = dw210x_set_voltage;
+                        info("Attached zl100313+zl10039!\n");
+                        return 0;
+                }
+        }
+        d->fe = dvb_attach(stv0288_attach, &earda_config,
+                        &d->dev->i2c_adap);
+        if (d->fe != NULL) {
+                if (dvb_attach(stb6000_attach, d->fe, 0x61,
+                                &d->dev->i2c_adap)) {
+                        d->fe->ops.set_voltage = dw210x_set_voltage;
+                        info("Attached stv0288+stb6000!\n");
+                        return 0;
+                }
+        }
+        d->fe = dvb_attach(ds3000_attach, &dw2104_ds3000_config,
+                        &d->dev->i2c_adap);
        if (d->fe != NULL) {
                d->fe->ops.set_voltage = dw210x_set_voltage;
-                info("Attached zl10313!\n");
+                info("Attached ds3000+ds2020!\n");
                return 0;
        }
        return -EIO;
 }
@@ -724,14 +889,6 @@ static int dw2102_tuner_attach(struct dvb_usb_adapter *adap)
        return 0;
 }
-static int dw2102_earda_tuner_attach(struct dvb_usb_adapter *adap)
-{
-        dvb_attach(stb6000_attach, adap->fe, 0x61,
-                &adap->dev->i2c_adap);
-        return 0;
-}
 static int dw3101_tuner_attach(struct dvb_usb_adapter *adap)
 {
        dvb_attach(dvb_pll_attach, adap->fe, 0x60,
@@ -740,14 +897,6 @@ static int dw3101_tuner_attach(struct dvb_usb_adapter *adap)
        return 0;
 }
-static int s630_zl10039_tuner_attach(struct dvb_usb_adapter *adap)
-{
-        dvb_attach(zl10039_attach, adap->fe, 0x60,
-                &adap->dev->i2c_adap);
-        return 0;
-}
 static struct dvb_usb_rc_key dw210x_rc_keys[] = {
        { 0xf80a, KEY_Q },              /*power*/
        { 0xf80c, KEY_M },              /*mute*/
@@ -922,6 +1071,8 @@ static struct usb_device_id dw2102_table[] = {
        {USB_DEVICE(USB_VID_TERRATEC, USB_PID_CINERGY_S)},
        {USB_DEVICE(USB_VID_CYPRESS, USB_PID_DW3101)},
        {USB_DEVICE(0x9022, USB_PID_TEVII_S630)},
+        {USB_DEVICE(0x3011, USB_PID_PROF_1100)},
+        {USB_DEVICE(0x9022, USB_PID_TEVII_S660)},
        { }
 };
@@ -935,15 +1086,13 @@ static int dw2102_load_firmware(struct usb_device *dev,
        u8 reset;
        u8 reset16[] = {0, 0, 0, 0, 0, 0, 0};
        const struct firmware *fw;
-        const char *filename = "dvb-usb-dw2101.fw";
+        const char *fw_2101 = "dvb-usb-dw2101.fw";
        switch (dev->descriptor.idProduct) {
        case 0x2101:
-                ret = request_firmware(&fw, filename, &dev->dev);
+                ret = request_firmware(&fw, fw_2101, &dev->dev);
                if (ret != 0) {
-                        err("did not find the firmware file. (%s) "
+                        err(err_str, fw_2101);
-                        "Please see linux/Documentation/dvb/ for more details "
-                        "on firmware-problems.", filename);
                        return ret;
                }
                break;
@@ -983,6 +1132,11 @@ static int dw2102_load_firmware(struct usb_device *dev,
                }
                /* init registers */
                switch (dev->descriptor.idProduct) {
+                case USB_PID_PROF_1100:
+                        s6x0_properties.rc_key_map = tbs_rc_keys;
+                        s6x0_properties.rc_key_map_size =
+                                        ARRAY_SIZE(tbs_rc_keys);
+                        break;
                case USB_PID_TEVII_S650:
                        dw2104_properties.rc_key_map = tevii_rc_keys;
                        dw2104_properties.rc_key_map_size =
@@ -1021,7 +1175,6 @@ static int dw2102_load_firmware(struct usb_device *dev,
                                                DW210X_READ_MSG);
                                if (reset16[2] == 0x11) {
                                        dw2102_properties.i2c_algo = &dw2102_earda_i2c_algo;
-                                        dw2102_properties.adapter->tuner_attach = &dw2102_earda_tuner_attach;
                                        break;
                                }
                        }
@@ -1184,13 +1337,13 @@ static struct dvb_usb_device_properties dw3101_properties = {
        }
 };
-static struct dvb_usb_device_properties s630_properties = {
+static struct dvb_usb_device_properties s6x0_properties = {
        .caps = DVB_USB_IS_AN_I2C_ADAPTER,
        .usb_ctrl = DEVICE_SPECIFIC,
        .firmware = "dvb-usb-s630.fw",
        .no_reconnect = 1,
-        .i2c_algo = &s630_i2c_algo,
+        .i2c_algo = &s6x0_i2c_algo,
        .rc_key_map = tevii_rc_keys,
        .rc_key_map_size = ARRAY_SIZE(tevii_rc_keys),
        .rc_interval = 150,
@@ -1199,12 +1352,12 @@ static struct dvb_usb_device_properties s630_properties = {
        .generic_bulk_ctrl_endpoint = 0x81,
        .num_adapters = 1,
        .download_firmware = dw2102_load_firmware,
-        .read_mac_address = s630_read_mac_address,
+        .read_mac_address = s6x0_read_mac_address,
        .adapter = {
                {
-                        .frontend_attach = s630_frontend_attach,
+                        .frontend_attach = s6x0_frontend_attach,
                        .streaming_ctrl = NULL,
-                        .tuner_attach = s630_zl10039_tuner_attach,
+                        .tuner_attach = NULL,
                        .stream = {
                                .type = USB_BULK,
                                .count = 8,
@@ -1217,12 +1370,20 @@ static struct dvb_usb_device_properties s630_properties = {
                        },
                }
        },
-        .num_device_descs = 1,
+        .num_device_descs = 3,
        .devices = {
                {"TeVii S630 USB",
                        {&dw2102_table[6], NULL},
                        {NULL},
                },
+                {"Prof 1100 USB ",
+                        {&dw2102_table[7], NULL},
+                        {NULL},
+                },
+                {"TeVii S660 USB",
+                        {&dw2102_table[8], NULL},
+                        {NULL},
+                },
        }
 };
@@ -1235,10 +1396,10 @@ static int dw2102_probe(struct usb_interface *intf,
                        THIS_MODULE, NULL, adapter_nr) ||
            0 == dvb_usb_device_init(intf, &dw3101_properties,
                        THIS_MODULE, NULL, adapter_nr) ||
-            0 == dvb_usb_device_init(intf, &s630_properties,
+            0 == dvb_usb_device_init(intf, &s6x0_properties,
-                        THIS_MODULE, NULL, adapter_nr)) {
+                        THIS_MODULE, NULL, adapter_nr))
                return 0;
-        }
        return -ENODEV;
 }
@@ -1269,6 +1430,7 @@ module_exit(dw2102_module_exit);
 MODULE_AUTHOR("Igor M. Liplianin (c) liplianin@me.by");
 MODULE_DESCRIPTION("Driver for DVBWorld DVB-S 2101, 2102, DVB-S2 2104,"
                                " DVB-C 3101 USB2.0,"
-                                " TeVii S600, S630, S650 USB2.0 devices");
+                                " TeVii S600, S630, S650, S660 USB2.0,"
+                                " Prof 1100 USB2.0 devices");
 MODULE_VERSION("0.1");
 MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/dvb-usb/friio-fe.c b/drivers/media/dvb/dvb-usb/friio-fe.c
index 9cbbe42ca44b..ebb7b9fd115b 100644
--- a/drivers/media/dvb/dvb-usb/friio-fe.c
+++ b/drivers/media/dvb/dvb-usb/friio-fe.c
@@ -134,11 +134,13 @@ static int jdvbt90502_pll_set_freq(struct jdvbt90502_state *state, u32 freq)
        deb_fe("%s: freq=%d, step=%d\n", __func__, freq,
               state->frontend.ops.info.frequency_stepsize);
        /* freq -> oscilator frequency conversion. */
-        /* freq: 473,000,000 + n*6,000,000 (no 1/7MHz shift to center freq) */
+        /* freq: 473,000,000 + n*6,000,000 [+ 142857 (center freq. shift)] */
-        /* add 400[1/7 MHZ] = 57.142857MHz.   57MHz for the IF,  */
-        /*                                   1/7MHz for center freq shift */
        f = freq / state->frontend.ops.info.frequency_stepsize;
-        f += 400;
+        /* add 399[1/7 MHZ] = 57MHz for the IF  */
+        f += 399;
+        /* add center frequency shift if necessary */
+        if (f % 7 == 0)
+                f++;
        pll_freq_cmd[DEMOD_REDIRECT_REG] = JDVBT90502_2ND_I2C_REG; /* 0xFE */
        pll_freq_cmd[ADDRESS_BYTE] = state->config.pll_address << 1;
        pll_freq_cmd[DIVIDER_BYTE1] = (f >> 8) & 0x7F;
diff --git a/drivers/media/dvb/dvb-usb/gp8psk-fe.c b/drivers/media/dvb/dvb-usb/gp8psk-fe.c
index 20eadf9318e0..7a7f1b2b681c 100644
--- a/drivers/media/dvb/dvb-usb/gp8psk-fe.c
+++ b/drivers/media/dvb/dvb-usb/gp8psk-fe.c
@@ -146,8 +146,8 @@ static int gp8psk_fe_set_frontend(struct dvb_frontend* fe,
        switch (c->delivery_system) {
        case SYS_DVBS:
-                /* Only QPSK is supported for DVB-S */
+                /* Allow QPSK and 8PSK (even for DVB-S) */
-                if (c->modulation != QPSK) {
+                if (c->modulation != QPSK && c->modulation != PSK_8) {
                        deb_fe("%s: unsupported modulation selected (%d)\n",
                                __func__, c->modulation);
                        return -EOPNOTSUPP;
diff --git a/drivers/media/dvb/frontends/Kconfig b/drivers/media/dvb/frontends/Kconfig
index 58aac018f109..a3b8b697349b 100644
--- a/drivers/media/dvb/frontends/Kconfig
+++ b/drivers/media/dvb/frontends/Kconfig
@@ -526,6 +526,15 @@ config DVB_TUNER_DIB0070
          This device is only used inside a SiP called together with a
          demodulator for now.
+config DVB_TUNER_DIB0090
+        tristate "DiBcom DiB0090 silicon base-band tuner"
+        depends on I2C
+        default m if DVB_FE_CUSTOMISE
+        help
+          A driver for the silicon baseband tuner DiB0090 from DiBcom.
+          This device is only used inside a SiP called together with a
+          demodulator for now.
 comment "SEC control devices for DVB-S"
        depends on DVB_CORE
diff --git a/drivers/media/dvb/frontends/Makefile b/drivers/media/dvb/frontends/Makefile
index 823482535d11..47575cc7b699 100644
--- a/drivers/media/dvb/frontends/Makefile
+++ b/drivers/media/dvb/frontends/Makefile
@@ -55,6 +55,7 @@ obj-$(CONFIG_DVB_TDA10086) += tda10086.o
 obj-$(CONFIG_DVB_TDA826X) += tda826x.o
 obj-$(CONFIG_DVB_TDA8261) += tda8261.o
 obj-$(CONFIG_DVB_TUNER_DIB0070) += dib0070.o
+obj-$(CONFIG_DVB_TUNER_DIB0090) += dib0090.o
 obj-$(CONFIG_DVB_TUA6100) += tua6100.o
 obj-$(CONFIG_DVB_S5H1409) += s5h1409.o
 obj-$(CONFIG_DVB_TUNER_ITD1000) += itd1000.o
diff --git a/drivers/media/dvb/frontends/au8522_decoder.c b/drivers/media/dvb/frontends/au8522_decoder.c
index 2dc2723b724a..24268ef2753d 100644
--- a/drivers/media/dvb/frontends/au8522_decoder.c
+++ b/drivers/media/dvb/frontends/au8522_decoder.c
@@ -62,7 +62,7 @@ struct au8522_register_config {
   The values are as follows from left to right
   0="ATV RF" 1="ATV RF13" 2="CVBS" 3="S-Video" 4="PAL" 5=CVBS13" 6="SVideo13"
 */
-struct au8522_register_config filter_coef[] = {
+static const struct au8522_register_config filter_coef[] = {
        {AU8522_FILTER_COEF_R410, {0x25, 0x00, 0x25, 0x25, 0x00, 0x00, 0x00} },
        {AU8522_FILTER_COEF_R411, {0x20, 0x00, 0x20, 0x20, 0x00, 0x00, 0x00} },
        {AU8522_FILTER_COEF_R412, {0x03, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00} },
@@ -104,7 +104,7 @@ struct au8522_register_config filter_coef[] = {
   0="SIF" 1="ATVRF/ATVRF13"
   Note: the "ATVRF/ATVRF13" mode has never been tested
 */
-struct au8522_register_config lpfilter_coef[] = {
+static const struct au8522_register_config lpfilter_coef[] = {
        {0x060b, {0x21, 0x0b} },
        {0x060c, {0xad, 0xad} },
        {0x060d, {0x70, 0xf0} },
diff --git a/drivers/media/dvb/frontends/dib0070.c b/drivers/media/dvb/frontends/dib0070.c
index 2be17b93e0bd..0d12763603b4 100644
--- a/drivers/media/dvb/frontends/dib0070.c
+++ b/drivers/media/dvb/frontends/dib0070.c
@@ -49,21 +49,6 @@ MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
 #define DIB0070_P1G  0x03
 #define DIB0070S_P1A 0x02
-enum frontend_tune_state {
-        CT_TUNER_START = 10,
-        CT_TUNER_STEP_0,
-        CT_TUNER_STEP_1,
-        CT_TUNER_STEP_2,
-        CT_TUNER_STEP_3,
-        CT_TUNER_STEP_4,
-        CT_TUNER_STEP_5,
-        CT_TUNER_STEP_6,
-        CT_TUNER_STEP_7,
-        CT_TUNER_STOP,
-};
-#define FE_CALLBACK_TIME_NEVER 0xffffffff
 struct dib0070_state {
        struct i2c_adapter *i2c;
        struct dvb_frontend *fe;
@@ -71,10 +56,10 @@ struct dib0070_state {
        u16 wbd_ff_offset;
        u8 revision;
-        enum frontend_tune_state tune_state;
+    enum frontend_tune_state tune_state;
-        u32 current_rf;
+    u32 current_rf;
-        /* for the captrim binary search */
+    /* for the captrim binary search */
        s8 step;
        u16 adc_diff;
@@ -85,7 +70,7 @@ struct dib0070_state {
        const struct dib0070_tuning *current_tune_table_index;
        const struct dib0070_lna_match *lna_match;
-        u8 wbd_gain_current;
+    u8  wbd_gain_current;
        u16 wbd_offset_3_3[2];
 };
@@ -93,8 +78,8 @@ static uint16_t dib0070_read_reg(struct dib0070_state *state, u8 reg)
 {
        u8 b[2];
        struct i2c_msg msg[2] = {
-                {.addr = state->cfg->i2c_address,.flags = 0,.buf = &reg,.len = 1},
+                { .addr = state->cfg->i2c_address, .flags = 0,        .buf = &reg, .len = 1 },
-                {.addr = state->cfg->i2c_address,.flags = I2C_M_RD,.buf = b,.len = 2},
+                { .addr = state->cfg->i2c_address, .flags = I2C_M_RD, .buf = b,  .len = 2 },
        };
        if (i2c_transfer(state->i2c, msg, 2) != 2) {
                printk(KERN_WARNING "DiB0070 I2C read failed\n");
@@ -106,7 +91,7 @@ static uint16_t dib0070_read_reg(struct dib0070_state *state, u8 reg)
 static int dib0070_write_reg(struct dib0070_state *state, u8 reg, u16 val)
 {
        u8 b[3] = { reg, val >> 8, val & 0xff };
-        struct i2c_msg msg = {.addr = state->cfg->i2c_address,.flags = 0,.buf = b,.len = 3 };
+        struct i2c_msg msg = { .addr = state->cfg->i2c_address, .flags = 0, .buf = b, .len = 3 };
        if (i2c_transfer(state->i2c, &msg, 1) != 1) {
                printk(KERN_WARNING "DiB0070 I2C write failed\n");
                return -EREMOTEIO;
@@ -124,30 +109,30 @@ static int dib0070_write_reg(struct dib0070_state *state, u8 reg, u16 val)
 static int dib0070_set_bandwidth(struct dvb_frontend *fe, struct dvb_frontend_parameters *ch)
 {
-        struct dib0070_state *state = fe->tuner_priv;
+    struct dib0070_state *state = fe->tuner_priv;
-        u16 tmp = dib0070_read_reg(state, 0x02) & 0x3fff;
+    u16 tmp = dib0070_read_reg(state, 0x02) & 0x3fff;
-        if (state->fe->dtv_property_cache.bandwidth_hz / 1000 > 7000)
+    if (state->fe->dtv_property_cache.bandwidth_hz/1000 > 7000)
-                tmp |= (0 << 14);
+        tmp |= (0 << 14);
-        else if (state->fe->dtv_property_cache.bandwidth_hz / 1000 > 6000)
+    else if (state->fe->dtv_property_cache.bandwidth_hz/1000 > 6000)
-                tmp |= (1 << 14);
+        tmp |= (1 << 14);
-        else if (state->fe->dtv_property_cache.bandwidth_hz / 1000 > 5000)
+    else if (state->fe->dtv_property_cache.bandwidth_hz/1000 > 5000)
-                tmp |= (2 << 14);
+        tmp |= (2 << 14);
-        else
+    else
-                tmp |= (3 << 14);
+        tmp |= (3 << 14);
-        dib0070_write_reg(state, 0x02, tmp);
+    dib0070_write_reg(state, 0x02, tmp);
-        /* sharpen the BB filter in ISDB-T to have higher immunity to adjacent channels */
+    /* sharpen the BB filter in ISDB-T to have higher immunity to adjacent channels */
-        if (state->fe->dtv_property_cache.delivery_system == SYS_ISDBT) {
+    if (state->fe->dtv_property_cache.delivery_system == SYS_ISDBT) {
-                u16 value = dib0070_read_reg(state, 0x17);
+        u16 value = dib0070_read_reg(state, 0x17);
-                dib0070_write_reg(state, 0x17, value & 0xfffc);
+        dib0070_write_reg(state, 0x17, value & 0xfffc);
-                tmp = dib0070_read_reg(state, 0x01) & 0x01ff;
+        tmp = dib0070_read_reg(state, 0x01) & 0x01ff;
-                dib0070_write_reg(state, 0x01, tmp | (60 << 9));
+        dib0070_write_reg(state, 0x01, tmp | (60 << 9));
-                dib0070_write_reg(state, 0x17, value);
+        dib0070_write_reg(state, 0x17, value);
-        }
+    }
        return 0;
 }
@@ -160,14 +145,14 @@ static int dib0070_captrim(struct dib0070_state *state, enum frontend_tune_state
        if (*tune_state == CT_TUNER_STEP_0) {
                dib0070_write_reg(state, 0x0f, 0xed10);
-                dib0070_write_reg(state, 0x17, 0x0034);
+                dib0070_write_reg(state, 0x17,    0x0034);
                dib0070_write_reg(state, 0x18, 0x0032);
                state->step = state->captrim = state->fcaptrim = 64;
                state->adc_diff = 3000;
                ret = 20;
-                *tune_state = CT_TUNER_STEP_1;
+        *tune_state = CT_TUNER_STEP_1;
        } else if (*tune_state == CT_TUNER_STEP_1) {
                state->step /= 2;
                dib0070_write_reg(state, 0x14, state->lo4 | state->captrim);
@@ -178,7 +163,7 @@ static int dib0070_captrim(struct dib0070_state *state, enum frontend_tune_state
                adc = dib0070_read_reg(state, 0x19);
-                dprintk("CAPTRIM=%hd; ADC = %hd (ADC) & %dmV", state->captrim, adc, (u32) adc * (u32) 1800 / (u32) 1024);
+                dprintk("CAPTRIM=%hd; ADC = %hd (ADC) & %dmV", state->captrim, adc, (u32) adc*(u32)1800/(u32)1024);
                if (adc >= 400) {
                        adc -= 400;
@@ -193,6 +178,8 @@ static int dib0070_captrim(struct dib0070_state *state, enum frontend_tune_state
                        state->adc_diff = adc;
                        state->fcaptrim = state->captrim;
                }
                state->captrim += (step_sign * state->step);
@@ -213,7 +200,7 @@ static int dib0070_captrim(struct dib0070_state *state, enum frontend_tune_state
 static int dib0070_set_ctrl_lo5(struct dvb_frontend *fe, u8 vco_bias_trim, u8 hf_div_trim, u8 cp_current, u8 third_order_filt)
 {
        struct dib0070_state *state = fe->tuner_priv;
-        u16 lo5 = (third_order_filt << 14) | (0 << 13) | (1 << 12) | (3 << 9) | (cp_current << 6) | (hf_div_trim << 3) | (vco_bias_trim << 0);
+    u16 lo5 = (third_order_filt << 14) | (0 << 13) | (1 << 12) | (3 << 9) | (cp_current << 6) | (hf_div_trim << 3) | (vco_bias_trim << 0);
        dprintk("CTRL_LO5: 0x%x", lo5);
        return dib0070_write_reg(state, 0x15, lo5);
 }
@@ -227,99 +214,99 @@ void dib0070_ctrl_agc_filter(struct dvb_frontend *fe, u8 open)
                dib0070_write_reg(state, 0x1a, 0x0000);
        } else {
                dib0070_write_reg(state, 0x1b, 0x4112);
-                if (state->cfg->vga_filter != 0) {
+        if (state->cfg->vga_filter != 0) {
-                        dib0070_write_reg(state, 0x1a, state->cfg->vga_filter);
+                dib0070_write_reg(state, 0x1a, state->cfg->vga_filter);
-                        dprintk("vga filter register is set to %x", state->cfg->vga_filter);
+                dprintk("vga filter register is set to %x", state->cfg->vga_filter);
-                } else
+        } else
-                        dib0070_write_reg(state, 0x1a, 0x0009);
+                dib0070_write_reg(state, 0x1a, 0x0009);
        }
 }
 EXPORT_SYMBOL(dib0070_ctrl_agc_filter);
 struct dib0070_tuning {
-        u32 max_freq;           /* for every frequency less than or equal to that field: this information is correct */
+    u32 max_freq; /* for every frequency less than or equal to that field: this information is correct */
-        u8 switch_trim;
+    u8 switch_trim;
-        u8 vco_band;
+    u8 vco_band;
-        u8 hfdiv;
+    u8 hfdiv;
-        u8 vco_multi;
+    u8 vco_multi;
-        u8 presc;
+    u8 presc;
-        u8 wbdmux;
+    u8 wbdmux;
-        u16 tuner_enable;
+    u16 tuner_enable;
 };
 struct dib0070_lna_match {
-        u32 max_freq;           /* for every frequency less than or equal to that field: this information is correct */
+    u32 max_freq; /* for every frequency less than or equal to that field: this information is correct */
-        u8 lna_band;
+    u8 lna_band;
 };
 static const struct dib0070_tuning dib0070s_tuning_table[] = {
-        {570000, 2, 1, 3, 6, 6, 2, 0x4000 | 0x0800},    /* UHF */
+    {     570000, 2, 1, 3, 6, 6, 2, 0x4000 | 0x0800 }, /* UHF */
-        {700000, 2, 0, 2, 4, 2, 2, 0x4000 | 0x0800},
+    {     700000, 2, 0, 2, 4, 2, 2, 0x4000 | 0x0800 },
-        {863999, 2, 1, 2, 4, 2, 2, 0x4000 | 0x0800},
+    {     863999, 2, 1, 2, 4, 2, 2, 0x4000 | 0x0800 },
-        {1500000, 0, 1, 1, 2, 2, 4, 0x2000 | 0x0400},   /* LBAND */
+    {    1500000, 0, 1, 1, 2, 2, 4, 0x2000 | 0x0400 }, /* LBAND */
-        {1600000, 0, 1, 1, 2, 2, 4, 0x2000 | 0x0400},
+    {    1600000, 0, 1, 1, 2, 2, 4, 0x2000 | 0x0400 },
-        {2000000, 0, 1, 1, 2, 2, 4, 0x2000 | 0x0400},
+    {    2000000, 0, 1, 1, 2, 2, 4, 0x2000 | 0x0400 },
-        {0xffffffff, 0, 0, 8, 1, 2, 1, 0x8000 | 0x1000},        /* SBAND */
+    { 0xffffffff, 0, 0, 8, 1, 2, 1, 0x8000 | 0x1000 }, /* SBAND */
 };
 static const struct dib0070_tuning dib0070_tuning_table[] = {
-        {115000, 1, 0, 7, 24, 2, 1, 0x8000 | 0x1000},   /* FM below 92MHz cannot be tuned */
+    {     115000, 1, 0, 7, 24, 2, 1, 0x8000 | 0x1000 }, /* FM below 92MHz cannot be tuned */
-        {179500, 1, 0, 3, 16, 2, 1, 0x8000 | 0x1000},   /* VHF */
+    {     179500, 1, 0, 3, 16, 2, 1, 0x8000 | 0x1000 }, /* VHF */
-        {189999, 1, 1, 3, 16, 2, 1, 0x8000 | 0x1000},
+    {     189999, 1, 1, 3, 16, 2, 1, 0x8000 | 0x1000 },
-        {250000, 1, 0, 6, 12, 2, 1, 0x8000 | 0x1000},
+    {     250000, 1, 0, 6, 12, 2, 1, 0x8000 | 0x1000 },
-        {569999, 2, 1, 5, 6, 2, 2, 0x4000 | 0x0800},    /* UHF */
+    {     569999, 2, 1, 5,  6, 2, 2, 0x4000 | 0x0800 }, /* UHF */
-        {699999, 2, 0, 1, 4, 2, 2, 0x4000 | 0x0800},
+    {     699999, 2, 0, 1,  4, 2, 2, 0x4000 | 0x0800 },
-        {863999, 2, 1, 1, 4, 2, 2, 0x4000 | 0x0800},
+    {     863999, 2, 1, 1,  4, 2, 2, 0x4000 | 0x0800 },
-        {0xffffffff, 0, 1, 0, 2, 2, 4, 0x2000 | 0x0400},        /* LBAND or everything higher than UHF */
+    { 0xffffffff, 0, 1, 0,  2, 2, 4, 0x2000 | 0x0400 }, /* LBAND or everything higher than UHF */
 };
 static const struct dib0070_lna_match dib0070_lna_flip_chip[] = {
-        {180000, 0},            /* VHF */
+    {     180000, 0 }, /* VHF */
-        {188000, 1},
+    {     188000, 1 },
-        {196400, 2},
+    {     196400, 2 },
-        {250000, 3},
+    {     250000, 3 },
-        {550000, 0},            /* UHF */
+    {     550000, 0 }, /* UHF */
-        {590000, 1},
+    {     590000, 1 },
-        {666000, 3},
+    {     666000, 3 },
-        {864000, 5},
+    {     864000, 5 },
-        {1500000, 0},           /* LBAND or everything higher than UHF */
+    {    1500000, 0 }, /* LBAND or everything higher than UHF */
-        {1600000, 1},
+    {    1600000, 1 },
-        {2000000, 3},
+    {    2000000, 3 },
-        {0xffffffff, 7},
+    { 0xffffffff, 7 },
 };
 static const struct dib0070_lna_match dib0070_lna[] = {
-        {180000, 0},            /* VHF */
+    {     180000, 0 }, /* VHF */
-        {188000, 1},
+    {     188000, 1 },
-        {196400, 2},
+    {     196400, 2 },
-        {250000, 3},
+    {     250000, 3 },
-        {550000, 2},            /* UHF */
+    {     550000, 2 }, /* UHF */
-        {650000, 3},
+    {     650000, 3 },
-        {750000, 5},
+    {     750000, 5 },
-        {850000, 6},
+    {     850000, 6 },
-        {864000, 7},
+    {     864000, 7 },
-        {1500000, 0},           /* LBAND or everything higher than UHF */
+    {    1500000, 0 }, /* LBAND or everything higher than UHF */
-        {1600000, 1},
+    {    1600000, 1 },
-        {2000000, 3},
+    {    2000000, 3 },
-        {0xffffffff, 7},
+    { 0xffffffff, 7 },
 };
-#define LPF     100             // define for the loop filter 100kHz by default 16-07-06
+#define LPF     100
 static int dib0070_tune_digital(struct dvb_frontend *fe, struct dvb_frontend_parameters *ch)
 {
-        struct dib0070_state *state = fe->tuner_priv;
+    struct dib0070_state *state = fe->tuner_priv;
-        const struct dib0070_tuning *tune;
+    const struct dib0070_tuning *tune;
-        const struct dib0070_lna_match *lna_match;
+    const struct dib0070_lna_match *lna_match;
-        enum frontend_tune_state *tune_state = &state->tune_state;
+    enum frontend_tune_state *tune_state = &state->tune_state;
-        int ret = 10;           /* 1ms is the default delay most of the time */
+    int ret = 10; /* 1ms is the default delay most of the time */
-        u8 band = (u8) BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000);
+    u8  band = (u8)BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency/1000);
-        u32 freq = fe->dtv_property_cache.frequency / 1000 + (band == BAND_VHF ? state->cfg->freq_offset_khz_vhf : state->cfg->freq_offset_khz_uhf);
+    u32 freq = fe->dtv_property_cache.frequency/1000 + (band == BAND_VHF ? state->cfg->freq_offset_khz_vhf : state->cfg->freq_offset_khz_uhf);
 #ifdef CONFIG_SYS_ISDBT
-        if (state->fe->dtv_property_cache.delivery_system == SYS_ISDBT && state->fe->dtv_property_cache.isdbt_sb_mode == 1)
+    if (state->fe->dtv_property_cache.delivery_system == SYS_ISDBT && state->fe->dtv_property_cache.isdbt_sb_mode == 1)
                if (((state->fe->dtv_property_cache.isdbt_sb_segment_count % 2)
                     && (state->fe->dtv_property_cache.isdbt_sb_segment_idx == ((state->fe->dtv_property_cache.isdbt_sb_segment_count / 2) + 1)))
                    || (((state->fe->dtv_property_cache.isdbt_sb_segment_count % 2) == 0)
@@ -328,172 +315,180 @@ static int dib0070_tune_digital(struct dvb_frontend *fe, struct dvb_frontend_par
                        && (state->fe->dtv_property_cache.isdbt_sb_segment_idx == ((state->fe->dtv_property_cache.isdbt_sb_segment_count / 2) + 1))))
                        freq += 850;
 #endif
+    if (state->current_rf != freq) {
+        switch (state->revision) {
+        case DIB0070S_P1A:
+            tune = dib0070s_tuning_table;
+            lna_match = dib0070_lna;
+            break;
+        default:
+            tune = dib0070_tuning_table;
+            if (state->cfg->flip_chip)
+                lna_match = dib0070_lna_flip_chip;
+            else
+                lna_match = dib0070_lna;
+            break;
+        }
+        while (freq > tune->max_freq) /* find the right one */
+            tune++;
+        while (freq > lna_match->max_freq) /* find the right one */
+            lna_match++;
+        state->current_tune_table_index = tune;
+        state->lna_match = lna_match;
+    }
+    if (*tune_state == CT_TUNER_START) {
+        dprintk("Tuning for Band: %hd (%d kHz)", band, freq);
        if (state->current_rf != freq) {
+                u8 REFDIV;
+                u32 FBDiv, Rest, FREF, VCOF_kHz;
+                u8 Den;
+                state->current_rf = freq;
+                state->lo4 = (state->current_tune_table_index->vco_band << 11) | (state->current_tune_table_index->hfdiv << 7);
+                dib0070_write_reg(state, 0x17, 0x30);
+                VCOF_kHz = state->current_tune_table_index->vco_multi * freq * 2;
+                switch (band) {
+                case BAND_VHF:
+                        REFDIV = (u8) ((state->cfg->clock_khz + 9999) / 10000);
+                        break;
+                case BAND_FM:
+                        REFDIV = (u8) ((state->cfg->clock_khz) / 1000);
+                        break;
+                default:
+                        REFDIV = (u8) (state->cfg->clock_khz  / 10000);
+                        break;
+                }
+                FREF = state->cfg->clock_khz / REFDIV;
                switch (state->revision) {
                case DIB0070S_P1A:
-                        tune = dib0070s_tuning_table;
+                        FBDiv = (VCOF_kHz / state->current_tune_table_index->presc / FREF);
-                        lna_match = dib0070_lna;
+                        Rest  = (VCOF_kHz / state->current_tune_table_index->presc) - FBDiv * FREF;
                        break;
+                case DIB0070_P1G:
+                case DIB0070_P1F:
                default:
-                        tune = dib0070_tuning_table;
+                        FBDiv = (freq / (FREF / 2));
-                        if (state->cfg->flip_chip)
+                        Rest  = 2 * freq - FBDiv * FREF;
-                                lna_match = dib0070_lna_flip_chip;
-                        else
-                                lna_match = dib0070_lna;
                        break;
                }
-                while (freq > tune->max_freq)   /* find the right one */
-                        tune++;
-                while (freq > lna_match->max_freq)      /* find the right one */
-                        lna_match++;
-                state->current_tune_table_index = tune;
+                if (Rest < LPF)
-                state->lna_match = lna_match;
+                        Rest = 0;
-        }
+                else if (Rest < 2 * LPF)
+                        Rest = 2 * LPF;
+                else if (Rest > (FREF - LPF)) {
+                        Rest = 0;
+                        FBDiv += 1;
+                } else if (Rest > (FREF - 2 * LPF))
+                        Rest = FREF - 2 * LPF;
+                Rest = (Rest * 6528) / (FREF / 10);
+                Den = 1;
+                if (Rest > 0) {
+                        state->lo4 |= (1 << 14) | (1 << 12);
+                        Den = 255;
+                }
-        if (*tune_state == CT_TUNER_START) {
+                dib0070_write_reg(state, 0x11, (u16)FBDiv);
-                dprintk("Tuning for Band: %hd (%d kHz)", band, freq);
+                dib0070_write_reg(state, 0x12, (Den << 8) | REFDIV);
-                if (state->current_rf != freq) {
+                dib0070_write_reg(state, 0x13, (u16) Rest);
-                        u8 REFDIV;
-                        u32 FBDiv, Rest, FREF, VCOF_kHz;
+                if (state->revision == DIB0070S_P1A) {
-                        u8 Den;
+                        if (band == BAND_SBAND) {
-                        state->current_rf = freq;
+                                dib0070_set_ctrl_lo5(fe, 2, 4, 3, 0);
-                        state->lo4 = (state->current_tune_table_index->vco_band << 11) | (state->current_tune_table_index->hfdiv << 7);
+                                dib0070_write_reg(state, 0x1d, 0xFFFF);
+                        } else
-                        dib0070_write_reg(state, 0x17, 0x30);
+                                dib0070_set_ctrl_lo5(fe, 5, 4, 3, 1);
-                        VCOF_kHz = state->current_tune_table_index->vco_multi * freq * 2;
-                        switch (band) {
-                        case BAND_VHF:
-                                REFDIV = (u8) ((state->cfg->clock_khz + 9999) / 10000);
-                                break;
-                        case BAND_FM:
-                                REFDIV = (u8) ((state->cfg->clock_khz) / 1000);
-                                break;
-                        default:
-                                REFDIV = (u8) (state->cfg->clock_khz / 10000);
-                                break;
-                        }
-                        FREF = state->cfg->clock_khz / REFDIV;
-                        switch (state->revision) {
-                        case DIB0070S_P1A:
-                                FBDiv = (VCOF_kHz / state->current_tune_table_index->presc / FREF);
-                                Rest = (VCOF_kHz / state->current_tune_table_index->presc) - FBDiv * FREF;
-                                break;
-                        case DIB0070_P1G:
-                        case DIB0070_P1F:
-                        default:
-                                FBDiv = (freq / (FREF / 2));
-                                Rest = 2 * freq - FBDiv * FREF;
-                                break;
-                        }
-                        if (Rest < LPF)
-                                Rest = 0;
-                        else if (Rest < 2 * LPF)
-                                Rest = 2 * LPF;
-                        else if (Rest > (FREF - LPF)) {
-                                Rest = 0;
-                                FBDiv += 1;
-                        } else if (Rest > (FREF - 2 * LPF))
-                                Rest = FREF - 2 * LPF;
-                        Rest = (Rest * 6528) / (FREF / 10);
-                        Den = 1;
-                        if (Rest > 0) {
-                                state->lo4 |= (1 << 14) | (1 << 12);
-                                Den = 255;
-                        }
-                        dib0070_write_reg(state, 0x11, (u16) FBDiv);
-                        dib0070_write_reg(state, 0x12, (Den << 8) | REFDIV);
-                        dib0070_write_reg(state, 0x13, (u16) Rest);
-                        if (state->revision == DIB0070S_P1A) {
-                                if (band == BAND_SBAND) {
-                                        dib0070_set_ctrl_lo5(fe, 2, 4, 3, 0);
-                                        dib0070_write_reg(state, 0x1d, 0xFFFF);
-                                } else
-                                        dib0070_set_ctrl_lo5(fe, 5, 4, 3, 1);
-                        }
-                        dib0070_write_reg(state, 0x20,
-                                          0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001 | state->current_tune_table_index->tuner_enable);
-                        dprintk("REFDIV: %hd, FREF: %d", REFDIV, FREF);
-                        dprintk("FBDIV: %d, Rest: %d", FBDiv, Rest);
-                        dprintk("Num: %hd, Den: %hd, SD: %hd", (u16) Rest, Den, (state->lo4 >> 12) & 0x1);
-                        dprintk("HFDIV code: %hd", state->current_tune_table_index->hfdiv);
-                        dprintk("VCO = %hd", state->current_tune_table_index->vco_band);
-                        dprintk("VCOF: ((%hd*%d) << 1))", state->current_tune_table_index->vco_multi, freq);
-                        *tune_state = CT_TUNER_STEP_0;
-                } else {        /* we are already tuned to this frequency - the configuration is correct  */
-                        ret = 50;       /* wakeup time */
-                        *tune_state = CT_TUNER_STEP_5;
                }
-        } else if ((*tune_state > CT_TUNER_START) && (*tune_state < CT_TUNER_STEP_4)) {
-                ret = dib0070_captrim(state, tune_state);
+                dib0070_write_reg(state, 0x20,
+                        0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001 | state->current_tune_table_index->tuner_enable);
-        } else if (*tune_state == CT_TUNER_STEP_4) {
+                dprintk("REFDIV: %hd, FREF: %d", REFDIV, FREF);
-                const struct dib0070_wbd_gain_cfg *tmp = state->cfg->wbd_gain;
+                dprintk("FBDIV: %d, Rest: %d", FBDiv, Rest);
-                if (tmp != NULL) {
+                dprintk("Num: %hd, Den: %hd, SD: %hd", (u16) Rest, Den, (state->lo4 >> 12) & 0x1);
-                        while (freq / 1000 > tmp->freq) /* find the right one */
+                dprintk("HFDIV code: %hd", state->current_tune_table_index->hfdiv);
-                                tmp++;
+                dprintk("VCO = %hd", state->current_tune_table_index->vco_band);
-                        dib0070_write_reg(state, 0x0f,
+                dprintk("VCOF: ((%hd*%d) << 1))", state->current_tune_table_index->vco_multi, freq);
-                                          (0 << 15) | (1 << 14) | (3 << 12) | (tmp->wbd_gain_val << 9) | (0 << 8) | (1 << 7) | (state->
-                                                                                                                                current_tune_table_index->
+                *tune_state = CT_TUNER_STEP_0;
-                                                                                                                                wbdmux << 0));
+        } else { /* we are already tuned to this frequency - the configuration is correct  */
-                        state->wbd_gain_current = tmp->wbd_gain_val;
+                ret = 50; /* wakeup time */
-                } else {
+                *tune_state = CT_TUNER_STEP_5;
+        }
+    } else if ((*tune_state > CT_TUNER_START) && (*tune_state < CT_TUNER_STEP_4)) {
+        ret = dib0070_captrim(state, tune_state);
+    } else if (*tune_state == CT_TUNER_STEP_4) {
+        const struct dib0070_wbd_gain_cfg *tmp = state->cfg->wbd_gain;
+        if (tmp != NULL) {
+                while (freq/1000 > tmp->freq) /* find the right one */
+                        tmp++;
+                dib0070_write_reg(state, 0x0f,
+                        (0 << 15) | (1 << 14) | (3 << 12)
+                        | (tmp->wbd_gain_val << 9) | (0 << 8) | (1 << 7)
+                        | (state->current_tune_table_index->wbdmux << 0));
+                state->wbd_gain_current = tmp->wbd_gain_val;
+        } else {
                        dib0070_write_reg(state, 0x0f,
                                          (0 << 15) | (1 << 14) | (3 << 12) | (6 << 9) | (0 << 8) | (1 << 7) | (state->current_tune_table_index->
                                                                                                                wbdmux << 0));
-                        state->wbd_gain_current = 6;
+            state->wbd_gain_current = 6;
-                }
+        }
-                dib0070_write_reg(state, 0x06, 0x3fff);
+        dib0070_write_reg(state, 0x06, 0x3fff);
                dib0070_write_reg(state, 0x07,
                                  (state->current_tune_table_index->switch_trim << 11) | (7 << 8) | (state->lna_match->lna_band << 3) | (3 << 0));
-                dib0070_write_reg(state, 0x08, (state->lna_match->lna_band << 10) | (3 << 7) | (127));
+        dib0070_write_reg(state, 0x08, (state->lna_match->lna_band << 10) | (3 << 7) | (127));
-                dib0070_write_reg(state, 0x0d, 0x0d80);
+        dib0070_write_reg(state, 0x0d, 0x0d80);
-                dib0070_write_reg(state, 0x18, 0x07ff);
-                dib0070_write_reg(state, 0x17, 0x0033);
-                *tune_state = CT_TUNER_STEP_5;
+        dib0070_write_reg(state, 0x18,   0x07ff);
-        } else if (*tune_state == CT_TUNER_STEP_5) {
+        dib0070_write_reg(state, 0x17, 0x0033);
-                dib0070_set_bandwidth(fe, ch);
-                *tune_state = CT_TUNER_STOP;
-        } else {
+        *tune_state = CT_TUNER_STEP_5;
-                ret = FE_CALLBACK_TIME_NEVER;   /* tuner finished, time to call again infinite */
+    } else if (*tune_state == CT_TUNER_STEP_5) {
-        }
+        dib0070_set_bandwidth(fe, ch);
-        return ret;
+        *tune_state = CT_TUNER_STOP;
+    } else {
+        ret = FE_CALLBACK_TIME_NEVER; /* tuner finished, time to call again infinite */
+    }
+    return ret;
 }
 static int dib0070_tune(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
 {
-        struct dib0070_state *state = fe->tuner_priv;
+    struct dib0070_state *state = fe->tuner_priv;
-        uint32_t ret;
+    uint32_t ret;
-        state->tune_state = CT_TUNER_START;
+    state->tune_state = CT_TUNER_START;
-        do {
+    do {
-                ret = dib0070_tune_digital(fe, p);
+        ret = dib0070_tune_digital(fe, p);
-                if (ret != FE_CALLBACK_TIME_NEVER)
+        if (ret != FE_CALLBACK_TIME_NEVER)
-                        msleep(ret / 10);
+                msleep(ret/10);
-                else
+        else
-                        break;
+            break;
-        } while (state->tune_state != CT_TUNER_STOP);
+    } while (state->tune_state != CT_TUNER_STOP);
-        return 0;
+    return 0;
 }
 static int dib0070_wakeup(struct dvb_frontend *fe)
@@ -512,92 +507,113 @@ static int dib0070_sleep(struct dvb_frontend *fe)
        return 0;
 }
-static const u16 dib0070_p1f_defaults[] = {
+u8 dib0070_get_rf_output(struct dvb_frontend *fe)
+{
+        struct dib0070_state *state = fe->tuner_priv;
+        return (dib0070_read_reg(state, 0x07) >> 11) & 0x3;
+}
+EXPORT_SYMBOL(dib0070_get_rf_output);
+int dib0070_set_rf_output(struct dvb_frontend *fe, u8 no)
+{
+        struct dib0070_state *state = fe->tuner_priv;
+        u16 rxrf2 = dib0070_read_reg(state, 0x07) & 0xfe7ff;
+        if (no > 3)
+                no = 3;
+        if (no < 1)
+                no = 1;
+        return dib0070_write_reg(state, 0x07, rxrf2 | (no << 11));
+}
+EXPORT_SYMBOL(dib0070_set_rf_output);
+static const u16 dib0070_p1f_defaults[] =
+{
        7, 0x02,
-        0x0008,
+                0x0008,
-        0x0000,
+                0x0000,
-        0x0000,
+                0x0000,
-        0x0000,
+                0x0000,
-        0x0000,
+                0x0000,
-        0x0002,
+                0x0002,
-        0x0100,
+                0x0100,
        3, 0x0d,
-        0x0d80,
+                0x0d80,
-        0x0001,
+                0x0001,
-        0x0000,
+                0x0000,
        4, 0x11,
-        0x0000,
+                0x0000,
-        0x0103,
+                0x0103,
-        0x0000,
+                0x0000,
-        0x0000,
+                0x0000,
        3, 0x16,
-        0x0004 | 0x0040,
+                0x0004 | 0x0040,
-        0x0030,
+                0x0030,
-        0x07ff,
+                0x07ff,
        6, 0x1b,
-        0x4112,
+                0x4112,
-        0xff00,
+                0xff00,
-        0xc07f,
+                0xc07f,
-        0x0000,
+                0x0000,
-        0x0180,
+                0x0180,
-        0x4000 | 0x0800 | 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001,
+                0x4000 | 0x0800 | 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001,
        0,
 };
 static u16 dib0070_read_wbd_offset(struct dib0070_state *state, u8 gain)
 {
-        u16 tuner_en = dib0070_read_reg(state, 0x20);
+    u16 tuner_en = dib0070_read_reg(state, 0x20);
-        u16 offset;
+    u16 offset;
-        dib0070_write_reg(state, 0x18, 0x07ff);
+    dib0070_write_reg(state, 0x18, 0x07ff);
-        dib0070_write_reg(state, 0x20, 0x0800 | 0x4000 | 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001);
+    dib0070_write_reg(state, 0x20, 0x0800 | 0x4000 | 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001);
-        dib0070_write_reg(state, 0x0f, (1 << 14) | (2 << 12) | (gain << 9) | (1 << 8) | (1 << 7) | (0 << 0));
+    dib0070_write_reg(state, 0x0f, (1 << 14) | (2 << 12) | (gain << 9) | (1 << 8) | (1 << 7) | (0 << 0));
-        msleep(9);
+    msleep(9);
-        offset = dib0070_read_reg(state, 0x19);
+    offset = dib0070_read_reg(state, 0x19);
-        dib0070_write_reg(state, 0x20, tuner_en);
+    dib0070_write_reg(state, 0x20, tuner_en);
-        return offset;
+    return offset;
 }
 static void dib0070_wbd_offset_calibration(struct dib0070_state *state)
 {
-        u8 gain;
+    u8 gain;
-        for (gain = 6; gain < 8; gain++) {
+    for (gain = 6; gain < 8; gain++) {
-                state->wbd_offset_3_3[gain - 6] = ((dib0070_read_wbd_offset(state, gain) * 8 * 18 / 33 + 1) / 2);
+        state->wbd_offset_3_3[gain - 6] = ((dib0070_read_wbd_offset(state, gain) * 8 * 18 / 33 + 1) / 2);
-                dprintk("Gain: %d, WBDOffset (3.3V) = %hd", gain, state->wbd_offset_3_3[gain - 6]);
+        dprintk("Gain: %d, WBDOffset (3.3V) = %hd", gain, state->wbd_offset_3_3[gain-6]);
-        }
+    }
 }
 u16 dib0070_wbd_offset(struct dvb_frontend *fe)
 {
-        struct dib0070_state *state = fe->tuner_priv;
+    struct dib0070_state *state = fe->tuner_priv;
-        const struct dib0070_wbd_gain_cfg *tmp = state->cfg->wbd_gain;
+    const struct dib0070_wbd_gain_cfg *tmp = state->cfg->wbd_gain;
-        u32 freq = fe->dtv_property_cache.frequency / 1000;
+    u32 freq = fe->dtv_property_cache.frequency/1000;
-        if (tmp != NULL) {
+    if (tmp != NULL) {
-                while (freq / 1000 > tmp->freq) /* find the right one */
+        while (freq/1000 > tmp->freq) /* find the right one */
-                        tmp++;
+            tmp++;
-                state->wbd_gain_current = tmp->wbd_gain_val;
+        state->wbd_gain_current = tmp->wbd_gain_val;
        } else
-                state->wbd_gain_current = 6;
+        state->wbd_gain_current = 6;
-        return state->wbd_offset_3_3[state->wbd_gain_current - 6];
+    return state->wbd_offset_3_3[state->wbd_gain_current - 6];
 }
 EXPORT_SYMBOL(dib0070_wbd_offset);
 #define pgm_read_word(w) (*w)
 static int dib0070_reset(struct dvb_frontend *fe)
 {
-        struct dib0070_state *state = fe->tuner_priv;
+    struct dib0070_state *state = fe->tuner_priv;
        u16 l, r, *n;
        HARD_RESET(state);
 #ifndef FORCE_SBAND_TUNER
        if ((dib0070_read_reg(state, 0x22) >> 9) & 0x1)
                state->revision = (dib0070_read_reg(state, 0x1f) >> 8) & 0xff;
@@ -605,7 +621,7 @@ static int dib0070_reset(struct dvb_frontend *fe)
 #else
 #warning forcing SBAND
 #endif
-        state->revision = DIB0070S_P1A;
+                state->revision = DIB0070S_P1A;
        /* P1F or not */
        dprintk("Revision: %x", state->revision);
@@ -620,7 +636,7 @@ static int dib0070_reset(struct dvb_frontend *fe)
        while (l) {
                r = pgm_read_word(n++);
                do {
-                        dib0070_write_reg(state, (u8) r, pgm_read_word(n++));
+                        dib0070_write_reg(state, (u8)r, pgm_read_word(n++));
                        r++;
                } while (--l);
                l = pgm_read_word(n++);
@@ -633,6 +649,7 @@ static int dib0070_reset(struct dvb_frontend *fe)
        else
                r = 2;
        r |= state->cfg->osc_buffer_state << 3;
        dib0070_write_reg(state, 0x10, r);
@@ -643,16 +660,24 @@ static int dib0070_reset(struct dvb_frontend *fe)
                dib0070_write_reg(state, 0x02, r | (1 << 5));
        }
-        if (state->revision == DIB0070S_P1A)
+    if (state->revision == DIB0070S_P1A)
-                dib0070_set_ctrl_lo5(fe, 2, 4, 3, 0);
+        dib0070_set_ctrl_lo5(fe, 2, 4, 3, 0);
-        else
+    else
                dib0070_set_ctrl_lo5(fe, 5, 4, state->cfg->charge_pump, state->cfg->enable_third_order_filter);
        dib0070_write_reg(state, 0x01, (54 << 9) | 0xc8);
-        dib0070_wbd_offset_calibration(state);
+    dib0070_wbd_offset_calibration(state);
-        return 0;
+    return 0;
+}
+static int dib0070_get_frequency(struct dvb_frontend *fe, u32 *frequency)
+{
+    struct dib0070_state *state = fe->tuner_priv;
+    *frequency = 1000 * state->current_rf;
+    return 0;
 }
 static int dib0070_release(struct dvb_frontend *fe)
@@ -664,18 +689,18 @@ static int dib0070_release(struct dvb_frontend *fe)
 static const struct dvb_tuner_ops dib0070_ops = {
        .info = {
-                 .name = "DiBcom DiB0070",
+                .name           = "DiBcom DiB0070",
-                 .frequency_min = 45000000,
+                .frequency_min  =  45000000,
-                 .frequency_max = 860000000,
+                .frequency_max  = 860000000,
-                 .frequency_step = 1000,
+                .frequency_step =      1000,
-                 },
+        },
-        .release = dib0070_release,
+        .release       = dib0070_release,
-        .init = dib0070_wakeup,
+        .init          = dib0070_wakeup,
-        .sleep = dib0070_sleep,
+        .sleep         = dib0070_sleep,
-        .set_params = dib0070_tune,
+        .set_params    = dib0070_tune,
-//      .get_frequency = dib0070_get_frequency,
+        .get_frequency = dib0070_get_frequency,
 //      .get_bandwidth = dib0070_get_bandwidth
 };
@@ -687,7 +712,7 @@ struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter
        state->cfg = cfg;
        state->i2c = i2c;
-        state->fe = fe;
+        state->fe  = fe;
        fe->tuner_priv = state;
        if (dib0070_reset(fe) != 0)
@@ -699,12 +724,11 @@ struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter
        fe->tuner_priv = state;
        return fe;
- free_mem:
+free_mem:
        kfree(state);
        fe->tuner_priv = NULL;
        return NULL;
 }
 EXPORT_SYMBOL(dib0070_attach);
 MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");
diff --git a/drivers/media/dvb/frontends/dib0070.h b/drivers/media/dvb/frontends/dib0070.h
index eec9e52ffa75..45c31fae3967 100644
--- a/drivers/media/dvb/frontends/dib0070.h
+++ b/drivers/media/dvb/frontends/dib0070.h
@@ -52,6 +52,8 @@ struct dib0070_config {
 extern struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg);
 extern u16 dib0070_wbd_offset(struct dvb_frontend *);
 extern void dib0070_ctrl_agc_filter(struct dvb_frontend *, u8 open);
+extern u8 dib0070_get_rf_output(struct dvb_frontend *fe);
+extern int dib0070_set_rf_output(struct dvb_frontend *fe, u8 no);
 #else
 static inline struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg)
 {
@@ -62,7 +64,7 @@ static inline struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struc
 static inline u16 dib0070_wbd_offset(struct dvb_frontend *fe)
 {
        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
-        return -ENODEV;
+        return 0;
 }
 static inline void dib0070_ctrl_agc_filter(struct dvb_frontend *fe, u8 open)
diff --git a/drivers/media/dvb/frontends/dib0090.c b/drivers/media/dvb/frontends/dib0090.c
new file mode 100644
index 000000000000..614552709a6f
--- /dev/null
+++ b/drivers/media/dvb/frontends/dib0090.c
@@ -0,0 +1,1522 @@
+/*
+ * Linux-DVB Driver for DiBcom's DiB0090 base-band RF Tuner.
+ *
+ * Copyright (C) 2005-9 DiBcom (http://www.dibcom.fr/)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *
+ * This code is more or less generated from another driver, please
+ * excuse some codingstyle oddities.
+ *
+ */
+#include <linux/kernel.h>
+#include <linux/i2c.h>
+#include "dvb_frontend.h"
+#include "dib0090.h"
+#include "dibx000_common.h"
+static int debug;
+module_param(debug, int, 0644);
+MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
+#define dprintk(args...) do { \
+        if (debug) { \
+                printk(KERN_DEBUG "DiB0090: "); \
+                printk(args); \
+                printk("\n"); \
+        } \
+} while (0)
+#define CONFIG_SYS_ISDBT
+#define CONFIG_BAND_CBAND
+#define CONFIG_BAND_VHF
+#define CONFIG_BAND_UHF
+#define CONFIG_DIB0090_USE_PWM_AGC
+#define EN_LNA0      0x8000
+#define EN_LNA1      0x4000
+#define EN_LNA2      0x2000
+#define EN_LNA3      0x1000
+#define EN_MIX0      0x0800
+#define EN_MIX1      0x0400
+#define EN_MIX2      0x0200
+#define EN_MIX3      0x0100
+#define EN_IQADC     0x0040
+#define EN_PLL       0x0020
+#define EN_TX        0x0010
+#define EN_BB        0x0008
+#define EN_LO        0x0004
+#define EN_BIAS      0x0001
+#define EN_IQANA     0x0002
+#define EN_DIGCLK    0x0080     /* not in the 0x24 reg, only in 0x1b */
+#define EN_CRYSTAL   0x0002
+#define EN_UHF           0x22E9
+#define EN_VHF           0x44E9
+#define EN_LBD           0x11E9
+#define EN_SBD           0x44E9
+#define EN_CAB           0x88E9
+#define pgm_read_word(w) (*w)
+struct dc_calibration;
+struct dib0090_tuning {
+        u32 max_freq;           /* for every frequency less than or equal to that field: this information is correct */
+        u8 switch_trim;
+        u8 lna_tune;
+        u8 lna_bias;
+        u16 v2i;
+        u16 mix;
+        u16 load;
+        u16 tuner_enable;
+};
+struct dib0090_pll {
+        u32 max_freq;           /* for every frequency less than or equal to that field: this information is correct */
+        u8 vco_band;
+        u8 hfdiv_code;
+        u8 hfdiv;
+        u8 topresc;
+};
+struct dib0090_state {
+        struct i2c_adapter *i2c;
+        struct dvb_frontend *fe;
+        const struct dib0090_config *config;
+        u8 current_band;
+        u16 revision;
+        enum frontend_tune_state tune_state;
+        u32 current_rf;
+        u16 wbd_offset;
+        s16 wbd_target;         /* in dB */
+        s16 rf_gain_limit;      /* take-over-point: where to split between bb and rf gain */
+        s16 current_gain;       /* keeps the currently programmed gain */
+        u8 agc_step;            /* new binary search */
+        u16 gain[2];            /* for channel monitoring */
+        const u16 *rf_ramp;
+        const u16 *bb_ramp;
+        /* for the software AGC ramps */
+        u16 bb_1_def;
+        u16 rf_lt_def;
+        u16 gain_reg[4];
+        /* for the captrim/dc-offset search */
+        s8 step;
+        s16 adc_diff;
+        s16 min_adc_diff;
+        s8 captrim;
+        s8 fcaptrim;
+        const struct dc_calibration *dc;
+        u16 bb6, bb7;
+        const struct dib0090_tuning *current_tune_table_index;
+        const struct dib0090_pll *current_pll_table_index;
+        u8 tuner_is_tuned;
+        u8 agc_freeze;
+        u8 reset;
+};
+static u16 dib0090_read_reg(struct dib0090_state *state, u8 reg)
+{
+        u8 b[2];
+        struct i2c_msg msg[2] = {
+                {.addr = state->config->i2c_address, .flags = 0, .buf = &reg, .len = 1},
+                {.addr = state->config->i2c_address, .flags = I2C_M_RD, .buf = b, .len = 2},
+        };
+        if (i2c_transfer(state->i2c, msg, 2) != 2) {
+                printk(KERN_WARNING "DiB0090 I2C read failed\n");
+                return 0;
+        }
+        return (b[0] << 8) | b[1];
+}
+static int dib0090_write_reg(struct dib0090_state *state, u32 reg, u16 val)
+{
+        u8 b[3] = { reg & 0xff, val >> 8, val & 0xff };
+        struct i2c_msg msg = {.addr = state->config->i2c_address, .flags = 0, .buf = b, .len = 3 };
+        if (i2c_transfer(state->i2c, &msg, 1) != 1) {
+                printk(KERN_WARNING "DiB0090 I2C write failed\n");
+                return -EREMOTEIO;
+        }
+        return 0;
+}
+#define HARD_RESET(state) do {  if (cfg->reset) {  if (cfg->sleep) cfg->sleep(fe, 0); msleep(10);  cfg->reset(fe, 1); msleep(10);  cfg->reset(fe, 0); msleep(10);  }  } while (0)
+#define ADC_TARGET -220
+#define GAIN_ALPHA 5
+#define WBD_ALPHA 6
+#define LPF     100
+static void dib0090_write_regs(struct dib0090_state *state, u8 r, const u16 * b, u8 c)
+{
+        do {
+                dib0090_write_reg(state, r++, *b++);
+        } while (--c);
+}
+static u16 dib0090_identify(struct dvb_frontend *fe)
+{
+        struct dib0090_state *state = fe->tuner_priv;
+        u16 v;
+        v = dib0090_read_reg(state, 0x1a);
+#ifdef FIRMWARE_FIREFLY
+        /* pll is not locked locked */
+        if (!(v & 0x800))
+                dprintk("FE%d : Identification : pll is not yet locked", fe->id);
+#endif
+        /* without PLL lock info */
+        v &= 0x3ff;
+        dprintk("P/V: %04x:", v);
+        if ((v >> 8) & 0xf)
+                dprintk("FE%d : Product ID = 0x%x : KROSUS", fe->id, (v >> 8) & 0xf);
+        else
+                return 0xff;
+        v &= 0xff;
+        if (((v >> 5) & 0x7) == 0x1)
+                dprintk("FE%d : MP001 : 9090/8096", fe->id);
+        else if (((v >> 5) & 0x7) == 0x4)
+                dprintk("FE%d : MP005 : Single Sband", fe->id);
+        else if (((v >> 5) & 0x7) == 0x6)
+                dprintk("FE%d : MP008 : diversity VHF-UHF-LBAND", fe->id);
+        else if (((v >> 5) & 0x7) == 0x7)
+                dprintk("FE%d : MP009 : diversity 29098 CBAND-UHF-LBAND-SBAND", fe->id);
+        else
+                return 0xff;
+        /* revision only */
+        if ((v & 0x1f) == 0x3)
+                dprintk("FE%d : P1-D/E/F detected", fe->id);
+        else if ((v & 0x1f) == 0x1)
+                dprintk("FE%d : P1C detected", fe->id);
+        else if ((v & 0x1f) == 0x0) {
+#ifdef CONFIG_TUNER_DIB0090_P1B_SUPPORT
+                dprintk("FE%d : P1-A/B detected: using previous driver - support will be removed soon", fe->id);
+                dib0090_p1b_register(fe);
+#else
+                dprintk("FE%d : P1-A/B detected: driver is deactivated - not available", fe->id);
+                return 0xff;
+#endif
+        }
+        return v;
+}
+static void dib0090_reset_digital(struct dvb_frontend *fe, const struct dib0090_config *cfg)
+{
+        struct dib0090_state *state = fe->tuner_priv;
+        HARD_RESET(state);
+        dib0090_write_reg(state, 0x24, EN_PLL);
+        dib0090_write_reg(state, 0x1b, EN_DIGCLK | EN_PLL | EN_CRYSTAL);        /* PLL, DIG_CLK and CRYSTAL remain */
+        /* adcClkOutRatio=8->7, release reset */
+        dib0090_write_reg(state, 0x20, ((cfg->io.adc_clock_ratio - 1) << 11) | (0 << 10) | (1 << 9) | (1 << 8) | (0 << 4) | 0);
+        if (cfg->clkoutdrive != 0)
+                dib0090_write_reg(state, 0x23,
+                                  (0 << 15) | ((!cfg->analog_output) << 14) | (1 << 10) | (1 << 9) | (0 << 8) | (cfg->clkoutdrive << 5) | (cfg->
+                                                                                                                                           clkouttobamse
+                                                                                                                                           << 4) | (0
+                                                                                                                                                    <<
+                                                                                                                                                    2)
+                                  | (0));
+        else
+                dib0090_write_reg(state, 0x23,
+                                  (0 << 15) | ((!cfg->analog_output) << 14) | (1 << 10) | (1 << 9) | (0 << 8) | (7 << 5) | (cfg->
+                                                                                                                            clkouttobamse << 4) | (0
+                                                                                                                                                   <<
+                                                                                                                                                   2)
+                                  | (0));
+        /* enable pll, de-activate reset, ratio: 2/1 = 60MHz */
+        dib0090_write_reg(state, 0x21,
+                          (cfg->io.pll_bypass << 15) | (1 << 13) | (cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io.pll_prediv));
+}
+static int dib0090_wakeup(struct dvb_frontend *fe)
+{
+        struct dib0090_state *state = fe->tuner_priv;
+        if (state->config->sleep)
+                state->config->sleep(fe, 0);
+        return 0;
+}
+static int dib0090_sleep(struct dvb_frontend *fe)
+{
+        struct dib0090_state *state = fe->tuner_priv;
+        if (state->config->sleep)
+                state->config->sleep(fe, 1);
+        return 0;
+}
+extern void dib0090_dcc_freq(struct dvb_frontend *fe, u8 fast)
+{
+        struct dib0090_state *state = fe->tuner_priv;
+        if (fast)
+                dib0090_write_reg(state, 0x04, 0);
+        else
+                dib0090_write_reg(state, 0x04, 1);
+}
+EXPORT_SYMBOL(dib0090_dcc_freq);
+static const u16 rf_ramp_pwm_cband[] = {
+        0,                      /* max RF gain in 10th of dB */
+        0,                      /* ramp_slope = 1dB of gain -> clock_ticks_per_db = clk_khz / ramp_slope -> 0x2b */
+        0,                      /* ramp_max = maximum X used on the ramp */
+        (0 << 10) | 0,          /* 0x2c, LNA 1 = 0dB */
+        (0 << 10) | 0,          /* 0x2d, LNA 1 */
+        (0 << 10) | 0,          /* 0x2e, LNA 2 = 0dB */
+        (0 << 10) | 0,          /* 0x2f, LNA 2 */
+        (0 << 10) | 0,          /* 0x30, LNA 3 = 0dB */
+        (0 << 10) | 0,          /* 0x31, LNA 3 */
+        (0 << 10) | 0,          /* GAIN_4_1, LNA 4 = 0dB */
+        (0 << 10) | 0,          /* GAIN_4_2, LNA 4 */
+};
+static const u16 rf_ramp_vhf[] = {
+        412,                    /* max RF gain in 10th of dB */
+        132, 307, 127,          /* LNA1,  13.2dB */
+        105, 412, 255,          /* LNA2,  10.5dB */
+        50, 50, 127,            /* LNA3,  5dB */
+        125, 175, 127,          /* LNA4,  12.5dB */
+        0, 0, 127,              /* CBAND, 0dB */
+};
+static const u16 rf_ramp_uhf[] = {
+        412,                    /* max RF gain in 10th of dB */
+        132, 307, 127,          /* LNA1  : total gain = 13.2dB, point on the ramp where this amp is full gain, value to write to get full gain */
+        105, 412, 255,          /* LNA2  : 10.5 dB */
+        50, 50, 127,            /* LNA3  :  5.0 dB */
+        125, 175, 127,          /* LNA4  : 12.5 dB */
+        0, 0, 127,              /* CBAND :  0.0 dB */
+};
+static const u16 rf_ramp_cband[] = {
+        332,                    /* max RF gain in 10th of dB */
+        132, 252, 127,          /* LNA1,  dB */
+        80, 332, 255,           /* LNA2,  dB */
+        0, 0, 127,              /* LNA3,  dB */
+        0, 0, 127,              /* LNA4,  dB */
+        120, 120, 127,          /* LT1 CBAND */
+};
+static const u16 rf_ramp_pwm_vhf[] = {
+        404,                    /* max RF gain in 10th of dB */
+        25,                     /* ramp_slope = 1dB of gain -> clock_ticks_per_db = clk_khz / ramp_slope -> 0x2b */
+        1011,                   /* ramp_max = maximum X used on the ramp */
+        (6 << 10) | 417,        /* 0x2c, LNA 1 = 13.2dB */
+        (0 << 10) | 756,        /* 0x2d, LNA 1 */
+        (16 << 10) | 756,       /* 0x2e, LNA 2 = 10.5dB */
+        (0 << 10) | 1011,       /* 0x2f, LNA 2 */
+        (16 << 10) | 290,       /* 0x30, LNA 3 = 5dB */
+        (0 << 10) | 417,        /* 0x31, LNA 3 */
+        (7 << 10) | 0,          /* GAIN_4_1, LNA 4 = 12.5dB */
+        (0 << 10) | 290,        /* GAIN_4_2, LNA 4 */
+};
+static const u16 rf_ramp_pwm_uhf[] = {
+        404,                    /* max RF gain in 10th of dB */
+        25,                     /* ramp_slope = 1dB of gain -> clock_ticks_per_db = clk_khz / ramp_slope -> 0x2b */
+        1011,                   /* ramp_max = maximum X used on the ramp */
+        (6 << 10) | 417,        /* 0x2c, LNA 1 = 13.2dB */
+        (0 << 10) | 756,        /* 0x2d, LNA 1 */
+        (16 << 10) | 756,       /* 0x2e, LNA 2 = 10.5dB */
+        (0 << 10) | 1011,       /* 0x2f, LNA 2 */
+        (16 << 10) | 0,         /* 0x30, LNA 3 = 5dB */
+        (0 << 10) | 127,        /* 0x31, LNA 3 */
+        (7 << 10) | 127,        /* GAIN_4_1, LNA 4 = 12.5dB */
+        (0 << 10) | 417,        /* GAIN_4_2, LNA 4 */
+};
+static const u16 bb_ramp_boost[] = {
+        550,                    /* max BB gain in 10th of dB */
+        260, 260, 26,           /* BB1, 26dB */
+        290, 550, 29,           /* BB2, 29dB */
+};
+static const u16 bb_ramp_pwm_normal[] = {
+        500,                    /* max RF gain in 10th of dB */
+        8,                      /* ramp_slope = 1dB of gain -> clock_ticks_per_db = clk_khz / ramp_slope -> 0x34 */
+        400,
+        (2 << 9) | 0,           /* 0x35 = 21dB */
+        (0 << 9) | 168,         /* 0x36 */
+        (2 << 9) | 168,         /* 0x37 = 29dB */
+        (0 << 9) | 400,         /* 0x38 */
+};
+struct slope {
+        int16_t range;
+        int16_t slope;
+};
+static u16 slopes_to_scale(const struct slope *slopes, u8 num, s16 val)
+{
+        u8 i;
+        u16 rest;
+        u16 ret = 0;
+        for (i = 0; i < num; i++) {
+                if (val > slopes[i].range)
+                        rest = slopes[i].range;
+                else
+                        rest = val;
+                ret += (rest * slopes[i].slope) / slopes[i].range;
+                val -= rest;
+        }
+        return ret;
+}
+static const struct slope dib0090_wbd_slopes[3] = {
+        {66, 120},              /* -64,-52: offset -   65 */
+        {600, 170},             /* -52,-35: 65     -  665 */
+        {170, 250},             /* -45,-10: 665    - 835 */
+};
+static s16 dib0090_wbd_to_db(struct dib0090_state *state, u16 wbd)
+{
+        wbd &= 0x3ff;
+        if (wbd < state->wbd_offset)
+                wbd = 0;
+        else
+                wbd -= state->wbd_offset;
+        /* -64dB is the floor */
+        return -640 + (s16) slopes_to_scale(dib0090_wbd_slopes, ARRAY_SIZE(dib0090_wbd_slopes), wbd);
+}
+static void dib0090_wbd_target(struct dib0090_state *state, u32 rf)
+{
+        u16 offset = 250;
+        /* TODO : DAB digital N+/-1 interferer perfs : offset = 10 */
+        if (state->current_band == BAND_VHF)
+                offset = 650;
+#ifndef FIRMWARE_FIREFLY
+        if (state->current_band == BAND_VHF)
+                offset = state->config->wbd_vhf_offset;
+        if (state->current_band == BAND_CBAND)
+                offset = state->config->wbd_cband_offset;
+#endif
+        state->wbd_target = dib0090_wbd_to_db(state, state->wbd_offset + offset);
+        dprintk("wbd-target: %d dB", (u32) state->wbd_target);
+}
+static const int gain_reg_addr[4] = {
+        0x08, 0x0a, 0x0f, 0x01
+};
+static void dib0090_gain_apply(struct dib0090_state *state, s16 gain_delta, s16 top_delta, u8 force)
+{
+        u16 rf, bb, ref;
+        u16 i, v, gain_reg[4] = { 0 }, gain;
+        const u16 *g;
+        if (top_delta < -511)
+                top_delta = -511;
+        if (top_delta > 511)
+                top_delta = 511;
+        if (force) {
+                top_delta *= (1 << WBD_ALPHA);
+                gain_delta *= (1 << GAIN_ALPHA);
+        }
+        if (top_delta >= ((s16) (state->rf_ramp[0] << WBD_ALPHA) - state->rf_gain_limit))       /* overflow */
+                state->rf_gain_limit = state->rf_ramp[0] << WBD_ALPHA;
+        else
+                state->rf_gain_limit += top_delta;
+        if (state->rf_gain_limit < 0)   /*underflow */
+                state->rf_gain_limit = 0;
+        /* use gain as a temporary variable and correct current_gain */
+        gain = ((state->rf_gain_limit >> WBD_ALPHA) + state->bb_ramp[0]) << GAIN_ALPHA;
+        if (gain_delta >= ((s16) gain - state->current_gain))   /* overflow */
+                state->current_gain = gain;
+        else
+                state->current_gain += gain_delta;
+        /* cannot be less than 0 (only if gain_delta is less than 0 we can have current_gain < 0) */
+        if (state->current_gain < 0)
+                state->current_gain = 0;
+        /* now split total gain to rf and bb gain */
+        gain = state->current_gain >> GAIN_ALPHA;
+        /* requested gain is bigger than rf gain limit - ACI/WBD adjustment */
+        if (gain > (state->rf_gain_limit >> WBD_ALPHA)) {
+                rf = state->rf_gain_limit >> WBD_ALPHA;
+                bb = gain - rf;
+                if (bb > state->bb_ramp[0])
+                        bb = state->bb_ramp[0];
+        } else {                /* high signal level -> all gains put on RF */
+                rf = gain;
+                bb = 0;
+        }
+        state->gain[0] = rf;
+        state->gain[1] = bb;
+        /* software ramp */
+        /* Start with RF gains */
+        g = state->rf_ramp + 1; /* point on RF LNA1 max gain */
+        ref = rf;
+        for (i = 0; i < 7; i++) {       /* Go over all amplifiers => 5RF amps + 2 BB amps = 7 amps */
+                if (g[0] == 0 || ref < (g[1] - g[0]))   /* if total gain of the current amp is null or this amp is not concerned because it starts to work from an higher gain value */
+                        v = 0;  /* force the gain to write for the current amp to be null */
+                else if (ref >= g[1])   /* Gain to set is higher than the high working point of this amp */
+                        v = g[2];       /* force this amp to be full gain */
+                else            /* compute the value to set to this amp because we are somewhere in his range */
+                        v = ((ref - (g[1] - g[0])) * g[2]) / g[0];
+                if (i == 0)     /* LNA 1 reg mapping */
+                        gain_reg[0] = v;
+                else if (i == 1)        /* LNA 2 reg mapping */
+                        gain_reg[0] |= v << 7;
+                else if (i == 2)        /* LNA 3 reg mapping */
+                        gain_reg[1] = v;
+                else if (i == 3)        /* LNA 4 reg mapping */
+                        gain_reg[1] |= v << 7;
+                else if (i == 4)        /* CBAND LNA reg mapping */
+                        gain_reg[2] = v | state->rf_lt_def;
+                else if (i == 5)        /* BB gain 1 reg mapping */
+                        gain_reg[3] = v << 3;
+                else if (i == 6)        /* BB gain 2 reg mapping */
+                        gain_reg[3] |= v << 8;
+                g += 3;         /* go to next gain bloc */
+                /* When RF is finished, start with BB */
+                if (i == 4) {
+                        g = state->bb_ramp + 1; /* point on BB gain 1 max gain */
+                        ref = bb;
+                }
+        }
+        gain_reg[3] |= state->bb_1_def;
+        gain_reg[3] |= ((bb % 10) * 100) / 125;
+#ifdef DEBUG_AGC
+        dprintk("GA CALC: DB: %3d(rf) + %3d(bb) = %3d gain_reg[0]=%04x gain_reg[1]=%04x gain_reg[2]=%04x gain_reg[0]=%04x", rf, bb, rf + bb,
+                gain_reg[0], gain_reg[1], gain_reg[2], gain_reg[3]);
+#endif
+        /* Write the amplifier regs */
+        for (i = 0; i < 4; i++) {
+                v = gain_reg[i];
+                if (force || state->gain_reg[i] != v) {
+                        state->gain_reg[i] = v;
+                        dib0090_write_reg(state, gain_reg_addr[i], v);
+                }
+        }
+}
+static void dib0090_set_boost(struct dib0090_state *state, int onoff)
+{
+        state->bb_1_def &= 0xdfff;
+        state->bb_1_def |= onoff << 13;
+}
+static void dib0090_set_rframp(struct dib0090_state *state, const u16 * cfg)
+{
+        state->rf_ramp = cfg;
+}
+static void dib0090_set_rframp_pwm(struct dib0090_state *state, const u16 * cfg)
+{
+        state->rf_ramp = cfg;
+        dib0090_write_reg(state, 0x2a, 0xffff);
+        dprintk("total RF gain: %ddB, step: %d", (u32) cfg[0], dib0090_read_reg(state, 0x2a));
+        dib0090_write_regs(state, 0x2c, cfg + 3, 6);
+        dib0090_write_regs(state, 0x3e, cfg + 9, 2);
+}
+static void dib0090_set_bbramp(struct dib0090_state *state, const u16 * cfg)
+{
+        state->bb_ramp = cfg;
+        dib0090_set_boost(state, cfg[0] > 500); /* we want the boost if the gain is higher that 50dB */
+}
+static void dib0090_set_bbramp_pwm(struct dib0090_state *state, const u16 * cfg)
+{
+        state->bb_ramp = cfg;
+        dib0090_set_boost(state, cfg[0] > 500); /* we want the boost if the gain is higher that 50dB */
+        dib0090_write_reg(state, 0x33, 0xffff);
+        dprintk("total BB gain: %ddB, step: %d", (u32) cfg[0], dib0090_read_reg(state, 0x33));
+        dib0090_write_regs(state, 0x35, cfg + 3, 4);
+}
+void dib0090_pwm_gain_reset(struct dvb_frontend *fe)
+{
+        struct dib0090_state *state = fe->tuner_priv;
+        /* reset the AGC */
+        if (state->config->use_pwm_agc) {
+#ifdef CONFIG_BAND_SBAND
+                if (state->current_band == BAND_SBAND) {
+                        dib0090_set_rframp_pwm(state, rf_ramp_pwm_sband);
+                        dib0090_set_bbramp_pwm(state, bb_ramp_pwm_boost);
+                } else
+#endif
+#ifdef CONFIG_BAND_CBAND
+                if (state->current_band == BAND_CBAND) {
+                        dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband);
+                        dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal);
+                } else
+#endif
+#ifdef CONFIG_BAND_VHF
+                if (state->current_band == BAND_VHF) {
+                        dib0090_set_rframp_pwm(state, rf_ramp_pwm_vhf);
+                        dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal);
+                } else
+#endif
+                {
+                        dib0090_set_rframp_pwm(state, rf_ramp_pwm_uhf);
+                        dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal);
+                }
+                if (state->rf_ramp[0] != 0)
+                        dib0090_write_reg(state, 0x32, (3 << 11));
+                else
+                        dib0090_write_reg(state, 0x32, (0 << 11));
+                dib0090_write_reg(state, 0x39, (1 << 10));
+        }
+}
+EXPORT_SYMBOL(dib0090_pwm_gain_reset);
+int dib0090_gain_control(struct dvb_frontend *fe)
+{
+        struct dib0090_state *state = fe->tuner_priv;
+        enum frontend_tune_state *tune_state = &state->tune_state;
+        int ret = 10;
+        u16 wbd_val = 0;
+        u8 apply_gain_immediatly = 1;
+        s16 wbd_error = 0, adc_error = 0;
+        if (*tune_state == CT_AGC_START) {
+                state->agc_freeze = 0;
+                dib0090_write_reg(state, 0x04, 0x0);
+#ifdef CONFIG_BAND_SBAND
+                if (state->current_band == BAND_SBAND) {
+                        dib0090_set_rframp(state, rf_ramp_sband);
+                        dib0090_set_bbramp(state, bb_ramp_boost);
+                } else
+#endif
+#ifdef CONFIG_BAND_VHF
+                if (state->current_band == BAND_VHF) {
+                        dib0090_set_rframp(state, rf_ramp_vhf);
+                        dib0090_set_bbramp(state, bb_ramp_boost);
+                } else
+#endif
+#ifdef CONFIG_BAND_CBAND
+                if (state->current_band == BAND_CBAND) {
+                        dib0090_set_rframp(state, rf_ramp_cband);
+                        dib0090_set_bbramp(state, bb_ramp_boost);
+                } else
+#endif
+                {
+                        dib0090_set_rframp(state, rf_ramp_uhf);
+                        dib0090_set_bbramp(state, bb_ramp_boost);
+                }
+                dib0090_write_reg(state, 0x32, 0);
+                dib0090_write_reg(state, 0x39, 0);
+                dib0090_wbd_target(state, state->current_rf);
+                state->rf_gain_limit = state->rf_ramp[0] << WBD_ALPHA;
+                state->current_gain = ((state->rf_ramp[0] + state->bb_ramp[0]) / 2) << GAIN_ALPHA;
+                *tune_state = CT_AGC_STEP_0;
+        } else if (!state->agc_freeze) {
+                s16 wbd;
+                int adc;
+                wbd_val = dib0090_read_reg(state, 0x1d);
+                /* read and calc the wbd power */
+                wbd = dib0090_wbd_to_db(state, wbd_val);
+                wbd_error = state->wbd_target - wbd;
+                if (*tune_state == CT_AGC_STEP_0) {
+                        if (wbd_error < 0 && state->rf_gain_limit > 0) {
+#ifdef CONFIG_BAND_CBAND
+                                /* in case of CBAND tune reduce first the lt_gain2 before adjusting the RF gain */
+                                u8 ltg2 = (state->rf_lt_def >> 10) & 0x7;
+                                if (state->current_band == BAND_CBAND && ltg2) {
+                                        ltg2 >>= 1;
+                                        state->rf_lt_def &= ltg2 << 10; /* reduce in 3 steps from 7 to 0 */
+                                }
+#endif
+                        } else {
+                                state->agc_step = 0;
+                                *tune_state = CT_AGC_STEP_1;
+                        }
+                } else {
+                        /* calc the adc power */
+                        adc = state->config->get_adc_power(fe);
+                        adc = (adc * ((s32) 355774) + (((s32) 1) << 20)) >> 21; /* included in [0:-700] */
+                        adc_error = (s16) (((s32) ADC_TARGET) - adc);
+#ifdef CONFIG_STANDARD_DAB
+                        if (state->fe->dtv_property_cache.delivery_system == STANDARD_DAB)
+                                adc_error += 130;
+#endif
+#ifdef CONFIG_STANDARD_DVBT
+                        if (state->fe->dtv_property_cache.delivery_system == STANDARD_DVBT &&
+                            (state->fe->dtv_property_cache.modulation == QAM_64 || state->fe->dtv_property_cache.modulation == QAM_16))
+                                adc_error += 60;
+#endif
+#ifdef CONFIG_SYS_ISDBT
+                        if ((state->fe->dtv_property_cache.delivery_system == SYS_ISDBT) && (((state->fe->dtv_property_cache.layer[0].segment_count >
+                                                                                               0)
+                                                                                              &&
+                                                                                              ((state->fe->dtv_property_cache.layer[0].modulation ==
+                                                                                                QAM_64)
+                                                                                               || (state->fe->dtv_property_cache.layer[0].
+                                                                                                   modulation == QAM_16)))
+                                                                                             ||
+                                                                                             ((state->fe->dtv_property_cache.layer[1].segment_count >
+                                                                                               0)
+                                                                                              &&
+                                                                                              ((state->fe->dtv_property_cache.layer[1].modulation ==
+                                                                                                QAM_64)
+                                                                                               || (state->fe->dtv_property_cache.layer[1].
+                                                                                                   modulation == QAM_16)))
+                                                                                             ||
+                                                                                             ((state->fe->dtv_property_cache.layer[2].segment_count >
+                                                                                               0)
+                                                                                              &&
+                                                                                              ((state->fe->dtv_property_cache.layer[2].modulation ==
+                                                                                                QAM_64)
+                                                                                               || (state->fe->dtv_property_cache.layer[2].
+                                                                                                   modulation == QAM_16)))
+                            )
+                            )
+                                adc_error += 60;
+#endif
+                        if (*tune_state == CT_AGC_STEP_1) {     /* quickly go to the correct range of the ADC power */
+                                if (ABS(adc_error) < 50 || state->agc_step++ > 5) {
+#ifdef CONFIG_STANDARD_DAB
+                                        if (state->fe->dtv_property_cache.delivery_system == STANDARD_DAB) {
+                                                dib0090_write_reg(state, 0x02, (1 << 15) | (15 << 11) | (31 << 6) | (63));      /* cap value = 63 : narrow BB filter : Fc = 1.8MHz */
+                                                dib0090_write_reg(state, 0x04, 0x0);
+                                        } else
+#endif
+                                        {
+                                                dib0090_write_reg(state, 0x02, (1 << 15) | (3 << 11) | (6 << 6) | (32));
+                                                dib0090_write_reg(state, 0x04, 0x01);   /*0 = 1KHz ; 1 = 150Hz ; 2 = 50Hz ; 3 = 50KHz ; 4 = servo fast */
+                                        }
+                                        *tune_state = CT_AGC_STOP;
+                                }
+                        } else {
+                                /* everything higher than or equal to CT_AGC_STOP means tracking */
+                                ret = 100;      /* 10ms interval */
+                                apply_gain_immediatly = 0;
+                        }
+                }
+#ifdef DEBUG_AGC
+                dprintk
+                    ("FE: %d, tune state %d, ADC = %3ddB (ADC err %3d) WBD %3ddB (WBD err %3d, WBD val SADC: %4d), RFGainLimit (TOP): %3d, signal: %3ddBm",
+                     (u32) fe->id, (u32) *tune_state, (u32) adc, (u32) adc_error, (u32) wbd, (u32) wbd_error, (u32) wbd_val,
+                     (u32) state->rf_gain_limit >> WBD_ALPHA, (s32) 200 + adc - (state->current_gain >> GAIN_ALPHA));
+#endif
+        }
+        /* apply gain */
+        if (!state->agc_freeze)
+                dib0090_gain_apply(state, adc_error, wbd_error, apply_gain_immediatly);
+        return ret;
+}
+EXPORT_SYMBOL(dib0090_gain_control);
+void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u16 * bb, u16 * rf_gain_limit, u16 * rflt)
+{
+        struct dib0090_state *state = fe->tuner_priv;
+        if (rf)
+                *rf = state->gain[0];
+        if (bb)
+                *bb = state->gain[1];
+        if (rf_gain_limit)
+                *rf_gain_limit = state->rf_gain_limit;
+        if (rflt)
+                *rflt = (state->rf_lt_def >> 10) & 0x7;
+}
+EXPORT_SYMBOL(dib0090_get_current_gain);
+u16 dib0090_get_wbd_offset(struct dvb_frontend *tuner)
+{
+        struct dib0090_state *st = tuner->tuner_priv;
+        return st->wbd_offset;
+}
+EXPORT_SYMBOL(dib0090_get_wbd_offset);
+static const u16 dib0090_defaults[] = {
+        25, 0x01,
+        0x0000,
+        0x99a0,
+        0x6008,
+        0x0000,
+        0x8acb,
+        0x0000,
+        0x0405,
+        0x0000,
+        0x0000,
+        0x0000,
+        0xb802,
+        0x0300,
+        0x2d12,
+        0xbac0,
+        0x7c00,
+        0xdbb9,
+        0x0954,
+        0x0743,
+        0x8000,
+        0x0001,
+        0x0040,
+        0x0100,
+        0x0000,
+        0xe910,
+        0x149e,
+        1, 0x1c,
+        0xff2d,
+        1, 0x39,
+        0x0000,
+        1, 0x1b,
+        EN_IQADC | EN_BB | EN_BIAS | EN_DIGCLK | EN_PLL | EN_CRYSTAL,
+        2, 0x1e,
+        0x07FF,
+        0x0007,
+        1, 0x24,
+        EN_UHF | EN_CRYSTAL,
+        2, 0x3c,
+        0x3ff,
+        0x111,
+        0
+};
+static int dib0090_reset(struct dvb_frontend *fe)
+{
+        struct dib0090_state *state = fe->tuner_priv;
+        u16 l, r, *n;
+        dib0090_reset_digital(fe, state->config);
+        state->revision = dib0090_identify(fe);
+        /* Revision definition */
+        if (state->revision == 0xff)
+                return -EINVAL;
+#ifdef EFUSE
+        else if ((state->revision & 0x1f) >= 3) /* Update the efuse : Only available for KROSUS > P1C */
+                dib0090_set_EFUSE(state);
+#endif
+#ifdef CONFIG_TUNER_DIB0090_P1B_SUPPORT
+        if (!(state->revision & 0x1))   /* it is P1B - reset is already done */
+                return 0;
+#endif
+        /* Upload the default values */
+        n = (u16 *) dib0090_defaults;
+        l = pgm_read_word(n++);
+        while (l) {
+                r = pgm_read_word(n++);
+                do {
+                        /* DEBUG_TUNER */
+                        /* dprintk("%d, %d, %d", l, r, pgm_read_word(n)); */
+                        dib0090_write_reg(state, r, pgm_read_word(n++));
+                        r++;
+                } while (--l);
+                l = pgm_read_word(n++);
+        }
+        /* Congigure in function of the crystal */
+        if (state->config->io.clock_khz >= 24000)
+                l = 1;
+        else
+                l = 2;
+        dib0090_write_reg(state, 0x14, l);
+        dprintk("Pll lock : %d", (dib0090_read_reg(state, 0x1a) >> 11) & 0x1);
+        state->reset = 3;       /* enable iq-offset-calibration and wbd-calibration when tuning next time */
+        return 0;
+}
+#define steps(u) (((u) > 15) ? ((u)-16) : (u))
+#define INTERN_WAIT 10
+static int dib0090_get_offset(struct dib0090_state *state, enum frontend_tune_state *tune_state)
+{
+        int ret = INTERN_WAIT * 10;
+        switch (*tune_state) {
+        case CT_TUNER_STEP_2:
+                /* Turns to positive */
+                dib0090_write_reg(state, 0x1f, 0x7);
+                *tune_state = CT_TUNER_STEP_3;
+                break;
+        case CT_TUNER_STEP_3:
+                state->adc_diff = dib0090_read_reg(state, 0x1d);
+                /* Turns to negative */
+                dib0090_write_reg(state, 0x1f, 0x4);
+                *tune_state = CT_TUNER_STEP_4;
+                break;
+        case CT_TUNER_STEP_4:
+                state->adc_diff -= dib0090_read_reg(state, 0x1d);
+                *tune_state = CT_TUNER_STEP_5;
+                ret = 0;
+                break;
+        default:
+                break;
+        }
+        return ret;
+}
+struct dc_calibration {
+        uint8_t addr;
+        uint8_t offset;
+        uint8_t pga:1;
+        uint16_t bb1;
+        uint8_t i:1;
+};
+static const struct dc_calibration dc_table[] = {
+        /* Step1 BB gain1= 26 with boost 1, gain 2 = 0 */
+        {0x06, 5, 1, (1 << 13) | (0 << 8) | (26 << 3), 1},
+        {0x07, 11, 1, (1 << 13) | (0 << 8) | (26 << 3), 0},
+        /* Step 2 BB gain 1 = 26 with boost = 1 & gain 2 = 29 */
+        {0x06, 0, 0, (1 << 13) | (29 << 8) | (26 << 3), 1},
+        {0x06, 10, 0, (1 << 13) | (29 << 8) | (26 << 3), 0},
+        {0},
+};
+static void dib0090_set_trim(struct dib0090_state *state)
+{
+        u16 *val;
+        if (state->dc->addr == 0x07)
+                val = &state->bb7;
+        else
+                val = &state->bb6;
+        *val &= ~(0x1f << state->dc->offset);
+        *val |= state->step << state->dc->offset;
+        dib0090_write_reg(state, state->dc->addr, *val);
+}
+static int dib0090_dc_offset_calibration(struct dib0090_state *state, enum frontend_tune_state *tune_state)
+{
+        int ret = 0;
+        switch (*tune_state) {
+        case CT_TUNER_START:
+                /* init */
+                dprintk("Internal DC calibration");
+                /* the LNA is off */
+                dib0090_write_reg(state, 0x24, 0x02ed);
+                /* force vcm2 = 0.8V */
+                state->bb6 = 0;
+                state->bb7 = 0x040d;
+                state->dc = dc_table;
+                *tune_state = CT_TUNER_STEP_0;
+                /* fall through */
+        case CT_TUNER_STEP_0:
+                dib0090_write_reg(state, 0x01, state->dc->bb1);
+                dib0090_write_reg(state, 0x07, state->bb7 | (state->dc->i << 7));
+                state->step = 0;
+                state->min_adc_diff = 1023;
+                *tune_state = CT_TUNER_STEP_1;
+                ret = 50;
+                break;
+        case CT_TUNER_STEP_1:
+                dib0090_set_trim(state);
+                *tune_state = CT_TUNER_STEP_2;
+                break;
+        case CT_TUNER_STEP_2:
+        case CT_TUNER_STEP_3:
+        case CT_TUNER_STEP_4:
+                ret = dib0090_get_offset(state, tune_state);
+                break;
+        case CT_TUNER_STEP_5:   /* found an offset */
+                dprintk("FE%d: IQC read=%d, current=%x", state->fe->id, (u32) state->adc_diff, state->step);
+                /* first turn for this frequency */
+                if (state->step == 0) {
+                        if (state->dc->pga && state->adc_diff < 0)
+                                state->step = 0x10;
+                        if (state->dc->pga == 0 && state->adc_diff > 0)
+                                state->step = 0x10;
+                }
+                state->adc_diff = ABS(state->adc_diff);
+                if (state->adc_diff < state->min_adc_diff && steps(state->step) < 15) { /* stop search when the delta to 0 is increasing */
+                        state->step++;
+                        state->min_adc_diff = state->adc_diff;
+                        *tune_state = CT_TUNER_STEP_1;
+                } else {
+                        /* the minimum was what we have seen in the step before */
+                        state->step--;
+                        dib0090_set_trim(state);
+                        dprintk("FE%d: BB Offset Cal, BBreg=%hd,Offset=%hd,Value Set=%hd", state->fe->id, state->dc->addr, state->adc_diff,
+                                state->step);
+                        state->dc++;
+                        if (state->dc->addr == 0)       /* done */
+                                *tune_state = CT_TUNER_STEP_6;
+                        else
+                                *tune_state = CT_TUNER_STEP_0;
+                }
+                break;
+        case CT_TUNER_STEP_6:
+                dib0090_write_reg(state, 0x07, state->bb7 & ~0x0008);
+                dib0090_write_reg(state, 0x1f, 0x7);
+                *tune_state = CT_TUNER_START;   /* reset done -> real tuning can now begin */
+                state->reset &= ~0x1;
+        default:
+                break;
+        }
+        return ret;
+}
+static int dib0090_wbd_calibration(struct dib0090_state *state, enum frontend_tune_state *tune_state)
+{
+        switch (*tune_state) {
+        case CT_TUNER_START:
+                /* WBD-mode=log, Bias=2, Gain=6, Testmode=1, en=1, WBDMUX=1 */
+                dib0090_write_reg(state, 0x10, 0xdb09 | (1 << 10));
+                dib0090_write_reg(state, 0x24, EN_UHF & 0x0fff);
+                *tune_state = CT_TUNER_STEP_0;
+                return 90;      /* wait for the WBDMUX to switch and for the ADC to sample */
+        case CT_TUNER_STEP_0:
+                state->wbd_offset = dib0090_read_reg(state, 0x1d);
+                dprintk("WBD calibration offset = %d", state->wbd_offset);
+                *tune_state = CT_TUNER_START;   /* reset done -> real tuning can now begin */
+                state->reset &= ~0x2;
+                break;
+        default:
+                break;
+        }
+        return 0;
+}
+static void dib0090_set_bandwidth(struct dib0090_state *state)
+{
+        u16 tmp;
+        if (state->fe->dtv_property_cache.bandwidth_hz / 1000 <= 5000)
+                tmp = (3 << 14);
+        else if (state->fe->dtv_property_cache.bandwidth_hz / 1000 <= 6000)
+                tmp = (2 << 14);
+        else if (state->fe->dtv_property_cache.bandwidth_hz / 1000 <= 7000)
+                tmp = (1 << 14);
+        else
+                tmp = (0 << 14);
+        state->bb_1_def &= 0x3fff;
+        state->bb_1_def |= tmp;
+        dib0090_write_reg(state, 0x01, state->bb_1_def);        /* be sure that we have the right bb-filter */
+}
+static const struct dib0090_pll dib0090_pll_table[] = {
+#ifdef CONFIG_BAND_CBAND
+        {56000, 0, 9, 48, 6},
+        {70000, 1, 9, 48, 6},
+        {87000, 0, 8, 32, 4},
+        {105000, 1, 8, 32, 4},
+        {115000, 0, 7, 24, 6},
+        {140000, 1, 7, 24, 6},
+        {170000, 0, 6, 16, 4},
+#endif
+#ifdef CONFIG_BAND_VHF
+        {200000, 1, 6, 16, 4},
+        {230000, 0, 5, 12, 6},
+        {280000, 1, 5, 12, 6},
+        {340000, 0, 4, 8, 4},
+        {380000, 1, 4, 8, 4},
+        {450000, 0, 3, 6, 6},
+#endif
+#ifdef CONFIG_BAND_UHF
+        {580000, 1, 3, 6, 6},
+        {700000, 0, 2, 4, 4},
+        {860000, 1, 2, 4, 4},
+#endif
+#ifdef CONFIG_BAND_LBAND
+        {1800000, 1, 0, 2, 4},
+#endif
+#ifdef CONFIG_BAND_SBAND
+        {2900000, 0, 14, 1, 4},
+#endif
+};
+static const struct dib0090_tuning dib0090_tuning_table_fm_vhf_on_cband[] = {
+#ifdef CONFIG_BAND_CBAND
+        {184000, 4, 1, 15, 0x280, 0x2912, 0xb94e, EN_CAB},
+        {227000, 4, 3, 15, 0x280, 0x2912, 0xb94e, EN_CAB},
+        {380000, 4, 7, 15, 0x280, 0x2912, 0xb94e, EN_CAB},
+#endif
+#ifdef CONFIG_BAND_UHF
+        {520000, 2, 0, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {550000, 2, 2, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {650000, 2, 3, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {750000, 2, 5, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {850000, 2, 6, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {900000, 2, 7, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+#endif
+#ifdef CONFIG_BAND_LBAND
+        {1500000, 4, 0, 20, 0x300, 0x1912, 0x82c9, EN_LBD},
+        {1600000, 4, 1, 20, 0x300, 0x1912, 0x82c9, EN_LBD},
+        {1800000, 4, 3, 20, 0x300, 0x1912, 0x82c9, EN_LBD},
+#endif
+#ifdef CONFIG_BAND_SBAND
+        {2300000, 1, 4, 20, 0x300, 0x2d2A, 0x82c7, EN_SBD},
+        {2900000, 1, 7, 20, 0x280, 0x2deb, 0x8347, EN_SBD},
+#endif
+};
+static const struct dib0090_tuning dib0090_tuning_table[] = {
+#ifdef CONFIG_BAND_CBAND
+        {170000, 4, 1, 15, 0x280, 0x2912, 0xb94e, EN_CAB},
+#endif
+#ifdef CONFIG_BAND_VHF
+        {184000, 1, 1, 15, 0x300, 0x4d12, 0xb94e, EN_VHF},
+        {227000, 1, 3, 15, 0x300, 0x4d12, 0xb94e, EN_VHF},
+        {380000, 1, 7, 15, 0x300, 0x4d12, 0xb94e, EN_VHF},
+#endif
+#ifdef CONFIG_BAND_UHF
+        {520000, 2, 0, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {550000, 2, 2, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {650000, 2, 3, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {750000, 2, 5, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {850000, 2, 6, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {900000, 2, 7, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+#endif
+#ifdef CONFIG_BAND_LBAND
+        {1500000, 4, 0, 20, 0x300, 0x1912, 0x82c9, EN_LBD},
+        {1600000, 4, 1, 20, 0x300, 0x1912, 0x82c9, EN_LBD},
+        {1800000, 4, 3, 20, 0x300, 0x1912, 0x82c9, EN_LBD},
+#endif
+#ifdef CONFIG_BAND_SBAND
+        {2300000, 1, 4, 20, 0x300, 0x2d2A, 0x82c7, EN_SBD},
+        {2900000, 1, 7, 20, 0x280, 0x2deb, 0x8347, EN_SBD},
+#endif
+};
+#define WBD     0x781           /* 1 1 1 1 0000 0 0 1 */
+static int dib0090_tune(struct dvb_frontend *fe)
+{
+        struct dib0090_state *state = fe->tuner_priv;
+        const struct dib0090_tuning *tune = state->current_tune_table_index;
+        const struct dib0090_pll *pll = state->current_pll_table_index;
+        enum frontend_tune_state *tune_state = &state->tune_state;
+        u32 rf;
+        u16 lo4 = 0xe900, lo5, lo6, Den;
+        u32 FBDiv, Rest, FREF, VCOF_kHz = 0;
+        u16 tmp, adc;
+        int8_t step_sign;
+        int ret = 10;           /* 1ms is the default delay most of the time */
+        u8 c, i;
+        state->current_band = (u8) BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000);
+        rf = fe->dtv_property_cache.frequency / 1000 + (state->current_band ==
+                                                        BAND_UHF ? state->config->freq_offset_khz_uhf : state->config->freq_offset_khz_vhf);
+        /* in any case we first need to do a reset if needed */
+        if (state->reset & 0x1)
+                return dib0090_dc_offset_calibration(state, tune_state);
+        else if (state->reset & 0x2)
+                return dib0090_wbd_calibration(state, tune_state);
+    /************************* VCO ***************************/
+        /* Default values for FG                                 */
+        /* from these are needed :                               */
+        /* Cp,HFdiv,VCOband,SD,Num,Den,FB and REFDiv             */
+#ifdef CONFIG_SYS_ISDBT
+        if (state->fe->dtv_property_cache.delivery_system == SYS_ISDBT && state->fe->dtv_property_cache.isdbt_sb_mode == 1)
+                rf += 850;
+#endif
+        if (state->current_rf != rf) {
+                state->tuner_is_tuned = 0;
+                tune = dib0090_tuning_table;
+                tmp = (state->revision >> 5) & 0x7;
+                if (tmp == 0x4 || tmp == 0x7) {
+                        /* CBAND tuner version for VHF */
+                        if (state->current_band == BAND_FM || state->current_band == BAND_VHF) {
+                                /* Force CBAND */
+                                state->current_band = BAND_CBAND;
+                                tune = dib0090_tuning_table_fm_vhf_on_cband;
+                        }
+                }
+                pll = dib0090_pll_table;
+                /* Look for the interval */
+                while (rf > tune->max_freq)
+                        tune++;
+                while (rf > pll->max_freq)
+                        pll++;
+                state->current_tune_table_index = tune;
+                state->current_pll_table_index = pll;
+        }
+        if (*tune_state == CT_TUNER_START) {
+                if (state->tuner_is_tuned == 0)
+                        state->current_rf = 0;
+                if (state->current_rf != rf) {
+                        dib0090_write_reg(state, 0x0b, 0xb800 | (tune->switch_trim));
+                        /* external loop filter, otherwise:
+                         * lo5 = (0 << 15) | (0 << 12) | (0 << 11) | (3 << 9) | (4 << 6) | (3 << 4) | 4;
+                         * lo6 = 0x0e34 */
+                        if (pll->vco_band)
+                                lo5 = 0x049e;
+                        else if (state->config->analog_output)
+                                lo5 = 0x041d;
+                        else
+                                lo5 = 0x041c;
+                        lo5 |= (pll->hfdiv_code << 11) | (pll->vco_band << 7);  /* bit 15 is the split to the slave, we do not do it here */
+                        if (!state->config->io.pll_int_loop_filt)
+                                lo6 = 0xff28;
+                        else
+                                lo6 = (state->config->io.pll_int_loop_filt << 3);
+                        VCOF_kHz = (pll->hfdiv * rf) * 2;
+                        FREF = state->config->io.clock_khz;
+                        FBDiv = (VCOF_kHz / pll->topresc / FREF);
+                        Rest = (VCOF_kHz / pll->topresc) - FBDiv * FREF;
+                        if (Rest < LPF)
+                                Rest = 0;
+                        else if (Rest < 2 * LPF)
+                                Rest = 2 * LPF;
+                        else if (Rest > (FREF - LPF)) {
+                                Rest = 0;
+                                FBDiv += 1;
+                        } else if (Rest > (FREF - 2 * LPF))
+                                Rest = FREF - 2 * LPF;
+                        Rest = (Rest * 6528) / (FREF / 10);
+                        Den = 1;
+                        dprintk(" *****  ******* Rest value = %d", Rest);
+                        if (Rest > 0) {
+                                if (state->config->analog_output)
+                                        lo6 |= (1 << 2) | 2;
+                                else
+                                        lo6 |= (1 << 2) | 1;
+                                Den = 255;
+                        }
+#ifdef CONFIG_BAND_SBAND
+                        if (state->current_band == BAND_SBAND)
+                                lo6 &= 0xfffb;
+#endif
+                        dib0090_write_reg(state, 0x15, (u16) FBDiv);
+                        dib0090_write_reg(state, 0x16, (Den << 8) | 1);
+                        dib0090_write_reg(state, 0x17, (u16) Rest);
+                        dib0090_write_reg(state, 0x19, lo5);
+                        dib0090_write_reg(state, 0x1c, lo6);
+                        lo6 = tune->tuner_enable;
+                        if (state->config->analog_output)
+                                lo6 = (lo6 & 0xff9f) | 0x2;
+                        dib0090_write_reg(state, 0x24, lo6 | EN_LO
+#ifdef CONFIG_DIB0090_USE_PWM_AGC
+                                          | state->config->use_pwm_agc * EN_CRYSTAL
+#endif
+                            );
+                        state->current_rf = rf;
+                        /* prepare a complete captrim */
+                        state->step = state->captrim = state->fcaptrim = 64;
+                } else {        /* we are already tuned to this frequency - the configuration is correct  */
+                        /* do a minimal captrim even if the frequency has not changed */
+                        state->step = 4;
+                        state->captrim = state->fcaptrim = dib0090_read_reg(state, 0x18) & 0x7f;
+                }
+                state->adc_diff = 3000;
+                dib0090_write_reg(state, 0x10, 0x2B1);
+                dib0090_write_reg(state, 0x1e, 0x0032);
+                ret = 20;
+                *tune_state = CT_TUNER_STEP_1;
+        } else if (*tune_state == CT_TUNER_STEP_0) {
+                /* nothing */
+        } else if (*tune_state == CT_TUNER_STEP_1) {
+                state->step /= 2;
+                dib0090_write_reg(state, 0x18, lo4 | state->captrim);
+                *tune_state = CT_TUNER_STEP_2;
+        } else if (*tune_state == CT_TUNER_STEP_2) {
+                adc = dib0090_read_reg(state, 0x1d);
+                dprintk("FE %d CAPTRIM=%d; ADC = %d (ADC) & %dmV", (u32) fe->id, (u32) state->captrim, (u32) adc,
+                        (u32) (adc) * (u32) 1800 / (u32) 1024);
+                if (adc >= 400) {
+                        adc -= 400;
+                        step_sign = -1;
+                } else {
+                        adc = 400 - adc;
+                        step_sign = 1;
+                }
+                if (adc < state->adc_diff) {
+                        dprintk("FE %d CAPTRIM=%d is closer to target (%d/%d)", (u32) fe->id, (u32) state->captrim, (u32) adc, (u32) state->adc_diff);
+                        state->adc_diff = adc;
+                        state->fcaptrim = state->captrim;
+                }
+                state->captrim += step_sign * state->step;
+                if (state->step >= 1)
+                        *tune_state = CT_TUNER_STEP_1;
+                else
+                        *tune_state = CT_TUNER_STEP_3;
+                ret = 15;
+        } else if (*tune_state == CT_TUNER_STEP_3) {
+                /*write the final cptrim config */
+                dib0090_write_reg(state, 0x18, lo4 | state->fcaptrim);
+#ifdef CONFIG_TUNER_DIB0090_CAPTRIM_MEMORY
+                state->memory[state->memory_index].cap = state->fcaptrim;
+#endif
+                *tune_state = CT_TUNER_STEP_4;
+        } else if (*tune_state == CT_TUNER_STEP_4) {
+                dib0090_write_reg(state, 0x1e, 0x07ff);
+                dprintk("FE %d Final Captrim: %d", (u32) fe->id, (u32) state->fcaptrim);
+                dprintk("FE %d HFDIV code: %d", (u32) fe->id, (u32) pll->hfdiv_code);
+                dprintk("FE %d VCO = %d", (u32) fe->id, (u32) pll->vco_band);
+                dprintk("FE %d VCOF in kHz: %d ((%d*%d) << 1))", (u32) fe->id, (u32) ((pll->hfdiv * rf) * 2), (u32) pll->hfdiv, (u32) rf);
+                dprintk("FE %d REFDIV: %d, FREF: %d", (u32) fe->id, (u32) 1, (u32) state->config->io.clock_khz);
+                dprintk("FE %d FBDIV: %d, Rest: %d", (u32) fe->id, (u32) dib0090_read_reg(state, 0x15), (u32) dib0090_read_reg(state, 0x17));
+                dprintk("FE %d Num: %d, Den: %d, SD: %d", (u32) fe->id, (u32) dib0090_read_reg(state, 0x17),
+                        (u32) (dib0090_read_reg(state, 0x16) >> 8), (u32) dib0090_read_reg(state, 0x1c) & 0x3);
+                c = 4;
+                i = 3;
+#if defined(CONFIG_BAND_LBAND) || defined(CONFIG_BAND_SBAND)
+                if ((state->current_band == BAND_LBAND) || (state->current_band == BAND_SBAND)) {
+                        c = 2;
+                        i = 2;
+                }
+#endif
+                dib0090_write_reg(state, 0x10, (c << 13) | (i << 11) | (WBD
+#ifdef CONFIG_DIB0090_USE_PWM_AGC
+                                                                        | (state->config->use_pwm_agc << 1)
+#endif
+                                  ));
+                dib0090_write_reg(state, 0x09, (tune->lna_tune << 5) | (tune->lna_bias << 0));
+                dib0090_write_reg(state, 0x0c, tune->v2i);
+                dib0090_write_reg(state, 0x0d, tune->mix);
+                dib0090_write_reg(state, 0x0e, tune->load);
+                *tune_state = CT_TUNER_STEP_5;
+        } else if (*tune_state == CT_TUNER_STEP_5) {
+                /* initialize the lt gain register */
+                state->rf_lt_def = 0x7c00;
+                dib0090_write_reg(state, 0x0f, state->rf_lt_def);
+                dib0090_set_bandwidth(state);
+                state->tuner_is_tuned = 1;
+                *tune_state = CT_TUNER_STOP;
+        } else
+                ret = FE_CALLBACK_TIME_NEVER;
+        return ret;
+}
+static int dib0090_release(struct dvb_frontend *fe)
+{
+        kfree(fe->tuner_priv);
+        fe->tuner_priv = NULL;
+        return 0;
+}
+enum frontend_tune_state dib0090_get_tune_state(struct dvb_frontend *fe)
+{
+        struct dib0090_state *state = fe->tuner_priv;
+        return state->tune_state;
+}
+EXPORT_SYMBOL(dib0090_get_tune_state);
+int dib0090_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state)
+{
+        struct dib0090_state *state = fe->tuner_priv;
+        state->tune_state = tune_state;
+        return 0;
+}
+EXPORT_SYMBOL(dib0090_set_tune_state);
+static int dib0090_get_frequency(struct dvb_frontend *fe, u32 * frequency)
+{
+        struct dib0090_state *state = fe->tuner_priv;
+        *frequency = 1000 * state->current_rf;
+        return 0;
+}
+static int dib0090_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
+{
+        struct dib0090_state *state = fe->tuner_priv;
+        uint32_t ret;
+        state->tune_state = CT_TUNER_START;
+        do {
+                ret = dib0090_tune(fe);
+                if (ret != FE_CALLBACK_TIME_NEVER)
+                        msleep(ret / 10);
+                else
+                        break;
+        } while (state->tune_state != CT_TUNER_STOP);
+        return 0;
+}
+static const struct dvb_tuner_ops dib0090_ops = {
+        .info = {
+                 .name = "DiBcom DiB0090",
+                 .frequency_min = 45000000,
+                 .frequency_max = 860000000,
+                 .frequency_step = 1000,
+                 },
+        .release = dib0090_release,
+        .init = dib0090_wakeup,
+        .sleep = dib0090_sleep,
+        .set_params = dib0090_set_params,
+        .get_frequency = dib0090_get_frequency,
+};
+struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, const struct dib0090_config *config)
+{
+        struct dib0090_state *st = kzalloc(sizeof(struct dib0090_state), GFP_KERNEL);
+        if (st == NULL)
+                return NULL;
+        st->config = config;
+        st->i2c = i2c;
+        st->fe = fe;
+        fe->tuner_priv = st;
+        if (dib0090_reset(fe) != 0)
+                goto free_mem;
+        printk(KERN_INFO "DiB0090: successfully identified\n");
+        memcpy(&fe->ops.tuner_ops, &dib0090_ops, sizeof(struct dvb_tuner_ops));
+        return fe;
+ free_mem:
+        kfree(st);
+        fe->tuner_priv = NULL;
+        return NULL;
+}
+EXPORT_SYMBOL(dib0090_register);
+MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");
+MODULE_AUTHOR("Olivier Grenie <olivier.grenie@dibcom.fr>");
+MODULE_DESCRIPTION("Driver for the DiBcom 0090 base-band RF Tuner");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/dib0090.h b/drivers/media/dvb/frontends/dib0090.h
new file mode 100644
index 000000000000..aa7711e88776
--- /dev/null
+++ b/drivers/media/dvb/frontends/dib0090.h
@@ -0,0 +1,108 @@
+/*
+ * Linux-DVB Driver for DiBcom's DiB0090 base-band RF Tuner.
+ *
+ * Copyright (C) 2005-7 DiBcom (http://www.dibcom.fr/)
+ *
+ * This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License as
+ *      published by the Free Software Foundation, version 2.
+ */
+#ifndef DIB0090_H
+#define DIB0090_H
+struct dvb_frontend;
+struct i2c_adapter;
+#define DEFAULT_DIB0090_I2C_ADDRESS 0x60
+struct dib0090_io_config {
+        u32 clock_khz;
+        u8 pll_bypass:1;
+        u8 pll_range:1;
+        u8 pll_prediv:6;
+        u8 pll_loopdiv:6;
+        u8 adc_clock_ratio;     /* valid is 8, 7 ,6 */
+        u16 pll_int_loop_filt;
+};
+struct dib0090_config {
+        struct dib0090_io_config io;
+        int (*reset) (struct dvb_frontend *, int);
+        int (*sleep) (struct dvb_frontend *, int);
+        /*  offset in kHz */
+        int freq_offset_khz_uhf;
+        int freq_offset_khz_vhf;
+        int (*get_adc_power) (struct dvb_frontend *);
+        u8 clkouttobamse:1;     /* activate or deactivate clock output */
+        u8 analog_output;
+        u8 i2c_address;
+        /* add drives and other things if necessary */
+        u16 wbd_vhf_offset;
+        u16 wbd_cband_offset;
+        u8 use_pwm_agc;
+        u8 clkoutdrive;
+};
+#if defined(CONFIG_DVB_TUNER_DIB0090) || (defined(CONFIG_DVB_TUNER_DIB0090_MODULE) && defined(MODULE))
+extern struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, const struct dib0090_config *config);
+extern void dib0090_dcc_freq(struct dvb_frontend *fe, u8 fast);
+extern void dib0090_pwm_gain_reset(struct dvb_frontend *fe);
+extern u16 dib0090_get_wbd_offset(struct dvb_frontend *tuner);
+extern int dib0090_gain_control(struct dvb_frontend *fe);
+extern enum frontend_tune_state dib0090_get_tune_state(struct dvb_frontend *fe);
+extern int dib0090_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state);
+extern void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u16 * bb, u16 * rf_gain_limit, u16 * rflt);
+#else
+static inline struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0090_config *config)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+static inline void dib0090_dcc_freq(struct dvb_frontend *fe, u8 fast)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+}
+static inline void dib0090_pwm_gain_reset(struct dvb_frontend *fe)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+}
+static inline u16 dib0090_get_wbd_offset(struct dvb_frontend *tuner)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return 0;
+}
+static inline int dib0090_gain_control(struct dvb_frontend *fe)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+static inline enum frontend_tune_state dib0090_get_tune_state(struct dvb_frontend *fe)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return CT_DONE;
+}
+static inline int dib0090_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+static inline void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u16 * bb, u16 * rf_gain_limit, u16 * rflt)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+}
+#endif
+#endif
diff --git a/drivers/media/dvb/frontends/dib8000.c b/drivers/media/dvb/frontends/dib8000.c
index 898400d331a3..6f6fa29d9ea4 100644
--- a/drivers/media/dvb/frontends/dib8000.c
+++ b/drivers/media/dvb/frontends/dib8000.c
@@ -28,18 +28,6 @@ MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
 #define dprintk(args...) do { if (debug) { printk(KERN_DEBUG "DiB8000: "); printk(args); printk("\n"); } } while (0)
-enum frontend_tune_state {
-        CT_AGC_START = 20,
-        CT_AGC_STEP_0,
-        CT_AGC_STEP_1,
-        CT_AGC_STEP_2,
-        CT_AGC_STEP_3,
-        CT_AGC_STEP_4,
-        CT_AGC_STOP,
-        CT_DEMOD_START = 30,
-};
 #define FE_STATUS_TUNE_FAILED 0
 struct i2c_device {
@@ -133,104 +121,104 @@ static int dib8000_write_word(struct dib8000_state *state, u16 reg, u16 val)
        return dib8000_i2c_write16(&state->i2c, reg, val);
 }
-const int16_t coeff_2k_sb_1seg_dqpsk[8] = {
+static const int16_t coeff_2k_sb_1seg_dqpsk[8] = {
        (769 << 5) | 0x0a, (745 << 5) | 0x03, (595 << 5) | 0x0d, (769 << 5) | 0x0a, (920 << 5) | 0x09, (784 << 5) | 0x02, (519 << 5) | 0x0c,
            (920 << 5) | 0x09
 };
-const int16_t coeff_2k_sb_1seg[8] = {
+static const int16_t coeff_2k_sb_1seg[8] = {
        (692 << 5) | 0x0b, (683 << 5) | 0x01, (519 << 5) | 0x09, (692 << 5) | 0x0b, 0 | 0x1f, 0 | 0x1f, 0 | 0x1f, 0 | 0x1f
 };
-const int16_t coeff_2k_sb_3seg_0dqpsk_1dqpsk[8] = {
+static const int16_t coeff_2k_sb_3seg_0dqpsk_1dqpsk[8] = {
        (832 << 5) | 0x10, (912 << 5) | 0x05, (900 << 5) | 0x12, (832 << 5) | 0x10, (-931 << 5) | 0x0f, (912 << 5) | 0x04, (807 << 5) | 0x11,
            (-931 << 5) | 0x0f
 };
-const int16_t coeff_2k_sb_3seg_0dqpsk[8] = {
+static const int16_t coeff_2k_sb_3seg_0dqpsk[8] = {
        (622 << 5) | 0x0c, (941 << 5) | 0x04, (796 << 5) | 0x10, (622 << 5) | 0x0c, (982 << 5) | 0x0c, (519 << 5) | 0x02, (572 << 5) | 0x0e,
            (982 << 5) | 0x0c
 };
-const int16_t coeff_2k_sb_3seg_1dqpsk[8] = {
+static const int16_t coeff_2k_sb_3seg_1dqpsk[8] = {
        (699 << 5) | 0x14, (607 << 5) | 0x04, (944 << 5) | 0x13, (699 << 5) | 0x14, (-720 << 5) | 0x0d, (640 << 5) | 0x03, (866 << 5) | 0x12,
            (-720 << 5) | 0x0d
 };
-const int16_t coeff_2k_sb_3seg[8] = {
+static const int16_t coeff_2k_sb_3seg[8] = {
        (664 << 5) | 0x0c, (925 << 5) | 0x03, (937 << 5) | 0x10, (664 << 5) | 0x0c, (-610 << 5) | 0x0a, (697 << 5) | 0x01, (836 << 5) | 0x0e,
            (-610 << 5) | 0x0a
 };
-const int16_t coeff_4k_sb_1seg_dqpsk[8] = {
+static const int16_t coeff_4k_sb_1seg_dqpsk[8] = {
        (-955 << 5) | 0x0e, (687 << 5) | 0x04, (818 << 5) | 0x10, (-955 << 5) | 0x0e, (-922 << 5) | 0x0d, (750 << 5) | 0x03, (665 << 5) | 0x0f,
            (-922 << 5) | 0x0d
 };
-const int16_t coeff_4k_sb_1seg[8] = {
+static const int16_t coeff_4k_sb_1seg[8] = {
        (638 << 5) | 0x0d, (683 << 5) | 0x02, (638 << 5) | 0x0d, (638 << 5) | 0x0d, (-655 << 5) | 0x0a, (517 << 5) | 0x00, (698 << 5) | 0x0d,
            (-655 << 5) | 0x0a
 };
-const int16_t coeff_4k_sb_3seg_0dqpsk_1dqpsk[8] = {
+static const int16_t coeff_4k_sb_3seg_0dqpsk_1dqpsk[8] = {
        (-707 << 5) | 0x14, (910 << 5) | 0x06, (889 << 5) | 0x16, (-707 << 5) | 0x14, (-958 << 5) | 0x13, (993 << 5) | 0x05, (523 << 5) | 0x14,
            (-958 << 5) | 0x13
 };
-const int16_t coeff_4k_sb_3seg_0dqpsk[8] = {
+static const int16_t coeff_4k_sb_3seg_0dqpsk[8] = {
        (-723 << 5) | 0x13, (910 << 5) | 0x05, (777 << 5) | 0x14, (-723 << 5) | 0x13, (-568 << 5) | 0x0f, (547 << 5) | 0x03, (696 << 5) | 0x12,
            (-568 << 5) | 0x0f
 };
-const int16_t coeff_4k_sb_3seg_1dqpsk[8] = {
+static const int16_t coeff_4k_sb_3seg_1dqpsk[8] = {
        (-940 << 5) | 0x15, (607 << 5) | 0x05, (915 << 5) | 0x16, (-940 << 5) | 0x15, (-848 << 5) | 0x13, (683 << 5) | 0x04, (543 << 5) | 0x14,
            (-848 << 5) | 0x13
 };
-const int16_t coeff_4k_sb_3seg[8] = {
+static const int16_t coeff_4k_sb_3seg[8] = {
        (612 << 5) | 0x12, (910 << 5) | 0x04, (864 << 5) | 0x14, (612 << 5) | 0x12, (-869 << 5) | 0x13, (683 << 5) | 0x02, (869 << 5) | 0x12,
            (-869 << 5) | 0x13
 };
-const int16_t coeff_8k_sb_1seg_dqpsk[8] = {
+static const int16_t coeff_8k_sb_1seg_dqpsk[8] = {
        (-835 << 5) | 0x12, (684 << 5) | 0x05, (735 << 5) | 0x14, (-835 << 5) | 0x12, (-598 << 5) | 0x10, (781 << 5) | 0x04, (739 << 5) | 0x13,
            (-598 << 5) | 0x10
 };
-const int16_t coeff_8k_sb_1seg[8] = {
+static const int16_t coeff_8k_sb_1seg[8] = {
        (673 << 5) | 0x0f, (683 << 5) | 0x03, (808 << 5) | 0x12, (673 << 5) | 0x0f, (585 << 5) | 0x0f, (512 << 5) | 0x01, (780 << 5) | 0x0f,
            (585 << 5) | 0x0f
 };
-const int16_t coeff_8k_sb_3seg_0dqpsk_1dqpsk[8] = {
+static const int16_t coeff_8k_sb_3seg_0dqpsk_1dqpsk[8] = {
        (863 << 5) | 0x17, (930 << 5) | 0x07, (878 << 5) | 0x19, (863 << 5) | 0x17, (0 << 5) | 0x14, (521 << 5) | 0x05, (980 << 5) | 0x18,
            (0 << 5) | 0x14
 };
-const int16_t coeff_8k_sb_3seg_0dqpsk[8] = {
+static const int16_t coeff_8k_sb_3seg_0dqpsk[8] = {
        (-924 << 5) | 0x17, (910 << 5) | 0x06, (774 << 5) | 0x17, (-924 << 5) | 0x17, (-877 << 5) | 0x15, (565 << 5) | 0x04, (553 << 5) | 0x15,
            (-877 << 5) | 0x15
 };
-const int16_t coeff_8k_sb_3seg_1dqpsk[8] = {
+static const int16_t coeff_8k_sb_3seg_1dqpsk[8] = {
        (-921 << 5) | 0x19, (607 << 5) | 0x06, (881 << 5) | 0x19, (-921 << 5) | 0x19, (-921 << 5) | 0x14, (713 << 5) | 0x05, (1018 << 5) | 0x18,
            (-921 << 5) | 0x14
 };
-const int16_t coeff_8k_sb_3seg[8] = {
+static const int16_t coeff_8k_sb_3seg[8] = {
        (514 << 5) | 0x14, (910 << 5) | 0x05, (861 << 5) | 0x17, (514 << 5) | 0x14, (690 << 5) | 0x14, (683 << 5) | 0x03, (662 << 5) | 0x15,
            (690 << 5) | 0x14
 };
-const int16_t ana_fe_coeff_3seg[24] = {
+static const int16_t ana_fe_coeff_3seg[24] = {
        81, 80, 78, 74, 68, 61, 54, 45, 37, 28, 19, 11, 4, 1022, 1017, 1013, 1010, 1008, 1008, 1008, 1008, 1010, 1014, 1017
 };
-const int16_t ana_fe_coeff_1seg[24] = {
+static const int16_t ana_fe_coeff_1seg[24] = {
        249, 226, 164, 82, 5, 981, 970, 988, 1018, 20, 31, 26, 8, 1012, 1000, 1018, 1012, 8, 15, 14, 9, 3, 1017, 1003
 };
-const int16_t ana_fe_coeff_13seg[24] = {
+static const int16_t ana_fe_coeff_13seg[24] = {
        396, 305, 105, -51, -77, -12, 41, 31, -11, -30, -11, 14, 15, -2, -13, -7, 5, 8, 1, -6, -7, -3, 0, 1
 };
@@ -852,6 +840,14 @@ static int dib8000_set_agc_config(struct dib8000_state *state, u8 band)
        return 0;
 }
+void dib8000_pwm_agc_reset(struct dvb_frontend *fe)
+{
+        struct dib8000_state *state = fe->demodulator_priv;
+        dib8000_set_adc_state(state, DIBX000_ADC_ON);
+        dib8000_set_agc_config(state, (unsigned char)(BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000)));
+}
+EXPORT_SYMBOL(dib8000_pwm_agc_reset);
 static int dib8000_agc_soft_split(struct dib8000_state *state)
 {
        u16 agc, split_offset;
@@ -939,6 +935,32 @@ static int dib8000_agc_startup(struct dvb_frontend *fe)
 }
+static const int32_t lut_1000ln_mant[] =
+{
+        908, 7003, 7090, 7170, 7244, 7313, 7377, 7438, 7495, 7549, 7600
+};
+int32_t dib8000_get_adc_power(struct dvb_frontend *fe, uint8_t mode)
+{
+    struct dib8000_state *state = fe->demodulator_priv;
+    uint32_t ix = 0, tmp_val = 0, exp = 0, mant = 0;
+    int32_t val;
+    val = dib8000_read32(state, 384);
+    /* mode = 1 : ln_agcpower calc using mant-exp conversion and mantis look up table */
+    if (mode) {
+        tmp_val = val;
+        while (tmp_val >>= 1)
+                exp++;
+        mant = (val * 1000 / (1<<exp));
+        ix = (uint8_t)((mant-1000)/100); /* index of the LUT */
+        val = (lut_1000ln_mant[ix] + 693*(exp-20) - 6908); /* 1000 * ln(adcpower_real) ; 693 = 1000ln(2) ; 6908 = 1000*ln(1000) ; 20 comes from adc_real = adc_pow_int / 2**20 */
+        val = (val*256)/1000;
+    }
+    return val;
+}
+EXPORT_SYMBOL(dib8000_get_adc_power);
 static void dib8000_update_timf(struct dib8000_state *state)
 {
        u32 timf = state->timf = dib8000_read32(state, 435);
@@ -1401,10 +1423,9 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
                        }
                        break;
                }
-        }
-        if (state->fe.dtv_property_cache.isdbt_sb_mode == 1)
                for (i = 0; i < 8; i++)
                        dib8000_write_word(state, 343 + i, ncoeff[i]);
+        }
        // P_small_coef_ext_enable=ISDB-Tsb, P_small_narrow_band=ISDB-Tsb, P_small_last_seg=13, P_small_offset_num_car=5
        dib8000_write_word(state, 351,
@@ -1854,6 +1875,24 @@ static int dib8000_sleep(struct dvb_frontend *fe)
        }
 }
+enum frontend_tune_state dib8000_get_tune_state(struct dvb_frontend *fe)
+{
+        struct dib8000_state *state = fe->demodulator_priv;
+        return state->tune_state;
+}
+EXPORT_SYMBOL(dib8000_get_tune_state);
+int dib8000_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state)
+{
+        struct dib8000_state *state = fe->demodulator_priv;
+        state->tune_state = tune_state;
+        return 0;
+}
+EXPORT_SYMBOL(dib8000_set_tune_state);
 static int dib8000_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep)
 {
        struct dib8000_state *state = fe->demodulator_priv;
@@ -2043,29 +2082,31 @@ static int dib8000_read_status(struct dvb_frontend *fe, fe_status_t * stat)
        *stat = 0;
-        if ((lock >> 14) & 1)   // AGC
+        if ((lock >> 13) & 1)
                *stat |= FE_HAS_SIGNAL;
-        if ((lock >> 8) & 1)    // Equal
+        if ((lock >> 8) & 1) /* Equal */
                *stat |= FE_HAS_CARRIER;
-        if ((lock >> 3) & 1)    // TMCC_SYNC
+        if (((lock >> 1) & 0xf) == 0xf) /* TMCC_SYNC */
                *stat |= FE_HAS_SYNC;
-        if ((lock >> 5) & 7)    // FEC MPEG
+        if (((lock >> 12) & 1) && ((lock >> 5) & 7)) /* FEC MPEG */
                *stat |= FE_HAS_LOCK;
-        lock = dib8000_read_word(state, 554);   // Viterbi Layer A
+        if ((lock >> 12) & 1) {
-        if (lock & 0x01)
+                lock = dib8000_read_word(state, 554); /* Viterbi Layer A */
-                *stat |= FE_HAS_VITERBI;
+                if (lock & 0x01)
+                        *stat |= FE_HAS_VITERBI;
-        lock = dib8000_read_word(state, 555);   // Viterbi Layer B
+                lock = dib8000_read_word(state, 555); /* Viterbi Layer B */
-        if (lock & 0x01)
+                if (lock & 0x01)
-                *stat |= FE_HAS_VITERBI;
+                        *stat |= FE_HAS_VITERBI;
-        lock = dib8000_read_word(state, 556);   // Viterbi Layer C
+                lock = dib8000_read_word(state, 556); /* Viterbi Layer C */
-        if (lock & 0x01)
+                if (lock & 0x01)
-                *stat |= FE_HAS_VITERBI;
+                        *stat |= FE_HAS_VITERBI;
+        }
        return 0;
 }
diff --git a/drivers/media/dvb/frontends/dib8000.h b/drivers/media/dvb/frontends/dib8000.h
index 8c89482b738a..d99619ae983c 100644
--- a/drivers/media/dvb/frontends/dib8000.h
+++ b/drivers/media/dvb/frontends/dib8000.h
@@ -46,6 +46,10 @@ extern int dib8000_set_gpio(struct dvb_frontend *, u8 num, u8 dir, u8 val);
 extern int dib8000_set_wbd_ref(struct dvb_frontend *, u16 value);
 extern int dib8000_pid_filter_ctrl(struct dvb_frontend *, u8 onoff);
 extern int dib8000_pid_filter(struct dvb_frontend *, u8 id, u16 pid, u8 onoff);
+extern int dib8000_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state);
+extern enum frontend_tune_state dib8000_get_tune_state(struct dvb_frontend *fe);
+extern void dib8000_pwm_agc_reset(struct dvb_frontend *fe);
+extern s32 dib8000_get_adc_power(struct dvb_frontend *fe, u8 mode);
 #else
 static inline struct dvb_frontend *dib8000_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib8000_config *cfg)
 {
@@ -59,35 +63,53 @@ static inline struct i2c_adapter *dib8000_get_i2c_master(struct dvb_frontend *fe
        return NULL;
 }
-int dib8000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods, u8 default_addr, u8 first_addr)
+static inline int dib8000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods, u8 default_addr, u8 first_addr)
 {
        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
        return -ENODEV;
 }
-int dib8000_set_gpio(struct dvb_frontend *fe, u8 num, u8 dir, u8 val)
+static inline int dib8000_set_gpio(struct dvb_frontend *fe, u8 num, u8 dir, u8 val)
 {
        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
        return -ENODEV;
 }
-int dib8000_set_wbd_ref(struct dvb_frontend *fe, u16 value)
+static inline int dib8000_set_wbd_ref(struct dvb_frontend *fe, u16 value)
 {
        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
        return -ENODEV;
 }
-int dib8000_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff)
+static inline int dib8000_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff)
 {
        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
        return -ENODEV;
 }
-int dib8000_pid_filter(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff)
+static inline int dib8000_pid_filter(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff)
 {
        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
        return -ENODEV;
 }
+static inline int dib8000_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+static inline enum frontend_tune_state dib8000_get_tune_state(struct dvb_frontend *fe)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+    return CT_SHUTDOWN,
+}
+static inline void dib8000_pwm_agc_reset(struct dvb_frontend *fe)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+}
+static inline s32 dib8000_get_adc_power(struct dvb_frontend *fe, u8 mode)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+}
 #endif
 #endif
diff --git a/drivers/media/dvb/frontends/dibx000_common.c b/drivers/media/dvb/frontends/dibx000_common.c
index 4efca30d2127..e6f3d73db9d3 100644
--- a/drivers/media/dvb/frontends/dibx000_common.c
+++ b/drivers/media/dvb/frontends/dibx000_common.c
@@ -6,7 +6,7 @@ static int debug;
 module_param(debug, int, 0644);
 MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
-#define dprintk(args...) do { if (debug) { printk(KERN_DEBUG "DiBX000: "); printk(args); } } while (0)
+#define dprintk(args...) do { if (debug) { printk(KERN_DEBUG "DiBX000: "); printk(args); printk("\n"); } } while (0)
 static int dibx000_write_word(struct dibx000_i2c_master *mst, u16 reg, u16 val)
 {
@@ -25,7 +25,7 @@ static int dibx000_i2c_select_interface(struct dibx000_i2c_master *mst,
                                        enum dibx000_i2c_interface intf)
 {
        if (mst->device_rev > DIB3000MC && mst->selected_interface != intf) {
-                dprintk("selecting interface: %d\n", intf);
+                dprintk("selecting interface: %d", intf);
                mst->selected_interface = intf;
                return dibx000_write_word(mst, mst->base_reg + 4, intf);
        }
@@ -171,9 +171,18 @@ void dibx000_exit_i2c_master(struct dibx000_i2c_master *mst)
 {
        i2c_del_adapter(&mst->gated_tuner_i2c_adap);
 }
 EXPORT_SYMBOL(dibx000_exit_i2c_master);
+u32 systime()
+{
+    struct timespec t;
+    t = current_kernel_time();
+    return (t.tv_sec * 10000) + (t.tv_nsec / 100000);
+}
+EXPORT_SYMBOL(systime);
 MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");
 MODULE_DESCRIPTION("Common function the DiBcom demodulator family");
 MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/dibx000_common.h b/drivers/media/dvb/frontends/dibx000_common.h
index 5be10eca07c0..4f5d141a308d 100644
--- a/drivers/media/dvb/frontends/dibx000_common.h
+++ b/drivers/media/dvb/frontends/dibx000_common.h
@@ -36,13 +36,17 @@ extern struct i2c_adapter *dibx000_get_i2c_adapter(struct dibx000_i2c_master
 extern void dibx000_exit_i2c_master(struct dibx000_i2c_master *mst);
 extern void dibx000_reset_i2c_master(struct dibx000_i2c_master *mst);
+extern u32 systime(void);
 #define BAND_LBAND 0x01
 #define BAND_UHF   0x02
 #define BAND_VHF   0x04
 #define BAND_SBAND 0x08
-#define BAND_FM    0x10
+#define BAND_FM    0x10
+#define BAND_CBAND 0x20
-#define BAND_OF_FREQUENCY(freq_kHz) ( (freq_kHz) <= 115000 ? BAND_FM : \
+#define BAND_OF_FREQUENCY(freq_kHz) ((freq_kHz) <= 170000 ? BAND_CBAND : \
+                                                                        (freq_kHz) <= 115000 ? BAND_FM : \
                                                                        (freq_kHz) <= 250000 ? BAND_VHF : \
                                                                        (freq_kHz) <= 863000 ? BAND_UHF : \
                                                                        (freq_kHz) <= 2000000 ? BAND_LBAND : BAND_SBAND )
@@ -149,4 +153,67 @@ enum dibx000_adc_states {
 #define OUTMODE_MPEG2_FIFO          5
 #define OUTMODE_ANALOG_ADC          6
+enum frontend_tune_state {
+    CT_TUNER_START = 10,
+    CT_TUNER_STEP_0,
+    CT_TUNER_STEP_1,
+    CT_TUNER_STEP_2,
+    CT_TUNER_STEP_3,
+    CT_TUNER_STEP_4,
+    CT_TUNER_STEP_5,
+    CT_TUNER_STEP_6,
+    CT_TUNER_STEP_7,
+    CT_TUNER_STOP,
+    CT_AGC_START = 20,
+    CT_AGC_STEP_0,
+    CT_AGC_STEP_1,
+    CT_AGC_STEP_2,
+    CT_AGC_STEP_3,
+    CT_AGC_STEP_4,
+    CT_AGC_STOP,
+        CT_DEMOD_START = 30,
+    CT_DEMOD_STEP_1,
+    CT_DEMOD_STEP_2,
+    CT_DEMOD_STEP_3,
+    CT_DEMOD_STEP_4,
+    CT_DEMOD_STEP_5,
+    CT_DEMOD_STEP_6,
+    CT_DEMOD_STEP_7,
+    CT_DEMOD_STEP_8,
+    CT_DEMOD_STEP_9,
+    CT_DEMOD_STEP_10,
+    CT_DEMOD_SEARCH_NEXT = 41,
+    CT_DEMOD_STEP_LOCKED,
+    CT_DEMOD_STOP,
+    CT_DONE = 100,
+    CT_SHUTDOWN,
+};
+struct dvb_frontend_parametersContext {
+#define CHANNEL_STATUS_PARAMETERS_UNKNOWN   0x01
+#define CHANNEL_STATUS_PARAMETERS_SET       0x02
+    u8 status;
+    u32 tune_time_estimation[2];
+    s32 tps_available;
+    u16 tps[9];
+};
+#define FE_STATUS_TUNE_FAILED          0
+#define FE_STATUS_TUNE_TIMED_OUT      -1
+#define FE_STATUS_TUNE_TIME_TOO_SHORT -2
+#define FE_STATUS_TUNE_PENDING        -3
+#define FE_STATUS_STD_SUCCESS         -4
+#define FE_STATUS_FFT_SUCCESS         -5
+#define FE_STATUS_DEMOD_SUCCESS       -6
+#define FE_STATUS_LOCKED              -7
+#define FE_STATUS_DATA_LOCKED         -8
+#define FE_CALLBACK_TIME_NEVER 0xffffffff
+#define ABS(x) ((x < 0) ? (-x) : (x))
 #endif
diff --git a/drivers/media/dvb/frontends/lgs8gxx.c b/drivers/media/dvb/frontends/lgs8gxx.c
index eabcadc425d5..dee53960e7e8 100644
--- a/drivers/media/dvb/frontends/lgs8gxx.c
+++ b/drivers/media/dvb/frontends/lgs8gxx.c
@@ -199,7 +199,7 @@ static int lgs8gxx_set_if_freq(struct lgs8gxx_state *priv, u32 freq /*in kHz*/)
        val = freq;
        if (freq != 0) {
-                val *= (u64)1 << 32;
+                val <<= 32;
                if (if_clk != 0)
                        do_div(val, if_clk);
                v32 = val & 0xFFFFFFFF;
@@ -246,7 +246,7 @@ static int lgs8gxx_get_afc_phase(struct lgs8gxx_state *priv)
        val = v32;
        val *= priv->config->if_clk_freq;
-        val /= (u64)1 << 32;
+        val >>= 32;
        dprintk("AFC = %u kHz\n", (u32)val);
        return 0;
 }
diff --git a/drivers/media/dvb/frontends/lnbp21.c b/drivers/media/dvb/frontends/lnbp21.c
index 71f607fe8fc7..b181bf023ada 100644
--- a/drivers/media/dvb/frontends/lnbp21.c
+++ b/drivers/media/dvb/frontends/lnbp21.c
@@ -1,7 +1,7 @@
 /*
 * lnbp21.c - driver for lnb supply and control ic lnbp21
 *
- * Copyright (C) 2006 Oliver Endriss
+ * Copyright (C) 2006, 2009 Oliver Endriss <o.endriss@gmx.de>
 * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
 *
 * This program is free software; you can redistribute it and/or
@@ -91,6 +91,31 @@ static int lnbp21_enable_high_lnb_voltage(struct dvb_frontend *fe, long arg)
        return (i2c_transfer(lnbp21->i2c, &msg, 1) == 1) ? 0 : -EIO;
 }
+static int lnbp21_set_tone(struct dvb_frontend *fe,
+                                fe_sec_tone_mode_t tone)
+{
+        struct lnbp21 *lnbp21 = (struct lnbp21 *) fe->sec_priv;
+        struct i2c_msg msg = {  .addr = lnbp21->i2c_addr, .flags = 0,
+                                .buf = &lnbp21->config,
+                                .len = sizeof(lnbp21->config) };
+        switch (tone) {
+        case SEC_TONE_OFF:
+                lnbp21->config &= ~LNBP21_TEN;
+                break;
+        case SEC_TONE_ON:
+                lnbp21->config |= LNBP21_TEN;
+                break;
+        default:
+                return -EINVAL;
+        };
+        lnbp21->config |= lnbp21->override_or;
+        lnbp21->config &= lnbp21->override_and;
+        return (i2c_transfer(lnbp21->i2c, &msg, 1) == 1) ? 0 : -EIO;
+}
 static void lnbp21_release(struct dvb_frontend *fe)
 {
        /* LNBP power off */
@@ -133,6 +158,7 @@ static struct dvb_frontend *lnbx2x_attach(struct dvb_frontend *fe,
        /* override frontend ops */
        fe->ops.set_voltage = lnbp21_set_voltage;
        fe->ops.enable_high_lnb_voltage = lnbp21_enable_high_lnb_voltage;
+        fe->ops.set_tone = lnbp21_set_tone;
        printk(KERN_INFO "LNBx2x attached on addr=%x\n", lnbp21->i2c_addr);
        return fe;
diff --git a/drivers/media/dvb/frontends/stv0900_core.c b/drivers/media/dvb/frontends/stv0900_core.c
index df49ea0983bc..8762c86044a5 100644
--- a/drivers/media/dvb/frontends/stv0900_core.c
+++ b/drivers/media/dvb/frontends/stv0900_core.c
@@ -1451,6 +1451,8 @@ static int stv0900_status(struct stv0900_internal *intp,
 {
        enum fe_stv0900_search_state demod_state;
        int locked = FALSE;
+        u8 tsbitrate0_val, tsbitrate1_val;
+        s32 bitrate;
        demod_state = stv0900_get_bits(intp, HEADER_MODE);
        switch (demod_state) {
@@ -1473,6 +1475,17 @@ static int stv0900_status(struct stv0900_internal *intp,
        dprintk("%s: locked = %d\n", __func__, locked);
+        if (stvdebug) {
+                /* Print TS bitrate */
+                tsbitrate0_val = stv0900_read_reg(intp, TSBITRATE0);
+                tsbitrate1_val = stv0900_read_reg(intp, TSBITRATE1);
+                /* Formula Bit rate = Mclk * px_tsfifo_bitrate / 16384 */
+                bitrate = (stv0900_get_mclk_freq(intp, intp->quartz)/1000000)
+                        * (tsbitrate1_val << 8 | tsbitrate0_val);
+                bitrate /= 16384;
+                dprintk("TS bitrate = %d Mbit/sec \n", bitrate);
+        };
        return locked;
 }
diff --git a/drivers/media/dvb/frontends/stv090x.c b/drivers/media/dvb/frontends/stv090x.c
index 48edd542242e..1573466a5c74 100644
--- a/drivers/media/dvb/frontends/stv090x.c
+++ b/drivers/media/dvb/frontends/stv090x.c
@@ -3597,7 +3597,8 @@ static int stv090x_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_ma
        reg = STV090x_READ_DEMOD(state, DISTXCTL);
-        STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 2);
+        STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD,
+                (state->config->diseqc_envelope_mode) ? 4 : 2);
        STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
        if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
                goto err;
@@ -3649,10 +3650,10 @@ static int stv090x_send_diseqc_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t
        reg = STV090x_READ_DEMOD(state, DISTXCTL);
        if (burst == SEC_MINI_A) {
-                mode = 3;
+                mode = (state->config->diseqc_envelope_mode) ? 5 : 3;
                value = 0x00;
        } else {
-                mode = 2;
+                mode = (state->config->diseqc_envelope_mode) ? 4 : 2;
                value = 0xFF;
        }
diff --git a/drivers/media/dvb/frontends/stv090x.h b/drivers/media/dvb/frontends/stv090x.h
index e968c98bb70f..b133807663ea 100644
--- a/drivers/media/dvb/frontends/stv090x.h
+++ b/drivers/media/dvb/frontends/stv090x.h
@@ -75,6 +75,8 @@ struct stv090x_config {
        enum stv090x_i2crpt     repeater_level;
+        bool diseqc_envelope_mode;
        int (*tuner_init) (struct dvb_frontend *fe);
        int (*tuner_set_mode) (struct dvb_frontend *fe, enum tuner_mode mode);
        int (*tuner_set_frequency) (struct dvb_frontend *fe, u32 frequency);
diff --git a/drivers/media/dvb/siano/smsdvb.c b/drivers/media/dvb/siano/smsdvb.c
index 266033ae2784..68bf9fbd8fed 100644
--- a/drivers/media/dvb/siano/smsdvb.c
+++ b/drivers/media/dvb/siano/smsdvb.c
@@ -662,7 +662,7 @@ adapter_error:
        return rc;
 }
-int smsdvb_module_init(void)
+static int __init smsdvb_module_init(void)
 {
        int rc;
@@ -676,7 +676,7 @@ int smsdvb_module_init(void)
        return rc;
 }
-void smsdvb_module_exit(void)
+static void __exit smsdvb_module_exit(void)
 {
        smscore_unregister_hotplug(smsdvb_hotplug);
diff --git a/drivers/media/dvb/siano/smssdio.c b/drivers/media/dvb/siano/smssdio.c
index 24206cbda264..195244a3e69b 100644
--- a/drivers/media/dvb/siano/smssdio.c
+++ b/drivers/media/dvb/siano/smssdio.c
@@ -48,7 +48,7 @@
 #define SMSSDIO_INT             0x04
 #define SMSSDIO_BLOCK_SIZE      128
-static const struct sdio_device_id smssdio_ids[] = {
+static const struct sdio_device_id smssdio_ids[] __devinitconst = {
        {SDIO_DEVICE(SDIO_VENDOR_ID_SIANO, SDIO_DEVICE_ID_SIANO_STELLAR),
         .driver_data = SMS1XXX_BOARD_SIANO_STELLAR},
        {SDIO_DEVICE(SDIO_VENDOR_ID_SIANO, SDIO_DEVICE_ID_SIANO_NOVA_A0),
@@ -222,7 +222,7 @@ static void smssdio_interrupt(struct sdio_func *func)
        smscore_onresponse(smsdev->coredev, cb);
 }
-static int smssdio_probe(struct sdio_func *func,
+static int __devinit smssdio_probe(struct sdio_func *func,
                         const struct sdio_device_id *id)
 {
        int ret;
@@ -338,7 +338,7 @@ static struct sdio_driver smssdio_driver = {
 /* Module functions                                                */
 /*******************************************************************/
-int smssdio_module_init(void)
+static int __init smssdio_module_init(void)
 {
        int ret = 0;
@@ -350,7 +350,7 @@ int smssdio_module_init(void)
        return ret;
 }
-void smssdio_module_exit(void)
+static void __exit smssdio_module_exit(void)
 {
        sdio_unregister_driver(&smssdio_driver);
 }
diff --git a/drivers/media/dvb/siano/smsusb.c b/drivers/media/dvb/siano/smsusb.c
index 8f88a586b0dd..5eac27287d9c 100644
--- a/drivers/media/dvb/siano/smsusb.c
+++ b/drivers/media/dvb/siano/smsusb.c
@@ -390,7 +390,7 @@ static int smsusb_init_device(struct usb_interface *intf, int board_id)
        return rc;
 }
-static int smsusb_probe(struct usb_interface *intf,
+static int __devinit smsusb_probe(struct usb_interface *intf,
                        const struct usb_device_id *id)
 {
        struct usb_device *udev = interface_to_usbdev(intf);
@@ -484,7 +484,7 @@ static int smsusb_resume(struct usb_interface *intf)
        return 0;
 }
-struct usb_device_id smsusb_id_table[] = {
+static const struct usb_device_id smsusb_id_table[] __devinitconst = {
        { USB_DEVICE(0x187f, 0x0010),
                .driver_info = SMS1XXX_BOARD_SIANO_STELLAR },
        { USB_DEVICE(0x187f, 0x0100),
@@ -533,8 +533,18 @@ struct usb_device_id smsusb_id_table[] = {
                .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
        { USB_DEVICE(0x2040, 0xb910),
                .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
+        { USB_DEVICE(0x2040, 0xb980),
+                .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
+        { USB_DEVICE(0x2040, 0xb990),
+                .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
        { USB_DEVICE(0x2040, 0xc000),
                .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
+        { USB_DEVICE(0x2040, 0xc010),
+                .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
+        { USB_DEVICE(0x2040, 0xc080),
+                .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
+        { USB_DEVICE(0x2040, 0xc090),
+                .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
        { } /* Terminating entry */
        };
@@ -550,7 +560,7 @@ static struct usb_driver smsusb_driver = {
        .resume                 = smsusb_resume,
 };
-int smsusb_module_init(void)
+static int __init smsusb_module_init(void)
 {
        int rc = usb_register(&smsusb_driver);
        if (rc)
@@ -561,7 +571,7 @@ int smsusb_module_init(void)
        return rc;
 }
-void smsusb_module_exit(void)
+static void __exit smsusb_module_exit(void)
 {
        /* Regular USB Cleanup */
        usb_deregister(&smsusb_driver);
diff --git a/drivers/media/dvb/ttpci/budget-ci.c b/drivers/media/dvb/ttpci/budget-ci.c
index 7d193ebc0aea..9782e0593733 100644
--- a/drivers/media/dvb/ttpci/budget-ci.c
+++ b/drivers/media/dvb/ttpci/budget-ci.c
@@ -190,12 +190,13 @@ static int msp430_ir_init(struct budget_ci *budget_ci)
        struct saa7146_dev *saa = budget_ci->budget.dev;
        struct input_dev *input_dev = budget_ci->ir.dev;
        int error;
+        struct ir_scancode_table *ir_codes;
        budget_ci->ir.dev = input_dev = input_allocate_device();
        if (!input_dev) {
                printk(KERN_ERR "budget_ci: IR interface initialisation failed\n");
-                error = -ENOMEM;
+                return -ENOMEM;
-                goto out1;
        }
        snprintf(budget_ci->ir.name, sizeof(budget_ci->ir.name),
@@ -217,6 +218,11 @@ static int msp430_ir_init(struct budget_ci *budget_ci)
        }
        input_dev->dev.parent = &saa->pci->dev;
+        if (rc5_device < 0)
+                budget_ci->ir.rc5_device = IR_DEVICE_ANY;
+        else
+                budget_ci->ir.rc5_device = rc5_device;
        /* Select keymap and address */
        switch (budget_ci->budget.dev->pci->subsystem_device) {
        case 0x100c:
@@ -224,53 +230,34 @@ static int msp430_ir_init(struct budget_ci *budget_ci)
        case 0x1011:
        case 0x1012:
                /* The hauppauge keymap is a superset of these remotes */
-                error = ir_input_init(input_dev, &budget_ci->ir.state,
+                ir_codes = &ir_codes_hauppauge_new_table;
-                              IR_TYPE_RC5, &ir_codes_hauppauge_new_table);
-                if (error < 0)
-                        goto out2;
                if (rc5_device < 0)
                        budget_ci->ir.rc5_device = 0x1f;
-                else
-                        budget_ci->ir.rc5_device = rc5_device;
                break;
        case 0x1010:
        case 0x1017:
        case 0x101a:
                /* for the Technotrend 1500 bundled remote */
-                error = ir_input_init(input_dev, &budget_ci->ir.state,
+                ir_codes = &ir_codes_tt_1500_table;
-                              IR_TYPE_RC5, &ir_codes_tt_1500_table);
-                if (error < 0)
-                        goto out2;
-                if (rc5_device < 0)
-                        budget_ci->ir.rc5_device = IR_DEVICE_ANY;
-                else
-                        budget_ci->ir.rc5_device = rc5_device;
                break;
        default:
                /* unknown remote */
-                error = ir_input_init(input_dev, &budget_ci->ir.state,
+                ir_codes = &ir_codes_budget_ci_old_table;
-                              IR_TYPE_RC5, &ir_codes_budget_ci_old_table);
-                if (error < 0)
-                        goto out2;
-                if (rc5_device < 0)
-                        budget_ci->ir.rc5_device = IR_DEVICE_ANY;
-                else
-                        budget_ci->ir.rc5_device = rc5_device;
                break;
        }
+        ir_input_init(input_dev, &budget_ci->ir.state, IR_TYPE_RC5);
        /* initialise the key-up timeout handler */
        init_timer(&budget_ci->ir.timer_keyup);
        budget_ci->ir.timer_keyup.function = msp430_ir_keyup;
        budget_ci->ir.timer_keyup.data = (unsigned long) &budget_ci->ir;
        budget_ci->ir.last_raw = 0xffff; /* An impossible value */
-        error = input_register_device(input_dev);
+        error = ir_input_register(input_dev, ir_codes);
        if (error) {
                printk(KERN_ERR "budget_ci: could not init driver for IR device (code %d)\n", error);
-                goto out2;
+                return error;
        }
        /* note: these must be after input_register_device */
@@ -284,12 +271,6 @@ static int msp430_ir_init(struct budget_ci *budget_ci)
        saa7146_setgpio(saa, 3, SAA7146_GPIO_IRQHI);
        return 0;
-out2:
-        ir_input_free(input_dev);
-        input_free_device(input_dev);
-out1:
-        return error;
 }
 static void msp430_ir_deinit(struct budget_ci *budget_ci)
@@ -304,8 +285,7 @@ static void msp430_ir_deinit(struct budget_ci *budget_ci)
        del_timer_sync(&dev->timer);
        ir_input_nokey(dev, &budget_ci->ir.state);
-        ir_input_free(dev);
+        ir_input_unregister(dev);
-        input_unregister_device(dev);
 }
 static int ciintf_read_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address)
diff --git a/drivers/media/radio/Kconfig b/drivers/media/radio/Kconfig
index 4c2b8a246772..3f40f375981b 100644
--- a/drivers/media/radio/Kconfig
+++ b/drivers/media/radio/Kconfig
@@ -215,13 +215,10 @@ config RADIO_MIROPCM20
          module will be called radio-miropcm20.
 config RADIO_SF16FMI
-        tristate "SF16FMI Radio"
+        tristate "SF16-FMI/SF16-FMP Radio"
        depends on ISA && VIDEO_V4L2
        ---help---
-          Choose Y here if you have one of these FM radio cards.  If you
+          Choose Y here if you have one of these FM radio cards.
-          compile the driver into the kernel and your card is not PnP one, you
-          have to add "sf16fm=<io>" to the kernel command line (I/O address is
-          0x284 or 0x384).
          In order to control your radio card, you will need to use programs
          that are compatible with the Video For Linux API.  Information on
diff --git a/drivers/media/radio/radio-aimslab.c b/drivers/media/radio/radio-aimslab.c
index 35edee009ba8..5bf4985daede 100644
--- a/drivers/media/radio/radio-aimslab.c
+++ b/drivers/media/radio/radio-aimslab.c
@@ -268,6 +268,8 @@ static int vidioc_s_frequency(struct file *file, void *priv,
 {
        struct rtrack *rt = video_drvdata(file);
+        if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO)
+                return -EINVAL;
        rt_setfreq(rt, f->frequency);
        return 0;
 }
@@ -277,6 +279,8 @@ static int vidioc_g_frequency(struct file *file, void *priv,
 {
        struct rtrack *rt = video_drvdata(file);
+        if (f->tuner != 0)
+                return -EINVAL;
        f->type = V4L2_TUNER_RADIO;
        f->frequency = rt->curfreq;
        return 0;
diff --git a/drivers/media/radio/radio-aztech.c b/drivers/media/radio/radio-aztech.c
index 8daf809eb01a..c22311393624 100644
--- a/drivers/media/radio/radio-aztech.c
+++ b/drivers/media/radio/radio-aztech.c
@@ -254,6 +254,8 @@ static int vidioc_s_frequency(struct file *file, void *priv,
 {
        struct aztech *az = video_drvdata(file);
+        if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO)
+                return -EINVAL;
        az_setfreq(az, f->frequency);
        return 0;
 }
@@ -263,6 +265,8 @@ static int vidioc_g_frequency(struct file *file, void *priv,
 {
        struct aztech *az = video_drvdata(file);
+        if (f->tuner != 0)
+                return -EINVAL;
        f->type = V4L2_TUNER_RADIO;
        f->frequency = az->curfreq;
        return 0;
diff --git a/drivers/media/radio/radio-gemtek-pci.c b/drivers/media/radio/radio-gemtek-pci.c
index c6cf11661868..000f4d34087c 100644
--- a/drivers/media/radio/radio-gemtek-pci.c
+++ b/drivers/media/radio/radio-gemtek-pci.c
@@ -240,6 +240,8 @@ static int vidioc_s_frequency(struct file *file, void *priv,
 {
        struct gemtek_pci *card = video_drvdata(file);
+        if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO)
+                return -EINVAL;
        if (f->frequency < GEMTEK_PCI_RANGE_LOW ||
            f->frequency > GEMTEK_PCI_RANGE_HIGH)
                return -EINVAL;
@@ -253,6 +255,8 @@ static int vidioc_g_frequency(struct file *file, void *priv,
 {
        struct gemtek_pci *card = video_drvdata(file);
+        if (f->tuner != 0)
+                return -EINVAL;
        f->type = V4L2_TUNER_RADIO;
        f->frequency = card->current_frequency;
        return 0;
diff --git a/drivers/media/radio/radio-maestro.c b/drivers/media/radio/radio-maestro.c
index 64d737c35acf..f8213b7c8ddc 100644
--- a/drivers/media/radio/radio-maestro.c
+++ b/drivers/media/radio/radio-maestro.c
@@ -200,6 +200,8 @@ static int vidioc_s_frequency(struct file *file, void *priv,
 {
        struct maestro *dev = video_drvdata(file);
+        if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO)
+                return -EINVAL;
        if (f->frequency < FREQ_LO || f->frequency > FREQ_HI)
                return -EINVAL;
        mutex_lock(&dev->lock);
@@ -213,6 +215,8 @@ static int vidioc_g_frequency(struct file *file, void *priv,
 {
        struct maestro *dev = video_drvdata(file);
+        if (f->tuner != 0)
+                return -EINVAL;
        f->type = V4L2_TUNER_RADIO;
        mutex_lock(&dev->lock);
        f->frequency = BITS2FREQ(radio_bits_get(dev));
diff --git a/drivers/media/radio/radio-maxiradio.c b/drivers/media/radio/radio-maxiradio.c
index 3da51fe8fb93..44b4dbedb322 100644
--- a/drivers/media/radio/radio-maxiradio.c
+++ b/drivers/media/radio/radio-maxiradio.c
@@ -262,6 +262,8 @@ static int vidioc_s_frequency(struct file *file, void *priv,
 {
        struct maxiradio *dev = video_drvdata(file);
+        if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO)
+                return -EINVAL;
        if (f->frequency < FREQ_LO || f->frequency > FREQ_HI) {
                dprintk(dev, 1, "radio freq (%d.%02d MHz) out of range (%d-%d)\n",
                                        f->frequency / 16000,
@@ -285,6 +287,8 @@ static int vidioc_g_frequency(struct file *file, void *priv,
 {
        struct maxiradio *dev = video_drvdata(file);
+        if (f->tuner != 0)
+                return -EINVAL;
        f->type = V4L2_TUNER_RADIO;
        f->frequency = dev->freq;
diff --git a/drivers/media/radio/radio-mr800.c b/drivers/media/radio/radio-mr800.c
index 949f60513d9e..02a9cefc9a00 100644
--- a/drivers/media/radio/radio-mr800.c
+++ b/drivers/media/radio/radio-mr800.c
@@ -374,6 +374,8 @@ static int vidioc_s_frequency(struct file *file, void *priv,
 {
        struct amradio_device *radio = file->private_data;
+        if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO)
+                return -EINVAL;
        return amradio_setfreq(radio, f->frequency);
 }
@@ -383,6 +385,8 @@ static int vidioc_g_frequency(struct file *file, void *priv,
 {
        struct amradio_device *radio = file->private_data;
+        if (f->tuner != 0)
+                return -EINVAL;
        f->type = V4L2_TUNER_RADIO;
        f->frequency = radio->curfreq;
diff --git a/drivers/media/radio/radio-rtrack2.c b/drivers/media/radio/radio-rtrack2.c
index 9cb193fa6e33..a79296aac9a9 100644
--- a/drivers/media/radio/radio-rtrack2.c
+++ b/drivers/media/radio/radio-rtrack2.c
@@ -167,6 +167,8 @@ static int vidioc_s_frequency(struct file *file, void *priv,
 {
        struct rtrack2 *rt = video_drvdata(file);
+        if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO)
+                return -EINVAL;
        rt_setfreq(rt, f->frequency);
        return 0;
 }
@@ -176,6 +178,8 @@ static int vidioc_g_frequency(struct file *file, void *priv,
 {
        struct rtrack2 *rt = video_drvdata(file);
+        if (f->tuner != 0)
+                return -EINVAL;
        f->type = V4L2_TUNER_RADIO;
        f->frequency = rt->curfreq;
        return 0;
diff --git a/drivers/media/radio/radio-sf16fmi.c b/drivers/media/radio/radio-sf16fmi.c
index 49c4aab95dab..985359d18aa5 100644
--- a/drivers/media/radio/radio-sf16fmi.c
+++ b/drivers/media/radio/radio-sf16fmi.c
@@ -1,4 +1,4 @@
-/* SF16FMI radio driver for Linux radio support
+/* SF16-FMI and SF16-FMP radio driver for Linux radio support
 * heavily based on rtrack driver...
 * (c) 1997 M. Kirkwood
 * (c) 1998 Petr Vandrovec, vandrove@vc.cvut.cz
@@ -11,7 +11,7 @@
 *
 *  Frequency control is done digitally -- ie out(port,encodefreq(95.8));
 *  No volume control - only mute/unmute - you have to use line volume
- *  control on SB-part of SF16FMI
+ *  control on SB-part of SF16-FMI/SF16-FMP
 *
 * Converted to V4L2 API by Mauro Carvalho Chehab <mchehab@infradead.org>
 */
@@ -30,14 +30,14 @@
 #include <media/v4l2-ioctl.h>
 MODULE_AUTHOR("Petr Vandrovec, vandrove@vc.cvut.cz and M. Kirkwood");
-MODULE_DESCRIPTION("A driver for the SF16MI radio.");
+MODULE_DESCRIPTION("A driver for the SF16-FMI and SF16-FMP radio.");
 MODULE_LICENSE("GPL");
 static int io = -1;
 static int radio_nr = -1;
 module_param(io, int, 0);
-MODULE_PARM_DESC(io, "I/O address of the SF16MI card (0x284 or 0x384)");
+MODULE_PARM_DESC(io, "I/O address of the SF16-FMI or SF16-FMP card (0x284 or 0x384)");
 module_param(radio_nr, int, 0);
 #define RADIO_VERSION KERNEL_VERSION(0, 0, 2)
@@ -47,13 +47,14 @@ struct fmi
        struct v4l2_device v4l2_dev;
        struct video_device vdev;
        int io;
-        int curvol; /* 1 or 0 */
+        bool mute;
        unsigned long curfreq; /* freq in kHz */
        struct mutex lock;
 };
 static struct fmi fmi_card;
 static struct pnp_dev *dev;
+bool pnp_attached;
 /* freq is in 1/16 kHz to internal number, hw precision is 50 kHz */
 /* It is only useful to give freq in interval of 800 (=0.05Mhz),
@@ -105,7 +106,7 @@ static inline int fmi_setfreq(struct fmi *fmi, unsigned long freq)
        outbits(8, 0xC0, fmi->io);
        msleep(143);            /* was schedule_timeout(HZ/7) */
        mutex_unlock(&fmi->lock);
-        if (fmi->curvol)
+        if (!fmi->mute)
                fmi_unmute(fmi);
        return 0;
 }
@@ -116,7 +117,7 @@ static inline int fmi_getsigstr(struct fmi *fmi)
        int res;
        mutex_lock(&fmi->lock);
-        val = fmi->curvol ? 0x08 : 0x00;        /* unmute/mute */
+        val = fmi->mute ? 0x00 : 0x08;  /* mute/unmute */
        outb(val, fmi->io);
        outb(val | 0x10, fmi->io);
        msleep(143);            /* was schedule_timeout(HZ/7) */
@@ -168,6 +169,8 @@ static int vidioc_s_frequency(struct file *file, void *priv,
 {
        struct fmi *fmi = video_drvdata(file);
+        if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO)
+                return -EINVAL;
        if (f->frequency < RSF16_MINFREQ ||
                        f->frequency > RSF16_MAXFREQ)
                return -EINVAL;
@@ -182,6 +185,8 @@ static int vidioc_g_frequency(struct file *file, void *priv,
 {
        struct fmi *fmi = video_drvdata(file);
+        if (f->tuner != 0)
+                return -EINVAL;
        f->type = V4L2_TUNER_RADIO;
        f->frequency = fmi->curfreq;
        return 0;
@@ -204,7 +209,7 @@ static int vidioc_g_ctrl(struct file *file, void *priv,
        switch (ctrl->id) {
        case V4L2_CID_AUDIO_MUTE:
-                ctrl->value = fmi->curvol;
+                ctrl->value = fmi->mute;
                return 0;
        }
        return -EINVAL;
@@ -221,7 +226,7 @@ static int vidioc_s_ctrl(struct file *file, void *priv,
                        fmi_mute(fmi);
                else
                        fmi_unmute(fmi);
-                fmi->curvol = ctrl->value;
+                fmi->mute = ctrl->value;
                return 0;
        }
        return -EINVAL;
@@ -316,26 +321,54 @@ static int __init fmi_init(void)
 {
        struct fmi *fmi = &fmi_card;
        struct v4l2_device *v4l2_dev = &fmi->v4l2_dev;
-        int res;
+        int res, i;
+        int probe_ports[] = { 0, 0x284, 0x384 };
+        if (io < 0) {
+                for (i = 0; i < ARRAY_SIZE(probe_ports); i++) {
+                        io = probe_ports[i];
+                        if (io == 0) {
+                                io = isapnp_fmi_probe();
+                                if (io < 0)
+                                        continue;
+                                pnp_attached = 1;
+                        }
+                        if (!request_region(io, 2, "radio-sf16fmi")) {
+                                if (pnp_attached)
+                                        pnp_device_detach(dev);
+                                io = -1;
+                                continue;
+                        }
+                        if (pnp_attached ||
+                            ((inb(io) & 0xf9) == 0xf9 && (inb(io) & 0x4) == 0))
+                                break;
+                        release_region(io, 2);
+                        io = -1;
+                }
+        } else {
+                if (!request_region(io, 2, "radio-sf16fmi")) {
+                        printk(KERN_ERR "radio-sf16fmi: port %#x already in use\n", io);
+                        return -EBUSY;
+                }
+                if (inb(io) == 0xff) {
+                        printk(KERN_ERR "radio-sf16fmi: card not present at %#x\n", io);
+                        release_region(io, 2);
+                        return -ENODEV;
+                }
+        }
+        if (io < 0) {
+                printk(KERN_ERR "radio-sf16fmi: no cards found\n");
+                return -ENODEV;
+        }
-        if (io < 0)
-                io = isapnp_fmi_probe();
        strlcpy(v4l2_dev->name, "sf16fmi", sizeof(v4l2_dev->name));
        fmi->io = io;
-        if (fmi->io < 0) {
-                v4l2_err(v4l2_dev, "No PnP card found.\n");
-                return fmi->io;
-        }
-        if (!request_region(io, 2, "radio-sf16fmi")) {
-                v4l2_err(v4l2_dev, "port 0x%x already in use\n", fmi->io);
-                pnp_device_detach(dev);
-                return -EBUSY;
-        }
        res = v4l2_device_register(NULL, v4l2_dev);
        if (res < 0) {
                release_region(fmi->io, 2);
-                pnp_device_detach(dev);
+                if (pnp_attached)
+                        pnp_device_detach(dev);
                v4l2_err(v4l2_dev, "Could not register v4l2_device\n");
                return res;
        }
@@ -352,7 +385,8 @@ static int __init fmi_init(void)
        if (video_register_device(&fmi->vdev, VFL_TYPE_RADIO, radio_nr) < 0) {
                v4l2_device_unregister(v4l2_dev);
                release_region(fmi->io, 2);
-                pnp_device_detach(dev);
+                if (pnp_attached)
+                        pnp_device_detach(dev);
                return -EINVAL;
        }
@@ -369,7 +403,7 @@ static void __exit fmi_exit(void)
        video_unregister_device(&fmi->vdev);
        v4l2_device_unregister(&fmi->v4l2_dev);
        release_region(fmi->io, 2);
-        if (dev)
+        if (dev && pnp_attached)
                pnp_device_detach(dev);
 }
diff --git a/drivers/media/radio/radio-sf16fmr2.c b/drivers/media/radio/radio-sf16fmr2.c
index a11414f648d4..52c7bbb32b8b 100644
--- a/drivers/media/radio/radio-sf16fmr2.c
+++ b/drivers/media/radio/radio-sf16fmr2.c
@@ -251,6 +251,8 @@ static int vidioc_s_frequency(struct file *file, void *priv,
 {
        struct fmr2 *fmr2 = video_drvdata(file);
+        if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO)
+                return -EINVAL;
        if (f->frequency < RSF16_MINFREQ ||
                        f->frequency > RSF16_MAXFREQ)
                return -EINVAL;
@@ -272,6 +274,8 @@ static int vidioc_g_frequency(struct file *file, void *priv,
 {
        struct fmr2 *fmr2 = video_drvdata(file);
+        if (f->tuner != 0)
+                return -EINVAL;
        f->type = V4L2_TUNER_RADIO;
        f->frequency = fmr2->curfreq;
        return 0;
diff --git a/drivers/media/radio/radio-tea5764.c b/drivers/media/radio/radio-tea5764.c
index 3cd76dddb6aa..8e718bfcdad3 100644
--- a/drivers/media/radio/radio-tea5764.c
+++ b/drivers/media/radio/radio-tea5764.c
@@ -314,7 +314,7 @@ static int vidioc_g_tuner(struct file *file, void *priv,
        if (v->index > 0)
                return -EINVAL;
-        memset(v, 0, sizeof(v));
+        memset(v, 0, sizeof(*v));
        strcpy(v->name, "FM");
        v->type = V4L2_TUNER_RADIO;
        tea5764_i2c_read(radio);
@@ -349,7 +349,7 @@ static int vidioc_s_frequency(struct file *file, void *priv,
 {
        struct tea5764_device *radio = video_drvdata(file);
-        if (f->tuner != 0)
+        if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO)
                return -EINVAL;
        if (f->frequency == 0) {
                /* We special case this as a power down control. */
@@ -370,8 +370,10 @@ static int vidioc_g_frequency(struct file *file, void *priv,
        struct tea5764_device *radio = video_drvdata(file);
        struct tea5764_regs *r = &radio->regs;
+        if (f->tuner != 0)
+                return -EINVAL;
        tea5764_i2c_read(radio);
-        memset(f, 0, sizeof(f));
+        memset(f, 0, sizeof(*f));
        f->type = V4L2_TUNER_RADIO;
        if (r->tnctrl & TEA5764_TNCTRL_PUPD0)
                f->frequency = (tea5764_get_freq(radio) * 2) / 125;
@@ -458,12 +460,8 @@ static int vidioc_s_audio(struct file *file, void *priv,
 static int tea5764_open(struct file *file)
 {
        /* Currently we support only one device */
-        int minor = video_devdata(file)->minor;
        struct tea5764_device *radio = video_drvdata(file);
-        if (radio->videodev->minor != minor)
-                return -ENODEV;
        mutex_lock(&radio->mutex);
        /* Only exclusive access */
        if (radio->users) {
diff --git a/drivers/media/radio/radio-terratec.c b/drivers/media/radio/radio-terratec.c
index 699db9acaaf7..fc1c860fd438 100644
--- a/drivers/media/radio/radio-terratec.c
+++ b/drivers/media/radio/radio-terratec.c
@@ -240,6 +240,8 @@ static int vidioc_s_frequency(struct file *file, void *priv,
 {
        struct terratec *tt = video_drvdata(file);
+        if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO)
+                return -EINVAL;
        tt_setfreq(tt, f->frequency);
        return 0;
 }
@@ -249,6 +251,8 @@ static int vidioc_g_frequency(struct file *file, void *priv,
 {
        struct terratec *tt = video_drvdata(file);
+        if (f->tuner != 0)
+                return -EINVAL;
        f->type = V4L2_TUNER_RADIO;
        f->frequency = tt->curfreq;
        return 0;
diff --git a/drivers/media/radio/radio-trust.c b/drivers/media/radio/radio-trust.c
index 6f9ecc359356..9d6dcf8af5b0 100644
--- a/drivers/media/radio/radio-trust.c
+++ b/drivers/media/radio/radio-trust.c
@@ -239,6 +239,8 @@ static int vidioc_s_frequency(struct file *file, void *priv,
 {
        struct trust *tr = video_drvdata(file);
+        if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO)
+                return -EINVAL;
        tr_setfreq(tr, f->frequency);
        return 0;
 }
@@ -248,6 +250,8 @@ static int vidioc_g_frequency(struct file *file, void *priv,
 {
        struct trust *tr = video_drvdata(file);
+        if (f->tuner != 0)
+                return -EINVAL;
        f->type = V4L2_TUNER_RADIO;
        f->frequency = tr->curfreq;
        return 0;
diff --git a/drivers/media/radio/radio-typhoon.c b/drivers/media/radio/radio-typhoon.c
index 3a98f1399495..03439282dfce 100644
--- a/drivers/media/radio/radio-typhoon.c
+++ b/drivers/media/radio/radio-typhoon.c
@@ -207,6 +207,8 @@ static int vidioc_g_frequency(struct file *file, void *priv,
 {
        struct typhoon *dev = video_drvdata(file);
+        if (f->tuner != 0)
+                return -EINVAL;
        f->type = V4L2_TUNER_RADIO;
        f->frequency = dev->curfreq;
        return 0;
@@ -217,6 +219,8 @@ static int vidioc_s_frequency(struct file *file, void *priv,
 {
        struct typhoon *dev = video_drvdata(file);
+        if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO)
+                return -EINVAL;
        dev->curfreq = f->frequency;
        typhoon_setfreq(dev, dev->curfreq);
        return 0;
diff --git a/drivers/media/radio/radio-zoltrix.c b/drivers/media/radio/radio-zoltrix.c
index 80e98b6422fe..f31eab99c943 100644
--- a/drivers/media/radio/radio-zoltrix.c
+++ b/drivers/media/radio/radio-zoltrix.c
@@ -266,6 +266,8 @@ static int vidioc_s_frequency(struct file *file, void *priv,
 {
        struct zoltrix *zol = video_drvdata(file);
+        if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO)
+                return -EINVAL;
        if (zol_setfreq(zol, f->frequency) != 0)
                return -EINVAL;
        return 0;
@@ -276,6 +278,8 @@ static int vidioc_g_frequency(struct file *file, void *priv,
 {
        struct zoltrix *zol = video_drvdata(file);
+        if (f->tuner != 0)
+                return -EINVAL;
        f->type = V4L2_TUNER_RADIO;
        f->frequency = zol->curfreq;
        return 0;
diff --git a/drivers/media/radio/si470x/radio-si470x-common.c b/drivers/media/radio/si470x/radio-si470x-common.c
index f33315f2c543..4da0f150c6e2 100644
--- a/drivers/media/radio/si470x/radio-si470x-common.c
+++ b/drivers/media/radio/si470x/radio-si470x-common.c
@@ -426,6 +426,104 @@ int si470x_rds_on(struct si470x_device *radio)
 /**************************************************************************
+ * File Operations Interface
+ **************************************************************************/
+/*
+ * si470x_fops_read - read RDS data
+ */
+static ssize_t si470x_fops_read(struct file *file, char __user *buf,
+                size_t count, loff_t *ppos)
+{
+        struct si470x_device *radio = video_drvdata(file);
+        int retval = 0;
+        unsigned int block_count = 0;
+        /* switch on rds reception */
+        if ((radio->registers[SYSCONFIG1] & SYSCONFIG1_RDS) == 0)
+                si470x_rds_on(radio);
+        /* block if no new data available */
+        while (radio->wr_index == radio->rd_index) {
+                if (file->f_flags & O_NONBLOCK) {
+                        retval = -EWOULDBLOCK;
+                        goto done;
+                }
+                if (wait_event_interruptible(radio->read_queue,
+                        radio->wr_index != radio->rd_index) < 0) {
+                        retval = -EINTR;
+                        goto done;
+                }
+        }
+        /* calculate block count from byte count */
+        count /= 3;
+        /* copy RDS block out of internal buffer and to user buffer */
+        mutex_lock(&radio->lock);
+        while (block_count < count) {
+                if (radio->rd_index == radio->wr_index)
+                        break;
+                /* always transfer rds complete blocks */
+                if (copy_to_user(buf, &radio->buffer[radio->rd_index], 3))
+                        /* retval = -EFAULT; */
+                        break;
+                /* increment and wrap read pointer */
+                radio->rd_index += 3;
+                if (radio->rd_index >= radio->buf_size)
+                        radio->rd_index = 0;
+                /* increment counters */
+                block_count++;
+                buf += 3;
+                retval += 3;
+        }
+        mutex_unlock(&radio->lock);
+done:
+        return retval;
+}
+/*
+ * si470x_fops_poll - poll RDS data
+ */
+static unsigned int si470x_fops_poll(struct file *file,
+                struct poll_table_struct *pts)
+{
+        struct si470x_device *radio = video_drvdata(file);
+        int retval = 0;
+        /* switch on rds reception */
+        if ((radio->registers[SYSCONFIG1] & SYSCONFIG1_RDS) == 0)
+                si470x_rds_on(radio);
+        poll_wait(file, &radio->read_queue, pts);
+        if (radio->rd_index != radio->wr_index)
+                retval = POLLIN | POLLRDNORM;
+        return retval;
+}
+/*
+ * si470x_fops - file operations interface
+ */
+static const struct v4l2_file_operations si470x_fops = {
+        .owner                  = THIS_MODULE,
+        .read                   = si470x_fops_read,
+        .poll                   = si470x_fops_poll,
+        .ioctl                  = video_ioctl2,
+        .open                   = si470x_fops_open,
+        .release                = si470x_fops_release,
+};
+/**************************************************************************
 * Video4Linux Interface
 **************************************************************************/
diff --git a/drivers/media/radio/si470x/radio-si470x-i2c.c b/drivers/media/radio/si470x/radio-si470x-i2c.c
index 2d53b6a9409b..5466015346a1 100644
--- a/drivers/media/radio/si470x/radio-si470x-i2c.c
+++ b/drivers/media/radio/si470x/radio-si470x-i2c.c
@@ -22,22 +22,17 @@
 */
-/*
- * ToDo:
- * - RDS support
- */
 /* driver definitions */
 #define DRIVER_AUTHOR "Joonyoung Shim <jy0922.shim@samsung.com>";
-#define DRIVER_KERNEL_VERSION KERNEL_VERSION(1, 0, 0)
+#define DRIVER_KERNEL_VERSION KERNEL_VERSION(1, 0, 1)
 #define DRIVER_CARD "Silicon Labs Si470x FM Radio Receiver"
 #define DRIVER_DESC "I2C radio driver for Si470x FM Radio Receivers"
-#define DRIVER_VERSION "1.0.0"
+#define DRIVER_VERSION "1.0.1"
 /* kernel includes */
 #include <linux/i2c.h>
 #include <linux/delay.h>
+#include <linux/interrupt.h>
 #include "radio-si470x.h"
@@ -62,6 +57,20 @@ static int radio_nr = -1;
 module_param(radio_nr, int, 0444);
 MODULE_PARM_DESC(radio_nr, "Radio Nr");
+/* RDS buffer blocks */
+static unsigned int rds_buf = 100;
+module_param(rds_buf, uint, 0444);
+MODULE_PARM_DESC(rds_buf, "RDS buffer entries: *100*");
+/* RDS maximum block errors */
+static unsigned short max_rds_errors = 1;
+/* 0 means   0  errors requiring correction */
+/* 1 means 1-2  errors requiring correction (used by original USBRadio.exe) */
+/* 2 means 3-5  errors requiring correction */
+/* 3 means   6+ errors or errors in checkword, correction not possible */
+module_param(max_rds_errors, ushort, 0644);
+MODULE_PARM_DESC(max_rds_errors, "RDS maximum block errors: *1*");
 /**************************************************************************
@@ -173,7 +182,7 @@ int si470x_disconnect_check(struct si470x_device *radio)
 /*
 * si470x_fops_open - file open
 */
-static int si470x_fops_open(struct file *file)
+int si470x_fops_open(struct file *file)
 {
        struct si470x_device *radio = video_drvdata(file);
        int retval = 0;
@@ -181,12 +190,21 @@ static int si470x_fops_open(struct file *file)
        mutex_lock(&radio->lock);
        radio->users++;
-        if (radio->users == 1)
+        if (radio->users == 1) {
                /* start radio */
                retval = si470x_start(radio);
+                if (retval < 0)
+                        goto done;
+                /* enable RDS interrupt */
+                radio->registers[SYSCONFIG1] |= SYSCONFIG1_RDSIEN;
+                radio->registers[SYSCONFIG1] &= ~SYSCONFIG1_GPIO2;
+                radio->registers[SYSCONFIG1] |= 0x1 << 2;
+                retval = si470x_set_register(radio, SYSCONFIG1);
+        }
+done:
        mutex_unlock(&radio->lock);
        return retval;
 }
@@ -194,7 +212,7 @@ static int si470x_fops_open(struct file *file)
 /*
 * si470x_fops_release - file release
 */
-static int si470x_fops_release(struct file *file)
+int si470x_fops_release(struct file *file)
 {
        struct si470x_device *radio = video_drvdata(file);
        int retval = 0;
@@ -215,17 +233,6 @@ static int si470x_fops_release(struct file *file)
 }
-/*
- * si470x_fops - file operations interface
- */
-const struct v4l2_file_operations si470x_fops = {
-        .owner          = THIS_MODULE,
-        .ioctl          = video_ioctl2,
-        .open           = si470x_fops_open,
-        .release        = si470x_fops_release,
-};
 /**************************************************************************
 * Video4Linux Interface
@@ -253,6 +260,105 @@ int si470x_vidioc_querycap(struct file *file, void *priv,
 **************************************************************************/
 /*
+ * si470x_i2c_interrupt_work - rds processing function
+ */
+static void si470x_i2c_interrupt_work(struct work_struct *work)
+{
+        struct si470x_device *radio = container_of(work,
+                        struct si470x_device, radio_work);
+        unsigned char regnr;
+        unsigned char blocknum;
+        unsigned short bler; /* rds block errors */
+        unsigned short rds;
+        unsigned char tmpbuf[3];
+        int retval = 0;
+        /* safety checks */
+        if ((radio->registers[SYSCONFIG1] & SYSCONFIG1_RDS) == 0)
+                return;
+        /* Update RDS registers */
+        for (regnr = 0; regnr < RDS_REGISTER_NUM; regnr++) {
+                retval = si470x_get_register(radio, STATUSRSSI + regnr);
+                if (retval < 0)
+                        return;
+        }
+        /* get rds blocks */
+        if ((radio->registers[STATUSRSSI] & STATUSRSSI_RDSR) == 0)
+                /* No RDS group ready, better luck next time */
+                return;
+        for (blocknum = 0; blocknum < 4; blocknum++) {
+                switch (blocknum) {
+                default:
+                        bler = (radio->registers[STATUSRSSI] &
+                                        STATUSRSSI_BLERA) >> 9;
+                        rds = radio->registers[RDSA];
+                        break;
+                case 1:
+                        bler = (radio->registers[READCHAN] &
+                                        READCHAN_BLERB) >> 14;
+                        rds = radio->registers[RDSB];
+                        break;
+                case 2:
+                        bler = (radio->registers[READCHAN] &
+                                        READCHAN_BLERC) >> 12;
+                        rds = radio->registers[RDSC];
+                        break;
+                case 3:
+                        bler = (radio->registers[READCHAN] &
+                                        READCHAN_BLERD) >> 10;
+                        rds = radio->registers[RDSD];
+                        break;
+                };
+                /* Fill the V4L2 RDS buffer */
+                put_unaligned_le16(rds, &tmpbuf);
+                tmpbuf[2] = blocknum;           /* offset name */
+                tmpbuf[2] |= blocknum << 3;     /* received offset */
+                if (bler > max_rds_errors)
+                        tmpbuf[2] |= 0x80;      /* uncorrectable errors */
+                else if (bler > 0)
+                        tmpbuf[2] |= 0x40;      /* corrected error(s) */
+                /* copy RDS block to internal buffer */
+                memcpy(&radio->buffer[radio->wr_index], &tmpbuf, 3);
+                radio->wr_index += 3;
+                /* wrap write pointer */
+                if (radio->wr_index >= radio->buf_size)
+                        radio->wr_index = 0;
+                /* check for overflow */
+                if (radio->wr_index == radio->rd_index) {
+                        /* increment and wrap read pointer */
+                        radio->rd_index += 3;
+                        if (radio->rd_index >= radio->buf_size)
+                                radio->rd_index = 0;
+                }
+        }
+        if (radio->wr_index != radio->rd_index)
+                wake_up_interruptible(&radio->read_queue);
+}
+/*
+ * si470x_i2c_interrupt - interrupt handler
+ */
+static irqreturn_t si470x_i2c_interrupt(int irq, void *dev_id)
+{
+        struct si470x_device *radio = dev_id;
+        if (!work_pending(&radio->radio_work))
+                schedule_work(&radio->radio_work);
+        return IRQ_HANDLED;
+}
+/*
 * si470x_i2c_probe - probe for the device
 */
 static int __devinit si470x_i2c_probe(struct i2c_client *client,
@@ -268,6 +374,8 @@ static int __devinit si470x_i2c_probe(struct i2c_client *client,
                retval = -ENOMEM;
                goto err_initial;
        }
+        INIT_WORK(&radio->radio_work, si470x_i2c_interrupt_work);
        radio->users = 0;
        radio->client = client;
        mutex_init(&radio->lock);
@@ -319,6 +427,26 @@ static int __devinit si470x_i2c_probe(struct i2c_client *client,
        /* set initial frequency */
        si470x_set_freq(radio, 87.5 * FREQ_MUL); /* available in all regions */
+        /* rds buffer allocation */
+        radio->buf_size = rds_buf * 3;
+        radio->buffer = kmalloc(radio->buf_size, GFP_KERNEL);
+        if (!radio->buffer) {
+                retval = -EIO;
+                goto err_video;
+        }
+        /* rds buffer configuration */
+        radio->wr_index = 0;
+        radio->rd_index = 0;
+        init_waitqueue_head(&radio->read_queue);
+        retval = request_irq(client->irq, si470x_i2c_interrupt,
+                        IRQF_TRIGGER_FALLING, DRIVER_NAME, radio);
+        if (retval) {
+                dev_err(&client->dev, "Failed to register interrupt\n");
+                goto err_rds;
+        }
        /* register video device */
        retval = video_register_device(radio->videodev, VFL_TYPE_RADIO,
                        radio_nr);
@@ -330,6 +458,9 @@ static int __devinit si470x_i2c_probe(struct i2c_client *client,
        return 0;
 err_all:
+        free_irq(client->irq, radio);
+err_rds:
+        kfree(radio->buffer);
 err_video:
        video_device_release(radio->videodev);
 err_radio:
@@ -346,6 +477,8 @@ static __devexit int si470x_i2c_remove(struct i2c_client *client)
 {
        struct si470x_device *radio = i2c_get_clientdata(client);
+        free_irq(client->irq, radio);
+        cancel_work_sync(&radio->radio_work);
        video_unregister_device(radio->videodev);
        kfree(radio);
        i2c_set_clientdata(client, NULL);
@@ -354,6 +487,44 @@ static __devexit int si470x_i2c_remove(struct i2c_client *client)
 }
+#ifdef CONFIG_PM
+/*
+ * si470x_i2c_suspend - suspend the device
+ */
+static int si470x_i2c_suspend(struct i2c_client *client, pm_message_t mesg)
+{
+        struct si470x_device *radio = i2c_get_clientdata(client);
+        /* power down */
+        radio->registers[POWERCFG] |= POWERCFG_DISABLE;
+        if (si470x_set_register(radio, POWERCFG) < 0)
+                return -EIO;
+        return 0;
+}
+/*
+ * si470x_i2c_resume - resume the device
+ */
+static int si470x_i2c_resume(struct i2c_client *client)
+{
+        struct si470x_device *radio = i2c_get_clientdata(client);
+        /* power up : need 110ms */
+        radio->registers[POWERCFG] |= POWERCFG_ENABLE;
+        if (si470x_set_register(radio, POWERCFG) < 0)
+                return -EIO;
+        msleep(110);
+        return 0;
+}
+#else
+#define si470x_i2c_suspend      NULL
+#define si470x_i2c_resume       NULL
+#endif
 /*
 * si470x_i2c_driver - i2c driver interface
 */
@@ -364,6 +535,8 @@ static struct i2c_driver si470x_i2c_driver = {
        },
        .probe                  = si470x_i2c_probe,
        .remove                 = __devexit_p(si470x_i2c_remove),
+        .suspend                = si470x_i2c_suspend,
+        .resume                 = si470x_i2c_resume,
        .id_table               = si470x_i2c_id,
 };
diff --git a/drivers/media/radio/si470x/radio-si470x-usb.c b/drivers/media/radio/si470x/radio-si470x-usb.c
index f2d0e1ddb301..a96e1b9dd646 100644
--- a/drivers/media/radio/si470x/radio-si470x-usb.c
+++ b/drivers/media/radio/si470x/radio-si470x-usb.c
@@ -509,89 +509,9 @@ resubmit:
 **************************************************************************/
 /*
- * si470x_fops_read - read RDS data
- */
-static ssize_t si470x_fops_read(struct file *file, char __user *buf,
-                size_t count, loff_t *ppos)
-{
-        struct si470x_device *radio = video_drvdata(file);
-        int retval = 0;
-        unsigned int block_count = 0;
-        /* switch on rds reception */
-        if ((radio->registers[SYSCONFIG1] & SYSCONFIG1_RDS) == 0)
-                si470x_rds_on(radio);
-        /* block if no new data available */
-        while (radio->wr_index == radio->rd_index) {
-                if (file->f_flags & O_NONBLOCK) {
-                        retval = -EWOULDBLOCK;
-                        goto done;
-                }
-                if (wait_event_interruptible(radio->read_queue,
-                        radio->wr_index != radio->rd_index) < 0) {
-                        retval = -EINTR;
-                        goto done;
-                }
-        }
-        /* calculate block count from byte count */
-        count /= 3;
-        /* copy RDS block out of internal buffer and to user buffer */
-        mutex_lock(&radio->lock);
-        while (block_count < count) {
-                if (radio->rd_index == radio->wr_index)
-                        break;
-                /* always transfer rds complete blocks */
-                if (copy_to_user(buf, &radio->buffer[radio->rd_index], 3))
-                        /* retval = -EFAULT; */
-                        break;
-                /* increment and wrap read pointer */
-                radio->rd_index += 3;
-                if (radio->rd_index >= radio->buf_size)
-                        radio->rd_index = 0;
-                /* increment counters */
-                block_count++;
-                buf += 3;
-                retval += 3;
-        }
-        mutex_unlock(&radio->lock);
-done:
-        return retval;
-}
-/*
- * si470x_fops_poll - poll RDS data
- */
-static unsigned int si470x_fops_poll(struct file *file,
-                struct poll_table_struct *pts)
-{
-        struct si470x_device *radio = video_drvdata(file);
-        int retval = 0;
-        /* switch on rds reception */
-        if ((radio->registers[SYSCONFIG1] & SYSCONFIG1_RDS) == 0)
-                si470x_rds_on(radio);
-        poll_wait(file, &radio->read_queue, pts);
-        if (radio->rd_index != radio->wr_index)
-                retval = POLLIN | POLLRDNORM;
-        return retval;
-}
-/*
 * si470x_fops_open - file open
 */
-static int si470x_fops_open(struct file *file)
+int si470x_fops_open(struct file *file)
 {
        struct si470x_device *radio = video_drvdata(file);
        int retval;
@@ -645,7 +565,7 @@ done:
 /*
 * si470x_fops_release - file release
 */
-static int si470x_fops_release(struct file *file)
+int si470x_fops_release(struct file *file)
 {
        struct si470x_device *radio = video_drvdata(file);
        int retval = 0;
@@ -688,19 +608,6 @@ done:
 }
-/*
- * si470x_fops - file operations interface
- */
-const struct v4l2_file_operations si470x_fops = {
-        .owner          = THIS_MODULE,
-        .read           = si470x_fops_read,
-        .poll           = si470x_fops_poll,
-        .ioctl          = video_ioctl2,
-        .open           = si470x_fops_open,
-        .release        = si470x_fops_release,
-};
 /**************************************************************************
 * Video4Linux Interface
diff --git a/drivers/media/radio/si470x/radio-si470x.h b/drivers/media/radio/si470x/radio-si470x.h
index d0af194d194c..3cd0a29cd6e7 100644
--- a/drivers/media/radio/si470x/radio-si470x.h
+++ b/drivers/media/radio/si470x/radio-si470x.h
@@ -29,6 +29,7 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/init.h>
+#include <linux/sched.h>
 #include <linux/slab.h>
 #include <linux/smp_lock.h>
 #include <linux/input.h>
@@ -181,6 +182,7 @@ struct si470x_device {
 #if defined(CONFIG_I2C_SI470X) || defined(CONFIG_I2C_SI470X_MODULE)
        struct i2c_client *client;
+        struct work_struct radio_work;
 #endif
 };
@@ -212,7 +214,6 @@ struct si470x_device {
 /**************************************************************************
 * Common Functions
 **************************************************************************/
-extern const struct v4l2_file_operations si470x_fops;
 extern struct video_device si470x_viddev_template;
 int si470x_get_register(struct si470x_device *radio, int regnr);
 int si470x_set_register(struct si470x_device *radio, int regnr);
@@ -221,5 +222,7 @@ int si470x_set_freq(struct si470x_device *radio, unsigned int freq);
 int si470x_start(struct si470x_device *radio);
 int si470x_stop(struct si470x_device *radio);
 int si470x_rds_on(struct si470x_device *radio);
+int si470x_fops_open(struct file *file);
+int si470x_fops_release(struct file *file);
 int si470x_vidioc_querycap(struct file *file, void *priv,
                struct v4l2_capability *capability);
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
index 9dc74c93bf24..2f83be766d9f 100644
--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
@@ -37,10 +37,6 @@ config VIDEO_BTCX
        depends on PCI
        tristate
-config VIDEO_IR
-        tristate
-        depends on INPUT
 config VIDEO_TVEEPROM
        tristate
        depends on I2C
@@ -840,6 +836,12 @@ config SOC_CAMERA_MT9T031
        help
          This driver supports MT9T031 cameras from Micron.
+config SOC_CAMERA_MT9T112
+        tristate "mt9t112 support"
+        depends on SOC_CAMERA && I2C
+        help
+          This driver supports MT9T112 cameras from Aptina.
 config SOC_CAMERA_MT9V022
        tristate "mt9v022 support"
        depends on SOC_CAMERA && I2C
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
index 7a2dcc34111c..2af68ee84122 100644
--- a/drivers/media/video/Makefile
+++ b/drivers/media/video/Makefile
@@ -75,6 +75,7 @@ obj-$(CONFIG_VIDEO_MT9V011) += mt9v011.o
 obj-$(CONFIG_SOC_CAMERA_MT9M001)        += mt9m001.o
 obj-$(CONFIG_SOC_CAMERA_MT9M111)        += mt9m111.o
 obj-$(CONFIG_SOC_CAMERA_MT9T031)        += mt9t031.o
+obj-$(CONFIG_SOC_CAMERA_MT9T112)        += mt9t112.o
 obj-$(CONFIG_SOC_CAMERA_MT9V022)        += mt9v022.o
 obj-$(CONFIG_SOC_CAMERA_OV772X)         += ov772x.o
 obj-$(CONFIG_SOC_CAMERA_OV9640)         += ov9640.o
@@ -149,7 +150,7 @@ obj-$(CONFIG_VIDEO_VIVI) += vivi.o
 obj-$(CONFIG_VIDEO_CX23885) += cx23885/
 obj-$(CONFIG_VIDEO_OMAP2)               += omap2cam.o
-obj-$(CONFIG_SOC_CAMERA)                += soc_camera.o
+obj-$(CONFIG_SOC_CAMERA)                += soc_camera.o soc_mediabus.o
 obj-$(CONFIG_SOC_CAMERA_PLATFORM)       += soc_camera_platform.o
 # soc-camera host drivers have to be linked after camera drivers
 obj-$(CONFIG_VIDEO_MX1)                 += mx1_camera.o
diff --git a/drivers/media/video/arv.c b/drivers/media/video/arv.c
index d137bac84511..a356d6bd3131 100644
--- a/drivers/media/video/arv.c
+++ b/drivers/media/video/arv.c
@@ -767,7 +767,6 @@ static struct video_device ar_template = {
        .name           = "Colour AR VGA",
        .fops           = &ar_fops,
        .release        = ar_release,
-        .minor          = -1,
 };
 #define ALIGN4(x)       ((((int)(x)) & 0x3) == 0)
@@ -860,8 +859,8 @@ static int __init ar_init(void)
                goto out_dev;
        }
-        printk("video%d: Found M64278 VGA (IRQ %d, Freq %dMHz).\n",
+        printk("%s: Found M64278 VGA (IRQ %d, Freq %dMHz).\n",
-                ar->vdev->num, M32R_IRQ_INT3, freq);
+                video_device_node_name(ar->vdev), M32R_IRQ_INT3, freq);
        return 0;
diff --git a/drivers/media/video/au0828/au0828-video.c b/drivers/media/video/au0828/au0828-video.c
index 1485aee18d58..dc67bc40f36f 100644
--- a/drivers/media/video/au0828/au0828-video.c
+++ b/drivers/media/video/au0828/au0828-video.c
@@ -40,7 +40,6 @@
 #include "au0828.h"
 #include "au0828-reg.h"
-static LIST_HEAD(au0828_devlist);
 static DEFINE_MUTEX(au0828_sysfs_lock);
 #define AU0828_VERSION_CODE KERNEL_VERSION(0, 0, 1)
@@ -693,10 +692,8 @@ void au0828_analog_unregister(struct au0828_dev *dev)
        dprintk(1, "au0828_release_resources called\n");
        mutex_lock(&au0828_sysfs_lock);
-        if (dev->vdev) {
+        if (dev->vdev)
-                list_del(&dev->au0828list);
                video_unregister_device(dev->vdev);
-        }
        if (dev->vbi_dev)
                video_unregister_device(dev->vbi_dev);
@@ -737,29 +734,15 @@ static void res_free(struct au0828_fh *fh)
 static int au0828_v4l2_open(struct file *filp)
 {
-        int minor = video_devdata(filp)->minor;
        int ret = 0;
-        struct au0828_dev *h, *dev = NULL;
+        struct au0828_dev *dev = video_drvdata(filp);
        struct au0828_fh *fh;
-        int type = 0;
+        int type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        struct list_head *list;
-        list_for_each(list, &au0828_devlist) {
-                h = list_entry(list, struct au0828_dev, au0828list);
-                if (h->vdev->minor == minor) {
-                        dev = h;
-                        type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                }
 #ifdef VBI_IS_WORKING
-                if (h->vbi_dev->minor == minor) {
+        if (video_devdata(filp)->vfl_type == VFL_TYPE_GRABBER)
-                        dev = h;
+                type = V4L2_BUF_TYPE_VBI_CAPTURE;
-                        type = V4L2_BUF_TYPE_VBI_CAPTURE;
-                }
 #endif
-        }
-        if (NULL == dev)
-                return -ENODEV;
        fh = kzalloc(sizeof(struct au0828_fh), GFP_KERNEL);
        if (NULL == fh) {
@@ -1587,7 +1570,6 @@ static const struct video_device au0828_video_template = {
        .fops                       = &au0828_v4l_fops,
        .release                    = video_device_release,
        .ioctl_ops                  = &video_ioctl_ops,
-        .minor                      = -1,
        .tvnorms                    = V4L2_STD_NTSC_M,
        .current_norm               = V4L2_STD_NTSC_M,
 };
@@ -1676,25 +1658,23 @@ int au0828_analog_register(struct au0828_dev *dev,
        strcpy(dev->vbi_dev->name, "au0828a vbi");
 #endif
-        list_add_tail(&dev->au0828list, &au0828_devlist);
        /* Register the v4l2 device */
+        video_set_drvdata(dev->vdev, dev);
        retval = video_register_device(dev->vdev, VFL_TYPE_GRABBER, -1);
        if (retval != 0) {
                dprintk(1, "unable to register video device (error = %d).\n",
                        retval);
-                list_del(&dev->au0828list);
                video_device_release(dev->vdev);
                return -ENODEV;
        }
 #ifdef VBI_IS_WORKING
        /* Register the vbi device */
+        video_set_drvdata(dev->vbi_dev, dev);
        retval = video_register_device(dev->vbi_dev, VFL_TYPE_VBI, -1);
        if (retval != 0) {
                dprintk(1, "unable to register vbi device (error = %d).\n",
                        retval);
-                list_del(&dev->au0828list);
                video_device_release(dev->vbi_dev);
                video_device_release(dev->vdev);
                return -ENODEV;
diff --git a/drivers/media/video/au0828/au0828.h b/drivers/media/video/au0828/au0828.h
index b977915efbd0..207f32dec6a6 100644
--- a/drivers/media/video/au0828/au0828.h
+++ b/drivers/media/video/au0828/au0828.h
@@ -192,7 +192,6 @@ struct au0828_dev {
        struct au0828_dvb               dvb;
        /* Analog */
-        struct list_head au0828list;
        struct v4l2_device v4l2_dev;
        int users;
        unsigned int stream_on:1;       /* Locks streams */
diff --git a/drivers/media/video/bt8xx/bttv-driver.c b/drivers/media/video/bt8xx/bttv-driver.c
index a6724019c66f..3182a406bdd1 100644
--- a/drivers/media/video/bt8xx/bttv-driver.c
+++ b/drivers/media/video/bt8xx/bttv-driver.c
@@ -3206,24 +3206,24 @@ err:
 static int bttv_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
        struct bttv *btv = video_drvdata(file);
        struct bttv_fh *fh;
        enum v4l2_buf_type type = 0;
-        dprintk(KERN_DEBUG "bttv: open minor=%d\n",minor);
+        dprintk(KERN_DEBUG "bttv: open dev=%s\n", video_device_node_name(vdev));
-        lock_kernel();
+        if (vdev->vfl_type == VFL_TYPE_GRABBER) {
-        if (btv->video_dev->minor == minor) {
                type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        } else if (btv->vbi_dev->minor == minor) {
+        } else if (vdev->vfl_type == VFL_TYPE_VBI) {
                type = V4L2_BUF_TYPE_VBI_CAPTURE;
        } else {
                WARN_ON(1);
-                unlock_kernel();
                return -ENODEV;
        }
+        lock_kernel();
        dprintk(KERN_DEBUG "bttv%d: open called (type=%s)\n",
                btv->c.nr,v4l2_type_names[type]);
@@ -3397,7 +3397,6 @@ static const struct v4l2_ioctl_ops bttv_ioctl_ops = {
 static struct video_device bttv_video_template = {
        .fops         = &bttv_fops,
-        .minor        = -1,
        .ioctl_ops    = &bttv_ioctl_ops,
        .tvnorms      = BTTV_NORMS,
        .current_norm = V4L2_STD_PAL,
@@ -3408,18 +3407,13 @@ static struct video_device bttv_video_template = {
 static int radio_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
        struct bttv *btv = video_drvdata(file);
        struct bttv_fh *fh;
-        dprintk("bttv: open minor=%d\n",minor);
+        dprintk("bttv: open dev=%s\n", video_device_node_name(vdev));
        lock_kernel();
-        WARN_ON(btv->radio_dev && btv->radio_dev->minor != minor);
-        if (!btv->radio_dev || btv->radio_dev->minor != minor) {
-                unlock_kernel();
-                return -ENODEV;
-        }
        dprintk("bttv%d: open called (radio)\n",btv->c.nr);
@@ -3640,7 +3634,6 @@ static const struct v4l2_ioctl_ops radio_ioctl_ops = {
 static struct video_device radio_template = {
        .fops      = &radio_fops,
-        .minor     = -1,
        .ioctl_ops = &radio_ioctl_ops,
 };
@@ -4208,21 +4201,21 @@ static struct video_device *vdev_init(struct bttv *btv,
 static void bttv_unregister_video(struct bttv *btv)
 {
        if (btv->video_dev) {
-                if (-1 != btv->video_dev->minor)
+                if (video_is_registered(btv->video_dev))
                        video_unregister_device(btv->video_dev);
                else
                        video_device_release(btv->video_dev);
                btv->video_dev = NULL;
        }
        if (btv->vbi_dev) {
-                if (-1 != btv->vbi_dev->minor)
+                if (video_is_registered(btv->vbi_dev))
                        video_unregister_device(btv->vbi_dev);
                else
                        video_device_release(btv->vbi_dev);
                btv->vbi_dev = NULL;
        }
        if (btv->radio_dev) {
-                if (-1 != btv->radio_dev->minor)
+                if (video_is_registered(btv->radio_dev))
                        video_unregister_device(btv->radio_dev);
                else
                        video_device_release(btv->radio_dev);
@@ -4244,8 +4237,8 @@ static int __devinit bttv_register_video(struct bttv *btv)
        if (video_register_device(btv->video_dev, VFL_TYPE_GRABBER,
                                  video_nr[btv->c.nr]) < 0)
                goto err;
-        printk(KERN_INFO "bttv%d: registered device video%d\n",
+        printk(KERN_INFO "bttv%d: registered device %s\n",
-               btv->c.nr, btv->video_dev->num);
+               btv->c.nr, video_device_node_name(btv->video_dev));
        if (device_create_file(&btv->video_dev->dev,
                                     &dev_attr_card)<0) {
                printk(KERN_ERR "bttv%d: device_create_file 'card' "
@@ -4261,8 +4254,8 @@ static int __devinit bttv_register_video(struct bttv *btv)
        if (video_register_device(btv->vbi_dev, VFL_TYPE_VBI,
                                  vbi_nr[btv->c.nr]) < 0)
                goto err;
-        printk(KERN_INFO "bttv%d: registered device vbi%d\n",
+        printk(KERN_INFO "bttv%d: registered device %s\n",
-               btv->c.nr, btv->vbi_dev->num);
+               btv->c.nr, video_device_node_name(btv->vbi_dev));
        if (!btv->has_radio)
                return 0;
@@ -4273,8 +4266,8 @@ static int __devinit bttv_register_video(struct bttv *btv)
        if (video_register_device(btv->radio_dev, VFL_TYPE_RADIO,
                                  radio_nr[btv->c.nr]) < 0)
                goto err;
-        printk(KERN_INFO "bttv%d: registered device radio%d\n",
+        printk(KERN_INFO "bttv%d: registered device %s\n",
-               btv->c.nr, btv->radio_dev->num);
+               btv->c.nr, video_device_node_name(btv->radio_dev));
        /* all done */
        return 0;
diff --git a/drivers/media/video/bt8xx/bttv-i2c.c b/drivers/media/video/bt8xx/bttv-i2c.c
index beda363418b0..63aa31a041e8 100644
--- a/drivers/media/video/bt8xx/bttv-i2c.c
+++ b/drivers/media/video/bt8xx/bttv-i2c.c
@@ -40,7 +40,7 @@ static int i2c_debug;
 static int i2c_hw;
 static int i2c_scan;
 module_param(i2c_debug, int, 0644);
-MODULE_PARM_DESC(i2c_hw,"configure i2c debug level");
+MODULE_PARM_DESC(i2c_debug, "configure i2c debug level");
 module_param(i2c_hw,    int, 0444);
 MODULE_PARM_DESC(i2c_hw,"force use of hardware i2c support, "
                        "instead of software bitbang");
@@ -400,7 +400,7 @@ int __devinit init_bttv_i2c(struct bttv *btv)
                   That's why we probe 0x1a (~0x34) first. CB
                */
                const unsigned short addr_list[] = {
-                        0x1a, 0x18, 0x4b, 0x64, 0x30,
+                        0x1a, 0x18, 0x4b, 0x64, 0x30, 0x71,
                        I2C_CLIENT_END
                };
diff --git a/drivers/media/video/bt8xx/bttv-input.c b/drivers/media/video/bt8xx/bttv-input.c
index 84a957e52c4b..277a092e1214 100644
--- a/drivers/media/video/bt8xx/bttv-input.c
+++ b/drivers/media/video/bt8xx/bttv-input.c
@@ -368,7 +368,7 @@ int bttv_input_init(struct bttv *btv)
        snprintf(ir->phys, sizeof(ir->phys), "pci-%s/ir0",
                 pci_name(btv->c.pci));
-        err = ir_input_init(input_dev, &ir->ir, ir_type, ir_codes);
+        err = ir_input_init(input_dev, &ir->ir, ir_type);
        if (err < 0)
                goto err_out_free;
@@ -389,7 +389,7 @@ int bttv_input_init(struct bttv *btv)
        bttv_ir_start(btv, ir);
        /* all done */
-        err = input_register_device(btv->remote->dev);
+        err = ir_input_register(btv->remote->dev, ir_codes);
        if (err)
                goto err_out_stop;
@@ -403,8 +403,6 @@ int bttv_input_init(struct bttv *btv)
        bttv_ir_stop(btv);
        btv->remote = NULL;
 err_out_free:
-        ir_input_free(input_dev);
-        input_free_device(input_dev);
        kfree(ir);
        return err;
 }
@@ -415,8 +413,7 @@ void bttv_input_fini(struct bttv *btv)
                return;
        bttv_ir_stop(btv);
-        ir_input_free(btv->remote->dev);
+        ir_input_unregister(btv->remote->dev);
-        input_unregister_device(btv->remote->dev);
        kfree(btv->remote);
        btv->remote = NULL;
 }
diff --git a/drivers/media/video/c-qcam.c b/drivers/media/video/c-qcam.c
index 85cf1778827a..e2cbebab959b 100644
--- a/drivers/media/video/c-qcam.c
+++ b/drivers/media/video/c-qcam.c
@@ -809,8 +809,8 @@ static int init_cqcam(struct parport *port)
                return -ENODEV;
        }
-        printk(KERN_INFO "video%d: Colour QuickCam found on %s\n",
+        printk(KERN_INFO "%s: Colour QuickCam found on %s\n",
-               qcam->vdev.num, qcam->pport->name);
+               video_device_node_name(&qcam->vdev), qcam->pport->name);
        qcams[num_cams++] = qcam;
diff --git a/drivers/media/video/cafe_ccic.c b/drivers/media/video/cafe_ccic.c
index 10230cb3d210..7bb9c1ec7819 100644
--- a/drivers/media/video/cafe_ccic.c
+++ b/drivers/media/video/cafe_ccic.c
@@ -1723,7 +1723,6 @@ static const struct v4l2_ioctl_ops cafe_v4l_ioctl_ops = {
 static struct video_device cafe_v4l_template = {
        .name = "cafe",
-        .minor = -1, /* Get one dynamically */
        .tvnorms = V4L2_STD_NTSC_M,
        .current_norm = V4L2_STD_NTSC_M,  /* make mplayer happy */
diff --git a/drivers/media/video/cpia.c b/drivers/media/video/cpia.c
index 2377313c041a..551ddf216a4b 100644
--- a/drivers/media/video/cpia.c
+++ b/drivers/media/video/cpia.c
@@ -32,6 +32,7 @@
 #include <linux/fs.h>
 #include <linux/vmalloc.h>
 #include <linux/sched.h>
+#include <linux/seq_file.h>
 #include <linux/slab.h>
 #include <linux/proc_fs.h>
 #include <linux/ctype.h>
@@ -244,72 +245,67 @@ static void rvfree(void *mem, unsigned long size)
 #ifdef CONFIG_PROC_FS
 static struct proc_dir_entry *cpia_proc_root=NULL;
-static int cpia_read_proc(char *page, char **start, off_t off,
+static int cpia_proc_show(struct seq_file *m, void *v)
-                          int count, int *eof, void *data)
 {
-        char *out = page;
+        struct cam_data *cam = m->private;
-        int len, tmp;
+        int tmp;
-        struct cam_data *cam = data;
        char tmpstr[29];
-        /* IMPORTANT: This output MUST be kept under PAGE_SIZE
+        seq_printf(m, "read-only\n-----------------------\n");
-         *            or we need to get more sophisticated. */
+        seq_printf(m, "V4L Driver version:       %d.%d.%d\n",
-        out += sprintf(out, "read-only\n-----------------------\n");
-        out += sprintf(out, "V4L Driver version:       %d.%d.%d\n",
                       CPIA_MAJ_VER, CPIA_MIN_VER, CPIA_PATCH_VER);
-        out += sprintf(out, "CPIA Version:             %d.%02d (%d.%d)\n",
+        seq_printf(m, "CPIA Version:             %d.%02d (%d.%d)\n",
                       cam->params.version.firmwareVersion,
                       cam->params.version.firmwareRevision,
                       cam->params.version.vcVersion,
                       cam->params.version.vcRevision);
-        out += sprintf(out, "CPIA PnP-ID:              %04x:%04x:%04x\n",
+        seq_printf(m, "CPIA PnP-ID:              %04x:%04x:%04x\n",
                       cam->params.pnpID.vendor, cam->params.pnpID.product,
                       cam->params.pnpID.deviceRevision);
-        out += sprintf(out, "VP-Version:               %d.%d %04x\n",
+        seq_printf(m, "VP-Version:               %d.%d %04x\n",
                       cam->params.vpVersion.vpVersion,
                       cam->params.vpVersion.vpRevision,
                       cam->params.vpVersion.cameraHeadID);
-        out += sprintf(out, "system_state:             %#04x\n",
+        seq_printf(m, "system_state:             %#04x\n",
                       cam->params.status.systemState);
-        out += sprintf(out, "grab_state:               %#04x\n",
+        seq_printf(m, "grab_state:               %#04x\n",
                       cam->params.status.grabState);
-        out += sprintf(out, "stream_state:             %#04x\n",
+        seq_printf(m, "stream_state:             %#04x\n",
                       cam->params.status.streamState);
-        out += sprintf(out, "fatal_error:              %#04x\n",
+        seq_printf(m, "fatal_error:              %#04x\n",
                       cam->params.status.fatalError);
-        out += sprintf(out, "cmd_error:                %#04x\n",
+        seq_printf(m, "cmd_error:                %#04x\n",
                       cam->params.status.cmdError);
-        out += sprintf(out, "debug_flags:              %#04x\n",
+        seq_printf(m, "debug_flags:              %#04x\n",
                       cam->params.status.debugFlags);
-        out += sprintf(out, "vp_status:                %#04x\n",
+        seq_printf(m, "vp_status:                %#04x\n",
                       cam->params.status.vpStatus);
-        out += sprintf(out, "error_code:               %#04x\n",
+        seq_printf(m, "error_code:               %#04x\n",
                       cam->params.status.errorCode);
        /* QX3 specific entries */
        if (cam->params.qx3.qx3_detected) {
-                out += sprintf(out, "button:                   %4d\n",
+                seq_printf(m, "button:                   %4d\n",
                               cam->params.qx3.button);
-                out += sprintf(out, "cradled:                  %4d\n",
+                seq_printf(m, "cradled:                  %4d\n",
                               cam->params.qx3.cradled);
        }
-        out += sprintf(out, "video_size:               %s\n",
+        seq_printf(m, "video_size:               %s\n",
                       cam->params.format.videoSize == VIDEOSIZE_CIF ?
                       "CIF " : "QCIF");
-        out += sprintf(out, "roi:                      (%3d, %3d) to (%3d, %3d)\n",
+        seq_printf(m, "roi:                      (%3d, %3d) to (%3d, %3d)\n",
                       cam->params.roi.colStart*8,
                       cam->params.roi.rowStart*4,
                       cam->params.roi.colEnd*8,
                       cam->params.roi.rowEnd*4);
-        out += sprintf(out, "actual_fps:               %3d\n", cam->fps);
+        seq_printf(m, "actual_fps:               %3d\n", cam->fps);
-        out += sprintf(out, "transfer_rate:            %4dkB/s\n",
+        seq_printf(m, "transfer_rate:            %4dkB/s\n",
                       cam->transfer_rate);
-        out += sprintf(out, "\nread-write\n");
+        seq_printf(m, "\nread-write\n");
-        out += sprintf(out, "-----------------------  current       min"
+        seq_printf(m, "-----------------------  current       min"
                       "       max   default  comment\n");
-        out += sprintf(out, "brightness:             %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "brightness:             %8d  %8d  %8d  %8d\n",
                       cam->params.colourParams.brightness, 0, 100, 50);
        if (cam->params.version.firmwareVersion == 1 &&
           cam->params.version.firmwareRevision == 2)
@@ -318,26 +314,26 @@ static int cpia_read_proc(char *page, char **start, off_t off,
        else
                tmp = 96;
-        out += sprintf(out, "contrast:               %8d  %8d  %8d  %8d"
+        seq_printf(m, "contrast:               %8d  %8d  %8d  %8d"
                       "  steps of 8\n",
                       cam->params.colourParams.contrast, 0, tmp, 48);
-        out += sprintf(out, "saturation:             %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "saturation:             %8d  %8d  %8d  %8d\n",
                       cam->params.colourParams.saturation, 0, 100, 50);
        tmp = (25000+5000*cam->params.sensorFps.baserate)/
              (1<<cam->params.sensorFps.divisor);
-        out += sprintf(out, "sensor_fps:             %4d.%03d  %8d  %8d  %8d\n",
+        seq_printf(m, "sensor_fps:             %4d.%03d  %8d  %8d  %8d\n",
                       tmp/1000, tmp%1000, 3, 30, 15);
-        out += sprintf(out, "stream_start_line:      %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "stream_start_line:      %8d  %8d  %8d  %8d\n",
                       2*cam->params.streamStartLine, 0,
                       cam->params.format.videoSize == VIDEOSIZE_CIF ? 288:144,
                       cam->params.format.videoSize == VIDEOSIZE_CIF ? 240:120);
-        out += sprintf(out, "sub_sample:             %8s  %8s  %8s  %8s\n",
+        seq_printf(m, "sub_sample:             %8s  %8s  %8s  %8s\n",
                       cam->params.format.subSample == SUBSAMPLE_420 ?
                       "420" : "422", "420", "422", "422");
-        out += sprintf(out, "yuv_order:              %8s  %8s  %8s  %8s\n",
+        seq_printf(m, "yuv_order:              %8s  %8s  %8s  %8s\n",
                       cam->params.format.yuvOrder == YUVORDER_YUYV ?
                       "YUYV" : "UYVY", "YUYV" , "UYVY", "YUYV");
-        out += sprintf(out, "ecp_timing:             %8s  %8s  %8s  %8s\n",
+        seq_printf(m, "ecp_timing:             %8s  %8s  %8s  %8s\n",
                       cam->params.ecpTiming ? "slow" : "normal", "slow",
                       "normal", "normal");
@@ -346,13 +342,13 @@ static int cpia_read_proc(char *page, char **start, off_t off,
        } else {
                sprintf(tmpstr, "manual");
        }
-        out += sprintf(out, "color_balance_mode:     %8s  %8s  %8s"
+        seq_printf(m, "color_balance_mode:     %8s  %8s  %8s"
                       "  %8s\n",  tmpstr, "manual", "auto", "auto");
-        out += sprintf(out, "red_gain:               %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "red_gain:               %8d  %8d  %8d  %8d\n",
                       cam->params.colourBalance.redGain, 0, 212, 32);
-        out += sprintf(out, "green_gain:             %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "green_gain:             %8d  %8d  %8d  %8d\n",
                       cam->params.colourBalance.greenGain, 0, 212, 6);
-        out += sprintf(out, "blue_gain:              %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "blue_gain:              %8d  %8d  %8d  %8d\n",
                       cam->params.colourBalance.blueGain, 0, 212, 92);
        if (cam->params.version.firmwareVersion == 1 &&
@@ -363,10 +359,10 @@ static int cpia_read_proc(char *page, char **start, off_t off,
                sprintf(tmpstr, "%8d  %8d  %8d", 1, 8, 2);
        if (cam->params.exposure.gainMode == 0)
-                out += sprintf(out, "max_gain:                unknown  %28s"
+                seq_printf(m, "max_gain:                unknown  %28s"
                               "  powers of 2\n", tmpstr);
        else
-                out += sprintf(out, "max_gain:               %8d  %28s"
+                seq_printf(m, "max_gain:               %8d  %28s"
                               "  1,2,4 or 8 \n",
                               1<<(cam->params.exposure.gainMode-1), tmpstr);
@@ -382,12 +378,12 @@ static int cpia_read_proc(char *page, char **start, off_t off,
                sprintf(tmpstr, "unknown");
                break;
        }
-        out += sprintf(out, "exposure_mode:          %8s  %8s  %8s"
+        seq_printf(m, "exposure_mode:          %8s  %8s  %8s"
                       "  %8s\n",  tmpstr, "manual", "auto", "auto");
-        out += sprintf(out, "centre_weight:          %8s  %8s  %8s  %8s\n",
+        seq_printf(m, "centre_weight:          %8s  %8s  %8s  %8s\n",
                       (2-cam->params.exposure.centreWeight) ? "on" : "off",
                       "off", "on", "on");
-        out += sprintf(out, "gain:                   %8d  %8d  max_gain  %8d  1,2,4,8 possible\n",
+        seq_printf(m, "gain:                   %8d  %8d  max_gain  %8d  1,2,4,8 possible\n",
                       1<<cam->params.exposure.gain, 1, 1);
        if (cam->params.version.firmwareVersion == 1 &&
           cam->params.version.firmwareRevision == 2)
@@ -396,7 +392,7 @@ static int cpia_read_proc(char *page, char **start, off_t off,
        else
                tmp = 510;
-        out += sprintf(out, "fine_exp:               %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "fine_exp:               %8d  %8d  %8d  %8d\n",
                       cam->params.exposure.fineExp*2, 0, tmp, 0);
        if (cam->params.version.firmwareVersion == 1 &&
           cam->params.version.firmwareRevision == 2)
@@ -405,127 +401,122 @@ static int cpia_read_proc(char *page, char **start, off_t off,
        else
                tmp = MAX_EXP;
-        out += sprintf(out, "coarse_exp:             %8d  %8d  %8d"
+        seq_printf(m, "coarse_exp:             %8d  %8d  %8d"
                       "  %8d\n", cam->params.exposure.coarseExpLo+
                       256*cam->params.exposure.coarseExpHi, 0, tmp, 185);
-        out += sprintf(out, "red_comp:               %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "red_comp:               %8d  %8d  %8d  %8d\n",
                       cam->params.exposure.redComp, COMP_RED, 255, COMP_RED);
-        out += sprintf(out, "green1_comp:            %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "green1_comp:            %8d  %8d  %8d  %8d\n",
                       cam->params.exposure.green1Comp, COMP_GREEN1, 255,
                       COMP_GREEN1);
-        out += sprintf(out, "green2_comp:            %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "green2_comp:            %8d  %8d  %8d  %8d\n",
                       cam->params.exposure.green2Comp, COMP_GREEN2, 255,
                       COMP_GREEN2);
-        out += sprintf(out, "blue_comp:              %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "blue_comp:              %8d  %8d  %8d  %8d\n",
                       cam->params.exposure.blueComp, COMP_BLUE, 255, COMP_BLUE);
-        out += sprintf(out, "apcor_gain1:            %#8x  %#8x  %#8x  %#8x\n",
+        seq_printf(m, "apcor_gain1:            %#8x  %#8x  %#8x  %#8x\n",
                       cam->params.apcor.gain1, 0, 0xff, 0x1c);
-        out += sprintf(out, "apcor_gain2:            %#8x  %#8x  %#8x  %#8x\n",
+        seq_printf(m, "apcor_gain2:            %#8x  %#8x  %#8x  %#8x\n",
                       cam->params.apcor.gain2, 0, 0xff, 0x1a);
-        out += sprintf(out, "apcor_gain4:            %#8x  %#8x  %#8x  %#8x\n",
+        seq_printf(m, "apcor_gain4:            %#8x  %#8x  %#8x  %#8x\n",
                       cam->params.apcor.gain4, 0, 0xff, 0x2d);
-        out += sprintf(out, "apcor_gain8:            %#8x  %#8x  %#8x  %#8x\n",
+        seq_printf(m, "apcor_gain8:            %#8x  %#8x  %#8x  %#8x\n",
                       cam->params.apcor.gain8, 0, 0xff, 0x2a);
-        out += sprintf(out, "vl_offset_gain1:        %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "vl_offset_gain1:        %8d  %8d  %8d  %8d\n",
                       cam->params.vlOffset.gain1, 0, 255, 24);
-        out += sprintf(out, "vl_offset_gain2:        %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "vl_offset_gain2:        %8d  %8d  %8d  %8d\n",
                       cam->params.vlOffset.gain2, 0, 255, 28);
-        out += sprintf(out, "vl_offset_gain4:        %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "vl_offset_gain4:        %8d  %8d  %8d  %8d\n",
                       cam->params.vlOffset.gain4, 0, 255, 30);
-        out += sprintf(out, "vl_offset_gain8:        %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "vl_offset_gain8:        %8d  %8d  %8d  %8d\n",
                       cam->params.vlOffset.gain8, 0, 255, 30);
-        out += sprintf(out, "flicker_control:        %8s  %8s  %8s  %8s\n",
+        seq_printf(m, "flicker_control:        %8s  %8s  %8s  %8s\n",
                       cam->params.flickerControl.flickerMode ? "on" : "off",
                       "off", "on", "off");
-        out += sprintf(out, "mains_frequency:        %8d  %8d  %8d  %8d"
+        seq_printf(m, "mains_frequency:        %8d  %8d  %8d  %8d"
                       " only 50/60\n",
                       cam->mainsFreq ? 60 : 50, 50, 60, 50);
        if(cam->params.flickerControl.allowableOverExposure < 0)
-                out += sprintf(out, "allowable_overexposure: %4dauto      auto  %8d      auto\n",
+                seq_printf(m, "allowable_overexposure: %4dauto      auto  %8d      auto\n",
                               -cam->params.flickerControl.allowableOverExposure,
                               255);
        else
-                out += sprintf(out, "allowable_overexposure: %8d      auto  %8d      auto\n",
+                seq_printf(m, "allowable_overexposure: %8d      auto  %8d      auto\n",
                               cam->params.flickerControl.allowableOverExposure,
                               255);
-        out += sprintf(out, "compression_mode:       ");
+        seq_printf(m, "compression_mode:       ");
        switch(cam->params.compression.mode) {
        case CPIA_COMPRESSION_NONE:
-                out += sprintf(out, "%8s", "none");
+                seq_printf(m, "%8s", "none");
                break;
        case CPIA_COMPRESSION_AUTO:
-                out += sprintf(out, "%8s", "auto");
+                seq_printf(m, "%8s", "auto");
                break;
        case CPIA_COMPRESSION_MANUAL:
-                out += sprintf(out, "%8s", "manual");
+                seq_printf(m, "%8s", "manual");
                break;
        default:
-                out += sprintf(out, "%8s", "unknown");
+                seq_printf(m, "%8s", "unknown");
                break;
        }
-        out += sprintf(out, "    none,auto,manual      auto\n");
+        seq_printf(m, "    none,auto,manual      auto\n");
-        out += sprintf(out, "decimation_enable:      %8s  %8s  %8s  %8s\n",
+        seq_printf(m, "decimation_enable:      %8s  %8s  %8s  %8s\n",
                       cam->params.compression.decimation ==
                       DECIMATION_ENAB ? "on":"off", "off", "on",
                       "off");
-        out += sprintf(out, "compression_target:    %9s %9s %9s %9s\n",
+        seq_printf(m, "compression_target:    %9s %9s %9s %9s\n",
                       cam->params.compressionTarget.frTargeting  ==
                       CPIA_COMPRESSION_TARGET_FRAMERATE ?
                       "framerate":"quality",
                       "framerate", "quality", "quality");
-        out += sprintf(out, "target_framerate:       %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "target_framerate:       %8d  %8d  %8d  %8d\n",
                       cam->params.compressionTarget.targetFR, 1, 30, 15);
-        out += sprintf(out, "target_quality:         %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "target_quality:         %8d  %8d  %8d  %8d\n",
                       cam->params.compressionTarget.targetQ, 1, 64, 5);
-        out += sprintf(out, "y_threshold:            %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "y_threshold:            %8d  %8d  %8d  %8d\n",
                       cam->params.yuvThreshold.yThreshold, 0, 31, 6);
-        out += sprintf(out, "uv_threshold:           %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "uv_threshold:           %8d  %8d  %8d  %8d\n",
                       cam->params.yuvThreshold.uvThreshold, 0, 31, 6);
-        out += sprintf(out, "hysteresis:             %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "hysteresis:             %8d  %8d  %8d  %8d\n",
                       cam->params.compressionParams.hysteresis, 0, 255, 3);
-        out += sprintf(out, "threshold_max:          %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "threshold_max:          %8d  %8d  %8d  %8d\n",
                       cam->params.compressionParams.threshMax, 0, 255, 11);
-        out += sprintf(out, "small_step:             %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "small_step:             %8d  %8d  %8d  %8d\n",
                       cam->params.compressionParams.smallStep, 0, 255, 1);
-        out += sprintf(out, "large_step:             %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "large_step:             %8d  %8d  %8d  %8d\n",
                       cam->params.compressionParams.largeStep, 0, 255, 3);
-        out += sprintf(out, "decimation_hysteresis:  %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "decimation_hysteresis:  %8d  %8d  %8d  %8d\n",
                       cam->params.compressionParams.decimationHysteresis,
                       0, 255, 2);
-        out += sprintf(out, "fr_diff_step_thresh:    %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "fr_diff_step_thresh:    %8d  %8d  %8d  %8d\n",
                       cam->params.compressionParams.frDiffStepThresh,
                       0, 255, 5);
-        out += sprintf(out, "q_diff_step_thresh:     %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "q_diff_step_thresh:     %8d  %8d  %8d  %8d\n",
                       cam->params.compressionParams.qDiffStepThresh,
                       0, 255, 3);
-        out += sprintf(out, "decimation_thresh_mod:  %8d  %8d  %8d  %8d\n",
+        seq_printf(m, "decimation_thresh_mod:  %8d  %8d  %8d  %8d\n",
                       cam->params.compressionParams.decimationThreshMod,
                       0, 255, 2);
        /* QX3 specific entries */
        if (cam->params.qx3.qx3_detected) {
-                out += sprintf(out, "toplight:               %8s  %8s  %8s  %8s\n",
+                seq_printf(m, "toplight:               %8s  %8s  %8s  %8s\n",
                               cam->params.qx3.toplight ? "on" : "off",
                               "off", "on", "off");
-                out += sprintf(out, "bottomlight:            %8s  %8s  %8s  %8s\n",
+                seq_printf(m, "bottomlight:            %8s  %8s  %8s  %8s\n",
                               cam->params.qx3.bottomlight ? "on" : "off",
                               "off", "on", "off");
        }
-        len = out - page;
+        return 0;
-        len -= off;
-        if (len < count) {
-                *eof = 1;
-                if (len <= 0) return 0;
-        } else
-                len = count;
-        *start = page + off;
-        return len;
 }
+static int cpia_proc_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, cpia_proc_show, PDE(inode)->data);
+}
-static int match(char *checkstr, char **buffer, unsigned long *count,
+static int match(char *checkstr, char **buffer, size_t *count,
                 int *find_colon, int *err)
 {
        int ret, colon_found = 1;
@@ -551,7 +542,7 @@ static int match(char *checkstr, char **buffer, unsigned long *count,
        return ret;
 }
-static unsigned long int value(char **buffer, unsigned long *count, int *err)
+static unsigned long int value(char **buffer, size_t *count, int *err)
 {
        char *p;
        unsigned long int ret;
@@ -565,10 +556,10 @@ static unsigned long int value(char **buffer, unsigned long *count, int *err)
        return ret;
 }
-static int cpia_write_proc(struct file *file, const char __user *buf,
+static ssize_t cpia_proc_write(struct file *file, const char __user *buf,
-                           unsigned long count, void *data)
+                               size_t count, loff_t *pos)
 {
-        struct cam_data *cam = data;
+        struct cam_data *cam = PDE(file->f_path.dentry->d_inode)->data;
        struct cam_params new_params;
        char *page, *buffer;
        int retval, find_colon;
@@ -582,7 +573,7 @@ static int cpia_write_proc(struct file *file, const char __user *buf,
         * from the comx driver
         */
        if (count > PAGE_SIZE) {
-                printk(KERN_ERR "count is %lu > %d!!!\n", count, (int)PAGE_SIZE);
+                printk(KERN_ERR "count is %zu > %d!!!\n", count, (int)PAGE_SIZE);
                return -ENOSPC;
        }
@@ -1340,23 +1331,28 @@ out:
        return retval;
 }
+static const struct file_operations cpia_proc_fops = {
+        .owner          = THIS_MODULE,
+        .open           = cpia_proc_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+        .write          = cpia_proc_write,
+};
 static void create_proc_cpia_cam(struct cam_data *cam)
 {
-        char name[5 + 1 + 10 + 1];
        struct proc_dir_entry *ent;
        if (!cpia_proc_root || !cam)
                return;
-        snprintf(name, sizeof(name), "video%d", cam->vdev.num);
+        ent = proc_create_data(video_device_node_name(&cam->vdev),
+                               S_IRUGO|S_IWUSR, cpia_proc_root,
-        ent = create_proc_entry(name, S_IFREG|S_IRUGO|S_IWUSR, cpia_proc_root);
+                               &cpia_proc_fops, cam);
        if (!ent)
                return;
-        ent->data = cam;
-        ent->read_proc = cpia_read_proc;
-        ent->write_proc = cpia_write_proc;
        /*
           size of the proc entry is 3736 bytes for the standard webcam;
           the extra features of the QX3 microscope add 189 bytes.
@@ -1368,13 +1364,10 @@ static void create_proc_cpia_cam(struct cam_data *cam)
 static void destroy_proc_cpia_cam(struct cam_data *cam)
 {
-        char name[5 + 1 + 10 + 1];
        if (!cam || !cam->proc_entry)
                return;
-        snprintf(name, sizeof(name), "video%d", cam->vdev.num);
+        remove_proc_entry(video_device_node_name(&cam->vdev), cpia_proc_root);
-        remove_proc_entry(name, cpia_proc_root);
        cam->proc_entry = NULL;
 }
@@ -3999,7 +3992,7 @@ void cpia_unregister_camera(struct cam_data *cam)
        }
 #ifdef CONFIG_PROC_FS
-        DBG("destroying /proc/cpia/video%d\n", cam->vdev.num);
+        DBG("destroying /proc/cpia/%s\n", video_device_node_name(&cam->vdev));
        destroy_proc_cpia_cam(cam);
 #endif
        if (!cam->open_count) {
diff --git a/drivers/media/video/cpia2/cpia2_v4l.c b/drivers/media/video/cpia2/cpia2_v4l.c
index 0b4a8f309cfa..6f91415eb7b4 100644
--- a/drivers/media/video/cpia2/cpia2_v4l.c
+++ b/drivers/media/video/cpia2/cpia2_v4l.c
@@ -38,17 +38,12 @@
 #include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/videodev.h>
+#include <linux/stringify.h>
 #include <media/v4l2-ioctl.h>
 #include "cpia2.h"
 #include "cpia2dev.h"
-//#define _CPIA2_DEBUG_
-#define MAKE_STRING_1(x)        #x
-#define MAKE_STRING(x)  MAKE_STRING_1(x)
 static int video_nr = -1;
 module_param(video_nr, int, 0);
 MODULE_PARM_DESC(video_nr,"video device to register (0=/dev/video0, etc)");
@@ -60,26 +55,26 @@ MODULE_PARM_DESC(buffer_size, "Size for each frame buffer in bytes (default 68k)
 static int num_buffers = 3;
 module_param(num_buffers, int, 0);
 MODULE_PARM_DESC(num_buffers, "Number of frame buffers (1-"
-                 MAKE_STRING(VIDEO_MAX_FRAME) ", default 3)");
+                 __stringify(VIDEO_MAX_FRAME) ", default 3)");
 static int alternate = DEFAULT_ALT;
 module_param(alternate, int, 0);
-MODULE_PARM_DESC(alternate, "USB Alternate (" MAKE_STRING(USBIF_ISO_1) "-"
+MODULE_PARM_DESC(alternate, "USB Alternate (" __stringify(USBIF_ISO_1) "-"
-                 MAKE_STRING(USBIF_ISO_6) ", default "
+                 __stringify(USBIF_ISO_6) ", default "
-                 MAKE_STRING(DEFAULT_ALT) ")");
+                 __stringify(DEFAULT_ALT) ")");
 static int flicker_freq = 60;
 module_param(flicker_freq, int, 0);
-MODULE_PARM_DESC(flicker_freq, "Flicker frequency (" MAKE_STRING(50) "or"
+MODULE_PARM_DESC(flicker_freq, "Flicker frequency (" __stringify(50) "or"
-                 MAKE_STRING(60) ", default "
+                 __stringify(60) ", default "
-                 MAKE_STRING(60) ")");
+                 __stringify(60) ")");
 static int flicker_mode = NEVER_FLICKER;
 module_param(flicker_mode, int, 0);
 MODULE_PARM_DESC(flicker_mode,
-                 "Flicker supression (" MAKE_STRING(NEVER_FLICKER) "or"
+                 "Flicker supression (" __stringify(NEVER_FLICKER) "or"
-                 MAKE_STRING(ANTI_FLICKER_ON) ", default "
+                 __stringify(ANTI_FLICKER_ON) ", default "
-                 MAKE_STRING(NEVER_FLICKER) ")");
+                 __stringify(NEVER_FLICKER) ")");
 MODULE_AUTHOR("Steve Miller (STMicroelectronics) <steve.miller@st.com>");
 MODULE_DESCRIPTION("V4L-driver for STMicroelectronics CPiA2 based cameras");
@@ -1926,7 +1921,6 @@ static const struct v4l2_file_operations fops_template = {
 static struct video_device cpia2_template = {
        /* I could not find any place for the old .initialize initializer?? */
        .name=          "CPiA2 Camera",
-        .minor=         -1,
        .fops=          &fops_template,
        .release=       video_device_release,
 };
@@ -1967,9 +1961,9 @@ void cpia2_unregister_camera(struct camera_data *cam)
        if (!cam->open_count) {
                video_unregister_device(cam->vdev);
        } else {
-                LOG("/dev/video%d removed while open, "
+                LOG("%s removed while open, deferring "
-                    "deferring video_unregister_device\n",
+                    "video_unregister_device\n",
-                    cam->vdev->num);
+                    video_device_node_name(cam->vdev));
        }
 }
diff --git a/drivers/media/video/cx18/cx18-fileops.c b/drivers/media/video/cx18/cx18-fileops.c
index 4e278db31cc9..c0885c69fd89 100644
--- a/drivers/media/video/cx18/cx18-fileops.c
+++ b/drivers/media/video/cx18/cx18-fileops.c
@@ -758,8 +758,8 @@ int cx18_v4l2_open(struct file *filp)
        mutex_lock(&cx->serialize_lock);
        if (cx18_init_on_first_open(cx)) {
-                CX18_ERR("Failed to initialize on minor %d\n",
+                CX18_ERR("Failed to initialize on %s\n",
-                         video_dev->minor);
+                         video_device_node_name(video_dev));
                mutex_unlock(&cx->serialize_lock);
                return -ENXIO;
        }
diff --git a/drivers/media/video/cx18/cx18-streams.c b/drivers/media/video/cx18/cx18-streams.c
index c398651dd74c..987a9308d938 100644
--- a/drivers/media/video/cx18/cx18-streams.c
+++ b/drivers/media/video/cx18/cx18-streams.c
@@ -219,6 +219,7 @@ static int cx18_reg_dev(struct cx18 *cx, int type)
 {
        struct cx18_stream *s = &cx->streams[type];
        int vfl_type = cx18_stream_info[type].vfl_type;
+        const char *name;
        int num, ret;
        /* TODO: Shouldn't this be a VFL_TYPE_TRANSPORT or something?
@@ -258,31 +259,30 @@ static int cx18_reg_dev(struct cx18 *cx, int type)
                s->video_dev = NULL;
                return ret;
        }
-        num = s->video_dev->num;
+        name = video_device_node_name(s->video_dev);
        switch (vfl_type) {
        case VFL_TYPE_GRABBER:
-                CX18_INFO("Registered device video%d for %s "
+                CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
-                          "(%d x %d.%02d kB)\n",
+                          name, s->name, cx->stream_buffers[type],
-                          num, s->name, cx->stream_buffers[type],
                          cx->stream_buf_size[type] / 1024,
                          (cx->stream_buf_size[type] * 100 / 1024) % 100);
                break;
        case VFL_TYPE_RADIO:
-                CX18_INFO("Registered device radio%d for %s\n",
+                CX18_INFO("Registered device %s for %s\n", name, s->name);
-                        num, s->name);
                break;
        case VFL_TYPE_VBI:
                if (cx->stream_buffers[type])
-                        CX18_INFO("Registered device vbi%d for %s "
+                        CX18_INFO("Registered device %s for %s "
                                  "(%d x %d bytes)\n",
-                                  num, s->name, cx->stream_buffers[type],
+                                  name, s->name, cx->stream_buffers[type],
                                  cx->stream_buf_size[type]);
                else
-                        CX18_INFO("Registered device vbi%d for %s\n",
+                        CX18_INFO("Registered device %s for %s\n",
-                                num, s->name);
+                                name, s->name);
                break;
        }
diff --git a/drivers/media/video/cx231xx/cx231xx-cards.c b/drivers/media/video/cx231xx/cx231xx-cards.c
index 319c459459e0..a54908235009 100644
--- a/drivers/media/video/cx231xx/cx231xx-cards.c
+++ b/drivers/media/video/cx231xx/cx231xx-cards.c
@@ -68,19 +68,19 @@ struct cx231xx_board cx231xx_boards[] = {
                                .type = CX231XX_VMUX_TELEVISION,
                                .vmux = CX231XX_VIN_3_1,
                                .amux = CX231XX_AMUX_VIDEO,
-                                .gpio = 0,
+                                .gpio = NULL,
                        }, {
                                .type = CX231XX_VMUX_COMPOSITE1,
                                .vmux = CX231XX_VIN_2_1,
                                .amux = CX231XX_AMUX_LINE_IN,
-                                .gpio = 0,
+                                .gpio = NULL,
                        }, {
                                .type = CX231XX_VMUX_SVIDEO,
                                .vmux = CX231XX_VIN_1_1 |
                                        (CX231XX_VIN_1_2 << 8) |
                                        CX25840_SVIDEO_ON,
                                .amux = CX231XX_AMUX_LINE_IN,
-                                .gpio = 0,
+                                .gpio = NULL,
                        }
                },
        },
@@ -107,19 +107,19 @@ struct cx231xx_board cx231xx_boards[] = {
                                .type = CX231XX_VMUX_TELEVISION,
                                .vmux = CX231XX_VIN_3_1,
                                .amux = CX231XX_AMUX_VIDEO,
-                                .gpio = 0,
+                                .gpio = NULL,
                        }, {
                                .type = CX231XX_VMUX_COMPOSITE1,
                                .vmux = CX231XX_VIN_2_1,
                                .amux = CX231XX_AMUX_LINE_IN,
-                                .gpio = 0,
+                                .gpio = NULL,
                        }, {
                                .type = CX231XX_VMUX_SVIDEO,
                                .vmux = CX231XX_VIN_1_1 |
                                        (CX231XX_VIN_1_2 << 8) |
                                        CX25840_SVIDEO_ON,
                                .amux = CX231XX_AMUX_LINE_IN,
-                                .gpio = 0,
+                                .gpio = NULL,
                        }
                },
        },
@@ -147,19 +147,19 @@ struct cx231xx_board cx231xx_boards[] = {
                                .type = CX231XX_VMUX_TELEVISION,
                                .vmux = CX231XX_VIN_3_1,
                                .amux = CX231XX_AMUX_VIDEO,
-                                .gpio = 0,
+                                .gpio = NULL,
                        }, {
                                .type = CX231XX_VMUX_COMPOSITE1,
                                .vmux = CX231XX_VIN_2_1,
                                .amux = CX231XX_AMUX_LINE_IN,
-                                .gpio = 0,
+                                .gpio = NULL,
                        }, {
                                .type = CX231XX_VMUX_SVIDEO,
                                .vmux = CX231XX_VIN_1_1 |
                                        (CX231XX_VIN_1_2 << 8) |
                                        CX25840_SVIDEO_ON,
                                .amux = CX231XX_AMUX_LINE_IN,
-                                .gpio = 0,
+                                .gpio = NULL,
                        }
                },
        },
@@ -856,8 +856,9 @@ static void cx231xx_usb_disconnect(struct usb_interface *interface)
        if (dev->users) {
                cx231xx_warn
-                    ("device /dev/video%d is open! Deregistration and memory "
+                    ("device %s is open! Deregistration and memory "
-                     "deallocation are deferred on close.\n", dev->vdev->num);
+                     "deallocation are deferred on close.\n",
+                     video_device_node_name(dev->vdev));
                dev->state |= DEV_MISCONFIGURED;
                cx231xx_uninit_isoc(dev);
diff --git a/drivers/media/video/cx231xx/cx231xx-core.c b/drivers/media/video/cx231xx/cx231xx-core.c
index 0d333e679f70..4a60dfbc347d 100644
--- a/drivers/media/video/cx231xx/cx231xx-core.c
+++ b/drivers/media/video/cx231xx/cx231xx-core.c
@@ -66,32 +66,6 @@ MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
 static LIST_HEAD(cx231xx_devlist);
 static DEFINE_MUTEX(cx231xx_devlist_mutex);
-struct cx231xx *cx231xx_get_device(int minor,
-                                   enum v4l2_buf_type *fh_type, int *has_radio)
-{
-        struct cx231xx *h, *dev = NULL;
-        *fh_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        *has_radio = 0;
-        mutex_lock(&cx231xx_devlist_mutex);
-        list_for_each_entry(h, &cx231xx_devlist, devlist) {
-                if (h->vdev->minor == minor)
-                        dev = h;
-                if (h->vbi_dev->minor == minor) {
-                        dev = h;
-                        *fh_type = V4L2_BUF_TYPE_VBI_CAPTURE;
-                }
-                if (h->radio_dev && h->radio_dev->minor == minor) {
-                        dev = h;
-                        *has_radio = 1;
-                }
-        }
-        mutex_unlock(&cx231xx_devlist_mutex);
-        return dev;
-}
 /*
 * cx231xx_realease_resources()
 * unregisters the v4l2,i2c and usb devices
diff --git a/drivers/media/video/cx231xx/cx231xx-input.c b/drivers/media/video/cx231xx/cx231xx-input.c
index cd135f01b9c1..15826f98b688 100644
--- a/drivers/media/video/cx231xx/cx231xx-input.c
+++ b/drivers/media/video/cx231xx/cx231xx-input.c
@@ -197,8 +197,7 @@ int cx231xx_ir_init(struct cx231xx *dev)
        usb_make_path(dev->udev, ir->phys, sizeof(ir->phys));
        strlcat(ir->phys, "/input0", sizeof(ir->phys));
-        err = ir_input_init(input_dev, &ir->ir, IR_TYPE_OTHER,
+        err = ir_input_init(input_dev, &ir->ir, IR_TYPE_OTHER);
-                            dev->board.ir_codes);
        if (err < 0)
                goto err_out_free;
@@ -217,7 +216,7 @@ int cx231xx_ir_init(struct cx231xx *dev)
        cx231xx_ir_start(ir);
        /* all done */
-        err = input_register_device(ir->input);
+        err = ir_input_register(ir->input, dev->board.ir_codes);
        if (err)
                goto err_out_stop;
@@ -226,8 +225,6 @@ err_out_stop:
        cx231xx_ir_stop(ir);
        dev->ir = NULL;
 err_out_free:
-        ir_input_free(input_dev);
-        input_free_device(input_dev);
        kfree(ir);
        return err;
 }
@@ -241,8 +238,7 @@ int cx231xx_ir_fini(struct cx231xx *dev)
                return 0;
        cx231xx_ir_stop(ir);
-        ir_input_free(ir->input);
+        ir_input_unregister(ir->input);
-        input_unregister_device(ir->input);
        kfree(ir);
        /* done */
diff --git a/drivers/media/video/cx231xx/cx231xx-video.c b/drivers/media/video/cx231xx/cx231xx-video.c
index d095aa0d6d19..d4f546f11d74 100644
--- a/drivers/media/video/cx231xx/cx231xx-video.c
+++ b/drivers/media/video/cx231xx/cx231xx-video.c
@@ -1916,20 +1916,29 @@ static int radio_queryctrl(struct file *file, void *priv,
 */
 static int cx231xx_v4l2_open(struct file *filp)
 {
-        int minor = video_devdata(filp)->minor;
        int errCode = 0, radio = 0;
-        struct cx231xx *dev = NULL;
+        struct video_device *vdev = video_devdata(filp);
+        struct cx231xx *dev = video_drvdata(filp);
        struct cx231xx_fh *fh;
        enum v4l2_buf_type fh_type = 0;
-        dev = cx231xx_get_device(minor, &fh_type, &radio);
+        switch (vdev->vfl_type) {
-        if (NULL == dev)
+        case VFL_TYPE_GRABBER:
-                return -ENODEV;
+                fh_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+                break;
+        case VFL_TYPE_VBI:
+                fh_type = V4L2_BUF_TYPE_VBI_CAPTURE;
+                break;
+        case VFL_TYPE_RADIO:
+                radio = 1;
+                break;
+        }
        mutex_lock(&dev->lock);
-        cx231xx_videodbg("open minor=%d type=%s users=%d\n",
+        cx231xx_videodbg("open dev=%s type=%s users=%d\n",
-                         minor, v4l2_type_names[fh_type], dev->users);
+                         video_device_node_name(vdev), v4l2_type_names[fh_type],
+                         dev->users);
 #if 0
        errCode = cx231xx_set_mode(dev, CX231XX_ANALOG_MODE);
@@ -2020,25 +2029,25 @@ void cx231xx_release_analog_resources(struct cx231xx *dev)
        /*FIXME: I2C IR should be disconnected */
        if (dev->radio_dev) {
-                if (-1 != dev->radio_dev->minor)
+                if (video_is_registered(dev->radio_dev))
                        video_unregister_device(dev->radio_dev);
                else
                        video_device_release(dev->radio_dev);
                dev->radio_dev = NULL;
        }
        if (dev->vbi_dev) {
-                cx231xx_info("V4L2 device /dev/vbi%d deregistered\n",
+                cx231xx_info("V4L2 device %s deregistered\n",
-                             dev->vbi_dev->num);
+                             video_device_node_name(dev->vbi_dev));
-                if (-1 != dev->vbi_dev->minor)
+                if (video_is_registered(dev->vbi_dev))
                        video_unregister_device(dev->vbi_dev);
                else
                        video_device_release(dev->vbi_dev);
                dev->vbi_dev = NULL;
        }
        if (dev->vdev) {
-                cx231xx_info("V4L2 device /dev/video%d deregistered\n",
+                cx231xx_info("V4L2 device %s deregistered\n",
-                             dev->vdev->num);
+                             video_device_node_name(dev->vdev));
-                if (-1 != dev->vdev->minor)
+                if (video_is_registered(dev->vdev))
                        video_unregister_device(dev->vdev);
                else
                        video_device_release(dev->vdev);
@@ -2268,7 +2277,6 @@ static const struct video_device cx231xx_video_template = {
        .fops         = &cx231xx_v4l_fops,
        .release      = video_device_release,
        .ioctl_ops    = &video_ioctl_ops,
-        .minor        = -1,
        .tvnorms      = V4L2_STD_ALL,
        .current_norm = V4L2_STD_PAL,
 };
@@ -2303,7 +2311,6 @@ static struct video_device cx231xx_radio_template = {
        .name      = "cx231xx-radio",
        .fops      = &radio_fops,
        .ioctl_ops = &radio_ioctl_ops,
-        .minor     = -1,
 };
 /******************************** usb interface ******************************/
@@ -2319,13 +2326,13 @@ static struct video_device *cx231xx_vdev_init(struct cx231xx *dev,
                return NULL;
        *vfd = *template;
-        vfd->minor = -1;
        vfd->v4l2_dev = &dev->v4l2_dev;
        vfd->release = video_device_release;
        vfd->debug = video_debug;
        snprintf(vfd->name, sizeof(vfd->name), "%s %s", dev->name, type_name);
+        video_set_drvdata(vfd, dev);
        return vfd;
 }
@@ -2374,8 +2381,8 @@ int cx231xx_register_analog_devices(struct cx231xx *dev)
                return ret;
        }
-        cx231xx_info("%s/0: registered device video%d [v4l2]\n",
+        cx231xx_info("%s/0: registered device %s [v4l2]\n",
-                     dev->name, dev->vdev->num);
+                     dev->name, video_device_node_name(dev->vdev));
        /* Initialize VBI template */
        memcpy(&cx231xx_vbi_template, &cx231xx_video_template,
@@ -2393,8 +2400,8 @@ int cx231xx_register_analog_devices(struct cx231xx *dev)
                return ret;
        }
-        cx231xx_info("%s/0: registered device vbi%d\n",
+        cx231xx_info("%s/0: registered device %s\n",
-                     dev->name, dev->vbi_dev->num);
+                     dev->name, video_device_node_name(dev->vbi_dev));
        if (cx231xx_boards[dev->model].radio.type == CX231XX_RADIO) {
                dev->radio_dev = cx231xx_vdev_init(dev, &cx231xx_radio_template,
@@ -2409,12 +2416,13 @@ int cx231xx_register_analog_devices(struct cx231xx *dev)
                        cx231xx_errdev("can't register radio device\n");
                        return ret;
                }
-                cx231xx_info("Registered radio device as /dev/radio%d\n",
+                cx231xx_info("Registered radio device as %s\n",
-                             dev->radio_dev->num);
+                             video_device_node_name(dev->radio_dev));
        }
-        cx231xx_info("V4L2 device registered as /dev/video%d and /dev/vbi%d\n",
+        cx231xx_info("V4L2 device registered as %s and %s\n",
-                     dev->vdev->num, dev->vbi_dev->num);
+                     video_device_node_name(dev->vdev),
+                     video_device_node_name(dev->vbi_dev));
        return 0;
 }
diff --git a/drivers/media/video/cx231xx/cx231xx.h b/drivers/media/video/cx231xx/cx231xx.h
index 64e2ddd3c401..17d4d1a800ce 100644
--- a/drivers/media/video/cx231xx/cx231xx.h
+++ b/drivers/media/video/cx231xx/cx231xx.h
@@ -689,8 +689,6 @@ void cx231xx_release_analog_resources(struct cx231xx *dev);
 int cx231xx_register_analog_devices(struct cx231xx *dev);
 void cx231xx_remove_from_devlist(struct cx231xx *dev);
 void cx231xx_add_into_devlist(struct cx231xx *dev);
-struct cx231xx *cx231xx_get_device(int minor,
-                                   enum v4l2_buf_type *fh_type, int *has_radio);
 void cx231xx_init_extension(struct cx231xx *dev);
 void cx231xx_close_extension(struct cx231xx *dev);
diff --git a/drivers/media/video/cx23885/cimax2.c b/drivers/media/video/cx23885/cimax2.c
index c04222ffb286..d4a9d2c5947c 100644
--- a/drivers/media/video/cx23885/cimax2.c
+++ b/drivers/media/video/cx23885/cimax2.c
@@ -53,6 +53,8 @@
 #define NETUP_CI_CTL            0x04
 #define NETUP_CI_RD             1
+#define NETUP_IRQ_DETAM         0x1
+#define NETUP_IRQ_IRQAM         0x4
 static unsigned int ci_dbg;
 module_param(ci_dbg, int, 0644);
@@ -73,6 +75,9 @@ struct netup_ci_state {
        int status;
        struct work_struct work;
        void *priv;
+        u8 current_irq_mode;
+        int current_ci_flag;
+        unsigned long next_status_checked_time;
 };
@@ -169,24 +174,26 @@ int netup_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
        if (0 != slot)
                return -EINVAL;
-        ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
+        if (state->current_ci_flag != flag) {
-                                                        0, &store, 1);
+                ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
-        if (ret != 0)
+                                0, &store, 1);
-                return ret;
+                if (ret != 0)
+                        return ret;
-        store &= ~0x0c;
+                store &= ~0x0c;
-        store |= flag;
+                store |= flag;
-        ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
+                ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
-                                                        0, &store, 1);
+                                0, &store, 1);
-        if (ret != 0)
+                if (ret != 0)
-                return ret;
+                        return ret;
+        };
+        state->current_ci_flag = flag;
        mutex_lock(&dev->gpio_lock);
        /* write addr */
        cx_write(MC417_OEN, NETUP_EN_ALL);
-        msleep(2);
        cx_write(MC417_RWD, NETUP_CTRL_OFF |
                                NETUP_ADLO | (0xff & addr));
        cx_clear(MC417_RWD, NETUP_ADLO);
@@ -196,7 +203,6 @@ int netup_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
        if (read) { /* data in */
                cx_write(MC417_OEN, NETUP_EN_ALL | NETUP_DATA);
-                msleep(2);
        } else /* data out */
                cx_write(MC417_RWD, NETUP_CTRL_OFF | data);
@@ -213,8 +219,8 @@ int netup_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
                if (mem < 0)
                        return -EREMOTEIO;
-        ci_dbg_print("%s: %s: addr=[0x%02x], %s=%x\n", __func__,
+        ci_dbg_print("%s: %s: chipaddr=[0x%x] addr=[0x%02x], %s=%x\n", __func__,
-                        (read) ? "read" : "write", addr,
+                        (read) ? "read" : "write", state->ci_i2c_addr, addr,
                        (flag == NETUP_CI_CTL) ? "ctl" : "mem",
                        (read) ? mem : data);
@@ -283,14 +289,39 @@ int netup_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
        return 0;
 }
+int netup_ci_set_irq(struct dvb_ca_en50221 *en50221, u8 irq_mode)
+{
+        struct netup_ci_state *state = en50221->data;
+        int ret;
+        if (irq_mode == state->current_irq_mode)
+                return 0;
+        ci_dbg_print("%s: chipaddr=[0x%x] setting ci IRQ to [0x%x] \n",
+                        __func__, state->ci_i2c_addr, irq_mode);
+        ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
+                                                        0x1b, &irq_mode, 1);
+        if (ret != 0)
+                return ret;
+        state->current_irq_mode = irq_mode;
+        return 0;
+}
 int netup_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot)
 {
        struct netup_ci_state *state = en50221->data;
-        u8 buf = 0x60;
+        u8 buf;
        if (0 != slot)
                return -EINVAL;
+        netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
+                        0, &buf, 1);
+        buf |= 0x60;
        return netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
                                                        0, &buf, 1);
 }
@@ -303,21 +334,35 @@ static void netup_read_ci_status(struct work_struct *work)
        u8 buf[33];
        int ret;
-        ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
+        /* CAM module IRQ processing. fast operation */
-                                                        0, &buf[0], 33);
+        dvb_ca_en50221_frda_irq(&state->ca, 0);
-        if (ret != 0)
+        /* CAM module INSERT/REMOVE processing. slow operation because of i2c
-                return;
+         * transfers */
+        if (time_after(jiffies, state->next_status_checked_time)
+                        || !state->status) {
+                ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
+                                0, &buf[0], 33);
+                state->next_status_checked_time = jiffies
+                        + msecs_to_jiffies(1000);
+                if (ret != 0)
+                        return;
-        ci_dbg_print("%s: Slot Status Addr=[0x%04x], Reg=[0x%02x], data=%02x, "
+                ci_dbg_print("%s: Slot Status Addr=[0x%04x], "
-                "TS config = %02x\n", __func__, state->ci_i2c_addr, 0, buf[0],
+                                "Reg=[0x%02x], data=%02x, "
-                buf[32]);
+                                "TS config = %02x\n", __func__,
+                                state->ci_i2c_addr, 0, buf[0],
+                                buf[0]);
-        if (buf[0] & 1)
-                state->status = DVB_CA_EN50221_POLL_CAM_PRESENT |
+                if (buf[0] & 1)
-                        DVB_CA_EN50221_POLL_CAM_READY;
+                        state->status = DVB_CA_EN50221_POLL_CAM_PRESENT |
-        else
+                                DVB_CA_EN50221_POLL_CAM_READY;
-                state->status = 0;
+                else
+                        state->status = 0;
+        };
 }
 /* CI irq handler */
@@ -347,6 +392,9 @@ int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221, int slot, int open
        if (0 != slot)
                return -EINVAL;
+        netup_ci_set_irq(en50221, open ? (NETUP_IRQ_DETAM | NETUP_IRQ_IRQAM)
+                        : NETUP_IRQ_DETAM);
        return state->status;
 }
@@ -381,8 +429,8 @@ int netup_ci_init(struct cx23885_tsport *port)
                0x01, /* power on (use it like store place) */
                0x00, /* RFU */
                0x00, /* int status read only */
-                0x01, /* all int unmasked */
+                NETUP_IRQ_IRQAM | NETUP_IRQ_DETAM, /* DETAM, IRQAM unmasked */
-                0x04, /* int config */
+                0x05, /* EXTINT=active-high, INT=push-pull */
                0x00, /* USCG1 */
                0x04, /* ack active low */
                0x00, /* LOCK = 0 */
@@ -422,6 +470,7 @@ int netup_ci_init(struct cx23885_tsport *port)
        state->ca.poll_slot_status = netup_poll_ci_slot_status;
        state->ca.data = state;
        state->priv = port;
+        state->current_irq_mode = NETUP_IRQ_IRQAM | NETUP_IRQ_DETAM;
        ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
                                                0, &cimax_init[0], 34);
diff --git a/drivers/media/video/cx23885/cx23885-417.c b/drivers/media/video/cx23885/cx23885-417.c
index 0eed852c61e9..88c0d2481118 100644
--- a/drivers/media/video/cx23885/cx23885-417.c
+++ b/drivers/media/video/cx23885/cx23885-417.c
@@ -1568,28 +1568,11 @@ static int vidioc_queryctrl(struct file *file, void *priv,
 static int mpeg_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct cx23885_dev *dev = video_drvdata(file);
-        struct cx23885_dev *h, *dev = NULL;
-        struct list_head *list;
        struct cx23885_fh *fh;
        dprintk(2, "%s()\n", __func__);
-        lock_kernel();
-        list_for_each(list, &cx23885_devlist) {
-                h = list_entry(list, struct cx23885_dev, devlist);
-                if (h->v4l_device &&
-                    h->v4l_device->minor == minor) {
-                        dev = h;
-                        break;
-                }
-        }
-        if (dev == NULL) {
-                unlock_kernel();
-                return -ENODEV;
-        }
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh), GFP_KERNEL);
        if (NULL == fh) {
@@ -1597,6 +1580,8 @@ static int mpeg_open(struct file *file)
                return -ENOMEM;
        }
+        lock_kernel();
        file->private_data = fh;
        fh->dev      = dev;
@@ -1736,7 +1721,6 @@ static struct video_device cx23885_mpeg_template = {
        .name          = "cx23885",
        .fops          = &mpeg_fops,
        .ioctl_ops     = &mpeg_ioctl_ops,
-        .minor         = -1,
        .tvnorms       = CX23885_NORMS,
        .current_norm  = V4L2_STD_NTSC_M,
 };
@@ -1746,7 +1730,7 @@ void cx23885_417_unregister(struct cx23885_dev *dev)
        dprintk(1, "%s()\n", __func__);
        if (dev->v4l_device) {
-                if (-1 != dev->v4l_device->minor)
+                if (video_is_registered(dev->v4l_device))
                        video_unregister_device(dev->v4l_device);
                else
                        video_device_release(dev->v4l_device);
@@ -1803,6 +1787,7 @@ int cx23885_417_register(struct cx23885_dev *dev)
        /* Allocate and initialize V4L video device */
        dev->v4l_device = cx23885_video_dev_alloc(tsport,
                dev->pci, &cx23885_mpeg_template, "mpeg");
+        video_set_drvdata(dev->v4l_device, dev);
        err = video_register_device(dev->v4l_device,
                VFL_TYPE_GRABBER, -1);
        if (err < 0) {
@@ -1810,8 +1795,8 @@ int cx23885_417_register(struct cx23885_dev *dev)
                return err;
        }
-        printk(KERN_INFO "%s: registered device video%d [mpeg]\n",
+        printk(KERN_INFO "%s: registered device %s [mpeg]\n",
-               dev->name, dev->v4l_device->num);
+               dev->name, video_device_node_name(dev->v4l_device));
        return 0;
 }
diff --git a/drivers/media/video/cx23885/cx23885-core.c b/drivers/media/video/cx23885/cx23885-core.c
index 04b12d27bc13..0dde57e96d30 100644
--- a/drivers/media/video/cx23885/cx23885-core.c
+++ b/drivers/media/video/cx23885/cx23885-core.c
@@ -55,9 +55,6 @@ MODULE_PARM_DESC(card, "card type");
 static unsigned int cx23885_devcount;
-static DEFINE_MUTEX(devlist);
-LIST_HEAD(cx23885_devlist);
 #define NO_SYNC_LINE (-1U)
 /* FIXME, these allocations will change when
@@ -785,10 +782,6 @@ static int cx23885_dev_setup(struct cx23885_dev *dev)
        dev->nr = cx23885_devcount++;
        sprintf(dev->name, "cx23885[%d]", dev->nr);
-        mutex_lock(&devlist);
-        list_add_tail(&dev->devlist, &cx23885_devlist);
-        mutex_unlock(&devlist);
        /* Configure the internal memory */
        if (dev->pci->device == 0x8880) {
                /* Could be 887 or 888, assume a default */
@@ -2008,10 +2001,6 @@ static void __devexit cx23885_finidev(struct pci_dev *pci_dev)
        /* unregister stuff */
        free_irq(pci_dev->irq, dev);
-        mutex_lock(&devlist);
-        list_del(&dev->devlist);
-        mutex_unlock(&devlist);
        cx23885_dev_unregister(dev);
        v4l2_device_unregister(v4l2_dev);
        kfree(dev);
diff --git a/drivers/media/video/cx23885/cx23885-input.c b/drivers/media/video/cx23885/cx23885-input.c
index 469e083dd5f8..768eec92ccf9 100644
--- a/drivers/media/video/cx23885/cx23885-input.c
+++ b/drivers/media/video/cx23885/cx23885-input.c
@@ -377,7 +377,7 @@ int cx23885_input_init(struct cx23885_dev *dev)
                 cx23885_boards[dev->board].name);
        snprintf(ir->phys, sizeof(ir->phys), "pci-%s/ir0", pci_name(dev->pci));
-        ret = ir_input_init(input_dev, &ir->ir, ir_type, ir_codes);
+        ret = ir_input_init(input_dev, &ir->ir, ir_type);
        if (ret < 0)
                goto err_out_free;
@@ -397,7 +397,7 @@ int cx23885_input_init(struct cx23885_dev *dev)
        dev->ir_input = ir;
        cx23885_input_ir_start(dev);
-        ret = input_register_device(ir->dev);
+        ret = ir_input_register(ir->dev, ir_codes);
        if (ret)
                goto err_out_stop;
@@ -407,8 +407,6 @@ err_out_stop:
        cx23885_input_ir_stop(dev);
        dev->ir_input = NULL;
 err_out_free:
-        ir_input_free(input_dev);
-        input_free_device(input_dev);
        kfree(ir);
        return ret;
 }
@@ -420,8 +418,7 @@ void cx23885_input_fini(struct cx23885_dev *dev)
        if (dev->ir_input == NULL)
                return;
-        ir_input_free(dev->ir_input->dev);
+        ir_input_unregister(dev->ir_input->dev);
-        input_unregister_device(dev->ir_input->dev);
        kfree(dev->ir_input);
        dev->ir_input = NULL;
 }
diff --git a/drivers/media/video/cx23885/cx23885-video.c b/drivers/media/video/cx23885/cx23885-video.c
index 8b372b4f0de2..8934d61cf660 100644
--- a/drivers/media/video/cx23885/cx23885-video.c
+++ b/drivers/media/video/cx23885/cx23885-video.c
@@ -318,11 +318,11 @@ static struct video_device *cx23885_vdev_init(struct cx23885_dev *dev,
        if (NULL == vfd)
                return NULL;
        *vfd = *template;
-        vfd->minor = -1;
        vfd->v4l2_dev = &dev->v4l2_dev;
        vfd->release = video_device_release;
        snprintf(vfd->name, sizeof(vfd->name), "%s %s (%s)",
                 dev->name, type, cx23885_boards[dev->board].name);
+        video_set_drvdata(vfd, dev);
        return vfd;
 }
@@ -716,46 +716,34 @@ static int get_resource(struct cx23885_fh *fh)
 static int video_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct cx23885_dev *h, *dev = NULL;
+        struct cx23885_dev *dev = video_drvdata(file);
        struct cx23885_fh *fh;
-        struct list_head *list;
        enum v4l2_buf_type type = 0;
        int radio = 0;
-        lock_kernel();
+        switch (vdev->vfl_type) {
-        list_for_each(list, &cx23885_devlist) {
+        case VFL_TYPE_GRABBER:
-                h = list_entry(list, struct cx23885_dev, devlist);
+                type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                if (h->video_dev &&
+                break;
-                    h->video_dev->minor == minor) {
+        case VFL_TYPE_VBI:
-                        dev  = h;
+                type = V4L2_BUF_TYPE_VBI_CAPTURE;
-                        type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+                break;
-                }
+        case VFL_TYPE_RADIO:
-                if (h->vbi_dev &&
+                radio = 1;
-                    h->vbi_dev->minor == minor) {
+                break;
-                        dev  = h;
-                        type = V4L2_BUF_TYPE_VBI_CAPTURE;
-                }
-                if (h->radio_dev &&
-                    h->radio_dev->minor == minor) {
-                        radio = 1;
-                        dev   = h;
-                }
-        }
-        if (NULL == dev) {
-                unlock_kernel();
-                return -ENODEV;
        }
-        dprintk(1, "open minor=%d radio=%d type=%s\n",
+        dprintk(1, "open dev=%s radio=%d type=%s\n",
-                minor, radio, v4l2_type_names[type]);
+                video_device_node_name(vdev), radio, v4l2_type_names[type]);
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh), GFP_KERNEL);
-        if (NULL == fh) {
+        if (NULL == fh)
-                unlock_kernel();
                return -ENOMEM;
-        }
+        lock_kernel();
        file->private_data = fh;
        fh->dev      = dev;
        fh->radio    = radio;
@@ -1441,7 +1429,6 @@ static struct video_device cx23885_vbi_template;
 static struct video_device cx23885_video_template = {
        .name                 = "cx23885-video",
        .fops                 = &video_fops,
-        .minor                = -1,
        .ioctl_ops            = &video_ioctl_ops,
        .tvnorms              = CX23885_NORMS,
        .current_norm         = V4L2_STD_NTSC_M,
@@ -1461,7 +1448,7 @@ void cx23885_video_unregister(struct cx23885_dev *dev)
        cx_clear(PCI_INT_MSK, 1);
        if (dev->video_dev) {
-                if (-1 != dev->video_dev->minor)
+                if (video_is_registered(dev->video_dev))
                        video_unregister_device(dev->video_dev);
                else
                        video_device_release(dev->video_dev);
@@ -1532,8 +1519,8 @@ int cx23885_video_register(struct cx23885_dev *dev)
                        dev->name);
                goto fail_unreg;
        }
-        printk(KERN_INFO "%s/0: registered device video%d [v4l2]\n",
+        printk(KERN_INFO "%s/0: registered device %s [v4l2]\n",
-               dev->name, dev->video_dev->num);
+               dev->name, video_device_node_name(dev->video_dev));
        /* initial device configuration */
        mutex_lock(&dev->lock);
        cx23885_set_tvnorm(dev, dev->tvnorm);
diff --git a/drivers/media/video/cx23885/cx23885.h b/drivers/media/video/cx23885/cx23885.h
index fa744764dc8b..08b3f6b136a0 100644
--- a/drivers/media/video/cx23885/cx23885.h
+++ b/drivers/media/video/cx23885/cx23885.h
@@ -303,7 +303,6 @@ struct cx23885_tsport {
 };
 struct cx23885_dev {
-        struct list_head           devlist;
        atomic_t                   refcount;
        struct v4l2_device         v4l2_dev;
@@ -399,8 +398,6 @@ static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
 extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
-extern struct list_head cx23885_devlist;
 #define SRAM_CH01  0 /* Video A */
 #define SRAM_CH02  1 /* VBI A */
 #define SRAM_CH03  2 /* Video B */
diff --git a/drivers/media/video/cx88/cx88-blackbird.c b/drivers/media/video/cx88/cx88-blackbird.c
index fbdc1cde56a6..6fe30e6c4262 100644
--- a/drivers/media/video/cx88/cx88-blackbird.c
+++ b/drivers/media/video/cx88/cx88-blackbird.c
@@ -1048,21 +1048,15 @@ static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *id)
 static int mpeg_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct cx8802_dev *dev = NULL;
+        struct cx8802_dev *dev = video_drvdata(file);
        struct cx8802_fh *fh;
        struct cx8802_driver *drv = NULL;
        int err;
-        lock_kernel();
-        dev = cx8802_get_device(minor);
        dprintk( 1, "%s\n", __func__);
-        if (dev == NULL) {
+        lock_kernel();
-                unlock_kernel();
-                return -ENODEV;
-        }
        /* Make sure we can acquire the hardware */
        drv = cx8802_get_driver(dev, CX88_MPEG_BLACKBIRD);
@@ -1081,7 +1075,7 @@ static int mpeg_open(struct file *file)
                unlock_kernel();
                return -EINVAL;
        }
-        dprintk(1,"open minor=%d\n",minor);
+        dprintk(1, "open dev=%s\n", video_device_node_name(vdev));
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh),GFP_KERNEL);
@@ -1129,10 +1123,6 @@ static int mpeg_release(struct file *file)
        kfree(fh);
        /* Make sure we release the hardware */
-        dev = cx8802_get_device(video_devdata(file)->minor);
-        if (dev == NULL)
-                return -ENODEV;
        drv = cx8802_get_driver(dev, CX88_MPEG_BLACKBIRD);
        if (drv)
                drv->request_release(drv);
@@ -1220,7 +1210,6 @@ static struct video_device cx8802_mpeg_template = {
        .name                 = "cx8802",
        .fops                 = &mpeg_fops,
        .ioctl_ops            = &mpeg_ioctl_ops,
-        .minor                = -1,
        .tvnorms              = CX88_NORMS,
        .current_norm         = V4L2_STD_NTSC_M,
 };
@@ -1276,7 +1265,7 @@ static int cx8802_blackbird_advise_release(struct cx8802_driver *drv)
 static void blackbird_unregister_video(struct cx8802_dev *dev)
 {
        if (dev->mpeg_dev) {
-                if (-1 != dev->mpeg_dev->minor)
+                if (video_is_registered(dev->mpeg_dev))
                        video_unregister_device(dev->mpeg_dev);
                else
                        video_device_release(dev->mpeg_dev);
@@ -1290,14 +1279,15 @@ static int blackbird_register_video(struct cx8802_dev *dev)
        dev->mpeg_dev = cx88_vdev_init(dev->core,dev->pci,
                                       &cx8802_mpeg_template,"mpeg");
+        video_set_drvdata(dev->mpeg_dev, dev);
        err = video_register_device(dev->mpeg_dev,VFL_TYPE_GRABBER, -1);
        if (err < 0) {
                printk(KERN_INFO "%s/2: can't register mpeg device\n",
                       dev->core->name);
                return err;
        }
-        printk(KERN_INFO "%s/2: registered device video%d [mpeg]\n",
+        printk(KERN_INFO "%s/2: registered device %s [mpeg]\n",
-               dev->core->name, dev->mpeg_dev->num);
+               dev->core->name, video_device_node_name(dev->mpeg_dev));
        return 0;
 }
diff --git a/drivers/media/video/cx88/cx88-input.c b/drivers/media/video/cx88/cx88-input.c
index 92b8cdf9fb81..f9fda18b410c 100644
--- a/drivers/media/video/cx88/cx88-input.c
+++ b/drivers/media/video/cx88/cx88-input.c
@@ -360,7 +360,7 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
        snprintf(ir->name, sizeof(ir->name), "cx88 IR (%s)", core->board.name);
        snprintf(ir->phys, sizeof(ir->phys), "pci-%s/ir0", pci_name(pci));
-        err = ir_input_init(input_dev, &ir->ir, ir_type, ir_codes);
+        err = ir_input_init(input_dev, &ir->ir, ir_type);
        if (err < 0)
                goto err_out_free;
@@ -383,7 +383,7 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
        cx88_ir_start(core, ir);
        /* all done */
-        err = input_register_device(ir->input);
+        err = ir_input_register(ir->input, ir_codes);
        if (err)
                goto err_out_stop;
@@ -393,8 +393,6 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
        cx88_ir_stop(core, ir);
        core->ir = NULL;
 err_out_free:
-        ir_input_free(input_dev);
-        input_free_device(input_dev);
        kfree(ir);
        return err;
 }
@@ -408,8 +406,7 @@ int cx88_ir_fini(struct cx88_core *core)
                return 0;
        cx88_ir_stop(core, ir);
-        ir_input_free(ir->input);
+        ir_input_unregister(ir->input);
-        input_unregister_device(ir->input);
        kfree(ir);
        /* done */
diff --git a/drivers/media/video/cx88/cx88-mpeg.c b/drivers/media/video/cx88/cx88-mpeg.c
index de9ff0fc741f..bb5104893411 100644
--- a/drivers/media/video/cx88/cx88-mpeg.c
+++ b/drivers/media/video/cx88/cx88-mpeg.c
@@ -580,21 +580,6 @@ static int cx8802_resume_common(struct pci_dev *pci_dev)
        return 0;
 }
-#if defined(CONFIG_VIDEO_CX88_BLACKBIRD) || \
-    defined(CONFIG_VIDEO_CX88_BLACKBIRD_MODULE)
-struct cx8802_dev *cx8802_get_device(int minor)
-{
-        struct cx8802_dev *dev;
-        list_for_each_entry(dev, &cx8802_devlist, devlist)
-                if (dev->mpeg_dev && dev->mpeg_dev->minor == minor)
-                        return dev;
-        return NULL;
-}
-EXPORT_SYMBOL(cx8802_get_device);
-#endif
 struct cx8802_driver * cx8802_get_driver(struct cx8802_dev *dev, enum cx88_board_type btype)
 {
        struct cx8802_driver *d;
diff --git a/drivers/media/video/cx88/cx88-video.c b/drivers/media/video/cx88/cx88-video.c
index d7e8fcee559c..48c450f4a85a 100644
--- a/drivers/media/video/cx88/cx88-video.c
+++ b/drivers/media/video/cx88/cx88-video.c
@@ -75,10 +75,6 @@ MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
 #define dprintk(level,fmt, arg...)      if (video_debug >= level) \
        printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
-/* ------------------------------------------------------------------ */
-static LIST_HEAD(cx8800_devlist);
 /* ------------------------------------------------------------------- */
 /* static data                                                         */
@@ -753,38 +749,31 @@ static int get_ressource(struct cx8800_fh *fh)
 static int video_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct cx8800_dev *h,*dev = NULL;
+        struct cx8800_dev *dev = video_drvdata(file);
        struct cx88_core *core;
        struct cx8800_fh *fh;
        enum v4l2_buf_type type = 0;
        int radio = 0;
-        lock_kernel();
+        switch (vdev->vfl_type) {
-        list_for_each_entry(h, &cx8800_devlist, devlist) {
+        case VFL_TYPE_GRABBER:
-                if (h->video_dev->minor == minor) {
+                type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                        dev  = h;
+                break;
-                        type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+        case VFL_TYPE_VBI:
-                }
+                type = V4L2_BUF_TYPE_VBI_CAPTURE;
-                if (h->vbi_dev->minor == minor) {
+                break;
-                        dev  = h;
+        case VFL_TYPE_RADIO:
-                        type = V4L2_BUF_TYPE_VBI_CAPTURE;
+                radio = 1;
-                }
+                break;
-                if (h->radio_dev &&
-                    h->radio_dev->minor == minor) {
-                        radio = 1;
-                        dev   = h;
-                }
-        }
-        if (NULL == dev) {
-                unlock_kernel();
-                return -ENODEV;
        }
+        lock_kernel();
        core = dev->core;
-        dprintk(1,"open minor=%d radio=%d type=%s\n",
+        dprintk(1, "open dev=%s radio=%d type=%s\n",
-                minor,radio,v4l2_type_names[type]);
+                video_device_node_name(vdev), radio, v4l2_type_names[type]);
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh),GFP_KERNEL);
@@ -1733,7 +1722,6 @@ static struct video_device cx8800_vbi_template;
 static struct video_device cx8800_video_template = {
        .name                 = "cx8800-video",
        .fops                 = &video_fops,
-        .minor                = -1,
        .ioctl_ops            = &video_ioctl_ops,
        .tvnorms              = CX88_NORMS,
        .current_norm         = V4L2_STD_NTSC_M,
@@ -1769,7 +1757,6 @@ static const struct v4l2_ioctl_ops radio_ioctl_ops = {
 static struct video_device cx8800_radio_template = {
        .name                 = "cx8800-radio",
        .fops                 = &radio_fops,
-        .minor                = -1,
        .ioctl_ops            = &radio_ioctl_ops,
 };
@@ -1778,21 +1765,21 @@ static struct video_device cx8800_radio_template = {
 static void cx8800_unregister_video(struct cx8800_dev *dev)
 {
        if (dev->radio_dev) {
-                if (-1 != dev->radio_dev->minor)
+                if (video_is_registered(dev->radio_dev))
                        video_unregister_device(dev->radio_dev);
                else
                        video_device_release(dev->radio_dev);
                dev->radio_dev = NULL;
        }
        if (dev->vbi_dev) {
-                if (-1 != dev->vbi_dev->minor)
+                if (video_is_registered(dev->vbi_dev))
                        video_unregister_device(dev->vbi_dev);
                else
                        video_device_release(dev->vbi_dev);
                dev->vbi_dev = NULL;
        }
        if (dev->video_dev) {
-                if (-1 != dev->video_dev->minor)
+                if (video_is_registered(dev->video_dev))
                        video_unregister_device(dev->video_dev);
                else
                        video_device_release(dev->video_dev);
@@ -1909,6 +1896,7 @@ static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
        /* register v4l devices */
        dev->video_dev = cx88_vdev_init(core,dev->pci,
                                        &cx8800_video_template,"video");
+        video_set_drvdata(dev->video_dev, dev);
        err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
                                    video_nr[core->nr]);
        if (err < 0) {
@@ -1916,10 +1904,11 @@ static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
                       core->name);
                goto fail_unreg;
        }
-        printk(KERN_INFO "%s/0: registered device video%d [v4l2]\n",
+        printk(KERN_INFO "%s/0: registered device %s [v4l2]\n",
-               core->name, dev->video_dev->num);
+               core->name, video_device_node_name(dev->video_dev));
        dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
+        video_set_drvdata(dev->vbi_dev, dev);
        err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
                                    vbi_nr[core->nr]);
        if (err < 0) {
@@ -1927,12 +1916,13 @@ static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
                       core->name);
                goto fail_unreg;
        }
-        printk(KERN_INFO "%s/0: registered device vbi%d\n",
+        printk(KERN_INFO "%s/0: registered device %s\n",
-               core->name, dev->vbi_dev->num);
+               core->name, video_device_node_name(dev->vbi_dev));
        if (core->board.radio.type == CX88_RADIO) {
                dev->radio_dev = cx88_vdev_init(core,dev->pci,
                                                &cx8800_radio_template,"radio");
+                video_set_drvdata(dev->radio_dev, dev);
                err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
                                            radio_nr[core->nr]);
                if (err < 0) {
@@ -1940,12 +1930,11 @@ static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
                               core->name);
                        goto fail_unreg;
                }
-                printk(KERN_INFO "%s/0: registered device radio%d\n",
+                printk(KERN_INFO "%s/0: registered device %s\n",
-                       core->name, dev->radio_dev->num);
+                       core->name, video_device_node_name(dev->radio_dev));
        }
        /* everything worked */
-        list_add_tail(&dev->devlist,&cx8800_devlist);
        pci_set_drvdata(pci_dev,dev);
        /* initial device configuration */
@@ -2001,7 +1990,6 @@ static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
        /* free memory */
        btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
-        list_del(&dev->devlist);
        cx88_core_put(core,dev->pci);
        kfree(dev);
 }
diff --git a/drivers/media/video/cx88/cx88.h b/drivers/media/video/cx88/cx88.h
index e1c521710103..b1499bf604ea 100644
--- a/drivers/media/video/cx88/cx88.h
+++ b/drivers/media/video/cx88/cx88.h
@@ -423,7 +423,6 @@ struct cx8800_suspend_state {
 struct cx8800_dev {
        struct cx88_core           *core;
-        struct list_head           devlist;
        spinlock_t                 slock;
        /* various device info */
@@ -670,7 +669,6 @@ int cx88_audio_thread(void *data);
 int cx8802_register_driver(struct cx8802_driver *drv);
 int cx8802_unregister_driver(struct cx8802_driver *drv);
-struct cx8802_dev *cx8802_get_device(int minor);
 struct cx8802_driver * cx8802_get_driver(struct cx8802_dev *dev, enum cx88_board_type btype);
 /* ----------------------------------------------------------- */
diff --git a/drivers/media/video/davinci/vpfe_capture.c b/drivers/media/video/davinci/vpfe_capture.c
index c3916a42668e..de22bc9faf21 100644
--- a/drivers/media/video/davinci/vpfe_capture.c
+++ b/drivers/media/video/davinci/vpfe_capture.c
@@ -70,7 +70,6 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/interrupt.h>
-#include <linux/version.h>
 #include <media/v4l2-common.h>
 #include <linux/io.h>
 #include <media/davinci/vpfe_capture.h>
@@ -1967,7 +1966,6 @@ static __init int vpfe_probe(struct platform_device *pdev)
        vfd->release            = video_device_release;
        vfd->fops               = &vpfe_fops;
        vfd->ioctl_ops          = &vpfe_ioctl_ops;
-        vfd->minor              = -1;
        vfd->tvnorms            = 0;
        vfd->current_norm       = V4L2_STD_PAL;
        vfd->v4l2_dev           = &vpfe_dev->v4l2_dev;
@@ -2071,7 +2069,7 @@ probe_out_video_unregister:
 probe_out_v4l2_unregister:
        v4l2_device_unregister(&vpfe_dev->v4l2_dev);
 probe_out_video_release:
-        if (vpfe_dev->video_dev->minor == -1)
+        if (!video_is_registered(vpfe_dev->video_dev))
                video_device_release(vpfe_dev->video_dev);
 probe_out_release_irq:
        free_irq(vpfe_dev->ccdc_irq0, vpfe_dev);
@@ -2091,7 +2089,7 @@ probe_free_dev_mem:
 /*
 * vpfe_remove : It un-register device from V4L2 driver
 */
-static int vpfe_remove(struct platform_device *pdev)
+static int __devexit vpfe_remove(struct platform_device *pdev)
 {
        struct vpfe_device *vpfe_dev = platform_get_drvdata(pdev);
        struct resource *res;
diff --git a/drivers/media/video/davinci/vpif.c b/drivers/media/video/davinci/vpif.c
index 3b8eac31ecae..1f532e31cd49 100644
--- a/drivers/media/video/davinci/vpif.c
+++ b/drivers/media/video/davinci/vpif.c
@@ -266,7 +266,7 @@ fail:
        return status;
 }
-static int vpif_remove(struct platform_device *pdev)
+static int __devexit vpif_remove(struct platform_device *pdev)
 {
        iounmap(vpif_base);
        release_mem_region(res->start, res_len);
diff --git a/drivers/media/video/davinci/vpif_display.c b/drivers/media/video/davinci/vpif_display.c
index d14cfb200ed0..dfddef7228dd 100644
--- a/drivers/media/video/davinci/vpif_display.c
+++ b/drivers/media/video/davinci/vpif_display.c
@@ -1347,7 +1347,6 @@ static const struct v4l2_file_operations vpif_fops = {
 static struct video_device vpif_video_template = {
        .name           = "vpif",
        .fops           = &vpif_fops,
-        .minor          = -1,
        .ioctl_ops      = &vpif_ioctl_ops,
        .tvnorms        = DM646X_V4L2_STD,
        .current_norm   = V4L2_STD_625_50,
diff --git a/drivers/media/video/davinci/vpss.c b/drivers/media/video/davinci/vpss.c
index 453236bd7559..7ee72ecd3d81 100644
--- a/drivers/media/video/davinci/vpss.c
+++ b/drivers/media/video/davinci/vpss.c
@@ -268,7 +268,7 @@ fail1:
        return status;
 }
-static int vpss_remove(struct platform_device *pdev)
+static int __devexit vpss_remove(struct platform_device *pdev)
 {
        iounmap(oper_cfg.vpss_bl_regs_base);
        release_mem_region(oper_cfg.r1->start, oper_cfg.len1);
diff --git a/drivers/media/video/em28xx/em28xx-cards.c b/drivers/media/video/em28xx/em28xx-cards.c
index 82da205047be..25100001ffff 100644
--- a/drivers/media/video/em28xx/em28xx-cards.c
+++ b/drivers/media/video/em28xx/em28xx-cards.c
@@ -2285,7 +2285,7 @@ void em28xx_register_i2c_ir(struct em28xx *dev)
                dev->init_data.name = "i2c IR (EM28XX Pinnacle PCTV)";
                break;
        case EM2820_BOARD_HAUPPAUGE_WINTV_USB_2:
-                dev->init_data.ir_codes = &ir_codes_hauppauge_new_table;
+                dev->init_data.ir_codes = &ir_codes_rc5_hauppauge_new_table;
                dev->init_data.get_key = em28xx_get_key_em_haup;
                dev->init_data.name = "i2c IR (EM2840 Hauppauge)";
                break;
@@ -2653,7 +2653,6 @@ static int em28xx_init_dev(struct em28xx **devhandle, struct usb_device *udev,
        INIT_LIST_HEAD(&dev->vbiq.active);
        INIT_LIST_HEAD(&dev->vbiq.queued);
        if (dev->board.has_msp34xx) {
                /* Send a reset to other chips via gpio */
                errCode = em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xf7);
@@ -2923,9 +2922,9 @@ static void em28xx_usb_disconnect(struct usb_interface *interface)
        if (dev->users) {
                em28xx_warn
-                    ("device /dev/video%d is open! Deregistration and memory "
+                    ("device %s is open! Deregistration and memory "
                     "deallocation are deferred on close.\n",
-                                dev->vdev->num);
+                     video_device_node_name(dev->vdev));
                dev->state |= DEV_MISCONFIGURED;
                em28xx_uninit_isoc(dev);
diff --git a/drivers/media/video/em28xx/em28xx-core.c b/drivers/media/video/em28xx/em28xx-core.c
index 3f86d36dff2b..b311d4514bdf 100644
--- a/drivers/media/video/em28xx/em28xx-core.c
+++ b/drivers/media/video/em28xx/em28xx-core.c
@@ -216,7 +216,7 @@ int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
 * sets only some bits (specified by bitmask) of a register, by first reading
 * the actual value
 */
-static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
+int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
                                 u8 bitmask)
 {
        int oldval;
@@ -1136,34 +1136,6 @@ void em28xx_wake_i2c(struct em28xx *dev)
 static LIST_HEAD(em28xx_devlist);
 static DEFINE_MUTEX(em28xx_devlist_mutex);
-struct em28xx *em28xx_get_device(int minor,
-                                 enum v4l2_buf_type *fh_type,
-                                 int *has_radio)
-{
-        struct em28xx *h, *dev = NULL;
-        *fh_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        *has_radio = 0;
-        mutex_lock(&em28xx_devlist_mutex);
-        list_for_each_entry(h, &em28xx_devlist, devlist) {
-                if (h->vdev->minor == minor)
-                        dev = h;
-                if (h->vbi_dev && h->vbi_dev->minor == minor) {
-                        dev = h;
-                        *fh_type = V4L2_BUF_TYPE_VBI_CAPTURE;
-                }
-                if (h->radio_dev &&
-                    h->radio_dev->minor == minor) {
-                        dev = h;
-                        *has_radio = 1;
-                }
-        }
-        mutex_unlock(&em28xx_devlist_mutex);
-        return dev;
-}
 /*
 * em28xx_realease_resources()
 * unregisters the v4l2,i2c and usb devices
diff --git a/drivers/media/video/em28xx/em28xx-input.c b/drivers/media/video/em28xx/em28xx-input.c
index d96ec7c09dca..af0d935c29be 100644
--- a/drivers/media/video/em28xx/em28xx-input.c
+++ b/drivers/media/video/em28xx/em28xx-input.c
@@ -112,10 +112,13 @@ int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)
 int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)
 {
        unsigned char buf[2];
-        unsigned char code;
+        u16 code;
+        int size;
        /* poll IR chip */
-        if (2 != i2c_master_recv(ir->c, buf, 2))
+        size = i2c_master_recv(ir->c, buf, sizeof(buf));
+        if (size != 2)
                return -EIO;
        /* Does eliminate repeated parity code */
@@ -124,16 +127,30 @@ int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)
        ir->old = buf[1];
-        /* Rearranges bits to the right order */
+        /*
-        code =   ((buf[0]&0x01)<<5) | /* 0010 0000 */
+         * Rearranges bits to the right order.
-                 ((buf[0]&0x02)<<3) | /* 0001 0000 */
+         * The bit order were determined experimentally by using
-                 ((buf[0]&0x04)<<1) | /* 0000 1000 */
+         * The original Hauppauge Grey IR and another RC5 that uses addr=0x08
-                 ((buf[0]&0x08)>>1) | /* 0000 0100 */
+         * The RC5 code has 14 bits, but we've experimentally determined
-                 ((buf[0]&0x10)>>3) | /* 0000 0010 */
+         * the meaning for only 11 bits.
-                 ((buf[0]&0x20)>>5);  /* 0000 0001 */
+         * So, the code translation is not complete. Yet, it is enough to
+         * work with the provided RC5 IR.
-        i2cdprintk("ir hauppauge (em2840): code=0x%02x (rcv=0x%02x)\n",
+         */
-                        code, buf[0]);
+        code =
+                 ((buf[0] & 0x01) ? 0x0020 : 0) | /*            0010 0000 */
+                 ((buf[0] & 0x02) ? 0x0010 : 0) | /*            0001 0000 */
+                 ((buf[0] & 0x04) ? 0x0008 : 0) | /*            0000 1000 */
+                 ((buf[0] & 0x08) ? 0x0004 : 0) | /*            0000 0100 */
+                 ((buf[0] & 0x10) ? 0x0002 : 0) | /*            0000 0010 */
+                 ((buf[0] & 0x20) ? 0x0001 : 0) | /*            0000 0001 */
+                 ((buf[1] & 0x08) ? 0x1000 : 0) | /* 0001 0000            */
+                 ((buf[1] & 0x10) ? 0x0800 : 0) | /* 0000 1000            */
+                 ((buf[1] & 0x20) ? 0x0400 : 0) | /* 0000 0100            */
+                 ((buf[1] & 0x40) ? 0x0200 : 0) | /* 0000 0010            */
+                 ((buf[1] & 0x80) ? 0x0100 : 0);  /* 0000 0001            */
+        i2cdprintk("ir hauppauge (em2840): code=0x%02x (rcv=0x%02x%02x)\n",
+                        code, buf[1], buf[0]);
        /* return key */
        *ir_key = code;
@@ -337,19 +354,28 @@ int em28xx_ir_init(struct em28xx *dev)
                goto err_out_free;
        ir->input = input_dev;
+        ir_config = EM2874_IR_RC5;
+        /* Adjust xclk based o IR table for RC5/NEC tables */
+        if (dev->board.ir_codes->ir_type == IR_TYPE_RC5) {
+                dev->board.xclk |= EM28XX_XCLK_IR_RC5_MODE;
+                ir->full_code = 1;
+        } else  if (dev->board.ir_codes->ir_type == IR_TYPE_NEC) {
+                dev->board.xclk &= ~EM28XX_XCLK_IR_RC5_MODE;
+                ir_config = EM2874_IR_NEC;
+                ir->full_code = 1;
+        }
+        em28xx_write_reg_bits(dev, EM28XX_R0F_XCLK, dev->board.xclk,
+                              EM28XX_XCLK_IR_RC5_MODE);
        /* Setup the proper handler based on the chip */
        switch (dev->chip_id) {
        case CHIP_ID_EM2860:
        case CHIP_ID_EM2883:
-                if (dev->model == EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950)
-                        ir->full_code = 1;
                ir->get_key = default_polling_getkey;
                break;
        case CHIP_ID_EM2874:
                ir->get_key = em2874_polling_getkey;
-                /* For now we only support RC5, so enable it */
-                ir_config = EM2874_IR_RC5;
                em28xx_write_regs(dev, EM2874_R50_IR_CONFIG, &ir_config, 1);
                break;
        default:
@@ -367,8 +393,7 @@ int em28xx_ir_init(struct em28xx *dev)
        usb_make_path(dev->udev, ir->phys, sizeof(ir->phys));
        strlcat(ir->phys, "/input0", sizeof(ir->phys));
-        err = ir_input_init(input_dev, &ir->ir, IR_TYPE_OTHER,
+        err = ir_input_init(input_dev, &ir->ir, IR_TYPE_OTHER);
-                             dev->board.ir_codes);
        if (err < 0)
                goto err_out_free;
@@ -387,7 +412,7 @@ int em28xx_ir_init(struct em28xx *dev)
        em28xx_ir_start(ir);
        /* all done */
-        err = input_register_device(ir->input);
+        err = ir_input_register(ir->input, dev->board.ir_codes);
        if (err)
                goto err_out_stop;
@@ -396,8 +421,6 @@ int em28xx_ir_init(struct em28xx *dev)
        em28xx_ir_stop(ir);
        dev->ir = NULL;
 err_out_free:
-        ir_input_free(input_dev);
-        input_free_device(input_dev);
        kfree(ir);
        return err;
 }
@@ -411,8 +434,7 @@ int em28xx_ir_fini(struct em28xx *dev)
                return 0;
        em28xx_ir_stop(ir);
-        ir_input_free(ir->input);
+        ir_input_unregister(ir->input);
-        input_unregister_device(ir->input);
        kfree(ir);
        /* done */
diff --git a/drivers/media/video/em28xx/em28xx-video.c b/drivers/media/video/em28xx/em28xx-video.c
index 7ad65370f274..849b18c94037 100644
--- a/drivers/media/video/em28xx/em28xx-video.c
+++ b/drivers/media/video/em28xx/em28xx-video.c
@@ -2081,22 +2081,30 @@ static int radio_queryctrl(struct file *file, void *priv,
 */
 static int em28xx_v4l2_open(struct file *filp)
 {
-        int minor = video_devdata(filp)->minor;
+        int errCode = 0, radio = 0;
-        int errCode = 0, radio;
+        struct video_device *vdev = video_devdata(filp);
-        struct em28xx *dev;
+        struct em28xx *dev = video_drvdata(filp);
-        enum v4l2_buf_type fh_type;
+        enum v4l2_buf_type fh_type = 0;
        struct em28xx_fh *fh;
        enum v4l2_field field;
-        dev = em28xx_get_device(minor, &fh_type, &radio);
+        switch (vdev->vfl_type) {
+        case VFL_TYPE_GRABBER:
-        if (NULL == dev)
+                fh_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                return -ENODEV;
+                break;
+        case VFL_TYPE_VBI:
+                fh_type = V4L2_BUF_TYPE_VBI_CAPTURE;
+                break;
+        case VFL_TYPE_RADIO:
+                radio = 1;
+                break;
+        }
        mutex_lock(&dev->lock);
-        em28xx_videodbg("open minor=%d type=%s users=%d\n",
+        em28xx_videodbg("open dev=%s type=%s users=%d\n",
-                                minor, v4l2_type_names[fh_type], dev->users);
+                        video_device_node_name(vdev), v4l2_type_names[fh_type],
+                        dev->users);
        fh = kzalloc(sizeof(struct em28xx_fh), GFP_KERNEL);
@@ -2160,25 +2168,25 @@ void em28xx_release_analog_resources(struct em28xx *dev)
        /*FIXME: I2C IR should be disconnected */
        if (dev->radio_dev) {
-                if (-1 != dev->radio_dev->minor)
+                if (video_is_registered(dev->radio_dev))
                        video_unregister_device(dev->radio_dev);
                else
                        video_device_release(dev->radio_dev);
                dev->radio_dev = NULL;
        }
        if (dev->vbi_dev) {
-                em28xx_info("V4L2 device /dev/vbi%d deregistered\n",
+                em28xx_info("V4L2 device %s deregistered\n",
-                            dev->vbi_dev->num);
+                            video_device_node_name(dev->vbi_dev));
-                if (-1 != dev->vbi_dev->minor)
+                if (video_is_registered(dev->vbi_dev))
                        video_unregister_device(dev->vbi_dev);
                else
                        video_device_release(dev->vbi_dev);
                dev->vbi_dev = NULL;
        }
        if (dev->vdev) {
-                em28xx_info("V4L2 device /dev/video%d deregistered\n",
+                em28xx_info("V4L2 device %s deregistered\n",
-                            dev->vdev->num);
+                            video_device_node_name(dev->vdev));
-                if (-1 != dev->vdev->minor)
+                if (video_is_registered(dev->vdev))
                        video_unregister_device(dev->vdev);
                else
                        video_device_release(dev->vdev);
@@ -2397,8 +2405,6 @@ static const struct video_device em28xx_video_template = {
        .release                    = video_device_release,
        .ioctl_ops                  = &video_ioctl_ops,
-        .minor                      = -1,
        .tvnorms                    = V4L2_STD_ALL,
        .current_norm               = V4L2_STD_PAL,
 };
@@ -2433,7 +2439,6 @@ static struct video_device em28xx_radio_template = {
        .name                 = "em28xx-radio",
        .fops                 = &radio_fops,
        .ioctl_ops            = &radio_ioctl_ops,
-        .minor                = -1,
 };
 /******************************** usb interface ******************************/
@@ -2451,7 +2456,6 @@ static struct video_device *em28xx_vdev_init(struct em28xx *dev,
                return NULL;
        *vfd            = *template;
-        vfd->minor      = -1;
        vfd->v4l2_dev   = &dev->v4l2_dev;
        vfd->release    = video_device_release;
        vfd->debug      = video_debug;
@@ -2459,6 +2463,7 @@ static struct video_device *em28xx_vdev_init(struct em28xx *dev,
        snprintf(vfd->name, sizeof(vfd->name), "%s %s",
                 dev->name, type_name);
+        video_set_drvdata(vfd, dev);
        return vfd;
 }
@@ -2540,16 +2545,16 @@ int em28xx_register_analog_devices(struct em28xx *dev)
                        em28xx_errdev("can't register radio device\n");
                        return ret;
                }
-                em28xx_info("Registered radio device as /dev/radio%d\n",
+                em28xx_info("Registered radio device as %s\n",
-                            dev->radio_dev->num);
+                            video_device_node_name(dev->radio_dev));
        }
-        em28xx_info("V4L2 video device registered as /dev/video%d\n",
+        em28xx_info("V4L2 video device registered as %s\n",
-                                dev->vdev->num);
+                    video_device_node_name(dev->vdev));
        if (dev->vbi_dev)
-                em28xx_info("V4L2 VBI device registered as /dev/vbi%d\n",
+                em28xx_info("V4L2 VBI device registered as %s\n",
-                            dev->vbi_dev->num);
+                            video_device_node_name(dev->vbi_dev));
        return 0;
 }
diff --git a/drivers/media/video/em28xx/em28xx.h b/drivers/media/video/em28xx/em28xx.h
index 441df644ddbe..80d9b4fa1b97 100644
--- a/drivers/media/video/em28xx/em28xx.h
+++ b/drivers/media/video/em28xx/em28xx.h
@@ -643,6 +643,8 @@ int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
                          int len);
 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len);
 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val);
+int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
+                                 u8 bitmask);
 int em28xx_read_ac97(struct em28xx *dev, u8 reg);
 int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val);
@@ -666,9 +668,6 @@ int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio);
 void em28xx_wake_i2c(struct em28xx *dev);
 void em28xx_remove_from_devlist(struct em28xx *dev);
 void em28xx_add_into_devlist(struct em28xx *dev);
-struct em28xx *em28xx_get_device(int minor,
-                                 enum v4l2_buf_type *fh_type,
-                                 int *has_radio);
 int em28xx_register_extension(struct em28xx_ops *dev);
 void em28xx_unregister_extension(struct em28xx_ops *dev);
 void em28xx_init_extension(struct em28xx *dev);
diff --git a/drivers/media/video/et61x251/et61x251_core.c b/drivers/media/video/et61x251/et61x251_core.c
index 88987a57cf7b..e6c23d509862 100644
--- a/drivers/media/video/et61x251/et61x251_core.c
+++ b/drivers/media/video/et61x251/et61x251_core.c
@@ -587,8 +587,8 @@ static int et61x251_stream_interrupt(struct et61x251_device* cam)
        else if (cam->stream != STREAM_OFF) {
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "URB timeout reached. The camera is misconfigured. To "
-                       "use it, close and open /dev/video%d again.",
+                       "use it, close and open %s again.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                return -EIO;
        }
@@ -1195,7 +1195,8 @@ static void et61x251_release_resources(struct kref *kref)
        cam = container_of(kref, struct et61x251_device, kref);
-        DBG(2, "V4L2 device /dev/video%d deregistered", cam->v4ldev->num);
+        DBG(2, "V4L2 device %s deregistered",
+            video_device_node_name(cam->v4ldev));
        video_set_drvdata(cam->v4ldev, NULL);
        video_unregister_device(cam->v4ldev);
        usb_put_dev(cam->usbdev);
@@ -1236,8 +1237,8 @@ static int et61x251_open(struct file *filp)
        }
        if (cam->users) {
-                DBG(2, "Device /dev/video%d is already in use",
+                DBG(2, "Device %s is already in use",
-                       cam->v4ldev->num);
+                       video_device_node_name(cam->v4ldev));
                DBG(3, "Simultaneous opens are not supported");
                if ((filp->f_flags & O_NONBLOCK) ||
                    (filp->f_flags & O_NDELAY)) {
@@ -1280,7 +1281,8 @@ static int et61x251_open(struct file *filp)
        cam->frame_count = 0;
        et61x251_empty_framequeues(cam);
-        DBG(3, "Video device /dev/video%d is open", cam->v4ldev->num);
+        DBG(3, "Video device %s is open",
+            video_device_node_name(cam->v4ldev));
 out:
        mutex_unlock(&cam->open_mutex);
@@ -1304,7 +1306,8 @@ static int et61x251_release(struct file *filp)
        cam->users--;
        wake_up_interruptible_nr(&cam->wait_open, 1);
-        DBG(3, "Video device /dev/video%d closed", cam->v4ldev->num);
+        DBG(3, "Video device %s closed",
+            video_device_node_name(cam->v4ldev));
        kref_put(&cam->kref, et61x251_release_resources);
@@ -1846,8 +1849,8 @@ et61x251_vidioc_s_crop(struct et61x251_device* cam, void __user * arg)
        if (err) { /* atomic, no rollback in ioctl() */
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "VIDIOC_S_CROP failed because of hardware problems. To "
-                       "use the camera, close and open /dev/video%d again.",
+                       "use the camera, close and open %s again.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                return -EIO;
        }
@@ -1859,8 +1862,8 @@ et61x251_vidioc_s_crop(struct et61x251_device* cam, void __user * arg)
            nbuffers != et61x251_request_buffers(cam, nbuffers, cam->io)) {
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "VIDIOC_S_CROP failed because of not enough memory. To "
-                       "use the camera, close and open /dev/video%d again.",
+                       "use the camera, close and open %s again.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                return -ENOMEM;
        }
@@ -2069,8 +2072,8 @@ et61x251_vidioc_try_s_fmt(struct et61x251_device* cam, unsigned int cmd,
        if (err) { /* atomic, no rollback in ioctl() */
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "VIDIOC_S_FMT failed because of hardware problems. To "
-                       "use the camera, close and open /dev/video%d again.",
+                       "use the camera, close and open %s again.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                return -EIO;
        }
@@ -2081,8 +2084,8 @@ et61x251_vidioc_try_s_fmt(struct et61x251_device* cam, unsigned int cmd,
            nbuffers != et61x251_request_buffers(cam, nbuffers, cam->io)) {
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "VIDIOC_S_FMT failed because of not enough memory. To "
-                       "use the camera, close and open /dev/video%d again.",
+                       "use the camera, close and open %s again.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                return -ENOMEM;
        }
@@ -2130,7 +2133,7 @@ et61x251_vidioc_s_jpegcomp(struct et61x251_device* cam, void __user * arg)
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "VIDIOC_S_JPEGCOMP failed because of hardware "
                       "problems. To use the camera, close and open "
-                       "/dev/video%d again.", cam->v4ldev->num);
+                       "%s again.", video_device_node_name(cam->v4ldev));
                return -EIO;
        }
@@ -2584,7 +2587,6 @@ et61x251_usb_probe(struct usb_interface* intf, const struct usb_device_id* id)
        strcpy(cam->v4ldev->name, "ET61X[12]51 PC Camera");
        cam->v4ldev->fops = &et61x251_fops;
-        cam->v4ldev->minor = video_nr[dev_nr];
        cam->v4ldev->release = video_device_release;
        cam->v4ldev->parent = &udev->dev;
        video_set_drvdata(cam->v4ldev, cam);
@@ -2603,7 +2605,8 @@ et61x251_usb_probe(struct usb_interface* intf, const struct usb_device_id* id)
                goto fail;
        }
-        DBG(2, "V4L2 device registered as /dev/video%d", cam->v4ldev->num);
+        DBG(2, "V4L2 device registered as %s",
+            video_device_node_name(cam->v4ldev));
        cam->module_param.force_munmap = force_munmap[dev_nr];
        cam->module_param.frame_timeout = frame_timeout[dev_nr];
@@ -2654,9 +2657,9 @@ static void et61x251_usb_disconnect(struct usb_interface* intf)
        DBG(2, "Disconnecting %s...", cam->v4ldev->name);
        if (cam->users) {
-                DBG(2, "Device /dev/video%d is open! Deregistration and "
+                DBG(2, "Device %s is open! Deregistration and memory "
-                       "memory deallocation are deferred.",
+                       "deallocation are deferred.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                cam->state |= DEV_MISCONFIGURED;
                et61x251_stop_transfer(cam);
                cam->state |= DEV_DISCONNECTED;
diff --git a/drivers/media/video/gspca/conex.c b/drivers/media/video/gspca/conex.c
index 2f0b8d621e00..c98b5d69c438 100644
--- a/drivers/media/video/gspca/conex.c
+++ b/drivers/media/video/gspca/conex.c
@@ -1046,14 +1046,14 @@ static struct sd_desc sd_desc = {
 };
 /* -- module initialisation -- */
-static __devinitdata struct usb_device_id device_table[] = {
+static const struct usb_device_id device_table[] __devinitconst = {
        {USB_DEVICE(0x0572, 0x0041)},
        {}
 };
 MODULE_DEVICE_TABLE(usb, device_table);
 /* -- device connect -- */
-static int sd_probe(struct usb_interface *intf,
+static int __devinit sd_probe(struct usb_interface *intf,
                        const struct usb_device_id *id)
 {
        return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
diff --git a/drivers/media/video/gspca/etoms.c b/drivers/media/video/gspca/etoms.c
index 9de86419ae1e..fdf4c0ec5e7a 100644
--- a/drivers/media/video/gspca/etoms.c
+++ b/drivers/media/video/gspca/etoms.c
@@ -864,7 +864,7 @@ static struct sd_desc sd_desc = {
 };
 /* -- module initialisation -- */
-static __devinitdata struct usb_device_id device_table[] = {
+static const struct usb_device_id device_table[] __devinitconst = {
        {USB_DEVICE(0x102c, 0x6151), .driver_info = SENSOR_PAS106},
 #if !defined CONFIG_USB_ET61X251 && !defined CONFIG_USB_ET61X251_MODULE
        {USB_DEVICE(0x102c, 0x6251), .driver_info = SENSOR_TAS5130CXX},
@@ -875,7 +875,7 @@ static __devinitdata struct usb_device_id device_table[] = {
 MODULE_DEVICE_TABLE(usb, device_table);
 /* -- device connect -- */
-static int sd_probe(struct usb_interface *intf,
+static int __devinit sd_probe(struct usb_interface *intf,
                    const struct usb_device_id *id)
 {
        return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
diff --git a/drivers/media/video/gspca/gl860/gl860-mi1320.c b/drivers/media/video/gspca/gl860/gl860-mi1320.c
index 1355e526ee84..c276a7debdec 100644
--- a/drivers/media/video/gspca/gl860/gl860-mi1320.c
+++ b/drivers/media/video/gspca/gl860/gl860-mi1320.c
@@ -345,7 +345,7 @@ static int mi1320_configure_alt(struct gspca_dev *gspca_dev)
        return 0;
 }
-int mi1320_camera_settings(struct gspca_dev *gspca_dev)
+static int mi1320_camera_settings(struct gspca_dev *gspca_dev)
 {
        struct sd *sd = (struct sd *) gspca_dev;
diff --git a/drivers/media/video/gspca/gl860/gl860-mi2020.c b/drivers/media/video/gspca/gl860/gl860-mi2020.c
index 80cb3f1b36f7..7c31b4f2abea 100644
--- a/drivers/media/video/gspca/gl860/gl860-mi2020.c
+++ b/drivers/media/video/gspca/gl860/gl860-mi2020.c
@@ -769,7 +769,7 @@ static int mi2020_configure_alt(struct gspca_dev *gspca_dev)
        return 0;
 }
-int mi2020_camera_settings(struct gspca_dev *gspca_dev)
+static int mi2020_camera_settings(struct gspca_dev *gspca_dev)
 {
        struct sd *sd = (struct sd *) gspca_dev;
diff --git a/drivers/media/video/gspca/gl860/gl860.c b/drivers/media/video/gspca/gl860/gl860.c
index a695e0ae13c2..4878c8f66543 100644
--- a/drivers/media/video/gspca/gl860/gl860.c
+++ b/drivers/media/video/gspca/gl860/gl860.c
@@ -40,7 +40,7 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
 static void sd_callback(struct gspca_dev *gspca_dev);
 static int gl860_guess_sensor(struct gspca_dev *gspca_dev,
-                                s32 vendor_id, s32 product_id);
+                                u16 vendor_id, u16 product_id);
 /*============================ driver options ==============================*/
@@ -326,11 +326,11 @@ static int sd_config(struct gspca_dev *gspca_dev,
 {
        struct sd *sd = (struct sd *) gspca_dev;
        struct cam *cam;
-        s32 vendor_id, product_id;
+        u16 vendor_id, product_id;
        /* Get USB VendorID and ProductID */
-        vendor_id  = le16_to_cpu(id->idVendor);
+        vendor_id  = id->idVendor;
-        product_id = le16_to_cpu(id->idProduct);
+        product_id = id->idProduct;
        sd->nbRightUp = 1;
        sd->nbIm = -1;
@@ -534,8 +534,8 @@ static int sd_probe(struct usb_interface *intf,
                gspca_dev = usb_get_intfdata(intf);
                PDEBUG(D_PROBE,
-                        "Camera is now controlling video device /dev/video%d",
+                        "Camera is now controlling video device %s",
-                        gspca_dev->vdev.minor);
+                        video_device_node_name(&gspca_dev->vdev));
        }
        return ret;
@@ -673,7 +673,7 @@ void fetch_idxdata(struct gspca_dev *gspca_dev, struct idxdata *tbl, int len)
 }
 static int gl860_guess_sensor(struct gspca_dev *gspca_dev,
-                                s32 vendor_id, s32 product_id)
+                                u16 vendor_id, u16 product_id)
 {
        struct sd *sd = (struct sd *) gspca_dev;
        u8 probe, nb26, nb96, nOV, ntry;
diff --git a/drivers/media/video/gspca/gspca.c b/drivers/media/video/gspca/gspca.c
index 4076f8e5a6fc..e930a67d526b 100644
--- a/drivers/media/video/gspca/gspca.c
+++ b/drivers/media/video/gspca/gspca.c
@@ -304,7 +304,6 @@ void gspca_frame_add(struct gspca_dev *gspca_dev,
                j = gspca_dev->fr_queue[i];
                gspca_dev->cur_frame = &gspca_dev->frame[j];
        }
-        return;
 }
 EXPORT_SYMBOL(gspca_frame_add);
@@ -321,7 +320,7 @@ static int gspca_is_compressed(__u32 format)
        return 0;
 }
-static void *rvmalloc(unsigned long size)
+static void *rvmalloc(long size)
 {
        void *mem;
        unsigned long adr;
@@ -329,7 +328,7 @@ static void *rvmalloc(unsigned long size)
        mem = vmalloc_32(size);
        if (mem != NULL) {
                adr = (unsigned long) mem;
-                while ((long) size > 0) {
+                while (size > 0) {
                        SetPageReserved(vmalloc_to_page((void *) adr));
                        adr += PAGE_SIZE;
                        size -= PAGE_SIZE;
@@ -768,6 +767,7 @@ static int vidioc_g_register(struct file *file, void *priv,
        if (mutex_lock_interruptible(&gspca_dev->usb_lock))
                return -ERESTARTSYS;
+        gspca_dev->usb_err = 0;
        if (gspca_dev->present)
                ret = gspca_dev->sd_desc->get_register(gspca_dev, reg);
        else
@@ -791,6 +791,7 @@ static int vidioc_s_register(struct file *file, void *priv,
        if (mutex_lock_interruptible(&gspca_dev->usb_lock))
                return -ERESTARTSYS;
+        gspca_dev->usb_err = 0;
        if (gspca_dev->present)
                ret = gspca_dev->sd_desc->set_register(gspca_dev, reg);
        else
@@ -812,6 +813,7 @@ static int vidioc_g_chip_ident(struct file *file, void *priv,
        if (mutex_lock_interruptible(&gspca_dev->usb_lock))
                return -ERESTARTSYS;
+        gspca_dev->usb_err = 0;
        if (gspca_dev->present)
                ret = gspca_dev->sd_desc->get_chip_ident(gspca_dev, chip);
        else
@@ -983,11 +985,40 @@ static int vidioc_enum_framesizes(struct file *file, void *priv,
        return -EINVAL;
 }
+static int vidioc_enum_frameintervals(struct file *filp, void *priv,
+                                      struct v4l2_frmivalenum *fival)
+{
+        struct gspca_dev *gspca_dev = priv;
+        int mode = wxh_to_mode(gspca_dev, fival->width, fival->height);
+        __u32 i;
+        if (gspca_dev->cam.mode_framerates == NULL ||
+                        gspca_dev->cam.mode_framerates[mode].nrates == 0)
+                return -EINVAL;
+        if (fival->pixel_format !=
+                        gspca_dev->cam.cam_mode[mode].pixelformat)
+                return -EINVAL;
+        for (i = 0; i < gspca_dev->cam.mode_framerates[mode].nrates; i++) {
+                if (fival->index == i) {
+                        fival->type = V4L2_FRMSIZE_TYPE_DISCRETE;
+                        fival->discrete.numerator = 1;
+                        fival->discrete.denominator =
+                                gspca_dev->cam.mode_framerates[mode].rates[i];
+                        return 0;
+                }
+        }
+        return -EINVAL;
+}
 static void gspca_release(struct video_device *vfd)
 {
        struct gspca_dev *gspca_dev = container_of(vfd, struct gspca_dev, vdev);
-        PDEBUG(D_PROBE, "/dev/video%d released", gspca_dev->vdev.num);
+        PDEBUG(D_PROBE, "%s released",
+                video_device_node_name(&gspca_dev->vdev));
        kfree(gspca_dev->usb_buf);
        kfree(gspca_dev);
@@ -1053,6 +1084,7 @@ static int dev_close(struct file *file)
        if (gspca_dev->capt_file == file) {
                if (gspca_dev->streaming) {
                        mutex_lock(&gspca_dev->usb_lock);
+                        gspca_dev->usb_err = 0;
                        gspca_stream_off(gspca_dev);
                        mutex_unlock(&gspca_dev->usb_lock);
                }
@@ -1143,12 +1175,14 @@ static int vidioc_queryctrl(struct file *file, void *priv,
                                continue;
                        ctrls = &gspca_dev->sd_desc->ctrls[i];
                }
+                if (ctrls == NULL)
+                        return -EINVAL;
        } else {
                ctrls = get_ctrl(gspca_dev, id);
+                if (ctrls == NULL)
+                        return -EINVAL;
                i = ctrls - gspca_dev->sd_desc->ctrls;
        }
-        if (ctrls == NULL)
-                return -EINVAL;
        memcpy(q_ctrl, ctrls, sizeof *q_ctrl);
        if (gspca_dev->ctrl_inac & (1 << i))
                q_ctrl->flags |= V4L2_CTRL_FLAG_INACTIVE;
@@ -1172,6 +1206,7 @@ static int vidioc_s_ctrl(struct file *file, void *priv,
        PDEBUG(D_CONF, "set ctrl [%08x] = %d", ctrl->id, ctrl->value);
        if (mutex_lock_interruptible(&gspca_dev->usb_lock))
                return -ERESTARTSYS;
+        gspca_dev->usb_err = 0;
        if (gspca_dev->present)
                ret = ctrls->set(gspca_dev, ctrl->value);
        else
@@ -1193,6 +1228,7 @@ static int vidioc_g_ctrl(struct file *file, void *priv,
        if (mutex_lock_interruptible(&gspca_dev->usb_lock))
                return -ERESTARTSYS;
+        gspca_dev->usb_err = 0;
        if (gspca_dev->present)
                ret = ctrls->get(gspca_dev, &ctrl->value);
        else
@@ -1307,6 +1343,7 @@ static int vidioc_reqbufs(struct file *file, void *priv,
        /* stop streaming */
        if (gspca_dev->streaming) {
                mutex_lock(&gspca_dev->usb_lock);
+                gspca_dev->usb_err = 0;
                gspca_stream_off(gspca_dev);
                mutex_unlock(&gspca_dev->usb_lock);
        }
@@ -1398,6 +1435,7 @@ static int vidioc_streamoff(struct file *file, void *priv,
                ret = -ERESTARTSYS;
                goto out;
        }
+        gspca_dev->usb_err = 0;
        gspca_stream_off(gspca_dev);
        mutex_unlock(&gspca_dev->usb_lock);
@@ -1423,6 +1461,7 @@ static int vidioc_g_jpegcomp(struct file *file, void *priv,
                return -EINVAL;
        if (mutex_lock_interruptible(&gspca_dev->usb_lock))
                return -ERESTARTSYS;
+        gspca_dev->usb_err = 0;
        if (gspca_dev->present)
                ret = gspca_dev->sd_desc->get_jcomp(gspca_dev, jpegcomp);
        else
@@ -1441,6 +1480,7 @@ static int vidioc_s_jpegcomp(struct file *file, void *priv,
                return -EINVAL;
        if (mutex_lock_interruptible(&gspca_dev->usb_lock))
                return -ERESTARTSYS;
+        gspca_dev->usb_err = 0;
        if (gspca_dev->present)
                ret = gspca_dev->sd_desc->set_jcomp(gspca_dev, jpegcomp);
        else
@@ -1461,6 +1501,7 @@ static int vidioc_g_parm(struct file *filp, void *priv,
                if (mutex_lock_interruptible(&gspca_dev->usb_lock))
                        return -ERESTARTSYS;
+                gspca_dev->usb_err = 0;
                if (gspca_dev->present)
                        ret = gspca_dev->sd_desc->get_streamparm(gspca_dev,
                                                                 parm);
@@ -1490,6 +1531,7 @@ static int vidioc_s_parm(struct file *filp, void *priv,
                if (mutex_lock_interruptible(&gspca_dev->usb_lock))
                        return -ERESTARTSYS;
+                gspca_dev->usb_err = 0;
                if (gspca_dev->present)
                        ret = gspca_dev->sd_desc->set_streamparm(gspca_dev,
                                                                 parm);
@@ -1613,7 +1655,7 @@ static int dev_mmap(struct file *file, struct vm_area_struct *vma)
                size -= PAGE_SIZE;
        }
-        vma->vm_ops = (struct vm_operations_struct *) &gspca_vm_ops;
+        vma->vm_ops = &gspca_vm_ops;
        vma->vm_private_data = frame;
        gspca_vm_open(vma);
        ret = 0;
@@ -1661,6 +1703,7 @@ static int frame_wait(struct gspca_dev *gspca_dev,
        if (gspca_dev->sd_desc->dq_callback) {
                mutex_lock(&gspca_dev->usb_lock);
+                gspca_dev->usb_err = 0;
                if (gspca_dev->present)
                        gspca_dev->sd_desc->dq_callback(gspca_dev);
                mutex_unlock(&gspca_dev->usb_lock);
@@ -1973,6 +2016,7 @@ static const struct v4l2_ioctl_ops dev_ioctl_ops = {
        .vidioc_g_parm          = vidioc_g_parm,
        .vidioc_s_parm          = vidioc_s_parm,
        .vidioc_enum_framesizes = vidioc_enum_framesizes,
+        .vidioc_enum_frameintervals = vidioc_enum_frameintervals,
 #ifdef CONFIG_VIDEO_ADV_DEBUG
        .vidioc_g_register      = vidioc_g_register,
        .vidioc_s_register      = vidioc_s_register,
@@ -1988,7 +2032,6 @@ static struct video_device gspca_template = {
        .fops = &dev_fops,
        .ioctl_ops = &dev_ioctl_ops,
        .release = gspca_release,
-        .minor = -1,
 };
 /*
@@ -2049,9 +2092,6 @@ int gspca_dev_probe(struct usb_interface *intf,
        ret = sd_desc->init(gspca_dev);
        if (ret < 0)
                goto out;
-        ret = gspca_set_alt0(gspca_dev);
-        if (ret < 0)
-                goto out;
        gspca_set_default_mode(gspca_dev);
        mutex_init(&gspca_dev->usb_lock);
@@ -2073,7 +2113,7 @@ int gspca_dev_probe(struct usb_interface *intf,
        }
        usb_set_intfdata(intf, gspca_dev);
-        PDEBUG(D_PROBE, "/dev/video%d created", gspca_dev->vdev.num);
+        PDEBUG(D_PROBE, "%s created", video_device_node_name(&gspca_dev->vdev));
        return 0;
 out:
        kfree(gspca_dev->usb_buf);
@@ -2092,7 +2132,8 @@ void gspca_disconnect(struct usb_interface *intf)
 {
        struct gspca_dev *gspca_dev = usb_get_intfdata(intf);
-        PDEBUG(D_PROBE, "/dev/video%d disconnect", gspca_dev->vdev.num);
+        PDEBUG(D_PROBE, "%s disconnect",
+                video_device_node_name(&gspca_dev->vdev));
        mutex_lock(&gspca_dev->usb_lock);
        gspca_dev->present = 0;
diff --git a/drivers/media/video/gspca/gspca.h b/drivers/media/video/gspca/gspca.h
index 181617355ec3..59c7941da999 100644
--- a/drivers/media/video/gspca/gspca.h
+++ b/drivers/media/video/gspca/gspca.h
@@ -45,11 +45,20 @@ extern int gspca_debug;
 /* image transfers */
 #define MAX_NURBS 4             /* max number of URBs */
+/* used to list framerates supported by a camera mode (resolution) */
+struct framerates {
+        int *rates;
+        int nrates;
+};
 /* device information - set at probe time */
 struct cam {
        int bulk_size;          /* buffer size when image transfer by bulk */
        const struct v4l2_pix_format *cam_mode; /* size nmodes */
        char nmodes;
+        const struct framerates *mode_framerates; /* must have size nmode,
+                                                   * just like cam_mode */
        __u8 bulk_nurbs;        /* number of URBs in bulk mode
                                 * - cannot be > MAX_NURBS
                                 * - when 0 and bulk_size != 0 means
@@ -171,6 +180,7 @@ struct gspca_dev {
        struct mutex usb_lock;          /* usb exchange protection */
        struct mutex read_lock;         /* read protection */
        struct mutex queue_lock;        /* ISOC queue protection */
+        int usb_err;                    /* USB error - protected by usb_lock */
 #ifdef CONFIG_PM
        char frozen;                    /* suspend - resume */
 #endif
diff --git a/drivers/media/video/gspca/m5602/m5602_core.c b/drivers/media/video/gspca/m5602/m5602_core.c
index 844fc1d886d1..4294c75e3b11 100644
--- a/drivers/media/video/gspca/m5602/m5602_core.c
+++ b/drivers/media/video/gspca/m5602/m5602_core.c
@@ -81,7 +81,7 @@ int m5602_write_bridge(struct sd *sd, const u8 address, const u8 i2c_data)
        return (err < 0) ? err : 0;
 }
-int m5602_wait_for_i2c(struct sd *sd)
+static int m5602_wait_for_i2c(struct sd *sd)
 {
        int err;
        u8 data;
@@ -388,7 +388,7 @@ static int m5602_probe(struct usb_interface *intf,
                               THIS_MODULE);
 }
-void m5602_disconnect(struct usb_interface *intf)
+static void m5602_disconnect(struct usb_interface *intf)
 {
        struct gspca_dev *gspca_dev = usb_get_intfdata(intf);
        struct sd *sd = (struct sd *) gspca_dev;
diff --git a/drivers/media/video/gspca/m5602/m5602_ov9650.c b/drivers/media/video/gspca/m5602/m5602_ov9650.c
index c2739d6605a1..923cdd5f7a6b 100644
--- a/drivers/media/video/gspca/m5602/m5602_ov9650.c
+++ b/drivers/media/video/gspca/m5602/m5602_ov9650.c
@@ -439,7 +439,7 @@ int ov9650_start(struct sd *sd)
                        err = m5602_write_bridge(sd, res_init_ov9650[i][1],
                                res_init_ov9650[i][2]);
                else if (res_init_ov9650[i][0] == SENSOR) {
-                        u8 data = res_init_ov9650[i][2];
+                        data = res_init_ov9650[i][2];
                        err = m5602_write_sensor(sd,
                                res_init_ov9650[i][1], &data, 1);
                }
diff --git a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
index a27afeb6f39b..aa2f3c7e2cb5 100644
--- a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
+++ b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
@@ -525,7 +525,10 @@ static int s5k4aa_set_vflip(struct gspca_dev *gspca_dev, __s32 val)
        err = m5602_read_sensor(sd, S5K4AA_ROWSTART_LO, &data, 1);
        if (err < 0)
                return err;
-        data = (data & 0xfe) | !val;
+        if (val)
+                data &= 0xfe;
+        else
+                data |= 0x01;
        err = m5602_write_sensor(sd, S5K4AA_ROWSTART_LO, &data, 1);
        return err;
 }
@@ -570,7 +573,10 @@ static int s5k4aa_set_hflip(struct gspca_dev *gspca_dev, __s32 val)
        err = m5602_read_sensor(sd, S5K4AA_COLSTART_LO, &data, 1);
        if (err < 0)
                return err;
-        data = (data & 0xfe) | !val;
+        if (val)
+                data &= 0xfe;
+        else
+                data |= 0x01;
        err = m5602_write_sensor(sd, S5K4AA_COLSTART_LO, &data, 1);
        return err;
 }
diff --git a/drivers/media/video/gspca/mr97310a.c b/drivers/media/video/gspca/mr97310a.c
index 126d968dd9e0..9154870e07d2 100644
--- a/drivers/media/video/gspca/mr97310a.c
+++ b/drivers/media/video/gspca/mr97310a.c
@@ -67,7 +67,7 @@ MODULE_DESCRIPTION("GSPCA/Mars-Semi MR97310A USB Camera Driver");
 MODULE_LICENSE("GPL");
 /* global parameters */
-int force_sensor_type = -1;
+static int force_sensor_type = -1;
 module_param(force_sensor_type, int, 0644);
 MODULE_PARM_DESC(force_sensor_type, "Force sensor type (-1 (auto), 0 or 1)");
diff --git a/drivers/media/video/gspca/ov519.c b/drivers/media/video/gspca/ov519.c
index ad9ec339981d..b4f965731244 100644
--- a/drivers/media/video/gspca/ov519.c
+++ b/drivers/media/video/gspca/ov519.c
@@ -1982,7 +1982,7 @@ static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n)
 {
        int ret;
-        *((u32 *)sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
+        *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
        ret = usb_control_msg(sd->gspca_dev.dev,
                        usb_sndctrlpipe(sd->gspca_dev.dev, 0),
@@ -2021,9 +2021,9 @@ static int ov511_i2c_w(struct sd *sd, __u8 reg, __u8 value)
                if (rc < 0)
                        return rc;
-                do
+                do {
                        rc = reg_r(sd, R511_I2C_CTL);
-                while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
+                } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
                if (rc < 0)
                        return rc;
@@ -2055,9 +2055,9 @@ static int ov511_i2c_r(struct sd *sd, __u8 reg)
                if (rc < 0)
                        return rc;
-                do
+                do {
                        rc = reg_r(sd, R511_I2C_CTL);
-                while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
+                } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
                if (rc < 0)
                        return rc;
@@ -2081,9 +2081,9 @@ static int ov511_i2c_r(struct sd *sd, __u8 reg)
                if (rc < 0)
                        return rc;
-                do
+                do {
                        rc = reg_r(sd, R511_I2C_CTL);
-                while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
+                } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
                if (rc < 0)
                        return rc;
diff --git a/drivers/media/video/gspca/pac7302.c b/drivers/media/video/gspca/pac7302.c
index 74acceea8094..de0b66c4b56e 100644
--- a/drivers/media/video/gspca/pac7302.c
+++ b/drivers/media/video/gspca/pac7302.c
@@ -90,6 +90,9 @@ struct sd {
        unsigned char autogain;
        __u8 hflip;
        __u8 vflip;
+        u8 flags;
+#define FL_HFLIP 0x01           /* mirrored by default */
+#define FL_VFLIP 0x02           /* vertical flipped by default */
        u8 sof_read;
        u8 autogain_ignore_frames;
@@ -552,6 +555,7 @@ static int sd_config(struct gspca_dev *gspca_dev,
        sd->autogain = AUTOGAIN_DEF;
        sd->hflip = HFLIP_DEF;
        sd->vflip = VFLIP_DEF;
+        sd->flags = id->driver_info;
        return 0;
 }
@@ -708,10 +712,17 @@ static int sethvflip(struct gspca_dev *gspca_dev)
 {
        struct sd *sd = (struct sd *) gspca_dev;
        int ret;
-        __u8 data;
+        u8 data, hflip, vflip;
+        hflip = sd->hflip;
+        if (sd->flags & FL_HFLIP)
+                hflip = !hflip;
+        vflip = sd->vflip;
+        if (sd->flags & FL_VFLIP)
+                vflip = !vflip;
        ret = reg_w(gspca_dev, 0xff, 0x03);             /* page 3 */
-        data = (sd->hflip ? 0x08 : 0x00) | (sd->vflip ? 0x04 : 0x00);
+        data = (hflip ? 0x08 : 0x00) | (vflip ? 0x04 : 0x00);
        if (0 <= ret)
                ret = reg_w(gspca_dev, 0x21, data);
        /* load registers to sensor (Bit 0, auto clear) */
@@ -1218,15 +1229,15 @@ static struct sd_desc sd_desc = {
 };
 /* -- module initialisation -- */
-static __devinitdata struct usb_device_id device_table[] = {
+static const struct usb_device_id device_table[] __devinitconst = {
        {USB_DEVICE(0x06f8, 0x3009)},
        {USB_DEVICE(0x093a, 0x2620)},
        {USB_DEVICE(0x093a, 0x2621)},
-        {USB_DEVICE(0x093a, 0x2622)},
+        {USB_DEVICE(0x093a, 0x2622), .driver_info = FL_VFLIP},
-        {USB_DEVICE(0x093a, 0x2624)},
+        {USB_DEVICE(0x093a, 0x2624), .driver_info = FL_VFLIP},
        {USB_DEVICE(0x093a, 0x2626)},
        {USB_DEVICE(0x093a, 0x2628)},
-        {USB_DEVICE(0x093a, 0x2629)},
+        {USB_DEVICE(0x093a, 0x2629), .driver_info = FL_VFLIP},
        {USB_DEVICE(0x093a, 0x262a)},
        {USB_DEVICE(0x093a, 0x262c)},
        {}
@@ -1234,7 +1245,7 @@ static __devinitdata struct usb_device_id device_table[] = {
 MODULE_DEVICE_TABLE(usb, device_table);
 /* -- device connect -- */
-static int sd_probe(struct usb_interface *intf,
+static int __devinit sd_probe(struct usb_interface *intf,
                        const struct usb_device_id *id)
 {
        return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
diff --git a/drivers/media/video/gspca/pac7311.c b/drivers/media/video/gspca/pac7311.c
index e5697a6345e8..42cfcdfd8f4f 100644
--- a/drivers/media/video/gspca/pac7311.c
+++ b/drivers/media/video/gspca/pac7311.c
@@ -863,7 +863,7 @@ static struct sd_desc sd_desc = {
 };
 /* -- module initialisation -- */
-static __devinitdata struct usb_device_id device_table[] = {
+static const struct usb_device_id device_table[] __devinitconst = {
        {USB_DEVICE(0x093a, 0x2600)},
        {USB_DEVICE(0x093a, 0x2601)},
        {USB_DEVICE(0x093a, 0x2603)},
@@ -875,7 +875,7 @@ static __devinitdata struct usb_device_id device_table[] = {
 MODULE_DEVICE_TABLE(usb, device_table);
 /* -- device connect -- */
-static int sd_probe(struct usb_interface *intf,
+static int __devinit sd_probe(struct usb_interface *intf,
                        const struct usb_device_id *id)
 {
        return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
diff --git a/drivers/media/video/gspca/sn9c20x.c b/drivers/media/video/gspca/sn9c20x.c
index b1944a7cbb0f..4cff8035614f 100644
--- a/drivers/media/video/gspca/sn9c20x.c
+++ b/drivers/media/video/gspca/sn9c20x.c
@@ -1158,7 +1158,7 @@ static int i2c_w2(struct gspca_dev *gspca_dev, u8 reg, u16 val)
        return i2c_w(gspca_dev, row);
 }
-int i2c_r1(struct gspca_dev *gspca_dev, u8 reg, u8 *val)
+static int i2c_r1(struct gspca_dev *gspca_dev, u8 reg, u8 *val)
 {
        struct sd *sd = (struct sd *) gspca_dev;
        u8 row[8];
@@ -1183,7 +1183,7 @@ int i2c_r1(struct gspca_dev *gspca_dev, u8 reg, u8 *val)
        return 0;
 }
-int i2c_r2(struct gspca_dev *gspca_dev, u8 reg, u16 *val)
+static int i2c_r2(struct gspca_dev *gspca_dev, u8 reg, u16 *val)
 {
        struct sd *sd = (struct sd *) gspca_dev;
        u8 row[8];
@@ -1476,8 +1476,9 @@ static int sn9c20x_input_init(struct gspca_dev *gspca_dev)
        if (input_register_device(sd->input_dev))
                return -EINVAL;
-        sd->input_task = kthread_run(input_kthread, gspca_dev, "sn9c20x/%d",
+        sd->input_task = kthread_run(input_kthread, gspca_dev, "sn9c20x/%s-%s",
-                                     gspca_dev->vdev.minor);
+                                     gspca_dev->dev->bus->bus_name,
+                                     gspca_dev->dev->devpath);
        if (IS_ERR(sd->input_task))
                return -EINVAL;
@@ -2174,8 +2175,7 @@ static void configure_sensor_output(struct gspca_dev *gspca_dev, int mode)
 }
 #define HW_WIN(mode, hstart, vstart) \
-((const u8 []){hstart & 0xff, hstart >> 8, \
+((const u8 []){hstart, 0, vstart, 0, \
-vstart & 0xff, vstart >> 8, \
 (mode & MODE_SXGA ? 1280 >> 4 : 640 >> 4), \
 (mode & MODE_SXGA ? 1024 >> 3 : 480 >> 3)})
diff --git a/drivers/media/video/gspca/sonixb.c b/drivers/media/video/gspca/sonixb.c
index 5be95bc65138..ddff2b5ee5c2 100644
--- a/drivers/media/video/gspca/sonixb.c
+++ b/drivers/media/video/gspca/sonixb.c
@@ -1226,7 +1226,7 @@ static const struct sd_desc sd_desc = {
        .driver_info = (SENSOR_ ## sensor << 8) | BRIDGE_ ## bridge
-static __devinitdata struct usb_device_id device_table[] = {
+static const struct usb_device_id device_table[] __devinitconst = {
        {USB_DEVICE(0x0c45, 0x6001), SB(TAS5110, 102)}, /* TAS5110C1B */
        {USB_DEVICE(0x0c45, 0x6005), SB(TAS5110, 101)}, /* TAS5110C1B */
 #if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE
@@ -1257,7 +1257,7 @@ static __devinitdata struct usb_device_id device_table[] = {
 MODULE_DEVICE_TABLE(usb, device_table);
 /* -- device connect -- */
-static int sd_probe(struct usb_interface *intf,
+static int __devinit sd_probe(struct usb_interface *intf,
                        const struct usb_device_id *id)
 {
        return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
diff --git a/drivers/media/video/gspca/spca506.c b/drivers/media/video/gspca/spca506.c
index ab28cc23e415..39257e4e074f 100644
--- a/drivers/media/video/gspca/spca506.c
+++ b/drivers/media/video/gspca/spca506.c
@@ -685,7 +685,7 @@ static struct sd_desc sd_desc = {
 };
 /* -- module initialisation -- */
-static __devinitdata struct usb_device_id device_table[] = {
+static const struct usb_device_id device_table[] __devinitconst = {
        {USB_DEVICE(0x06e1, 0xa190)},
 /*fixme: may be IntelPCCameraPro BRIDGE_SPCA505
        {USB_DEVICE(0x0733, 0x0430)}, */
@@ -696,7 +696,7 @@ static __devinitdata struct usb_device_id device_table[] = {
 MODULE_DEVICE_TABLE(usb, device_table);
 /* -- device connect -- */
-static int sd_probe(struct usb_interface *intf,
+static int __devinit sd_probe(struct usb_interface *intf,
                        const struct usb_device_id *id)
 {
        return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
diff --git a/drivers/media/video/gspca/stk014.c b/drivers/media/video/gspca/stk014.c
index 8e23320d7ab7..2e2935532d99 100644
--- a/drivers/media/video/gspca/stk014.c
+++ b/drivers/media/video/gspca/stk014.c
@@ -126,12 +126,14 @@ static const struct v4l2_pix_format vga_mode[] = {
 };
 /* -- read a register -- */
-static int reg_r(struct gspca_dev *gspca_dev,
+static u8 reg_r(struct gspca_dev *gspca_dev,
                        __u16 index)
 {
        struct usb_device *dev = gspca_dev->dev;
        int ret;
+        if (gspca_dev->usb_err < 0)
+                return 0;
        ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
                        0x00,
                        USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
@@ -141,18 +143,21 @@ static int reg_r(struct gspca_dev *gspca_dev,
                        500);
        if (ret < 0) {
                PDEBUG(D_ERR, "reg_r err %d", ret);
-                return ret;
+                gspca_dev->usb_err = ret;
+                return 0;
        }
        return gspca_dev->usb_buf[0];
 }
 /* -- write a register -- */
-static int reg_w(struct gspca_dev *gspca_dev,
+static void reg_w(struct gspca_dev *gspca_dev,
                        __u16 index, __u16 value)
 {
        struct usb_device *dev = gspca_dev->dev;
        int ret;
+        if (gspca_dev->usb_err < 0)
+                return;
        ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
                        0x01,
                        USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
@@ -161,13 +166,14 @@ static int reg_w(struct gspca_dev *gspca_dev,
                        NULL,
                        0,
                        500);
-        if (ret < 0)
+        if (ret < 0) {
                PDEBUG(D_ERR, "reg_w err %d", ret);
-        return ret;
+                gspca_dev->usb_err = ret;
+        }
 }
 /* -- get a bulk value (4 bytes) -- */
-static int rcv_val(struct gspca_dev *gspca_dev,
+static void rcv_val(struct gspca_dev *gspca_dev,
                        int ads)
 {
        struct usb_device *dev = gspca_dev->dev;
@@ -182,17 +188,22 @@ static int rcv_val(struct gspca_dev *gspca_dev,
        reg_w(gspca_dev, 0x63a, 0);
        reg_w(gspca_dev, 0x63b, 0);
        reg_w(gspca_dev, 0x630, 5);
+        if (gspca_dev->usb_err < 0)
+                return;
        ret = usb_bulk_msg(dev,
                        usb_rcvbulkpipe(dev, 0x05),
                        gspca_dev->usb_buf,
                        4,              /* length */
                        &alen,
                        500);           /* timeout in milliseconds */
-        return ret;
+        if (ret < 0) {
+                PDEBUG(D_ERR, "rcv_val err %d", ret);
+                gspca_dev->usb_err = ret;
+        }
 }
 /* -- send a bulk value -- */
-static int snd_val(struct gspca_dev *gspca_dev,
+static void snd_val(struct gspca_dev *gspca_dev,
                        int ads,
                        unsigned int val)
 {
@@ -201,16 +212,9 @@ static int snd_val(struct gspca_dev *gspca_dev,
        __u8 seq = 0;
        if (ads == 0x003f08) {
-                ret = reg_r(gspca_dev, 0x0704);
+                reg_r(gspca_dev, 0x0704);
-                if (ret < 0)
+                seq = reg_r(gspca_dev, 0x0705);
-                        goto ko;
+                reg_r(gspca_dev, 0x0650);
-                ret = reg_r(gspca_dev, 0x0705);
-                if (ret < 0)
-                        goto ko;
-                seq = ret;              /* keep the sequence number */
-                ret = reg_r(gspca_dev, 0x0650);
-                if (ret < 0)
-                        goto ko;
                reg_w(gspca_dev, 0x654, seq);
        } else {
                reg_w(gspca_dev, 0x654, (ads >> 16) & 0xff);
@@ -223,6 +227,8 @@ static int snd_val(struct gspca_dev *gspca_dev,
        reg_w(gspca_dev, 0x65a, 0);
        reg_w(gspca_dev, 0x65b, 0);
        reg_w(gspca_dev, 0x650, 5);
+        if (gspca_dev->usb_err < 0)
+                return;
        gspca_dev->usb_buf[0] = val >> 24;
        gspca_dev->usb_buf[1] = val >> 16;
        gspca_dev->usb_buf[2] = val >> 8;
@@ -233,24 +239,23 @@ static int snd_val(struct gspca_dev *gspca_dev,
                        4,
                        &alen,
                        500);   /* timeout in milliseconds */
-        if (ret < 0)
+        if (ret < 0) {
-                goto ko;
+                PDEBUG(D_ERR, "snd_val err %d", ret);
-        if (ads == 0x003f08) {
+                gspca_dev->usb_err = ret;
-                seq += 4;
+        } else {
-                seq &= 0x3f;
+                if (ads == 0x003f08) {
-                reg_w(gspca_dev, 0x705, seq);
+                        seq += 4;
+                        seq &= 0x3f;
+                        reg_w(gspca_dev, 0x705, seq);
+                }
        }
-        return ret;
-ko:
-        PDEBUG(D_ERR, "snd_val err %d", ret);
-        return ret;
 }
 /* set a camera parameter */
-static int set_par(struct gspca_dev *gspca_dev,
+static void set_par(struct gspca_dev *gspca_dev,
                   int parval)
 {
-        return snd_val(gspca_dev, 0x003f08, parval);
+        snd_val(gspca_dev, 0x003f08, parval);
 }
 static void setbrightness(struct gspca_dev *gspca_dev)
@@ -311,18 +316,18 @@ static int sd_config(struct gspca_dev *gspca_dev,
 /* this function is called at probe and resume time */
 static int sd_init(struct gspca_dev *gspca_dev)
 {
-        int ret;
+        u8 ret;
        /* check if the device responds */
        usb_set_interface(gspca_dev->dev, gspca_dev->iface, 1);
        ret = reg_r(gspca_dev, 0x0740);
-        if (ret < 0)
+        if (gspca_dev->usb_err >= 0) {
-                return ret;
+                if (ret != 0xff) {
-        if (ret != 0xff) {
+                        PDEBUG(D_ERR|D_STREAM, "init reg: 0x%02x", ret);
-                PDEBUG(D_ERR|D_STREAM, "init reg: 0x%02x", ret);
+                        gspca_dev->usb_err = -EIO;
-                return -1;
+                }
        }
-        return 0;
+        return gspca_dev->usb_err;
 }
 /* -- start the camera -- */
@@ -357,15 +362,12 @@ static int sd_start(struct gspca_dev *gspca_dev)
        if (ret < 0) {
                PDEBUG(D_ERR|D_STREAM, "set intf %d %d failed",
                        gspca_dev->iface, gspca_dev->alt);
+                gspca_dev->usb_err = ret;
                goto out;
        }
-        ret = reg_r(gspca_dev, 0x0630);
+         reg_r(gspca_dev, 0x0630);
-        if (ret < 0)
-                goto out;
        rcv_val(gspca_dev, 0x000020);   /* << (value ff ff ff ff) */
-        ret = reg_r(gspca_dev, 0x0650);
+        reg_r(gspca_dev, 0x0650);
-        if (ret < 0)
-                goto out;
        snd_val(gspca_dev, 0x000020, 0xffffffff);
        reg_w(gspca_dev, 0x0620, 0);
        reg_w(gspca_dev, 0x0630, 0);
@@ -384,11 +386,11 @@ static int sd_start(struct gspca_dev *gspca_dev)
        /* start the video flow */
        set_par(gspca_dev, 0x01000000);
        set_par(gspca_dev, 0x01000000);
-        PDEBUG(D_STREAM, "camera started alt: 0x%02x", gspca_dev->alt);
+        if (gspca_dev->usb_err >= 0)
-        return 0;
+                PDEBUG(D_STREAM, "camera started alt: 0x%02x",
+                                gspca_dev->alt);
 out:
-        PDEBUG(D_ERR|D_STREAM, "camera start err %d", ret);
+        return gspca_dev->usb_err;
-        return ret;
 }
 static void sd_stopN(struct gspca_dev *gspca_dev)
@@ -456,7 +458,7 @@ static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
        sd->brightness = val;
        if (gspca_dev->streaming)
                setbrightness(gspca_dev);
-        return 0;
+        return gspca_dev->usb_err;
 }
 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
@@ -474,7 +476,7 @@ static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
        sd->contrast = val;
        if (gspca_dev->streaming)
                setcontrast(gspca_dev);
-        return 0;
+        return gspca_dev->usb_err;
 }
 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
@@ -492,7 +494,7 @@ static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
        sd->colors = val;
        if (gspca_dev->streaming)
                setcolors(gspca_dev);
-        return 0;
+        return gspca_dev->usb_err;
 }
 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
@@ -510,7 +512,7 @@ static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
        sd->lightfreq = val;
        if (gspca_dev->streaming)
                setfreq(gspca_dev);
-        return 0;
+        return gspca_dev->usb_err;
 }
 static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
@@ -552,7 +554,7 @@ static int sd_set_jcomp(struct gspca_dev *gspca_dev,
                sd->quality = jcomp->quality;
        if (gspca_dev->streaming)
                jpeg_set_qual(sd->jpeg_hdr, sd->quality);
-        return 0;
+        return gspca_dev->usb_err;
 }
 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
diff --git a/drivers/media/video/gspca/sunplus.c b/drivers/media/video/gspca/sunplus.c
index 72bf3b4f0a31..716df6b15fc5 100644
--- a/drivers/media/video/gspca/sunplus.c
+++ b/drivers/media/video/gspca/sunplus.c
@@ -460,13 +460,17 @@ static void reg_r(struct gspca_dev *gspca_dev,
                  u16 index,
                  u16 len)
 {
+        int ret;
 #ifdef GSPCA_DEBUG
        if (len > USB_BUF_SZ) {
                err("reg_r: buffer overflow");
                return;
        }
 #endif
-        usb_control_msg(gspca_dev->dev,
+        if (gspca_dev->usb_err < 0)
+                return;
+        ret = usb_control_msg(gspca_dev->dev,
                        usb_rcvctrlpipe(gspca_dev->dev, 0),
                        req,
                        USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
@@ -474,6 +478,10 @@ static void reg_r(struct gspca_dev *gspca_dev,
                        index,
                        len ? gspca_dev->usb_buf : NULL, len,
                        500);
+        if (ret < 0) {
+                PDEBUG(D_ERR, "reg_r err %d", ret);
+                gspca_dev->usb_err = ret;
+        }
 }
 /* write one byte */
@@ -483,40 +491,55 @@ static void reg_w_1(struct gspca_dev *gspca_dev,
                   u16 index,
                   u16 byte)
 {
+        int ret;
+        if (gspca_dev->usb_err < 0)
+                return;
        gspca_dev->usb_buf[0] = byte;
-        usb_control_msg(gspca_dev->dev,
+        ret = usb_control_msg(gspca_dev->dev,
                        usb_sndctrlpipe(gspca_dev->dev, 0),
                        req,
                        USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
                        value, index,
                        gspca_dev->usb_buf, 1,
                        500);
+        if (ret < 0) {
+                PDEBUG(D_ERR, "reg_w_1 err %d", ret);
+                gspca_dev->usb_err = ret;
+        }
 }
 /* write req / index / value */
-static int reg_w_riv(struct usb_device *dev,
+static void reg_w_riv(struct gspca_dev *gspca_dev,
                     u8 req, u16 index, u16 value)
 {
+        struct usb_device *dev = gspca_dev->dev;
        int ret;
+        if (gspca_dev->usb_err < 0)
+                return;
        ret = usb_control_msg(dev,
                        usb_sndctrlpipe(dev, 0),
                        req,
                        USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
                        value, index, NULL, 0, 500);
-        PDEBUG(D_USBO, "reg write: 0x%02x,0x%02x:0x%02x, %d",
+        if (ret < 0) {
-                req, index, value, ret);
+                PDEBUG(D_ERR, "reg_w_riv err %d", ret);
-        if (ret < 0)
+                gspca_dev->usb_err = ret;
-                PDEBUG(D_ERR, "reg write: error %d", ret);
+                return;
-        return ret;
+        }
+        PDEBUG(D_USBO, "reg_w_riv: 0x%02x,0x%04x:0x%04x",
+                req, index, value);
 }
 /* read 1 byte */
-static int reg_r_1(struct gspca_dev *gspca_dev,
+static u8 reg_r_1(struct gspca_dev *gspca_dev,
                        u16 value)      /* wValue */
 {
        int ret;
+        if (gspca_dev->usb_err < 0)
+                return 0;
        ret = usb_control_msg(gspca_dev->dev,
                        usb_rcvctrlpipe(gspca_dev->dev, 0),
                        0x20,                   /* request */
@@ -527,19 +550,22 @@ static int reg_r_1(struct gspca_dev *gspca_dev,
                        500);                   /* timeout */
        if (ret < 0) {
                PDEBUG(D_ERR, "reg_r_1 err %d", ret);
+                gspca_dev->usb_err = ret;
                return 0;
        }
        return gspca_dev->usb_buf[0];
 }
-/* read 1 or 2 bytes - returns < 0 if error */
+/* read 1 or 2 bytes */
-static int reg_r_12(struct gspca_dev *gspca_dev,
+static u16 reg_r_12(struct gspca_dev *gspca_dev,
                        u8 req,         /* bRequest */
                        u16 index,      /* wIndex */
                        u16 length)     /* wLength (1 or 2 only) */
 {
        int ret;
+        if (gspca_dev->usb_err < 0)
+                return 0;
        gspca_dev->usb_buf[1] = 0;
        ret = usb_control_msg(gspca_dev->dev,
                        usb_rcvctrlpipe(gspca_dev->dev, 0),
@@ -550,62 +576,44 @@ static int reg_r_12(struct gspca_dev *gspca_dev,
                        gspca_dev->usb_buf, length,
                        500);
        if (ret < 0) {
-                PDEBUG(D_ERR, "reg_read err %d", ret);
+                PDEBUG(D_ERR, "reg_r_12 err %d", ret);
-                return -1;
+                gspca_dev->usb_err = ret;
+                return 0;
        }
        return (gspca_dev->usb_buf[1] << 8) + gspca_dev->usb_buf[0];
 }
-static int write_vector(struct gspca_dev *gspca_dev,
+static void write_vector(struct gspca_dev *gspca_dev,
                        const struct cmd *data, int ncmds)
 {
-        struct usb_device *dev = gspca_dev->dev;
-        int ret;
        while (--ncmds >= 0) {
-                ret = reg_w_riv(dev, data->req, data->idx, data->val);
+                reg_w_riv(gspca_dev, data->req, data->idx, data->val);
-                if (ret < 0) {
-                        PDEBUG(D_ERR,
-                           "Register write failed for 0x%02x, 0x%04x, 0x%04x",
-                                data->req, data->val, data->idx);
-                        return ret;
-                }
                data++;
        }
-        return 0;
 }
-static int spca50x_setup_qtable(struct gspca_dev *gspca_dev,
+static void setup_qtable(struct gspca_dev *gspca_dev,
-                                const u8 qtable[2][64])
+                        const u8 qtable[2][64])
 {
-        struct usb_device *dev = gspca_dev->dev;
+        int i;
-        int i, err;
        /* loop over y components */
-        for (i = 0; i < 64; i++) {
+        for (i = 0; i < 64; i++)
-                err = reg_w_riv(dev, 0x00, 0x2800 + i, qtable[0][i]);
+                 reg_w_riv(gspca_dev, 0x00, 0x2800 + i, qtable[0][i]);
-                if (err < 0)
-                        return err;
-        }
        /* loop over c components */
-        for (i = 0; i < 64; i++) {
+        for (i = 0; i < 64; i++)
-                err = reg_w_riv(dev, 0x00, 0x2840 + i, qtable[1][i]);
+                reg_w_riv(gspca_dev, 0x00, 0x2840 + i, qtable[1][i]);
-                if (err < 0)
-                        return err;
-        }
-        return 0;
 }
 static void spca504_acknowledged_command(struct gspca_dev *gspca_dev,
                             u8 req, u16 idx, u16 val)
 {
-        struct usb_device *dev = gspca_dev->dev;
+        u16 notdone;
-        int notdone;
-        reg_w_riv(dev, req, idx, val);
+        reg_w_riv(gspca_dev, req, idx, val);
        notdone = reg_r_12(gspca_dev, 0x01, 0x0001, 1);
-        reg_w_riv(dev, req, idx, val);
+        reg_w_riv(gspca_dev, req, idx, val);
        PDEBUG(D_FRAM, "before wait 0x%04x", notdone);
@@ -616,23 +624,22 @@ static void spca504_acknowledged_command(struct gspca_dev *gspca_dev,
 static void spca504A_acknowledged_command(struct gspca_dev *gspca_dev,
                        u8 req,
-                        u16 idx, u16 val, u8 stat, u8 count)
+                        u16 idx, u16 val, u16 endcode, u8 count)
 {
-        struct usb_device *dev = gspca_dev->dev;
+        u16 status;
-        int status;
-        u8 endcode;
-        reg_w_riv(dev, req, idx, val);
+        reg_w_riv(gspca_dev, req, idx, val);
        status = reg_r_12(gspca_dev, 0x01, 0x0001, 1);
-        endcode = stat;
+        if (gspca_dev->usb_err < 0)
-        PDEBUG(D_FRAM, "Status 0x%x Need 0x%04x", status, stat);
+                return;
+        PDEBUG(D_FRAM, "Status 0x%04x Need 0x%04x", status, endcode);
        if (!count)
                return;
        count = 200;
        while (--count > 0) {
                msleep(10);
                /* gsmart mini2 write a each wait setting 1 ms is enough */
-/*              reg_w_riv(dev, req, idx, val); */
+/*              reg_w_riv(gspca_dev, req, idx, val); */
                status = reg_r_12(gspca_dev, 0x01, 0x0001, 1);
                if (status == endcode) {
                        PDEBUG(D_FRAM, "status 0x%04x after wait %d",
@@ -642,7 +649,7 @@ static void spca504A_acknowledged_command(struct gspca_dev *gspca_dev,
        }
 }
-static int spca504B_PollingDataReady(struct gspca_dev *gspca_dev)
+static void spca504B_PollingDataReady(struct gspca_dev *gspca_dev)
 {
        int count = 10;
@@ -652,7 +659,6 @@ static int spca504B_PollingDataReady(struct gspca_dev *gspca_dev)
                        break;
                msleep(10);
        }
-        return gspca_dev->usb_buf[0];
 }
 static void spca504B_WaitCmdStatus(struct gspca_dev *gspca_dev)
@@ -686,28 +692,26 @@ static void spca50x_GetFirmware(struct gspca_dev *gspca_dev)
 static void spca504B_SetSizeType(struct gspca_dev *gspca_dev)
 {
        struct sd *sd = (struct sd *) gspca_dev;
-        struct usb_device *dev = gspca_dev->dev;
        u8 Size;
-        int rc;
        Size = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv;
        switch (sd->bridge) {
        case BRIDGE_SPCA533:
-                reg_w_riv(dev, 0x31, 0, 0);
+                reg_w_riv(gspca_dev, 0x31, 0, 0);
                spca504B_WaitCmdStatus(gspca_dev);
-                rc = spca504B_PollingDataReady(gspca_dev);
+                spca504B_PollingDataReady(gspca_dev);
                spca50x_GetFirmware(gspca_dev);
                reg_w_1(gspca_dev, 0x24, 0, 8, 2);              /* type */
                reg_r(gspca_dev, 0x24, 8, 1);
                reg_w_1(gspca_dev, 0x25, 0, 4, Size);
                reg_r(gspca_dev, 0x25, 4, 1);                   /* size */
-                rc = spca504B_PollingDataReady(gspca_dev);
+                spca504B_PollingDataReady(gspca_dev);
                /* Init the cam width height with some values get on init ? */
-                reg_w_riv(dev, 0x31, 0, 0x04);
+                reg_w_riv(gspca_dev, 0x31, 0, 0x04);
                spca504B_WaitCmdStatus(gspca_dev);
-                rc = spca504B_PollingDataReady(gspca_dev);
+                spca504B_PollingDataReady(gspca_dev);
                break;
        default:
 /* case BRIDGE_SPCA504B: */
@@ -716,7 +720,7 @@ static void spca504B_SetSizeType(struct gspca_dev *gspca_dev)
                reg_r(gspca_dev, 0x25, 4, 1);                   /* size */
                reg_w_1(gspca_dev, 0x27, 0, 0, 6);
                reg_r(gspca_dev, 0x27, 0, 1);                   /* type */
-                rc = spca504B_PollingDataReady(gspca_dev);
+                spca504B_PollingDataReady(gspca_dev);
                break;
        case BRIDGE_SPCA504:
                Size += 3;
@@ -733,8 +737,8 @@ static void spca504B_SetSizeType(struct gspca_dev *gspca_dev)
                break;
        case BRIDGE_SPCA504C:
                /* capture mode */
-                reg_w_riv(dev, 0xa0, (0x0500 | (Size & 0x0f)), 0x00);
+                reg_w_riv(gspca_dev, 0xa0, (0x0500 | (Size & 0x0f)), 0x00);
-                reg_w_riv(dev, 0x20, 0x01, 0x0500 | (Size & 0x0f));
+                reg_w_riv(gspca_dev, 0x20, 0x01, 0x0500 | (Size & 0x0f));
                break;
        }
 }
@@ -762,37 +766,33 @@ static void spca504B_setQtable(struct gspca_dev *gspca_dev)
 static void setbrightness(struct gspca_dev *gspca_dev)
 {
        struct sd *sd = (struct sd *) gspca_dev;
-        struct usb_device *dev = gspca_dev->dev;
        u16 reg;
        reg = sd->bridge == BRIDGE_SPCA536 ? 0x20f0 : 0x21a7;
-        reg_w_riv(dev, 0x00, reg, sd->brightness);
+        reg_w_riv(gspca_dev, 0x00, reg, sd->brightness);
 }
 static void setcontrast(struct gspca_dev *gspca_dev)
 {
        struct sd *sd = (struct sd *) gspca_dev;
-        struct usb_device *dev = gspca_dev->dev;
        u16 reg;
        reg = sd->bridge == BRIDGE_SPCA536 ? 0x20f1 : 0x21a8;
-        reg_w_riv(dev, 0x00, reg, sd->contrast);
+        reg_w_riv(gspca_dev, 0x00, reg, sd->contrast);
 }
 static void setcolors(struct gspca_dev *gspca_dev)
 {
        struct sd *sd = (struct sd *) gspca_dev;
-        struct usb_device *dev = gspca_dev->dev;
        u16 reg;
        reg = sd->bridge == BRIDGE_SPCA536 ? 0x20f6 : 0x21ae;
-        reg_w_riv(dev, 0x00, reg, sd->colors);
+        reg_w_riv(gspca_dev, 0x00, reg, sd->colors);
 }
 static void init_ctl_reg(struct gspca_dev *gspca_dev)
 {
        struct sd *sd = (struct sd *) gspca_dev;
-        struct usb_device *dev = gspca_dev->dev;
        int pollreg = 1;
        setbrightness(gspca_dev);
@@ -807,14 +807,14 @@ static void init_ctl_reg(struct gspca_dev *gspca_dev)
        default:
 /*      case BRIDGE_SPCA533: */
 /*      case BRIDGE_SPCA504B: */
-                reg_w_riv(dev, 0, 0x00, 0x21ad);        /* hue */
+                reg_w_riv(gspca_dev, 0, 0x00, 0x21ad);  /* hue */
-                reg_w_riv(dev, 0, 0x01, 0x21ac);        /* sat/hue */
+                reg_w_riv(gspca_dev, 0, 0x01, 0x21ac);  /* sat/hue */
-                reg_w_riv(dev, 0, 0x00, 0x21a3);        /* gamma */
+                reg_w_riv(gspca_dev, 0, 0x00, 0x21a3);  /* gamma */
                break;
        case BRIDGE_SPCA536:
-                reg_w_riv(dev, 0, 0x40, 0x20f5);
+                reg_w_riv(gspca_dev, 0, 0x40, 0x20f5);
-                reg_w_riv(dev, 0, 0x01, 0x20f4);
+                reg_w_riv(gspca_dev, 0, 0x01, 0x20f4);
-                reg_w_riv(dev, 0, 0x00, 0x2089);
+                reg_w_riv(gspca_dev, 0, 0x00, 0x2089);
                break;
        }
        if (pollreg)
@@ -881,18 +881,17 @@ static int sd_config(struct gspca_dev *gspca_dev,
 static int sd_init(struct gspca_dev *gspca_dev)
 {
        struct sd *sd = (struct sd *) gspca_dev;
-        struct usb_device *dev = gspca_dev->dev;
+        int i;
-        int i, err_code;
        u8 info[6];
        switch (sd->bridge) {
        case BRIDGE_SPCA504B:
-                reg_w_riv(dev, 0x1d, 0x00, 0);
+                reg_w_riv(gspca_dev, 0x1d, 0x00, 0);
-                reg_w_riv(dev, 0, 0x01, 0x2306);
+                reg_w_riv(gspca_dev, 0, 0x01, 0x2306);
-                reg_w_riv(dev, 0, 0x00, 0x0d04);
+                reg_w_riv(gspca_dev, 0, 0x00, 0x0d04);
-                reg_w_riv(dev, 0, 0x00, 0x2000);
+                reg_w_riv(gspca_dev, 0, 0x00, 0x2000);
-                reg_w_riv(dev, 0, 0x13, 0x2301);
+                reg_w_riv(gspca_dev, 0, 0x13, 0x2301);
-                reg_w_riv(dev, 0, 0x00, 0x2306);
+                reg_w_riv(gspca_dev, 0, 0x00, 0x2306);
                /* fall thru */
        case BRIDGE_SPCA533:
                spca504B_PollingDataReady(gspca_dev);
@@ -904,13 +903,13 @@ static int sd_init(struct gspca_dev *gspca_dev)
                reg_w_1(gspca_dev, 0x24, 0, 0, 0);
                reg_r(gspca_dev, 0x24, 0, 1);
                spca504B_PollingDataReady(gspca_dev);
-                reg_w_riv(dev, 0x34, 0, 0);
+                reg_w_riv(gspca_dev, 0x34, 0, 0);
                spca504B_WaitCmdStatus(gspca_dev);
                break;
        case BRIDGE_SPCA504C:   /* pccam600 */
                PDEBUG(D_STREAM, "Opening SPCA504 (PC-CAM 600)");
-                reg_w_riv(dev, 0xe0, 0x0000, 0x0000);
+                reg_w_riv(gspca_dev, 0xe0, 0x0000, 0x0000);
-                reg_w_riv(dev, 0xe0, 0x0000, 0x0001);   /* reset */
+                reg_w_riv(gspca_dev, 0xe0, 0x0000, 0x0001);     /* reset */
                spca504_wait_status(gspca_dev);
                if (sd->subtype == LogitechClickSmart420)
                        write_vector(gspca_dev,
@@ -919,12 +918,7 @@ static int sd_init(struct gspca_dev *gspca_dev)
                else
                        write_vector(gspca_dev, spca504_pccam600_open_data,
                                ARRAY_SIZE(spca504_pccam600_open_data));
-                err_code = spca50x_setup_qtable(gspca_dev,
+                setup_qtable(gspca_dev, qtable_creative_pccam);
-                                                qtable_creative_pccam);
-                if (err_code < 0) {
-                        PDEBUG(D_ERR|D_STREAM, "spca50x_setup_qtable failed");
-                        return err_code;
-                }
                break;
        default:
 /*      case BRIDGE_SPCA504: */
@@ -958,29 +952,24 @@ static int sd_init(struct gspca_dev *gspca_dev)
                                                        6, 0, 0x86, 1); */
 /*                      spca504A_acknowledged_command (gspca_dev, 0x24,
                                                        0, 0, 0x9D, 1); */
-                        reg_w_riv(dev, 0x00, 0x270c, 0x05); /* L92 sno1t.txt */
+                        reg_w_riv(gspca_dev, 0x00, 0x270c, 0x05);
-                        reg_w_riv(dev, 0x00, 0x2310, 0x05);
+                                                        /* L92 sno1t.txt */
+                        reg_w_riv(gspca_dev, 0x00, 0x2310, 0x05);
                        spca504A_acknowledged_command(gspca_dev, 0x01,
                                                        0x0f, 0, 0xff, 0);
                }
                /* setup qtable */
-                reg_w_riv(dev, 0, 0x2000, 0);
+                reg_w_riv(gspca_dev, 0, 0x2000, 0);
-                reg_w_riv(dev, 0, 0x2883, 1);
+                reg_w_riv(gspca_dev, 0, 0x2883, 1);
-                err_code = spca50x_setup_qtable(gspca_dev,
+                setup_qtable(gspca_dev, qtable_spca504_default);
-                                                qtable_spca504_default);
-                if (err_code < 0) {
-                        PDEBUG(D_ERR, "spca50x_setup_qtable failed");
-                        return err_code;
-                }
                break;
        }
-        return 0;
+        return gspca_dev->usb_err;
 }
 static int sd_start(struct gspca_dev *gspca_dev)
 {
        struct sd *sd = (struct sd *) gspca_dev;
-        struct usb_device *dev = gspca_dev->dev;
        int enable;
        int i;
        u8 info[6];
@@ -1005,13 +994,13 @@ static int sd_start(struct gspca_dev *gspca_dev)
                case MegapixV4:
                case LogitechClickSmart820:
                case MegaImageVI:
-                        reg_w_riv(dev, 0xf0, 0, 0);
+                        reg_w_riv(gspca_dev, 0xf0, 0, 0);
                        spca504B_WaitCmdStatus(gspca_dev);
                        reg_r(gspca_dev, 0xf0, 4, 0);
                        spca504B_WaitCmdStatus(gspca_dev);
                        break;
                default:
-                        reg_w_riv(dev, 0x31, 0, 0x04);
+                        reg_w_riv(gspca_dev, 0x31, 0, 0x04);
                        spca504B_WaitCmdStatus(gspca_dev);
                        spca504B_PollingDataReady(gspca_dev);
                        break;
@@ -1048,8 +1037,9 @@ static int sd_start(struct gspca_dev *gspca_dev)
                        spca504_acknowledged_command(gspca_dev, 0x24, 0, 0);
                }
                spca504B_SetSizeType(gspca_dev);
-                reg_w_riv(dev, 0x00, 0x270c, 0x05);     /* L92 sno1t.txt */
+                reg_w_riv(gspca_dev, 0x00, 0x270c, 0x05);
-                reg_w_riv(dev, 0x00, 0x2310, 0x05);
+                                                        /* L92 sno1t.txt */
+                reg_w_riv(gspca_dev, 0x00, 0x2310, 0x05);
                break;
        case BRIDGE_SPCA504C:
                if (sd->subtype == LogitechClickSmart420) {
@@ -1061,36 +1051,37 @@ static int sd_start(struct gspca_dev *gspca_dev)
                                ARRAY_SIZE(spca504_pccam600_init_data));
                }
                enable = (sd->autogain ? 0x04 : 0x01);
-                reg_w_riv(dev, 0x0c, 0x0000, enable);   /* auto exposure */
+                reg_w_riv(gspca_dev, 0x0c, 0x0000, enable);
-                reg_w_riv(dev, 0xb0, 0x0000, enable);   /* auto whiteness */
+                                                        /* auto exposure */
+                reg_w_riv(gspca_dev, 0xb0, 0x0000, enable);
+                                                        /* auto whiteness */
                /* set default exposure compensation and whiteness balance */
-                reg_w_riv(dev, 0x30, 0x0001, 800);      /* ~ 20 fps */
+                reg_w_riv(gspca_dev, 0x30, 0x0001, 800);        /* ~ 20 fps */
-                reg_w_riv(dev, 0x30, 0x0002, 1600);
+                reg_w_riv(gspca_dev, 0x30, 0x0002, 1600);
                spca504B_SetSizeType(gspca_dev);
                break;
        }
        init_ctl_reg(gspca_dev);
-        return 0;
+        return gspca_dev->usb_err;
 }
 static void sd_stopN(struct gspca_dev *gspca_dev)
 {
        struct sd *sd = (struct sd *) gspca_dev;
-        struct usb_device *dev = gspca_dev->dev;
        switch (sd->bridge) {
        default:
 /*      case BRIDGE_SPCA533: */
 /*      case BRIDGE_SPCA536: */
 /*      case BRIDGE_SPCA504B: */
-                reg_w_riv(dev, 0x31, 0, 0);
+                reg_w_riv(gspca_dev, 0x31, 0, 0);
                spca504B_WaitCmdStatus(gspca_dev);
                spca504B_PollingDataReady(gspca_dev);
                break;
        case BRIDGE_SPCA504:
        case BRIDGE_SPCA504C:
-                reg_w_riv(dev, 0x00, 0x2000, 0x0000);
+                reg_w_riv(gspca_dev, 0x00, 0x2000, 0x0000);
                if (sd->subtype == AiptekMiniPenCam13) {
                        /* spca504a aiptek */
@@ -1102,7 +1093,7 @@ static void sd_stopN(struct gspca_dev *gspca_dev)
                                                        0x0f, 0x00, 0xff, 1);
                } else {
                        spca504_acknowledged_command(gspca_dev, 0x24, 0, 0);
-                        reg_w_riv(dev, 0x01, 0x000f, 0x0000);
+                        reg_w_riv(gspca_dev, 0x01, 0x000f, 0x0000);
                }
                break;
        }
@@ -1216,7 +1207,7 @@ static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
        sd->brightness = val;
        if (gspca_dev->streaming)
                setbrightness(gspca_dev);
-        return 0;
+        return gspca_dev->usb_err;
 }
 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
@@ -1234,7 +1225,7 @@ static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
        sd->contrast = val;
        if (gspca_dev->streaming)
                setcontrast(gspca_dev);
-        return 0;
+        return gspca_dev->usb_err;
 }
 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
@@ -1252,7 +1243,7 @@ static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
        sd->colors = val;
        if (gspca_dev->streaming)
                setcolors(gspca_dev);
-        return 0;
+        return gspca_dev->usb_err;
 }
 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
@@ -1292,7 +1283,7 @@ static int sd_set_jcomp(struct gspca_dev *gspca_dev,
                sd->quality = jcomp->quality;
        if (gspca_dev->streaming)
                jpeg_set_qual(sd->jpeg_hdr, sd->quality);
-        return 0;
+        return gspca_dev->usb_err;
 }
 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
diff --git a/drivers/media/video/gspca/zc3xx.c b/drivers/media/video/gspca/zc3xx.c
index 69e5dc4fc9de..1a800fc1c00e 100644
--- a/drivers/media/video/gspca/zc3xx.c
+++ b/drivers/media/video/gspca/zc3xx.c
@@ -5345,9 +5345,6 @@ static const struct usb_action tas5130cxx_InitialScale[] = {	/* 320x240 */
        {0xa0, 0x01, ZC3XX_R012_VIDEOCONTROLFUNC},
        {0xa0, 0x01, ZC3XX_R001_SYSTEMOPERATING},
        {0xa0, 0x05, ZC3XX_R012_VIDEOCONTROLFUNC},
-        {0xa0, 0x07, ZC3XX_R0A5_EXPOSUREGAIN},
-        {0xa0, 0x02, ZC3XX_R0A6_EXPOSUREBLACKLVL},
        {0xa0, 0x02, ZC3XX_R003_FRAMEWIDTHHIGH},
        {0xa0, 0x80, ZC3XX_R004_FRAMEWIDTHLOW},
        {0xa0, 0x01, ZC3XX_R005_FRAMEHEIGHTHIGH},
@@ -5364,27 +5361,27 @@ static const struct usb_action tas5130cxx_InitialScale[] = {	/* 320x240 */
        {0xa0, 0xf7, ZC3XX_R101_SENSORCORRECTION},
        {0xa0, 0x0d, ZC3XX_R100_OPERATIONMODE},
        {0xa0, 0x06, ZC3XX_R189_AWBSTATUS},
-        {0xa0, 0x95, ZC3XX_R18D_YTARGET},
+        {0xa0, 0x70, ZC3XX_R18D_YTARGET},
        {0xa0, 0x50, ZC3XX_R1A8_DIGITALGAIN},
        {0xa0, 0x00, 0x01ad},
        {0xa0, 0x03, ZC3XX_R1C5_SHARPNESSMODE},
        {0xa0, 0x13, ZC3XX_R1CB_SHARPNESS05},
        {0xa0, 0x08, ZC3XX_R250_DEADPIXELSMODE},
        {0xa0, 0x08, ZC3XX_R301_EEPROMACCESS},
+        {0xa0, 0x07, ZC3XX_R0A5_EXPOSUREGAIN},
+        {0xa0, 0x02, ZC3XX_R0A6_EXPOSUREBLACKLVL},
        {}
 };
 static const struct usb_action tas5130cxx_Initial[] = { /* 640x480 */
        {0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
        {0xa0, 0x40, ZC3XX_R002_CLOCKSELECT},
-        {0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},
+        {0xa0, 0x00, ZC3XX_R008_CLOCKSETTING},
        {0xa0, 0x02, ZC3XX_R010_CMOSSENSORSELECT},
        {0xa0, 0x01, ZC3XX_R001_SYSTEMOPERATING},
        {0xa0, 0x00, ZC3XX_R001_SYSTEMOPERATING},
        {0xa0, 0x01, ZC3XX_R012_VIDEOCONTROLFUNC},
        {0xa0, 0x01, ZC3XX_R001_SYSTEMOPERATING},
        {0xa0, 0x05, ZC3XX_R012_VIDEOCONTROLFUNC},
-        {0xa0, 0x07, ZC3XX_R0A5_EXPOSUREGAIN},
-        {0xa0, 0x02, ZC3XX_R0A6_EXPOSUREBLACKLVL},
        {0xa0, 0x02, ZC3XX_R003_FRAMEWIDTHHIGH},
        {0xa0, 0x80, ZC3XX_R004_FRAMEWIDTHLOW},
        {0xa0, 0x01, ZC3XX_R005_FRAMEHEIGHTHIGH},
@@ -5400,13 +5397,15 @@ static const struct usb_action tas5130cxx_Initial[] = {	/* 640x480 */
        {0xa0, 0x37, ZC3XX_R101_SENSORCORRECTION},
        {0xa0, 0x0d, ZC3XX_R100_OPERATIONMODE},
        {0xa0, 0x06, ZC3XX_R189_AWBSTATUS},
-        {0xa0, 0x95, ZC3XX_R18D_YTARGET},
+        {0xa0, 0x70, ZC3XX_R18D_YTARGET},
        {0xa0, 0x50, ZC3XX_R1A8_DIGITALGAIN},
        {0xa0, 0x00, 0x01ad},
        {0xa0, 0x03, ZC3XX_R1C5_SHARPNESSMODE},
        {0xa0, 0x13, ZC3XX_R1CB_SHARPNESS05},
        {0xa0, 0x08, ZC3XX_R250_DEADPIXELSMODE},
        {0xa0, 0x08, ZC3XX_R301_EEPROMACCESS},
+        {0xa0, 0x07, ZC3XX_R0A5_EXPOSUREGAIN},
+        {0xa0, 0x02, ZC3XX_R0A6_EXPOSUREBLACKLVL},
        {}
 };
 static const struct usb_action tas5130cxx_50HZ[] = {
@@ -6424,11 +6423,11 @@ static int vga_2wr_probe(struct gspca_dev *gspca_dev)
        if (retword != 0)
                return 0x0e;                    /* PAS202BCB */
-        start_2wr_probe(dev, 0x02);             /* ?? */
+        start_2wr_probe(dev, 0x02);             /* TAS5130C */
        i2c_write(gspca_dev, 0x01, 0xaa, 0x00);
        retword = i2c_read(gspca_dev, 0x01);
        if (retword != 0)
-                return 0x02;                    /* ?? */
+                return 0x02;                    /* TAS5130C */
 ov_check:
        reg_r(gspca_dev, 0x0010);               /* ?? */
        reg_r(gspca_dev, 0x0010);
@@ -6505,6 +6504,8 @@ static int vga_3wr_probe(struct gspca_dev *gspca_dev)
        reg_r(gspca_dev, 0x0010);
        /* value 0x4001 is meaningless */
        if (retword != 0x4001) {
+                if ((retword & 0xff00) == 0x6400)
+                        return 0x02;            /* TAS5130C */
                for (i = 0; i < ARRAY_SIZE(chipset_revision_sensor); i++) {
                        if (chipset_revision_sensor[i].revision == retword) {
                                sd->chip_revision = retword;
@@ -6515,7 +6516,7 @@ static int vga_3wr_probe(struct gspca_dev *gspca_dev)
                }
        }
-        reg_w(dev, 0x01, 0x0000);       /* check ?? */
+        reg_w(dev, 0x01, 0x0000);       /* check PB0330 */
        reg_w(dev, 0x01, 0x0001);
        reg_w(dev, 0xdd, 0x008b);
        reg_w(dev, 0x0a, 0x0010);
@@ -6524,7 +6525,7 @@ static int vga_3wr_probe(struct gspca_dev *gspca_dev)
        retword = i2c_read(gspca_dev, 0x00);
        if (retword != 0) {
                PDEBUG(D_PROBE, "probe 3wr vga type 0a ?");
-                return 0x0a;                    /* ?? */
+                return 0x0a;                    /* PB0330 */
        }
        reg_w(dev, 0x01, 0x0000);
@@ -6673,6 +6674,10 @@ static int sd_config(struct gspca_dev *gspca_dev,
                        PDEBUG(D_PROBE, "Find Sensor HV7131B");
                        sd->sensor = SENSOR_HV7131B;
                        break;
+                case 0x02:
+                        PDEBUG(D_PROBE, "Sensor TAS5130C");
+                        sd->sensor = SENSOR_TAS5130CXX;
+                        break;
                case 0x04:
                        PDEBUG(D_PROBE, "Find Sensor CS2102");
                        sd->sensor = SENSOR_CS2102;
@@ -6866,11 +6871,14 @@ static int sd_start(struct gspca_dev *gspca_dev)
        case SENSOR_GC0305:
        case SENSOR_OV7620:
        case SENSOR_PO2030:
+        case SENSOR_TAS5130CXX:
        case SENSOR_TAS5130C_VF0250:
 /*              msleep(100);                     * ?? */
                reg_r(gspca_dev, 0x0002);       /* --> 0x40 */
                reg_w(dev, 0x09, 0x01ad);       /* (from win traces) */
                reg_w(dev, 0x15, 0x01ae);
+                if (sd->sensor == SENSOR_TAS5130CXX)
+                        break;
                reg_w(dev, 0x0d, 0x003a);
                reg_w(dev, 0x02, 0x003b);
                reg_w(dev, 0x00, 0x0038);
@@ -6887,6 +6895,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
                break;
        case SENSOR_PAS202B:
        case SENSOR_GC0305:
+        case SENSOR_TAS5130CXX:
                reg_r(gspca_dev, 0x0008);
                /* fall thru */
        case SENSOR_PO2030:
@@ -6928,6 +6937,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
                reg_w(dev, 0x40, 0x0117);
                break;
        case SENSOR_GC0305:
+        case SENSOR_TAS5130CXX:
                reg_w(dev, 0x09, 0x01ad);       /* (from win traces) */
                reg_w(dev, 0x15, 0x01ae);
                /* fall thru */
@@ -7220,7 +7230,7 @@ static const __devinitdata struct usb_device_id device_table[] = {
        {USB_DEVICE(0x0ac8, 0x0302), .driver_info = SENSOR_PAS106},
        {USB_DEVICE(0x0ac8, 0x301b)},
        {USB_DEVICE(0x0ac8, 0x303b)},
-        {USB_DEVICE(0x0ac8, 0x305b), .driver_info = SENSOR_TAS5130C_VF0250},
+        {USB_DEVICE(0x0ac8, 0x305b)},
        {USB_DEVICE(0x0ac8, 0x307b)},
        {USB_DEVICE(0x10fd, 0x0128)},
        {USB_DEVICE(0x10fd, 0x804d)},
diff --git a/drivers/media/video/hdpvr/hdpvr-core.c b/drivers/media/video/hdpvr/hdpvr-core.c
index 1c9bc94c905c..51f393d03a46 100644
--- a/drivers/media/video/hdpvr/hdpvr-core.c
+++ b/drivers/media/video/hdpvr/hdpvr-core.c
@@ -145,7 +145,7 @@ static int device_authorization(struct hdpvr_device *dev)
 #ifdef HDPVR_DEBUG
        else {
                hex_dump_to_buffer(dev->usbc_buf, 46, 16, 1, print_buf,
-                                   sizeof(print_buf), 0);
+                                   5*buf_size+1, 0);
                v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
                         "Status request returned, len %d: %s\n",
                         ret, print_buf);
@@ -168,13 +168,13 @@ static int device_authorization(struct hdpvr_device *dev)
        response = dev->usbc_buf+38;
 #ifdef HDPVR_DEBUG
-        hex_dump_to_buffer(response, 8, 16, 1, print_buf, sizeof(print_buf), 0);
+        hex_dump_to_buffer(response, 8, 16, 1, print_buf, 5*buf_size+1, 0);
        v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, "challenge: %s\n",
                 print_buf);
 #endif
        challenge(response);
 #ifdef HDPVR_DEBUG
-        hex_dump_to_buffer(response, 8, 16, 1, print_buf, sizeof(print_buf), 0);
+        hex_dump_to_buffer(response, 8, 16, 1, print_buf, 5*buf_size+1, 0);
        v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, " response: %s\n",
                 print_buf);
 #endif
@@ -376,8 +376,8 @@ static int hdpvr_probe(struct usb_interface *interface,
        usb_set_intfdata(interface, dev);
        /* let the user know what node this device is now attached to */
-        v4l2_info(&dev->v4l2_dev, "device now attached to /dev/video%d\n",
+        v4l2_info(&dev->v4l2_dev, "device now attached to %s\n",
-                  dev->video_dev->minor);
+                  video_device_node_name(dev->video_dev));
        return 0;
 error:
@@ -391,13 +391,10 @@ error:
 static void hdpvr_disconnect(struct usb_interface *interface)
 {
        struct hdpvr_device *dev;
-        int minor;
        dev = usb_get_intfdata(interface);
        usb_set_intfdata(interface, NULL);
-        minor = dev->video_dev->minor;
        /* prevent more I/O from starting and stop any ongoing */
        mutex_lock(&dev->io_mutex);
        dev->status = STATUS_DISCONNECTED;
@@ -425,7 +422,8 @@ static void hdpvr_disconnect(struct usb_interface *interface)
        atomic_dec(&dev_nr);
-        v4l2_info(&dev->v4l2_dev, "device /dev/video%d disconnected\n", minor);
+        v4l2_info(&dev->v4l2_dev, "device %s disconnected\n",
+                  video_device_node_name(dev->video_dev));
        v4l2_device_unregister(&dev->v4l2_dev);
        kfree(dev->usbc_buf);
diff --git a/drivers/media/video/hdpvr/hdpvr-video.c b/drivers/media/video/hdpvr/hdpvr-video.c
index b5439cabb381..fdd782039e9d 100644
--- a/drivers/media/video/hdpvr/hdpvr-video.c
+++ b/drivers/media/video/hdpvr/hdpvr-video.c
@@ -523,7 +523,7 @@ static unsigned int hdpvr_poll(struct file *filp, poll_table *wait)
        mutex_lock(&dev->io_mutex);
-        if (video_is_unregistered(dev->video_dev)) {
+        if (!video_is_registered(dev->video_dev)) {
                mutex_unlock(&dev->io_mutex);
                return -EIO;
        }
diff --git a/drivers/media/video/ir-kbd-i2c.c b/drivers/media/video/ir-kbd-i2c.c
index 64360d26b32d..b86e35386cee 100644
--- a/drivers/media/video/ir-kbd-i2c.c
+++ b/drivers/media/video/ir-kbd-i2c.c
@@ -353,6 +353,7 @@ static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id)
                ir_type     = IR_TYPE_RC5;
                ir_codes    = &ir_codes_fusionhdtv_mce_table;
                break;
+        case 0x0b:
        case 0x47:
        case 0x71:
                if (adap->id == I2C_HW_B_CX2388x ||
@@ -422,7 +423,7 @@ static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id)
        /* Make sure we are all setup before going on */
        if (!name || !ir->get_key || !ir_type || !ir_codes) {
-                dprintk(1, DEVNAME ": Unsupported device at address 0x%02x\n",
+                dprintk(1, ": Unsupported device at address 0x%02x\n",
                        addr);
                err = -ENODEV;
                goto err_out_free;
@@ -437,7 +438,7 @@ static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id)
                 dev_name(&client->dev));
        /* init + register input device */
-        err = ir_input_init(input_dev, &ir->ir, ir_type, ir->ir_codes);
+        err = ir_input_init(input_dev, &ir->ir, ir_type);
        if (err < 0)
                goto err_out_free;
@@ -445,7 +446,7 @@ static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id)
        input_dev->name       = ir->name;
        input_dev->phys       = ir->phys;
-        err = input_register_device(ir->input);
+        err = ir_input_register(ir->input, ir->ir_codes);
        if (err)
                goto err_out_free;
@@ -459,8 +460,6 @@ static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id)
        return 0;
 err_out_free:
-        ir_input_free(input_dev);
-        input_free_device(input_dev);
        kfree(ir);
        return err;
 }
@@ -473,8 +472,7 @@ static int ir_remove(struct i2c_client *client)
        cancel_delayed_work_sync(&ir->work);
        /* unregister device */
-        ir_input_free(ir->input);
+        ir_input_unregister(ir->input);
-        input_unregister_device(ir->input);
        /* free memory */
        kfree(ir);
diff --git a/drivers/media/video/ivtv/ivtv-fileops.c b/drivers/media/video/ivtv/ivtv-fileops.c
index e707ef3086b2..babcabd73c08 100644
--- a/drivers/media/video/ivtv/ivtv-fileops.c
+++ b/drivers/media/video/ivtv/ivtv-fileops.c
@@ -985,8 +985,8 @@ int ivtv_v4l2_open(struct file *filp)
        mutex_lock(&itv->serialize_lock);
        if (ivtv_init_on_first_open(itv)) {
-                IVTV_ERR("Failed to initialize on minor %d\n",
+                IVTV_ERR("Failed to initialize on device %s\n",
-                                vdev->minor);
+                         video_device_node_name(vdev));
                mutex_unlock(&itv->serialize_lock);
                return -ENXIO;
        }
diff --git a/drivers/media/video/ivtv/ivtv-streams.c b/drivers/media/video/ivtv/ivtv-streams.c
index 67699e3f2aaa..e12c6022373e 100644
--- a/drivers/media/video/ivtv/ivtv-streams.c
+++ b/drivers/media/video/ivtv/ivtv-streams.c
@@ -245,6 +245,7 @@ static int ivtv_reg_dev(struct ivtv *itv, int type)
 {
        struct ivtv_stream *s = &itv->streams[type];
        int vfl_type = ivtv_stream_info[type].vfl_type;
+        const char *name;
        int num;
        if (s->vdev == NULL)
@@ -268,24 +269,24 @@ static int ivtv_reg_dev(struct ivtv *itv, int type)
                s->vdev = NULL;
                return -ENOMEM;
        }
-        num = s->vdev->num;
+        name = video_device_node_name(s->vdev);
        switch (vfl_type) {
        case VFL_TYPE_GRABBER:
-                IVTV_INFO("Registered device video%d for %s (%d kB)\n",
+                IVTV_INFO("Registered device %s for %s (%d kB)\n",
-                        num, s->name, itv->options.kilobytes[type]);
+                        name, s->name, itv->options.kilobytes[type]);
                break;
        case VFL_TYPE_RADIO:
-                IVTV_INFO("Registered device radio%d for %s\n",
+                IVTV_INFO("Registered device %s for %s\n",
-                        num, s->name);
+                        name, s->name);
                break;
        case VFL_TYPE_VBI:
                if (itv->options.kilobytes[type])
-                        IVTV_INFO("Registered device vbi%d for %s (%d kB)\n",
+                        IVTV_INFO("Registered device %s for %s (%d kB)\n",
-                                num, s->name, itv->options.kilobytes[type]);
+                                name, s->name, itv->options.kilobytes[type]);
                else
-                        IVTV_INFO("Registered device vbi%d for %s\n",
+                        IVTV_INFO("Registered device %s for %s\n",
-                                num, s->name);
+                                name, s->name);
                break;
        }
        return 0;
diff --git a/drivers/media/video/meye.c b/drivers/media/video/meye.c
index 01e1eefcf1eb..6ffa64cd1c6d 100644
--- a/drivers/media/video/meye.c
+++ b/drivers/media/video/meye.c
@@ -1681,7 +1681,6 @@ static struct video_device meye_template = {
        .fops           = &meye_fops,
        .ioctl_ops      = &meye_ioctl_ops,
        .release        = video_device_release,
-        .minor          = -1,
 };
 #ifdef CONFIG_PM
diff --git a/drivers/media/video/mt9m001.c b/drivers/media/video/mt9m001.c
index 45388d2ce2fd..b62c0bd3f8ea 100644
--- a/drivers/media/video/mt9m001.c
+++ b/drivers/media/video/mt9m001.c
@@ -17,9 +17,11 @@
 #include <media/v4l2-chip-ident.h>
 #include <media/soc_camera.h>
-/* mt9m001 i2c address 0x5d
+/*
+ * mt9m001 i2c address 0x5d
 * The platform has to define ctruct i2c_board_info objects and link to them
- * from struct soc_camera_link */
+ * from struct soc_camera_link
+ */
 /* mt9m001 selected register addresses */
 #define MT9M001_CHIP_VERSION            0x00
@@ -46,42 +48,50 @@
 #define MT9M001_COLUMN_SKIP             20
 #define MT9M001_ROW_SKIP                12
-static const struct soc_camera_data_format mt9m001_colour_formats[] = {
+/* MT9M001 has only one fixed colorspace per pixelcode */
-        /* Order important: first natively supported,
+struct mt9m001_datafmt {
-         * second supported with a GPIO extender */
+        enum v4l2_mbus_pixelcode        code;
-        {
+        enum v4l2_colorspace            colorspace;
-                .name           = "Bayer (sRGB) 10 bit",
+};
-                .depth          = 10,
-                .fourcc         = V4L2_PIX_FMT_SBGGR16,
+/* Find a data format by a pixel code in an array */
-                .colorspace     = V4L2_COLORSPACE_SRGB,
+static const struct mt9m001_datafmt *mt9m001_find_datafmt(
-        }, {
+        enum v4l2_mbus_pixelcode code, const struct mt9m001_datafmt *fmt,
-                .name           = "Bayer (sRGB) 8 bit",
+        int n)
-                .depth          = 8,
+{
-                .fourcc         = V4L2_PIX_FMT_SBGGR8,
+        int i;
-                .colorspace     = V4L2_COLORSPACE_SRGB,
+        for (i = 0; i < n; i++)
-        }
+                if (fmt[i].code == code)
+                        return fmt + i;
+        return NULL;
+}
+static const struct mt9m001_datafmt mt9m001_colour_fmts[] = {
+        /*
+         * Order important: first natively supported,
+         * second supported with a GPIO extender
+         */
+        {V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB},
+        {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
 };
-static const struct soc_camera_data_format mt9m001_monochrome_formats[] = {
+static const struct mt9m001_datafmt mt9m001_monochrome_fmts[] = {
        /* Order important - see above */
-        {
+        {V4L2_MBUS_FMT_Y10_1X10, V4L2_COLORSPACE_JPEG},
-                .name           = "Monochrome 10 bit",
+        {V4L2_MBUS_FMT_GREY8_1X8, V4L2_COLORSPACE_JPEG},
-                .depth          = 10,
-                .fourcc         = V4L2_PIX_FMT_Y16,
-        }, {
-                .name           = "Monochrome 8 bit",
-                .depth          = 8,
-                .fourcc         = V4L2_PIX_FMT_GREY,
-        },
 };
 struct mt9m001 {
        struct v4l2_subdev subdev;
        struct v4l2_rect rect;  /* Sensor window */
-        __u32 fourcc;
+        const struct mt9m001_datafmt *fmt;
+        const struct mt9m001_datafmt *fmts;
+        int num_fmts;
        int model;      /* V4L2_IDENT_MT9M001* codes from v4l2-chip-ident.h */
        unsigned int gain;
        unsigned int exposure;
+        unsigned short y_skip_top;      /* Lines to skip at the top */
        unsigned char autoexposure;
 };
@@ -204,8 +214,7 @@ static int mt9m001_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
        const u16 hblank = 9, vblank = 25;
        unsigned int total_h;
-        if (mt9m001->fourcc == V4L2_PIX_FMT_SBGGR8 ||
+        if (mt9m001->fmts == mt9m001_colour_fmts)
-            mt9m001->fourcc == V4L2_PIX_FMT_SBGGR16)
                /*
                 * Bayer format - even number of rows for simplicity,
                 * but let the user play with the top row.
@@ -222,15 +231,17 @@ static int mt9m001_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
        soc_camera_limit_side(&rect.top, &rect.height,
                     MT9M001_ROW_SKIP, MT9M001_MIN_HEIGHT, MT9M001_MAX_HEIGHT);
-        total_h = rect.height + icd->y_skip_top + vblank;
+        total_h = rect.height + mt9m001->y_skip_top + vblank;
        /* Blanking and start values - default... */
        ret = reg_write(client, MT9M001_HORIZONTAL_BLANKING, hblank);
        if (!ret)
                ret = reg_write(client, MT9M001_VERTICAL_BLANKING, vblank);
-        /* The caller provides a supported format, as verified per
+        /*
-         * call to icd->try_fmt() */
+         * The caller provides a supported format, as verified per
+         * call to icd->try_fmt()
+         */
        if (!ret)
                ret = reg_write(client, MT9M001_COLUMN_START, rect.left);
        if (!ret)
@@ -239,7 +250,7 @@ static int mt9m001_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
                ret = reg_write(client, MT9M001_WINDOW_WIDTH, rect.width - 1);
        if (!ret)
                ret = reg_write(client, MT9M001_WINDOW_HEIGHT,
-                                rect.height + icd->y_skip_top - 1);
+                                rect.height + mt9m001->y_skip_top - 1);
        if (!ret && mt9m001->autoexposure) {
                ret = reg_write(client, MT9M001_SHUTTER_WIDTH, total_h);
                if (!ret) {
@@ -283,32 +294,32 @@ static int mt9m001_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
        return 0;
 }
-static int mt9m001_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int mt9m001_g_fmt(struct v4l2_subdev *sd,
+                         struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
        struct mt9m001 *mt9m001 = to_mt9m001(client);
-        struct v4l2_pix_format *pix = &f->fmt.pix;
-        pix->width              = mt9m001->rect.width;
+        mf->width       = mt9m001->rect.width;
-        pix->height             = mt9m001->rect.height;
+        mf->height      = mt9m001->rect.height;
-        pix->pixelformat        = mt9m001->fourcc;
+        mf->code        = mt9m001->fmt->code;
-        pix->field              = V4L2_FIELD_NONE;
+        mf->colorspace  = mt9m001->fmt->colorspace;
-        pix->colorspace         = V4L2_COLORSPACE_SRGB;
+        mf->field       = V4L2_FIELD_NONE;
        return 0;
 }
-static int mt9m001_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int mt9m001_s_fmt(struct v4l2_subdev *sd,
+                         struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
        struct mt9m001 *mt9m001 = to_mt9m001(client);
-        struct v4l2_pix_format *pix = &f->fmt.pix;
        struct v4l2_crop a = {
                .c = {
                        .left   = mt9m001->rect.left,
                        .top    = mt9m001->rect.top,
-                        .width  = pix->width,
+                        .width  = mf->width,
-                        .height = pix->height,
+                        .height = mf->height,
                },
        };
        int ret;
@@ -316,28 +327,39 @@ static int mt9m001_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
        /* No support for scaling so far, just crop. TODO: use skipping */
        ret = mt9m001_s_crop(sd, &a);
        if (!ret) {
-                pix->width = mt9m001->rect.width;
+                mf->width       = mt9m001->rect.width;
-                pix->height = mt9m001->rect.height;
+                mf->height      = mt9m001->rect.height;
-                mt9m001->fourcc = pix->pixelformat;
+                mt9m001->fmt    = mt9m001_find_datafmt(mf->code,
+                                        mt9m001->fmts, mt9m001->num_fmts);
+                mf->colorspace  = mt9m001->fmt->colorspace;
        }
        return ret;
 }
-static int mt9m001_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int mt9m001_try_fmt(struct v4l2_subdev *sd,
+                           struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
-        struct soc_camera_device *icd = client->dev.platform_data;
+        struct mt9m001 *mt9m001 = to_mt9m001(client);
-        struct v4l2_pix_format *pix = &f->fmt.pix;
+        const struct mt9m001_datafmt *fmt;
-        v4l_bound_align_image(&pix->width, MT9M001_MIN_WIDTH,
+        v4l_bound_align_image(&mf->width, MT9M001_MIN_WIDTH,
                MT9M001_MAX_WIDTH, 1,
-                &pix->height, MT9M001_MIN_HEIGHT + icd->y_skip_top,
+                &mf->height, MT9M001_MIN_HEIGHT + mt9m001->y_skip_top,
-                MT9M001_MAX_HEIGHT + icd->y_skip_top, 0, 0);
+                MT9M001_MAX_HEIGHT + mt9m001->y_skip_top, 0, 0);
+        if (mt9m001->fmts == mt9m001_colour_fmts)
+                mf->height = ALIGN(mf->height - 1, 2);
-        if (pix->pixelformat == V4L2_PIX_FMT_SBGGR8 ||
+        fmt = mt9m001_find_datafmt(mf->code, mt9m001->fmts,
-            pix->pixelformat == V4L2_PIX_FMT_SBGGR16)
+                                   mt9m001->num_fmts);
-                pix->height = ALIGN(pix->height - 1, 2);
+        if (!fmt) {
+                fmt = mt9m001->fmt;
+                mf->code = fmt->code;
+        }
+        mf->colorspace  = fmt->colorspace;
        return 0;
 }
@@ -552,7 +574,7 @@ static int mt9m001_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
                if (ctrl->value) {
                        const u16 vblank = 25;
                        unsigned int total_h = mt9m001->rect.height +
-                                icd->y_skip_top + vblank;
+                                mt9m001->y_skip_top + vblank;
                        if (reg_write(client, MT9M001_SHUTTER_WIDTH,
                                      total_h) < 0)
                                return -EIO;
@@ -568,8 +590,10 @@ static int mt9m001_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
        return 0;
 }
-/* Interface active, can use i2c. If it fails, it can indeed mean, that
+/*
- * this wasn't our capture interface, so, we wait for the right one */
+ * Interface active, can use i2c. If it fails, it can indeed mean, that
+ * this wasn't our capture interface, so, we wait for the right one
+ */
 static int mt9m001_video_probe(struct soc_camera_device *icd,
                               struct i2c_client *client)
 {
@@ -579,8 +603,10 @@ static int mt9m001_video_probe(struct soc_camera_device *icd,
        unsigned long flags;
        int ret;
-        /* We must have a parent by now. And it cannot be a wrong one.
+        /*
-         * So this entire test is completely redundant. */
+         * We must have a parent by now. And it cannot be a wrong one.
+         * So this entire test is completely redundant.
+         */
        if (!icd->dev.parent ||
            to_soc_camera_host(icd->dev.parent)->nr != icd->iface)
                return -ENODEV;
@@ -597,11 +623,11 @@ static int mt9m001_video_probe(struct soc_camera_device *icd,
        case 0x8411:
        case 0x8421:
                mt9m001->model = V4L2_IDENT_MT9M001C12ST;
-                icd->formats = mt9m001_colour_formats;
+                mt9m001->fmts = mt9m001_colour_fmts;
                break;
        case 0x8431:
                mt9m001->model = V4L2_IDENT_MT9M001C12STM;
-                icd->formats = mt9m001_monochrome_formats;
+                mt9m001->fmts = mt9m001_monochrome_fmts;
                break;
        default:
                dev_err(&client->dev,
@@ -609,7 +635,7 @@ static int mt9m001_video_probe(struct soc_camera_device *icd,
                return -ENODEV;
        }
-        icd->num_formats = 0;
+        mt9m001->num_fmts = 0;
        /*
         * This is a 10bit sensor, so by default we only allow 10bit.
@@ -622,14 +648,14 @@ static int mt9m001_video_probe(struct soc_camera_device *icd,
                flags = SOCAM_DATAWIDTH_10;
        if (flags & SOCAM_DATAWIDTH_10)
-                icd->num_formats++;
+                mt9m001->num_fmts++;
        else
-                icd->formats++;
+                mt9m001->fmts++;
        if (flags & SOCAM_DATAWIDTH_8)
-                icd->num_formats++;
+                mt9m001->num_fmts++;
-        mt9m001->fourcc = icd->formats->fourcc;
+        mt9m001->fmt = &mt9m001->fmts[0];
        dev_info(&client->dev, "Detected a MT9M001 chip ID %x (%s)\n", data,
                 data == 0x8431 ? "C12STM" : "C12ST");
@@ -655,6 +681,16 @@ static void mt9m001_video_remove(struct soc_camera_device *icd)
                icl->free_bus(icl);
 }
+static int mt9m001_g_skip_top_lines(struct v4l2_subdev *sd, u32 *lines)
+{
+        struct i2c_client *client = sd->priv;
+        struct mt9m001 *mt9m001 = to_mt9m001(client);
+        *lines = mt9m001->y_skip_top;
+        return 0;
+}
 static struct v4l2_subdev_core_ops mt9m001_subdev_core_ops = {
        .g_ctrl         = mt9m001_g_ctrl,
        .s_ctrl         = mt9m001_s_ctrl,
@@ -665,19 +701,38 @@ static struct v4l2_subdev_core_ops mt9m001_subdev_core_ops = {
 #endif
 };
+static int mt9m001_enum_fmt(struct v4l2_subdev *sd, int index,
+                            enum v4l2_mbus_pixelcode *code)
+{
+        struct i2c_client *client = sd->priv;
+        struct mt9m001 *mt9m001 = to_mt9m001(client);
+        if ((unsigned int)index >= mt9m001->num_fmts)
+                return -EINVAL;
+        *code = mt9m001->fmts[index].code;
+        return 0;
+}
 static struct v4l2_subdev_video_ops mt9m001_subdev_video_ops = {
        .s_stream       = mt9m001_s_stream,
-        .s_fmt          = mt9m001_s_fmt,
+        .s_mbus_fmt     = mt9m001_s_fmt,
-        .g_fmt          = mt9m001_g_fmt,
+        .g_mbus_fmt     = mt9m001_g_fmt,
-        .try_fmt        = mt9m001_try_fmt,
+        .try_mbus_fmt   = mt9m001_try_fmt,
        .s_crop         = mt9m001_s_crop,
        .g_crop         = mt9m001_g_crop,
        .cropcap        = mt9m001_cropcap,
+        .enum_mbus_fmt  = mt9m001_enum_fmt,
+};
+static struct v4l2_subdev_sensor_ops mt9m001_subdev_sensor_ops = {
+        .g_skip_top_lines       = mt9m001_g_skip_top_lines,
 };
 static struct v4l2_subdev_ops mt9m001_subdev_ops = {
        .core   = &mt9m001_subdev_core_ops,
        .video  = &mt9m001_subdev_video_ops,
+        .sensor = &mt9m001_subdev_sensor_ops,
 };
 static int mt9m001_probe(struct i2c_client *client,
@@ -714,15 +769,17 @@ static int mt9m001_probe(struct i2c_client *client,
        /* Second stage probe - when a capture adapter is there */
        icd->ops                = &mt9m001_ops;
-        icd->y_skip_top         = 0;
+        mt9m001->y_skip_top     = 0;
        mt9m001->rect.left      = MT9M001_COLUMN_SKIP;
        mt9m001->rect.top       = MT9M001_ROW_SKIP;
        mt9m001->rect.width     = MT9M001_MAX_WIDTH;
        mt9m001->rect.height    = MT9M001_MAX_HEIGHT;
-        /* Simulated autoexposure. If enabled, we calculate shutter width
+        /*
-         * ourselves in the driver based on vertical blanking and frame width */
+         * Simulated autoexposure. If enabled, we calculate shutter width
+         * ourselves in the driver based on vertical blanking and frame width
+         */
        mt9m001->autoexposure = 1;
        ret = mt9m001_video_probe(icd, client);
diff --git a/drivers/media/video/mt9m111.c b/drivers/media/video/mt9m111.c
index 90da699601ea..d35f536f9fc3 100644
--- a/drivers/media/video/mt9m111.c
+++ b/drivers/media/video/mt9m111.c
@@ -123,23 +123,34 @@
 #define MT9M111_MAX_HEIGHT      1024
 #define MT9M111_MAX_WIDTH       1280
-#define COL_FMT(_name, _depth, _fourcc, _colorspace) \
+/* MT9M111 has only one fixed colorspace per pixelcode */
-        { .name = _name, .depth = _depth, .fourcc = _fourcc, \
+struct mt9m111_datafmt {
-        .colorspace = _colorspace }
+        enum v4l2_mbus_pixelcode        code;
-#define RGB_FMT(_name, _depth, _fourcc) \
+        enum v4l2_colorspace            colorspace;
-        COL_FMT(_name, _depth, _fourcc, V4L2_COLORSPACE_SRGB)
+};
-#define JPG_FMT(_name, _depth, _fourcc) \
-        COL_FMT(_name, _depth, _fourcc, V4L2_COLORSPACE_JPEG)
+/* Find a data format by a pixel code in an array */
+static const struct mt9m111_datafmt *mt9m111_find_datafmt(
-static const struct soc_camera_data_format mt9m111_colour_formats[] = {
+        enum v4l2_mbus_pixelcode code, const struct mt9m111_datafmt *fmt,
-        JPG_FMT("CbYCrY 16 bit", 16, V4L2_PIX_FMT_UYVY),
+        int n)
-        JPG_FMT("CrYCbY 16 bit", 16, V4L2_PIX_FMT_VYUY),
+{
-        JPG_FMT("YCbYCr 16 bit", 16, V4L2_PIX_FMT_YUYV),
+        int i;
-        JPG_FMT("YCrYCb 16 bit", 16, V4L2_PIX_FMT_YVYU),
+        for (i = 0; i < n; i++)
-        RGB_FMT("RGB 565", 16, V4L2_PIX_FMT_RGB565),
+                if (fmt[i].code == code)
-        RGB_FMT("RGB 555", 16, V4L2_PIX_FMT_RGB555),
+                        return fmt + i;
-        RGB_FMT("Bayer (sRGB) 10 bit", 10, V4L2_PIX_FMT_SBGGR16),
-        RGB_FMT("Bayer (sRGB) 8 bit", 8, V4L2_PIX_FMT_SBGGR8),
+        return NULL;
+}
+static const struct mt9m111_datafmt mt9m111_colour_fmts[] = {
+        {V4L2_MBUS_FMT_YUYV8_2X8_LE, V4L2_COLORSPACE_JPEG},
+        {V4L2_MBUS_FMT_YVYU8_2X8_LE, V4L2_COLORSPACE_JPEG},
+        {V4L2_MBUS_FMT_YUYV8_2X8_BE, V4L2_COLORSPACE_JPEG},
+        {V4L2_MBUS_FMT_YVYU8_2X8_BE, V4L2_COLORSPACE_JPEG},
+        {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
+        {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
+        {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
+        {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
 };
 enum mt9m111_context {
@@ -152,7 +163,7 @@ struct mt9m111 {
        int model;      /* V4L2_IDENT_MT9M11x* codes from v4l2-chip-ident.h */
        enum mt9m111_context context;
        struct v4l2_rect rect;
-        u32 pixfmt;
+        const struct mt9m111_datafmt *fmt;
        unsigned int gain;
        unsigned char autoexposure;
        unsigned char datawidth;
@@ -258,8 +269,8 @@ static int mt9m111_setup_rect(struct i2c_client *client,
        int width = rect->width;
        int height = rect->height;
-        if (mt9m111->pixfmt == V4L2_PIX_FMT_SBGGR8 ||
+        if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
-            mt9m111->pixfmt == V4L2_PIX_FMT_SBGGR16)
+            mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE)
                is_raw_format = 1;
        else
                is_raw_format = 0;
@@ -307,7 +318,8 @@ static int mt9m111_setup_pixfmt(struct i2c_client *client, u16 outfmt)
 static int mt9m111_setfmt_bayer8(struct i2c_client *client)
 {
-        return mt9m111_setup_pixfmt(client, MT9M111_OUTFMT_PROCESSED_BAYER);
+        return mt9m111_setup_pixfmt(client, MT9M111_OUTFMT_PROCESSED_BAYER |
+                                    MT9M111_OUTFMT_RGB);
 }
 static int mt9m111_setfmt_bayer10(struct i2c_client *client)
@@ -401,8 +413,8 @@ static int mt9m111_make_rect(struct i2c_client *client,
 {
        struct mt9m111 *mt9m111 = to_mt9m111(client);
-        if (mt9m111->pixfmt == V4L2_PIX_FMT_SBGGR8 ||
+        if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
-            mt9m111->pixfmt == V4L2_PIX_FMT_SBGGR16) {
+            mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
                /* Bayer format - even size lengths */
                rect->width     = ALIGN(rect->width, 2);
                rect->height    = ALIGN(rect->height, 2);
@@ -460,120 +472,139 @@ static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
        return 0;
 }
-static int mt9m111_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int mt9m111_g_fmt(struct v4l2_subdev *sd,
+                         struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
        struct mt9m111 *mt9m111 = to_mt9m111(client);
-        struct v4l2_pix_format *pix = &f->fmt.pix;
-        pix->width              = mt9m111->rect.width;
+        mf->width       = mt9m111->rect.width;
-        pix->height             = mt9m111->rect.height;
+        mf->height      = mt9m111->rect.height;
-        pix->pixelformat        = mt9m111->pixfmt;
+        mf->code        = mt9m111->fmt->code;
-        pix->field              = V4L2_FIELD_NONE;
+        mf->field       = V4L2_FIELD_NONE;
-        pix->colorspace         = V4L2_COLORSPACE_SRGB;
        return 0;
 }
-static int mt9m111_set_pixfmt(struct i2c_client *client, u32 pixfmt)
+static int mt9m111_set_pixfmt(struct i2c_client *client,
+                              enum v4l2_mbus_pixelcode code)
 {
        struct mt9m111 *mt9m111 = to_mt9m111(client);
        int ret;
-        switch (pixfmt) {
+        switch (code) {
-        case V4L2_PIX_FMT_SBGGR8:
+        case V4L2_MBUS_FMT_SBGGR8_1X8:
                ret = mt9m111_setfmt_bayer8(client);
                break;
-        case V4L2_PIX_FMT_SBGGR16:
+        case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
                ret = mt9m111_setfmt_bayer10(client);
                break;
-        case V4L2_PIX_FMT_RGB555:
+        case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
                ret = mt9m111_setfmt_rgb555(client);
                break;
-        case V4L2_PIX_FMT_RGB565:
+        case V4L2_MBUS_FMT_RGB565_2X8_LE:
                ret = mt9m111_setfmt_rgb565(client);
                break;
-        case V4L2_PIX_FMT_UYVY:
+        case V4L2_MBUS_FMT_YUYV8_2X8_BE:
                mt9m111->swap_yuv_y_chromas = 0;
                mt9m111->swap_yuv_cb_cr = 0;
                ret = mt9m111_setfmt_yuv(client);
                break;
-        case V4L2_PIX_FMT_VYUY:
+        case V4L2_MBUS_FMT_YVYU8_2X8_BE:
                mt9m111->swap_yuv_y_chromas = 0;
                mt9m111->swap_yuv_cb_cr = 1;
                ret = mt9m111_setfmt_yuv(client);
                break;
-        case V4L2_PIX_FMT_YUYV:
+        case V4L2_MBUS_FMT_YUYV8_2X8_LE:
                mt9m111->swap_yuv_y_chromas = 1;
                mt9m111->swap_yuv_cb_cr = 0;
                ret = mt9m111_setfmt_yuv(client);
                break;
-        case V4L2_PIX_FMT_YVYU:
+        case V4L2_MBUS_FMT_YVYU8_2X8_LE:
                mt9m111->swap_yuv_y_chromas = 1;
                mt9m111->swap_yuv_cb_cr = 1;
                ret = mt9m111_setfmt_yuv(client);
                break;
        default:
                dev_err(&client->dev, "Pixel format not handled : %x\n",
-                        pixfmt);
+                        code);
                ret = -EINVAL;
        }
-        if (!ret)
-                mt9m111->pixfmt = pixfmt;
        return ret;
 }
-static int mt9m111_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int mt9m111_s_fmt(struct v4l2_subdev *sd,
+                         struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
+        const struct mt9m111_datafmt *fmt;
        struct mt9m111 *mt9m111 = to_mt9m111(client);
-        struct v4l2_pix_format *pix = &f->fmt.pix;
        struct v4l2_rect rect = {
                .left   = mt9m111->rect.left,
                .top    = mt9m111->rect.top,
-                .width  = pix->width,
+                .width  = mf->width,
-                .height = pix->height,
+                .height = mf->height,
        };
        int ret;
+        fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
+                                   ARRAY_SIZE(mt9m111_colour_fmts));
+        if (!fmt)
+                return -EINVAL;
        dev_dbg(&client->dev,
-                "%s fmt=%x left=%d, top=%d, width=%d, height=%d\n", __func__,
+                "%s code=%x left=%d, top=%d, width=%d, height=%d\n", __func__,
-                pix->pixelformat, rect.left, rect.top, rect.width, rect.height);
+                mf->code, rect.left, rect.top, rect.width, rect.height);
        ret = mt9m111_make_rect(client, &rect);
        if (!ret)
-                ret = mt9m111_set_pixfmt(client, pix->pixelformat);
+                ret = mt9m111_set_pixfmt(client, mf->code);
-        if (!ret)
+        if (!ret) {
-                mt9m111->rect = rect;
+                mt9m111->rect   = rect;
+                mt9m111->fmt    = fmt;
+                mf->colorspace  = fmt->colorspace;
+        }
        return ret;
 }
-static int mt9m111_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int mt9m111_try_fmt(struct v4l2_subdev *sd,
+                           struct v4l2_mbus_framefmt *mf)
 {
-        struct v4l2_pix_format *pix = &f->fmt.pix;
+        struct i2c_client *client = sd->priv;
-        bool bayer = pix->pixelformat == V4L2_PIX_FMT_SBGGR8 ||
+        struct mt9m111 *mt9m111 = to_mt9m111(client);
-                pix->pixelformat == V4L2_PIX_FMT_SBGGR16;
+        const struct mt9m111_datafmt *fmt;
+        bool bayer = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
+                mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE;
+        fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
+                                   ARRAY_SIZE(mt9m111_colour_fmts));
+        if (!fmt) {
+                fmt = mt9m111->fmt;
+                mf->code = fmt->code;
+        }
        /*
         * With Bayer format enforce even side lengths, but let the user play
         * with the starting pixel
         */
-        if (pix->height > MT9M111_MAX_HEIGHT)
+        if (mf->height > MT9M111_MAX_HEIGHT)
-                pix->height = MT9M111_MAX_HEIGHT;
+                mf->height = MT9M111_MAX_HEIGHT;
-        else if (pix->height < 2)
+        else if (mf->height < 2)
-                pix->height = 2;
+                mf->height = 2;
        else if (bayer)
-                pix->height = ALIGN(pix->height, 2);
+                mf->height = ALIGN(mf->height, 2);
-        if (pix->width > MT9M111_MAX_WIDTH)
+        if (mf->width > MT9M111_MAX_WIDTH)
-                pix->width = MT9M111_MAX_WIDTH;
+                mf->width = MT9M111_MAX_WIDTH;
-        else if (pix->width < 2)
+        else if (mf->width < 2)
-                pix->width = 2;
+                mf->width = 2;
        else if (bayer)
-                pix->width = ALIGN(pix->width, 2);
+                mf->width = ALIGN(mf->width, 2);
+        mf->colorspace = fmt->colorspace;
        return 0;
 }
@@ -863,7 +894,7 @@ static int mt9m111_restore_state(struct i2c_client *client)
        struct mt9m111 *mt9m111 = to_mt9m111(client);
        mt9m111_set_context(client, mt9m111->context);
-        mt9m111_set_pixfmt(client, mt9m111->pixfmt);
+        mt9m111_set_pixfmt(client, mt9m111->fmt->code);
        mt9m111_setup_rect(client, &mt9m111->rect);
        mt9m111_set_flip(client, mt9m111->hflip, MT9M111_RMB_MIRROR_COLS);
        mt9m111_set_flip(client, mt9m111->vflip, MT9M111_RMB_MIRROR_ROWS);
@@ -952,9 +983,6 @@ static int mt9m111_video_probe(struct soc_camera_device *icd,
                goto ei2c;
        }
-        icd->formats = mt9m111_colour_formats;
-        icd->num_formats = ARRAY_SIZE(mt9m111_colour_formats);
        dev_info(&client->dev, "Detected a MT9M11x chip ID %x\n", data);
 ei2c:
@@ -971,13 +999,24 @@ static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = {
 #endif
 };
+static int mt9m111_enum_fmt(struct v4l2_subdev *sd, int index,
+                            enum v4l2_mbus_pixelcode *code)
+{
+        if ((unsigned int)index >= ARRAY_SIZE(mt9m111_colour_fmts))
+                return -EINVAL;
+        *code = mt9m111_colour_fmts[index].code;
+        return 0;
+}
 static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = {
-        .s_fmt          = mt9m111_s_fmt,
+        .s_mbus_fmt     = mt9m111_s_fmt,
-        .g_fmt          = mt9m111_g_fmt,
+        .g_mbus_fmt     = mt9m111_g_fmt,
-        .try_fmt        = mt9m111_try_fmt,
+        .try_mbus_fmt   = mt9m111_try_fmt,
        .s_crop         = mt9m111_s_crop,
        .g_crop         = mt9m111_g_crop,
        .cropcap        = mt9m111_cropcap,
+        .enum_mbus_fmt  = mt9m111_enum_fmt,
 };
 static struct v4l2_subdev_ops mt9m111_subdev_ops = {
@@ -1019,12 +1058,12 @@ static int mt9m111_probe(struct i2c_client *client,
        /* Second stage probe - when a capture adapter is there */
        icd->ops                = &mt9m111_ops;
-        icd->y_skip_top         = 0;
        mt9m111->rect.left      = MT9M111_MIN_DARK_COLS;
        mt9m111->rect.top       = MT9M111_MIN_DARK_ROWS;
        mt9m111->rect.width     = MT9M111_MAX_WIDTH;
        mt9m111->rect.height    = MT9M111_MAX_HEIGHT;
+        mt9m111->fmt            = &mt9m111_colour_fmts[0];
        ret = mt9m111_video_probe(icd, client);
        if (ret) {
diff --git a/drivers/media/video/mt9t031.c b/drivers/media/video/mt9t031.c
index 6966f644977e..a9061bff79b2 100644
--- a/drivers/media/video/mt9t031.c
+++ b/drivers/media/video/mt9t031.c
@@ -17,9 +17,11 @@
 #include <media/v4l2-chip-ident.h>
 #include <media/soc_camera.h>
-/* mt9t031 i2c address 0x5d
+/*
+ * mt9t031 i2c address 0x5d
 * The platform has to define i2c_board_info and link to it from
- * struct soc_camera_link */
+ * struct soc_camera_link
+ */
 /* mt9t031 selected register addresses */
 #define MT9T031_CHIP_VERSION            0x00
@@ -58,15 +60,6 @@
        SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_HIGH |      \
        SOCAM_MASTER | SOCAM_DATAWIDTH_10)
-static const struct soc_camera_data_format mt9t031_colour_formats[] = {
-        {
-                .name           = "Bayer (sRGB) 10 bit",
-                .depth          = 10,
-                .fourcc         = V4L2_PIX_FMT_SGRBG10,
-                .colorspace     = V4L2_COLORSPACE_SRGB,
-        }
-};
 struct mt9t031 {
        struct v4l2_subdev subdev;
        struct v4l2_rect rect;  /* Sensor window */
@@ -74,6 +67,7 @@ struct mt9t031 {
        u16 xskip;
        u16 yskip;
        unsigned int gain;
+        unsigned short y_skip_top;      /* Lines to skip at the top */
        unsigned int exposure;
        unsigned char autoexposure;
 };
@@ -207,6 +201,71 @@ static unsigned long mt9t031_query_bus_param(struct soc_camera_device *icd)
        return soc_camera_apply_sensor_flags(icl, MT9T031_BUS_PARAM);
 }
+enum {
+        MT9T031_CTRL_VFLIP,
+        MT9T031_CTRL_HFLIP,
+        MT9T031_CTRL_GAIN,
+        MT9T031_CTRL_EXPOSURE,
+        MT9T031_CTRL_EXPOSURE_AUTO,
+};
+static const struct v4l2_queryctrl mt9t031_controls[] = {
+        [MT9T031_CTRL_VFLIP] = {
+                .id             = V4L2_CID_VFLIP,
+                .type           = V4L2_CTRL_TYPE_BOOLEAN,
+                .name           = "Flip Vertically",
+                .minimum        = 0,
+                .maximum        = 1,
+                .step           = 1,
+                .default_value  = 0,
+        },
+        [MT9T031_CTRL_HFLIP] = {
+                .id             = V4L2_CID_HFLIP,
+                .type           = V4L2_CTRL_TYPE_BOOLEAN,
+                .name           = "Flip Horizontally",
+                .minimum        = 0,
+                .maximum        = 1,
+                .step           = 1,
+                .default_value  = 0,
+        },
+        [MT9T031_CTRL_GAIN] = {
+                .id             = V4L2_CID_GAIN,
+                .type           = V4L2_CTRL_TYPE_INTEGER,
+                .name           = "Gain",
+                .minimum        = 0,
+                .maximum        = 127,
+                .step           = 1,
+                .default_value  = 64,
+                .flags          = V4L2_CTRL_FLAG_SLIDER,
+        },
+        [MT9T031_CTRL_EXPOSURE] = {
+                .id             = V4L2_CID_EXPOSURE,
+                .type           = V4L2_CTRL_TYPE_INTEGER,
+                .name           = "Exposure",
+                .minimum        = 1,
+                .maximum        = 255,
+                .step           = 1,
+                .default_value  = 255,
+                .flags          = V4L2_CTRL_FLAG_SLIDER,
+        },
+        [MT9T031_CTRL_EXPOSURE_AUTO] = {
+                .id             = V4L2_CID_EXPOSURE_AUTO,
+                .type           = V4L2_CTRL_TYPE_BOOLEAN,
+                .name           = "Automatic Exposure",
+                .minimum        = 0,
+                .maximum        = 1,
+                .step           = 1,
+                .default_value  = 1,
+        }
+};
+static struct soc_camera_ops mt9t031_ops = {
+        .set_bus_param          = mt9t031_set_bus_param,
+        .query_bus_param        = mt9t031_query_bus_param,
+        .controls               = mt9t031_controls,
+        .num_controls           = ARRAY_SIZE(mt9t031_controls),
+};
 /* target must be _even_ */
 static u16 mt9t031_skip(s32 *source, s32 target, s32 max)
 {
@@ -226,10 +285,9 @@ static u16 mt9t031_skip(s32 *source, s32 target, s32 max)
 }
 /* rect is the sensor rectangle, the caller guarantees parameter validity */
-static int mt9t031_set_params(struct soc_camera_device *icd,
+static int mt9t031_set_params(struct i2c_client *client,
                              struct v4l2_rect *rect, u16 xskip, u16 yskip)
 {
-        struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd));
        struct mt9t031 *mt9t031 = to_mt9t031(client);
        int ret;
        u16 xbin, ybin;
@@ -291,8 +349,10 @@ static int mt9t031_set_params(struct soc_camera_device *icd,
        dev_dbg(&client->dev, "new physical left %u, top %u\n",
                rect->left, rect->top);
-        /* The caller provides a supported format, as guaranteed by
+        /*
-         * icd->try_fmt_cap(), soc_camera_s_crop() and soc_camera_cropcap() */
+         * The caller provides a supported format, as guaranteed by
+         * icd->try_fmt_cap(), soc_camera_s_crop() and soc_camera_cropcap()
+         */
        if (ret >= 0)
                ret = reg_write(client, MT9T031_COLUMN_START, rect->left);
        if (ret >= 0)
@@ -301,15 +361,14 @@ static int mt9t031_set_params(struct soc_camera_device *icd,
                ret = reg_write(client, MT9T031_WINDOW_WIDTH, rect->width - 1);
        if (ret >= 0)
                ret = reg_write(client, MT9T031_WINDOW_HEIGHT,
-                                rect->height + icd->y_skip_top - 1);
+                                rect->height + mt9t031->y_skip_top - 1);
        if (ret >= 0 && mt9t031->autoexposure) {
-                unsigned int total_h = rect->height + icd->y_skip_top + vblank;
+                unsigned int total_h = rect->height + mt9t031->y_skip_top + vblank;
                ret = set_shutter(client, total_h);
                if (ret >= 0) {
                        const u32 shutter_max = MT9T031_MAX_HEIGHT + vblank;
                        const struct v4l2_queryctrl *qctrl =
-                                soc_camera_find_qctrl(icd->ops,
+                                &mt9t031_controls[MT9T031_CTRL_EXPOSURE];
-                                                      V4L2_CID_EXPOSURE);
                        mt9t031->exposure = (shutter_max / 2 + (total_h - 1) *
                                 (qctrl->maximum - qctrl->minimum)) /
                                shutter_max + qctrl->minimum;
@@ -334,7 +393,6 @@ static int mt9t031_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
        struct v4l2_rect rect = a->c;
        struct i2c_client *client = sd->priv;
        struct mt9t031 *mt9t031 = to_mt9t031(client);
-        struct soc_camera_device *icd = client->dev.platform_data;
        rect.width = ALIGN(rect.width, 2);
        rect.height = ALIGN(rect.height, 2);
@@ -345,7 +403,7 @@ static int mt9t031_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
        soc_camera_limit_side(&rect.top, &rect.height,
                     MT9T031_ROW_SKIP, MT9T031_MIN_HEIGHT, MT9T031_MAX_HEIGHT);
-        return mt9t031_set_params(icd, &rect, mt9t031->xskip, mt9t031->yskip);
+        return mt9t031_set_params(client, &rect, mt9t031->xskip, mt9t031->yskip);
 }
 static int mt9t031_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
@@ -373,27 +431,26 @@ static int mt9t031_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
        return 0;
 }
-static int mt9t031_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int mt9t031_g_fmt(struct v4l2_subdev *sd,
+                         struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
        struct mt9t031 *mt9t031 = to_mt9t031(client);
-        struct v4l2_pix_format *pix = &f->fmt.pix;
-        pix->width              = mt9t031->rect.width / mt9t031->xskip;
+        mf->width       = mt9t031->rect.width / mt9t031->xskip;
-        pix->height             = mt9t031->rect.height / mt9t031->yskip;
+        mf->height      = mt9t031->rect.height / mt9t031->yskip;
-        pix->pixelformat        = V4L2_PIX_FMT_SGRBG10;
+        mf->code        = V4L2_MBUS_FMT_SBGGR10_1X10;
-        pix->field              = V4L2_FIELD_NONE;
+        mf->colorspace  = V4L2_COLORSPACE_SRGB;
-        pix->colorspace         = V4L2_COLORSPACE_SRGB;
+        mf->field       = V4L2_FIELD_NONE;
        return 0;
 }
-static int mt9t031_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int mt9t031_s_fmt(struct v4l2_subdev *sd,
+                         struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
        struct mt9t031 *mt9t031 = to_mt9t031(client);
-        struct soc_camera_device *icd = client->dev.platform_data;
-        struct v4l2_pix_format *pix = &f->fmt.pix;
        u16 xskip, yskip;
        struct v4l2_rect rect = mt9t031->rect;
@@ -401,24 +458,29 @@ static int mt9t031_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
         * try_fmt has put width and height within limits.
         * S_FMT: use binning and skipping for scaling
         */
-        xskip = mt9t031_skip(&rect.width, pix->width, MT9T031_MAX_WIDTH);
+        xskip = mt9t031_skip(&rect.width, mf->width, MT9T031_MAX_WIDTH);
-        yskip = mt9t031_skip(&rect.height, pix->height, MT9T031_MAX_HEIGHT);
+        yskip = mt9t031_skip(&rect.height, mf->height, MT9T031_MAX_HEIGHT);
+        mf->code        = V4L2_MBUS_FMT_SBGGR10_1X10;
+        mf->colorspace  = V4L2_COLORSPACE_SRGB;
        /* mt9t031_set_params() doesn't change width and height */
-        return mt9t031_set_params(icd, &rect, xskip, yskip);
+        return mt9t031_set_params(client, &rect, xskip, yskip);
 }
 /*
 * If a user window larger than sensor window is requested, we'll increase the
 * sensor window.
 */
-static int mt9t031_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int mt9t031_try_fmt(struct v4l2_subdev *sd,
+                           struct v4l2_mbus_framefmt *mf)
 {
-        struct v4l2_pix_format *pix = &f->fmt.pix;
        v4l_bound_align_image(
-                &pix->width, MT9T031_MIN_WIDTH, MT9T031_MAX_WIDTH, 1,
+                &mf->width, MT9T031_MIN_WIDTH, MT9T031_MAX_WIDTH, 1,
-                &pix->height, MT9T031_MIN_HEIGHT, MT9T031_MAX_HEIGHT, 1, 0);
+                &mf->height, MT9T031_MIN_HEIGHT, MT9T031_MAX_HEIGHT, 1, 0);
+        mf->code        = V4L2_MBUS_FMT_SBGGR10_1X10;
+        mf->colorspace  = V4L2_COLORSPACE_SRGB;
        return 0;
 }
@@ -479,59 +541,6 @@ static int mt9t031_s_register(struct v4l2_subdev *sd,
 }
 #endif
-static const struct v4l2_queryctrl mt9t031_controls[] = {
-        {
-                .id             = V4L2_CID_VFLIP,
-                .type           = V4L2_CTRL_TYPE_BOOLEAN,
-                .name           = "Flip Vertically",
-                .minimum        = 0,
-                .maximum        = 1,
-                .step           = 1,
-                .default_value  = 0,
-        }, {
-                .id             = V4L2_CID_HFLIP,
-                .type           = V4L2_CTRL_TYPE_BOOLEAN,
-                .name           = "Flip Horizontally",
-                .minimum        = 0,
-                .maximum        = 1,
-                .step           = 1,
-                .default_value  = 0,
-        }, {
-                .id             = V4L2_CID_GAIN,
-                .type           = V4L2_CTRL_TYPE_INTEGER,
-                .name           = "Gain",
-                .minimum        = 0,
-                .maximum        = 127,
-                .step           = 1,
-                .default_value  = 64,
-                .flags          = V4L2_CTRL_FLAG_SLIDER,
-        }, {
-                .id             = V4L2_CID_EXPOSURE,
-                .type           = V4L2_CTRL_TYPE_INTEGER,
-                .name           = "Exposure",
-                .minimum        = 1,
-                .maximum        = 255,
-                .step           = 1,
-                .default_value  = 255,
-                .flags          = V4L2_CTRL_FLAG_SLIDER,
-        }, {
-                .id             = V4L2_CID_EXPOSURE_AUTO,
-                .type           = V4L2_CTRL_TYPE_BOOLEAN,
-                .name           = "Automatic Exposure",
-                .minimum        = 0,
-                .maximum        = 1,
-                .step           = 1,
-                .default_value  = 1,
-        }
-};
-static struct soc_camera_ops mt9t031_ops = {
-        .set_bus_param          = mt9t031_set_bus_param,
-        .query_bus_param        = mt9t031_query_bus_param,
-        .controls               = mt9t031_controls,
-        .num_controls           = ARRAY_SIZE(mt9t031_controls),
-};
 static int mt9t031_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
 {
        struct i2c_client *client = sd->priv;
@@ -568,15 +577,9 @@ static int mt9t031_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
 {
        struct i2c_client *client = sd->priv;
        struct mt9t031 *mt9t031 = to_mt9t031(client);
-        struct soc_camera_device *icd = client->dev.platform_data;
        const struct v4l2_queryctrl *qctrl;
        int data;
-        qctrl = soc_camera_find_qctrl(&mt9t031_ops, ctrl->id);
-        if (!qctrl)
-                return -EINVAL;
        switch (ctrl->id) {
        case V4L2_CID_VFLIP:
                if (ctrl->value)
@@ -595,6 +598,7 @@ static int mt9t031_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
                        return -EIO;
                break;
        case V4L2_CID_GAIN:
+                qctrl = &mt9t031_controls[MT9T031_CTRL_GAIN];
                if (ctrl->value > qctrl->maximum || ctrl->value < qctrl->minimum)
                        return -EINVAL;
                /* See Datasheet Table 7, Gain settings. */
@@ -634,6 +638,7 @@ static int mt9t031_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
                mt9t031->gain = ctrl->value;
                break;
        case V4L2_CID_EXPOSURE:
+                qctrl = &mt9t031_controls[MT9T031_CTRL_EXPOSURE];
                /* mt9t031 has maximum == default */
                if (ctrl->value > qctrl->maximum || ctrl->value < qctrl->minimum)
                        return -EINVAL;
@@ -657,11 +662,11 @@ static int mt9t031_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
                        const u16 vblank = MT9T031_VERTICAL_BLANK;
                        const u32 shutter_max = MT9T031_MAX_HEIGHT + vblank;
                        unsigned int total_h = mt9t031->rect.height +
-                                icd->y_skip_top + vblank;
+                                mt9t031->y_skip_top + vblank;
                        if (set_shutter(client, total_h) < 0)
                                return -EIO;
-                        qctrl = soc_camera_find_qctrl(icd->ops, V4L2_CID_EXPOSURE);
+                        qctrl = &mt9t031_controls[MT9T031_CTRL_EXPOSURE];
                        mt9t031->exposure = (shutter_max / 2 + (total_h - 1) *
                                 (qctrl->maximum - qctrl->minimum)) /
                                shutter_max + qctrl->minimum;
@@ -669,15 +674,18 @@ static int mt9t031_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
                } else
                        mt9t031->autoexposure = 0;
                break;
+        default:
+                return -EINVAL;
        }
        return 0;
 }
-/* Interface active, can use i2c. If it fails, it can indeed mean, that
+/*
- * this wasn't our capture interface, so, we wait for the right one */
+ * Interface active, can use i2c. If it fails, it can indeed mean, that
+ * this wasn't our capture interface, so, we wait for the right one
+ */
 static int mt9t031_video_probe(struct i2c_client *client)
 {
-        struct soc_camera_device *icd = client->dev.platform_data;
        struct mt9t031 *mt9t031 = to_mt9t031(client);
        s32 data;
        int ret;
@@ -692,8 +700,6 @@ static int mt9t031_video_probe(struct i2c_client *client)
        switch (data) {
        case 0x1621:
                mt9t031->model = V4L2_IDENT_MT9T031;
-                icd->formats = mt9t031_colour_formats;
-                icd->num_formats = ARRAY_SIZE(mt9t031_colour_formats);
                break;
        default:
                dev_err(&client->dev,
@@ -714,6 +720,16 @@ static int mt9t031_video_probe(struct i2c_client *client)
        return ret;
 }
+static int mt9t031_g_skip_top_lines(struct v4l2_subdev *sd, u32 *lines)
+{
+        struct i2c_client *client = sd->priv;
+        struct mt9t031 *mt9t031 = to_mt9t031(client);
+        *lines = mt9t031->y_skip_top;
+        return 0;
+}
 static struct v4l2_subdev_core_ops mt9t031_subdev_core_ops = {
        .g_ctrl         = mt9t031_g_ctrl,
        .s_ctrl         = mt9t031_s_ctrl,
@@ -724,19 +740,35 @@ static struct v4l2_subdev_core_ops mt9t031_subdev_core_ops = {
 #endif
 };
+static int mt9t031_enum_fmt(struct v4l2_subdev *sd, int index,
+                            enum v4l2_mbus_pixelcode *code)
+{
+        if (index)
+                return -EINVAL;
+        *code = V4L2_MBUS_FMT_SBGGR10_1X10;
+        return 0;
+}
 static struct v4l2_subdev_video_ops mt9t031_subdev_video_ops = {
        .s_stream       = mt9t031_s_stream,
-        .s_fmt          = mt9t031_s_fmt,
+        .s_mbus_fmt     = mt9t031_s_fmt,
-        .g_fmt          = mt9t031_g_fmt,
+        .g_mbus_fmt     = mt9t031_g_fmt,
-        .try_fmt        = mt9t031_try_fmt,
+        .try_mbus_fmt   = mt9t031_try_fmt,
        .s_crop         = mt9t031_s_crop,
        .g_crop         = mt9t031_g_crop,
        .cropcap        = mt9t031_cropcap,
+        .enum_mbus_fmt  = mt9t031_enum_fmt,
+};
+static struct v4l2_subdev_sensor_ops mt9t031_subdev_sensor_ops = {
+        .g_skip_top_lines       = mt9t031_g_skip_top_lines,
 };
 static struct v4l2_subdev_ops mt9t031_subdev_ops = {
        .core   = &mt9t031_subdev_core_ops,
        .video  = &mt9t031_subdev_video_ops,
+        .sensor = &mt9t031_subdev_sensor_ops,
 };
 static int mt9t031_probe(struct i2c_client *client,
@@ -745,18 +777,16 @@ static int mt9t031_probe(struct i2c_client *client,
        struct mt9t031 *mt9t031;
        struct soc_camera_device *icd = client->dev.platform_data;
        struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
-        struct soc_camera_link *icl;
        int ret;
-        if (!icd) {
+        if (icd) {
-                dev_err(&client->dev, "MT9T031: missing soc-camera data!\n");
+                struct soc_camera_link *icl = to_soc_camera_link(icd);
-                return -EINVAL;
+                if (!icl) {
-        }
+                        dev_err(&client->dev, "MT9T031 driver needs platform data\n");
+                        return -EINVAL;
+                }
-        icl = to_soc_camera_link(icd);
+                icd->ops = &mt9t031_ops;
-        if (!icl) {
-                dev_err(&client->dev, "MT9T031 driver needs platform data\n");
-                return -EINVAL;
        }
        if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
@@ -771,17 +801,16 @@ static int mt9t031_probe(struct i2c_client *client,
        v4l2_i2c_subdev_init(&mt9t031->subdev, client, &mt9t031_subdev_ops);
-        /* Second stage probe - when a capture adapter is there */
+        mt9t031->y_skip_top     = 0;
-        icd->ops                = &mt9t031_ops;
-        icd->y_skip_top         = 0;
        mt9t031->rect.left      = MT9T031_COLUMN_SKIP;
        mt9t031->rect.top       = MT9T031_ROW_SKIP;
        mt9t031->rect.width     = MT9T031_MAX_WIDTH;
        mt9t031->rect.height    = MT9T031_MAX_HEIGHT;
-        /* Simulated autoexposure. If enabled, we calculate shutter width
+        /*
-         * ourselves in the driver based on vertical blanking and frame width */
+         * Simulated autoexposure. If enabled, we calculate shutter width
+         * ourselves in the driver based on vertical blanking and frame width
+         */
        mt9t031->autoexposure = 1;
        mt9t031->xskip = 1;
@@ -794,7 +823,8 @@ static int mt9t031_probe(struct i2c_client *client,
        mt9t031_disable(client);
        if (ret) {
-                icd->ops = NULL;
+                if (icd)
+                        icd->ops = NULL;
                i2c_set_clientdata(client, NULL);
                kfree(mt9t031);
        }
@@ -807,7 +837,8 @@ static int mt9t031_remove(struct i2c_client *client)
        struct mt9t031 *mt9t031 = to_mt9t031(client);
        struct soc_camera_device *icd = client->dev.platform_data;
-        icd->ops = NULL;
+        if (icd)
+                icd->ops = NULL;
        i2c_set_clientdata(client, NULL);
        client->driver = NULL;
        kfree(mt9t031);
diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c
new file mode 100644
index 000000000000..fc4dd6045720
--- /dev/null
+++ b/drivers/media/video/mt9t112.c
@@ -0,0 +1,1177 @@
+/*
+ * mt9t112 Camera Driver
+ *
+ * Copyright (C) 2009 Renesas Solutions Corp.
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * Based on ov772x driver, mt9m111 driver,
+ *
+ * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
+ * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
+ * Copyright (C) 2008 Magnus Damm
+ * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/videodev2.h>
+#include <media/mt9t112.h>
+#include <media/soc_camera.h>
+#include <media/soc_mediabus.h>
+#include <media/v4l2-chip-ident.h>
+#include <media/v4l2-common.h>
+/* you can check PLL/clock info */
+/* #define EXT_CLOCK 24000000 */
+/************************************************************************
+                        macro
+************************************************************************/
+/*
+ * frame size
+ */
+#define MAX_WIDTH   2048
+#define MAX_HEIGHT  1536
+#define VGA_WIDTH   640
+#define VGA_HEIGHT  480
+/*
+ * macro of read/write
+ */
+#define ECHECKER(ret, x)                \
+        do {                            \
+                (ret) = (x);            \
+                if ((ret) < 0)          \
+                        return (ret);   \
+        } while (0)
+#define mt9t112_reg_write(ret, client, a, b) \
+        ECHECKER(ret, __mt9t112_reg_write(client, a, b))
+#define mt9t112_mcu_write(ret, client, a, b) \
+        ECHECKER(ret, __mt9t112_mcu_write(client, a, b))
+#define mt9t112_reg_mask_set(ret, client, a, b, c) \
+        ECHECKER(ret, __mt9t112_reg_mask_set(client, a, b, c))
+#define mt9t112_mcu_mask_set(ret, client, a, b, c) \
+        ECHECKER(ret, __mt9t112_mcu_mask_set(client, a, b, c))
+#define mt9t112_reg_read(ret, client, a) \
+        ECHECKER(ret, __mt9t112_reg_read(client, a))
+/*
+ * Logical address
+ */
+#define _VAR(id, offset, base)  (base | (id & 0x1f) << 10 | (offset & 0x3ff))
+#define VAR(id, offset)  _VAR(id, offset, 0x0000)
+#define VAR8(id, offset) _VAR(id, offset, 0x8000)
+/************************************************************************
+                        struct
+************************************************************************/
+struct mt9t112_frame_size {
+        u16 width;
+        u16 height;
+};
+struct mt9t112_format {
+        enum v4l2_mbus_pixelcode code;
+        enum v4l2_colorspace colorspace;
+        u16 fmt;
+        u16 order;
+};
+struct mt9t112_priv {
+        struct v4l2_subdev               subdev;
+        struct mt9t112_camera_info      *info;
+        struct i2c_client               *client;
+        struct soc_camera_device         icd;
+        struct mt9t112_frame_size        frame;
+        const struct mt9t112_format     *format;
+        int                              model;
+        u32                              flags;
+/* for flags */
+#define INIT_DONE  (1<<0)
+};
+/************************************************************************
+                        supported format
+************************************************************************/
+static const struct mt9t112_format mt9t112_cfmts[] = {
+        {
+                .code           = V4L2_MBUS_FMT_YUYV8_2X8_BE,
+                .colorspace     = V4L2_COLORSPACE_JPEG,
+                .fmt            = 1,
+                .order          = 0,
+        }, {
+                .code           = V4L2_MBUS_FMT_YVYU8_2X8_BE,
+                .colorspace     = V4L2_COLORSPACE_JPEG,
+                .fmt            = 1,
+                .order          = 1,
+        }, {
+                .code           = V4L2_MBUS_FMT_YUYV8_2X8_LE,
+                .colorspace     = V4L2_COLORSPACE_JPEG,
+                .fmt            = 1,
+                .order          = 2,
+        }, {
+                .code           = V4L2_MBUS_FMT_YVYU8_2X8_LE,
+                .colorspace     = V4L2_COLORSPACE_JPEG,
+                .fmt            = 1,
+                .order          = 3,
+        }, {
+                .code           = V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE,
+                .colorspace     = V4L2_COLORSPACE_SRGB,
+                .fmt            = 8,
+                .order          = 2,
+        }, {
+                .code           = V4L2_MBUS_FMT_RGB565_2X8_LE,
+                .colorspace     = V4L2_COLORSPACE_SRGB,
+                .fmt            = 4,
+                .order          = 2,
+        },
+};
+/************************************************************************
+                        general function
+************************************************************************/
+static struct mt9t112_priv *to_mt9t112(const struct i2c_client *client)
+{
+        return container_of(i2c_get_clientdata(client),
+                            struct mt9t112_priv,
+                            subdev);
+}
+static int __mt9t112_reg_read(const struct i2c_client *client, u16 command)
+{
+        struct i2c_msg msg[2];
+        u8 buf[2];
+        int ret;
+        command = swab16(command);
+        msg[0].addr  = client->addr;
+        msg[0].flags = 0;
+        msg[0].len   = 2;
+        msg[0].buf   = (u8 *)&command;
+        msg[1].addr  = client->addr;
+        msg[1].flags = I2C_M_RD;
+        msg[1].len   = 2;
+        msg[1].buf   = buf;
+        /*
+         * if return value of this function is < 0,
+         * it mean error.
+         * else, under 16bit is valid data.
+         */
+        ret = i2c_transfer(client->adapter, msg, 2);
+        if (ret < 0)
+                return ret;
+        memcpy(&ret, buf, 2);
+        return swab16(ret);
+}
+static int __mt9t112_reg_write(const struct i2c_client *client,
+                               u16 command, u16 data)
+{
+        struct i2c_msg msg;
+        u8 buf[4];
+        int ret;
+        command = swab16(command);
+        data = swab16(data);
+        memcpy(buf + 0, &command, 2);
+        memcpy(buf + 2, &data,    2);
+        msg.addr  = client->addr;
+        msg.flags = 0;
+        msg.len   = 4;
+        msg.buf   = buf;
+        /*
+         * i2c_transfer return message length,
+         * but this function should return 0 if correct case
+         */
+        ret = i2c_transfer(client->adapter, &msg, 1);
+        if (ret >= 0)
+                ret = 0;
+        return ret;
+}
+static int __mt9t112_reg_mask_set(const struct i2c_client *client,
+                                  u16  command,
+                                  u16  mask,
+                                  u16  set)
+{
+        int val = __mt9t112_reg_read(client, command);
+        if (val < 0)
+                return val;
+        val &= ~mask;
+        val |= set & mask;
+        return __mt9t112_reg_write(client, command, val);
+}
+/* mcu access */
+static int __mt9t112_mcu_read(const struct i2c_client *client, u16 command)
+{
+        int ret;
+        ret = __mt9t112_reg_write(client, 0x098E, command);
+        if (ret < 0)
+                return ret;
+        return __mt9t112_reg_read(client, 0x0990);
+}
+static int __mt9t112_mcu_write(const struct i2c_client *client,
+                               u16 command, u16 data)
+{
+        int ret;
+        ret = __mt9t112_reg_write(client, 0x098E, command);
+        if (ret < 0)
+                return ret;
+        return __mt9t112_reg_write(client, 0x0990, data);
+}
+static int __mt9t112_mcu_mask_set(const struct i2c_client *client,
+                                  u16  command,
+                                  u16  mask,
+                                  u16  set)
+{
+        int val = __mt9t112_mcu_read(client, command);
+        if (val < 0)
+                return val;
+        val &= ~mask;
+        val |= set & mask;
+        return __mt9t112_mcu_write(client, command, val);
+}
+static int mt9t112_reset(const struct i2c_client *client)
+{
+        int ret;
+        mt9t112_reg_mask_set(ret, client, 0x001a, 0x0001, 0x0001);
+        msleep(1);
+        mt9t112_reg_mask_set(ret, client, 0x001a, 0x0001, 0x0000);
+        return ret;
+}
+#ifndef EXT_CLOCK
+#define CLOCK_INFO(a, b)
+#else
+#define CLOCK_INFO(a, b) mt9t112_clock_info(a, b)
+static int mt9t112_clock_info(const struct i2c_client *client, u32 ext)
+{
+        int m, n, p1, p2, p3, p4, p5, p6, p7;
+        u32 vco, clk;
+        char *enable;
+        ext /= 1000; /* kbyte order */
+        mt9t112_reg_read(n, client, 0x0012);
+        p1 = n & 0x000f;
+        n = n >> 4;
+        p2 = n & 0x000f;
+        n = n >> 4;
+        p3 = n & 0x000f;
+        mt9t112_reg_read(n, client, 0x002a);
+        p4 = n & 0x000f;
+        n = n >> 4;
+        p5 = n & 0x000f;
+        n = n >> 4;
+        p6 = n & 0x000f;
+        mt9t112_reg_read(n, client, 0x002c);
+        p7 = n & 0x000f;
+        mt9t112_reg_read(n, client, 0x0010);
+        m = n & 0x00ff;
+        n = (n >> 8) & 0x003f;
+        enable = ((6000 > ext) || (54000 < ext)) ? "X" : "";
+        dev_info(&client->dev, "EXTCLK          : %10u K %s\n", ext, enable);
+        vco = 2 * m * ext / (n+1);
+        enable = ((384000 > vco) || (768000 < vco)) ? "X" : "";
+        dev_info(&client->dev, "VCO             : %10u K %s\n", vco, enable);
+        clk = vco / (p1+1) / (p2+1);
+        enable = (96000 < clk) ? "X" : "";
+        dev_info(&client->dev, "PIXCLK          : %10u K %s\n", clk, enable);
+        clk = vco / (p3+1);
+        enable = (768000 < clk) ? "X" : "";
+        dev_info(&client->dev, "MIPICLK         : %10u K %s\n", clk, enable);
+        clk = vco / (p6+1);
+        enable = (96000 < clk) ? "X" : "";
+        dev_info(&client->dev, "MCU CLK         : %10u K %s\n", clk, enable);
+        clk = vco / (p5+1);
+        enable = (54000 < clk) ? "X" : "";
+        dev_info(&client->dev, "SOC CLK         : %10u K %s\n", clk, enable);
+        clk = vco / (p4+1);
+        enable = (70000 < clk) ? "X" : "";
+        dev_info(&client->dev, "Sensor CLK      : %10u K %s\n", clk, enable);
+        clk = vco / (p7+1);
+        dev_info(&client->dev, "External sensor : %10u K\n", clk);
+        clk = ext / (n+1);
+        enable = ((2000 > clk) || (24000 < clk)) ? "X" : "";
+        dev_info(&client->dev, "PFD             : %10u K %s\n", clk, enable);
+        return 0;
+}
+#endif
+static void mt9t112_frame_check(u32 *width, u32 *height)
+{
+        if (*width > MAX_WIDTH)
+                *width = MAX_WIDTH;
+        if (*height > MAX_HEIGHT)
+                *height = MAX_HEIGHT;
+}
+static int mt9t112_set_a_frame_size(const struct i2c_client *client,
+                                   u16 width,
+                                   u16 height)
+{
+        int ret;
+        u16 wstart = (MAX_WIDTH - width) / 2;
+        u16 hstart = (MAX_HEIGHT - height) / 2;
+        /* (Context A) Image Width/Height */
+        mt9t112_mcu_write(ret, client, VAR(26, 0), width);
+        mt9t112_mcu_write(ret, client, VAR(26, 2), height);
+        /* (Context A) Output Width/Height */
+        mt9t112_mcu_write(ret, client, VAR(18, 43), 8 + width);
+        mt9t112_mcu_write(ret, client, VAR(18, 45), 8 + height);
+        /* (Context A) Start Row/Column */
+        mt9t112_mcu_write(ret, client, VAR(18, 2), 4 + hstart);
+        mt9t112_mcu_write(ret, client, VAR(18, 4), 4 + wstart);
+        /* (Context A) End Row/Column */
+        mt9t112_mcu_write(ret, client, VAR(18, 6), 11 + height + hstart);
+        mt9t112_mcu_write(ret, client, VAR(18, 8), 11 + width  + wstart);
+        mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06);
+        return ret;
+}
+static int mt9t112_set_pll_dividers(const struct i2c_client *client,
+                                    u8 m, u8 n,
+                                    u8 p1, u8 p2, u8 p3,
+                                    u8 p4, u8 p5, u8 p6,
+                                    u8 p7)
+{
+        int ret;
+        u16 val;
+        /* N/M */
+        val = (n << 8) |
+              (m << 0);
+        mt9t112_reg_mask_set(ret, client, 0x0010, 0x3fff, val);
+        /* P1/P2/P3 */
+        val = ((p3 & 0x0F) << 8) |
+              ((p2 & 0x0F) << 4) |
+              ((p1 & 0x0F) << 0);
+        mt9t112_reg_mask_set(ret, client, 0x0012, 0x0fff, val);
+        /* P4/P5/P6 */
+        val = (0x7         << 12) |
+              ((p6 & 0x0F) <<  8) |
+              ((p5 & 0x0F) <<  4) |
+              ((p4 & 0x0F) <<  0);
+        mt9t112_reg_mask_set(ret, client, 0x002A, 0x7fff, val);
+        /* P7 */
+        val = (0x1         << 12) |
+              ((p7 & 0x0F) <<  0);
+        mt9t112_reg_mask_set(ret, client, 0x002C, 0x100f, val);
+        return ret;
+}
+static int mt9t112_init_pll(const struct i2c_client *client)
+{
+        struct mt9t112_priv *priv = to_mt9t112(client);
+        int data, i, ret;
+        mt9t112_reg_mask_set(ret, client, 0x0014, 0x003, 0x0001);
+        /* PLL control: BYPASS PLL = 8517 */
+        mt9t112_reg_write(ret, client, 0x0014, 0x2145);
+        /* Replace these registers when new timing parameters are generated */
+        mt9t112_set_pll_dividers(client,
+                                 priv->info->divider.m,
+                                 priv->info->divider.n,
+                                 priv->info->divider.p1,
+                                 priv->info->divider.p2,
+                                 priv->info->divider.p3,
+                                 priv->info->divider.p4,
+                                 priv->info->divider.p5,
+                                 priv->info->divider.p6,
+                                 priv->info->divider.p7);
+        /*
+         * TEST_BYPASS  on
+         * PLL_ENABLE   on
+         * SEL_LOCK_DET on
+         * TEST_BYPASS  off
+         */
+        mt9t112_reg_write(ret, client, 0x0014, 0x2525);
+        mt9t112_reg_write(ret, client, 0x0014, 0x2527);
+        mt9t112_reg_write(ret, client, 0x0014, 0x3427);
+        mt9t112_reg_write(ret, client, 0x0014, 0x3027);
+        mdelay(10);
+        /*
+         * PLL_BYPASS off
+         * Reference clock count
+         * I2C Master Clock Divider
+         */
+        mt9t112_reg_write(ret, client, 0x0014, 0x3046);
+        mt9t112_reg_write(ret, client, 0x0022, 0x0190);
+        mt9t112_reg_write(ret, client, 0x3B84, 0x0212);
+        /* External sensor clock is PLL bypass */
+        mt9t112_reg_write(ret, client, 0x002E, 0x0500);
+        mt9t112_reg_mask_set(ret, client, 0x0018, 0x0002, 0x0002);
+        mt9t112_reg_mask_set(ret, client, 0x3B82, 0x0004, 0x0004);
+        /* MCU disabled */
+        mt9t112_reg_mask_set(ret, client, 0x0018, 0x0004, 0x0004);
+        /* out of standby */
+        mt9t112_reg_mask_set(ret, client, 0x0018, 0x0001, 0);
+        mdelay(50);
+        /*
+         * Standby Workaround
+         * Disable Secondary I2C Pads
+         */
+        mt9t112_reg_write(ret, client, 0x0614, 0x0001);
+        mdelay(1);
+        mt9t112_reg_write(ret, client, 0x0614, 0x0001);
+        mdelay(1);
+        mt9t112_reg_write(ret, client, 0x0614, 0x0001);
+        mdelay(1);
+        mt9t112_reg_write(ret, client, 0x0614, 0x0001);
+        mdelay(1);
+        mt9t112_reg_write(ret, client, 0x0614, 0x0001);
+        mdelay(1);
+        mt9t112_reg_write(ret, client, 0x0614, 0x0001);
+        mdelay(1);
+        /* poll to verify out of standby. Must Poll this bit */
+        for (i = 0; i < 100; i++) {
+                mt9t112_reg_read(data, client, 0x0018);
+                if (0x4000 & data)
+                        break;
+                mdelay(10);
+        }
+        return ret;
+}
+static int mt9t112_init_setting(const struct i2c_client *client)
+{
+        int ret;
+        /* Adaptive Output Clock (A) */
+        mt9t112_mcu_mask_set(ret, client, VAR(26, 160), 0x0040, 0x0000);
+        /* Read Mode (A) */
+        mt9t112_mcu_write(ret, client, VAR(18, 12), 0x0024);
+        /* Fine Correction (A) */
+        mt9t112_mcu_write(ret, client, VAR(18, 15), 0x00CC);
+        /* Fine IT Min (A) */
+        mt9t112_mcu_write(ret, client, VAR(18, 17), 0x01f1);
+        /* Fine IT Max Margin (A) */
+        mt9t112_mcu_write(ret, client, VAR(18, 19), 0x00fF);
+        /* Base Frame Lines (A) */
+        mt9t112_mcu_write(ret, client, VAR(18, 29), 0x032D);
+        /* Min Line Length (A) */
+        mt9t112_mcu_write(ret, client, VAR(18, 31), 0x073a);
+        /* Line Length (A) */
+        mt9t112_mcu_write(ret, client, VAR(18, 37), 0x07d0);
+        /* Adaptive Output Clock (B) */
+        mt9t112_mcu_mask_set(ret, client, VAR(27, 160), 0x0040, 0x0000);
+        /* Row Start (B) */
+        mt9t112_mcu_write(ret, client, VAR(18, 74), 0x004);
+        /* Column Start (B) */
+        mt9t112_mcu_write(ret, client, VAR(18, 76), 0x004);
+        /* Row End (B) */
+        mt9t112_mcu_write(ret, client, VAR(18, 78), 0x60B);
+        /* Column End (B) */
+        mt9t112_mcu_write(ret, client, VAR(18, 80), 0x80B);
+        /* Fine Correction (B) */
+        mt9t112_mcu_write(ret, client, VAR(18, 87), 0x008C);
+        /* Fine IT Min (B) */
+        mt9t112_mcu_write(ret, client, VAR(18, 89), 0x01F1);
+        /* Fine IT Max Margin (B) */
+        mt9t112_mcu_write(ret, client, VAR(18, 91), 0x00FF);
+        /* Base Frame Lines (B) */
+        mt9t112_mcu_write(ret, client, VAR(18, 101), 0x0668);
+        /* Min Line Length (B) */
+        mt9t112_mcu_write(ret, client, VAR(18, 103), 0x0AF0);
+        /* Line Length (B) */
+        mt9t112_mcu_write(ret, client, VAR(18, 109), 0x0AF0);
+        /*
+         * Flicker Dectection registers
+         * This section should be replaced whenever new Timing file is generated
+         * All the following registers need to be replaced
+         * Following registers are generated from Register Wizard but user can
+         * modify them. For detail see auto flicker detection tuning
+         */
+        /* FD_FDPERIOD_SELECT */
+        mt9t112_mcu_write(ret, client, VAR8(8, 5), 0x01);
+        /* PRI_B_CONFIG_FD_ALGO_RUN */
+        mt9t112_mcu_write(ret, client, VAR(27, 17), 0x0003);
+        /* PRI_A_CONFIG_FD_ALGO_RUN */
+        mt9t112_mcu_write(ret, client, VAR(26, 17), 0x0003);
+        /*
+         * AFD range detection tuning registers
+         */
+        /* search_f1_50 */
+        mt9t112_mcu_write(ret, client, VAR8(18, 165), 0x25);
+        /* search_f2_50 */
+        mt9t112_mcu_write(ret, client, VAR8(18, 166), 0x28);
+        /* search_f1_60 */
+        mt9t112_mcu_write(ret, client, VAR8(18, 167), 0x2C);
+        /* search_f2_60 */
+        mt9t112_mcu_write(ret, client, VAR8(18, 168), 0x2F);
+        /* period_50Hz (A) */
+        mt9t112_mcu_write(ret, client, VAR8(18, 68), 0xBA);
+        /* secret register by aptina */
+        /* period_50Hz (A MSB) */
+        mt9t112_mcu_write(ret, client, VAR8(18, 303), 0x00);
+        /* period_60Hz (A) */
+        mt9t112_mcu_write(ret, client, VAR8(18, 69), 0x9B);
+        /* secret register by aptina */
+        /* period_60Hz (A MSB) */
+        mt9t112_mcu_write(ret, client, VAR8(18, 301), 0x00);
+        /* period_50Hz (B) */
+        mt9t112_mcu_write(ret, client, VAR8(18, 140), 0x82);
+        /* secret register by aptina */
+        /* period_50Hz (B) MSB */
+        mt9t112_mcu_write(ret, client, VAR8(18, 304), 0x00);
+        /* period_60Hz (B) */
+        mt9t112_mcu_write(ret, client, VAR8(18, 141), 0x6D);
+        /* secret register by aptina */
+        /* period_60Hz (B) MSB */
+        mt9t112_mcu_write(ret, client, VAR8(18, 302), 0x00);
+        /* FD Mode */
+        mt9t112_mcu_write(ret, client, VAR8(8, 2), 0x10);
+        /* Stat_min */
+        mt9t112_mcu_write(ret, client, VAR8(8, 9), 0x02);
+        /* Stat_max */
+        mt9t112_mcu_write(ret, client, VAR8(8, 10), 0x03);
+        /* Min_amplitude */
+        mt9t112_mcu_write(ret, client, VAR8(8, 12), 0x0A);
+        /* RX FIFO Watermark (A) */
+        mt9t112_mcu_write(ret, client, VAR(18, 70), 0x0014);
+        /* RX FIFO Watermark (B) */
+        mt9t112_mcu_write(ret, client, VAR(18, 142), 0x0014);
+        /* MCLK: 16MHz
+         * PCLK: 73MHz
+         * CorePixCLK: 36.5 MHz
+         */
+        mt9t112_mcu_write(ret, client, VAR8(18, 0x0044), 133);
+        mt9t112_mcu_write(ret, client, VAR8(18, 0x0045), 110);
+        mt9t112_mcu_write(ret, client, VAR8(18, 0x008c), 130);
+        mt9t112_mcu_write(ret, client, VAR8(18, 0x008d), 108);
+        mt9t112_mcu_write(ret, client, VAR8(18, 0x00A5), 27);
+        mt9t112_mcu_write(ret, client, VAR8(18, 0x00a6), 30);
+        mt9t112_mcu_write(ret, client, VAR8(18, 0x00a7), 32);
+        mt9t112_mcu_write(ret, client, VAR8(18, 0x00a8), 35);
+        return ret;
+}
+static int mt9t112_auto_focus_setting(const struct i2c_client *client)
+{
+        int ret;
+        mt9t112_mcu_write(ret, client, VAR(12, 13),     0x000F);
+        mt9t112_mcu_write(ret, client, VAR(12, 23),     0x0F0F);
+        mt9t112_mcu_write(ret, client, VAR8(1, 0),      0x06);
+        mt9t112_reg_write(ret, client, 0x0614, 0x0000);
+        mt9t112_mcu_write(ret, client, VAR8(1, 0),      0x05);
+        mt9t112_mcu_write(ret, client, VAR8(12, 2),     0x02);
+        mt9t112_mcu_write(ret, client, VAR(12, 3),      0x0002);
+        mt9t112_mcu_write(ret, client, VAR(17, 3),      0x8001);
+        mt9t112_mcu_write(ret, client, VAR(17, 11),     0x0025);
+        mt9t112_mcu_write(ret, client, VAR(17, 13),     0x0193);
+        mt9t112_mcu_write(ret, client, VAR8(17, 33),    0x18);
+        mt9t112_mcu_write(ret, client, VAR8(1, 0),      0x05);
+        return ret;
+}
+static int mt9t112_auto_focus_trigger(const struct i2c_client *client)
+{
+        int ret;
+        mt9t112_mcu_write(ret, client, VAR8(12, 25), 0x01);
+        return ret;
+}
+static int mt9t112_init_camera(const struct i2c_client *client)
+{
+        int ret;
+        ECHECKER(ret, mt9t112_reset(client));
+        ECHECKER(ret, mt9t112_init_pll(client));
+        ECHECKER(ret, mt9t112_init_setting(client));
+        ECHECKER(ret, mt9t112_auto_focus_setting(client));
+        mt9t112_reg_mask_set(ret, client, 0x0018, 0x0004, 0);
+        /* Analog setting B */
+        mt9t112_reg_write(ret, client, 0x3084, 0x2409);
+        mt9t112_reg_write(ret, client, 0x3092, 0x0A49);
+        mt9t112_reg_write(ret, client, 0x3094, 0x4949);
+        mt9t112_reg_write(ret, client, 0x3096, 0x4950);
+        /*
+         * Disable adaptive clock
+         * PRI_A_CONFIG_JPEG_OB_TX_CONTROL_VAR
+         * PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR
+         */
+        mt9t112_mcu_write(ret, client, VAR(26, 160), 0x0A2E);
+        mt9t112_mcu_write(ret, client, VAR(27, 160), 0x0A2E);
+        /* Configure STatus in Status_before_length Format and enable header */
+        /* PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR */
+        mt9t112_mcu_write(ret, client, VAR(27, 144), 0x0CB4);
+        /* Enable JPEG in context B */
+        /* PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR */
+        mt9t112_mcu_write(ret, client, VAR8(27, 142), 0x01);
+        /* Disable Dac_TXLO */
+        mt9t112_reg_write(ret, client, 0x316C, 0x350F);
+        /* Set max slew rates */
+        mt9t112_reg_write(ret, client, 0x1E, 0x777);
+        return ret;
+}
+/************************************************************************
+                        soc_camera_ops
+************************************************************************/
+static int mt9t112_set_bus_param(struct soc_camera_device *icd,
+                                 unsigned long  flags)
+{
+        return 0;
+}
+static unsigned long mt9t112_query_bus_param(struct soc_camera_device *icd)
+{
+        struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd));
+        struct mt9t112_priv *priv = to_mt9t112(client);
+        struct soc_camera_link *icl = to_soc_camera_link(icd);
+        unsigned long flags = SOCAM_MASTER | SOCAM_VSYNC_ACTIVE_HIGH |
+                SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_HIGH;
+        flags |= (priv->info->flags & MT9T112_FLAG_PCLK_RISING_EDGE) ?
+                SOCAM_PCLK_SAMPLE_RISING : SOCAM_PCLK_SAMPLE_FALLING;
+        if (priv->info->flags & MT9T112_FLAG_DATAWIDTH_8)
+                flags |= SOCAM_DATAWIDTH_8;
+        else
+                flags |= SOCAM_DATAWIDTH_10;
+        return soc_camera_apply_sensor_flags(icl, flags);
+}
+static struct soc_camera_ops mt9t112_ops = {
+        .set_bus_param          = mt9t112_set_bus_param,
+        .query_bus_param        = mt9t112_query_bus_param,
+};
+/************************************************************************
+                        v4l2_subdev_core_ops
+************************************************************************/
+static int mt9t112_g_chip_ident(struct v4l2_subdev *sd,
+                                struct v4l2_dbg_chip_ident *id)
+{
+        struct i2c_client *client = sd->priv;
+        struct mt9t112_priv *priv = to_mt9t112(client);
+        id->ident    = priv->model;
+        id->revision = 0;
+        return 0;
+}
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+static int mt9t112_g_register(struct v4l2_subdev *sd,
+                              struct v4l2_dbg_register *reg)
+{
+        struct i2c_client *client = sd->priv;
+        int                ret;
+        reg->size = 2;
+        mt9t112_reg_read(ret, client, reg->reg);
+        reg->val = (__u64)ret;
+        return 0;
+}
+static int mt9t112_s_register(struct v4l2_subdev *sd,
+                              struct v4l2_dbg_register *reg)
+{
+        struct i2c_client *client = sd->priv;
+        int ret;
+        mt9t112_reg_write(ret, client, reg->reg, reg->val);
+        return ret;
+}
+#endif
+static struct v4l2_subdev_core_ops mt9t112_subdev_core_ops = {
+        .g_chip_ident   = mt9t112_g_chip_ident,
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+        .g_register     = mt9t112_g_register,
+        .s_register     = mt9t112_s_register,
+#endif
+};
+/************************************************************************
+                        v4l2_subdev_video_ops
+************************************************************************/
+static int mt9t112_s_stream(struct v4l2_subdev *sd, int enable)
+{
+        struct i2c_client *client = sd->priv;
+        struct mt9t112_priv *priv = to_mt9t112(client);
+        int ret = 0;
+        if (!enable) {
+                /* FIXME
+                 *
+                 * If user selected large output size,
+                 * and used it long time,
+                 * mt9t112 camera will be very warm.
+                 *
+                 * But current driver can not stop mt9t112 camera.
+                 * So, set small size here to solve this problem.
+                 */
+                mt9t112_set_a_frame_size(client, VGA_WIDTH, VGA_HEIGHT);
+                return ret;
+        }
+        if (!(priv->flags & INIT_DONE)) {
+                u16 param = (MT9T112_FLAG_PCLK_RISING_EDGE &
+                             priv->info->flags) ? 0x0001 : 0x0000;
+                ECHECKER(ret, mt9t112_init_camera(client));
+                /* Invert PCLK (Data sampled on falling edge of pixclk) */
+                mt9t112_reg_write(ret, client, 0x3C20, param);
+                mdelay(5);
+                priv->flags |= INIT_DONE;
+        }
+        mt9t112_mcu_write(ret, client, VAR(26, 7), priv->format->fmt);
+        mt9t112_mcu_write(ret, client, VAR(26, 9), priv->format->order);
+        mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06);
+        mt9t112_set_a_frame_size(client,
+                                 priv->frame.width,
+                                 priv->frame.height);
+        ECHECKER(ret, mt9t112_auto_focus_trigger(client));
+        dev_dbg(&client->dev, "format : %d\n", priv->format->code);
+        dev_dbg(&client->dev, "size   : %d x %d\n",
+                priv->frame.width,
+                priv->frame.height);
+        CLOCK_INFO(client, EXT_CLOCK);
+        return ret;
+}
+static int mt9t112_set_params(struct i2c_client *client, u32 width, u32 height,
+                              enum v4l2_mbus_pixelcode code)
+{
+        struct mt9t112_priv *priv = to_mt9t112(client);
+        int i;
+        priv->format = NULL;
+        /*
+         * frame size check
+         */
+        mt9t112_frame_check(&width, &height);
+        /*
+         * get color format
+         */
+        for (i = 0; i < ARRAY_SIZE(mt9t112_cfmts); i++)
+                if (mt9t112_cfmts[i].code == code)
+                        break;
+        if (i == ARRAY_SIZE(mt9t112_cfmts))
+                return -EINVAL;
+        priv->frame.width  = (u16)width;
+        priv->frame.height = (u16)height;
+        priv->format = mt9t112_cfmts + i;
+        return 0;
+}
+static int mt9t112_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
+{
+        a->bounds.left                  = 0;
+        a->bounds.top                   = 0;
+        a->bounds.width                 = VGA_WIDTH;
+        a->bounds.height                = VGA_HEIGHT;
+        a->defrect                      = a->bounds;
+        a->type                         = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+        a->pixelaspect.numerator        = 1;
+        a->pixelaspect.denominator      = 1;
+        return 0;
+}
+static int mt9t112_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
+{
+        a->c.left       = 0;
+        a->c.top        = 0;
+        a->c.width      = VGA_WIDTH;
+        a->c.height     = VGA_HEIGHT;
+        a->type         = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+        return 0;
+}
+static int mt9t112_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
+{
+        struct i2c_client *client = sd->priv;
+        struct v4l2_rect *rect = &a->c;
+        return mt9t112_set_params(client, rect->width, rect->height,
+                                 V4L2_MBUS_FMT_YUYV8_2X8_BE);
+}
+static int mt9t112_g_fmt(struct v4l2_subdev *sd,
+                         struct v4l2_mbus_framefmt *mf)
+{
+        struct i2c_client *client = sd->priv;
+        struct mt9t112_priv *priv = to_mt9t112(client);
+        if (!priv->format) {
+                int ret = mt9t112_set_params(client, VGA_WIDTH, VGA_HEIGHT,
+                                             V4L2_MBUS_FMT_YUYV8_2X8_BE);
+                if (ret < 0)
+                        return ret;
+        }
+        mf->width       = priv->frame.width;
+        mf->height      = priv->frame.height;
+        /* TODO: set colorspace */
+        mf->code        = priv->format->code;
+        mf->field       = V4L2_FIELD_NONE;
+        return 0;
+}
+static int mt9t112_s_fmt(struct v4l2_subdev *sd,
+                         struct v4l2_mbus_framefmt *mf)
+{
+        struct i2c_client *client = sd->priv;
+        /* TODO: set colorspace */
+        return mt9t112_set_params(client, mf->width, mf->height, mf->code);
+}
+static int mt9t112_try_fmt(struct v4l2_subdev *sd,
+                           struct v4l2_mbus_framefmt *mf)
+{
+        mt9t112_frame_check(&mf->width, &mf->height);
+        /* TODO: set colorspace */
+        mf->field = V4L2_FIELD_NONE;
+        return 0;
+}
+static int mt9t112_enum_fmt(struct v4l2_subdev *sd, int index,
+                           enum v4l2_mbus_pixelcode *code)
+{
+        if ((unsigned int)index >= ARRAY_SIZE(mt9t112_cfmts))
+                return -EINVAL;
+        *code = mt9t112_cfmts[index].code;
+        return 0;
+}
+static struct v4l2_subdev_video_ops mt9t112_subdev_video_ops = {
+        .s_stream       = mt9t112_s_stream,
+        .g_mbus_fmt     = mt9t112_g_fmt,
+        .s_mbus_fmt     = mt9t112_s_fmt,
+        .try_mbus_fmt   = mt9t112_try_fmt,
+        .cropcap        = mt9t112_cropcap,
+        .g_crop         = mt9t112_g_crop,
+        .s_crop         = mt9t112_s_crop,
+        .enum_mbus_fmt  = mt9t112_enum_fmt,
+};
+/************************************************************************
+                        i2c driver
+************************************************************************/
+static struct v4l2_subdev_ops mt9t112_subdev_ops = {
+        .core   = &mt9t112_subdev_core_ops,
+        .video  = &mt9t112_subdev_video_ops,
+};
+static int mt9t112_camera_probe(struct soc_camera_device *icd,
+                                struct i2c_client *client)
+{
+        struct mt9t112_priv *priv = to_mt9t112(client);
+        const char          *devname;
+        int                  chipid;
+        /*
+         * We must have a parent by now. And it cannot be a wrong one.
+         * So this entire test is completely redundant.
+         */
+        if (!icd->dev.parent ||
+            to_soc_camera_host(icd->dev.parent)->nr != icd->iface)
+                return -ENODEV;
+        /*
+         * check and show chip ID
+         */
+        mt9t112_reg_read(chipid, client, 0x0000);
+        switch (chipid) {
+        case 0x2680:
+                devname = "mt9t111";
+                priv->model = V4L2_IDENT_MT9T111;
+                break;
+        case 0x2682:
+                devname = "mt9t112";
+                priv->model = V4L2_IDENT_MT9T112;
+                break;
+        default:
+                dev_err(&client->dev, "Product ID error %04x\n", chipid);
+                return -ENODEV;
+        }
+        dev_info(&client->dev, "%s chip ID %04x\n", devname, chipid);
+        return 0;
+}
+static int mt9t112_probe(struct i2c_client *client,
+                         const struct i2c_device_id *did)
+{
+        struct mt9t112_priv        *priv;
+        struct soc_camera_device   *icd = client->dev.platform_data;
+        struct soc_camera_link     *icl;
+        int                         ret;
+        if (!icd) {
+                dev_err(&client->dev, "mt9t112: missing soc-camera data!\n");
+                return -EINVAL;
+        }
+        icl = to_soc_camera_link(icd);
+        if (!icl || !icl->priv)
+                return -EINVAL;
+        priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+        if (!priv)
+                return -ENOMEM;
+        priv->info = icl->priv;
+        v4l2_i2c_subdev_init(&priv->subdev, client, &mt9t112_subdev_ops);
+        icd->ops = &mt9t112_ops;
+        ret = mt9t112_camera_probe(icd, client);
+        if (ret) {
+                icd->ops = NULL;
+                i2c_set_clientdata(client, NULL);
+                kfree(priv);
+        }
+        return ret;
+}
+static int mt9t112_remove(struct i2c_client *client)
+{
+        struct mt9t112_priv *priv = to_mt9t112(client);
+        struct soc_camera_device *icd = client->dev.platform_data;
+        icd->ops = NULL;
+        i2c_set_clientdata(client, NULL);
+        kfree(priv);
+        return 0;
+}
+static const struct i2c_device_id mt9t112_id[] = {
+        { "mt9t112", 0 },
+        { }
+};
+MODULE_DEVICE_TABLE(i2c, mt9t112_id);
+static struct i2c_driver mt9t112_i2c_driver = {
+        .driver = {
+                .name = "mt9t112",
+        },
+        .probe    = mt9t112_probe,
+        .remove   = mt9t112_remove,
+        .id_table = mt9t112_id,
+};
+/************************************************************************
+                        module function
+************************************************************************/
+static int __init mt9t112_module_init(void)
+{
+        return i2c_add_driver(&mt9t112_i2c_driver);
+}
+static void __exit mt9t112_module_exit(void)
+{
+        i2c_del_driver(&mt9t112_i2c_driver);
+}
+module_init(mt9t112_module_init);
+module_exit(mt9t112_module_exit);
+MODULE_DESCRIPTION("SoC Camera driver for mt9t112");
+MODULE_AUTHOR("Kuninori Morimoto");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/video/mt9v022.c b/drivers/media/video/mt9v022.c
index 995607f9d3ba..91df7ec91fb6 100644
--- a/drivers/media/video/mt9v022.c
+++ b/drivers/media/video/mt9v022.c
@@ -18,9 +18,11 @@
 #include <media/v4l2-chip-ident.h>
 #include <media/soc_camera.h>
-/* mt9v022 i2c address 0x48, 0x4c, 0x58, 0x5c
+/*
+ * mt9v022 i2c address 0x48, 0x4c, 0x58, 0x5c
 * The platform has to define ctruct i2c_board_info objects and link to them
- * from struct soc_camera_link */
+ * from struct soc_camera_link
+ */
 static char *sensor_type;
 module_param(sensor_type, charp, S_IRUGO);
@@ -62,41 +64,49 @@ MODULE_PARM_DESC(sensor_type, "Sensor type: \"colour\" or \"monochrome\"");
 #define MT9V022_COLUMN_SKIP             1
 #define MT9V022_ROW_SKIP                4
-static const struct soc_camera_data_format mt9v022_colour_formats[] = {
+/* MT9V022 has only one fixed colorspace per pixelcode */
-        /* Order important: first natively supported,
+struct mt9v022_datafmt {
-         * second supported with a GPIO extender */
+        enum v4l2_mbus_pixelcode        code;
-        {
+        enum v4l2_colorspace            colorspace;
-                .name           = "Bayer (sRGB) 10 bit",
+};
-                .depth          = 10,
-                .fourcc         = V4L2_PIX_FMT_SBGGR16,
+/* Find a data format by a pixel code in an array */
-                .colorspace     = V4L2_COLORSPACE_SRGB,
+static const struct mt9v022_datafmt *mt9v022_find_datafmt(
-        }, {
+        enum v4l2_mbus_pixelcode code, const struct mt9v022_datafmt *fmt,
-                .name           = "Bayer (sRGB) 8 bit",
+        int n)
-                .depth          = 8,
+{
-                .fourcc         = V4L2_PIX_FMT_SBGGR8,
+        int i;
-                .colorspace     = V4L2_COLORSPACE_SRGB,
+        for (i = 0; i < n; i++)
-        }
+                if (fmt[i].code == code)
+                        return fmt + i;
+        return NULL;
+}
+static const struct mt9v022_datafmt mt9v022_colour_fmts[] = {
+        /*
+         * Order important: first natively supported,
+         * second supported with a GPIO extender
+         */
+        {V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB},
+        {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
 };
-static const struct soc_camera_data_format mt9v022_monochrome_formats[] = {
+static const struct mt9v022_datafmt mt9v022_monochrome_fmts[] = {
        /* Order important - see above */
-        {
+        {V4L2_MBUS_FMT_Y10_1X10, V4L2_COLORSPACE_JPEG},
-                .name           = "Monochrome 10 bit",
+        {V4L2_MBUS_FMT_GREY8_1X8, V4L2_COLORSPACE_JPEG},
-                .depth          = 10,
-                .fourcc         = V4L2_PIX_FMT_Y16,
-        }, {
-                .name           = "Monochrome 8 bit",
-                .depth          = 8,
-                .fourcc         = V4L2_PIX_FMT_GREY,
-        },
 };
 struct mt9v022 {
        struct v4l2_subdev subdev;
        struct v4l2_rect rect;  /* Sensor window */
-        __u32 fourcc;
+        const struct mt9v022_datafmt *fmt;
+        const struct mt9v022_datafmt *fmts;
+        int num_fmts;
        int model;      /* V4L2_IDENT_MT9V022* codes from v4l2-chip-ident.h */
        u16 chip_control;
+        unsigned short y_skip_top;      /* Lines to skip at the top */
 };
 static struct mt9v022 *to_mt9v022(const struct i2c_client *client)
@@ -143,9 +153,11 @@ static int mt9v022_init(struct i2c_client *client)
        struct mt9v022 *mt9v022 = to_mt9v022(client);
        int ret;
-        /* Almost the default mode: master, parallel, simultaneous, and an
+        /*
+         * Almost the default mode: master, parallel, simultaneous, and an
         * undocumented bit 0x200, which is present in table 7, but not in 8,
-         * plus snapshot mode to disable scan for now */
+         * plus snapshot mode to disable scan for now
+         */
        mt9v022->chip_control |= 0x10;
        ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control);
        if (!ret)
@@ -265,12 +277,10 @@ static int mt9v022_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
        struct i2c_client *client = sd->priv;
        struct mt9v022 *mt9v022 = to_mt9v022(client);
        struct v4l2_rect rect = a->c;
-        struct soc_camera_device *icd = client->dev.platform_data;
        int ret;
        /* Bayer format - even size lengths */
-        if (mt9v022->fourcc == V4L2_PIX_FMT_SBGGR8 ||
+        if (mt9v022->fmts == mt9v022_colour_fmts) {
-            mt9v022->fourcc == V4L2_PIX_FMT_SBGGR16) {
                rect.width      = ALIGN(rect.width, 2);
                rect.height     = ALIGN(rect.height, 2);
                /* Let the user play with the starting pixel */
@@ -287,10 +297,10 @@ static int mt9v022_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
        if (ret >= 0) {
                if (ret & 1) /* Autoexposure */
                        ret = reg_write(client, MT9V022_MAX_TOTAL_SHUTTER_WIDTH,
-                                        rect.height + icd->y_skip_top + 43);
+                                        rect.height + mt9v022->y_skip_top + 43);
                else
                        ret = reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH,
-                                        rect.height + icd->y_skip_top + 43);
+                                        rect.height + mt9v022->y_skip_top + 43);
        }
        /* Setup frame format: defaults apart from width and height */
        if (!ret)
@@ -298,8 +308,10 @@ static int mt9v022_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
        if (!ret)
                ret = reg_write(client, MT9V022_ROW_START, rect.top);
        if (!ret)
-                /* Default 94, Phytec driver says:
+                /*
-                 * "width + horizontal blank >= 660" */
+                 * Default 94, Phytec driver says:
+                 * "width + horizontal blank >= 660"
+                 */
                ret = reg_write(client, MT9V022_HORIZONTAL_BLANKING,
                                rect.width > 660 - 43 ? 43 :
                                660 - rect.width);
@@ -309,7 +321,7 @@ static int mt9v022_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
                ret = reg_write(client, MT9V022_WINDOW_WIDTH, rect.width);
        if (!ret)
                ret = reg_write(client, MT9V022_WINDOW_HEIGHT,
-                                rect.height + icd->y_skip_top);
+                                rect.height + mt9v022->y_skip_top);
        if (ret < 0)
                return ret;
@@ -346,46 +358,48 @@ static int mt9v022_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
        return 0;
 }
-static int mt9v022_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int mt9v022_g_fmt(struct v4l2_subdev *sd,
+                         struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
        struct mt9v022 *mt9v022 = to_mt9v022(client);
-        struct v4l2_pix_format *pix = &f->fmt.pix;
-        pix->width              = mt9v022->rect.width;
+        mf->width       = mt9v022->rect.width;
-        pix->height             = mt9v022->rect.height;
+        mf->height      = mt9v022->rect.height;
-        pix->pixelformat        = mt9v022->fourcc;
+        mf->code        = mt9v022->fmt->code;
-        pix->field              = V4L2_FIELD_NONE;
+        mf->colorspace  = mt9v022->fmt->colorspace;
-        pix->colorspace         = V4L2_COLORSPACE_SRGB;
+        mf->field       = V4L2_FIELD_NONE;
        return 0;
 }
-static int mt9v022_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int mt9v022_s_fmt(struct v4l2_subdev *sd,
+                         struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
        struct mt9v022 *mt9v022 = to_mt9v022(client);
-        struct v4l2_pix_format *pix = &f->fmt.pix;
        struct v4l2_crop a = {
                .c = {
                        .left   = mt9v022->rect.left,
                        .top    = mt9v022->rect.top,
-                        .width  = pix->width,
+                        .width  = mf->width,
-                        .height = pix->height,
+                        .height = mf->height,
                },
        };
        int ret;
-        /* The caller provides a supported format, as verified per call to
+        /*
-         * icd->try_fmt(), datawidth is from our supported format list */
+         * The caller provides a supported format, as verified per call to
-        switch (pix->pixelformat) {
+         * icd->try_fmt(), datawidth is from our supported format list
-        case V4L2_PIX_FMT_GREY:
+         */
-        case V4L2_PIX_FMT_Y16:
+        switch (mf->code) {
+        case V4L2_MBUS_FMT_GREY8_1X8:
+        case V4L2_MBUS_FMT_Y10_1X10:
                if (mt9v022->model != V4L2_IDENT_MT9V022IX7ATM)
                        return -EINVAL;
                break;
-        case V4L2_PIX_FMT_SBGGR8:
+        case V4L2_MBUS_FMT_SBGGR8_1X8:
-        case V4L2_PIX_FMT_SBGGR16:
+        case V4L2_MBUS_FMT_SBGGR10_1X10:
                if (mt9v022->model != V4L2_IDENT_MT9V022IX7ATC)
                        return -EINVAL;
                break;
@@ -399,26 +413,38 @@ static int mt9v022_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
        /* No support for scaling on this camera, just crop. */
        ret = mt9v022_s_crop(sd, &a);
        if (!ret) {
-                pix->width = mt9v022->rect.width;
+                mf->width       = mt9v022->rect.width;
-                pix->height = mt9v022->rect.height;
+                mf->height      = mt9v022->rect.height;
-                mt9v022->fourcc = pix->pixelformat;
+                mt9v022->fmt    = mt9v022_find_datafmt(mf->code,
+                                        mt9v022->fmts, mt9v022->num_fmts);
+                mf->colorspace  = mt9v022->fmt->colorspace;
        }
        return ret;
 }
-static int mt9v022_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int mt9v022_try_fmt(struct v4l2_subdev *sd,
+                           struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
-        struct soc_camera_device *icd = client->dev.platform_data;
+        struct mt9v022 *mt9v022 = to_mt9v022(client);
-        struct v4l2_pix_format *pix = &f->fmt.pix;
+        const struct mt9v022_datafmt *fmt;
-        int align = pix->pixelformat == V4L2_PIX_FMT_SBGGR8 ||
+        int align = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
-                pix->pixelformat == V4L2_PIX_FMT_SBGGR16;
+                mf->code == V4L2_MBUS_FMT_SBGGR10_1X10;
-        v4l_bound_align_image(&pix->width, MT9V022_MIN_WIDTH,
+        v4l_bound_align_image(&mf->width, MT9V022_MIN_WIDTH,
                MT9V022_MAX_WIDTH, align,
-                &pix->height, MT9V022_MIN_HEIGHT + icd->y_skip_top,
+                &mf->height, MT9V022_MIN_HEIGHT + mt9v022->y_skip_top,
-                MT9V022_MAX_HEIGHT + icd->y_skip_top, align, 0);
+                MT9V022_MAX_HEIGHT + mt9v022->y_skip_top, align, 0);
+        fmt = mt9v022_find_datafmt(mf->code, mt9v022->fmts,
+                                   mt9v022->num_fmts);
+        if (!fmt) {
+                fmt = mt9v022->fmt;
+                mf->code = fmt->code;
+        }
+        mf->colorspace  = fmt->colorspace;
        return 0;
 }
@@ -635,8 +661,10 @@ static int mt9v022_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
                                              48 + range / 2) / range + 16;
                        if (gain >= 32)
                                gain &= ~1;
-                        /* The user wants to set gain manually, hope, she
+                        /*
-                         * knows, what she's doing... Switch AGC off. */
+                         * The user wants to set gain manually, hope, she
+                         * knows, what she's doing... Switch AGC off.
+                         */
                        if (reg_clear(client, MT9V022_AEC_AGC_ENABLE, 0x2) < 0)
                                return -EIO;
@@ -655,8 +683,10 @@ static int mt9v022_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
                        unsigned long range = qctrl->maximum - qctrl->minimum;
                        unsigned long shutter = ((ctrl->value - qctrl->minimum) *
                                                 479 + range / 2) / range + 1;
-                        /* The user wants to set shutter width manually, hope,
+                        /*
-                         * she knows, what she's doing... Switch AEC off. */
+                         * The user wants to set shutter width manually, hope,
+                         * she knows, what she's doing... Switch AEC off.
+                         */
                        if (reg_clear(client, MT9V022_AEC_AGC_ENABLE, 0x1) < 0)
                                return -EIO;
@@ -689,8 +719,10 @@ static int mt9v022_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
        return 0;
 }
-/* Interface active, can use i2c. If it fails, it can indeed mean, that
+/*
- * this wasn't our capture interface, so, we wait for the right one */
+ * Interface active, can use i2c. If it fails, it can indeed mean, that
+ * this wasn't our capture interface, so, we wait for the right one
+ */
 static int mt9v022_video_probe(struct soc_camera_device *icd,
                               struct i2c_client *client)
 {
@@ -733,17 +765,17 @@ static int mt9v022_video_probe(struct soc_camera_device *icd,
                            !strcmp("color", sensor_type))) {
                ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 4 | 0x11);
                mt9v022->model = V4L2_IDENT_MT9V022IX7ATC;
-                icd->formats = mt9v022_colour_formats;
+                mt9v022->fmts = mt9v022_colour_fmts;
        } else {
                ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 0x11);
                mt9v022->model = V4L2_IDENT_MT9V022IX7ATM;
-                icd->formats = mt9v022_monochrome_formats;
+                mt9v022->fmts = mt9v022_monochrome_fmts;
        }
        if (ret < 0)
                goto ei2c;
-        icd->num_formats = 0;
+        mt9v022->num_fmts = 0;
        /*
         * This is a 10bit sensor, so by default we only allow 10bit.
@@ -756,14 +788,14 @@ static int mt9v022_video_probe(struct soc_camera_device *icd,
                flags = SOCAM_DATAWIDTH_10;
        if (flags & SOCAM_DATAWIDTH_10)
-                icd->num_formats++;
+                mt9v022->num_fmts++;
        else
-                icd->formats++;
+                mt9v022->fmts++;
        if (flags & SOCAM_DATAWIDTH_8)
-                icd->num_formats++;
+                mt9v022->num_fmts++;
-        mt9v022->fourcc = icd->formats->fourcc;
+        mt9v022->fmt = &mt9v022->fmts[0];
        dev_info(&client->dev, "Detected a MT9V022 chip ID %x, %s sensor\n",
                 data, mt9v022->model == V4L2_IDENT_MT9V022IX7ATM ?
@@ -787,6 +819,16 @@ static void mt9v022_video_remove(struct soc_camera_device *icd)
                icl->free_bus(icl);
 }
+static int mt9v022_g_skip_top_lines(struct v4l2_subdev *sd, u32 *lines)
+{
+        struct i2c_client *client = sd->priv;
+        struct mt9v022 *mt9v022 = to_mt9v022(client);
+        *lines = mt9v022->y_skip_top;
+        return 0;
+}
 static struct v4l2_subdev_core_ops mt9v022_subdev_core_ops = {
        .g_ctrl         = mt9v022_g_ctrl,
        .s_ctrl         = mt9v022_s_ctrl,
@@ -797,19 +839,38 @@ static struct v4l2_subdev_core_ops mt9v022_subdev_core_ops = {
 #endif
 };
+static int mt9v022_enum_fmt(struct v4l2_subdev *sd, int index,
+                            enum v4l2_mbus_pixelcode *code)
+{
+        struct i2c_client *client = sd->priv;
+        struct mt9v022 *mt9v022 = to_mt9v022(client);
+        if ((unsigned int)index >= mt9v022->num_fmts)
+                return -EINVAL;
+        *code = mt9v022->fmts[index].code;
+        return 0;
+}
 static struct v4l2_subdev_video_ops mt9v022_subdev_video_ops = {
        .s_stream       = mt9v022_s_stream,
-        .s_fmt          = mt9v022_s_fmt,
+        .s_mbus_fmt     = mt9v022_s_fmt,
-        .g_fmt          = mt9v022_g_fmt,
+        .g_mbus_fmt     = mt9v022_g_fmt,
-        .try_fmt        = mt9v022_try_fmt,
+        .try_mbus_fmt   = mt9v022_try_fmt,
        .s_crop         = mt9v022_s_crop,
        .g_crop         = mt9v022_g_crop,
        .cropcap        = mt9v022_cropcap,
+        .enum_mbus_fmt  = mt9v022_enum_fmt,
+};
+static struct v4l2_subdev_sensor_ops mt9v022_subdev_sensor_ops = {
+        .g_skip_top_lines       = mt9v022_g_skip_top_lines,
 };
 static struct v4l2_subdev_ops mt9v022_subdev_ops = {
        .core   = &mt9v022_subdev_core_ops,
        .video  = &mt9v022_subdev_video_ops,
+        .sensor = &mt9v022_subdev_sensor_ops,
 };
 static int mt9v022_probe(struct i2c_client *client,
@@ -851,8 +912,7 @@ static int mt9v022_probe(struct i2c_client *client,
         * MT9V022 _really_ corrupts the first read out line.
         * TODO: verify on i.MX31
         */
-        icd->y_skip_top         = 1;
+        mt9v022->y_skip_top     = 1;
        mt9v022->rect.left      = MT9V022_COLUMN_SKIP;
        mt9v022->rect.top       = MT9V022_ROW_SKIP;
        mt9v022->rect.width     = MT9V022_MAX_WIDTH;
diff --git a/drivers/media/video/mx1_camera.c b/drivers/media/video/mx1_camera.c
index 72802291e812..2ba14fb5b031 100644
--- a/drivers/media/video/mx1_camera.c
+++ b/drivers/media/video/mx1_camera.c
@@ -37,6 +37,7 @@
 #include <media/v4l2-common.h>
 #include <media/v4l2-dev.h>
 #include <media/videobuf-dma-contig.h>
+#include <media/soc_mediabus.h>
 #include <asm/dma.h>
 #include <asm/fiq.h>
@@ -94,14 +95,16 @@
 /* buffer for one video frame */
 struct mx1_buffer {
        /* common v4l buffer stuff -- must be first */
-        struct videobuf_buffer vb;
+        struct videobuf_buffer          vb;
-        const struct soc_camera_data_format *fmt;
+        enum v4l2_mbus_pixelcode        code;
-        int inwork;
+        int                             inwork;
 };
-/* i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
+/*
+ * i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
 * Interface. If anyone ever builds hardware to enable more than
- * one camera, they will have to modify this driver too */
+ * one camera, they will have to modify this driver too
+ */
 struct mx1_camera_dev {
        struct soc_camera_host          soc_host;
        struct soc_camera_device        *icd;
@@ -126,9 +129,13 @@ static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
                              unsigned int *size)
 {
        struct soc_camera_device *icd = vq->priv_data;
+        int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
+                                                icd->current_fmt->host_fmt);
+        if (bytes_per_line < 0)
+                return bytes_per_line;
-        *size = icd->user_width * icd->user_height *
+        *size = bytes_per_line * icd->user_height;
-                ((icd->current_fmt->depth + 7) >> 3);
        if (!*count)
                *count = 32;
@@ -151,8 +158,10 @@ static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
        dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
                vb, vb->baddr, vb->bsize);
-        /* This waits until this buffer is out of danger, i.e., until it is no
+        /*
-         * longer in STATE_QUEUED or STATE_ACTIVE */
+         * This waits until this buffer is out of danger, i.e., until it is no
+         * longer in STATE_QUEUED or STATE_ACTIVE
+         */
        videobuf_waiton(vb, 0, 0);
        videobuf_dma_contig_free(vq, vb);
@@ -165,6 +174,11 @@ static int mx1_videobuf_prepare(struct videobuf_queue *vq,
        struct soc_camera_device *icd = vq->priv_data;
        struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
        int ret;
+        int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
+                                                icd->current_fmt->host_fmt);
+        if (bytes_per_line < 0)
+                return bytes_per_line;
        dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
                vb, vb->baddr, vb->bsize);
@@ -174,22 +188,24 @@ static int mx1_videobuf_prepare(struct videobuf_queue *vq,
        BUG_ON(NULL == icd->current_fmt);
-        /* I think, in buf_prepare you only have to protect global data,
+        /*
-         * the actual buffer is yours */
+         * I think, in buf_prepare you only have to protect global data,
+         * the actual buffer is yours
+         */
        buf->inwork = 1;
-        if (buf->fmt    != icd->current_fmt ||
+        if (buf->code   != icd->current_fmt->code ||
            vb->width   != icd->user_width ||
            vb->height  != icd->user_height ||
            vb->field   != field) {
-                buf->fmt        = icd->current_fmt;
+                buf->code       = icd->current_fmt->code;
                vb->width       = icd->user_width;
                vb->height      = icd->user_height;
                vb->field       = field;
                vb->state       = VIDEOBUF_NEEDS_INIT;
        }
-        vb->size = vb->width * vb->height * ((buf->fmt->depth + 7) >> 3);
+        vb->size = bytes_per_line * vb->height;
        if (0 != vb->baddr && vb->bsize < vb->size) {
                ret = -EINVAL;
                goto out;
@@ -381,8 +397,10 @@ static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
        lcdclk = clk_get_rate(pcdev->clk);
-        /* We verify platform_mclk_10khz != 0, so if anyone breaks it, here
+        /*
-         * they get a nice Oops */
+         * We verify platform_mclk_10khz != 0, so if anyone breaks it, here
+         * they get a nice Oops
+         */
        div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
        dev_dbg(pcdev->icd->dev.parent,
@@ -420,8 +438,10 @@ static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
        clk_disable(pcdev->clk);
 }
-/* The following two functions absolutely depend on the fact, that
+/*
- * there can be only one camera on i.MX1/i.MXL camera sensor interface */
+ * The following two functions absolutely depend on the fact, that
+ * there can be only one camera on i.MX1/i.MXL camera sensor interface
+ */
 static int mx1_camera_add_device(struct soc_camera_device *icd)
 {
        struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
@@ -487,12 +507,10 @@ static int mx1_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
        /* MX1 supports only 8bit buswidth */
        common_flags = soc_camera_bus_param_compatible(camera_flags,
-                                                               CSI_BUS_FLAGS);
+                                                       CSI_BUS_FLAGS);
        if (!common_flags)
                return -EINVAL;
-        icd->buswidth = 8;
        /* Make choises, based on platform choice */
        if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
                (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
@@ -545,7 +563,8 @@ static int mx1_camera_set_fmt(struct soc_camera_device *icd,
        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
        const struct soc_camera_format_xlate *xlate;
        struct v4l2_pix_format *pix = &f->fmt.pix;
-        int ret;
+        struct v4l2_mbus_framefmt mf;
+        int ret, buswidth;
        xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
        if (!xlate) {
@@ -554,12 +573,33 @@ static int mx1_camera_set_fmt(struct soc_camera_device *icd,
                return -EINVAL;
        }
-        ret = v4l2_subdev_call(sd, video, s_fmt, f);
+        buswidth = xlate->host_fmt->bits_per_sample;
-        if (!ret) {
+        if (buswidth > 8) {
-                icd->buswidth = xlate->buswidth;
+                dev_warn(icd->dev.parent,
-                icd->current_fmt = xlate->host_fmt;
+                         "bits-per-sample %d for format %x unsupported\n",
+                         buswidth, pix->pixelformat);
+                return -EINVAL;
        }
+        mf.width        = pix->width;
+        mf.height       = pix->height;
+        mf.field        = pix->field;
+        mf.colorspace   = pix->colorspace;
+        mf.code         = xlate->code;
+        ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
+        if (ret < 0)
+                return ret;
+        if (mf.code != xlate->code)
+                return -EINVAL;
+        pix->width              = mf.width;
+        pix->height             = mf.height;
+        pix->field              = mf.field;
+        pix->colorspace         = mf.colorspace;
+        icd->current_fmt        = xlate;
        return ret;
 }
@@ -567,10 +607,36 @@ static int mx1_camera_try_fmt(struct soc_camera_device *icd,
                              struct v4l2_format *f)
 {
        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
+        const struct soc_camera_format_xlate *xlate;
+        struct v4l2_pix_format *pix = &f->fmt.pix;
+        struct v4l2_mbus_framefmt mf;
+        int ret;
        /* TODO: limit to mx1 hardware capabilities */
+        xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
+        if (!xlate) {
+                dev_warn(icd->dev.parent, "Format %x not found\n",
+                         pix->pixelformat);
+                return -EINVAL;
+        }
+        mf.width        = pix->width;
+        mf.height       = pix->height;
+        mf.field        = pix->field;
+        mf.colorspace   = pix->colorspace;
+        mf.code         = xlate->code;
        /* limit to sensor capabilities */
-        return v4l2_subdev_call(sd, video, try_fmt, f);
+        ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
+        if (ret < 0)
+                return ret;
+        pix->width      = mf.width;
+        pix->height     = mf.height;
+        pix->field      = mf.field;
+        pix->colorspace = mf.colorspace;
+        return 0;
 }
 static int mx1_camera_reqbufs(struct soc_camera_file *icf,
@@ -578,10 +644,12 @@ static int mx1_camera_reqbufs(struct soc_camera_file *icf,
 {
        int i;
-        /* This is for locking debugging only. I removed spinlocks and now I
+        /*
+         * This is for locking debugging only. I removed spinlocks and now I
         * check whether .prepare is ever called on a linked buffer, or whether
         * a dma IRQ can occur for an in-work or unlinked buffer. Until now
-         * it hadn't triggered */
+         * it hadn't triggered
+         */
        for (i = 0; i < p->count; i++) {
                struct mx1_buffer *buf = container_of(icf->vb_vidq.bufs[i],
                                                      struct mx1_buffer, vb);
diff --git a/drivers/media/video/mx3_camera.c b/drivers/media/video/mx3_camera.c
index 7db82bdf6f31..bd297f567dc7 100644
--- a/drivers/media/video/mx3_camera.c
+++ b/drivers/media/video/mx3_camera.c
@@ -23,6 +23,7 @@
 #include <media/v4l2-dev.h>
 #include <media/videobuf-dma-contig.h>
 #include <media/soc_camera.h>
+#include <media/soc_mediabus.h>
 #include <mach/ipu.h>
 #include <mach/mx3_camera.h>
@@ -63,7 +64,7 @@
 struct mx3_camera_buffer {
        /* common v4l buffer stuff -- must be first */
        struct videobuf_buffer                  vb;
-        const struct soc_camera_data_format     *fmt;
+        enum v4l2_mbus_pixelcode                code;
        /* One descriptot per scatterlist (per frame) */
        struct dma_async_tx_descriptor          *txd;
@@ -118,8 +119,6 @@ struct dma_chan_request {
        enum ipu_channel        id;
 };
-static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt);
 static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
 {
        return __raw_readl(mx3->base + reg);
@@ -211,17 +210,16 @@ static int mx3_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
        struct soc_camera_device *icd = vq->priv_data;
        struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
        struct mx3_camera_dev *mx3_cam = ici->priv;
-        /*
+        int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
-         * bits-per-pixel (depth) as specified in camera's pixel format does
+                                                icd->current_fmt->host_fmt);
-         * not necessarily match what the camera interface writes to RAM, but
-         * it should be good enough for now.
+        if (bytes_per_line < 0)
-         */
+                return bytes_per_line;
-        unsigned int bpp = DIV_ROUND_UP(icd->current_fmt->depth, 8);
        if (!mx3_cam->idmac_channel[0])
                return -EINVAL;
-        *size = icd->user_width * icd->user_height * bpp;
+        *size = bytes_per_line * icd->user_height;
        if (!*count)
                *count = 32;
@@ -241,21 +239,26 @@ static int mx3_videobuf_prepare(struct videobuf_queue *vq,
        struct mx3_camera_dev *mx3_cam = ici->priv;
        struct mx3_camera_buffer *buf =
                container_of(vb, struct mx3_camera_buffer, vb);
-        /* current_fmt _must_ always be set */
+        size_t new_size;
-        size_t new_size = icd->user_width * icd->user_height *
-                ((icd->current_fmt->depth + 7) >> 3);
        int ret;
+        int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
+                                                icd->current_fmt->host_fmt);
+        if (bytes_per_line < 0)
+                return bytes_per_line;
+        new_size = bytes_per_line * icd->user_height;
        /*
         * I think, in buf_prepare you only have to protect global data,
         * the actual buffer is yours
         */
-        if (buf->fmt    != icd->current_fmt ||
+        if (buf->code   != icd->current_fmt->code ||
            vb->width   != icd->user_width ||
            vb->height  != icd->user_height ||
            vb->field   != field) {
-                buf->fmt        = icd->current_fmt;
+                buf->code       = icd->current_fmt->code;
                vb->width       = icd->user_width;
                vb->height      = icd->user_height;
                vb->field       = field;
@@ -348,13 +351,13 @@ static void mx3_videobuf_queue(struct videobuf_queue *vq,
        struct dma_async_tx_descriptor *txd = buf->txd;
        struct idmac_channel *ichan = to_idmac_chan(txd->chan);
        struct idmac_video_param *video = &ichan->params.video;
-        const struct soc_camera_data_format *data_fmt = icd->current_fmt;
        dma_cookie_t cookie;
+        u32 fourcc = icd->current_fmt->host_fmt->fourcc;
        BUG_ON(!irqs_disabled());
        /* This is the configuration of one sg-element */
-        video->out_pixel_fmt    = fourcc_to_ipu_pix(data_fmt->fourcc);
+        video->out_pixel_fmt    = fourcc_to_ipu_pix(fourcc);
        video->out_width        = icd->user_width;
        video->out_height       = icd->user_height;
        video->out_stride       = icd->user_width;
@@ -564,30 +567,37 @@ static int test_platform_param(struct mx3_camera_dev *mx3_cam,
                SOCAM_DATA_ACTIVE_HIGH |
                SOCAM_DATA_ACTIVE_LOW;
-        /* If requested data width is supported by the platform, use it or any
+        /*
-         * possible lower value - i.MX31 is smart enough to schift bits */
+         * If requested data width is supported by the platform, use it or any
+         * possible lower value - i.MX31 is smart enough to schift bits
+         */
+        if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
+                *flags |= SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_10 |
+                        SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
+        else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
+                *flags |= SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8 |
+                        SOCAM_DATAWIDTH_4;
+        else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
+                *flags |= SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
+        else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)
+                *flags |= SOCAM_DATAWIDTH_4;
        switch (buswidth) {
        case 15:
-                if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15))
+                if (!(*flags & SOCAM_DATAWIDTH_15))
                        return -EINVAL;
-                *flags |= SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_10 |
-                        SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
                break;
        case 10:
-                if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10))
+                if (!(*flags & SOCAM_DATAWIDTH_10))
                        return -EINVAL;
-                *flags |= SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8 |
-                        SOCAM_DATAWIDTH_4;
                break;
        case 8:
-                if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8))
+                if (!(*flags & SOCAM_DATAWIDTH_8))
                        return -EINVAL;
-                *flags |= SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
                break;
        case 4:
-                if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4))
+                if (!(*flags & SOCAM_DATAWIDTH_4))
                        return -EINVAL;
-                *flags |= SOCAM_DATAWIDTH_4;
                break;
        default:
                dev_warn(mx3_cam->soc_host.v4l2_dev.dev,
@@ -636,91 +646,92 @@ static bool chan_filter(struct dma_chan *chan, void *arg)
                pdata->dma_dev == chan->device->dev;
 }
-static const struct soc_camera_data_format mx3_camera_formats[] = {
+static const struct soc_mbus_pixelfmt mx3_camera_formats[] = {
        {
-                .name           = "Bayer (sRGB) 8 bit",
+                .fourcc                 = V4L2_PIX_FMT_SBGGR8,
-                .depth          = 8,
+                .name                   = "Bayer BGGR (sRGB) 8 bit",
-                .fourcc         = V4L2_PIX_FMT_SBGGR8,
+                .bits_per_sample        = 8,
-                .colorspace     = V4L2_COLORSPACE_SRGB,
+                .packing                = SOC_MBUS_PACKING_NONE,
+                .order                  = SOC_MBUS_ORDER_LE,
        }, {
-                .name           = "Monochrome 8 bit",
+                .fourcc                 = V4L2_PIX_FMT_GREY,
-                .depth          = 8,
+                .name                   = "Monochrome 8 bit",
-                .fourcc         = V4L2_PIX_FMT_GREY,
+                .bits_per_sample        = 8,
-                .colorspace     = V4L2_COLORSPACE_JPEG,
+                .packing                = SOC_MBUS_PACKING_NONE,
+                .order                  = SOC_MBUS_ORDER_LE,
        },
 };
-static bool buswidth_supported(struct soc_camera_host *ici, int depth)
+/* This will be corrected as we get more formats */
+static bool mx3_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt)
 {
-        struct mx3_camera_dev *mx3_cam = ici->priv;
+        return  fmt->packing == SOC_MBUS_PACKING_NONE ||
+                (fmt->bits_per_sample == 8 &&
-        switch (depth) {
+                 fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) ||
-        case 4:
+                (fmt->bits_per_sample > 8 &&
-                return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4);
+                 fmt->packing == SOC_MBUS_PACKING_EXTEND16);
-        case 8:
-                return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8);
-        case 10:
-                return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10);
-        case 15:
-                return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15);
-        }
-        return false;
 }
 static int mx3_camera_get_formats(struct soc_camera_device *icd, int idx,
                                  struct soc_camera_format_xlate *xlate)
 {
-        struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
-        int formats = 0, buswidth, ret;
+        struct device *dev = icd->dev.parent;
+        int formats = 0, ret;
+        enum v4l2_mbus_pixelcode code;
+        const struct soc_mbus_pixelfmt *fmt;
-        buswidth = icd->formats[idx].depth;
+        ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code);
+        if (ret < 0)
+                /* No more formats */
+                return 0;
-        if (!buswidth_supported(ici, buswidth))
+        fmt = soc_mbus_get_fmtdesc(code);
+        if (!fmt) {
+                dev_err(icd->dev.parent,
+                        "Invalid format code #%d: %d\n", idx, code);
                return 0;
+        }
-        ret = mx3_camera_try_bus_param(icd, buswidth);
+        /* This also checks support for the requested bits-per-sample */
+        ret = mx3_camera_try_bus_param(icd, fmt->bits_per_sample);
        if (ret < 0)
                return 0;
-        switch (icd->formats[idx].fourcc) {
+        switch (code) {
-        case V4L2_PIX_FMT_SGRBG10:
+        case V4L2_MBUS_FMT_SBGGR10_1X10:
                formats++;
                if (xlate) {
-                        xlate->host_fmt = &mx3_camera_formats[0];
+                        xlate->host_fmt = &mx3_camera_formats[0];
-                        xlate->cam_fmt = icd->formats + idx;
+                        xlate->code     = code;
-                        xlate->buswidth = buswidth;
                        xlate++;
-                        dev_dbg(icd->dev.parent,
+                        dev_dbg(dev, "Providing format %s using code %d\n",
-                                "Providing format %s using %s\n",
+                                mx3_camera_formats[0].name, code);
-                                mx3_camera_formats[0].name,
-                                icd->formats[idx].name);
                }
-                goto passthrough;
+                break;
-        case V4L2_PIX_FMT_Y16:
+        case V4L2_MBUS_FMT_Y10_1X10:
                formats++;
                if (xlate) {
-                        xlate->host_fmt = &mx3_camera_formats[1];
+                        xlate->host_fmt = &mx3_camera_formats[1];
-                        xlate->cam_fmt = icd->formats + idx;
+                        xlate->code     = code;
-                        xlate->buswidth = buswidth;
                        xlate++;
-                        dev_dbg(icd->dev.parent,
+                        dev_dbg(dev, "Providing format %s using code %d\n",
-                                "Providing format %s using %s\n",
+                                mx3_camera_formats[1].name, code);
-                                mx3_camera_formats[0].name,
-                                icd->formats[idx].name);
                }
+                break;
        default:
-passthrough:
+                if (!mx3_camera_packing_supported(fmt))
-                /* Generic pass-through */
+                        return 0;
-                formats++;
+        }
-                if (xlate) {
-                        xlate->host_fmt = icd->formats + idx;
+        /* Generic pass-through */
-                        xlate->cam_fmt = icd->formats + idx;
+        formats++;
-                        xlate->buswidth = buswidth;
+        if (xlate) {
-                        xlate++;
+                xlate->host_fmt = fmt;
-                        dev_dbg(icd->dev.parent,
+                xlate->code     = code;
-                                "Providing format %s in pass-through mode\n",
+                xlate++;
-                                icd->formats[idx].name);
+                dev_dbg(dev, "Providing format %x in pass-through mode\n",
-                }
+                        xlate->host_fmt->fourcc);
        }
        return formats;
@@ -804,8 +815,7 @@ static int mx3_camera_set_crop(struct soc_camera_device *icd,
        struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
        struct mx3_camera_dev *mx3_cam = ici->priv;
        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
-        struct v4l2_format f = {.type = V4L2_BUF_TYPE_VIDEO_CAPTURE};
+        struct v4l2_mbus_framefmt mf;
-        struct v4l2_pix_format *pix = &f.fmt.pix;
        int ret;
        soc_camera_limit_side(&rect->left, &rect->width, 0, 2, 4096);
@@ -816,19 +826,19 @@ static int mx3_camera_set_crop(struct soc_camera_device *icd,
                return ret;
        /* The capture device might have changed its output  */
-        ret = v4l2_subdev_call(sd, video, g_fmt, &f);
+        ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mf);
        if (ret < 0)
                return ret;
-        if (pix->width & 7) {
+        if (mf.width & 7) {
                /* Ouch! We can only handle 8-byte aligned width... */
-                stride_align(&pix->width);
+                stride_align(&mf.width);
-                ret = v4l2_subdev_call(sd, video, s_fmt, &f);
+                ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
                if (ret < 0)
                        return ret;
        }
-        if (pix->width != icd->user_width || pix->height != icd->user_height) {
+        if (mf.width != icd->user_width || mf.height != icd->user_height) {
                /*
                 * We now know pixel formats and can decide upon DMA-channel(s)
                 * So far only direct camera-to-memory is supported
@@ -839,14 +849,14 @@ static int mx3_camera_set_crop(struct soc_camera_device *icd,
                                return ret;
                }
-                configure_geometry(mx3_cam, pix->width, pix->height);
+                configure_geometry(mx3_cam, mf.width, mf.height);
        }
        dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n",
-                pix->width, pix->height);
+                mf.width, mf.height);
-        icd->user_width = pix->width;
+        icd->user_width         = mf.width;
-        icd->user_height = pix->height;
+        icd->user_height        = mf.height;
        return ret;
 }
@@ -859,6 +869,7 @@ static int mx3_camera_set_fmt(struct soc_camera_device *icd,
        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
        const struct soc_camera_format_xlate *xlate;
        struct v4l2_pix_format *pix = &f->fmt.pix;
+        struct v4l2_mbus_framefmt mf;
        int ret;
        xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
@@ -883,11 +894,24 @@ static int mx3_camera_set_fmt(struct soc_camera_device *icd,
        configure_geometry(mx3_cam, pix->width, pix->height);
-        ret = v4l2_subdev_call(sd, video, s_fmt, f);
+        mf.width        = pix->width;
-        if (!ret) {
+        mf.height       = pix->height;
-                icd->buswidth = xlate->buswidth;
+        mf.field        = pix->field;
-                icd->current_fmt = xlate->host_fmt;
+        mf.colorspace   = pix->colorspace;
-        }
+        mf.code         = xlate->code;
+        ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
+        if (ret < 0)
+                return ret;
+        if (mf.code != xlate->code)
+                return -EINVAL;
+        pix->width              = mf.width;
+        pix->height             = mf.height;
+        pix->field              = mf.field;
+        pix->colorspace         = mf.colorspace;
+        icd->current_fmt        = xlate;
        dev_dbg(icd->dev.parent, "Sensor set %dx%d\n", pix->width, pix->height);
@@ -900,8 +924,8 @@ static int mx3_camera_try_fmt(struct soc_camera_device *icd,
        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
        const struct soc_camera_format_xlate *xlate;
        struct v4l2_pix_format *pix = &f->fmt.pix;
+        struct v4l2_mbus_framefmt mf;
        __u32 pixfmt = pix->pixelformat;
-        enum v4l2_field field;
        int ret;
        xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
@@ -916,23 +940,37 @@ static int mx3_camera_try_fmt(struct soc_camera_device *icd,
        if (pix->width > 4096)
                pix->width = 4096;
-        pix->bytesperline = pix->width *
+        pix->bytesperline = soc_mbus_bytes_per_line(pix->width,
-                DIV_ROUND_UP(xlate->host_fmt->depth, 8);
+                                                    xlate->host_fmt);
+        if (pix->bytesperline < 0)
+                return pix->bytesperline;
        pix->sizeimage = pix->height * pix->bytesperline;
-        /* camera has to see its format, but the user the original one */
-        pix->pixelformat = xlate->cam_fmt->fourcc;
        /* limit to sensor capabilities */
-        ret = v4l2_subdev_call(sd, video, try_fmt, f);
+        mf.width        = pix->width;
-        pix->pixelformat = xlate->host_fmt->fourcc;
+        mf.height       = pix->height;
+        mf.field        = pix->field;
+        mf.colorspace   = pix->colorspace;
+        mf.code         = xlate->code;
+        ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
+        if (ret < 0)
+                return ret;
-        field = pix->field;
+        pix->width      = mf.width;
+        pix->height     = mf.height;
+        pix->colorspace = mf.colorspace;
-        if (field == V4L2_FIELD_ANY) {
+        switch (mf.field) {
+        case V4L2_FIELD_ANY:
                pix->field = V4L2_FIELD_NONE;
-        } else if (field != V4L2_FIELD_NONE) {
+                break;
-                dev_err(icd->dev.parent, "Field type %d unsupported.\n", field);
+        case V4L2_FIELD_NONE:
-                return -EINVAL;
+                break;
+        default:
+                dev_err(icd->dev.parent, "Field type %d unsupported.\n",
+                        mf.field);
+                ret = -EINVAL;
        }
        return ret;
@@ -968,18 +1006,26 @@ static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
        struct mx3_camera_dev *mx3_cam = ici->priv;
        unsigned long bus_flags, camera_flags, common_flags;
        u32 dw, sens_conf;
-        int ret = test_platform_param(mx3_cam, icd->buswidth, &bus_flags);
+        const struct soc_mbus_pixelfmt *fmt;
+        int buswidth;
+        int ret;
        const struct soc_camera_format_xlate *xlate;
        struct device *dev = icd->dev.parent;
+        fmt = soc_mbus_get_fmtdesc(icd->current_fmt->code);
+        if (!fmt)
+                return -EINVAL;
+        buswidth = fmt->bits_per_sample;
+        ret = test_platform_param(mx3_cam, buswidth, &bus_flags);
        xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
        if (!xlate) {
                dev_warn(dev, "Format %x not found\n", pixfmt);
                return -EINVAL;
        }
-        dev_dbg(dev, "requested bus width %d bit: %d\n",
+        dev_dbg(dev, "requested bus width %d bit: %d\n", buswidth, ret);
-                icd->buswidth, ret);
        if (ret < 0)
                return ret;
@@ -1027,8 +1073,10 @@ static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
                        common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
        }
-        /* Make the camera work in widest common mode, we'll take care of
+        /*
-         * the rest */
+         * Make the camera work in widest common mode, we'll take care of
+         * the rest
+         */
        if (common_flags & SOCAM_DATAWIDTH_15)
                common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
                        SOCAM_DATAWIDTH_15;
@@ -1078,7 +1126,7 @@ static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
                sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
        /* Just do what we're asked to do */
-        switch (xlate->host_fmt->depth) {
+        switch (xlate->host_fmt->bits_per_sample) {
        case 4:
                dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
                break;
@@ -1152,8 +1200,10 @@ static int __devinit mx3_camera_probe(struct platform_device *pdev)
        if (!(mx3_cam->platform_flags & (MX3_CAMERA_DATAWIDTH_4 |
                        MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10 |
                        MX3_CAMERA_DATAWIDTH_15))) {
-                /* Platform hasn't set available data widths. This is bad.
+                /*
-                 * Warn and use a default. */
+                 * Platform hasn't set available data widths. This is bad.
+                 * Warn and use a default.
+                 */
                dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
                         "data widths, using default 8 bit\n");
                mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
diff --git a/drivers/media/video/omap24xxcam.c b/drivers/media/video/omap24xxcam.c
index 5fc4ac0d88f0..7400eacb4d64 100644
--- a/drivers/media/video/omap24xxcam.c
+++ b/drivers/media/video/omap24xxcam.c
@@ -1450,12 +1450,11 @@ static int omap24xxcam_mmap(struct file *file, struct vm_area_struct *vma)
 static int omap24xxcam_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
        struct omap24xxcam_device *cam = omap24xxcam.priv;
        struct omap24xxcam_fh *fh;
        struct v4l2_format format;
-        if (!cam || !cam->vfd || (cam->vfd->minor != minor))
+        if (!cam || !cam->vfd)
                return -ENODEV;
        fh = kzalloc(sizeof(*fh), GFP_KERNEL);
@@ -1660,7 +1659,6 @@ static int omap24xxcam_device_register(struct v4l2_int_device *s)
        strlcpy(vfd->name, CAM_NAME, sizeof(vfd->name));
        vfd->fops                = &omap24xxcam_fops;
-        vfd->minor               = -1;
        vfd->ioctl_ops           = &omap24xxcam_ioctl_fops;
        omap24xxcam_hwinit(cam);
@@ -1671,14 +1669,14 @@ static int omap24xxcam_device_register(struct v4l2_int_device *s)
        if (video_register_device(vfd, VFL_TYPE_GRABBER, video_nr) < 0) {
                dev_err(cam->dev, "could not register V4L device\n");
-                vfd->minor = -1;
                rval = -EBUSY;
                goto err;
        }
        omap24xxcam_poweron_reset(cam);
-        dev_info(cam->dev, "registered device video%d\n", vfd->minor);
+        dev_info(cam->dev, "registered device %s\n",
+                 video_device_node_name(vfd));
        return 0;
@@ -1695,7 +1693,7 @@ static void omap24xxcam_device_unregister(struct v4l2_int_device *s)
        omap24xxcam_sensor_exit(cam);
        if (cam->vfd) {
-                if (cam->vfd->minor == -1) {
+                if (!video_is_registered(cam->vfd)) {
                        /*
                         * The device was never registered, so release the
                         * video_device struct directly.
diff --git a/drivers/media/video/ov511.c b/drivers/media/video/ov511.c
index 0bc2cf573c76..e0bce8dc74bf 100644
--- a/drivers/media/video/ov511.c
+++ b/drivers/media/video/ov511.c
@@ -4674,7 +4674,6 @@ static struct video_device vdev_template = {
        .name =         "OV511 USB Camera",
        .fops =         &ov511_fops,
        .release =      video_device_release,
-        .minor =        -1,
 };
 /****************************************************************************
@@ -5867,8 +5866,8 @@ ov51x_probe(struct usb_interface *intf, const struct usb_device_id *id)
        ov511_devused |= 1 << nr;
        ov->nr = nr;
-        dev_info(&intf->dev, "Device at %s registered to minor %d\n",
+        dev_info(&intf->dev, "Device at %s registered to %s\n",
-                 ov->usb_path, ov->vdev->minor);
+                 ov->usb_path, video_device_node_name(ov->vdev));
        usb_set_intfdata(intf, ov);
        if (ov_create_sysfs(ov->vdev)) {
@@ -5878,13 +5877,13 @@ ov51x_probe(struct usb_interface *intf, const struct usb_device_id *id)
                goto error;
        }
-        mutex_lock(&ov->lock);
+        mutex_unlock(&ov->lock);
        return 0;
 error:
        if (ov->vdev) {
-                if (-1 == ov->vdev->minor)
+                if (!video_is_registered(ov->vdev))
                        video_device_release(ov->vdev);
                else
                        video_unregister_device(ov->vdev);
diff --git a/drivers/media/video/ov772x.c b/drivers/media/video/ov772x.c
index 205229333466..3a45e945a528 100644
--- a/drivers/media/video/ov772x.c
+++ b/drivers/media/video/ov772x.c
@@ -24,6 +24,7 @@
 #include <media/v4l2-chip-ident.h>
 #include <media/v4l2-subdev.h>
 #include <media/soc_camera.h>
+#include <media/soc_mediabus.h>
 #include <media/ov772x.h>
 /*
@@ -382,7 +383,8 @@ struct regval_list {
 };
 struct ov772x_color_format {
-        const struct soc_camera_data_format *format;
+        enum v4l2_mbus_pixelcode code;
+        enum v4l2_colorspace colorspace;
        u8 dsp3;
        u8 com3;
        u8 com7;
@@ -399,7 +401,7 @@ struct ov772x_win_size {
 struct ov772x_priv {
        struct v4l2_subdev                subdev;
        struct ov772x_camera_info        *info;
-        const struct ov772x_color_format *fmt;
+        const struct ov772x_color_format *cfmt;
        const struct ov772x_win_size     *win;
        int                               model;
        unsigned short                    flag_vflip:1;
@@ -434,93 +436,57 @@ static const struct regval_list ov772x_vga_regs[] = {
 };
 /*
- * supported format list
+ * supported color format list
- */
-#define SETFOURCC(type) .name = (#type), .fourcc = (V4L2_PIX_FMT_ ## type)
-static const struct soc_camera_data_format ov772x_fmt_lists[] = {
-        {
-                SETFOURCC(YUYV),
-                .depth      = 16,
-                .colorspace = V4L2_COLORSPACE_JPEG,
-        },
-        {
-                SETFOURCC(YVYU),
-                .depth      = 16,
-                .colorspace = V4L2_COLORSPACE_JPEG,
-        },
-        {
-                SETFOURCC(UYVY),
-                .depth      = 16,
-                .colorspace = V4L2_COLORSPACE_JPEG,
-        },
-        {
-                SETFOURCC(RGB555),
-                .depth      = 16,
-                .colorspace = V4L2_COLORSPACE_SRGB,
-        },
-        {
-                SETFOURCC(RGB555X),
-                .depth      = 16,
-                .colorspace = V4L2_COLORSPACE_SRGB,
-        },
-        {
-                SETFOURCC(RGB565),
-                .depth      = 16,
-                .colorspace = V4L2_COLORSPACE_SRGB,
-        },
-        {
-                SETFOURCC(RGB565X),
-                .depth      = 16,
-                .colorspace = V4L2_COLORSPACE_SRGB,
-        },
-};
-/*
- * color format list
 */
 static const struct ov772x_color_format ov772x_cfmts[] = {
        {
-                .format = &ov772x_fmt_lists[0],
+                .code           = V4L2_MBUS_FMT_YUYV8_2X8_LE,
-                .dsp3   = 0x0,
+                .colorspace     = V4L2_COLORSPACE_JPEG,
-                .com3   = SWAP_YUV,
+                .dsp3           = 0x0,
-                .com7   = OFMT_YUV,
+                .com3           = SWAP_YUV,
+                .com7           = OFMT_YUV,
        },
        {
-                .format = &ov772x_fmt_lists[1],
+                .code           = V4L2_MBUS_FMT_YVYU8_2X8_LE,
-                .dsp3   = UV_ON,
+                .colorspace     = V4L2_COLORSPACE_JPEG,
-                .com3   = SWAP_YUV,
+                .dsp3           = UV_ON,
-                .com7   = OFMT_YUV,
+                .com3           = SWAP_YUV,
+                .com7           = OFMT_YUV,
        },
        {
-                .format = &ov772x_fmt_lists[2],
+                .code           = V4L2_MBUS_FMT_YUYV8_2X8_BE,
-                .dsp3   = 0x0,
+                .colorspace     = V4L2_COLORSPACE_JPEG,
-                .com3   = 0x0,
+                .dsp3           = 0x0,
-                .com7   = OFMT_YUV,
+                .com3           = 0x0,
+                .com7           = OFMT_YUV,
        },
        {
-                .format = &ov772x_fmt_lists[3],
+                .code           = V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE,
-                .dsp3   = 0x0,
+                .colorspace     = V4L2_COLORSPACE_SRGB,
-                .com3   = SWAP_RGB,
+                .dsp3           = 0x0,
-                .com7   = FMT_RGB555 | OFMT_RGB,
+                .com3           = SWAP_RGB,
+                .com7           = FMT_RGB555 | OFMT_RGB,
        },
        {
-                .format = &ov772x_fmt_lists[4],
+                .code           = V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE,
-                .dsp3   = 0x0,
+                .colorspace     = V4L2_COLORSPACE_SRGB,
-                .com3   = 0x0,
+                .dsp3           = 0x0,
-                .com7   = FMT_RGB555 | OFMT_RGB,
+                .com3           = 0x0,
+                .com7           = FMT_RGB555 | OFMT_RGB,
        },
        {
-                .format = &ov772x_fmt_lists[5],
+                .code           = V4L2_MBUS_FMT_RGB565_2X8_LE,
-                .dsp3   = 0x0,
+                .colorspace     = V4L2_COLORSPACE_SRGB,
-                .com3   = SWAP_RGB,
+                .dsp3           = 0x0,
-                .com7   = FMT_RGB565 | OFMT_RGB,
+                .com3           = SWAP_RGB,
+                .com7           = FMT_RGB565 | OFMT_RGB,
        },
        {
-                .format = &ov772x_fmt_lists[6],
+                .code           = V4L2_MBUS_FMT_RGB565_2X8_BE,
-                .dsp3   = 0x0,
+                .colorspace     = V4L2_COLORSPACE_SRGB,
-                .com3   = 0x0,
+                .dsp3           = 0x0,
-                .com7   = FMT_RGB565 | OFMT_RGB,
+                .com3           = 0x0,
+                .com7           = FMT_RGB565 | OFMT_RGB,
        },
 };
@@ -642,15 +608,15 @@ static int ov772x_s_stream(struct v4l2_subdev *sd, int enable)
                return 0;
        }
-        if (!priv->win || !priv->fmt) {
+        if (!priv->win || !priv->cfmt) {
                dev_err(&client->dev, "norm or win select error\n");
                return -EPERM;
        }
        ov772x_mask_set(client, COM2, SOFT_SLEEP_MODE, 0);
-        dev_dbg(&client->dev, "format %s, win %s\n",
+        dev_dbg(&client->dev, "format %d, win %s\n",
-                priv->fmt->format->name, priv->win->name);
+                priv->cfmt->code, priv->win->name);
        return 0;
 }
@@ -806,8 +772,8 @@ static const struct ov772x_win_size *ov772x_select_win(u32 width, u32 height)
        return win;
 }
-static int ov772x_set_params(struct i2c_client *client,
+static int ov772x_set_params(struct i2c_client *client, u32 *width, u32 *height,
-                             u32 *width, u32 *height, u32 pixfmt)
+                             enum v4l2_mbus_pixelcode code)
 {
        struct ov772x_priv *priv = to_ov772x(client);
        int ret = -EINVAL;
@@ -817,14 +783,14 @@ static int ov772x_set_params(struct i2c_client *client,
        /*
         * select format
         */
-        priv->fmt = NULL;
+        priv->cfmt = NULL;
        for (i = 0; i < ARRAY_SIZE(ov772x_cfmts); i++) {
-                if (pixfmt == ov772x_cfmts[i].format->fourcc) {
+                if (code == ov772x_cfmts[i].code) {
-                        priv->fmt = ov772x_cfmts + i;
+                        priv->cfmt = ov772x_cfmts + i;
                        break;
                }
        }
-        if (!priv->fmt)
+        if (!priv->cfmt)
                goto ov772x_set_fmt_error;
        /*
@@ -894,7 +860,7 @@ static int ov772x_set_params(struct i2c_client *client,
        /*
         * set DSP_CTRL3
         */
-        val = priv->fmt->dsp3;
+        val = priv->cfmt->dsp3;
        if (val) {
                ret = ov772x_mask_set(client,
                                      DSP_CTRL3, UV_MASK, val);
@@ -905,7 +871,7 @@ static int ov772x_set_params(struct i2c_client *client,
        /*
         * set COM3
         */
-        val = priv->fmt->com3;
+        val = priv->cfmt->com3;
        if (priv->info->flags & OV772X_FLAG_VFLIP)
                val |= VFLIP_IMG;
        if (priv->info->flags & OV772X_FLAG_HFLIP)
@@ -923,9 +889,9 @@ static int ov772x_set_params(struct i2c_client *client,
        /*
         * set COM7
         */
-        val = priv->win->com7_bit | priv->fmt->com7;
+        val = priv->win->com7_bit | priv->cfmt->com7;
        ret = ov772x_mask_set(client,
-                              COM7, (SLCT_MASK | FMT_MASK | OFMT_MASK),
+                              COM7, SLCT_MASK | FMT_MASK | OFMT_MASK,
                              val);
        if (ret < 0)
                goto ov772x_set_fmt_error;
@@ -951,7 +917,7 @@ ov772x_set_fmt_error:
        ov772x_reset(client);
        priv->win = NULL;
-        priv->fmt = NULL;
+        priv->cfmt = NULL;
        return ret;
 }
@@ -981,54 +947,79 @@ static int ov772x_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
        return 0;
 }
-static int ov772x_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int ov772x_g_fmt(struct v4l2_subdev *sd,
+                        struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
        struct ov772x_priv *priv = to_ov772x(client);
-        struct v4l2_pix_format *pix = &f->fmt.pix;
-        if (!priv->win || !priv->fmt) {
+        if (!priv->win || !priv->cfmt) {
                u32 width = VGA_WIDTH, height = VGA_HEIGHT;
                int ret = ov772x_set_params(client, &width, &height,
-                                            V4L2_PIX_FMT_YUYV);
+                                            V4L2_MBUS_FMT_YUYV8_2X8_LE);
                if (ret < 0)
                        return ret;
        }
-        f->type                 = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+        mf->width       = priv->win->width;
+        mf->height      = priv->win->height;
-        pix->width              = priv->win->width;
+        mf->code        = priv->cfmt->code;
-        pix->height             = priv->win->height;
+        mf->colorspace  = priv->cfmt->colorspace;
-        pix->pixelformat        = priv->fmt->format->fourcc;
+        mf->field       = V4L2_FIELD_NONE;
-        pix->colorspace         = priv->fmt->format->colorspace;
-        pix->field              = V4L2_FIELD_NONE;
        return 0;
 }
-static int ov772x_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int ov772x_s_fmt(struct v4l2_subdev *sd,
+                        struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
-        struct v4l2_pix_format *pix = &f->fmt.pix;
+        struct ov772x_priv *priv = to_ov772x(client);
+        int ret = ov772x_set_params(client, &mf->width, &mf->height,
+                                    mf->code);
+        if (!ret)
+                mf->colorspace = priv->cfmt->colorspace;
-        return ov772x_set_params(client, &pix->width, &pix->height,
+        return ret;
-                                 pix->pixelformat);
 }
 static int ov772x_try_fmt(struct v4l2_subdev *sd,
-                          struct v4l2_format *f)
+                          struct v4l2_mbus_framefmt *mf)
 {
-        struct v4l2_pix_format *pix = &f->fmt.pix;
+        struct i2c_client *client = sd->priv;
+        struct ov772x_priv *priv = to_ov772x(client);
        const struct ov772x_win_size *win;
+        int i;
        /*
         * select suitable win
         */
-        win = ov772x_select_win(pix->width, pix->height);
+        win = ov772x_select_win(mf->width, mf->height);
+        mf->width       = win->width;
+        mf->height      = win->height;
+        mf->field       = V4L2_FIELD_NONE;
-        pix->width  = win->width;
+        for (i = 0; i < ARRAY_SIZE(ov772x_cfmts); i++)
-        pix->height = win->height;
+                if (mf->code == ov772x_cfmts[i].code)
-        pix->field  = V4L2_FIELD_NONE;
+                        break;
+        if (i == ARRAY_SIZE(ov772x_cfmts)) {
+                /* Unsupported format requested. Propose either */
+                if (priv->cfmt) {
+                        /* the current one or */
+                        mf->colorspace = priv->cfmt->colorspace;
+                        mf->code = priv->cfmt->code;
+                } else {
+                        /* the default one */
+                        mf->colorspace = ov772x_cfmts[0].colorspace;
+                        mf->code = ov772x_cfmts[0].code;
+                }
+        } else {
+                /* Also return the colorspace */
+                mf->colorspace  = ov772x_cfmts[i].colorspace;
+        }
        return 0;
 }
@@ -1057,9 +1048,6 @@ static int ov772x_video_probe(struct soc_camera_device *icd,
                return -ENODEV;
        }
-        icd->formats     = ov772x_fmt_lists;
-        icd->num_formats = ARRAY_SIZE(ov772x_fmt_lists);
        /*
         * check and show product ID and manufacturer ID
         */
@@ -1109,13 +1097,24 @@ static struct v4l2_subdev_core_ops ov772x_subdev_core_ops = {
 #endif
 };
+static int ov772x_enum_fmt(struct v4l2_subdev *sd, int index,
+                           enum v4l2_mbus_pixelcode *code)
+{
+        if ((unsigned int)index >= ARRAY_SIZE(ov772x_cfmts))
+                return -EINVAL;
+        *code = ov772x_cfmts[index].code;
+        return 0;
+}
 static struct v4l2_subdev_video_ops ov772x_subdev_video_ops = {
        .s_stream       = ov772x_s_stream,
-        .g_fmt          = ov772x_g_fmt,
+        .g_mbus_fmt     = ov772x_g_fmt,
-        .s_fmt          = ov772x_s_fmt,
+        .s_mbus_fmt     = ov772x_s_fmt,
-        .try_fmt        = ov772x_try_fmt,
+        .try_mbus_fmt   = ov772x_try_fmt,
        .cropcap        = ov772x_cropcap,
        .g_crop         = ov772x_g_crop,
+        .enum_mbus_fmt  = ov772x_enum_fmt,
 };
 static struct v4l2_subdev_ops ov772x_subdev_ops = {
@@ -1143,10 +1142,10 @@ static int ov772x_probe(struct i2c_client *client,
        }
        icl = to_soc_camera_link(icd);
-        if (!icl)
+        if (!icl || !icl->priv)
                return -EINVAL;
-        info = container_of(icl, struct ov772x_camera_info, link);
+        info = icl->priv;
        if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
                dev_err(&adapter->dev,
diff --git a/drivers/media/video/ov9640.c b/drivers/media/video/ov9640.c
index c81ae2192887..47bf60ceb7a2 100644
--- a/drivers/media/video/ov9640.c
+++ b/drivers/media/video/ov9640.c
@@ -154,19 +154,10 @@ static const struct ov9640_reg ov9640_regs_rgb[] = {
        { OV9640_MTXS,  0x65 },
 };
-/*
+static enum v4l2_mbus_pixelcode ov9640_codes[] = {
- * TODO: this sensor also supports RGB555 and RGB565 formats, but support for
+        V4L2_MBUS_FMT_YUYV8_2X8_BE,
- * them has not yet been sufficiently tested and so it is not included with
+        V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE,
- * this version of the driver. To test and debug these formats add two entries
+        V4L2_MBUS_FMT_RGB565_2X8_LE,
- * to the below array, see ov722x.c for an example.
- */
-static const struct soc_camera_data_format ov9640_fmt_lists[] = {
-        {
-                .name           = "UYVY",
-                .fourcc         = V4L2_PIX_FMT_UYVY,
-                .depth          = 16,
-                .colorspace     = V4L2_COLORSPACE_JPEG,
-        },
 };
 static const struct v4l2_queryctrl ov9640_controls[] = {
@@ -434,20 +425,22 @@ static void ov9640_res_roundup(u32 *width, u32 *height)
 }
 /* Prepare necessary register changes depending on color encoding */
-static void ov9640_alter_regs(u32 pixfmt, struct ov9640_reg_alt *alt)
+static void ov9640_alter_regs(enum v4l2_mbus_pixelcode code,
+                              struct ov9640_reg_alt *alt)
 {
-        switch (pixfmt) {
+        switch (code) {
-        case V4L2_PIX_FMT_UYVY:
+        default:
+        case V4L2_MBUS_FMT_YUYV8_2X8_BE:
                alt->com12      = OV9640_COM12_YUV_AVG;
                alt->com13      = OV9640_COM13_Y_DELAY_EN |
                                        OV9640_COM13_YUV_DLY(0x01);
                break;
-        case V4L2_PIX_FMT_RGB555:
+        case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
                alt->com7       = OV9640_COM7_RGB;
                alt->com13      = OV9640_COM13_RGB_AVG;
                alt->com15      = OV9640_COM15_RGB_555;
                break;
-        case V4L2_PIX_FMT_RGB565:
+        case V4L2_MBUS_FMT_RGB565_2X8_LE:
                alt->com7       = OV9640_COM7_RGB;
                alt->com13      = OV9640_COM13_RGB_AVG;
                alt->com15      = OV9640_COM15_RGB_565;
@@ -456,8 +449,8 @@ static void ov9640_alter_regs(u32 pixfmt, struct ov9640_reg_alt *alt)
 }
 /* Setup registers according to resolution and color encoding */
-static int ov9640_write_regs(struct i2c_client *client,
+static int ov9640_write_regs(struct i2c_client *client, u32 width,
-                u32 width, u32 pixfmt, struct ov9640_reg_alt *alts)
+                enum v4l2_mbus_pixelcode code, struct ov9640_reg_alt *alts)
 {
        const struct ov9640_reg *ov9640_regs, *matrix_regs;
        int                     ov9640_regs_len, matrix_regs_len;
@@ -500,7 +493,7 @@ static int ov9640_write_regs(struct i2c_client *client,
        }
        /* select color matrix configuration for given color encoding */
-        if (pixfmt == V4L2_PIX_FMT_UYVY) {
+        if (code == V4L2_MBUS_FMT_YUYV8_2X8_BE) {
                matrix_regs     = ov9640_regs_yuv;
                matrix_regs_len = ARRAY_SIZE(ov9640_regs_yuv);
        } else {
@@ -562,15 +555,17 @@ static int ov9640_prog_dflt(struct i2c_client *client)
 }
 /* set the format we will capture in */
-static int ov9640_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int ov9640_s_fmt(struct v4l2_subdev *sd,
+                        struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
-        struct v4l2_pix_format *pix = &f->fmt.pix;
        struct ov9640_reg_alt alts = {0};
+        enum v4l2_colorspace cspace;
+        enum v4l2_mbus_pixelcode code = mf->code;
        int ret;
-        ov9640_res_roundup(&pix->width, &pix->height);
+        ov9640_res_roundup(&mf->width, &mf->height);
-        ov9640_alter_regs(pix->pixelformat, &alts);
+        ov9640_alter_regs(mf->code, &alts);
        ov9640_reset(client);
@@ -578,19 +573,57 @@ static int ov9640_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
        if (ret)
                return ret;
-        return ov9640_write_regs(client, pix->width, pix->pixelformat, &alts);
+        switch (code) {
+        case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
+        case V4L2_MBUS_FMT_RGB565_2X8_LE:
+                cspace = V4L2_COLORSPACE_SRGB;
+                break;
+        default:
+                code = V4L2_MBUS_FMT_YUYV8_2X8_BE;
+        case V4L2_MBUS_FMT_YUYV8_2X8_BE:
+                cspace = V4L2_COLORSPACE_JPEG;
+        }
+        ret = ov9640_write_regs(client, mf->width, code, &alts);
+        if (!ret) {
+                mf->code        = code;
+                mf->colorspace  = cspace;
+        }
+        return ret;
 }
-static int ov9640_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int ov9640_try_fmt(struct v4l2_subdev *sd,
+                          struct v4l2_mbus_framefmt *mf)
 {
-        struct v4l2_pix_format *pix = &f->fmt.pix;
+        ov9640_res_roundup(&mf->width, &mf->height);
-        ov9640_res_roundup(&pix->width, &pix->height);
+        mf->field = V4L2_FIELD_NONE;
-        pix->field  = V4L2_FIELD_NONE;
+        switch (mf->code) {
+        case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
+        case V4L2_MBUS_FMT_RGB565_2X8_LE:
+                mf->colorspace = V4L2_COLORSPACE_SRGB;
+                break;
+        default:
+                mf->code = V4L2_MBUS_FMT_YUYV8_2X8_BE;
+        case V4L2_MBUS_FMT_YUYV8_2X8_BE:
+                mf->colorspace = V4L2_COLORSPACE_JPEG;
+        }
        return 0;
 }
+static int ov9640_enum_fmt(struct v4l2_subdev *sd, int index,
+                           enum v4l2_mbus_pixelcode *code)
+{
+        if ((unsigned int)index >= ARRAY_SIZE(ov9640_codes))
+                return -EINVAL;
+        *code = ov9640_codes[index];
+        return 0;
+}
 static int ov9640_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
 {
        a->c.left       = 0;
@@ -637,9 +670,6 @@ static int ov9640_video_probe(struct soc_camera_device *icd,
                goto err;
        }
-        icd->formats            = ov9640_fmt_lists;
-        icd->num_formats        = ARRAY_SIZE(ov9640_fmt_lists);
        /*
         * check and show product ID and manufacturer ID
         */
@@ -702,11 +732,12 @@ static struct v4l2_subdev_core_ops ov9640_core_ops = {
 };
 static struct v4l2_subdev_video_ops ov9640_video_ops = {
-        .s_stream               = ov9640_s_stream,
+        .s_stream       = ov9640_s_stream,
-        .s_fmt                  = ov9640_s_fmt,
+        .s_mbus_fmt     = ov9640_s_fmt,
-        .try_fmt                = ov9640_try_fmt,
+        .try_mbus_fmt   = ov9640_try_fmt,
-        .cropcap                = ov9640_cropcap,
+        .enum_mbus_fmt  = ov9640_enum_fmt,
-        .g_crop                 = ov9640_g_crop,
+        .cropcap        = ov9640_cropcap,
+        .g_crop         = ov9640_g_crop,
 };
diff --git a/drivers/media/video/pms.c b/drivers/media/video/pms.c
index 73ec970ca5ca..11a2c26399b5 100644
--- a/drivers/media/video/pms.c
+++ b/drivers/media/video/pms.c
@@ -31,7 +31,7 @@
 #include <linux/init.h>
 #include <linux/version.h>
 #include <linux/mutex.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
 #include <asm/io.h>
 #include <linux/videodev2.h>
diff --git a/drivers/media/video/pvrusb2/pvrusb2-v4l2.c b/drivers/media/video/pvrusb2/pvrusb2-v4l2.c
index 6aa48e0ae731..cc8ddb2d2382 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-v4l2.c
+++ b/drivers/media/video/pvrusb2/pvrusb2-v4l2.c
@@ -151,17 +151,6 @@ static struct v4l2_format pvr_format [] = {
 };
-static const char *get_v4l_name(int v4l_type)
-{
-        switch (v4l_type) {
-        case VFL_TYPE_GRABBER: return "video";
-        case VFL_TYPE_RADIO: return "radio";
-        case VFL_TYPE_VBI: return "vbi";
-        default: return "?";
-        }
-}
 /*
 * pvr_ioctl()
 *
@@ -891,10 +880,8 @@ static long pvr2_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)
 static void pvr2_v4l2_dev_destroy(struct pvr2_v4l2_dev *dip)
 {
-        int num = dip->devbase.num;
        struct pvr2_hdw *hdw = dip->v4lp->channel.mc_head->hdw;
        enum pvr2_config cfg = dip->config;
-        int v4l_type = dip->v4l_type;
        pvr2_hdw_v4l_store_minor_number(hdw,dip->minor_type,-1);
@@ -906,8 +893,8 @@ static void pvr2_v4l2_dev_destroy(struct pvr2_v4l2_dev *dip)
           are gone. */
        video_unregister_device(&dip->devbase);
-        printk(KERN_INFO "pvrusb2: unregistered device %s%u [%s]\n",
+        printk(KERN_INFO "pvrusb2: unregistered device %s [%s]\n",
-               get_v4l_name(v4l_type), num,
+               video_device_node_name(&dip->devbase),
               pvr2_config_get_name(cfg));
 }
@@ -1317,8 +1304,8 @@ static void pvr2_v4l2_dev_init(struct pvr2_v4l2_dev *dip,
                        ": Failed to register pvrusb2 v4l device\n");
        }
-        printk(KERN_INFO "pvrusb2: registered device %s%u [%s]\n",
+        printk(KERN_INFO "pvrusb2: registered device %s [%s]\n",
-               get_v4l_name(dip->v4l_type), dip->devbase.num,
+               video_device_node_name(&dip->devbase),
               pvr2_config_get_name(dip->config));
        pvr2_hdw_v4l_store_minor_number(vp->channel.mc_head->hdw,
diff --git a/drivers/media/video/pwc/pwc-if.c b/drivers/media/video/pwc/pwc-if.c
index 89b620f6db7b..aea7e224cef6 100644
--- a/drivers/media/video/pwc/pwc-if.c
+++ b/drivers/media/video/pwc/pwc-if.c
@@ -169,7 +169,6 @@ static struct video_device pwc_template = {
        .name =         "Philips Webcam",       /* Filled in later */
        .release =      video_device_release,
        .fops =         &pwc_fops,
-        .minor =        -1,
 };
 /***************************************************************************/
@@ -1807,7 +1806,7 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id
                goto err_video_release;
        }
-        PWC_INFO("Registered as /dev/video%d.\n", pdev->vdev->num);
+        PWC_INFO("Registered as %s.\n", video_device_node_name(pdev->vdev));
        /* occupy slot */
        if (hint < MAX_DEV_HINTS)
@@ -1948,7 +1947,9 @@ MODULE_PARM_DESC(size, "Initial image size. One of sqcif, qsif, qcif, sif, cif,
 MODULE_PARM_DESC(fps, "Initial frames per second. Varies with model, useful range 5-30");
 MODULE_PARM_DESC(fbufs, "Number of internal frame buffers to reserve");
 MODULE_PARM_DESC(mbufs, "Number of external (mmap()ed) image buffers");
+#ifdef CONFIG_USB_PWC_DEBUG
 MODULE_PARM_DESC(trace, "For debugging purposes");
+#endif
 MODULE_PARM_DESC(power_save, "Turn power save feature in camera on or off");
 MODULE_PARM_DESC(compression, "Preferred compression quality. Range 0 (uncompressed) to 3 (high compression)");
 MODULE_PARM_DESC(leds, "LED on,off time in milliseconds");
diff --git a/drivers/media/video/pxa_camera.c b/drivers/media/video/pxa_camera.c
index 51b683c63b70..294f860ce2b0 100644
--- a/drivers/media/video/pxa_camera.c
+++ b/drivers/media/video/pxa_camera.c
@@ -32,6 +32,7 @@
 #include <media/v4l2-dev.h>
 #include <media/videobuf-dma-sg.h>
 #include <media/soc_camera.h>
+#include <media/soc_mediabus.h>
 #include <linux/videodev2.h>
@@ -183,23 +184,21 @@ struct pxa_cam_dma {
 /* buffer for one video frame */
 struct pxa_buffer {
        /* common v4l buffer stuff -- must be first */
-        struct videobuf_buffer vb;
+        struct videobuf_buffer          vb;
+        enum v4l2_mbus_pixelcode        code;
-        const struct soc_camera_data_format        *fmt;
        /* our descriptor lists for Y, U and V channels */
-        struct pxa_cam_dma dmas[3];
+        struct pxa_cam_dma              dmas[3];
+        int                             inwork;
-        int                     inwork;
+        enum pxa_camera_active_dma      active_dma;
-        enum pxa_camera_active_dma active_dma;
 };
 struct pxa_camera_dev {
        struct soc_camera_host  soc_host;
-        /* PXA27x is only supposed to handle one camera on its Quick Capture
+        /*
+         * PXA27x is only supposed to handle one camera on its Quick Capture
         * interface. If anyone ever builds hardware to enable more than
-         * one camera, they will have to modify this driver too */
+         * one camera, they will have to modify this driver too
+         */
        struct soc_camera_device *icd;
        struct clk              *clk;
@@ -241,11 +240,15 @@ static int pxa_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
                              unsigned int *size)
 {
        struct soc_camera_device *icd = vq->priv_data;
+        int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
+                                                icd->current_fmt->host_fmt);
+        if (bytes_per_line < 0)
+                return bytes_per_line;
        dev_dbg(icd->dev.parent, "count=%d, size=%d\n", *count, *size);
-        *size = roundup(icd->user_width * icd->user_height *
+        *size = bytes_per_line * icd->user_height;
-                        ((icd->current_fmt->depth + 7) >> 3), 8);
        if (0 == *count)
                *count = 32;
@@ -267,8 +270,10 @@ static void free_buffer(struct videobuf_queue *vq, struct pxa_buffer *buf)
        dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
                &buf->vb, buf->vb.baddr, buf->vb.bsize);
-        /* This waits until this buffer is out of danger, i.e., until it is no
+        /*
-         * longer in STATE_QUEUED or STATE_ACTIVE */
+         * This waits until this buffer is out of danger, i.e., until it is no
+         * longer in STATE_QUEUED or STATE_ACTIVE
+         */
        videobuf_waiton(&buf->vb, 0, 0);
        videobuf_dma_unmap(vq, dma);
        videobuf_dma_free(dma);
@@ -429,6 +434,11 @@ static int pxa_videobuf_prepare(struct videobuf_queue *vq,
        struct pxa_buffer *buf = container_of(vb, struct pxa_buffer, vb);
        int ret;
        int size_y, size_u = 0, size_v = 0;
+        int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
+                                                icd->current_fmt->host_fmt);
+        if (bytes_per_line < 0)
+                return bytes_per_line;
        dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
                vb, vb->baddr, vb->bsize);
@@ -437,29 +447,33 @@ static int pxa_videobuf_prepare(struct videobuf_queue *vq,
        WARN_ON(!list_empty(&vb->queue));
 #ifdef DEBUG
-        /* This can be useful if you want to see if we actually fill
+        /*
-         * the buffer with something */
+         * This can be useful if you want to see if we actually fill
+         * the buffer with something
+         */
        memset((void *)vb->baddr, 0xaa, vb->bsize);
 #endif
        BUG_ON(NULL == icd->current_fmt);
-        /* I think, in buf_prepare you only have to protect global data,
+        /*
-         * the actual buffer is yours */
+         * I think, in buf_prepare you only have to protect global data,
+         * the actual buffer is yours
+         */
        buf->inwork = 1;
-        if (buf->fmt    != icd->current_fmt ||
+        if (buf->code   != icd->current_fmt->code ||
            vb->width   != icd->user_width ||
            vb->height  != icd->user_height ||
            vb->field   != field) {
-                buf->fmt        = icd->current_fmt;
+                buf->code       = icd->current_fmt->code;
                vb->width       = icd->user_width;
                vb->height      = icd->user_height;
                vb->field       = field;
                vb->state       = VIDEOBUF_NEEDS_INIT;
        }
-        vb->size = vb->width * vb->height * ((buf->fmt->depth + 7) >> 3);
+        vb->size = bytes_per_line * vb->height;
        if (0 != vb->baddr && vb->bsize < vb->size) {
                ret = -EINVAL;
                goto out;
@@ -834,8 +848,10 @@ static void pxa_camera_init_videobuf(struct videobuf_queue *q,
        struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
        struct pxa_camera_dev *pcdev = ici->priv;
-        /* We must pass NULL as dev pointer, then all pci_* dma operations
+        /*
-         * transform to normal dma_* ones. */
+         * We must pass NULL as dev pointer, then all pci_* dma operations
+         * transform to normal dma_* ones.
+         */
        videobuf_queue_sg_init(q, &pxa_videobuf_ops, NULL, &pcdev->lock,
                                V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_NONE,
                                sizeof(struct pxa_buffer), icd);
@@ -1051,11 +1067,18 @@ static void pxa_camera_setup_cicr(struct soc_camera_device *icd,
 {
        struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
        struct pxa_camera_dev *pcdev = ici->priv;
+        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
        unsigned long dw, bpp;
-        u32 cicr0, cicr1, cicr2, cicr3, cicr4 = 0;
+        u32 cicr0, cicr1, cicr2, cicr3, cicr4 = 0, y_skip_top;
+        int ret = v4l2_subdev_call(sd, sensor, g_skip_top_lines, &y_skip_top);
+        if (ret < 0)
+                y_skip_top = 0;
-        /* Datawidth is now guaranteed to be equal to one of the three values.
+        /*
-         * We fix bit-per-pixel equal to data-width... */
+         * Datawidth is now guaranteed to be equal to one of the three values.
+         * We fix bit-per-pixel equal to data-width...
+         */
        switch (flags & SOCAM_DATAWIDTH_MASK) {
        case SOCAM_DATAWIDTH_10:
                dw = 4;
@@ -1066,8 +1089,10 @@ static void pxa_camera_setup_cicr(struct soc_camera_device *icd,
                bpp = 0x20;
                break;
        default:
-                /* Actually it can only be 8 now,
+                /*
-                 * default is just to silence compiler warnings */
+                 * Actually it can only be 8 now,
+                 * default is just to silence compiler warnings
+                 */
        case SOCAM_DATAWIDTH_8:
                dw = 2;
                bpp = 0;
@@ -1118,7 +1143,7 @@ static void pxa_camera_setup_cicr(struct soc_camera_device *icd,
        cicr2 = 0;
        cicr3 = CICR3_LPF_VAL(icd->user_height - 1) |
-                CICR3_BFW_VAL(min((unsigned short)255, icd->y_skip_top));
+                CICR3_BFW_VAL(min((u32)255, y_skip_top));
        cicr4 |= pcdev->mclk_divisor;
        __raw_writel(cicr1, pcdev->base + CICR1);
@@ -1138,9 +1163,15 @@ static int pxa_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
        struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
        struct pxa_camera_dev *pcdev = ici->priv;
        unsigned long bus_flags, camera_flags, common_flags;
-        int ret = test_platform_param(pcdev, icd->buswidth, &bus_flags);
+        const struct soc_mbus_pixelfmt *fmt;
+        int ret;
        struct pxa_cam *cam = icd->host_priv;
+        fmt = soc_mbus_get_fmtdesc(icd->current_fmt->code);
+        if (!fmt)
+                return -EINVAL;
+        ret = test_platform_param(pcdev, fmt->bits_per_sample, &bus_flags);
        if (ret < 0)
                return ret;
@@ -1204,59 +1235,49 @@ static int pxa_camera_try_bus_param(struct soc_camera_device *icd,
        return soc_camera_bus_param_compatible(camera_flags, bus_flags) ? 0 : -EINVAL;
 }
-static const struct soc_camera_data_format pxa_camera_formats[] = {
+static const struct soc_mbus_pixelfmt pxa_camera_formats[] = {
        {
-                .name           = "Planar YUV422 16 bit",
+                .fourcc                 = V4L2_PIX_FMT_YUV422P,
-                .depth          = 16,
+                .name                   = "Planar YUV422 16 bit",
-                .fourcc         = V4L2_PIX_FMT_YUV422P,
+                .bits_per_sample        = 8,
-                .colorspace     = V4L2_COLORSPACE_JPEG,
+                .packing                = SOC_MBUS_PACKING_2X8_PADHI,
+                .order                  = SOC_MBUS_ORDER_LE,
        },
 };
-static bool buswidth_supported(struct soc_camera_device *icd, int depth)
+/* This will be corrected as we get more formats */
+static bool pxa_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt)
 {
-        struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+        return  fmt->packing == SOC_MBUS_PACKING_NONE ||
-        struct pxa_camera_dev *pcdev = ici->priv;
+                (fmt->bits_per_sample == 8 &&
+                 fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) ||
-        switch (depth) {
+                (fmt->bits_per_sample > 8 &&
-        case 8:
+                 fmt->packing == SOC_MBUS_PACKING_EXTEND16);
-                return !!(pcdev->platform_flags & PXA_CAMERA_DATAWIDTH_8);
-        case 9:
-                return !!(pcdev->platform_flags & PXA_CAMERA_DATAWIDTH_9);
-        case 10:
-                return !!(pcdev->platform_flags & PXA_CAMERA_DATAWIDTH_10);
-        }
-        return false;
-}
-static int required_buswidth(const struct soc_camera_data_format *fmt)
-{
-        switch (fmt->fourcc) {
-        case V4L2_PIX_FMT_UYVY:
-        case V4L2_PIX_FMT_VYUY:
-        case V4L2_PIX_FMT_YUYV:
-        case V4L2_PIX_FMT_YVYU:
-        case V4L2_PIX_FMT_RGB565:
-        case V4L2_PIX_FMT_RGB555:
-                return 8;
-        default:
-                return fmt->depth;
-        }
 }
 static int pxa_camera_get_formats(struct soc_camera_device *icd, int idx,
                                  struct soc_camera_format_xlate *xlate)
 {
+        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
        struct device *dev = icd->dev.parent;
-        int formats = 0, buswidth, ret;
+        int formats = 0, ret;
        struct pxa_cam *cam;
+        enum v4l2_mbus_pixelcode code;
+        const struct soc_mbus_pixelfmt *fmt;
-        buswidth = required_buswidth(icd->formats + idx);
+        ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code);
+        if (ret < 0)
+                /* No more formats */
+                return 0;
-        if (!buswidth_supported(icd, buswidth))
+        fmt = soc_mbus_get_fmtdesc(code);
+        if (!fmt) {
+                dev_err(dev, "Invalid format code #%d: %d\n", idx, code);
                return 0;
+        }
-        ret = pxa_camera_try_bus_param(icd, buswidth);
+        /* This also checks support for the requested bits-per-sample */
+        ret = pxa_camera_try_bus_param(icd, fmt->bits_per_sample);
        if (ret < 0)
                return 0;
@@ -1270,45 +1291,40 @@ static int pxa_camera_get_formats(struct soc_camera_device *icd, int idx,
                cam = icd->host_priv;
        }
-        switch (icd->formats[idx].fourcc) {
+        switch (code) {
-        case V4L2_PIX_FMT_UYVY:
+        case V4L2_MBUS_FMT_YUYV8_2X8_BE:
                formats++;
                if (xlate) {
-                        xlate->host_fmt = &pxa_camera_formats[0];
+                        xlate->host_fmt = &pxa_camera_formats[0];
-                        xlate->cam_fmt = icd->formats + idx;
+                        xlate->code     = code;
-                        xlate->buswidth = buswidth;
                        xlate++;
-                        dev_dbg(dev, "Providing format %s using %s\n",
+                        dev_dbg(dev, "Providing format %s using code %d\n",
-                                pxa_camera_formats[0].name,
+                                pxa_camera_formats[0].name, code);
-                                icd->formats[idx].name);
                }
-        case V4L2_PIX_FMT_VYUY:
+        case V4L2_MBUS_FMT_YVYU8_2X8_BE:
-        case V4L2_PIX_FMT_YUYV:
+        case V4L2_MBUS_FMT_YUYV8_2X8_LE:
-        case V4L2_PIX_FMT_YVYU:
+        case V4L2_MBUS_FMT_YVYU8_2X8_LE:
-        case V4L2_PIX_FMT_RGB565:
+        case V4L2_MBUS_FMT_RGB565_2X8_LE:
-        case V4L2_PIX_FMT_RGB555:
+        case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
-                formats++;
+                if (xlate)
-                if (xlate) {
-                        xlate->host_fmt = icd->formats + idx;
-                        xlate->cam_fmt = icd->formats + idx;
-                        xlate->buswidth = buswidth;
-                        xlate++;
                        dev_dbg(dev, "Providing format %s packed\n",
-                                icd->formats[idx].name);
+                                fmt->name);
-                }
                break;
        default:
-                /* Generic pass-through */
+                if (!pxa_camera_packing_supported(fmt))
-                formats++;
+                        return 0;
-                if (xlate) {
+                if (xlate)
-                        xlate->host_fmt = icd->formats + idx;
-                        xlate->cam_fmt = icd->formats + idx;
-                        xlate->buswidth = icd->formats[idx].depth;
-                        xlate++;
                        dev_dbg(dev,
                                "Providing format %s in pass-through mode\n",
-                                icd->formats[idx].name);
+                                fmt->name);
-                }
+        }
+        /* Generic pass-through */
+        formats++;
+        if (xlate) {
+                xlate->host_fmt = fmt;
+                xlate->code     = code;
+                xlate++;
        }
        return formats;
@@ -1320,11 +1336,11 @@ static void pxa_camera_put_formats(struct soc_camera_device *icd)
        icd->host_priv = NULL;
 }
-static int pxa_camera_check_frame(struct v4l2_pix_format *pix)
+static int pxa_camera_check_frame(u32 width, u32 height)
 {
        /* limit to pxa hardware capabilities */
-        return pix->height < 32 || pix->height > 2048 || pix->width < 48 ||
+        return height < 32 || height > 2048 || width < 48 || width > 2048 ||
-                pix->width > 2048 || (pix->width & 0x01);
+                (width & 0x01);
 }
 static int pxa_camera_set_crop(struct soc_camera_device *icd,
@@ -1339,9 +1355,9 @@ static int pxa_camera_set_crop(struct soc_camera_device *icd,
                .master_clock = pcdev->mclk,
                .pixel_clock_max = pcdev->ciclk / 4,
        };
-        struct v4l2_format f;
+        struct v4l2_mbus_framefmt mf;
-        struct v4l2_pix_format *pix = &f.fmt.pix, pix_tmp;
        struct pxa_cam *cam = icd->host_priv;
+        u32 fourcc = icd->current_fmt->host_fmt->fourcc;
        int ret;
        /* If PCLK is used to latch data from the sensor, check sense */
@@ -1358,27 +1374,23 @@ static int pxa_camera_set_crop(struct soc_camera_device *icd,
                return ret;
        }
-        f.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+        ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mf);
-        ret = v4l2_subdev_call(sd, video, g_fmt, &f);
        if (ret < 0)
                return ret;
-        pix_tmp = *pix;
+        if (pxa_camera_check_frame(mf.width, mf.height)) {
-        if (pxa_camera_check_frame(pix)) {
                /*
                 * Camera cropping produced a frame beyond our capabilities.
                 * FIXME: just extract a subframe, that we can process.
                 */
-                v4l_bound_align_image(&pix->width, 48, 2048, 1,
+                v4l_bound_align_image(&mf.width, 48, 2048, 1,
-                        &pix->height, 32, 2048, 0,
+                        &mf.height, 32, 2048, 0,
-                        icd->current_fmt->fourcc == V4L2_PIX_FMT_YUV422P ?
+                        fourcc == V4L2_PIX_FMT_YUV422P ? 4 : 0);
-                                4 : 0);
+                ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
-                ret = v4l2_subdev_call(sd, video, s_fmt, &f);
                if (ret < 0)
                        return ret;
-                if (pxa_camera_check_frame(pix)) {
+                if (pxa_camera_check_frame(mf.width, mf.height)) {
                        dev_warn(icd->dev.parent,
                                 "Inconsistent state. Use S_FMT to repair\n");
                        return -EINVAL;
@@ -1395,10 +1407,10 @@ static int pxa_camera_set_crop(struct soc_camera_device *icd,
                recalculate_fifo_timeout(pcdev, sense.pixel_clock);
        }
-        icd->user_width = pix->width;
+        icd->user_width         = mf.width;
-        icd->user_height = pix->height;
+        icd->user_height        = mf.height;
-        pxa_camera_setup_cicr(icd, cam->flags, icd->current_fmt->fourcc);
+        pxa_camera_setup_cicr(icd, cam->flags, fourcc);
        return ret;
 }
@@ -1410,14 +1422,13 @@ static int pxa_camera_set_fmt(struct soc_camera_device *icd,
        struct pxa_camera_dev *pcdev = ici->priv;
        struct device *dev = icd->dev.parent;
        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
-        const struct soc_camera_data_format *cam_fmt = NULL;
        const struct soc_camera_format_xlate *xlate = NULL;
        struct soc_camera_sense sense = {
                .master_clock = pcdev->mclk,
                .pixel_clock_max = pcdev->ciclk / 4,
        };
        struct v4l2_pix_format *pix = &f->fmt.pix;
-        struct v4l2_format cam_f = *f;
+        struct v4l2_mbus_framefmt mf;
        int ret;
        xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
@@ -1426,26 +1437,31 @@ static int pxa_camera_set_fmt(struct soc_camera_device *icd,
                return -EINVAL;
        }
-        cam_fmt = xlate->cam_fmt;
        /* If PCLK is used to latch data from the sensor, check sense */
        if (pcdev->platform_flags & PXA_CAMERA_PCLK_EN)
+                /* The caller holds a mutex. */
                icd->sense = &sense;
-        cam_f.fmt.pix.pixelformat = cam_fmt->fourcc;
+        mf.width        = pix->width;
-        ret = v4l2_subdev_call(sd, video, s_fmt, &cam_f);
+        mf.height       = pix->height;
-        cam_f.fmt.pix.pixelformat = pix->pixelformat;
+        mf.field        = pix->field;
-        *pix = cam_f.fmt.pix;
+        mf.colorspace   = pix->colorspace;
+        mf.code         = xlate->code;
+        ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
+        if (mf.code != xlate->code)
+                return -EINVAL;
        icd->sense = NULL;
        if (ret < 0) {
                dev_warn(dev, "Failed to configure for format %x\n",
                         pix->pixelformat);
-        } else if (pxa_camera_check_frame(pix)) {
+        } else if (pxa_camera_check_frame(mf.width, mf.height)) {
                dev_warn(dev,
                         "Camera driver produced an unsupported frame %dx%d\n",
-                         pix->width, pix->height);
+                         mf.width, mf.height);
                ret = -EINVAL;
        } else if (sense.flags & SOCAM_SENSE_PCLK_CHANGED) {
                if (sense.pixel_clock > sense.pixel_clock_max) {
@@ -1457,10 +1473,14 @@ static int pxa_camera_set_fmt(struct soc_camera_device *icd,
                recalculate_fifo_timeout(pcdev, sense.pixel_clock);
        }
-        if (!ret) {
+        if (ret < 0)
-                icd->buswidth = xlate->buswidth;
+                return ret;
-                icd->current_fmt = xlate->host_fmt;
-        }
+        pix->width              = mf.width;
+        pix->height             = mf.height;
+        pix->field              = mf.field;
+        pix->colorspace         = mf.colorspace;
+        icd->current_fmt        = xlate;
        return ret;
 }
@@ -1468,17 +1488,16 @@ static int pxa_camera_set_fmt(struct soc_camera_device *icd,
 static int pxa_camera_try_fmt(struct soc_camera_device *icd,
                              struct v4l2_format *f)
 {
-        struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
        const struct soc_camera_format_xlate *xlate;
        struct v4l2_pix_format *pix = &f->fmt.pix;
+        struct v4l2_mbus_framefmt mf;
        __u32 pixfmt = pix->pixelformat;
-        enum v4l2_field field;
        int ret;
        xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
        if (!xlate) {
-                dev_warn(ici->v4l2_dev.dev, "Format %x not found\n", pixfmt);
+                dev_warn(icd->dev.parent, "Format %x not found\n", pixfmt);
                return -EINVAL;
        }
@@ -1492,22 +1511,36 @@ static int pxa_camera_try_fmt(struct soc_camera_device *icd,
                              &pix->height, 32, 2048, 0,
                              pixfmt == V4L2_PIX_FMT_YUV422P ? 4 : 0);
-        pix->bytesperline = pix->width *
+        pix->bytesperline = soc_mbus_bytes_per_line(pix->width,
-                DIV_ROUND_UP(xlate->host_fmt->depth, 8);
+                                                    xlate->host_fmt);
+        if (pix->bytesperline < 0)
+                return pix->bytesperline;
        pix->sizeimage = pix->height * pix->bytesperline;
-        /* camera has to see its format, but the user the original one */
-        pix->pixelformat = xlate->cam_fmt->fourcc;
        /* limit to sensor capabilities */
-        ret = v4l2_subdev_call(sd, video, try_fmt, f);
+        mf.width        = pix->width;
-        pix->pixelformat = pixfmt;
+        mf.height       = pix->height;
+        mf.field        = pix->field;
+        mf.colorspace   = pix->colorspace;
+        mf.code         = xlate->code;
-        field = pix->field;
+        ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
+        if (ret < 0)
+                return ret;
-        if (field == V4L2_FIELD_ANY) {
+        pix->width      = mf.width;
-                pix->field = V4L2_FIELD_NONE;
+        pix->height     = mf.height;
-        } else if (field != V4L2_FIELD_NONE) {
+        pix->colorspace = mf.colorspace;
-                dev_err(icd->dev.parent, "Field type %d unsupported.\n", field);
+        switch (mf.field) {
+        case V4L2_FIELD_ANY:
+        case V4L2_FIELD_NONE:
+                pix->field      = V4L2_FIELD_NONE;
+                break;
+        default:
+                /* TODO: support interlaced at least in pass-through mode */
+                dev_err(icd->dev.parent, "Field type %d unsupported.\n",
+                        mf.field);
                return -EINVAL;
        }
@@ -1519,10 +1552,12 @@ static int pxa_camera_reqbufs(struct soc_camera_file *icf,
 {
        int i;
-        /* This is for locking debugging only. I removed spinlocks and now I
+        /*
+         * This is for locking debugging only. I removed spinlocks and now I
         * check whether .prepare is ever called on a linked buffer, or whether
         * a dma IRQ can occur for an in-work or unlinked buffer. Until now
-         * it hadn't triggered */
+         * it hadn't triggered
+         */
        for (i = 0; i < p->count; i++) {
                struct pxa_buffer *buf = container_of(icf->vb_vidq.bufs[i],
                                                      struct pxa_buffer, vb);
@@ -1657,8 +1692,10 @@ static int __devinit pxa_camera_probe(struct platform_device *pdev)
        pcdev->platform_flags = pcdev->pdata->flags;
        if (!(pcdev->platform_flags & (PXA_CAMERA_DATAWIDTH_8 |
                        PXA_CAMERA_DATAWIDTH_9 | PXA_CAMERA_DATAWIDTH_10))) {
-                /* Platform hasn't set available data widths. This is bad.
+                /*
-                 * Warn and use a default. */
+                 * Platform hasn't set available data widths. This is bad.
+                 * Warn and use a default.
+                 */
                dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
                         "data widths, using default 10 bit\n");
                pcdev->platform_flags |= PXA_CAMERA_DATAWIDTH_10;
diff --git a/drivers/media/video/rj54n1cb0c.c b/drivers/media/video/rj54n1cb0c.c
index 373f2a30a677..7e42989ce0e4 100644
--- a/drivers/media/video/rj54n1cb0c.c
+++ b/drivers/media/video/rj54n1cb0c.c
@@ -13,9 +13,11 @@
 #include <linux/slab.h>
 #include <linux/videodev2.h>
+#include <media/rj54n1cb0c.h>
+#include <media/soc_camera.h>
+#include <media/soc_mediabus.h>
 #include <media/v4l2-subdev.h>
 #include <media/v4l2-chip-ident.h>
-#include <media/soc_camera.h>
 #define RJ54N1_DEV_CODE                 0x0400
 #define RJ54N1_DEV_CODE2                0x0401
@@ -38,6 +40,7 @@
 #define RJ54N1_H_OBEN_OFS               0x0413
 #define RJ54N1_V_OBEN_OFS               0x0414
 #define RJ54N1_RESIZE_CONTROL           0x0415
+#define RJ54N1_STILL_CONTROL            0x0417
 #define RJ54N1_INC_USE_SEL_H            0x0425
 #define RJ54N1_INC_USE_SEL_L            0x0426
 #define RJ54N1_MIRROR_STILL_MODE        0x0427
@@ -49,10 +52,21 @@
 #define RJ54N1_RA_SEL_UL                0x0530
 #define RJ54N1_BYTE_SWAP                0x0531
 #define RJ54N1_OUT_SIGPO                0x053b
+#define RJ54N1_WB_SEL_WEIGHT_I          0x054e
+#define RJ54N1_BIT8_WB                  0x0569
+#define RJ54N1_HCAPS_WB                 0x056a
+#define RJ54N1_VCAPS_WB                 0x056b
+#define RJ54N1_HCAPE_WB                 0x056c
+#define RJ54N1_VCAPE_WB                 0x056d
+#define RJ54N1_EXPOSURE_CONTROL         0x058c
 #define RJ54N1_FRAME_LENGTH_S_H         0x0595
 #define RJ54N1_FRAME_LENGTH_S_L         0x0596
 #define RJ54N1_FRAME_LENGTH_P_H         0x0597
 #define RJ54N1_FRAME_LENGTH_P_L         0x0598
+#define RJ54N1_PEAK_H                   0x05b7
+#define RJ54N1_PEAK_50                  0x05b8
+#define RJ54N1_PEAK_60                  0x05b9
+#define RJ54N1_PEAK_DIFF                0x05ba
 #define RJ54N1_IOC                      0x05ef
 #define RJ54N1_TG_BYPASS                0x0700
 #define RJ54N1_PLL_L                    0x0701
@@ -68,6 +82,7 @@
 #define RJ54N1_OCLK_SEL_EN              0x0713
 #define RJ54N1_CLK_RST                  0x0717
 #define RJ54N1_RESET_STANDBY            0x0718
+#define RJ54N1_FWFLG                    0x07fe
 #define E_EXCLK                         (1 << 7)
 #define SOFT_STDBY                      (1 << 4)
@@ -78,29 +93,53 @@
 #define RESIZE_HOLD_SEL                 (1 << 2)
 #define RESIZE_GO                       (1 << 1)
+/*
+ * When cropping, the camera automatically centers the cropped region, there
+ * doesn't seem to be a way to specify an explicit location of the rectangle.
+ */
 #define RJ54N1_COLUMN_SKIP              0
 #define RJ54N1_ROW_SKIP                 0
 #define RJ54N1_MAX_WIDTH                1600
 #define RJ54N1_MAX_HEIGHT               1200
+#define PLL_L                           2
+#define PLL_N                           0x31
 /* I2C addresses: 0x50, 0x51, 0x60, 0x61 */
-static const struct soc_camera_data_format rj54n1_colour_formats[] = {
+/* RJ54N1CB0C has only one fixed colorspace per pixelcode */
-        {
+struct rj54n1_datafmt {
-                .name           = "YUYV",
+        enum v4l2_mbus_pixelcode        code;
-                .depth          = 16,
+        enum v4l2_colorspace            colorspace;
-                .fourcc         = V4L2_PIX_FMT_YUYV,
+};
-                .colorspace     = V4L2_COLORSPACE_JPEG,
-        }, {
+/* Find a data format by a pixel code in an array */
-                .name           = "RGB565",
+static const struct rj54n1_datafmt *rj54n1_find_datafmt(
-                .depth          = 16,
+        enum v4l2_mbus_pixelcode code, const struct rj54n1_datafmt *fmt,
-                .fourcc         = V4L2_PIX_FMT_RGB565,
+        int n)
-                .colorspace     = V4L2_COLORSPACE_SRGB,
+{
-        }
+        int i;
+        for (i = 0; i < n; i++)
+                if (fmt[i].code == code)
+                        return fmt + i;
+        return NULL;
+}
+static const struct rj54n1_datafmt rj54n1_colour_fmts[] = {
+        {V4L2_MBUS_FMT_YUYV8_2X8_LE, V4L2_COLORSPACE_JPEG},
+        {V4L2_MBUS_FMT_YVYU8_2X8_LE, V4L2_COLORSPACE_JPEG},
+        {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
+        {V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
+        {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
+        {V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE, V4L2_COLORSPACE_SRGB},
+        {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
+        {V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE, V4L2_COLORSPACE_SRGB},
+        {V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB},
 };
 struct rj54n1_clock_div {
-        u8 ratio_tg;
+        u8 ratio_tg;    /* can be 0 or an odd number */
        u8 ratio_t;
        u8 ratio_r;
        u8 ratio_op;
@@ -109,12 +148,14 @@ struct rj54n1_clock_div {
 struct rj54n1 {
        struct v4l2_subdev subdev;
+        struct rj54n1_clock_div clk_div;
+        const struct rj54n1_datafmt *fmt;
        struct v4l2_rect rect;  /* Sensor window */
+        unsigned int tgclk_mhz;
+        bool auto_wb;
        unsigned short width;   /* Output window */
        unsigned short height;
        unsigned short resize;  /* Sensor * 1024 / resize = Output */
-        struct rj54n1_clock_div clk_div;
-        u32 fourcc;
        unsigned short scale;
        u8 bank;
 };
@@ -171,7 +212,7 @@ const static struct rj54n1_reg_val bank_7[] = {
        {0x714, 0xff},
        {0x715, 0xff},
        {0x716, 0x1f},
-        {0x7FE, 0x02},
+        {0x7FE, 2},
 };
 const static struct rj54n1_reg_val bank_8[] = {
@@ -359,7 +400,7 @@ const static struct rj54n1_reg_val bank_8[] = {
        {0x8BB, 0x00},
        {0x8BC, 0xFF},
        {0x8BD, 0x00},
-        {0x8FE, 0x02},
+        {0x8FE, 2},
 };
 const static struct rj54n1_reg_val bank_10[] = {
@@ -440,12 +481,24 @@ static int reg_write_multiple(struct i2c_client *client,
        return 0;
 }
-static int rj54n1_s_stream(struct v4l2_subdev *sd, int enable)
+static int rj54n1_enum_fmt(struct v4l2_subdev *sd, int index,
+                           enum v4l2_mbus_pixelcode *code)
 {
-        /* TODO: start / stop streaming */
+        if ((unsigned int)index >= ARRAY_SIZE(rj54n1_colour_fmts))
+                return -EINVAL;
+        *code = rj54n1_colour_fmts[index].code;
        return 0;
 }
+static int rj54n1_s_stream(struct v4l2_subdev *sd, int enable)
+{
+        struct i2c_client *client = sd->priv;
+        /* Switch between preview and still shot modes */
+        return reg_set(client, RJ54N1_STILL_CONTROL, (!enable) << 7, 0x80);
+}
 static int rj54n1_set_bus_param(struct soc_camera_device *icd,
                                unsigned long flags)
 {
@@ -502,6 +555,44 @@ static int rj54n1_commit(struct i2c_client *client)
        return ret;
 }
+static int rj54n1_sensor_scale(struct v4l2_subdev *sd, u32 *in_w, u32 *in_h,
+                               u32 *out_w, u32 *out_h);
+static int rj54n1_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
+{
+        struct i2c_client *client = sd->priv;
+        struct rj54n1 *rj54n1 = to_rj54n1(client);
+        struct v4l2_rect *rect = &a->c;
+        unsigned int dummy, output_w, output_h,
+                input_w = rect->width, input_h = rect->height;
+        int ret;
+        /* arbitrary minimum width and height, edges unimportant */
+        soc_camera_limit_side(&dummy, &input_w,
+                     RJ54N1_COLUMN_SKIP, 8, RJ54N1_MAX_WIDTH);
+        soc_camera_limit_side(&dummy, &input_h,
+                     RJ54N1_ROW_SKIP, 8, RJ54N1_MAX_HEIGHT);
+        output_w = (input_w * 1024 + rj54n1->resize / 2) / rj54n1->resize;
+        output_h = (input_h * 1024 + rj54n1->resize / 2) / rj54n1->resize;
+        dev_dbg(&client->dev, "Scaling for %ux%u : %u = %ux%u\n",
+                input_w, input_h, rj54n1->resize, output_w, output_h);
+        ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
+        if (ret < 0)
+                return ret;
+        rj54n1->width           = output_w;
+        rj54n1->height          = output_h;
+        rj54n1->resize          = ret;
+        rj54n1->rect.width      = input_w;
+        rj54n1->rect.height     = input_h;
+        return 0;
+}
 static int rj54n1_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
 {
        struct i2c_client *client = sd->priv;
@@ -527,16 +618,17 @@ static int rj54n1_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
        return 0;
 }
-static int rj54n1_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int rj54n1_g_fmt(struct v4l2_subdev *sd,
+                        struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
        struct rj54n1 *rj54n1 = to_rj54n1(client);
-        struct v4l2_pix_format *pix = &f->fmt.pix;
-        pix->pixelformat        = rj54n1->fourcc;
+        mf->code        = rj54n1->fmt->code;
-        pix->field              = V4L2_FIELD_NONE;
+        mf->colorspace  = rj54n1->fmt->colorspace;
-        pix->width              = rj54n1->width;
+        mf->field       = V4L2_FIELD_NONE;
-        pix->height             = rj54n1->height;
+        mf->width       = rj54n1->width;
+        mf->height      = rj54n1->height;
        return 0;
 }
@@ -550,11 +642,44 @@ static int rj54n1_sensor_scale(struct v4l2_subdev *sd, u32 *in_w, u32 *in_h,
                               u32 *out_w, u32 *out_h)
 {
        struct i2c_client *client = sd->priv;
+        struct rj54n1 *rj54n1 = to_rj54n1(client);
        unsigned int skip, resize, input_w = *in_w, input_h = *in_h,
                output_w = *out_w, output_h = *out_h;
-        u16 inc_sel;
+        u16 inc_sel, wb_bit8, wb_left, wb_right, wb_top, wb_bottom;
+        unsigned int peak, peak_50, peak_60;
        int ret;
+        /*
+         * We have a problem with crops, where the window is larger than 512x384
+         * and output window is larger than a half of the input one. In this
+         * case we have to either reduce the input window to equal or below
+         * 512x384 or the output window to equal or below 1/2 of the input.
+         */
+        if (output_w > max(512U, input_w / 2)) {
+                if (2 * output_w > RJ54N1_MAX_WIDTH) {
+                        input_w = RJ54N1_MAX_WIDTH;
+                        output_w = RJ54N1_MAX_WIDTH / 2;
+                } else {
+                        input_w = output_w * 2;
+                }
+                dev_dbg(&client->dev, "Adjusted output width: in %u, out %u\n",
+                        input_w, output_w);
+        }
+        if (output_h > max(384U, input_h / 2)) {
+                if (2 * output_h > RJ54N1_MAX_HEIGHT) {
+                        input_h = RJ54N1_MAX_HEIGHT;
+                        output_h = RJ54N1_MAX_HEIGHT / 2;
+                } else {
+                        input_h = output_h * 2;
+                }
+                dev_dbg(&client->dev, "Adjusted output height: in %u, out %u\n",
+                        input_h, output_h);
+        }
+        /* Idea: use the read mode for snapshots, handle separate geometries */
        ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_S_L,
                              RJ54N1_Y_OUTPUT_SIZE_S_L,
                              RJ54N1_XY_OUTPUT_SIZE_S_H, output_w, output_h);
@@ -566,17 +691,27 @@ static int rj54n1_sensor_scale(struct v4l2_subdev *sd, u32 *in_w, u32 *in_h,
        if (ret < 0)
                return ret;
-        if (output_w > input_w || output_h > input_h) {
+        if (output_w > input_w && output_h > input_h) {
                input_w = output_w;
                input_h = output_h;
                resize = 1024;
        } else {
                unsigned int resize_x, resize_y;
-                resize_x = input_w * 1024 / output_w;
+                resize_x = (input_w * 1024 + output_w / 2) / output_w;
-                resize_y = input_h * 1024 / output_h;
+                resize_y = (input_h * 1024 + output_h / 2) / output_h;
-                resize = min(resize_x, resize_y);
+                /* We want max(resize_x, resize_y), check if it still fits */
+                if (resize_x > resize_y &&
+                    (output_h * resize_x + 512) / 1024 > RJ54N1_MAX_HEIGHT)
+                        resize = (RJ54N1_MAX_HEIGHT * 1024 + output_h / 2) /
+                                output_h;
+                else if (resize_y > resize_x &&
+                         (output_w * resize_y + 512) / 1024 > RJ54N1_MAX_WIDTH)
+                        resize = (RJ54N1_MAX_WIDTH * 1024 + output_w / 2) /
+                                output_w;
+                else
+                        resize = max(resize_x, resize_y);
                /* Prohibited value ranges */
                switch (resize) {
@@ -589,12 +724,9 @@ static int rj54n1_sensor_scale(struct v4l2_subdev *sd, u32 *in_w, u32 *in_h,
                case 8160 ... 8191:
                        resize = 8159;
                        break;
-                case 16320 ... 16383:
+                case 16320 ... 16384:
                        resize = 16319;
                }
-                input_w = output_w * resize / 1024;
-                input_h = output_h * resize / 1024;
        }
        /* Set scaling */
@@ -607,9 +739,18 @@ static int rj54n1_sensor_scale(struct v4l2_subdev *sd, u32 *in_w, u32 *in_h,
        /*
         * Configure a skipping bitmask. The sensor will select a skipping value
-         * among set bits automatically.
+         * among set bits automatically. This is very unclear in the datasheet
+         * too. I was told, in this register one enables all skipping values,
+         * that are required for a specific resize, and the camera selects
+         * automatically, which ones to use. But it is unclear how to identify,
+         * which cropping values are needed. Secondly, why don't we just set all
+         * bits and let the camera choose? Would it increase processing time and
+         * reduce the framerate? Using 0xfffc for INC_USE_SEL doesn't seem to
+         * improve the image quality or stability for larger frames (see comment
+         * above), but I didn't check the framerate.
         */
        skip = min(resize / 1024, (unsigned)15);
        inc_sel = 1 << skip;
        if (inc_sel <= 2)
@@ -621,6 +762,43 @@ static int rj54n1_sensor_scale(struct v4l2_subdev *sd, u32 *in_w, u32 *in_h,
        if (!ret)
                ret = reg_write(client, RJ54N1_INC_USE_SEL_H, inc_sel >> 8);
+        if (!rj54n1->auto_wb) {
+                /* Auto white balance window */
+                wb_left   = output_w / 16;
+                wb_right  = (3 * output_w / 4 - 3) / 4;
+                wb_top    = output_h / 16;
+                wb_bottom = (3 * output_h / 4 - 3) / 4;
+                wb_bit8   = ((wb_left >> 2) & 0x40) | ((wb_top >> 4) & 0x10) |
+                        ((wb_right >> 6) & 4) | ((wb_bottom >> 8) & 1);
+                if (!ret)
+                        ret = reg_write(client, RJ54N1_BIT8_WB, wb_bit8);
+                if (!ret)
+                        ret = reg_write(client, RJ54N1_HCAPS_WB, wb_left);
+                if (!ret)
+                        ret = reg_write(client, RJ54N1_VCAPS_WB, wb_top);
+                if (!ret)
+                        ret = reg_write(client, RJ54N1_HCAPE_WB, wb_right);
+                if (!ret)
+                        ret = reg_write(client, RJ54N1_VCAPE_WB, wb_bottom);
+        }
+        /* Antiflicker */
+        peak = 12 * RJ54N1_MAX_WIDTH * (1 << 14) * resize / rj54n1->tgclk_mhz /
+                10000;
+        peak_50 = peak / 6;
+        peak_60 = peak / 5;
+        if (!ret)
+                ret = reg_write(client, RJ54N1_PEAK_H,
+                                ((peak_50 >> 4) & 0xf0) | (peak_60 >> 8));
+        if (!ret)
+                ret = reg_write(client, RJ54N1_PEAK_50, peak_50);
+        if (!ret)
+                ret = reg_write(client, RJ54N1_PEAK_60, peak_60);
+        if (!ret)
+                ret = reg_write(client, RJ54N1_PEAK_DIFF, peak / 150);
        /* Start resizing */
        if (!ret)
                ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
@@ -629,8 +807,6 @@ static int rj54n1_sensor_scale(struct v4l2_subdev *sd, u32 *in_w, u32 *in_h,
        if (ret < 0)
                return ret;
-        dev_dbg(&client->dev, "resize %u, skip %u\n", resize, skip);
        /* Constant taken from manufacturer's example */
        msleep(230);
@@ -638,11 +814,14 @@ static int rj54n1_sensor_scale(struct v4l2_subdev *sd, u32 *in_w, u32 *in_h,
        if (ret < 0)
                return ret;
-        *in_w = input_w;
+        *in_w = (output_w * resize + 512) / 1024;
-        *in_h = input_h;
+        *in_h = (output_h * resize + 512) / 1024;
        *out_w = output_w;
        *out_h = output_h;
+        dev_dbg(&client->dev, "Scaled for %ux%u : %u = %ux%u, skip %u\n",
+                *in_w, *in_h, resize, output_w, output_h, skip);
        return resize;
 }
@@ -653,14 +832,14 @@ static int rj54n1_set_clock(struct i2c_client *client)
        /* Enable external clock */
        ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK | SOFT_STDBY);
-        /* Leave stand-by */
+        /* Leave stand-by. Note: use this when implementing suspend / resume */
        if (!ret)
                ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK);
        if (!ret)
-                ret = reg_write(client, RJ54N1_PLL_L, 2);
+                ret = reg_write(client, RJ54N1_PLL_L, PLL_L);
        if (!ret)
-                ret = reg_write(client, RJ54N1_PLL_N, 0x31);
+                ret = reg_write(client, RJ54N1_PLL_N, PLL_N);
        /* TGCLK dividers */
        if (!ret)
@@ -719,6 +898,7 @@ static int rj54n1_set_clock(struct i2c_client *client)
                        "Resetting RJ54N1CB0C clock failed: %d!\n", ret);
                return -EIO;
        }
        /* Start the PLL */
        ret = reg_set(client, RJ54N1_OCLK_DSP, 1, 1);
@@ -731,6 +911,7 @@ static int rj54n1_set_clock(struct i2c_client *client)
 static int rj54n1_reg_init(struct i2c_client *client)
 {
+        struct rj54n1 *rj54n1 = to_rj54n1(client);
        int ret = rj54n1_set_clock(client);
        if (!ret)
@@ -753,14 +934,26 @@ static int rj54n1_reg_init(struct i2c_client *client)
        if (!ret)
                ret = reg_write(client, RJ54N1_Y_GAIN, 0x84);
-        /* Mirror the image back: default is upside down and left-to-right... */
+        /*
+         * Mirror the image back: default is upside down and left-to-right...
+         * Set manual preview / still shot switching
+         */
        if (!ret)
-                ret = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 3, 3);
+                ret = reg_write(client, RJ54N1_MIRROR_STILL_MODE, 0x27);
        if (!ret)
                ret = reg_write_multiple(client, bank_4, ARRAY_SIZE(bank_4));
+        /* Auto exposure area */
        if (!ret)
+                ret = reg_write(client, RJ54N1_EXPOSURE_CONTROL, 0x80);
+        /* Check current auto WB config */
+        if (!ret)
+                ret = reg_read(client, RJ54N1_WB_SEL_WEIGHT_I);
+        if (ret >= 0) {
+                rj54n1->auto_wb = ret & 0x80;
                ret = reg_write_multiple(client, bank_5, ARRAY_SIZE(bank_5));
+        }
        if (!ret)
                ret = reg_write_multiple(client, bank_8, ARRAY_SIZE(bank_8));
@@ -777,8 +970,9 @@ static int rj54n1_reg_init(struct i2c_client *client)
                ret = reg_write(client, RJ54N1_RESET_STANDBY,
                                E_EXCLK | DSP_RSTX | TG_RSTX | SEN_RSTX);
+        /* Start register update? Same register as 0x?FE in many bank_* sets */
        if (!ret)
-                ret = reg_write(client, 0x7fe, 2);
+                ret = reg_write(client, RJ54N1_FWFLG, 2);
        /* Constant taken from manufacturer's example */
        msleep(700);
@@ -786,27 +980,44 @@ static int rj54n1_reg_init(struct i2c_client *client)
        return ret;
 }
-/* FIXME: streaming output only up to 800x600 is functional */
+static int rj54n1_try_fmt(struct v4l2_subdev *sd,
-static int rj54n1_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+                          struct v4l2_mbus_framefmt *mf)
 {
-        struct v4l2_pix_format *pix = &f->fmt.pix;
+        struct i2c_client *client = sd->priv;
+        struct rj54n1 *rj54n1 = to_rj54n1(client);
+        const struct rj54n1_datafmt *fmt;
+        int align = mf->code == V4L2_MBUS_FMT_SBGGR10_1X10 ||
+                mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE ||
+                mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE ||
+                mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE ||
+                mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE;
+        dev_dbg(&client->dev, "%s: code = %d, width = %u, height = %u\n",
+                __func__, mf->code, mf->width, mf->height);
+        fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts,
+                                  ARRAY_SIZE(rj54n1_colour_fmts));
+        if (!fmt) {
+                fmt = rj54n1->fmt;
+                mf->code = fmt->code;
+        }
-        pix->field = V4L2_FIELD_NONE;
+        mf->field       = V4L2_FIELD_NONE;
+        mf->colorspace  = fmt->colorspace;
-        if (pix->width > 800)
+        v4l_bound_align_image(&mf->width, 112, RJ54N1_MAX_WIDTH, align,
-                pix->width = 800;
+                              &mf->height, 84, RJ54N1_MAX_HEIGHT, align, 0);
-        if (pix->height > 600)
-                pix->height = 600;
        return 0;
 }
-static int rj54n1_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int rj54n1_s_fmt(struct v4l2_subdev *sd,
+                        struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
        struct rj54n1 *rj54n1 = to_rj54n1(client);
-        struct v4l2_pix_format *pix = &f->fmt.pix;
+        const struct rj54n1_datafmt *fmt;
-        unsigned int output_w, output_h,
+        unsigned int output_w, output_h, max_w, max_h,
                input_w = rj54n1->rect.width, input_h = rj54n1->rect.height;
        int ret;
@@ -814,14 +1025,13 @@ static int rj54n1_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
         * The host driver can call us without .try_fmt(), so, we have to take
         * care ourseleves
         */
-        ret = rj54n1_try_fmt(sd, f);
+        rj54n1_try_fmt(sd, mf);
        /*
         * Verify if the sensor has just been powered on. TODO: replace this
         * with proper PM, when a suitable API is available.
         */
-        if (!ret)
+        ret = reg_read(client, RJ54N1_RESET_STANDBY);
-                ret = reg_read(client, RJ54N1_RESET_STANDBY);
        if (ret < 0)
                return ret;
@@ -831,50 +1041,105 @@ static int rj54n1_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
                        return ret;
        }
+        dev_dbg(&client->dev, "%s: code = %d, width = %u, height = %u\n",
+                __func__, mf->code, mf->width, mf->height);
        /* RA_SEL_UL is only relevant for raw modes, ignored otherwise. */
-        switch (pix->pixelformat) {
+        switch (mf->code) {
-        case V4L2_PIX_FMT_YUYV:
+        case V4L2_MBUS_FMT_YUYV8_2X8_LE:
                ret = reg_write(client, RJ54N1_OUT_SEL, 0);
                if (!ret)
                        ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
                break;
-        case V4L2_PIX_FMT_RGB565:
+        case V4L2_MBUS_FMT_YVYU8_2X8_LE:
+                ret = reg_write(client, RJ54N1_OUT_SEL, 0);
+                if (!ret)
+                        ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
+                break;
+        case V4L2_MBUS_FMT_RGB565_2X8_LE:
+                ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
+                if (!ret)
+                        ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
+                break;
+        case V4L2_MBUS_FMT_RGB565_2X8_BE:
                ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
                if (!ret)
+                        ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
+                break;
+        case V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE:
+                ret = reg_write(client, RJ54N1_OUT_SEL, 4);
+                if (!ret)
                        ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
+                if (!ret)
+                        ret = reg_write(client, RJ54N1_RA_SEL_UL, 0);
+                break;
+        case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
+                ret = reg_write(client, RJ54N1_OUT_SEL, 4);
+                if (!ret)
+                        ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
+                if (!ret)
+                        ret = reg_write(client, RJ54N1_RA_SEL_UL, 8);
+                break;
+        case V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE:
+                ret = reg_write(client, RJ54N1_OUT_SEL, 4);
+                if (!ret)
+                        ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
+                if (!ret)
+                        ret = reg_write(client, RJ54N1_RA_SEL_UL, 0);
+                break;
+        case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE:
+                ret = reg_write(client, RJ54N1_OUT_SEL, 4);
+                if (!ret)
+                        ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
+                if (!ret)
+                        ret = reg_write(client, RJ54N1_RA_SEL_UL, 8);
+                break;
+        case V4L2_MBUS_FMT_SBGGR10_1X10:
+                ret = reg_write(client, RJ54N1_OUT_SEL, 5);
                break;
        default:
                ret = -EINVAL;
        }
+        /* Special case: a raw mode with 10 bits of data per clock tick */
+        if (!ret)
+                ret = reg_set(client, RJ54N1_OCLK_SEL_EN,
+                              (mf->code == V4L2_MBUS_FMT_SBGGR10_1X10) << 1, 2);
        if (ret < 0)
                return ret;
-        /* Supported scales 1:1 - 1:16 */
+        /* Supported scales 1:1 >= scale > 1:16 */
-        if (pix->width < input_w / 16)
+        max_w = mf->width * (16 * 1024 - 1) / 1024;
-                pix->width = input_w / 16;
+        if (input_w > max_w)
-        if (pix->height < input_h / 16)
+                input_w = max_w;
-                pix->height = input_h / 16;
+        max_h = mf->height * (16 * 1024 - 1) / 1024;
+        if (input_h > max_h)
+                input_h = max_h;
-        output_w = pix->width;
+        output_w = mf->width;
-        output_h = pix->height;
+        output_h = mf->height;
        ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
        if (ret < 0)
                return ret;
-        rj54n1->fourcc          = pix->pixelformat;
+        fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts,
+                                  ARRAY_SIZE(rj54n1_colour_fmts));
+        rj54n1->fmt             = fmt;
        rj54n1->resize          = ret;
        rj54n1->rect.width      = input_w;
        rj54n1->rect.height     = input_h;
        rj54n1->width           = output_w;
        rj54n1->height          = output_h;
-        pix->width              = output_w;
+        mf->width               = output_w;
-        pix->height             = output_h;
+        mf->height              = output_h;
-        pix->field              = V4L2_FIELD_NONE;
+        mf->field               = V4L2_FIELD_NONE;
+        mf->colorspace          = fmt->colorspace;
-        return ret;
+        return 0;
 }
 static int rj54n1_g_chip_ident(struct v4l2_subdev *sd,
@@ -963,6 +1228,14 @@ static const struct v4l2_queryctrl rj54n1_controls[] = {
                .step           = 1,
                .default_value  = 66,
                .flags          = V4L2_CTRL_FLAG_SLIDER,
+        }, {
+                .id             = V4L2_CID_AUTO_WHITE_BALANCE,
+                .type           = V4L2_CTRL_TYPE_BOOLEAN,
+                .name           = "Auto white balance",
+                .minimum        = 0,
+                .maximum        = 1,
+                .step           = 1,
+                .default_value  = 1,
        },
 };
@@ -976,6 +1249,7 @@ static struct soc_camera_ops rj54n1_ops = {
 static int rj54n1_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
 {
        struct i2c_client *client = sd->priv;
+        struct rj54n1 *rj54n1 = to_rj54n1(client);
        int data;
        switch (ctrl->id) {
@@ -998,6 +1272,9 @@ static int rj54n1_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
                ctrl->value = data / 2;
                break;
+        case V4L2_CID_AUTO_WHITE_BALANCE:
+                ctrl->value = rj54n1->auto_wb;
+                break;
        }
        return 0;
@@ -1007,6 +1284,7 @@ static int rj54n1_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
 {
        int data;
        struct i2c_client *client = sd->priv;
+        struct rj54n1 *rj54n1 = to_rj54n1(client);
        const struct v4l2_queryctrl *qctrl;
        qctrl = soc_camera_find_qctrl(&rj54n1_ops, ctrl->id);
@@ -1037,6 +1315,13 @@ static int rj54n1_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
                else if (reg_write(client, RJ54N1_Y_GAIN, ctrl->value * 2) < 0)
                        return -EIO;
                break;
+        case V4L2_CID_AUTO_WHITE_BALANCE:
+                /* Auto WB area - whole image */
+                if (reg_set(client, RJ54N1_WB_SEL_WEIGHT_I, ctrl->value << 7,
+                            0x80) < 0)
+                        return -EIO;
+                rj54n1->auto_wb = ctrl->value;
+                break;
        }
        return 0;
@@ -1054,10 +1339,12 @@ static struct v4l2_subdev_core_ops rj54n1_subdev_core_ops = {
 static struct v4l2_subdev_video_ops rj54n1_subdev_video_ops = {
        .s_stream       = rj54n1_s_stream,
-        .s_fmt          = rj54n1_s_fmt,
+        .s_mbus_fmt     = rj54n1_s_fmt,
-        .g_fmt          = rj54n1_g_fmt,
+        .g_mbus_fmt     = rj54n1_g_fmt,
-        .try_fmt        = rj54n1_try_fmt,
+        .try_mbus_fmt   = rj54n1_try_fmt,
+        .enum_mbus_fmt  = rj54n1_enum_fmt,
        .g_crop         = rj54n1_g_crop,
+        .s_crop         = rj54n1_s_crop,
        .cropcap        = rj54n1_cropcap,
 };
@@ -1066,21 +1353,13 @@ static struct v4l2_subdev_ops rj54n1_subdev_ops = {
        .video  = &rj54n1_subdev_video_ops,
 };
-static int rj54n1_pin_config(struct i2c_client *client)
-{
-        /*
-         * Experimentally found out IOCTRL wired to 0. TODO: add to platform
-         * data: 0 or 1 << 7.
-         */
-        return reg_write(client, RJ54N1_IOC, 0);
-}
 /*
 * Interface active, can use i2c. If it fails, it can indeed mean, that
 * this wasn't our capture interface, so, we wait for the right one
 */
 static int rj54n1_video_probe(struct soc_camera_device *icd,
-                              struct i2c_client *client)
+                              struct i2c_client *client,
+                              struct rj54n1_pdata *priv)
 {
        int data1, data2;
        int ret;
@@ -1101,7 +1380,8 @@ static int rj54n1_video_probe(struct soc_camera_device *icd,
                goto ei2c;
        }
-        ret = rj54n1_pin_config(client);
+        /* Configure IOCTL polarity from the platform data: 0 or 1 << 7. */
+        ret = reg_write(client, RJ54N1_IOC, priv->ioctl_high << 7);
        if (ret < 0)
                goto ei2c;
@@ -1119,6 +1399,7 @@ static int rj54n1_probe(struct i2c_client *client,
        struct soc_camera_device *icd = client->dev.platform_data;
        struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
        struct soc_camera_link *icl;
+        struct rj54n1_pdata *rj54n1_priv;
        int ret;
        if (!icd) {
@@ -1127,11 +1408,13 @@ static int rj54n1_probe(struct i2c_client *client,
        }
        icl = to_soc_camera_link(icd);
-        if (!icl) {
+        if (!icl || !icl->priv) {
                dev_err(&client->dev, "RJ54N1CB0C: missing platform data!\n");
                return -EINVAL;
        }
+        rj54n1_priv = icl->priv;
        if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
                dev_warn(&adapter->dev,
                         "I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE\n");
@@ -1153,10 +1436,12 @@ static int rj54n1_probe(struct i2c_client *client,
        rj54n1->rect.height     = RJ54N1_MAX_HEIGHT;
        rj54n1->width           = RJ54N1_MAX_WIDTH;
        rj54n1->height          = RJ54N1_MAX_HEIGHT;
-        rj54n1->fourcc          = V4L2_PIX_FMT_YUYV;
+        rj54n1->fmt             = &rj54n1_colour_fmts[0];
        rj54n1->resize          = 1024;
+        rj54n1->tgclk_mhz       = (rj54n1_priv->mclk_freq / PLL_L * PLL_N) /
+                (clk_div.ratio_tg + 1) / (clk_div.ratio_t + 1);
-        ret = rj54n1_video_probe(icd, client);
+        ret = rj54n1_video_probe(icd, client, rj54n1_priv);
        if (ret < 0) {
                icd->ops = NULL;
                i2c_set_clientdata(client, NULL);
@@ -1164,9 +1449,6 @@ static int rj54n1_probe(struct i2c_client *client,
                return ret;
        }
-        icd->formats            = rj54n1_colour_formats;
-        icd->num_formats        = ARRAY_SIZE(rj54n1_colour_formats);
        return ret;
 }
diff --git a/drivers/media/video/s2255drv.c b/drivers/media/video/s2255drv.c
index 41765f3c7c28..fb742f1ae711 100644
--- a/drivers/media/video/s2255drv.c
+++ b/drivers/media/video/s2255drv.c
@@ -233,7 +233,6 @@ struct s2255_dev {
        struct s2255_dmaqueue   vidq[MAX_CHANNELS];
        struct video_device     *vdev[MAX_CHANNELS];
-        struct list_head        s2255_devlist;
        struct timer_list       timer;
        struct s2255_fw *fw_data;
        struct s2255_pipeinfo   pipes[MAX_PIPE_BUFFERS];
@@ -313,8 +312,6 @@ struct s2255_fh {
 /* Channels on box are in reverse order */
 static unsigned long G_chnmap[MAX_CHANNELS] = {3, 2, 1, 0};
-static LIST_HEAD(s2255_devlist);
 static int debug;
 static int *s2255_debug = &debug;
@@ -1533,32 +1530,24 @@ static int vidioc_s_parm(struct file *file, void *priv,
 }
 static int s2255_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct s2255_dev *h, *dev = NULL;
+        struct s2255_dev *dev = video_drvdata(file);
        struct s2255_fh *fh;
-        struct list_head *list;
+        enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        enum v4l2_buf_type type = 0;
        int i = 0;
        int cur_channel = -1;
        int state;
-        dprintk(1, "s2255: open called (minor=%d)\n", minor);
+        dprintk(1, "s2255: open called (dev=%s)\n",
+                video_device_node_name(vdev));
        lock_kernel();
-        list_for_each(list, &s2255_devlist) {
-                h = list_entry(list, struct s2255_dev, s2255_devlist);
-                for (i = 0; i < MAX_CHANNELS; i++) {
-                        if (h->vdev[i]->minor == minor) {
-                                cur_channel = i;
-                                dev = h;
-                                type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                        }
-                }
-        }
-        if ((NULL == dev) || (cur_channel == -1)) {
+        for (i = 0; i < MAX_CHANNELS; i++) {
-                unlock_kernel();
+                if (dev->vdev[i] == vdev) {
-                printk(KERN_INFO "s2255: openv4l no dev\n");
+                        cur_channel = i;
-                return -ENODEV;
+                        break;
+                }
        }
        if (atomic_read(&dev->fw_data->fw_state) == S2255_FW_DISCONNECTING) {
@@ -1662,8 +1651,9 @@ static int s2255_open(struct file *file)
        for (i = 0; i < ARRAY_SIZE(s2255_qctrl); i++)
                qctl_regs[i] = s2255_qctrl[i].default_value;
-        dprintk(1, "s2255drv: open minor=%d type=%s users=%d\n",
+        dprintk(1, "s2255drv: open dev=%s type=%s users=%d\n",
-                minor, v4l2_type_names[type], dev->users[cur_channel]);
+                video_device_node_name(vdev), v4l2_type_names[type],
+                dev->users[cur_channel]);
        dprintk(2, "s2255drv: open: fh=0x%08lx, dev=0x%08lx, vidq=0x%08lx\n",
                (unsigned long)fh, (unsigned long)dev,
                (unsigned long)&dev->vidq[cur_channel]);
@@ -1699,7 +1689,6 @@ static unsigned int s2255_poll(struct file *file,
 static void s2255_destroy(struct kref *kref)
 {
        struct s2255_dev *dev = to_s2255_dev(kref);
-        struct list_head *list;
        int i;
        if (!dev) {
                printk(KERN_ERR "s2255drv: kref problem\n");
@@ -1733,10 +1722,6 @@ static void s2255_destroy(struct kref *kref)
        usb_put_dev(dev->udev);
        dprintk(1, "%s", __func__);
-        while (!list_empty(&s2255_devlist)) {
-                list = s2255_devlist.next;
-                list_del(list);
-        }
        mutex_unlock(&dev->open_lock);
        kfree(dev);
 }
@@ -1745,7 +1730,8 @@ static int s2255_close(struct file *file)
 {
        struct s2255_fh *fh = file->private_data;
        struct s2255_dev *dev = fh->dev;
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
        if (!dev)
                return -ENODEV;
@@ -1765,8 +1751,8 @@ static int s2255_close(struct file *file)
        mutex_unlock(&dev->open_lock);
        kref_put(&dev->kref, s2255_destroy);
-        dprintk(1, "s2255: close called (minor=%d, users=%d)\n",
+        dprintk(1, "s2255: close called (dev=%s, users=%d)\n",
-                minor, dev->users[fh->channel]);
+                video_device_node_name(vdev), dev->users[fh->channel]);
        kfree(fh);
        return 0;
 }
@@ -1830,7 +1816,6 @@ static struct video_device template = {
        .name = "s2255v",
        .fops = &s2255_fops_v4l,
        .ioctl_ops = &s2255_ioctl_ops,
-        .minor = -1,
        .release = video_device_release,
        .tvnorms = S2255_NORMS,
        .current_norm = V4L2_STD_NTSC_M,
@@ -1843,7 +1828,6 @@ static int s2255_probe_v4l(struct s2255_dev *dev)
        int cur_nr = video_nr;
        /* initialize all video 4 linux */
-        list_add_tail(&dev->s2255_devlist, &s2255_devlist);
        /* register 4 video devices */
        for (i = 0; i < MAX_CHANNELS; i++) {
                INIT_LIST_HEAD(&dev->vidq[i].active);
@@ -1853,6 +1837,7 @@ static int s2255_probe_v4l(struct s2255_dev *dev)
                dev->vdev[i] = video_device_alloc();
                memcpy(dev->vdev[i], &template, sizeof(struct video_device));
                dev->vdev[i]->parent = &dev->interface->dev;
+                video_set_drvdata(dev->vdev[i], dev);
                if (video_nr == -1)
                        ret = video_register_device(dev->vdev[i],
                                                    VFL_TYPE_GRABBER,
@@ -1880,7 +1865,7 @@ static void s2255_exit_v4l(struct s2255_dev *dev)
        int i;
        for (i = 0; i < MAX_CHANNELS; i++) {
-                if (-1 != dev->vdev[i]->minor) {
+                if (video_is_registered(dev->vdev[i])) {
                        video_unregister_device(dev->vdev[i]);
                        printk(KERN_INFO "s2255 unregistered\n");
                } else {
diff --git a/drivers/media/video/saa5246a.c b/drivers/media/video/saa5246a.c
index b624a4c01fdc..5ab6a0f901c0 100644
--- a/drivers/media/video/saa5246a.c
+++ b/drivers/media/video/saa5246a.c
@@ -1036,7 +1036,6 @@ static struct video_device saa_template =
        .name     = "saa5246a",
        .fops     = &saa_fops,
        .release  = video_device_release,
-        .minor    = -1,
 };
 static int saa5246a_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
diff --git a/drivers/media/video/saa7134/saa7134-cards.c b/drivers/media/video/saa7134/saa7134-cards.c
index 7e40d6d99dd0..03f572708b85 100644
--- a/drivers/media/video/saa7134/saa7134-cards.c
+++ b/drivers/media/video/saa7134/saa7134-cards.c
@@ -7211,9 +7211,31 @@ int saa7134_board_init2(struct saa7134_dev *dev)
        }
        case SAA7134_BOARD_FLYDVB_TRIO:
        {
+                u8 temp = 0;
+                int rc;
                u8 data[] = { 0x3c, 0x33, 0x62};
                struct i2c_msg msg = {.addr=0x09, .flags=0, .buf=data, .len = sizeof(data)};
                i2c_transfer(&dev->i2c_adap, &msg, 1);
+                /*
+                 * send weak up message to pic16C505 chip
+                 * @ LifeView FlyDVB Trio
+                 */
+                msg.buf = &temp;
+                msg.addr = 0x0b;
+                msg.len = 1;
+                if (1 != i2c_transfer(&dev->i2c_adap, &msg, 1)) {
+                        printk(KERN_WARNING "%s: send wake up byte to pic16C505"
+                                        "(IR chip) failed\n", dev->name);
+                } else {
+                        msg.flags = I2C_M_RD;
+                        rc = i2c_transfer(&dev->i2c_adap, &msg, 1);
+                        printk(KERN_INFO "%s: probe IR chip @ i2c 0x%02x: %s\n",
+                                   dev->name, msg.addr,
+                                   (1 == rc) ? "yes" : "no");
+                        if (rc == 1)
+                                dev->has_remote = SAA7134_REMOTE_I2C;
+                }
                break;
        }
        case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
diff --git a/drivers/media/video/saa7134/saa7134-core.c b/drivers/media/video/saa7134/saa7134-core.c
index 0ba7f5af0fc3..9f85e917f9f3 100644
--- a/drivers/media/video/saa7134/saa7134-core.c
+++ b/drivers/media/video/saa7134/saa7134-core.c
@@ -797,27 +797,28 @@ static struct video_device *vdev_init(struct saa7134_dev *dev,
        vfd->debug   = video_debug;
        snprintf(vfd->name, sizeof(vfd->name), "%s %s (%s)",
                 dev->name, type, saa7134_boards[dev->board].name);
+        video_set_drvdata(vfd, dev);
        return vfd;
 }
 static void saa7134_unregister_video(struct saa7134_dev *dev)
 {
        if (dev->video_dev) {
-                if (-1 != dev->video_dev->minor)
+                if (video_is_registered(dev->video_dev))
                        video_unregister_device(dev->video_dev);
                else
                        video_device_release(dev->video_dev);
                dev->video_dev = NULL;
        }
        if (dev->vbi_dev) {
-                if (-1 != dev->vbi_dev->minor)
+                if (video_is_registered(dev->vbi_dev))
                        video_unregister_device(dev->vbi_dev);
                else
                        video_device_release(dev->vbi_dev);
                dev->vbi_dev = NULL;
        }
        if (dev->radio_dev) {
-                if (-1 != dev->radio_dev->minor)
+                if (video_is_registered(dev->radio_dev))
                        video_unregister_device(dev->radio_dev);
                else
                        video_device_release(dev->radio_dev);
@@ -1046,8 +1047,8 @@ static int __devinit saa7134_initdev(struct pci_dev *pci_dev,
                       dev->name);
                goto fail4;
        }
-        printk(KERN_INFO "%s: registered device video%d [v4l2]\n",
+        printk(KERN_INFO "%s: registered device %s [v4l2]\n",
-               dev->name, dev->video_dev->num);
+               dev->name, video_device_node_name(dev->video_dev));
        dev->vbi_dev = vdev_init(dev, &saa7134_video_template, "vbi");
@@ -1055,8 +1056,8 @@ static int __devinit saa7134_initdev(struct pci_dev *pci_dev,
                                    vbi_nr[dev->nr]);
        if (err < 0)
                goto fail4;
-        printk(KERN_INFO "%s: registered device vbi%d\n",
+        printk(KERN_INFO "%s: registered device %s\n",
-               dev->name, dev->vbi_dev->num);
+               dev->name, video_device_node_name(dev->vbi_dev));
        if (card_has_radio(dev)) {
                dev->radio_dev = vdev_init(dev,&saa7134_radio_template,"radio");
@@ -1064,8 +1065,8 @@ static int __devinit saa7134_initdev(struct pci_dev *pci_dev,
                                            radio_nr[dev->nr]);
                if (err < 0)
                        goto fail4;
-                printk(KERN_INFO "%s: registered device radio%d\n",
+                printk(KERN_INFO "%s: registered device %s\n",
-                       dev->name, dev->radio_dev->num);
+                       dev->name, video_device_node_name(dev->radio_dev));
        }
        /* everything worked */
diff --git a/drivers/media/video/saa7134/saa7134-empress.c b/drivers/media/video/saa7134/saa7134-empress.c
index 296788c3bf0e..7dfecfc6017c 100644
--- a/drivers/media/video/saa7134/saa7134-empress.c
+++ b/drivers/media/video/saa7134/saa7134-empress.c
@@ -86,19 +86,11 @@ static int ts_init_encoder(struct saa7134_dev* dev)
 static int ts_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct saa7134_dev *dev;
+        struct saa7134_dev *dev = video_drvdata(file);
        int err;
-        lock_kernel();
+        dprintk("open dev=%s\n", video_device_node_name(vdev));
-        list_for_each_entry(dev, &saa7134_devlist, devlist)
-                if (dev->empress_dev && dev->empress_dev->minor == minor)
-                        goto found;
-        unlock_kernel();
-        return -ENODEV;
- found:
-        dprintk("open minor=%d\n",minor);
        err = -EBUSY;
        if (!mutex_trylock(&dev->empress_tsq.vb_lock))
                goto done;
@@ -489,7 +481,6 @@ static const struct v4l2_ioctl_ops ts_ioctl_ops = {
 static struct video_device saa7134_empress_template = {
        .name          = "saa7134-empress",
        .fops          = &ts_fops,
-        .minor         = -1,
        .ioctl_ops     = &ts_ioctl_ops,
        .tvnorms                        = SAA7134_NORMS,
@@ -531,6 +522,7 @@ static int empress_init(struct saa7134_dev *dev)
        INIT_WORK(&dev->empress_workqueue, empress_signal_update);
+        video_set_drvdata(dev->empress_dev, dev);
        err = video_register_device(dev->empress_dev,VFL_TYPE_GRABBER,
                                    empress_nr[dev->nr]);
        if (err < 0) {
@@ -540,8 +532,8 @@ static int empress_init(struct saa7134_dev *dev)
                dev->empress_dev = NULL;
                return err;
        }
-        printk(KERN_INFO "%s: registered device video%d [mpeg]\n",
+        printk(KERN_INFO "%s: registered device %s [mpeg]\n",
-               dev->name, dev->empress_dev->num);
+               dev->name, video_device_node_name(dev->empress_dev));
        videobuf_queue_sg_init(&dev->empress_tsq, &saa7134_ts_qops,
                            &dev->pci->dev, &dev->slock,
diff --git a/drivers/media/video/saa7134/saa7134-input.c b/drivers/media/video/saa7134/saa7134-input.c
index 744918b1cd47..f8e985989ca0 100644
--- a/drivers/media/video/saa7134/saa7134-input.c
+++ b/drivers/media/video/saa7134/saa7134-input.c
@@ -127,6 +127,61 @@ static int build_key(struct saa7134_dev *dev)
 /* --------------------- Chip specific I2C key builders ----------------- */
+static int get_key_flydvb_trio(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)
+{
+        int gpio;
+        int attempt = 0;
+        unsigned char b;
+        /* We need this to access GPI Used by the saa_readl macro. */
+        struct saa7134_dev *dev = ir->c->adapter->algo_data;
+        if (dev == NULL) {
+                dprintk("get_key_flydvb_trio: "
+                         "gir->c->adapter->algo_data is NULL!\n");
+                return -EIO;
+        }
+        /* rising SAA7134_GPIGPRESCAN reads the status */
+        saa_clearb(SAA7134_GPIO_GPMODE3, SAA7134_GPIO_GPRESCAN);
+        saa_setb(SAA7134_GPIO_GPMODE3, SAA7134_GPIO_GPRESCAN);
+        gpio = saa_readl(SAA7134_GPIO_GPSTATUS0 >> 2);
+        if (0x40000 & ~gpio)
+                return 0; /* No button press */
+        /* No button press - only before first key pressed */
+        if (b == 0xFF)
+                return 0;
+        /* poll IR chip */
+        /* weak up the IR chip */
+        b = 0;
+        while (1 != i2c_master_send(ir->c, &b, 1)) {
+                if ((attempt++) < 10) {
+                        /*
+                         * wait a bit for next attempt -
+                         * I don't know how make it better
+                         */
+                        msleep(10);
+                        continue;
+                }
+                i2cdprintk("send wake up byte to pic16C505 (IR chip)"
+                           "failed %dx\n", attempt);
+                return -EIO;
+        }
+        if (1 != i2c_master_recv(ir->c, &b, 1)) {
+                i2cdprintk("read error\n");
+                return -EIO;
+        }
+        *ir_key = b;
+        *ir_raw = b;
+        return 1;
+}
 static int get_key_msi_tvanywhere_plus(struct IR_i2c *ir, u32 *ir_key,
                                       u32 *ir_raw)
 {
@@ -622,6 +677,7 @@ int saa7134_input_init1(struct saa7134_dev *dev)
                mask_keyup   = 0x020000;
                polling      = 50; /* ms */
                break;
+        break;
        }
        if (NULL == ir_codes) {
                printk("%s: Oops: IR config error [card=%d]\n",
@@ -652,7 +708,7 @@ int saa7134_input_init1(struct saa7134_dev *dev)
        snprintf(ir->phys, sizeof(ir->phys), "pci-%s/ir0",
                 pci_name(dev->pci));
-        err = ir_input_init(input_dev, &ir->ir, ir_type, ir_codes);
+        err = ir_input_init(input_dev, &ir->ir, ir_type);
        if (err < 0)
                goto err_out_free;
@@ -672,7 +728,7 @@ int saa7134_input_init1(struct saa7134_dev *dev)
        dev->remote = ir;
        saa7134_ir_start(dev, ir);
-        err = input_register_device(ir->dev);
+        err = ir_input_register(ir->dev, ir_codes);
        if (err)
                goto err_out_stop;
@@ -686,8 +742,6 @@ int saa7134_input_init1(struct saa7134_dev *dev)
        saa7134_ir_stop(dev);
        dev->remote = NULL;
 err_out_free:
-        ir_input_free(input_dev);
-        input_free_device(input_dev);
        kfree(ir);
        return err;
 }
@@ -698,8 +752,7 @@ void saa7134_input_fini(struct saa7134_dev *dev)
                return;
        saa7134_ir_stop(dev);
-        ir_input_free(dev->remote->dev);
+        ir_input_unregister(dev->remote->dev);
-        input_unregister_device(dev->remote->dev);
        kfree(dev->remote);
        dev->remote = NULL;
 }
@@ -788,6 +841,12 @@ void saa7134_probe_i2c_ir(struct saa7134_dev *dev)
        case SAA7134_BOARD_AVERMEDIA_CARDBUS_506:
                info.addr = 0x40;
                break;
+        case SAA7134_BOARD_FLYDVB_TRIO:
+                dev->init_data.name = "FlyDVB Trio";
+                dev->init_data.get_key = get_key_flydvb_trio;
+                dev->init_data.ir_codes = &ir_codes_flydvb_table;
+                info.addr = 0x0b;
+                break;
        default:
                dprintk("No I2C IR support for board %x\n", dev->board);
                return;
diff --git a/drivers/media/video/saa7134/saa7134-video.c b/drivers/media/video/saa7134/saa7134-video.c
index 35f8daa3a359..cb732640ac4a 100644
--- a/drivers/media/video/saa7134/saa7134-video.c
+++ b/drivers/media/video/saa7134/saa7134-video.c
@@ -1326,33 +1326,26 @@ static int saa7134_resource(struct saa7134_fh *fh)
 static int video_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct saa7134_dev *dev;
+        struct saa7134_dev *dev = video_drvdata(file);
        struct saa7134_fh *fh;
-        enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+        enum v4l2_buf_type type = 0;
        int radio = 0;
-        mutex_lock(&saa7134_devlist_lock);
+        switch (vdev->vfl_type) {
-        list_for_each_entry(dev, &saa7134_devlist, devlist) {
+        case VFL_TYPE_GRABBER:
-                if (dev->video_dev && (dev->video_dev->minor == minor))
+                type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                        goto found;
+                break;
-                if (dev->radio_dev && (dev->radio_dev->minor == minor)) {
+        case VFL_TYPE_VBI:
-                        radio = 1;
+                type = V4L2_BUF_TYPE_VBI_CAPTURE;
-                        goto found;
+                break;
-                }
+        case VFL_TYPE_RADIO:
-                if (dev->vbi_dev && (dev->vbi_dev->minor == minor)) {
+                radio = 1;
-                        type = V4L2_BUF_TYPE_VBI_CAPTURE;
+                break;
-                        goto found;
-                }
        }
-        mutex_unlock(&saa7134_devlist_lock);
-        return -ENODEV;
-found:
-        mutex_unlock(&saa7134_devlist_lock);
-        dprintk("open minor=%d radio=%d type=%s\n",minor,radio,
+        dprintk("open dev=%s radio=%d type=%s\n", video_device_node_name(vdev),
-                v4l2_type_names[type]);
+                radio, v4l2_type_names[type]);
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh),GFP_KERNEL);
@@ -2502,7 +2495,6 @@ struct video_device saa7134_video_template = {
        .name                           = "saa7134-video",
        .fops                           = &video_fops,
        .ioctl_ops                      = &video_ioctl_ops,
-        .minor                          = -1,
        .tvnorms                        = SAA7134_NORMS,
        .current_norm                   = V4L2_STD_PAL,
 };
@@ -2511,7 +2503,6 @@ struct video_device saa7134_radio_template = {
        .name                   = "saa7134-radio",
        .fops                   = &radio_fops,
        .ioctl_ops              = &radio_ioctl_ops,
-        .minor                  = -1,
 };
 int saa7134_video_init1(struct saa7134_dev *dev)
diff --git a/drivers/media/video/se401.c b/drivers/media/video/se401.c
index 85ffc2cba039..41d0166c0f95 100644
--- a/drivers/media/video/se401.c
+++ b/drivers/media/video/se401.c
@@ -1428,8 +1428,8 @@ static int se401_probe(struct usb_interface *intf,
                err("video_register_device failed");
                return -EIO;
        }
-        dev_info(&intf->dev, "registered new video device: video%d\n",
+        dev_info(&intf->dev, "registered new video device: %s\n",
-                 se401->vdev.num);
+                 video_device_node_name(&se401->vdev));
        usb_set_intfdata(intf, se401);
        return 0;
diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c
index 961e4484d721..d69363f0d8c9 100644
--- a/drivers/media/video/sh_mobile_ceu_camera.c
+++ b/drivers/media/video/sh_mobile_ceu_camera.c
@@ -38,6 +38,8 @@
 #include <media/soc_camera.h>
 #include <media/sh_mobile_ceu.h>
 #include <media/videobuf-dma-contig.h>
+#include <media/v4l2-mediabus.h>
+#include <media/soc_mediabus.h>
 /* register offsets for sh7722 / sh7723 */
@@ -85,7 +87,7 @@
 /* per video frame buffer */
 struct sh_mobile_ceu_buffer {
        struct videobuf_buffer vb; /* v4l buffer must be first */
-        const struct soc_camera_data_format *fmt;
+        enum v4l2_mbus_pixelcode code;
 };
 struct sh_mobile_ceu_dev {
@@ -105,7 +107,8 @@ struct sh_mobile_ceu_dev {
        u32 cflcr;
-        unsigned int is_interlaced:1;
+        enum v4l2_field field;
        unsigned int image_mode:1;
        unsigned int is_16bit:1;
 };
@@ -114,8 +117,8 @@ struct sh_mobile_ceu_cam {
        struct v4l2_rect ceu_rect;
        unsigned int cam_width;
        unsigned int cam_height;
-        const struct soc_camera_data_format *extra_fmt;
+        const struct soc_mbus_pixelfmt *extra_fmt;
-        const struct soc_camera_data_format *camera_fmt;
+        enum v4l2_mbus_pixelcode code;
 };
 static unsigned long make_bus_param(struct sh_mobile_ceu_dev *pcdev)
@@ -197,16 +200,19 @@ static int sh_mobile_ceu_videobuf_setup(struct videobuf_queue *vq,
        struct soc_camera_device *icd = vq->priv_data;
        struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
        struct sh_mobile_ceu_dev *pcdev = ici->priv;
-        int bytes_per_pixel = (icd->current_fmt->depth + 7) >> 3;
+        int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
+                                                icd->current_fmt->host_fmt);
+        if (bytes_per_line < 0)
+                return bytes_per_line;
-        *size = PAGE_ALIGN(icd->user_width * icd->user_height *
+        *size = bytes_per_line * icd->user_height;
-                           bytes_per_pixel);
        if (0 == *count)
                *count = 2;
        if (pcdev->video_limit) {
-                while (*size * *count > pcdev->video_limit)
+                while (PAGE_ALIGN(*size) * *count > pcdev->video_limit)
                        (*count)--;
        }
@@ -249,10 +255,13 @@ static int sh_mobile_ceu_capture(struct sh_mobile_ceu_dev *pcdev)
 {
        struct soc_camera_device *icd = pcdev->icd;
        dma_addr_t phys_addr_top, phys_addr_bottom;
+        unsigned long top1, top2;
+        unsigned long bottom1, bottom2;
        u32 status;
        int ret = 0;
-        /* The hardware is _very_ picky about this sequence. Especially
+        /*
+         * The hardware is _very_ picky about this sequence. Especially
         * the CEU_CETCR_MAGIC value. It seems like we need to acknowledge
         * several not-so-well documented interrupt sources in CETCR.
         */
@@ -276,25 +285,36 @@ static int sh_mobile_ceu_capture(struct sh_mobile_ceu_dev *pcdev)
        if (!pcdev->active)
                return ret;
+        if (V4L2_FIELD_INTERLACED_BT == pcdev->field) {
+                top1    = CDBYR;
+                top2    = CDBCR;
+                bottom1 = CDAYR;
+                bottom2 = CDACR;
+        } else {
+                top1    = CDAYR;
+                top2    = CDACR;
+                bottom1 = CDBYR;
+                bottom2 = CDBCR;
+        }
        phys_addr_top = videobuf_to_dma_contig(pcdev->active);
-        ceu_write(pcdev, CDAYR, phys_addr_top);
+        ceu_write(pcdev, top1, phys_addr_top);
-        if (pcdev->is_interlaced) {
+        if (V4L2_FIELD_NONE != pcdev->field) {
                phys_addr_bottom = phys_addr_top + icd->user_width;
-                ceu_write(pcdev, CDBYR, phys_addr_bottom);
+                ceu_write(pcdev, bottom1, phys_addr_bottom);
        }
-        switch (icd->current_fmt->fourcc) {
+        switch (icd->current_fmt->host_fmt->fourcc) {
        case V4L2_PIX_FMT_NV12:
        case V4L2_PIX_FMT_NV21:
        case V4L2_PIX_FMT_NV16:
        case V4L2_PIX_FMT_NV61:
                phys_addr_top += icd->user_width *
                        icd->user_height;
-                ceu_write(pcdev, CDACR, phys_addr_top);
+                ceu_write(pcdev, top2, phys_addr_top);
-                if (pcdev->is_interlaced) {
+                if (V4L2_FIELD_NONE != pcdev->field) {
-                        phys_addr_bottom = phys_addr_top +
+                        phys_addr_bottom = phys_addr_top + icd->user_width;
-                                icd->user_width;
+                        ceu_write(pcdev, bottom2, phys_addr_bottom);
-                        ceu_write(pcdev, CDBCR, phys_addr_bottom);
                }
        }
@@ -310,8 +330,13 @@ static int sh_mobile_ceu_videobuf_prepare(struct videobuf_queue *vq,
 {
        struct soc_camera_device *icd = vq->priv_data;
        struct sh_mobile_ceu_buffer *buf;
+        int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
+                                                icd->current_fmt->host_fmt);
        int ret;
+        if (bytes_per_line < 0)
+                return bytes_per_line;
        buf = container_of(vb, struct sh_mobile_ceu_buffer, vb);
        dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %zd\n", __func__,
@@ -321,25 +346,27 @@ static int sh_mobile_ceu_videobuf_prepare(struct videobuf_queue *vq,
        WARN_ON(!list_empty(&vb->queue));
 #ifdef DEBUG
-        /* This can be useful if you want to see if we actually fill
+        /*
-         * the buffer with something */
+         * This can be useful if you want to see if we actually fill
+         * the buffer with something
+         */
        memset((void *)vb->baddr, 0xaa, vb->bsize);
 #endif
        BUG_ON(NULL == icd->current_fmt);
-        if (buf->fmt    != icd->current_fmt ||
+        if (buf->code   != icd->current_fmt->code ||
            vb->width   != icd->user_width ||
            vb->height  != icd->user_height ||
            vb->field   != field) {
-                buf->fmt        = icd->current_fmt;
+                buf->code       = icd->current_fmt->code;
                vb->width       = icd->user_width;
                vb->height      = icd->user_height;
                vb->field       = field;
                vb->state       = VIDEOBUF_NEEDS_INIT;
        }
-        vb->size = vb->width * vb->height * ((buf->fmt->depth + 7) >> 3);
+        vb->size = vb->height * bytes_per_line;
        if (0 != vb->baddr && vb->bsize < vb->size) {
                ret = -EINVAL;
                goto out;
@@ -456,6 +483,7 @@ static int sh_mobile_ceu_add_device(struct soc_camera_device *icd)
 {
        struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
        struct sh_mobile_ceu_dev *pcdev = ici->priv;
+        int ret;
        if (pcdev->icd)
                return -EBUSY;
@@ -466,9 +494,11 @@ static int sh_mobile_ceu_add_device(struct soc_camera_device *icd)
        pm_runtime_get_sync(ici->v4l2_dev.dev);
-        pcdev->icd = icd;
+        ret = sh_mobile_ceu_soft_reset(pcdev);
+        if (!ret)
+                pcdev->icd = icd;
-        return sh_mobile_ceu_soft_reset(pcdev);
+        return ret;
 }
 /* Called with .video_lock held */
@@ -558,24 +588,35 @@ static void sh_mobile_ceu_set_rect(struct soc_camera_device *icd,
                        in_width *= 2;
                        left_offset *= 2;
                }
-                width = cdwdr_width = out_width;
+                width = out_width;
+                cdwdr_width = out_width;
        } else {
-                unsigned int w_factor = (icd->current_fmt->depth + 7) >> 3;
+                int bytes_per_line = soc_mbus_bytes_per_line(out_width,
+                                                icd->current_fmt->host_fmt);
+                unsigned int w_factor;
-                width = out_width * w_factor / 2;
+                width = out_width;
-                if (!pcdev->is_16bit)
+                switch (icd->current_fmt->host_fmt->packing) {
-                        w_factor *= 2;
+                case SOC_MBUS_PACKING_2X8_PADHI:
+                        w_factor = 2;
+                        break;
+                default:
+                        w_factor = 1;
+                }
-                in_width = rect->width * w_factor / 2;
+                in_width = rect->width * w_factor;
-                left_offset = left_offset * w_factor / 2;
+                left_offset = left_offset * w_factor;
-                cdwdr_width = width * 2;
+                if (bytes_per_line < 0)
+                        cdwdr_width = out_width;
+                else
+                        cdwdr_width = bytes_per_line;
        }
        height = out_height;
        in_height = rect->height;
-        if (pcdev->is_interlaced) {
+        if (V4L2_FIELD_NONE != pcdev->field) {
                height /= 2;
                in_height /= 2;
                top_offset /= 2;
@@ -646,6 +687,23 @@ static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd,
        if (!common_flags)
                return -EINVAL;
+        /* Make choises, based on platform preferences */
+        if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) &&
+            (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) {
+                if (pcdev->pdata->flags & SH_CEU_FLAG_HSYNC_LOW)
+                        common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH;
+                else
+                        common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW;
+        }
+        if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
+            (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
+                if (pcdev->pdata->flags & SH_CEU_FLAG_VSYNC_LOW)
+                        common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
+                else
+                        common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
+        }
        ret = icd->ops->set_bus_param(icd, common_flags);
        if (ret < 0)
                return ret;
@@ -667,24 +725,24 @@ static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd,
        value = 0x00000010; /* data fetch by default */
        yuv_lineskip = 0;
-        switch (icd->current_fmt->fourcc) {
+        switch (icd->current_fmt->host_fmt->fourcc) {
        case V4L2_PIX_FMT_NV12:
        case V4L2_PIX_FMT_NV21:
                yuv_lineskip = 1; /* skip for NV12/21, no skip for NV16/61 */
                /* fall-through */
        case V4L2_PIX_FMT_NV16:
        case V4L2_PIX_FMT_NV61:
-                switch (cam->camera_fmt->fourcc) {
+                switch (cam->code) {
-                case V4L2_PIX_FMT_UYVY:
+                case V4L2_MBUS_FMT_YUYV8_2X8_BE:
                        value = 0x00000000; /* Cb0, Y0, Cr0, Y1 */
                        break;
-                case V4L2_PIX_FMT_VYUY:
+                case V4L2_MBUS_FMT_YVYU8_2X8_BE:
                        value = 0x00000100; /* Cr0, Y0, Cb0, Y1 */
                        break;
-                case V4L2_PIX_FMT_YUYV:
+                case V4L2_MBUS_FMT_YUYV8_2X8_LE:
                        value = 0x00000200; /* Y0, Cb0, Y1, Cr0 */
                        break;
-                case V4L2_PIX_FMT_YVYU:
+                case V4L2_MBUS_FMT_YVYU8_2X8_LE:
                        value = 0x00000300; /* Y0, Cr0, Y1, Cb0 */
                        break;
                default:
@@ -692,8 +750,8 @@ static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd,
                }
        }
-        if (icd->current_fmt->fourcc == V4L2_PIX_FMT_NV21 ||
+        if (icd->current_fmt->host_fmt->fourcc == V4L2_PIX_FMT_NV21 ||
-            icd->current_fmt->fourcc == V4L2_PIX_FMT_NV61)
+            icd->current_fmt->host_fmt->fourcc == V4L2_PIX_FMT_NV61)
                value ^= 0x00000100; /* swap U, V to change from NV1x->NVx1 */
        value |= common_flags & SOCAM_VSYNC_ACTIVE_LOW ? 1 << 1 : 0;
@@ -702,14 +760,27 @@ static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd,
        ceu_write(pcdev, CAMCR, value);
        ceu_write(pcdev, CAPCR, 0x00300000);
-        ceu_write(pcdev, CAIFR, pcdev->is_interlaced ? 0x101 : 0);
+        switch (pcdev->field) {
+        case V4L2_FIELD_INTERLACED_TB:
+                value = 0x101;
+                break;
+        case V4L2_FIELD_INTERLACED_BT:
+                value = 0x102;
+                break;
+        default:
+                value = 0;
+                break;
+        }
+        ceu_write(pcdev, CAIFR, value);
        sh_mobile_ceu_set_rect(icd, icd->user_width, icd->user_height);
        mdelay(1);
        ceu_write(pcdev, CFLCR, pcdev->cflcr);
-        /* A few words about byte order (observed in Big Endian mode)
+        /*
+         * A few words about byte order (observed in Big Endian mode)
         *
         * In data fetch mode bytes are received in chunks of 8 bytes.
         * D0, D1, D2, D3, D4, D5, D6, D7 (D0 received first)
@@ -739,7 +810,8 @@ static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd,
        return 0;
 }
-static int sh_mobile_ceu_try_bus_param(struct soc_camera_device *icd)
+static int sh_mobile_ceu_try_bus_param(struct soc_camera_device *icd,
+                                       unsigned char buswidth)
 {
        struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
        struct sh_mobile_ceu_dev *pcdev = ici->priv;
@@ -748,48 +820,75 @@ static int sh_mobile_ceu_try_bus_param(struct soc_camera_device *icd)
        camera_flags = icd->ops->query_bus_param(icd);
        common_flags = soc_camera_bus_param_compatible(camera_flags,
                                                       make_bus_param(pcdev));
-        if (!common_flags)
+        if (!common_flags || buswidth > 16 ||
+            (buswidth > 8 && !(common_flags & SOCAM_DATAWIDTH_16)))
                return -EINVAL;
        return 0;
 }
-static const struct soc_camera_data_format sh_mobile_ceu_formats[] = {
+static const struct soc_mbus_pixelfmt sh_mobile_ceu_formats[] = {
-        {
-                .name           = "NV12",
-                .depth          = 12,
-                .fourcc         = V4L2_PIX_FMT_NV12,
-                .colorspace     = V4L2_COLORSPACE_JPEG,
-        },
-        {
-                .name           = "NV21",
-                .depth          = 12,
-                .fourcc         = V4L2_PIX_FMT_NV21,
-                .colorspace     = V4L2_COLORSPACE_JPEG,
-        },
-        {
-                .name           = "NV16",
-                .depth          = 16,
-                .fourcc         = V4L2_PIX_FMT_NV16,
-                .colorspace     = V4L2_COLORSPACE_JPEG,
-        },
        {
-                .name           = "NV61",
+                .fourcc                 = V4L2_PIX_FMT_NV12,
-                .depth          = 16,
+                .name                   = "NV12",
-                .fourcc         = V4L2_PIX_FMT_NV61,
+                .bits_per_sample        = 12,
-                .colorspace     = V4L2_COLORSPACE_JPEG,
+                .packing                = SOC_MBUS_PACKING_NONE,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, {
+                .fourcc                 = V4L2_PIX_FMT_NV21,
+                .name                   = "NV21",
+                .bits_per_sample        = 12,
+                .packing                = SOC_MBUS_PACKING_NONE,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, {
+                .fourcc                 = V4L2_PIX_FMT_NV16,
+                .name                   = "NV16",
+                .bits_per_sample        = 16,
+                .packing                = SOC_MBUS_PACKING_NONE,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, {
+                .fourcc                 = V4L2_PIX_FMT_NV61,
+                .name                   = "NV61",
+                .bits_per_sample        = 16,
+                .packing                = SOC_MBUS_PACKING_NONE,
+                .order                  = SOC_MBUS_ORDER_LE,
        },
 };
+/* This will be corrected as we get more formats */
+static bool sh_mobile_ceu_packing_supported(const struct soc_mbus_pixelfmt *fmt)
+{
+        return  fmt->packing == SOC_MBUS_PACKING_NONE ||
+                (fmt->bits_per_sample == 8 &&
+                 fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) ||
+                (fmt->bits_per_sample > 8 &&
+                 fmt->packing == SOC_MBUS_PACKING_EXTEND16);
+}
 static int sh_mobile_ceu_get_formats(struct soc_camera_device *icd, int idx,
                                     struct soc_camera_format_xlate *xlate)
 {
+        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
        struct device *dev = icd->dev.parent;
        int ret, k, n;
        int formats = 0;
        struct sh_mobile_ceu_cam *cam;
+        enum v4l2_mbus_pixelcode code;
+        const struct soc_mbus_pixelfmt *fmt;
-        ret = sh_mobile_ceu_try_bus_param(icd);
+        ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code);
+        if (ret < 0)
+                /* No more formats */
+                return 0;
+        fmt = soc_mbus_get_fmtdesc(code);
+        if (!fmt) {
+                dev_err(icd->dev.parent,
+                        "Invalid format code #%d: %d\n", idx, code);
+                return -EINVAL;
+        }
+        ret = sh_mobile_ceu_try_bus_param(icd, fmt->bits_per_sample);
        if (ret < 0)
                return 0;
@@ -807,13 +906,13 @@ static int sh_mobile_ceu_get_formats(struct soc_camera_device *icd, int idx,
        if (!idx)
                cam->extra_fmt = NULL;
-        switch (icd->formats[idx].fourcc) {
+        switch (code) {
-        case V4L2_PIX_FMT_UYVY:
+        case V4L2_MBUS_FMT_YUYV8_2X8_BE:
-        case V4L2_PIX_FMT_VYUY:
+        case V4L2_MBUS_FMT_YVYU8_2X8_BE:
-        case V4L2_PIX_FMT_YUYV:
+        case V4L2_MBUS_FMT_YUYV8_2X8_LE:
-        case V4L2_PIX_FMT_YVYU:
+        case V4L2_MBUS_FMT_YVYU8_2X8_LE:
                if (cam->extra_fmt)
-                        goto add_single_format;
+                        break;
                /*
                 * Our case is simple so far: for any of the above four camera
@@ -824,32 +923,31 @@ static int sh_mobile_ceu_get_formats(struct soc_camera_device *icd, int idx,
                 * the host_priv pointer and check whether the format you're
                 * going to add now is already there.
                 */
-                cam->extra_fmt = (void *)sh_mobile_ceu_formats;
+                cam->extra_fmt = sh_mobile_ceu_formats;
                n = ARRAY_SIZE(sh_mobile_ceu_formats);
                formats += n;
                for (k = 0; xlate && k < n; k++) {
-                        xlate->host_fmt = &sh_mobile_ceu_formats[k];
+                        xlate->host_fmt = &sh_mobile_ceu_formats[k];
-                        xlate->cam_fmt = icd->formats + idx;
+                        xlate->code     = code;
-                        xlate->buswidth = icd->formats[idx].depth;
                        xlate++;
-                        dev_dbg(dev, "Providing format %s using %s\n",
+                        dev_dbg(dev, "Providing format %s using code %d\n",
-                                sh_mobile_ceu_formats[k].name,
+                                sh_mobile_ceu_formats[k].name, code);
-                                icd->formats[idx].name);
                }
+                break;
        default:
-add_single_format:
+                if (!sh_mobile_ceu_packing_supported(fmt))
-                /* Generic pass-through */
+                        return 0;
-                formats++;
+        }
-                if (xlate) {
-                        xlate->host_fmt = icd->formats + idx;
+        /* Generic pass-through */
-                        xlate->cam_fmt = icd->formats + idx;
+        formats++;
-                        xlate->buswidth = icd->formats[idx].depth;
+        if (xlate) {
-                        xlate++;
+                xlate->host_fmt = fmt;
-                        dev_dbg(dev,
+                xlate->code     = code;
-                                "Providing format %s in pass-through mode\n",
+                xlate++;
-                                icd->formats[idx].name);
+                dev_dbg(dev, "Providing format %s in pass-through mode\n",
-                }
+                        xlate->host_fmt->name);
        }
        return formats;
@@ -1029,17 +1127,15 @@ static int client_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *crop,
 static int get_camera_scales(struct v4l2_subdev *sd, struct v4l2_rect *rect,
                             unsigned int *scale_h, unsigned int *scale_v)
 {
-        struct v4l2_format f;
+        struct v4l2_mbus_framefmt mf;
        int ret;
-        f.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+        ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mf);
-        ret = v4l2_subdev_call(sd, video, g_fmt, &f);
        if (ret < 0)
                return ret;
-        *scale_h = calc_generic_scale(rect->width, f.fmt.pix.width);
+        *scale_h = calc_generic_scale(rect->width, mf.width);
-        *scale_v = calc_generic_scale(rect->height, f.fmt.pix.height);
+        *scale_v = calc_generic_scale(rect->height, mf.height);
        return 0;
 }
@@ -1054,32 +1150,29 @@ static int get_camera_subwin(struct soc_camera_device *icd,
        if (!ceu_rect->width) {
                struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
                struct device *dev = icd->dev.parent;
-                struct v4l2_format f;
+                struct v4l2_mbus_framefmt mf;
-                struct v4l2_pix_format *pix = &f.fmt.pix;
                int ret;
                /* First time */
-                f.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+                ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mf);
-                ret = v4l2_subdev_call(sd, video, g_fmt, &f);
                if (ret < 0)
                        return ret;
-                dev_geo(dev, "camera fmt %ux%u\n", pix->width, pix->height);
+                dev_geo(dev, "camera fmt %ux%u\n", mf.width, mf.height);
-                if (pix->width > 2560) {
+                if (mf.width > 2560) {
                        ceu_rect->width  = 2560;
-                        ceu_rect->left   = (pix->width - 2560) / 2;
+                        ceu_rect->left   = (mf.width - 2560) / 2;
                } else {
-                        ceu_rect->width  = pix->width;
+                        ceu_rect->width  = mf.width;
                        ceu_rect->left   = 0;
                }
-                if (pix->height > 1920) {
+                if (mf.height > 1920) {
                        ceu_rect->height = 1920;
-                        ceu_rect->top    = (pix->height - 1920) / 2;
+                        ceu_rect->top    = (mf.height - 1920) / 2;
                } else {
-                        ceu_rect->height = pix->height;
+                        ceu_rect->height = mf.height;
                        ceu_rect->top    = 0;
                }
@@ -1096,13 +1189,12 @@ static int get_camera_subwin(struct soc_camera_device *icd,
        return 0;
 }
-static int client_s_fmt(struct soc_camera_device *icd, struct v4l2_format *f,
+static int client_s_fmt(struct soc_camera_device *icd,
-                        bool ceu_can_scale)
+                        struct v4l2_mbus_framefmt *mf, bool ceu_can_scale)
 {
        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
        struct device *dev = icd->dev.parent;
-        struct v4l2_pix_format *pix = &f->fmt.pix;
+        unsigned int width = mf->width, height = mf->height, tmp_w, tmp_h;
-        unsigned int width = pix->width, height = pix->height, tmp_w, tmp_h;
        unsigned int max_width, max_height;
        struct v4l2_cropcap cap;
        int ret;
@@ -1116,29 +1208,29 @@ static int client_s_fmt(struct soc_camera_device *icd, struct v4l2_format *f,
        max_width = min(cap.bounds.width, 2560);
        max_height = min(cap.bounds.height, 1920);
-        ret = v4l2_subdev_call(sd, video, s_fmt, f);
+        ret = v4l2_subdev_call(sd, video, s_mbus_fmt, mf);
        if (ret < 0)
                return ret;
-        dev_geo(dev, "camera scaled to %ux%u\n", pix->width, pix->height);
+        dev_geo(dev, "camera scaled to %ux%u\n", mf->width, mf->height);
-        if ((width == pix->width && height == pix->height) || !ceu_can_scale)
+        if ((width == mf->width && height == mf->height) || !ceu_can_scale)
                return 0;
        /* Camera set a format, but geometry is not precise, try to improve */
-        tmp_w = pix->width;
+        tmp_w = mf->width;
-        tmp_h = pix->height;
+        tmp_h = mf->height;
        /* width <= max_width && height <= max_height - guaranteed by try_fmt */
        while ((width > tmp_w || height > tmp_h) &&
               tmp_w < max_width && tmp_h < max_height) {
                tmp_w = min(2 * tmp_w, max_width);
                tmp_h = min(2 * tmp_h, max_height);
-                pix->width = tmp_w;
+                mf->width = tmp_w;
-                pix->height = tmp_h;
+                mf->height = tmp_h;
-                ret = v4l2_subdev_call(sd, video, s_fmt, f);
+                ret = v4l2_subdev_call(sd, video, s_mbus_fmt, mf);
                dev_geo(dev, "Camera scaled to %ux%u\n",
-                        pix->width, pix->height);
+                        mf->width, mf->height);
                if (ret < 0) {
                        /* This shouldn't happen */
                        dev_err(dev, "Client failed to set format: %d\n", ret);
@@ -1156,27 +1248,26 @@ static int client_s_fmt(struct soc_camera_device *icd, struct v4l2_format *f,
 */
 static int client_scale(struct soc_camera_device *icd, struct v4l2_rect *rect,
                        struct v4l2_rect *sub_rect, struct v4l2_rect *ceu_rect,
-                        struct v4l2_format *f, bool ceu_can_scale)
+                        struct v4l2_mbus_framefmt *mf, bool ceu_can_scale)
 {
        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
        struct sh_mobile_ceu_cam *cam = icd->host_priv;
        struct device *dev = icd->dev.parent;
-        struct v4l2_format f_tmp = *f;
+        struct v4l2_mbus_framefmt mf_tmp = *mf;
-        struct v4l2_pix_format *pix_tmp = &f_tmp.fmt.pix;
        unsigned int scale_h, scale_v;
        int ret;
        /* 5. Apply iterative camera S_FMT for camera user window. */
-        ret = client_s_fmt(icd, &f_tmp, ceu_can_scale);
+        ret = client_s_fmt(icd, &mf_tmp, ceu_can_scale);
        if (ret < 0)
                return ret;
        dev_geo(dev, "5: camera scaled to %ux%u\n",
-                pix_tmp->width, pix_tmp->height);
+                mf_tmp.width, mf_tmp.height);
        /* 6. Retrieve camera output window (g_fmt) */
-        /* unneeded - it is already in "f_tmp" */
+        /* unneeded - it is already in "mf_tmp" */
        /* 7. Calculate new camera scales. */
        ret = get_camera_scales(sd, rect, &scale_h, &scale_v);
@@ -1185,10 +1276,11 @@ static int client_scale(struct soc_camera_device *icd, struct v4l2_rect *rect,
        dev_geo(dev, "7: camera scales %u:%u\n", scale_h, scale_v);
-        cam->cam_width          = pix_tmp->width;
+        cam->cam_width  = mf_tmp.width;
-        cam->cam_height         = pix_tmp->height;
+        cam->cam_height = mf_tmp.height;
-        f->fmt.pix.width        = pix_tmp->width;
+        mf->width       = mf_tmp.width;
-        f->fmt.pix.height       = pix_tmp->height;
+        mf->height      = mf_tmp.height;
+        mf->colorspace  = mf_tmp.colorspace;
        /*
         * 8. Calculate new CEU crop - apply camera scales to previously
@@ -1252,8 +1344,7 @@ static int sh_mobile_ceu_set_crop(struct soc_camera_device *icd,
        struct v4l2_rect *cam_rect = &cam_crop.c, *ceu_rect = &cam->ceu_rect;
        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
        struct device *dev = icd->dev.parent;
-        struct v4l2_format f;
+        struct v4l2_mbus_framefmt mf;
-        struct v4l2_pix_format *pix = &f.fmt.pix;
        unsigned int scale_comb_h, scale_comb_v, scale_ceu_h, scale_ceu_v,
                out_width, out_height;
        u32 capsr, cflcr;
@@ -1302,26 +1393,25 @@ static int sh_mobile_ceu_set_crop(struct soc_camera_device *icd,
         * 5. Using actual input window and calculated combined scales calculate
         *    camera target output window.
         */
-        pix->width              = scale_down(cam_rect->width, scale_comb_h);
+        mf.width        = scale_down(cam_rect->width, scale_comb_h);
-        pix->height             = scale_down(cam_rect->height, scale_comb_v);
+        mf.height       = scale_down(cam_rect->height, scale_comb_v);
-        dev_geo(dev, "5: camera target %ux%u\n", pix->width, pix->height);
+        dev_geo(dev, "5: camera target %ux%u\n", mf.width, mf.height);
        /* 6. - 9. */
-        pix->pixelformat        = cam->camera_fmt->fourcc;
+        mf.code         = cam->code;
-        pix->colorspace         = cam->camera_fmt->colorspace;
+        mf.field        = pcdev->field;
        capsr = capture_save_reset(pcdev);
        dev_dbg(dev, "CAPSR 0x%x, CFLCR 0x%x\n", capsr, pcdev->cflcr);
        /* Make relative to camera rectangle */
-        rect->left              -= cam_rect->left;
+        rect->left      -= cam_rect->left;
-        rect->top               -= cam_rect->top;
+        rect->top       -= cam_rect->top;
-        f.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+        ret = client_scale(icd, cam_rect, rect, ceu_rect, &mf,
+                           pcdev->image_mode &&
-        ret = client_scale(icd, cam_rect, rect, ceu_rect, &f,
+                           V4L2_FIELD_NONE == pcdev->field);
-                           pcdev->image_mode && !pcdev->is_interlaced);
        dev_geo(dev, "6-9: %d\n", ret);
@@ -1368,8 +1458,7 @@ static int sh_mobile_ceu_set_fmt(struct soc_camera_device *icd,
        struct sh_mobile_ceu_dev *pcdev = ici->priv;
        struct sh_mobile_ceu_cam *cam = icd->host_priv;
        struct v4l2_pix_format *pix = &f->fmt.pix;
-        struct v4l2_format cam_f = *f;
+        struct v4l2_mbus_framefmt mf;
-        struct v4l2_pix_format *cam_pix = &cam_f.fmt.pix;
        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
        struct device *dev = icd->dev.parent;
        __u32 pixfmt = pix->pixelformat;
@@ -1379,18 +1468,20 @@ static int sh_mobile_ceu_set_fmt(struct soc_camera_device *icd,
        unsigned int scale_cam_h, scale_cam_v;
        u16 scale_v, scale_h;
        int ret;
-        bool is_interlaced, image_mode;
+        bool image_mode;
+        enum v4l2_field field;
        switch (pix->field) {
-        case V4L2_FIELD_INTERLACED:
-                is_interlaced = true;
-                break;
-        case V4L2_FIELD_ANY:
        default:
                pix->field = V4L2_FIELD_NONE;
                /* fall-through */
+        case V4L2_FIELD_INTERLACED_TB:
+        case V4L2_FIELD_INTERLACED_BT:
        case V4L2_FIELD_NONE:
-                is_interlaced = false;
+                field = pix->field;
+                break;
+        case V4L2_FIELD_INTERLACED:
+                field = V4L2_FIELD_INTERLACED_TB;
                break;
        }
@@ -1438,9 +1529,11 @@ static int sh_mobile_ceu_set_fmt(struct soc_camera_device *icd,
         * 4. Calculate camera output window by applying combined scales to real
         *    input window.
         */
-        cam_pix->width = scale_down(cam_rect->width, scale_h);
+        mf.width        = scale_down(cam_rect->width, scale_h);
-        cam_pix->height = scale_down(cam_rect->height, scale_v);
+        mf.height       = scale_down(cam_rect->height, scale_v);
-        cam_pix->pixelformat = xlate->cam_fmt->fourcc;
+        mf.field        = pix->field;
+        mf.colorspace   = pix->colorspace;
+        mf.code         = xlate->code;
        switch (pixfmt) {
        case V4L2_PIX_FMT_NV12:
@@ -1453,51 +1546,61 @@ static int sh_mobile_ceu_set_fmt(struct soc_camera_device *icd,
                image_mode = false;
        }
-        dev_geo(dev, "4: camera output %ux%u\n",
+        dev_geo(dev, "4: camera output %ux%u\n", mf.width, mf.height);
-                cam_pix->width, cam_pix->height);
        /* 5. - 9. */
-        ret = client_scale(icd, cam_rect, &cam_subrect, &ceu_rect, &cam_f,
+        ret = client_scale(icd, cam_rect, &cam_subrect, &ceu_rect, &mf,
-                           image_mode && !is_interlaced);
+                           image_mode && V4L2_FIELD_NONE == field);
        dev_geo(dev, "5-9: client scale %d\n", ret);
        /* Done with the camera. Now see if we can improve the result */
        dev_dbg(dev, "Camera %d fmt %ux%u, requested %ux%u\n",
-                ret, cam_pix->width, cam_pix->height, pix->width, pix->height);
+                ret, mf.width, mf.height, pix->width, pix->height);
        if (ret < 0)
                return ret;
+        if (mf.code != xlate->code)
+                return -EINVAL;
        /* 10. Use CEU scaling to scale to the requested user window. */
        /* We cannot scale up */
-        if (pix->width > cam_pix->width)
+        if (pix->width > mf.width)
-                pix->width = cam_pix->width;
+                pix->width = mf.width;
        if (pix->width > ceu_rect.width)
                pix->width = ceu_rect.width;
-        if (pix->height > cam_pix->height)
+        if (pix->height > mf.height)
-                pix->height = cam_pix->height;
+                pix->height = mf.height;
        if (pix->height > ceu_rect.height)
                pix->height = ceu_rect.height;
-        /* Let's rock: scale pix->{width x height} down to width x height */
+        pix->colorspace = mf.colorspace;
-        scale_h = calc_scale(ceu_rect.width, &pix->width);
-        scale_v = calc_scale(ceu_rect.height, &pix->height);
+        if (image_mode) {
+                /* Scale pix->{width x height} down to width x height */
+                scale_h = calc_scale(ceu_rect.width, &pix->width);
+                scale_v = calc_scale(ceu_rect.height, &pix->height);
+                pcdev->cflcr = scale_h | (scale_v << 16);
+        } else {
+                pix->width = ceu_rect.width;
+                pix->height = ceu_rect.height;
+                scale_h = scale_v = 0;
+                pcdev->cflcr = 0;
+        }
        dev_geo(dev, "10: W: %u : 0x%x = %u, H: %u : 0x%x = %u\n",
                ceu_rect.width, scale_h, pix->width,
                ceu_rect.height, scale_v, pix->height);
-        pcdev->cflcr = scale_h | (scale_v << 16);
+        cam->code               = xlate->code;
+        cam->ceu_rect           = ceu_rect;
+        icd->current_fmt        = xlate;
-        icd->buswidth = xlate->buswidth;
+        pcdev->field = field;
-        icd->current_fmt = xlate->host_fmt;
-        cam->camera_fmt = xlate->cam_fmt;
-        cam->ceu_rect = ceu_rect;
-        pcdev->is_interlaced = is_interlaced;
        pcdev->image_mode = image_mode;
        return 0;
@@ -1509,6 +1612,7 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd,
        const struct soc_camera_format_xlate *xlate;
        struct v4l2_pix_format *pix = &f->fmt.pix;
        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
+        struct v4l2_mbus_framefmt mf;
        __u32 pixfmt = pix->pixelformat;
        int width, height;
        int ret;
@@ -1527,18 +1631,27 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd,
        width = pix->width;
        height = pix->height;
-        pix->bytesperline = pix->width *
+        pix->bytesperline = soc_mbus_bytes_per_line(width, xlate->host_fmt);
-                DIV_ROUND_UP(xlate->host_fmt->depth, 8);
+        if (pix->bytesperline < 0)
-        pix->sizeimage = pix->height * pix->bytesperline;
+                return pix->bytesperline;
+        pix->sizeimage = height * pix->bytesperline;
-        pix->pixelformat = xlate->cam_fmt->fourcc;
        /* limit to sensor capabilities */
-        ret = v4l2_subdev_call(sd, video, try_fmt, f);
+        mf.width        = pix->width;
-        pix->pixelformat = pixfmt;
+        mf.height       = pix->height;
+        mf.field        = pix->field;
+        mf.code         = xlate->code;
+        mf.colorspace   = pix->colorspace;
+        ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
        if (ret < 0)
                return ret;
+        pix->width      = mf.width;
+        pix->height     = mf.height;
+        pix->field      = mf.field;
+        pix->colorspace = mf.colorspace;
        switch (pixfmt) {
        case V4L2_PIX_FMT_NV12:
        case V4L2_PIX_FMT_NV21:
@@ -1547,21 +1660,25 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd,
                /* FIXME: check against rect_max after converting soc-camera */
                /* We can scale precisely, need a bigger image from camera */
                if (pix->width < width || pix->height < height) {
-                        int tmp_w = pix->width, tmp_h = pix->height;
+                        /*
-                        pix->width = 2560;
+                         * We presume, the sensor behaves sanely, i.e., if
-                        pix->height = 1920;
+                         * requested a bigger rectangle, it will not return a
-                        ret = v4l2_subdev_call(sd, video, try_fmt, f);
+                         * smaller one.
+                         */
+                        mf.width = 2560;
+                        mf.height = 1920;
+                        ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
                        if (ret < 0) {
                                /* Shouldn't actually happen... */
                                dev_err(icd->dev.parent,
-                                        "FIXME: try_fmt() returned %d\n", ret);
+                                        "FIXME: client try_fmt() = %d\n", ret);
-                                pix->width = tmp_w;
+                                return ret;
-                                pix->height = tmp_h;
                        }
                }
-                if (pix->width > width)
+                /* We will scale exactly */
+                if (mf.width > width)
                        pix->width = width;
-                if (pix->height > height)
+                if (mf.height > height)
                        pix->height = height;
        }
@@ -1573,10 +1690,12 @@ static int sh_mobile_ceu_reqbufs(struct soc_camera_file *icf,
 {
        int i;
-        /* This is for locking debugging only. I removed spinlocks and now I
+        /*
+         * This is for locking debugging only. I removed spinlocks and now I
         * check whether .prepare is ever called on a linked buffer, or whether
         * a dma IRQ can occur for an in-work or unlinked buffer. Until now
-         * it hadn't triggered */
+         * it hadn't triggered
+         */
        for (i = 0; i < p->count; i++) {
                struct sh_mobile_ceu_buffer *buf;
@@ -1624,8 +1743,7 @@ static void sh_mobile_ceu_init_videobuf(struct videobuf_queue *q,
                                       &sh_mobile_ceu_videobuf_ops,
                                       icd->dev.parent, &pcdev->lock,
                                       V4L2_BUF_TYPE_VIDEO_CAPTURE,
-                                       pcdev->is_interlaced ?
+                                       pcdev->field,
-                                       V4L2_FIELD_INTERLACED : V4L2_FIELD_NONE,
                                       sizeof(struct sh_mobile_ceu_buffer),
                                       icd);
 }
@@ -1654,7 +1772,7 @@ static int sh_mobile_ceu_set_ctrl(struct soc_camera_device *icd,
        switch (ctrl->id) {
        case V4L2_CID_SHARPNESS:
-                switch (icd->current_fmt->fourcc) {
+                switch (icd->current_fmt->host_fmt->fourcc) {
                case V4L2_PIX_FMT_NV12:
                case V4L2_PIX_FMT_NV21:
                case V4L2_PIX_FMT_NV16:
@@ -1836,7 +1954,7 @@ static struct platform_driver sh_mobile_ceu_driver = {
                .pm     = &sh_mobile_ceu_dev_pm_ops,
        },
        .probe          = sh_mobile_ceu_probe,
-        .remove         = __exit_p(sh_mobile_ceu_remove),
+        .remove         = __devexit_p(sh_mobile_ceu_remove),
 };
 static int __init sh_mobile_ceu_init(void)
diff --git a/drivers/media/video/sn9c102/sn9c102_core.c b/drivers/media/video/sn9c102/sn9c102_core.c
index 4a7711c3e745..cbf8087b286f 100644
--- a/drivers/media/video/sn9c102/sn9c102_core.c
+++ b/drivers/media/video/sn9c102/sn9c102_core.c
@@ -1007,8 +1007,8 @@ static int sn9c102_stream_interrupt(struct sn9c102_device* cam)
        else if (cam->stream != STREAM_OFF) {
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "URB timeout reached. The camera is misconfigured. "
-                       "To use it, close and open /dev/video%d again.",
+                       "To use it, close and open %s again.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                return -EIO;
        }
@@ -1734,7 +1734,8 @@ static void sn9c102_release_resources(struct kref *kref)
        cam = container_of(kref, struct sn9c102_device, kref);
-        DBG(2, "V4L2 device /dev/video%d deregistered", cam->v4ldev->num);
+        DBG(2, "V4L2 device %s deregistered",
+            video_device_node_name(cam->v4ldev));
        video_set_drvdata(cam->v4ldev, NULL);
        video_unregister_device(cam->v4ldev);
        usb_put_dev(cam->usbdev);
@@ -1791,8 +1792,8 @@ static int sn9c102_open(struct file *filp)
        }
        if (cam->users) {
-                DBG(2, "Device /dev/video%d is already in use",
+                DBG(2, "Device %s is already in use",
-                       cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                DBG(3, "Simultaneous opens are not supported");
                /*
                   open() must follow the open flags and should block
@@ -1845,7 +1846,7 @@ static int sn9c102_open(struct file *filp)
        cam->frame_count = 0;
        sn9c102_empty_framequeues(cam);
-        DBG(3, "Video device /dev/video%d is open", cam->v4ldev->num);
+        DBG(3, "Video device %s is open", video_device_node_name(cam->v4ldev));
 out:
        mutex_unlock(&cam->open_mutex);
@@ -1870,7 +1871,7 @@ static int sn9c102_release(struct file *filp)
        cam->users--;
        wake_up_interruptible_nr(&cam->wait_open, 1);
-        DBG(3, "Video device /dev/video%d closed", cam->v4ldev->num);
+        DBG(3, "Video device %s closed", video_device_node_name(cam->v4ldev));
        kref_put(&cam->kref, sn9c102_release_resources);
@@ -2433,8 +2434,8 @@ sn9c102_vidioc_s_crop(struct sn9c102_device* cam, void __user * arg)
        if (err) { /* atomic, no rollback in ioctl() */
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "VIDIOC_S_CROP failed because of hardware problems. To "
-                       "use the camera, close and open /dev/video%d again.",
+                       "use the camera, close and open %s again.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                return -EIO;
        }
@@ -2446,8 +2447,8 @@ sn9c102_vidioc_s_crop(struct sn9c102_device* cam, void __user * arg)
            nbuffers != sn9c102_request_buffers(cam, nbuffers, cam->io)) {
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "VIDIOC_S_CROP failed because of not enough memory. To "
-                       "use the camera, close and open /dev/video%d again.",
+                       "use the camera, close and open %s again.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                return -ENOMEM;
        }
@@ -2690,8 +2691,8 @@ sn9c102_vidioc_try_s_fmt(struct sn9c102_device* cam, unsigned int cmd,
        if (err) { /* atomic, no rollback in ioctl() */
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "VIDIOC_S_FMT failed because of hardware problems. To "
-                       "use the camera, close and open /dev/video%d again.",
+                       "use the camera, close and open %s again.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                return -EIO;
        }
@@ -2702,8 +2703,8 @@ sn9c102_vidioc_try_s_fmt(struct sn9c102_device* cam, unsigned int cmd,
            nbuffers != sn9c102_request_buffers(cam, nbuffers, cam->io)) {
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "VIDIOC_S_FMT failed because of not enough memory. To "
-                       "use the camera, close and open /dev/video%d again.",
+                       "use the camera, close and open %s again.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                return -ENOMEM;
        }
@@ -2748,9 +2749,9 @@ sn9c102_vidioc_s_jpegcomp(struct sn9c102_device* cam, void __user * arg)
        err += sn9c102_set_compression(cam, &jc);
        if (err) { /* atomic, no rollback in ioctl() */
                cam->state |= DEV_MISCONFIGURED;
-                DBG(1, "VIDIOC_S_JPEGCOMP failed because of hardware "
+                DBG(1, "VIDIOC_S_JPEGCOMP failed because of hardware problems. "
-                       "problems. To use the camera, close and open "
+                       "To use the camera, close and open %s again.",
-                       "/dev/video%d again.", cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                return -EIO;
        }
@@ -3328,7 +3329,6 @@ sn9c102_usb_probe(struct usb_interface* intf, const struct usb_device_id* id)
        strcpy(cam->v4ldev->name, "SN9C1xx PC Camera");
        cam->v4ldev->fops = &sn9c102_fops;
-        cam->v4ldev->minor = video_nr[dev_nr];
        cam->v4ldev->release = video_device_release;
        cam->v4ldev->parent = &udev->dev;
@@ -3346,7 +3346,8 @@ sn9c102_usb_probe(struct usb_interface* intf, const struct usb_device_id* id)
                goto fail;
        }
-        DBG(2, "V4L2 device registered as /dev/video%d", cam->v4ldev->num);
+        DBG(2, "V4L2 device registered as %s",
+            video_device_node_name(cam->v4ldev));
        video_set_drvdata(cam->v4ldev, cam);
        cam->module_param.force_munmap = force_munmap[dev_nr];
@@ -3398,9 +3399,9 @@ static void sn9c102_usb_disconnect(struct usb_interface* intf)
        DBG(2, "Disconnecting %s...", cam->v4ldev->name);
        if (cam->users) {
-                DBG(2, "Device /dev/video%d is open! Deregistration and "
+                DBG(2, "Device %s is open! Deregistration and memory "
-                       "memory deallocation are deferred.",
+                       "deallocation are deferred.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                cam->state |= DEV_MISCONFIGURED;
                sn9c102_stop_transfer(cam);
                cam->state |= DEV_DISCONNECTED;
diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c
index 95fdeb23c2c1..6b3fbcca7747 100644
--- a/drivers/media/video/soc_camera.c
+++ b/drivers/media/video/soc_camera.c
@@ -31,6 +31,7 @@
 #include <media/v4l2-ioctl.h>
 #include <media/v4l2-dev.h>
 #include <media/videobuf-core.h>
+#include <media/soc_mediabus.h>
 /* Default to VGA resolution */
 #define DEFAULT_WIDTH   640
@@ -40,18 +41,6 @@ static LIST_HEAD(hosts);
 static LIST_HEAD(devices);
 static DEFINE_MUTEX(list_lock);         /* Protects the list of hosts */
-const struct soc_camera_data_format *soc_camera_format_by_fourcc(
-        struct soc_camera_device *icd, unsigned int fourcc)
-{
-        unsigned int i;
-        for (i = 0; i < icd->num_formats; i++)
-                if (icd->formats[i].fourcc == fourcc)
-                        return icd->formats + i;
-        return NULL;
-}
-EXPORT_SYMBOL(soc_camera_format_by_fourcc);
 const struct soc_camera_format_xlate *soc_camera_xlate_by_fourcc(
        struct soc_camera_device *icd, unsigned int fourcc)
 {
@@ -207,21 +196,26 @@ static int soc_camera_dqbuf(struct file *file, void *priv,
 /* Always entered with .video_lock held */
 static int soc_camera_init_user_formats(struct soc_camera_device *icd)
 {
+        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
        struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
-        int i, fmts = 0, ret;
+        int i, fmts = 0, raw_fmts = 0, ret;
+        enum v4l2_mbus_pixelcode code;
+        while (!v4l2_subdev_call(sd, video, enum_mbus_fmt, raw_fmts, &code))
+                raw_fmts++;
        if (!ici->ops->get_formats)
                /*
                 * Fallback mode - the host will have to serve all
                 * sensor-provided formats one-to-one to the user
                 */
-                fmts = icd->num_formats;
+                fmts = raw_fmts;
        else
                /*
                 * First pass - only count formats this host-sensor
                 * configuration can provide
                 */
-                for (i = 0; i < icd->num_formats; i++) {
+                for (i = 0; i < raw_fmts; i++) {
                        ret = ici->ops->get_formats(icd, i, NULL);
                        if (ret < 0)
                                return ret;
@@ -242,11 +236,12 @@ static int soc_camera_init_user_formats(struct soc_camera_device *icd)
        /* Second pass - actually fill data formats */
        fmts = 0;
-        for (i = 0; i < icd->num_formats; i++)
+        for (i = 0; i < raw_fmts; i++)
                if (!ici->ops->get_formats) {
-                        icd->user_formats[i].host_fmt = icd->formats + i;
+                        v4l2_subdev_call(sd, video, enum_mbus_fmt, i, &code);
-                        icd->user_formats[i].cam_fmt = icd->formats + i;
+                        icd->user_formats[i].host_fmt =
-                        icd->user_formats[i].buswidth = icd->formats[i].depth;
+                                soc_mbus_get_fmtdesc(code);
+                        icd->user_formats[i].code = code;
                } else {
                        ret = ici->ops->get_formats(icd, i,
                                                    &icd->user_formats[fmts]);
@@ -255,7 +250,7 @@ static int soc_camera_init_user_formats(struct soc_camera_device *icd)
                        fmts += ret;
                }
-        icd->current_fmt = icd->user_formats[0].host_fmt;
+        icd->current_fmt = &icd->user_formats[0];
        return 0;
@@ -281,7 +276,7 @@ static void soc_camera_free_user_formats(struct soc_camera_device *icd)
 #define pixfmtstr(x) (x) & 0xff, ((x) >> 8) & 0xff, ((x) >> 16) & 0xff, \
        ((x) >> 24) & 0xff
-/* Called with .vb_lock held */
+/* Called with .vb_lock held, or from the first open(2), see comment there */
 static int soc_camera_set_fmt(struct soc_camera_file *icf,
                              struct v4l2_format *f)
 {
@@ -302,7 +297,7 @@ static int soc_camera_set_fmt(struct soc_camera_file *icf,
        if (ret < 0) {
                return ret;
        } else if (!icd->current_fmt ||
-                   icd->current_fmt->fourcc != pix->pixelformat) {
+                   icd->current_fmt->host_fmt->fourcc != pix->pixelformat) {
                dev_err(&icd->dev,
                        "Host driver hasn't set up current format correctly!\n");
                return -EINVAL;
@@ -310,6 +305,7 @@ static int soc_camera_set_fmt(struct soc_camera_file *icf,
        icd->user_width         = pix->width;
        icd->user_height        = pix->height;
+        icd->colorspace         = pix->colorspace;
        icf->vb_vidq.field      =
                icd->field      = pix->field;
@@ -369,8 +365,9 @@ static int soc_camera_open(struct file *file)
                                .width          = icd->user_width,
                                .height         = icd->user_height,
                                .field          = icd->field,
-                                .pixelformat    = icd->current_fmt->fourcc,
+                                .colorspace     = icd->colorspace,
-                                .colorspace     = icd->current_fmt->colorspace,
+                                .pixelformat    =
+                                        icd->current_fmt->host_fmt->fourcc,
                        },
                };
@@ -390,7 +387,12 @@ static int soc_camera_open(struct file *file)
                        goto eiciadd;
                }
-                /* Try to configure with default parameters */
+                /*
+                 * Try to configure with default parameters. Notice: this is the
+                 * very first open, so, we cannot race against other calls,
+                 * apart from someone else calling open() simultaneously, but
+                 * .video_lock is protecting us against it.
+                 */
                ret = soc_camera_set_fmt(icf, &f);
                if (ret < 0)
                        goto esfmt;
@@ -534,7 +536,7 @@ static int soc_camera_enum_fmt_vid_cap(struct file *file, void  *priv,
 {
        struct soc_camera_file *icf = file->private_data;
        struct soc_camera_device *icd = icf->icd;
-        const struct soc_camera_data_format *format;
+        const struct soc_mbus_pixelfmt *format;
        WARN_ON(priv != file->private_data);
@@ -543,7 +545,8 @@ static int soc_camera_enum_fmt_vid_cap(struct file *file, void  *priv,
        format = icd->user_formats[f->index].host_fmt;
-        strlcpy(f->description, format->name, sizeof(f->description));
+        if (format->name)
+                strlcpy(f->description, format->name, sizeof(f->description));
        f->pixelformat = format->fourcc;
        return 0;
 }
@@ -560,12 +563,15 @@ static int soc_camera_g_fmt_vid_cap(struct file *file, void *priv,
        pix->width              = icd->user_width;
        pix->height             = icd->user_height;
        pix->field              = icf->vb_vidq.field;
-        pix->pixelformat        = icd->current_fmt->fourcc;
+        pix->pixelformat        = icd->current_fmt->host_fmt->fourcc;
-        pix->bytesperline       = pix->width *
+        pix->bytesperline       = soc_mbus_bytes_per_line(pix->width,
-                DIV_ROUND_UP(icd->current_fmt->depth, 8);
+                                                icd->current_fmt->host_fmt);
+        pix->colorspace         = icd->colorspace;
+        if (pix->bytesperline < 0)
+                return pix->bytesperline;
        pix->sizeimage          = pix->height * pix->bytesperline;
        dev_dbg(&icd->dev, "current_fmt->fourcc: 0x%08x\n",
-                icd->current_fmt->fourcc);
+                icd->current_fmt->host_fmt->fourcc);
        return 0;
 }
@@ -621,8 +627,10 @@ static int soc_camera_streamoff(struct file *file, void *priv,
        mutex_lock(&icd->video_lock);
-        /* This calls buf_release from host driver's videobuf_queue_ops for all
+        /*
-         * remaining buffers. When the last buffer is freed, stop capture */
+         * This calls buf_release from host driver's videobuf_queue_ops for all
+         * remaining buffers. When the last buffer is freed, stop capture
+         */
        videobuf_streamoff(&icf->vb_vidq);
        v4l2_subdev_call(sd, video, s_stream, 0);
@@ -892,7 +900,7 @@ static int soc_camera_probe(struct device *dev)
        struct soc_camera_link *icl = to_soc_camera_link(icd);
        struct device *control = NULL;
        struct v4l2_subdev *sd;
-        struct v4l2_format f = {.type = V4L2_BUF_TYPE_VIDEO_CAPTURE};
+        struct v4l2_mbus_framefmt mf;
        int ret;
        dev_info(dev, "Probing %s\n", dev_name(dev));
@@ -963,9 +971,11 @@ static int soc_camera_probe(struct device *dev)
        /* Try to improve our guess of a reasonable window format */
        sd = soc_camera_to_subdev(icd);
-        if (!v4l2_subdev_call(sd, video, g_fmt, &f)) {
+        if (!v4l2_subdev_call(sd, video, g_mbus_fmt, &mf)) {
-                icd->user_width         = f.fmt.pix.width;
+                icd->user_width         = mf.width;
-                icd->user_height        = f.fmt.pix.height;
+                icd->user_height        = mf.height;
+                icd->colorspace         = mf.colorspace;
+                icd->field              = mf.field;
        }
        /* Do we have to sysfs_remove_link() before device_unregister()? */
@@ -1004,8 +1014,10 @@ epower:
        return ret;
 }
-/* This is called on device_unregister, which only means we have to disconnect
+/*
- * from the host, but not remove ourselves from the device list */
+ * This is called on device_unregister, which only means we have to disconnect
+ * from the host, but not remove ourselves from the device list
+ */
 static int soc_camera_remove(struct device *dev)
 {
        struct soc_camera_device *icd = to_soc_camera_dev(dev);
@@ -1205,8 +1217,10 @@ static int soc_camera_device_register(struct soc_camera_device *icd)
        }
        if (num < 0)
-                /* ok, we have 256 cameras on this host...
+                /*
-                 * man, stay reasonable... */
+                 * ok, we have 256 cameras on this host...
+                 * man, stay reasonable...
+                 */
                return -ENOMEM;
        icd->devnum             = num;
@@ -1268,7 +1282,6 @@ static int video_dev_create(struct soc_camera_device *icd)
        vdev->fops              = &soc_camera_fops;
        vdev->ioctl_ops         = &soc_camera_ioctl_ops;
        vdev->release           = video_device_release;
-        vdev->minor             = -1;
        vdev->tvnorms           = V4L2_STD_UNKNOWN;
        icd->vdev = vdev;
@@ -1291,8 +1304,7 @@ static int soc_camera_video_start(struct soc_camera_device *icd)
            !icd->ops->set_bus_param)
                return -EINVAL;
-        ret = video_register_device(icd->vdev, VFL_TYPE_GRABBER,
+        ret = video_register_device(icd->vdev, VFL_TYPE_GRABBER, -1);
-                                    icd->vdev->minor);
        if (ret < 0) {
                dev_err(&icd->dev, "video_register_device failed: %d\n", ret);
                return ret;
@@ -1335,9 +1347,11 @@ escdevreg:
        return ret;
 }
-/* Only called on rmmod for each platform device, since they are not
+/*
+ * Only called on rmmod for each platform device, since they are not
 * hot-pluggable. Now we know, that all our users - hosts and devices have
- * been unloaded already */
+ * been unloaded already
+ */
 static int __devexit soc_camera_pdrv_remove(struct platform_device *pdev)
 {
        struct soc_camera_device *icd = platform_get_drvdata(pdev);
diff --git a/drivers/media/video/soc_camera_platform.c b/drivers/media/video/soc_camera_platform.c
index b6a575ce5da2..10b003a8be83 100644
--- a/drivers/media/video/soc_camera_platform.c
+++ b/drivers/media/video/soc_camera_platform.c
@@ -22,7 +22,6 @@
 struct soc_camera_platform_priv {
        struct v4l2_subdev subdev;
-        struct soc_camera_data_format format;
 };
 static struct soc_camera_platform_priv *get_priv(struct platform_device *pdev)
@@ -58,36 +57,36 @@ soc_camera_platform_query_bus_param(struct soc_camera_device *icd)
 }
 static int soc_camera_platform_try_fmt(struct v4l2_subdev *sd,
-                                       struct v4l2_format *f)
+                                       struct v4l2_mbus_framefmt *mf)
 {
        struct soc_camera_platform_info *p = v4l2_get_subdevdata(sd);
-        struct v4l2_pix_format *pix = &f->fmt.pix;
-        pix->width = p->format.width;
+        mf->width       = p->format.width;
-        pix->height = p->format.height;
+        mf->height      = p->format.height;
+        mf->code        = p->format.code;
+        mf->colorspace  = p->format.colorspace;
        return 0;
 }
-static void soc_camera_platform_video_probe(struct soc_camera_device *icd,
+static struct v4l2_subdev_core_ops platform_subdev_core_ops;
-                                            struct platform_device *pdev)
+static int soc_camera_platform_enum_fmt(struct v4l2_subdev *sd, int index,
+                                        enum v4l2_mbus_pixelcode *code)
 {
-        struct soc_camera_platform_priv *priv = get_priv(pdev);
+        struct soc_camera_platform_info *p = v4l2_get_subdevdata(sd);
-        struct soc_camera_platform_info *p = pdev->dev.platform_data;
-        priv->format.name = p->format_name;
+        if (index)
-        priv->format.depth = p->format_depth;
+                return -EINVAL;
-        priv->format.fourcc = p->format.pixelformat;
-        priv->format.colorspace = p->format.colorspace;
-        icd->formats = &priv->format;
+        *code = p->format.code;
-        icd->num_formats = 1;
+        return 0;
 }
-static struct v4l2_subdev_core_ops platform_subdev_core_ops;
 static struct v4l2_subdev_video_ops platform_subdev_video_ops = {
        .s_stream       = soc_camera_platform_s_stream,
-        .try_fmt        = soc_camera_platform_try_fmt,
+        .try_mbus_fmt   = soc_camera_platform_try_fmt,
+        .enum_mbus_fmt  = soc_camera_platform_enum_fmt,
 };
 static struct v4l2_subdev_ops platform_subdev_ops = {
@@ -128,13 +127,10 @@ static int soc_camera_platform_probe(struct platform_device *pdev)
        /* Set the control device reference */
        dev_set_drvdata(&icd->dev, &pdev->dev);
-        icd->y_skip_top         = 0;
+        icd->ops = &soc_camera_platform_ops;
-        icd->ops                = &soc_camera_platform_ops;
        ici = to_soc_camera_host(icd->dev.parent);
-        soc_camera_platform_video_probe(icd, pdev);
        v4l2_subdev_init(&priv->subdev, &platform_subdev_ops);
        v4l2_set_subdevdata(&priv->subdev, p);
        strncpy(priv->subdev.name, dev_name(&pdev->dev), V4L2_SUBDEV_NAME_SIZE);
diff --git a/drivers/media/video/soc_mediabus.c b/drivers/media/video/soc_mediabus.c
new file mode 100644
index 000000000000..f8d5c87dc2aa
--- /dev/null
+++ b/drivers/media/video/soc_mediabus.c
@@ -0,0 +1,157 @@
+/*
+ * soc-camera media bus helper routines
+ *
+ * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-mediabus.h>
+#include <media/soc_mediabus.h>
+#define MBUS_IDX(f) (V4L2_MBUS_FMT_ ## f - V4L2_MBUS_FMT_FIXED - 1)
+static const struct soc_mbus_pixelfmt mbus_fmt[] = {
+        [MBUS_IDX(YUYV8_2X8_LE)] = {
+                .fourcc                 = V4L2_PIX_FMT_YUYV,
+                .name                   = "YUYV",
+                .bits_per_sample        = 8,
+                .packing                = SOC_MBUS_PACKING_2X8_PADHI,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, [MBUS_IDX(YVYU8_2X8_LE)] = {
+                .fourcc                 = V4L2_PIX_FMT_YVYU,
+                .name                   = "YVYU",
+                .bits_per_sample        = 8,
+                .packing                = SOC_MBUS_PACKING_2X8_PADHI,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, [MBUS_IDX(YUYV8_2X8_BE)] = {
+                .fourcc                 = V4L2_PIX_FMT_UYVY,
+                .name                   = "UYVY",
+                .bits_per_sample        = 8,
+                .packing                = SOC_MBUS_PACKING_2X8_PADHI,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, [MBUS_IDX(YVYU8_2X8_BE)] = {
+                .fourcc                 = V4L2_PIX_FMT_VYUY,
+                .name                   = "VYUY",
+                .bits_per_sample        = 8,
+                .packing                = SOC_MBUS_PACKING_2X8_PADHI,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, [MBUS_IDX(RGB555_2X8_PADHI_LE)] = {
+                .fourcc                 = V4L2_PIX_FMT_RGB555,
+                .name                   = "RGB555",
+                .bits_per_sample        = 8,
+                .packing                = SOC_MBUS_PACKING_2X8_PADHI,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, [MBUS_IDX(RGB555_2X8_PADHI_BE)] = {
+                .fourcc                 = V4L2_PIX_FMT_RGB555X,
+                .name                   = "RGB555X",
+                .bits_per_sample        = 8,
+                .packing                = SOC_MBUS_PACKING_2X8_PADHI,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, [MBUS_IDX(RGB565_2X8_LE)] = {
+                .fourcc                 = V4L2_PIX_FMT_RGB565,
+                .name                   = "RGB565",
+                .bits_per_sample        = 8,
+                .packing                = SOC_MBUS_PACKING_2X8_PADHI,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, [MBUS_IDX(RGB565_2X8_BE)] = {
+                .fourcc                 = V4L2_PIX_FMT_RGB565X,
+                .name                   = "RGB565X",
+                .bits_per_sample        = 8,
+                .packing                = SOC_MBUS_PACKING_2X8_PADHI,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, [MBUS_IDX(SBGGR8_1X8)] = {
+                .fourcc                 = V4L2_PIX_FMT_SBGGR8,
+                .name                   = "Bayer 8 BGGR",
+                .bits_per_sample        = 8,
+                .packing                = SOC_MBUS_PACKING_NONE,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, [MBUS_IDX(SBGGR10_1X10)] = {
+                .fourcc                 = V4L2_PIX_FMT_SBGGR10,
+                .name                   = "Bayer 10 BGGR",
+                .bits_per_sample        = 10,
+                .packing                = SOC_MBUS_PACKING_EXTEND16,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, [MBUS_IDX(GREY8_1X8)] = {
+                .fourcc                 = V4L2_PIX_FMT_GREY,
+                .name                   = "Grey",
+                .bits_per_sample        = 8,
+                .packing                = SOC_MBUS_PACKING_NONE,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, [MBUS_IDX(Y10_1X10)] = {
+                .fourcc                 = V4L2_PIX_FMT_Y10,
+                .name                   = "Grey 10bit",
+                .bits_per_sample        = 10,
+                .packing                = SOC_MBUS_PACKING_EXTEND16,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, [MBUS_IDX(SBGGR10_2X8_PADHI_LE)] = {
+                .fourcc                 = V4L2_PIX_FMT_SBGGR10,
+                .name                   = "Bayer 10 BGGR",
+                .bits_per_sample        = 8,
+                .packing                = SOC_MBUS_PACKING_2X8_PADHI,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, [MBUS_IDX(SBGGR10_2X8_PADLO_LE)] = {
+                .fourcc                 = V4L2_PIX_FMT_SBGGR10,
+                .name                   = "Bayer 10 BGGR",
+                .bits_per_sample        = 8,
+                .packing                = SOC_MBUS_PACKING_2X8_PADLO,
+                .order                  = SOC_MBUS_ORDER_LE,
+        }, [MBUS_IDX(SBGGR10_2X8_PADHI_BE)] = {
+                .fourcc                 = V4L2_PIX_FMT_SBGGR10,
+                .name                   = "Bayer 10 BGGR",
+                .bits_per_sample        = 8,
+                .packing                = SOC_MBUS_PACKING_2X8_PADHI,
+                .order                  = SOC_MBUS_ORDER_BE,
+        }, [MBUS_IDX(SBGGR10_2X8_PADLO_BE)] = {
+                .fourcc                 = V4L2_PIX_FMT_SBGGR10,
+                .name                   = "Bayer 10 BGGR",
+                .bits_per_sample        = 8,
+                .packing                = SOC_MBUS_PACKING_2X8_PADLO,
+                .order                  = SOC_MBUS_ORDER_BE,
+        },
+};
+s32 soc_mbus_bytes_per_line(u32 width, const struct soc_mbus_pixelfmt *mf)
+{
+        switch (mf->packing) {
+        case SOC_MBUS_PACKING_NONE:
+                return width * mf->bits_per_sample / 8;
+        case SOC_MBUS_PACKING_2X8_PADHI:
+        case SOC_MBUS_PACKING_2X8_PADLO:
+        case SOC_MBUS_PACKING_EXTEND16:
+                return width * 2;
+        }
+        return -EINVAL;
+}
+EXPORT_SYMBOL(soc_mbus_bytes_per_line);
+const struct soc_mbus_pixelfmt *soc_mbus_get_fmtdesc(
+        enum v4l2_mbus_pixelcode code)
+{
+        if ((unsigned int)(code - V4L2_MBUS_FMT_FIXED) > ARRAY_SIZE(mbus_fmt))
+                return NULL;
+        return mbus_fmt + code - V4L2_MBUS_FMT_FIXED - 1;
+}
+EXPORT_SYMBOL(soc_mbus_get_fmtdesc);
+static int __init soc_mbus_init(void)
+{
+        return 0;
+}
+static void __exit soc_mbus_exit(void)
+{
+}
+module_init(soc_mbus_init);
+module_exit(soc_mbus_exit);
+MODULE_DESCRIPTION("soc-camera media bus interface");
+MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/video/stk-webcam.c b/drivers/media/video/stk-webcam.c
index 6b41865f42bd..f07a0f6b71c4 100644
--- a/drivers/media/video/stk-webcam.c
+++ b/drivers/media/video/stk-webcam.c
@@ -1307,7 +1307,6 @@ static void stk_v4l_dev_release(struct video_device *vd)
 static struct video_device stk_v4l_data = {
        .name = "stkwebcam",
-        .minor = -1,
        .tvnorms = V4L2_STD_UNKNOWN,
        .current_norm = V4L2_STD_UNKNOWN,
        .fops = &v4l_stk_fops,
@@ -1327,8 +1326,8 @@ static int stk_register_video_device(struct stk_camera *dev)
        if (err)
                STK_ERROR("v4l registration failed\n");
        else
-                STK_INFO("Syntek USB2.0 Camera is now controlling video device"
+                STK_INFO("Syntek USB2.0 Camera is now controlling device %s\n",
-                        " /dev/video%d\n", dev->vdev.num);
+                         video_device_node_name(&dev->vdev));
        return err;
 }
@@ -1418,8 +1417,8 @@ static void stk_camera_disconnect(struct usb_interface *interface)
        wake_up_interruptible(&dev->wait_frame);
        stk_remove_sysfs_files(&dev->vdev);
-        STK_INFO("Syntek USB2.0 Camera release resources "
+        STK_INFO("Syntek USB2.0 Camera release resources device %s\n",
-                "video device /dev/video%d\n", dev->vdev.num);
+                 video_device_node_name(&dev->vdev));
        video_unregister_device(&dev->vdev);
 }
diff --git a/drivers/media/video/stradis.c b/drivers/media/video/stradis.c
index eaada39c76fd..a057824e7ebc 100644
--- a/drivers/media/video/stradis.c
+++ b/drivers/media/video/stradis.c
@@ -1921,7 +1921,6 @@ static const struct v4l2_file_operations saa_fops = {
 static struct video_device saa_template = {
        .name = "SAA7146A",
        .fops = &saa_fops,
-        .minor = -1,
        .release = video_device_release_empty,
 };
@@ -1972,7 +1971,6 @@ static int __devinit configure_saa7146(struct pci_dev *pdev, int num)
        saa->id = pdev->device;
        saa->irq = pdev->irq;
-        saa->video_dev.minor = -1;
        saa->saa7146_adr = pci_resource_start(pdev, 0);
        pci_read_config_byte(pdev, PCI_CLASS_REVISION, &saa->revision);
@@ -2134,7 +2132,7 @@ static void stradis_release_saa(struct pci_dev *pdev)
        free_irq(saa->irq, saa);
        if (saa->saa7146_mem)
                iounmap(saa->saa7146_mem);
-        if (saa->video_dev.minor != -1)
+        if (video_is_registered(&saa->video_dev))
                video_unregister_device(&saa->video_dev);
 }
diff --git a/drivers/media/video/stv680.c b/drivers/media/video/stv680.c
index 6a91714125d2..5938ad8702ef 100644
--- a/drivers/media/video/stv680.c
+++ b/drivers/media/video/stv680.c
@@ -1405,7 +1405,6 @@ static struct video_device stv680_template = {
        .name =         "STV0680 USB camera",
        .fops =         &stv680_fops,
        .release =      video_device_release,
-        .minor =        -1,
 };
 static int stv680_probe (struct usb_interface *intf, const struct usb_device_id *id)
@@ -1467,8 +1466,8 @@ static int stv680_probe (struct usb_interface *intf, const struct usb_device_id
                retval = -EIO;
                goto error_vdev;
        }
-        PDEBUG(0, "STV(i): registered new video device: video%d",
+        PDEBUG(0, "STV(i): registered new video device: %s",
-                stv680->vdev->num);
+                video_device_node_name(stv680->vdev));
        usb_set_intfdata (intf, stv680);
        retval = stv680_create_sysfs_files(stv680->vdev);
diff --git a/drivers/media/video/tw9910.c b/drivers/media/video/tw9910.c
index 269ab044072a..5b801a6e1eea 100644
--- a/drivers/media/video/tw9910.c
+++ b/drivers/media/video/tw9910.c
@@ -29,7 +29,7 @@
 #include <media/tw9910.h>
 #define GET_ID(val)  ((val & 0xF8) >> 3)
-#define GET_ReV(val) (val & 0x07)
+#define GET_REV(val) (val & 0x07)
 /*
 * register offset
@@ -117,7 +117,7 @@
 #define LCTL24          0x68
 #define LCTL25          0x69
 #define LCTL26          0x6A
-#define HSGEGIN         0x6B
+#define HSBEGIN         0x6B
 #define HSEND           0x6C
 #define OVSDLY          0x6D
 #define OVSEND          0x6E
@@ -152,7 +152,10 @@
                         /* 1 : non-auto */
 #define VSCTL       0x08 /* 1 : Vertical out ctrl by DVALID */
                         /* 0 : Vertical out ctrl by HACTIVE and DVALID */
-#define OEN         0x04 /* Output Enable together with TRI_SEL. */
+#define OEN_TRI_SEL_MASK        0x07
+#define OEN_TRI_SEL_ALL_ON      0x00 /* Enable output for Rev0/Rev1 */
+#define OEN_TRI_SEL_ALL_OFF_r0  0x06 /* All tri-stated for Rev0 */
+#define OEN_TRI_SEL_ALL_OFF_r1  0x07 /* All tri-stated for Rev1 */
 /* OUTCTR1 */
 #define VSP_LO      0x00 /* 0 : VS pin output polarity is active low */
@@ -178,11 +181,18 @@
                          * but all register content remain unchanged.
                          * This bit is self-resetting.
                          */
+#define ACNTL1_PDN_MASK 0x0e
+#define CLK_PDN         0x08 /* system clock power down */
+#define Y_PDN           0x04 /* Luma ADC power down */
+#define C_PDN           0x02 /* Chroma ADC power down */
+/* ACNTL2 */
+#define ACNTL2_PDN_MASK 0x40
+#define PLL_PDN         0x40 /* PLL power down */
 /* VBICNTL */
-/* RTSEL : control the real time signal
-*          output from the MPOUT pin
+/* RTSEL : control the real time signal output from the MPOUT pin */
-*/
 #define RTSEL_MASK  0x07
 #define RTSEL_VLOSS 0x00 /* 0000 = Video loss */
 #define RTSEL_HLOCK 0x01 /* 0001 = H-lock */
@@ -226,28 +236,7 @@ struct tw9910_priv {
        struct v4l2_subdev                subdev;
        struct tw9910_video_info       *info;
        const struct tw9910_scale_ctrl *scale;
-};
+        u32                             revision;
-/*
- * register settings
- */
-#define ENDMARKER { 0xff, 0xff }
-static const struct regval_list tw9910_default_regs[] =
-{
-        { OPFORM,  0x00 },
-        { OUTCTR1, VSP_LO | VSSL_VVALID | HSP_HI | HSSL_HSYNC },
-        ENDMARKER,
-};
-static const struct soc_camera_data_format tw9910_color_fmt[] = {
-        {
-                .name       = "VYUY",
-                .fourcc     = V4L2_PIX_FMT_VYUY,
-                .depth      = 16,
-                .colorspace = V4L2_COLORSPACE_SMPTE170M,
-        }
 };
 static const struct tw9910_scale_ctrl tw9910_ntsc_scales[] = {
@@ -340,13 +329,6 @@ static const struct tw9910_scale_ctrl tw9910_pal_scales[] = {
        },
 };
-static const struct tw9910_cropping_ctrl tw9910_cropping_ctrl = {
-        .vdelay  = 0x0012,
-        .vactive = 0x00F0,
-        .hdelay  = 0x0010,
-        .hactive = 0x02D0,
-};
 static const struct tw9910_hsync_ctrl tw9910_hsync_ctrl = {
        .start = 0x0260,
        .end   = 0x0300,
@@ -361,6 +343,19 @@ static struct tw9910_priv *to_tw9910(const struct i2c_client *client)
                            subdev);
 }
+static int tw9910_mask_set(struct i2c_client *client, u8 command,
+                           u8 mask, u8 set)
+{
+        s32 val = i2c_smbus_read_byte_data(client, command);
+        if (val < 0)
+                return val;
+        val &= ~mask;
+        val |= set & mask;
+        return i2c_smbus_write_byte_data(client, command, val);
+}
 static int tw9910_set_scale(struct i2c_client *client,
                            const struct tw9910_scale_ctrl *scale)
 {
@@ -383,47 +378,14 @@ static int tw9910_set_scale(struct i2c_client *client,
        return ret;
 }
-static int tw9910_set_cropping(struct i2c_client *client,
-                               const struct tw9910_cropping_ctrl *cropping)
-{
-        int ret;
-        ret = i2c_smbus_write_byte_data(client, CROP_HI,
-                                        (cropping->vdelay  & 0x0300) >> 2 |
-                                        (cropping->vactive & 0x0300) >> 4 |
-                                        (cropping->hdelay  & 0x0300) >> 6 |
-                                        (cropping->hactive & 0x0300) >> 8);
-        if (ret < 0)
-                return ret;
-        ret = i2c_smbus_write_byte_data(client, VDELAY_LO,
-                                        cropping->vdelay & 0x00FF);
-        if (ret < 0)
-                return ret;
-        ret = i2c_smbus_write_byte_data(client, VACTIVE_LO,
-                                        cropping->vactive & 0x00FF);
-        if (ret < 0)
-                return ret;
-        ret = i2c_smbus_write_byte_data(client, HDELAY_LO,
-                                        cropping->hdelay & 0x00FF);
-        if (ret < 0)
-                return ret;
-        ret = i2c_smbus_write_byte_data(client, HACTIVE_LO,
-                                        cropping->hactive & 0x00FF);
-        return ret;
-}
 static int tw9910_set_hsync(struct i2c_client *client,
                            const struct tw9910_hsync_ctrl *hsync)
 {
+        struct tw9910_priv *priv = to_tw9910(client);
        int ret;
        /* bit 10 - 3 */
-        ret = i2c_smbus_write_byte_data(client, HSGEGIN,
+        ret = i2c_smbus_write_byte_data(client, HSBEGIN,
                                        (hsync->start & 0x07F8) >> 3);
        if (ret < 0)
                return ret;
@@ -434,50 +396,41 @@ static int tw9910_set_hsync(struct i2c_client *client,
        if (ret < 0)
                return ret;
+        /* So far only revisions 0 and 1 have been seen */
        /* bit 2 - 0 */
-        ret = i2c_smbus_read_byte_data(client, HSLOWCTL);
+        if (1 == priv->revision)
-        if (ret < 0)
+                ret = tw9910_mask_set(client, HSLOWCTL, 0x77,
-                return ret;
+                                      (hsync->start & 0x0007) << 4 |
+                                      (hsync->end   & 0x0007));
-        ret = i2c_smbus_write_byte_data(client, HSLOWCTL,
-                                        (ret & 0x88)                 |
-                                        (hsync->start & 0x0007) << 4 |
-                                        (hsync->end   & 0x0007));
        return ret;
 }
-static int tw9910_write_array(struct i2c_client *client,
+static void tw9910_reset(struct i2c_client *client)
-                              const struct regval_list *vals)
 {
-        while (vals->reg_num != 0xff) {
+        tw9910_mask_set(client, ACNTL1, SRESET, SRESET);
-                int ret = i2c_smbus_write_byte_data(client,
+        msleep(1);
-                                                    vals->reg_num,
-                                                    vals->value);
-                if (ret < 0)
-                        return ret;
-                vals++;
-        }
-        return 0;
 }
-static int tw9910_mask_set(struct i2c_client *client, u8 command,
+static int tw9910_power(struct i2c_client *client, int enable)
-                           u8 mask, u8 set)
 {
-        s32 val = i2c_smbus_read_byte_data(client, command);
+        int ret;
-        if (val < 0)
+        u8 acntl1;
-                return val;
+        u8 acntl2;
-        val &= ~mask;
+        if (enable) {
-        val |= set & mask;
+                acntl1 = 0;
+                acntl2 = 0;
+        } else {
+                acntl1 = CLK_PDN | Y_PDN | C_PDN;
+                acntl2 = PLL_PDN;
+        }
-        return i2c_smbus_write_byte_data(client, command, val);
+        ret = tw9910_mask_set(client, ACNTL1, ACNTL1_PDN_MASK, acntl1);
-}
+        if (ret < 0)
+                return ret;
-static void tw9910_reset(struct i2c_client *client)
+        return tw9910_mask_set(client, ACNTL2, ACNTL2_PDN_MASK, acntl2);
-{
-        i2c_smbus_write_byte_data(client, ACNTL1, SRESET);
-        msleep(1);
 }
 static const struct tw9910_scale_ctrl*
@@ -518,27 +471,62 @@ static int tw9910_s_stream(struct v4l2_subdev *sd, int enable)
 {
        struct i2c_client *client = sd->priv;
        struct tw9910_priv *priv = to_tw9910(client);
+        u8 val;
+        int ret;
-        if (!enable)
+        if (!enable) {
-                return 0;
+                switch (priv->revision) {
+                case 0:
+                        val = OEN_TRI_SEL_ALL_OFF_r0;
+                        break;
+                case 1:
+                        val = OEN_TRI_SEL_ALL_OFF_r1;
+                        break;
+                default:
+                        dev_err(&client->dev, "un-supported revision\n");
+                        return -EINVAL;
+                }
+        } else {
+                val = OEN_TRI_SEL_ALL_ON;
-        if (!priv->scale) {
+                if (!priv->scale) {
-                dev_err(&client->dev, "norm select error\n");
+                        dev_err(&client->dev, "norm select error\n");
-                return -EPERM;
+                        return -EPERM;
+                }
+                dev_dbg(&client->dev, "%s %dx%d\n",
+                        priv->scale->name,
+                        priv->scale->width,
+                        priv->scale->height);
        }
-        dev_dbg(&client->dev, "%s %dx%d\n",
+        ret = tw9910_mask_set(client, OPFORM, OEN_TRI_SEL_MASK, val);
-                 priv->scale->name,
+        if (ret < 0)
-                 priv->scale->width,
+                return ret;
-                 priv->scale->height);
-        return 0;
+        return tw9910_power(client, enable);
 }
 static int tw9910_set_bus_param(struct soc_camera_device *icd,
                                unsigned long flags)
 {
-        return 0;
+        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
+        struct i2c_client *client = sd->priv;
+        u8 val = VSSL_VVALID | HSSL_DVALID;
+        /*
+         * set OUTCTR1
+         *
+         * We use VVALID and DVALID signals to control VSYNC and HSYNC
+         * outputs, in this mode their polarity is inverted.
+         */
+        if (flags & SOCAM_HSYNC_ACTIVE_LOW)
+                val |= HSP_HI;
+        if (flags & SOCAM_VSYNC_ACTIVE_LOW)
+                val |= VSP_HI;
+        return i2c_smbus_write_byte_data(client, OUTCTR1, val);
 }
 static unsigned long tw9910_query_bus_param(struct soc_camera_device *icd)
@@ -548,6 +536,7 @@ static unsigned long tw9910_query_bus_param(struct soc_camera_device *icd)
        struct soc_camera_link *icl = to_soc_camera_link(icd);
        unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
                SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
+                SOCAM_VSYNC_ACTIVE_LOW  | SOCAM_HSYNC_ACTIVE_LOW  |
                SOCAM_DATA_ACTIVE_HIGH | priv->info->buswidth;
        return soc_camera_apply_sensor_flags(icl, flags);
@@ -576,8 +565,11 @@ static int tw9910_enum_input(struct soc_camera_device *icd,
 static int tw9910_g_chip_ident(struct v4l2_subdev *sd,
                               struct v4l2_dbg_chip_ident *id)
 {
+        struct i2c_client *client = sd->priv;
+        struct tw9910_priv *priv = to_tw9910(client);
        id->ident = V4L2_IDENT_TW9910;
-        id->revision = 0;
+        id->revision = priv->revision;
        return 0;
 }
@@ -596,7 +588,8 @@ static int tw9910_g_register(struct v4l2_subdev *sd,
        if (ret < 0)
                return ret;
-        /* ret      = int
+        /*
+         * ret      = int
         * reg->val = __u64
         */
        reg->val = (__u64)ret;
@@ -637,9 +630,6 @@ static int tw9910_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
         * reset hardware
         */
        tw9910_reset(client);
-        ret = tw9910_write_array(client, tw9910_default_regs);
-        if (ret < 0)
-                goto tw9910_set_fmt_error;
        /*
         * set bus width
@@ -688,13 +678,6 @@ static int tw9910_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
                goto tw9910_set_fmt_error;
        /*
-         * set cropping
-         */
-        ret = tw9910_set_cropping(client, &tw9910_cropping_ctrl);
-        if (ret < 0)
-                goto tw9910_set_fmt_error;
-        /*
         * set hsync
         */
        ret = tw9910_set_hsync(client, &tw9910_hsync_ctrl);
@@ -762,11 +745,11 @@ static int tw9910_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
        return 0;
 }
-static int tw9910_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int tw9910_g_fmt(struct v4l2_subdev *sd,
+                        struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
        struct tw9910_priv *priv = to_tw9910(client);
-        struct v4l2_pix_format *pix = &f->fmt.pix;
        if (!priv->scale) {
                int ret;
@@ -783,74 +766,76 @@ static int tw9910_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
                        return ret;
        }
-        f->type                 = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+        mf->width       = priv->scale->width;
+        mf->height      = priv->scale->height;
-        pix->width              = priv->scale->width;
+        mf->code        = V4L2_MBUS_FMT_YUYV8_2X8_BE;
-        pix->height             = priv->scale->height;
+        mf->colorspace  = V4L2_COLORSPACE_JPEG;
-        pix->pixelformat        = V4L2_PIX_FMT_VYUY;
+        mf->field       = V4L2_FIELD_INTERLACED_BT;
-        pix->colorspace         = V4L2_COLORSPACE_SMPTE170M;
-        pix->field              = V4L2_FIELD_INTERLACED;
        return 0;
 }
-static int tw9910_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int tw9910_s_fmt(struct v4l2_subdev *sd,
+                        struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
        struct tw9910_priv *priv = to_tw9910(client);
-        struct v4l2_pix_format *pix = &f->fmt.pix;
        /* See tw9910_s_crop() - no proper cropping support */
        struct v4l2_crop a = {
                .c = {
                        .left   = 0,
                        .top    = 0,
-                        .width  = pix->width,
+                        .width  = mf->width,
-                        .height = pix->height,
+                        .height = mf->height,
                },
        };
-        int i, ret;
+        int ret;
+        WARN_ON(mf->field != V4L2_FIELD_ANY &&
+                mf->field != V4L2_FIELD_INTERLACED_BT);
        /*
         * check color format
         */
-        for (i = 0; i < ARRAY_SIZE(tw9910_color_fmt); i++)
+        if (mf->code != V4L2_MBUS_FMT_YUYV8_2X8_BE)
-                if (pix->pixelformat == tw9910_color_fmt[i].fourcc)
-                        break;
-        if (i == ARRAY_SIZE(tw9910_color_fmt))
                return -EINVAL;
+        mf->colorspace = V4L2_COLORSPACE_JPEG;
        ret = tw9910_s_crop(sd, &a);
        if (!ret) {
-                pix->width = priv->scale->width;
+                mf->width       = priv->scale->width;
-                pix->height = priv->scale->height;
+                mf->height      = priv->scale->height;
        }
        return ret;
 }
-static int tw9910_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
+static int tw9910_try_fmt(struct v4l2_subdev *sd,
+                          struct v4l2_mbus_framefmt *mf)
 {
        struct i2c_client *client = sd->priv;
        struct soc_camera_device *icd = client->dev.platform_data;
-        struct v4l2_pix_format *pix = &f->fmt.pix;
        const struct tw9910_scale_ctrl *scale;
-        if (V4L2_FIELD_ANY == pix->field) {
+        if (V4L2_FIELD_ANY == mf->field) {
-                pix->field = V4L2_FIELD_INTERLACED;
+                mf->field = V4L2_FIELD_INTERLACED_BT;
-        } else if (V4L2_FIELD_INTERLACED != pix->field) {
+        } else if (V4L2_FIELD_INTERLACED_BT != mf->field) {
-                dev_err(&client->dev, "Field type invalid.\n");
+                dev_err(&client->dev, "Field type %d invalid.\n", mf->field);
                return -EINVAL;
        }
+        mf->code = V4L2_MBUS_FMT_YUYV8_2X8_BE;
+        mf->colorspace = V4L2_COLORSPACE_JPEG;
        /*
         * select suitable norm
         */
-        scale = tw9910_select_norm(icd, pix->width, pix->height);
+        scale = tw9910_select_norm(icd, mf->width, mf->height);
        if (!scale)
                return -EINVAL;
-        pix->width  = scale->width;
+        mf->width       = scale->width;
-        pix->height = scale->height;
+        mf->height      = scale->height;
        return 0;
 }
@@ -859,7 +844,7 @@ static int tw9910_video_probe(struct soc_camera_device *icd,
                              struct i2c_client *client)
 {
        struct tw9910_priv *priv = to_tw9910(client);
-        s32 val;
+        s32 id;
        /*
         * We must have a parent by now. And it cannot be a wrong one.
@@ -878,23 +863,24 @@ static int tw9910_video_probe(struct soc_camera_device *icd,
                return -ENODEV;
        }
-        icd->formats     = tw9910_color_fmt;
-        icd->num_formats = ARRAY_SIZE(tw9910_color_fmt);
        /*
         * check and show Product ID
+         * So far only revisions 0 and 1 have been seen
         */
-        val = i2c_smbus_read_byte_data(client, ID);
+        id = i2c_smbus_read_byte_data(client, ID);
+        priv->revision = GET_REV(id);
+        id = GET_ID(id);
-        if (0x0B != GET_ID(val) ||
+        if (0x0B != id ||
-            0x00 != GET_ReV(val)) {
+            0x01 < priv->revision) {
                dev_err(&client->dev,
-                        "Product ID error %x:%x\n", GET_ID(val), GET_ReV(val));
+                        "Product ID error %x:%x\n",
+                        id, priv->revision);
                return -ENODEV;
        }
        dev_info(&client->dev,
-                 "tw9910 Product ID %0x:%0x\n", GET_ID(val), GET_ReV(val));
+                 "tw9910 Product ID %0x:%0x\n", id, priv->revision);
        icd->vdev->tvnorms      = V4L2_STD_NTSC | V4L2_STD_PAL;
        icd->vdev->current_norm = V4L2_STD_NTSC;
@@ -917,14 +903,25 @@ static struct v4l2_subdev_core_ops tw9910_subdev_core_ops = {
 #endif
 };
+static int tw9910_enum_fmt(struct v4l2_subdev *sd, int index,
+                           enum v4l2_mbus_pixelcode *code)
+{
+        if (index)
+                return -EINVAL;
+        *code = V4L2_MBUS_FMT_YUYV8_2X8_BE;
+        return 0;
+}
 static struct v4l2_subdev_video_ops tw9910_subdev_video_ops = {
        .s_stream       = tw9910_s_stream,
-        .g_fmt          = tw9910_g_fmt,
+        .g_mbus_fmt     = tw9910_g_fmt,
-        .s_fmt          = tw9910_s_fmt,
+        .s_mbus_fmt     = tw9910_s_fmt,
-        .try_fmt        = tw9910_try_fmt,
+        .try_mbus_fmt   = tw9910_try_fmt,
        .cropcap        = tw9910_cropcap,
        .g_crop         = tw9910_g_crop,
        .s_crop         = tw9910_s_crop,
+        .enum_mbus_fmt  = tw9910_enum_fmt,
 };
 static struct v4l2_subdev_ops tw9910_subdev_ops = {
@@ -954,10 +951,10 @@ static int tw9910_probe(struct i2c_client *client,
        }
        icl = to_soc_camera_link(icd);
-        if (!icl)
+        if (!icl || !icl->priv)
                return -EINVAL;
-        info = container_of(icl, struct tw9910_video_info, link);
+        info = icl->priv;
        if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
                dev_err(&client->dev,
@@ -975,7 +972,7 @@ static int tw9910_probe(struct i2c_client *client,
        v4l2_i2c_subdev_init(&priv->subdev, client, &tw9910_subdev_ops);
        icd->ops     = &tw9910_ops;
-        icd->iface   = info->link.bus_id;
+        icd->iface   = icl->bus_id;
        ret = tw9910_video_probe(icd, client);
        if (ret) {
diff --git a/drivers/media/video/usbvideo/usbvideo.c b/drivers/media/video/usbvideo/usbvideo.c
index dea8b321fb4a..5ac37c6c4313 100644
--- a/drivers/media/video/usbvideo/usbvideo.c
+++ b/drivers/media/video/usbvideo/usbvideo.c
@@ -1053,9 +1053,9 @@ int usbvideo_RegisterVideoDevice(struct uvd *uvd)
                         "%s: video_register_device() successful\n", __func__);
        }
-        dev_info(&uvd->dev->dev, "%s on /dev/video%d: canvas=%s videosize=%s\n",
+        dev_info(&uvd->dev->dev, "%s on %s: canvas=%s videosize=%s\n",
                 (uvd->handle != NULL) ? uvd->handle->drvName : "???",
-                 uvd->vdev.num, tmp2, tmp1);
+                 video_device_node_name(&uvd->vdev), tmp2, tmp1);
        usb_get_dev(uvd->dev);
        return 0;
diff --git a/drivers/media/video/usbvideo/vicam.c b/drivers/media/video/usbvideo/vicam.c
index 45fce39ec9ad..6030410c6677 100644
--- a/drivers/media/video/usbvideo/vicam.c
+++ b/drivers/media/video/usbvideo/vicam.c
@@ -796,7 +796,6 @@ static const struct v4l2_file_operations vicam_fops = {
 static struct video_device vicam_template = {
        .name           = "ViCam-based USB Camera",
        .fops           = &vicam_fops,
-        .minor          = -1,
        .release        = video_device_release_empty,
 };
@@ -873,8 +872,8 @@ vicam_probe( struct usb_interface *intf, const struct usb_device_id *id)
                return -EIO;
        }
-        printk(KERN_INFO "ViCam webcam driver now controlling video device %d\n",
+        printk(KERN_INFO "ViCam webcam driver now controlling device %s\n",
-                        cam->vdev.num);
+                video_device_node_name(&cam->vdev));
        usb_set_intfdata (intf, cam);
diff --git a/drivers/media/video/usbvision/usbvision-i2c.c b/drivers/media/video/usbvision/usbvision-i2c.c
index c19f51dba2ee..0613922997e0 100644
--- a/drivers/media/video/usbvision/usbvision-i2c.c
+++ b/drivers/media/video/usbvision/usbvision-i2c.c
@@ -215,8 +215,8 @@ int usbvision_i2c_register(struct usb_usbvision *usbvision)
        memcpy(&usbvision->i2c_adap, &i2c_adap_template,
               sizeof(struct i2c_adapter));
-        sprintf(usbvision->i2c_adap.name + strlen(usbvision->i2c_adap.name),
+        sprintf(usbvision->i2c_adap.name, "%s-%d-%s", i2c_adap_template.name,
-                " #%d", usbvision->vdev->num);
+                usbvision->dev->bus->busnum, usbvision->dev->devpath);
        PDEBUG(DBG_I2C,"Adaptername: %s", usbvision->i2c_adap.name);
        usbvision->i2c_adap.dev.parent = &usbvision->dev->dev;
diff --git a/drivers/media/video/usbvision/usbvision-video.c b/drivers/media/video/usbvision/usbvision-video.c
index c07b0ac452ab..1054546db908 100644
--- a/drivers/media/video/usbvision/usbvision-video.c
+++ b/drivers/media/video/usbvision/usbvision-video.c
@@ -1328,7 +1328,6 @@ static struct video_device usbvision_video_template = {
        .ioctl_ops      = &usbvision_ioctl_ops,
        .name           = "usbvision-video",
        .release        = video_device_release,
-        .minor          = -1,
        .tvnorms              = USBVISION_NORMS,
        .current_norm         = V4L2_STD_PAL
 };
@@ -1362,7 +1361,6 @@ static struct video_device usbvision_radio_template = {
        .fops           = &usbvision_radio_fops,
        .name           = "usbvision-radio",
        .release        = video_device_release,
-        .minor          = -1,
        .ioctl_ops      = &usbvision_radio_ioctl_ops,
        .tvnorms              = USBVISION_NORMS,
@@ -1382,7 +1380,6 @@ static struct video_device usbvision_vbi_template=
        .fops           = &usbvision_vbi_fops,
        .release        = video_device_release,
        .name           = "usbvision-vbi",
-        .minor          = -1,
 };
@@ -1404,7 +1401,6 @@ static struct video_device *usbvision_vdev_init(struct usb_usbvision *usbvision,
                return NULL;
        }
        *vdev = *vdev_template;
-//      vdev->minor   = -1;
        vdev->v4l2_dev = &usbvision->v4l2_dev;
        snprintf(vdev->name, sizeof(vdev->name), "%s", name);
        video_set_drvdata(vdev, usbvision);
@@ -1416,9 +1412,9 @@ static void usbvision_unregister_video(struct usb_usbvision *usbvision)
 {
        // vbi Device:
        if (usbvision->vbi) {
-                PDEBUG(DBG_PROBE, "unregister /dev/vbi%d [v4l2]",
+                PDEBUG(DBG_PROBE, "unregister %s [v4l2]",
-                       usbvision->vbi->num);
+                       video_device_node_name(usbvision->vbi));
-                if (usbvision->vbi->minor != -1) {
+                if (video_is_registered(usbvision->vbi)) {
                        video_unregister_device(usbvision->vbi);
                } else {
                        video_device_release(usbvision->vbi);
@@ -1428,9 +1424,9 @@ static void usbvision_unregister_video(struct usb_usbvision *usbvision)
        // Radio Device:
        if (usbvision->rdev) {
-                PDEBUG(DBG_PROBE, "unregister /dev/radio%d [v4l2]",
+                PDEBUG(DBG_PROBE, "unregister %s [v4l2]",
-                       usbvision->rdev->num);
+                       video_device_node_name(usbvision->rdev));
-                if (usbvision->rdev->minor != -1) {
+                if (video_is_registered(usbvision->rdev)) {
                        video_unregister_device(usbvision->rdev);
                } else {
                        video_device_release(usbvision->rdev);
@@ -1440,9 +1436,9 @@ static void usbvision_unregister_video(struct usb_usbvision *usbvision)
        // Video Device:
        if (usbvision->vdev) {
-                PDEBUG(DBG_PROBE, "unregister /dev/video%d [v4l2]",
+                PDEBUG(DBG_PROBE, "unregister %s [v4l2]",
-                       usbvision->vdev->num);
+                       video_device_node_name(usbvision->vdev));
-                if (usbvision->vdev->minor != -1) {
+                if (video_is_registered(usbvision->vdev)) {
                        video_unregister_device(usbvision->vdev);
                } else {
                        video_device_release(usbvision->vdev);
@@ -1466,8 +1462,8 @@ static int __devinit usbvision_register_video(struct usb_usbvision *usbvision)
                                  video_nr)<0) {
                goto err_exit;
        }
-        printk(KERN_INFO "USBVision[%d]: registered USBVision Video device /dev/video%d [v4l2]\n",
+        printk(KERN_INFO "USBVision[%d]: registered USBVision Video device %s [v4l2]\n",
-               usbvision->nr, usbvision->vdev->num);
+               usbvision->nr, video_device_node_name(usbvision->vdev));
        // Radio Device:
        if (usbvision_device_data[usbvision->DevModel].Radio) {
@@ -1483,8 +1479,8 @@ static int __devinit usbvision_register_video(struct usb_usbvision *usbvision)
                                          radio_nr)<0) {
                        goto err_exit;
                }
-                printk(KERN_INFO "USBVision[%d]: registered USBVision Radio device /dev/radio%d [v4l2]\n",
+                printk(KERN_INFO "USBVision[%d]: registered USBVision Radio device %s [v4l2]\n",
-                       usbvision->nr, usbvision->rdev->num);
+                       usbvision->nr, video_device_node_name(usbvision->rdev));
        }
        // vbi Device:
        if (usbvision_device_data[usbvision->DevModel].vbi) {
@@ -1499,8 +1495,8 @@ static int __devinit usbvision_register_video(struct usb_usbvision *usbvision)
                                          vbi_nr)<0) {
                        goto err_exit;
                }
-                printk(KERN_INFO "USBVision[%d]: registered USBVision VBI device /dev/vbi%d [v4l2] (Not Working Yet!)\n",
+                printk(KERN_INFO "USBVision[%d]: registered USBVision VBI device %s [v4l2] (Not Working Yet!)\n",
-                       usbvision->nr, usbvision->vbi->num);
+                       usbvision->nr, video_device_node_name(usbvision->vbi));
        }
        // all done
        return 0;
diff --git a/drivers/media/video/uvc/uvc_driver.c b/drivers/media/video/uvc/uvc_driver.c
index c31bc50113bc..391cccca7ffc 100644
--- a/drivers/media/video/uvc/uvc_driver.c
+++ b/drivers/media/video/uvc/uvc_driver.c
@@ -1651,7 +1651,6 @@ static int uvc_register_video(struct uvc_device *dev,
         * get another one.
         */
        vdev->parent = &dev->intf->dev;
-        vdev->minor = -1;
        vdev->fops = &uvc_fops;
        vdev->release = uvc_release;
        strlcpy(vdev->name, dev->name, sizeof vdev->name);
diff --git a/drivers/media/video/uvc/uvc_video.c b/drivers/media/video/uvc/uvc_video.c
index 05139a4f14f6..9a9802830d41 100644
--- a/drivers/media/video/uvc/uvc_video.c
+++ b/drivers/media/video/uvc/uvc_video.c
@@ -145,7 +145,7 @@ static int uvc_get_video_ctrl(struct uvc_streaming *stream,
                uvc_warn_once(stream->dev, UVC_WARN_MINMAX, "UVC non "
                        "compliance - GET_MIN/MAX(PROBE) incorrectly "
                        "supported. Enabling workaround.\n");
-                memset(ctrl, 0, sizeof ctrl);
+                memset(ctrl, 0, sizeof *ctrl);
                ctrl->wCompQuality = le16_to_cpup((__le16 *)data);
                ret = 0;
                goto out;
diff --git a/drivers/media/video/v4l2-common.c b/drivers/media/video/v4l2-common.c
index e8e5affbabce..36b5cb86fb57 100644
--- a/drivers/media/video/v4l2-common.c
+++ b/drivers/media/video/v4l2-common.c
@@ -1024,3 +1024,50 @@ void v4l_bound_align_image(u32 *w, unsigned int wmin, unsigned int wmax,
        }
 }
 EXPORT_SYMBOL_GPL(v4l_bound_align_image);
+/**
+ * v4l_fill_dv_preset_info - fill description of a digital video preset
+ * @preset - preset value
+ * @info - pointer to struct v4l2_dv_enum_preset
+ *
+ * drivers can use this helper function to fill description of dv preset
+ * in info.
+ */
+int v4l_fill_dv_preset_info(u32 preset, struct v4l2_dv_enum_preset *info)
+{
+        static const struct v4l2_dv_preset_info {
+                u16 width;
+                u16 height;
+                const char *name;
+        } dv_presets[] = {
+                { 0, 0, "Invalid" },            /* V4L2_DV_INVALID */
+                { 720,  480, "480p@59.94" },    /* V4L2_DV_480P59_94 */
+                { 720,  576, "576p@50" },       /* V4L2_DV_576P50 */
+                { 1280, 720, "720p@24" },       /* V4L2_DV_720P24 */
+                { 1280, 720, "720p@25" },       /* V4L2_DV_720P25 */
+                { 1280, 720, "720p@30" },       /* V4L2_DV_720P30 */
+                { 1280, 720, "720p@50" },       /* V4L2_DV_720P50 */
+                { 1280, 720, "720p@59.94" },    /* V4L2_DV_720P59_94 */
+                { 1280, 720, "720p@60" },       /* V4L2_DV_720P60 */
+                { 1920, 1080, "1080i@29.97" },  /* V4L2_DV_1080I29_97 */
+                { 1920, 1080, "1080i@30" },     /* V4L2_DV_1080I30 */
+                { 1920, 1080, "1080i@25" },     /* V4L2_DV_1080I25 */
+                { 1920, 1080, "1080i@50" },     /* V4L2_DV_1080I50 */
+                { 1920, 1080, "1080i@60" },     /* V4L2_DV_1080I60 */
+                { 1920, 1080, "1080p@24" },     /* V4L2_DV_1080P24 */
+                { 1920, 1080, "1080p@25" },     /* V4L2_DV_1080P25 */
+                { 1920, 1080, "1080p@30" },     /* V4L2_DV_1080P30 */
+                { 1920, 1080, "1080p@50" },     /* V4L2_DV_1080P50 */
+                { 1920, 1080, "1080p@60" },     /* V4L2_DV_1080P60 */
+        };
+        if (info == NULL || preset >= ARRAY_SIZE(dv_presets))
+                return -EINVAL;
+        info->preset = preset;
+        info->width = dv_presets[preset].width;
+        info->height = dv_presets[preset].height;
+        strlcpy(info->name, dv_presets[preset].name, sizeof(info->name));
+        return 0;
+}
+EXPORT_SYMBOL_GPL(v4l_fill_dv_preset_info);
diff --git a/drivers/media/video/v4l2-compat-ioctl32.c b/drivers/media/video/v4l2-compat-ioctl32.c
index 997975d5e024..c4150bd26337 100644
--- a/drivers/media/video/v4l2-compat-ioctl32.c
+++ b/drivers/media/video/v4l2-compat-ioctl32.c
@@ -1077,6 +1077,12 @@ long v4l2_compat_ioctl32(struct file *file, unsigned int cmd, unsigned long arg)
        case VIDIOC_DBG_G_REGISTER:
        case VIDIOC_DBG_G_CHIP_IDENT:
        case VIDIOC_S_HW_FREQ_SEEK:
+        case VIDIOC_ENUM_DV_PRESETS:
+        case VIDIOC_S_DV_PRESET:
+        case VIDIOC_G_DV_PRESET:
+        case VIDIOC_QUERY_DV_PRESET:
+        case VIDIOC_S_DV_TIMINGS:
+        case VIDIOC_G_DV_TIMINGS:
                ret = do_video_ioctl(file, cmd, arg);
                break;
diff --git a/drivers/media/video/v4l2-dev.c b/drivers/media/video/v4l2-dev.c
index 500cbe9891ac..709069916068 100644
--- a/drivers/media/video/v4l2-dev.c
+++ b/drivers/media/video/v4l2-dev.c
@@ -189,7 +189,7 @@ static ssize_t v4l2_read(struct file *filp, char __user *buf,
        if (!vdev->fops->read)
                return -EINVAL;
-        if (video_is_unregistered(vdev))
+        if (!video_is_registered(vdev))
                return -EIO;
        return vdev->fops->read(filp, buf, sz, off);
 }
@@ -201,7 +201,7 @@ static ssize_t v4l2_write(struct file *filp, const char __user *buf,
        if (!vdev->fops->write)
                return -EINVAL;
-        if (video_is_unregistered(vdev))
+        if (!video_is_registered(vdev))
                return -EIO;
        return vdev->fops->write(filp, buf, sz, off);
 }
@@ -210,7 +210,7 @@ static unsigned int v4l2_poll(struct file *filp, struct poll_table_struct *poll)
 {
        struct video_device *vdev = video_devdata(filp);
-        if (!vdev->fops->poll || video_is_unregistered(vdev))
+        if (!vdev->fops->poll || !video_is_registered(vdev))
                return DEFAULT_POLLMASK;
        return vdev->fops->poll(filp, poll);
 }
@@ -250,7 +250,7 @@ static unsigned long v4l2_get_unmapped_area(struct file *filp,
        if (!vdev->fops->get_unmapped_area)
                return -ENOSYS;
-        if (video_is_unregistered(vdev))
+        if (!video_is_registered(vdev))
                return -ENODEV;
        return vdev->fops->get_unmapped_area(filp, addr, len, pgoff, flags);
 }
@@ -260,8 +260,7 @@ static int v4l2_mmap(struct file *filp, struct vm_area_struct *vm)
 {
        struct video_device *vdev = video_devdata(filp);
-        if (!vdev->fops->mmap ||
+        if (!vdev->fops->mmap || !video_is_registered(vdev))
-            video_is_unregistered(vdev))
                return -ENODEV;
        return vdev->fops->mmap(filp, vm);
 }
@@ -277,7 +276,7 @@ static int v4l2_open(struct inode *inode, struct file *filp)
        vdev = video_devdata(filp);
        /* return ENODEV if the video device has been removed
           already or if it is not registered anymore. */
-        if (vdev == NULL || video_is_unregistered(vdev)) {
+        if (vdev == NULL || !video_is_registered(vdev)) {
                mutex_unlock(&videodev_lock);
                return -ENODEV;
        }
@@ -551,10 +550,11 @@ static int __video_register_device(struct video_device *vdev, int type, int nr,
        vdev->dev.release = v4l2_device_release;
        if (nr != -1 && nr != vdev->num && warn_if_nr_in_use)
-                printk(KERN_WARNING "%s: requested %s%d, got %s%d\n",
+                printk(KERN_WARNING "%s: requested %s%d, got %s\n", __func__,
-                                __func__, name_base, nr, name_base, vdev->num);
+                        name_base, nr, video_device_node_name(vdev));
        /* Part 5: Activate this minor. The char device can now be used. */
+        set_bit(V4L2_FL_REGISTERED, &vdev->flags);
        mutex_lock(&videodev_lock);
        video_device[vdev->minor] = vdev;
        mutex_unlock(&videodev_lock);
@@ -593,11 +593,11 @@ EXPORT_SYMBOL(video_register_device_no_warn);
 void video_unregister_device(struct video_device *vdev)
 {
        /* Check if vdev was ever registered at all */
-        if (!vdev || vdev->minor < 0)
+        if (!vdev || !video_is_registered(vdev))
                return;
        mutex_lock(&videodev_lock);
-        set_bit(V4L2_FL_UNREGISTERED, &vdev->flags);
+        clear_bit(V4L2_FL_REGISTERED, &vdev->flags);
        mutex_unlock(&videodev_lock);
        device_unregister(&vdev->dev);
 }
diff --git a/drivers/media/video/v4l2-ioctl.c b/drivers/media/video/v4l2-ioctl.c
index 30cc3347ae52..4b11257c3184 100644
--- a/drivers/media/video/v4l2-ioctl.c
+++ b/drivers/media/video/v4l2-ioctl.c
@@ -284,6 +284,12 @@ static const char *v4l2_ioctls[] = {
        [_IOC_NR(VIDIOC_DBG_G_CHIP_IDENT)] = "VIDIOC_DBG_G_CHIP_IDENT",
        [_IOC_NR(VIDIOC_S_HW_FREQ_SEEK)]   = "VIDIOC_S_HW_FREQ_SEEK",
 #endif
+        [_IOC_NR(VIDIOC_ENUM_DV_PRESETS)]  = "VIDIOC_ENUM_DV_PRESETS",
+        [_IOC_NR(VIDIOC_S_DV_PRESET)]      = "VIDIOC_S_DV_PRESET",
+        [_IOC_NR(VIDIOC_G_DV_PRESET)]      = "VIDIOC_G_DV_PRESET",
+        [_IOC_NR(VIDIOC_QUERY_DV_PRESET)]  = "VIDIOC_QUERY_DV_PRESET",
+        [_IOC_NR(VIDIOC_S_DV_TIMINGS)]     = "VIDIOC_S_DV_TIMINGS",
+        [_IOC_NR(VIDIOC_G_DV_TIMINGS)]     = "VIDIOC_G_DV_TIMINGS",
 };
 #define V4L2_IOCTLS ARRAY_SIZE(v4l2_ioctls)
@@ -1135,6 +1141,19 @@ static long __video_do_ioctl(struct file *file,
        {
                struct v4l2_input *p = arg;
+                /*
+                 * We set the flags for CAP_PRESETS, CAP_CUSTOM_TIMINGS &
+                 * CAP_STD here based on ioctl handler provided by the
+                 * driver. If the driver doesn't support these
+                 * for a specific input, it must override these flags.
+                 */
+                if (ops->vidioc_s_std)
+                        p->capabilities |= V4L2_IN_CAP_STD;
+                if (ops->vidioc_s_dv_preset)
+                        p->capabilities |= V4L2_IN_CAP_PRESETS;
+                if (ops->vidioc_s_dv_timings)
+                        p->capabilities |= V4L2_IN_CAP_CUSTOM_TIMINGS;
                if (!ops->vidioc_enum_input)
                        break;
@@ -1179,6 +1198,19 @@ static long __video_do_ioctl(struct file *file,
                if (!ops->vidioc_enum_output)
                        break;
+                /*
+                 * We set the flags for CAP_PRESETS, CAP_CUSTOM_TIMINGS &
+                 * CAP_STD here based on ioctl handler provided by the
+                 * driver. If the driver doesn't support these
+                 * for a specific output, it must override these flags.
+                 */
+                if (ops->vidioc_s_std)
+                        p->capabilities |= V4L2_OUT_CAP_STD;
+                if (ops->vidioc_s_dv_preset)
+                        p->capabilities |= V4L2_OUT_CAP_PRESETS;
+                if (ops->vidioc_s_dv_timings)
+                        p->capabilities |= V4L2_OUT_CAP_CUSTOM_TIMINGS;
                ret = ops->vidioc_enum_output(file, fh, p);
                if (!ret)
                        dbgarg(cmd, "index=%d, name=%s, type=%d, "
@@ -1794,6 +1826,121 @@ static long __video_do_ioctl(struct file *file,
                }
                break;
        }
+        case VIDIOC_ENUM_DV_PRESETS:
+        {
+                struct v4l2_dv_enum_preset *p = arg;
+                if (!ops->vidioc_enum_dv_presets)
+                        break;
+                ret = ops->vidioc_enum_dv_presets(file, fh, p);
+                if (!ret)
+                        dbgarg(cmd,
+                                "index=%d, preset=%d, name=%s, width=%d,"
+                                " height=%d ",
+                                p->index, p->preset, p->name, p->width,
+                                p->height);
+                break;
+        }
+        case VIDIOC_S_DV_PRESET:
+        {
+                struct v4l2_dv_preset *p = arg;
+                if (!ops->vidioc_s_dv_preset)
+                        break;
+                dbgarg(cmd, "preset=%d\n", p->preset);
+                ret = ops->vidioc_s_dv_preset(file, fh, p);
+                break;
+        }
+        case VIDIOC_G_DV_PRESET:
+        {
+                struct v4l2_dv_preset *p = arg;
+                if (!ops->vidioc_g_dv_preset)
+                        break;
+                ret = ops->vidioc_g_dv_preset(file, fh, p);
+                if (!ret)
+                        dbgarg(cmd, "preset=%d\n", p->preset);
+                break;
+        }
+        case VIDIOC_QUERY_DV_PRESET:
+        {
+                struct v4l2_dv_preset *p = arg;
+                if (!ops->vidioc_query_dv_preset)
+                        break;
+                ret = ops->vidioc_query_dv_preset(file, fh, p);
+                if (!ret)
+                        dbgarg(cmd, "preset=%d\n", p->preset);
+                break;
+        }
+        case VIDIOC_S_DV_TIMINGS:
+        {
+                struct v4l2_dv_timings *p = arg;
+                if (!ops->vidioc_s_dv_timings)
+                        break;
+                switch (p->type) {
+                case V4L2_DV_BT_656_1120:
+                        dbgarg2("bt-656/1120:interlaced=%d, pixelclock=%lld,"
+                                " width=%d, height=%d, polarities=%x,"
+                                " hfrontporch=%d, hsync=%d, hbackporch=%d,"
+                                " vfrontporch=%d, vsync=%d, vbackporch=%d,"
+                                " il_vfrontporch=%d, il_vsync=%d,"
+                                " il_vbackporch=%d\n",
+                                p->bt.interlaced, p->bt.pixelclock,
+                                p->bt.width, p->bt.height, p->bt.polarities,
+                                p->bt.hfrontporch, p->bt.hsync,
+                                p->bt.hbackporch, p->bt.vfrontporch,
+                                p->bt.vsync, p->bt.vbackporch,
+                                p->bt.il_vfrontporch, p->bt.il_vsync,
+                                p->bt.il_vbackporch);
+                        ret = ops->vidioc_s_dv_timings(file, fh, p);
+                        break;
+                default:
+                        dbgarg2("Unknown type %d!\n", p->type);
+                        break;
+                }
+                break;
+        }
+        case VIDIOC_G_DV_TIMINGS:
+        {
+                struct v4l2_dv_timings *p = arg;
+                if (!ops->vidioc_g_dv_timings)
+                        break;
+                ret = ops->vidioc_g_dv_timings(file, fh, p);
+                if (!ret) {
+                        switch (p->type) {
+                        case V4L2_DV_BT_656_1120:
+                                dbgarg2("bt-656/1120:interlaced=%d,"
+                                        " pixelclock=%lld,"
+                                        " width=%d, height=%d, polarities=%x,"
+                                        " hfrontporch=%d, hsync=%d,"
+                                        " hbackporch=%d, vfrontporch=%d,"
+                                        " vsync=%d, vbackporch=%d,"
+                                        " il_vfrontporch=%d, il_vsync=%d,"
+                                        " il_vbackporch=%d\n",
+                                        p->bt.interlaced, p->bt.pixelclock,
+                                        p->bt.width, p->bt.height,
+                                        p->bt.polarities, p->bt.hfrontporch,
+                                        p->bt.hsync, p->bt.hbackporch,
+                                        p->bt.vfrontporch, p->bt.vsync,
+                                        p->bt.vbackporch, p->bt.il_vfrontporch,
+                                        p->bt.il_vsync, p->bt.il_vbackporch);
+                                break;
+                        default:
+                                dbgarg2("Unknown type %d!\n", p->type);
+                                break;
+                        }
+                }
+                break;
+        }
        default:
        {
diff --git a/drivers/media/video/videobuf-dma-contig.c b/drivers/media/video/videobuf-dma-contig.c
index d25f28461da1..22c01097e8a8 100644
--- a/drivers/media/video/videobuf-dma-contig.c
+++ b/drivers/media/video/videobuf-dma-contig.c
@@ -141,9 +141,11 @@ static int videobuf_dma_contig_user_get(struct videobuf_dma_contig_memory *mem,
        struct vm_area_struct *vma;
        unsigned long prev_pfn, this_pfn;
        unsigned long pages_done, user_address;
+        unsigned int offset;
        int ret;
-        mem->size = PAGE_ALIGN(vb->size);
+        offset = vb->baddr & ~PAGE_MASK;
+        mem->size = PAGE_ALIGN(vb->size + offset);
        mem->is_userptr = 0;
        ret = -EINVAL;
@@ -166,7 +168,7 @@ static int videobuf_dma_contig_user_get(struct videobuf_dma_contig_memory *mem,
                        break;
                if (pages_done == 0)
-                        mem->dma_handle = this_pfn << PAGE_SHIFT;
+                        mem->dma_handle = (this_pfn << PAGE_SHIFT) + offset;
                else if (this_pfn != (prev_pfn + 1))
                        ret = -EFAULT;
diff --git a/drivers/media/video/vino.c b/drivers/media/video/vino.c
index b034a81d2b1c..a15d1e7cbed8 100644
--- a/drivers/media/video/vino.c
+++ b/drivers/media/video/vino.c
@@ -4068,7 +4068,6 @@ static struct video_device vdev_template = {
        .fops           = &vino_fops,
        .ioctl_ops      = &vino_ioctl_ops,
        .tvnorms        = V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM,
-        .minor          = -1,
 };
 static void vino_module_cleanup(int stage)
diff --git a/drivers/media/video/vivi.c b/drivers/media/video/vivi.c
index 7705fc6baf00..37632a064966 100644
--- a/drivers/media/video/vivi.c
+++ b/drivers/media/video/vivi.c
@@ -1148,7 +1148,8 @@ static int vivi_open(struct file *file)
                return -EBUSY;
        }
-        dprintk(dev, 1, "open /dev/video%d type=%s users=%d\n", dev->vfd->num,
+        dprintk(dev, 1, "open %s type=%s users=%d\n",
+                video_device_node_name(dev->vfd),
                v4l2_type_names[V4L2_BUF_TYPE_VIDEO_CAPTURE], dev->users);
        /* allocate + initialize per filehandle data */
@@ -1221,8 +1222,7 @@ static int vivi_close(struct file *file)
        struct vivi_fh         *fh = file->private_data;
        struct vivi_dev *dev       = fh->dev;
        struct vivi_dmaqueue *vidq = &dev->vidq;
+        struct video_device  *vdev = video_devdata(file);
-        int minor = video_devdata(file)->minor;
        vivi_stop_thread(vidq);
        videobuf_stop(&fh->vb_vidq);
@@ -1234,8 +1234,8 @@ static int vivi_close(struct file *file)
        dev->users--;
        mutex_unlock(&dev->mutex);
-        dprintk(dev, 1, "close called (minor=%d, users=%d)\n",
+        dprintk(dev, 1, "close called (dev=%s, users=%d)\n",
-                minor, dev->users);
+                video_device_node_name(vdev), dev->users);
        return 0;
 }
@@ -1296,7 +1296,6 @@ static struct video_device vivi_template = {
        .name           = "vivi",
        .fops           = &vivi_fops,
        .ioctl_ops      = &vivi_ioctl_ops,
-        .minor          = -1,
        .release        = video_device_release,
        .tvnorms              = V4L2_STD_525_60,
@@ -1317,8 +1316,8 @@ static int vivi_release(void)
                list_del(list);
                dev = list_entry(list, struct vivi_dev, vivi_devlist);
-                v4l2_info(&dev->v4l2_dev, "unregistering /dev/video%d\n",
+                v4l2_info(&dev->v4l2_dev, "unregistering %s\n",
-                        dev->vfd->num);
+                        video_device_node_name(dev->vfd));
                video_unregister_device(dev->vfd);
                v4l2_device_unregister(&dev->v4l2_dev);
                kfree(dev);
@@ -1372,15 +1371,12 @@ static int __init vivi_create_instance(int inst)
        /* Now that everything is fine, let's add it to device list */
        list_add_tail(&dev->vivi_devlist, &vivi_devlist);
-        snprintf(vfd->name, sizeof(vfd->name), "%s (%i)",
-                        vivi_template.name, vfd->num);
        if (video_nr >= 0)
                video_nr++;
        dev->vfd = vfd;
-        v4l2_info(&dev->v4l2_dev, "V4L2 device registered as /dev/video%d\n",
+        v4l2_info(&dev->v4l2_dev, "V4L2 device registered as %s\n",
-                        vfd->num);
+                  video_device_node_name(vfd));
        return 0;
 rel_vdev:
diff --git a/drivers/media/video/w9968cf.c b/drivers/media/video/w9968cf.c
index 37fcdc447db5..d807eea91757 100644
--- a/drivers/media/video/w9968cf.c
+++ b/drivers/media/video/w9968cf.c
@@ -2323,9 +2323,9 @@ static int w9968cf_sensor_init(struct w9968cf_device* cam)
 error:
        cam->sensor_initialized = 0;
        cam->sensor = CC_UNKNOWN;
-        DBG(1, "Image sensor initialization failed for %s (/dev/video%d). "
+        DBG(1, "Image sensor initialization failed for %s (%s). "
               "Try to detach and attach this device again",
-            symbolic(camlist, cam->id), cam->v4ldev->num)
+            symbolic(camlist, cam->id), video_device_node_name(cam->v4ldev))
        return err;
 }
@@ -2571,7 +2571,8 @@ static void w9968cf_release_resources(struct w9968cf_device* cam)
 {
        mutex_lock(&w9968cf_devlist_mutex);
-        DBG(2, "V4L device deregistered: /dev/video%d", cam->v4ldev->num)
+        DBG(2, "V4L device deregistered: %s",
+            video_device_node_name(cam->v4ldev))
        video_unregister_device(cam->v4ldev);
        list_del(&cam->v4llist);
@@ -2605,17 +2606,19 @@ static int w9968cf_open(struct file *filp)
        if (cam->sensor == CC_UNKNOWN) {
                DBG(2, "No supported image sensor has been detected by the "
-                       "'ovcamchip' module for the %s (/dev/video%d). Make "
+                       "'ovcamchip' module for the %s (%s). Make sure "
-                       "sure it is loaded *before* (re)connecting the camera.",
+                       "it is loaded *before* (re)connecting the camera.",
-                    symbolic(camlist, cam->id), cam->v4ldev->num)
+                    symbolic(camlist, cam->id),
+                    video_device_node_name(cam->v4ldev))
                mutex_unlock(&cam->dev_mutex);
                up_read(&w9968cf_disconnect);
                return -ENODEV;
        }
        if (cam->users) {
-                DBG(2, "%s (/dev/video%d) has been already occupied by '%s'",
+                DBG(2, "%s (%s) has been already occupied by '%s'",
-                    symbolic(camlist, cam->id), cam->v4ldev->num, cam->command)
+                    symbolic(camlist, cam->id),
+                    video_device_node_name(cam->v4ldev), cam->command)
                if ((filp->f_flags & O_NONBLOCK)||(filp->f_flags & O_NDELAY)) {
                        mutex_unlock(&cam->dev_mutex);
                        up_read(&w9968cf_disconnect);
@@ -2636,8 +2639,8 @@ static int w9968cf_open(struct file *filp)
                mutex_lock(&cam->dev_mutex);
        }
-        DBG(5, "Opening '%s', /dev/video%d ...",
+        DBG(5, "Opening '%s', %s ...",
-            symbolic(camlist, cam->id), cam->v4ldev->num)
+            symbolic(camlist, cam->id), video_device_node_name(cam->v4ldev))
        cam->streaming = 0;
        cam->misconfigured = 0;
@@ -2874,8 +2877,7 @@ static long w9968cf_v4l_ioctl(struct file *filp,
                        .minwidth = cam->minwidth,
                        .minheight = cam->minheight,
                };
-                sprintf(cap.name, "W996[87]CF USB Camera #%d",
+                sprintf(cap.name, "W996[87]CF USB Camera");
-                        cam->v4ldev->num);
                cap.maxwidth = (cam->upscaling && w9968cf_vpp)
                               ? max((u16)W9968CF_MAX_WIDTH, cam->maxwidth)
                                 : cam->maxwidth;
@@ -3485,7 +3487,6 @@ w9968cf_usb_probe(struct usb_interface* intf, const struct usb_device_id* id)
        strcpy(cam->v4ldev->name, symbolic(camlist, mod_id));
        cam->v4ldev->fops = &w9968cf_fops;
-        cam->v4ldev->minor = video_nr[dev_nr];
        cam->v4ldev->release = video_device_release;
        video_set_drvdata(cam->v4ldev, cam);
        cam->v4ldev->v4l2_dev = &cam->v4l2_dev;
@@ -3501,7 +3502,8 @@ w9968cf_usb_probe(struct usb_interface* intf, const struct usb_device_id* id)
                goto fail;
        }
-        DBG(2, "V4L device registered as /dev/video%d", cam->v4ldev->num)
+        DBG(2, "V4L device registered as %s",
+            video_device_node_name(cam->v4ldev))
        /* Set some basic constants */
        w9968cf_configure_camera(cam, udev, mod_id, dev_nr);
@@ -3557,10 +3559,10 @@ static void w9968cf_usb_disconnect(struct usb_interface* intf)
                wake_up_interruptible_all(&cam->open);
                if (cam->users) {
-                        DBG(2, "The device is open (/dev/video%d)! "
+                        DBG(2, "The device is open (%s)! "
                               "Process name: %s. Deregistration and memory "
                               "deallocation are deferred on close.",
-                            cam->v4ldev->num, cam->command)
+                            video_device_node_name(cam->v4ldev), cam->command)
                        cam->misconfigured = 1;
                        w9968cf_stop_transfer(cam);
                        wake_up_interruptible(&cam->wait_queue);
diff --git a/drivers/media/video/zc0301/zc0301_core.c b/drivers/media/video/zc0301/zc0301_core.c
index 312a71336fd0..e44e4b5f3e50 100644
--- a/drivers/media/video/zc0301/zc0301_core.c
+++ b/drivers/media/video/zc0301/zc0301_core.c
@@ -538,8 +538,8 @@ static int zc0301_stream_interrupt(struct zc0301_device* cam)
        else if (cam->stream != STREAM_OFF) {
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "URB timeout reached. The camera is misconfigured. To "
-                       "use it, close and open /dev/video%d again.",
+                       "use it, close and open %s again.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                return -EIO;
        }
@@ -640,7 +640,8 @@ static void zc0301_release_resources(struct kref *kref)
 {
        struct zc0301_device *cam = container_of(kref, struct zc0301_device,
                                                 kref);
-        DBG(2, "V4L2 device /dev/video%d deregistered", cam->v4ldev->num);
+        DBG(2, "V4L2 device %s deregistered",
+            video_device_node_name(cam->v4ldev));
        video_set_drvdata(cam->v4ldev, NULL);
        video_unregister_device(cam->v4ldev);
        usb_put_dev(cam->usbdev);
@@ -679,7 +680,8 @@ static int zc0301_open(struct file *filp)
        }
        if (cam->users) {
-                DBG(2, "Device /dev/video%d is busy...", cam->v4ldev->num);
+                DBG(2, "Device %s is busy...",
+                    video_device_node_name(cam->v4ldev));
                DBG(3, "Simultaneous opens are not supported");
                if ((filp->f_flags & O_NONBLOCK) ||
                    (filp->f_flags & O_NDELAY)) {
@@ -722,7 +724,8 @@ static int zc0301_open(struct file *filp)
        cam->frame_count = 0;
        zc0301_empty_framequeues(cam);
-        DBG(3, "Video device /dev/video%d is open", cam->v4ldev->num);
+        DBG(3, "Video device %s is open",
+            video_device_node_name(cam->v4ldev));
 out:
        mutex_unlock(&cam->open_mutex);
@@ -746,7 +749,8 @@ static int zc0301_release(struct file *filp)
        cam->users--;
        wake_up_interruptible_nr(&cam->wait_open, 1);
-        DBG(3, "Video device /dev/video%d closed", cam->v4ldev->num);
+        DBG(3, "Video device %s closed",
+            video_device_node_name(cam->v4ldev));
        kref_put(&cam->kref, zc0301_release_resources);
@@ -1276,8 +1280,8 @@ zc0301_vidioc_s_crop(struct zc0301_device* cam, void __user * arg)
        if (err) { /* atomic, no rollback in ioctl() */
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "VIDIOC_S_CROP failed because of hardware problems. To "
-                       "use the camera, close and open /dev/video%d again.",
+                       "use the camera, close and open %s again.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                return -EIO;
        }
@@ -1289,8 +1293,8 @@ zc0301_vidioc_s_crop(struct zc0301_device* cam, void __user * arg)
            nbuffers != zc0301_request_buffers(cam, nbuffers, cam->io)) {
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "VIDIOC_S_CROP failed because of not enough memory. To "
-                       "use the camera, close and open /dev/video%d again.",
+                       "use the camera, close and open %s again.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                return -ENOMEM;
        }
@@ -1471,8 +1475,8 @@ zc0301_vidioc_try_s_fmt(struct zc0301_device* cam, unsigned int cmd,
        if (err) { /* atomic, no rollback in ioctl() */
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "VIDIOC_S_FMT failed because of hardware problems. To "
-                       "use the camera, close and open /dev/video%d again.",
+                       "use the camera, close and open %s again.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                return -EIO;
        }
@@ -1483,8 +1487,8 @@ zc0301_vidioc_try_s_fmt(struct zc0301_device* cam, unsigned int cmd,
            nbuffers != zc0301_request_buffers(cam, nbuffers, cam->io)) {
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "VIDIOC_S_FMT failed because of not enough memory. To "
-                       "use the camera, close and open /dev/video%d again.",
+                       "use the camera, close and open %s again.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                return -ENOMEM;
        }
@@ -1530,8 +1534,8 @@ zc0301_vidioc_s_jpegcomp(struct zc0301_device* cam, void __user * arg)
        if (err) { /* atomic, no rollback in ioctl() */
                cam->state |= DEV_MISCONFIGURED;
                DBG(1, "VIDIOC_S_JPEGCOMP failed because of hardware "
-                       "problems. To use the camera, close and open "
+                       "problems. To use the camera, close and open %s again.",
-                       "/dev/video%d again.", cam->v4ldev->num);
+                       video_device_node_name(cam->v4ldev));
                return -EIO;
        }
@@ -1984,7 +1988,6 @@ zc0301_usb_probe(struct usb_interface* intf, const struct usb_device_id* id)
        strcpy(cam->v4ldev->name, "ZC0301[P] PC Camera");
        cam->v4ldev->fops = &zc0301_fops;
-        cam->v4ldev->minor = video_nr[dev_nr];
        cam->v4ldev->release = video_device_release;
        cam->v4ldev->parent = &udev->dev;
        video_set_drvdata(cam->v4ldev, cam);
@@ -2003,7 +2006,8 @@ zc0301_usb_probe(struct usb_interface* intf, const struct usb_device_id* id)
                goto fail;
        }
-        DBG(2, "V4L2 device registered as /dev/video%d", cam->v4ldev->num);
+        DBG(2, "V4L2 device registered as %s",
+            video_device_node_name(cam->v4ldev));
        cam->module_param.force_munmap = force_munmap[dev_nr];
        cam->module_param.frame_timeout = frame_timeout[dev_nr];
@@ -2040,9 +2044,9 @@ static void zc0301_usb_disconnect(struct usb_interface* intf)
        DBG(2, "Disconnecting %s...", cam->v4ldev->name);
        if (cam->users) {
-                DBG(2, "Device /dev/video%d is open! Deregistration and "
+                DBG(2, "Device %s is open! Deregistration and "
                       "memory deallocation are deferred.",
-                    cam->v4ldev->num);
+                    video_device_node_name(cam->v4ldev));
                cam->state |= DEV_MISCONFIGURED;
                zc0301_stop_transfer(cam);
                cam->state |= DEV_DISCONNECTED;
diff --git a/drivers/media/video/zoran/zoran_driver.c b/drivers/media/video/zoran/zoran_driver.c
index e9f72ca458f1..2ddffed019ee 100644
--- a/drivers/media/video/zoran/zoran_driver.c
+++ b/drivers/media/video/zoran/zoran_driver.c
@@ -3387,6 +3387,5 @@ struct video_device zoran_template __devinitdata = {
        .ioctl_ops = &zoran_ioctl_ops,
        .release = &zoran_vdev_release,
        .tvnorms = V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM,
-        .minor = -1
 };
diff --git a/drivers/media/video/zr364xx.c b/drivers/media/video/zr364xx.c
index 2ef110b5221b..f0eae83e3d89 100644
--- a/drivers/media/video/zr364xx.c
+++ b/drivers/media/video/zr364xx.c
@@ -1455,7 +1455,6 @@ static struct video_device zr364xx_template = {
        .fops = &zr364xx_fops,
        .ioctl_ops = &zr364xx_ioctl_ops,
        .release = video_device_release,
-        .minor = -1,
 };
@@ -1635,8 +1634,8 @@ static int zr364xx_probe(struct usb_interface *intf,
        spin_lock_init(&cam->slock);
-        dev_info(&udev->dev, DRIVER_DESC " controlling video device %d\n",
+        dev_info(&udev->dev, DRIVER_DESC " controlling device %s\n",
-                 cam->vdev->num);
+                 video_device_node_name(cam->vdev));
        return 0;
 }
diff --git a/drivers/misc/sgi-gru/gru.h b/drivers/misc/sgi-gru/gru.h
index f93f03a9e6e9..3ad76cd18b4b 100644
--- a/drivers/misc/sgi-gru/gru.h
+++ b/drivers/misc/sgi-gru/gru.h
@@ -53,6 +53,17 @@ struct gru_chiplet_info {
        int     free_user_cbr;
 };
+/*
+ * Statictics kept for each context.
+ */
+struct gru_gseg_statistics {
+        unsigned long   fmm_tlbmiss;
+        unsigned long   upm_tlbmiss;
+        unsigned long   tlbdropin;
+        unsigned long   context_stolen;
+        unsigned long   reserved[10];
+};
 /* Flags for GRU options on the gru_create_context() call */
 /* Select one of the follow 4 options to specify how TLB misses are handled */
 #define GRU_OPT_MISS_DEFAULT    0x0000  /* Use default mode */
diff --git a/drivers/misc/sgi-gru/gru_instructions.h b/drivers/misc/sgi-gru/gru_instructions.h
index 3c9c06618e6a..d95587cc794c 100644
--- a/drivers/misc/sgi-gru/gru_instructions.h
+++ b/drivers/misc/sgi-gru/gru_instructions.h
@@ -34,17 +34,17 @@ extern void gru_wait_abort_proc(void *cb);
 #include <asm/intrinsics.h>
 #define __flush_cache(p)                ia64_fc((unsigned long)p)
 /* Use volatile on IA64 to ensure ordering via st4.rel */
-#define gru_ordered_store_int(p, v)                                     \
+#define gru_ordered_store_ulong(p, v)                                   \
                do {                                                    \
                        barrier();                                      \
-                        *((volatile int *)(p)) = v; /* force st.rel */  \
+                        *((volatile unsigned long *)(p)) = v; /* force st.rel */        \
                } while (0)
 #elif defined(CONFIG_X86_64)
 #define __flush_cache(p)                clflush(p)
-#define gru_ordered_store_int(p, v)                                     \
+#define gru_ordered_store_ulong(p, v)                                   \
                do {                                                    \
                        barrier();                                      \
-                        *(int *)p = v;                                  \
+                        *(unsigned long *)p = v;                        \
                } while (0)
 #else
 #error "Unsupported architecture"
@@ -129,8 +129,13 @@ struct gru_instruction_bits {
 */
 struct gru_instruction {
    /* DW 0 */
-    unsigned int                op32;    /* icmd,xtype,iaa0,ima,opc */
+    union {
-    unsigned int                tri0;
+        unsigned long           op64;    /* icmd,xtype,iaa0,ima,opc,tri0 */
+        struct {
+                unsigned int    op32;
+                unsigned int    tri0;
+        };
+    };
    unsigned long               tri1_bufsize;           /* DW 1 */
    unsigned long               baddr0;                 /* DW 2 */
    unsigned long               nelem;                  /* DW 3 */
@@ -140,7 +145,7 @@ struct gru_instruction {
    unsigned long               avalue;                 /* DW 7 */
 };
-/* Some shifts and masks for the low 32 bits of a GRU command */
+/* Some shifts and masks for the low 64 bits of a GRU command */
 #define GRU_CB_ICMD_SHFT        0
 #define GRU_CB_ICMD_MASK        0x1
 #define GRU_CB_XTYPE_SHFT       8
@@ -155,6 +160,10 @@ struct gru_instruction {
 #define GRU_CB_OPC_MASK         0xff
 #define GRU_CB_EXOPC_SHFT       24
 #define GRU_CB_EXOPC_MASK       0xff
+#define GRU_IDEF2_SHFT          32
+#define GRU_IDEF2_MASK          0x3ffff
+#define GRU_ISTATUS_SHFT        56
+#define GRU_ISTATUS_MASK        0x3
 /* GRU instruction opcodes (opc field) */
 #define OP_NOP          0x00
@@ -256,6 +265,7 @@ struct gru_instruction {
 #define CBE_CAUSE_PROTOCOL_STATE_DATA_ERROR     (1 << 16)
 #define CBE_CAUSE_RA_RESPONSE_DATA_ERROR        (1 << 17)
 #define CBE_CAUSE_HA_RESPONSE_DATA_ERROR        (1 << 18)
+#define CBE_CAUSE_FORCED_ERROR                  (1 << 19)
 /* CBE cbrexecstatus bits */
 #define CBR_EXS_ABORT_OCC_BIT                   0
@@ -264,13 +274,15 @@ struct gru_instruction {
 #define CBR_EXS_QUEUED_BIT                      3
 #define CBR_EXS_TLB_INVAL_BIT                   4
 #define CBR_EXS_EXCEPTION_BIT                   5
+#define CBR_EXS_CB_INT_PENDING_BIT              6
 #define CBR_EXS_ABORT_OCC                       (1 << CBR_EXS_ABORT_OCC_BIT)
 #define CBR_EXS_INT_OCC                         (1 << CBR_EXS_INT_OCC_BIT)
 #define CBR_EXS_PENDING                         (1 << CBR_EXS_PENDING_BIT)
 #define CBR_EXS_QUEUED                          (1 << CBR_EXS_QUEUED_BIT)
-#define CBR_TLB_INVAL                           (1 << CBR_EXS_TLB_INVAL_BIT)
+#define CBR_EXS_TLB_INVAL                       (1 << CBR_EXS_TLB_INVAL_BIT)
 #define CBR_EXS_EXCEPTION                       (1 << CBR_EXS_EXCEPTION_BIT)
+#define CBR_EXS_CB_INT_PENDING                  (1 << CBR_EXS_CB_INT_PENDING_BIT)
 /*
 * Exceptions are retried for the following cases. If any OTHER bits are set
@@ -296,12 +308,14 @@ union gru_mesqhead {
 /* Generate the low word of a GRU instruction */
-static inline unsigned int
+static inline unsigned long
-__opword(unsigned char opcode, unsigned char exopc, unsigned char xtype,
+__opdword(unsigned char opcode, unsigned char exopc, unsigned char xtype,
       unsigned char iaa0, unsigned char iaa1,
-       unsigned char ima)
+       unsigned long idef2, unsigned char ima)
 {
    return (1 << GRU_CB_ICMD_SHFT) |
+           ((unsigned long)CBS_ACTIVE << GRU_ISTATUS_SHFT) |
+           (idef2<< GRU_IDEF2_SHFT) |
           (iaa0 << GRU_CB_IAA0_SHFT) |
           (iaa1 << GRU_CB_IAA1_SHFT) |
           (ima << GRU_CB_IMA_SHFT) |
@@ -319,12 +333,13 @@ static inline void gru_flush_cache(void *p)
 }
 /*
- * Store the lower 32 bits of the command including the "start" bit. Then
+ * Store the lower 64 bits of the command including the "start" bit. Then
 * start the instruction executing.
 */
-static inline void gru_start_instruction(struct gru_instruction *ins, int op32)
+static inline void gru_start_instruction(struct gru_instruction *ins, unsigned long op64)
 {
-        gru_ordered_store_int(ins, op32);
+        gru_ordered_store_ulong(ins, op64);
+        mb();
        gru_flush_cache(ins);
 }
@@ -340,6 +355,30 @@ static inline void gru_start_instruction(struct gru_instruction *ins, int op32)
 *      - nelem and stride are in elements
 *      - tri0/tri1 is in bytes for the beginning of the data segment.
 */
+static inline void gru_vload_phys(void *cb, unsigned long gpa,
+                unsigned int tri0, int iaa, unsigned long hints)
+{
+        struct gru_instruction *ins = (struct gru_instruction *)cb;
+        ins->baddr0 = (long)gpa | ((unsigned long)iaa << 62);
+        ins->nelem = 1;
+        ins->op1_stride = 1;
+        gru_start_instruction(ins, __opdword(OP_VLOAD, 0, XTYPE_DW, iaa, 0,
+                                        (unsigned long)tri0, CB_IMA(hints)));
+}
+static inline void gru_vstore_phys(void *cb, unsigned long gpa,
+                unsigned int tri0, int iaa, unsigned long hints)
+{
+        struct gru_instruction *ins = (struct gru_instruction *)cb;
+        ins->baddr0 = (long)gpa | ((unsigned long)iaa << 62);
+        ins->nelem = 1;
+        ins->op1_stride = 1;
+        gru_start_instruction(ins, __opdword(OP_VSTORE, 0, XTYPE_DW, iaa, 0,
+                                        (unsigned long)tri0, CB_IMA(hints)));
+}
 static inline void gru_vload(void *cb, unsigned long mem_addr,
                unsigned int tri0, unsigned char xtype, unsigned long nelem,
                unsigned long stride, unsigned long hints)
@@ -348,10 +387,9 @@ static inline void gru_vload(void *cb, unsigned long mem_addr,
        ins->baddr0 = (long)mem_addr;
        ins->nelem = nelem;
-        ins->tri0 = tri0;
        ins->op1_stride = stride;
-        gru_start_instruction(ins, __opword(OP_VLOAD, 0, xtype, IAA_RAM, 0,
+        gru_start_instruction(ins, __opdword(OP_VLOAD, 0, xtype, IAA_RAM, 0,
-                                        CB_IMA(hints)));
+                                        (unsigned long)tri0, CB_IMA(hints)));
 }
 static inline void gru_vstore(void *cb, unsigned long mem_addr,
@@ -362,10 +400,9 @@ static inline void gru_vstore(void *cb, unsigned long mem_addr,
        ins->baddr0 = (long)mem_addr;
        ins->nelem = nelem;
-        ins->tri0 = tri0;
        ins->op1_stride = stride;
-        gru_start_instruction(ins, __opword(OP_VSTORE, 0, xtype, IAA_RAM, 0,
+        gru_start_instruction(ins, __opdword(OP_VSTORE, 0, xtype, IAA_RAM, 0,
-                                        CB_IMA(hints)));
+                                        tri0, CB_IMA(hints)));
 }
 static inline void gru_ivload(void *cb, unsigned long mem_addr,
@@ -376,10 +413,9 @@ static inline void gru_ivload(void *cb, unsigned long mem_addr,
        ins->baddr0 = (long)mem_addr;
        ins->nelem = nelem;
-        ins->tri0 = tri0;
        ins->tri1_bufsize = tri1;
-        gru_start_instruction(ins, __opword(OP_IVLOAD, 0, xtype, IAA_RAM, 0,
+        gru_start_instruction(ins, __opdword(OP_IVLOAD, 0, xtype, IAA_RAM, 0,
-                                        CB_IMA(hints)));
+                                        tri0, CB_IMA(hints)));
 }
 static inline void gru_ivstore(void *cb, unsigned long mem_addr,
@@ -390,10 +426,9 @@ static inline void gru_ivstore(void *cb, unsigned long mem_addr,
        ins->baddr0 = (long)mem_addr;
        ins->nelem = nelem;
-        ins->tri0 = tri0;
        ins->tri1_bufsize = tri1;
-        gru_start_instruction(ins, __opword(OP_IVSTORE, 0, xtype, IAA_RAM, 0,
+        gru_start_instruction(ins, __opdword(OP_IVSTORE, 0, xtype, IAA_RAM, 0,
-                                        CB_IMA(hints)));
+                                        tri0, CB_IMA(hints)));
 }
 static inline void gru_vset(void *cb, unsigned long mem_addr,
@@ -406,8 +441,8 @@ static inline void gru_vset(void *cb, unsigned long mem_addr,
        ins->op2_value_baddr1 = value;
        ins->nelem = nelem;
        ins->op1_stride = stride;
-        gru_start_instruction(ins, __opword(OP_VSET, 0, xtype, IAA_RAM, 0,
+        gru_start_instruction(ins, __opdword(OP_VSET, 0, xtype, IAA_RAM, 0,
-                                         CB_IMA(hints)));
+                                         0, CB_IMA(hints)));
 }
 static inline void gru_ivset(void *cb, unsigned long mem_addr,
@@ -420,8 +455,8 @@ static inline void gru_ivset(void *cb, unsigned long mem_addr,
        ins->op2_value_baddr1 = value;
        ins->nelem = nelem;
        ins->tri1_bufsize = tri1;
-        gru_start_instruction(ins, __opword(OP_IVSET, 0, xtype, IAA_RAM, 0,
+        gru_start_instruction(ins, __opdword(OP_IVSET, 0, xtype, IAA_RAM, 0,
-                                        CB_IMA(hints)));
+                                        0, CB_IMA(hints)));
 }
 static inline void gru_vflush(void *cb, unsigned long mem_addr,
@@ -433,15 +468,15 @@ static inline void gru_vflush(void *cb, unsigned long mem_addr,
        ins->baddr0 = (long)mem_addr;
        ins->op1_stride = stride;
        ins->nelem = nelem;
-        gru_start_instruction(ins, __opword(OP_VFLUSH, 0, xtype, IAA_RAM, 0,
+        gru_start_instruction(ins, __opdword(OP_VFLUSH, 0, xtype, IAA_RAM, 0,
-                                        CB_IMA(hints)));
+                                        0, CB_IMA(hints)));
 }
 static inline void gru_nop(void *cb, int hints)
 {
        struct gru_instruction *ins = (void *)cb;
-        gru_start_instruction(ins, __opword(OP_NOP, 0, 0, 0, 0, CB_IMA(hints)));
+        gru_start_instruction(ins, __opdword(OP_NOP, 0, 0, 0, 0, 0, CB_IMA(hints)));
 }
@@ -455,10 +490,9 @@ static inline void gru_bcopy(void *cb, const unsigned long src,
        ins->baddr0 = (long)src;
        ins->op2_value_baddr1 = (long)dest;
        ins->nelem = nelem;
-        ins->tri0 = tri0;
        ins->tri1_bufsize = bufsize;
-        gru_start_instruction(ins, __opword(OP_BCOPY, 0, xtype, IAA_RAM,
+        gru_start_instruction(ins, __opdword(OP_BCOPY, 0, xtype, IAA_RAM,
-                                        IAA_RAM, CB_IMA(hints)));
+                                        IAA_RAM, tri0, CB_IMA(hints)));
 }
 static inline void gru_bstore(void *cb, const unsigned long src,
@@ -470,9 +504,8 @@ static inline void gru_bstore(void *cb, const unsigned long src,
        ins->baddr0 = (long)src;
        ins->op2_value_baddr1 = (long)dest;
        ins->nelem = nelem;
-        ins->tri0 = tri0;
+        gru_start_instruction(ins, __opdword(OP_BSTORE, 0, xtype, 0, IAA_RAM,
-        gru_start_instruction(ins, __opword(OP_BSTORE, 0, xtype, 0, IAA_RAM,
+                                        tri0, CB_IMA(hints)));
-                                        CB_IMA(hints)));
 }
 static inline void gru_gamir(void *cb, int exopc, unsigned long src,
@@ -481,8 +514,8 @@ static inline void gru_gamir(void *cb, int exopc, unsigned long src,
        struct gru_instruction *ins = (void *)cb;
        ins->baddr0 = (long)src;
-        gru_start_instruction(ins, __opword(OP_GAMIR, exopc, xtype, IAA_RAM, 0,
+        gru_start_instruction(ins, __opdword(OP_GAMIR, exopc, xtype, IAA_RAM, 0,
-                                        CB_IMA(hints)));
+                                        0, CB_IMA(hints)));
 }
 static inline void gru_gamirr(void *cb, int exopc, unsigned long src,
@@ -491,8 +524,8 @@ static inline void gru_gamirr(void *cb, int exopc, unsigned long src,
        struct gru_instruction *ins = (void *)cb;
        ins->baddr0 = (long)src;
-        gru_start_instruction(ins, __opword(OP_GAMIRR, exopc, xtype, IAA_RAM, 0,
+        gru_start_instruction(ins, __opdword(OP_GAMIRR, exopc, xtype, IAA_RAM, 0,
-                                        CB_IMA(hints)));
+                                        0, CB_IMA(hints)));
 }
 static inline void gru_gamer(void *cb, int exopc, unsigned long src,
@@ -505,8 +538,8 @@ static inline void gru_gamer(void *cb, int exopc, unsigned long src,
        ins->baddr0 = (long)src;
        ins->op1_stride = operand1;
        ins->op2_value_baddr1 = operand2;
-        gru_start_instruction(ins, __opword(OP_GAMER, exopc, xtype, IAA_RAM, 0,
+        gru_start_instruction(ins, __opdword(OP_GAMER, exopc, xtype, IAA_RAM, 0,
-                                        CB_IMA(hints)));
+                                        0, CB_IMA(hints)));
 }
 static inline void gru_gamerr(void *cb, int exopc, unsigned long src,
@@ -518,8 +551,8 @@ static inline void gru_gamerr(void *cb, int exopc, unsigned long src,
        ins->baddr0 = (long)src;
        ins->op1_stride = operand1;
        ins->op2_value_baddr1 = operand2;
-        gru_start_instruction(ins, __opword(OP_GAMERR, exopc, xtype, IAA_RAM, 0,
+        gru_start_instruction(ins, __opdword(OP_GAMERR, exopc, xtype, IAA_RAM, 0,
-                                        CB_IMA(hints)));
+                                        0, CB_IMA(hints)));
 }
 static inline void gru_gamxr(void *cb, unsigned long src,
@@ -529,8 +562,8 @@ static inline void gru_gamxr(void *cb, unsigned long src,
        ins->baddr0 = (long)src;
        ins->nelem = 4;
-        gru_start_instruction(ins, __opword(OP_GAMXR, EOP_XR_CSWAP, XTYPE_DW,
+        gru_start_instruction(ins, __opdword(OP_GAMXR, EOP_XR_CSWAP, XTYPE_DW,
-                                 IAA_RAM, 0, CB_IMA(hints)));
+                                 IAA_RAM, 0, 0, CB_IMA(hints)));
 }
 static inline void gru_mesq(void *cb, unsigned long queue,
@@ -541,9 +574,8 @@ static inline void gru_mesq(void *cb, unsigned long queue,
        ins->baddr0 = (long)queue;
        ins->nelem = nelem;
-        ins->tri0 = tri0;
+        gru_start_instruction(ins, __opdword(OP_MESQ, 0, XTYPE_CL, IAA_RAM, 0,
-        gru_start_instruction(ins, __opword(OP_MESQ, 0, XTYPE_CL, IAA_RAM, 0,
+                                        tri0, CB_IMA(hints)));
-                                        CB_IMA(hints)));
 }
 static inline unsigned long gru_get_amo_value(void *cb)
@@ -662,6 +694,14 @@ static inline void gru_wait_abort(void *cb)
        gru_wait_abort_proc(cb);
 }
+/*
+ * Get a pointer to the start of a gseg
+ *      p       - Any valid pointer within the gseg
+ */
+static inline void *gru_get_gseg_pointer (void *p)
+{
+        return (void *)((unsigned long)p & ~(GRU_GSEG_PAGESIZE - 1));
+}
 /*
 * Get a pointer to a control block
diff --git a/drivers/misc/sgi-gru/grufault.c b/drivers/misc/sgi-gru/grufault.c
index 679e01778286..38657cdaf54d 100644
--- a/drivers/misc/sgi-gru/grufault.c
+++ b/drivers/misc/sgi-gru/grufault.c
@@ -40,6 +40,12 @@
 #include "gru_instructions.h"
 #include <asm/uv/uv_hub.h>
+/* Return codes for vtop functions */
+#define VTOP_SUCCESS               0
+#define VTOP_INVALID               -1
+#define VTOP_RETRY                 -2
 /*
 * Test if a physical address is a valid GRU GSEG address
 */
@@ -90,19 +96,22 @@ static struct gru_thread_state *gru_alloc_locked_gts(unsigned long vaddr)
 {
        struct mm_struct *mm = current->mm;
        struct vm_area_struct *vma;
-        struct gru_thread_state *gts = NULL;
+        struct gru_thread_state *gts = ERR_PTR(-EINVAL);
        down_write(&mm->mmap_sem);
        vma = gru_find_vma(vaddr);
-        if (vma)
+        if (!vma)
-                gts = gru_alloc_thread_state(vma, TSID(vaddr, vma));
+                goto err;
-        if (gts) {
-                mutex_lock(&gts->ts_ctxlock);
-                downgrade_write(&mm->mmap_sem);
-        } else {
-                up_write(&mm->mmap_sem);
-        }
+        gts = gru_alloc_thread_state(vma, TSID(vaddr, vma));
+        if (IS_ERR(gts))
+                goto err;
+        mutex_lock(&gts->ts_ctxlock);
+        downgrade_write(&mm->mmap_sem);
+        return gts;
+err:
+        up_write(&mm->mmap_sem);
        return gts;
 }
@@ -122,39 +131,15 @@ static void gru_unlock_gts(struct gru_thread_state *gts)
 * is necessary to prevent the user from seeing a stale cb.istatus that will
 * change as soon as the TFH restart is complete. Races may cause an
 * occasional failure to clear the cb.istatus, but that is ok.
- *
- * If the cb address is not valid (should not happen, but...), nothing
- * bad will happen.. The get_user()/put_user() will fail but there
- * are no bad side-effects.
 */
-static void gru_cb_set_istatus_active(unsigned long __user *cb)
+static void gru_cb_set_istatus_active(struct gru_instruction_bits *cbk)
 {
-        union {
+        if (cbk) {
-                struct gru_instruction_bits bits;
+                cbk->istatus = CBS_ACTIVE;
-                unsigned long dw;
-        } u;
-        if (cb) {
-                get_user(u.dw, cb);
-                u.bits.istatus = CBS_ACTIVE;
-                put_user(u.dw, cb);
        }
 }
 /*
- * Convert a interrupt IRQ to a pointer to the GRU GTS that caused the
- * interrupt. Interrupts are always sent to a cpu on the blade that contains the
- * GRU (except for headless blades which are not currently supported). A blade
- * has N grus; a block of N consecutive IRQs is assigned to the GRUs. The IRQ
- * number uniquely identifies the GRU chiplet on the local blade that caused the
- * interrupt. Always called in interrupt context.
- */
-static inline struct gru_state *irq_to_gru(int irq)
-{
-        return &gru_base[uv_numa_blade_id()]->bs_grus[irq - IRQ_GRU];
-}
-/*
 * Read & clear a TFM
 *
 * The GRU has an array of fault maps. A map is private to a cpu
@@ -207,10 +192,11 @@ static int non_atomic_pte_lookup(struct vm_area_struct *vma,
 {
        struct page *page;
-        /* ZZZ Need to handle HUGE pages */
+#ifdef CONFIG_HUGETLB_PAGE
-        if (is_vm_hugetlb_page(vma))
+        *pageshift = is_vm_hugetlb_page(vma) ? HPAGE_SHIFT : PAGE_SHIFT;
-                return -EFAULT;
+#else
        *pageshift = PAGE_SHIFT;
+#endif
        if (get_user_pages
            (current, current->mm, vaddr, 1, write, 0, &page, NULL) <= 0)
                return -EFAULT;
@@ -268,7 +254,6 @@ static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr,
        return 0;
 err:
-        local_irq_enable();
        return 1;
 }
@@ -301,14 +286,69 @@ static int gru_vtop(struct gru_thread_state *gts, unsigned long vaddr,
        paddr = paddr & ~((1UL << ps) - 1);
        *gpa = uv_soc_phys_ram_to_gpa(paddr);
        *pageshift = ps;
-        return 0;
+        return VTOP_SUCCESS;
 inval:
-        return -1;
+        return VTOP_INVALID;
 upm:
-        return -2;
+        return VTOP_RETRY;
+}
+/*
+ * Flush a CBE from cache. The CBE is clean in the cache. Dirty the
+ * CBE cacheline so that the line will be written back to home agent.
+ * Otherwise the line may be silently dropped. This has no impact
+ * except on performance.
+ */
+static void gru_flush_cache_cbe(struct gru_control_block_extended *cbe)
+{
+        if (unlikely(cbe)) {
+                cbe->cbrexecstatus = 0;         /* make CL dirty */
+                gru_flush_cache(cbe);
+        }
 }
+/*
+ * Preload the TLB with entries that may be required. Currently, preloading
+ * is implemented only for BCOPY. Preload  <tlb_preload_count> pages OR to
+ * the end of the bcopy tranfer, whichever is smaller.
+ */
+static void gru_preload_tlb(struct gru_state *gru,
+                        struct gru_thread_state *gts, int atomic,
+                        unsigned long fault_vaddr, int asid, int write,
+                        unsigned char tlb_preload_count,
+                        struct gru_tlb_fault_handle *tfh,
+                        struct gru_control_block_extended *cbe)
+{
+        unsigned long vaddr = 0, gpa;
+        int ret, pageshift;
+        if (cbe->opccpy != OP_BCOPY)
+                return;
+        if (fault_vaddr == cbe->cbe_baddr0)
+                vaddr = fault_vaddr + GRU_CACHE_LINE_BYTES * cbe->cbe_src_cl - 1;
+        else if (fault_vaddr == cbe->cbe_baddr1)
+                vaddr = fault_vaddr + (1 << cbe->xtypecpy) * cbe->cbe_nelemcur - 1;
+        fault_vaddr &= PAGE_MASK;
+        vaddr &= PAGE_MASK;
+        vaddr = min(vaddr, fault_vaddr + tlb_preload_count * PAGE_SIZE);
+        while (vaddr > fault_vaddr) {
+                ret = gru_vtop(gts, vaddr, write, atomic, &gpa, &pageshift);
+                if (ret || tfh_write_only(tfh, gpa, GAA_RAM, vaddr, asid, write,
+                                          GRU_PAGESIZE(pageshift)))
+                        return;
+                gru_dbg(grudev,
+                        "%s: gid %d, gts 0x%p, tfh 0x%p, vaddr 0x%lx, asid 0x%x, rw %d, ps %d, gpa 0x%lx\n",
+                        atomic ? "atomic" : "non-atomic", gru->gs_gid, gts, tfh,
+                        vaddr, asid, write, pageshift, gpa);
+                vaddr -= PAGE_SIZE;
+                STAT(tlb_preload_page);
+        }
+}
 /*
 * Drop a TLB entry into the GRU. The fault is described by info in an TFH.
@@ -320,11 +360,14 @@ upm:
 *              < 0 = error code
 *
 */
-static int gru_try_dropin(struct gru_thread_state *gts,
+static int gru_try_dropin(struct gru_state *gru,
+                          struct gru_thread_state *gts,
                          struct gru_tlb_fault_handle *tfh,
-                          unsigned long __user *cb)
+                          struct gru_instruction_bits *cbk)
 {
-        int pageshift = 0, asid, write, ret, atomic = !cb;
+        struct gru_control_block_extended *cbe = NULL;
+        unsigned char tlb_preload_count = gts->ts_tlb_preload_count;
+        int pageshift = 0, asid, write, ret, atomic = !cbk, indexway;
        unsigned long gpa = 0, vaddr = 0;
        /*
@@ -335,24 +378,34 @@ static int gru_try_dropin(struct gru_thread_state *gts,
         */
        /*
+         * Prefetch the CBE if doing TLB preloading
+         */
+        if (unlikely(tlb_preload_count)) {
+                cbe = gru_tfh_to_cbe(tfh);
+                prefetchw(cbe);
+        }
+        /*
         * Error if TFH state is IDLE or FMM mode & the user issuing a UPM call.
         * Might be a hardware race OR a stupid user. Ignore FMM because FMM
         * is a transient state.
         */
        if (tfh->status != TFHSTATUS_EXCEPTION) {
                gru_flush_cache(tfh);
+                sync_core();
                if (tfh->status != TFHSTATUS_EXCEPTION)
                        goto failnoexception;
                STAT(tfh_stale_on_fault);
        }
        if (tfh->state == TFHSTATE_IDLE)
                goto failidle;
-        if (tfh->state == TFHSTATE_MISS_FMM && cb)
+        if (tfh->state == TFHSTATE_MISS_FMM && cbk)
                goto failfmm;
        write = (tfh->cause & TFHCAUSE_TLB_MOD) != 0;
        vaddr = tfh->missvaddr;
        asid = tfh->missasid;
+        indexway = tfh->indexway;
        if (asid == 0)
                goto failnoasid;
@@ -366,41 +419,51 @@ static int gru_try_dropin(struct gru_thread_state *gts,
                goto failactive;
        ret = gru_vtop(gts, vaddr, write, atomic, &gpa, &pageshift);
-        if (ret == -1)
+        if (ret == VTOP_INVALID)
                goto failinval;
-        if (ret == -2)
+        if (ret == VTOP_RETRY)
                goto failupm;
        if (!(gts->ts_sizeavail & GRU_SIZEAVAIL(pageshift))) {
                gts->ts_sizeavail |= GRU_SIZEAVAIL(pageshift);
-                if (atomic || !gru_update_cch(gts, 0)) {
+                if (atomic || !gru_update_cch(gts)) {
                        gts->ts_force_cch_reload = 1;
                        goto failupm;
                }
        }
-        gru_cb_set_istatus_active(cb);
+        if (unlikely(cbe) && pageshift == PAGE_SHIFT) {
+                gru_preload_tlb(gru, gts, atomic, vaddr, asid, write, tlb_preload_count, tfh, cbe);
+                gru_flush_cache_cbe(cbe);
+        }
+        gru_cb_set_istatus_active(cbk);
+        gts->ustats.tlbdropin++;
        tfh_write_restart(tfh, gpa, GAA_RAM, vaddr, asid, write,
                          GRU_PAGESIZE(pageshift));
-        STAT(tlb_dropin);
        gru_dbg(grudev,
-                "%s: tfh 0x%p, vaddr 0x%lx, asid 0x%x, ps %d, gpa 0x%lx\n",
+                "%s: gid %d, gts 0x%p, tfh 0x%p, vaddr 0x%lx, asid 0x%x, indexway 0x%x,"
-                ret ? "non-atomic" : "atomic", tfh, vaddr, asid,
+                " rw %d, ps %d, gpa 0x%lx\n",
-                pageshift, gpa);
+                atomic ? "atomic" : "non-atomic", gru->gs_gid, gts, tfh, vaddr, asid,
+                indexway, write, pageshift, gpa);
+        STAT(tlb_dropin);
        return 0;
 failnoasid:
        /* No asid (delayed unload). */
        STAT(tlb_dropin_fail_no_asid);
        gru_dbg(grudev, "FAILED no_asid tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
-        if (!cb)
+        if (!cbk)
                tfh_user_polling_mode(tfh);
        else
                gru_flush_cache(tfh);
+        gru_flush_cache_cbe(cbe);
        return -EAGAIN;
 failupm:
        /* Atomic failure switch CBR to UPM */
        tfh_user_polling_mode(tfh);
+        gru_flush_cache_cbe(cbe);
        STAT(tlb_dropin_fail_upm);
        gru_dbg(grudev, "FAILED upm tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
        return 1;
@@ -408,6 +471,7 @@ failupm:
 failfmm:
        /* FMM state on UPM call */
        gru_flush_cache(tfh);
+        gru_flush_cache_cbe(cbe);
        STAT(tlb_dropin_fail_fmm);
        gru_dbg(grudev, "FAILED fmm tfh: 0x%p, state %d\n", tfh, tfh->state);
        return 0;
@@ -415,17 +479,20 @@ failfmm:
 failnoexception:
        /* TFH status did not show exception pending */
        gru_flush_cache(tfh);
-        if (cb)
+        gru_flush_cache_cbe(cbe);
-                gru_flush_cache(cb);
+        if (cbk)
+                gru_flush_cache(cbk);
        STAT(tlb_dropin_fail_no_exception);
-        gru_dbg(grudev, "FAILED non-exception tfh: 0x%p, status %d, state %d\n", tfh, tfh->status, tfh->state);
+        gru_dbg(grudev, "FAILED non-exception tfh: 0x%p, status %d, state %d\n",
+                tfh, tfh->status, tfh->state);
        return 0;
 failidle:
        /* TFH state was idle  - no miss pending */
        gru_flush_cache(tfh);
-        if (cb)
+        gru_flush_cache_cbe(cbe);
-                gru_flush_cache(cb);
+        if (cbk)
+                gru_flush_cache(cbk);
        STAT(tlb_dropin_fail_idle);
        gru_dbg(grudev, "FAILED idle tfh: 0x%p, state %d\n", tfh, tfh->state);
        return 0;
@@ -433,16 +500,18 @@ failidle:
 failinval:
        /* All errors (atomic & non-atomic) switch CBR to EXCEPTION state */
        tfh_exception(tfh);
+        gru_flush_cache_cbe(cbe);
        STAT(tlb_dropin_fail_invalid);
        gru_dbg(grudev, "FAILED inval tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
        return -EFAULT;
 failactive:
        /* Range invalidate active. Switch to UPM iff atomic */
-        if (!cb)
+        if (!cbk)
                tfh_user_polling_mode(tfh);
        else
                gru_flush_cache(tfh);
+        gru_flush_cache_cbe(cbe);
        STAT(tlb_dropin_fail_range_active);
        gru_dbg(grudev, "FAILED range active: tfh 0x%p, vaddr 0x%lx\n",
                tfh, vaddr);
@@ -455,31 +524,41 @@ failactive:
 * Note that this is the interrupt handler that is registered with linux
 * interrupt handlers.
 */
-irqreturn_t gru_intr(int irq, void *dev_id)
+static irqreturn_t gru_intr(int chiplet, int blade)
 {
        struct gru_state *gru;
        struct gru_tlb_fault_map imap, dmap;
        struct gru_thread_state *gts;
        struct gru_tlb_fault_handle *tfh = NULL;
+        struct completion *cmp;
        int cbrnum, ctxnum;
        STAT(intr);
-        gru = irq_to_gru(irq);
+        gru = &gru_base[blade]->bs_grus[chiplet];
        if (!gru) {
-                dev_err(grudev, "GRU: invalid interrupt: cpu %d, irq %d\n",
+                dev_err(grudev, "GRU: invalid interrupt: cpu %d, chiplet %d\n",
-                        raw_smp_processor_id(), irq);
+                        raw_smp_processor_id(), chiplet);
                return IRQ_NONE;
        }
        get_clear_fault_map(gru, &imap, &dmap);
+        gru_dbg(grudev,
+                "cpu %d, chiplet %d, gid %d, imap %016lx %016lx, dmap %016lx %016lx\n",
+                smp_processor_id(), chiplet, gru->gs_gid,
+                imap.fault_bits[0], imap.fault_bits[1],
+                dmap.fault_bits[0], dmap.fault_bits[1]);
        for_each_cbr_in_tfm(cbrnum, dmap.fault_bits) {
-                complete(gru->gs_blade->bs_async_wq);
+                STAT(intr_cbr);
+                cmp = gru->gs_blade->bs_async_wq;
+                if (cmp)
+                        complete(cmp);
                gru_dbg(grudev, "gid %d, cbr_done %d, done %d\n",
-                        gru->gs_gid, cbrnum, gru->gs_blade->bs_async_wq->done);
+                        gru->gs_gid, cbrnum, cmp ? cmp->done : -1);
        }
        for_each_cbr_in_tfm(cbrnum, imap.fault_bits) {
+                STAT(intr_tfh);
                tfh = get_tfh_by_index(gru, cbrnum);
                prefetchw(tfh); /* Helps on hdw, required for emulator */
@@ -492,14 +571,20 @@ irqreturn_t gru_intr(int irq, void *dev_id)
                ctxnum = tfh->ctxnum;
                gts = gru->gs_gts[ctxnum];
+                /* Spurious interrupts can cause this. Ignore. */
+                if (!gts) {
+                        STAT(intr_spurious);
+                        continue;
+                }
                /*
                 * This is running in interrupt context. Trylock the mmap_sem.
                 * If it fails, retry the fault in user context.
                 */
+                gts->ustats.fmm_tlbmiss++;
                if (!gts->ts_force_cch_reload &&
                                        down_read_trylock(&gts->ts_mm->mmap_sem)) {
-                        gts->ustats.fmm_tlbdropin++;
+                        gru_try_dropin(gru, gts, tfh, NULL);
-                        gru_try_dropin(gts, tfh, NULL);
                        up_read(&gts->ts_mm->mmap_sem);
                } else {
                        tfh_user_polling_mode(tfh);
@@ -509,20 +594,43 @@ irqreturn_t gru_intr(int irq, void *dev_id)
        return IRQ_HANDLED;
 }
+irqreturn_t gru0_intr(int irq, void *dev_id)
+{
+        return gru_intr(0, uv_numa_blade_id());
+}
+irqreturn_t gru1_intr(int irq, void *dev_id)
+{
+        return gru_intr(1, uv_numa_blade_id());
+}
+irqreturn_t gru_intr_mblade(int irq, void *dev_id)
+{
+        int blade;
+        for_each_possible_blade(blade) {
+                if (uv_blade_nr_possible_cpus(blade))
+                        continue;
+                 gru_intr(0, blade);
+                 gru_intr(1, blade);
+        }
+        return IRQ_HANDLED;
+}
 static int gru_user_dropin(struct gru_thread_state *gts,
                           struct gru_tlb_fault_handle *tfh,
-                           unsigned long __user *cb)
+                           void *cb)
 {
        struct gru_mm_struct *gms = gts->ts_gms;
        int ret;
-        gts->ustats.upm_tlbdropin++;
+        gts->ustats.upm_tlbmiss++;
        while (1) {
                wait_event(gms->ms_wait_queue,
                           atomic_read(&gms->ms_range_active) == 0);
                prefetchw(tfh); /* Helps on hdw, required for emulator */
-                ret = gru_try_dropin(gts, tfh, cb);
+                ret = gru_try_dropin(gts->ts_gru, gts, tfh, cb);
                if (ret <= 0)
                        return ret;
                STAT(call_os_wait_queue);
@@ -538,52 +646,41 @@ int gru_handle_user_call_os(unsigned long cb)
 {
        struct gru_tlb_fault_handle *tfh;
        struct gru_thread_state *gts;
-        unsigned long __user *cbp;
+        void *cbk;
        int ucbnum, cbrnum, ret = -EINVAL;
        STAT(call_os);
-        gru_dbg(grudev, "address 0x%lx\n", cb);
        /* sanity check the cb pointer */
        ucbnum = get_cb_number((void *)cb);
        if ((cb & (GRU_HANDLE_STRIDE - 1)) || ucbnum >= GRU_NUM_CB)
                return -EINVAL;
-        cbp = (unsigned long *)cb;
        gts = gru_find_lock_gts(cb);
        if (!gts)
                return -EINVAL;
+        gru_dbg(grudev, "address 0x%lx, gid %d, gts 0x%p\n", cb, gts->ts_gru ? gts->ts_gru->gs_gid : -1, gts);
        if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE)
                goto exit;
-        /*
+        gru_check_context_placement(gts);
-         * If force_unload is set, the UPM TLB fault is phony. The task
-         * has migrated to another node and the GSEG must be moved. Just
-         * unload the context. The task will page fault and assign a new
-         * context.
-         */
-        if (gts->ts_tgid_owner == current->tgid && gts->ts_blade >= 0 &&
-                                gts->ts_blade != uv_numa_blade_id()) {
-                STAT(call_os_offnode_reference);
-                gts->ts_force_unload = 1;
-        }
        /*
         * CCH may contain stale data if ts_force_cch_reload is set.
         */
        if (gts->ts_gru && gts->ts_force_cch_reload) {
                gts->ts_force_cch_reload = 0;
-                gru_update_cch(gts, 0);
+                gru_update_cch(gts);
        }
        ret = -EAGAIN;
        cbrnum = thread_cbr_number(gts, ucbnum);
-        if (gts->ts_force_unload) {
+        if (gts->ts_gru) {
-                gru_unload_context(gts, 1);
-        } else if (gts->ts_gru) {
                tfh = get_tfh_by_index(gts->ts_gru, cbrnum);
-                ret = gru_user_dropin(gts, tfh, cbp);
+                cbk = get_gseg_base_address_cb(gts->ts_gru->gs_gru_base_vaddr,
+                                gts->ts_ctxnum, ucbnum);
+                ret = gru_user_dropin(gts, tfh, cbk);
        }
 exit:
        gru_unlock_gts(gts);
@@ -605,11 +702,11 @@ int gru_get_exception_detail(unsigned long arg)
        if (copy_from_user(&excdet, (void __user *)arg, sizeof(excdet)))
                return -EFAULT;
-        gru_dbg(grudev, "address 0x%lx\n", excdet.cb);
        gts = gru_find_lock_gts(excdet.cb);
        if (!gts)
                return -EINVAL;
+        gru_dbg(grudev, "address 0x%lx, gid %d, gts 0x%p\n", excdet.cb, gts->ts_gru ? gts->ts_gru->gs_gid : -1, gts);
        ucbnum = get_cb_number((void *)excdet.cb);
        if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) {
                ret = -EINVAL;
@@ -617,6 +714,7 @@ int gru_get_exception_detail(unsigned long arg)
                cbrnum = thread_cbr_number(gts, ucbnum);
                cbe = get_cbe_by_index(gts->ts_gru, cbrnum);
                gru_flush_cache(cbe);   /* CBE not coherent */
+                sync_core();            /* make sure we are have current data */
                excdet.opc = cbe->opccpy;
                excdet.exopc = cbe->exopccpy;
                excdet.ecause = cbe->ecause;
@@ -624,7 +722,7 @@ int gru_get_exception_detail(unsigned long arg)
                excdet.exceptdet1 = cbe->idef3upd;
                excdet.cbrstate = cbe->cbrstate;
                excdet.cbrexecstatus = cbe->cbrexecstatus;
-                gru_flush_cache(cbe);
+                gru_flush_cache_cbe(cbe);
                ret = 0;
        } else {
                ret = -EAGAIN;
@@ -733,6 +831,11 @@ long gru_get_gseg_statistics(unsigned long arg)
        if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
                return -EFAULT;
+        /*
+         * The library creates arrays of contexts for threaded programs.
+         * If no gts exists in the array, the context has never been used & all
+         * statistics are implicitly 0.
+         */
        gts = gru_find_lock_gts(req.gseg);
        if (gts) {
                memcpy(&req.stats, &gts->ustats, sizeof(gts->ustats));
@@ -762,11 +865,25 @@ int gru_set_context_option(unsigned long arg)
                return -EFAULT;
        gru_dbg(grudev, "op %d, gseg 0x%lx, value1 0x%lx\n", req.op, req.gseg, req.val1);
-        gts = gru_alloc_locked_gts(req.gseg);
+        gts = gru_find_lock_gts(req.gseg);
-        if (!gts)
+        if (!gts) {
-                return -EINVAL;
+                gts = gru_alloc_locked_gts(req.gseg);
+                if (IS_ERR(gts))
+                        return PTR_ERR(gts);
+        }
        switch (req.op) {
+        case sco_blade_chiplet:
+                /* Select blade/chiplet for GRU context */
+                if (req.val1 < -1 || req.val1 >= GRU_MAX_BLADES || !gru_base[req.val1] ||
+                    req.val0 < -1 || req.val0 >= GRU_CHIPLETS_PER_HUB) {
+                        ret = -EINVAL;
+                } else {
+                        gts->ts_user_blade_id = req.val1;
+                        gts->ts_user_chiplet_id = req.val0;
+                        gru_check_context_placement(gts);
+                }
+                break;
        case sco_gseg_owner:
                /* Register the current task as the GSEG owner */
                gts->ts_tgid_owner = current->tgid;
diff --git a/drivers/misc/sgi-gru/grufile.c b/drivers/misc/sgi-gru/grufile.c
index ce5eda985ab0..cb3b4d228475 100644
--- a/drivers/misc/sgi-gru/grufile.c
+++ b/drivers/misc/sgi-gru/grufile.c
@@ -35,6 +35,9 @@
 #include <linux/interrupt.h>
 #include <linux/proc_fs.h>
 #include <linux/uaccess.h>
+#ifdef CONFIG_X86_64
+#include <asm/uv/uv_irq.h>
+#endif
 #include <asm/uv/uv.h>
 #include "gru.h"
 #include "grulib.h"
@@ -130,7 +133,6 @@ static int gru_create_new_context(unsigned long arg)
        struct gru_vma_data *vdata;
        int ret = -EINVAL;
        if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
                return -EFAULT;
@@ -150,6 +152,7 @@ static int gru_create_new_context(unsigned long arg)
                vdata->vd_dsr_au_count =
                    GRU_DS_BYTES_TO_AU(req.data_segment_bytes);
                vdata->vd_cbr_au_count = GRU_CB_COUNT_TO_AU(req.control_blocks);
+                vdata->vd_tlb_preload_count = req.tlb_preload_count;
                ret = 0;
        }
        up_write(&current->mm->mmap_sem);
@@ -190,7 +193,7 @@ static long gru_file_unlocked_ioctl(struct file *file, unsigned int req,
 {
        int err = -EBADRQC;
-        gru_dbg(grudev, "file %p\n", file);
+        gru_dbg(grudev, "file %p, req 0x%x, 0x%lx\n", file, req, arg);
        switch (req) {
        case GRU_CREATE_CONTEXT:
@@ -232,23 +235,24 @@ static long gru_file_unlocked_ioctl(struct file *file, unsigned int req,
 * system.
 */
 static void gru_init_chiplet(struct gru_state *gru, unsigned long paddr,
-                             void *vaddr, int nid, int bid, int grunum)
+                             void *vaddr, int blade_id, int chiplet_id)
 {
        spin_lock_init(&gru->gs_lock);
        spin_lock_init(&gru->gs_asid_lock);
        gru->gs_gru_base_paddr = paddr;
        gru->gs_gru_base_vaddr = vaddr;
-        gru->gs_gid = bid * GRU_CHIPLETS_PER_BLADE + grunum;
+        gru->gs_gid = blade_id * GRU_CHIPLETS_PER_BLADE + chiplet_id;
-        gru->gs_blade = gru_base[bid];
+        gru->gs_blade = gru_base[blade_id];
-        gru->gs_blade_id = bid;
+        gru->gs_blade_id = blade_id;
+        gru->gs_chiplet_id = chiplet_id;
        gru->gs_cbr_map = (GRU_CBR_AU == 64) ? ~0 : (1UL << GRU_CBR_AU) - 1;
        gru->gs_dsr_map = (1UL << GRU_DSR_AU) - 1;
        gru->gs_asid_limit = MAX_ASID;
        gru_tgh_flush_init(gru);
        if (gru->gs_gid >= gru_max_gids)
                gru_max_gids = gru->gs_gid + 1;
-        gru_dbg(grudev, "bid %d, nid %d, gid %d, vaddr %p (0x%lx)\n",
+        gru_dbg(grudev, "bid %d, gid %d, vaddr %p (0x%lx)\n",
-                bid, nid, gru->gs_gid, gru->gs_gru_base_vaddr,
+                blade_id, gru->gs_gid, gru->gs_gru_base_vaddr,
                gru->gs_gru_base_paddr);
 }
@@ -264,12 +268,10 @@ static int gru_init_tables(unsigned long gru_base_paddr, void *gru_base_vaddr)
        max_user_cbrs = GRU_NUM_CB;
        max_user_dsr_bytes = GRU_NUM_DSR_BYTES;
-        for_each_online_node(nid) {
+        for_each_possible_blade(bid) {
-                bid = uv_node_to_blade_id(nid);
+                pnode = uv_blade_to_pnode(bid);
-                pnode = uv_node_to_pnode(nid);
+                nid = uv_blade_to_memory_nid(bid);/* -1 if no memory on blade */
-                if (bid < 0 || gru_base[bid])
+                page = alloc_pages_node(nid, GFP_KERNEL, order);
-                        continue;
-                page = alloc_pages_exact_node(nid, GFP_KERNEL, order);
                if (!page)
                        goto fail;
                gru_base[bid] = page_address(page);
@@ -285,7 +287,7 @@ static int gru_init_tables(unsigned long gru_base_paddr, void *gru_base_vaddr)
                                chip++, gru++) {
                        paddr = gru_chiplet_paddr(gru_base_paddr, pnode, chip);
                        vaddr = gru_chiplet_vaddr(gru_base_vaddr, pnode, chip);
-                        gru_init_chiplet(gru, paddr, vaddr, nid, bid, chip);
+                        gru_init_chiplet(gru, paddr, vaddr, bid, chip);
                        n = hweight64(gru->gs_cbr_map) * GRU_CBR_AU_SIZE;
                        cbrs = max(cbrs, n);
                        n = hweight64(gru->gs_dsr_map) * GRU_DSR_AU_BYTES;
@@ -298,39 +300,215 @@ static int gru_init_tables(unsigned long gru_base_paddr, void *gru_base_vaddr)
        return 0;
 fail:
-        for (nid--; nid >= 0; nid--)
+        for (bid--; bid >= 0; bid--)
-                free_pages((unsigned long)gru_base[nid], order);
+                free_pages((unsigned long)gru_base[bid], order);
        return -ENOMEM;
 }
-#ifdef CONFIG_IA64
+static void gru_free_tables(void)
+{
+        int bid;
+        int order = get_order(sizeof(struct gru_state) *
+                              GRU_CHIPLETS_PER_BLADE);
-static int get_base_irq(void)
+        for (bid = 0; bid < GRU_MAX_BLADES; bid++)
+                free_pages((unsigned long)gru_base[bid], order);
+}
+static unsigned long gru_chiplet_cpu_to_mmr(int chiplet, int cpu, int *corep)
 {
-        return IRQ_GRU;
+        unsigned long mmr = 0;
+        int core;
+        /*
+         * We target the cores of a blade and not the hyperthreads themselves.
+         * There is a max of 8 cores per socket and 2 sockets per blade,
+         * making for a max total of 16 cores (i.e., 16 CPUs without
+         * hyperthreading and 32 CPUs with hyperthreading).
+         */
+        core = uv_cpu_core_number(cpu) + UV_MAX_INT_CORES * uv_cpu_socket_number(cpu);
+        if (core >= GRU_NUM_TFM || uv_cpu_ht_number(cpu))
+                return 0;
+        if (chiplet == 0) {
+                mmr = UVH_GR0_TLB_INT0_CONFIG +
+                    core * (UVH_GR0_TLB_INT1_CONFIG - UVH_GR0_TLB_INT0_CONFIG);
+        } else if (chiplet == 1) {
+                mmr = UVH_GR1_TLB_INT0_CONFIG +
+                    core * (UVH_GR1_TLB_INT1_CONFIG - UVH_GR1_TLB_INT0_CONFIG);
+        } else {
+                BUG();
+        }
+        *corep = core;
+        return mmr;
 }
-#elif defined CONFIG_X86_64
+#ifdef CONFIG_IA64
-static void noop(unsigned int irq)
+static int gru_irq_count[GRU_CHIPLETS_PER_BLADE];
+static void gru_noop(unsigned int irq)
 {
 }
-static struct irq_chip gru_chip = {
+static struct irq_chip gru_chip[GRU_CHIPLETS_PER_BLADE] = {
-        .name           = "gru",
+        [0 ... GRU_CHIPLETS_PER_BLADE - 1] {
-        .mask           = noop,
+                .mask           = gru_noop,
-        .unmask         = noop,
+                .unmask         = gru_noop,
-        .ack            = noop,
+                .ack            = gru_noop
+        }
 };
-static int get_base_irq(void)
+static int gru_chiplet_setup_tlb_irq(int chiplet, char *irq_name,
+                        irq_handler_t irq_handler, int cpu, int blade)
+{
+        unsigned long mmr;
+        int irq = IRQ_GRU + chiplet;
+        int ret, core;
+        mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core);
+        if (mmr == 0)
+                return 0;
+        if (gru_irq_count[chiplet] == 0) {
+                gru_chip[chiplet].name = irq_name;
+                ret = set_irq_chip(irq, &gru_chip[chiplet]);
+                if (ret) {
+                        printk(KERN_ERR "%s: set_irq_chip failed, errno=%d\n",
+                               GRU_DRIVER_ID_STR, -ret);
+                        return ret;
+                }
+                ret = request_irq(irq, irq_handler, 0, irq_name, NULL);
+                if (ret) {
+                        printk(KERN_ERR "%s: request_irq failed, errno=%d\n",
+                               GRU_DRIVER_ID_STR, -ret);
+                        return ret;
+                }
+        }
+        gru_irq_count[chiplet]++;
+        return 0;
+}
+static void gru_chiplet_teardown_tlb_irq(int chiplet, int cpu, int blade)
+{
+        unsigned long mmr;
+        int core, irq = IRQ_GRU + chiplet;
+        if (gru_irq_count[chiplet] == 0)
+                return;
+        mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core);
+        if (mmr == 0)
+                return;
+        if (--gru_irq_count[chiplet] == 0)
+                free_irq(irq, NULL);
+}
+#elif defined CONFIG_X86_64
+static int gru_chiplet_setup_tlb_irq(int chiplet, char *irq_name,
+                        irq_handler_t irq_handler, int cpu, int blade)
+{
+        unsigned long mmr;
+        int irq, core;
+        int ret;
+        mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core);
+        if (mmr == 0)
+                return 0;
+        irq = uv_setup_irq(irq_name, cpu, blade, mmr, UV_AFFINITY_CPU);
+        if (irq < 0) {
+                printk(KERN_ERR "%s: uv_setup_irq failed, errno=%d\n",
+                       GRU_DRIVER_ID_STR, -irq);
+                return irq;
+        }
+        ret = request_irq(irq, irq_handler, 0, irq_name, NULL);
+        if (ret) {
+                uv_teardown_irq(irq);
+                printk(KERN_ERR "%s: request_irq failed, errno=%d\n",
+                       GRU_DRIVER_ID_STR, -ret);
+                return ret;
+        }
+        gru_base[blade]->bs_grus[chiplet].gs_irq[core] = irq;
+        return 0;
+}
+static void gru_chiplet_teardown_tlb_irq(int chiplet, int cpu, int blade)
 {
-        set_irq_chip(IRQ_GRU, &gru_chip);
+        int irq, core;
-        set_irq_chip(IRQ_GRU + 1, &gru_chip);
+        unsigned long mmr;
-        return IRQ_GRU;
+        mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core);
+        if (mmr) {
+                irq = gru_base[blade]->bs_grus[chiplet].gs_irq[core];
+                if (irq) {
+                        free_irq(irq, NULL);
+                        uv_teardown_irq(irq);
+                }
+        }
 }
 #endif
+static void gru_teardown_tlb_irqs(void)
+{
+        int blade;
+        int cpu;
+        for_each_online_cpu(cpu) {
+                blade = uv_cpu_to_blade_id(cpu);
+                gru_chiplet_teardown_tlb_irq(0, cpu, blade);
+                gru_chiplet_teardown_tlb_irq(1, cpu, blade);
+        }
+        for_each_possible_blade(blade) {
+                if (uv_blade_nr_possible_cpus(blade))
+                        continue;
+                gru_chiplet_teardown_tlb_irq(0, 0, blade);
+                gru_chiplet_teardown_tlb_irq(1, 0, blade);
+        }
+}
+static int gru_setup_tlb_irqs(void)
+{
+        int blade;
+        int cpu;
+        int ret;
+        for_each_online_cpu(cpu) {
+                blade = uv_cpu_to_blade_id(cpu);
+                ret = gru_chiplet_setup_tlb_irq(0, "GRU0_TLB", gru0_intr, cpu, blade);
+                if (ret != 0)
+                        goto exit1;
+                ret = gru_chiplet_setup_tlb_irq(1, "GRU1_TLB", gru1_intr, cpu, blade);
+                if (ret != 0)
+                        goto exit1;
+        }
+        for_each_possible_blade(blade) {
+                if (uv_blade_nr_possible_cpus(blade))
+                        continue;
+                ret = gru_chiplet_setup_tlb_irq(0, "GRU0_TLB", gru_intr_mblade, 0, blade);
+                if (ret != 0)
+                        goto exit1;
+                ret = gru_chiplet_setup_tlb_irq(1, "GRU1_TLB", gru_intr_mblade, 0, blade);
+                if (ret != 0)
+                        goto exit1;
+        }
+        return 0;
+exit1:
+        gru_teardown_tlb_irqs();
+        return ret;
+}
 /*
 * gru_init
 *
@@ -338,8 +516,7 @@ static int get_base_irq(void)
 */
 static int __init gru_init(void)
 {
-        int ret, irq, chip;
+        int ret;
-        char id[10];
        if (!is_uv_system())
                return 0;
@@ -354,41 +531,29 @@ static int __init gru_init(void)
        gru_end_paddr = gru_start_paddr + GRU_MAX_BLADES * GRU_SIZE;
        printk(KERN_INFO "GRU space: 0x%lx - 0x%lx\n",
               gru_start_paddr, gru_end_paddr);
-        irq = get_base_irq();
-        for (chip = 0; chip < GRU_CHIPLETS_PER_BLADE; chip++) {
-                ret = request_irq(irq + chip, gru_intr, 0, id, NULL);
-                /* TODO: fix irq handling on x86. For now ignore failure because
-                 * interrupts are not required & not yet fully supported */
-                if (ret) {
-                        printk(KERN_WARNING
-                               "!!!WARNING: GRU ignoring request failure!!!\n");
-                        ret = 0;
-                }
-                if (ret) {
-                        printk(KERN_ERR "%s: request_irq failed\n",
-                               GRU_DRIVER_ID_STR);
-                        goto exit1;
-                }
-        }
        ret = misc_register(&gru_miscdev);
        if (ret) {
                printk(KERN_ERR "%s: misc_register failed\n",
                       GRU_DRIVER_ID_STR);
-                goto exit1;
+                goto exit0;
        }
        ret = gru_proc_init();
        if (ret) {
                printk(KERN_ERR "%s: proc init failed\n", GRU_DRIVER_ID_STR);
-                goto exit2;
+                goto exit1;
        }
        ret = gru_init_tables(gru_start_paddr, gru_start_vaddr);
        if (ret) {
                printk(KERN_ERR "%s: init tables failed\n", GRU_DRIVER_ID_STR);
-                goto exit3;
+                goto exit2;
        }
+        ret = gru_setup_tlb_irqs();
+        if (ret != 0)
+                goto exit3;
        gru_kservices_init();
        printk(KERN_INFO "%s: v%s\n", GRU_DRIVER_ID_STR,
@@ -396,31 +561,24 @@ static int __init gru_init(void)
        return 0;
 exit3:
-        gru_proc_exit();
+        gru_free_tables();
 exit2:
-        misc_deregister(&gru_miscdev);
+        gru_proc_exit();
 exit1:
-        for (--chip; chip >= 0; chip--)
+        misc_deregister(&gru_miscdev);
-                free_irq(irq + chip, NULL);
+exit0:
        return ret;
 }
 static void __exit gru_exit(void)
 {
-        int i, bid;
-        int order = get_order(sizeof(struct gru_state) *
-                              GRU_CHIPLETS_PER_BLADE);
        if (!is_uv_system())
                return;
-        for (i = 0; i < GRU_CHIPLETS_PER_BLADE; i++)
+        gru_teardown_tlb_irqs();
-                free_irq(IRQ_GRU + i, NULL);
        gru_kservices_exit();
-        for (bid = 0; bid < GRU_MAX_BLADES; bid++)
+        gru_free_tables();
-                free_pages((unsigned long)gru_base[bid], order);
        misc_deregister(&gru_miscdev);
        gru_proc_exit();
 }
diff --git a/drivers/misc/sgi-gru/gruhandles.c b/drivers/misc/sgi-gru/gruhandles.c
index 37e7cfc53b9c..2f30badc6ffd 100644
--- a/drivers/misc/sgi-gru/gruhandles.c
+++ b/drivers/misc/sgi-gru/gruhandles.c
@@ -27,9 +27,11 @@
 #ifdef CONFIG_IA64
 #include <asm/processor.h>
 #define GRU_OPERATION_TIMEOUT   (((cycles_t) local_cpu_data->itc_freq)*10)
+#define CLKS2NSEC(c)            ((c) *1000000000 / local_cpu_data->itc_freq)
 #else
 #include <asm/tsc.h>
 #define GRU_OPERATION_TIMEOUT   ((cycles_t) tsc_khz*10*1000)
+#define CLKS2NSEC(c)            ((c) * 1000000 / tsc_khz)
 #endif
 /* Extract the status field from a kernel handle */
@@ -39,21 +41,39 @@ struct mcs_op_statistic mcs_op_statistics[mcsop_last];
 static void update_mcs_stats(enum mcs_op op, unsigned long clks)
 {
+        unsigned long nsec;
+        nsec = CLKS2NSEC(clks);
        atomic_long_inc(&mcs_op_statistics[op].count);
-        atomic_long_add(clks, &mcs_op_statistics[op].total);
+        atomic_long_add(nsec, &mcs_op_statistics[op].total);
-        if (mcs_op_statistics[op].max < clks)
+        if (mcs_op_statistics[op].max < nsec)
-                mcs_op_statistics[op].max = clks;
+                mcs_op_statistics[op].max = nsec;
 }
 static void start_instruction(void *h)
 {
        unsigned long *w0 = h;
-        wmb();          /* setting CMD bit must be last */
+        wmb();          /* setting CMD/STATUS bits must be last */
-        *w0 = *w0 | 1;
+        *w0 = *w0 | 0x20001;
        gru_flush_cache(h);
 }
+static void report_instruction_timeout(void *h)
+{
+        unsigned long goff = GSEGPOFF((unsigned long)h);
+        char *id = "???";
+        if (TYPE_IS(CCH, goff))
+                id = "CCH";
+        else if (TYPE_IS(TGH, goff))
+                id = "TGH";
+        else if (TYPE_IS(TFH, goff))
+                id = "TFH";
+        panic(KERN_ALERT "GRU %p (%s) is malfunctioning\n", h, id);
+}
 static int wait_instruction_complete(void *h, enum mcs_op opc)
 {
        int status;
@@ -64,9 +84,10 @@ static int wait_instruction_complete(void *h, enum mcs_op opc)
                status = GET_MSEG_HANDLE_STATUS(h);
                if (status != CCHSTATUS_ACTIVE)
                        break;
-                if (GRU_OPERATION_TIMEOUT < (get_cycles() - start_time))
+                if (GRU_OPERATION_TIMEOUT < (get_cycles() - start_time)) {
-                        panic("GRU %p is malfunctioning: start %ld, end %ld\n",
+                        report_instruction_timeout(h);
-                              h, start_time, (unsigned long)get_cycles());
+                        start_time = get_cycles();
+                }
        }
        if (gru_options & OPT_STATS)
                update_mcs_stats(opc, get_cycles() - start_time);
@@ -75,9 +96,18 @@ static int wait_instruction_complete(void *h, enum mcs_op opc)
 int cch_allocate(struct gru_context_configuration_handle *cch)
 {
+        int ret;
        cch->opc = CCHOP_ALLOCATE;
        start_instruction(cch);
-        return wait_instruction_complete(cch, cchop_allocate);
+        ret = wait_instruction_complete(cch, cchop_allocate);
+        /*
+         * Stop speculation into the GSEG being mapped by the previous ALLOCATE.
+         * The GSEG memory does not exist until the ALLOCATE completes.
+         */
+        sync_core();
+        return ret;
 }
 int cch_start(struct gru_context_configuration_handle *cch)
@@ -96,9 +126,18 @@ int cch_interrupt(struct gru_context_configuration_handle *cch)
 int cch_deallocate(struct gru_context_configuration_handle *cch)
 {
+        int ret;
        cch->opc = CCHOP_DEALLOCATE;
        start_instruction(cch);
-        return wait_instruction_complete(cch, cchop_deallocate);
+        ret = wait_instruction_complete(cch, cchop_deallocate);
+        /*
+         * Stop speculation into the GSEG being unmapped by the previous
+         * DEALLOCATE.
+         */
+        sync_core();
+        return ret;
 }
 int cch_interrupt_sync(struct gru_context_configuration_handle
@@ -126,17 +165,20 @@ int tgh_invalidate(struct gru_tlb_global_handle *tgh,
        return wait_instruction_complete(tgh, tghop_invalidate);
 }
-void tfh_write_only(struct gru_tlb_fault_handle *tfh,
+int tfh_write_only(struct gru_tlb_fault_handle *tfh,
-                                  unsigned long pfn, unsigned long vaddr,
+                                  unsigned long paddr, int gaa,
-                                  int asid, int dirty, int pagesize)
+                                  unsigned long vaddr, int asid, int dirty,
+                                  int pagesize)
 {
        tfh->fillasid = asid;
        tfh->fillvaddr = vaddr;
-        tfh->pfn = pfn;
+        tfh->pfn = paddr >> GRU_PADDR_SHIFT;
+        tfh->gaa = gaa;
        tfh->dirty = dirty;
        tfh->pagesize = pagesize;
        tfh->opc = TFHOP_WRITE_ONLY;
        start_instruction(tfh);
+        return wait_instruction_complete(tfh, tfhop_write_only);
 }
 void tfh_write_restart(struct gru_tlb_fault_handle *tfh,
diff --git a/drivers/misc/sgi-gru/gruhandles.h b/drivers/misc/sgi-gru/gruhandles.h
index f44112242d00..3f998b924d8f 100644
--- a/drivers/misc/sgi-gru/gruhandles.h
+++ b/drivers/misc/sgi-gru/gruhandles.h
@@ -91,6 +91,12 @@
 /* Convert an arbitrary handle address to the beginning of the GRU segment */
 #define GRUBASE(h)              ((void *)((unsigned long)(h) & ~(GRU_SIZE - 1)))
+/* Test a valid handle address to determine the type */
+#define TYPE_IS(hn, h)          ((h) >= GRU_##hn##_BASE && (h) <        \
+                GRU_##hn##_BASE + GRU_NUM_##hn * GRU_HANDLE_STRIDE &&   \
+                (((h) & (GRU_HANDLE_STRIDE - 1)) == 0))
 /* General addressing macros. */
 static inline void *get_gseg_base_address(void *base, int ctxnum)
 {
@@ -158,6 +164,16 @@ static inline void *gru_chiplet_vaddr(void *vaddr, int pnode, int chiplet)
        return vaddr + GRU_SIZE * (2 * pnode  + chiplet);
 }
+static inline struct gru_control_block_extended *gru_tfh_to_cbe(
+                                        struct gru_tlb_fault_handle *tfh)
+{
+        unsigned long cbe;
+        cbe = (unsigned long)tfh - GRU_TFH_BASE + GRU_CBE_BASE;
+        return (struct gru_control_block_extended*)cbe;
+}
 /*
@@ -236,6 +252,17 @@ enum gru_tgh_state {
        TGHSTATE_RESTART_CTX,
 };
+enum gru_tgh_cause {
+        TGHCAUSE_RR_ECC,
+        TGHCAUSE_TLB_ECC,
+        TGHCAUSE_LRU_ECC,
+        TGHCAUSE_PS_ECC,
+        TGHCAUSE_MUL_ERR,
+        TGHCAUSE_DATA_ERR,
+        TGHCAUSE_SW_FORCE
+};
 /*
 * TFH - TLB Global Handle
 *      Used for TLB dropins into the GRU TLB.
@@ -440,6 +467,12 @@ struct gru_control_block_extended {
        unsigned int cbrexecstatus:8;
 };
+/* CBE fields for active BCOPY instructions */
+#define cbe_baddr0      idef1upd
+#define cbe_baddr1      idef3upd
+#define cbe_src_cl      idef6cpy
+#define cbe_nelemcur    idef5upd
 enum gru_cbr_state {
        CBRSTATE_INACTIVE,
        CBRSTATE_IDLE,
@@ -487,8 +520,8 @@ int cch_interrupt_sync(struct gru_context_configuration_handle *cch);
 int tgh_invalidate(struct gru_tlb_global_handle *tgh, unsigned long vaddr,
        unsigned long vaddrmask, int asid, int pagesize, int global, int n,
        unsigned short ctxbitmap);
-void tfh_write_only(struct gru_tlb_fault_handle *tfh, unsigned long pfn,
+int tfh_write_only(struct gru_tlb_fault_handle *tfh, unsigned long paddr,
-        unsigned long vaddr, int asid, int dirty, int pagesize);
+        int gaa, unsigned long vaddr, int asid, int dirty, int pagesize);
 void tfh_write_restart(struct gru_tlb_fault_handle *tfh, unsigned long paddr,
        int gaa, unsigned long vaddr, int asid, int dirty, int pagesize);
 void tfh_restart(struct gru_tlb_fault_handle *tfh);
diff --git a/drivers/misc/sgi-gru/grukdump.c b/drivers/misc/sgi-gru/grukdump.c
index 55eabfa85585..9b2062d17327 100644
--- a/drivers/misc/sgi-gru/grukdump.c
+++ b/drivers/misc/sgi-gru/grukdump.c
@@ -44,7 +44,8 @@ static int gru_user_copy_handle(void __user **dp, void *s)
 static int gru_dump_context_data(void *grubase,
                        struct gru_context_configuration_handle *cch,
-                        void __user *ubuf, int ctxnum, int dsrcnt)
+                        void __user *ubuf, int ctxnum, int dsrcnt,
+                        int flush_cbrs)
 {
        void *cb, *cbe, *tfh, *gseg;
        int i, scr;
@@ -55,6 +56,8 @@ static int gru_dump_context_data(void *grubase,
        tfh = grubase + GRU_TFH_BASE;
        for_each_cbr_in_allocation_map(i, &cch->cbr_allocation_map, scr) {
+                if (flush_cbrs)
+                        gru_flush_cache(cb);
                if (gru_user_copy_handle(&ubuf, cb))
                        goto fail;
                if (gru_user_copy_handle(&ubuf, tfh + i * GRU_HANDLE_STRIDE))
@@ -115,7 +118,7 @@ fail:
 static int gru_dump_context(struct gru_state *gru, int ctxnum,
                void __user *ubuf, void __user *ubufend, char data_opt,
-                char lock_cch)
+                char lock_cch, char flush_cbrs)
 {
        struct gru_dump_context_header hdr;
        struct gru_dump_context_header __user *uhdr = ubuf;
@@ -159,8 +162,7 @@ static int gru_dump_context(struct gru_state *gru, int ctxnum,
                        ret = -EFBIG;
                else
                        ret = gru_dump_context_data(grubase, cch, ubuf, ctxnum,
-                                                        dsrcnt);
+                                                        dsrcnt, flush_cbrs);
        }
        if (cch_locked)
                unlock_cch_handle(cch);
@@ -215,7 +217,8 @@ int gru_dump_chiplet_request(unsigned long arg)
        for (ctxnum = 0; ctxnum < GRU_NUM_CCH; ctxnum++) {
                if (req.ctxnum == ctxnum || req.ctxnum < 0) {
                        ret = gru_dump_context(gru, ctxnum, ubuf, ubufend,
-                                                req.data_opt, req.lock_cch);
+                                                req.data_opt, req.lock_cch,
+                                                req.flush_cbrs);
                        if (ret < 0)
                                goto fail;
                        ubuf += ret;
diff --git a/drivers/misc/sgi-gru/grukservices.c b/drivers/misc/sgi-gru/grukservices.c
index 766e21e15574..34749ee88dfa 100644
--- a/drivers/misc/sgi-gru/grukservices.c
+++ b/drivers/misc/sgi-gru/grukservices.c
@@ -31,6 +31,7 @@
 #include <linux/interrupt.h>
 #include <linux/uaccess.h>
 #include <linux/delay.h>
+#include <asm/io_apic.h>
 #include "gru.h"
 #include "grulib.h"
 #include "grutables.h"
@@ -97,9 +98,6 @@
 #define ASYNC_HAN_TO_BID(h)     ((h) - 1)
 #define ASYNC_BID_TO_HAN(b)     ((b) + 1)
 #define ASYNC_HAN_TO_BS(h)      gru_base[ASYNC_HAN_TO_BID(h)]
-#define KCB_TO_GID(cb)          ((cb - gru_start_vaddr) /               \
-                                        (GRU_SIZE * GRU_CHIPLETS_PER_BLADE))
-#define KCB_TO_BS(cb)           gru_base[KCB_TO_GID(cb)]
 #define GRU_NUM_KERNEL_CBR      1
 #define GRU_NUM_KERNEL_DSR_BYTES 256
@@ -160,8 +158,10 @@ static void gru_load_kernel_context(struct gru_blade_state *bs, int blade_id)
        up_read(&bs->bs_kgts_sema);
        down_write(&bs->bs_kgts_sema);
-        if (!bs->bs_kgts)
+        if (!bs->bs_kgts) {
-                bs->bs_kgts = gru_alloc_gts(NULL, 0, 0, 0, 0);
+                bs->bs_kgts = gru_alloc_gts(NULL, 0, 0, 0, 0, 0);
+                bs->bs_kgts->ts_user_blade_id = blade_id;
+        }
        kgts = bs->bs_kgts;
        if (!kgts->ts_gru) {
@@ -172,9 +172,9 @@ static void gru_load_kernel_context(struct gru_blade_state *bs, int blade_id)
                kgts->ts_dsr_au_count = GRU_DS_BYTES_TO_AU(
                        GRU_NUM_KERNEL_DSR_BYTES * ncpus +
                                bs->bs_async_dsr_bytes);
-                while (!gru_assign_gru_context(kgts, blade_id)) {
+                while (!gru_assign_gru_context(kgts)) {
                        msleep(1);
-                        gru_steal_context(kgts, blade_id);
+                        gru_steal_context(kgts);
                }
                gru_load_context(kgts);
                gru = bs->bs_kgts->ts_gru;
@@ -200,13 +200,15 @@ static int gru_free_kernel_contexts(void)
                bs = gru_base[bid];
                if (!bs)
                        continue;
+                /* Ignore busy contexts. Don't want to block here.  */
                if (down_write_trylock(&bs->bs_kgts_sema)) {
                        kgts = bs->bs_kgts;
                        if (kgts && kgts->ts_gru)
                                gru_unload_context(kgts, 0);
-                        kfree(kgts);
                        bs->bs_kgts = NULL;
                        up_write(&bs->bs_kgts_sema);
+                        kfree(kgts);
                } else {
                        ret++;
                }
@@ -220,13 +222,21 @@ static int gru_free_kernel_contexts(void)
 static struct gru_blade_state *gru_lock_kernel_context(int blade_id)
 {
        struct gru_blade_state *bs;
+        int bid;
        STAT(lock_kernel_context);
-        bs = gru_base[blade_id];
+again:
+        bid = blade_id < 0 ? uv_numa_blade_id() : blade_id;
+        bs = gru_base[bid];
+        /* Handle the case where migration occured while waiting for the sema */
        down_read(&bs->bs_kgts_sema);
+        if (blade_id < 0 && bid != uv_numa_blade_id()) {
+                up_read(&bs->bs_kgts_sema);
+                goto again;
+        }
        if (!bs->bs_kgts || !bs->bs_kgts->ts_gru)
-                gru_load_kernel_context(bs, blade_id);
+                gru_load_kernel_context(bs, bid);
        return bs;
 }
@@ -255,7 +265,7 @@ static int gru_get_cpu_resources(int dsr_bytes, void **cb, void **dsr)
        BUG_ON(dsr_bytes > GRU_NUM_KERNEL_DSR_BYTES);
        preempt_disable();
-        bs = gru_lock_kernel_context(uv_numa_blade_id());
+        bs = gru_lock_kernel_context(-1);
        lcpu = uv_blade_processor_id();
        *cb = bs->kernel_cb + lcpu * GRU_HANDLE_STRIDE;
        *dsr = bs->kernel_dsr + lcpu * GRU_NUM_KERNEL_DSR_BYTES;
@@ -384,13 +394,31 @@ int gru_get_cb_exception_detail(void *cb,
                struct control_block_extended_exc_detail *excdet)
 {
        struct gru_control_block_extended *cbe;
-        struct gru_blade_state *bs;
+        struct gru_thread_state *kgts = NULL;
-        int cbrnum;
+        unsigned long off;
+        int cbrnum, bid;
-        bs = KCB_TO_BS(cb);
-        cbrnum = thread_cbr_number(bs->bs_kgts, get_cb_number(cb));
+        /*
+         * Locate kgts for cb. This algorithm is SLOW but
+         * this function is rarely called (ie., almost never).
+         * Performance does not matter.
+         */
+        for_each_possible_blade(bid) {
+                if (!gru_base[bid])
+                        break;
+                kgts = gru_base[bid]->bs_kgts;
+                if (!kgts || !kgts->ts_gru)
+                        continue;
+                off = cb - kgts->ts_gru->gs_gru_base_vaddr;
+                if (off < GRU_SIZE)
+                        break;
+                kgts = NULL;
+        }
+        BUG_ON(!kgts);
+        cbrnum = thread_cbr_number(kgts, get_cb_number(cb));
        cbe = get_cbe(GRUBASE(cb), cbrnum);
        gru_flush_cache(cbe);   /* CBE not coherent */
+        sync_core();
        excdet->opc = cbe->opccpy;
        excdet->exopc = cbe->exopccpy;
        excdet->ecause = cbe->ecause;
@@ -409,8 +437,8 @@ char *gru_get_cb_exception_detail_str(int ret, void *cb,
        if (ret > 0 && gen->istatus == CBS_EXCEPTION) {
                gru_get_cb_exception_detail(cb, &excdet);
                snprintf(buf, size,
-                        "GRU exception: cb %p, opc %d, exopc %d, ecause 0x%x,"
+                        "GRU:%d exception: cb %p, opc %d, exopc %d, ecause 0x%x,"
-                        "excdet0 0x%lx, excdet1 0x%x",
+                        "excdet0 0x%lx, excdet1 0x%x", smp_processor_id(),
                        gen, excdet.opc, excdet.exopc, excdet.ecause,
                        excdet.exceptdet0, excdet.exceptdet1);
        } else {
@@ -457,9 +485,10 @@ int gru_check_status_proc(void *cb)
        int ret;
        ret = gen->istatus;
-        if (ret != CBS_EXCEPTION)
+        if (ret == CBS_EXCEPTION)
-                return ret;
+                ret = gru_retry_exception(cb);
-        return gru_retry_exception(cb);
+        rmb();
+        return ret;
 }
@@ -471,7 +500,7 @@ int gru_wait_proc(void *cb)
        ret = gru_wait_idle_or_exception(gen);
        if (ret == CBS_EXCEPTION)
                ret = gru_retry_exception(cb);
+        rmb();
        return ret;
 }
@@ -538,7 +567,7 @@ int gru_create_message_queue(struct gru_message_queue_desc *mqd,
        mqd->mq = mq;
        mqd->mq_gpa = uv_gpa(mq);
        mqd->qlines = qlines;
-        mqd->interrupt_pnode = UV_NASID_TO_PNODE(nasid);
+        mqd->interrupt_pnode = nasid >> 1;
        mqd->interrupt_vector = vector;
        mqd->interrupt_apicid = apicid;
        return 0;
@@ -598,6 +627,8 @@ static int send_noop_message(void *cb, struct gru_message_queue_desc *mqd,
                                ret = MQE_UNEXPECTED_CB_ERR;
                        break;
                case CBSS_PAGE_OVERFLOW:
+                        STAT(mesq_noop_page_overflow);
+                        /* fallthru */
                default:
                        BUG();
                }
@@ -673,18 +704,6 @@ cberr:
 }
 /*
- * Send a cross-partition interrupt to the SSI that contains the target
- * message queue. Normally, the interrupt is automatically delivered by hardware
- * but some error conditions require explicit delivery.
- */
-static void send_message_queue_interrupt(struct gru_message_queue_desc *mqd)
-{
-        if (mqd->interrupt_vector)
-                uv_hub_send_ipi(mqd->interrupt_pnode, mqd->interrupt_apicid,
-                                mqd->interrupt_vector);
-}
-/*
 * Handle a PUT failure. Note: if message was a 2-line message, one of the
 * lines might have successfully have been written. Before sending the
 * message, "present" must be cleared in BOTH lines to prevent the receiver
@@ -693,7 +712,8 @@ static void send_message_queue_interrupt(struct gru_message_queue_desc *mqd)
 static int send_message_put_nacked(void *cb, struct gru_message_queue_desc *mqd,
                        void *mesg, int lines)
 {
-        unsigned long m;
+        unsigned long m, *val = mesg, gpa, save;
+        int ret;
        m = mqd->mq_gpa + (gru_get_amo_value_head(cb) << 6);
        if (lines == 2) {
@@ -704,7 +724,26 @@ static int send_message_put_nacked(void *cb, struct gru_message_queue_desc *mqd,
        gru_vstore(cb, m, gru_get_tri(mesg), XTYPE_CL, lines, 1, IMA);
        if (gru_wait(cb) != CBS_IDLE)
                return MQE_UNEXPECTED_CB_ERR;
-        send_message_queue_interrupt(mqd);
+        if (!mqd->interrupt_vector)
+                return MQE_OK;
+        /*
+         * Send a cross-partition interrupt to the SSI that contains the target
+         * message queue. Normally, the interrupt is automatically delivered by
+         * hardware but some error conditions require explicit delivery.
+         * Use the GRU to deliver the interrupt. Otherwise partition failures
+         * could cause unrecovered errors.
+         */
+        gpa = uv_global_gru_mmr_address(mqd->interrupt_pnode, UVH_IPI_INT);
+        save = *val;
+        *val = uv_hub_ipi_value(mqd->interrupt_apicid, mqd->interrupt_vector,
+                                dest_Fixed);
+        gru_vstore_phys(cb, gpa, gru_get_tri(mesg), IAA_REGISTER, IMA);
+        ret = gru_wait(cb);
+        *val = save;
+        if (ret != CBS_IDLE)
+                return MQE_UNEXPECTED_CB_ERR;
        return MQE_OK;
 }
@@ -739,6 +778,9 @@ static int send_message_failure(void *cb, struct gru_message_queue_desc *mqd,
                STAT(mesq_send_put_nacked);
                ret = send_message_put_nacked(cb, mqd, mesg, lines);
                break;
+        case CBSS_PAGE_OVERFLOW:
+                STAT(mesq_page_overflow);
+                /* fallthru */
        default:
                BUG();
        }
@@ -831,7 +873,6 @@ void *gru_get_next_message(struct gru_message_queue_desc *mqd)
        int present = mhdr->present;
        /* skip NOOP messages */
-        STAT(mesq_receive);
        while (present == MQS_NOOP) {
                gru_free_message(mqd, mhdr);
                mhdr = mq->next;
@@ -851,6 +892,7 @@ void *gru_get_next_message(struct gru_message_queue_desc *mqd)
        if (mhdr->lines == 2)
                restore_present2(mhdr, mhdr->present2);
+        STAT(mesq_receive);
        return mhdr;
 }
 EXPORT_SYMBOL_GPL(gru_get_next_message);
@@ -858,6 +900,29 @@ EXPORT_SYMBOL_GPL(gru_get_next_message);
 /* ---------------------- GRU DATA COPY FUNCTIONS ---------------------------*/
 /*
+ * Load a DW from a global GPA. The GPA can be a memory or MMR address.
+ */
+int gru_read_gpa(unsigned long *value, unsigned long gpa)
+{
+        void *cb;
+        void *dsr;
+        int ret, iaa;
+        STAT(read_gpa);
+        if (gru_get_cpu_resources(GRU_NUM_KERNEL_DSR_BYTES, &cb, &dsr))
+                return MQE_BUG_NO_RESOURCES;
+        iaa = gpa >> 62;
+        gru_vload_phys(cb, gpa, gru_get_tri(dsr), iaa, IMA);
+        ret = gru_wait(cb);
+        if (ret == CBS_IDLE)
+                *value = *(unsigned long *)dsr;
+        gru_free_cpu_resources(cb, dsr);
+        return ret;
+}
+EXPORT_SYMBOL_GPL(gru_read_gpa);
+/*
 * Copy a block of data using the GRU resources
 */
 int gru_copy_gpa(unsigned long dest_gpa, unsigned long src_gpa,
@@ -898,24 +963,24 @@ static int quicktest0(unsigned long arg)
        gru_vload(cb, uv_gpa(&word0), gru_get_tri(dsr), XTYPE_DW, 1, 1, IMA);
        if (gru_wait(cb) != CBS_IDLE) {
-                printk(KERN_DEBUG "GRU quicktest0: CBR failure 1\n");
+                printk(KERN_DEBUG "GRU:%d quicktest0: CBR failure 1\n", smp_processor_id());
                goto done;
        }
        if (*p != MAGIC) {
-                printk(KERN_DEBUG "GRU: quicktest0 bad magic 0x%lx\n", *p);
+                printk(KERN_DEBUG "GRU:%d quicktest0 bad magic 0x%lx\n", smp_processor_id(), *p);
                goto done;
        }
        gru_vstore(cb, uv_gpa(&word1), gru_get_tri(dsr), XTYPE_DW, 1, 1, IMA);
        if (gru_wait(cb) != CBS_IDLE) {
-                printk(KERN_DEBUG "GRU quicktest0: CBR failure 2\n");
+                printk(KERN_DEBUG "GRU:%d quicktest0: CBR failure 2\n", smp_processor_id());
                goto done;
        }
        if (word0 != word1 || word1 != MAGIC) {
                printk(KERN_DEBUG
-                       "GRU quicktest0 err: found 0x%lx, expected 0x%lx\n",
+                       "GRU:%d quicktest0 err: found 0x%lx, expected 0x%lx\n",
-                     word1, MAGIC);
+                     smp_processor_id(), word1, MAGIC);
                goto done;
        }
        ret = 0;
@@ -952,8 +1017,11 @@ static int quicktest1(unsigned long arg)
                if (ret)
                        break;
        }
-        if (ret != MQE_QUEUE_FULL || i != 4)
+        if (ret != MQE_QUEUE_FULL || i != 4) {
+                printk(KERN_DEBUG "GRU:%d quicktest1: unexpect status %d, i %d\n",
+                       smp_processor_id(), ret, i);
                goto done;
+        }
        for (i = 0; i < 6; i++) {
                m = gru_get_next_message(&mqd);
@@ -961,7 +1029,12 @@ static int quicktest1(unsigned long arg)
                        break;
                gru_free_message(&mqd, m);
        }
-        ret = (i == 4) ? 0 : -EIO;
+        if (i != 4) {
+                printk(KERN_DEBUG "GRU:%d quicktest2: bad message, i %d, m %p, m8 %d\n",
+                        smp_processor_id(), i, m, m ? m[8] : -1);
+                goto done;
+        }
+        ret = 0;
 done:
        kfree(p);
@@ -977,6 +1050,7 @@ static int quicktest2(unsigned long arg)
        int ret = 0;
        unsigned long *buf;
        void *cb0, *cb;
+        struct gru_control_block_status *gen;
        int i, k, istatus, bytes;
        bytes = numcb * 4 * 8;
@@ -996,20 +1070,30 @@ static int quicktest2(unsigned long arg)
                                XTYPE_DW, 4, 1, IMA_INTERRUPT);
        ret = 0;
-        for (k = 0; k < numcb; k++) {
+        k = numcb;
+        do {
                gru_wait_async_cbr(han);
                for (i = 0; i < numcb; i++) {
                        cb = cb0 + i * GRU_HANDLE_STRIDE;
                        istatus = gru_check_status(cb);
-                        if (istatus == CBS_ACTIVE)
+                        if (istatus != CBS_ACTIVE && istatus != CBS_CALL_OS)
-                                continue;
+                                break;
-                        if (istatus == CBS_EXCEPTION)
-                                ret = -EFAULT;
-                        else if (buf[i] || buf[i + 1] || buf[i + 2] ||
-                                        buf[i + 3])
-                                ret = -EIO;
                }
-        }
+                if (i == numcb)
+                        continue;
+                if (istatus != CBS_IDLE) {
+                        printk(KERN_DEBUG "GRU:%d quicktest2: cb %d, exception\n", smp_processor_id(), i);
+                        ret = -EFAULT;
+                } else if (buf[4 * i] || buf[4 * i + 1] || buf[4 * i + 2] ||
+                                buf[4 * i + 3]) {
+                        printk(KERN_DEBUG "GRU:%d quicktest2:cb %d,  buf 0x%lx, 0x%lx, 0x%lx, 0x%lx\n",
+                               smp_processor_id(), i, buf[4 * i], buf[4 * i + 1], buf[4 * i + 2], buf[4 * i + 3]);
+                        ret = -EIO;
+                }
+                k--;
+                gen = cb;
+                gen->istatus = CBS_CALL_OS; /* don't handle this CBR again */
+        } while (k);
        BUG_ON(cmp.done);
        gru_unlock_async_resource(han);
@@ -1019,6 +1103,22 @@ done:
        return ret;
 }
+#define BUFSIZE 200
+static int quicktest3(unsigned long arg)
+{
+        char buf1[BUFSIZE], buf2[BUFSIZE];
+        int ret = 0;
+        memset(buf2, 0, sizeof(buf2));
+        memset(buf1, get_cycles() & 255, sizeof(buf1));
+        gru_copy_gpa(uv_gpa(buf2), uv_gpa(buf1), BUFSIZE);
+        if (memcmp(buf1, buf2, BUFSIZE)) {
+                printk(KERN_DEBUG "GRU:%d quicktest3 error\n", smp_processor_id());
+                ret = -EIO;
+        }
+        return ret;
+}
 /*
 * Debugging only. User hook for various kernel tests
 * of driver & gru.
@@ -1037,6 +1137,9 @@ int gru_ktest(unsigned long arg)
        case 2:
                ret = quicktest2(arg);
                break;
+        case 3:
+                ret = quicktest3(arg);
+                break;
        case 99:
                ret = gru_free_kernel_contexts();
                break;
diff --git a/drivers/misc/sgi-gru/grukservices.h b/drivers/misc/sgi-gru/grukservices.h
index d60d34bca44d..02aa94d8484a 100644
--- a/drivers/misc/sgi-gru/grukservices.h
+++ b/drivers/misc/sgi-gru/grukservices.h
@@ -131,6 +131,20 @@ extern void *gru_get_next_message(struct gru_message_queue_desc *mqd);
 /*
+ * Read a GRU global GPA. Source can be located in a remote partition.
+ *
+ *    Input:
+ *      value           memory address where MMR value is returned
+ *      gpa             source numalink physical address of GPA
+ *
+ *    Output:
+ *      0               OK
+ *      >0              error
+ */
+int gru_read_gpa(unsigned long *value, unsigned long gpa);
+/*
 * Copy data using the GRU. Source or destination can be located in a remote
 * partition.
 *
diff --git a/drivers/misc/sgi-gru/grulib.h b/drivers/misc/sgi-gru/grulib.h
index 889bc442a3e8..e77d1b1f9d05 100644
--- a/drivers/misc/sgi-gru/grulib.h
+++ b/drivers/misc/sgi-gru/grulib.h
@@ -63,18 +63,9 @@
 #define THREAD_POINTER(p, th)           (p + GRU_GSEG_PAGESIZE * (th))
 #define GSEG_START(cb)                  ((void *)((unsigned long)(cb) & ~(GRU_GSEG_PAGESIZE - 1)))
-/*
- * Statictics kept on a per-GTS basis.
- */
-struct gts_statistics {
-        unsigned long   fmm_tlbdropin;
-        unsigned long   upm_tlbdropin;
-        unsigned long   context_stolen;
-};
 struct gru_get_gseg_statistics_req {
-        unsigned long           gseg;
+        unsigned long                   gseg;
-        struct gts_statistics   stats;
+        struct gru_gseg_statistics      stats;
 };
 /*
@@ -86,6 +77,7 @@ struct gru_create_context_req {
        unsigned int            control_blocks;
        unsigned int            maximum_thread_count;
        unsigned int            options;
+        unsigned char           tlb_preload_count;
 };
 /*
@@ -98,11 +90,12 @@ struct gru_unload_context_req {
 /*
 * Structure used to set context options
 */
-enum {sco_gseg_owner, sco_cch_req_slice};
+enum {sco_gseg_owner, sco_cch_req_slice, sco_blade_chiplet};
 struct gru_set_context_option_req {
        unsigned long   gseg;
        int             op;
-        unsigned long   val1;
+        int             val0;
+        long            val1;
 };
 /*
@@ -124,6 +117,8 @@ struct gru_dump_chiplet_state_req {
        int             ctxnum;
        char            data_opt;
        char            lock_cch;
+        char            flush_cbrs;
+        char            fill[10];
        pid_t           pid;
        void            *buf;
        size_t          buflen;
diff --git a/drivers/misc/sgi-gru/grumain.c b/drivers/misc/sgi-gru/grumain.c
index 3bc643dad606..f8538bbd0bfa 100644
--- a/drivers/misc/sgi-gru/grumain.c
+++ b/drivers/misc/sgi-gru/grumain.c
@@ -27,6 +27,7 @@
 #include <linux/sched.h>
 #include <linux/device.h>
 #include <linux/list.h>
+#include <linux/err.h>
 #include <asm/uv/uv_hub.h>
 #include "gru.h"
 #include "grutables.h"
@@ -48,12 +49,20 @@ struct device *grudev = &gru_device;
 /*
 * Select a gru fault map to be used by the current cpu. Note that
 * multiple cpus may be using the same map.
- *      ZZZ should "shift" be used?? Depends on HT cpu numbering
 *      ZZZ should be inline but did not work on emulator
 */
 int gru_cpu_fault_map_id(void)
 {
+#ifdef CONFIG_IA64
        return uv_blade_processor_id() % GRU_NUM_TFM;
+#else
+        int cpu = smp_processor_id();
+        int id, core;
+        core = uv_cpu_core_number(cpu);
+        id = core + UV_MAX_INT_CORES * uv_cpu_socket_number(cpu);
+        return id;
+#endif
 }
 /*--------- ASID Management -------------------------------------------
@@ -286,7 +295,8 @@ static void gru_unload_mm_tracker(struct gru_state *gru,
 void gts_drop(struct gru_thread_state *gts)
 {
        if (gts && atomic_dec_return(&gts->ts_refcnt) == 0) {
-                gru_drop_mmu_notifier(gts->ts_gms);
+                if (gts->ts_gms)
+                        gru_drop_mmu_notifier(gts->ts_gms);
                kfree(gts);
                STAT(gts_free);
        }
@@ -310,16 +320,18 @@ static struct gru_thread_state *gru_find_current_gts_nolock(struct gru_vma_data
 * Allocate a thread state structure.
 */
 struct gru_thread_state *gru_alloc_gts(struct vm_area_struct *vma,
-                int cbr_au_count, int dsr_au_count, int options, int tsid)
+                int cbr_au_count, int dsr_au_count,
+                unsigned char tlb_preload_count, int options, int tsid)
 {
        struct gru_thread_state *gts;
+        struct gru_mm_struct *gms;
        int bytes;
        bytes = DSR_BYTES(dsr_au_count) + CBR_BYTES(cbr_au_count);
        bytes += sizeof(struct gru_thread_state);
        gts = kmalloc(bytes, GFP_KERNEL);
        if (!gts)
-                return NULL;
+                return ERR_PTR(-ENOMEM);
        STAT(gts_alloc);
        memset(gts, 0, sizeof(struct gru_thread_state)); /* zero out header */
@@ -327,7 +339,10 @@ struct gru_thread_state *gru_alloc_gts(struct vm_area_struct *vma,
        mutex_init(&gts->ts_ctxlock);
        gts->ts_cbr_au_count = cbr_au_count;
        gts->ts_dsr_au_count = dsr_au_count;
+        gts->ts_tlb_preload_count = tlb_preload_count;
        gts->ts_user_options = options;
+        gts->ts_user_blade_id = -1;
+        gts->ts_user_chiplet_id = -1;
        gts->ts_tsid = tsid;
        gts->ts_ctxnum = NULLCTX;
        gts->ts_tlb_int_select = -1;
@@ -336,9 +351,10 @@ struct gru_thread_state *gru_alloc_gts(struct vm_area_struct *vma,
        if (vma) {
                gts->ts_mm = current->mm;
                gts->ts_vma = vma;
-                gts->ts_gms = gru_register_mmu_notifier();
+                gms = gru_register_mmu_notifier();
-                if (!gts->ts_gms)
+                if (IS_ERR(gms))
                        goto err;
+                gts->ts_gms = gms;
        }
        gru_dbg(grudev, "alloc gts %p\n", gts);
@@ -346,7 +362,7 @@ struct gru_thread_state *gru_alloc_gts(struct vm_area_struct *vma,
 err:
        gts_drop(gts);
-        return NULL;
+        return ERR_CAST(gms);
 }
 /*
@@ -360,6 +376,7 @@ struct gru_vma_data *gru_alloc_vma_data(struct vm_area_struct *vma, int tsid)
        if (!vdata)
                return NULL;
+        STAT(vdata_alloc);
        INIT_LIST_HEAD(&vdata->vd_head);
        spin_lock_init(&vdata->vd_lock);
        gru_dbg(grudev, "alloc vdata %p\n", vdata);
@@ -392,10 +409,12 @@ struct gru_thread_state *gru_alloc_thread_state(struct vm_area_struct *vma,
        struct gru_vma_data *vdata = vma->vm_private_data;
        struct gru_thread_state *gts, *ngts;
-        gts = gru_alloc_gts(vma, vdata->vd_cbr_au_count, vdata->vd_dsr_au_count,
+        gts = gru_alloc_gts(vma, vdata->vd_cbr_au_count,
+                            vdata->vd_dsr_au_count,
+                            vdata->vd_tlb_preload_count,
                            vdata->vd_user_options, tsid);
-        if (!gts)
+        if (IS_ERR(gts))
-                return NULL;
+                return gts;
        spin_lock(&vdata->vd_lock);
        ngts = gru_find_current_gts_nolock(vdata, tsid);
@@ -493,6 +512,9 @@ static void gru_load_context_data(void *save, void *grubase, int ctxnum,
                        memset(cbe + i * GRU_HANDLE_STRIDE, 0,
                                                GRU_CACHE_LINE_BYTES);
                }
+                /* Flush CBE to hide race in context restart */
+                mb();
+                gru_flush_cache(cbe + i * GRU_HANDLE_STRIDE);
                cb += GRU_HANDLE_STRIDE;
        }
@@ -513,6 +535,12 @@ static void gru_unload_context_data(void *save, void *grubase, int ctxnum,
        cb = gseg + GRU_CB_BASE;
        cbe = grubase + GRU_CBE_BASE;
        length = hweight64(dsrmap) * GRU_DSR_AU_BYTES;
+        /* CBEs may not be coherent. Flush them from cache */
+        for_each_cbr_in_allocation_map(i, &cbrmap, scr)
+                gru_flush_cache(cbe + i * GRU_HANDLE_STRIDE);
+        mb();           /* Let the CL flush complete */
        gru_prefetch_context(gseg, cb, cbe, cbrmap, length);
        for_each_cbr_in_allocation_map(i, &cbrmap, scr) {
@@ -533,7 +561,8 @@ void gru_unload_context(struct gru_thread_state *gts, int savestate)
                zap_vma_ptes(gts->ts_vma, UGRUADDR(gts), GRU_GSEG_PAGESIZE);
        cch = get_cch(gru->gs_gru_base_vaddr, ctxnum);
-        gru_dbg(grudev, "gts %p\n", gts);
+        gru_dbg(grudev, "gts %p, cbrmap 0x%lx, dsrmap 0x%lx\n",
+                gts, gts->ts_cbr_map, gts->ts_dsr_map);
        lock_cch_handle(cch);
        if (cch_interrupt_sync(cch))
                BUG();
@@ -549,7 +578,6 @@ void gru_unload_context(struct gru_thread_state *gts, int savestate)
        if (cch_deallocate(cch))
                BUG();
-        gts->ts_force_unload = 0;       /* ts_force_unload locked by CCH lock */
        unlock_cch_handle(cch);
        gru_free_gru_context(gts);
@@ -565,9 +593,7 @@ void gru_load_context(struct gru_thread_state *gts)
        struct gru_context_configuration_handle *cch;
        int i, err, asid, ctxnum = gts->ts_ctxnum;
-        gru_dbg(grudev, "gts %p\n", gts);
        cch = get_cch(gru->gs_gru_base_vaddr, ctxnum);
        lock_cch_handle(cch);
        cch->tfm_fault_bit_enable =
            (gts->ts_user_options == GRU_OPT_MISS_FMM_POLL
@@ -591,6 +617,7 @@ void gru_load_context(struct gru_thread_state *gts)
                cch->unmap_enable = 1;
                cch->tfm_done_bit_enable = 1;
                cch->cb_int_enable = 1;
+                cch->tlb_int_select = 0;        /* For now, ints go to cpu 0 */
        } else {
                cch->unmap_enable = 0;
                cch->tfm_done_bit_enable = 0;
@@ -616,17 +643,18 @@ void gru_load_context(struct gru_thread_state *gts)
        if (cch_start(cch))
                BUG();
        unlock_cch_handle(cch);
+        gru_dbg(grudev, "gid %d, gts %p, cbrmap 0x%lx, dsrmap 0x%lx, tie %d, tis %d\n",
+                gts->ts_gru->gs_gid, gts, gts->ts_cbr_map, gts->ts_dsr_map,
+                (gts->ts_user_options == GRU_OPT_MISS_FMM_INTR), gts->ts_tlb_int_select);
 }
 /*
 * Update fields in an active CCH:
 *      - retarget interrupts on local blade
 *      - update sizeavail mask
- *      - force a delayed context unload by clearing the CCH asids. This
- *        forces TLB misses for new GRU instructions. The context is unloaded
- *        when the next TLB miss occurs.
 */
-int gru_update_cch(struct gru_thread_state *gts, int force_unload)
+int gru_update_cch(struct gru_thread_state *gts)
 {
        struct gru_context_configuration_handle *cch;
        struct gru_state *gru = gts->ts_gru;
@@ -640,21 +668,13 @@ int gru_update_cch(struct gru_thread_state *gts, int force_unload)
                        goto exit;
                if (cch_interrupt(cch))
                        BUG();
-                if (!force_unload) {
+                for (i = 0; i < 8; i++)
-                        for (i = 0; i < 8; i++)
+                        cch->sizeavail[i] = gts->ts_sizeavail;
-                                cch->sizeavail[i] = gts->ts_sizeavail;
+                gts->ts_tlb_int_select = gru_cpu_fault_map_id();
-                        gts->ts_tlb_int_select = gru_cpu_fault_map_id();
+                cch->tlb_int_select = gru_cpu_fault_map_id();
-                        cch->tlb_int_select = gru_cpu_fault_map_id();
+                cch->tfm_fault_bit_enable =
-                        cch->tfm_fault_bit_enable =
+                  (gts->ts_user_options == GRU_OPT_MISS_FMM_POLL
-                          (gts->ts_user_options == GRU_OPT_MISS_FMM_POLL
+                    || gts->ts_user_options == GRU_OPT_MISS_FMM_INTR);
-                            || gts->ts_user_options == GRU_OPT_MISS_FMM_INTR);
-                } else {
-                        for (i = 0; i < 8; i++)
-                                cch->asid[i] = 0;
-                        cch->tfm_fault_bit_enable = 0;
-                        cch->tlb_int_enable = 0;
-                        gts->ts_force_unload = 1;
-                }
                if (cch_start(cch))
                        BUG();
                ret = 1;
@@ -679,7 +699,54 @@ static int gru_retarget_intr(struct gru_thread_state *gts)
        gru_dbg(grudev, "retarget from %d to %d\n", gts->ts_tlb_int_select,
                gru_cpu_fault_map_id());
-        return gru_update_cch(gts, 0);
+        return gru_update_cch(gts);
+}
+/*
+ * Check if a GRU context is allowed to use a specific chiplet. By default
+ * a context is assigned to any blade-local chiplet. However, users can
+ * override this.
+ *      Returns 1 if assignment allowed, 0 otherwise
+ */
+static int gru_check_chiplet_assignment(struct gru_state *gru,
+                                        struct gru_thread_state *gts)
+{
+        int blade_id;
+        int chiplet_id;
+        blade_id = gts->ts_user_blade_id;
+        if (blade_id < 0)
+                blade_id = uv_numa_blade_id();
+        chiplet_id = gts->ts_user_chiplet_id;
+        return gru->gs_blade_id == blade_id &&
+                (chiplet_id < 0 || chiplet_id == gru->gs_chiplet_id);
+}
+/*
+ * Unload the gru context if it is not assigned to the correct blade or
+ * chiplet. Misassignment can occur if the process migrates to a different
+ * blade or if the user changes the selected blade/chiplet.
+ */
+void gru_check_context_placement(struct gru_thread_state *gts)
+{
+        struct gru_state *gru;
+        /*
+         * If the current task is the context owner, verify that the
+         * context is correctly placed. This test is skipped for non-owner
+         * references. Pthread apps use non-owner references to the CBRs.
+         */
+        gru = gts->ts_gru;
+        if (!gru || gts->ts_tgid_owner != current->tgid)
+                return;
+        if (!gru_check_chiplet_assignment(gru, gts)) {
+                STAT(check_context_unload);
+                gru_unload_context(gts, 1);
+        } else if (gru_retarget_intr(gts)) {
+                STAT(check_context_retarget_intr);
+        }
 }
@@ -712,13 +779,17 @@ static void gts_stolen(struct gru_thread_state *gts,
        }
 }
-void gru_steal_context(struct gru_thread_state *gts, int blade_id)
+void gru_steal_context(struct gru_thread_state *gts)
 {
        struct gru_blade_state *blade;
        struct gru_state *gru, *gru0;
        struct gru_thread_state *ngts = NULL;
        int ctxnum, ctxnum0, flag = 0, cbr, dsr;
+        int blade_id;
+        blade_id = gts->ts_user_blade_id;
+        if (blade_id < 0)
+                blade_id = uv_numa_blade_id();
        cbr = gts->ts_cbr_au_count;
        dsr = gts->ts_dsr_au_count;
@@ -729,35 +800,39 @@ void gru_steal_context(struct gru_thread_state *gts, int blade_id)
        gru = blade->bs_lru_gru;
        if (ctxnum == 0)
                gru = next_gru(blade, gru);
+        blade->bs_lru_gru = gru;
+        blade->bs_lru_ctxnum = ctxnum;
        ctxnum0 = ctxnum;
        gru0 = gru;
        while (1) {
-                if (check_gru_resources(gru, cbr, dsr, GRU_NUM_CCH))
+                if (gru_check_chiplet_assignment(gru, gts)) {
-                        break;
+                        if (check_gru_resources(gru, cbr, dsr, GRU_NUM_CCH))
-                spin_lock(&gru->gs_lock);
-                for (; ctxnum < GRU_NUM_CCH; ctxnum++) {
-                        if (flag && gru == gru0 && ctxnum == ctxnum0)
                                break;
-                        ngts = gru->gs_gts[ctxnum];
+                        spin_lock(&gru->gs_lock);
-                        /*
+                        for (; ctxnum < GRU_NUM_CCH; ctxnum++) {
-                         * We are grabbing locks out of order, so trylock is
+                                if (flag && gru == gru0 && ctxnum == ctxnum0)
-                         * needed. GTSs are usually not locked, so the odds of
+                                        break;
-                         * success are high. If trylock fails, try to steal a
+                                ngts = gru->gs_gts[ctxnum];
-                         * different GSEG.
+                                /*
-                         */
+                                * We are grabbing locks out of order, so trylock is
-                        if (ngts && is_gts_stealable(ngts, blade))
+                                * needed. GTSs are usually not locked, so the odds of
+                                * success are high. If trylock fails, try to steal a
+                                * different GSEG.
+                                */
+                                if (ngts && is_gts_stealable(ngts, blade))
+                                        break;
+                                ngts = NULL;
+                        }
+                        spin_unlock(&gru->gs_lock);
+                        if (ngts || (flag && gru == gru0 && ctxnum == ctxnum0))
                                break;
-                        ngts = NULL;
-                        flag = 1;
                }
-                spin_unlock(&gru->gs_lock);
+                if (flag && gru == gru0)
-                if (ngts || (flag && gru == gru0 && ctxnum == ctxnum0))
                        break;
+                flag = 1;
                ctxnum = 0;
                gru = next_gru(blade, gru);
        }
-        blade->bs_lru_gru = gru;
-        blade->bs_lru_ctxnum = ctxnum;
        spin_unlock(&blade->bs_lock);
        if (ngts) {
@@ -776,19 +851,34 @@ void gru_steal_context(struct gru_thread_state *gts, int blade_id)
 }
 /*
+ * Assign a gru context.
+ */
+static int gru_assign_context_number(struct gru_state *gru)
+{
+        int ctxnum;
+        ctxnum = find_first_zero_bit(&gru->gs_context_map, GRU_NUM_CCH);
+        __set_bit(ctxnum, &gru->gs_context_map);
+        return ctxnum;
+}
+/*
 * Scan the GRUs on the local blade & assign a GRU context.
 */
-struct gru_state *gru_assign_gru_context(struct gru_thread_state *gts,
+struct gru_state *gru_assign_gru_context(struct gru_thread_state *gts)
-                                                int blade)
 {
        struct gru_state *gru, *grux;
        int i, max_active_contexts;
+        int blade_id = gts->ts_user_blade_id;
+        if (blade_id < 0)
+                blade_id = uv_numa_blade_id();
 again:
        gru = NULL;
        max_active_contexts = GRU_NUM_CCH;
-        for_each_gru_on_blade(grux, blade, i) {
+        for_each_gru_on_blade(grux, blade_id, i) {
+                if (!gru_check_chiplet_assignment(grux, gts))
+                        continue;
                if (check_gru_resources(grux, gts->ts_cbr_au_count,
                                        gts->ts_dsr_au_count,
                                        max_active_contexts)) {
@@ -809,12 +899,9 @@ again:
                reserve_gru_resources(gru, gts);
                gts->ts_gru = gru;
                gts->ts_blade = gru->gs_blade_id;
-                gts->ts_ctxnum =
+                gts->ts_ctxnum = gru_assign_context_number(gru);
-                    find_first_zero_bit(&gru->gs_context_map, GRU_NUM_CCH);
-                BUG_ON(gts->ts_ctxnum == GRU_NUM_CCH);
                atomic_inc(&gts->ts_refcnt);
                gru->gs_gts[gts->ts_ctxnum] = gts;
-                __set_bit(gts->ts_ctxnum, &gru->gs_context_map);
                spin_unlock(&gru->gs_lock);
                STAT(assign_context);
@@ -842,7 +929,6 @@ int gru_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 {
        struct gru_thread_state *gts;
        unsigned long paddr, vaddr;
-        int blade_id;
        vaddr = (unsigned long)vmf->virtual_address;
        gru_dbg(grudev, "vma %p, vaddr 0x%lx (0x%lx)\n",
@@ -857,28 +943,18 @@ int gru_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 again:
        mutex_lock(&gts->ts_ctxlock);
        preempt_disable();
-        blade_id = uv_numa_blade_id();
-        if (gts->ts_gru) {
+        gru_check_context_placement(gts);
-                if (gts->ts_gru->gs_blade_id != blade_id) {
-                        STAT(migrated_nopfn_unload);
-                        gru_unload_context(gts, 1);
-                } else {
-                        if (gru_retarget_intr(gts))
-                                STAT(migrated_nopfn_retarget);
-                }
-        }
        if (!gts->ts_gru) {
                STAT(load_user_context);
-                if (!gru_assign_gru_context(gts, blade_id)) {
+                if (!gru_assign_gru_context(gts)) {
                        preempt_enable();
                        mutex_unlock(&gts->ts_ctxlock);
                        set_current_state(TASK_INTERRUPTIBLE);
                        schedule_timeout(GRU_ASSIGN_DELAY);  /* true hack ZZZ */
-                        blade_id = uv_numa_blade_id();
                        if (gts->ts_steal_jiffies + GRU_STEAL_DELAY < jiffies)
-                                gru_steal_context(gts, blade_id);
+                                gru_steal_context(gts);
                        goto again;
                }
                gru_load_context(gts);
diff --git a/drivers/misc/sgi-gru/gruprocfs.c b/drivers/misc/sgi-gru/gruprocfs.c
index 3f2375c5ba5b..7768b87d995b 100644
--- a/drivers/misc/sgi-gru/gruprocfs.c
+++ b/drivers/misc/sgi-gru/gruprocfs.c
@@ -36,8 +36,7 @@ static void printstat_val(struct seq_file *s, atomic_long_t *v, char *id)
 {
        unsigned long val = atomic_long_read(v);
-        if (val)
+        seq_printf(s, "%16lu %s\n", val, id);
-                seq_printf(s, "%16lu %s\n", val, id);
 }
 static int statistics_show(struct seq_file *s, void *p)
@@ -46,7 +45,8 @@ static int statistics_show(struct seq_file *s, void *p)
        printstat(s, vdata_free);
        printstat(s, gts_alloc);
        printstat(s, gts_free);
-        printstat(s, vdata_double_alloc);
+        printstat(s, gms_alloc);
+        printstat(s, gms_free);
        printstat(s, gts_double_allocate);
        printstat(s, assign_context);
        printstat(s, assign_context_failed);
@@ -59,28 +59,25 @@ static int statistics_show(struct seq_file *s, void *p)
        printstat(s, steal_kernel_context);
        printstat(s, steal_context_failed);
        printstat(s, nopfn);
-        printstat(s, break_cow);
        printstat(s, asid_new);
        printstat(s, asid_next);
        printstat(s, asid_wrap);
        printstat(s, asid_reuse);
        printstat(s, intr);
+        printstat(s, intr_cbr);
+        printstat(s, intr_tfh);
+        printstat(s, intr_spurious);
        printstat(s, intr_mm_lock_failed);
        printstat(s, call_os);
-        printstat(s, call_os_offnode_reference);
-        printstat(s, call_os_check_for_bug);
        printstat(s, call_os_wait_queue);
        printstat(s, user_flush_tlb);
        printstat(s, user_unload_context);
        printstat(s, user_exception);
        printstat(s, set_context_option);
-        printstat(s, migrate_check);
+        printstat(s, check_context_retarget_intr);
-        printstat(s, migrated_retarget);
+        printstat(s, check_context_unload);
-        printstat(s, migrated_unload);
-        printstat(s, migrated_unload_delay);
-        printstat(s, migrated_nopfn_retarget);
-        printstat(s, migrated_nopfn_unload);
        printstat(s, tlb_dropin);
+        printstat(s, tlb_preload_page);
        printstat(s, tlb_dropin_fail_no_asid);
        printstat(s, tlb_dropin_fail_upm);
        printstat(s, tlb_dropin_fail_invalid);
@@ -88,16 +85,15 @@ static int statistics_show(struct seq_file *s, void *p)
        printstat(s, tlb_dropin_fail_idle);
        printstat(s, tlb_dropin_fail_fmm);
        printstat(s, tlb_dropin_fail_no_exception);
-        printstat(s, tlb_dropin_fail_no_exception_war);
        printstat(s, tfh_stale_on_fault);
        printstat(s, mmu_invalidate_range);
        printstat(s, mmu_invalidate_page);
-        printstat(s, mmu_clear_flush_young);
        printstat(s, flush_tlb);
        printstat(s, flush_tlb_gru);
        printstat(s, flush_tlb_gru_tgh);
        printstat(s, flush_tlb_gru_zero_asid);
        printstat(s, copy_gpa);
+        printstat(s, read_gpa);
        printstat(s, mesq_receive);
        printstat(s, mesq_receive_none);
        printstat(s, mesq_send);
@@ -108,7 +104,6 @@ static int statistics_show(struct seq_file *s, void *p)
        printstat(s, mesq_send_qlimit_reached);
        printstat(s, mesq_send_amo_nacked);
        printstat(s, mesq_send_put_nacked);
-        printstat(s, mesq_qf_not_full);
        printstat(s, mesq_qf_locked);
        printstat(s, mesq_qf_noop_not_full);
        printstat(s, mesq_qf_switch_head_failed);
@@ -118,6 +113,7 @@ static int statistics_show(struct seq_file *s, void *p)
        printstat(s, mesq_noop_qlimit_reached);
        printstat(s, mesq_noop_amo_nacked);
        printstat(s, mesq_noop_put_nacked);
+        printstat(s, mesq_noop_page_overflow);
        return 0;
 }
@@ -133,8 +129,10 @@ static int mcs_statistics_show(struct seq_file *s, void *p)
        int op;
        unsigned long total, count, max;
        static char *id[] = {"cch_allocate", "cch_start", "cch_interrupt",
-                "cch_interrupt_sync", "cch_deallocate", "tgh_invalidate"};
+                "cch_interrupt_sync", "cch_deallocate", "tfh_write_only",
+                "tfh_write_restart", "tgh_invalidate"};
+        seq_printf(s, "%-20s%12s%12s%12s\n", "#id", "count", "aver-clks", "max-clks");
        for (op = 0; op < mcsop_last; op++) {
                count = atomic_long_read(&mcs_op_statistics[op].count);
                total = atomic_long_read(&mcs_op_statistics[op].total);
@@ -154,6 +152,7 @@ static ssize_t mcs_statistics_write(struct file *file,
 static int options_show(struct seq_file *s, void *p)
 {
+        seq_printf(s, "#bitmask: 1=trace, 2=statistics\n");
        seq_printf(s, "0x%lx\n", gru_options);
        return 0;
 }
@@ -183,16 +182,17 @@ static int cch_seq_show(struct seq_file *file, void *data)
        const char *mode[] = { "??", "UPM", "INTR", "OS_POLL" };
        if (gid == 0)
-                seq_printf(file, "#%5s%5s%6s%9s%6s%8s%8s\n", "gid", "bid",
+                seq_printf(file, "#%5s%5s%6s%7s%9s%6s%8s%8s\n", "gid", "bid",
-                           "ctx#", "pid", "cbrs", "dsbytes", "mode");
+                           "ctx#", "asid", "pid", "cbrs", "dsbytes", "mode");
        if (gru)
                for (i = 0; i < GRU_NUM_CCH; i++) {
                        ts = gru->gs_gts[i];
                        if (!ts)
                                continue;
-                        seq_printf(file, " %5d%5d%6d%9d%6d%8d%8s\n",
+                        seq_printf(file, " %5d%5d%6d%7d%9d%6d%8d%8s\n",
                                   gru->gs_gid, gru->gs_blade_id, i,
-                                   ts->ts_tgid_owner,
+                                   is_kernel_context(ts) ? 0 : ts->ts_gms->ms_asids[gid].mt_asid,
+                                   is_kernel_context(ts) ? 0 : ts->ts_tgid_owner,
                                   ts->ts_cbr_au_count * GRU_CBR_AU_SIZE,
                                   ts->ts_cbr_au_count * GRU_DSR_AU_BYTES,
                                   mode[ts->ts_user_options &
@@ -355,7 +355,7 @@ static void delete_proc_files(void)
                for (p = proc_files; p->name; p++)
                        if (p->entry)
                                remove_proc_entry(p->name, proc_gru);
-                remove_proc_entry("gru", NULL);
+                remove_proc_entry("gru", proc_gru->parent);
        }
 }
diff --git a/drivers/misc/sgi-gru/grutables.h b/drivers/misc/sgi-gru/grutables.h
index 46990bcfa536..02a77b8b8eef 100644
--- a/drivers/misc/sgi-gru/grutables.h
+++ b/drivers/misc/sgi-gru/grutables.h
@@ -161,7 +161,7 @@ extern unsigned int gru_max_gids;
 #define GRU_MAX_GRUS            (GRU_MAX_BLADES * GRU_CHIPLETS_PER_BLADE)
 #define GRU_DRIVER_ID_STR       "SGI GRU Device Driver"
-#define GRU_DRIVER_VERSION_STR  "0.80"
+#define GRU_DRIVER_VERSION_STR  "0.85"
 /*
 * GRU statistics.
@@ -171,7 +171,8 @@ struct gru_stats_s {
        atomic_long_t vdata_free;
        atomic_long_t gts_alloc;
        atomic_long_t gts_free;
-        atomic_long_t vdata_double_alloc;
+        atomic_long_t gms_alloc;
+        atomic_long_t gms_free;
        atomic_long_t gts_double_allocate;
        atomic_long_t assign_context;
        atomic_long_t assign_context_failed;
@@ -184,28 +185,25 @@ struct gru_stats_s {
        atomic_long_t steal_kernel_context;
        atomic_long_t steal_context_failed;
        atomic_long_t nopfn;
-        atomic_long_t break_cow;
        atomic_long_t asid_new;
        atomic_long_t asid_next;
        atomic_long_t asid_wrap;
        atomic_long_t asid_reuse;
        atomic_long_t intr;
+        atomic_long_t intr_cbr;
+        atomic_long_t intr_tfh;
+        atomic_long_t intr_spurious;
        atomic_long_t intr_mm_lock_failed;
        atomic_long_t call_os;
-        atomic_long_t call_os_offnode_reference;
-        atomic_long_t call_os_check_for_bug;
        atomic_long_t call_os_wait_queue;
        atomic_long_t user_flush_tlb;
        atomic_long_t user_unload_context;
        atomic_long_t user_exception;
        atomic_long_t set_context_option;
-        atomic_long_t migrate_check;
+        atomic_long_t check_context_retarget_intr;
-        atomic_long_t migrated_retarget;
+        atomic_long_t check_context_unload;
-        atomic_long_t migrated_unload;
-        atomic_long_t migrated_unload_delay;
-        atomic_long_t migrated_nopfn_retarget;
-        atomic_long_t migrated_nopfn_unload;
        atomic_long_t tlb_dropin;
+        atomic_long_t tlb_preload_page;
        atomic_long_t tlb_dropin_fail_no_asid;
        atomic_long_t tlb_dropin_fail_upm;
        atomic_long_t tlb_dropin_fail_invalid;
@@ -213,17 +211,16 @@ struct gru_stats_s {
        atomic_long_t tlb_dropin_fail_idle;
        atomic_long_t tlb_dropin_fail_fmm;
        atomic_long_t tlb_dropin_fail_no_exception;
-        atomic_long_t tlb_dropin_fail_no_exception_war;
        atomic_long_t tfh_stale_on_fault;
        atomic_long_t mmu_invalidate_range;
        atomic_long_t mmu_invalidate_page;
-        atomic_long_t mmu_clear_flush_young;
        atomic_long_t flush_tlb;
        atomic_long_t flush_tlb_gru;
        atomic_long_t flush_tlb_gru_tgh;
        atomic_long_t flush_tlb_gru_zero_asid;
        atomic_long_t copy_gpa;
+        atomic_long_t read_gpa;
        atomic_long_t mesq_receive;
        atomic_long_t mesq_receive_none;
@@ -235,7 +232,7 @@ struct gru_stats_s {
        atomic_long_t mesq_send_qlimit_reached;
        atomic_long_t mesq_send_amo_nacked;
        atomic_long_t mesq_send_put_nacked;
-        atomic_long_t mesq_qf_not_full;
+        atomic_long_t mesq_page_overflow;
        atomic_long_t mesq_qf_locked;
        atomic_long_t mesq_qf_noop_not_full;
        atomic_long_t mesq_qf_switch_head_failed;
@@ -245,11 +242,13 @@ struct gru_stats_s {
        atomic_long_t mesq_noop_qlimit_reached;
        atomic_long_t mesq_noop_amo_nacked;
        atomic_long_t mesq_noop_put_nacked;
+        atomic_long_t mesq_noop_page_overflow;
 };
 enum mcs_op {cchop_allocate, cchop_start, cchop_interrupt, cchop_interrupt_sync,
-        cchop_deallocate, tghop_invalidate, mcsop_last};
+        cchop_deallocate, tfhop_write_only, tfhop_write_restart,
+        tghop_invalidate, mcsop_last};
 struct mcs_op_statistic {
        atomic_long_t   count;
@@ -259,8 +258,8 @@ struct mcs_op_statistic {
 extern struct mcs_op_statistic mcs_op_statistics[mcsop_last];
-#define OPT_DPRINT      1
+#define OPT_DPRINT              1
-#define OPT_STATS       2
+#define OPT_STATS               2
 #define IRQ_GRU                 110     /* Starting IRQ number for interrupts */
@@ -283,7 +282,7 @@ extern struct mcs_op_statistic mcs_op_statistics[mcsop_last];
 #define gru_dbg(dev, fmt, x...)                                         \
        do {                                                            \
                if (gru_options & OPT_DPRINT)                           \
-                        dev_dbg(dev, "%s: " fmt, __func__, x);          \
+                        printk(KERN_DEBUG "GRU:%d %s: " fmt, smp_processor_id(), __func__, x);\
        } while (0)
 #else
 #define gru_dbg(x...)
@@ -297,13 +296,7 @@ extern struct mcs_op_statistic mcs_op_statistics[mcsop_last];
 #define ASID_INC        8       /* number of regions */
 /* Generate a GRU asid value from a GRU base asid & a virtual address. */
-#if defined CONFIG_IA64
 #define VADDR_HI_BIT            64
-#elif defined CONFIG_X86_64
-#define VADDR_HI_BIT            48
-#else
-#error "Unsupported architecture"
-#endif
 #define GRUREGION(addr)         ((addr) >> (VADDR_HI_BIT - 3) & 3)
 #define GRUASID(asid, addr)     ((asid) + GRUREGION(addr))
@@ -345,6 +338,7 @@ struct gru_vma_data {
        long                    vd_user_options;/* misc user option flags */
        int                     vd_cbr_au_count;
        int                     vd_dsr_au_count;
+        unsigned char           vd_tlb_preload_count;
 };
 /*
@@ -360,6 +354,7 @@ struct gru_thread_state {
        struct gru_state        *ts_gru;        /* GRU where the context is
                                                   loaded */
        struct gru_mm_struct    *ts_gms;        /* asid & ioproc struct */
+        unsigned char           ts_tlb_preload_count; /* TLB preload pages */
        unsigned long           ts_cbr_map;     /* map of allocated CBRs */
        unsigned long           ts_dsr_map;     /* map of allocated DATA
                                                   resources */
@@ -368,6 +363,8 @@ struct gru_thread_state {
        long                    ts_user_options;/* misc user option flags */
        pid_t                   ts_tgid_owner;  /* task that is using the
                                                   context - for migration */
+        short                   ts_user_blade_id;/* user selected blade */
+        char                    ts_user_chiplet_id;/* user selected chiplet */
        unsigned short          ts_sizeavail;   /* Pagesizes in use */
        int                     ts_tsid;        /* thread that owns the
                                                   structure */
@@ -384,13 +381,11 @@ struct gru_thread_state {
        char                    ts_blade;       /* If >= 0, migrate context if
                                                   ref from diferent blade */
        char                    ts_force_cch_reload;
-        char                    ts_force_unload;/* force context to be unloaded
-                                                   after migration */
        char                    ts_cbr_idx[GRU_CBR_AU];/* CBR numbers of each
                                                          allocated CB */
        int                     ts_data_valid;  /* Indicates if ts_gdata has
                                                   valid data */
-        struct gts_statistics   ustats;         /* User statistics */
+        struct gru_gseg_statistics ustats;      /* User statistics */
        unsigned long           ts_gdata[0];    /* save area for GRU data (CB,
                                                   DS, CBE) */
 };
@@ -422,6 +417,7 @@ struct gru_state {
                                                           gru segments (64) */
        unsigned short          gs_gid;                 /* unique GRU number */
        unsigned short          gs_blade_id;            /* blade of GRU */
+        unsigned char           gs_chiplet_id;          /* blade chiplet of GRU */
        unsigned char           gs_tgh_local_shift;     /* used to pick TGH for
                                                           local flush */
        unsigned char           gs_tgh_first_remote;    /* starting TGH# for
@@ -453,6 +449,7 @@ struct gru_state {
                                                           in use */
        struct gru_thread_state *gs_gts[GRU_NUM_CCH];   /* GTS currently using
                                                           the context */
+        int                     gs_irq[GRU_NUM_TFM];    /* Interrupt irqs */
 };
 /*
@@ -619,6 +616,15 @@ static inline int is_kernel_context(struct gru_thread_state *gts)
        return !gts->ts_mm;
 }
+/*
+ * The following are for Nehelem-EX. A more general scheme is needed for
+ * future processors.
+ */
+#define UV_MAX_INT_CORES                8
+#define uv_cpu_socket_number(p)         ((cpu_physical_id(p) >> 5) & 1)
+#define uv_cpu_ht_number(p)             (cpu_physical_id(p) & 1)
+#define uv_cpu_core_number(p)           (((cpu_physical_id(p) >> 2) & 4) |      \
+                                        ((cpu_physical_id(p) >> 1) & 3))
 /*-----------------------------------------------------------------------------
 * Function prototypes & externs
 */
@@ -633,24 +639,26 @@ extern struct gru_thread_state *gru_find_thread_state(struct vm_area_struct
                                *vma, int tsid);
 extern struct gru_thread_state *gru_alloc_thread_state(struct vm_area_struct
                                *vma, int tsid);
-extern struct gru_state *gru_assign_gru_context(struct gru_thread_state *gts,
+extern struct gru_state *gru_assign_gru_context(struct gru_thread_state *gts);
-                int blade);
 extern void gru_load_context(struct gru_thread_state *gts);
-extern void gru_steal_context(struct gru_thread_state *gts, int blade_id);
+extern void gru_steal_context(struct gru_thread_state *gts);
 extern void gru_unload_context(struct gru_thread_state *gts, int savestate);
-extern int gru_update_cch(struct gru_thread_state *gts, int force_unload);
+extern int gru_update_cch(struct gru_thread_state *gts);
 extern void gts_drop(struct gru_thread_state *gts);
 extern void gru_tgh_flush_init(struct gru_state *gru);
 extern int gru_kservices_init(void);
 extern void gru_kservices_exit(void);
+extern irqreturn_t gru0_intr(int irq, void *dev_id);
+extern irqreturn_t gru1_intr(int irq, void *dev_id);
+extern irqreturn_t gru_intr_mblade(int irq, void *dev_id);
 extern int gru_dump_chiplet_request(unsigned long arg);
 extern long gru_get_gseg_statistics(unsigned long arg);
-extern irqreturn_t gru_intr(int irq, void *dev_id);
 extern int gru_handle_user_call_os(unsigned long address);
 extern int gru_user_flush_tlb(unsigned long arg);
 extern int gru_user_unload_context(unsigned long arg);
 extern int gru_get_exception_detail(unsigned long arg);
 extern int gru_set_context_option(unsigned long address);
+extern void gru_check_context_placement(struct gru_thread_state *gts);
 extern int gru_cpu_fault_map_id(void);
 extern struct vm_area_struct *gru_find_vma(unsigned long vaddr);
 extern void gru_flush_all_tlb(struct gru_state *gru);
@@ -658,7 +666,8 @@ extern int gru_proc_init(void);
 extern void gru_proc_exit(void);
 extern struct gru_thread_state *gru_alloc_gts(struct vm_area_struct *vma,
-                int cbr_au_count, int dsr_au_count, int options, int tsid);
+                int cbr_au_count, int dsr_au_count,
+                unsigned char tlb_preload_count, int options, int tsid);
 extern unsigned long gru_reserve_cb_resources(struct gru_state *gru,
                int cbr_au_count, char *cbmap);
 extern unsigned long gru_reserve_ds_resources(struct gru_state *gru,
diff --git a/drivers/misc/sgi-gru/grutlbpurge.c b/drivers/misc/sgi-gru/grutlbpurge.c
index 1d125091f5e7..240a6d361665 100644
--- a/drivers/misc/sgi-gru/grutlbpurge.c
+++ b/drivers/misc/sgi-gru/grutlbpurge.c
@@ -184,8 +184,8 @@ void gru_flush_tlb_range(struct gru_mm_struct *gms, unsigned long start,
                        STAT(flush_tlb_gru_tgh);
                        asid = GRUASID(asid, start);
                        gru_dbg(grudev,
-        "  FLUSH gruid %d, asid 0x%x, num %ld, cbmap 0x%x\n",
+        "  FLUSH gruid %d, asid 0x%x, vaddr 0x%lx, vamask 0x%x, num %ld, cbmap 0x%x\n",
-                                gid, asid, num, asids->mt_ctxbitmap);
+                              gid, asid, start, grupagesize, num, asids->mt_ctxbitmap);
                        tgh = get_lock_tgh_handle(gru);
                        tgh_invalidate(tgh, start, ~0, asid, grupagesize, 0,
                                       num - 1, asids->mt_ctxbitmap);
@@ -299,6 +299,7 @@ struct gru_mm_struct *gru_register_mmu_notifier(void)
 {
        struct gru_mm_struct *gms;
        struct mmu_notifier *mn;
+        int err;
        mn = mmu_find_ops(current->mm, &gru_mmuops);
        if (mn) {
@@ -307,16 +308,22 @@ struct gru_mm_struct *gru_register_mmu_notifier(void)
        } else {
                gms = kzalloc(sizeof(*gms), GFP_KERNEL);
                if (gms) {
+                        STAT(gms_alloc);
                        spin_lock_init(&gms->ms_asid_lock);
                        gms->ms_notifier.ops = &gru_mmuops;
                        atomic_set(&gms->ms_refcnt, 1);
                        init_waitqueue_head(&gms->ms_wait_queue);
-                        __mmu_notifier_register(&gms->ms_notifier, current->mm);
+                        err = __mmu_notifier_register(&gms->ms_notifier, current->mm);
+                        if (err)
+                                goto error;
                }
        }
        gru_dbg(grudev, "gms %p, refcnt %d\n", gms,
                atomic_read(&gms->ms_refcnt));
        return gms;
+error:
+        kfree(gms);
+        return ERR_PTR(err);
 }
 void gru_drop_mmu_notifier(struct gru_mm_struct *gms)
@@ -327,6 +334,7 @@ void gru_drop_mmu_notifier(struct gru_mm_struct *gms)
                if (!gms->ms_released)
                        mmu_notifier_unregister(&gms->ms_notifier, current->mm);
                kfree(gms);
+                STAT(gms_free);
        }
 }
diff --git a/drivers/misc/sgi-xp/xp.h b/drivers/misc/sgi-xp/xp.h
index 2275126cb334..851b2f25ce0e 100644
--- a/drivers/misc/sgi-xp/xp.h
+++ b/drivers/misc/sgi-xp/xp.h
@@ -339,6 +339,7 @@ extern short xp_partition_id;
 extern u8 xp_region_size;
 extern unsigned long (*xp_pa) (void *);
+extern unsigned long (*xp_socket_pa) (unsigned long);
 extern enum xp_retval (*xp_remote_memcpy) (unsigned long, const unsigned long,
                       size_t);
 extern int (*xp_cpu_to_nasid) (int);
diff --git a/drivers/misc/sgi-xp/xp_main.c b/drivers/misc/sgi-xp/xp_main.c
index 7896849b16dc..01be66d02ca8 100644
--- a/drivers/misc/sgi-xp/xp_main.c
+++ b/drivers/misc/sgi-xp/xp_main.c
@@ -44,6 +44,9 @@ EXPORT_SYMBOL_GPL(xp_region_size);
 unsigned long (*xp_pa) (void *addr);
 EXPORT_SYMBOL_GPL(xp_pa);
+unsigned long (*xp_socket_pa) (unsigned long gpa);
+EXPORT_SYMBOL_GPL(xp_socket_pa);
 enum xp_retval (*xp_remote_memcpy) (unsigned long dst_gpa,
                                    const unsigned long src_gpa, size_t len);
 EXPORT_SYMBOL_GPL(xp_remote_memcpy);
diff --git a/drivers/misc/sgi-xp/xp_sn2.c b/drivers/misc/sgi-xp/xp_sn2.c
index fb3ec9d735a9..d8e463f87241 100644
--- a/drivers/misc/sgi-xp/xp_sn2.c
+++ b/drivers/misc/sgi-xp/xp_sn2.c
@@ -84,6 +84,15 @@ xp_pa_sn2(void *addr)
 }
 /*
+ * Convert a global physical to a socket physical address.
+ */
+static unsigned long
+xp_socket_pa_sn2(unsigned long gpa)
+{
+        return gpa;
+}
+/*
 * Wrapper for bte_copy().
 *
 *      dst_pa - physical address of the destination of the transfer.
@@ -162,6 +171,7 @@ xp_init_sn2(void)
        xp_region_size = sn_region_size;
        xp_pa = xp_pa_sn2;
+        xp_socket_pa = xp_socket_pa_sn2;
        xp_remote_memcpy = xp_remote_memcpy_sn2;
        xp_cpu_to_nasid = xp_cpu_to_nasid_sn2;
        xp_expand_memprotect = xp_expand_memprotect_sn2;
diff --git a/drivers/misc/sgi-xp/xp_uv.c b/drivers/misc/sgi-xp/xp_uv.c
index d238576b26fa..a0d093274dc0 100644
--- a/drivers/misc/sgi-xp/xp_uv.c
+++ b/drivers/misc/sgi-xp/xp_uv.c
@@ -32,12 +32,44 @@ xp_pa_uv(void *addr)
        return uv_gpa(addr);
 }
+/*
+ * Convert a global physical to socket physical address.
+ */
+static unsigned long
+xp_socket_pa_uv(unsigned long gpa)
+{
+        return uv_gpa_to_soc_phys_ram(gpa);
+}
+static enum xp_retval
+xp_remote_mmr_read(unsigned long dst_gpa, const unsigned long src_gpa,
+                   size_t len)
+{
+        int ret;
+        unsigned long *dst_va = __va(uv_gpa_to_soc_phys_ram(dst_gpa));
+        BUG_ON(!uv_gpa_in_mmr_space(src_gpa));
+        BUG_ON(len != 8);
+        ret = gru_read_gpa(dst_va, src_gpa);
+        if (ret == 0)
+                return xpSuccess;
+        dev_err(xp, "gru_read_gpa() failed, dst_gpa=0x%016lx src_gpa=0x%016lx "
+                "len=%ld\n", dst_gpa, src_gpa, len);
+        return xpGruCopyError;
+}
 static enum xp_retval
 xp_remote_memcpy_uv(unsigned long dst_gpa, const unsigned long src_gpa,
                    size_t len)
 {
        int ret;
+        if (uv_gpa_in_mmr_space(src_gpa))
+                return xp_remote_mmr_read(dst_gpa, src_gpa, len);
        ret = gru_copy_gpa(dst_gpa, src_gpa, len);
        if (ret == 0)
                return xpSuccess;
@@ -123,6 +155,7 @@ xp_init_uv(void)
        xp_region_size = sn_region_size;
        xp_pa = xp_pa_uv;
+        xp_socket_pa = xp_socket_pa_uv;
        xp_remote_memcpy = xp_remote_memcpy_uv;
        xp_cpu_to_nasid = xp_cpu_to_nasid_uv;
        xp_expand_memprotect = xp_expand_memprotect_uv;
diff --git a/drivers/misc/sgi-xp/xpc_partition.c b/drivers/misc/sgi-xp/xpc_partition.c
index 65877bc5edaa..9a6268c89fdd 100644
--- a/drivers/misc/sgi-xp/xpc_partition.c
+++ b/drivers/misc/sgi-xp/xpc_partition.c
@@ -18,6 +18,7 @@
 #include <linux/device.h>
 #include <linux/hardirq.h>
 #include "xpc.h"
+#include <asm/uv/uv_hub.h>
 /* XPC is exiting flag */
 int xpc_exiting;
@@ -92,8 +93,12 @@ xpc_get_rsvd_page_pa(int nasid)
                        break;
                /* !!! L1_CACHE_ALIGN() is only a sn2-bte_copy requirement */
-                if (L1_CACHE_ALIGN(len) > buf_len) {
+                if (is_shub())
-                        kfree(buf_base);
+                        len = L1_CACHE_ALIGN(len);
+                if (len > buf_len) {
+                        if (buf_base != NULL)
+                                kfree(buf_base);
                        buf_len = L1_CACHE_ALIGN(len);
                        buf = xpc_kmalloc_cacheline_aligned(buf_len, GFP_KERNEL,
                                                            &buf_base);
@@ -105,7 +110,7 @@ xpc_get_rsvd_page_pa(int nasid)
                        }
                }
-                ret = xp_remote_memcpy(xp_pa(buf), rp_pa, buf_len);
+                ret = xp_remote_memcpy(xp_pa(buf), rp_pa, len);
                if (ret != xpSuccess) {
                        dev_dbg(xpc_part, "xp_remote_memcpy failed %d\n", ret);
                        break;
@@ -143,7 +148,7 @@ xpc_setup_rsvd_page(void)
                dev_err(xpc_part, "SAL failed to locate the reserved page\n");
                return -ESRCH;
        }
-        rp = (struct xpc_rsvd_page *)__va(rp_pa);
+        rp = (struct xpc_rsvd_page *)__va(xp_socket_pa(rp_pa));
        if (rp->SAL_version < 3) {
                /* SAL_versions < 3 had a SAL_partid defined as a u8 */
diff --git a/drivers/misc/sgi-xp/xpc_uv.c b/drivers/misc/sgi-xp/xpc_uv.c
index b5bbe59f9c57..8725d5e8ab0c 100644
--- a/drivers/misc/sgi-xp/xpc_uv.c
+++ b/drivers/misc/sgi-xp/xpc_uv.c
@@ -157,22 +157,24 @@ xpc_gru_mq_watchlist_alloc_uv(struct xpc_gru_mq_uv *mq)
 {
        int ret;
-#if defined CONFIG_X86_64
+#if defined CONFIG_IA64_GENERIC || defined CONFIG_IA64_SGI_UV
-        ret = uv_bios_mq_watchlist_alloc(mq->mmr_blade, uv_gpa(mq->address),
+        int mmr_pnode = uv_blade_to_pnode(mq->mmr_blade);
-                                         mq->order, &mq->mmr_offset);
-        if (ret < 0) {
+        ret = sn_mq_watchlist_alloc(mmr_pnode, (void *)uv_gpa(mq->address),
-                dev_err(xpc_part, "uv_bios_mq_watchlist_alloc() failed, "
-                        "ret=%d\n", ret);
-                return ret;
-        }
-#elif defined CONFIG_IA64_GENERIC || defined CONFIG_IA64_SGI_UV
-        ret = sn_mq_watchlist_alloc(mq->mmr_blade, (void *)uv_gpa(mq->address),
                                    mq->order, &mq->mmr_offset);
        if (ret < 0) {
                dev_err(xpc_part, "sn_mq_watchlist_alloc() failed, ret=%d\n",
                        ret);
                return -EBUSY;
        }
+#elif defined CONFIG_X86_64
+        ret = uv_bios_mq_watchlist_alloc(uv_gpa(mq->address),
+                                         mq->order, &mq->mmr_offset);
+        if (ret < 0) {
+                dev_err(xpc_part, "uv_bios_mq_watchlist_alloc() failed, "
+                        "ret=%d\n", ret);
+                return ret;
+        }
 #else
        #error not a supported configuration
 #endif
@@ -185,12 +187,13 @@ static void
 xpc_gru_mq_watchlist_free_uv(struct xpc_gru_mq_uv *mq)
 {
        int ret;
+        int mmr_pnode = uv_blade_to_pnode(mq->mmr_blade);
 #if defined CONFIG_X86_64
-        ret = uv_bios_mq_watchlist_free(mq->mmr_blade, mq->watchlist_num);
+        ret = uv_bios_mq_watchlist_free(mmr_pnode, mq->watchlist_num);
        BUG_ON(ret != BIOS_STATUS_SUCCESS);
 #elif defined CONFIG_IA64_GENERIC || defined CONFIG_IA64_SGI_UV
-        ret = sn_mq_watchlist_free(mq->mmr_blade, mq->watchlist_num);
+        ret = sn_mq_watchlist_free(mmr_pnode, mq->watchlist_num);
        BUG_ON(ret != SALRET_OK);
 #else
        #error not a supported configuration
@@ -204,6 +207,7 @@ xpc_create_gru_mq_uv(unsigned int mq_size, int cpu, char *irq_name,
        enum xp_retval xp_ret;
        int ret;
        int nid;
+        int nasid;
        int pg_order;
        struct page *page;
        struct xpc_gru_mq_uv *mq;
@@ -259,9 +263,11 @@ xpc_create_gru_mq_uv(unsigned int mq_size, int cpu, char *irq_name,
                goto out_5;
        }
+        nasid = UV_PNODE_TO_NASID(uv_cpu_to_pnode(cpu));
        mmr_value = (struct uv_IO_APIC_route_entry *)&mq->mmr_value;
        ret = gru_create_message_queue(mq->gru_mq_desc, mq->address, mq_size,
-                                       nid, mmr_value->vector, mmr_value->dest);
+                                     nasid, mmr_value->vector, mmr_value->dest);
        if (ret != 0) {
                dev_err(xpc_part, "gru_create_message_queue() returned "
                        "error=%d\n", ret);
@@ -946,11 +952,13 @@ xpc_get_fifo_entry_uv(struct xpc_fifo_head_uv *head)
                head->first = first->next;
                if (head->first == NULL)
                        head->last = NULL;
+                head->n_entries--;
+                BUG_ON(head->n_entries < 0);
+                first->next = NULL;
        }
-        head->n_entries--;
-        BUG_ON(head->n_entries < 0);
        spin_unlock_irqrestore(&head->lock, irq_flags);
-        first->next = NULL;
        return first;
 }
@@ -1019,7 +1027,8 @@ xpc_make_first_contact_uv(struct xpc_partition *part)
        xpc_send_activate_IRQ_part_uv(part, &msg, sizeof(msg),
                                      XPC_ACTIVATE_MQ_MSG_SYNC_ACT_STATE_UV);
-        while (part->sn.uv.remote_act_state != XPC_P_AS_ACTIVATING) {
+        while (!((part->sn.uv.remote_act_state == XPC_P_AS_ACTIVATING) ||
+                 (part->sn.uv.remote_act_state == XPC_P_AS_ACTIVE))) {
                dev_dbg(xpc_part, "waiting to make first contact with "
                        "partition %d\n", XPC_PARTID(part));
@@ -1422,7 +1431,6 @@ xpc_handle_notify_mq_msg_uv(struct xpc_partition *part,
        msg_slot = ch_uv->recv_msg_slots +
            (msg->hdr.msg_slot_number % ch->remote_nentries) * ch->entry_size;
-        BUG_ON(msg->hdr.msg_slot_number != msg_slot->hdr.msg_slot_number);
        BUG_ON(msg_slot->hdr.size != 0);
        memcpy(msg_slot, msg, msg->hdr.size);
@@ -1646,8 +1654,6 @@ xpc_received_payload_uv(struct xpc_channel *ch, void *payload)
                               sizeof(struct xpc_notify_mq_msghdr_uv));
        if (ret != xpSuccess)
                XPC_DEACTIVATE_PARTITION(&xpc_partitions[ch->partid], ret);
-        msg->hdr.msg_slot_number += ch->remote_nentries;
 }
 static struct xpc_arch_operations xpc_arch_ops_uv = {
diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
index e7563a9872d0..5fbf29e1e64f 100644
--- a/drivers/mtd/chips/cfi_cmdset_0001.c
+++ b/drivers/mtd/chips/cfi_cmdset_0001.c
@@ -43,15 +43,17 @@
 // debugging, turns off buffer write mode if set to 1
 #define FORCE_WORD_WRITE 0
-#define MANUFACTURER_INTEL      0x0089
+/* Intel chips */
 #define I82802AB        0x00ad
 #define I82802AC        0x00ac
 #define PF38F4476       0x881c
-#define MANUFACTURER_ST         0x0020
+/* STMicroelectronics chips */
 #define M50LPW080       0x002F
 #define M50FLW080A      0x0080
 #define M50FLW080B      0x0081
+/* Atmel chips */
 #define AT49BV640D      0x02de
+#define AT49BV640DT     0x02db
 static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
 static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
@@ -199,6 +201,16 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
        cfi->cfiq->BufWriteTimeoutMax = 0;
 }
+static void fixup_at49bv640dx_lock(struct mtd_info *mtd, void *param)
+{
+        struct map_info *map = mtd->priv;
+        struct cfi_private *cfi = map->fldrv_priv;
+        struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
+        cfip->FeatureSupport |= (1 << 5);
+        mtd->flags |= MTD_POWERUP_LOCK;
+}
 #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
 /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
 static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
@@ -283,6 +295,8 @@ static void fixup_unlock_powerup_lock(struct mtd_info *mtd, void *param)
 static struct cfi_fixup cfi_fixup_table[] = {
        { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+        { CFI_MFR_ATMEL, AT49BV640D, fixup_at49bv640dx_lock, NULL },
+        { CFI_MFR_ATMEL, AT49BV640DT, fixup_at49bv640dx_lock, NULL },
 #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
        { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
 #endif
@@ -294,16 +308,16 @@ static struct cfi_fixup cfi_fixup_table[] = {
 #endif
        { CFI_MFR_ST, 0x00ba, /* M28W320CT */ fixup_st_m28w320ct, NULL },
        { CFI_MFR_ST, 0x00bb, /* M28W320CB */ fixup_st_m28w320cb, NULL },
-        { MANUFACTURER_INTEL, CFI_ID_ANY, fixup_unlock_powerup_lock, NULL, },
+        { CFI_MFR_INTEL, CFI_ID_ANY, fixup_unlock_powerup_lock, NULL, },
        { 0, 0, NULL, NULL }
 };
 static struct cfi_fixup jedec_fixup_table[] = {
-        { MANUFACTURER_INTEL, I82802AB,   fixup_use_fwh_lock, NULL, },
+        { CFI_MFR_INTEL, I82802AB,   fixup_use_fwh_lock, NULL, },
-        { MANUFACTURER_INTEL, I82802AC,   fixup_use_fwh_lock, NULL, },
+        { CFI_MFR_INTEL, I82802AC,   fixup_use_fwh_lock, NULL, },
-        { MANUFACTURER_ST,    M50LPW080,  fixup_use_fwh_lock, NULL, },
+        { CFI_MFR_ST,    M50LPW080,  fixup_use_fwh_lock, NULL, },
-        { MANUFACTURER_ST,    M50FLW080A, fixup_use_fwh_lock, NULL, },
+        { CFI_MFR_ST,    M50FLW080A, fixup_use_fwh_lock, NULL, },
-        { MANUFACTURER_ST,    M50FLW080B, fixup_use_fwh_lock, NULL, },
+        { CFI_MFR_ST,    M50FLW080B, fixup_use_fwh_lock, NULL, },
        { 0, 0, NULL, NULL }
 };
 static struct cfi_fixup fixup_table[] = {
@@ -319,7 +333,7 @@ static struct cfi_fixup fixup_table[] = {
 static void cfi_fixup_major_minor(struct cfi_private *cfi,
                                                struct cfi_pri_intelext *extp)
 {
-        if (cfi->mfr == MANUFACTURER_INTEL &&
+        if (cfi->mfr == CFI_MFR_INTEL &&
                        cfi->id == PF38F4476 && extp->MinorVersion == '3')
                extp->MinorVersion = '1';
 }
@@ -2235,7 +2249,7 @@ static int cfi_intelext_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
        /* Some chips have OTP located in the _top_ partition only.
           For example: Intel 28F256L18T (T means top-parameter device) */
-        if (cfi->mfr == MANUFACTURER_INTEL) {
+        if (cfi->mfr == CFI_MFR_INTEL) {
                switch (cfi->id) {
                case 0x880b:
                case 0x880c:
@@ -2564,6 +2578,7 @@ static int cfi_intelext_reset(struct mtd_info *mtd)
                if (!ret) {
                        map_write(map, CMD(0xff), chip->start);
                        chip->state = FL_SHUTDOWN;
+                        put_chip(map, chip, chip->start);
                }
                spin_unlock(chip->mutex);
        }
diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index 94bb61e19047..f3600e8d5382 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -490,10 +490,6 @@ static struct mtd_info *cfi_amdstd_setup(struct mtd_info *mtd)
        }
 #endif
-        /* FIXME: erase-suspend-program is broken.  See
-           http://lists.infradead.org/pipermail/linux-mtd/2003-December/009001.html */
-        printk(KERN_NOTICE "cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.\n");
        __module_get(THIS_MODULE);
        return mtd;
@@ -573,7 +569,6 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
                        if (time_after(jiffies, timeo)) {
                                printk(KERN_ERR "Waiting for chip to be ready timed out.\n");
-                                spin_unlock(chip->mutex);
                                return -EIO;
                        }
                        spin_unlock(chip->mutex);
@@ -589,15 +584,9 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
                return 0;
        case FL_ERASING:
-                if (mode == FL_WRITING) /* FIXME: Erase-suspend-program appears broken. */
+                if (!cfip || !(cfip->EraseSuspend & (0x1|0x2)) ||
-                        goto sleep;
+                    !(mode == FL_READY || mode == FL_POINT ||
+                    (mode == FL_WRITING && (cfip->EraseSuspend & 0x2))))
-                if (!(   mode == FL_READY
-                      || mode == FL_POINT
-                      || !cfip
-                      || (mode == FL_WRITING && (cfip->EraseSuspend & 0x2))
-                      || (mode == FL_WRITING && (cfip->EraseSuspend & 0x1)
-                    )))
                        goto sleep;
                /* We could check to see if we're trying to access the sector
diff --git a/drivers/mtd/chips/cfi_util.c b/drivers/mtd/chips/cfi_util.c
index c5a84fda5410..ca584d0380b4 100755
--- a/drivers/mtd/chips/cfi_util.c
+++ b/drivers/mtd/chips/cfi_util.c
@@ -71,6 +71,13 @@ int __xipram cfi_qry_mode_on(uint32_t base, struct map_info *map,
        cfi_send_gen_cmd(0x98, 0x555, base, map, cfi, cfi->device_type, NULL);
        if (cfi_qry_present(map, base, cfi))
                return 1;
+        /* some old SST chips, e.g. 39VF160x/39VF320x */
+        cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
+        cfi_send_gen_cmd(0xAA, 0x5555, base, map, cfi, cfi->device_type, NULL);
+        cfi_send_gen_cmd(0x55, 0x2AAA, base, map, cfi, cfi->device_type, NULL);
+        cfi_send_gen_cmd(0x98, 0x5555, base, map, cfi, cfi->device_type, NULL);
+        if (cfi_qry_present(map, base, cfi))
+                return 1;
        /* QRY not found */
        return 0;
 }
diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c
index 736a3be265f2..1bec5e1ce6ac 100644
--- a/drivers/mtd/chips/jedec_probe.c
+++ b/drivers/mtd/chips/jedec_probe.c
@@ -142,8 +142,8 @@
 /* ST - www.st.com */
 #define M29F800AB       0x0058
-#define M29W800DT       0x00D7
+#define M29W800DT       0x22D7
-#define M29W800DB       0x005B
+#define M29W800DB       0x225B
 #define M29W400DT       0x00EE
 #define M29W400DB       0x00EF
 #define M29W160DT       0x22C4
@@ -1575,7 +1575,7 @@ static const struct amd_flash_info jedec_table[] = {
                .dev_id         = M29W800DT,
                .name           = "ST M29W800DT",
                .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
-                .uaddr          = MTD_UADDR_0x5555_0x2AAA,      /* ???? */
+                .uaddr          = MTD_UADDR_0x0AAA_0x0555,
                .dev_size       = SIZE_1MiB,
                .cmd_set        = P_ID_AMD_STD,
                .nr_regions     = 4,
@@ -1590,7 +1590,7 @@ static const struct amd_flash_info jedec_table[] = {
                .dev_id         = M29W800DB,
                .name           = "ST M29W800DB",
                .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
-                .uaddr          = MTD_UADDR_0x5555_0x2AAA,      /* ???? */
+                .uaddr          = MTD_UADDR_0x0AAA_0x0555,
                .dev_size       = SIZE_1MiB,
                .cmd_set        = P_ID_AMD_STD,
                .nr_regions     = 4,
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index 4c19269de91a..f3f4768d6e18 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -22,6 +22,7 @@
 #include <linux/mutex.h>
 #include <linux/math64.h>
 #include <linux/sched.h>
+#include <linux/mod_devicetable.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
@@ -29,9 +30,6 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
-#define FLASH_PAGESIZE          256
 /* Flash opcodes. */
 #define OPCODE_WREN             0x06    /* Write enable */
 #define OPCODE_RDSR             0x05    /* Read status register */
@@ -61,7 +59,7 @@
 /* Define max times to check status register before we give up. */
 #define MAX_READY_WAIT_JIFFIES  (40 * HZ)       /* M25P16 specs 40s max chip erase */
-#define CMD_SIZE                4
+#define MAX_CMD_SIZE            4
 #ifdef CONFIG_M25PXX_USE_FAST_READ
 #define OPCODE_READ     OPCODE_FAST_READ
@@ -78,8 +76,10 @@ struct m25p {
        struct mutex            lock;
        struct mtd_info         mtd;
        unsigned                partitioned:1;
+        u16                     page_size;
+        u16                     addr_width;
        u8                      erase_opcode;
-        u8                      command[CMD_SIZE + FAST_READ_DUMMY_BYTE];
+        u8                      *command;
 };
 static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd)
@@ -198,6 +198,19 @@ static int erase_chip(struct m25p *flash)
        return 0;
 }
+static void m25p_addr2cmd(struct m25p *flash, unsigned int addr, u8 *cmd)
+{
+        /* opcode is in cmd[0] */
+        cmd[1] = addr >> (flash->addr_width * 8 -  8);
+        cmd[2] = addr >> (flash->addr_width * 8 - 16);
+        cmd[3] = addr >> (flash->addr_width * 8 - 24);
+}
+static int m25p_cmdsz(struct m25p *flash)
+{
+        return 1 + flash->addr_width;
+}
 /*
 * Erase one sector of flash memory at offset ``offset'' which is any
 * address within the sector which should be erased.
@@ -219,11 +232,9 @@ static int erase_sector(struct m25p *flash, u32 offset)
        /* Set up command buffer. */
        flash->command[0] = flash->erase_opcode;
-        flash->command[1] = offset >> 16;
+        m25p_addr2cmd(flash, offset, flash->command);
-        flash->command[2] = offset >> 8;
-        flash->command[3] = offset;
-        spi_write(flash->spi, flash->command, CMD_SIZE);
+        spi_write(flash->spi, flash->command, m25p_cmdsz(flash));
        return 0;
 }
@@ -325,7 +336,7 @@ static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
         * Should add 1 byte DUMMY_BYTE.
         */
        t[0].tx_buf = flash->command;
-        t[0].len = CMD_SIZE + FAST_READ_DUMMY_BYTE;
+        t[0].len = m25p_cmdsz(flash) + FAST_READ_DUMMY_BYTE;
        spi_message_add_tail(&t[0], &m);
        t[1].rx_buf = buf;
@@ -352,13 +363,11 @@ static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
        /* Set up the write data buffer. */
        flash->command[0] = OPCODE_READ;
-        flash->command[1] = from >> 16;
+        m25p_addr2cmd(flash, from, flash->command);
-        flash->command[2] = from >> 8;
-        flash->command[3] = from;
        spi_sync(flash->spi, &m);
-        *retlen = m.actual_length - CMD_SIZE - FAST_READ_DUMMY_BYTE;
+        *retlen = m.actual_length - m25p_cmdsz(flash) - FAST_READ_DUMMY_BYTE;
        mutex_unlock(&flash->lock);
@@ -396,7 +405,7 @@ static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len,
        memset(t, 0, (sizeof t));
        t[0].tx_buf = flash->command;
-        t[0].len = CMD_SIZE;
+        t[0].len = m25p_cmdsz(flash);
        spi_message_add_tail(&t[0], &m);
        t[1].tx_buf = buf;
@@ -414,41 +423,36 @@ static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len,
        /* Set up the opcode in the write buffer. */
        flash->command[0] = OPCODE_PP;
-        flash->command[1] = to >> 16;
+        m25p_addr2cmd(flash, to, flash->command);
-        flash->command[2] = to >> 8;
-        flash->command[3] = to;
-        /* what page do we start with? */
+        page_offset = to & (flash->page_size - 1);
-        page_offset = to % FLASH_PAGESIZE;
        /* do all the bytes fit onto one page? */
-        if (page_offset + len <= FLASH_PAGESIZE) {
+        if (page_offset + len <= flash->page_size) {
                t[1].len = len;
                spi_sync(flash->spi, &m);
-                *retlen = m.actual_length - CMD_SIZE;
+                *retlen = m.actual_length - m25p_cmdsz(flash);
        } else {
                u32 i;
                /* the size of data remaining on the first page */
-                page_size = FLASH_PAGESIZE - page_offset;
+                page_size = flash->page_size - page_offset;
                t[1].len = page_size;
                spi_sync(flash->spi, &m);
-                *retlen = m.actual_length - CMD_SIZE;
+                *retlen = m.actual_length - m25p_cmdsz(flash);
-                /* write everything in PAGESIZE chunks */
+                /* write everything in flash->page_size chunks */
                for (i = page_size; i < len; i += page_size) {
                        page_size = len - i;
-                        if (page_size > FLASH_PAGESIZE)
+                        if (page_size > flash->page_size)
-                                page_size = FLASH_PAGESIZE;
+                                page_size = flash->page_size;
                        /* write the next page to flash */
-                        flash->command[1] = (to + i) >> 16;
+                        m25p_addr2cmd(flash, to + i, flash->command);
-                        flash->command[2] = (to + i) >> 8;
-                        flash->command[3] = (to + i);
                        t[1].tx_buf = buf + i;
                        t[1].len = page_size;
@@ -460,7 +464,7 @@ static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len,
                        spi_sync(flash->spi, &m);
                        if (retlen)
-                                *retlen += m.actual_length - CMD_SIZE;
+                                *retlen += m.actual_length - m25p_cmdsz(flash);
                }
        }
@@ -492,7 +496,7 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
        memset(t, 0, (sizeof t));
        t[0].tx_buf = flash->command;
-        t[0].len = CMD_SIZE;
+        t[0].len = m25p_cmdsz(flash);
        spi_message_add_tail(&t[0], &m);
        t[1].tx_buf = buf;
@@ -511,9 +515,7 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
        /* Start write from odd address. */
        if (actual) {
                flash->command[0] = OPCODE_BP;
-                flash->command[1] = to >> 16;
+                m25p_addr2cmd(flash, to, flash->command);
-                flash->command[2] = to >> 8;
-                flash->command[3] = to;
                /* write one byte. */
                t[1].len = 1;
@@ -521,17 +523,15 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
                ret = wait_till_ready(flash);
                if (ret)
                        goto time_out;
-                *retlen += m.actual_length - CMD_SIZE;
+                *retlen += m.actual_length - m25p_cmdsz(flash);
        }
        to += actual;
        flash->command[0] = OPCODE_AAI_WP;
-        flash->command[1] = to >> 16;
+        m25p_addr2cmd(flash, to, flash->command);
-        flash->command[2] = to >> 8;
-        flash->command[3] = to;
        /* Write out most of the data here. */
-        cmd_sz = CMD_SIZE;
+        cmd_sz = m25p_cmdsz(flash);
        for (; actual < len - 1; actual += 2) {
                t[0].len = cmd_sz;
                /* write two bytes. */
@@ -555,10 +555,8 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
        if (actual != len) {
                write_enable(flash);
                flash->command[0] = OPCODE_BP;
-                flash->command[1] = to >> 16;
+                m25p_addr2cmd(flash, to, flash->command);
-                flash->command[2] = to >> 8;
+                t[0].len = m25p_cmdsz(flash);
-                flash->command[3] = to;
-                t[0].len = CMD_SIZE;
                t[1].len = 1;
                t[1].tx_buf = buf + actual;
@@ -566,7 +564,7 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
                ret = wait_till_ready(flash);
                if (ret)
                        goto time_out;
-                *retlen += m.actual_length - CMD_SIZE;
+                *retlen += m.actual_length - m25p_cmdsz(flash);
                write_disable(flash);
        }
@@ -582,8 +580,6 @@ time_out:
 */
 struct flash_info {
-        char            *name;
        /* JEDEC id zero means "no ID" (most older chips); otherwise it has
         * a high byte of zero plus three data bytes: the manufacturer id,
         * then a two byte device id.
@@ -597,87 +593,119 @@ struct flash_info {
        unsigned        sector_size;
        u16             n_sectors;
+        u16             page_size;
+        u16             addr_width;
        u16             flags;
 #define SECT_4K         0x01            /* OPCODE_BE_4K works uniformly */
+#define M25P_NO_ERASE   0x02            /* No erase command needed */
 };
+#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags)      \
+        ((kernel_ulong_t)&(struct flash_info) {                         \
+                .jedec_id = (_jedec_id),                                \
+                .ext_id = (_ext_id),                                    \
+                .sector_size = (_sector_size),                          \
+                .n_sectors = (_n_sectors),                              \
+                .page_size = 256,                                       \
+                .addr_width = 3,                                        \
+                .flags = (_flags),                                      \
+        })
+#define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_width)   \
+        ((kernel_ulong_t)&(struct flash_info) {                         \
+                .sector_size = (_sector_size),                          \
+                .n_sectors = (_n_sectors),                              \
+                .page_size = (_page_size),                              \
+                .addr_width = (_addr_width),                            \
+                .flags = M25P_NO_ERASE,                                 \
+        })
 /* NOTE: double check command sets and memory organization when you add
 * more flash chips.  This current list focusses on newer chips, which
 * have been converging on command sets which including JEDEC ID.
 */
-static struct flash_info __devinitdata m25p_data [] = {
+static const struct spi_device_id m25p_ids[] = {
        /* Atmel -- some are (confusingly) marketed as "DataFlash" */
-        { "at25fs010",  0x1f6601, 0, 32 * 1024, 4, SECT_4K, },
+        { "at25fs010",  INFO(0x1f6601, 0, 32 * 1024,   4, SECT_4K) },
-        { "at25fs040",  0x1f6604, 0, 64 * 1024, 8, SECT_4K, },
+        { "at25fs040",  INFO(0x1f6604, 0, 64 * 1024,   8, SECT_4K) },
-        { "at25df041a", 0x1f4401, 0, 64 * 1024, 8, SECT_4K, },
+        { "at25df041a", INFO(0x1f4401, 0, 64 * 1024,   8, SECT_4K) },
-        { "at25df641",  0x1f4800, 0, 64 * 1024, 128, SECT_4K, },
+        { "at25df641",  INFO(0x1f4800, 0, 64 * 1024, 128, SECT_4K) },
-        { "at26f004",   0x1f0400, 0, 64 * 1024, 8, SECT_4K, },
+        { "at26f004",   INFO(0x1f0400, 0, 64 * 1024,  8, SECT_4K) },
-        { "at26df081a", 0x1f4501, 0, 64 * 1024, 16, SECT_4K, },
+        { "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16, SECT_4K) },
-        { "at26df161a", 0x1f4601, 0, 64 * 1024, 32, SECT_4K, },
+        { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SECT_4K) },
-        { "at26df321",  0x1f4701, 0, 64 * 1024, 64, SECT_4K, },
+        { "at26df321",  INFO(0x1f4701, 0, 64 * 1024, 64, SECT_4K) },
        /* Macronix */
-        { "mx25l3205d", 0xc22016, 0, 64 * 1024, 64, },
+        { "mx25l4005a",  INFO(0xc22013, 0, 64 * 1024,   8, SECT_4K) },
-        { "mx25l6405d", 0xc22017, 0, 64 * 1024, 128, },
+        { "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, 0) },
-        { "mx25l12805d", 0xc22018, 0, 64 * 1024, 256, },
+        { "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, 0) },
-        { "mx25l12855e", 0xc22618, 0, 64 * 1024, 256, },
+        { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
+        { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
        /* Spansion -- single (large) sector size only, at least
         * for the chips listed here (without boot sectors).
         */
-        { "s25sl004a", 0x010212, 0, 64 * 1024, 8, },
+        { "s25sl004a",  INFO(0x010212,      0,  64 * 1024,   8, 0) },
-        { "s25sl008a", 0x010213, 0, 64 * 1024, 16, },
+        { "s25sl008a",  INFO(0x010213,      0,  64 * 1024,  16, 0) },
-        { "s25sl016a", 0x010214, 0, 64 * 1024, 32, },
+        { "s25sl016a",  INFO(0x010214,      0,  64 * 1024,  32, 0) },
-        { "s25sl032a", 0x010215, 0, 64 * 1024, 64, },
+        { "s25sl032a",  INFO(0x010215,      0,  64 * 1024,  64, 0) },
-        { "s25sl064a", 0x010216, 0, 64 * 1024, 128, },
+        { "s25sl064a",  INFO(0x010216,      0,  64 * 1024, 128, 0) },
-        { "s25sl12800", 0x012018, 0x0300, 256 * 1024, 64, },
+        { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024,  64, 0) },
-        { "s25sl12801", 0x012018, 0x0301, 64 * 1024, 256, },
+        { "s25sl12801", INFO(0x012018, 0x0301,  64 * 1024, 256, 0) },
-        { "s25fl129p0", 0x012018, 0x4d00, 256 * 1024, 64, },
+        { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024,  64, 0) },
-        { "s25fl129p1", 0x012018, 0x4d01, 64 * 1024, 256, },
+        { "s25fl129p1", INFO(0x012018, 0x4d01,  64 * 1024, 256, 0) },
        /* SST -- large erase sizes are "overlays", "sectors" are 4K */
-        { "sst25vf040b", 0xbf258d, 0, 64 * 1024, 8, SECT_4K, },
+        { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024,  8, SECT_4K) },
-        { "sst25vf080b", 0xbf258e, 0, 64 * 1024, 16, SECT_4K, },
+        { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, SECT_4K) },
-        { "sst25vf016b", 0xbf2541, 0, 64 * 1024, 32, SECT_4K, },
+        { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, SECT_4K) },
-        { "sst25vf032b", 0xbf254a, 0, 64 * 1024, 64, SECT_4K, },
+        { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, SECT_4K) },
-        { "sst25wf512",  0xbf2501, 0, 64 * 1024, 1, SECT_4K, },
+        { "sst25wf512",  INFO(0xbf2501, 0, 64 * 1024,  1, SECT_4K) },
-        { "sst25wf010",  0xbf2502, 0, 64 * 1024, 2, SECT_4K, },
+        { "sst25wf010",  INFO(0xbf2502, 0, 64 * 1024,  2, SECT_4K) },
-        { "sst25wf020",  0xbf2503, 0, 64 * 1024, 4, SECT_4K, },
+        { "sst25wf020",  INFO(0xbf2503, 0, 64 * 1024,  4, SECT_4K) },
-        { "sst25wf040",  0xbf2504, 0, 64 * 1024, 8, SECT_4K, },
+        { "sst25wf040",  INFO(0xbf2504, 0, 64 * 1024,  8, SECT_4K) },
        /* ST Microelectronics -- newer production may have feature updates */
-        { "m25p05",  0x202010,  0, 32 * 1024, 2, },
+        { "m25p05",  INFO(0x202010,  0,  32 * 1024,   2, 0) },
-        { "m25p10",  0x202011,  0, 32 * 1024, 4, },
+        { "m25p10",  INFO(0x202011,  0,  32 * 1024,   4, 0) },
-        { "m25p20",  0x202012,  0, 64 * 1024, 4, },
+        { "m25p20",  INFO(0x202012,  0,  64 * 1024,   4, 0) },
-        { "m25p40",  0x202013,  0, 64 * 1024, 8, },
+        { "m25p40",  INFO(0x202013,  0,  64 * 1024,   8, 0) },
-        { "m25p80",         0,  0, 64 * 1024, 16, },
+        { "m25p80",  INFO(0x202014,  0,  64 * 1024,  16, 0) },
-        { "m25p16",  0x202015,  0, 64 * 1024, 32, },
+        { "m25p16",  INFO(0x202015,  0,  64 * 1024,  32, 0) },
-        { "m25p32",  0x202016,  0, 64 * 1024, 64, },
+        { "m25p32",  INFO(0x202016,  0,  64 * 1024,  64, 0) },
-        { "m25p64",  0x202017,  0, 64 * 1024, 128, },
+        { "m25p64",  INFO(0x202017,  0,  64 * 1024, 128, 0) },
-        { "m25p128", 0x202018, 0, 256 * 1024, 64, },
+        { "m25p128", INFO(0x202018,  0, 256 * 1024,  64, 0) },
-        { "m45pe10", 0x204011,  0, 64 * 1024, 2, },
+        { "m45pe10", INFO(0x204011,  0, 64 * 1024,    2, 0) },
-        { "m45pe80", 0x204014,  0, 64 * 1024, 16, },
+        { "m45pe80", INFO(0x204014,  0, 64 * 1024,   16, 0) },
-        { "m45pe16", 0x204015,  0, 64 * 1024, 32, },
+        { "m45pe16", INFO(0x204015,  0, 64 * 1024,   32, 0) },
-        { "m25pe80", 0x208014,  0, 64 * 1024, 16, },
+        { "m25pe80", INFO(0x208014,  0, 64 * 1024, 16,       0) },
-        { "m25pe16", 0x208015,  0, 64 * 1024, 32, SECT_4K, },
+        { "m25pe16", INFO(0x208015,  0, 64 * 1024, 32, SECT_4K) },
        /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
-        { "w25x10", 0xef3011, 0, 64 * 1024, 2, SECT_4K, },
+        { "w25x10", INFO(0xef3011, 0, 64 * 1024,  2,  SECT_4K) },
-        { "w25x20", 0xef3012, 0, 64 * 1024, 4, SECT_4K, },
+        { "w25x20", INFO(0xef3012, 0, 64 * 1024,  4,  SECT_4K) },
-        { "w25x40", 0xef3013, 0, 64 * 1024, 8, SECT_4K, },
+        { "w25x40", INFO(0xef3013, 0, 64 * 1024,  8,  SECT_4K) },
-        { "w25x80", 0xef3014, 0, 64 * 1024, 16, SECT_4K, },
+        { "w25x80", INFO(0xef3014, 0, 64 * 1024,  16, SECT_4K) },
-        { "w25x16", 0xef3015, 0, 64 * 1024, 32, SECT_4K, },
+        { "w25x16", INFO(0xef3015, 0, 64 * 1024,  32, SECT_4K) },
-        { "w25x32", 0xef3016, 0, 64 * 1024, 64, SECT_4K, },
+        { "w25x32", INFO(0xef3016, 0, 64 * 1024,  64, SECT_4K) },
-        { "w25x64", 0xef3017, 0, 64 * 1024, 128, SECT_4K, },
+        { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) },
+        /* Catalyst / On Semiconductor -- non-JEDEC */
+        { "cat25c11", CAT25_INFO(  16, 8, 16, 1) },
+        { "cat25c03", CAT25_INFO(  32, 8, 16, 2) },
+        { "cat25c09", CAT25_INFO( 128, 8, 32, 2) },
+        { "cat25c17", CAT25_INFO( 256, 8, 32, 2) },
+        { "cat25128", CAT25_INFO(2048, 8, 64, 2) },
+        { },
 };
+MODULE_DEVICE_TABLE(spi, m25p_ids);
-static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
+static const struct spi_device_id *__devinit jedec_probe(struct spi_device *spi)
 {
        int                     tmp;
        u8                      code = OPCODE_RDID;
@@ -702,18 +730,24 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
        jedec = jedec << 8;
        jedec |= id[2];
+        /*
+         * Some chips (like Numonyx M25P80) have JEDEC and non-JEDEC variants,
+         * which depend on technology process. Officially RDID command doesn't
+         * exist for non-JEDEC chips, but for compatibility they return ID 0.
+         */
+        if (jedec == 0)
+                return NULL;
        ext_jedec = id[3] << 8 | id[4];
-        for (tmp = 0, info = m25p_data;
+        for (tmp = 0; tmp < ARRAY_SIZE(m25p_ids) - 1; tmp++) {
-                        tmp < ARRAY_SIZE(m25p_data);
+                info = (void *)m25p_ids[tmp].driver_data;
-                        tmp++, info++) {
                if (info->jedec_id == jedec) {
                        if (info->ext_id != 0 && info->ext_id != ext_jedec)
                                continue;
-                        return info;
+                        return &m25p_ids[tmp];
                }
        }
-        dev_err(&spi->dev, "unrecognized JEDEC id %06x\n", jedec);
        return NULL;
 }
@@ -725,6 +759,7 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
 */
 static int __devinit m25p_probe(struct spi_device *spi)
 {
+        const struct spi_device_id      *id = spi_get_device_id(spi);
        struct flash_platform_data      *data;
        struct m25p                     *flash;
        struct flash_info               *info;
@@ -737,50 +772,65 @@ static int __devinit m25p_probe(struct spi_device *spi)
         */
        data = spi->dev.platform_data;
        if (data && data->type) {
-                for (i = 0, info = m25p_data;
+                const struct spi_device_id *plat_id;
-                                i < ARRAY_SIZE(m25p_data);
-                                i++, info++) {
-                        if (strcmp(data->type, info->name) == 0)
-                                break;
-                }
-                /* unrecognized chip? */
+                for (i = 0; i < ARRAY_SIZE(m25p_ids) - 1; i++) {
-                if (i == ARRAY_SIZE(m25p_data)) {
+                        plat_id = &m25p_ids[i];
-                        DEBUG(MTD_DEBUG_LEVEL0, "%s: unrecognized id %s\n",
+                        if (strcmp(data->type, plat_id->name))
-                                        dev_name(&spi->dev), data->type);
+                                continue;
-                        info = NULL;
+                        break;
-                /* recognized; is that chip really what's there? */
-                } else if (info->jedec_id) {
-                        struct flash_info       *chip = jedec_probe(spi);
-                        if (!chip || chip != info) {
-                                dev_warn(&spi->dev, "found %s, expected %s\n",
-                                                chip ? chip->name : "UNKNOWN",
-                                                info->name);
-                                info = NULL;
-                        }
                }
-        } else
-                info = jedec_probe(spi);
-        if (!info)
+                if (plat_id)
-                return -ENODEV;
+                        id = plat_id;
+                else
+                        dev_warn(&spi->dev, "unrecognized id %s\n", data->type);
+        }
+        info = (void *)id->driver_data;
+        if (info->jedec_id) {
+                const struct spi_device_id *jid;
+                jid = jedec_probe(spi);
+                if (!jid) {
+                        dev_info(&spi->dev, "non-JEDEC variant of %s\n",
+                                 id->name);
+                } else if (jid != id) {
+                        /*
+                         * JEDEC knows better, so overwrite platform ID. We
+                         * can't trust partitions any longer, but we'll let
+                         * mtd apply them anyway, since some partitions may be
+                         * marked read-only, and we don't want to lose that
+                         * information, even if it's not 100% accurate.
+                         */
+                        dev_warn(&spi->dev, "found %s, expected %s\n",
+                                 jid->name, id->name);
+                        id = jid;
+                        info = (void *)jid->driver_data;
+                }
+        }
        flash = kzalloc(sizeof *flash, GFP_KERNEL);
        if (!flash)
                return -ENOMEM;
+        flash->command = kmalloc(MAX_CMD_SIZE + FAST_READ_DUMMY_BYTE, GFP_KERNEL);
+        if (!flash->command) {
+                kfree(flash);
+                return -ENOMEM;
+        }
        flash->spi = spi;
        mutex_init(&flash->lock);
        dev_set_drvdata(&spi->dev, flash);
        /*
-         * Atmel serial flash tend to power up
+         * Atmel and SST serial flash tend to power
-         * with the software protection bits set
+         * up with the software protection bits set
         */
-        if (info->jedec_id >> 16 == 0x1f) {
+        if (info->jedec_id >> 16 == 0x1f ||
+            info->jedec_id >> 16 == 0xbf) {
                write_enable(flash);
                write_sr(flash, 0);
        }
@@ -812,9 +862,14 @@ static int __devinit m25p_probe(struct spi_device *spi)
                flash->mtd.erasesize = info->sector_size;
        }
+        if (info->flags & M25P_NO_ERASE)
+                flash->mtd.flags |= MTD_NO_ERASE;
        flash->mtd.dev.parent = &spi->dev;
+        flash->page_size = info->page_size;
+        flash->addr_width = info->addr_width;
-        dev_info(&spi->dev, "%s (%lld Kbytes)\n", info->name,
+        dev_info(&spi->dev, "%s (%lld Kbytes)\n", id->name,
                        (long long)flash->mtd.size >> 10);
        DEBUG(MTD_DEBUG_LEVEL2,
@@ -888,8 +943,10 @@ static int __devexit m25p_remove(struct spi_device *spi)
                status = del_mtd_partitions(&flash->mtd);
        else
                status = del_mtd_device(&flash->mtd);
-        if (status == 0)
+        if (status == 0) {
+                kfree(flash->command);
                kfree(flash);
+        }
        return 0;
 }
@@ -900,6 +957,7 @@ static struct spi_driver m25p80_driver = {
                .bus    = &spi_bus_type,
                .owner  = THIS_MODULE,
        },
+        .id_table       = m25p_ids,
        .probe  = m25p_probe,
        .remove = __devexit_p(m25p_remove),
diff --git a/drivers/mtd/devices/mtd_dataflash.c b/drivers/mtd/devices/mtd_dataflash.c
index 93e3627be74c..19817404ce7d 100644
--- a/drivers/mtd/devices/mtd_dataflash.c
+++ b/drivers/mtd/devices/mtd_dataflash.c
@@ -636,6 +636,7 @@ add_dataflash_otp(struct spi_device *spi, char *name,
        struct mtd_info                 *device;
        struct flash_platform_data      *pdata = spi->dev.platform_data;
        char                            *otp_tag = "";
+        int                             err = 0;
        priv = kzalloc(sizeof *priv, GFP_KERNEL);
        if (!priv)
@@ -693,13 +694,23 @@ add_dataflash_otp(struct spi_device *spi, char *name,
                if (nr_parts > 0) {
                        priv->partitioned = 1;
-                        return add_mtd_partitions(device, parts, nr_parts);
+                        err = add_mtd_partitions(device, parts, nr_parts);
+                        goto out;
                }
        } else if (pdata && pdata->nr_parts)
                dev_warn(&spi->dev, "ignoring %d default partitions on %s\n",
                                pdata->nr_parts, device->name);
-        return add_mtd_device(device) == 1 ? -ENODEV : 0;
+        if (add_mtd_device(device) == 1)
+                err = -ENODEV;
+out:
+        if (!err)
+                return 0;
+        dev_set_drvdata(&spi->dev, NULL);
+        kfree(priv);
+        return err;
 }
 static inline int __devinit
@@ -932,8 +943,10 @@ static int __devexit dataflash_remove(struct spi_device *spi)
                status = del_mtd_partitions(&flash->mtd);
        else
                status = del_mtd_device(&flash->mtd);
-        if (status == 0)
+        if (status == 0) {
+                dev_set_drvdata(&spi->dev, NULL);
                kfree(flash);
+        }
        return status;
 }
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 847e214ade59..4c364d44ad59 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -359,12 +359,6 @@ config MTD_SA1100
          the SA1100 and SA1110, including the Assabet and the Compaq iPAQ.
          If you have such a board, say 'Y'.
-config MTD_IPAQ
-        tristate "CFI Flash device mapped on Compaq/HP iPAQ"
-        depends on IPAQ_HANDHELD && MTD_CFI
-        help
-          This provides a driver for the on-board flash of the iPAQ.
 config MTD_DC21285
        tristate "CFI Flash device mapped on DC21285 Footbridge"
        depends on MTD_CFI && ARCH_FOOTBRIDGE && MTD_COMPLEX_MAPPINGS
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile
index ae2f6dbe43c3..ce315214ff2b 100644
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -24,12 +24,12 @@ obj-$(CONFIG_MTD_CEIVA)		+= ceiva.o
 obj-$(CONFIG_MTD_OCTAGON)       += octagon-5066.o
 obj-$(CONFIG_MTD_PHYSMAP)       += physmap.o
 obj-$(CONFIG_MTD_PHYSMAP_OF)    += physmap_of.o
+obj-$(CONFIG_MTD_PISMO)         += pismo.o
 obj-$(CONFIG_MTD_PMC_MSP_EVM)   += pmcmsp-flash.o
 obj-$(CONFIG_MTD_PCMCIA)        += pcmciamtd.o
 obj-$(CONFIG_MTD_RPXLITE)       += rpxlite.o
 obj-$(CONFIG_MTD_TQM8XXL)       += tqm8xxl.o
 obj-$(CONFIG_MTD_SA1100)        += sa1100-flash.o
-obj-$(CONFIG_MTD_IPAQ)          += ipaq-flash.o
 obj-$(CONFIG_MTD_SBC_GXX)       += sbc_gxx.o
 obj-$(CONFIG_MTD_SC520CDP)      += sc520cdp.o
 obj-$(CONFIG_MTD_NETSC520)      += netsc520.o
diff --git a/drivers/mtd/maps/ipaq-flash.c b/drivers/mtd/maps/ipaq-flash.c
deleted file mode 100644
index 76708e796b70..000000000000
--- a/drivers/mtd/maps/ipaq-flash.c
+++ /dev/null
@@ -1,460 +0,0 @@
-/*
- * Flash memory access on iPAQ Handhelds (either SA1100 or PXA250 based)
- *
- * (C) 2000 Nicolas Pitre <nico@fluxnic.net>
- * (C) 2002 Hewlett-Packard Company <jamey.hicks@hp.com>
- * (C) 2003 Christian Pellegrin <chri@ascensit.com>, <chri@infis.univ.ts.it>: concatenation of multiple flashes
- */
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/spinlock.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <asm/page.h>
-#include <asm/mach-types.h>
-#include <asm/system.h>
-#include <asm/errno.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-#include <linux/mtd/partitions.h>
-#ifdef CONFIG_MTD_CONCAT
-#include <linux/mtd/concat.h>
-#endif
-#include <mach/hardware.h>
-#include <mach/h3600.h>
-#include <asm/io.h>
-#ifndef CONFIG_IPAQ_HANDHELD
-#error This is for iPAQ Handhelds only
-#endif
-#ifdef CONFIG_SA1100_JORNADA56X
-static void jornada56x_set_vpp(struct map_info *map, int vpp)
-{
-        if (vpp)
-                GPSR = GPIO_GPIO26;
-        else
-                GPCR = GPIO_GPIO26;
-        GPDR |= GPIO_GPIO26;
-}
-#endif
-#ifdef CONFIG_SA1100_JORNADA720
-static void jornada720_set_vpp(struct map_info *map, int vpp)
-{
-        if (vpp)
-                PPSR |= 0x80;
-        else
-                PPSR &= ~0x80;
-        PPDR |= 0x80;
-}
-#endif
-#define MAX_IPAQ_CS 2           /* Number of CS we are going to test */
-#define IPAQ_MAP_INIT(X) \
-        { \
-                name:           "IPAQ flash " X, \
-        }
-static struct map_info ipaq_map[MAX_IPAQ_CS] = {
-        IPAQ_MAP_INIT("bank 1"),
-        IPAQ_MAP_INIT("bank 2")
-};
-static struct mtd_info *my_sub_mtd[MAX_IPAQ_CS] = {
-        NULL,
-        NULL
-};
-/*
- * Here are partition information for all known IPAQ-based devices.
- * See include/linux/mtd/partitions.h for definition of the mtd_partition
- * structure.
- *
- * The *_max_flash_size is the maximum possible mapped flash size which
- * is not necessarily the actual flash size.  It must be no more than
- * the value specified in the "struct map_desc *_io_desc" mapping
- * definition for the corresponding machine.
- *
- * Please keep these in alphabetical order, and formatted as per existing
- * entries.  Thanks.
- */
-#ifdef CONFIG_IPAQ_HANDHELD
-static unsigned long h3xxx_max_flash_size = 0x04000000;
-static struct mtd_partition h3xxx_partitions[] = {
-        {
-                name:           "H3XXX boot firmware",
-#ifndef CONFIG_LAB
-                size:           0x00040000,
-#else
-                size:           0x00080000,
-#endif
-                offset:         0,
-#ifndef CONFIG_LAB
-                mask_flags:     MTD_WRITEABLE,  /* force read-only */
-#endif
-        },
-        {
-                name:           "H3XXX root jffs2",
-#ifndef CONFIG_LAB
-                size:           0x2000000 - 2*0x40000, /* Warning, this is fixed later */
-                offset:         0x00040000,
-#else
-                size:           0x2000000 - 0x40000 - 0x80000, /* Warning, this is fixed later */
-                offset:         0x00080000,
-#endif
-        },
-        {
-                name:           "asset",
-                size:           0x40000,
-                offset:         0x2000000 - 0x40000, /* Warning, this is fixed later */
-                mask_flags:     MTD_WRITEABLE,  /* force read-only */
-        }
-};
-#ifndef CONFIG_MTD_CONCAT
-static struct mtd_partition h3xxx_partitions_bank2[] = {
-        /* this is used only on 2 CS machines when concat is not present */
-        {
-                name:           "second H3XXX root jffs2",
-                size:           0x1000000 - 0x40000, /* Warning, this is fixed later */
-                offset:         0x00000000,
-        },
-        {
-                name:           "second asset",
-                size:           0x40000,
-                offset:         0x1000000 - 0x40000, /* Warning, this is fixed later */
-                mask_flags:     MTD_WRITEABLE,  /* force read-only */
-        }
-};
-#endif
-static DEFINE_SPINLOCK(ipaq_vpp_lock);
-static void h3xxx_set_vpp(struct map_info *map, int vpp)
-{
-        static int nest = 0;
-        spin_lock(&ipaq_vpp_lock);
-        if (vpp)
-                nest++;
-        else
-                nest--;
-        if (nest)
-                assign_h3600_egpio(IPAQ_EGPIO_VPP_ON, 1);
-        else
-                assign_h3600_egpio(IPAQ_EGPIO_VPP_ON, 0);
-        spin_unlock(&ipaq_vpp_lock);
-}
-#endif
-#if defined(CONFIG_SA1100_JORNADA56X) || defined(CONFIG_SA1100_JORNADA720)
-static unsigned long jornada_max_flash_size = 0x02000000;
-static struct mtd_partition jornada_partitions[] = {
-        {
-                name:           "Jornada boot firmware",
-                size:           0x00040000,
-                offset:         0,
-                mask_flags:     MTD_WRITEABLE,  /* force read-only */
-        }, {
-                name:           "Jornada root jffs2",
-                size:           MTDPART_SIZ_FULL,
-                offset:         0x00040000,
-        }
-};
-#endif
-static struct mtd_partition *parsed_parts;
-static struct mtd_info *mymtd;
-static unsigned long cs_phys[] = {
-#ifdef CONFIG_ARCH_SA1100
-        SA1100_CS0_PHYS,
-        SA1100_CS1_PHYS,
-        SA1100_CS2_PHYS,
-        SA1100_CS3_PHYS,
-        SA1100_CS4_PHYS,
-        SA1100_CS5_PHYS,
-#else
-        PXA_CS0_PHYS,
-        PXA_CS1_PHYS,
-        PXA_CS2_PHYS,
-        PXA_CS3_PHYS,
-        PXA_CS4_PHYS,
-        PXA_CS5_PHYS,
-#endif
-};
-static const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
-static int __init h1900_special_case(void);
-static int __init ipaq_mtd_init(void)
-{
-        struct mtd_partition *parts = NULL;
-        int nb_parts = 0;
-        int parsed_nr_parts = 0;
-        const char *part_type;
-        int i; /* used when we have >1 flash chips */
-        unsigned long tot_flashsize = 0; /* used when we have >1 flash chips */
-        /* Default flash bankwidth */
-        // ipaq_map.bankwidth = (MSC0 & MSC_RBW) ? 2 : 4;
-        if (machine_is_h1900())
-        {
-                /* For our intents, the h1900 is not a real iPAQ, so we special-case it. */
-                return h1900_special_case();
-        }
-        if (machine_is_h3100() || machine_is_h1900())
-                for(i=0; i<MAX_IPAQ_CS; i++)
-                        ipaq_map[i].bankwidth = 2;
-        else
-                for(i=0; i<MAX_IPAQ_CS; i++)
-                        ipaq_map[i].bankwidth = 4;
-        /*
-         * Static partition definition selection
-         */
-        part_type = "static";
-        simple_map_init(&ipaq_map[0]);
-        simple_map_init(&ipaq_map[1]);
-#ifdef CONFIG_IPAQ_HANDHELD
-        if (machine_is_ipaq()) {
-                parts = h3xxx_partitions;
-                nb_parts = ARRAY_SIZE(h3xxx_partitions);
-                for(i=0; i<MAX_IPAQ_CS; i++) {
-                        ipaq_map[i].size = h3xxx_max_flash_size;
-                        ipaq_map[i].set_vpp = h3xxx_set_vpp;
-                        ipaq_map[i].phys = cs_phys[i];
-                        ipaq_map[i].virt = ioremap(cs_phys[i], 0x04000000);
-                        if (machine_is_h3100 () || machine_is_h1900())
-                                ipaq_map[i].bankwidth = 2;
-                }
-                if (machine_is_h3600()) {
-                        /* No asset partition here */
-                        h3xxx_partitions[1].size += 0x40000;
-                        nb_parts--;
-                }
-        }
-#endif
-#ifdef CONFIG_ARCH_H5400
-        if (machine_is_h5400()) {
-                ipaq_map[0].size = 0x02000000;
-                ipaq_map[1].size = 0x02000000;
-                ipaq_map[1].phys = 0x02000000;
-                ipaq_map[1].virt = ipaq_map[0].virt + 0x02000000;
-        }
-#endif
-#ifdef CONFIG_ARCH_H1900
-        if (machine_is_h1900()) {
-                ipaq_map[0].size = 0x00400000;
-                ipaq_map[1].size = 0x02000000;
-                ipaq_map[1].phys = 0x00080000;
-                ipaq_map[1].virt = ipaq_map[0].virt + 0x00080000;
-        }
-#endif
-#ifdef CONFIG_SA1100_JORNADA56X
-        if (machine_is_jornada56x()) {
-                parts = jornada_partitions;
-                nb_parts = ARRAY_SIZE(jornada_partitions);
-                ipaq_map[0].size = jornada_max_flash_size;
-                ipaq_map[0].set_vpp = jornada56x_set_vpp;
-                ipaq_map[0].virt = (__u32)ioremap(0x0, 0x04000000);
-        }
-#endif
-#ifdef CONFIG_SA1100_JORNADA720
-        if (machine_is_jornada720()) {
-                parts = jornada_partitions;
-                nb_parts = ARRAY_SIZE(jornada_partitions);
-                ipaq_map[0].size = jornada_max_flash_size;
-                ipaq_map[0].set_vpp = jornada720_set_vpp;
-        }
-#endif
-        if (machine_is_ipaq()) { /* for iPAQs only */
-                for(i=0; i<MAX_IPAQ_CS; i++) {
-                        printk(KERN_NOTICE "iPAQ flash: probing %d-bit flash bus, window=%lx with CFI.\n", ipaq_map[i].bankwidth*8, ipaq_map[i].virt);
-                        my_sub_mtd[i] = do_map_probe("cfi_probe", &ipaq_map[i]);
-                        if (!my_sub_mtd[i]) {
-                                printk(KERN_NOTICE "iPAQ flash: probing %d-bit flash bus, window=%lx with JEDEC.\n", ipaq_map[i].bankwidth*8, ipaq_map[i].virt);
-                                my_sub_mtd[i] = do_map_probe("jedec_probe", &ipaq_map[i]);
-                        }
-                        if (!my_sub_mtd[i]) {
-                                printk(KERN_NOTICE "iPAQ flash: failed to find flash.\n");
-                                if (i)
-                                        break;
-                                else
-                                        return -ENXIO;
-                        } else
-                                printk(KERN_NOTICE "iPAQ flash: found %d bytes\n", my_sub_mtd[i]->size);
-                        /* do we really need this debugging? --joshua 20030703 */
-                        // printk("my_sub_mtd[%d]=%p\n", i, my_sub_mtd[i]);
-                        my_sub_mtd[i]->owner = THIS_MODULE;
-                        tot_flashsize += my_sub_mtd[i]->size;
-                }
-#ifdef CONFIG_MTD_CONCAT
-                /* fix the asset location */
-#       ifdef CONFIG_LAB
-                h3xxx_partitions[1].size = tot_flashsize - 0x40000 - 0x80000 /* extra big boot block */;
-#       else
-                h3xxx_partitions[1].size = tot_flashsize - 2 * 0x40000;
-#       endif
-                h3xxx_partitions[2].offset = tot_flashsize - 0x40000;
-                /* and concat the devices */
-                mymtd = mtd_concat_create(&my_sub_mtd[0], i,
-                                          "ipaq");
-                if (!mymtd) {
-                        printk("Cannot create iPAQ concat device\n");
-                        return -ENXIO;
-                }
-#else
-                mymtd = my_sub_mtd[0];
-                /*
-                 *In the very near future, command line partition parsing
-                 * will use the device name as 'mtd-id' instead of a value
-                 * passed to the parse_cmdline_partitions() routine. Since
-                 * the bootldr says 'ipaq', make sure it continues to work.
-                 */
-                mymtd->name = "ipaq";
-                if ((machine_is_h3600())) {
-#       ifdef CONFIG_LAB
-                        h3xxx_partitions[1].size = my_sub_mtd[0]->size - 0x80000;
-#       else
-                        h3xxx_partitions[1].size = my_sub_mtd[0]->size - 0x40000;
-#       endif
-                        nb_parts = 2;
-                } else {
-#       ifdef CONFIG_LAB
-                        h3xxx_partitions[1].size = my_sub_mtd[0]->size - 0x40000 - 0x80000; /* extra big boot block */
-#       else
-                        h3xxx_partitions[1].size = my_sub_mtd[0]->size - 2*0x40000;
-#       endif
-                        h3xxx_partitions[2].offset = my_sub_mtd[0]->size - 0x40000;
-                }
-                if (my_sub_mtd[1]) {
-#       ifdef CONFIG_LAB
-                        h3xxx_partitions_bank2[0].size = my_sub_mtd[1]->size - 0x80000;
-#       else
-                        h3xxx_partitions_bank2[0].size = my_sub_mtd[1]->size - 0x40000;
-#       endif
-                        h3xxx_partitions_bank2[1].offset = my_sub_mtd[1]->size - 0x40000;
-                }
-#endif
-        }
-        else {
-                /*
-                 * Now let's probe for the actual flash.  Do it here since
-                 * specific machine settings might have been set above.
-                 */
-                printk(KERN_NOTICE "IPAQ flash: probing %d-bit flash bus, window=%lx\n", ipaq_map[0].bankwidth*8, ipaq_map[0].virt);
-                mymtd = do_map_probe("cfi_probe", &ipaq_map[0]);
-                if (!mymtd)
-                        return -ENXIO;
-                mymtd->owner = THIS_MODULE;
-        }
-        /*
-         * Dynamic partition selection stuff (might override the static ones)
-         */
-         i = parse_mtd_partitions(mymtd, part_probes, &parsed_parts, 0);
-         if (i > 0) {
-                 nb_parts = parsed_nr_parts = i;
-                 parts = parsed_parts;
-                 part_type = "dynamic";
-         }
-         if (!parts) {
-                 printk(KERN_NOTICE "IPAQ flash: no partition info available, registering whole flash at once\n");
-                 add_mtd_device(mymtd);
-#ifndef CONFIG_MTD_CONCAT
-                 if (my_sub_mtd[1])
-                         add_mtd_device(my_sub_mtd[1]);
-#endif
-         } else {
-                 printk(KERN_NOTICE "Using %s partition definition\n", part_type);
-                 add_mtd_partitions(mymtd, parts, nb_parts);
-#ifndef CONFIG_MTD_CONCAT
-                 if (my_sub_mtd[1])
-                         add_mtd_partitions(my_sub_mtd[1], h3xxx_partitions_bank2, ARRAY_SIZE(h3xxx_partitions_bank2));
-#endif
-         }
-         return 0;
-}
-static void __exit ipaq_mtd_cleanup(void)
-{
-        int i;
-        if (mymtd) {
-                del_mtd_partitions(mymtd);
-#ifndef CONFIG_MTD_CONCAT
-                if (my_sub_mtd[1])
-                        del_mtd_partitions(my_sub_mtd[1]);
-#endif
-                map_destroy(mymtd);
-#ifdef CONFIG_MTD_CONCAT
-                for(i=0; i<MAX_IPAQ_CS; i++)
-#else
-                        for(i=1; i<MAX_IPAQ_CS; i++)
-#endif
-                        {
-                                if (my_sub_mtd[i])
-                                        map_destroy(my_sub_mtd[i]);
-                        }
-                kfree(parsed_parts);
-        }
-}
-static int __init h1900_special_case(void)
-{
-        /* The iPAQ h1900 is a special case - it has weird ROM. */
-        simple_map_init(&ipaq_map[0]);
-        ipaq_map[0].size = 0x80000;
-        ipaq_map[0].set_vpp = h3xxx_set_vpp;
-        ipaq_map[0].phys = 0x0;
-        ipaq_map[0].virt = ioremap(0x0, 0x04000000);
-        ipaq_map[0].bankwidth = 2;
-        printk(KERN_NOTICE "iPAQ flash: probing %d-bit flash bus, window=%lx with JEDEC.\n", ipaq_map[0].bankwidth*8, ipaq_map[0].virt);
-        mymtd = do_map_probe("jedec_probe", &ipaq_map[0]);
-        if (!mymtd)
-                return -ENODEV;
-        add_mtd_device(mymtd);
-        printk(KERN_NOTICE "iPAQ flash: registered h1910 flash\n");
-        return 0;
-}
-module_init(ipaq_mtd_init);
-module_exit(ipaq_mtd_cleanup);
-MODULE_AUTHOR("Jamey Hicks");
-MODULE_DESCRIPTION("IPAQ CFI map driver");
-MODULE_LICENSE("MIT");
diff --git a/drivers/mtd/maps/ixp4xx.c b/drivers/mtd/maps/ixp4xx.c
index 7214b876feba..7b0515297411 100644
--- a/drivers/mtd/maps/ixp4xx.c
+++ b/drivers/mtd/maps/ixp4xx.c
@@ -210,7 +210,7 @@ static int ixp4xx_flash_probe(struct platform_device *dev)
         * not attempt to do a direct access on us.
         */
        info->map.phys = NO_XIP;
-        info->map.size = dev->resource->end - dev->resource->start + 1;
+        info->map.size = resource_size(dev->resource);
        /*
         * We only support 16-bit accesses for now. If and when
@@ -224,7 +224,7 @@ static int ixp4xx_flash_probe(struct platform_device *dev)
        info->map.copy_from = ixp4xx_copy_from,
        info->res = request_mem_region(dev->resource->start,
-                        dev->resource->end - dev->resource->start + 1,
+                        resource_size(dev->resource),
                        "IXP4XXFlash");
        if (!info->res) {
                printk(KERN_ERR "IXP4XXFlash: Could not reserve memory region\n");
@@ -233,7 +233,7 @@ static int ixp4xx_flash_probe(struct platform_device *dev)
        }
        info->map.virt = ioremap(dev->resource->start,
-                                 dev->resource->end - dev->resource->start + 1);
+                                 resource_size(dev->resource));
        if (!info->map.virt) {
                printk(KERN_ERR "IXP4XXFlash: Failed to ioremap region\n");
                err = -EIO;
diff --git a/drivers/mtd/maps/physmap.c b/drivers/mtd/maps/physmap.c
index 380648e9051a..d9603f7f9652 100644
--- a/drivers/mtd/maps/physmap.c
+++ b/drivers/mtd/maps/physmap.c
@@ -48,23 +48,22 @@ static int physmap_flash_remove(struct platform_device *dev)
        if (info->cmtd) {
 #ifdef CONFIG_MTD_PARTITIONS
-                if (info->nr_parts || physmap_data->nr_parts)
+                if (info->nr_parts || physmap_data->nr_parts) {
                        del_mtd_partitions(info->cmtd);
-                else
+                        if (info->nr_parts)
+                                kfree(info->parts);
+                } else {
                        del_mtd_device(info->cmtd);
+                }
 #else
                del_mtd_device(info->cmtd);
 #endif
-        }
-#ifdef CONFIG_MTD_PARTITIONS
-        if (info->nr_parts)
-                kfree(info->parts);
-#endif
 #ifdef CONFIG_MTD_CONCAT
-        if (info->cmtd != info->mtd[0])
+                if (info->cmtd != info->mtd[0])
-                mtd_concat_destroy(info->cmtd);
+                        mtd_concat_destroy(info->cmtd);
 #endif
+        }
        for (i = 0; i < MAX_RESOURCES; i++) {
                if (info->mtd[i] != NULL)
@@ -130,7 +129,7 @@ static int physmap_flash_probe(struct platform_device *dev)
                                                 info->map[i].size);
                if (info->map[i].virt == NULL) {
                        dev_err(&dev->dev, "Failed to ioremap flash region\n");
-                        err = EIO;
+                        err = -EIO;
                        goto err_out;
                }
diff --git a/drivers/mtd/maps/sa1100-flash.c b/drivers/mtd/maps/sa1100-flash.c
index d7a47574d21e..f3af87e08ecd 100644
--- a/drivers/mtd/maps/sa1100-flash.c
+++ b/drivers/mtd/maps/sa1100-flash.c
@@ -248,7 +248,7 @@ static void sa1100_destroy(struct sa_info *info, struct flash_platform_data *pla
                plat->exit();
 }
-static struct sa_info *__init
+static struct sa_info *__devinit
 sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *plat)
 {
        struct sa_info *info;
diff --git a/drivers/mtd/maps/vmu-flash.c b/drivers/mtd/maps/vmu-flash.c
index 1f73297e7776..82afad0ddd72 100644
--- a/drivers/mtd/maps/vmu-flash.c
+++ b/drivers/mtd/maps/vmu-flash.c
@@ -612,16 +612,15 @@ static int __devinit vmu_connect(struct maple_device *mdev)
        test_flash_data = be32_to_cpu(mdev->devinfo.function);
        /* Need to count how many bits are set - to find out which
-         * function_data element has details of the memory card:
+         * function_data element has details of the memory card
-         * using Brian Kernighan's/Peter Wegner's method */
+         */
-        for (c = 0; test_flash_data; c++)
+        c = hweight_long(test_flash_data);
-                test_flash_data &= test_flash_data - 1;
        basic_flash_data = be32_to_cpu(mdev->devinfo.function_data[c - 1]);
        card = kmalloc(sizeof(struct memcard), GFP_KERNEL);
        if (!card) {
-                error = ENOMEM;
+                error = -ENOMEM;
                goto fail_nomem;
        }
diff --git a/drivers/mtd/mtd_blkdevs.c b/drivers/mtd/mtd_blkdevs.c
index 64e2b379a350..c82e09bbc5fd 100644
--- a/drivers/mtd/mtd_blkdevs.c
+++ b/drivers/mtd/mtd_blkdevs.c
@@ -84,9 +84,6 @@ static int mtd_blktrans_thread(void *arg)
        struct request_queue *rq = tr->blkcore_priv->rq;
        struct request *req = NULL;
-        /* we might get involved when memory gets low, so use PF_MEMALLOC */
-        current->flags |= PF_MEMALLOC;
        spin_lock_irq(rq->queue_lock);
        while (!kthread_should_stop()) {
@@ -381,7 +378,7 @@ int register_mtd_blktrans(struct mtd_blktrans_ops *tr)
        tr->blkcore_priv->thread = kthread_run(mtd_blktrans_thread, tr,
                        "%sd", tr->name);
        if (IS_ERR(tr->blkcore_priv->thread)) {
-                int ret = PTR_ERR(tr->blkcore_priv->thread);
+                ret = PTR_ERR(tr->blkcore_priv->thread);
                blk_cleanup_queue(tr->blkcore_priv->rq);
                unregister_blkdev(tr->major, tr->name);
                kfree(tr->blkcore_priv);
diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 467a4f177bfb..c356c0a30c3e 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -447,7 +447,7 @@ struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num)
                for (i=0; i< MAX_MTD_DEVICES; i++)
                        if (mtd_table[i] == mtd)
                                ret = mtd_table[i];
-        } else if (num < MAX_MTD_DEVICES) {
+        } else if (num >= 0 && num < MAX_MTD_DEVICES) {
                ret = mtd_table[num];
                if (mtd && mtd != ret)
                        ret = NULL;
diff --git a/drivers/mtd/mtdoops.c b/drivers/mtd/mtdoops.c
index 1060337c06df..a714ec482761 100644
--- a/drivers/mtd/mtdoops.c
+++ b/drivers/mtd/mtdoops.c
@@ -29,14 +29,34 @@
 #include <linux/sched.h>
 #include <linux/wait.h>
 #include <linux/delay.h>
-#include <linux/spinlock.h>
 #include <linux/interrupt.h>
 #include <linux/mtd/mtd.h>
+#include <linux/kmsg_dump.h>
+/* Maximum MTD partition size */
+#define MTDOOPS_MAX_MTD_SIZE (8 * 1024 * 1024)
 #define MTDOOPS_KERNMSG_MAGIC 0x5d005d00
-#define OOPS_PAGE_SIZE 4096
+#define MTDOOPS_HEADER_SIZE   8
+static unsigned long record_size = 4096;
+module_param(record_size, ulong, 0400);
+MODULE_PARM_DESC(record_size,
+                "record size for MTD OOPS pages in bytes (default 4096)");
+static char mtddev[80];
+module_param_string(mtddev, mtddev, 80, 0400);
+MODULE_PARM_DESC(mtddev,
+                "name or index number of the MTD device to use");
+static int dump_oops = 1;
+module_param(dump_oops, int, 0600);
+MODULE_PARM_DESC(dump_oops,
+                "set to 1 to dump oopses, 0 to only dump panics (default 1)");
 static struct mtdoops_context {
+        struct kmsg_dumper dump;
        int mtd_index;
        struct work_struct work_erase;
        struct work_struct work_write;
@@ -44,28 +64,43 @@ static struct mtdoops_context {
        int oops_pages;
        int nextpage;
        int nextcount;
-        char *name;
+        unsigned long *oops_page_used;
        void *oops_buf;
-        /* writecount and disabling ready are spin lock protected */
-        spinlock_t writecount_lock;
-        int ready;
-        int writecount;
 } oops_cxt;
+static void mark_page_used(struct mtdoops_context *cxt, int page)
+{
+        set_bit(page, cxt->oops_page_used);
+}
+static void mark_page_unused(struct mtdoops_context *cxt, int page)
+{
+        clear_bit(page, cxt->oops_page_used);
+}
+static int page_is_used(struct mtdoops_context *cxt, int page)
+{
+        return test_bit(page, cxt->oops_page_used);
+}
 static void mtdoops_erase_callback(struct erase_info *done)
 {
        wait_queue_head_t *wait_q = (wait_queue_head_t *)done->priv;
        wake_up(wait_q);
 }
-static int mtdoops_erase_block(struct mtd_info *mtd, int offset)
+static int mtdoops_erase_block(struct mtdoops_context *cxt, int offset)
 {
+        struct mtd_info *mtd = cxt->mtd;
+        u32 start_page_offset = mtd_div_by_eb(offset, mtd) * mtd->erasesize;
+        u32 start_page = start_page_offset / record_size;
+        u32 erase_pages = mtd->erasesize / record_size;
        struct erase_info erase;
        DECLARE_WAITQUEUE(wait, current);
        wait_queue_head_t wait_q;
        int ret;
+        int page;
        init_waitqueue_head(&wait_q);
        erase.mtd = mtd;
@@ -81,25 +116,24 @@ static int mtdoops_erase_block(struct mtd_info *mtd, int offset)
        if (ret) {
                set_current_state(TASK_RUNNING);
                remove_wait_queue(&wait_q, &wait);
-                printk (KERN_WARNING "mtdoops: erase of region [0x%llx, 0x%llx] "
+                printk(KERN_WARNING "mtdoops: erase of region [0x%llx, 0x%llx] on \"%s\" failed\n",
-                                     "on \"%s\" failed\n",
+                       (unsigned long long)erase.addr,
-                        (unsigned long long)erase.addr, (unsigned long long)erase.len, mtd->name);
+                       (unsigned long long)erase.len, mtddev);
                return ret;
        }
        schedule();  /* Wait for erase to finish. */
        remove_wait_queue(&wait_q, &wait);
+        /* Mark pages as unused */
+        for (page = start_page; page < start_page + erase_pages; page++)
+                mark_page_unused(cxt, page);
        return 0;
 }
 static void mtdoops_inc_counter(struct mtdoops_context *cxt)
 {
-        struct mtd_info *mtd = cxt->mtd;
-        size_t retlen;
-        u32 count;
-        int ret;
        cxt->nextpage++;
        if (cxt->nextpage >= cxt->oops_pages)
                cxt->nextpage = 0;
@@ -107,25 +141,13 @@ static void mtdoops_inc_counter(struct mtdoops_context *cxt)
        if (cxt->nextcount == 0xffffffff)
                cxt->nextcount = 0;
-        ret = mtd->read(mtd, cxt->nextpage * OOPS_PAGE_SIZE, 4,
+        if (page_is_used(cxt, cxt->nextpage)) {
-                        &retlen, (u_char *) &count);
-        if ((retlen != 4) || ((ret < 0) && (ret != -EUCLEAN))) {
-                printk(KERN_ERR "mtdoops: Read failure at %d (%td of 4 read)"
-                                ", err %d.\n", cxt->nextpage * OOPS_PAGE_SIZE,
-                                retlen, ret);
                schedule_work(&cxt->work_erase);
                return;
        }
-        /* See if we need to erase the next block */
+        printk(KERN_DEBUG "mtdoops: ready %d, %d (no erase)\n",
-        if (count != 0xffffffff) {
+               cxt->nextpage, cxt->nextcount);
-                schedule_work(&cxt->work_erase);
-                return;
-        }
-        printk(KERN_DEBUG "mtdoops: Ready %d, %d (no erase)\n",
-                        cxt->nextpage, cxt->nextcount);
-        cxt->ready = 1;
 }
 /* Scheduled work - when we can't proceed without erasing a block */
@@ -140,47 +162,47 @@ static void mtdoops_workfunc_erase(struct work_struct *work)
        if (!mtd)
                return;
-        mod = (cxt->nextpage * OOPS_PAGE_SIZE) % mtd->erasesize;
+        mod = (cxt->nextpage * record_size) % mtd->erasesize;
        if (mod != 0) {
-                cxt->nextpage = cxt->nextpage + ((mtd->erasesize - mod) / OOPS_PAGE_SIZE);
+                cxt->nextpage = cxt->nextpage + ((mtd->erasesize - mod) / record_size);
                if (cxt->nextpage >= cxt->oops_pages)
                        cxt->nextpage = 0;
        }
        while (mtd->block_isbad) {
-                ret = mtd->block_isbad(mtd, cxt->nextpage * OOPS_PAGE_SIZE);
+                ret = mtd->block_isbad(mtd, cxt->nextpage * record_size);
                if (!ret)
                        break;
                if (ret < 0) {
-                        printk(KERN_ERR "mtdoops: block_isbad failed, aborting.\n");
+                        printk(KERN_ERR "mtdoops: block_isbad failed, aborting\n");
                        return;
                }
 badblock:
-                printk(KERN_WARNING "mtdoops: Bad block at %08x\n",
+                printk(KERN_WARNING "mtdoops: bad block at %08lx\n",
-                                cxt->nextpage * OOPS_PAGE_SIZE);
+                       cxt->nextpage * record_size);
                i++;
-                cxt->nextpage = cxt->nextpage + (mtd->erasesize / OOPS_PAGE_SIZE);
+                cxt->nextpage = cxt->nextpage + (mtd->erasesize / record_size);
                if (cxt->nextpage >= cxt->oops_pages)
                        cxt->nextpage = 0;
-                if (i == (cxt->oops_pages / (mtd->erasesize / OOPS_PAGE_SIZE))) {
+                if (i == cxt->oops_pages / (mtd->erasesize / record_size)) {
-                        printk(KERN_ERR "mtdoops: All blocks bad!\n");
+                        printk(KERN_ERR "mtdoops: all blocks bad!\n");
                        return;
                }
        }
        for (j = 0, ret = -1; (j < 3) && (ret < 0); j++)
-                ret = mtdoops_erase_block(mtd, cxt->nextpage * OOPS_PAGE_SIZE);
+                ret = mtdoops_erase_block(cxt, cxt->nextpage * record_size);
        if (ret >= 0) {
-                printk(KERN_DEBUG "mtdoops: Ready %d, %d \n", cxt->nextpage, cxt->nextcount);
+                printk(KERN_DEBUG "mtdoops: ready %d, %d\n",
-                cxt->ready = 1;
+                       cxt->nextpage, cxt->nextcount);
                return;
        }
-        if (mtd->block_markbad && (ret == -EIO)) {
+        if (mtd->block_markbad && ret == -EIO) {
-                ret = mtd->block_markbad(mtd, cxt->nextpage * OOPS_PAGE_SIZE);
+                ret = mtd->block_markbad(mtd, cxt->nextpage * record_size);
                if (ret < 0) {
-                        printk(KERN_ERR "mtdoops: block_markbad failed, aborting.\n");
+                        printk(KERN_ERR "mtdoops: block_markbad failed, aborting\n");
                        return;
                }
        }
@@ -191,36 +213,37 @@ static void mtdoops_write(struct mtdoops_context *cxt, int panic)
 {
        struct mtd_info *mtd = cxt->mtd;
        size_t retlen;
+        u32 *hdr;
        int ret;
-        if (cxt->writecount < OOPS_PAGE_SIZE)
+        /* Add mtdoops header to the buffer */
-                memset(cxt->oops_buf + cxt->writecount, 0xff,
+        hdr = cxt->oops_buf;
-                                        OOPS_PAGE_SIZE - cxt->writecount);
+        hdr[0] = cxt->nextcount;
+        hdr[1] = MTDOOPS_KERNMSG_MAGIC;
        if (panic)
-                ret = mtd->panic_write(mtd, cxt->nextpage * OOPS_PAGE_SIZE,
+                ret = mtd->panic_write(mtd, cxt->nextpage * record_size,
-                                        OOPS_PAGE_SIZE, &retlen, cxt->oops_buf);
+                                        record_size, &retlen, cxt->oops_buf);
        else
-                ret = mtd->write(mtd, cxt->nextpage * OOPS_PAGE_SIZE,
+                ret = mtd->write(mtd, cxt->nextpage * record_size,
-                                        OOPS_PAGE_SIZE, &retlen, cxt->oops_buf);
+                                        record_size, &retlen, cxt->oops_buf);
-        cxt->writecount = 0;
-        if ((retlen != OOPS_PAGE_SIZE) || (ret < 0))
+        if (retlen != record_size || ret < 0)
-                printk(KERN_ERR "mtdoops: Write failure at %d (%td of %d written), err %d.\n",
+                printk(KERN_ERR "mtdoops: write failure at %ld (%td of %ld written), error %d\n",
-                        cxt->nextpage * OOPS_PAGE_SIZE, retlen, OOPS_PAGE_SIZE, ret);
+                       cxt->nextpage * record_size, retlen, record_size, ret);
+        mark_page_used(cxt, cxt->nextpage);
+        memset(cxt->oops_buf, 0xff, record_size);
        mtdoops_inc_counter(cxt);
 }
 static void mtdoops_workfunc_write(struct work_struct *work)
 {
        struct mtdoops_context *cxt =
                        container_of(work, struct mtdoops_context, work_write);
        mtdoops_write(cxt, 0);
-}                                       
+}
 static void find_next_position(struct mtdoops_context *cxt)
 {
@@ -230,28 +253,33 @@ static void find_next_position(struct mtdoops_context *cxt)
        size_t retlen;
        for (page = 0; page < cxt->oops_pages; page++) {
-                ret = mtd->read(mtd, page * OOPS_PAGE_SIZE, 8, &retlen, (u_char *) &count[0]);
+                /* Assume the page is used */
-                if ((retlen != 8) || ((ret < 0) && (ret != -EUCLEAN))) {
+                mark_page_used(cxt, page);
-                        printk(KERN_ERR "mtdoops: Read failure at %d (%td of 8 read)"
+                ret = mtd->read(mtd, page * record_size, MTDOOPS_HEADER_SIZE,
-                                ", err %d.\n", page * OOPS_PAGE_SIZE, retlen, ret);
+                                &retlen, (u_char *) &count[0]);
+                if (retlen != MTDOOPS_HEADER_SIZE ||
+                                (ret < 0 && ret != -EUCLEAN)) {
+                        printk(KERN_ERR "mtdoops: read failure at %ld (%td of %d read), err %d\n",
+                               page * record_size, retlen,
+                               MTDOOPS_HEADER_SIZE, ret);
                        continue;
                }
-                if (count[1] != MTDOOPS_KERNMSG_MAGIC)
+                if (count[0] == 0xffffffff && count[1] == 0xffffffff)
-                        continue;
+                        mark_page_unused(cxt, page);
                if (count[0] == 0xffffffff)
                        continue;
                if (maxcount == 0xffffffff) {
                        maxcount = count[0];
                        maxpos = page;
-                } else if ((count[0] < 0x40000000) && (maxcount > 0xc0000000)) {
+                } else if (count[0] < 0x40000000 && maxcount > 0xc0000000) {
                        maxcount = count[0];
                        maxpos = page;
-                } else if ((count[0] > maxcount) && (count[0] < 0xc0000000)) {
+                } else if (count[0] > maxcount && count[0] < 0xc0000000) {
                        maxcount = count[0];
                        maxpos = page;
-                } else if ((count[0] > maxcount) && (count[0] > 0xc0000000)
+                } else if (count[0] > maxcount && count[0] > 0xc0000000
-                                        && (maxcount > 0x80000000)) {
+                                        && maxcount > 0x80000000) {
                        maxcount = count[0];
                        maxpos = page;
                }
@@ -269,187 +297,170 @@ static void find_next_position(struct mtdoops_context *cxt)
        mtdoops_inc_counter(cxt);
 }
+static void mtdoops_do_dump(struct kmsg_dumper *dumper,
-static void mtdoops_notify_add(struct mtd_info *mtd)
+                enum kmsg_dump_reason reason, const char *s1, unsigned long l1,
+                const char *s2, unsigned long l2)
 {
-        struct mtdoops_context *cxt = &oops_cxt;
+        struct mtdoops_context *cxt = container_of(dumper,
+                        struct mtdoops_context, dump);
+        unsigned long s1_start, s2_start;
+        unsigned long l1_cpy, l2_cpy;
+        char *dst;
+        /* Only dump oopses if dump_oops is set */
+        if (reason == KMSG_DUMP_OOPS && !dump_oops)
+                return;
-        if (cxt->name && !strcmp(mtd->name, cxt->name))
+        dst = cxt->oops_buf + MTDOOPS_HEADER_SIZE; /* Skip the header */
-                cxt->mtd_index = mtd->index;
+        l2_cpy = min(l2, record_size - MTDOOPS_HEADER_SIZE);
+        l1_cpy = min(l1, record_size - MTDOOPS_HEADER_SIZE - l2_cpy);
-        if ((mtd->index != cxt->mtd_index) || cxt->mtd_index < 0)
+        s2_start = l2 - l2_cpy;
-                return;
+        s1_start = l1 - l1_cpy;
-        if (mtd->size < (mtd->erasesize * 2)) {
+        memcpy(dst, s1 + s1_start, l1_cpy);
-                printk(KERN_ERR "MTD partition %d not big enough for mtdoops\n",
+        memcpy(dst + l1_cpy, s2 + s2_start, l2_cpy);
-                                mtd->index);
-                return;
-        }
-        if (mtd->erasesize < OOPS_PAGE_SIZE) {
+        /* Panics must be written immediately */
-                printk(KERN_ERR "Eraseblock size of MTD partition %d too small\n",
+        if (reason == KMSG_DUMP_PANIC) {
-                                mtd->index);
+                if (!cxt->mtd->panic_write)
+                        printk(KERN_ERR "mtdoops: Cannot write from panic without panic_write\n");
+                else
+                        mtdoops_write(cxt, 1);
                return;
        }
-        cxt->mtd = mtd;
+        /* For other cases, schedule work to write it "nicely" */
-        if (mtd->size > INT_MAX)
+        schedule_work(&cxt->work_write);
-                cxt->oops_pages = INT_MAX / OOPS_PAGE_SIZE;
-        else
-                cxt->oops_pages = (int)mtd->size / OOPS_PAGE_SIZE;
-        find_next_position(cxt);
-        printk(KERN_INFO "mtdoops: Attached to MTD device %d\n", mtd->index);
 }
-static void mtdoops_notify_remove(struct mtd_info *mtd)
+static void mtdoops_notify_add(struct mtd_info *mtd)
 {
        struct mtdoops_context *cxt = &oops_cxt;
+        u64 mtdoops_pages = div_u64(mtd->size, record_size);
+        int err;
-        if ((mtd->index != cxt->mtd_index) || cxt->mtd_index < 0)
+        if (!strcmp(mtd->name, mtddev))
-                return;
+                cxt->mtd_index = mtd->index;
-        cxt->mtd = NULL;
-        flush_scheduled_work();
-}
-static void mtdoops_console_sync(void)
-{
-        struct mtdoops_context *cxt = &oops_cxt;
-        struct mtd_info *mtd = cxt->mtd;
-        unsigned long flags;
-        if (!cxt->ready || !mtd || cxt->writecount == 0)
+        if (mtd->index != cxt->mtd_index || cxt->mtd_index < 0)
                return;
-        /* 
+        if (mtd->size < mtd->erasesize * 2) {
-         *  Once ready is 0 and we've held the lock no further writes to the 
+                printk(KERN_ERR "mtdoops: MTD partition %d not big enough for mtdoops\n",
-         *  buffer will happen
+                       mtd->index);
-         */
-        spin_lock_irqsave(&cxt->writecount_lock, flags);
-        if (!cxt->ready) {
-                spin_unlock_irqrestore(&cxt->writecount_lock, flags);
                return;
        }
-        cxt->ready = 0;
+        if (mtd->erasesize < record_size) {
-        spin_unlock_irqrestore(&cxt->writecount_lock, flags);
+                printk(KERN_ERR "mtdoops: eraseblock size of MTD partition %d too small\n",
+                       mtd->index);
-        if (mtd->panic_write && in_interrupt())
-                /* Interrupt context, we're going to panic so try and log */
-                mtdoops_write(cxt, 1);
-        else
-                schedule_work(&cxt->work_write);
-}
-static void
-mtdoops_console_write(struct console *co, const char *s, unsigned int count)
-{
-        struct mtdoops_context *cxt = co->data;
-        struct mtd_info *mtd = cxt->mtd;
-        unsigned long flags;
-        if (!oops_in_progress) {
-                mtdoops_console_sync();
                return;
        }
+        if (mtd->size > MTDOOPS_MAX_MTD_SIZE) {
-        if (!cxt->ready || !mtd)
+                printk(KERN_ERR "mtdoops: mtd%d is too large (limit is %d MiB)\n",
+                       mtd->index, MTDOOPS_MAX_MTD_SIZE / 1024 / 1024);
                return;
+        }
-        /* Locking on writecount ensures sequential writes to the buffer */
+        /* oops_page_used is a bit field */
-        spin_lock_irqsave(&cxt->writecount_lock, flags);
+        cxt->oops_page_used = vmalloc(DIV_ROUND_UP(mtdoops_pages,
+                        BITS_PER_LONG));
-        /* Check ready status didn't change whilst waiting for the lock */
+        if (!cxt->oops_page_used) {
-        if (!cxt->ready) {
+                printk(KERN_ERR "mtdoops: could not allocate page array\n");
-                spin_unlock_irqrestore(&cxt->writecount_lock, flags);
                return;
        }
-        if (cxt->writecount == 0) {
+        cxt->dump.dump = mtdoops_do_dump;
-                u32 *stamp = cxt->oops_buf;
+        err = kmsg_dump_register(&cxt->dump);
-                *stamp++ = cxt->nextcount;
+        if (err) {
-                *stamp = MTDOOPS_KERNMSG_MAGIC;
+                printk(KERN_ERR "mtdoops: registering kmsg dumper failed, error %d\n", err);
-                cxt->writecount = 8;
+                vfree(cxt->oops_page_used);
+                cxt->oops_page_used = NULL;
+                return;
        }
-        if ((count + cxt->writecount) > OOPS_PAGE_SIZE)
+        cxt->mtd = mtd;
-                count = OOPS_PAGE_SIZE - cxt->writecount;
+        cxt->oops_pages = (int)mtd->size / record_size;
+        find_next_position(cxt);
-        memcpy(cxt->oops_buf + cxt->writecount, s, count);
+        printk(KERN_INFO "mtdoops: Attached to MTD device %d\n", mtd->index);
-        cxt->writecount += count;
-        spin_unlock_irqrestore(&cxt->writecount_lock, flags);
-        if (cxt->writecount == OOPS_PAGE_SIZE)
-                mtdoops_console_sync();
 }
-static int __init mtdoops_console_setup(struct console *co, char *options)
+static void mtdoops_notify_remove(struct mtd_info *mtd)
 {
-        struct mtdoops_context *cxt = co->data;
+        struct mtdoops_context *cxt = &oops_cxt;
-        if (cxt->mtd_index != -1 || cxt->name)
+        if (mtd->index != cxt->mtd_index || cxt->mtd_index < 0)
-                return -EBUSY;
+                return;
-        if (options) {
-                cxt->name = kstrdup(options, GFP_KERNEL);
-                return 0;
-        }
-        if (co->index == -1)
-                return -EINVAL;
-        cxt->mtd_index = co->index;
+        if (kmsg_dump_unregister(&cxt->dump) < 0)
-        return 0;
+                printk(KERN_WARNING "mtdoops: could not unregister kmsg_dumper\n");
+        cxt->mtd = NULL;
+        flush_scheduled_work();
 }
 static struct mtd_notifier mtdoops_notifier = {
        .add    = mtdoops_notify_add,
        .remove = mtdoops_notify_remove,
 };
-static struct console mtdoops_console = {
+static int __init mtdoops_init(void)
-        .name           = "ttyMTD",
-        .write          = mtdoops_console_write,
-        .setup          = mtdoops_console_setup,
-        .unblank        = mtdoops_console_sync,
-        .index          = -1,
-        .data           = &oops_cxt,
-};
-static int __init mtdoops_console_init(void)
 {
        struct mtdoops_context *cxt = &oops_cxt;
+        int mtd_index;
+        char *endp;
+        if (strlen(mtddev) == 0) {
+                printk(KERN_ERR "mtdoops: mtd device (mtddev=name/number) must be supplied\n");
+                return -EINVAL;
+        }
+        if ((record_size & 4095) != 0) {
+                printk(KERN_ERR "mtdoops: record_size must be a multiple of 4096\n");
+                return -EINVAL;
+        }
+        if (record_size < 4096) {
+                printk(KERN_ERR "mtdoops: record_size must be over 4096 bytes\n");
+                return -EINVAL;
+        }
+        /* Setup the MTD device to use */
        cxt->mtd_index = -1;
-        cxt->oops_buf = vmalloc(OOPS_PAGE_SIZE);
+        mtd_index = simple_strtoul(mtddev, &endp, 0);
-        spin_lock_init(&cxt->writecount_lock);
+        if (*endp == '\0')
+                cxt->mtd_index = mtd_index;
+        if (cxt->mtd_index > MAX_MTD_DEVICES) {
+                printk(KERN_ERR "mtdoops: invalid mtd device number (%u) given\n",
+                                mtd_index);
+                return -EINVAL;
+        }
+        cxt->oops_buf = vmalloc(record_size);
        if (!cxt->oops_buf) {
-                printk(KERN_ERR "Failed to allocate mtdoops buffer workspace\n");
+                printk(KERN_ERR "mtdoops: failed to allocate buffer workspace\n");
                return -ENOMEM;
        }
+        memset(cxt->oops_buf, 0xff, record_size);
        INIT_WORK(&cxt->work_erase, mtdoops_workfunc_erase);
        INIT_WORK(&cxt->work_write, mtdoops_workfunc_write);
-        register_console(&mtdoops_console);
        register_mtd_user(&mtdoops_notifier);
        return 0;
 }
-static void __exit mtdoops_console_exit(void)
+static void __exit mtdoops_exit(void)
 {
        struct mtdoops_context *cxt = &oops_cxt;
        unregister_mtd_user(&mtdoops_notifier);
-        unregister_console(&mtdoops_console);
-        kfree(cxt->name);
        vfree(cxt->oops_buf);
+        vfree(cxt->oops_page_used);
 }
-subsys_initcall(mtdoops_console_init);
+module_init(mtdoops_init);
-module_exit(mtdoops_console_exit);
+module_exit(mtdoops_exit);
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("Richard Purdie <rpurdie@openedhand.com>");
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 0e35e1aefd22..7678538344f4 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -201,6 +201,22 @@ config MTD_NAND_S3C2410_CLKSTOP
          when the is NAND chip selected or released, but will save
          approximately 5mA of power when there is nothing happening.
+config MTD_NAND_BCM_UMI
+        tristate "NAND Flash support for BCM Reference Boards"
+        depends on ARCH_BCMRING && MTD_NAND
+        help
+          This enables the NAND flash controller on the BCM UMI block.
+          No board specfic support is done by this driver, each board
+          must advertise a platform_device for the driver to attach.
+config MTD_NAND_BCM_UMI_HWCS
+        bool "BCM UMI NAND Hardware CS"
+        depends on MTD_NAND_BCM_UMI
+        help
+          Enable the use of the BCM UMI block's internal CS using NAND.
+          This should only be used if you know the external NAND CS can toggle.
 config MTD_NAND_DISKONCHIP
        tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation) (EXPERIMENTAL)"
        depends on EXPERIMENTAL
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 6950d3dabf10..460a1f39a8d1 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -42,5 +42,6 @@ obj-$(CONFIG_MTD_NAND_SOCRATES)		+= socrates_nand.o
 obj-$(CONFIG_MTD_NAND_TXX9NDFMC)        += txx9ndfmc.o
 obj-$(CONFIG_MTD_NAND_W90P910)          += w90p910_nand.o
 obj-$(CONFIG_MTD_NAND_NOMADIK)          += nomadik_nand.o
+obj-$(CONFIG_MTD_NAND_BCM_UMI)          += bcm_umi_nand.o nand_bcm_umi.o
 nand-objs := nand_base.o nand_bbt.o
diff --git a/drivers/mtd/nand/alauda.c b/drivers/mtd/nand/alauda.c
index 6d9649159a18..2d6773281fd9 100644
--- a/drivers/mtd/nand/alauda.c
+++ b/drivers/mtd/nand/alauda.c
@@ -372,15 +372,6 @@ static int alauda_read_oob(struct mtd_info *mtd, loff_t from, void *oob)
        return __alauda_read_page(mtd, from, ignore_buf, oob);
 }
-static int popcount8(u8 c)
-{
-        int ret = 0;
-        for ( ; c; c>>=1)
-                ret += c & 1;
-        return ret;
-}
 static int alauda_isbad(struct mtd_info *mtd, loff_t ofs)
 {
        u8 oob[16];
@@ -391,7 +382,7 @@ static int alauda_isbad(struct mtd_info *mtd, loff_t ofs)
                return err;
        /* A block is marked bad if two or more bits are zero */
-        return popcount8(oob[5]) >= 7 ? 0 : 1;
+        return hweight8(oob[5]) >= 7 ? 0 : 1;
 }
 static int alauda_bounce_read(struct mtd_info *mtd, loff_t from, size_t len,
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index f8e9975c86e5..524e6c9e0672 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -192,7 +192,6 @@ static int atmel_nand_calculate(struct mtd_info *mtd,
 {
        struct nand_chip *nand_chip = mtd->priv;
        struct atmel_nand_host *host = nand_chip->priv;
-        uint32_t *eccpos = nand_chip->ecc.layout->eccpos;
        unsigned int ecc_value;
        /* get the first 2 ECC bytes */
@@ -464,7 +463,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
        if (host->board->det_pin) {
                if (gpio_get_value(host->board->det_pin)) {
                        printk(KERN_INFO "No SmartMedia card inserted.\n");
-                        res = ENXIO;
+                        res = -ENXIO;
                        goto err_no_card;
                }
        }
@@ -535,7 +534,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
        if ((!partitions) || (num_partitions == 0)) {
                printk(KERN_ERR "atmel_nand: No partitions defined, or unsupported device.\n");
-                res = ENXIO;
+                res = -ENXIO;
                goto err_no_partitions;
        }
diff --git a/drivers/mtd/nand/bcm_umi_bch.c b/drivers/mtd/nand/bcm_umi_bch.c
new file mode 100644
index 000000000000..a930666d0687
--- /dev/null
+++ b/drivers/mtd/nand/bcm_umi_bch.c
@@ -0,0 +1,213 @@
+/*****************************************************************************
+* Copyright 2004 - 2009 Broadcom Corporation.  All rights reserved.
+*
+* Unless you and Broadcom execute a separate written software license
+* agreement governing use of this software, this software is licensed to you
+* under the terms of the GNU General Public License version 2, available at
+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
+*
+* Notwithstanding the above, under no circumstances may you combine this
+* software in any way with any other Broadcom software provided under a
+* license other than the GPL, without Broadcom's express prior written
+* consent.
+*****************************************************************************/
+/* ---- Include Files ---------------------------------------------------- */
+#include "nand_bcm_umi.h"
+/* ---- External Variable Declarations ----------------------------------- */
+/* ---- External Function Prototypes ------------------------------------- */
+/* ---- Public Variables ------------------------------------------------- */
+/* ---- Private Constants and Types -------------------------------------- */
+/* ---- Private Function Prototypes -------------------------------------- */
+static int bcm_umi_bch_read_page_hwecc(struct mtd_info *mtd,
+        struct nand_chip *chip, uint8_t *buf, int page);
+static void bcm_umi_bch_write_page_hwecc(struct mtd_info *mtd,
+        struct nand_chip *chip, const uint8_t *buf);
+/* ---- Private Variables ------------------------------------------------ */
+/*
+** nand_hw_eccoob
+** New oob placement block for use with hardware ecc generation.
+*/
+static struct nand_ecclayout nand_hw_eccoob_512 = {
+        /* Reserve 5 for BI indicator */
+        .oobfree = {
+#if (NAND_ECC_NUM_BYTES > 3)
+                    {.offset = 0, .length = 2}
+#else
+                    {.offset = 0, .length = 5},
+                    {.offset = 6, .length = 7}
+#endif
+                    }
+};
+/*
+** We treat the OOB for a 2K page as if it were 4 512 byte oobs,
+** except the BI is at byte 0.
+*/
+static struct nand_ecclayout nand_hw_eccoob_2048 = {
+        /* Reserve 0 as BI indicator */
+        .oobfree = {
+#if (NAND_ECC_NUM_BYTES > 10)
+                    {.offset = 1, .length = 2},
+#elif (NAND_ECC_NUM_BYTES > 7)
+                    {.offset = 1, .length = 5},
+                    {.offset = 16, .length = 6},
+                    {.offset = 32, .length = 6},
+                    {.offset = 48, .length = 6}
+#else
+                    {.offset = 1, .length = 8},
+                    {.offset = 16, .length = 9},
+                    {.offset = 32, .length = 9},
+                    {.offset = 48, .length = 9}
+#endif
+                    }
+};
+/* We treat the OOB for a 4K page as if it were 8 512 byte oobs,
+ * except the BI is at byte 0. */
+static struct nand_ecclayout nand_hw_eccoob_4096 = {
+        /* Reserve 0 as BI indicator */
+        .oobfree = {
+#if (NAND_ECC_NUM_BYTES > 10)
+                    {.offset = 1, .length = 2},
+                    {.offset = 16, .length = 3},
+                    {.offset = 32, .length = 3},
+                    {.offset = 48, .length = 3},
+                    {.offset = 64, .length = 3},
+                    {.offset = 80, .length = 3},
+                    {.offset = 96, .length = 3},
+                    {.offset = 112, .length = 3}
+#else
+                    {.offset = 1, .length = 5},
+                    {.offset = 16, .length = 6},
+                    {.offset = 32, .length = 6},
+                    {.offset = 48, .length = 6},
+                    {.offset = 64, .length = 6},
+                    {.offset = 80, .length = 6},
+                    {.offset = 96, .length = 6},
+                    {.offset = 112, .length = 6}
+#endif
+                    }
+};
+/* ---- Private Functions ------------------------------------------------ */
+/* ==== Public Functions ================================================= */
+/****************************************************************************
+*
+*  bcm_umi_bch_read_page_hwecc - hardware ecc based page read function
+*  @mtd:        mtd info structure
+*  @chip:       nand chip info structure
+*  @buf:        buffer to store read data
+*
+***************************************************************************/
+static int bcm_umi_bch_read_page_hwecc(struct mtd_info *mtd,
+                                       struct nand_chip *chip, uint8_t * buf,
+                                                 int page)
+{
+        int sectorIdx = 0;
+        int eccsize = chip->ecc.size;
+        int eccsteps = chip->ecc.steps;
+        uint8_t *datap = buf;
+        uint8_t eccCalc[NAND_ECC_NUM_BYTES];
+        int sectorOobSize = mtd->oobsize / eccsteps;
+        int stat;
+        for (sectorIdx = 0; sectorIdx < eccsteps;
+                        sectorIdx++, datap += eccsize) {
+                if (sectorIdx > 0) {
+                        /* Seek to page location within sector */
+                        chip->cmdfunc(mtd, NAND_CMD_RNDOUT, sectorIdx * eccsize,
+                                      -1);
+                }
+                /* Enable hardware ECC before reading the buf */
+                nand_bcm_umi_bch_enable_read_hwecc();
+                /* Read in data */
+                bcm_umi_nand_read_buf(mtd, datap, eccsize);
+                /* Pause hardware ECC after reading the buf */
+                nand_bcm_umi_bch_pause_read_ecc_calc();
+                /* Read the OOB ECC */
+                chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
+                              mtd->writesize + sectorIdx * sectorOobSize, -1);
+                nand_bcm_umi_bch_read_oobEcc(mtd->writesize, eccCalc,
+                                             NAND_ECC_NUM_BYTES,
+                                             chip->oob_poi +
+                                             sectorIdx * sectorOobSize);
+                /* Correct any ECC detected errors */
+                stat =
+                    nand_bcm_umi_bch_correct_page(datap, eccCalc,
+                                                  NAND_ECC_NUM_BYTES);
+                /* Update Stats */
+                if (stat < 0) {
+#if defined(NAND_BCM_UMI_DEBUG)
+                        printk(KERN_WARNING "%s uncorr_err sectorIdx=%d\n",
+                               __func__, sectorIdx);
+                        printk(KERN_WARNING
+                               "%s data %02x %02x %02x %02x "
+                                         "%02x %02x %02x %02x\n",
+                               __func__, datap[0], datap[1], datap[2], datap[3],
+                               datap[4], datap[5], datap[6], datap[7]);
+                        printk(KERN_WARNING
+                               "%s ecc  %02x %02x %02x %02x "
+                                         "%02x %02x %02x %02x %02x %02x "
+                                         "%02x %02x %02x\n",
+                               __func__, eccCalc[0], eccCalc[1], eccCalc[2],
+                               eccCalc[3], eccCalc[4], eccCalc[5], eccCalc[6],
+                               eccCalc[7], eccCalc[8], eccCalc[9], eccCalc[10],
+                               eccCalc[11], eccCalc[12]);
+                        BUG();
+#endif
+                        mtd->ecc_stats.failed++;
+                } else {
+#if defined(NAND_BCM_UMI_DEBUG)
+                        if (stat > 0) {
+                                printk(KERN_INFO
+                                       "%s %d correctable_errors detected\n",
+                                       __func__, stat);
+                        }
+#endif
+                        mtd->ecc_stats.corrected += stat;
+                }
+        }
+        return 0;
+}
+/****************************************************************************
+*
+*  bcm_umi_bch_write_page_hwecc - hardware ecc based page write function
+*  @mtd:        mtd info structure
+*  @chip:       nand chip info structure
+*  @buf:        data buffer
+*
+***************************************************************************/
+static void bcm_umi_bch_write_page_hwecc(struct mtd_info *mtd,
+        struct nand_chip *chip, const uint8_t *buf)
+{
+        int sectorIdx = 0;
+        int eccsize = chip->ecc.size;
+        int eccsteps = chip->ecc.steps;
+        const uint8_t *datap = buf;
+        uint8_t *oobp = chip->oob_poi;
+        int sectorOobSize = mtd->oobsize / eccsteps;
+        for (sectorIdx = 0; sectorIdx < eccsteps;
+             sectorIdx++, datap += eccsize, oobp += sectorOobSize) {
+                /* Enable hardware ECC before writing the buf */
+                nand_bcm_umi_bch_enable_write_hwecc();
+                bcm_umi_nand_write_buf(mtd, datap, eccsize);
+                nand_bcm_umi_bch_write_oobEcc(mtd->writesize, oobp,
+                                              NAND_ECC_NUM_BYTES);
+        }
+        bcm_umi_nand_write_buf(mtd, chip->oob_poi, mtd->oobsize);
+}
diff --git a/drivers/mtd/nand/bcm_umi_nand.c b/drivers/mtd/nand/bcm_umi_nand.c
new file mode 100644
index 000000000000..087bcd745bb7
--- /dev/null
+++ b/drivers/mtd/nand/bcm_umi_nand.c
@@ -0,0 +1,581 @@
+/*****************************************************************************
+* Copyright 2004 - 2009 Broadcom Corporation.  All rights reserved.
+*
+* Unless you and Broadcom execute a separate written software license
+* agreement governing use of this software, this software is licensed to you
+* under the terms of the GNU General Public License version 2, available at
+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
+*
+* Notwithstanding the above, under no circumstances may you combine this
+* software in any way with any other Broadcom software provided under a
+* license other than the GPL, without Broadcom's express prior written
+* consent.
+*****************************************************************************/
+/* ---- Include Files ---------------------------------------------------- */
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/ioport.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/nand_ecc.h>
+#include <linux/mtd/partitions.h>
+#include <asm/mach-types.h>
+#include <asm/system.h>
+#include <mach/reg_nand.h>
+#include <mach/reg_umi.h>
+#include "nand_bcm_umi.h"
+#include <mach/memory_settings.h>
+#define USE_DMA 1
+#include <mach/dma.h>
+#include <linux/dma-mapping.h>
+#include <linux/completion.h>
+/* ---- External Variable Declarations ----------------------------------- */
+/* ---- External Function Prototypes ------------------------------------- */
+/* ---- Public Variables ------------------------------------------------- */
+/* ---- Private Constants and Types -------------------------------------- */
+static const __devinitconst char gBanner[] = KERN_INFO \
+        "BCM UMI MTD NAND Driver: 1.00\n";
+#ifdef CONFIG_MTD_PARTITIONS
+const char *part_probes[] = { "cmdlinepart", NULL };
+#endif
+#if NAND_ECC_BCH
+static uint8_t scan_ff_pattern[] = { 0xff };
+static struct nand_bbt_descr largepage_bbt = {
+        .options = 0,
+        .offs = 0,
+        .len = 1,
+        .pattern = scan_ff_pattern
+};
+#endif
+/*
+** Preallocate a buffer to avoid having to do this every dma operation.
+** This is the size of the preallocated coherent DMA buffer.
+*/
+#if USE_DMA
+#define DMA_MIN_BUFLEN  512
+#define DMA_MAX_BUFLEN  PAGE_SIZE
+#define USE_DIRECT_IO(len)      (((len) < DMA_MIN_BUFLEN) || \
+        ((len) > DMA_MAX_BUFLEN))
+/*
+ * The current NAND data space goes from 0x80001900 to 0x80001FFF,
+ * which is only 0x700 = 1792 bytes long. This is too small for 2K, 4K page
+ * size NAND flash. Need to break the DMA down to multiple 1Ks.
+ *
+ * Need to make sure REG_NAND_DATA_PADDR + DMA_MAX_LEN < 0x80002000
+ */
+#define DMA_MAX_LEN             1024
+#else /* !USE_DMA */
+#define DMA_MIN_BUFLEN          0
+#define DMA_MAX_BUFLEN          0
+#define USE_DIRECT_IO(len)      1
+#endif
+/* ---- Private Function Prototypes -------------------------------------- */
+static void bcm_umi_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len);
+static void bcm_umi_nand_write_buf(struct mtd_info *mtd, const u_char * buf,
+                                   int len);
+/* ---- Private Variables ------------------------------------------------ */
+static struct mtd_info *board_mtd;
+static void __iomem *bcm_umi_io_base;
+static void *virtPtr;
+static dma_addr_t physPtr;
+static struct completion nand_comp;
+/* ---- Private Functions ------------------------------------------------ */
+#if NAND_ECC_BCH
+#include "bcm_umi_bch.c"
+#else
+#include "bcm_umi_hamming.c"
+#endif
+#if USE_DMA
+/* Handler called when the DMA finishes. */
+static void nand_dma_handler(DMA_Device_t dev, int reason, void *userData)
+{
+        complete(&nand_comp);
+}
+static int nand_dma_init(void)
+{
+        int rc;
+        rc = dma_set_device_handler(DMA_DEVICE_NAND_MEM_TO_MEM,
+                nand_dma_handler, NULL);
+        if (rc != 0) {
+                printk(KERN_ERR "dma_set_device_handler failed: %d\n", rc);
+                return rc;
+        }
+        virtPtr =
+            dma_alloc_coherent(NULL, DMA_MAX_BUFLEN, &physPtr, GFP_KERNEL);
+        if (virtPtr == NULL) {
+                printk(KERN_ERR "NAND - Failed to allocate memory for DMA buffer\n");
+                return -ENOMEM;
+        }
+        return 0;
+}
+static void nand_dma_term(void)
+{
+        if (virtPtr != NULL)
+                dma_free_coherent(NULL, DMA_MAX_BUFLEN, virtPtr, physPtr);
+}
+static void nand_dma_read(void *buf, int len)
+{
+        int offset = 0;
+        int tmp_len = 0;
+        int len_left = len;
+        DMA_Handle_t hndl;
+        if (virtPtr == NULL)
+                panic("nand_dma_read: virtPtr == NULL\n");
+        if ((void *)physPtr == NULL)
+                panic("nand_dma_read: physPtr == NULL\n");
+        hndl = dma_request_channel(DMA_DEVICE_NAND_MEM_TO_MEM);
+        if (hndl < 0) {
+                printk(KERN_ERR
+                       "nand_dma_read: unable to allocate dma channel: %d\n",
+                       (int)hndl);
+                panic("\n");
+        }
+        while (len_left > 0) {
+                if (len_left > DMA_MAX_LEN) {
+                        tmp_len = DMA_MAX_LEN;
+                        len_left -= DMA_MAX_LEN;
+                } else {
+                        tmp_len = len_left;
+                        len_left = 0;
+                }
+                init_completion(&nand_comp);
+                dma_transfer_mem_to_mem(hndl, REG_NAND_DATA_PADDR,
+                                        physPtr + offset, tmp_len);
+                wait_for_completion(&nand_comp);
+                offset += tmp_len;
+        }
+        dma_free_channel(hndl);
+        if (buf != NULL)
+                memcpy(buf, virtPtr, len);
+}
+static void nand_dma_write(const void *buf, int len)
+{
+        int offset = 0;
+        int tmp_len = 0;
+        int len_left = len;
+        DMA_Handle_t hndl;
+        if (buf == NULL)
+                panic("nand_dma_write: buf == NULL\n");
+        if (virtPtr == NULL)
+                panic("nand_dma_write: virtPtr == NULL\n");
+        if ((void *)physPtr == NULL)
+                panic("nand_dma_write: physPtr == NULL\n");
+        memcpy(virtPtr, buf, len);
+        hndl = dma_request_channel(DMA_DEVICE_NAND_MEM_TO_MEM);
+        if (hndl < 0) {
+                printk(KERN_ERR
+                       "nand_dma_write: unable to allocate dma channel: %d\n",
+                       (int)hndl);
+                panic("\n");
+        }
+        while (len_left > 0) {
+                if (len_left > DMA_MAX_LEN) {
+                        tmp_len = DMA_MAX_LEN;
+                        len_left -= DMA_MAX_LEN;
+                } else {
+                        tmp_len = len_left;
+                        len_left = 0;
+                }
+                init_completion(&nand_comp);
+                dma_transfer_mem_to_mem(hndl, physPtr + offset,
+                                        REG_NAND_DATA_PADDR, tmp_len);
+                wait_for_completion(&nand_comp);
+                offset += tmp_len;
+        }
+        dma_free_channel(hndl);
+}
+#endif
+static int nand_dev_ready(struct mtd_info *mtd)
+{
+        return nand_bcm_umi_dev_ready();
+}
+/****************************************************************************
+*
+*  bcm_umi_nand_inithw
+*
+*   This routine does the necessary hardware (board-specific)
+*   initializations.  This includes setting up the timings, etc.
+*
+***************************************************************************/
+int bcm_umi_nand_inithw(void)
+{
+        /* Configure nand timing parameters */
+        REG_UMI_NAND_TCR &= ~0x7ffff;
+        REG_UMI_NAND_TCR |= HW_CFG_NAND_TCR;
+#if !defined(CONFIG_MTD_NAND_BCM_UMI_HWCS)
+        /* enable software control of CS */
+        REG_UMI_NAND_TCR |= REG_UMI_NAND_TCR_CS_SWCTRL;
+#endif
+        /* keep NAND chip select asserted */
+        REG_UMI_NAND_RCSR |= REG_UMI_NAND_RCSR_CS_ASSERTED;
+        REG_UMI_NAND_TCR &= ~REG_UMI_NAND_TCR_WORD16;
+        /* enable writes to flash */
+        REG_UMI_MMD_ICR |= REG_UMI_MMD_ICR_FLASH_WP;
+        writel(NAND_CMD_RESET, bcm_umi_io_base + REG_NAND_CMD_OFFSET);
+        nand_bcm_umi_wait_till_ready();
+#if NAND_ECC_BCH
+        nand_bcm_umi_bch_config_ecc(NAND_ECC_NUM_BYTES);
+#endif
+        return 0;
+}
+/* Used to turn latch the proper register for access. */
+static void bcm_umi_nand_hwcontrol(struct mtd_info *mtd, int cmd,
+                                   unsigned int ctrl)
+{
+        /* send command to hardware */
+        struct nand_chip *chip = mtd->priv;
+        if (ctrl & NAND_CTRL_CHANGE) {
+                if (ctrl & NAND_CLE) {
+                        chip->IO_ADDR_W = bcm_umi_io_base + REG_NAND_CMD_OFFSET;
+                        goto CMD;
+                }
+                if (ctrl & NAND_ALE) {
+                        chip->IO_ADDR_W =
+                            bcm_umi_io_base + REG_NAND_ADDR_OFFSET;
+                        goto CMD;
+                }
+                chip->IO_ADDR_W = bcm_umi_io_base + REG_NAND_DATA8_OFFSET;
+        }
+CMD:
+        /* Send command to chip directly */
+        if (cmd != NAND_CMD_NONE)
+                writeb(cmd, chip->IO_ADDR_W);
+}
+static void bcm_umi_nand_write_buf(struct mtd_info *mtd, const u_char * buf,
+                                   int len)
+{
+        if (USE_DIRECT_IO(len)) {
+                /* Do it the old way if the buffer is small or too large.
+                 * Probably quicker than starting and checking dma. */
+                int i;
+                struct nand_chip *this = mtd->priv;
+                for (i = 0; i < len; i++)
+                        writeb(buf[i], this->IO_ADDR_W);
+        }
+#if USE_DMA
+        else
+                nand_dma_write(buf, len);
+#endif
+}
+static void bcm_umi_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len)
+{
+        if (USE_DIRECT_IO(len)) {
+                int i;
+                struct nand_chip *this = mtd->priv;
+                for (i = 0; i < len; i++)
+                        buf[i] = readb(this->IO_ADDR_R);
+        }
+#if USE_DMA
+        else
+                nand_dma_read(buf, len);
+#endif
+}
+static uint8_t readbackbuf[NAND_MAX_PAGESIZE];
+static int bcm_umi_nand_verify_buf(struct mtd_info *mtd, const u_char * buf,
+                                   int len)
+{
+        /*
+         * Try to readback page with ECC correction. This is necessary
+         * for MLC parts which may have permanently stuck bits.
+         */
+        struct nand_chip *chip = mtd->priv;
+        int ret = chip->ecc.read_page(mtd, chip, readbackbuf, 0);
+        if (ret < 0)
+                return -EFAULT;
+        else {
+                if (memcmp(readbackbuf, buf, len) == 0)
+                        return 0;
+                return -EFAULT;
+        }
+        return 0;
+}
+static int __devinit bcm_umi_nand_probe(struct platform_device *pdev)
+{
+        struct nand_chip *this;
+        struct resource *r;
+        int err = 0;
+        printk(gBanner);
+        /* Allocate memory for MTD device structure and private data */
+        board_mtd =
+            kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip),
+                    GFP_KERNEL);
+        if (!board_mtd) {
+                printk(KERN_WARNING
+                       "Unable to allocate NAND MTD device structure.\n");
+                return -ENOMEM;
+        }
+        r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!r)
+                return -ENXIO;
+        /* map physical adress */
+        bcm_umi_io_base = ioremap(r->start, r->end - r->start + 1);
+        if (!bcm_umi_io_base) {
+                printk(KERN_ERR "ioremap to access BCM UMI NAND chip failed\n");
+                kfree(board_mtd);
+                return -EIO;
+        }
+        /* Get pointer to private data */
+        this = (struct nand_chip *)(&board_mtd[1]);
+        /* Initialize structures */
+        memset((char *)board_mtd, 0, sizeof(struct mtd_info));
+        memset((char *)this, 0, sizeof(struct nand_chip));
+        /* Link the private data with the MTD structure */
+        board_mtd->priv = this;
+        /* Initialize the NAND hardware.  */
+        if (bcm_umi_nand_inithw() < 0) {
+                printk(KERN_ERR "BCM UMI NAND chip could not be initialized\n");
+                iounmap(bcm_umi_io_base);
+                kfree(board_mtd);
+                return -EIO;
+        }
+        /* Set address of NAND IO lines */
+        this->IO_ADDR_W = bcm_umi_io_base + REG_NAND_DATA8_OFFSET;
+        this->IO_ADDR_R = bcm_umi_io_base + REG_NAND_DATA8_OFFSET;
+        /* Set command delay time, see datasheet for correct value */
+        this->chip_delay = 0;
+        /* Assign the device ready function, if available */
+        this->dev_ready = nand_dev_ready;
+        this->options = 0;
+        this->write_buf = bcm_umi_nand_write_buf;
+        this->read_buf = bcm_umi_nand_read_buf;
+        this->verify_buf = bcm_umi_nand_verify_buf;
+        this->cmd_ctrl = bcm_umi_nand_hwcontrol;
+        this->ecc.mode = NAND_ECC_HW;
+        this->ecc.size = 512;
+        this->ecc.bytes = NAND_ECC_NUM_BYTES;
+#if NAND_ECC_BCH
+        this->ecc.read_page = bcm_umi_bch_read_page_hwecc;
+        this->ecc.write_page = bcm_umi_bch_write_page_hwecc;
+#else
+        this->ecc.correct = nand_correct_data512;
+        this->ecc.calculate = bcm_umi_hamming_get_hw_ecc;
+        this->ecc.hwctl = bcm_umi_hamming_enable_hwecc;
+#endif
+#if USE_DMA
+        err = nand_dma_init();
+        if (err != 0)
+                return err;
+#endif
+        /* Figure out the size of the device that we have.
+         * We need to do this to figure out which ECC
+         * layout we'll be using.
+         */
+        err = nand_scan_ident(board_mtd, 1);
+        if (err) {
+                printk(KERN_ERR "nand_scan failed: %d\n", err);
+                iounmap(bcm_umi_io_base);
+                kfree(board_mtd);
+                return err;
+        }
+        /* Now that we know the nand size, we can setup the ECC layout */
+        switch (board_mtd->writesize) { /* writesize is the pagesize */
+        case 4096:
+                this->ecc.layout = &nand_hw_eccoob_4096;
+                break;
+        case 2048:
+                this->ecc.layout = &nand_hw_eccoob_2048;
+                break;
+        case 512:
+                this->ecc.layout = &nand_hw_eccoob_512;
+                break;
+        default:
+                {
+                        printk(KERN_ERR "NAND - Unrecognized pagesize: %d\n",
+                                         board_mtd->writesize);
+                        return -EINVAL;
+                }
+        }
+#if NAND_ECC_BCH
+        if (board_mtd->writesize > 512) {
+                if (this->options & NAND_USE_FLASH_BBT)
+                        largepage_bbt.options = NAND_BBT_SCAN2NDPAGE;
+                this->badblock_pattern = &largepage_bbt;
+        }
+#endif
+        /* Now finish off the scan, now that ecc.layout has been initialized. */
+        err = nand_scan_tail(board_mtd);
+        if (err) {
+                printk(KERN_ERR "nand_scan failed: %d\n", err);
+                iounmap(bcm_umi_io_base);
+                kfree(board_mtd);
+                return err;
+        }
+        /* Register the partitions */
+        {
+                int nr_partitions;
+                struct mtd_partition *partition_info;
+                board_mtd->name = "bcm_umi-nand";
+                nr_partitions =
+                    parse_mtd_partitions(board_mtd, part_probes,
+                                         &partition_info, 0);
+                if (nr_partitions <= 0) {
+                        printk(KERN_ERR "BCM UMI NAND: Too few partitions - %d\n",
+                               nr_partitions);
+                        iounmap(bcm_umi_io_base);
+                        kfree(board_mtd);
+                        return -EIO;
+                }
+                add_mtd_partitions(board_mtd, partition_info, nr_partitions);
+        }
+        /* Return happy */
+        return 0;
+}
+static int bcm_umi_nand_remove(struct platform_device *pdev)
+{
+#if USE_DMA
+        nand_dma_term();
+#endif
+        /* Release resources, unregister device */
+        nand_release(board_mtd);
+        /* unmap physical adress */
+        iounmap(bcm_umi_io_base);
+        /* Free the MTD device structure */
+        kfree(board_mtd);
+        return 0;
+}
+#ifdef CONFIG_PM
+static int bcm_umi_nand_suspend(struct platform_device *pdev,
+                                pm_message_t state)
+{
+        printk(KERN_ERR "MTD NAND suspend is being called\n");
+        return 0;
+}
+static int bcm_umi_nand_resume(struct platform_device *pdev)
+{
+        printk(KERN_ERR "MTD NAND resume is being called\n");
+        return 0;
+}
+#else
+#define bcm_umi_nand_suspend   NULL
+#define bcm_umi_nand_resume    NULL
+#endif
+static struct platform_driver nand_driver = {
+        .driver = {
+                   .name = "bcm-nand",
+                   .owner = THIS_MODULE,
+                   },
+        .probe = bcm_umi_nand_probe,
+        .remove = bcm_umi_nand_remove,
+        .suspend = bcm_umi_nand_suspend,
+        .resume = bcm_umi_nand_resume,
+};
+static int __init nand_init(void)
+{
+        return platform_driver_register(&nand_driver);
+}
+static void __exit nand_exit(void)
+{
+        platform_driver_unregister(&nand_driver);
+}
+module_init(nand_init);
+module_exit(nand_exit);
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("BCM UMI MTD NAND driver");
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index f13f5b9afaf7..fe3eba87de40 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -591,6 +591,8 @@ static int __init nand_davinci_probe(struct platform_device *pdev)
        /* options such as NAND_USE_FLASH_BBT or 16-bit widths */
        info->chip.options      = pdata->options;
+        info->chip.bbt_td       = pdata->bbt_td;
+        info->chip.bbt_md       = pdata->bbt_md;
        info->ioaddr            = (uint32_t __force) vaddr;
@@ -599,7 +601,7 @@ static int __init nand_davinci_probe(struct platform_device *pdev)
        info->mask_chipsel      = pdata->mask_chipsel;
        /* use nandboot-capable ALE/CLE masks by default */
-        info->mask_ale          = pdata->mask_cle ? : MASK_ALE;
+        info->mask_ale          = pdata->mask_ale ? : MASK_ALE;
        info->mask_cle          = pdata->mask_cle ? : MASK_CLE;
        /* Set address of hardware control function */
diff --git a/drivers/mtd/nand/excite_nandflash.c b/drivers/mtd/nand/excite_nandflash.c
index 72446fb48d4b..af6a6a5399e1 100644
--- a/drivers/mtd/nand/excite_nandflash.c
+++ b/drivers/mtd/nand/excite_nandflash.c
@@ -128,7 +128,7 @@ static int excite_nand_devready(struct mtd_info *mtd)
 * The binding to the mtd and all allocated
 * resources are released.
 */
-static int __exit excite_nand_remove(struct platform_device *dev)
+static int __devexit excite_nand_remove(struct platform_device *dev)
 {
        struct excite_nand_drvdata * const this = platform_get_drvdata(dev);
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index ddd37d2554ed..ae30fb6eed97 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -237,12 +237,15 @@ static int fsl_elbc_run_command(struct mtd_info *mtd)
        ctrl->use_mdr = 0;
-        dev_vdbg(ctrl->dev,
+        if (ctrl->status != LTESR_CC) {
-                 "fsl_elbc_run_command: stat=%08x mdr=%08x fmr=%08x\n",
+                dev_info(ctrl->dev,
-                 ctrl->status, ctrl->mdr, in_be32(&lbc->fmr));
+                         "command failed: fir %x fcr %x status %x mdr %x\n",
+                         in_be32(&lbc->fir), in_be32(&lbc->fcr),
+                         ctrl->status, ctrl->mdr);
+                return -EIO;
+        }
-        /* returns 0 on success otherwise non-zero) */
+        return 0;
-        return ctrl->status == LTESR_CC ? 0 : -EIO;
 }
 static void fsl_elbc_do_read(struct nand_chip *chip, int oob)
@@ -253,17 +256,17 @@ static void fsl_elbc_do_read(struct nand_chip *chip, int oob)
        if (priv->page_size) {
                out_be32(&lbc->fir,
-                         (FIR_OP_CW0 << FIR_OP0_SHIFT) |
+                         (FIR_OP_CM0 << FIR_OP0_SHIFT) |
                         (FIR_OP_CA  << FIR_OP1_SHIFT) |
                         (FIR_OP_PA  << FIR_OP2_SHIFT) |
-                         (FIR_OP_CW1 << FIR_OP3_SHIFT) |
+                         (FIR_OP_CM1 << FIR_OP3_SHIFT) |
                         (FIR_OP_RBW << FIR_OP4_SHIFT));
                out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
                                    (NAND_CMD_READSTART << FCR_CMD1_SHIFT));
        } else {
                out_be32(&lbc->fir,
-                         (FIR_OP_CW0 << FIR_OP0_SHIFT) |
+                         (FIR_OP_CM0 << FIR_OP0_SHIFT) |
                         (FIR_OP_CA  << FIR_OP1_SHIFT) |
                         (FIR_OP_PA  << FIR_OP2_SHIFT) |
                         (FIR_OP_RBW << FIR_OP3_SHIFT));
@@ -332,7 +335,7 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command,
        case NAND_CMD_READID:
                dev_vdbg(ctrl->dev, "fsl_elbc_cmdfunc: NAND_CMD_READID.\n");
-                out_be32(&lbc->fir, (FIR_OP_CW0 << FIR_OP0_SHIFT) |
+                out_be32(&lbc->fir, (FIR_OP_CM0 << FIR_OP0_SHIFT) |
                                    (FIR_OP_UA  << FIR_OP1_SHIFT) |
                                    (FIR_OP_RBW << FIR_OP2_SHIFT));
                out_be32(&lbc->fcr, NAND_CMD_READID << FCR_CMD0_SHIFT);
@@ -359,16 +362,20 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command,
                dev_vdbg(ctrl->dev, "fsl_elbc_cmdfunc: NAND_CMD_ERASE2.\n");
                out_be32(&lbc->fir,
-                         (FIR_OP_CW0 << FIR_OP0_SHIFT) |
+                         (FIR_OP_CM0 << FIR_OP0_SHIFT) |
                         (FIR_OP_PA  << FIR_OP1_SHIFT) |
-                         (FIR_OP_CM1 << FIR_OP2_SHIFT));
+                         (FIR_OP_CM2 << FIR_OP2_SHIFT) |
+                         (FIR_OP_CW1 << FIR_OP3_SHIFT) |
+                         (FIR_OP_RS  << FIR_OP4_SHIFT));
                out_be32(&lbc->fcr,
                         (NAND_CMD_ERASE1 << FCR_CMD0_SHIFT) |
-                         (NAND_CMD_ERASE2 << FCR_CMD1_SHIFT));
+                         (NAND_CMD_STATUS << FCR_CMD1_SHIFT) |
+                         (NAND_CMD_ERASE2 << FCR_CMD2_SHIFT));
                out_be32(&lbc->fbcr, 0);
                ctrl->read_bytes = 0;
+                ctrl->use_mdr = 1;
                fsl_elbc_run_command(mtd);
                return;
@@ -383,40 +390,41 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command,
                ctrl->column = column;
                ctrl->oob = 0;
+                ctrl->use_mdr = 1;
-                if (priv->page_size) {
+                fcr = (NAND_CMD_STATUS   << FCR_CMD1_SHIFT) |
-                        fcr = (NAND_CMD_SEQIN << FCR_CMD0_SHIFT) |
+                      (NAND_CMD_SEQIN    << FCR_CMD2_SHIFT) |
-                              (NAND_CMD_PAGEPROG << FCR_CMD1_SHIFT);
+                      (NAND_CMD_PAGEPROG << FCR_CMD3_SHIFT);
+                if (priv->page_size) {
                        out_be32(&lbc->fir,
-                                 (FIR_OP_CW0 << FIR_OP0_SHIFT) |
+                                 (FIR_OP_CM2 << FIR_OP0_SHIFT) |
                                 (FIR_OP_CA  << FIR_OP1_SHIFT) |
                                 (FIR_OP_PA  << FIR_OP2_SHIFT) |
                                 (FIR_OP_WB  << FIR_OP3_SHIFT) |
-                                 (FIR_OP_CW1 << FIR_OP4_SHIFT));
+                                 (FIR_OP_CM3 << FIR_OP4_SHIFT) |
+                                 (FIR_OP_CW1 << FIR_OP5_SHIFT) |
+                                 (FIR_OP_RS  << FIR_OP6_SHIFT));
                } else {
-                        fcr = (NAND_CMD_PAGEPROG << FCR_CMD1_SHIFT) |
-                              (NAND_CMD_SEQIN << FCR_CMD2_SHIFT);
                        out_be32(&lbc->fir,
-                                 (FIR_OP_CW0 << FIR_OP0_SHIFT) |
+                                 (FIR_OP_CM0 << FIR_OP0_SHIFT) |
                                 (FIR_OP_CM2 << FIR_OP1_SHIFT) |
                                 (FIR_OP_CA  << FIR_OP2_SHIFT) |
                                 (FIR_OP_PA  << FIR_OP3_SHIFT) |
                                 (FIR_OP_WB  << FIR_OP4_SHIFT) |
-                                 (FIR_OP_CW1 << FIR_OP5_SHIFT));
+                                 (FIR_OP_CM3 << FIR_OP5_SHIFT) |
+                                 (FIR_OP_CW1 << FIR_OP6_SHIFT) |
+                                 (FIR_OP_RS  << FIR_OP7_SHIFT));
                        if (column >= mtd->writesize) {
                                /* OOB area --> READOOB */
                                column -= mtd->writesize;
                                fcr |= NAND_CMD_READOOB << FCR_CMD0_SHIFT;
                                ctrl->oob = 1;
-                        } else if (column < 256) {
+                        } else {
+                                WARN_ON(column != 0);
                                /* First 256 bytes --> READ0 */
                                fcr |= NAND_CMD_READ0 << FCR_CMD0_SHIFT;
-                        } else {
-                                /* Second 256 bytes --> READ1 */
-                                fcr |= NAND_CMD_READ1 << FCR_CMD0_SHIFT;
                        }
                }
@@ -628,22 +636,6 @@ static int fsl_elbc_wait(struct mtd_info *mtd, struct nand_chip *chip)
 {
        struct fsl_elbc_mtd *priv = chip->priv;
        struct fsl_elbc_ctrl *ctrl = priv->ctrl;
-        struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
-        if (ctrl->status != LTESR_CC)
-                return NAND_STATUS_FAIL;
-        /* Use READ_STATUS command, but wait for the device to be ready */
-        ctrl->use_mdr = 0;
-        out_be32(&lbc->fir,
-                 (FIR_OP_CW0 << FIR_OP0_SHIFT) |
-                 (FIR_OP_RBW << FIR_OP1_SHIFT));
-        out_be32(&lbc->fcr, NAND_CMD_STATUS << FCR_CMD0_SHIFT);
-        out_be32(&lbc->fbcr, 1);
-        set_addr(mtd, 0, 0, 0);
-        ctrl->read_bytes = 1;
-        fsl_elbc_run_command(mtd);
        if (ctrl->status != LTESR_CC)
                return NAND_STATUS_FAIL;
@@ -651,8 +643,7 @@ static int fsl_elbc_wait(struct mtd_info *mtd, struct nand_chip *chip)
        /* The chip always seems to report that it is
         * write-protected, even when it is not.
         */
-        setbits8(ctrl->addr, NAND_STATUS_WP);
+        return (ctrl->mdr & 0xff) | NAND_STATUS_WP;
-        return fsl_elbc_read_byte(mtd);
 }
 static int fsl_elbc_chip_init_tail(struct mtd_info *mtd)
@@ -946,6 +937,13 @@ static int __devinit fsl_elbc_ctrl_init(struct fsl_elbc_ctrl *ctrl)
 {
        struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
+        /*
+         * NAND transactions can tie up the bus for a long time, so set the
+         * bus timeout to max by clearing LBCR[BMT] (highest base counter
+         * value) and setting LBCR[BMTPS] to the highest prescaler value.
+         */
+        clrsetbits_be32(&lbc->lbcr, LBCR_BMT, 15);
        /* clear event registers */
        setbits32(&lbc->ltesr, LTESR_NAND_MASK);
        out_be32(&lbc->lteatr, 0);
diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c
index d120cd8d7267..071a60cb4204 100644
--- a/drivers/mtd/nand/fsl_upm.c
+++ b/drivers/mtd/nand/fsl_upm.c
@@ -112,7 +112,7 @@ static void fun_select_chip(struct mtd_info *mtd, int mchip_nr)
        if (mchip_nr == -1) {
                chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
-        } else if (mchip_nr >= 0) {
+        } else if (mchip_nr >= 0 && mchip_nr < NAND_MAX_CHIPS) {
                fun->mchip_number = mchip_nr;
                chip->IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr];
                chip->IO_ADDR_W = chip->IO_ADDR_R;
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 65b26d5a5c0d..45dec5770da0 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -33,9 +33,13 @@
 #include <asm/mach/flash.h>
 #include <mach/mxc_nand.h>
+#include <mach/hardware.h>
 #define DRIVER_NAME "mxc_nand"
+#define nfc_is_v21()            (cpu_is_mx25() || cpu_is_mx35())
+#define nfc_is_v1()             (cpu_is_mx31() || cpu_is_mx27())
 /* Addresses for NFC registers */
 #define NFC_BUF_SIZE            0xE00
 #define NFC_BUF_ADDR            0xE04
@@ -46,24 +50,14 @@
 #define NFC_RSLTMAIN_AREA       0xE0E
 #define NFC_RSLTSPARE_AREA      0xE10
 #define NFC_WRPROT              0xE12
-#define NFC_UNLOCKSTART_BLKADDR 0xE14
+#define NFC_V1_UNLOCKSTART_BLKADDR      0xe14
-#define NFC_UNLOCKEND_BLKADDR   0xE16
+#define NFC_V1_UNLOCKEND_BLKADDR        0xe16
+#define NFC_V21_UNLOCKSTART_BLKADDR     0xe20
+#define NFC_V21_UNLOCKEND_BLKADDR       0xe22
 #define NFC_NF_WRPRST           0xE18
 #define NFC_CONFIG1             0xE1A
 #define NFC_CONFIG2             0xE1C
-/* Addresses for NFC RAM BUFFER Main area 0 */
-#define MAIN_AREA0              0x000
-#define MAIN_AREA1              0x200
-#define MAIN_AREA2              0x400
-#define MAIN_AREA3              0x600
-/* Addresses for NFC SPARE BUFFER Spare area 0 */
-#define SPARE_AREA0             0x800
-#define SPARE_AREA1             0x810
-#define SPARE_AREA2             0x820
-#define SPARE_AREA3             0x830
 /* Set INT to 0, FCMD to 1, rest to 0 in NFC_CONFIG2 Register
 * for Command operation */
 #define NFC_CMD            0x1
@@ -106,48 +100,66 @@ struct mxc_nand_host {
        struct mtd_partition    *parts;
        struct device           *dev;
+        void                    *spare0;
+        void                    *main_area0;
+        void                    *main_area1;
+        void __iomem            *base;
        void __iomem            *regs;
-        int                     spare_only;
        int                     status_request;
-        int                     pagesize_2k;
-        uint16_t                col_addr;
        struct clk              *clk;
        int                     clk_act;
        int                     irq;
        wait_queue_head_t       irq_waitq;
-};
-/* Define delays in microsec for NAND device operations */
-#define TROP_US_DELAY   2000
-/* Macros to get byte and bit positions of ECC */
-#define COLPOS(x)  ((x) >> 3)
-#define BITPOS(x) ((x) & 0xf)
-/* Define single bit Error positions in Main & Spare area */
+        uint8_t                 *data_buf;
-#define MAIN_SINGLEBIT_ERROR 0x4
+        unsigned int            buf_start;
-#define SPARE_SINGLEBIT_ERROR 0x1
+        int                     spare_len;
-/* OOB placement block for use with hardware ecc generation */
-static struct nand_ecclayout nand_hw_eccoob_8 = {
-        .eccbytes = 5,
-        .eccpos = {6, 7, 8, 9, 10},
-        .oobfree = {{0, 5}, {11, 5}, }
 };
-static struct nand_ecclayout nand_hw_eccoob_16 = {
+/* OOB placement block for use with hardware ecc generation */
+static struct nand_ecclayout nandv1_hw_eccoob_smallpage = {
        .eccbytes = 5,
        .eccpos = {6, 7, 8, 9, 10},
-        .oobfree = {{0, 5}, {11, 5}, }
+        .oobfree = {{0, 5}, {12, 4}, }
 };
-static struct nand_ecclayout nand_hw_eccoob_64 = {
+static struct nand_ecclayout nandv1_hw_eccoob_largepage = {
        .eccbytes = 20,
        .eccpos = {6, 7, 8, 9, 10, 22, 23, 24, 25, 26,
                   38, 39, 40, 41, 42, 54, 55, 56, 57, 58},
        .oobfree = {{2, 4}, {11, 10}, {27, 10}, {43, 10}, {59, 5}, }
 };
+/* OOB description for 512 byte pages with 16 byte OOB */
+static struct nand_ecclayout nandv2_hw_eccoob_smallpage = {
+        .eccbytes = 1 * 9,
+        .eccpos = {
+                 7,  8,  9, 10, 11, 12, 13, 14, 15
+        },
+        .oobfree = {
+                {.offset = 0, .length = 5}
+        }
+};
+/* OOB description for 2048 byte pages with 64 byte OOB */
+static struct nand_ecclayout nandv2_hw_eccoob_largepage = {
+        .eccbytes = 4 * 9,
+        .eccpos = {
+                 7,  8,  9, 10, 11, 12, 13, 14, 15,
+                23, 24, 25, 26, 27, 28, 29, 30, 31,
+                39, 40, 41, 42, 43, 44, 45, 46, 47,
+                55, 56, 57, 58, 59, 60, 61, 62, 63
+        },
+        .oobfree = {
+                {.offset = 2, .length = 4},
+                {.offset = 16, .length = 7},
+                {.offset = 32, .length = 7},
+                {.offset = 48, .length = 7}
+        }
+};
 #ifdef CONFIG_MTD_PARTITIONS
 static const char *part_probes[] = { "RedBoot", "cmdlinepart", NULL };
 #endif
@@ -170,10 +182,10 @@ static irqreturn_t mxc_nfc_irq(int irq, void *dev_id)
 /* This function polls the NANDFC to wait for the basic operation to
 * complete by checking the INT bit of config2 register.
 */
-static void wait_op_done(struct mxc_nand_host *host, int max_retries,
+static void wait_op_done(struct mxc_nand_host *host, int useirq)
-                                uint16_t param, int useirq)
 {
        uint32_t tmp;
+        int max_retries = 2000;
        if (useirq) {
                if ((readw(host->regs + NFC_CONFIG2) & NFC_INT) == 0) {
@@ -200,8 +212,8 @@ static void wait_op_done(struct mxc_nand_host *host, int max_retries,
                        udelay(1);
                }
                if (max_retries < 0)
-                        DEBUG(MTD_DEBUG_LEVEL0, "%s(%d): INT not set\n",
+                        DEBUG(MTD_DEBUG_LEVEL0, "%s: INT not set\n",
-                              __func__, param);
+                              __func__);
        }
 }
@@ -215,7 +227,7 @@ static void send_cmd(struct mxc_nand_host *host, uint16_t cmd, int useirq)
        writew(NFC_CMD, host->regs + NFC_CONFIG2);
        /* Wait for operation to complete */
-        wait_op_done(host, TROP_US_DELAY, cmd, useirq);
+        wait_op_done(host, useirq);
 }
 /* This function sends an address (or partial address) to the
@@ -229,82 +241,47 @@ static void send_addr(struct mxc_nand_host *host, uint16_t addr, int islast)
        writew(NFC_ADDR, host->regs + NFC_CONFIG2);
        /* Wait for operation to complete */
-        wait_op_done(host, TROP_US_DELAY, addr, islast);
+        wait_op_done(host, islast);
 }
-/* This function requests the NANDFC to initate the transfer
+static void send_page(struct mtd_info *mtd, unsigned int ops)
- * of data currently in the NANDFC RAM buffer to the NAND device. */
-static void send_prog_page(struct mxc_nand_host *host, uint8_t buf_id,
-                        int spare_only)
 {
-        DEBUG(MTD_DEBUG_LEVEL3, "send_prog_page (%d)\n", spare_only);
+        struct nand_chip *nand_chip = mtd->priv;
+        struct mxc_nand_host *host = nand_chip->priv;
-        /* NANDFC buffer 0 is used for page read/write */
+        int bufs, i;
-        writew(buf_id, host->regs + NFC_BUF_ADDR);
-        /* Configure spare or page+spare access */
-        if (!host->pagesize_2k) {
-                uint16_t config1 = readw(host->regs + NFC_CONFIG1);
-                if (spare_only)
-                        config1 |= NFC_SP_EN;
-                else
-                        config1 &= ~(NFC_SP_EN);
-                writew(config1, host->regs + NFC_CONFIG1);
-        }
-        writew(NFC_INPUT, host->regs + NFC_CONFIG2);
+        if (nfc_is_v1() && mtd->writesize > 512)
+                bufs = 4;
+        else
+                bufs = 1;
-        /* Wait for operation to complete */
+        for (i = 0; i < bufs; i++) {
-        wait_op_done(host, TROP_US_DELAY, spare_only, true);
-}
-/* Requests NANDFC to initated the transfer of data from the
+                /* NANDFC buffer 0 is used for page read/write */
- * NAND device into in the NANDFC ram buffer. */
+                writew(i, host->regs + NFC_BUF_ADDR);
-static void send_read_page(struct mxc_nand_host *host, uint8_t buf_id,
-                int spare_only)
-{
-        DEBUG(MTD_DEBUG_LEVEL3, "send_read_page (%d)\n", spare_only);
-        /* NANDFC buffer 0 is used for page read/write */
+                writew(ops, host->regs + NFC_CONFIG2);
-        writew(buf_id, host->regs + NFC_BUF_ADDR);
-        /* Configure spare or page+spare access */
+                /* Wait for operation to complete */
-        if (!host->pagesize_2k) {
+                wait_op_done(host, true);
-                uint32_t config1 = readw(host->regs + NFC_CONFIG1);
-                if (spare_only)
-                        config1 |= NFC_SP_EN;
-                else
-                        config1 &= ~NFC_SP_EN;
-                writew(config1, host->regs + NFC_CONFIG1);
        }
-        writew(NFC_OUTPUT, host->regs + NFC_CONFIG2);
-        /* Wait for operation to complete */
-        wait_op_done(host, TROP_US_DELAY, spare_only, true);
 }
 /* Request the NANDFC to perform a read of the NAND device ID. */
 static void send_read_id(struct mxc_nand_host *host)
 {
        struct nand_chip *this = &host->nand;
-        uint16_t tmp;
        /* NANDFC buffer 0 is used for device ID output */
        writew(0x0, host->regs + NFC_BUF_ADDR);
-        /* Read ID into main buffer */
-        tmp = readw(host->regs + NFC_CONFIG1);
-        tmp &= ~NFC_SP_EN;
-        writew(tmp, host->regs + NFC_CONFIG1);
        writew(NFC_ID, host->regs + NFC_CONFIG2);
        /* Wait for operation to complete */
-        wait_op_done(host, TROP_US_DELAY, 0, true);
+        wait_op_done(host, true);
        if (this->options & NAND_BUSWIDTH_16) {
-                void __iomem *main_buf = host->regs + MAIN_AREA0;
+                void __iomem *main_buf = host->main_area0;
                /* compress the ID info */
                writeb(readb(main_buf + 2), main_buf + 1);
                writeb(readb(main_buf + 4), main_buf + 2);
@@ -312,15 +289,16 @@ static void send_read_id(struct mxc_nand_host *host)
                writeb(readb(main_buf + 8), main_buf + 4);
                writeb(readb(main_buf + 10), main_buf + 5);
        }
+        memcpy(host->data_buf, host->main_area0, 16);
 }
 /* This function requests the NANDFC to perform a read of the
 * NAND device status and returns the current status. */
 static uint16_t get_dev_status(struct mxc_nand_host *host)
 {
-        void __iomem *main_buf = host->regs + MAIN_AREA1;
+        void __iomem *main_buf = host->main_area1;
        uint32_t store;
-        uint16_t ret, tmp;
+        uint16_t ret;
        /* Issue status request to NAND device */
        /* store the main area1 first word, later do recovery */
@@ -329,15 +307,10 @@ static uint16_t get_dev_status(struct mxc_nand_host *host)
         * corruption of read/write buffer on status requests. */
        writew(1, host->regs + NFC_BUF_ADDR);
-        /* Read status into main buffer */
-        tmp = readw(host->regs + NFC_CONFIG1);
-        tmp &= ~NFC_SP_EN;
-        writew(tmp, host->regs + NFC_CONFIG1);
        writew(NFC_STATUS, host->regs + NFC_CONFIG2);
        /* Wait for operation to complete */
-        wait_op_done(host, TROP_US_DELAY, 0, true);
+        wait_op_done(host, true);
        /* Status is placed in first word of main buffer */
        /* get status, then recovery area 1 data */
@@ -397,32 +370,14 @@ static u_char mxc_nand_read_byte(struct mtd_info *mtd)
 {
        struct nand_chip *nand_chip = mtd->priv;
        struct mxc_nand_host *host = nand_chip->priv;
-        uint8_t ret = 0;
+        uint8_t ret;
-        uint16_t col, rd_word;
-        uint16_t __iomem *main_buf = host->regs + MAIN_AREA0;
-        uint16_t __iomem *spare_buf = host->regs + SPARE_AREA0;
        /* Check for status request */
        if (host->status_request)
                return get_dev_status(host) & 0xFF;
-        /* Get column for 16-bit access */
+        ret = *(uint8_t *)(host->data_buf + host->buf_start);
-        col = host->col_addr >> 1;
+        host->buf_start++;
-        /* If we are accessing the spare region */
-        if (host->spare_only)
-                rd_word = readw(&spare_buf[col]);
-        else
-                rd_word = readw(&main_buf[col]);
-        /* Pick upper/lower byte of word from RAM buffer */
-        if (host->col_addr & 0x1)
-                ret = (rd_word >> 8) & 0xFF;
-        else
-                ret = rd_word & 0xFF;
-        /* Update saved column address */
-        host->col_addr++;
        return ret;
 }
@@ -431,33 +386,10 @@ static uint16_t mxc_nand_read_word(struct mtd_info *mtd)
 {
        struct nand_chip *nand_chip = mtd->priv;
        struct mxc_nand_host *host = nand_chip->priv;
-        uint16_t col, rd_word, ret;
+        uint16_t ret;
-        uint16_t __iomem *p;
-        DEBUG(MTD_DEBUG_LEVEL3,
-              "mxc_nand_read_word(col = %d)\n", host->col_addr);
-        col = host->col_addr;
-        /* Adjust saved column address */
-        if (col < mtd->writesize && host->spare_only)
-                col += mtd->writesize;
-        if (col < mtd->writesize)
+        ret = *(uint16_t *)(host->data_buf + host->buf_start);
-                p = (host->regs + MAIN_AREA0) + (col >> 1);
+        host->buf_start += 2;
-        else
-                p = (host->regs + SPARE_AREA0) + ((col - mtd->writesize) >> 1);
-        if (col & 1) {
-                rd_word = readw(p);
-                ret = (rd_word >> 8) & 0xff;
-                rd_word = readw(&p[1]);
-                ret |= (rd_word << 8) & 0xff00;
-        } else
-                ret = readw(p);
-        /* Update saved column address */
-        host->col_addr = col + 2;
        return ret;
 }
@@ -470,94 +402,14 @@ static void mxc_nand_write_buf(struct mtd_info *mtd,
 {
        struct nand_chip *nand_chip = mtd->priv;
        struct mxc_nand_host *host = nand_chip->priv;
-        int n, col, i = 0;
+        u16 col = host->buf_start;
+        int n = mtd->oobsize + mtd->writesize - col;
-        DEBUG(MTD_DEBUG_LEVEL3,
-              "mxc_nand_write_buf(col = %d, len = %d)\n", host->col_addr,
-              len);
-        col = host->col_addr;
-        /* Adjust saved column address */
+        n = min(n, len);
-        if (col < mtd->writesize && host->spare_only)
-                col += mtd->writesize;
-        n = mtd->writesize + mtd->oobsize - col;
+        memcpy(host->data_buf + col, buf, n);
-        n = min(len, n);
-        DEBUG(MTD_DEBUG_LEVEL3,
-              "%s:%d: col = %d, n = %d\n", __func__, __LINE__, col, n);
-        while (n) {
-                void __iomem *p;
-                if (col < mtd->writesize)
-                        p = host->regs + MAIN_AREA0 + (col & ~3);
-                else
-                        p = host->regs + SPARE_AREA0 -
-                                                mtd->writesize + (col & ~3);
-                DEBUG(MTD_DEBUG_LEVEL3, "%s:%d: p = %p\n", __func__,
-                      __LINE__, p);
-                if (((col | (int)&buf[i]) & 3) || n < 16) {
-                        uint32_t data = 0;
-                        if (col & 3 || n < 4)
-                                data = readl(p);
-                        switch (col & 3) {
-                        case 0:
-                                if (n) {
-                                        data = (data & 0xffffff00) |
-                                            (buf[i++] << 0);
-                                        n--;
-                                        col++;
-                                }
-                        case 1:
-                                if (n) {
-                                        data = (data & 0xffff00ff) |
-                                            (buf[i++] << 8);
-                                        n--;
-                                        col++;
-                                }
-                        case 2:
-                                if (n) {
-                                        data = (data & 0xff00ffff) |
-                                            (buf[i++] << 16);
-                                        n--;
-                                        col++;
-                                }
-                        case 3:
-                                if (n) {
-                                        data = (data & 0x00ffffff) |
-                                            (buf[i++] << 24);
-                                        n--;
-                                        col++;
-                                }
-                        }
-                        writel(data, p);
-                } else {
-                        int m = mtd->writesize - col;
-                        if (col >= mtd->writesize)
+        host->buf_start += n;
-                                m += mtd->oobsize;
-                        m = min(n, m) & ~3;
-                        DEBUG(MTD_DEBUG_LEVEL3,
-                              "%s:%d: n = %d, m = %d, i = %d, col = %d\n",
-                              __func__,  __LINE__, n, m, i, col);
-                        memcpy(p, &buf[i], m);
-                        col += m;
-                        i += m;
-                        n -= m;
-                }
-        }
-        /* Update saved column address */
-        host->col_addr = col;
 }
 /* Read the data buffer from the NAND Flash. To read the data from NAND
@@ -568,75 +420,14 @@ static void mxc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
 {
        struct nand_chip *nand_chip = mtd->priv;
        struct mxc_nand_host *host = nand_chip->priv;
-        int n, col, i = 0;
+        u16 col = host->buf_start;
+        int n = mtd->oobsize + mtd->writesize - col;
-        DEBUG(MTD_DEBUG_LEVEL3,
-              "mxc_nand_read_buf(col = %d, len = %d)\n", host->col_addr, len);
-        col = host->col_addr;
-        /* Adjust saved column address */
+        n = min(n, len);
-        if (col < mtd->writesize && host->spare_only)
-                col += mtd->writesize;
-        n = mtd->writesize + mtd->oobsize - col;
+        memcpy(buf, host->data_buf + col, len);
-        n = min(len, n);
-        while (n) {
-                void __iomem *p;
-                if (col < mtd->writesize)
-                        p = host->regs + MAIN_AREA0 + (col & ~3);
-                else
-                        p = host->regs + SPARE_AREA0 -
-                                        mtd->writesize + (col & ~3);
-                if (((col | (int)&buf[i]) & 3) || n < 16) {
-                        uint32_t data;
-                        data = readl(p);
-                        switch (col & 3) {
-                        case 0:
-                                if (n) {
-                                        buf[i++] = (uint8_t) (data);
-                                        n--;
-                                        col++;
-                                }
-                        case 1:
-                                if (n) {
-                                        buf[i++] = (uint8_t) (data >> 8);
-                                        n--;
-                                        col++;
-                                }
-                        case 2:
-                                if (n) {
-                                        buf[i++] = (uint8_t) (data >> 16);
-                                        n--;
-                                        col++;
-                                }
-                        case 3:
-                                if (n) {
-                                        buf[i++] = (uint8_t) (data >> 24);
-                                        n--;
-                                        col++;
-                                }
-                        }
-                } else {
-                        int m = mtd->writesize - col;
-                        if (col >= mtd->writesize)
-                                m += mtd->oobsize;
-                        m = min(n, m) & ~3;
-                        memcpy(&buf[i], p, m);
-                        col += m;
-                        i += m;
-                        n -= m;
-                }
-        }
-        /* Update saved column address */
-        host->col_addr = col;
+        host->buf_start += len;
 }
 /* Used by the upper layer to verify the data in NAND Flash
@@ -654,23 +445,6 @@ static void mxc_nand_select_chip(struct mtd_info *mtd, int chip)
        struct nand_chip *nand_chip = mtd->priv;
        struct mxc_nand_host *host = nand_chip->priv;
-#ifdef CONFIG_MTD_NAND_MXC_FORCE_CE
-        if (chip > 0) {
-                DEBUG(MTD_DEBUG_LEVEL0,
-                      "ERROR:  Illegal chip select (chip = %d)\n", chip);
-                return;
-        }
-        if (chip == -1) {
-                writew(readw(host->regs + NFC_CONFIG1) & ~NFC_CE,
-                                host->regs + NFC_CONFIG1);
-                return;
-        }
-        writew(readw(host->regs + NFC_CONFIG1) | NFC_CE,
-                        host->regs + NFC_CONFIG1);
-#endif
        switch (chip) {
        case -1:
                /* Disable the NFC clock */
@@ -692,94 +466,40 @@ static void mxc_nand_select_chip(struct mtd_info *mtd, int chip)
        }
 }
-/* Used by the upper layer to write command to NAND Flash for
+/*
- * different operations to be carried out on NAND Flash */
+ * Function to transfer data to/from spare area.
-static void mxc_nand_command(struct mtd_info *mtd, unsigned command,
+ */
-                                int column, int page_addr)
+static void copy_spare(struct mtd_info *mtd, bool bfrom)
 {
-        struct nand_chip *nand_chip = mtd->priv;
+        struct nand_chip *this = mtd->priv;
-        struct mxc_nand_host *host = nand_chip->priv;
+        struct mxc_nand_host *host = this->priv;
-        int useirq = true;
+        u16 i, j;
+        u16 n = mtd->writesize >> 9;
-        DEBUG(MTD_DEBUG_LEVEL3,
+        u8 *d = host->data_buf + mtd->writesize;
-              "mxc_nand_command (cmd = 0x%x, col = 0x%x, page = 0x%x)\n",
+        u8 *s = host->spare0;
-              command, column, page_addr);
+        u16 t = host->spare_len;
-        /* Reset command state information */
+        j = (mtd->oobsize / n >> 1) << 1;
-        host->status_request = false;
+        if (bfrom) {
-        /* Command pre-processing step */
+                for (i = 0; i < n - 1; i++)
-        switch (command) {
+                        memcpy(d + i * j, s + i * t, j);
-        case NAND_CMD_STATUS:
+                /* the last section */
-                host->col_addr = 0;
+                memcpy(d + i * j, s + i * t, mtd->oobsize - i * j);
-                host->status_request = true;
+        } else {
-                break;
+                for (i = 0; i < n - 1; i++)
+                        memcpy(&s[i * t], &d[i * j], j);
-        case NAND_CMD_READ0:
-                host->col_addr = column;
-                host->spare_only = false;
-                useirq = false;
-                break;
-        case NAND_CMD_READOOB:
-                host->col_addr = column;
-                host->spare_only = true;
-                useirq = false;
-                if (host->pagesize_2k)
-                        command = NAND_CMD_READ0; /* only READ0 is valid */
-                break;
-        case NAND_CMD_SEQIN:
-                if (column >= mtd->writesize) {
-                        /*
-                         * FIXME: before send SEQIN command for write OOB,
-                         * We must read one page out.
-                         * For K9F1GXX has no READ1 command to set current HW
-                         * pointer to spare area, we must write the whole page
-                         * including OOB together.
-                         */
-                        if (host->pagesize_2k)
-                                /* call ourself to read a page */
-                                mxc_nand_command(mtd, NAND_CMD_READ0, 0,
-                                                page_addr);
-                        host->col_addr = column - mtd->writesize;
-                        host->spare_only = true;
-                        /* Set program pointer to spare region */
-                        if (!host->pagesize_2k)
-                                send_cmd(host, NAND_CMD_READOOB, false);
-                } else {
-                        host->spare_only = false;
-                        host->col_addr = column;
-                        /* Set program pointer to page start */
-                        if (!host->pagesize_2k)
-                                send_cmd(host, NAND_CMD_READ0, false);
-                }
-                useirq = false;
-                break;
-        case NAND_CMD_PAGEPROG:
-                send_prog_page(host, 0, host->spare_only);
-                if (host->pagesize_2k) {
-                        /* data in 4 areas datas */
-                        send_prog_page(host, 1, host->spare_only);
-                        send_prog_page(host, 2, host->spare_only);
-                        send_prog_page(host, 3, host->spare_only);
-                }
-                break;
-        case NAND_CMD_ERASE1:
+                /* the last section */
-                useirq = false;
+                memcpy(&s[i * t], &d[i * j], mtd->oobsize - i * j);
-                break;
        }
+}
-        /* Write out the command to the device. */
+static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr)
-        send_cmd(host, command, useirq);
+{
+        struct nand_chip *nand_chip = mtd->priv;
+        struct mxc_nand_host *host = nand_chip->priv;
        /* Write out column address, if necessary */
        if (column != -1) {
@@ -791,7 +511,7 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command,
                 * the full page.
                 */
                send_addr(host, 0, page_addr == -1);
-                if (host->pagesize_2k)
+                if (mtd->writesize > 512)
                        /* another col addr cycle for 2k page */
                        send_addr(host, 0, false);
        }
@@ -801,7 +521,7 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command,
                /* paddr_0 - p_addr_7 */
                send_addr(host, (page_addr & 0xff), false);
-                if (host->pagesize_2k) {
+                if (mtd->writesize > 512) {
                        if (mtd->size >= 0x10000000) {
                                /* paddr_8 - paddr_15 */
                                send_addr(host, (page_addr >> 8) & 0xff, false);
@@ -820,52 +540,136 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command,
                                send_addr(host, (page_addr >> 8) & 0xff, true);
                }
        }
+}
+/* Used by the upper layer to write command to NAND Flash for
+ * different operations to be carried out on NAND Flash */
+static void mxc_nand_command(struct mtd_info *mtd, unsigned command,
+                                int column, int page_addr)
+{
+        struct nand_chip *nand_chip = mtd->priv;
+        struct mxc_nand_host *host = nand_chip->priv;
+        DEBUG(MTD_DEBUG_LEVEL3,
+              "mxc_nand_command (cmd = 0x%x, col = 0x%x, page = 0x%x)\n",
+              command, column, page_addr);
+        /* Reset command state information */
+        host->status_request = false;
-        /* Command post-processing step */
+        /* Command pre-processing step */
        switch (command) {
-        case NAND_CMD_RESET:
+        case NAND_CMD_STATUS:
+                host->buf_start = 0;
+                host->status_request = true;
+                send_cmd(host, command, true);
+                mxc_do_addr_cycle(mtd, column, page_addr);
                break;
-        case NAND_CMD_READOOB:
        case NAND_CMD_READ0:
-                if (host->pagesize_2k) {
+        case NAND_CMD_READOOB:
-                        /* send read confirm command */
+                if (command == NAND_CMD_READ0)
+                        host->buf_start = column;
+                else
+                        host->buf_start = column + mtd->writesize;
+                if (mtd->writesize > 512)
+                        command = NAND_CMD_READ0; /* only READ0 is valid */
+                send_cmd(host, command, false);
+                mxc_do_addr_cycle(mtd, column, page_addr);
+                if (mtd->writesize > 512)
                        send_cmd(host, NAND_CMD_READSTART, true);
-                        /* read for each AREA */
-                        send_read_page(host, 0, host->spare_only);
+                send_page(mtd, NFC_OUTPUT);
-                        send_read_page(host, 1, host->spare_only);
-                        send_read_page(host, 2, host->spare_only);
+                memcpy(host->data_buf, host->main_area0, mtd->writesize);
-                        send_read_page(host, 3, host->spare_only);
+                copy_spare(mtd, true);
-                } else
-                        send_read_page(host, 0, host->spare_only);
                break;
-        case NAND_CMD_READID:
+        case NAND_CMD_SEQIN:
-                host->col_addr = 0;
+                if (column >= mtd->writesize) {
-                send_read_id(host);
+                        /*
+                         * FIXME: before send SEQIN command for write OOB,
+                         * We must read one page out.
+                         * For K9F1GXX has no READ1 command to set current HW
+                         * pointer to spare area, we must write the whole page
+                         * including OOB together.
+                         */
+                        if (mtd->writesize > 512)
+                                /* call ourself to read a page */
+                                mxc_nand_command(mtd, NAND_CMD_READ0, 0,
+                                                page_addr);
+                        host->buf_start = column;
+                        /* Set program pointer to spare region */
+                        if (mtd->writesize == 512)
+                                send_cmd(host, NAND_CMD_READOOB, false);
+                } else {
+                        host->buf_start = column;
+                        /* Set program pointer to page start */
+                        if (mtd->writesize == 512)
+                                send_cmd(host, NAND_CMD_READ0, false);
+                }
+                send_cmd(host, command, false);
+                mxc_do_addr_cycle(mtd, column, page_addr);
                break;
        case NAND_CMD_PAGEPROG:
+                memcpy(host->main_area0, host->data_buf, mtd->writesize);
+                copy_spare(mtd, false);
+                send_page(mtd, NFC_INPUT);
+                send_cmd(host, command, true);
+                mxc_do_addr_cycle(mtd, column, page_addr);
                break;
-        case NAND_CMD_STATUS:
+        case NAND_CMD_READID:
+                send_cmd(host, command, true);
+                mxc_do_addr_cycle(mtd, column, page_addr);
+                send_read_id(host);
+                host->buf_start = column;
                break;
+        case NAND_CMD_ERASE1:
        case NAND_CMD_ERASE2:
+                send_cmd(host, command, false);
+                mxc_do_addr_cycle(mtd, column, page_addr);
                break;
        }
 }
-/* Define some generic bad / good block scan pattern which are used
+/*
- * while scanning a device for factory marked good / bad blocks. */
+ * The generic flash bbt decriptors overlap with our ecc
-static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
+ * hardware, so define some i.MX specific ones.
+ */
+static uint8_t bbt_pattern[] = { 'B', 'b', 't', '0' };
+static uint8_t mirror_pattern[] = { '1', 't', 'b', 'B' };
+static struct nand_bbt_descr bbt_main_descr = {
+        .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
+            | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
+        .offs = 0,
+        .len = 4,
+        .veroffs = 4,
+        .maxblocks = 4,
+        .pattern = bbt_pattern,
+};
-static struct nand_bbt_descr smallpage_memorybased = {
+static struct nand_bbt_descr bbt_mirror_descr = {
-        .options = NAND_BBT_SCAN2NDPAGE,
+        .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
-        .offs = 5,
+            | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
-        .len = 1,
+        .offs = 0,
-        .pattern = scan_ff_pattern
+        .len = 4,
+        .veroffs = 4,
+        .maxblocks = 4,
+        .pattern = mirror_pattern,
 };
 static int __init mxcnd_probe(struct platform_device *pdev)
@@ -877,12 +681,16 @@ static int __init mxcnd_probe(struct platform_device *pdev)
        struct resource *res;
        uint16_t tmp;
        int err = 0, nr_parts = 0;
+        struct nand_ecclayout *oob_smallpage, *oob_largepage;
        /* Allocate memory for MTD device structure and private data */
-        host = kzalloc(sizeof(struct mxc_nand_host), GFP_KERNEL);
+        host = kzalloc(sizeof(struct mxc_nand_host) + NAND_MAX_PAGESIZE +
+                        NAND_MAX_OOBSIZE, GFP_KERNEL);
        if (!host)
                return -ENOMEM;
+        host->data_buf = (uint8_t *)(host + 1);
        host->dev = &pdev->dev;
        /* structures must be linked */
        this = &host->nand;
@@ -890,7 +698,7 @@ static int __init mxcnd_probe(struct platform_device *pdev)
        mtd->priv = this;
        mtd->owner = THIS_MODULE;
        mtd->dev.parent = &pdev->dev;
-        mtd->name = "mxc_nand";
+        mtd->name = DRIVER_NAME;
        /* 50 us command delay time */
        this->chip_delay = 5;
@@ -920,62 +728,93 @@ static int __init mxcnd_probe(struct platform_device *pdev)
                goto eres;
        }
-        host->regs = ioremap(res->start, res->end - res->start + 1);
+        host->base = ioremap(res->start, resource_size(res));
-        if (!host->regs) {
+        if (!host->base) {
                err = -ENOMEM;
                goto eres;
        }
+        host->main_area0 = host->base;
+        host->main_area1 = host->base + 0x200;
+        if (nfc_is_v21()) {
+                host->regs = host->base + 0x1000;
+                host->spare0 = host->base + 0x1000;
+                host->spare_len = 64;
+                oob_smallpage = &nandv2_hw_eccoob_smallpage;
+                oob_largepage = &nandv2_hw_eccoob_largepage;
+        } else if (nfc_is_v1()) {
+                host->regs = host->base;
+                host->spare0 = host->base + 0x800;
+                host->spare_len = 16;
+                oob_smallpage = &nandv1_hw_eccoob_smallpage;
+                oob_largepage = &nandv1_hw_eccoob_largepage;
+        } else
+                BUG();
+        /* disable interrupt and spare enable */
        tmp = readw(host->regs + NFC_CONFIG1);
        tmp |= NFC_INT_MSK;
+        tmp &= ~NFC_SP_EN;
        writew(tmp, host->regs + NFC_CONFIG1);
        init_waitqueue_head(&host->irq_waitq);
        host->irq = platform_get_irq(pdev, 0);
-        err = request_irq(host->irq, mxc_nfc_irq, 0, "mxc_nd", host);
+        err = request_irq(host->irq, mxc_nfc_irq, 0, DRIVER_NAME, host);
        if (err)
                goto eirq;
+        /* Reset NAND */
+        this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
+        /* preset operation */
+        /* Unlock the internal RAM Buffer */
+        writew(0x2, host->regs + NFC_CONFIG);
+        /* Blocks to be unlocked */
+        if (nfc_is_v21()) {
+                writew(0x0, host->regs + NFC_V21_UNLOCKSTART_BLKADDR);
+                writew(0xffff, host->regs + NFC_V21_UNLOCKEND_BLKADDR);
+                this->ecc.bytes = 9;
+        } else if (nfc_is_v1()) {
+                writew(0x0, host->regs + NFC_V1_UNLOCKSTART_BLKADDR);
+                writew(0x4000, host->regs + NFC_V1_UNLOCKEND_BLKADDR);
+                this->ecc.bytes = 3;
+        } else
+                BUG();
+        /* Unlock Block Command for given address range */
+        writew(0x4, host->regs + NFC_WRPROT);
+        this->ecc.size = 512;
+        this->ecc.layout = oob_smallpage;
        if (pdata->hw_ecc) {
                this->ecc.calculate = mxc_nand_calculate_ecc;
                this->ecc.hwctl = mxc_nand_enable_hwecc;
                this->ecc.correct = mxc_nand_correct_data;
                this->ecc.mode = NAND_ECC_HW;
-                this->ecc.size = 512;
-                this->ecc.bytes = 3;
                tmp = readw(host->regs + NFC_CONFIG1);
                tmp |= NFC_ECC_EN;
                writew(tmp, host->regs + NFC_CONFIG1);
        } else {
-                this->ecc.size = 512;
-                this->ecc.bytes = 3;
-                this->ecc.layout = &nand_hw_eccoob_8;
                this->ecc.mode = NAND_ECC_SOFT;
                tmp = readw(host->regs + NFC_CONFIG1);
                tmp &= ~NFC_ECC_EN;
                writew(tmp, host->regs + NFC_CONFIG1);
        }
-        /* Reset NAND */
-        this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
-        /* preset operation */
-        /* Unlock the internal RAM Buffer */
-        writew(0x2, host->regs + NFC_CONFIG);
-        /* Blocks to be unlocked */
-        writew(0x0, host->regs + NFC_UNLOCKSTART_BLKADDR);
-        writew(0x4000, host->regs + NFC_UNLOCKEND_BLKADDR);
-        /* Unlock Block Command for given address range */
-        writew(0x4, host->regs + NFC_WRPROT);
        /* NAND bus width determines access funtions used by upper layer */
-        if (pdata->width == 2) {
+        if (pdata->width == 2)
                this->options |= NAND_BUSWIDTH_16;
-                this->ecc.layout = &nand_hw_eccoob_16;
+        if (pdata->flash_bbt) {
+                this->bbt_td = &bbt_main_descr;
+                this->bbt_md = &bbt_mirror_descr;
+                /* update flash based bbt */
+                this->options |= NAND_USE_FLASH_BBT;
        }
        /* first scan to find the device and get the page size */
@@ -984,38 +823,8 @@ static int __init mxcnd_probe(struct platform_device *pdev)
                goto escan;
        }
-        if (mtd->writesize == 2048) {
+        if (mtd->writesize == 2048)
-                host->pagesize_2k = 1;
+                this->ecc.layout = oob_largepage;
-                this->badblock_pattern = &smallpage_memorybased;
-        }
-        if (this->ecc.mode == NAND_ECC_HW) {
-                switch (mtd->oobsize) {
-                case 8:
-                        this->ecc.layout = &nand_hw_eccoob_8;
-                        break;
-                case 16:
-                        this->ecc.layout = &nand_hw_eccoob_16;
-                        break;
-                case 64:
-                        this->ecc.layout = &nand_hw_eccoob_64;
-                        break;
-                default:
-                        /* page size not handled by HW ECC */
-                        /* switching back to soft ECC */
-                        this->ecc.size = 512;
-                        this->ecc.bytes = 3;
-                        this->ecc.layout = &nand_hw_eccoob_8;
-                        this->ecc.mode = NAND_ECC_SOFT;
-                        this->ecc.calculate = NULL;
-                        this->ecc.correct = NULL;
-                        this->ecc.hwctl = NULL;
-                        tmp = readw(host->regs + NFC_CONFIG1);
-                        tmp &= ~NFC_ECC_EN;
-                        writew(tmp, host->regs + NFC_CONFIG1);
-                        break;
-                }
-        }
        /* second phase scan */
        if (nand_scan_tail(mtd)) {
@@ -1043,7 +852,7 @@ static int __init mxcnd_probe(struct platform_device *pdev)
 escan:
        free_irq(host->irq, host);
 eirq:
-        iounmap(host->regs);
+        iounmap(host->base);
 eres:
        clk_put(host->clk);
 eclk:
@@ -1062,7 +871,7 @@ static int __devexit mxcnd_remove(struct platform_device *pdev)
        nand_release(&host->mtd);
        free_irq(host->irq, host);
-        iounmap(host->regs);
+        iounmap(host->base);
        kfree(host);
        return 0;
@@ -1113,7 +922,7 @@ static struct platform_driver mxcnd_driver = {
        .driver = {
                   .name = DRIVER_NAME,
                   },
-        .remove = __exit_p(mxcnd_remove),
+        .remove = __devexit_p(mxcnd_remove),
        .suspend = mxcnd_suspend,
        .resume = mxcnd_resume,
 };
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 2957cc70da3d..8f2958fe2148 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -428,6 +428,28 @@ static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip,
        return nand_isbad_bbt(mtd, ofs, allowbbt);
 }
+/**
+ * panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands.
+ * @mtd:        MTD device structure
+ * @timeo:      Timeout
+ *
+ * Helper function for nand_wait_ready used when needing to wait in interrupt
+ * context.
+ */
+static void panic_nand_wait_ready(struct mtd_info *mtd, unsigned long timeo)
+{
+        struct nand_chip *chip = mtd->priv;
+        int i;
+        /* Wait for the device to get ready */
+        for (i = 0; i < timeo; i++) {
+                if (chip->dev_ready(mtd))
+                        break;
+                touch_softlockup_watchdog();
+                mdelay(1);
+        }
+}
 /*
 * Wait for the ready pin, after a command
 * The timeout is catched later.
@@ -437,6 +459,10 @@ void nand_wait_ready(struct mtd_info *mtd)
        struct nand_chip *chip = mtd->priv;
        unsigned long timeo = jiffies + 2;
+        /* 400ms timeout */
+        if (in_interrupt() || oops_in_progress)
+                return panic_nand_wait_ready(mtd, 400);
        led_trigger_event(nand_led_trigger, LED_FULL);
        /* wait until command is processed or timeout occures */
        do {
@@ -672,6 +698,22 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
 }
 /**
+ * panic_nand_get_device - [GENERIC] Get chip for selected access
+ * @chip:       the nand chip descriptor
+ * @mtd:        MTD device structure
+ * @new_state:  the state which is requested
+ *
+ * Used when in panic, no locks are taken.
+ */
+static void panic_nand_get_device(struct nand_chip *chip,
+                      struct mtd_info *mtd, int new_state)
+{
+        /* Hardware controller shared among independend devices */
+        chip->controller->active = chip;
+        chip->state = new_state;
+}
+/**
 * nand_get_device - [GENERIC] Get chip for selected access
 * @chip:       the nand chip descriptor
 * @mtd:        MTD device structure
@@ -698,8 +740,14 @@ nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state)
                return 0;
        }
        if (new_state == FL_PM_SUSPENDED) {
-                spin_unlock(lock);
+                if (chip->controller->active->state == FL_PM_SUSPENDED) {
-                return (chip->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
+                        chip->state = FL_PM_SUSPENDED;
+                        spin_unlock(lock);
+                        return 0;
+                } else {
+                        spin_unlock(lock);
+                        return -EAGAIN;
+                }
        }
        set_current_state(TASK_UNINTERRUPTIBLE);
        add_wait_queue(wq, &wait);
@@ -710,6 +758,32 @@ nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state)
 }
 /**
+ * panic_nand_wait - [GENERIC]  wait until the command is done
+ * @mtd:        MTD device structure
+ * @chip:       NAND chip structure
+ * @timeo:      Timeout
+ *
+ * Wait for command done. This is a helper function for nand_wait used when
+ * we are in interrupt context. May happen when in panic and trying to write
+ * an oops trough mtdoops.
+ */
+static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,
+                            unsigned long timeo)
+{
+        int i;
+        for (i = 0; i < timeo; i++) {
+                if (chip->dev_ready) {
+                        if (chip->dev_ready(mtd))
+                                break;
+                } else {
+                        if (chip->read_byte(mtd) & NAND_STATUS_READY)
+                                break;
+                }
+                mdelay(1);
+        }
+}
+/**
 * nand_wait - [DEFAULT]  wait until the command is done
 * @mtd:        MTD device structure
 * @chip:       NAND chip structure
@@ -740,15 +814,19 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
        else
                chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
-        while (time_before(jiffies, timeo)) {
+        if (in_interrupt() || oops_in_progress)
-                if (chip->dev_ready) {
+                panic_nand_wait(mtd, chip, timeo);
-                        if (chip->dev_ready(mtd))
+        else {
-                                break;
+                while (time_before(jiffies, timeo)) {
-                } else {
+                        if (chip->dev_ready) {
-                        if (chip->read_byte(mtd) & NAND_STATUS_READY)
+                                if (chip->dev_ready(mtd))
-                                break;
+                                        break;
+                        } else {
+                                if (chip->read_byte(mtd) & NAND_STATUS_READY)
+                                        break;
+                        }
+                        cond_resched();
                }
-                cond_resched();
        }
        led_trigger_event(nand_led_trigger, LED_OFF);
@@ -1949,6 +2027,45 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
 }
 /**
+ * panic_nand_write - [MTD Interface] NAND write with ECC
+ * @mtd:        MTD device structure
+ * @to:         offset to write to
+ * @len:        number of bytes to write
+ * @retlen:     pointer to variable to store the number of written bytes
+ * @buf:        the data to write
+ *
+ * NAND write with ECC. Used when performing writes in interrupt context, this
+ * may for example be called by mtdoops when writing an oops while in panic.
+ */
+static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
+                            size_t *retlen, const uint8_t *buf)
+{
+        struct nand_chip *chip = mtd->priv;
+        int ret;
+        /* Do not allow reads past end of device */
+        if ((to + len) > mtd->size)
+                return -EINVAL;
+        if (!len)
+                return 0;
+        /* Wait for the device to get ready.  */
+        panic_nand_wait(mtd, chip, 400);
+        /* Grab the device.  */
+        panic_nand_get_device(chip, mtd, FL_WRITING);
+        chip->ops.len = len;
+        chip->ops.datbuf = (uint8_t *)buf;
+        chip->ops.oobbuf = NULL;
+        ret = nand_do_write_ops(mtd, to, &chip->ops);
+        *retlen = chip->ops.retlen;
+        return ret;
+}
+/**
 * nand_write - [MTD Interface] NAND write with ECC
 * @mtd:        MTD device structure
 * @to:         offset to write to
@@ -2645,7 +2762,8 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips)
        type = nand_get_flash_type(mtd, chip, busw, &nand_maf_id);
        if (IS_ERR(type)) {
-                printk(KERN_WARNING "No NAND device found!!!\n");
+                if (!(chip->options & NAND_SCAN_SILENT_NODEV))
+                        printk(KERN_WARNING "No NAND device found.\n");
                chip->select_chip(mtd, -1);
                return PTR_ERR(type);
        }
@@ -2877,6 +2995,7 @@ int nand_scan_tail(struct mtd_info *mtd)
        mtd->unpoint = NULL;
        mtd->read = nand_read;
        mtd->write = nand_write;
+        mtd->panic_write = panic_nand_write;
        mtd->read_oob = nand_read_oob;
        mtd->write_oob = nand_write_oob;
        mtd->sync = nand_sync;
diff --git a/drivers/mtd/nand/nand_bcm_umi.c b/drivers/mtd/nand/nand_bcm_umi.c
new file mode 100644
index 000000000000..46a6bc9c4b74
--- /dev/null
+++ b/drivers/mtd/nand/nand_bcm_umi.c
@@ -0,0 +1,149 @@
+/*****************************************************************************
+* Copyright 2004 - 2009 Broadcom Corporation.  All rights reserved.
+*
+* Unless you and Broadcom execute a separate written software license
+* agreement governing use of this software, this software is licensed to you
+* under the terms of the GNU General Public License version 2, available at
+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
+*
+* Notwithstanding the above, under no circumstances may you combine this
+* software in any way with any other Broadcom software provided under a
+* license other than the GPL, without Broadcom's express prior written
+* consent.
+*****************************************************************************/
+/* ---- Include Files ---------------------------------------------------- */
+#include <mach/reg_umi.h>
+#include "nand_bcm_umi.h"
+#ifdef BOOT0_BUILD
+#include <uart.h>
+#endif
+/* ---- External Variable Declarations ----------------------------------- */
+/* ---- External Function Prototypes ------------------------------------- */
+/* ---- Public Variables ------------------------------------------------- */
+/* ---- Private Constants and Types -------------------------------------- */
+/* ---- Private Function Prototypes -------------------------------------- */
+/* ---- Private Variables ------------------------------------------------ */
+/* ---- Private Functions ------------------------------------------------ */
+#if NAND_ECC_BCH
+/****************************************************************************
+*  nand_bch_ecc_flip_bit - Routine to flip an errored bit
+*
+*  PURPOSE:
+*     This is a helper routine that flips the bit (0 -> 1 or 1 -> 0) of the
+*     errored bit specified
+*
+*  PARAMETERS:
+*     datap - Container that holds the 512 byte data
+*     errorLocation - Location of the bit that needs to be flipped
+*
+*  RETURNS:
+*     None
+****************************************************************************/
+static void nand_bcm_umi_bch_ecc_flip_bit(uint8_t *datap, int errorLocation)
+{
+        int locWithinAByte = (errorLocation & REG_UMI_BCH_ERR_LOC_BYTE) >> 0;
+        int locWithinAWord = (errorLocation & REG_UMI_BCH_ERR_LOC_WORD) >> 3;
+        int locWithinAPage = (errorLocation & REG_UMI_BCH_ERR_LOC_PAGE) >> 5;
+        uint8_t errorByte = 0;
+        uint8_t byteMask = 1 << locWithinAByte;
+        /* BCH uses big endian, need to change the location
+         * bits to little endian */
+        locWithinAWord = 3 - locWithinAWord;
+        errorByte = datap[locWithinAPage * sizeof(uint32_t) + locWithinAWord];
+#ifdef BOOT0_BUILD
+        puthexs("\nECC Correct Offset: ",
+                locWithinAPage * sizeof(uint32_t) + locWithinAWord);
+        puthexs(" errorByte:", errorByte);
+        puthex8(" Bit: ", locWithinAByte);
+#endif
+        if (errorByte & byteMask) {
+                /* bit needs to be cleared */
+                errorByte &= ~byteMask;
+        } else {
+                /* bit needs to be set */
+                errorByte |= byteMask;
+        }
+        /* write back the value with the fixed bit */
+        datap[locWithinAPage * sizeof(uint32_t) + locWithinAWord] = errorByte;
+}
+/****************************************************************************
+*  nand_correct_page_bch - Routine to correct bit errors when reading NAND
+*
+*  PURPOSE:
+*     This routine reads the BCH registers to determine if there are any bit
+*     errors during the read of the last 512 bytes of data + ECC bytes.  If
+*     errors exists, the routine fixes it.
+*
+*  PARAMETERS:
+*     datap - Container that holds the 512 byte data
+*
+*  RETURNS:
+*     0 or greater = Number of errors corrected
+*                    (No errors are found or errors have been fixed)
+*    -1 = Error(s) cannot be fixed
+****************************************************************************/
+int nand_bcm_umi_bch_correct_page(uint8_t *datap, uint8_t *readEccData,
+                                  int numEccBytes)
+{
+        int numErrors;
+        int errorLocation;
+        int idx;
+        uint32_t regValue;
+        /* wait for read ECC to be valid */
+        regValue = nand_bcm_umi_bch_poll_read_ecc_calc();
+        /*
+         * read the control status register to determine if there
+         * are error'ed bits
+         * see if errors are correctible
+         */
+        if ((regValue & REG_UMI_BCH_CTRL_STATUS_UNCORR_ERR) > 0) {
+                int i;
+                for (i = 0; i < numEccBytes; i++) {
+                        if (readEccData[i] != 0xff) {
+                                /* errors cannot be fixed, return -1 */
+                                return -1;
+                        }
+                }
+                /* If ECC is unprogrammed then we can't correct,
+                 * assume everything OK */
+                return 0;
+        }
+        if ((regValue & REG_UMI_BCH_CTRL_STATUS_CORR_ERR) == 0) {
+                /* no errors */
+                return 0;
+        }
+        /*
+         * Fix errored bits by doing the following:
+         * 1. Read the number of errors in the control and status register
+         * 2. Read the error location registers that corresponds to the number
+         *    of errors reported
+         * 3. Invert the bit in the data
+         */
+        numErrors = (regValue & REG_UMI_BCH_CTRL_STATUS_NB_CORR_ERROR) >> 20;
+        for (idx = 0; idx < numErrors; idx++) {
+                errorLocation =
+                    REG_UMI_BCH_ERR_LOC_ADDR(idx) & REG_UMI_BCH_ERR_LOC_MASK;
+                /* Flip bit */
+                nand_bcm_umi_bch_ecc_flip_bit(datap, errorLocation);
+        }
+        /* Errors corrected */
+        return numErrors;
+}
+#endif
diff --git a/drivers/mtd/nand/nand_bcm_umi.h b/drivers/mtd/nand/nand_bcm_umi.h
new file mode 100644
index 000000000000..7cec2cd97854
--- /dev/null
+++ b/drivers/mtd/nand/nand_bcm_umi.h
@@ -0,0 +1,358 @@
+/*****************************************************************************
+* Copyright 2003 - 2009 Broadcom Corporation.  All rights reserved.
+*
+* Unless you and Broadcom execute a separate written software license
+* agreement governing use of this software, this software is licensed to you
+* under the terms of the GNU General Public License version 2, available at
+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
+*
+* Notwithstanding the above, under no circumstances may you combine this
+* software in any way with any other Broadcom software provided under a
+* license other than the GPL, without Broadcom's express prior written
+* consent.
+*****************************************************************************/
+#ifndef NAND_BCM_UMI_H
+#define NAND_BCM_UMI_H
+/* ---- Include Files ---------------------------------------------------- */
+#include <mach/reg_umi.h>
+#include <mach/reg_nand.h>
+#include <cfg_global.h>
+/* ---- Constants and Types ---------------------------------------------- */
+#if (CFG_GLOBAL_CHIP_FAMILY == CFG_GLOBAL_CHIP_FAMILY_BCMRING)
+#define NAND_ECC_BCH (CFG_GLOBAL_CHIP_REV > 0xA0)
+#else
+#define NAND_ECC_BCH 0
+#endif
+#define CFG_GLOBAL_NAND_ECC_BCH_NUM_BYTES       13
+#if NAND_ECC_BCH
+#ifdef BOOT0_BUILD
+#define NAND_ECC_NUM_BYTES 13
+#else
+#define NAND_ECC_NUM_BYTES CFG_GLOBAL_NAND_ECC_BCH_NUM_BYTES
+#endif
+#else
+#define NAND_ECC_NUM_BYTES 3
+#endif
+#define NAND_DATA_ACCESS_SIZE 512
+/* ---- Variable Externs ------------------------------------------ */
+/* ---- Function Prototypes --------------------------------------- */
+int nand_bcm_umi_bch_correct_page(uint8_t *datap, uint8_t *readEccData,
+                                  int numEccBytes);
+/* Check in device is ready */
+static inline int nand_bcm_umi_dev_ready(void)
+{
+        return REG_UMI_NAND_RCSR & REG_UMI_NAND_RCSR_RDY;
+}
+/* Wait until device is ready */
+static inline void nand_bcm_umi_wait_till_ready(void)
+{
+        while (nand_bcm_umi_dev_ready() == 0)
+                ;
+}
+/* Enable Hamming ECC */
+static inline void nand_bcm_umi_hamming_enable_hwecc(void)
+{
+        /* disable and reset ECC, 512 byte page */
+        REG_UMI_NAND_ECC_CSR &= ~(REG_UMI_NAND_ECC_CSR_ECC_ENABLE |
+                REG_UMI_NAND_ECC_CSR_256BYTE);
+        /* enable ECC */
+        REG_UMI_NAND_ECC_CSR |= REG_UMI_NAND_ECC_CSR_ECC_ENABLE;
+}
+#if NAND_ECC_BCH
+/* BCH ECC specifics */
+#define ECC_BITS_PER_CORRECTABLE_BIT 13
+/* Enable BCH Read ECC */
+static inline void nand_bcm_umi_bch_enable_read_hwecc(void)
+{
+        /* disable and reset ECC */
+        REG_UMI_BCH_CTRL_STATUS = REG_UMI_BCH_CTRL_STATUS_RD_ECC_VALID;
+        /* Turn on ECC */
+        REG_UMI_BCH_CTRL_STATUS = REG_UMI_BCH_CTRL_STATUS_ECC_RD_EN;
+}
+/* Enable BCH Write ECC */
+static inline void nand_bcm_umi_bch_enable_write_hwecc(void)
+{
+        /* disable and reset ECC */
+        REG_UMI_BCH_CTRL_STATUS = REG_UMI_BCH_CTRL_STATUS_WR_ECC_VALID;
+        /* Turn on ECC */
+        REG_UMI_BCH_CTRL_STATUS = REG_UMI_BCH_CTRL_STATUS_ECC_WR_EN;
+}
+/* Config number of BCH ECC bytes */
+static inline void nand_bcm_umi_bch_config_ecc(uint8_t numEccBytes)
+{
+        uint32_t nValue;
+        uint32_t tValue;
+        uint32_t kValue;
+        uint32_t numBits = numEccBytes * 8;
+        /* disable and reset ECC */
+        REG_UMI_BCH_CTRL_STATUS =
+            REG_UMI_BCH_CTRL_STATUS_WR_ECC_VALID |
+            REG_UMI_BCH_CTRL_STATUS_RD_ECC_VALID;
+        /* Every correctible bit requires 13 ECC bits */
+        tValue = (uint32_t) (numBits / ECC_BITS_PER_CORRECTABLE_BIT);
+        /* Total data in number of bits for generating and computing BCH ECC */
+        nValue = (NAND_DATA_ACCESS_SIZE + numEccBytes) * 8;
+        /* K parameter is used internally.  K = N - (T * 13) */
+        kValue = nValue - (tValue * ECC_BITS_PER_CORRECTABLE_BIT);
+        /* Write the settings */
+        REG_UMI_BCH_N = nValue;
+        REG_UMI_BCH_T = tValue;
+        REG_UMI_BCH_K = kValue;
+}
+/* Pause during ECC read calculation to skip bytes in OOB */
+static inline void nand_bcm_umi_bch_pause_read_ecc_calc(void)
+{
+        REG_UMI_BCH_CTRL_STATUS =
+            REG_UMI_BCH_CTRL_STATUS_ECC_RD_EN |
+            REG_UMI_BCH_CTRL_STATUS_PAUSE_ECC_DEC;
+}
+/* Resume during ECC read calculation after skipping bytes in OOB */
+static inline void nand_bcm_umi_bch_resume_read_ecc_calc(void)
+{
+        REG_UMI_BCH_CTRL_STATUS = REG_UMI_BCH_CTRL_STATUS_ECC_RD_EN;
+}
+/* Poll read ECC calc to check when hardware completes */
+static inline uint32_t nand_bcm_umi_bch_poll_read_ecc_calc(void)
+{
+        uint32_t regVal;
+        do {
+                /* wait for ECC to be valid */
+                regVal = REG_UMI_BCH_CTRL_STATUS;
+        } while ((regVal & REG_UMI_BCH_CTRL_STATUS_RD_ECC_VALID) == 0);
+        return regVal;
+}
+/* Poll write ECC calc to check when hardware completes */
+static inline void nand_bcm_umi_bch_poll_write_ecc_calc(void)
+{
+        /* wait for ECC to be valid */
+        while ((REG_UMI_BCH_CTRL_STATUS & REG_UMI_BCH_CTRL_STATUS_WR_ECC_VALID)
+               == 0)
+                ;
+}
+/* Read the OOB and ECC, for kernel write OOB to a buffer */
+#if defined(__KERNEL__) && !defined(STANDALONE)
+static inline void nand_bcm_umi_bch_read_oobEcc(uint32_t pageSize,
+        uint8_t *eccCalc, int numEccBytes, uint8_t *oobp)
+#else
+static inline void nand_bcm_umi_bch_read_oobEcc(uint32_t pageSize,
+        uint8_t *eccCalc, int numEccBytes)
+#endif
+{
+        int eccPos = 0;
+        int numToRead = 16;     /* There are 16 bytes per sector in the OOB */
+        /* ECC is already paused when this function is called */
+        if (pageSize == NAND_DATA_ACCESS_SIZE) {
+                while (numToRead > numEccBytes) {
+                        /* skip free oob region */
+#if defined(__KERNEL__) && !defined(STANDALONE)
+                        *oobp++ = REG_NAND_DATA8;
+#else
+                        REG_NAND_DATA8;
+#endif
+                        numToRead--;
+                }
+                /* read ECC bytes before BI */
+                nand_bcm_umi_bch_resume_read_ecc_calc();
+                while (numToRead > 11) {
+#if defined(__KERNEL__) && !defined(STANDALONE)
+                        *oobp = REG_NAND_DATA8;
+                        eccCalc[eccPos++] = *oobp;
+                        oobp++;
+#else
+                        eccCalc[eccPos++] = REG_NAND_DATA8;
+#endif
+                }
+                nand_bcm_umi_bch_pause_read_ecc_calc();
+                if (numToRead == 11) {
+                        /* read BI */
+#if defined(__KERNEL__) && !defined(STANDALONE)
+                        *oobp++ = REG_NAND_DATA8;
+#else
+                        REG_NAND_DATA8;
+#endif
+                        numToRead--;
+                }
+                /* read ECC bytes */
+                nand_bcm_umi_bch_resume_read_ecc_calc();
+                while (numToRead) {
+#if defined(__KERNEL__) && !defined(STANDALONE)
+                        *oobp = REG_NAND_DATA8;
+                        eccCalc[eccPos++] = *oobp;
+                        oobp++;
+#else
+                        eccCalc[eccPos++] = REG_NAND_DATA8;
+#endif
+                        numToRead--;
+                }
+        } else {
+                /* skip BI */
+#if defined(__KERNEL__) && !defined(STANDALONE)
+                *oobp++ = REG_NAND_DATA8;
+#else
+                REG_NAND_DATA8;
+#endif
+                numToRead--;
+                while (numToRead > numEccBytes) {
+                        /* skip free oob region */
+#if defined(__KERNEL__) && !defined(STANDALONE)
+                        *oobp++ = REG_NAND_DATA8;
+#else
+                        REG_NAND_DATA8;
+#endif
+                        numToRead--;
+                }
+                /* read ECC bytes */
+                nand_bcm_umi_bch_resume_read_ecc_calc();
+                while (numToRead) {
+#if defined(__KERNEL__) && !defined(STANDALONE)
+                        *oobp = REG_NAND_DATA8;
+                        eccCalc[eccPos++] = *oobp;
+                        oobp++;
+#else
+                        eccCalc[eccPos++] = REG_NAND_DATA8;
+#endif
+                        numToRead--;
+                }
+        }
+}
+/* Helper function to write ECC */
+static inline void NAND_BCM_UMI_ECC_WRITE(int numEccBytes, int eccBytePos,
+                                          uint8_t *oobp, uint8_t eccVal)
+{
+        if (eccBytePos <= numEccBytes)
+                *oobp = eccVal;
+}
+/* Write OOB with ECC */
+static inline void nand_bcm_umi_bch_write_oobEcc(uint32_t pageSize,
+                                                 uint8_t *oobp, int numEccBytes)
+{
+        uint32_t eccVal = 0xffffffff;
+        /* wait for write ECC to be valid */
+        nand_bcm_umi_bch_poll_write_ecc_calc();
+        /*
+         ** Get the hardware ecc from the 32-bit result registers.
+         ** Read after 512 byte accesses. Format B3B2B1B0
+         ** where B3 = ecc3, etc.
+         */
+        if (pageSize == NAND_DATA_ACCESS_SIZE) {
+                /* Now fill in the ECC bytes */
+                if (numEccBytes >= 13)
+                        eccVal = REG_UMI_BCH_WR_ECC_3;
+                /* Usually we skip CM in oob[0,1] */
+                NAND_BCM_UMI_ECC_WRITE(numEccBytes, 15, &oobp[0],
+                        (eccVal >> 16) & 0xff);
+                NAND_BCM_UMI_ECC_WRITE(numEccBytes, 14, &oobp[1],
+                        (eccVal >> 8) & 0xff);
+                /* Write ECC in oob[2,3,4] */
+                NAND_BCM_UMI_ECC_WRITE(numEccBytes, 13, &oobp[2],
+                        eccVal & 0xff); /* ECC 12 */
+                if (numEccBytes >= 9)
+                        eccVal = REG_UMI_BCH_WR_ECC_2;
+                NAND_BCM_UMI_ECC_WRITE(numEccBytes, 12, &oobp[3],
+                        (eccVal >> 24) & 0xff); /* ECC11 */
+                NAND_BCM_UMI_ECC_WRITE(numEccBytes, 11, &oobp[4],
+                        (eccVal >> 16) & 0xff); /* ECC10 */
+                /* Always Skip BI in oob[5] */
+        } else {
+                /* Always Skip BI in oob[0] */
+                /* Now fill in the ECC bytes */
+                if (numEccBytes >= 13)
+                        eccVal = REG_UMI_BCH_WR_ECC_3;
+                /* Usually skip CM in oob[1,2] */
+                NAND_BCM_UMI_ECC_WRITE(numEccBytes, 15, &oobp[1],
+                        (eccVal >> 16) & 0xff);
+                NAND_BCM_UMI_ECC_WRITE(numEccBytes, 14, &oobp[2],
+                        (eccVal >> 8) & 0xff);
+                /* Write ECC in oob[3-15] */
+                NAND_BCM_UMI_ECC_WRITE(numEccBytes, 13, &oobp[3],
+                        eccVal & 0xff); /* ECC12 */
+                if (numEccBytes >= 9)
+                        eccVal = REG_UMI_BCH_WR_ECC_2;
+                NAND_BCM_UMI_ECC_WRITE(numEccBytes, 12, &oobp[4],
+                        (eccVal >> 24) & 0xff); /* ECC11 */
+                NAND_BCM_UMI_ECC_WRITE(numEccBytes, 11, &oobp[5],
+                        (eccVal >> 16) & 0xff); /* ECC10 */
+        }
+        /* Fill in the remainder of ECC locations */
+        NAND_BCM_UMI_ECC_WRITE(numEccBytes, 10, &oobp[6],
+                (eccVal >> 8) & 0xff);  /* ECC9 */
+        NAND_BCM_UMI_ECC_WRITE(numEccBytes, 9, &oobp[7],
+                eccVal & 0xff); /* ECC8 */
+        if (numEccBytes >= 5)
+                eccVal = REG_UMI_BCH_WR_ECC_1;
+        NAND_BCM_UMI_ECC_WRITE(numEccBytes, 8, &oobp[8],
+                (eccVal >> 24) & 0xff); /* ECC7 */
+        NAND_BCM_UMI_ECC_WRITE(numEccBytes, 7, &oobp[9],
+                (eccVal >> 16) & 0xff); /* ECC6 */
+        NAND_BCM_UMI_ECC_WRITE(numEccBytes, 6, &oobp[10],
+                (eccVal >> 8) & 0xff);  /* ECC5 */
+        NAND_BCM_UMI_ECC_WRITE(numEccBytes, 5, &oobp[11],
+                eccVal & 0xff); /* ECC4 */
+        if (numEccBytes >= 1)
+                eccVal = REG_UMI_BCH_WR_ECC_0;
+        NAND_BCM_UMI_ECC_WRITE(numEccBytes, 4, &oobp[12],
+                (eccVal >> 24) & 0xff); /* ECC3 */
+        NAND_BCM_UMI_ECC_WRITE(numEccBytes, 3, &oobp[13],
+                (eccVal >> 16) & 0xff); /* ECC2 */
+        NAND_BCM_UMI_ECC_WRITE(numEccBytes, 2, &oobp[14],
+                (eccVal >> 8) & 0xff);  /* ECC1 */
+        NAND_BCM_UMI_ECC_WRITE(numEccBytes, 1, &oobp[15],
+                eccVal & 0xff); /* ECC0 */
+}
+#endif
+#endif /* NAND_BCM_UMI_H */
diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/nand_ecc.c
index 92320a643275..271b8e735e8f 100644
--- a/drivers/mtd/nand/nand_ecc.c
+++ b/drivers/mtd/nand/nand_ecc.c
@@ -150,20 +150,19 @@ static const char addressbits[256] = {
 };
 /**
- * nand_calculate_ecc - [NAND Interface] Calculate 3-byte ECC for 256/512-byte
+ * __nand_calculate_ecc - [NAND Interface] Calculate 3-byte ECC for 256/512-byte
 *                       block
- * @mtd:        MTD block structure
 * @buf:        input buffer with raw data
+ * @eccsize:    data bytes per ecc step (256 or 512)
 * @code:       output buffer with ECC
 */
-int nand_calculate_ecc(struct mtd_info *mtd, const unsigned char *buf,
+void __nand_calculate_ecc(const unsigned char *buf, unsigned int eccsize,
                       unsigned char *code)
 {
        int i;
        const uint32_t *bp = (uint32_t *)buf;
        /* 256 or 512 bytes/ecc  */
-        const uint32_t eccsize_mult =
+        const uint32_t eccsize_mult = eccsize >> 8;
-                        (((struct nand_chip *)mtd->priv)->ecc.size) >> 8;
        uint32_t cur;           /* current value in buffer */
        /* rp0..rp15..rp17 are the various accumulated parities (per byte) */
        uint32_t rp0, rp1, rp2, rp3, rp4, rp5, rp6, rp7;
@@ -412,6 +411,22 @@ int nand_calculate_ecc(struct mtd_info *mtd, const unsigned char *buf,
                    (invparity[par & 0x55] << 2) |
                    (invparity[rp17] << 1) |
                    (invparity[rp16] << 0);
+}
+EXPORT_SYMBOL(__nand_calculate_ecc);
+/**
+ * nand_calculate_ecc - [NAND Interface] Calculate 3-byte ECC for 256/512-byte
+ *                       block
+ * @mtd:        MTD block structure
+ * @buf:        input buffer with raw data
+ * @code:       output buffer with ECC
+ */
+int nand_calculate_ecc(struct mtd_info *mtd, const unsigned char *buf,
+                       unsigned char *code)
+{
+        __nand_calculate_ecc(buf,
+                        ((struct nand_chip *)mtd->priv)->ecc.size, code);
        return 0;
 }
 EXPORT_SYMBOL(nand_calculate_ecc);
diff --git a/drivers/mtd/nand/nandsim.c b/drivers/mtd/nand/nandsim.c
index cd0711b83ac4..7281000fef2d 100644
--- a/drivers/mtd/nand/nandsim.c
+++ b/drivers/mtd/nand/nandsim.c
@@ -161,7 +161,7 @@ MODULE_PARM_DESC(overridesize,   "Specifies the NAND Flash size overriding the I
 MODULE_PARM_DESC(cache_file,     "File to use to cache nand pages instead of memory");
 /* The largest possible page size */
-#define NS_LARGEST_PAGE_SIZE    2048
+#define NS_LARGEST_PAGE_SIZE    4096
 /* The prefix for simulator output */
 #define NS_OUTPUT_PREFIX "[nandsim]"
@@ -259,7 +259,8 @@ MODULE_PARM_DESC(cache_file,     "File to use to cache nand pages instead of mem
 #define OPT_SMARTMEDIA   0x00000010 /* SmartMedia technology chips */
 #define OPT_AUTOINCR     0x00000020 /* page number auto inctimentation is possible */
 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
-#define OPT_LARGEPAGE    (OPT_PAGE2048) /* 2048-byte page chips */
+#define OPT_PAGE4096     0x00000080 /* 4096-byte page chips */
+#define OPT_LARGEPAGE    (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */
 #define OPT_SMALLPAGE    (OPT_PAGE256  | OPT_PAGE512)  /* 256 and 512-byte page chips */
 /* Remove action bits ftom state */
@@ -588,6 +589,8 @@ static int init_nandsim(struct mtd_info *mtd)
                        ns->options |= OPT_PAGE512_8BIT;
        } else if (ns->geom.pgsz == 2048) {
                ns->options |= OPT_PAGE2048;
+        } else if (ns->geom.pgsz == 4096) {
+                ns->options |= OPT_PAGE4096;
        } else {
                NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
                return -EIO;
diff --git a/drivers/mtd/nand/plat_nand.c b/drivers/mtd/nand/plat_nand.c
index 4e16c6f5bdd5..8d467315f02b 100644
--- a/drivers/mtd/nand/plat_nand.c
+++ b/drivers/mtd/nand/plat_nand.c
@@ -34,7 +34,12 @@ static int __devinit plat_nand_probe(struct platform_device *pdev)
 {
        struct platform_nand_data *pdata = pdev->dev.platform_data;
        struct plat_nand_data *data;
-        int res = 0;
+        struct resource *res;
+        int err = 0;
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res)
+                return -ENXIO;
        /* Allocate memory for the device structure (and zero it) */
        data = kzalloc(sizeof(struct plat_nand_data), GFP_KERNEL);
@@ -43,12 +48,18 @@ static int __devinit plat_nand_probe(struct platform_device *pdev)
                return -ENOMEM;
        }
-        data->io_base = ioremap(pdev->resource[0].start,
+        if (!request_mem_region(res->start, resource_size(res),
-                                pdev->resource[0].end - pdev->resource[0].start + 1);
+                                dev_name(&pdev->dev))) {
+                dev_err(&pdev->dev, "request_mem_region failed\n");
+                err = -EBUSY;
+                goto out_free;
+        }
+        data->io_base = ioremap(res->start, resource_size(res));
        if (data->io_base == NULL) {
                dev_err(&pdev->dev, "ioremap failed\n");
-                kfree(data);
+                err = -EIO;
-                return -EIO;
+                goto out_release_io;
        }
        data->chip.priv = &data;
@@ -74,24 +85,24 @@ static int __devinit plat_nand_probe(struct platform_device *pdev)
        /* Handle any platform specific setup */
        if (pdata->ctrl.probe) {
-                res = pdata->ctrl.probe(pdev);
+                err = pdata->ctrl.probe(pdev);
-                if (res)
+                if (err)
                        goto out;
        }
        /* Scan to find existance of the device */
        if (nand_scan(&data->mtd, 1)) {
-                res = -ENXIO;
+                err = -ENXIO;
                goto out;
        }
 #ifdef CONFIG_MTD_PARTITIONS
        if (pdata->chip.part_probe_types) {
-                res = parse_mtd_partitions(&data->mtd,
+                err = parse_mtd_partitions(&data->mtd,
                                        pdata->chip.part_probe_types,
                                        &data->parts, 0);
-                if (res > 0) {
+                if (err > 0) {
-                        add_mtd_partitions(&data->mtd, data->parts, res);
+                        add_mtd_partitions(&data->mtd, data->parts, err);
                        return 0;
                }
        }
@@ -99,14 +110,14 @@ static int __devinit plat_nand_probe(struct platform_device *pdev)
                pdata->chip.set_parts(data->mtd.size, &pdata->chip);
        if (pdata->chip.partitions) {
                data->parts = pdata->chip.partitions;
-                res = add_mtd_partitions(&data->mtd, data->parts,
+                err = add_mtd_partitions(&data->mtd, data->parts,
                        pdata->chip.nr_partitions);
        } else
 #endif
-        res = add_mtd_device(&data->mtd);
+        err = add_mtd_device(&data->mtd);
-        if (!res)
+        if (!err)
-                return res;
+                return err;
        nand_release(&data->mtd);
 out:
@@ -114,8 +125,11 @@ out:
                pdata->ctrl.remove(pdev);
        platform_set_drvdata(pdev, NULL);
        iounmap(data->io_base);
+out_release_io:
+        release_mem_region(res->start, resource_size(res));
+out_free:
        kfree(data);
-        return res;
+        return err;
 }
 /*
@@ -125,6 +139,9 @@ static int __devexit plat_nand_remove(struct platform_device *pdev)
 {
        struct plat_nand_data *data = platform_get_drvdata(pdev);
        struct platform_nand_data *pdata = pdev->dev.platform_data;
+        struct resource *res;
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        nand_release(&data->mtd);
 #ifdef CONFIG_MTD_PARTITIONS
@@ -134,6 +151,7 @@ static int __devexit plat_nand_remove(struct platform_device *pdev)
        if (pdata->ctrl.remove)
                pdata->ctrl.remove(pdev);
        iounmap(data->io_base);
+        release_mem_region(res->start, resource_size(res));
        kfree(data);
        return 0;
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 68b5b3a486a9..fa6e9c7fe511 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -774,7 +774,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
        chip->select_chip  = s3c2410_nand_select_chip;
        chip->chip_delay   = 50;
        chip->priv         = nmtd;
-        chip->options      = 0;
+        chip->options      = set->options;
        chip->controller   = &info->controller;
        switch (info->cpu_type) {
diff --git a/drivers/mtd/nand/txx9ndfmc.c b/drivers/mtd/nand/txx9ndfmc.c
index 73af8324d0d0..863513c3b69a 100644
--- a/drivers/mtd/nand/txx9ndfmc.c
+++ b/drivers/mtd/nand/txx9ndfmc.c
@@ -429,11 +429,10 @@ static int __exit txx9ndfmc_remove(struct platform_device *dev)
                chip = mtd->priv;
                txx9_priv = chip->priv;
+                nand_release(mtd);
 #ifdef CONFIG_MTD_PARTITIONS
-                del_mtd_partitions(mtd);
                kfree(drvdata->parts[i]);
 #endif
-                del_mtd_device(mtd);
                kfree(txx9_priv->mtdname);
                kfree(txx9_priv);
        }
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
index 86c4f6dcdc65..75f38b95811e 100644
--- a/drivers/mtd/onenand/omap2.c
+++ b/drivers/mtd/onenand/omap2.c
@@ -112,10 +112,24 @@ static int omap2_onenand_wait(struct mtd_info *mtd, int state)
        unsigned long timeout;
        u32 syscfg;
-        if (state == FL_RESETING) {
+        if (state == FL_RESETING || state == FL_PREPARING_ERASE ||
-                int i;
+            state == FL_VERIFYING_ERASE) {
+                int i = 21;
+                unsigned int intr_flags = ONENAND_INT_MASTER;
+                switch (state) {
+                case FL_RESETING:
+                        intr_flags |= ONENAND_INT_RESET;
+                        break;
+                case FL_PREPARING_ERASE:
+                        intr_flags |= ONENAND_INT_ERASE;
+                        break;
+                case FL_VERIFYING_ERASE:
+                        i = 101;
+                        break;
+                }
-                for (i = 0; i < 20; i++) {
+                while (--i) {
                        udelay(1);
                        intr = read_reg(c, ONENAND_REG_INTERRUPT);
                        if (intr & ONENAND_INT_MASTER)
@@ -126,7 +140,7 @@ static int omap2_onenand_wait(struct mtd_info *mtd, int state)
                        wait_err("controller error", state, ctrl, intr);
                        return -EIO;
                }
-                if (!(intr & ONENAND_INT_RESET)) {
+                if ((intr & intr_flags) != intr_flags) {
                        wait_err("timeout", state, ctrl, intr);
                        return -EIO;
                }
diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c
index ff66e4330aa7..f63b1db3ffb3 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -1,17 +1,19 @@
 /*
 *  linux/drivers/mtd/onenand/onenand_base.c
 *
- *  Copyright (C) 2005-2007 Samsung Electronics
+ *  Copyright © 2005-2009 Samsung Electronics
+ *  Copyright © 2007 Nokia Corporation
+ *
 *  Kyungmin Park <kyungmin.park@samsung.com>
 *
 *  Credits:
 *      Adrian Hunter <ext-adrian.hunter@nokia.com>:
 *      auto-placement support, read-while load support, various fixes
- *      Copyright (C) Nokia Corporation, 2007
 *
 *      Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
 *      Flex-OneNAND support
- *      Copyright (C) Samsung Electronics, 2008
+ *      Amul Kumar Saha <amul.saha at samsung.com>
+ *      OTP support
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
@@ -32,6 +34,13 @@
 #include <asm/io.h>
+/*
+ * Multiblock erase if number of blocks to erase is 2 or more.
+ * Maximum number of blocks for simultaneous erase is 64.
+ */
+#define MB_ERASE_MIN_BLK_COUNT 2
+#define MB_ERASE_MAX_BLK_COUNT 64
 /* Default Flex-OneNAND boundary and lock respectively */
 static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
@@ -43,6 +52,18 @@ MODULE_PARM_DESC(flex_bdry,	"SLC Boundary information for Flex-OneNAND"
                                "    : 0->Set boundary in unlocked status"
                                "    : 1->Set boundary in locked status");
+/* Default OneNAND/Flex-OneNAND OTP options*/
+static int otp;
+module_param(otp, int, 0400);
+MODULE_PARM_DESC(otp,   "Corresponding behaviour of OneNAND in OTP"
+                        "Syntax : otp=LOCK_TYPE"
+                        "LOCK_TYPE : Keys issued, for specific OTP Lock type"
+                        "          : 0 -> Default (No Blocks Locked)"
+                        "          : 1 -> OTP Block lock"
+                        "          : 2 -> 1st Block lock"
+                        "          : 3 -> BOTH OTP Block and 1st Block lock");
 /**
 *  onenand_oob_128 - oob info for Flex-Onenand with 4KB page
 *  For now, we expose only 64 out of 80 ecc bytes
@@ -339,6 +360,8 @@ static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t le
                break;
        case ONENAND_CMD_ERASE:
+        case ONENAND_CMD_MULTIBLOCK_ERASE:
+        case ONENAND_CMD_ERASE_VERIFY:
        case ONENAND_CMD_BUFFERRAM:
        case ONENAND_CMD_OTP_ACCESS:
                block = onenand_block(this, addr);
@@ -483,7 +506,7 @@ static int onenand_wait(struct mtd_info *mtd, int state)
                if (interrupt & flags)
                        break;
-                if (state != FL_READING)
+                if (state != FL_READING && state != FL_PREPARING_ERASE)
                        cond_resched();
        }
        /* To get correct interrupt status in timeout case */
@@ -500,25 +523,40 @@ static int onenand_wait(struct mtd_info *mtd, int state)
                int ecc = onenand_read_ecc(this);
                if (ecc) {
                        if (ecc & ONENAND_ECC_2BIT_ALL) {
-                                printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
+                                printk(KERN_ERR "%s: ECC error = 0x%04x\n",
+                                        __func__, ecc);
                                mtd->ecc_stats.failed++;
                                return -EBADMSG;
                        } else if (ecc & ONENAND_ECC_1BIT_ALL) {
-                                printk(KERN_DEBUG "onenand_wait: correctable ECC error = 0x%04x\n", ecc);
+                                printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n",
+                                        __func__, ecc);
                                mtd->ecc_stats.corrected++;
                        }
                }
        } else if (state == FL_READING) {
-                printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
+                printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
+                        __func__, ctrl, interrupt);
+                return -EIO;
+        }
+        if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) {
+                printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n",
+                       __func__, ctrl, interrupt);
+                return -EIO;
+        }
+        if (!(interrupt & ONENAND_INT_MASTER)) {
+                printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n",
+                       __func__, ctrl, interrupt);
                return -EIO;
        }
        /* If there's controller error, it's a real error */
        if (ctrl & ONENAND_CTRL_ERROR) {
-                printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n",
+                printk(KERN_ERR "%s: controller error = 0x%04x\n",
-                        ctrl);
+                        __func__, ctrl);
                if (ctrl & ONENAND_CTRL_LOCK)
-                        printk(KERN_ERR "onenand_wait: it's locked error.\n");
+                        printk(KERN_ERR "%s: it's locked error.\n", __func__);
                return -EIO;
        }
@@ -1015,7 +1053,8 @@ static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
        /* We are attempting to reread, so decrement stats.failed
         * which was incremented by onenand_wait due to read failure
         */
-        printk(KERN_INFO "onenand_recover_lsb: Attempting to recover from uncorrectable read\n");
+        printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n",
+                __func__);
        mtd->ecc_stats.failed--;
        /* Issue the LSB page recovery command */
@@ -1046,7 +1085,8 @@ static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,
        int ret = 0;
        int writesize = this->writesize;
-        DEBUG(MTD_DEBUG_LEVEL3, "onenand_mlc_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
+        DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
+              __func__, (unsigned int) from, (int) len);
        if (ops->mode == MTD_OOB_AUTO)
                oobsize = this->ecclayout->oobavail;
@@ -1057,7 +1097,8 @@ static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,
        /* Do not allow reads past end of device */
        if (from + len > mtd->size) {
-                printk(KERN_ERR "onenand_mlc_read_ops_nolock: Attempt read beyond end of device\n");
+                printk(KERN_ERR "%s: Attempt read beyond end of device\n",
+                        __func__);
                ops->retlen = 0;
                ops->oobretlen = 0;
                return -EINVAL;
@@ -1146,7 +1187,8 @@ static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
        int ret = 0, boundary = 0;
        int writesize = this->writesize;
-        DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
+        DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
+                        __func__, (unsigned int) from, (int) len);
        if (ops->mode == MTD_OOB_AUTO)
                oobsize = this->ecclayout->oobavail;
@@ -1157,7 +1199,8 @@ static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
        /* Do not allow reads past end of device */
        if ((from + len) > mtd->size) {
-                printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n");
+                printk(KERN_ERR "%s: Attempt read beyond end of device\n",
+                        __func__);
                ops->retlen = 0;
                ops->oobretlen = 0;
                return -EINVAL;
@@ -1275,7 +1318,8 @@ static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
        from += ops->ooboffs;
-        DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
+        DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
+                __func__, (unsigned int) from, (int) len);
        /* Initialize return length value */
        ops->oobretlen = 0;
@@ -1288,7 +1332,8 @@ static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
        column = from & (mtd->oobsize - 1);
        if (unlikely(column >= oobsize)) {
-                printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n");
+                printk(KERN_ERR "%s: Attempted to start read outside oob\n",
+                        __func__);
                return -EINVAL;
        }
@@ -1296,7 +1341,8 @@ static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
        if (unlikely(from >= mtd->size ||
                     column + len > ((mtd->size >> this->page_shift) -
                                     (from >> this->page_shift)) * oobsize)) {
-                printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n");
+                printk(KERN_ERR "%s: Attempted to read beyond end of device\n",
+                        __func__);
                return -EINVAL;
        }
@@ -1319,7 +1365,8 @@ static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
                        ret = onenand_recover_lsb(mtd, from, ret);
                if (ret && ret != -EBADMSG) {
-                        printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret);
+                        printk(KERN_ERR "%s: read failed = 0x%x\n",
+                                __func__, ret);
                        break;
                }
@@ -1450,20 +1497,21 @@ static int onenand_bbt_wait(struct mtd_info *mtd, int state)
        if (interrupt & ONENAND_INT_READ) {
                int ecc = onenand_read_ecc(this);
                if (ecc & ONENAND_ECC_2BIT_ALL) {
-                        printk(KERN_INFO "onenand_bbt_wait: ecc error = 0x%04x"
+                        printk(KERN_WARNING "%s: ecc error = 0x%04x, "
-                                ", controller error 0x%04x\n", ecc, ctrl);
+                                "controller error 0x%04x\n",
+                                __func__, ecc, ctrl);
                        return ONENAND_BBT_READ_ECC_ERROR;
                }
        } else {
-                printk(KERN_ERR "onenand_bbt_wait: read timeout!"
+                printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
-                        "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
+                        __func__, ctrl, interrupt);
                return ONENAND_BBT_READ_FATAL_ERROR;
        }
        /* Initial bad block case: 0x2400 or 0x0400 */
        if (ctrl & ONENAND_CTRL_ERROR) {
-                printk(KERN_DEBUG "onenand_bbt_wait: "
+                printk(KERN_DEBUG "%s: controller error = 0x%04x\n",
-                        "controller error = 0x%04x\n", ctrl);
+                        __func__, ctrl);
                return ONENAND_BBT_READ_ERROR;
        }
@@ -1487,14 +1535,16 @@ int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
        size_t len = ops->ooblen;
        u_char *buf = ops->oobbuf;
-        DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
+        DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %zi\n",
+                __func__, (unsigned int) from, len);
        /* Initialize return value */
        ops->oobretlen = 0;
        /* Do not allow reads past end of device */
        if (unlikely((from + len) > mtd->size)) {
-                printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
+                printk(KERN_ERR "%s: Attempt read beyond end of device\n",
+                        __func__);
                return ONENAND_BBT_READ_FATAL_ERROR;
        }
@@ -1661,21 +1711,23 @@ static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
        /* Wait for any existing operation to clear */
        onenand_panic_wait(mtd);
-        DEBUG(MTD_DEBUG_LEVEL3, "onenand_panic_write: to = 0x%08x, len = %i\n",
+        DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
-              (unsigned int) to, (int) len);
+                __func__, (unsigned int) to, (int) len);
        /* Initialize retlen, in case of early exit */
        *retlen = 0;
        /* Do not allow writes past end of device */
        if (unlikely((to + len) > mtd->size)) {
-                printk(KERN_ERR "onenand_panic_write: Attempt write to past end of device\n");
+                printk(KERN_ERR "%s: Attempt write to past end of device\n",
+                        __func__);
                return -EINVAL;
        }
        /* Reject writes, which are not page aligned */
        if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
-                printk(KERN_ERR "onenand_panic_write: Attempt to write not page aligned data\n");
+                printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
+                        __func__);
                return -EINVAL;
        }
@@ -1711,7 +1763,7 @@ static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
                }
                if (ret) {
-                        printk(KERN_ERR "onenand_panic_write: write failed %d\n", ret);
+                        printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
                        break;
                }
@@ -1792,7 +1844,8 @@ static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
        u_char *oobbuf;
        int ret = 0;
-        DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
+        DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
+                __func__, (unsigned int) to, (int) len);
        /* Initialize retlen, in case of early exit */
        ops->retlen = 0;
@@ -1800,13 +1853,15 @@ static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
        /* Do not allow writes past end of device */
        if (unlikely((to + len) > mtd->size)) {
-                printk(KERN_ERR "onenand_write_ops_nolock: Attempt write to past end of device\n");
+                printk(KERN_ERR "%s: Attempt write to past end of device\n",
+                        __func__);
                return -EINVAL;
        }
        /* Reject writes, which are not page aligned */
        if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
-                printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n");
+                printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
+                        __func__);
                return -EINVAL;
        }
@@ -1879,7 +1934,8 @@ static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
                        onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
                        if (ret) {
                                written -= prevlen;
-                                printk(KERN_ERR "onenand_write_ops_nolock: write failed %d\n", ret);
+                                printk(KERN_ERR "%s: write failed %d\n",
+                                        __func__, ret);
                                break;
                        }
@@ -1887,7 +1943,8 @@ static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
                                /* Only check verify write turn on */
                                ret = onenand_verify(mtd, buf - len, to - len, len);
                                if (ret)
-                                        printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
+                                        printk(KERN_ERR "%s: verify failed %d\n",
+                                                __func__, ret);
                                break;
                        }
@@ -1905,14 +1962,16 @@ static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
                        /* In partial page write we don't update bufferram */
                        onenand_update_bufferram(mtd, to, !ret && !subpage);
                        if (ret) {
-                                printk(KERN_ERR "onenand_write_ops_nolock: write failed %d\n", ret);
+                                printk(KERN_ERR "%s: write failed %d\n",
+                                        __func__, ret);
                                break;
                        }
                        /* Only check verify write turn on */
                        ret = onenand_verify(mtd, buf, to, thislen);
                        if (ret) {
-                                printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
+                                printk(KERN_ERR "%s: verify failed %d\n",
+                                        __func__, ret);
                                break;
                        }
@@ -1968,7 +2027,8 @@ static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
        to += ops->ooboffs;
-        DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
+        DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
+                __func__, (unsigned int) to, (int) len);
        /* Initialize retlen, in case of early exit */
        ops->oobretlen = 0;
@@ -1981,14 +2041,15 @@ static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
        column = to & (mtd->oobsize - 1);
        if (unlikely(column >= oobsize)) {
-                printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n");
+                printk(KERN_ERR "%s: Attempted to start write outside oob\n",
+                        __func__);
                return -EINVAL;
        }
        /* For compatibility with NAND: Do not allow write past end of page */
        if (unlikely(column + len > oobsize)) {
-                printk(KERN_ERR "onenand_write_oob_nolock: "
+                printk(KERN_ERR "%s: Attempt to write past end of page\n",
-                      "Attempt to write past end of page\n");
+                        __func__);
                return -EINVAL;
        }
@@ -1996,7 +2057,8 @@ static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
        if (unlikely(to >= mtd->size ||
                     column + len > ((mtd->size >> this->page_shift) -
                                     (to >> this->page_shift)) * oobsize)) {
-                printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n");
+                printk(KERN_ERR "%s: Attempted to write past end of device\n",
+                       __func__);
                return -EINVAL;
        }
@@ -2038,13 +2100,14 @@ static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
                ret = this->wait(mtd, FL_WRITING);
                if (ret) {
-                        printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret);
+                        printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
                        break;
                }
                ret = onenand_verify_oob(mtd, oobbuf, to);
                if (ret) {
-                        printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret);
+                        printk(KERN_ERR "%s: verify failed %d\n",
+                                __func__, ret);
                        break;
                }
@@ -2140,78 +2203,186 @@ static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allo
        return bbm->isbad_bbt(mtd, ofs, allowbbt);
 }
+static int onenand_multiblock_erase_verify(struct mtd_info *mtd,
+                                           struct erase_info *instr)
+{
+        struct onenand_chip *this = mtd->priv;
+        loff_t addr = instr->addr;
+        int len = instr->len;
+        unsigned int block_size = (1 << this->erase_shift);
+        int ret = 0;
+        while (len) {
+                this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size);
+                ret = this->wait(mtd, FL_VERIFYING_ERASE);
+                if (ret) {
+                        printk(KERN_ERR "%s: Failed verify, block %d\n",
+                               __func__, onenand_block(this, addr));
+                        instr->state = MTD_ERASE_FAILED;
+                        instr->fail_addr = addr;
+                        return -1;
+                }
+                len -= block_size;
+                addr += block_size;
+        }
+        return 0;
+}
 /**
- * onenand_erase - [MTD Interface] erase block(s)
+ * onenand_multiblock_erase - [Internal] erase block(s) using multiblock erase
 * @param mtd           MTD device structure
 * @param instr         erase instruction
+ * @param region        erase region
 *
- * Erase one ore more blocks
+ * Erase one or more blocks up to 64 block at a time
 */
-static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
+static int onenand_multiblock_erase(struct mtd_info *mtd,
+                                    struct erase_info *instr,
+                                    unsigned int block_size)
 {
        struct onenand_chip *this = mtd->priv;
-        unsigned int block_size;
        loff_t addr = instr->addr;
-        loff_t len = instr->len;
+        int len = instr->len;
-        int ret = 0, i;
+        int eb_count = 0;
-        struct mtd_erase_region_info *region = NULL;
+        int ret = 0;
-        loff_t region_end = 0;
+        int bdry_block = 0;
-        DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%012llx, len = %llu\n", (unsigned long long) instr->addr, (unsigned long long) instr->len);
+        instr->state = MTD_ERASING;
-        /* Do not allow erase past end of device */
+        if (ONENAND_IS_DDP(this)) {
-        if (unlikely((len + addr) > mtd->size)) {
+                loff_t bdry_addr = this->chipsize >> 1;
-                printk(KERN_ERR "onenand_erase: Erase past end of device\n");
+                if (addr < bdry_addr && (addr + len) > bdry_addr)
-                return -EINVAL;
+                        bdry_block = bdry_addr >> this->erase_shift;
        }
-        if (FLEXONENAND(this)) {
+        /* Pre-check bbs */
-                /* Find the eraseregion of this address */
+        while (len) {
-                i = flexonenand_region(mtd, addr);
+                /* Check if we have a bad block, we do not erase bad blocks */
-                region = &mtd->eraseregions[i];
+                if (onenand_block_isbad_nolock(mtd, addr, 0)) {
+                        printk(KERN_WARNING "%s: attempt to erase a bad block "
+                               "at addr 0x%012llx\n",
+                               __func__, (unsigned long long) addr);
+                        instr->state = MTD_ERASE_FAILED;
+                        return -EIO;
+                }
+                len -= block_size;
+                addr += block_size;
+        }
-                block_size = region->erasesize;
+        len = instr->len;
-                region_end = region->offset + region->erasesize * region->numblocks;
+        addr = instr->addr;
-                /* Start address within region must align on block boundary.
+        /* loop over 64 eb batches */
-                 * Erase region's start offset is always block start address.
+        while (len) {
-                 */
+                struct erase_info verify_instr = *instr;
-                if (unlikely((addr - region->offset) & (block_size - 1))) {
+                int max_eb_count = MB_ERASE_MAX_BLK_COUNT;
-                        printk(KERN_ERR "onenand_erase: Unaligned address\n");
-                        return -EINVAL;
+                verify_instr.addr = addr;
+                verify_instr.len = 0;
+                /* do not cross chip boundary */
+                if (bdry_block) {
+                        int this_block = (addr >> this->erase_shift);
+                        if (this_block < bdry_block) {
+                                max_eb_count = min(max_eb_count,
+                                                   (bdry_block - this_block));
+                        }
                }
-        } else {
-                block_size = 1 << this->erase_shift;
-                /* Start address must align on block boundary */
+                eb_count = 0;
-                if (unlikely(addr & (block_size - 1))) {
-                        printk(KERN_ERR "onenand_erase: Unaligned address\n");
+                while (len > block_size && eb_count < (max_eb_count - 1)) {
-                        return -EINVAL;
+                        this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE,
+                                      addr, block_size);
+                        onenand_invalidate_bufferram(mtd, addr, block_size);
+                        ret = this->wait(mtd, FL_PREPARING_ERASE);
+                        if (ret) {
+                                printk(KERN_ERR "%s: Failed multiblock erase, "
+                                       "block %d\n", __func__,
+                                       onenand_block(this, addr));
+                                instr->state = MTD_ERASE_FAILED;
+                                instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
+                                return -EIO;
+                        }
+                        len -= block_size;
+                        addr += block_size;
+                        eb_count++;
+                }
+                /* last block of 64-eb series */
+                cond_resched();
+                this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
+                onenand_invalidate_bufferram(mtd, addr, block_size);
+                ret = this->wait(mtd, FL_ERASING);
+                /* Check if it is write protected */
+                if (ret) {
+                        printk(KERN_ERR "%s: Failed erase, block %d\n",
+                               __func__, onenand_block(this, addr));
+                        instr->state = MTD_ERASE_FAILED;
+                        instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
+                        return -EIO;
+                }
+                len -= block_size;
+                addr += block_size;
+                eb_count++;
+                /* verify */
+                verify_instr.len = eb_count * block_size;
+                if (onenand_multiblock_erase_verify(mtd, &verify_instr)) {
+                        instr->state = verify_instr.state;
+                        instr->fail_addr = verify_instr.fail_addr;
+                        return -EIO;
                }
-        }
-        /* Length must align on block boundary */
-        if (unlikely(len & (block_size - 1))) {
-                printk(KERN_ERR "onenand_erase: Length not block aligned\n");
-                return -EINVAL;
        }
+        return 0;
+}
-        instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
-        /* Grab the lock and see if the device is available */
+/**
-        onenand_get_device(mtd, FL_ERASING);
+ * onenand_block_by_block_erase - [Internal] erase block(s) using regular erase
+ * @param mtd           MTD device structure
+ * @param instr         erase instruction
+ * @param region        erase region
+ * @param block_size    erase block size
+ *
+ * Erase one or more blocks one block at a time
+ */
+static int onenand_block_by_block_erase(struct mtd_info *mtd,
+                                        struct erase_info *instr,
+                                        struct mtd_erase_region_info *region,
+                                        unsigned int block_size)
+{
+        struct onenand_chip *this = mtd->priv;
+        loff_t addr = instr->addr;
+        int len = instr->len;
+        loff_t region_end = 0;
+        int ret = 0;
+        if (region) {
+                /* region is set for Flex-OneNAND */
+                region_end = region->offset + region->erasesize * region->numblocks;
+        }
-        /* Loop through the blocks */
        instr->state = MTD_ERASING;
+        /* Loop through the blocks */
        while (len) {
                cond_resched();
                /* Check if we have a bad block, we do not erase bad blocks */
                if (onenand_block_isbad_nolock(mtd, addr, 0)) {
-                        printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%012llx\n", (unsigned long long) addr);
+                        printk(KERN_WARNING "%s: attempt to erase a bad block "
+                                        "at addr 0x%012llx\n",
+                                        __func__, (unsigned long long) addr);
                        instr->state = MTD_ERASE_FAILED;
-                        goto erase_exit;
+                        return -EIO;
                }
                this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
@@ -2221,11 +2392,11 @@ static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
                ret = this->wait(mtd, FL_ERASING);
                /* Check, if it is write protected */
                if (ret) {
-                        printk(KERN_ERR "onenand_erase: Failed erase, block %d\n",
+                        printk(KERN_ERR "%s: Failed erase, block %d\n",
-                                                 onenand_block(this, addr));
+                                __func__, onenand_block(this, addr));
                        instr->state = MTD_ERASE_FAILED;
                        instr->fail_addr = addr;
-                        goto erase_exit;
+                        return -EIO;
                }
                len -= block_size;
@@ -2241,25 +2412,88 @@ static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
                        if (len & (block_size - 1)) {
                                /* FIXME: This should be handled at MTD partitioning level. */
-                                printk(KERN_ERR "onenand_erase: Unaligned address\n");
+                                printk(KERN_ERR "%s: Unaligned address\n",
-                                goto erase_exit;
+                                        __func__);
+                                return -EIO;
                        }
                }
+        }
+        return 0;
+}
+/**
+ * onenand_erase - [MTD Interface] erase block(s)
+ * @param mtd           MTD device structure
+ * @param instr         erase instruction
+ *
+ * Erase one or more blocks
+ */
+static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
+{
+        struct onenand_chip *this = mtd->priv;
+        unsigned int block_size;
+        loff_t addr = instr->addr;
+        loff_t len = instr->len;
+        int ret = 0;
+        struct mtd_erase_region_info *region = NULL;
+        loff_t region_offset = 0;
+        DEBUG(MTD_DEBUG_LEVEL3, "%s: start=0x%012llx, len=%llu\n", __func__,
+              (unsigned long long) instr->addr, (unsigned long long) instr->len);
+        /* Do not allow erase past end of device */
+        if (unlikely((len + addr) > mtd->size)) {
+                printk(KERN_ERR "%s: Erase past end of device\n", __func__);
+                return -EINVAL;
+        }
+        if (FLEXONENAND(this)) {
+                /* Find the eraseregion of this address */
+                int i = flexonenand_region(mtd, addr);
+                region = &mtd->eraseregions[i];
+                block_size = region->erasesize;
+                /* Start address within region must align on block boundary.
+                 * Erase region's start offset is always block start address.
+                 */
+                region_offset = region->offset;
+        } else
+                block_size = 1 << this->erase_shift;
+        /* Start address must align on block boundary */
+        if (unlikely((addr - region_offset) & (block_size - 1))) {
+                printk(KERN_ERR "%s: Unaligned address\n", __func__);
+                return -EINVAL;
+        }
+        /* Length must align on block boundary */
+        if (unlikely(len & (block_size - 1))) {
+                printk(KERN_ERR "%s: Length not block aligned\n", __func__);
+                return -EINVAL;
        }
-        instr->state = MTD_ERASE_DONE;
+        instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
-erase_exit:
+        /* Grab the lock and see if the device is available */
+        onenand_get_device(mtd, FL_ERASING);
-        ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
+        if (region || instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) {
+                /* region is set for Flex-OneNAND (no mb erase) */
+                ret = onenand_block_by_block_erase(mtd, instr,
+                                                   region, block_size);
+        } else {
+                ret = onenand_multiblock_erase(mtd, instr, block_size);
+        }
        /* Deselect and wake up anyone waiting on the device */
        onenand_release_device(mtd);
        /* Do call back function */
-        if (!ret)
+        if (!ret) {
+                instr->state = MTD_ERASE_DONE;
                mtd_erase_callback(instr);
+        }
        return ret;
 }
@@ -2272,7 +2506,7 @@ erase_exit:
 */
 static void onenand_sync(struct mtd_info *mtd)
 {
-        DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
+        DEBUG(MTD_DEBUG_LEVEL3, "%s: called\n", __func__);
        /* Grab the lock and see if the device is available */
        onenand_get_device(mtd, FL_SYNCING);
@@ -2406,7 +2640,8 @@ static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int
                /* Check lock status */
                status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
                if (!(status & wp_status_mask))
-                        printk(KERN_ERR "wp status = 0x%x\n", status);
+                        printk(KERN_ERR "%s: wp status = 0x%x\n",
+                                __func__, status);
                return 0;
        }
@@ -2435,7 +2670,8 @@ static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int
                /* Check lock status */
                status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
                if (!(status & wp_status_mask))
-                        printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
+                        printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
+                                __func__, block, status);
        }
        return 0;
@@ -2502,7 +2738,8 @@ static int onenand_check_lock_status(struct onenand_chip *this)
                /* Check lock status */
                status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
                if (!(status & ONENAND_WP_US)) {
-                        printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
+                        printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
+                                __func__, block, status);
                        return 0;
                }
        }
@@ -2557,6 +2794,208 @@ static void onenand_unlock_all(struct mtd_info *mtd)
 #ifdef CONFIG_MTD_ONENAND_OTP
+/**
+ * onenand_otp_command - Send OTP specific command to OneNAND device
+ * @param mtd    MTD device structure
+ * @param cmd    the command to be sent
+ * @param addr   offset to read from or write to
+ * @param len    number of bytes to read or write
+ */
+static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr,
+                                size_t len)
+{
+        struct onenand_chip *this = mtd->priv;
+        int value, block, page;
+        /* Address translation */
+        switch (cmd) {
+        case ONENAND_CMD_OTP_ACCESS:
+                block = (int) (addr >> this->erase_shift);
+                page = -1;
+                break;
+        default:
+                block = (int) (addr >> this->erase_shift);
+                page = (int) (addr >> this->page_shift);
+                if (ONENAND_IS_2PLANE(this)) {
+                        /* Make the even block number */
+                        block &= ~1;
+                        /* Is it the odd plane? */
+                        if (addr & this->writesize)
+                                block++;
+                        page >>= 1;
+                }
+                page &= this->page_mask;
+                break;
+        }
+        if (block != -1) {
+                /* Write 'DFS, FBA' of Flash */
+                value = onenand_block_address(this, block);
+                this->write_word(value, this->base +
+                                ONENAND_REG_START_ADDRESS1);
+        }
+        if (page != -1) {
+                /* Now we use page size operation */
+                int sectors = 4, count = 4;
+                int dataram;
+                switch (cmd) {
+                default:
+                        if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
+                                cmd = ONENAND_CMD_2X_PROG;
+                        dataram = ONENAND_CURRENT_BUFFERRAM(this);
+                        break;
+                }
+                /* Write 'FPA, FSA' of Flash */
+                value = onenand_page_address(page, sectors);
+                this->write_word(value, this->base +
+                                ONENAND_REG_START_ADDRESS8);
+                /* Write 'BSA, BSC' of DataRAM */
+                value = onenand_buffer_address(dataram, sectors, count);
+                this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
+        }
+        /* Interrupt clear */
+        this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
+        /* Write command */
+        this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
+        return 0;
+}
+/**
+ * onenand_otp_write_oob_nolock - [Internal] OneNAND write out-of-band, specific to OTP
+ * @param mtd           MTD device structure
+ * @param to            offset to write to
+ * @param len           number of bytes to write
+ * @param retlen        pointer to variable to store the number of written bytes
+ * @param buf           the data to write
+ *
+ * OneNAND write out-of-band only for OTP
+ */
+static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to,
+                                    struct mtd_oob_ops *ops)
+{
+        struct onenand_chip *this = mtd->priv;
+        int column, ret = 0, oobsize;
+        int written = 0;
+        u_char *oobbuf;
+        size_t len = ops->ooblen;
+        const u_char *buf = ops->oobbuf;
+        int block, value, status;
+        to += ops->ooboffs;
+        /* Initialize retlen, in case of early exit */
+        ops->oobretlen = 0;
+        oobsize = mtd->oobsize;
+        column = to & (mtd->oobsize - 1);
+        oobbuf = this->oob_buf;
+        /* Loop until all data write */
+        while (written < len) {
+                int thislen = min_t(int, oobsize, len - written);
+                cond_resched();
+                block = (int) (to >> this->erase_shift);
+                /*
+                 * Write 'DFS, FBA' of Flash
+                 * Add: F100h DQ=DFS, FBA
+                 */
+                value = onenand_block_address(this, block);
+                this->write_word(value, this->base +
+                                ONENAND_REG_START_ADDRESS1);
+                /*
+                 * Select DataRAM for DDP
+                 * Add: F101h DQ=DBS
+                 */
+                value = onenand_bufferram_address(this, block);
+                this->write_word(value, this->base +
+                                ONENAND_REG_START_ADDRESS2);
+                ONENAND_SET_NEXT_BUFFERRAM(this);
+                /*
+                 * Enter OTP access mode
+                 */
+                this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
+                this->wait(mtd, FL_OTPING);
+                /* We send data to spare ram with oobsize
+                 * to prevent byte access */
+                memcpy(oobbuf + column, buf, thislen);
+                /*
+                 * Write Data into DataRAM
+                 * Add: 8th Word
+                 * in sector0/spare/page0
+                 * DQ=XXFCh
+                 */
+                this->write_bufferram(mtd, ONENAND_SPARERAM,
+                                        oobbuf, 0, mtd->oobsize);
+                onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
+                onenand_update_bufferram(mtd, to, 0);
+                if (ONENAND_IS_2PLANE(this)) {
+                        ONENAND_SET_BUFFERRAM1(this);
+                        onenand_update_bufferram(mtd, to + this->writesize, 0);
+                }
+                ret = this->wait(mtd, FL_WRITING);
+                if (ret) {
+                        printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
+                        break;
+                }
+                /* Exit OTP access mode */
+                this->command(mtd, ONENAND_CMD_RESET, 0, 0);
+                this->wait(mtd, FL_RESETING);
+                status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
+                status &= 0x60;
+                if (status == 0x60) {
+                        printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
+                        printk(KERN_DEBUG "1st Block\tLOCKED\n");
+                        printk(KERN_DEBUG "OTP Block\tLOCKED\n");
+                } else if (status == 0x20) {
+                        printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
+                        printk(KERN_DEBUG "1st Block\tLOCKED\n");
+                        printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n");
+                } else if (status == 0x40) {
+                        printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
+                        printk(KERN_DEBUG "1st Block\tUN-LOCKED\n");
+                        printk(KERN_DEBUG "OTP Block\tLOCKED\n");
+                } else {
+                        printk(KERN_DEBUG "Reboot to check\n");
+                }
+                written += thislen;
+                if (written == len)
+                        break;
+                to += mtd->writesize;
+                buf += thislen;
+                column = 0;
+        }
+        ops->oobretlen = written;
+        return ret;
+}
 /* Internal OTP operation */
 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
                size_t *retlen, u_char *buf);
@@ -2659,11 +3098,11 @@ static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
        struct mtd_oob_ops ops;
        int ret;
-        /* Enter OTP access mode */
-        this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
-        this->wait(mtd, FL_OTPING);
        if (FLEXONENAND(this)) {
+                /* Enter OTP access mode */
+                this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
+                this->wait(mtd, FL_OTPING);
                /*
                 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
                 * main area of page 49.
@@ -2674,19 +3113,19 @@ static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
                ops.oobbuf = NULL;
                ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops);
                *retlen = ops.retlen;
+                /* Exit OTP access mode */
+                this->command(mtd, ONENAND_CMD_RESET, 0, 0);
+                this->wait(mtd, FL_RESETING);
        } else {
                ops.mode = MTD_OOB_PLACE;
                ops.ooblen = len;
                ops.oobbuf = buf;
                ops.ooboffs = 0;
-                ret = onenand_write_oob_nolock(mtd, from, &ops);
+                ret = onenand_otp_write_oob_nolock(mtd, from, &ops);
                *retlen = ops.oobretlen;
        }
-        /* Exit OTP access mode */
-        this->command(mtd, ONENAND_CMD_RESET, 0, 0);
-        this->wait(mtd, FL_RESETING);
        return ret;
 }
@@ -2717,16 +3156,21 @@ static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
        if (density < ONENAND_DEVICE_DENSITY_512Mb)
                otp_pages = 20;
        else
-                otp_pages = 10;
+                otp_pages = 50;
        if (mode == MTD_OTP_FACTORY) {
                from += mtd->writesize * otp_pages;
-                otp_pages = 64 - otp_pages;
+                otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages;
        }
        /* Check User/Factory boundary */
-        if (((mtd->writesize * otp_pages) - (from + len)) < 0)
+        if (mode == MTD_OTP_USER) {
-                return 0;
+                if (mtd->writesize * otp_pages < from + len)
+                        return 0;
+        } else {
+                if (mtd->writesize * otp_pages <  len)
+                        return 0;
+        }
        onenand_get_device(mtd, FL_OTPING);
        while (len > 0 && otp_pages > 0) {
@@ -2749,13 +3193,12 @@ static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
                        *retlen += sizeof(struct otp_info);
                } else {
                        size_t tmp_retlen;
-                        int size = len;
                        ret = action(mtd, from, len, &tmp_retlen, buf);
-                        buf += size;
+                        buf += tmp_retlen;
-                        len -= size;
+                        len -= tmp_retlen;
-                        *retlen += size;
+                        *retlen += tmp_retlen;
                        if (ret)
                                break;
@@ -2868,21 +3311,11 @@ static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
        u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf;
        size_t retlen;
        int ret;
+        unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET;
        memset(buf, 0xff, FLEXONENAND(this) ? this->writesize
                                                 : mtd->oobsize);
        /*
-         * Note: OTP lock operation
-         *       OTP block : 0xXXFC
-         *       1st block : 0xXXF3 (If chip support)
-         *       Both      : 0xXXF0 (If chip support)
-         */
-        if (FLEXONENAND(this))
-                buf[FLEXONENAND_OTP_LOCK_OFFSET] = 0xFC;
-        else
-                buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
-        /*
         * Write lock mark to 8th word of sector0 of page0 of the spare0.
         * We write 16 bytes spare area instead of 2 bytes.
         * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
@@ -2892,10 +3325,30 @@ static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
        from = 0;
        len = FLEXONENAND(this) ? mtd->writesize : 16;
+        /*
+         * Note: OTP lock operation
+         *       OTP block : 0xXXFC                     XX 1111 1100
+         *       1st block : 0xXXF3 (If chip support)   XX 1111 0011
+         *       Both      : 0xXXF0 (If chip support)   XX 1111 0000
+         */
+        if (FLEXONENAND(this))
+                otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET;
+        /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */
+        if (otp == 1)
+                buf[otp_lock_offset] = 0xFC;
+        else if (otp == 2)
+                buf[otp_lock_offset] = 0xF3;
+        else if (otp == 3)
+                buf[otp_lock_offset] = 0xF0;
+        else if (otp != 0)
+                printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n");
        ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER);
        return ret ? : retlen;
 }
 #endif  /* CONFIG_MTD_ONENAND_OTP */
 /**
@@ -3172,7 +3625,8 @@ static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int
                                break;
                if (i != mtd->oobsize) {
-                        printk(KERN_WARNING "Block %d not erased.\n", block);
+                        printk(KERN_WARNING "%s: Block %d not erased.\n",
+                                __func__, block);
                        return 1;
                }
        }
@@ -3204,8 +3658,8 @@ int flexonenand_set_boundary(struct mtd_info *mtd, int die,
        blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
        if (boundary >= blksperdie) {
-                printk(KERN_ERR "flexonenand_set_boundary: Invalid boundary value. "
+                printk(KERN_ERR "%s: Invalid boundary value. "
-                                "Boundary not changed.\n");
+                                "Boundary not changed.\n", __func__);
                return -EINVAL;
        }
@@ -3214,7 +3668,8 @@ int flexonenand_set_boundary(struct mtd_info *mtd, int die,
        new = boundary + (die * this->density_mask);
        ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new));
        if (ret) {
-                printk(KERN_ERR "flexonenand_set_boundary: Please erase blocks before boundary change\n");
+                printk(KERN_ERR "%s: Please erase blocks "
+                                "before boundary change\n", __func__);
                return ret;
        }
@@ -3227,12 +3682,12 @@ int flexonenand_set_boundary(struct mtd_info *mtd, int die,
        thisboundary = this->read_word(this->base + ONENAND_DATARAM);
        if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) {
-                printk(KERN_ERR "flexonenand_set_boundary: boundary locked\n");
+                printk(KERN_ERR "%s: boundary locked\n", __func__);
                ret = 1;
                goto out;
        }
-        printk(KERN_INFO "flexonenand_set_boundary: Changing die %d boundary: %d%s\n",
+        printk(KERN_INFO "Changing die %d boundary: %d%s\n",
                        die, boundary, lock ? "(Locked)" : "(Unlocked)");
        addr = die ? this->diesize[0] : 0;
@@ -3243,7 +3698,8 @@ int flexonenand_set_boundary(struct mtd_info *mtd, int die,
        this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
        ret = this->wait(mtd, FL_ERASING);
        if (ret) {
-                printk(KERN_ERR "flexonenand_set_boundary: Failed PI erase for Die %d\n", die);
+                printk(KERN_ERR "%s: Failed PI erase for Die %d\n",
+                       __func__, die);
                goto out;
        }
@@ -3251,7 +3707,8 @@ int flexonenand_set_boundary(struct mtd_info *mtd, int die,
        this->command(mtd, ONENAND_CMD_PROG, addr, 0);
        ret = this->wait(mtd, FL_WRITING);
        if (ret) {
-                printk(KERN_ERR "flexonenand_set_boundary: Failed PI write for Die %d\n", die);
+                printk(KERN_ERR "%s: Failed PI write for Die %d\n",
+                        __func__, die);
                goto out;
        }
@@ -3408,8 +3865,8 @@ static void onenand_resume(struct mtd_info *mtd)
        if (this->state == FL_PM_SUSPENDED)
                onenand_release_device(mtd);
        else
-                printk(KERN_ERR "resume() called for the chip which is not"
+                printk(KERN_ERR "%s: resume() called for the chip which is not "
-                                "in suspended state\n");
+                                "in suspended state\n", __func__);
 }
 /**
@@ -3464,7 +3921,8 @@ int onenand_scan(struct mtd_info *mtd, int maxchips)
        if (!this->page_buf) {
                this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
                if (!this->page_buf) {
-                        printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
+                        printk(KERN_ERR "%s: Can't allocate page_buf\n",
+                                __func__);
                        return -ENOMEM;
                }
                this->options |= ONENAND_PAGEBUF_ALLOC;
@@ -3472,7 +3930,8 @@ int onenand_scan(struct mtd_info *mtd, int maxchips)
        if (!this->oob_buf) {
                this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
                if (!this->oob_buf) {
-                        printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n");
+                        printk(KERN_ERR "%s: Can't allocate oob_buf\n",
+                                __func__);
                        if (this->options & ONENAND_PAGEBUF_ALLOC) {
                                this->options &= ~ONENAND_PAGEBUF_ALLOC;
                                kfree(this->page_buf);
@@ -3505,8 +3964,8 @@ int onenand_scan(struct mtd_info *mtd, int maxchips)
                break;
        default:
-                printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
+                printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n",
-                        mtd->oobsize);
+                        __func__, mtd->oobsize);
                mtd->subpage_sft = 0;
                /* To prevent kernel oops */
                this->ecclayout = &onenand_oob_32;
diff --git a/drivers/mtd/tests/Makefile b/drivers/mtd/tests/Makefile
index c1d501335006..b44dcab940d8 100644
--- a/drivers/mtd/tests/Makefile
+++ b/drivers/mtd/tests/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_MTD_TESTS) += mtd_speedtest.o
 obj-$(CONFIG_MTD_TESTS) += mtd_stresstest.o
 obj-$(CONFIG_MTD_TESTS) += mtd_subpagetest.o
 obj-$(CONFIG_MTD_TESTS) += mtd_torturetest.o
+obj-$(CONFIG_MTD_TESTS) += mtd_nandecctest.o
diff --git a/drivers/mtd/tests/mtd_nandecctest.c b/drivers/mtd/tests/mtd_nandecctest.c
new file mode 100644
index 000000000000..c1f31051784c
--- /dev/null
+++ b/drivers/mtd/tests/mtd_nandecctest.c
@@ -0,0 +1,87 @@
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/string.h>
+#include <linux/bitops.h>
+#include <linux/jiffies.h>
+#include <linux/mtd/nand_ecc.h>
+#if defined(CONFIG_MTD_NAND) || defined(CONFIG_MTD_NAND_MODULE)
+static void inject_single_bit_error(void *data, size_t size)
+{
+        unsigned long offset = random32() % (size * BITS_PER_BYTE);
+        __change_bit(offset, data);
+}
+static unsigned char data[512];
+static unsigned char error_data[512];
+static int nand_ecc_test(const size_t size)
+{
+        unsigned char code[3];
+        unsigned char error_code[3];
+        char testname[30];
+        BUG_ON(sizeof(data) < size);
+        sprintf(testname, "nand-ecc-%zu", size);
+        get_random_bytes(data, size);
+        memcpy(error_data, data, size);
+        inject_single_bit_error(error_data, size);
+        __nand_calculate_ecc(data, size, code);
+        __nand_calculate_ecc(error_data, size, error_code);
+        __nand_correct_data(error_data, code, error_code, size);
+        if (!memcmp(data, error_data, size)) {
+                printk(KERN_INFO "mtd_nandecctest: ok - %s\n", testname);
+                return 0;
+        }
+        printk(KERN_ERR "mtd_nandecctest: not ok - %s\n", testname);
+        printk(KERN_DEBUG "hexdump of data:\n");
+        print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 16, 4,
+                        data, size, false);
+        printk(KERN_DEBUG "hexdump of error data:\n");
+        print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 16, 4,
+                        error_data, size, false);
+        return -1;
+}
+#else
+static int nand_ecc_test(const size_t size)
+{
+        return 0;
+}
+#endif
+static int __init ecc_test_init(void)
+{
+        srandom32(jiffies);
+        nand_ecc_test(256);
+        nand_ecc_test(512);
+        return 0;
+}
+static void __exit ecc_test_exit(void)
+{
+}
+module_init(ecc_test_init);
+module_exit(ecc_test_exit);
+MODULE_DESCRIPTION("NAND ECC function test module");
+MODULE_AUTHOR("Akinobu Mita");
+MODULE_LICENSE("GPL");
diff --git a/drivers/mtd/tests/mtd_oobtest.c b/drivers/mtd/tests/mtd_oobtest.c
index 5553cd4eab20..5813920e79a5 100644
--- a/drivers/mtd/tests/mtd_oobtest.c
+++ b/drivers/mtd/tests/mtd_oobtest.c
@@ -343,7 +343,6 @@ static int scan_for_bad_eraseblocks(void)
                printk(PRINT_PREF "error: cannot allocate memory\n");
                return -ENOMEM;
        }
-        memset(bbt, 0 , ebcnt);
        printk(PRINT_PREF "scanning for bad eraseblocks\n");
        for (i = 0; i < ebcnt; ++i) {
@@ -392,7 +391,6 @@ static int __init mtd_oobtest_init(void)
               mtd->writesize, ebcnt, pgcnt, mtd->oobsize);
        err = -ENOMEM;
-        mtd->erasesize = mtd->erasesize;
        readbuf = kmalloc(mtd->erasesize, GFP_KERNEL);
        if (!readbuf) {
                printk(PRINT_PREF "error: cannot allocate memory\n");
@@ -476,18 +474,10 @@ static int __init mtd_oobtest_init(void)
        use_len_max = mtd->ecclayout->oobavail;
        vary_offset = 1;
        simple_srand(5);
-        printk(PRINT_PREF "writing OOBs of whole device\n");
-        for (i = 0; i < ebcnt; ++i) {
+        err = write_whole_device();
-                if (bbt[i])
+        if (err)
-                        continue;
+                goto out;
-                err = write_eraseblock(i);
-                if (err)
-                        goto out;
-                if (i % 256 == 0)
-                        printk(PRINT_PREF "written up to eraseblock %u\n", i);
-                cond_resched();
-        }
-        printk(PRINT_PREF "written %u eraseblocks\n", i);
        /* Check all eraseblocks */
        use_offset = 0;
diff --git a/drivers/mtd/tests/mtd_pagetest.c b/drivers/mtd/tests/mtd_pagetest.c
index 103cac480fee..ce17cbe918c5 100644
--- a/drivers/mtd/tests/mtd_pagetest.c
+++ b/drivers/mtd/tests/mtd_pagetest.c
@@ -523,6 +523,7 @@ static int __init mtd_pagetest_init(void)
        do_div(tmp, mtd->erasesize);
        ebcnt = tmp;
        pgcnt = mtd->erasesize / mtd->writesize;
+        pgsize = mtd->writesize;
        printk(PRINT_PREF "MTD device size %llu, eraseblock size %u, "
               "page size %u, count of eraseblocks %u, pages per "
diff --git a/drivers/net/bcm63xx_enet.c b/drivers/net/bcm63xx_enet.c
index 1f6c5486d715..0bd47d32ec42 100644
--- a/drivers/net/bcm63xx_enet.c
+++ b/drivers/net/bcm63xx_enet.c
@@ -1245,9 +1245,15 @@ static void bcm_enet_get_drvinfo(struct net_device *netdev,
        drvinfo->n_stats = BCM_ENET_STATS_LEN;
 }
-static int bcm_enet_get_stats_count(struct net_device *netdev)
+static int bcm_enet_get_sset_count(struct net_device *netdev,
+                                        int string_set)
 {
-        return BCM_ENET_STATS_LEN;
+        switch (string_set) {
+        case ETH_SS_STATS:
+                return BCM_ENET_STATS_LEN;
+        default:
+                return -EINVAL;
+        }
 }
 static void bcm_enet_get_strings(struct net_device *netdev,
@@ -1473,7 +1479,7 @@ static int bcm_enet_set_pauseparam(struct net_device *dev,
 static struct ethtool_ops bcm_enet_ethtool_ops = {
        .get_strings            = bcm_enet_get_strings,
-        .get_stats_count        = bcm_enet_get_stats_count,
+        .get_sset_count         = bcm_enet_get_sset_count,
        .get_ethtool_stats      = bcm_enet_get_ethtool_stats,
        .get_settings           = bcm_enet_get_settings,
        .set_settings           = bcm_enet_set_settings,
diff --git a/drivers/net/bonding/bond_3ad.c b/drivers/net/bonding/bond_3ad.c
index d69e6838f21e..0fb7a4964e75 100644
--- a/drivers/net/bonding/bond_3ad.c
+++ b/drivers/net/bonding/bond_3ad.c
@@ -20,6 +20,8 @@
 *
 */
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 #include <linux/skbuff.h>
 #include <linux/if_ether.h>
 #include <linux/netdevice.h>
@@ -352,7 +354,8 @@ static u16 __get_link_speed(struct port *port)
                }
        }
-        pr_debug("Port %d Received link speed %d update from adapter\n", port->actor_port_number, speed);
+        pr_debug("Port %d Received link speed %d update from adapter\n",
+                 port->actor_port_number, speed);
        return speed;
 }
@@ -378,12 +381,14 @@ static u8 __get_duplex(struct port *port)
                switch (slave->duplex) {
                case DUPLEX_FULL:
                        retval=0x1;
-                        pr_debug("Port %d Received status full duplex update from adapter\n", port->actor_port_number);
+                        pr_debug("Port %d Received status full duplex update from adapter\n",
+                                 port->actor_port_number);
                        break;
                case DUPLEX_HALF:
                default:
                        retval=0x0;
-                        pr_debug("Port %d Received status NOT full duplex update from adapter\n", port->actor_port_number);
+                        pr_debug("Port %d Received status NOT full duplex update from adapter\n",
+                                 port->actor_port_number);
                        break;
                }
        }
@@ -980,7 +985,9 @@ static void ad_mux_machine(struct port *port)
        // check if the state machine was changed
        if (port->sm_mux_state != last_state) {
-                pr_debug("Mux Machine: Port=%d, Last State=%d, Curr State=%d\n", port->actor_port_number, last_state, port->sm_mux_state);
+                pr_debug("Mux Machine: Port=%d, Last State=%d, Curr State=%d\n",
+                         port->actor_port_number, last_state,
+                         port->sm_mux_state);
                switch (port->sm_mux_state) {
                case AD_MUX_DETACHED:
                        __detach_bond_from_agg(port);
@@ -1079,7 +1086,9 @@ static void ad_rx_machine(struct lacpdu *lacpdu, struct port *port)
        // check if the State machine was changed or new lacpdu arrived
        if ((port->sm_rx_state != last_state) || (lacpdu)) {
-                pr_debug("Rx Machine: Port=%d, Last State=%d, Curr State=%d\n", port->actor_port_number, last_state, port->sm_rx_state);
+                pr_debug("Rx Machine: Port=%d, Last State=%d, Curr State=%d\n",
+                         port->actor_port_number, last_state,
+                         port->sm_rx_state);
                switch (port->sm_rx_state) {
                case AD_RX_INITIALIZE:
                        if (!(port->actor_oper_port_key & AD_DUPLEX_KEY_BITS)) {
@@ -1126,9 +1135,8 @@ static void ad_rx_machine(struct lacpdu *lacpdu, struct port *port)
                        // detect loopback situation
                        if (!MAC_ADDRESS_COMPARE(&(lacpdu->actor_system), &(port->actor_system))) {
                                // INFO_RECEIVED_LOOPBACK_FRAMES
-                                pr_err(DRV_NAME ": %s: An illegal loopback occurred on "
+                                pr_err("%s: An illegal loopback occurred on adapter (%s).\n"
-                                       "adapter (%s). Check the configuration to verify that all "
+                                       "Check the configuration to verify that all adapters are connected to 802.3ad compliant switch ports\n",
-                                       "Adapters are connected to 802.3ad compliant switch ports\n",
                                       port->slave->dev->master->name, port->slave->dev->name);
                                __release_rx_machine_lock(port);
                                return;
@@ -1166,7 +1174,8 @@ static void ad_tx_machine(struct port *port)
                        __update_lacpdu_from_port(port);
                        if (ad_lacpdu_send(port) >= 0) {
-                                pr_debug("Sent LACPDU on port %d\n", port->actor_port_number);
+                                pr_debug("Sent LACPDU on port %d\n",
+                                         port->actor_port_number);
                                /* mark ntt as false, so it will not be sent again until
                                   demanded */
@@ -1241,7 +1250,9 @@ static void ad_periodic_machine(struct port *port)
        // check if the state machine was changed
        if (port->sm_periodic_state != last_state) {
-                pr_debug("Periodic Machine: Port=%d, Last State=%d, Curr State=%d\n", port->actor_port_number, last_state, port->sm_periodic_state);
+                pr_debug("Periodic Machine: Port=%d, Last State=%d, Curr State=%d\n",
+                         port->actor_port_number, last_state,
+                         port->sm_periodic_state);
                switch (port->sm_periodic_state) {
                case AD_NO_PERIODIC:
                        port->sm_periodic_timer_counter = 0;       // zero timer
@@ -1298,7 +1309,9 @@ static void ad_port_selection_logic(struct port *port)
                                port->next_port_in_aggregator=NULL;
                                port->actor_port_aggregator_identifier=0;
-                                pr_debug("Port %d left LAG %d\n", port->actor_port_number, temp_aggregator->aggregator_identifier);
+                                pr_debug("Port %d left LAG %d\n",
+                                         port->actor_port_number,
+                                         temp_aggregator->aggregator_identifier);
                                // if the aggregator is empty, clear its parameters, and set it ready to be attached
                                if (!temp_aggregator->lag_ports) {
                                        ad_clear_agg(temp_aggregator);
@@ -1307,9 +1320,7 @@ static void ad_port_selection_logic(struct port *port)
                        }
                }
                if (!curr_port) { // meaning: the port was related to an aggregator but was not on the aggregator port list
-                        pr_warning(DRV_NAME ": %s: Warning: Port %d (on %s) "
+                        pr_warning("%s: Warning: Port %d (on %s) was related to aggregator %d but was not on its port list\n",
-                                   "was related to aggregator %d but was not "
-                                   "on its port list\n",
                                   port->slave->dev->master->name,
                                   port->actor_port_number,
                                   port->slave->dev->name,
@@ -1343,7 +1354,9 @@ static void ad_port_selection_logic(struct port *port)
                        port->next_port_in_aggregator=aggregator->lag_ports;
                        port->aggregator->num_of_ports++;
                        aggregator->lag_ports=port;
-                        pr_debug("Port %d joined LAG %d(existing LAG)\n", port->actor_port_number, port->aggregator->aggregator_identifier);
+                        pr_debug("Port %d joined LAG %d(existing LAG)\n",
+                                 port->actor_port_number,
+                                 port->aggregator->aggregator_identifier);
                        // mark this port as selected
                        port->sm_vars |= AD_PORT_SELECTED;
@@ -1380,10 +1393,11 @@ static void ad_port_selection_logic(struct port *port)
                        // mark this port as selected
                        port->sm_vars |= AD_PORT_SELECTED;
-                        pr_debug("Port %d joined LAG %d(new LAG)\n", port->actor_port_number, port->aggregator->aggregator_identifier);
+                        pr_debug("Port %d joined LAG %d(new LAG)\n",
+                                 port->actor_port_number,
+                                 port->aggregator->aggregator_identifier);
                } else {
-                        pr_err(DRV_NAME ": %s: Port %d (on %s) did not find "
+                        pr_err("%s: Port %d (on %s) did not find a suitable aggregator\n",
-                               "a suitable aggregator\n",
                               port->slave->dev->master->name,
                               port->actor_port_number, port->slave->dev->name);
                }
@@ -1460,8 +1474,7 @@ static struct aggregator *ad_agg_selection_test(struct aggregator *best,
                break;
        default:
-                pr_warning(DRV_NAME
+                pr_warning("%s: Impossible agg select mode %d\n",
-                           ": %s: Impossible agg select mode %d\n",
                           curr->slave->dev->master->name,
                           __get_agg_selection_mode(curr->lag_ports));
                break;
@@ -1546,40 +1559,38 @@ static void ad_agg_selection_logic(struct aggregator *agg)
        // if there is new best aggregator, activate it
        if (best) {
                pr_debug("best Agg=%d; P=%d; a k=%d; p k=%d; Ind=%d; Act=%d\n",
-                       best->aggregator_identifier, best->num_of_ports,
+                         best->aggregator_identifier, best->num_of_ports,
-                       best->actor_oper_aggregator_key,
+                         best->actor_oper_aggregator_key,
-                       best->partner_oper_aggregator_key,
+                         best->partner_oper_aggregator_key,
-                       best->is_individual, best->is_active);
+                         best->is_individual, best->is_active);
                pr_debug("best ports %p slave %p %s\n",
-                       best->lag_ports, best->slave,
+                         best->lag_ports, best->slave,
-                       best->slave ? best->slave->dev->name : "NULL");
+                         best->slave ? best->slave->dev->name : "NULL");
                for (agg = __get_first_agg(best->lag_ports); agg;
                     agg = __get_next_agg(agg)) {
                        pr_debug("Agg=%d; P=%d; a k=%d; p k=%d; Ind=%d; Act=%d\n",
-                                agg->aggregator_identifier, agg->num_of_ports,
+                                 agg->aggregator_identifier, agg->num_of_ports,
-                                agg->actor_oper_aggregator_key,
+                                 agg->actor_oper_aggregator_key,
-                                agg->partner_oper_aggregator_key,
+                                 agg->partner_oper_aggregator_key,
-                                agg->is_individual, agg->is_active);
+                                 agg->is_individual, agg->is_active);
                }
                // check if any partner replys
                if (best->is_individual) {
-                        pr_warning(DRV_NAME ": %s: Warning: No 802.3ad"
+                        pr_warning("%s: Warning: No 802.3ad response from the link partner for any adapters in the bond\n",
-                               " response from the link partner for any"
+                                   best->slave->dev->master->name);
-                               " adapters in the bond\n",
-                               best->slave->dev->master->name);
                }
                best->is_active = 1;
                pr_debug("LAG %d chosen as the active LAG\n",
-                        best->aggregator_identifier);
+                         best->aggregator_identifier);
                pr_debug("Agg=%d; P=%d; a k=%d; p k=%d; Ind=%d; Act=%d\n",
-                        best->aggregator_identifier, best->num_of_ports,
+                         best->aggregator_identifier, best->num_of_ports,
-                        best->actor_oper_aggregator_key,
+                         best->actor_oper_aggregator_key,
-                        best->partner_oper_aggregator_key,
+                         best->partner_oper_aggregator_key,
-                        best->is_individual, best->is_active);
+                         best->is_individual, best->is_active);
                // disable the ports that were related to the former active_aggregator
                if (active) {
@@ -1633,7 +1644,8 @@ static void ad_clear_agg(struct aggregator *aggregator)
                aggregator->lag_ports = NULL;
                aggregator->is_active = 0;
                aggregator->num_of_ports = 0;
-                pr_debug("LAG %d was cleared\n", aggregator->aggregator_identifier);
+                pr_debug("LAG %d was cleared\n",
+                         aggregator->aggregator_identifier);
        }
 }
@@ -1728,7 +1740,9 @@ static void ad_initialize_port(struct port *port, int lacp_fast)
 static void ad_enable_collecting_distributing(struct port *port)
 {
        if (port->aggregator->is_active) {
-                pr_debug("Enabling port %d(LAG %d)\n", port->actor_port_number, port->aggregator->aggregator_identifier);
+                pr_debug("Enabling port %d(LAG %d)\n",
+                         port->actor_port_number,
+                         port->aggregator->aggregator_identifier);
                __enable_port(port);
        }
 }
@@ -1741,7 +1755,9 @@ static void ad_enable_collecting_distributing(struct port *port)
 static void ad_disable_collecting_distributing(struct port *port)
 {
        if (port->aggregator && MAC_ADDRESS_COMPARE(&(port->aggregator->partner_system), &(null_mac_addr))) {
-                pr_debug("Disabling port %d(LAG %d)\n", port->actor_port_number, port->aggregator->aggregator_identifier);
+                pr_debug("Disabling port %d(LAG %d)\n",
+                         port->actor_port_number,
+                         port->aggregator->aggregator_identifier);
                __disable_port(port);
        }
 }
@@ -1779,7 +1795,8 @@ static void ad_marker_info_send(struct port *port)
        // send the marker information
        if (ad_marker_send(port, &marker) >= 0) {
-                pr_debug("Sent Marker Information on port %d\n", port->actor_port_number);
+                pr_debug("Sent Marker Information on port %d\n",
+                         port->actor_port_number);
        }
 }
 #endif
@@ -1803,7 +1820,8 @@ static void ad_marker_info_received(struct bond_marker *marker_info,
        // send the marker response
        if (ad_marker_send(port, &marker) >= 0) {
-                pr_debug("Sent Marker Response on port %d\n", port->actor_port_number);
+                pr_debug("Sent Marker Response on port %d\n",
+                         port->actor_port_number);
        }
 }
@@ -1889,8 +1907,7 @@ int bond_3ad_bind_slave(struct slave *slave)
        struct aggregator *aggregator;
        if (bond == NULL) {
-                pr_err(DRV_NAME ": %s: The slave %s is not attached to "
+                pr_err("%s: The slave %s is not attached to its bond\n",
-                       "its bond\n",
                       slave->dev->master->name, slave->dev->name);
                return -1;
        }
@@ -1966,13 +1983,13 @@ void bond_3ad_unbind_slave(struct slave *slave)
        // if slave is null, the whole port is not initialized
        if (!port->slave) {
-                pr_warning(DRV_NAME ": Warning: %s: Trying to "
+                pr_warning("Warning: %s: Trying to unbind an uninitialized port on %s\n",
-                           "unbind an uninitialized port on %s\n",
                           slave->dev->master->name, slave->dev->name);
                return;
        }
-        pr_debug("Unbinding Link Aggregation Group %d\n", aggregator->aggregator_identifier);
+        pr_debug("Unbinding Link Aggregation Group %d\n",
+                 aggregator->aggregator_identifier);
        /* Tell the partner that this port is not suitable for aggregation */
        port->actor_oper_port_state &= ~AD_STATE_AGGREGATION;
@@ -1996,10 +2013,12 @@ void bond_3ad_unbind_slave(struct slave *slave)
                        // if new aggregator found, copy the aggregator's parameters
                        // and connect the related lag_ports to the new aggregator
                        if ((new_aggregator) && ((!new_aggregator->lag_ports) || ((new_aggregator->lag_ports == port) && !new_aggregator->lag_ports->next_port_in_aggregator))) {
-                                pr_debug("Some port(s) related to LAG %d - replaceing with LAG %d\n", aggregator->aggregator_identifier, new_aggregator->aggregator_identifier);
+                                pr_debug("Some port(s) related to LAG %d - replaceing with LAG %d\n",
+                                         aggregator->aggregator_identifier,
+                                         new_aggregator->aggregator_identifier);
                                if ((new_aggregator->lag_ports == port) && new_aggregator->is_active) {
-                                        pr_info(DRV_NAME ": %s: Removing an active aggregator\n",
+                                        pr_info("%s: Removing an active aggregator\n",
                                                aggregator->slave->dev->master->name);
                                        // select new active aggregator
                                         select_new_active_agg = 1;
@@ -2030,8 +2049,7 @@ void bond_3ad_unbind_slave(struct slave *slave)
                                        ad_agg_selection_logic(__get_first_agg(port));
                                }
                        } else {
-                                pr_warning(DRV_NAME ": %s: Warning: unbinding aggregator, "
+                                pr_warning("%s: Warning: unbinding aggregator, and could not find a new aggregator for its ports\n",
-                                           "and could not find a new aggregator for its ports\n",
                                           slave->dev->master->name);
                        }
                } else { // in case that the only port related to this aggregator is the one we want to remove
@@ -2039,7 +2057,7 @@ void bond_3ad_unbind_slave(struct slave *slave)
                        // clear the aggregator
                        ad_clear_agg(aggregator);
                        if (select_new_active_agg) {
-                                pr_info(DRV_NAME ": %s: Removing an active aggregator\n",
+                                pr_info("%s: Removing an active aggregator\n",
                                        slave->dev->master->name);
                                // select new active aggregator
                                ad_agg_selection_logic(__get_first_agg(port));
@@ -2066,7 +2084,7 @@ void bond_3ad_unbind_slave(struct slave *slave)
                                        // clear the aggregator
                                        ad_clear_agg(temp_aggregator);
                                        if (select_new_active_agg) {
-                                                pr_info(DRV_NAME ": %s: Removing an active aggregator\n",
+                                                pr_info("%s: Removing an active aggregator\n",
                                                        slave->dev->master->name);
                                                // select new active aggregator
                                                ad_agg_selection_logic(__get_first_agg(port));
@@ -2115,8 +2133,8 @@ void bond_3ad_state_machine_handler(struct work_struct *work)
                // select the active aggregator for the bond
                if ((port = __get_first_port(bond))) {
                        if (!port->slave) {
-                                pr_warning(DRV_NAME ": %s: Warning: bond's first port is "
+                                pr_warning("%s: Warning: bond's first port is uninitialized\n",
-                                           "uninitialized\n", bond->dev->name);
+                                           bond->dev->name);
                                goto re_arm;
                        }
@@ -2129,8 +2147,8 @@ void bond_3ad_state_machine_handler(struct work_struct *work)
        // for each port run the state machines
        for (port = __get_first_port(bond); port; port = __get_next_port(port)) {
                if (!port->slave) {
-                        pr_warning(DRV_NAME ": %s: Warning: Found an uninitialized "
+                        pr_warning("%s: Warning: Found an uninitialized port\n",
-                                   "port\n", bond->dev->name);
+                                   bond->dev->name);
                        goto re_arm;
                }
@@ -2171,15 +2189,15 @@ static void bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave, u
                port = &(SLAVE_AD_INFO(slave).port);
                if (!port->slave) {
-                        pr_warning(DRV_NAME ": %s: Warning: port of slave %s "
+                        pr_warning("%s: Warning: port of slave %s is uninitialized\n",
-                                   "is uninitialized\n",
                                   slave->dev->name, slave->dev->master->name);
                        return;
                }
                switch (lacpdu->subtype) {
                case AD_TYPE_LACPDU:
-                        pr_debug("Received LACPDU on port %d\n", port->actor_port_number);
+                        pr_debug("Received LACPDU on port %d\n",
+                                 port->actor_port_number);
                        ad_rx_machine(lacpdu, port);
                        break;
@@ -2188,17 +2206,20 @@ static void bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave, u
                        switch (((struct bond_marker *)lacpdu)->tlv_type) {
                        case AD_MARKER_INFORMATION_SUBTYPE:
-                                pr_debug("Received Marker Information on port %d\n", port->actor_port_number);
+                                pr_debug("Received Marker Information on port %d\n",
+                                         port->actor_port_number);
                                ad_marker_info_received((struct bond_marker *)lacpdu, port);
                                break;
                        case AD_MARKER_RESPONSE_SUBTYPE:
-                                pr_debug("Received Marker Response on port %d\n", port->actor_port_number);
+                                pr_debug("Received Marker Response on port %d\n",
+                                         port->actor_port_number);
                                ad_marker_response_received((struct bond_marker *)lacpdu, port);
                                break;
                        default:
-                                pr_debug("Received an unknown Marker subtype on slot %d\n", port->actor_port_number);
+                                pr_debug("Received an unknown Marker subtype on slot %d\n",
+                                         port->actor_port_number);
                        }
                }
        }
@@ -2218,8 +2239,7 @@ void bond_3ad_adapter_speed_changed(struct slave *slave)
        // if slave is null, the whole port is not initialized
        if (!port->slave) {
-                pr_warning(DRV_NAME ": Warning: %s: speed "
+                pr_warning("Warning: %s: speed changed for uninitialized port on %s\n",
-                           "changed for uninitialized port on %s\n",
                           slave->dev->master->name, slave->dev->name);
                return;
        }
@@ -2246,8 +2266,7 @@ void bond_3ad_adapter_duplex_changed(struct slave *slave)
        // if slave is null, the whole port is not initialized
        if (!port->slave) {
-                pr_warning(DRV_NAME ": %s: Warning: duplex changed "
+                pr_warning("%s: Warning: duplex changed for uninitialized port on %s\n",
-                           "for uninitialized port on %s\n",
                           slave->dev->master->name, slave->dev->name);
                return;
        }
@@ -2275,8 +2294,7 @@ void bond_3ad_handle_link_change(struct slave *slave, char link)
        // if slave is null, the whole port is not initialized
        if (!port->slave) {
-                pr_warning(DRV_NAME ": Warning: %s: link status changed for "
+                pr_warning("Warning: %s: link status changed for uninitialized port on %s\n",
-                           "uninitialized port on %s\n",
                           slave->dev->master->name, slave->dev->name);
                return;
        }
@@ -2381,8 +2399,8 @@ int bond_3ad_xmit_xor(struct sk_buff *skb, struct net_device *dev)
        }
        if (bond_3ad_get_active_agg_info(bond, &ad_info)) {
-                pr_debug(DRV_NAME ": %s: Error: "
+                pr_debug("%s: Error: bond_3ad_get_active_agg_info failed\n",
-                         "bond_3ad_get_active_agg_info failed\n", dev->name);
+                         dev->name);
                goto out;
        }
@@ -2391,8 +2409,7 @@ int bond_3ad_xmit_xor(struct sk_buff *skb, struct net_device *dev)
        if (slaves_in_agg == 0) {
                /*the aggregator is empty*/
-                pr_debug(DRV_NAME ": %s: Error: active aggregator is empty\n",
+                pr_debug("%s: Error: active aggregator is empty\n", dev->name);
-                         dev->name);
                goto out;
        }
@@ -2410,8 +2427,8 @@ int bond_3ad_xmit_xor(struct sk_buff *skb, struct net_device *dev)
        }
        if (slave_agg_no >= 0) {
-                pr_err(DRV_NAME ": %s: Error: Couldn't find a slave to tx on "
+                pr_err("%s: Error: Couldn't find a slave to tx on for aggregator ID %d\n",
-                       "for aggregator ID %d\n", dev->name, agg_id);
+                       dev->name, agg_id);
                goto out;
        }
diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c
index 00ab51ef3129..40fdc41446cc 100644
--- a/drivers/net/bonding/bond_alb.c
+++ b/drivers/net/bonding/bond_alb.c
@@ -20,6 +20,8 @@
 *
 */
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 #include <linux/skbuff.h>
 #include <linux/netdevice.h>
 #include <linux/etherdevice.h>
@@ -201,8 +203,7 @@ static int tlb_initialize(struct bonding *bond)
        new_hashtbl = kzalloc(size, GFP_KERNEL);
        if (!new_hashtbl) {
-                pr_err(DRV_NAME
+                pr_err("%s: Error: Failed to allocate TLB hash table\n",
-                       ": %s: Error: Failed to allocate TLB hash table\n",
                       bond->dev->name);
                return -1;
        }
@@ -514,8 +515,7 @@ static void rlb_update_client(struct rlb_client_info *client_info)
                                 client_info->slave->dev->dev_addr,
                                 client_info->mac_dst);
                if (!skb) {
-                        pr_err(DRV_NAME
+                        pr_err("%s: Error: failed to create an ARP packet\n",
-                               ": %s: Error: failed to create an ARP packet\n",
                               client_info->slave->dev->master->name);
                        continue;
                }
@@ -525,8 +525,7 @@ static void rlb_update_client(struct rlb_client_info *client_info)
                if (client_info->tag) {
                        skb = vlan_put_tag(skb, client_info->vlan_id);
                        if (!skb) {
-                                pr_err(DRV_NAME
+                                pr_err("%s: Error: failed to insert VLAN tag\n",
-                                       ": %s: Error: failed to insert VLAN tag\n",
                                       client_info->slave->dev->master->name);
                                continue;
                        }
@@ -609,9 +608,7 @@ static void rlb_req_update_subnet_clients(struct bonding *bond, __be32 src_ip)
                client_info = &(bond_info->rx_hashtbl[hash_index]);
                if (!client_info->slave) {
-                        pr_err(DRV_NAME
+                        pr_err("%s: Error: found a client with no channel in the client's hash table\n",
-                               ": %s: Error: found a client with no channel in "
-                               "the client's hash table\n",
                               bond->dev->name);
                        continue;
                }
@@ -806,8 +803,7 @@ static int rlb_initialize(struct bonding *bond)
        new_hashtbl = kmalloc(size, GFP_KERNEL);
        if (!new_hashtbl) {
-                pr_err(DRV_NAME
+                pr_err("%s: Error: Failed to allocate RLB hash table\n",
-                       ": %s: Error: Failed to allocate RLB hash table\n",
                       bond->dev->name);
                return -1;
        }
@@ -928,8 +924,7 @@ static void alb_send_learning_packets(struct slave *slave, u8 mac_addr[])
                        skb = vlan_put_tag(skb, vlan->vlan_id);
                        if (!skb) {
-                                pr_err(DRV_NAME
+                                pr_err("%s: Error: failed to insert VLAN tag\n",
-                                       ": %s: Error: failed to insert VLAN tag\n",
                                       bond->dev->name);
                                continue;
                        }
@@ -958,11 +953,8 @@ static int alb_set_slave_mac_addr(struct slave *slave, u8 addr[], int hw)
        memcpy(s_addr.sa_data, addr, dev->addr_len);
        s_addr.sa_family = dev->type;
        if (dev_set_mac_address(dev, &s_addr)) {
-                pr_err(DRV_NAME
+                pr_err("%s: Error: dev_set_mac_address of dev %s failed!\n"
-                       ": %s: Error: dev_set_mac_address of dev %s failed! ALB "
+                       "ALB mode requires that the base driver support setting the hw address also when the network device's interface is open\n",
-                       "mode requires that the base driver support setting "
-                       "the hw address also when the network device's "
-                       "interface is open\n",
                       dev->master->name, dev->name);
                return -EOPNOTSUPP;
        }
@@ -1169,18 +1161,12 @@ static int alb_handle_addr_collision_on_attach(struct bonding *bond, struct slav
                alb_set_slave_mac_addr(slave, free_mac_slave->perm_hwaddr,
                                       bond->alb_info.rlb_enabled);
-                pr_warning(DRV_NAME
+                pr_warning("%s: Warning: the hw address of slave %s is in use by the bond; giving it the hw address of %s\n",
-                           ": %s: Warning: the hw address of slave %s is "
-                           "in use by the bond; giving it the hw address "
-                           "of %s\n",
                           bond->dev->name, slave->dev->name,
                           free_mac_slave->dev->name);
        } else if (has_bond_addr) {
-                pr_err(DRV_NAME
+                pr_err("%s: Error: the hw address of slave %s is in use by the bond; couldn't find a slave with a free hw address to give it (this should not have happened)\n",
-                       ": %s: Error: the hw address of slave %s is in use by the "
-                       "bond; couldn't find a slave with a free hw address to "
-                       "give it (this should not have happened)\n",
                       bond->dev->name, slave->dev->name);
                return -EFAULT;
        }
diff --git a/drivers/net/bonding/bond_ipv6.c b/drivers/net/bonding/bond_ipv6.c
index b72e1dc8cf8f..6dd64cf3cb76 100644
--- a/drivers/net/bonding/bond_ipv6.c
+++ b/drivers/net/bonding/bond_ipv6.c
@@ -20,6 +20,8 @@
 *
 */
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 #include <linux/types.h>
 #include <linux/if_vlan.h>
 #include <net/ipv6.h>
@@ -74,20 +76,20 @@ static void bond_na_send(struct net_device *slave_dev,
        addrconf_addr_solict_mult(daddr, &mcaddr);
        pr_debug("ipv6 na on slave %s: dest %pI6, src %pI6\n",
-               slave_dev->name, &mcaddr, daddr);
+                 slave_dev->name, &mcaddr, daddr);
        skb = ndisc_build_skb(slave_dev, &mcaddr, daddr, &icmp6h, daddr,
                              ND_OPT_TARGET_LL_ADDR);
        if (!skb) {
-                pr_err(DRV_NAME ": NA packet allocation failed\n");
+                pr_err("NA packet allocation failed\n");
                return;
        }
        if (vlan_id) {
                skb = vlan_put_tag(skb, vlan_id);
                if (!skb) {
-                        pr_err(DRV_NAME ": failed to insert VLAN tag\n");
+                        pr_err("failed to insert VLAN tag\n");
                        return;
                }
        }
@@ -109,8 +111,8 @@ void bond_send_unsolicited_na(struct bonding *bond)
        struct inet6_dev *idev;
        int is_router;
-        pr_debug("bond_send_unsol_na: bond %s slave %s\n", bond->dev->name,
+        pr_debug("%s: bond %s slave %s\n", bond->dev->name,
-                                slave ? slave->dev->name : "NULL");
+                 __func__, slave ? slave->dev->name : "NULL");
        if (!slave || !bond->send_unsol_na ||
            test_bit(__LINK_STATE_LINKWATCH_PENDING, &slave->dev->state))
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index af9b9c4eb496..3f0071cfe56b 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -31,6 +31,8 @@
 *
 */
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/types.h>
@@ -260,7 +262,7 @@ static int bond_add_vlan(struct bonding *bond, unsigned short vlan_id)
        struct vlan_entry *vlan;
        pr_debug("bond: %s, vlan id %d\n",
-                (bond ? bond->dev->name : "None"), vlan_id);
+                 (bond ? bond->dev->name : "None"), vlan_id);
        vlan = kzalloc(sizeof(struct vlan_entry), GFP_KERNEL);
        if (!vlan)
@@ -303,8 +305,8 @@ static int bond_del_vlan(struct bonding *bond, unsigned short vlan_id)
                        if (bond_is_lb(bond))
                                bond_alb_clear_vlan(bond, vlan_id);
-                        pr_debug("removed VLAN ID %d from bond %s\n", vlan_id,
+                        pr_debug("removed VLAN ID %d from bond %s\n",
-                                bond->dev->name);
+                                 vlan_id, bond->dev->name);
                        kfree(vlan);
@@ -323,8 +325,8 @@ static int bond_del_vlan(struct bonding *bond, unsigned short vlan_id)
                }
        }
-        pr_debug("couldn't find VLAN ID %d in bond %s\n", vlan_id,
+        pr_debug("couldn't find VLAN ID %d in bond %s\n",
-                bond->dev->name);
+                 vlan_id, bond->dev->name);
 out:
        write_unlock_bh(&bond->lock);
@@ -348,7 +350,7 @@ static int bond_has_challenged_slaves(struct bonding *bond)
        bond_for_each_slave(bond, slave, i) {
                if (slave->dev->features & NETIF_F_VLAN_CHALLENGED) {
                        pr_debug("found VLAN challenged slave - %s\n",
-                                slave->dev->name);
+                                 slave->dev->name);
                        return 1;
                }
        }
@@ -499,8 +501,7 @@ static void bond_vlan_rx_add_vid(struct net_device *bond_dev, uint16_t vid)
        res = bond_add_vlan(bond, vid);
        if (res) {
-                pr_err(DRV_NAME
+                pr_err("%s: Error: Failed to add vlan id %d\n",
-                       ": %s: Error: Failed to add vlan id %d\n",
                       bond_dev->name, vid);
        }
 }
@@ -534,8 +535,7 @@ static void bond_vlan_rx_kill_vid(struct net_device *bond_dev, uint16_t vid)
        res = bond_del_vlan(bond, vid);
        if (res) {
-                pr_err(DRV_NAME
+                pr_err("%s: Error: Failed to remove vlan id %d\n",
-                       ": %s: Error: Failed to remove vlan id %d\n",
                       bond_dev->name, vid);
        }
 }
@@ -1053,8 +1053,7 @@ static void bond_do_fail_over_mac(struct bonding *bond,
                rv = dev_set_mac_address(new_active->dev, &saddr);
                if (rv) {
-                        pr_err(DRV_NAME
+                        pr_err("%s: Error %d setting MAC of slave %s\n",
-                               ": %s: Error %d setting MAC of slave %s\n",
                               bond->dev->name, -rv, new_active->dev->name);
                        goto out;
                }
@@ -1067,16 +1066,14 @@ static void bond_do_fail_over_mac(struct bonding *bond,
                rv = dev_set_mac_address(old_active->dev, &saddr);
                if (rv)
-                        pr_err(DRV_NAME
+                        pr_err("%s: Error %d setting MAC of slave %s\n",
-                               ": %s: Error %d setting MAC of slave %s\n",
                               bond->dev->name, -rv, new_active->dev->name);
 out:
                read_lock(&bond->lock);
                write_lock_bh(&bond->curr_slave_lock);
                break;
        default:
-                pr_err(DRV_NAME
+                pr_err("%s: bond_do_fail_over_mac impossible: bad policy %d\n",
-                       ": %s: bond_do_fail_over_mac impossible: bad policy %d\n",
                       bond->dev->name, bond->params.fail_over_mac);
                break;
        }
@@ -1178,11 +1175,9 @@ void bond_change_active_slave(struct bonding *bond, struct slave *new_active)
                if (new_active->link == BOND_LINK_BACK) {
                        if (USES_PRIMARY(bond->params.mode)) {
-                                pr_info(DRV_NAME
+                                pr_info("%s: making interface %s the new active one %d ms earlier.\n",
-                                       ": %s: making interface %s the new "
+                                        bond->dev->name, new_active->dev->name,
-                                       "active one %d ms earlier.\n",
+                                        (bond->params.updelay - new_active->delay) * bond->params.miimon);
-                                       bond->dev->name, new_active->dev->name,
-                                       (bond->params.updelay - new_active->delay) * bond->params.miimon);
                        }
                        new_active->delay = 0;
@@ -1195,10 +1190,8 @@ void bond_change_active_slave(struct bonding *bond, struct slave *new_active)
                                bond_alb_handle_link_change(bond, new_active, BOND_LINK_UP);
                } else {
                        if (USES_PRIMARY(bond->params.mode)) {
-                                pr_info(DRV_NAME
+                                pr_info("%s: making interface %s the new active one.\n",
-                                       ": %s: making interface %s the new "
+                                        bond->dev->name, new_active->dev->name);
-                                       "active one.\n",
-                                       bond->dev->name, new_active->dev->name);
                        }
                }
        }
@@ -1268,13 +1261,11 @@ void bond_select_active_slave(struct bonding *bond)
                        return;
                if (netif_carrier_ok(bond->dev)) {
-                        pr_info(DRV_NAME
+                        pr_info("%s: first active interface up!\n",
-                               ": %s: first active interface up!\n",
+                                bond->dev->name);
-                               bond->dev->name);
                } else {
-                        pr_info(DRV_NAME ": %s: "
+                        pr_info("%s: now running without any active interface !\n",
-                               "now running without any active interface !\n",
+                                bond->dev->name);
-                               bond->dev->name);
                }
        }
 }
@@ -1423,16 +1414,14 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
        if (!bond->params.use_carrier && slave_dev->ethtool_ops == NULL &&
                slave_ops->ndo_do_ioctl == NULL) {
-                pr_warning(DRV_NAME
+                pr_warning("%s: Warning: no link monitoring support for %s\n",
-                       ": %s: Warning: no link monitoring support for %s\n",
+                           bond_dev->name, slave_dev->name);
-                       bond_dev->name, slave_dev->name);
        }
        /* bond must be initialized by bond_open() before enslaving */
        if (!(bond_dev->flags & IFF_UP)) {
-                pr_warning(DRV_NAME
+                pr_warning("%s: master_dev is not up in bond_enslave\n",
-                        " %s: master_dev is not up in bond_enslave\n",
+                           bond_dev->name);
-                        bond_dev->name);
        }
        /* already enslaved */
@@ -1446,19 +1435,13 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
        if (slave_dev->features & NETIF_F_VLAN_CHALLENGED) {
                pr_debug("%s: NETIF_F_VLAN_CHALLENGED\n", slave_dev->name);
                if (!list_empty(&bond->vlan_list)) {
-                        pr_err(DRV_NAME
+                        pr_err("%s: Error: cannot enslave VLAN challenged slave %s on VLAN enabled bond %s\n",
-                               ": %s: Error: cannot enslave VLAN "
+                               bond_dev->name, slave_dev->name, bond_dev->name);
-                               "challenged slave %s on VLAN enabled "
-                               "bond %s\n", bond_dev->name, slave_dev->name,
-                               bond_dev->name);
                        return -EPERM;
                } else {
-                        pr_warning(DRV_NAME
+                        pr_warning("%s: Warning: enslaved VLAN challenged slave %s. Adding VLANs will be blocked as long as %s is part of bond %s\n",
-                               ": %s: Warning: enslaved VLAN challenged "
+                                   bond_dev->name, slave_dev->name,
-                               "slave %s. Adding VLANs will be blocked as "
+                                   slave_dev->name, bond_dev->name);
-                               "long as %s is part of bond %s\n",
-                               bond_dev->name, slave_dev->name, slave_dev->name,
-                               bond_dev->name);
                        bond_dev->features |= NETIF_F_VLAN_CHALLENGED;
                }
        } else {
@@ -1478,8 +1461,7 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
         * enslaving it; the old ifenslave will not.
         */
        if ((slave_dev->flags & IFF_UP)) {
-                pr_err(DRV_NAME ": %s is up. "
+                pr_err("%s is up. This may be due to an out of date ifenslave.\n",
-                       "This may be due to an out of date ifenslave.\n",
                       slave_dev->name);
                res = -EPERM;
                goto err_undo_flags;
@@ -1495,7 +1477,8 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
        if (bond->slave_cnt == 0) {
                if (bond_dev->type != slave_dev->type) {
                        pr_debug("%s: change device type from %d to %d\n",
-                                bond_dev->name, bond_dev->type, slave_dev->type);
+                                 bond_dev->name,
+                                 bond_dev->type, slave_dev->type);
                        netdev_bonding_change(bond_dev, NETDEV_BONDING_OLDTYPE);
@@ -1507,28 +1490,21 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
                        netdev_bonding_change(bond_dev, NETDEV_BONDING_NEWTYPE);
                }
        } else if (bond_dev->type != slave_dev->type) {
-                pr_err(DRV_NAME ": %s ether type (%d) is different "
+                pr_err("%s ether type (%d) is different from other slaves (%d), can not enslave it.\n",
-                        "from other slaves (%d), can not enslave it.\n",
+                       slave_dev->name,
-                        slave_dev->name,
+                       slave_dev->type, bond_dev->type);
-                        slave_dev->type, bond_dev->type);
+                res = -EINVAL;
-                        res = -EINVAL;
+                goto err_undo_flags;
-                        goto err_undo_flags;
        }
        if (slave_ops->ndo_set_mac_address == NULL) {
                if (bond->slave_cnt == 0) {
-                        pr_warning(DRV_NAME
+                        pr_warning("%s: Warning: The first slave device specified does not support setting the MAC address. Setting fail_over_mac to active.",
-                               ": %s: Warning: The first slave device "
+                                   bond_dev->name);
-                               "specified does not support setting the MAC "
-                               "address. Setting fail_over_mac to active.",
-                               bond_dev->name);
                        bond->params.fail_over_mac = BOND_FOM_ACTIVE;
                } else if (bond->params.fail_over_mac != BOND_FOM_ACTIVE) {
-                        pr_err(DRV_NAME
+                        pr_err("%s: Error: The slave device specified does not support setting the MAC address, but fail_over_mac is not set to active.\n",
-                                ": %s: Error: The slave device specified "
+                               bond_dev->name);
-                                "does not support setting the MAC address, "
-                                "but fail_over_mac is not set to active.\n"
-                                , bond_dev->name);
                        res = -EOPNOTSUPP;
                        goto err_undo_flags;
                }
@@ -1655,22 +1631,12 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
                         * supported); thus, we don't need to change
                         * the messages for netif_carrier.
                         */
-                        pr_warning(DRV_NAME
+                        pr_warning("%s: Warning: MII and ETHTOOL support not available for interface %s, and arp_interval/arp_ip_target module parameters not specified, thus bonding will not detect link failures! see bonding.txt for details.\n",
-                               ": %s: Warning: MII and ETHTOOL support not "
-                               "available for interface %s, and "
-                               "arp_interval/arp_ip_target module parameters "
-                               "not specified, thus bonding will not detect "
-                               "link failures! see bonding.txt for details.\n",
                               bond_dev->name, slave_dev->name);
                } else if (link_reporting == -1) {
                        /* unable get link status using mii/ethtool */
-                        pr_warning(DRV_NAME
+                        pr_warning("%s: Warning: can't get link status from interface %s; the network driver associated with this interface does not support MII or ETHTOOL link status reporting, thus miimon has no effect on this interface.\n",
-                               ": %s: Warning: can't get link status from "
+                                   bond_dev->name, slave_dev->name);
-                               "interface %s; the network driver associated "
-                               "with this interface does not support MII or "
-                               "ETHTOOL link status reporting, thus miimon "
-                               "has no effect on this interface.\n",
-                               bond_dev->name, slave_dev->name);
                }
        }
@@ -1678,34 +1644,27 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
        if (!bond->params.miimon ||
            (bond_check_dev_link(bond, slave_dev, 0) == BMSR_LSTATUS)) {
                if (bond->params.updelay) {
-                        pr_debug("Initial state of slave_dev is "
+                        pr_debug("Initial state of slave_dev is BOND_LINK_BACK\n");
-                                "BOND_LINK_BACK\n");
                        new_slave->link  = BOND_LINK_BACK;
                        new_slave->delay = bond->params.updelay;
                } else {
-                        pr_debug("Initial state of slave_dev is "
+                        pr_debug("Initial state of slave_dev is BOND_LINK_UP\n");
-                                "BOND_LINK_UP\n");
                        new_slave->link  = BOND_LINK_UP;
                }
                new_slave->jiffies = jiffies;
        } else {
-                pr_debug("Initial state of slave_dev is "
+                pr_debug("Initial state of slave_dev is BOND_LINK_DOWN\n");
-                        "BOND_LINK_DOWN\n");
                new_slave->link  = BOND_LINK_DOWN;
        }
        if (bond_update_speed_duplex(new_slave) &&
            (new_slave->link != BOND_LINK_DOWN)) {
-                pr_warning(DRV_NAME
+                pr_warning("%s: Warning: failed to get speed and duplex from %s, assumed to be 100Mb/sec and Full.\n",
-                       ": %s: Warning: failed to get speed and duplex from %s, "
+                           bond_dev->name, new_slave->dev->name);
-                       "assumed to be 100Mb/sec and Full.\n",
-                       bond_dev->name, new_slave->dev->name);
                if (bond->params.mode == BOND_MODE_8023AD) {
-                        pr_warning(DRV_NAME
+                        pr_warning("%s: Warning: Operation of 802.3ad mode requires ETHTOOL support in base driver for proper aggregator selection.\n",
-                               ": %s: Warning: Operation of 802.3ad mode requires ETHTOOL "
+                                   bond_dev->name);
-                               "support in base driver for proper aggregator "
-                               "selection.\n", bond_dev->name);
                }
        }
@@ -1777,11 +1736,10 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
        if (res)
                goto err_close;
-        pr_info(DRV_NAME
+        pr_info("%s: enslaving %s as a%s interface with a%s link.\n",
-               ": %s: enslaving %s as a%s interface with a%s link.\n",
+                bond_dev->name, slave_dev->name,
-               bond_dev->name, slave_dev->name,
+                new_slave->state == BOND_STATE_ACTIVE ? "n active" : " backup",
-               new_slave->state == BOND_STATE_ACTIVE ? "n active" : " backup",
+                new_slave->link != BOND_LINK_DOWN ? "n up" : " down");
-               new_slave->link != BOND_LINK_DOWN ? "n up" : " down");
        /* enslave is successful */
        return 0;
@@ -1833,8 +1791,7 @@ int bond_release(struct net_device *bond_dev, struct net_device *slave_dev)
        /* slave is not a slave or master is not master of this slave */
        if (!(slave_dev->flags & IFF_SLAVE) ||
            (slave_dev->master != bond_dev)) {
-                pr_err(DRV_NAME
+                pr_err("%s: Error: cannot release %s.\n",
-                       ": %s: Error: cannot release %s.\n",
                       bond_dev->name, slave_dev->name);
                return -EINVAL;
        }
@@ -1844,9 +1801,8 @@ int bond_release(struct net_device *bond_dev, struct net_device *slave_dev)
        slave = bond_get_slave_by_dev(bond, slave_dev);
        if (!slave) {
                /* not a slave of this bond */
-                pr_info(DRV_NAME
+                pr_info("%s: %s not enslaved\n",
-                       ": %s: %s not enslaved\n",
+                        bond_dev->name, slave_dev->name);
-                       bond_dev->name, slave_dev->name);
                write_unlock_bh(&bond->lock);
                return -EINVAL;
        }
@@ -1854,14 +1810,10 @@ int bond_release(struct net_device *bond_dev, struct net_device *slave_dev)
        if (!bond->params.fail_over_mac) {
                if (!compare_ether_addr(bond_dev->dev_addr, slave->perm_hwaddr) &&
                    bond->slave_cnt > 1)
-                        pr_warning(DRV_NAME
+                        pr_warning("%s: Warning: the permanent HWaddr of %s - %pM - is still in use by %s. Set the HWaddr of %s to a different address to avoid conflicts.\n",
-                               ": %s: Warning: the permanent HWaddr of %s - "
+                                   bond_dev->name, slave_dev->name,
-                               "%pM - is still in use by %s. "
+                                   slave->perm_hwaddr,
-                               "Set the HWaddr of %s to a different address "
+                                   bond_dev->name, slave_dev->name);
-                               "to avoid conflicts.\n",
-                               bond_dev->name, slave_dev->name,
-                               slave->perm_hwaddr,
-                               bond_dev->name, slave_dev->name);
        }
        /* Inform AD package of unbinding of slave. */
@@ -1872,12 +1824,10 @@ int bond_release(struct net_device *bond_dev, struct net_device *slave_dev)
                bond_3ad_unbind_slave(slave);
        }
-        pr_info(DRV_NAME
+        pr_info("%s: releasing %s interface %s\n",
-               ": %s: releasing %s interface %s\n",
+                bond_dev->name,
-               bond_dev->name,
+                (slave->state == BOND_STATE_ACTIVE) ? "active" : "backup",
-               (slave->state == BOND_STATE_ACTIVE)
+                slave_dev->name);
-               ? "active" : "backup",
-               slave_dev->name);
        oldcurrent = bond->curr_active_slave;
@@ -1934,21 +1884,15 @@ int bond_release(struct net_device *bond_dev, struct net_device *slave_dev)
                if (list_empty(&bond->vlan_list)) {
                        bond_dev->features |= NETIF_F_VLAN_CHALLENGED;
                } else {
-                        pr_warning(DRV_NAME
+                        pr_warning("%s: Warning: clearing HW address of %s while it still has VLANs.\n",
-                               ": %s: Warning: clearing HW address of %s while it "
+                                   bond_dev->name, bond_dev->name);
-                               "still has VLANs.\n",
+                        pr_warning("%s: When re-adding slaves, make sure the bond's HW address matches its VLANs'.\n",
-                               bond_dev->name, bond_dev->name);
+                                   bond_dev->name);
-                        pr_warning(DRV_NAME
-                               ": %s: When re-adding slaves, make sure the bond's "
-                               "HW address matches its VLANs'.\n",
-                               bond_dev->name);
                }
        } else if ((bond_dev->features & NETIF_F_VLAN_CHALLENGED) &&
                   !bond_has_challenged_slaves(bond)) {
-                pr_info(DRV_NAME
+                pr_info("%s: last VLAN challenged slave %s left bond %s. VLAN blocking is removed\n",
-                       ": %s: last VLAN challenged slave %s "
+                        bond_dev->name, slave_dev->name, bond_dev->name);
-                       "left bond %s. VLAN blocking is removed\n",
-                       bond_dev->name, slave_dev->name, bond_dev->name);
                bond_dev->features &= ~NETIF_F_VLAN_CHALLENGED;
        }
@@ -2011,8 +1955,8 @@ int  bond_release_and_destroy(struct net_device *bond_dev,
        ret = bond_release(bond_dev, slave_dev);
        if ((ret == 0) && (bond->slave_cnt == 0)) {
-                pr_info(DRV_NAME ": %s: destroying bond %s.\n",
+                pr_info("%s: destroying bond %s.\n",
-                       bond_dev->name, bond_dev->name);
+                        bond_dev->name, bond_dev->name);
                unregister_netdevice(bond_dev);
        }
        return ret;
@@ -2116,19 +2060,13 @@ static int bond_release_all(struct net_device *bond_dev)
        if (list_empty(&bond->vlan_list))
                bond_dev->features |= NETIF_F_VLAN_CHALLENGED;
        else {
-                pr_warning(DRV_NAME
+                pr_warning("%s: Warning: clearing HW address of %s while it still has VLANs.\n",
-                       ": %s: Warning: clearing HW address of %s while it "
+                           bond_dev->name, bond_dev->name);
-                       "still has VLANs.\n",
+                pr_warning("%s: When re-adding slaves, make sure the bond's HW address matches its VLANs'.\n",
-                       bond_dev->name, bond_dev->name);
+                           bond_dev->name);
-                pr_warning(DRV_NAME
-                       ": %s: When re-adding slaves, make sure the bond's "
-                       "HW address matches its VLANs'.\n",
-                       bond_dev->name);
        }
-        pr_info(DRV_NAME
+        pr_info("%s: released all slaves\n", bond_dev->name);
-               ": %s: released all slaves\n",
-               bond_dev->name);
 out:
        write_unlock_bh(&bond->lock);
@@ -2254,16 +2192,14 @@ static int bond_miimon_inspect(struct bonding *bond)
                        slave->link = BOND_LINK_FAIL;
                        slave->delay = bond->params.downdelay;
                        if (slave->delay) {
-                                pr_info(DRV_NAME
+                                pr_info("%s: link status down for %sinterface %s, disabling it in %d ms.\n",
-                                       ": %s: link status down for %s"
+                                        bond->dev->name,
-                                       "interface %s, disabling it in %d ms.\n",
+                                        (bond->params.mode ==
-                                       bond->dev->name,
+                                         BOND_MODE_ACTIVEBACKUP) ?
-                                       (bond->params.mode ==
+                                        ((slave->state == BOND_STATE_ACTIVE) ?
-                                        BOND_MODE_ACTIVEBACKUP) ?
+                                         "active " : "backup ") : "",
-                                       ((slave->state == BOND_STATE_ACTIVE) ?
+                                        slave->dev->name,
-                                        "active " : "backup ") : "",
+                                        bond->params.downdelay * bond->params.miimon);
-                                       slave->dev->name,
-                                       bond->params.downdelay * bond->params.miimon);
                        }
                        /*FALLTHRU*/
                case BOND_LINK_FAIL:
@@ -2273,13 +2209,11 @@ static int bond_miimon_inspect(struct bonding *bond)
                                 */
                                slave->link = BOND_LINK_UP;
                                slave->jiffies = jiffies;
-                                pr_info(DRV_NAME
+                                pr_info("%s: link status up again after %d ms for interface %s.\n",
-                                       ": %s: link status up again after %d "
+                                        bond->dev->name,
-                                       "ms for interface %s.\n",
+                                        (bond->params.downdelay - slave->delay) *
-                                       bond->dev->name,
+                                        bond->params.miimon,
-                                       (bond->params.downdelay - slave->delay) *
+                                        slave->dev->name);
-                                       bond->params.miimon,
-                                       slave->dev->name);
                                continue;
                        }
@@ -2300,25 +2234,21 @@ static int bond_miimon_inspect(struct bonding *bond)
                        slave->delay = bond->params.updelay;
                        if (slave->delay) {
-                                pr_info(DRV_NAME
+                                pr_info("%s: link status up for interface %s, enabling it in %d ms.\n",
-                                       ": %s: link status up for "
+                                        bond->dev->name, slave->dev->name,
-                                       "interface %s, enabling it in %d ms.\n",
+                                        ignore_updelay ? 0 :
-                                       bond->dev->name, slave->dev->name,
+                                        bond->params.updelay *
-                                       ignore_updelay ? 0 :
+                                        bond->params.miimon);
-                                       bond->params.updelay *
-                                       bond->params.miimon);
                        }
                        /*FALLTHRU*/
                case BOND_LINK_BACK:
                        if (!link_state) {
                                slave->link = BOND_LINK_DOWN;
-                                pr_info(DRV_NAME
+                                pr_info("%s: link status down again after %d ms for interface %s.\n",
-                                       ": %s: link status down again after %d "
+                                        bond->dev->name,
-                                       "ms for interface %s.\n",
+                                        (bond->params.updelay - slave->delay) *
-                                       bond->dev->name,
+                                        bond->params.miimon,
-                                       (bond->params.updelay - slave->delay) *
+                                        slave->dev->name);
-                                       bond->params.miimon,
-                                       slave->dev->name);
                                continue;
                        }
@@ -2366,10 +2296,8 @@ static void bond_miimon_commit(struct bonding *bond)
                                slave->state = BOND_STATE_BACKUP;
                        }
-                        pr_info(DRV_NAME
+                        pr_info("%s: link status definitely up for interface %s.\n",
-                               ": %s: link status definitely "
+                                bond->dev->name, slave->dev->name);
-                               "up for interface %s.\n",
-                               bond->dev->name, slave->dev->name);
                        /* notify ad that the link status has changed */
                        if (bond->params.mode == BOND_MODE_8023AD)
@@ -2395,10 +2323,8 @@ static void bond_miimon_commit(struct bonding *bond)
                            bond->params.mode == BOND_MODE_8023AD)
                                bond_set_slave_inactive_flags(slave);
-                        pr_info(DRV_NAME
+                        pr_info("%s: link status definitely down for interface %s, disabling it\n",
-                               ": %s: link status definitely down for "
+                                bond->dev->name, slave->dev->name);
-                               "interface %s, disabling it\n",
-                               bond->dev->name, slave->dev->name);
                        if (bond->params.mode == BOND_MODE_8023AD)
                                bond_3ad_handle_link_change(slave,
@@ -2414,8 +2340,7 @@ static void bond_miimon_commit(struct bonding *bond)
                        continue;
                default:
-                        pr_err(DRV_NAME
+                        pr_err("%s: invalid new link %d on slave %s\n",
-                               ": %s: invalid new link %d on slave %s\n",
                               bond->dev->name, slave->new_link,
                               slave->dev->name);
                        slave->new_link = BOND_LINK_NOCHANGE;
@@ -2534,19 +2459,19 @@ static void bond_arp_send(struct net_device *slave_dev, int arp_op, __be32 dest_
        struct sk_buff *skb;
        pr_debug("arp %d on slave %s: dst %x src %x vid %d\n", arp_op,
-               slave_dev->name, dest_ip, src_ip, vlan_id);
+                 slave_dev->name, dest_ip, src_ip, vlan_id);
        skb = arp_create(arp_op, ETH_P_ARP, dest_ip, slave_dev, src_ip,
                         NULL, slave_dev->dev_addr, NULL);
        if (!skb) {
-                pr_err(DRV_NAME ": ARP packet allocation failed\n");
+                pr_err("ARP packet allocation failed\n");
                return;
        }
        if (vlan_id) {
                skb = vlan_put_tag(skb, vlan_id);
                if (!skb) {
-                        pr_err(DRV_NAME ": failed to insert VLAN tag\n");
+                        pr_err("failed to insert VLAN tag\n");
                        return;
                }
        }
@@ -2586,9 +2511,8 @@ static void bond_arp_send_all(struct bonding *bond, struct slave *slave)
                rv = ip_route_output_key(dev_net(bond->dev), &rt, &fl);
                if (rv) {
                        if (net_ratelimit()) {
-                                pr_warning(DRV_NAME
+                                pr_warning("%s: no route to arp_ip_target %pI4\n",
-                             ": %s: no route to arp_ip_target %pI4\n",
+                                           bond->dev->name, &fl.fl4_dst);
-                                       bond->dev->name, &fl.fl4_dst);
                        }
                        continue;
                }
@@ -2623,10 +2547,9 @@ static void bond_arp_send_all(struct bonding *bond, struct slave *slave)
                }
                if (net_ratelimit()) {
-                        pr_warning(DRV_NAME
+                        pr_warning("%s: no path to arp_ip_target %pI4 via rt.dev %s\n",
-               ": %s: no path to arp_ip_target %pI4 via rt.dev %s\n",
+                                   bond->dev->name, &fl.fl4_dst,
-                               bond->dev->name, &fl.fl4_dst,
+                                   rt->u.dst.dev ? rt->u.dst.dev->name : "NULL");
-                               rt->u.dst.dev ? rt->u.dst.dev->name : "NULL");
                }
                ip_rt_put(rt);
        }
@@ -2644,8 +2567,8 @@ static void bond_send_gratuitous_arp(struct bonding *bond)
        struct vlan_entry *vlan;
        struct net_device *vlan_dev;
-        pr_debug("bond_send_grat_arp: bond %s slave %s\n", bond->dev->name,
+        pr_debug("bond_send_grat_arp: bond %s slave %s\n",
-                                slave ? slave->dev->name : "NULL");
+                 bond->dev->name, slave ? slave->dev->name : "NULL");
        if (!slave || !bond->send_grat_arp ||
            test_bit(__LINK_STATE_LINKWATCH_PENDING, &slave->dev->state))
@@ -2674,7 +2597,8 @@ static void bond_validate_arp(struct bonding *bond, struct slave *slave, __be32
        for (i = 0; (i < BOND_MAX_ARP_TARGETS) && targets[i]; i++) {
                pr_debug("bva: sip %pI4 tip %pI4 t[%d] %pI4 bhti(tip) %d\n",
-                        &sip, &tip, i, &targets[i], bond_has_this_ip(bond, tip));
+                         &sip, &tip, i, &targets[i],
+                         bond_has_this_ip(bond, tip));
                if (sip == targets[i]) {
                        if (bond_has_this_ip(bond, tip))
                                slave->last_arp_rx = jiffies;
@@ -2698,8 +2622,8 @@ static int bond_arp_rcv(struct sk_buff *skb, struct net_device *dev, struct pack
        read_lock(&bond->lock);
        pr_debug("bond_arp_rcv: bond %s skb->dev %s orig_dev %s\n",
-                bond->dev->name, skb->dev ? skb->dev->name : "NULL",
+                 bond->dev->name, skb->dev ? skb->dev->name : "NULL",
-                orig_dev ? orig_dev->name : "NULL");
+                 orig_dev ? orig_dev->name : "NULL");
        slave = bond_get_slave_by_dev(bond, orig_dev);
        if (!slave || !slave_do_arp_validate(bond, slave))
@@ -2724,9 +2648,9 @@ static int bond_arp_rcv(struct sk_buff *skb, struct net_device *dev, struct pack
        memcpy(&tip, arp_ptr, 4);
        pr_debug("bond_arp_rcv: %s %s/%d av %d sv %d sip %pI4 tip %pI4\n",
-                bond->dev->name, slave->dev->name, slave->state,
+                 bond->dev->name, slave->dev->name, slave->state,
-                bond->params.arp_validate, slave_do_arp_validate(bond, slave),
+                 bond->params.arp_validate, slave_do_arp_validate(bond, slave),
-                &sip, &tip);
+                 &sip, &tip);
        /*
         * Backup slaves won't see the ARP reply, but do come through
@@ -2800,17 +2724,14 @@ void bond_loadbalance_arp_mon(struct work_struct *work)
                                 * is closed.
                                 */
                                if (!oldcurrent) {
-                                        pr_info(DRV_NAME
+                                        pr_info("%s: link status definitely up for interface %s, ",
-                                               ": %s: link status definitely "
+                                                bond->dev->name,
-                                               "up for interface %s, ",
+                                                slave->dev->name);
-                                               bond->dev->name,
-                                               slave->dev->name);
                                        do_failover = 1;
                                } else {
-                                        pr_info(DRV_NAME
+                                        pr_info("%s: interface %s is now up\n",
-                                               ": %s: interface %s is now up\n",
+                                                bond->dev->name,
-                                               bond->dev->name,
+                                                slave->dev->name);
-                                               slave->dev->name);
                                }
                        }
                } else {
@@ -2829,10 +2750,9 @@ void bond_loadbalance_arp_mon(struct work_struct *work)
                                if (slave->link_failure_count < UINT_MAX)
                                        slave->link_failure_count++;
-                                pr_info(DRV_NAME
+                                pr_info("%s: interface %s is now down.\n",
-                                       ": %s: interface %s is now down.\n",
+                                        bond->dev->name,
-                                       bond->dev->name,
+                                        slave->dev->name);
-                                       slave->dev->name);
                                if (slave == oldcurrent)
                                        do_failover = 1;
@@ -2965,9 +2885,7 @@ static void bond_ab_arp_commit(struct bonding *bond, int delta_in_ticks)
                                slave->link = BOND_LINK_UP;
                                bond->current_arp_slave = NULL;
-                                pr_info(DRV_NAME
+                                pr_info("%s: link status definitely up for interface %s.\n",
-                                        ": %s: link status definitely "
-                                        "up for interface %s.\n",
                                        bond->dev->name, slave->dev->name);
                                if (!bond->curr_active_slave ||
@@ -2985,9 +2903,7 @@ static void bond_ab_arp_commit(struct bonding *bond, int delta_in_ticks)
                        slave->link = BOND_LINK_DOWN;
                        bond_set_slave_inactive_flags(slave);
-                        pr_info(DRV_NAME
+                        pr_info("%s: link status definitely down for interface %s, disabling it\n",
-                                ": %s: link status definitely down for "
-                                "interface %s, disabling it\n",
                                bond->dev->name, slave->dev->name);
                        if (slave == bond->curr_active_slave) {
@@ -2998,8 +2914,7 @@ static void bond_ab_arp_commit(struct bonding *bond, int delta_in_ticks)
                        continue;
                default:
-                        pr_err(DRV_NAME
+                        pr_err("%s: impossible: new_link %d on slave %s\n",
-                               ": %s: impossible: new_link %d on slave %s\n",
                               bond->dev->name, slave->new_link,
                               slave->dev->name);
                        continue;
@@ -3028,9 +2943,9 @@ static void bond_ab_arp_probe(struct bonding *bond)
        read_lock(&bond->curr_slave_lock);
        if (bond->current_arp_slave && bond->curr_active_slave)
-                pr_info(DRV_NAME "PROBE: c_arp %s && cas %s BAD\n",
+                pr_info("PROBE: c_arp %s && cas %s BAD\n",
-                       bond->current_arp_slave->dev->name,
+                        bond->current_arp_slave->dev->name,
-                       bond->curr_active_slave->dev->name);
+                        bond->curr_active_slave->dev->name);
        if (bond->curr_active_slave) {
                bond_arp_send_all(bond, bond->curr_active_slave);
@@ -3078,9 +2993,8 @@ static void bond_ab_arp_probe(struct bonding *bond)
                        bond_set_slave_inactive_flags(slave);
-                        pr_info(DRV_NAME
+                        pr_info("%s: backup interface %s is now down.\n",
-                               ": %s: backup interface %s is now down.\n",
+                                bond->dev->name, slave->dev->name);
-                               bond->dev->name, slave->dev->name);
                }
        }
 }
@@ -3360,9 +3274,8 @@ static void bond_create_proc_entry(struct bonding *bond)
                                                    S_IRUGO, bn->proc_dir,
                                                    &bond_info_fops, bond);
                if (bond->proc_entry == NULL)
-                        pr_warning(DRV_NAME
+                        pr_warning("Warning: Cannot create /proc/net/%s/%s\n",
-                               ": Warning: Cannot create /proc/net/%s/%s\n",
+                                   DRV_NAME, bond_dev->name);
-                               DRV_NAME, bond_dev->name);
                else
                        memcpy(bond->proc_file_name, bond_dev->name, IFNAMSIZ);
        }
@@ -3388,9 +3301,8 @@ static void bond_create_proc_dir(struct bond_net *bn)
        if (!bn->proc_dir) {
                bn->proc_dir = proc_mkdir(DRV_NAME, bn->net->proc_net);
                if (!bn->proc_dir)
-                        pr_warning(DRV_NAME
+                        pr_warning("Warning: cannot create /proc/net/%s\n",
-                                ": Warning: cannot create /proc/net/%s\n",
+                                   DRV_NAME);
-                                DRV_NAME);
        }
 }
@@ -3539,8 +3451,8 @@ static int bond_netdev_event(struct notifier_block *this,
        struct net_device *event_dev = (struct net_device *)ptr;
        pr_debug("event_dev: %s, event: %lx\n",
-                (event_dev ? event_dev->name : "None"),
+                 event_dev ? event_dev->name : "None",
-                event);
+                 event);
        if (!(event_dev->priv_flags & IFF_BONDING))
                return NOTIFY_DONE;
@@ -3875,8 +3787,7 @@ static int bond_do_ioctl(struct net_device *bond_dev, struct ifreq *ifr, int cmd
        struct mii_ioctl_data *mii = NULL;
        int res = 0;
-        pr_debug("bond_ioctl: master=%s, cmd=%d\n",
+        pr_debug("bond_ioctl: master=%s, cmd=%d\n", bond_dev->name, cmd);
-                bond_dev->name, cmd);
        switch (cmd) {
        case SIOCGMIIPHY:
@@ -3945,12 +3856,12 @@ static int bond_do_ioctl(struct net_device *bond_dev, struct ifreq *ifr, int cmd
        slave_dev = dev_get_by_name(dev_net(bond_dev), ifr->ifr_slave);
-        pr_debug("slave_dev=%p: \n", slave_dev);
+        pr_debug("slave_dev=%p:\n", slave_dev);
        if (!slave_dev)
                res = -ENODEV;
        else {
-                pr_debug("slave_dev->name=%s: \n", slave_dev->name);
+                pr_debug("slave_dev->name=%s:\n", slave_dev->name);
                switch (cmd) {
                case BOND_ENSLAVE_OLD:
                case SIOCBONDENSLAVE:
@@ -4059,7 +3970,7 @@ static int bond_change_mtu(struct net_device *bond_dev, int new_mtu)
        int i;
        pr_debug("bond=%p, name=%s, new_mtu=%d\n", bond,
-                (bond_dev ? bond_dev->name : "None"), new_mtu);
+                 (bond_dev ? bond_dev->name : "None"), new_mtu);
        /* Can't hold bond->lock with bh disabled here since
         * some base drivers panic. On the other hand we can't
@@ -4077,8 +3988,10 @@ static int bond_change_mtu(struct net_device *bond_dev, int new_mtu)
         */
        bond_for_each_slave(bond, slave, i) {
-                pr_debug("s %p s->p %p c_m %p\n", slave,
+                pr_debug("s %p s->p %p c_m %p\n",
-                        slave->prev, slave->dev->netdev_ops->ndo_change_mtu);
+                         slave,
+                         slave->prev,
+                         slave->dev->netdev_ops->ndo_change_mtu);
                res = dev_set_mtu(slave->dev, new_mtu);
@@ -4108,8 +4021,8 @@ unwind:
                tmp_res = dev_set_mtu(slave->dev, bond_dev->mtu);
                if (tmp_res) {
-                        pr_debug("unwind err %d dev %s\n", tmp_res,
+                        pr_debug("unwind err %d dev %s\n",
-                                slave->dev->name);
+                                 tmp_res, slave->dev->name);
                }
        }
@@ -4135,7 +4048,8 @@ static int bond_set_mac_address(struct net_device *bond_dev, void *addr)
                return bond_alb_set_mac_address(bond_dev, addr);
-        pr_debug("bond=%p, name=%s\n", bond, (bond_dev ? bond_dev->name : "None"));
+        pr_debug("bond=%p, name=%s\n",
+                 bond, bond_dev ? bond_dev->name : "None");
        /*
         * If fail_over_mac is set to active, do nothing and return
@@ -4200,8 +4114,8 @@ unwind:
                tmp_res = dev_set_mac_address(slave->dev, &tmp_sa);
                if (tmp_res) {
-                        pr_debug("unwind err %d dev %s\n", tmp_res,
+                        pr_debug("unwind err %d dev %s\n",
-                                slave->dev->name);
+                                 tmp_res, slave->dev->name);
                }
        }
@@ -4357,9 +4271,7 @@ static int bond_xmit_broadcast(struct sk_buff *skb, struct net_device *bond_dev)
                        if (tx_dev) {
                                struct sk_buff *skb2 = skb_clone(skb, GFP_ATOMIC);
                                if (!skb2) {
-                                        pr_err(DRV_NAME
+                                        pr_err("%s: Error: bond_xmit_broadcast(): skb_clone() failed\n",
-                                               ": %s: Error: bond_xmit_broadcast(): "
-                                               "skb_clone() failed\n",
                                               bond_dev->name);
                                        continue;
                                }
@@ -4425,8 +4337,8 @@ static netdev_tx_t bond_start_xmit(struct sk_buff *skb, struct net_device *dev)
                return bond_alb_xmit(skb, dev);
        default:
                /* Should never happen, mode already checked */
-                pr_err(DRV_NAME ": %s: Error: Unknown bonding mode %d\n",
+                pr_err("%s: Error: Unknown bonding mode %d\n",
-                     dev->name, bond->params.mode);
+                       dev->name, bond->params.mode);
                WARN_ON_ONCE(1);
                dev_kfree_skb(skb);
                return NETDEV_TX_OK;
@@ -4462,10 +4374,8 @@ void bond_set_mode_ops(struct bonding *bond, int mode)
                break;
        default:
                /* Should never happen, mode already checked */
-                pr_err(DRV_NAME
+                pr_err("%s: Error: Unknown bonding mode %d\n",
-                       ": %s: Error: Unknown bonding mode %d\n",
+                       bond_dev->name, mode);
-                       bond_dev->name,
-                       mode);
                break;
        }
 }
@@ -4650,8 +4560,7 @@ static int bond_check_params(struct bond_params *params)
        if (mode) {
                bond_mode = bond_parse_parm(mode, bond_mode_tbl);
                if (bond_mode == -1) {
-                        pr_err(DRV_NAME
+                        pr_err("Error: Invalid bonding mode \"%s\"\n",
-                               ": Error: Invalid bonding mode \"%s\"\n",
                               mode == NULL ? "NULL" : mode);
                        return -EINVAL;
                }
@@ -4660,16 +4569,13 @@ static int bond_check_params(struct bond_params *params)
        if (xmit_hash_policy) {
                if ((bond_mode != BOND_MODE_XOR) &&
                    (bond_mode != BOND_MODE_8023AD)) {
-                        pr_info(DRV_NAME
+                        pr_info("xmit_hash_policy param is irrelevant in mode %s\n",
-                                ": xmit_hash_policy param is irrelevant in"
-                                " mode %s\n",
                               bond_mode_name(bond_mode));
                } else {
                        xmit_hashtype = bond_parse_parm(xmit_hash_policy,
                                                        xmit_hashtype_tbl);
                        if (xmit_hashtype == -1) {
-                                pr_err(DRV_NAME
+                                pr_err("Error: Invalid xmit_hash_policy \"%s\"\n",
-                                       ": Error: Invalid xmit_hash_policy \"%s\"\n",
                                       xmit_hash_policy == NULL ? "NULL" :
                                       xmit_hash_policy);
                                return -EINVAL;
@@ -4679,14 +4585,12 @@ static int bond_check_params(struct bond_params *params)
        if (lacp_rate) {
                if (bond_mode != BOND_MODE_8023AD) {
-                        pr_info(DRV_NAME
+                        pr_info("lacp_rate param is irrelevant in mode %s\n",
-                               ": lacp_rate param is irrelevant in mode %s\n",
+                                bond_mode_name(bond_mode));
-                               bond_mode_name(bond_mode));
                } else {
                        lacp_fast = bond_parse_parm(lacp_rate, bond_lacp_tbl);
                        if (lacp_fast == -1) {
-                                pr_err(DRV_NAME
+                                pr_err("Error: Invalid lacp rate \"%s\"\n",
-                                       ": Error: Invalid lacp rate \"%s\"\n",
                                       lacp_rate == NULL ? "NULL" : lacp_rate);
                                return -EINVAL;
                        }
@@ -4696,82 +4600,64 @@ static int bond_check_params(struct bond_params *params)
        if (ad_select) {
                params->ad_select = bond_parse_parm(ad_select, ad_select_tbl);
                if (params->ad_select == -1) {
-                        pr_err(DRV_NAME
+                        pr_err("Error: Invalid ad_select \"%s\"\n",
-                               ": Error: Invalid ad_select \"%s\"\n",
                               ad_select == NULL ? "NULL" : ad_select);
                        return -EINVAL;
                }
                if (bond_mode != BOND_MODE_8023AD) {
-                        pr_warning(DRV_NAME
+                        pr_warning("ad_select param only affects 802.3ad mode\n");
-                               ": ad_select param only affects 802.3ad mode\n");
                }
        } else {
                params->ad_select = BOND_AD_STABLE;
        }
        if (max_bonds < 0) {
-                pr_warning(DRV_NAME
+                pr_warning("Warning: max_bonds (%d) not in range %d-%d, so it was reset to BOND_DEFAULT_MAX_BONDS (%d)\n",
-                       ": Warning: max_bonds (%d) not in range %d-%d, so it "
+                           max_bonds, 0, INT_MAX, BOND_DEFAULT_MAX_BONDS);
-                       "was reset to BOND_DEFAULT_MAX_BONDS (%d)\n",
-                       max_bonds, 0, INT_MAX, BOND_DEFAULT_MAX_BONDS);
                max_bonds = BOND_DEFAULT_MAX_BONDS;
        }
        if (miimon < 0) {
-                pr_warning(DRV_NAME
+                pr_warning("Warning: miimon module parameter (%d), not in range 0-%d, so it was reset to %d\n",
-                       ": Warning: miimon module parameter (%d), "
+                           miimon, INT_MAX, BOND_LINK_MON_INTERV);
-                       "not in range 0-%d, so it was reset to %d\n",
-                       miimon, INT_MAX, BOND_LINK_MON_INTERV);
                miimon = BOND_LINK_MON_INTERV;
        }
        if (updelay < 0) {
-                pr_warning(DRV_NAME
+                pr_warning("Warning: updelay module parameter (%d), not in range 0-%d, so it was reset to 0\n",
-                       ": Warning: updelay module parameter (%d), "
+                           updelay, INT_MAX);
-                       "not in range 0-%d, so it was reset to 0\n",
-                       updelay, INT_MAX);
                updelay = 0;
        }
        if (downdelay < 0) {
-                pr_warning(DRV_NAME
+                pr_warning("Warning: downdelay module parameter (%d), not in range 0-%d, so it was reset to 0\n",
-                       ": Warning: downdelay module parameter (%d), "
+                           downdelay, INT_MAX);
-                       "not in range 0-%d, so it was reset to 0\n",
-                       downdelay, INT_MAX);
                downdelay = 0;
        }
        if ((use_carrier != 0) && (use_carrier != 1)) {
-                pr_warning(DRV_NAME
+                pr_warning("Warning: use_carrier module parameter (%d), not of valid value (0/1), so it was set to 1\n",
-                       ": Warning: use_carrier module parameter (%d), "
+                           use_carrier);
-                       "not of valid value (0/1), so it was set to 1\n",
-                       use_carrier);
                use_carrier = 1;
        }
        if (num_grat_arp < 0 || num_grat_arp > 255) {
-                pr_warning(DRV_NAME
+                pr_warning("Warning: num_grat_arp (%d) not in range 0-255 so it was reset to 1 \n",
-                       ": Warning: num_grat_arp (%d) not in range 0-255 so it "
+                           num_grat_arp);
-                       "was reset to 1 \n", num_grat_arp);
                num_grat_arp = 1;
        }
        if (num_unsol_na < 0 || num_unsol_na > 255) {
-                pr_warning(DRV_NAME
+                pr_warning("Warning: num_unsol_na (%d) not in range 0-255 so it was reset to 1 \n",
-                       ": Warning: num_unsol_na (%d) not in range 0-255 so it "
+                           num_unsol_na);
-                       "was reset to 1 \n", num_unsol_na);
                num_unsol_na = 1;
        }
        /* reset values for 802.3ad */
        if (bond_mode == BOND_MODE_8023AD) {
                if (!miimon) {
-                        pr_warning(DRV_NAME
+                        pr_warning("Warning: miimon must be specified, otherwise bonding will not detect link failure, speed and duplex which are essential for 802.3ad operation\n");
-                               ": Warning: miimon must be specified, "
-                               "otherwise bonding will not detect link "
-                               "failure, speed and duplex which are "
-                               "essential for 802.3ad operation\n");
                        pr_warning("Forcing miimon to 100msec\n");
                        miimon = 100;
                }
@@ -4781,24 +4667,15 @@ static int bond_check_params(struct bond_params *params)
        if ((bond_mode == BOND_MODE_TLB) ||
            (bond_mode == BOND_MODE_ALB)) {
                if (!miimon) {
-                        pr_warning(DRV_NAME
+                        pr_warning("Warning: miimon must be specified, otherwise bonding will not detect link failure and link speed which are essential for TLB/ALB load balancing\n");
-                               ": Warning: miimon must be specified, "
-                               "otherwise bonding will not detect link "
-                               "failure and link speed which are essential "
-                               "for TLB/ALB load balancing\n");
                        pr_warning("Forcing miimon to 100msec\n");
                        miimon = 100;
                }
        }
        if (bond_mode == BOND_MODE_ALB) {
-                pr_notice(DRV_NAME
+                pr_notice("In ALB mode you might experience client disconnections upon reconnection of a link if the bonding module updelay parameter (%d msec) is incompatible with the forwarding delay time of the switch\n",
-                       ": In ALB mode you might experience client "
+                          updelay);
-                       "disconnections upon reconnection of a link if the "
-                       "bonding module updelay parameter (%d msec) is "
-                       "incompatible with the forwarding delay time of the "
-                       "switch\n",
-                       updelay);
        }
        if (!miimon) {
@@ -4806,49 +4683,37 @@ static int bond_check_params(struct bond_params *params)
                        /* just warn the user the up/down delay will have
                         * no effect since miimon is zero...
                         */
-                        pr_warning(DRV_NAME
+                        pr_warning("Warning: miimon module parameter not set and updelay (%d) or downdelay (%d) module parameter is set; updelay and downdelay have no effect unless miimon is set\n",
-                               ": Warning: miimon module parameter not set "
+                                   updelay, downdelay);
-                               "and updelay (%d) or downdelay (%d) module "
-                               "parameter is set; updelay and downdelay have "
-                               "no effect unless miimon is set\n",
-                               updelay, downdelay);
                }
        } else {
                /* don't allow arp monitoring */
                if (arp_interval) {
-                        pr_warning(DRV_NAME
+                        pr_warning("Warning: miimon (%d) and arp_interval (%d) can't be used simultaneously, disabling ARP monitoring\n",
-                               ": Warning: miimon (%d) and arp_interval (%d) "
+                                   miimon, arp_interval);
-                               "can't be used simultaneously, disabling ARP "
-                               "monitoring\n",
-                               miimon, arp_interval);
                        arp_interval = 0;
                }
                if ((updelay % miimon) != 0) {
-                        pr_warning(DRV_NAME
+                        pr_warning("Warning: updelay (%d) is not a multiple of miimon (%d), updelay rounded to %d ms\n",
-                               ": Warning: updelay (%d) is not a multiple "
+                                   updelay, miimon,
-                               "of miimon (%d), updelay rounded to %d ms\n",
+                                   (updelay / miimon) * miimon);
-                               updelay, miimon, (updelay / miimon) * miimon);
                }
                updelay /= miimon;
                if ((downdelay % miimon) != 0) {
-                        pr_warning(DRV_NAME
+                        pr_warning("Warning: downdelay (%d) is not a multiple of miimon (%d), downdelay rounded to %d ms\n",
-                               ": Warning: downdelay (%d) is not a multiple "
+                                   downdelay, miimon,
-                               "of miimon (%d), downdelay rounded to %d ms\n",
+                                   (downdelay / miimon) * miimon);
-                               downdelay, miimon,
-                               (downdelay / miimon) * miimon);
                }
                downdelay /= miimon;
        }
        if (arp_interval < 0) {
-                pr_warning(DRV_NAME
+                pr_warning("Warning: arp_interval module parameter (%d) , not in range 0-%d, so it was reset to %d\n",
-                       ": Warning: arp_interval module parameter (%d) "
+                           arp_interval, INT_MAX, BOND_LINK_ARP_INTERV);
-                       ", not in range 0-%d, so it was reset to %d\n",
-                       arp_interval, INT_MAX, BOND_LINK_ARP_INTERV);
                arp_interval = BOND_LINK_ARP_INTERV;
        }
@@ -4858,10 +4723,8 @@ static int bond_check_params(struct bond_params *params)
                /* not complete check, but should be good enough to
                   catch mistakes */
                if (!isdigit(arp_ip_target[arp_ip_count][0])) {
-                        pr_warning(DRV_NAME
+                        pr_warning("Warning: bad arp_ip_target module parameter (%s), ARP monitoring will not be performed\n",
-                               ": Warning: bad arp_ip_target module parameter "
+                                   arp_ip_target[arp_ip_count]);
-                               "(%s), ARP monitoring will not be performed\n",
-                               arp_ip_target[arp_ip_count]);
                        arp_interval = 0;
                } else {
                        __be32 ip = in_aton(arp_ip_target[arp_ip_count]);
@@ -4871,31 +4734,25 @@ static int bond_check_params(struct bond_params *params)
        if (arp_interval && !arp_ip_count) {
                /* don't allow arping if no arp_ip_target given... */
-                pr_warning(DRV_NAME
+                pr_warning("Warning: arp_interval module parameter (%d) specified without providing an arp_ip_target parameter, arp_interval was reset to 0\n",
-                       ": Warning: arp_interval module parameter (%d) "
+                           arp_interval);
-                       "specified without providing an arp_ip_target "
-                       "parameter, arp_interval was reset to 0\n",
-                       arp_interval);
                arp_interval = 0;
        }
        if (arp_validate) {
                if (bond_mode != BOND_MODE_ACTIVEBACKUP) {
-                        pr_err(DRV_NAME
+                        pr_err("arp_validate only supported in active-backup mode\n");
-                               ": arp_validate only supported in active-backup mode\n");
                        return -EINVAL;
                }
                if (!arp_interval) {
-                        pr_err(DRV_NAME
+                        pr_err("arp_validate requires arp_interval\n");
-                               ": arp_validate requires arp_interval\n");
                        return -EINVAL;
                }
                arp_validate_value = bond_parse_parm(arp_validate,
                                                     arp_validate_tbl);
                if (arp_validate_value == -1) {
-                        pr_err(DRV_NAME
+                        pr_err("Error: invalid arp_validate \"%s\"\n",
-                               ": Error: invalid arp_validate \"%s\"\n",
                               arp_validate == NULL ? "NULL" : arp_validate);
                        return -EINVAL;
                }
@@ -4903,17 +4760,14 @@ static int bond_check_params(struct bond_params *params)
                arp_validate_value = 0;
        if (miimon) {
-                pr_info(DRV_NAME
+                pr_info("MII link monitoring set to %d ms\n", miimon);
-                       ": MII link monitoring set to %d ms\n",
-                       miimon);
        } else if (arp_interval) {
                int i;
-                pr_info(DRV_NAME ": ARP monitoring set to %d ms,"
+                pr_info("ARP monitoring set to %d ms, validate %s, with %d target(s):",
-                       " validate %s, with %d target(s):",
+                        arp_interval,
-                       arp_interval,
+                        arp_validate_tbl[arp_validate_value].modename,
-                       arp_validate_tbl[arp_validate_value].modename,
+                        arp_ip_count);
-                       arp_ip_count);
                for (i = 0; i < arp_ip_count; i++)
                        pr_info(" %s", arp_ip_target[i]);
@@ -4924,21 +4778,15 @@ static int bond_check_params(struct bond_params *params)
                /* miimon and arp_interval not set, we need one so things
                 * work as expected, see bonding.txt for details
                 */
-                pr_warning(DRV_NAME
+                pr_warning("Warning: either miimon or arp_interval and arp_ip_target module parameters must be specified, otherwise bonding will not detect link failures! see bonding.txt for details.\n");
-                       ": Warning: either miimon or arp_interval and "
-                       "arp_ip_target module parameters must be specified, "
-                       "otherwise bonding will not detect link failures! see "
-                       "bonding.txt for details.\n");
        }
        if (primary && !USES_PRIMARY(bond_mode)) {
                /* currently, using a primary only makes sense
                 * in active backup, TLB or ALB modes
                 */
-                pr_warning(DRV_NAME
+                pr_warning("Warning: %s primary device specified but has no effect in %s mode\n",
-                       ": Warning: %s primary device specified but has no "
+                           primary, bond_mode_name(bond_mode));
-                       "effect in %s mode\n",
-                       primary, bond_mode_name(bond_mode));
                primary = NULL;
        }
@@ -4946,8 +4794,7 @@ static int bond_check_params(struct bond_params *params)
                primary_reselect_value = bond_parse_parm(primary_reselect,
                                                         pri_reselect_tbl);
                if (primary_reselect_value == -1) {
-                        pr_err(DRV_NAME
+                        pr_err("Error: Invalid primary_reselect \"%s\"\n",
-                               ": Error: Invalid primary_reselect \"%s\"\n",
                               primary_reselect ==
                                        NULL ? "NULL" : primary_reselect);
                        return -EINVAL;
@@ -4960,16 +4807,13 @@ static int bond_check_params(struct bond_params *params)
                fail_over_mac_value = bond_parse_parm(fail_over_mac,
                                                      fail_over_mac_tbl);
                if (fail_over_mac_value == -1) {
-                        pr_err(DRV_NAME
+                        pr_err("Error: invalid fail_over_mac \"%s\"\n",
-                               ": Error: invalid fail_over_mac \"%s\"\n",
                               arp_validate == NULL ? "NULL" : arp_validate);
                        return -EINVAL;
                }
                if (bond_mode != BOND_MODE_ACTIVEBACKUP)
-                        pr_warning(DRV_NAME
+                        pr_warning("Warning: fail_over_mac only affects active-backup mode.\n");
-                               ": Warning: fail_over_mac only affects "
-                               "active-backup mode.\n");
        } else {
                fail_over_mac_value = BOND_FOM_NONE;
        }
@@ -5076,8 +4920,7 @@ int bond_create(struct net *net, const char *name)
        bond_dev = alloc_netdev(sizeof(struct bonding), name ? name : "",
                                bond_setup);
        if (!bond_dev) {
-                pr_err(DRV_NAME ": %s: eek! can't alloc netdev!\n",
+                pr_err("%s: eek! can't alloc netdev!\n", name);
-                       name);
                res = -ENOMEM;
                goto out;
        }
diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c
index 4e00b4f83641..5acd557cea9b 100644
--- a/drivers/net/bonding/bond_sysfs.c
+++ b/drivers/net/bonding/bond_sysfs.c
@@ -19,6 +19,9 @@
 * file called LICENSE.
 *
 */
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/device.h>
@@ -109,11 +112,10 @@ static ssize_t bonding_store_bonds(struct class *cls,
                goto err_no_cmd;
        if (command[0] == '+') {
-                pr_info(DRV_NAME
+                pr_info("%s is being created...\n", ifname);
-                        ": %s is being created...\n", ifname);
                rv = bond_create(net, ifname);
                if (rv) {
-                        pr_info(DRV_NAME ": Bond creation failed.\n");
+                        pr_info("Bond creation failed.\n");
                        res = rv;
                }
        } else if (command[0] == '-') {
@@ -122,12 +124,10 @@ static ssize_t bonding_store_bonds(struct class *cls,
                rtnl_lock();
                bond_dev = bond_get_by_name(net, ifname);
                if (bond_dev) {
-                        pr_info(DRV_NAME ": %s is being deleted...\n",
+                        pr_info("%s is being deleted...\n", ifname);
-                                ifname);
                        unregister_netdevice(bond_dev);
                } else {
-                        pr_err(DRV_NAME ": unable to delete non-existent %s\n",
+                        pr_err("unable to delete non-existent %s\n", ifname);
-                               ifname);
                        res = -ENODEV;
                }
                rtnl_unlock();
@@ -140,8 +140,7 @@ static ssize_t bonding_store_bonds(struct class *cls,
        return res;
 err_no_cmd:
-        pr_err(DRV_NAME ": no command found in bonding_masters."
+        pr_err("no command found in bonding_masters. Use +ifname or -ifname.\n");
-               " Use +ifname or -ifname.\n");
        return -EPERM;
 }
@@ -225,8 +224,8 @@ static ssize_t bonding_store_slaves(struct device *d,
        /* Quick sanity check -- is the bond interface up? */
        if (!(bond->dev->flags & IFF_UP)) {
-                pr_warning(DRV_NAME ": %s: doing slave updates when "
+                pr_warning("%s: doing slave updates when interface is down.\n",
-                           "interface is down.\n", bond->dev->name);
+                           bond->dev->name);
        }
        /* Note:  We can't hold bond->lock here, as bond_create grabs it. */
@@ -247,17 +246,14 @@ static ssize_t bonding_store_slaves(struct device *d,
                dev = __dev_get_by_name(dev_net(bond->dev), ifname);
                if (!dev) {
-                        pr_info(DRV_NAME
+                        pr_info("%s: Interface %s does not exist!\n",
-                               ": %s: Interface %s does not exist!\n",
+                                bond->dev->name, ifname);
-                               bond->dev->name, ifname);
                        ret = -ENODEV;
                        goto out;
                }
                if (dev->flags & IFF_UP) {
-                        pr_err(DRV_NAME
+                        pr_err("%s: Error: Unable to enslave %s because it is already up.\n",
-                               ": %s: Error: Unable to enslave %s "
-                               "because it is already up.\n",
                               bond->dev->name, dev->name);
                        ret = -EPERM;
                        goto out;
@@ -266,8 +262,7 @@ static ssize_t bonding_store_slaves(struct device *d,
                read_lock(&bond->lock);
                bond_for_each_slave(bond, slave, i)
                        if (slave->dev == dev) {
-                                pr_err(DRV_NAME
+                                pr_err("%s: Interface %s is already enslaved!\n",
-                                       ": %s: Interface %s is already enslaved!\n",
                                       bond->dev->name, ifname);
                                ret = -EPERM;
                                read_unlock(&bond->lock);
@@ -275,8 +270,7 @@ static ssize_t bonding_store_slaves(struct device *d,
                        }
                read_unlock(&bond->lock);
-                pr_info(DRV_NAME ": %s: Adding slave %s.\n",
+                pr_info("%s: Adding slave %s.\n", bond->dev->name, ifname);
-                        bond->dev->name, ifname);
                /* If this is the first slave, then we need to set
                   the master's hardware address to be the same as the
@@ -313,7 +307,7 @@ static ssize_t bonding_store_slaves(struct device *d,
                                break;
                        }
                if (dev) {
-                        pr_info(DRV_NAME ": %s: Removing slave %s\n",
+                        pr_info("%s: Removing slave %s\n",
                                bond->dev->name, dev->name);
                                res = bond_release(bond->dev, dev);
                        if (res) {
@@ -323,16 +317,16 @@ static ssize_t bonding_store_slaves(struct device *d,
                        /* set the slave MTU to the default */
                        dev_set_mtu(dev, original_mtu);
                } else {
-                        pr_err(DRV_NAME ": unable to remove non-existent"
+                        pr_err("unable to remove non-existent slave %s for bond %s.\n",
-                               " slave %s for bond %s.\n",
+                               ifname, bond->dev->name);
-                                ifname, bond->dev->name);
                        ret = -ENODEV;
                }
                goto out;
        }
 err_no_cmd:
-        pr_err(DRV_NAME ": no command found in slaves file for bond %s. Use +ifname or -ifname.\n", bond->dev->name);
+        pr_err("no command found in slaves file for bond %s. Use +ifname or -ifname.\n",
+               bond->dev->name);
        ret = -EPERM;
 out:
@@ -365,18 +359,16 @@ static ssize_t bonding_store_mode(struct device *d,
        struct bonding *bond = to_bond(d);
        if (bond->dev->flags & IFF_UP) {
-                pr_err(DRV_NAME ": unable to update mode of %s"
+                pr_err("unable to update mode of %s because interface is up.\n",
-                       " because interface is up.\n", bond->dev->name);
+                       bond->dev->name);
                ret = -EPERM;
                goto out;
        }
        new_value = bond_parse_parm(buf, bond_mode_tbl);
        if (new_value < 0)  {
-                pr_err(DRV_NAME
+                pr_err("%s: Ignoring invalid mode value %.*s.\n",
-                       ": %s: Ignoring invalid mode value %.*s.\n",
+                       bond->dev->name, (int)strlen(buf) - 1, buf);
-                       bond->dev->name,
-                       (int)strlen(buf) - 1, buf);
                ret = -EINVAL;
                goto out;
        } else {
@@ -388,8 +380,8 @@ static ssize_t bonding_store_mode(struct device *d,
                bond->params.mode = new_value;
                bond_set_mode_ops(bond, bond->params.mode);
-                pr_info(DRV_NAME ": %s: setting mode to %s (%d).\n",
+                pr_info("%s: setting mode to %s (%d).\n",
-                       bond->dev->name, bond_mode_tbl[new_value].modename,
+                        bond->dev->name, bond_mode_tbl[new_value].modename,
                       new_value);
        }
 out:
@@ -421,8 +413,7 @@ static ssize_t bonding_store_xmit_hash(struct device *d,
        struct bonding *bond = to_bond(d);
        if (bond->dev->flags & IFF_UP) {
-                pr_err(DRV_NAME
+                pr_err("%s: Interface is up. Unable to update xmit policy.\n",
-                       "%s: Interface is up. Unable to update xmit policy.\n",
                       bond->dev->name);
                ret = -EPERM;
                goto out;
@@ -430,8 +421,7 @@ static ssize_t bonding_store_xmit_hash(struct device *d,
        new_value = bond_parse_parm(buf, xmit_hashtype_tbl);
        if (new_value < 0)  {
-                pr_err(DRV_NAME
+                pr_err("%s: Ignoring invalid xmit hash policy value %.*s.\n",
-                       ": %s: Ignoring invalid xmit hash policy value %.*s.\n",
                       bond->dev->name,
                       (int)strlen(buf) - 1, buf);
                ret = -EINVAL;
@@ -439,7 +429,7 @@ static ssize_t bonding_store_xmit_hash(struct device *d,
        } else {
                bond->params.xmit_policy = new_value;
                bond_set_mode_ops(bond, bond->params.mode);
-                pr_info(DRV_NAME ": %s: setting xmit hash policy to %s (%d).\n",
+                pr_info("%s: setting xmit hash policy to %s (%d).\n",
                        bond->dev->name,
                        xmit_hashtype_tbl[new_value].modename, new_value);
        }
@@ -472,20 +462,18 @@ static ssize_t bonding_store_arp_validate(struct device *d,
        new_value = bond_parse_parm(buf, arp_validate_tbl);
        if (new_value < 0) {
-                pr_err(DRV_NAME
+                pr_err("%s: Ignoring invalid arp_validate value %s\n",
-                       ": %s: Ignoring invalid arp_validate value %s\n",
                       bond->dev->name, buf);
                return -EINVAL;
        }
        if (new_value && (bond->params.mode != BOND_MODE_ACTIVEBACKUP)) {
-                pr_err(DRV_NAME
+                pr_err("%s: arp_validate only supported in active-backup mode.\n",
-                       ": %s: arp_validate only supported in active-backup mode.\n",
                       bond->dev->name);
                return -EINVAL;
        }
-        pr_info(DRV_NAME ": %s: setting arp_validate to %s (%d).\n",
+        pr_info("%s: setting arp_validate to %s (%d).\n",
-               bond->dev->name, arp_validate_tbl[new_value].modename,
+                bond->dev->name, arp_validate_tbl[new_value].modename,
-               new_value);
+                new_value);
        if (!bond->params.arp_validate && new_value)
                bond_register_arp(bond);
@@ -523,24 +511,22 @@ static ssize_t bonding_store_fail_over_mac(struct device *d,
        struct bonding *bond = to_bond(d);
        if (bond->slave_cnt != 0) {
-                pr_err(DRV_NAME
+                pr_err("%s: Can't alter fail_over_mac with slaves in bond.\n",
-                       ": %s: Can't alter fail_over_mac with slaves in bond.\n",
                       bond->dev->name);
                return -EPERM;
        }
        new_value = bond_parse_parm(buf, fail_over_mac_tbl);
        if (new_value < 0) {
-                pr_err(DRV_NAME
+                pr_err("%s: Ignoring invalid fail_over_mac value %s.\n",
-                       ": %s: Ignoring invalid fail_over_mac value %s.\n",
                       bond->dev->name, buf);
                return -EINVAL;
        }
        bond->params.fail_over_mac = new_value;
-        pr_info(DRV_NAME ": %s: Setting fail_over_mac to %s (%d).\n",
+        pr_info("%s: Setting fail_over_mac to %s (%d).\n",
-               bond->dev->name, fail_over_mac_tbl[new_value].modename,
+                bond->dev->name, fail_over_mac_tbl[new_value].modename,
-               new_value);
+                new_value);
        return count;
 }
@@ -571,31 +557,26 @@ static ssize_t bonding_store_arp_interval(struct device *d,
        struct bonding *bond = to_bond(d);
        if (sscanf(buf, "%d", &new_value) != 1) {
-                pr_err(DRV_NAME
+                pr_err("%s: no arp_interval value specified.\n",
-                       ": %s: no arp_interval value specified.\n",
                       bond->dev->name);
                ret = -EINVAL;
                goto out;
        }
        if (new_value < 0) {
-                pr_err(DRV_NAME
+                pr_err("%s: Invalid arp_interval value %d not in range 1-%d; rejected.\n",
-                       ": %s: Invalid arp_interval value %d not in range 1-%d; rejected.\n",
                       bond->dev->name, new_value, INT_MAX);
                ret = -EINVAL;
                goto out;
        }
-        pr_info(DRV_NAME
+        pr_info("%s: Setting ARP monitoring interval to %d.\n",
-               ": %s: Setting ARP monitoring interval to %d.\n",
+                bond->dev->name, new_value);
-               bond->dev->name, new_value);
        bond->params.arp_interval = new_value;
        if (bond->params.arp_interval)
                bond->dev->priv_flags |= IFF_MASTER_ARPMON;
        if (bond->params.miimon) {
-                pr_info(DRV_NAME
+                pr_info("%s: ARP monitoring cannot be used with MII monitoring. %s Disabling MII monitoring.\n",
-                       ": %s: ARP monitoring cannot be used with MII monitoring. "
+                        bond->dev->name, bond->dev->name);
-                       "%s Disabling MII monitoring.\n",
-                       bond->dev->name, bond->dev->name);
                bond->params.miimon = 0;
                if (delayed_work_pending(&bond->mii_work)) {
                        cancel_delayed_work(&bond->mii_work);
@@ -603,10 +584,8 @@ static ssize_t bonding_store_arp_interval(struct device *d,
                }
        }
        if (!bond->params.arp_targets[0]) {
-                pr_info(DRV_NAME
+                pr_info("%s: ARP monitoring has been set up, but no ARP targets have been specified.\n",
-                       ": %s: ARP monitoring has been set up, "
+                        bond->dev->name);
-                       "but no ARP targets have been specified.\n",
-                       bond->dev->name);
        }
        if (bond->dev->flags & IFF_UP) {
                /* If the interface is up, we may need to fire off
@@ -666,8 +645,7 @@ static ssize_t bonding_store_arp_targets(struct device *d,
        /* look for adds */
        if (buf[0] == '+') {
                if ((newtarget == 0) || (newtarget == htonl(INADDR_BROADCAST))) {
-                        pr_err(DRV_NAME
+                        pr_err("%s: invalid ARP target %pI4 specified for addition\n",
-                               ": %s: invalid ARP target %pI4 specified for addition\n",
                               bond->dev->name, &newtarget);
                        ret = -EINVAL;
                        goto out;
@@ -675,23 +653,20 @@ static ssize_t bonding_store_arp_targets(struct device *d,
                /* look for an empty slot to put the target in, and check for dupes */
                for (i = 0; (i < BOND_MAX_ARP_TARGETS) && !done; i++) {
                        if (targets[i] == newtarget) { /* duplicate */
-                                pr_err(DRV_NAME
+                                pr_err("%s: ARP target %pI4 is already present\n",
-                                       ": %s: ARP target %pI4 is already present\n",
                                       bond->dev->name, &newtarget);
                                ret = -EINVAL;
                                goto out;
                        }
                        if (targets[i] == 0) {
-                                pr_info(DRV_NAME
+                                pr_info("%s: adding ARP target %pI4.\n",
-                                       ": %s: adding ARP target %pI4.\n",
+                                        bond->dev->name, &newtarget);
-                                       bond->dev->name, &newtarget);
                                done = 1;
                                targets[i] = newtarget;
                        }
                }
                if (!done) {
-                        pr_err(DRV_NAME
+                        pr_err("%s: ARP target table is full!\n",
-                               ": %s: ARP target table is full!\n",
                               bond->dev->name);
                        ret = -EINVAL;
                        goto out;
@@ -699,8 +674,7 @@ static ssize_t bonding_store_arp_targets(struct device *d,
        } else if (buf[0] == '-')       {
                if ((newtarget == 0) || (newtarget == htonl(INADDR_BROADCAST))) {
-                        pr_err(DRV_NAME
+                        pr_err("%s: invalid ARP target %pI4 specified for removal\n",
-                               ": %s: invalid ARP target %pI4 specified for removal\n",
                               bond->dev->name, &newtarget);
                        ret = -EINVAL;
                        goto out;
@@ -709,9 +683,8 @@ static ssize_t bonding_store_arp_targets(struct device *d,
                for (i = 0; (i < BOND_MAX_ARP_TARGETS) && !done; i++) {
                        if (targets[i] == newtarget) {
                                int j;
-                                pr_info(DRV_NAME
+                                pr_info("%s: removing ARP target %pI4.\n",
-                                       ": %s: removing ARP target %pI4.\n",
+                                        bond->dev->name, &newtarget);
-                                       bond->dev->name, &newtarget);
                                for (j = i; (j < (BOND_MAX_ARP_TARGETS-1)) && targets[j+1]; j++)
                                        targets[j] = targets[j+1];
@@ -720,16 +693,14 @@ static ssize_t bonding_store_arp_targets(struct device *d,
                        }
                }
                if (!done) {
-                        pr_info(DRV_NAME
+                        pr_info("%s: unable to remove nonexistent ARP target %pI4.\n",
-                               ": %s: unable to remove nonexistent ARP target %pI4.\n",
+                                bond->dev->name, &newtarget);
-                               bond->dev->name, &newtarget);
                        ret = -EINVAL;
                        goto out;
                }
        } else {
-                pr_err(DRV_NAME ": no command found in arp_ip_targets file"
+                pr_err("no command found in arp_ip_targets file for bond %s. Use +<addr> or -<addr>.\n",
-                       " for bond %s. Use +<addr> or -<addr>.\n",
+                       bond->dev->name);
-                        bond->dev->name);
                ret = -EPERM;
                goto out;
        }
@@ -761,41 +732,34 @@ static ssize_t bonding_store_downdelay(struct device *d,
        struct bonding *bond = to_bond(d);
        if (!(bond->params.miimon)) {
-                pr_err(DRV_NAME
+                pr_err("%s: Unable to set down delay as MII monitoring is disabled\n",
-                       ": %s: Unable to set down delay as MII monitoring is disabled\n",
                       bond->dev->name);
                ret = -EPERM;
                goto out;
        }
        if (sscanf(buf, "%d", &new_value) != 1) {
-                pr_err(DRV_NAME
+                pr_err("%s: no down delay value specified.\n", bond->dev->name);
-                       ": %s: no down delay value specified.\n",
-                       bond->dev->name);
                ret = -EINVAL;
                goto out;
        }
        if (new_value < 0) {
-                pr_err(DRV_NAME
+                pr_err("%s: Invalid down delay value %d not in range %d-%d; rejected.\n",
-                       ": %s: Invalid down delay value %d not in range %d-%d; rejected.\n",
                       bond->dev->name, new_value, 1, INT_MAX);
                ret = -EINVAL;
                goto out;
        } else {
                if ((new_value % bond->params.miimon) != 0) {
-                        pr_warning(DRV_NAME
+                        pr_warning("%s: Warning: down delay (%d) is not a multiple of miimon (%d), delay rounded to %d ms\n",
-                                   ": %s: Warning: down delay (%d) is not a "
-                                   "multiple of miimon (%d), delay rounded "
-                                   "to %d ms\n",
                                   bond->dev->name, new_value,
                                   bond->params.miimon,
                                   (new_value / bond->params.miimon) *
                                   bond->params.miimon);
                }
                bond->params.downdelay = new_value / bond->params.miimon;
-                pr_info(DRV_NAME ": %s: Setting down delay to %d.\n",
+                pr_info("%s: Setting down delay to %d.\n",
-                       bond->dev->name,
+                        bond->dev->name,
-                       bond->params.downdelay * bond->params.miimon);
+                        bond->params.downdelay * bond->params.miimon);
        }
@@ -823,41 +787,35 @@ static ssize_t bonding_store_updelay(struct device *d,
        struct bonding *bond = to_bond(d);
        if (!(bond->params.miimon)) {
-                pr_err(DRV_NAME
+                pr_err("%s: Unable to set up delay as MII monitoring is disabled\n",
-                       ": %s: Unable to set up delay as MII monitoring is disabled\n",
                       bond->dev->name);
                ret = -EPERM;
                goto out;
        }
        if (sscanf(buf, "%d", &new_value) != 1) {
-                pr_err(DRV_NAME
+                pr_err("%s: no up delay value specified.\n",
-                       ": %s: no up delay value specified.\n",
                       bond->dev->name);
                ret = -EINVAL;
                goto out;
        }
        if (new_value < 0) {
-                pr_err(DRV_NAME
+                pr_err("%s: Invalid down delay value %d not in range %d-%d; rejected.\n",
-                       ": %s: Invalid down delay value %d not in range %d-%d; rejected.\n",
                       bond->dev->name, new_value, 1, INT_MAX);
                ret = -EINVAL;
                goto out;
        } else {
                if ((new_value % bond->params.miimon) != 0) {
-                        pr_warning(DRV_NAME
+                        pr_warning("%s: Warning: up delay (%d) is not a multiple of miimon (%d), updelay rounded to %d ms\n",
-                                   ": %s: Warning: up delay (%d) is not a "
-                                   "multiple of miimon (%d), updelay rounded "
-                                   "to %d ms\n",
                                   bond->dev->name, new_value,
                                   bond->params.miimon,
                                   (new_value / bond->params.miimon) *
                                   bond->params.miimon);
                }
                bond->params.updelay = new_value / bond->params.miimon;
-                pr_info(DRV_NAME ": %s: Setting up delay to %d.\n",
+                pr_info("%s: Setting up delay to %d.\n",
-                       bond->dev->name, bond->params.updelay * bond->params.miimon);
+                        bond->dev->name,
+                        bond->params.updelay * bond->params.miimon);
        }
 out:
@@ -889,16 +847,14 @@ static ssize_t bonding_store_lacp(struct device *d,
        struct bonding *bond = to_bond(d);
        if (bond->dev->flags & IFF_UP) {
-                pr_err(DRV_NAME
+                pr_err("%s: Unable to update LACP rate because interface is up.\n",
-                       ": %s: Unable to update LACP rate because interface is up.\n",
                       bond->dev->name);
                ret = -EPERM;
                goto out;
        }
        if (bond->params.mode != BOND_MODE_8023AD) {
-                pr_err(DRV_NAME
+                pr_err("%s: Unable to update LACP rate because bond is not in 802.3ad mode.\n",
-                       ": %s: Unable to update LACP rate because bond is not in 802.3ad mode.\n",
                       bond->dev->name);
                ret = -EPERM;
                goto out;
@@ -908,12 +864,11 @@ static ssize_t bonding_store_lacp(struct device *d,
        if ((new_value == 1) || (new_value == 0)) {
                bond->params.lacp_fast = new_value;
-                pr_info(DRV_NAME ": %s: Setting LACP rate to %s (%d).\n",
+                pr_info("%s: Setting LACP rate to %s (%d).\n",
                        bond->dev->name, bond_lacp_tbl[new_value].modename,
                        new_value);
        } else {
-                pr_err(DRV_NAME
+                pr_err("%s: Ignoring invalid LACP rate value %.*s.\n",
-                       ": %s: Ignoring invalid LACP rate value %.*s.\n",
                       bond->dev->name, (int)strlen(buf) - 1, buf);
                ret = -EINVAL;
        }
@@ -943,9 +898,8 @@ static ssize_t bonding_store_ad_select(struct device *d,
        struct bonding *bond = to_bond(d);
        if (bond->dev->flags & IFF_UP) {
-                pr_err(DRV_NAME
+                pr_err("%s: Unable to update ad_select because interface is up.\n",
-                       ": %s: Unable to update ad_select because interface "
+                       bond->dev->name);
-                       "is up.\n", bond->dev->name);
                ret = -EPERM;
                goto out;
        }
@@ -954,13 +908,11 @@ static ssize_t bonding_store_ad_select(struct device *d,
        if (new_value != -1) {
                bond->params.ad_select = new_value;
-                pr_info(DRV_NAME
+                pr_info("%s: Setting ad_select to %s (%d).\n",
-                       ": %s: Setting ad_select to %s (%d).\n",
+                        bond->dev->name, ad_select_tbl[new_value].modename,
-                       bond->dev->name, ad_select_tbl[new_value].modename,
+                        new_value);
-                       new_value);
        } else {
-                pr_err(DRV_NAME
+                pr_err("%s: Ignoring invalid ad_select value %.*s.\n",
-                       ": %s: Ignoring invalid ad_select value %.*s.\n",
                       bond->dev->name, (int)strlen(buf) - 1, buf);
                ret = -EINVAL;
        }
@@ -990,15 +942,13 @@ static ssize_t bonding_store_n_grat_arp(struct device *d,
        struct bonding *bond = to_bond(d);
        if (sscanf(buf, "%d", &new_value) != 1) {
-                pr_err(DRV_NAME
+                pr_err("%s: no num_grat_arp value specified.\n",
-                       ": %s: no num_grat_arp value specified.\n",
                       bond->dev->name);
                ret = -EINVAL;
                goto out;
        }
        if (new_value < 0 || new_value > 255) {
-                pr_err(DRV_NAME
+                pr_err("%s: Invalid num_grat_arp value %d not in range 0-255; rejected.\n",
-                       ": %s: Invalid num_grat_arp value %d not in range 0-255; rejected.\n",
                       bond->dev->name, new_value);
                ret = -EINVAL;
                goto out;
@@ -1031,16 +981,14 @@ static ssize_t bonding_store_n_unsol_na(struct device *d,
        struct bonding *bond = to_bond(d);
        if (sscanf(buf, "%d", &new_value) != 1) {
-                pr_err(DRV_NAME
+                pr_err("%s: no num_unsol_na value specified.\n",
-                       ": %s: no num_unsol_na value specified.\n",
                       bond->dev->name);
                ret = -EINVAL;
                goto out;
        }
        if (new_value < 0 || new_value > 255) {
-                pr_err(DRV_NAME
+                pr_err("%s: Invalid num_unsol_na value %d not in range 0-255; rejected.\n",
-                       ": %s: Invalid num_unsol_na value %d not in range 0-255; rejected.\n",
                       bond->dev->name, new_value);
                ret = -EINVAL;
                goto out;
@@ -1075,40 +1023,31 @@ static ssize_t bonding_store_miimon(struct device *d,
        struct bonding *bond = to_bond(d);
        if (sscanf(buf, "%d", &new_value) != 1) {
-                pr_err(DRV_NAME
+                pr_err("%s: no miimon value specified.\n",
-                       ": %s: no miimon value specified.\n",
                       bond->dev->name);
                ret = -EINVAL;
                goto out;
        }
        if (new_value < 0) {
-                pr_err(DRV_NAME
+                pr_err("%s: Invalid miimon value %d not in range %d-%d; rejected.\n",
-                       ": %s: Invalid miimon value %d not in range %d-%d; rejected.\n",
                       bond->dev->name, new_value, 1, INT_MAX);
                ret = -EINVAL;
                goto out;
        } else {
-                pr_info(DRV_NAME
+                pr_info("%s: Setting MII monitoring interval to %d.\n",
-                       ": %s: Setting MII monitoring interval to %d.\n",
+                        bond->dev->name, new_value);
-                       bond->dev->name, new_value);
                bond->params.miimon = new_value;
                if (bond->params.updelay)
-                        pr_info(DRV_NAME
+                        pr_info("%s: Note: Updating updelay (to %d) since it is a multiple of the miimon value.\n",
-                              ": %s: Note: Updating updelay (to %d) "
+                                bond->dev->name,
-                              "since it is a multiple of the miimon value.\n",
+                                bond->params.updelay * bond->params.miimon);
-                              bond->dev->name,
-                              bond->params.updelay * bond->params.miimon);
                if (bond->params.downdelay)
-                        pr_info(DRV_NAME
+                        pr_info("%s: Note: Updating downdelay (to %d) since it is a multiple of the miimon value.\n",
-                              ": %s: Note: Updating downdelay (to %d) "
+                                bond->dev->name,
-                              "since it is a multiple of the miimon value.\n",
+                                bond->params.downdelay * bond->params.miimon);
-                              bond->dev->name,
-                              bond->params.downdelay * bond->params.miimon);
                if (bond->params.arp_interval) {
-                        pr_info(DRV_NAME
+                        pr_info("%s: MII monitoring cannot be used with ARP monitoring. Disabling ARP monitoring...\n",
-                               ": %s: MII monitoring cannot be used with "
+                                bond->dev->name);
-                               "ARP monitoring. Disabling ARP monitoring...\n",
-                               bond->dev->name);
                        bond->params.arp_interval = 0;
                        bond->dev->priv_flags &= ~IFF_MASTER_ARPMON;
                        if (bond->params.arp_validate) {
@@ -1176,17 +1115,15 @@ static ssize_t bonding_store_primary(struct device *d,
        write_lock_bh(&bond->curr_slave_lock);
        if (!USES_PRIMARY(bond->params.mode)) {
-                pr_info(DRV_NAME
+                pr_info("%s: Unable to set primary slave; %s is in mode %d\n",
-                       ": %s: Unable to set primary slave; %s is in mode %d\n",
+                        bond->dev->name, bond->dev->name, bond->params.mode);
-                       bond->dev->name, bond->dev->name, bond->params.mode);
        } else {
                bond_for_each_slave(bond, slave, i) {
                        if (strnicmp
                            (slave->dev->name, buf,
                             strlen(slave->dev->name)) == 0) {
-                                pr_info(DRV_NAME
+                                pr_info("%s: Setting %s as primary slave.\n",
-                                       ": %s: Setting %s as primary slave.\n",
+                                        bond->dev->name, slave->dev->name);
-                                       bond->dev->name, slave->dev->name);
                                bond->primary_slave = slave;
                                strcpy(bond->params.primary, slave->dev->name);
                                bond_select_active_slave(bond);
@@ -1197,15 +1134,13 @@ static ssize_t bonding_store_primary(struct device *d,
                /* if we got here, then we didn't match the name of any slave */
                if (strlen(buf) == 0 || buf[0] == '\n') {
-                        pr_info(DRV_NAME
+                        pr_info("%s: Setting primary slave to None.\n",
-                               ": %s: Setting primary slave to None.\n",
+                                bond->dev->name);
-                               bond->dev->name);
                        bond->primary_slave = NULL;
                                bond_select_active_slave(bond);
                } else {
-                        pr_info(DRV_NAME
+                        pr_info("%s: Unable to set %.*s as primary slave as it is not a slave.\n",
-                               ": %s: Unable to set %.*s as primary slave as it is not a slave.\n",
+                                bond->dev->name, (int)strlen(buf) - 1, buf);
-                               bond->dev->name, (int)strlen(buf) - 1, buf);
                }
        }
 out:
@@ -1244,8 +1179,7 @@ static ssize_t bonding_store_primary_reselect(struct device *d,
        new_value = bond_parse_parm(buf, pri_reselect_tbl);
        if (new_value < 0)  {
-                pr_err(DRV_NAME
+                pr_err("%s: Ignoring invalid primary_reselect value %.*s.\n",
-                       ": %s: Ignoring invalid primary_reselect value %.*s.\n",
                       bond->dev->name,
                       (int) strlen(buf) - 1, buf);
                ret = -EINVAL;
@@ -1253,7 +1187,7 @@ static ssize_t bonding_store_primary_reselect(struct device *d,
        }
        bond->params.primary_reselect = new_value;
-        pr_info(DRV_NAME ": %s: setting primary_reselect to %s (%d).\n",
+        pr_info("%s: setting primary_reselect to %s (%d).\n",
                bond->dev->name, pri_reselect_tbl[new_value].modename,
                new_value);
@@ -1291,20 +1225,18 @@ static ssize_t bonding_store_carrier(struct device *d,
        if (sscanf(buf, "%d", &new_value) != 1) {
-                pr_err(DRV_NAME
+                pr_err("%s: no use_carrier value specified.\n",
-                       ": %s: no use_carrier value specified.\n",
                       bond->dev->name);
                ret = -EINVAL;
                goto out;
        }
        if ((new_value == 0) || (new_value == 1)) {
                bond->params.use_carrier = new_value;
-                pr_info(DRV_NAME ": %s: Setting use_carrier to %d.\n",
+                pr_info("%s: Setting use_carrier to %d.\n",
-                       bond->dev->name, new_value);
+                        bond->dev->name, new_value);
        } else {
-                pr_info(DRV_NAME
+                pr_info("%s: Ignoring invalid use_carrier value %d.\n",
-                       ": %s: Ignoring invalid use_carrier value %d.\n",
+                        bond->dev->name, new_value);
-                       bond->dev->name, new_value);
        }
 out:
        return count;
@@ -1349,8 +1281,7 @@ static ssize_t bonding_store_active_slave(struct device *d,
        write_lock_bh(&bond->curr_slave_lock);
        if (!USES_PRIMARY(bond->params.mode))
-                pr_info(DRV_NAME ": %s: Unable to change active slave;"
+                pr_info("%s: Unable to change active slave; %s is in mode %d\n",
-                        " %s is in mode %d\n",
                        bond->dev->name, bond->dev->name, bond->params.mode);
        else {
                bond_for_each_slave(bond, slave, i) {
@@ -1361,9 +1292,9 @@ static ssize_t bonding_store_active_slave(struct device *d,
                                new_active = slave;
                                if (new_active == old_active) {
                                        /* do nothing */
-                                        pr_info(DRV_NAME
+                                        pr_info("%s: %s is already the current active slave.\n",
-                                                ": %s: %s is already the current active slave.\n",
+                                                bond->dev->name,
-                                                bond->dev->name, slave->dev->name);
+                                                slave->dev->name);
                                        goto out;
                                }
                                else {
@@ -1371,16 +1302,15 @@ static ssize_t bonding_store_active_slave(struct device *d,
                                            (old_active) &&
                                            (new_active->link == BOND_LINK_UP) &&
                                            IS_UP(new_active->dev)) {
-                                                pr_info(DRV_NAME
+                                                pr_info("%s: Setting %s as active slave.\n",
-                                                        ": %s: Setting %s as active slave.\n",
+                                                        bond->dev->name,
-                                                        bond->dev->name, slave->dev->name);
+                                                        slave->dev->name);
                                                        bond_change_active_slave(bond, new_active);
                                        }
                                        else {
-                                                pr_info(DRV_NAME
+                                                pr_info("%s: Could not set %s as active slave; either %s is down or the link is down.\n",
-                                                        ": %s: Could not set %s as active slave; "
+                                                        bond->dev->name,
-                                                        "either %s is down or the link is down.\n",
+                                                        slave->dev->name,
-                                                        bond->dev->name, slave->dev->name,
                                                        slave->dev->name);
                                        }
                                        goto out;
@@ -1391,14 +1321,12 @@ static ssize_t bonding_store_active_slave(struct device *d,
                /* if we got here, then we didn't match the name of any slave */
                if (strlen(buf) == 0 || buf[0] == '\n') {
-                        pr_info(DRV_NAME
+                        pr_info("%s: Setting active slave to None.\n",
-                                ": %s: Setting active slave to None.\n",
                                bond->dev->name);
                        bond->primary_slave = NULL;
                        bond_select_active_slave(bond);
                } else {
-                        pr_info(DRV_NAME ": %s: Unable to set %.*s"
+                        pr_info("%s: Unable to set %.*s as active slave as it is not a slave.\n",
-                                " as active slave as it is not a slave.\n",
                                bond->dev->name, (int)strlen(buf) - 1, buf);
                }
        }
@@ -1600,8 +1528,7 @@ int bond_create_sysfs(void)
                /* Is someone being kinky and naming a device bonding_master? */
                if (__dev_get_by_name(&init_net,
                                      class_attr_bonding_masters.attr.name))
-                        pr_err("network device named %s already "
+                        pr_err("network device named %s already exists in sysfs",
-                               "exists in sysfs",
                               class_attr_bonding_masters.attr.name);
                ret = 0;
        }
diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig
index 8c485aad1b94..05b751719bd5 100644
--- a/drivers/net/can/Kconfig
+++ b/drivers/net/can/Kconfig
@@ -50,7 +50,7 @@ config CAN_TI_HECC
 config CAN_MCP251X
        tristate "Microchip MCP251x SPI CAN controllers"
-        depends on CAN_DEV && SPI
+        depends on CAN_DEV && SPI && HAS_DMA
        ---help---
          Driver for the Microchip MCP251x SPI CAN controllers.
diff --git a/drivers/net/can/at91_can.c b/drivers/net/can/at91_can.c
index cbe3fce53e3b..d0ec17878ffc 100644
--- a/drivers/net/can/at91_can.c
+++ b/drivers/net/can/at91_can.c
@@ -474,7 +474,7 @@ static void at91_read_mb(struct net_device *dev, unsigned int mb,
        reg_msr = at91_read(priv, AT91_MSR(mb));
        if (reg_msr & AT91_MSR_MRTR)
                cf->can_id |= CAN_RTR_FLAG;
-        cf->can_dlc = min_t(__u8, (reg_msr >> 16) & 0xf, 8);
+        cf->can_dlc = get_can_dlc((reg_msr >> 16) & 0xf);
        *(u32 *)(cf->data + 0) = at91_read(priv, AT91_MDL(mb));
        *(u32 *)(cf->data + 4) = at91_read(priv, AT91_MDH(mb));
diff --git a/drivers/net/can/bfin_can.c b/drivers/net/can/bfin_can.c
index c7fc1de28173..0ec1524523cc 100644
--- a/drivers/net/can/bfin_can.c
+++ b/drivers/net/can/bfin_can.c
@@ -392,7 +392,7 @@ static void bfin_can_rx(struct net_device *dev, u16 isrc)
                cf->can_id |= CAN_RTR_FLAG;
        /* get data length code */
-        cf->can_dlc = bfin_read16(&reg->chl[obj].dlc);
+        cf->can_dlc = get_can_dlc(bfin_read16(&reg->chl[obj].dlc) & 0xF);
        /* get payload */
        for (i = 0; i < 8; i += 2) {
diff --git a/drivers/net/can/mcp251x.c b/drivers/net/can/mcp251x.c
index 78b1b69b2921..9c5a1537939c 100644
--- a/drivers/net/can/mcp251x.c
+++ b/drivers/net/can/mcp251x.c
@@ -403,9 +403,8 @@ static void mcp251x_hw_rx_frame(struct spi_device *spi, u8 *buf,
                for (i = 1; i < RXBDAT_OFF; i++)
                        buf[i] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + i);
-                len = buf[RXBDLC_OFF] & RXBDLC_LEN_MASK;
-                if (len > 8)
+                len = get_can_dlc(buf[RXBDLC_OFF] & RXBDLC_LEN_MASK);
-                        len = 8;
                for (; i < (RXBDAT_OFF + len); i++)
                        buf[i] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + i);
        } else {
@@ -455,13 +454,7 @@ static void mcp251x_hw_rx(struct spi_device *spi, int buf_idx)
                        (buf[RXBSIDL_OFF] >> RXBSIDL_SHIFT);
        }
        /* Data length */
-        frame->can_dlc = buf[RXBDLC_OFF] & RXBDLC_LEN_MASK;
+        frame->can_dlc = get_can_dlc(buf[RXBDLC_OFF] & RXBDLC_LEN_MASK);
-        if (frame->can_dlc > 8) {
-                dev_warn(&spi->dev, "invalid frame recevied\n");
-                priv->net->stats.rx_errors++;
-                dev_kfree_skb(skb);
-                return;
-        }
        memcpy(frame->data, buf + RXBDAT_OFF, frame->can_dlc);
        priv->net->stats.rx_packets++;
diff --git a/drivers/net/can/mscan/mscan.c b/drivers/net/can/mscan/mscan.c
index bb06dfb58f25..07346f880ca6 100644
--- a/drivers/net/can/mscan/mscan.c
+++ b/drivers/net/can/mscan/mscan.c
@@ -297,7 +297,8 @@ static void mscan_get_rx_frame(struct net_device *dev, struct can_frame *frame)
        frame->can_id |= can_id >> 1;
        if (can_id & 1)
                frame->can_id |= CAN_RTR_FLAG;
-        frame->can_dlc = in_8(&regs->rx.dlr) & 0xf;
+        frame->can_dlc = get_can_dlc(in_8(&regs->rx.dlr) & 0xf);
        if (!(frame->can_id & CAN_RTR_FLAG)) {
                void __iomem *data = &regs->rx.dsr1_0;
diff --git a/drivers/net/can/sja1000/sja1000.c b/drivers/net/can/sja1000/sja1000.c
index b4ba88a31075..542a4f7255b4 100644
--- a/drivers/net/can/sja1000/sja1000.c
+++ b/drivers/net/can/sja1000/sja1000.c
@@ -293,15 +293,14 @@ static void sja1000_rx(struct net_device *dev)
        uint8_t fi;
        uint8_t dreg;
        canid_t id;
-        uint8_t dlc;
        int i;
+        /* create zero'ed CAN frame buffer */
        skb = alloc_can_skb(dev, &cf);
        if (skb == NULL)
                return;
        fi = priv->read_reg(priv, REG_FI);
-        dlc = fi & 0x0F;
        if (fi & FI_FF) {
                /* extended frame format (EFF) */
@@ -318,16 +317,15 @@ static void sja1000_rx(struct net_device *dev)
                    | (priv->read_reg(priv, REG_ID2) >> 5);
        }
-        if (fi & FI_RTR)
+        if (fi & FI_RTR) {
                id |= CAN_RTR_FLAG;
+        } else {
+                cf->can_dlc = get_can_dlc(fi & 0x0F);
+                for (i = 0; i < cf->can_dlc; i++)
+                        cf->data[i] = priv->read_reg(priv, dreg++);
+        }
        cf->can_id = id;
-        cf->can_dlc = dlc;
-        for (i = 0; i < dlc; i++)
-                cf->data[i] = priv->read_reg(priv, dreg++);
-        while (i < 8)
-                cf->data[i++] = 0;
        /* release receive buffer */
        priv->write_reg(priv, REG_CMR, CMD_RRB);
@@ -335,7 +333,7 @@ static void sja1000_rx(struct net_device *dev)
        netif_rx(skb);
        stats->rx_packets++;
-        stats->rx_bytes += dlc;
+        stats->rx_bytes += cf->can_dlc;
 }
 static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)
diff --git a/drivers/net/can/ti_hecc.c b/drivers/net/can/ti_hecc.c
index 07e8016b17ec..5c993c2da528 100644
--- a/drivers/net/can/ti_hecc.c
+++ b/drivers/net/can/ti_hecc.c
@@ -552,7 +552,7 @@ static int ti_hecc_rx_pkt(struct ti_hecc_priv *priv, int mbxno)
        data = hecc_read_mbx(priv, mbxno, HECC_CANMCF);
        if (data & HECC_CANMCF_RTR)
                cf->can_id |= CAN_RTR_FLAG;
-        cf->can_dlc = data & 0xF;
+        cf->can_dlc = get_can_dlc(data & 0xF);
        data = hecc_read_mbx(priv, mbxno, HECC_CANMDL);
        *(u32 *)(cf->data) = cpu_to_be32(data);
        if (cf->can_dlc > 4) {
diff --git a/drivers/net/can/usb/ems_usb.c b/drivers/net/can/usb/ems_usb.c
index 591eb0eb1c2b..efbb05c71bf4 100644
--- a/drivers/net/can/usb/ems_usb.c
+++ b/drivers/net/can/usb/ems_usb.c
@@ -316,7 +316,7 @@ static void ems_usb_rx_can_msg(struct ems_usb *dev, struct ems_cpc_msg *msg)
                return;
        cf->can_id = le32_to_cpu(msg->msg.can_msg.id);
-        cf->can_dlc = min_t(u8, msg->msg.can_msg.length, 8);
+        cf->can_dlc = get_can_dlc(msg->msg.can_msg.length & 0xF);
        if (msg->type == CPC_MSG_TYPE_EXT_CAN_FRAME ||
            msg->type == CPC_MSG_TYPE_EXT_RTR_FRAME)
diff --git a/drivers/net/cpmac.c b/drivers/net/cpmac.c
index 678222389407..8d0be26f94e3 100644
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -1163,7 +1163,7 @@ static int __devinit cpmac_probe(struct platform_device *pdev)
        priv->dev = dev;
        priv->ring_size = 64;
        priv->msg_enable = netif_msg_init(debug_level, 0xff);
-        memcpy(dev->dev_addr, pdata->dev_addr, sizeof(dev->dev_addr));
+        memcpy(dev->dev_addr, pdata->dev_addr, sizeof(pdata->dev_addr));
        snprintf(priv->phy_name, MII_BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id);
diff --git a/drivers/net/ixgbe/ixgbe_82598.c b/drivers/net/ixgbe/ixgbe_82598.c
index e2d5343f1275..204177d78cec 100644
--- a/drivers/net/ixgbe/ixgbe_82598.c
+++ b/drivers/net/ixgbe/ixgbe_82598.c
@@ -510,6 +510,40 @@ static s32 ixgbe_start_mac_link_82598(struct ixgbe_hw *hw,
 }
 /**
+ *  ixgbe_validate_link_ready - Function looks for phy link
+ *  @hw: pointer to hardware structure
+ *
+ *  Function indicates success when phy link is available. If phy is not ready
+ *  within 5 seconds of MAC indicating link, the function returns error.
+ **/
+static s32 ixgbe_validate_link_ready(struct ixgbe_hw *hw)
+{
+        u32 timeout;
+        u16 an_reg;
+        if (hw->device_id != IXGBE_DEV_ID_82598AT2)
+                return 0;
+        for (timeout = 0;
+             timeout < IXGBE_VALIDATE_LINK_READY_TIMEOUT; timeout++) {
+                hw->phy.ops.read_reg(hw, MDIO_STAT1, MDIO_MMD_AN, &an_reg);
+                if ((an_reg & MDIO_AN_STAT1_COMPLETE) &&
+                    (an_reg & MDIO_STAT1_LSTATUS))
+                        break;
+                msleep(100);
+        }
+        if (timeout == IXGBE_VALIDATE_LINK_READY_TIMEOUT) {
+                hw_dbg(hw, "Link was indicated but link is down\n");
+                return IXGBE_ERR_LINK_SETUP;
+        }
+        return 0;
+}
+/**
 *  ixgbe_check_mac_link_82598 - Get link/speed status
 *  @hw: pointer to hardware structure
 *  @speed: pointer to link speed
@@ -589,6 +623,10 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
        else
                *speed = IXGBE_LINK_SPEED_1GB_FULL;
+        if ((hw->device_id == IXGBE_DEV_ID_82598AT2) && (*link_up == true) &&
+            (ixgbe_validate_link_ready(hw) != 0))
+                *link_up = false;
        /* if link is down, zero out the current_mode */
        if (*link_up == false) {
                hw->fc.current_mode = ixgbe_fc_none;
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 35ea8c93fd80..bd64387563f0 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -4511,6 +4511,7 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
        struct ixgbe_hw *hw = &adapter->hw;
        u64 total_mpc = 0;
        u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
+        u64 non_eop_descs = 0, restart_queue = 0;
        if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
                u64 rsc_count = 0;
@@ -4528,10 +4529,12 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
        /* gather some stats to the adapter struct that are per queue */
        for (i = 0; i < adapter->num_tx_queues; i++)
-                adapter->restart_queue += adapter->tx_ring[i].restart_queue;
+                restart_queue += adapter->tx_ring[i].restart_queue;
+        adapter->restart_queue = restart_queue;
        for (i = 0; i < adapter->num_rx_queues; i++)
-                adapter->non_eop_descs += adapter->tx_ring[i].non_eop_descs;
+                non_eop_descs += adapter->rx_ring[i].non_eop_descs;
+        adapter->non_eop_descs = non_eop_descs;
        adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
        for (i = 0; i < 8; i++) {
@@ -5003,7 +5006,18 @@ static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
                                    IXGBE_ADVTXD_DTYP_CTXT);
                if (skb->ip_summed == CHECKSUM_PARTIAL) {
-                        switch (skb->protocol) {
+                        __be16 protocol;
+                        if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) {
+                                const struct vlan_ethhdr *vhdr =
+                                        (const struct vlan_ethhdr *)skb->data;
+                                protocol = vhdr->h_vlan_encapsulated_proto;
+                        } else {
+                                protocol = skb->protocol;
+                        }
+                        switch (protocol) {
                        case cpu_to_be16(ETH_P_IP):
                                type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
                                if (ip_hdr(skb)->protocol == IPPROTO_TCP)
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index f3e8d52610b7..84650c6ebe03 100644
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -841,6 +841,8 @@
 #define IXGBE_MPVC      0x04318
 #define IXGBE_SGMIIC    0x04314
+#define IXGBE_VALIDATE_LINK_READY_TIMEOUT 50
 /* Omer CORECTL */
 #define IXGBE_CORECTL           0x014F00
 /* BARCTRL */
diff --git a/drivers/net/mlx4/alloc.c b/drivers/net/mlx4/alloc.c
index ad95d5f7b630..8c8515619b8e 100644
--- a/drivers/net/mlx4/alloc.c
+++ b/drivers/net/mlx4/alloc.c
@@ -72,35 +72,6 @@ void mlx4_bitmap_free(struct mlx4_bitmap *bitmap, u32 obj)
        mlx4_bitmap_free_range(bitmap, obj, 1);
 }
-static unsigned long find_aligned_range(unsigned long *bitmap,
-                                        u32 start, u32 nbits,
-                                        int len, int align)
-{
-        unsigned long end, i;
-again:
-        start = ALIGN(start, align);
-        while ((start < nbits) && test_bit(start, bitmap))
-                start += align;
-        if (start >= nbits)
-                return -1;
-        end = start+len;
-        if (end > nbits)
-                return -1;
-        for (i = start + 1; i < end; i++) {
-                if (test_bit(i, bitmap)) {
-                        start = i + 1;
-                        goto again;
-                }
-        }
-        return start;
-}
 u32 mlx4_bitmap_alloc_range(struct mlx4_bitmap *bitmap, int cnt, int align)
 {
        u32 obj, i;
@@ -110,13 +81,13 @@ u32 mlx4_bitmap_alloc_range(struct mlx4_bitmap *bitmap, int cnt, int align)
        spin_lock(&bitmap->lock);
-        obj = find_aligned_range(bitmap->table, bitmap->last,
+        obj = bitmap_find_next_zero_area(bitmap->table, bitmap->max,
-                                 bitmap->max, cnt, align);
+                                bitmap->last, cnt, align - 1);
        if (obj >= bitmap->max) {
                bitmap->top = (bitmap->top + bitmap->max + bitmap->reserved_top)
                                & bitmap->mask;
-                obj = find_aligned_range(bitmap->table, 0, bitmap->max,
+                obj = bitmap_find_next_zero_area(bitmap->table, bitmap->max,
-                                         cnt, align);
+                                                0, cnt, align - 1);
        }
        if (obj < bitmap->max) {
diff --git a/drivers/net/mlx4/fw.c b/drivers/net/mlx4/fw.c
index 3c16602172fc..04f42ae1eda0 100644
--- a/drivers/net/mlx4/fw.c
+++ b/drivers/net/mlx4/fw.c
@@ -90,6 +90,7 @@ static void dump_dev_cap_flags(struct mlx4_dev *dev, u32 flags)
                [ 9] = "Q_Key violation counter",
                [10] = "VMM",
                [12] = "DPDP",
+                [15] = "Big LSO headers",
                [16] = "MW support",
                [17] = "APM support",
                [18] = "Atomic ops support",
@@ -235,7 +236,7 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
        MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MPT_OFFSET);
        dev_cap->max_mpts = 1 << (field & 0x3f);
        MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_EQ_OFFSET);
-        dev_cap->reserved_eqs = 1 << (field & 0xf);
+        dev_cap->reserved_eqs = field & 0xf;
        MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_EQ_OFFSET);
        dev_cap->max_eqs = 1 << (field & 0xf);
        MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_MTT_OFFSET);
diff --git a/drivers/net/mlx4/sense.c b/drivers/net/mlx4/sense.c
index f36ae691cab3..015fbe785c13 100644
--- a/drivers/net/mlx4/sense.c
+++ b/drivers/net/mlx4/sense.c
@@ -53,7 +53,7 @@ static int mlx4_SENSE_PORT(struct mlx4_dev *dev, int port,
        if (out_param > 2) {
                mlx4_err(dev, "Sense returned illegal value: 0x%llx\n", out_param);
-                return EINVAL;
+                return -EINVAL;
        }
        *type = out_param;
diff --git a/drivers/net/pcmcia/3c574_cs.c b/drivers/net/pcmcia/3c574_cs.c
index 17a27225cc98..98938ea9e0bd 100644
--- a/drivers/net/pcmcia/3c574_cs.c
+++ b/drivers/net/pcmcia/3c574_cs.c
@@ -912,7 +912,11 @@ static void media_check(unsigned long arg)
        if ((inw(ioaddr + EL3_STATUS) & IntLatch) && (inb(ioaddr + Timer) == 0xff)) {
                if (!lp->fast_poll)
                        printk(KERN_INFO "%s: interrupt(s) dropped!\n", dev->name);
+                local_irq_save(flags);
                el3_interrupt(dev->irq, dev);
+                local_irq_restore(flags);
                lp->fast_poll = HZ;
        }
        if (lp->fast_poll) {
diff --git a/drivers/net/pcmcia/3c589_cs.c b/drivers/net/pcmcia/3c589_cs.c
index 6f8d7e2e5922..322e11df0097 100644
--- a/drivers/net/pcmcia/3c589_cs.c
+++ b/drivers/net/pcmcia/3c589_cs.c
@@ -711,7 +711,11 @@ static void media_check(unsigned long arg)
        (inb(ioaddr + EL3_TIMER) == 0xff)) {
        if (!lp->fast_poll)
            printk(KERN_WARNING "%s: interrupt(s) dropped!\n", dev->name);
+        local_irq_save(flags);
        el3_interrupt(dev->irq, dev);
+        local_irq_restore(flags);
        lp->fast_poll = HZ;
    }
    if (lp->fast_poll) {
diff --git a/drivers/net/sfc/selftest.c b/drivers/net/sfc/selftest.c
index 14949bb303a0..af3933579790 100644
--- a/drivers/net/sfc/selftest.c
+++ b/drivers/net/sfc/selftest.c
@@ -47,7 +47,7 @@ static const unsigned char payload_source[ETH_ALEN] = {
        0x00, 0x0f, 0x53, 0x1b, 0x1b, 0x1b,
 };
-static const char *payload_msg =
+static const char payload_msg[] =
        "Hello world! This is an Efx loopback test in progress!";
 /**
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index c88bc1013047..ca6285016dfd 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -84,6 +84,8 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
        .mpr            = 1,
        .tpauser        = 1,
        .hw_swap        = 1,
+        .rpadir         = 1,
+        .rpadir_value   = 0x00020000, /* NET_IP_ALIGN assumed to be 2 */
 };
 #elif defined(CONFIG_CPU_SUBTYPE_SH7763)
@@ -175,7 +177,6 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
        .tpauser        = 1,
        .bculr          = 1,
        .hw_swap        = 1,
-        .rpadir         = 1,
        .no_trimd       = 1,
        .no_ade         = 1,
 };
@@ -501,6 +502,8 @@ static int sh_eth_ring_init(struct net_device *ndev)
         */
        mdp->rx_buf_sz = (ndev->mtu <= 1492 ? PKT_BUF_SZ :
                          (((ndev->mtu + 26 + 7) & ~7) + 2 + 16));
+        if (mdp->cd->rpadir)
+                mdp->rx_buf_sz += NET_IP_ALIGN;
        /* Allocate RX and TX skb rings */
        mdp->rx_skbuff = kmalloc(sizeof(*mdp->rx_skbuff) * RX_RING_SIZE,
@@ -715,6 +718,8 @@ static int sh_eth_rx(struct net_device *ndev)
                                        pkt_len + 2);
                        skb = mdp->rx_skbuff[entry];
                        mdp->rx_skbuff[entry] = NULL;
+                        if (mdp->cd->rpadir)
+                                skb_reserve(skb, NET_IP_ALIGN);
                        skb_put(skb, pkt_len);
                        skb->protocol = eth_type_trans(skb, ndev);
                        netif_rx(skb);
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 89a05d674ddc..1c01b96c9611 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -644,7 +644,6 @@ static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port)
 {
        u32 reg1;
-        sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
        reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
        reg1 &= ~phy_power[port];
@@ -652,7 +651,6 @@ static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port)
                reg1 |= coma_mode[port];
        sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
-        sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
        sky2_pci_read32(hw, PCI_DEV_REG1);
        if (hw->chip_id == CHIP_ID_YUKON_FE)
@@ -709,11 +707,9 @@ static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port)
                gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_PDOWN);
        }
-        sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
        reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
        reg1 |= phy_power[port];                /* set PHY to PowerDown/COMA Mode */
        sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
-        sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
 }
 /* Force a renegotiation */
@@ -2152,9 +2148,7 @@ static void sky2_qlink_intr(struct sky2_hw *hw)
        /* reset PHY Link Detect */
        phy = sky2_pci_read16(hw, PSM_CONFIG_REG4);
-        sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
        sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1);
-        sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
        sky2_link_up(sky2);
 }
@@ -2645,7 +2639,6 @@ static void sky2_hw_intr(struct sky2_hw *hw)
        if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
                u16 pci_err;
-                sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
                pci_err = sky2_pci_read16(hw, PCI_STATUS);
                if (net_ratelimit())
                        dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
@@ -2653,14 +2646,12 @@ static void sky2_hw_intr(struct sky2_hw *hw)
                sky2_pci_write16(hw, PCI_STATUS,
                                      pci_err | PCI_STATUS_ERROR_BITS);
-                sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
        }
        if (status & Y2_IS_PCI_EXP) {
                /* PCI-Express uncorrectable Error occurred */
                u32 err;
-                sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
                err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
                sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
                             0xfffffffful);
@@ -2668,7 +2659,6 @@ static void sky2_hw_intr(struct sky2_hw *hw)
                        dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err);
                sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
-                sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
        }
        if (status & Y2_HWE_L1_MASK)
@@ -3047,7 +3037,6 @@ static void sky2_reset(struct sky2_hw *hw)
        }
        sky2_power_on(hw);
-        sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
        for (i = 0; i < hw->ports; i++) {
                sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
@@ -3084,7 +3073,6 @@ static void sky2_reset(struct sky2_hw *hw)
                reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE;
                /* reset PHY Link Detect */
-                sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
                sky2_pci_write16(hw, PSM_CONFIG_REG4,
                                 reg | PSM_CONFIG_REG4_RST_PHY_LINK_DETECT);
                sky2_pci_write16(hw, PSM_CONFIG_REG4, reg);
@@ -3102,7 +3090,6 @@ static void sky2_reset(struct sky2_hw *hw)
                        /* restore the PCIe Link Control register */
                        sky2_pci_write16(hw, cap + PCI_EXP_LNKCTL, reg);
                }
-                sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
                /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */
                sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16));
@@ -4530,7 +4517,7 @@ static const char *sky2_name(u8 chipid, char *buf, int sz)
                "Optima",       /* 0xbc */
        };
-        if (chipid >= CHIP_ID_YUKON_XL && chipid < CHIP_ID_YUKON_OPT)
+        if (chipid >= CHIP_ID_YUKON_XL && chipid <= CHIP_ID_YUKON_OPT)
                strncpy(buf, name[chipid - CHIP_ID_YUKON_XL], sz);
        else
                snprintf(buf, sz, "(chip %#x)", chipid);
diff --git a/drivers/net/usb/rtl8150.c b/drivers/net/usb/rtl8150.c
index b091e20ca167..f14d225404da 100644
--- a/drivers/net/usb/rtl8150.c
+++ b/drivers/net/usb/rtl8150.c
@@ -324,7 +324,7 @@ static int rtl8150_set_mac_address(struct net_device *netdev, void *p)
                dbg("%02X:", netdev->dev_addr[i]);
        dbg("%02X\n", netdev->dev_addr[i]);
        /* Set the IDR registers. */
-        set_registers(dev, IDR, sizeof(netdev->dev_addr), netdev->dev_addr);
+        set_registers(dev, IDR, netdev->addr_len, netdev->dev_addr);
 #ifdef EEPROM_WRITE
        {
        u8 cr;
diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c
index d69bde6a2343..c542c7bb7454 100644
--- a/drivers/parisc/dino.c
+++ b/drivers/parisc/dino.c
@@ -354,7 +354,7 @@ static unsigned int dino_startup_irq(unsigned int irq)
 }
 static struct irq_chip dino_interrupt_type = {
-        .typename       = "GSC-PCI",
+        .name           = "GSC-PCI",
        .startup        = dino_startup_irq,
        .shutdown       = dino_disable_irq,
        .enable         = dino_enable_irq, 
diff --git a/drivers/parisc/eisa.c b/drivers/parisc/eisa.c
index 51220749cb65..46f503fb7fc5 100644
--- a/drivers/parisc/eisa.c
+++ b/drivers/parisc/eisa.c
@@ -189,7 +189,7 @@ static unsigned int eisa_startup_irq(unsigned int irq)
 }
 static struct irq_chip eisa_interrupt_type = {
-        .typename =     "EISA",
+        .name    =      "EISA",
        .startup =      eisa_startup_irq,
        .shutdown =     eisa_disable_irq,
        .enable =       eisa_enable_irq,
diff --git a/drivers/parisc/gsc.c b/drivers/parisc/gsc.c
index 647adc9f85ad..c4e1f3c3c2fa 100644
--- a/drivers/parisc/gsc.c
+++ b/drivers/parisc/gsc.c
@@ -149,7 +149,7 @@ static unsigned int gsc_asic_startup_irq(unsigned int irq)
 }
 static struct irq_chip gsc_asic_interrupt_type = {
-        .typename =     "GSC-ASIC",
+        .name    =      "GSC-ASIC",
        .startup =      gsc_asic_startup_irq,
        .shutdown =     gsc_asic_disable_irq,
        .enable =       gsc_asic_enable_irq,
diff --git a/drivers/parisc/iosapic.c b/drivers/parisc/iosapic.c
index 88e333553212..c76836727cae 100644
--- a/drivers/parisc/iosapic.c
+++ b/drivers/parisc/iosapic.c
@@ -730,7 +730,7 @@ static int iosapic_set_affinity_irq(unsigned int irq,
 #endif
 static struct irq_chip iosapic_interrupt_type = {
-        .typename =     "IO-SAPIC-level",
+        .name    =      "IO-SAPIC-level",
        .startup =      iosapic_startup_irq,
        .shutdown =     iosapic_disable_irq,
        .enable =       iosapic_enable_irq,
diff --git a/drivers/parisc/led.c b/drivers/parisc/led.c
index 79caf1ca4a29..188bc8496a26 100644
--- a/drivers/parisc/led.c
+++ b/drivers/parisc/led.c
@@ -38,6 +38,7 @@
 #include <linux/kernel_stat.h>
 #include <linux/reboot.h>
 #include <linux/proc_fs.h>
+#include <linux/seq_file.h>
 #include <linux/ctype.h>
 #include <linux/blkdev.h>
 #include <linux/workqueue.h>
@@ -147,41 +148,34 @@ device_initcall(start_task);
 static void (*led_func_ptr) (unsigned char) __read_mostly;
 #ifdef CONFIG_PROC_FS
-static int led_proc_read(char *page, char **start, off_t off, int count, 
+static int led_proc_show(struct seq_file *m, void *v)
-        int *eof, void *data)
 {
-        char *out = page;
+        switch ((long)m->private)
-        int len;
-        switch ((long)data)
        {
        case LED_NOLCD:
-                out += sprintf(out, "Heartbeat: %d\n", led_heartbeat);
+                seq_printf(m, "Heartbeat: %d\n", led_heartbeat);
-                out += sprintf(out, "Disk IO: %d\n", led_diskio);
+                seq_printf(m, "Disk IO: %d\n", led_diskio);
-                out += sprintf(out, "LAN Rx/Tx: %d\n", led_lanrxtx);
+                seq_printf(m, "LAN Rx/Tx: %d\n", led_lanrxtx);
                break;
        case LED_HASLCD:
-                out += sprintf(out, "%s\n", lcd_text);
+                seq_printf(m, "%s\n", lcd_text);
                break;
        default:
-                *eof = 1;
                return 0;
        }
+        return 0;
+}
-        len = out - page - off;
+static int led_proc_open(struct inode *inode, struct file *file)
-        if (len < count) {
+{
-                *eof = 1;
+        return single_open(file, led_proc_show, PDE(inode)->data);
-                if (len <= 0) return 0;
-        } else {
-                len = count;
-        }
-        *start = page + off;
-        return len;
 }
-static int led_proc_write(struct file *file, const char *buf, 
-        unsigned long count, void *data)
+static ssize_t led_proc_write(struct file *file, const char *buf,
+        size_t count, loff_t *pos)
 {
+        void *data = PDE(file->f_path.dentry->d_inode)->data;
        char *cur, lbuf[count + 1];
        int d;
@@ -234,6 +228,15 @@ parse_error:
        return -EINVAL;
 }
+static const struct file_operations led_proc_fops = {
+        .owner          = THIS_MODULE,
+        .open           = led_proc_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+        .write          = led_proc_write,
+};
 static int __init led_create_procfs(void)
 {
        struct proc_dir_entry *proc_pdc_root = NULL;
@@ -243,19 +246,15 @@ static int __init led_create_procfs(void)
        proc_pdc_root = proc_mkdir("pdc", 0);
        if (!proc_pdc_root) return -1;
-        ent = create_proc_entry("led", S_IFREG|S_IRUGO|S_IWUSR, proc_pdc_root);
+        ent = proc_create_data("led", S_IRUGO|S_IWUSR, proc_pdc_root,
+                                &led_proc_fops, (void *)LED_NOLCD); /* LED */
        if (!ent) return -1;
-        ent->data = (void *)LED_NOLCD; /* LED */
-        ent->read_proc = led_proc_read;
-        ent->write_proc = led_proc_write;
        if (led_type == LED_HASLCD)
        {
-                ent = create_proc_entry("lcd", S_IFREG|S_IRUGO|S_IWUSR, proc_pdc_root);
+                ent = proc_create_data("lcd", S_IRUGO|S_IWUSR, proc_pdc_root,
+                                        &led_proc_fops, (void *)LED_HASLCD); /* LCD */
                if (!ent) return -1;
-                ent->data = (void *)LED_HASLCD; /* LCD */
-                ent->read_proc = led_proc_read;
-                ent->write_proc = led_proc_write;
        }
        return 0;
diff --git a/drivers/parisc/superio.c b/drivers/parisc/superio.c
index 675f04e6597a..a35c9c5b89e8 100644
--- a/drivers/parisc/superio.c
+++ b/drivers/parisc/superio.c
@@ -326,7 +326,7 @@ static unsigned int superio_startup_irq(unsigned int irq)
 }
 static struct irq_chip superio_interrupt_type = {
-        .typename =     SUPERIO,
+        .name    =      SUPERIO,
        .startup =      superio_startup_irq,
        .shutdown =     superio_disable_irq,
        .enable =       superio_enable_irq,
diff --git a/drivers/parport/parport_pc.c b/drivers/parport/parport_pc.c
index 2597145a066e..ad113b0f62db 100644
--- a/drivers/parport/parport_pc.c
+++ b/drivers/parport/parport_pc.c
@@ -3403,7 +3403,7 @@ static int __init parport_parse_param(const char *s, int *val,
                *val = automatic;
        else if (!strncmp(s, "none", 4))
                *val = none;
-        else if (nofifo && !strncmp(s, "nofifo", 4))
+        else if (nofifo && !strncmp(s, "nofifo", 6))
                *val = nofifo;
        else {
                char *ep;
diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c
index 6cdc931f7c17..83aae4747594 100644
--- a/drivers/pci/dmar.c
+++ b/drivers/pci/dmar.c
@@ -339,6 +339,35 @@ found:
 }
 #endif
+#ifdef CONFIG_ACPI_NUMA
+static int __init
+dmar_parse_one_rhsa(struct acpi_dmar_header *header)
+{
+        struct acpi_dmar_rhsa *rhsa;
+        struct dmar_drhd_unit *drhd;
+        rhsa = (struct acpi_dmar_rhsa *)header;
+        for_each_drhd_unit(drhd) {
+                if (drhd->reg_base_addr == rhsa->base_address) {
+                        int node = acpi_map_pxm_to_node(rhsa->proximity_domain);
+                        if (!node_online(node))
+                                node = -1;
+                        drhd->iommu->node = node;
+                        return 0;
+                }
+        }
+        WARN(1, "Your BIOS is broken; RHSA refers to non-existent DMAR unit at %llx\n"
+             "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
+             drhd->reg_base_addr,
+             dmi_get_system_info(DMI_BIOS_VENDOR),
+             dmi_get_system_info(DMI_BIOS_VERSION),
+             dmi_get_system_info(DMI_PRODUCT_VERSION));
+        return 0;
+}
+#endif
 static void __init
 dmar_table_print_dmar_entry(struct acpi_dmar_header *header)
 {
@@ -458,7 +487,9 @@ parse_dmar_table(void)
 #endif
                        break;
                case ACPI_DMAR_HARDWARE_AFFINITY:
-                        /* We don't do anything with RHSA (yet?) */
+#ifdef CONFIG_ACPI_NUMA
+                        ret = dmar_parse_one_rhsa(entry_header);
+#endif
                        break;
                default:
                        printk(KERN_WARNING PREFIX
@@ -582,6 +613,8 @@ int __init dmar_table_init(void)
        return 0;
 }
+static int bios_warned;
 int __init check_zero_address(void)
 {
        struct acpi_table_dmar *dmar;
@@ -601,6 +634,9 @@ int __init check_zero_address(void)
                }
                if (entry_header->type == ACPI_DMAR_TYPE_HARDWARE_UNIT) {
+                        void __iomem *addr;
+                        u64 cap, ecap;
                        drhd = (void *)entry_header;
                        if (!drhd->address) {
                                /* Promote an attitude of violence to a BIOS engineer today */
@@ -609,17 +645,40 @@ int __init check_zero_address(void)
                                     dmi_get_system_info(DMI_BIOS_VENDOR),
                                     dmi_get_system_info(DMI_BIOS_VERSION),
                                     dmi_get_system_info(DMI_PRODUCT_VERSION));
-#ifdef CONFIG_DMAR
+                                bios_warned = 1;
-                                dmar_disabled = 1;
+                                goto failed;
-#endif
+                        }
-                                return 0;
+                        addr = early_ioremap(drhd->address, VTD_PAGE_SIZE);
+                        if (!addr ) {
+                                printk("IOMMU: can't validate: %llx\n", drhd->address);
+                                goto failed;
+                        }
+                        cap = dmar_readq(addr + DMAR_CAP_REG);
+                        ecap = dmar_readq(addr + DMAR_ECAP_REG);
+                        early_iounmap(addr, VTD_PAGE_SIZE);
+                        if (cap == (uint64_t)-1 && ecap == (uint64_t)-1) {
+                                /* Promote an attitude of violence to a BIOS engineer today */
+                                WARN(1, "Your BIOS is broken; DMAR reported at address %llx returns all ones!\n"
+                                     "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
+                                      drhd->address,
+                                      dmi_get_system_info(DMI_BIOS_VENDOR),
+                                      dmi_get_system_info(DMI_BIOS_VERSION),
+                                      dmi_get_system_info(DMI_PRODUCT_VERSION));
+                                bios_warned = 1;
+                                goto failed;
                        }
-                        break;
                }
                entry_header = ((void *)entry_header + entry_header->length);
        }
        return 1;
+failed:
+#ifdef CONFIG_DMAR
+        dmar_disabled = 1;
+#endif
+        return 0;
 }
 void __init detect_intel_iommu(void)
@@ -670,6 +729,18 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
        int agaw = 0;
        int msagaw = 0;
+        if (!drhd->reg_base_addr) {
+                if (!bios_warned) {
+                        WARN(1, "Your BIOS is broken; DMAR reported at address zero!\n"
+                             "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
+                             dmi_get_system_info(DMI_BIOS_VENDOR),
+                             dmi_get_system_info(DMI_BIOS_VERSION),
+                             dmi_get_system_info(DMI_PRODUCT_VERSION));
+                        bios_warned = 1;
+                }
+                return -EINVAL;
+        }
        iommu = kzalloc(sizeof(*iommu), GFP_KERNEL);
        if (!iommu)
                return -ENOMEM;
@@ -686,13 +757,16 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
        iommu->ecap = dmar_readq(iommu->reg + DMAR_ECAP_REG);
        if (iommu->cap == (uint64_t)-1 && iommu->ecap == (uint64_t)-1) {
-                /* Promote an attitude of violence to a BIOS engineer today */
+                if (!bios_warned) {
-                WARN(1, "Your BIOS is broken; DMAR reported at address %llx returns all ones!\n"
+                        /* Promote an attitude of violence to a BIOS engineer today */
-                     "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
+                        WARN(1, "Your BIOS is broken; DMAR reported at address %llx returns all ones!\n"
-                     drhd->reg_base_addr,
+                             "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
-                     dmi_get_system_info(DMI_BIOS_VENDOR),
+                             drhd->reg_base_addr,
-                     dmi_get_system_info(DMI_BIOS_VERSION),
+                             dmi_get_system_info(DMI_BIOS_VENDOR),
-                     dmi_get_system_info(DMI_PRODUCT_VERSION));
+                             dmi_get_system_info(DMI_BIOS_VERSION),
+                             dmi_get_system_info(DMI_PRODUCT_VERSION));
+                        bios_warned = 1;
+                }
                goto err_unmap;
        }
@@ -715,6 +789,8 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
        iommu->agaw = agaw;
        iommu->msagaw = msagaw;
+        iommu->node = -1;
        /* the registers might be more than one page */
        map_size = max_t(int, ecap_max_iotlb_offset(iommu->ecap),
                cap_max_fault_reg_offset(iommu->cap));
@@ -1056,6 +1132,7 @@ static void __dmar_enable_qi(struct intel_iommu *iommu)
 int dmar_enable_qi(struct intel_iommu *iommu)
 {
        struct q_inval *qi;
+        struct page *desc_page;
        if (!ecap_qis(iommu->ecap))
                return -ENOENT;
@@ -1072,13 +1149,16 @@ int dmar_enable_qi(struct intel_iommu *iommu)
        qi = iommu->qi;
-        qi->desc = (void *)(get_zeroed_page(GFP_ATOMIC));
-        if (!qi->desc) {
+        desc_page = alloc_pages_node(iommu->node, GFP_ATOMIC | __GFP_ZERO, 0);
+        if (!desc_page) {
                kfree(qi);
                iommu->qi = 0;
                return -ENOMEM;
        }
+        qi->desc = page_address(desc_page);
        qi->desc_status = kmalloc(QI_LENGTH * sizeof(int), GFP_ATOMIC);
        if (!qi->desc_status) {
                free_page((unsigned long) qi->desc);
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index 8d6159426311..e56f9bed6f2b 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -277,6 +277,7 @@ static int hw_pass_through = 1;
 struct dmar_domain {
        int     id;                     /* domain id */
+        int     nid;                    /* node id */
        unsigned long iommu_bmp;        /* bitmap of iommus this domain uses*/
        struct list_head devices;       /* all devices' list */
@@ -386,30 +387,14 @@ static struct kmem_cache *iommu_domain_cache;
 static struct kmem_cache *iommu_devinfo_cache;
 static struct kmem_cache *iommu_iova_cache;
-static inline void *iommu_kmem_cache_alloc(struct kmem_cache *cachep)
+static inline void *alloc_pgtable_page(int node)
 {
-        unsigned int flags;
+        struct page *page;
-        void *vaddr;
+        void *vaddr = NULL;
-        /* trying to avoid low memory issues */
-        flags = current->flags & PF_MEMALLOC;
-        current->flags |= PF_MEMALLOC;
-        vaddr = kmem_cache_alloc(cachep, GFP_ATOMIC);
-        current->flags &= (~PF_MEMALLOC | flags);
-        return vaddr;
-}
-static inline void *alloc_pgtable_page(void)
+        page = alloc_pages_node(node, GFP_ATOMIC | __GFP_ZERO, 0);
-{
+        if (page)
-        unsigned int flags;
+                vaddr = page_address(page);
-        void *vaddr;
-        /* trying to avoid low memory issues */
-        flags = current->flags & PF_MEMALLOC;
-        current->flags |= PF_MEMALLOC;
-        vaddr = (void *)get_zeroed_page(GFP_ATOMIC);
-        current->flags &= (~PF_MEMALLOC | flags);
        return vaddr;
 }
@@ -420,7 +405,7 @@ static inline void free_pgtable_page(void *vaddr)
 static inline void *alloc_domain_mem(void)
 {
-        return iommu_kmem_cache_alloc(iommu_domain_cache);
+        return kmem_cache_alloc(iommu_domain_cache, GFP_ATOMIC);
 }
 static void free_domain_mem(void *vaddr)
@@ -430,7 +415,7 @@ static void free_domain_mem(void *vaddr)
 static inline void * alloc_devinfo_mem(void)
 {
-        return iommu_kmem_cache_alloc(iommu_devinfo_cache);
+        return kmem_cache_alloc(iommu_devinfo_cache, GFP_ATOMIC);
 }
 static inline void free_devinfo_mem(void *vaddr)
@@ -440,7 +425,7 @@ static inline void free_devinfo_mem(void *vaddr)
 struct iova *alloc_iova_mem(void)
 {
-        return iommu_kmem_cache_alloc(iommu_iova_cache);
+        return kmem_cache_alloc(iommu_iova_cache, GFP_ATOMIC);
 }
 void free_iova_mem(struct iova *iova)
@@ -589,7 +574,8 @@ static struct context_entry * device_to_context_entry(struct intel_iommu *iommu,
        root = &iommu->root_entry[bus];
        context = get_context_addr_from_root(root);
        if (!context) {
-                context = (struct context_entry *)alloc_pgtable_page();
+                context = (struct context_entry *)
+                                alloc_pgtable_page(iommu->node);
                if (!context) {
                        spin_unlock_irqrestore(&iommu->lock, flags);
                        return NULL;
@@ -732,7 +718,7 @@ static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain,
                if (!dma_pte_present(pte)) {
                        uint64_t pteval;
-                        tmp_page = alloc_pgtable_page();
+                        tmp_page = alloc_pgtable_page(domain->nid);
                        if (!tmp_page)
                                return NULL;
@@ -868,7 +854,7 @@ static int iommu_alloc_root_entry(struct intel_iommu *iommu)
        struct root_entry *root;
        unsigned long flags;
-        root = (struct root_entry *)alloc_pgtable_page();
+        root = (struct root_entry *)alloc_pgtable_page(iommu->node);
        if (!root)
                return -ENOMEM;
@@ -1263,6 +1249,7 @@ static struct dmar_domain *alloc_domain(void)
        if (!domain)
                return NULL;
+        domain->nid = -1;
        memset(&domain->iommu_bmp, 0, sizeof(unsigned long));
        domain->flags = 0;
@@ -1420,9 +1407,10 @@ static int domain_init(struct dmar_domain *domain, int guest_width)
                domain->iommu_snooping = 0;
        domain->iommu_count = 1;
+        domain->nid = iommu->node;
        /* always allocate the top pgd */
-        domain->pgd = (struct dma_pte *)alloc_pgtable_page();
+        domain->pgd = (struct dma_pte *)alloc_pgtable_page(domain->nid);
        if (!domain->pgd)
                return -ENOMEM;
        __iommu_flush_cache(iommu, domain->pgd, PAGE_SIZE);
@@ -1523,12 +1511,15 @@ static int domain_context_mapping_one(struct dmar_domain *domain, int segment,
                /* Skip top levels of page tables for
                 * iommu which has less agaw than default.
+                 * Unnecessary for PT mode.
                 */
-                for (agaw = domain->agaw; agaw != iommu->agaw; agaw--) {
+                if (translation != CONTEXT_TT_PASS_THROUGH) {
-                        pgd = phys_to_virt(dma_pte_addr(pgd));
+                        for (agaw = domain->agaw; agaw != iommu->agaw; agaw--) {
-                        if (!dma_pte_present(pgd)) {
+                                pgd = phys_to_virt(dma_pte_addr(pgd));
-                                spin_unlock_irqrestore(&iommu->lock, flags);
+                                if (!dma_pte_present(pgd)) {
-                                return -ENOMEM;
+                                        spin_unlock_irqrestore(&iommu->lock, flags);
+                                        return -ENOMEM;
+                                }
                        }
                }
        }
@@ -1577,6 +1568,8 @@ static int domain_context_mapping_one(struct dmar_domain *domain, int segment,
        spin_lock_irqsave(&domain->iommu_lock, flags);
        if (!test_and_set_bit(iommu->seq_id, &domain->iommu_bmp)) {
                domain->iommu_count++;
+                if (domain->iommu_count == 1)
+                        domain->nid = iommu->node;
                domain_update_iommu_cap(domain);
        }
        spin_unlock_irqrestore(&domain->iommu_lock, flags);
@@ -1991,6 +1984,16 @@ static int iommu_prepare_identity_map(struct pci_dev *pdev,
               "IOMMU: Setting identity map for device %s [0x%Lx - 0x%Lx]\n",
               pci_name(pdev), start, end);
        
+        if (end < start) {
+                WARN(1, "Your BIOS is broken; RMRR ends before it starts!\n"
+                        "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
+                        dmi_get_system_info(DMI_BIOS_VENDOR),
+                        dmi_get_system_info(DMI_BIOS_VERSION),
+                     dmi_get_system_info(DMI_PRODUCT_VERSION));
+                ret = -EIO;
+                goto error;
+        }
        if (end >> agaw_to_width(domain->agaw)) {
                WARN(1, "Your BIOS is broken; RMRR exceeds permitted address width (%d bits)\n"
                     "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
@@ -3228,6 +3231,9 @@ static int device_notifier(struct notifier_block *nb,
        struct pci_dev *pdev = to_pci_dev(dev);
        struct dmar_domain *domain;
+        if (iommu_no_mapping(dev))
+                return 0;
        domain = find_domain(pdev);
        if (!domain)
                return 0;
@@ -3455,6 +3461,7 @@ static struct dmar_domain *iommu_alloc_vm_domain(void)
                return NULL;
        domain->id = vm_domid++;
+        domain->nid = -1;
        memset(&domain->iommu_bmp, 0, sizeof(unsigned long));
        domain->flags = DOMAIN_FLAG_VIRTUAL_MACHINE;
@@ -3481,9 +3488,10 @@ static int md_domain_init(struct dmar_domain *domain, int guest_width)
        domain->iommu_coherency = 0;
        domain->iommu_snooping = 0;
        domain->max_addr = 0;
+        domain->nid = -1;
        /* always allocate the top pgd */
-        domain->pgd = (struct dma_pte *)alloc_pgtable_page();
+        domain->pgd = (struct dma_pte *)alloc_pgtable_page(domain->nid);
        if (!domain->pgd)
                return -ENOMEM;
        domain_flush_cache(domain, domain->pgd, PAGE_SIZE);
diff --git a/drivers/pci/intr_remapping.c b/drivers/pci/intr_remapping.c
index 1487bf2be863..8b65a489581b 100644
--- a/drivers/pci/intr_remapping.c
+++ b/drivers/pci/intr_remapping.c
@@ -590,7 +590,8 @@ static int setup_intr_remapping(struct intel_iommu *iommu, int mode)
        if (!iommu->ir_table)
                return -ENOMEM;
-        pages = alloc_pages(GFP_ATOMIC | __GFP_ZERO, INTR_REMAP_PAGE_ORDER);
+        pages = alloc_pages_node(iommu->node, GFP_ATOMIC | __GFP_ZERO,
+                                 INTR_REMAP_PAGE_ORDER);
        if (!pages) {
                printk(KERN_ERR "failed to allocate pages of order %d\n",
diff --git a/drivers/pnp/pnpbios/proc.c b/drivers/pnp/pnpbios/proc.c
index b35d921bac6e..2d8ac43f78e8 100644
--- a/drivers/pnp/pnpbios/proc.c
+++ b/drivers/pnp/pnpbios/proc.c
@@ -24,6 +24,7 @@
 #include <linux/types.h>
 #include <linux/proc_fs.h>
 #include <linux/pnp.h>
+#include <linux/seq_file.h>
 #include <linux/init.h>
 #include <asm/uaccess.h>
@@ -33,42 +34,65 @@
 static struct proc_dir_entry *proc_pnp = NULL;
 static struct proc_dir_entry *proc_pnp_boot = NULL;
-static int proc_read_pnpconfig(char *buf, char **start, off_t pos,
+static int pnpconfig_proc_show(struct seq_file *m, void *v)
-                               int count, int *eof, void *data)
 {
        struct pnp_isa_config_struc pnps;
        if (pnp_bios_isapnp_config(&pnps))
                return -EIO;
-        return snprintf(buf, count,
+        seq_printf(m, "structure_revision %d\n"
-                        "structure_revision %d\n"
+                      "number_of_CSNs %d\n"
-                        "number_of_CSNs %d\n"
+                      "ISA_read_data_port 0x%x\n",
-                        "ISA_read_data_port 0x%x\n",
+                   pnps.revision, pnps.no_csns, pnps.isa_rd_data_port);
-                        pnps.revision, pnps.no_csns, pnps.isa_rd_data_port);
+        return 0;
 }
-static int proc_read_escdinfo(char *buf, char **start, off_t pos,
+static int pnpconfig_proc_open(struct inode *inode, struct file *file)
-                              int count, int *eof, void *data)
+{
+        return single_open(file, pnpconfig_proc_show, NULL);
+}
+static const struct file_operations pnpconfig_proc_fops = {
+        .owner          = THIS_MODULE,
+        .open           = pnpconfig_proc_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+static int escd_info_proc_show(struct seq_file *m, void *v)
 {
        struct escd_info_struc escd;
        if (pnp_bios_escd_info(&escd))
                return -EIO;
-        return snprintf(buf, count,
+        seq_printf(m, "min_ESCD_write_size %d\n"
-                        "min_ESCD_write_size %d\n"
                        "ESCD_size %d\n"
                        "NVRAM_base 0x%x\n",
                        escd.min_escd_write_size,
                        escd.escd_size, escd.nv_storage_base);
+        return 0;
 }
+static int escd_info_proc_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, escd_info_proc_show, NULL);
+}
+static const struct file_operations escd_info_proc_fops = {
+        .owner          = THIS_MODULE,
+        .open           = escd_info_proc_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
 #define MAX_SANE_ESCD_SIZE (32*1024)
-static int proc_read_escd(char *buf, char **start, off_t pos,
+static int escd_proc_show(struct seq_file *m, void *v)
-                          int count, int *eof, void *data)
 {
        struct escd_info_struc escd;
        char *tmpbuf;
-        int escd_size, escd_left_to_read, n;
+        int escd_size;
        if (pnp_bios_escd_info(&escd))
                return -EIO;
@@ -76,7 +100,7 @@ static int proc_read_escd(char *buf, char **start, off_t pos,
        /* sanity check */
        if (escd.escd_size > MAX_SANE_ESCD_SIZE) {
                printk(KERN_ERR
-                       "PnPBIOS: proc_read_escd: ESCD size reported by BIOS escd_info call is too great\n");
+                       "PnPBIOS: %s: ESCD size reported by BIOS escd_info call is too great\n", __func__);
                return -EFBIG;
        }
@@ -94,56 +118,75 @@ static int proc_read_escd(char *buf, char **start, off_t pos,
        /* sanity check */
        if (escd_size > MAX_SANE_ESCD_SIZE) {
-                printk(KERN_ERR "PnPBIOS: proc_read_escd: ESCD size reported by"
+                printk(KERN_ERR "PnPBIOS: %s: ESCD size reported by"
-                                " BIOS read_escd call is too great\n");
+                                " BIOS read_escd call is too great\n", __func__);
                kfree(tmpbuf);
                return -EFBIG;
        }
-        escd_left_to_read = escd_size - pos;
+        seq_write(m, tmpbuf, escd_size);
-        if (escd_left_to_read < 0)
-                escd_left_to_read = 0;
-        if (escd_left_to_read == 0)
-                *eof = 1;
-        n = min(count, escd_left_to_read);
-        memcpy(buf, tmpbuf + pos, n);
        kfree(tmpbuf);
-        *start = buf;
+        return 0;
-        return n;
 }
-static int proc_read_legacyres(char *buf, char **start, off_t pos,
+static int escd_proc_open(struct inode *inode, struct file *file)
-                               int count, int *eof, void *data)
+{
+        return single_open(file, escd_proc_show, NULL);
+}
+static const struct file_operations escd_proc_fops = {
+        .owner          = THIS_MODULE,
+        .open           = escd_proc_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+static int pnp_legacyres_proc_show(struct seq_file *m, void *v)
 {
-        /* Assume that the following won't overflow the buffer */
+        void *buf;
-        if (pnp_bios_get_stat_res(buf))
+        buf = kmalloc(65536, GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
+        if (pnp_bios_get_stat_res(buf)) {
+                kfree(buf);
                return -EIO;
+        }
+        seq_write(m, buf, 65536);
+        kfree(buf);
+        return 0;
+}
-        return count;           // FIXME: Return actual length
+static int pnp_legacyres_proc_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, pnp_legacyres_proc_show, NULL);
 }
-static int proc_read_devices(char *buf, char **start, off_t pos,
+static const struct file_operations pnp_legacyres_proc_fops = {
-                             int count, int *eof, void *data)
+        .owner          = THIS_MODULE,
+        .open           = pnp_legacyres_proc_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+static int pnp_devices_proc_show(struct seq_file *m, void *v)
 {
        struct pnp_bios_node *node;
        u8 nodenum;
-        char *p = buf;
-        if (pos >= 0xff)
-                return 0;
        node = kzalloc(node_info.max_node_size, GFP_KERNEL);
        if (!node)
                return -ENOMEM;
-        for (nodenum = pos; nodenum < 0xff;) {
+        for (nodenum = 0; nodenum < 0xff;) {
                u8 thisnodenum = nodenum;
-                /* 26 = the number of characters per line sprintf'ed */
-                if ((p - buf + 26) > count)
-                        break;
                if (pnp_bios_get_dev_node(&nodenum, PNPMODE_DYNAMIC, node))
                        break;
-                p += sprintf(p, "%02x\t%08x\t%02x:%02x:%02x\t%04x\n",
+                seq_printf(m, "%02x\t%08x\t%02x:%02x:%02x\t%04x\n",
                             node->handle, node->eisa_id,
                             node->type_code[0], node->type_code[1],
                             node->type_code[2], node->flags);
@@ -153,20 +196,29 @@ static int proc_read_devices(char *buf, char **start, off_t pos,
                               "PnPBIOS: proc_read_devices:",
                               (unsigned int)nodenum,
                               (unsigned int)thisnodenum);
-                        *eof = 1;
                        break;
                }
        }
        kfree(node);
-        if (nodenum == 0xff)
+        return 0;
-                *eof = 1;
+}
-        *start = (char *)((off_t) nodenum - pos);
-        return p - buf;
+static int pnp_devices_proc_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, pnp_devices_proc_show, NULL);
 }
-static int proc_read_node(char *buf, char **start, off_t pos,
+static const struct file_operations pnp_devices_proc_fops = {
-                          int count, int *eof, void *data)
+        .owner          = THIS_MODULE,
+        .open           = pnp_devices_proc_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+static int pnpbios_proc_show(struct seq_file *m, void *v)
 {
+        void *data = m->private;
        struct pnp_bios_node *node;
        int boot = (long)data >> 8;
        u8 nodenum = (long)data;
@@ -180,14 +232,20 @@ static int proc_read_node(char *buf, char **start, off_t pos,
                return -EIO;
        }
        len = node->size - sizeof(struct pnp_bios_node);
-        memcpy(buf, node->data, len);
+        seq_write(m, node->data, len);
        kfree(node);
-        return len;
+        return 0;
+}
+static int pnpbios_proc_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, pnpbios_proc_show, PDE(inode)->data);
 }
-static int proc_write_node(struct file *file, const char __user * buf,
+static ssize_t pnpbios_proc_write(struct file *file, const char __user *buf,
-                           unsigned long count, void *data)
+                                  size_t count, loff_t *pos)
 {
+        void *data = PDE(file->f_path.dentry->d_inode)->data;
        struct pnp_bios_node *node;
        int boot = (long)data >> 8;
        u8 nodenum = (long)data;
@@ -218,34 +276,33 @@ out:
        return ret;
 }
+static const struct file_operations pnpbios_proc_fops = {
+        .owner          = THIS_MODULE,
+        .open           = pnpbios_proc_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+        .write          = pnpbios_proc_write,
+};
 int pnpbios_interface_attach_device(struct pnp_bios_node *node)
 {
        char name[3];
-        struct proc_dir_entry *ent;
        sprintf(name, "%02x", node->handle);
        if (!proc_pnp)
                return -EIO;
        if (!pnpbios_dont_use_current_config) {
-                ent = create_proc_entry(name, 0, proc_pnp);
+                proc_create_data(name, 0644, proc_pnp, &pnpbios_proc_fops,
-                if (ent) {
+                                 (void *)(long)(node->handle));
-                        ent->read_proc = proc_read_node;
-                        ent->write_proc = proc_write_node;
-                        ent->data = (void *)(long)(node->handle);
-                }
        }
        if (!proc_pnp_boot)
                return -EIO;
-        ent = create_proc_entry(name, 0, proc_pnp_boot);
+        if (proc_create_data(name, 0644, proc_pnp_boot, &pnpbios_proc_fops,
-        if (ent) {
+                             (void *)(long)(node->handle + 0x100)))
-                ent->read_proc = proc_read_node;
-                ent->write_proc = proc_write_node;
-                ent->data = (void *)(long)(node->handle + 0x100);
                return 0;
-        }
        return -EIO;
 }
@@ -262,14 +319,11 @@ int __init pnpbios_proc_init(void)
        proc_pnp_boot = proc_mkdir("boot", proc_pnp);
        if (!proc_pnp_boot)
                return -EIO;
-        create_proc_read_entry("devices", 0, proc_pnp, proc_read_devices, NULL);
+        proc_create("devices", 0, proc_pnp, &pnp_devices_proc_fops);
-        create_proc_read_entry("configuration_info", 0, proc_pnp,
+        proc_create("configuration_info", 0, proc_pnp, &pnpconfig_proc_fops);
-                               proc_read_pnpconfig, NULL);
+        proc_create("escd_info", 0, proc_pnp, &escd_info_proc_fops);
-        create_proc_read_entry("escd_info", 0, proc_pnp, proc_read_escdinfo,
+        proc_create("escd", S_IRUSR, proc_pnp, &escd_proc_fops);
-                               NULL);
+        proc_create("legacy_device_resources", 0, proc_pnp, &pnp_legacyres_proc_fops);
-        create_proc_read_entry("escd", S_IRUSR, proc_pnp, proc_read_escd, NULL);
-        create_proc_read_entry("legacy_device_resources", 0, proc_pnp,
-                               proc_read_legacyres, NULL);
        return 0;
 }
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 71fbd6e8edf7..8167e9e6827a 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -242,6 +242,15 @@ config RTC_DRV_M41T80_WDT
          If you say Y here you will get support for the
          watchdog timer in the ST M41T60 and M41T80 RTC chips series.
+config RTC_DRV_BQ32K
+        tristate "TI BQ32000"
+        help
+          If you say Y here you will get support for the TI
+          BQ32000 I2C RTC chip.
+          This driver can also be built as a module. If so, the module
+          will be called rtc-bq32k.
 config RTC_DRV_DM355EVM
        tristate "TI DaVinci DM355 EVM RTC"
        depends on MFD_DM355EVM_MSP
@@ -592,15 +601,22 @@ config RTC_DRV_AB3100
          Select this to enable the ST-Ericsson AB3100 Mixed Signal IC RTC
          support. This chip contains a battery- and capacitor-backed RTC.
+config RTC_DRV_NUC900
+        tristate "NUC910/NUC920 RTC driver"
+        depends on RTC_CLASS && ARCH_W90X900
+        help
+          If you say yes here you get support for the RTC subsystem of the
+          NUC910/NUC920 used in embedded systems.
 comment "on-CPU RTC drivers"
 config RTC_DRV_OMAP
        tristate "TI OMAP1"
-        depends on ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730
+        depends on ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_DAVINCI_DA8XX
        help
-          Say "yes" here to support the real time clock on TI OMAP1 chips.
+          Say "yes" here to support the real time clock on TI OMAP1 and
-          This driver can also be built as a module called rtc-omap.
+          DA8xx/OMAP-L13x chips.  This driver can also be built as a
+          module called rtc-omap.
 config RTC_DRV_S3C
        tristate "Samsung S3C series SoC RTC"
@@ -846,4 +862,10 @@ config RTC_DRV_PCAP
          If you say Y here you will get support for the RTC found on
          the PCAP2 ASIC used on some Motorola phones.
+config RTC_DRV_MC13783
+        depends on MFD_MC13783
+        tristate "Freescale MC13783 RTC"
+        help
+          This enables support for the Freescale MC13783 PMIC RTC
 endif # RTC_CLASS
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 7da6efb3e953..e5160fddc446 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_RTC_DRV_AT91RM9200)+= rtc-at91rm9200.o
 obj-$(CONFIG_RTC_DRV_AT91SAM9)  += rtc-at91sam9.o
 obj-$(CONFIG_RTC_DRV_AU1XXX)    += rtc-au1xxx.o
 obj-$(CONFIG_RTC_DRV_BFIN)      += rtc-bfin.o
+obj-$(CONFIG_RTC_DRV_BQ32K)     += rtc-bq32k.o
 obj-$(CONFIG_RTC_DRV_BQ4802)    += rtc-bq4802.o
 obj-$(CONFIG_RTC_DRV_CMOS)      += rtc-cmos.o
 obj-$(CONFIG_RTC_DRV_COH901331) += rtc-coh901331.o
@@ -52,8 +53,10 @@ obj-$(CONFIG_RTC_DRV_M48T86)	+= rtc-m48t86.o
 obj-$(CONFIG_RTC_MXC)           += rtc-mxc.o
 obj-$(CONFIG_RTC_DRV_MAX6900)   += rtc-max6900.o
 obj-$(CONFIG_RTC_DRV_MAX6902)   += rtc-max6902.o
+obj-$(CONFIG_RTC_DRV_MC13783)   += rtc-mc13783.o
 obj-$(CONFIG_RTC_DRV_MSM6242)   += rtc-msm6242.o
 obj-$(CONFIG_RTC_DRV_MV)        += rtc-mv.o
+obj-$(CONFIG_RTC_DRV_NUC900)    += rtc-nuc900.o
 obj-$(CONFIG_RTC_DRV_OMAP)      += rtc-omap.o
 obj-$(CONFIG_RTC_DRV_PCAP)      += rtc-pcap.o
 obj-$(CONFIG_RTC_DRV_PCF8563)   += rtc-pcf8563.o
diff --git a/drivers/rtc/rtc-at32ap700x.c b/drivers/rtc/rtc-at32ap700x.c
index e1ec33e40e38..8825695777df 100644
--- a/drivers/rtc/rtc-at32ap700x.c
+++ b/drivers/rtc/rtc-at32ap700x.c
@@ -256,6 +256,8 @@ static int __init at32_rtc_probe(struct platform_device *pdev)
                goto out_iounmap;
        }
+        platform_set_drvdata(pdev, rtc);
        rtc->rtc = rtc_device_register(pdev->name, &pdev->dev,
                                &at32_rtc_ops, THIS_MODULE);
        if (IS_ERR(rtc->rtc)) {
@@ -264,7 +266,6 @@ static int __init at32_rtc_probe(struct platform_device *pdev)
                goto out_free_irq;
        }
-        platform_set_drvdata(pdev, rtc);
        device_init_wakeup(&pdev->dev, 1);
        dev_info(&pdev->dev, "Atmel RTC for AT32AP700x at %08lx irq %ld\n",
@@ -273,6 +274,7 @@ static int __init at32_rtc_probe(struct platform_device *pdev)
        return 0;
 out_free_irq:
+        platform_set_drvdata(pdev, NULL);
        free_irq(irq, rtc);
 out_iounmap:
        iounmap(rtc->regs);
diff --git a/drivers/rtc/rtc-bq32k.c b/drivers/rtc/rtc-bq32k.c
new file mode 100644
index 000000000000..408cc8f735be
--- /dev/null
+++ b/drivers/rtc/rtc-bq32k.c
@@ -0,0 +1,204 @@
+/*
+ * Driver for TI BQ32000 RTC.
+ *
+ * Copyright (C) 2009 Semihalf.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/rtc.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/bcd.h>
+#define BQ32K_SECONDS           0x00    /* Seconds register address */
+#define BQ32K_SECONDS_MASK      0x7F    /* Mask over seconds value */
+#define BQ32K_STOP              0x80    /* Oscillator Stop flat */
+#define BQ32K_MINUTES           0x01    /* Minutes register address */
+#define BQ32K_MINUTES_MASK      0x7F    /* Mask over minutes value */
+#define BQ32K_OF                0x80    /* Oscillator Failure flag */
+#define BQ32K_HOURS_MASK        0x3F    /* Mask over hours value */
+#define BQ32K_CENT              0x40    /* Century flag */
+#define BQ32K_CENT_EN           0x80    /* Century flag enable bit */
+struct bq32k_regs {
+        uint8_t         seconds;
+        uint8_t         minutes;
+        uint8_t         cent_hours;
+        uint8_t         day;
+        uint8_t         date;
+        uint8_t         month;
+        uint8_t         years;
+};
+static struct i2c_driver bq32k_driver;
+static int bq32k_read(struct device *dev, void *data, uint8_t off, uint8_t len)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct i2c_msg msgs[] = {
+                {
+                        .addr = client->addr,
+                        .flags = 0,
+                        .len = 1,
+                        .buf = &off,
+                }, {
+                        .addr = client->addr,
+                        .flags = I2C_M_RD,
+                        .len = len,
+                        .buf = data,
+                }
+        };
+        if (i2c_transfer(client->adapter, msgs, 2) == 2)
+                return 0;
+        return -EIO;
+}
+static int bq32k_write(struct device *dev, void *data, uint8_t off, uint8_t len)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        uint8_t buffer[len + 1];
+        buffer[0] = off;
+        memcpy(&buffer[1], data, len);
+        if (i2c_master_send(client, buffer, len + 1) == len + 1)
+                return 0;
+        return -EIO;
+}
+static int bq32k_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+        struct bq32k_regs regs;
+        int error;
+        error = bq32k_read(dev, &regs, 0, sizeof(regs));
+        if (error)
+                return error;
+        tm->tm_sec = bcd2bin(regs.seconds & BQ32K_SECONDS_MASK);
+        tm->tm_min = bcd2bin(regs.minutes & BQ32K_SECONDS_MASK);
+        tm->tm_hour = bcd2bin(regs.cent_hours & BQ32K_HOURS_MASK);
+        tm->tm_mday = bcd2bin(regs.date);
+        tm->tm_wday = bcd2bin(regs.day) - 1;
+        tm->tm_mon = bcd2bin(regs.month) - 1;
+        tm->tm_year = bcd2bin(regs.years) +
+                                ((regs.cent_hours & BQ32K_CENT) ? 100 : 0);
+        return rtc_valid_tm(tm);
+}
+static int bq32k_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+        struct bq32k_regs regs;
+        regs.seconds = bin2bcd(tm->tm_sec);
+        regs.minutes = bin2bcd(tm->tm_min);
+        regs.cent_hours = bin2bcd(tm->tm_hour) | BQ32K_CENT_EN;
+        regs.day = bin2bcd(tm->tm_wday + 1);
+        regs.date = bin2bcd(tm->tm_mday);
+        regs.month = bin2bcd(tm->tm_mon + 1);
+        if (tm->tm_year >= 100) {
+                regs.cent_hours |= BQ32K_CENT;
+                regs.years = bin2bcd(tm->tm_year - 100);
+        } else
+                regs.years = bin2bcd(tm->tm_year);
+        return bq32k_write(dev, &regs, 0, sizeof(regs));
+}
+static const struct rtc_class_ops bq32k_rtc_ops = {
+        .read_time      = bq32k_rtc_read_time,
+        .set_time       = bq32k_rtc_set_time,
+};
+static int bq32k_probe(struct i2c_client *client,
+                                const struct i2c_device_id *id)
+{
+        struct device *dev = &client->dev;
+        struct rtc_device *rtc;
+        uint8_t reg;
+        int error;
+        if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
+                return -ENODEV;
+        /* Check Oscillator Stop flag */
+        error = bq32k_read(dev, &reg, BQ32K_SECONDS, 1);
+        if (!error && (reg & BQ32K_STOP)) {
+                dev_warn(dev, "Oscillator was halted. Restarting...\n");
+                reg &= ~BQ32K_STOP;
+                error = bq32k_write(dev, &reg, BQ32K_SECONDS, 1);
+        }
+        if (error)
+                return error;
+        /* Check Oscillator Failure flag */
+        error = bq32k_read(dev, &reg, BQ32K_MINUTES, 1);
+        if (!error && (reg & BQ32K_OF)) {
+                dev_warn(dev, "Oscillator Failure. Check RTC battery.\n");
+                reg &= ~BQ32K_OF;
+                error = bq32k_write(dev, &reg, BQ32K_MINUTES, 1);
+        }
+        if (error)
+                return error;
+        rtc = rtc_device_register(bq32k_driver.driver.name, &client->dev,
+                                                &bq32k_rtc_ops, THIS_MODULE);
+        if (IS_ERR(rtc))
+                return PTR_ERR(rtc);
+        i2c_set_clientdata(client, rtc);
+        return 0;
+}
+static int __devexit bq32k_remove(struct i2c_client *client)
+{
+        struct rtc_device *rtc = i2c_get_clientdata(client);
+        rtc_device_unregister(rtc);
+        return 0;
+}
+static const struct i2c_device_id bq32k_id[] = {
+        { "bq32000", 0 },
+        { }
+};
+MODULE_DEVICE_TABLE(i2c, bq32k_id);
+static struct i2c_driver bq32k_driver = {
+        .driver = {
+                .name   = "bq32k",
+                .owner  = THIS_MODULE,
+        },
+        .probe          = bq32k_probe,
+        .remove         = __devexit_p(bq32k_remove),
+        .id_table       = bq32k_id,
+};
+static __init int bq32k_init(void)
+{
+        return i2c_add_driver(&bq32k_driver);
+}
+module_init(bq32k_init);
+static __exit void bq32k_exit(void)
+{
+        i2c_del_driver(&bq32k_driver);
+}
+module_exit(bq32k_exit);
+MODULE_AUTHOR("Semihalf, Piotr Ziecik <kosmo@semihalf.com>");
+MODULE_DESCRIPTION("TI BQ32000 I2C RTC driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/rtc-bq4802.c b/drivers/rtc/rtc-bq4802.c
index d00a274df8fc..280fe48ada0b 100644
--- a/drivers/rtc/rtc-bq4802.c
+++ b/drivers/rtc/rtc-bq4802.c
@@ -169,6 +169,8 @@ static int __devinit bq4802_probe(struct platform_device *pdev)
                goto out_free;
        }
+        platform_set_drvdata(pdev, p);
        p->rtc = rtc_device_register("bq4802", &pdev->dev,
                                     &bq4802_ops, THIS_MODULE);
        if (IS_ERR(p->rtc)) {
@@ -176,7 +178,6 @@ static int __devinit bq4802_probe(struct platform_device *pdev)
                goto out_iounmap;
        }
-        platform_set_drvdata(pdev, p);
        err = 0;
 out:
        return err;
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
index f7a4701bf863..eb154dc57164 100644
--- a/drivers/rtc/rtc-cmos.c
+++ b/drivers/rtc/rtc-cmos.c
@@ -420,49 +420,43 @@ static int cmos_irq_set_state(struct device *dev, int enabled)
        return 0;
 }
-#if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE)
+static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
-static int
-cmos_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
 {
        struct cmos_rtc *cmos = dev_get_drvdata(dev);
        unsigned long   flags;
-        switch (cmd) {
+        if (!is_valid_irq(cmos->irq))
-        case RTC_AIE_OFF:
+                return -EINVAL;
-        case RTC_AIE_ON:
-        case RTC_UIE_OFF:
-        case RTC_UIE_ON:
-                if (!is_valid_irq(cmos->irq))
-                        return -EINVAL;
-                break;
-        /* PIE ON/OFF is handled by cmos_irq_set_state() */
-        default:
-                return -ENOIOCTLCMD;
-        }
        spin_lock_irqsave(&rtc_lock, flags);
-        switch (cmd) {
-        case RTC_AIE_OFF:       /* alarm off */
+        if (enabled)
-                cmos_irq_disable(cmos, RTC_AIE);
-                break;
-        case RTC_AIE_ON:        /* alarm on */
                cmos_irq_enable(cmos, RTC_AIE);
-                break;
+        else
-        case RTC_UIE_OFF:       /* update off */
+                cmos_irq_disable(cmos, RTC_AIE);
-                cmos_irq_disable(cmos, RTC_UIE);
-                break;
-        case RTC_UIE_ON:        /* update on */
-                cmos_irq_enable(cmos, RTC_UIE);
-                break;
-        }
        spin_unlock_irqrestore(&rtc_lock, flags);
        return 0;
 }
-#else
+static int cmos_update_irq_enable(struct device *dev, unsigned int enabled)
-#define cmos_rtc_ioctl  NULL
+{
-#endif
+        struct cmos_rtc *cmos = dev_get_drvdata(dev);
+        unsigned long   flags;
+        if (!is_valid_irq(cmos->irq))
+                return -EINVAL;
+        spin_lock_irqsave(&rtc_lock, flags);
+        if (enabled)
+                cmos_irq_enable(cmos, RTC_UIE);
+        else
+                cmos_irq_disable(cmos, RTC_UIE);
+        spin_unlock_irqrestore(&rtc_lock, flags);
+        return 0;
+}
 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
@@ -503,14 +497,15 @@ static int cmos_procfs(struct device *dev, struct seq_file *seq)
 #endif
 static const struct rtc_class_ops cmos_rtc_ops = {
-        .ioctl          = cmos_rtc_ioctl,
+        .read_time              = cmos_read_time,
-        .read_time      = cmos_read_time,
+        .set_time               = cmos_set_time,
-        .set_time       = cmos_set_time,
+        .read_alarm             = cmos_read_alarm,
-        .read_alarm     = cmos_read_alarm,
+        .set_alarm              = cmos_set_alarm,
-        .set_alarm      = cmos_set_alarm,
+        .proc                   = cmos_procfs,
-        .proc           = cmos_procfs,
+        .irq_set_freq           = cmos_irq_set_freq,
-        .irq_set_freq   = cmos_irq_set_freq,
+        .irq_set_state          = cmos_irq_set_state,
-        .irq_set_state  = cmos_irq_set_state,
+        .alarm_irq_enable       = cmos_alarm_irq_enable,
+        .update_irq_enable      = cmos_update_irq_enable,
 };
 /*----------------------------------------------------------------*/
@@ -871,8 +866,9 @@ static int cmos_suspend(struct device *dev, pm_message_t mesg)
                        mask = RTC_IRQMASK;
                tmp &= ~mask;
                CMOS_WRITE(tmp, RTC_CONTROL);
-                hpet_mask_rtc_irq_bit(mask);
+                /* shut down hpet emulation - we don't need it for alarm */
+                hpet_mask_rtc_irq_bit(RTC_PIE|RTC_AIE|RTC_UIE);
                cmos_checkintr(cmos, tmp);
        }
        spin_unlock_irq(&rtc_lock);
diff --git a/drivers/rtc/rtc-ds1302.c b/drivers/rtc/rtc-ds1302.c
index 1e73c8f42e38..532acf9b05d8 100644
--- a/drivers/rtc/rtc-ds1302.c
+++ b/drivers/rtc/rtc-ds1302.c
@@ -143,7 +143,6 @@ static int ds1302_rtc_ioctl(struct device *dev, unsigned int cmd,
 #ifdef RTC_SET_CHARGE
        case RTC_SET_CHARGE:
        {
-                struct ds1302_rtc *rtc = dev_get_drvdata(dev);
                int tcs_val;
                if (copy_from_user(&tcs_val, (int __user *)arg, sizeof(int)))
diff --git a/drivers/rtc/rtc-ds1305.c b/drivers/rtc/rtc-ds1305.c
index 2736b11a1b1e..259db7f3535b 100644
--- a/drivers/rtc/rtc-ds1305.c
+++ b/drivers/rtc/rtc-ds1305.c
@@ -617,7 +617,6 @@ static struct bin_attribute nvram = {
 static int __devinit ds1305_probe(struct spi_device *spi)
 {
        struct ds1305                   *ds1305;
-        struct rtc_device               *rtc;
        int                             status;
        u8                              addr, value;
        struct ds1305_platform_data     *pdata = spi->dev.platform_data;
@@ -756,14 +755,13 @@ static int __devinit ds1305_probe(struct spi_device *spi)
                dev_dbg(&spi->dev, "AM/PM\n");
        /* register RTC ... from here on, ds1305->ctrl needs locking */
-        rtc = rtc_device_register("ds1305", &spi->dev,
+        ds1305->rtc = rtc_device_register("ds1305", &spi->dev,
                        &ds1305_ops, THIS_MODULE);
-        if (IS_ERR(rtc)) {
+        if (IS_ERR(ds1305->rtc)) {
-                status = PTR_ERR(rtc);
+                status = PTR_ERR(ds1305->rtc);
                dev_dbg(&spi->dev, "register rtc --> %d\n", status);
                goto fail0;
        }
-        ds1305->rtc = rtc;
        /* Maybe set up alarm IRQ; be ready to handle it triggering right
         * away.  NOTE that we don't share this.  The signal is active low,
@@ -774,7 +772,7 @@ static int __devinit ds1305_probe(struct spi_device *spi)
        if (spi->irq) {
                INIT_WORK(&ds1305->work, ds1305_work);
                status = request_irq(spi->irq, ds1305_irq,
-                                0, dev_name(&rtc->dev), ds1305);
+                                0, dev_name(&ds1305->rtc->dev), ds1305);
                if (status < 0) {
                        dev_dbg(&spi->dev, "request_irq %d --> %d\n",
                                        spi->irq, status);
@@ -794,7 +792,7 @@ static int __devinit ds1305_probe(struct spi_device *spi)
 fail2:
        free_irq(spi->irq, ds1305);
 fail1:
-        rtc_device_unregister(rtc);
+        rtc_device_unregister(ds1305->rtc);
 fail0:
        kfree(ds1305);
        return status;
@@ -802,7 +800,7 @@ fail0:
 static int __devexit ds1305_remove(struct spi_device *spi)
 {
-        struct ds1305   *ds1305 = spi_get_drvdata(spi);
+        struct ds1305 *ds1305 = spi_get_drvdata(spi);
        sysfs_remove_bin_file(&spi->dev.kobj, &nvram);
diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
index eb99ee4fa0f5..8a99da6f2f24 100644
--- a/drivers/rtc/rtc-ds1307.c
+++ b/drivers/rtc/rtc-ds1307.c
@@ -874,7 +874,7 @@ read_rtc:
        }
        if (want_irq) {
-                err = request_irq(client->irq, ds1307_irq, 0,
+                err = request_irq(client->irq, ds1307_irq, IRQF_SHARED,
                          ds1307->rtc->name, client);
                if (err) {
                        dev_err(&client->dev,
diff --git a/drivers/rtc/rtc-ds1511.c b/drivers/rtc/rtc-ds1511.c
index 539676e25fd8..4166b84cb514 100644
--- a/drivers/rtc/rtc-ds1511.c
+++ b/drivers/rtc/rtc-ds1511.c
@@ -87,7 +87,6 @@ enum ds1511reg {
 struct rtc_plat_data {
        struct rtc_device *rtc;
        void __iomem *ioaddr;           /* virtual base address */
-        unsigned long baseaddr;         /* physical base address */
        int size;                               /* amount of memory mapped */
        int irq;
        unsigned int irqen;
@@ -95,6 +94,7 @@ struct rtc_plat_data {
        int alrm_min;
        int alrm_hour;
        int alrm_mday;
+        spinlock_t lock;
 };
 static DEFINE_SPINLOCK(ds1511_lock);
@@ -302,7 +302,7 @@ ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
 {
        unsigned long flags;
-        spin_lock_irqsave(&pdata->rtc->irq_lock, flags);
+        spin_lock_irqsave(&pdata->lock, flags);
        rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
               0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
               RTC_ALARM_DATE);
@@ -317,7 +317,7 @@ ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
               RTC_ALARM_SEC);
        rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
        rtc_read(RTC_CMD1);     /* clear interrupts */
-        spin_unlock_irqrestore(&pdata->rtc->irq_lock, flags);
+        spin_unlock_irqrestore(&pdata->lock, flags);
 }
 static int
@@ -362,61 +362,63 @@ ds1511_interrupt(int irq, void *dev_id)
 {
        struct platform_device *pdev = dev_id;
        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
-        unsigned long events = RTC_IRQF;
+        unsigned long events = 0;
+        spin_lock(&pdata->lock);
        /*
         * read and clear interrupt
         */
-        if (!(rtc_read(RTC_CMD1) & DS1511_IRQF)) {
+        if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
-                return IRQ_NONE;
+                events = RTC_IRQF;
-        }
+                if (rtc_read(RTC_ALARM_SEC) & 0x80)
-        if (rtc_read(RTC_ALARM_SEC) & 0x80) {
+                        events |= RTC_UF;
-                events |= RTC_UF;
+                else
-        } else {
+                        events |= RTC_AF;
-                events |= RTC_AF;
+                if (likely(pdata->rtc))
-        }
+                        rtc_update_irq(pdata->rtc, 1, events);
-        rtc_update_irq(pdata->rtc, 1, events);
+        }
-        return IRQ_HANDLED;
+        spin_unlock(&pdata->lock);
+        return events ? IRQ_HANDLED : IRQ_NONE;
 }
- static int
+static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
-ds1511_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
 {
        struct platform_device *pdev = to_platform_device(dev);
        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
-        if (pdata->irq <= 0) {
+        if (pdata->irq <= 0)
-                return -ENOIOCTLCMD; /* fall back into rtc-dev's emulation */
+                return -EINVAL;
-        }
+        if (enabled)
-        switch (cmd) {
-        case RTC_AIE_OFF:
-                pdata->irqen &= ~RTC_AF;
-                ds1511_rtc_update_alarm(pdata);
-                break;
-        case RTC_AIE_ON:
                pdata->irqen |= RTC_AF;
-                ds1511_rtc_update_alarm(pdata);
+        else
-                break;
+                pdata->irqen &= ~RTC_AF;
-        case RTC_UIE_OFF:
+        ds1511_rtc_update_alarm(pdata);
-                pdata->irqen &= ~RTC_UF;
+        return 0;
-                ds1511_rtc_update_alarm(pdata);
+}
-                break;
-        case RTC_UIE_ON:
+static int ds1511_rtc_update_irq_enable(struct device *dev,
+        unsigned int enabled)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
+        if (pdata->irq <= 0)
+                return -EINVAL;
+        if (enabled)
                pdata->irqen |= RTC_UF;
-                ds1511_rtc_update_alarm(pdata);
+        else
-                break;
+                pdata->irqen &= ~RTC_UF;
-        default:
+        ds1511_rtc_update_alarm(pdata);
-                return -ENOIOCTLCMD;
-        }
        return 0;
 }
 static const struct rtc_class_ops ds1511_rtc_ops = {
-        .read_time      = ds1511_rtc_read_time,
+        .read_time              = ds1511_rtc_read_time,
-        .set_time       = ds1511_rtc_set_time,
+        .set_time               = ds1511_rtc_set_time,
-        .read_alarm     = ds1511_rtc_read_alarm,
+        .read_alarm             = ds1511_rtc_read_alarm,
-        .set_alarm      = ds1511_rtc_set_alarm,
+        .set_alarm              = ds1511_rtc_set_alarm,
-        .ioctl          = ds1511_rtc_ioctl,
+        .alarm_irq_enable       = ds1511_rtc_alarm_irq_enable,
+        .update_irq_enable      = ds1511_rtc_update_irq_enable,
 };
 static ssize_t
@@ -492,29 +494,23 @@ ds1511_rtc_probe(struct platform_device *pdev)
 {
        struct rtc_device *rtc;
        struct resource *res;
-        struct rtc_plat_data *pdata = NULL;
+        struct rtc_plat_data *pdata;
        int ret = 0;
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        if (!res) {
                return -ENODEV;
        }
-        pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
+        pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
-        if (!pdata) {
+        if (!pdata)
                return -ENOMEM;
-        }
        pdata->size = res->end - res->start + 1;
-        if (!request_mem_region(res->start, pdata->size, pdev->name)) {
+        if (!devm_request_mem_region(&pdev->dev, res->start, pdata->size,
-                ret = -EBUSY;
+                        pdev->name))
-                goto out;
+                return -EBUSY;
-        }
+        ds1511_base = devm_ioremap(&pdev->dev, res->start, pdata->size);
-        pdata->baseaddr = res->start;
+        if (!ds1511_base)
-        pdata->size = pdata->size;
+                return -ENOMEM;
-        ds1511_base = ioremap(pdata->baseaddr, pdata->size);
-        if (!ds1511_base) {
-                ret = -ENOMEM;
-                goto out;
-        }
        pdata->ioaddr = ds1511_base;
        pdata->irq = platform_get_irq(pdev, 0);
@@ -540,13 +536,15 @@ ds1511_rtc_probe(struct platform_device *pdev)
                dev_warn(&pdev->dev, "voltage-low detected.\n");
        }
+        spin_lock_init(&pdata->lock);
+        platform_set_drvdata(pdev, pdata);
        /*
         * if the platform has an interrupt in mind for this device,
         * then by all means, set it
         */
        if (pdata->irq > 0) {
                rtc_read(RTC_CMD1);
-                if (request_irq(pdata->irq, ds1511_interrupt,
+                if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
                        IRQF_DISABLED | IRQF_SHARED, pdev->name, pdev) < 0) {
                        dev_warn(&pdev->dev, "interrupt not available.\n");
@@ -556,33 +554,13 @@ ds1511_rtc_probe(struct platform_device *pdev)
        rtc = rtc_device_register(pdev->name, &pdev->dev, &ds1511_rtc_ops,
                THIS_MODULE);
-        if (IS_ERR(rtc)) {
+        if (IS_ERR(rtc))
-                ret = PTR_ERR(rtc);
+                return PTR_ERR(rtc);
-                goto out;
-        }
        pdata->rtc = rtc;
-        platform_set_drvdata(pdev, pdata);
        ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
-        if (ret) {
+        if (ret)
-                goto out;
-        }
-        return 0;
- out:
-        if (pdata->rtc) {
                rtc_device_unregister(pdata->rtc);
-        }
-        if (pdata->irq > 0) {
-                free_irq(pdata->irq, pdev);
-        }
-        if (ds1511_base) {
-                iounmap(ds1511_base);
-                ds1511_base = NULL;
-        }
-        if (pdata->baseaddr) {
-                release_mem_region(pdata->baseaddr, pdata->size);
-        }
-        kfree(pdata);
        return ret;
 }
@@ -593,19 +571,13 @@ ds1511_rtc_remove(struct platform_device *pdev)
        sysfs_remove_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
        rtc_device_unregister(pdata->rtc);
-        pdata->rtc = NULL;
        if (pdata->irq > 0) {
                /*
                 * disable the alarm interrupt
                 */
                rtc_write(rtc_read(RTC_CMD) & ~RTC_TIE, RTC_CMD);
                rtc_read(RTC_CMD1);
-                free_irq(pdata->irq, pdev);
        }
-        iounmap(pdata->ioaddr);
-        ds1511_base = NULL;
-        release_mem_region(pdata->baseaddr, pdata->size);
-        kfree(pdata);
        return 0;
 }
diff --git a/drivers/rtc/rtc-ds1553.c b/drivers/rtc/rtc-ds1553.c
index 717288527c6b..ed1ef7c9cc06 100644
--- a/drivers/rtc/rtc-ds1553.c
+++ b/drivers/rtc/rtc-ds1553.c
@@ -18,7 +18,7 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
-#define DRV_VERSION "0.2"
+#define DRV_VERSION "0.3"
 #define RTC_REG_SIZE            0x2000
 #define RTC_OFFSET              0x1ff0
@@ -61,7 +61,6 @@
 struct rtc_plat_data {
        struct rtc_device *rtc;
        void __iomem *ioaddr;
-        resource_size_t baseaddr;
        unsigned long last_jiffies;
        int irq;
        unsigned int irqen;
@@ -69,6 +68,7 @@ struct rtc_plat_data {
        int alrm_min;
        int alrm_hour;
        int alrm_mday;
+        spinlock_t lock;
 };
 static int ds1553_rtc_set_time(struct device *dev, struct rtc_time *tm)
@@ -139,7 +139,7 @@ static void ds1553_rtc_update_alarm(struct rtc_plat_data *pdata)
        void __iomem *ioaddr = pdata->ioaddr;
        unsigned long flags;
-        spin_lock_irqsave(&pdata->rtc->irq_lock, flags);
+        spin_lock_irqsave(&pdata->lock, flags);
        writeb(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
               0x80 : bin2bcd(pdata->alrm_mday),
               ioaddr + RTC_DATE_ALARM);
@@ -154,7 +154,7 @@ static void ds1553_rtc_update_alarm(struct rtc_plat_data *pdata)
               ioaddr + RTC_SECONDS_ALARM);
        writeb(pdata->irqen ? RTC_INTS_AE : 0, ioaddr + RTC_INTERRUPTS);
        readb(ioaddr + RTC_FLAGS);      /* clear interrupts */
-        spin_unlock_irqrestore(&pdata->rtc->irq_lock, flags);
+        spin_unlock_irqrestore(&pdata->lock, flags);
 }
 static int ds1553_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
@@ -194,64 +194,69 @@ static irqreturn_t ds1553_rtc_interrupt(int irq, void *dev_id)
        struct platform_device *pdev = dev_id;
        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
        void __iomem *ioaddr = pdata->ioaddr;
-        unsigned long events = RTC_IRQF;
+        unsigned long events = 0;
+        spin_lock(&pdata->lock);
        /* read and clear interrupt */
-        if (!(readb(ioaddr + RTC_FLAGS) & RTC_FLAGS_AF))
+        if (readb(ioaddr + RTC_FLAGS) & RTC_FLAGS_AF) {
-                return IRQ_NONE;
+                events = RTC_IRQF;
-        if (readb(ioaddr + RTC_SECONDS_ALARM) & 0x80)
+                if (readb(ioaddr + RTC_SECONDS_ALARM) & 0x80)
-                events |= RTC_UF;
+                        events |= RTC_UF;
-        else
+                else
-                events |= RTC_AF;
+                        events |= RTC_AF;
-        rtc_update_irq(pdata->rtc, 1, events);
+                if (likely(pdata->rtc))
-        return IRQ_HANDLED;
+                        rtc_update_irq(pdata->rtc, 1, events);
+        }
+        spin_unlock(&pdata->lock);
+        return events ? IRQ_HANDLED : IRQ_NONE;
 }
-static int ds1553_rtc_ioctl(struct device *dev, unsigned int cmd,
+static int ds1553_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
-                            unsigned long arg)
 {
        struct platform_device *pdev = to_platform_device(dev);
        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
        if (pdata->irq <= 0)
-                return -ENOIOCTLCMD; /* fall back into rtc-dev's emulation */
+                return -EINVAL;
-        switch (cmd) {
+        if (enabled)
-        case RTC_AIE_OFF:
-                pdata->irqen &= ~RTC_AF;
-                ds1553_rtc_update_alarm(pdata);
-                break;
-        case RTC_AIE_ON:
                pdata->irqen |= RTC_AF;
-                ds1553_rtc_update_alarm(pdata);
+        else
-                break;
+                pdata->irqen &= ~RTC_AF;
-        case RTC_UIE_OFF:
+        ds1553_rtc_update_alarm(pdata);
-                pdata->irqen &= ~RTC_UF;
+        return 0;
-                ds1553_rtc_update_alarm(pdata);
+}
-                break;
-        case RTC_UIE_ON:
+static int ds1553_rtc_update_irq_enable(struct device *dev,
+        unsigned int enabled)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
+        if (pdata->irq <= 0)
+                return -EINVAL;
+        if (enabled)
                pdata->irqen |= RTC_UF;
-                ds1553_rtc_update_alarm(pdata);
+        else
-                break;
+                pdata->irqen &= ~RTC_UF;
-        default:
+        ds1553_rtc_update_alarm(pdata);
-                return -ENOIOCTLCMD;
-        }
        return 0;
 }
 static const struct rtc_class_ops ds1553_rtc_ops = {
-        .read_time      = ds1553_rtc_read_time,
+        .read_time              = ds1553_rtc_read_time,
-        .set_time       = ds1553_rtc_set_time,
+        .set_time               = ds1553_rtc_set_time,
-        .read_alarm     = ds1553_rtc_read_alarm,
+        .read_alarm             = ds1553_rtc_read_alarm,
-        .set_alarm      = ds1553_rtc_set_alarm,
+        .set_alarm              = ds1553_rtc_set_alarm,
-        .ioctl          = ds1553_rtc_ioctl,
+        .alarm_irq_enable       = ds1553_rtc_alarm_irq_enable,
+        .update_irq_enable      = ds1553_rtc_update_irq_enable,
 };
 static ssize_t ds1553_nvram_read(struct kobject *kobj,
                                 struct bin_attribute *bin_attr,
                                 char *buf, loff_t pos, size_t size)
 {
-        struct platform_device *pdev =
+        struct device *dev = container_of(kobj, struct device, kobj);
-                to_platform_device(container_of(kobj, struct device, kobj));
+        struct platform_device *pdev = to_platform_device(dev);
        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
        void __iomem *ioaddr = pdata->ioaddr;
        ssize_t count;
@@ -265,8 +270,8 @@ static ssize_t ds1553_nvram_write(struct kobject *kobj,
                                  struct bin_attribute *bin_attr,
                                  char *buf, loff_t pos, size_t size)
 {
-        struct platform_device *pdev =
+        struct device *dev = container_of(kobj, struct device, kobj);
-                to_platform_device(container_of(kobj, struct device, kobj));
+        struct platform_device *pdev = to_platform_device(dev);
        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
        void __iomem *ioaddr = pdata->ioaddr;
        ssize_t count;
@@ -291,26 +296,23 @@ static int __devinit ds1553_rtc_probe(struct platform_device *pdev)
        struct rtc_device *rtc;
        struct resource *res;
        unsigned int cen, sec;
-        struct rtc_plat_data *pdata = NULL;
+        struct rtc_plat_data *pdata;
-        void __iomem *ioaddr = NULL;
+        void __iomem *ioaddr;
        int ret = 0;
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        if (!res)
                return -ENODEV;
-        pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
+        pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
        if (!pdata)
                return -ENOMEM;
-        if (!request_mem_region(res->start, RTC_REG_SIZE, pdev->name)) {
+        if (!devm_request_mem_region(&pdev->dev, res->start, RTC_REG_SIZE,
-                ret = -EBUSY;
+                        pdev->name))
-                goto out;
+                return -EBUSY;
-        }
-        pdata->baseaddr = res->start;
+        ioaddr = devm_ioremap(&pdev->dev, res->start, RTC_REG_SIZE);
-        ioaddr = ioremap(pdata->baseaddr, RTC_REG_SIZE);
+        if (!ioaddr)
-        if (!ioaddr) {
+                return -ENOMEM;
-                ret = -ENOMEM;
-                goto out;
-        }
        pdata->ioaddr = ioaddr;
        pdata->irq = platform_get_irq(pdev, 0);
@@ -326,9 +328,13 @@ static int __devinit ds1553_rtc_probe(struct platform_device *pdev)
        if (readb(ioaddr + RTC_FLAGS) & RTC_FLAGS_BLF)
                dev_warn(&pdev->dev, "voltage-low detected.\n");
+        spin_lock_init(&pdata->lock);
+        pdata->last_jiffies = jiffies;
+        platform_set_drvdata(pdev, pdata);
        if (pdata->irq > 0) {
                writeb(0, ioaddr + RTC_INTERRUPTS);
-                if (request_irq(pdata->irq, ds1553_rtc_interrupt,
+                if (devm_request_irq(&pdev->dev, pdata->irq,
+                                ds1553_rtc_interrupt,
                                IRQF_DISABLED, pdev->name, pdev) < 0) {
                        dev_warn(&pdev->dev, "interrupt not available.\n");
                        pdata->irq = 0;
@@ -337,27 +343,13 @@ static int __devinit ds1553_rtc_probe(struct platform_device *pdev)
        rtc = rtc_device_register(pdev->name, &pdev->dev,
                                  &ds1553_rtc_ops, THIS_MODULE);
-        if (IS_ERR(rtc)) {
+        if (IS_ERR(rtc))
-                ret = PTR_ERR(rtc);
+                return PTR_ERR(rtc);
-                goto out;
-        }
        pdata->rtc = rtc;
-        pdata->last_jiffies = jiffies;
-        platform_set_drvdata(pdev, pdata);
        ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1553_nvram_attr);
        if (ret)
-                goto out;
+                rtc_device_unregister(rtc);
-        return 0;
- out:
-        if (pdata->rtc)
-                rtc_device_unregister(pdata->rtc);
-        if (pdata->irq > 0)
-                free_irq(pdata->irq, pdev);
-        if (ioaddr)
-                iounmap(ioaddr);
-        if (pdata->baseaddr)
-                release_mem_region(pdata->baseaddr, RTC_REG_SIZE);
-        kfree(pdata);
        return ret;
 }
@@ -367,13 +359,8 @@ static int __devexit ds1553_rtc_remove(struct platform_device *pdev)
        sysfs_remove_bin_file(&pdev->dev.kobj, &ds1553_nvram_attr);
        rtc_device_unregister(pdata->rtc);
-        if (pdata->irq > 0) {
+        if (pdata->irq > 0)
                writeb(0, pdata->ioaddr + RTC_INTERRUPTS);
-                free_irq(pdata->irq, pdev);
-        }
-        iounmap(pdata->ioaddr);
-        release_mem_region(pdata->baseaddr, RTC_REG_SIZE);
-        kfree(pdata);
        return 0;
 }
diff --git a/drivers/rtc/rtc-ds1742.c b/drivers/rtc/rtc-ds1742.c
index 09249459e9a4..a1273360a44e 100644
--- a/drivers/rtc/rtc-ds1742.c
+++ b/drivers/rtc/rtc-ds1742.c
@@ -21,7 +21,7 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
-#define DRV_VERSION "0.3"
+#define DRV_VERSION "0.4"
 #define RTC_SIZE                8
@@ -55,7 +55,6 @@ struct rtc_plat_data {
        void __iomem *ioaddr_rtc;
        size_t size_nvram;
        size_t size;
-        resource_size_t baseaddr;
        unsigned long last_jiffies;
        struct bin_attribute nvram_attr;
 };
@@ -132,8 +131,8 @@ static ssize_t ds1742_nvram_read(struct kobject *kobj,
                                 struct bin_attribute *bin_attr,
                                 char *buf, loff_t pos, size_t size)
 {
-        struct platform_device *pdev =
+        struct device *dev = container_of(kobj, struct device, kobj);
-                to_platform_device(container_of(kobj, struct device, kobj));
+        struct platform_device *pdev = to_platform_device(dev);
        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
        void __iomem *ioaddr = pdata->ioaddr_nvram;
        ssize_t count;
@@ -147,8 +146,8 @@ static ssize_t ds1742_nvram_write(struct kobject *kobj,
                                  struct bin_attribute *bin_attr,
                                  char *buf, loff_t pos, size_t size)
 {
-        struct platform_device *pdev =
+        struct device *dev = container_of(kobj, struct device, kobj);
-                to_platform_device(container_of(kobj, struct device, kobj));
+        struct platform_device *pdev = to_platform_device(dev);
        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
        void __iomem *ioaddr = pdata->ioaddr_nvram;
        ssize_t count;
@@ -163,27 +162,24 @@ static int __devinit ds1742_rtc_probe(struct platform_device *pdev)
        struct rtc_device *rtc;
        struct resource *res;
        unsigned int cen, sec;
-        struct rtc_plat_data *pdata = NULL;
+        struct rtc_plat_data *pdata;
-        void __iomem *ioaddr = NULL;
+        void __iomem *ioaddr;
        int ret = 0;
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        if (!res)
                return -ENODEV;
-        pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
+        pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
        if (!pdata)
                return -ENOMEM;
        pdata->size = res->end - res->start + 1;
-        if (!request_mem_region(res->start, pdata->size, pdev->name)) {
+        if (!devm_request_mem_region(&pdev->dev, res->start, pdata->size,
-                ret = -EBUSY;
+                pdev->name))
-                goto out;
+                return -EBUSY;
-        }
+        ioaddr = devm_ioremap(&pdev->dev, res->start, pdata->size);
-        pdata->baseaddr = res->start;
+        if (!ioaddr)
-        ioaddr = ioremap(pdata->baseaddr, pdata->size);
+                return -ENOMEM;
-        if (!ioaddr) {
-                ret = -ENOMEM;
-                goto out;
-        }
        pdata->ioaddr_nvram = ioaddr;
        pdata->size_nvram = pdata->size - RTC_SIZE;
        pdata->ioaddr_rtc = ioaddr + pdata->size_nvram;
@@ -207,31 +203,19 @@ static int __devinit ds1742_rtc_probe(struct platform_device *pdev)
        if (!(readb(ioaddr + RTC_DAY) & RTC_BATT_FLAG))
                dev_warn(&pdev->dev, "voltage-low detected.\n");
+        pdata->last_jiffies = jiffies;
+        platform_set_drvdata(pdev, pdata);
        rtc = rtc_device_register(pdev->name, &pdev->dev,
                                  &ds1742_rtc_ops, THIS_MODULE);
-        if (IS_ERR(rtc)) {
+        if (IS_ERR(rtc))
-                ret = PTR_ERR(rtc);
+                return PTR_ERR(rtc);
-                goto out;
-        }
        pdata->rtc = rtc;
-        pdata->last_jiffies = jiffies;
-        platform_set_drvdata(pdev, pdata);
        ret = sysfs_create_bin_file(&pdev->dev.kobj, &pdata->nvram_attr);
        if (ret) {
                dev_err(&pdev->dev, "creating nvram file in sysfs failed\n");
-                goto out;
+                rtc_device_unregister(rtc);
        }
-        return 0;
- out:
-        if (pdata->rtc)
-                rtc_device_unregister(pdata->rtc);
-        if (pdata->ioaddr_nvram)
-                iounmap(pdata->ioaddr_nvram);
-        if (pdata->baseaddr)
-                release_mem_region(pdata->baseaddr, pdata->size);
-        kfree(pdata);
        return ret;
 }
@@ -241,9 +225,6 @@ static int __devexit ds1742_rtc_remove(struct platform_device *pdev)
        sysfs_remove_bin_file(&pdev->dev.kobj, &pdata->nvram_attr);
        rtc_device_unregister(pdata->rtc);
-        iounmap(pdata->ioaddr_nvram);
-        release_mem_region(pdata->baseaddr, pdata->size);
-        kfree(pdata);
        return 0;
 }
diff --git a/drivers/rtc/rtc-m48t35.c b/drivers/rtc/rtc-m48t35.c
index 0b2197559940..8cb5b8959e5b 100644
--- a/drivers/rtc/rtc-m48t35.c
+++ b/drivers/rtc/rtc-m48t35.c
@@ -142,7 +142,6 @@ static const struct rtc_class_ops m48t35_ops = {
 static int __devinit m48t35_probe(struct platform_device *pdev)
 {
-        struct rtc_device *rtc;
        struct resource *res;
        struct m48t35_priv *priv;
        int ret = 0;
@@ -171,20 +170,21 @@ static int __devinit m48t35_probe(struct platform_device *pdev)
                ret = -ENOMEM;
                goto out;
        }
        spin_lock_init(&priv->lock);
-        rtc = rtc_device_register("m48t35", &pdev->dev,
+        platform_set_drvdata(pdev, priv);
+        priv->rtc = rtc_device_register("m48t35", &pdev->dev,
                                  &m48t35_ops, THIS_MODULE);
-        if (IS_ERR(rtc)) {
+        if (IS_ERR(priv->rtc)) {
-                ret = PTR_ERR(rtc);
+                ret = PTR_ERR(priv->rtc);
                goto out;
        }
-        priv->rtc = rtc;
-        platform_set_drvdata(pdev, priv);
        return 0;
 out:
-        if (priv->rtc)
-                rtc_device_unregister(priv->rtc);
        if (priv->reg)
                iounmap(priv->reg);
        if (priv->baseaddr)
diff --git a/drivers/rtc/rtc-m48t59.c b/drivers/rtc/rtc-m48t59.c
index 33921a6b1707..ede43b846859 100644
--- a/drivers/rtc/rtc-m48t59.c
+++ b/drivers/rtc/rtc-m48t59.c
@@ -481,6 +481,9 @@ static int __devinit m48t59_rtc_probe(struct platform_device *pdev)
                goto out;
        }
+        spin_lock_init(&m48t59->lock);
+        platform_set_drvdata(pdev, m48t59);
        m48t59->rtc = rtc_device_register(name, &pdev->dev, ops, THIS_MODULE);
        if (IS_ERR(m48t59->rtc)) {
                ret = PTR_ERR(m48t59->rtc);
@@ -490,16 +493,14 @@ static int __devinit m48t59_rtc_probe(struct platform_device *pdev)
        m48t59_nvram_attr.size = pdata->offset;
        ret = sysfs_create_bin_file(&pdev->dev.kobj, &m48t59_nvram_attr);
-        if (ret)
+        if (ret) {
+                rtc_device_unregister(m48t59->rtc);
                goto out;
+        }
-        spin_lock_init(&m48t59->lock);
-        platform_set_drvdata(pdev, m48t59);
        return 0;
 out:
-        if (!IS_ERR(m48t59->rtc))
-                rtc_device_unregister(m48t59->rtc);
        if (m48t59->irq != NO_IRQ)
                free_irq(m48t59->irq, &pdev->dev);
        if (m48t59->ioaddr)
diff --git a/drivers/rtc/rtc-mc13783.c b/drivers/rtc/rtc-mc13783.c
new file mode 100644
index 000000000000..850f983c039c
--- /dev/null
+++ b/drivers/rtc/rtc-mc13783.c
@@ -0,0 +1,262 @@
+/*
+ * Real Time Clock driver for Freescale MC13783 PMIC
+ *
+ * (C) 2009 Sascha Hauer, Pengutronix
+ * (C) 2009 Uwe Kleine-Koenig, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/mfd/mc13783.h>
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/rtc.h>
+#define DRIVER_NAME "mc13783-rtc"
+#define MC13783_RTCTOD  20
+#define MC13783_RTCTODA 21
+#define MC13783_RTCDAY  22
+#define MC13783_RTCDAYA 23
+struct mc13783_rtc {
+        struct rtc_device *rtc;
+        struct mc13783 *mc13783;
+        int valid;
+};
+static int mc13783_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+        struct mc13783_rtc *priv = dev_get_drvdata(dev);
+        unsigned int seconds, days1, days2;
+        unsigned long s1970;
+        int ret;
+        mc13783_lock(priv->mc13783);
+        if (!priv->valid) {
+                ret = -ENODATA;
+                goto out;
+        }
+        ret = mc13783_reg_read(priv->mc13783, MC13783_RTCDAY, &days1);
+        if (unlikely(ret))
+                goto out;
+        ret = mc13783_reg_read(priv->mc13783, MC13783_RTCTOD, &seconds);
+        if (unlikely(ret))
+                goto out;
+        ret = mc13783_reg_read(priv->mc13783, MC13783_RTCDAY, &days2);
+out:
+        mc13783_unlock(priv->mc13783);
+        if (ret)
+                return ret;
+        if (days2 == days1 + 1) {
+                if (seconds >= 86400 / 2)
+                        days2 = days1;
+                else
+                        days1 = days2;
+        }
+        if (days1 != days2)
+                return -EIO;
+        s1970 = days1 * 86400 + seconds;
+        rtc_time_to_tm(s1970, tm);
+        return rtc_valid_tm(tm);
+}
+static int mc13783_rtc_set_mmss(struct device *dev, unsigned long secs)
+{
+        struct mc13783_rtc *priv = dev_get_drvdata(dev);
+        unsigned int seconds, days;
+        int ret;
+        seconds = secs % 86400;
+        days = secs / 86400;
+        mc13783_lock(priv->mc13783);
+        /*
+         * first write seconds=0 to prevent a day switch between writing days
+         * and seconds below
+         */
+        ret = mc13783_reg_write(priv->mc13783, MC13783_RTCTOD, 0);
+        if (unlikely(ret))
+                goto out;
+        ret = mc13783_reg_write(priv->mc13783, MC13783_RTCDAY, days);
+        if (unlikely(ret))
+                goto out;
+        ret = mc13783_reg_write(priv->mc13783, MC13783_RTCTOD, seconds);
+        if (unlikely(ret))
+                goto out;
+        ret = mc13783_ackirq(priv->mc13783, MC13783_IRQ_RTCRST);
+        if (unlikely(ret))
+                goto out;
+        ret = mc13783_unmask(priv->mc13783, MC13783_IRQ_RTCRST);
+out:
+        priv->valid = !ret;
+        mc13783_unlock(priv->mc13783);
+        return ret;
+}
+static irqreturn_t mc13783_rtc_update_handler(int irq, void *dev)
+{
+        struct mc13783_rtc *priv = dev;
+        struct mc13783 *mc13783 = priv->mc13783;
+        dev_dbg(&priv->rtc->dev, "1HZ\n");
+        rtc_update_irq(priv->rtc, 1, RTC_IRQF | RTC_UF);
+        mc13783_ackirq(mc13783, irq);
+        return IRQ_HANDLED;
+}
+static int mc13783_rtc_update_irq_enable(struct device *dev,
+                unsigned int enabled)
+{
+        struct mc13783_rtc *priv = dev_get_drvdata(dev);
+        int ret = -ENODATA;
+        mc13783_lock(priv->mc13783);
+        if (!priv->valid)
+                goto out;
+        ret = (enabled ? mc13783_unmask : mc13783_mask)(priv->mc13783,
+                        MC13783_IRQ_1HZ);
+out:
+        mc13783_unlock(priv->mc13783);
+        return ret;
+}
+static const struct rtc_class_ops mc13783_rtc_ops = {
+        .read_time = mc13783_rtc_read_time,
+        .set_mmss = mc13783_rtc_set_mmss,
+        .update_irq_enable = mc13783_rtc_update_irq_enable,
+};
+static irqreturn_t mc13783_rtc_reset_handler(int irq, void *dev)
+{
+        struct mc13783_rtc *priv = dev;
+        struct mc13783 *mc13783 = priv->mc13783;
+        dev_dbg(&priv->rtc->dev, "RTCRST\n");
+        priv->valid = 0;
+        mc13783_mask(mc13783, irq);
+        return IRQ_HANDLED;
+}
+static int __devinit mc13783_rtc_probe(struct platform_device *pdev)
+{
+        int ret;
+        struct mc13783_rtc *priv;
+        priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+        if (!priv)
+                return -ENOMEM;
+        priv->mc13783 = dev_get_drvdata(pdev->dev.parent);
+        platform_set_drvdata(pdev, priv);
+        priv->valid = 1;
+        mc13783_lock(priv->mc13783);
+        ret = mc13783_irq_request(priv->mc13783, MC13783_IRQ_RTCRST,
+                        mc13783_rtc_reset_handler, DRIVER_NAME, priv);
+        if (ret)
+                goto err_reset_irq_request;
+        ret = mc13783_irq_request_nounmask(priv->mc13783, MC13783_IRQ_1HZ,
+                        mc13783_rtc_update_handler, DRIVER_NAME, priv);
+        if (ret)
+                goto err_update_irq_request;
+        mc13783_unlock(priv->mc13783);
+        priv->rtc = rtc_device_register(pdev->name,
+                        &pdev->dev, &mc13783_rtc_ops, THIS_MODULE);
+        if (IS_ERR(priv->rtc)) {
+                ret = PTR_ERR(priv->rtc);
+                mc13783_lock(priv->mc13783);
+                mc13783_irq_free(priv->mc13783, MC13783_IRQ_1HZ, priv);
+err_update_irq_request:
+                mc13783_irq_free(priv->mc13783, MC13783_IRQ_RTCRST, priv);
+err_reset_irq_request:
+                mc13783_unlock(priv->mc13783);
+                platform_set_drvdata(pdev, NULL);
+                kfree(priv);
+        }
+        return ret;
+}
+static int __devexit mc13783_rtc_remove(struct platform_device *pdev)
+{
+        struct mc13783_rtc *priv = platform_get_drvdata(pdev);
+        rtc_device_unregister(priv->rtc);
+        mc13783_lock(priv->mc13783);
+        mc13783_irq_free(priv->mc13783, MC13783_IRQ_1HZ, priv);
+        mc13783_irq_free(priv->mc13783, MC13783_IRQ_RTCRST, priv);
+        mc13783_unlock(priv->mc13783);
+        platform_set_drvdata(pdev, NULL);
+        kfree(priv);
+        return 0;
+}
+static struct platform_driver mc13783_rtc_driver = {
+        .remove = __devexit_p(mc13783_rtc_remove),
+        .driver = {
+                .name = DRIVER_NAME,
+                .owner = THIS_MODULE,
+        },
+};
+static int __init mc13783_rtc_init(void)
+{
+        return platform_driver_probe(&mc13783_rtc_driver, &mc13783_rtc_probe);
+}
+module_init(mc13783_rtc_init);
+static void __exit mc13783_rtc_exit(void)
+{
+        platform_driver_unregister(&mc13783_rtc_driver);
+}
+module_exit(mc13783_rtc_exit);
+MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
+MODULE_DESCRIPTION("RTC driver for Freescale MC13783 PMIC");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:" DRIVER_NAME);
diff --git a/drivers/rtc/rtc-mv.c b/drivers/rtc/rtc-mv.c
index e0263d2005ee..dc052ce6e63a 100644
--- a/drivers/rtc/rtc-mv.c
+++ b/drivers/rtc/rtc-mv.c
@@ -27,10 +27,17 @@
 #define RTC_MONTH_OFFS          8
 #define RTC_YEAR_OFFS           16
+#define RTC_ALARM_TIME_REG_OFFS 8
+#define RTC_ALARM_DATE_REG_OFFS 0xc
+#define RTC_ALARM_VALID         (1 << 7)
+#define RTC_ALARM_INTERRUPT_MASK_REG_OFFS       0x10
+#define RTC_ALARM_INTERRUPT_CASUE_REG_OFFS      0x14
 struct rtc_plat_data {
        struct rtc_device *rtc;
        void __iomem *ioaddr;
+        int             irq;
 };
 static int mv_rtc_set_time(struct device *dev, struct rtc_time *tm)
@@ -84,12 +91,134 @@ static int mv_rtc_read_time(struct device *dev, struct rtc_time *tm)
        return rtc_valid_tm(tm);
 }
+static int mv_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
+{
+        struct rtc_plat_data *pdata = dev_get_drvdata(dev);
+        void __iomem *ioaddr = pdata->ioaddr;
+        u32     rtc_time, rtc_date;
+        unsigned int year, month, day, hour, minute, second, wday;
+        rtc_time = readl(ioaddr + RTC_ALARM_TIME_REG_OFFS);
+        rtc_date = readl(ioaddr + RTC_ALARM_DATE_REG_OFFS);
+        second = rtc_time & 0x7f;
+        minute = (rtc_time >> RTC_MINUTES_OFFS) & 0x7f;
+        hour = (rtc_time >> RTC_HOURS_OFFS) & 0x3f; /* assume 24 hours mode */
+        wday = (rtc_time >> RTC_WDAY_OFFS) & 0x7;
+        day = rtc_date & 0x3f;
+        month = (rtc_date >> RTC_MONTH_OFFS) & 0x3f;
+        year = (rtc_date >> RTC_YEAR_OFFS) & 0xff;
+        alm->time.tm_sec = bcd2bin(second);
+        alm->time.tm_min = bcd2bin(minute);
+        alm->time.tm_hour = bcd2bin(hour);
+        alm->time.tm_mday = bcd2bin(day);
+        alm->time.tm_wday = bcd2bin(wday);
+        alm->time.tm_mon = bcd2bin(month) - 1;
+        /* hw counts from year 2000, but tm_year is relative to 1900 */
+        alm->time.tm_year = bcd2bin(year) + 100;
+        if (rtc_valid_tm(&alm->time) < 0) {
+                dev_err(dev, "retrieved alarm date/time is not valid.\n");
+                rtc_time_to_tm(0, &alm->time);
+        }
+        alm->enabled = !!readl(ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
+        return 0;
+}
+static int mv_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
+{
+        struct rtc_plat_data *pdata = dev_get_drvdata(dev);
+        void __iomem *ioaddr = pdata->ioaddr;
+        u32 rtc_reg = 0;
+        if (alm->time.tm_sec >= 0)
+                rtc_reg |= (RTC_ALARM_VALID | bin2bcd(alm->time.tm_sec))
+                        << RTC_SECONDS_OFFS;
+        if (alm->time.tm_min >= 0)
+                rtc_reg |= (RTC_ALARM_VALID | bin2bcd(alm->time.tm_min))
+                        << RTC_MINUTES_OFFS;
+        if (alm->time.tm_hour >= 0)
+                rtc_reg |= (RTC_ALARM_VALID | bin2bcd(alm->time.tm_hour))
+                        << RTC_HOURS_OFFS;
+        writel(rtc_reg, ioaddr + RTC_ALARM_TIME_REG_OFFS);
+        if (alm->time.tm_mday >= 0)
+                rtc_reg = (RTC_ALARM_VALID | bin2bcd(alm->time.tm_mday))
+                        << RTC_MDAY_OFFS;
+        else
+                rtc_reg = 0;
+        if (alm->time.tm_mon >= 0)
+                rtc_reg |= (RTC_ALARM_VALID | bin2bcd(alm->time.tm_mon + 1))
+                        << RTC_MONTH_OFFS;
+        if (alm->time.tm_year >= 0)
+                rtc_reg |= (RTC_ALARM_VALID | bin2bcd(alm->time.tm_year % 100))
+                        << RTC_YEAR_OFFS;
+        writel(rtc_reg, ioaddr + RTC_ALARM_DATE_REG_OFFS);
+        writel(0, ioaddr + RTC_ALARM_INTERRUPT_CASUE_REG_OFFS);
+        writel(alm->enabled ? 1 : 0,
+               ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
+        return 0;
+}
+static int mv_rtc_ioctl(struct device *dev, unsigned int cmd,
+                        unsigned long arg)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
+        void __iomem *ioaddr = pdata->ioaddr;
+        if (pdata->irq < 0)
+                return -ENOIOCTLCMD; /* fall back into rtc-dev's emulation */
+        switch (cmd) {
+        case RTC_AIE_OFF:
+                writel(0, ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
+                break;
+        case RTC_AIE_ON:
+                writel(1, ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
+                break;
+        default:
+                return -ENOIOCTLCMD;
+        }
+        return 0;
+}
+static irqreturn_t mv_rtc_interrupt(int irq, void *data)
+{
+        struct rtc_plat_data *pdata = data;
+        void __iomem *ioaddr = pdata->ioaddr;
+        /* alarm irq? */
+        if (!readl(ioaddr + RTC_ALARM_INTERRUPT_CASUE_REG_OFFS))
+                return IRQ_NONE;
+        /* clear interrupt */
+        writel(0, ioaddr + RTC_ALARM_INTERRUPT_CASUE_REG_OFFS);
+        rtc_update_irq(pdata->rtc, 1, RTC_IRQF | RTC_AF);
+        return IRQ_HANDLED;
+}
 static const struct rtc_class_ops mv_rtc_ops = {
        .read_time      = mv_rtc_read_time,
        .set_time       = mv_rtc_set_time,
 };
-static int __init mv_rtc_probe(struct platform_device *pdev)
+static const struct rtc_class_ops mv_rtc_alarm_ops = {
+        .read_time      = mv_rtc_read_time,
+        .set_time       = mv_rtc_set_time,
+        .read_alarm     = mv_rtc_read_alarm,
+        .set_alarm      = mv_rtc_set_alarm,
+        .ioctl          = mv_rtc_ioctl,
+};
+static int __devinit mv_rtc_probe(struct platform_device *pdev)
 {
        struct resource *res;
        struct rtc_plat_data *pdata;
@@ -130,12 +259,31 @@ static int __init mv_rtc_probe(struct platform_device *pdev)
                }
        }
+        pdata->irq = platform_get_irq(pdev, 0);
        platform_set_drvdata(pdev, pdata);
-        pdata->rtc = rtc_device_register(pdev->name, &pdev->dev,
-                                         &mv_rtc_ops, THIS_MODULE);
+        if (pdata->irq >= 0) {
+                device_init_wakeup(&pdev->dev, 1);
+                pdata->rtc = rtc_device_register(pdev->name, &pdev->dev,
+                                                 &mv_rtc_alarm_ops,
+                                                 THIS_MODULE);
+        } else
+                pdata->rtc = rtc_device_register(pdev->name, &pdev->dev,
+                                                 &mv_rtc_ops, THIS_MODULE);
        if (IS_ERR(pdata->rtc))
                return PTR_ERR(pdata->rtc);
+        if (pdata->irq >= 0) {
+                writel(0, pdata->ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
+                if (devm_request_irq(&pdev->dev, pdata->irq, mv_rtc_interrupt,
+                                     IRQF_DISABLED | IRQF_SHARED,
+                                     pdev->name, pdata) < 0) {
+                        dev_warn(&pdev->dev, "interrupt not available.\n");
+                        pdata->irq = -1;
+                }
+        }
        return 0;
 }
@@ -143,6 +291,9 @@ static int __exit mv_rtc_remove(struct platform_device *pdev)
 {
        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
+        if (pdata->irq >= 0)
+                device_init_wakeup(&pdev->dev, 0);
        rtc_device_unregister(pdata->rtc);
        return 0;
 }
diff --git a/drivers/rtc/rtc-nuc900.c b/drivers/rtc/rtc-nuc900.c
new file mode 100644
index 000000000000..bf59c9c586b2
--- /dev/null
+++ b/drivers/rtc/rtc-nuc900.c
@@ -0,0 +1,342 @@
+/*
+ * Copyright (c) 2008-2009 Nuvoton technology corporation.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation;version 2 of the License.
+ *
+ */
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/rtc.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/bcd.h>
+/* RTC Control Registers */
+#define REG_RTC_INIR            0x00
+#define REG_RTC_AER             0x04
+#define REG_RTC_FCR             0x08
+#define REG_RTC_TLR             0x0C
+#define REG_RTC_CLR             0x10
+#define REG_RTC_TSSR            0x14
+#define REG_RTC_DWR             0x18
+#define REG_RTC_TAR             0x1C
+#define REG_RTC_CAR             0x20
+#define REG_RTC_LIR             0x24
+#define REG_RTC_RIER            0x28
+#define REG_RTC_RIIR            0x2C
+#define REG_RTC_TTR             0x30
+#define RTCSET                  0x01
+#define AERRWENB                0x10000
+#define INIRRESET               0xa5eb1357
+#define AERPOWERON              0xA965
+#define AERPOWEROFF             0x0000
+#define LEAPYEAR                0x0001
+#define TICKENB                 0x80
+#define TICKINTENB              0x0002
+#define ALARMINTENB             0x0001
+#define MODE24                  0x0001
+struct nuc900_rtc {
+        int                     irq_num;
+        void __iomem            *rtc_reg;
+        struct rtc_device       *rtcdev;
+};
+struct nuc900_bcd_time {
+        int bcd_sec;
+        int bcd_min;
+        int bcd_hour;
+        int bcd_mday;
+        int bcd_mon;
+        int bcd_year;
+};
+static irqreturn_t nuc900_rtc_interrupt(int irq, void *_rtc)
+{
+        struct nuc900_rtc *rtc = _rtc;
+        unsigned long events = 0, rtc_irq;
+        rtc_irq = __raw_readl(rtc->rtc_reg + REG_RTC_RIIR);
+        if (rtc_irq & ALARMINTENB) {
+                rtc_irq &= ~ALARMINTENB;
+                __raw_writel(rtc_irq, rtc->rtc_reg + REG_RTC_RIIR);
+                events |= RTC_AF | RTC_IRQF;
+        }
+        if (rtc_irq & TICKINTENB) {
+                rtc_irq &= ~TICKINTENB;
+                __raw_writel(rtc_irq, rtc->rtc_reg + REG_RTC_RIIR);
+                events |= RTC_UF | RTC_IRQF;
+        }
+        rtc_update_irq(rtc->rtcdev, 1, events);
+        return IRQ_HANDLED;
+}
+static int *check_rtc_access_enable(struct nuc900_rtc *nuc900_rtc)
+{
+        unsigned int i;
+        __raw_writel(INIRRESET, nuc900_rtc->rtc_reg + REG_RTC_INIR);
+        mdelay(10);
+        __raw_writel(AERPOWERON, nuc900_rtc->rtc_reg + REG_RTC_AER);
+        for (i = 0; i < 1000; i++) {
+                if (__raw_readl(nuc900_rtc->rtc_reg + REG_RTC_AER) & AERRWENB)
+                        return 0;
+        }
+        if ((__raw_readl(nuc900_rtc->rtc_reg + REG_RTC_AER) & AERRWENB) == 0x0)
+                return ERR_PTR(-ENODEV);
+        return ERR_PTR(-EPERM);
+}
+static void nuc900_rtc_bcd2bin(unsigned int timereg,
+                                unsigned int calreg, struct rtc_time *tm)
+{
+        tm->tm_mday     = bcd2bin(calreg >> 0);
+        tm->tm_mon      = bcd2bin(calreg >> 8);
+        tm->tm_year     = bcd2bin(calreg >> 16) + 100;
+        tm->tm_sec      = bcd2bin(timereg >> 0);
+        tm->tm_min      = bcd2bin(timereg >> 8);
+        tm->tm_hour     = bcd2bin(timereg >> 16);
+        rtc_valid_tm(tm);
+}
+static void nuc900_rtc_bin2bcd(struct rtc_time *settm,
+                                                struct nuc900_bcd_time *gettm)
+{
+        gettm->bcd_mday = bin2bcd(settm->tm_mday) << 0;
+        gettm->bcd_mon  = bin2bcd(settm->tm_mon) << 8;
+        gettm->bcd_year = bin2bcd(settm->tm_year - 100) << 16;
+        gettm->bcd_sec  = bin2bcd(settm->tm_sec) << 0;
+        gettm->bcd_min  = bin2bcd(settm->tm_min) << 8;
+        gettm->bcd_hour = bin2bcd(settm->tm_hour) << 16;
+}
+static int nuc900_update_irq_enable(struct device *dev, unsigned int enabled)
+{
+        struct nuc900_rtc *rtc = dev_get_drvdata(dev);
+        if (enabled)
+                __raw_writel(__raw_readl(rtc->rtc_reg + REG_RTC_RIER)|
+                                (TICKINTENB), rtc->rtc_reg + REG_RTC_RIER);
+        else
+                __raw_writel(__raw_readl(rtc->rtc_reg + REG_RTC_RIER)&
+                                (~TICKINTENB), rtc->rtc_reg + REG_RTC_RIER);
+        return 0;
+}
+static int nuc900_alarm_irq_enable(struct device *dev, unsigned int enabled)
+{
+        struct nuc900_rtc *rtc = dev_get_drvdata(dev);
+        if (enabled)
+                __raw_writel(__raw_readl(rtc->rtc_reg + REG_RTC_RIER)|
+                                (ALARMINTENB), rtc->rtc_reg + REG_RTC_RIER);
+        else
+                __raw_writel(__raw_readl(rtc->rtc_reg + REG_RTC_RIER)&
+                                (~ALARMINTENB), rtc->rtc_reg + REG_RTC_RIER);
+        return 0;
+}
+static int nuc900_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+        struct nuc900_rtc *rtc = dev_get_drvdata(dev);
+        unsigned int timeval, clrval;
+        timeval = __raw_readl(rtc->rtc_reg + REG_RTC_TLR);
+        clrval  = __raw_readl(rtc->rtc_reg + REG_RTC_CLR);
+        nuc900_rtc_bcd2bin(timeval, clrval, tm);
+        return 0;
+}
+static int nuc900_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+        struct nuc900_rtc *rtc = dev_get_drvdata(dev);
+        struct nuc900_bcd_time gettm;
+        unsigned long val;
+        int *err;
+        nuc900_rtc_bin2bcd(tm, &gettm);
+        err = check_rtc_access_enable(rtc);
+        if (IS_ERR(err))
+                return PTR_ERR(err);
+        val = gettm.bcd_mday | gettm.bcd_mon | gettm.bcd_year;
+        __raw_writel(val, rtc->rtc_reg + REG_RTC_CLR);
+        val = gettm.bcd_sec | gettm.bcd_min | gettm.bcd_hour;
+        __raw_writel(val, rtc->rtc_reg + REG_RTC_TLR);
+        return 0;
+}
+static int nuc900_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+        struct nuc900_rtc *rtc = dev_get_drvdata(dev);
+        unsigned int timeval, carval;
+        timeval = __raw_readl(rtc->rtc_reg + REG_RTC_TAR);
+        carval  = __raw_readl(rtc->rtc_reg + REG_RTC_CAR);
+        nuc900_rtc_bcd2bin(timeval, carval, &alrm->time);
+        return 0;
+}
+static int nuc900_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+        struct nuc900_rtc *rtc = dev_get_drvdata(dev);
+        struct nuc900_bcd_time tm;
+        unsigned long val;
+        int *err;
+        nuc900_rtc_bin2bcd(&alrm->time, &tm);
+        err = check_rtc_access_enable(rtc);
+        if (IS_ERR(err))
+                return PTR_ERR(err);
+        val = tm.bcd_mday | tm.bcd_mon | tm.bcd_year;
+        __raw_writel(val, rtc->rtc_reg + REG_RTC_CAR);
+        val = tm.bcd_sec | tm.bcd_min | tm.bcd_hour;
+        __raw_writel(val, rtc->rtc_reg + REG_RTC_TAR);
+        return 0;
+}
+static struct rtc_class_ops nuc900_rtc_ops = {
+        .read_time = nuc900_rtc_read_time,
+        .set_time = nuc900_rtc_set_time,
+        .read_alarm = nuc900_rtc_read_alarm,
+        .set_alarm = nuc900_rtc_set_alarm,
+        .alarm_irq_enable = nuc900_alarm_irq_enable,
+        .update_irq_enable = nuc900_update_irq_enable,
+};
+static int __devinit nuc900_rtc_probe(struct platform_device *pdev)
+{
+        struct resource *res;
+        struct nuc900_rtc *nuc900_rtc;
+        int err = 0;
+        nuc900_rtc = kzalloc(sizeof(struct nuc900_rtc), GFP_KERNEL);
+        if (!nuc900_rtc) {
+                dev_err(&pdev->dev, "kzalloc nuc900_rtc failed\n");
+                return -ENOMEM;
+        }
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res) {
+                dev_err(&pdev->dev, "platform_get_resource failed\n");
+                err = -ENXIO;
+                goto fail1;
+        }
+        if (!request_mem_region(res->start, resource_size(res),
+                                pdev->name)) {
+                dev_err(&pdev->dev, "request_mem_region failed\n");
+                err = -EBUSY;
+                goto fail1;
+        }
+        nuc900_rtc->rtc_reg = ioremap(res->start, resource_size(res));
+        if (!nuc900_rtc->rtc_reg) {
+                dev_err(&pdev->dev, "ioremap rtc_reg failed\n");
+                err = -ENOMEM;
+                goto fail2;
+        }
+        nuc900_rtc->irq_num = platform_get_irq(pdev, 0);
+        if (request_irq(nuc900_rtc->irq_num, nuc900_rtc_interrupt,
+                                IRQF_DISABLED, "nuc900rtc", nuc900_rtc)) {
+                dev_err(&pdev->dev, "NUC900 RTC request irq failed\n");
+                err = -EBUSY;
+                goto fail3;
+        }
+        nuc900_rtc->rtcdev = rtc_device_register(pdev->name, &pdev->dev,
+                                                &nuc900_rtc_ops, THIS_MODULE);
+        if (IS_ERR(nuc900_rtc->rtcdev)) {
+                dev_err(&pdev->dev, "rtc device register faild\n");
+                err = PTR_ERR(nuc900_rtc->rtcdev);
+                goto fail4;
+        }
+        platform_set_drvdata(pdev, nuc900_rtc);
+        __raw_writel(__raw_readl(nuc900_rtc->rtc_reg + REG_RTC_TSSR) | MODE24,
+                                        nuc900_rtc->rtc_reg + REG_RTC_TSSR);
+        return 0;
+fail4:  free_irq(nuc900_rtc->irq_num, nuc900_rtc);
+fail3:  iounmap(nuc900_rtc->rtc_reg);
+fail2:  release_mem_region(res->start, resource_size(res));
+fail1:  kfree(nuc900_rtc);
+        return err;
+}
+static int __devexit nuc900_rtc_remove(struct platform_device *pdev)
+{
+        struct nuc900_rtc *nuc900_rtc = platform_get_drvdata(pdev);
+        struct resource *res;
+        rtc_device_unregister(nuc900_rtc->rtcdev);
+        free_irq(nuc900_rtc->irq_num, nuc900_rtc);
+        iounmap(nuc900_rtc->rtc_reg);
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        release_mem_region(res->start, resource_size(res));
+        kfree(nuc900_rtc);
+        platform_set_drvdata(pdev, NULL);
+        return 0;
+}
+static struct platform_driver nuc900_rtc_driver = {
+        .remove         = __devexit_p(nuc900_rtc_remove),
+        .driver         = {
+                .name   = "nuc900-rtc",
+                .owner  = THIS_MODULE,
+        },
+};
+static int __init nuc900_rtc_init(void)
+{
+        return platform_driver_probe(&nuc900_rtc_driver, nuc900_rtc_probe);
+}
+static void __exit nuc900_rtc_exit(void)
+{
+        platform_driver_unregister(&nuc900_rtc_driver);
+}
+module_init(nuc900_rtc_init);
+module_exit(nuc900_rtc_exit);
+MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
+MODULE_DESCRIPTION("nuc910/nuc920 RTC driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:nuc900-rtc");
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index 0587d53987fe..64d9727b7229 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -87,9 +87,10 @@
 #define OMAP_RTC_INTERRUPTS_IT_ALARM    (1<<3)
 #define OMAP_RTC_INTERRUPTS_IT_TIMER    (1<<2)
+static void __iomem     *rtc_base;
-#define rtc_read(addr)          omap_readb(OMAP_RTC_BASE + (addr))
+#define rtc_read(addr)          __raw_readb(rtc_base + (addr))
-#define rtc_write(val, addr)    omap_writeb(val, OMAP_RTC_BASE + (addr))
+#define rtc_write(val, addr)    __raw_writeb(val, rtc_base + (addr))
 /* we rely on the rtc framework to handle locking (rtc->ops_lock),
@@ -330,32 +331,31 @@ static int __init omap_rtc_probe(struct platform_device *pdev)
                return -ENOENT;
        }
-        /* NOTE:  using static mapping for RTC registers */
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        if (res && res->start != OMAP_RTC_BASE) {
+        if (!res) {
-                pr_debug("%s: RTC registers at %08x, expected %08x\n",
+                pr_debug("%s: RTC resource data missing\n", pdev->name);
-                        pdev->name, (unsigned) res->start, OMAP_RTC_BASE);
                return -ENOENT;
        }
-        if (res)
+        mem = request_mem_region(res->start, resource_size(res), pdev->name);
-                mem = request_mem_region(res->start,
-                                res->end - res->start + 1,
-                                pdev->name);
-        else
-                mem = NULL;
        if (!mem) {
                pr_debug("%s: RTC registers at %08x are not free\n",
-                        pdev->name, OMAP_RTC_BASE);
+                        pdev->name, res->start);
                return -EBUSY;
        }
+        rtc_base = ioremap(res->start, resource_size(res));
+        if (!rtc_base) {
+                pr_debug("%s: RTC registers can't be mapped\n", pdev->name);
+                goto fail;
+        }
        rtc = rtc_device_register(pdev->name, &pdev->dev,
                        &omap_rtc_ops, THIS_MODULE);
        if (IS_ERR(rtc)) {
                pr_debug("%s: can't register RTC device, err %ld\n",
                        pdev->name, PTR_ERR(rtc));
-                goto fail;
+                goto fail0;
        }
        platform_set_drvdata(pdev, rtc);
        dev_set_drvdata(&rtc->dev, mem);
@@ -380,13 +380,14 @@ static int __init omap_rtc_probe(struct platform_device *pdev)
                        dev_name(&rtc->dev), rtc)) {
                pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
                        pdev->name, omap_rtc_timer);
-                goto fail0;
+                goto fail1;
        }
-        if (request_irq(omap_rtc_alarm, rtc_irq, IRQF_DISABLED,
+        if ((omap_rtc_timer != omap_rtc_alarm) &&
-                        dev_name(&rtc->dev), rtc)) {
+                (request_irq(omap_rtc_alarm, rtc_irq, IRQF_DISABLED,
+                        dev_name(&rtc->dev), rtc))) {
                pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
                        pdev->name, omap_rtc_alarm);
-                goto fail1;
+                goto fail2;
        }
        /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
@@ -419,10 +420,12 @@ static int __init omap_rtc_probe(struct platform_device *pdev)
        return 0;
-fail1:
+fail2:
        free_irq(omap_rtc_timer, NULL);
-fail0:
+fail1:
        rtc_device_unregister(rtc);
+fail0:
+        iounmap(rtc_base);
 fail:
        release_resource(mem);
        return -EIO;
@@ -438,7 +441,9 @@ static int __exit omap_rtc_remove(struct platform_device *pdev)
        rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
        free_irq(omap_rtc_timer, rtc);
-        free_irq(omap_rtc_alarm, rtc);
+        if (omap_rtc_timer != omap_rtc_alarm)
+                free_irq(omap_rtc_alarm, rtc);
        release_resource(dev_get_drvdata(&rtc->dev));
        rtc_device_unregister(rtc);
diff --git a/drivers/rtc/rtc-pcf50633.c b/drivers/rtc/rtc-pcf50633.c
index 9b74e9c9151c..854c3cb365a1 100644
--- a/drivers/rtc/rtc-pcf50633.c
+++ b/drivers/rtc/rtc-pcf50633.c
@@ -58,6 +58,7 @@ struct pcf50633_time {
 struct pcf50633_rtc {
        int alarm_enabled;
        int second_enabled;
+        int alarm_pending;
        struct pcf50633 *pcf;
        struct rtc_device *rtc_dev;
@@ -209,6 +210,7 @@ static int pcf50633_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
        rtc = dev_get_drvdata(dev);
        alrm->enabled = rtc->alarm_enabled;
+        alrm->pending = rtc->alarm_pending;
        ret = pcf50633_read_block(rtc->pcf, PCF50633_REG_RTCSCA,
                                PCF50633_TI_EXTENT, &pcf_tm.time[0]);
@@ -244,6 +246,8 @@ static int pcf50633_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
        /* Returns 0 on success */
        ret = pcf50633_write_block(rtc->pcf, PCF50633_REG_RTCSCA,
                                PCF50633_TI_EXTENT, &pcf_tm.time[0]);
+        if (!alrm->enabled)
+                rtc->alarm_pending = 0;
        if (!alarm_masked || alrm->enabled)
                pcf50633_irq_unmask(rtc->pcf, PCF50633_IRQ_ALARM);
@@ -268,6 +272,7 @@ static void pcf50633_rtc_irq(int irq, void *data)
        switch (irq) {
        case PCF50633_IRQ_ALARM:
                rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
+                rtc->alarm_pending = 1;
                break;
        case PCF50633_IRQ_SECOND:
                rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
diff --git a/drivers/rtc/rtc-pcf8563.c b/drivers/rtc/rtc-pcf8563.c
index b725913ccbe8..65f346b2fbae 100644
--- a/drivers/rtc/rtc-pcf8563.c
+++ b/drivers/rtc/rtc-pcf8563.c
@@ -212,6 +212,8 @@ static int pcf8563_probe(struct i2c_client *client,
        dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
+        i2c_set_clientdata(client, pcf8563);
        pcf8563->rtc = rtc_device_register(pcf8563_driver.driver.name,
                                &client->dev, &pcf8563_rtc_ops, THIS_MODULE);
@@ -220,8 +222,6 @@ static int pcf8563_probe(struct i2c_client *client,
                goto exit_kfree;
        }
-        i2c_set_clientdata(client, pcf8563);
        return 0;
 exit_kfree:
diff --git a/drivers/rtc/rtc-pcf8583.c b/drivers/rtc/rtc-pcf8583.c
index 7d33cda3f8f6..2d201afead3b 100644
--- a/drivers/rtc/rtc-pcf8583.c
+++ b/drivers/rtc/rtc-pcf8583.c
@@ -277,6 +277,8 @@ static int pcf8583_probe(struct i2c_client *client,
        if (!pcf8583)
                return -ENOMEM;
+        i2c_set_clientdata(client, pcf8583);
        pcf8583->rtc = rtc_device_register(pcf8583_driver.driver.name,
                        &client->dev, &pcf8583_rtc_ops, THIS_MODULE);
@@ -285,7 +287,6 @@ static int pcf8583_probe(struct i2c_client *client,
                goto exit_kfree;
        }
-        i2c_set_clientdata(client, pcf8583);
        return 0;
 exit_kfree:
diff --git a/drivers/rtc/rtc-pl031.c b/drivers/rtc/rtc-pl031.c
index f41873f98f66..0264b117893b 100644
--- a/drivers/rtc/rtc-pl031.c
+++ b/drivers/rtc/rtc-pl031.c
@@ -51,10 +51,10 @@ static int pl031_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
        switch (cmd) {
        case RTC_AIE_OFF:
-                __raw_writel(1, ldata->base + RTC_MIS);
+                writel(1, ldata->base + RTC_MIS);
                return 0;
        case RTC_AIE_ON:
-                __raw_writel(0, ldata->base + RTC_MIS);
+                writel(0, ldata->base + RTC_MIS);
                return 0;
        }
@@ -65,7 +65,7 @@ static int pl031_read_time(struct device *dev, struct rtc_time *tm)
 {
        struct pl031_local *ldata = dev_get_drvdata(dev);
-        rtc_time_to_tm(__raw_readl(ldata->base + RTC_DR), tm);
+        rtc_time_to_tm(readl(ldata->base + RTC_DR), tm);
        return 0;
 }
@@ -76,7 +76,7 @@ static int pl031_set_time(struct device *dev, struct rtc_time *tm)
        struct pl031_local *ldata = dev_get_drvdata(dev);
        rtc_tm_to_time(tm, &time);
-        __raw_writel(time, ldata->base + RTC_LR);
+        writel(time, ldata->base + RTC_LR);
        return 0;
 }
@@ -85,9 +85,9 @@ static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
 {
        struct pl031_local *ldata = dev_get_drvdata(dev);
-        rtc_time_to_tm(__raw_readl(ldata->base + RTC_MR), &alarm->time);
+        rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
-        alarm->pending = __raw_readl(ldata->base + RTC_RIS);
+        alarm->pending = readl(ldata->base + RTC_RIS);
-        alarm->enabled = __raw_readl(ldata->base + RTC_IMSC);
+        alarm->enabled = readl(ldata->base + RTC_IMSC);
        return 0;
 }
@@ -99,8 +99,8 @@ static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
        rtc_tm_to_time(&alarm->time, &time);
-        __raw_writel(time, ldata->base + RTC_MR);
+        writel(time, ldata->base + RTC_MR);
-        __raw_writel(!alarm->enabled, ldata->base + RTC_MIS);
+        writel(!alarm->enabled, ldata->base + RTC_MIS);
        return 0;
 }
@@ -180,8 +180,9 @@ err_req:
 static struct amba_id pl031_ids[] __initdata = {
        {
-                 .id = 0x00041031,
+                .id = 0x00041031,
-                .mask = 0x000fffff, },
+                .mask = 0x000fffff,
+        },
        {0, 0},
 };
diff --git a/drivers/rtc/rtc-stk17ta8.c b/drivers/rtc/rtc-stk17ta8.c
index d491eb265c38..67700831b5c9 100644
--- a/drivers/rtc/rtc-stk17ta8.c
+++ b/drivers/rtc/rtc-stk17ta8.c
@@ -62,7 +62,6 @@
 struct rtc_plat_data {
        struct rtc_device *rtc;
        void __iomem *ioaddr;
-        unsigned long baseaddr;
        unsigned long last_jiffies;
        int irq;
        unsigned int irqen;
@@ -70,6 +69,7 @@ struct rtc_plat_data {
        int alrm_min;
        int alrm_hour;
        int alrm_mday;
+        spinlock_t lock;
 };
 static int stk17ta8_rtc_set_time(struct device *dev, struct rtc_time *tm)
@@ -142,7 +142,7 @@ static void stk17ta8_rtc_update_alarm(struct rtc_plat_data *pdata)
        unsigned long irqflags;
        u8 flags;
-        spin_lock_irqsave(&pdata->rtc->irq_lock, irqflags);
+        spin_lock_irqsave(&pdata->lock, irqflags);
        flags = readb(ioaddr + RTC_FLAGS);
        writeb(flags | RTC_WRITE, ioaddr + RTC_FLAGS);
@@ -162,7 +162,7 @@ static void stk17ta8_rtc_update_alarm(struct rtc_plat_data *pdata)
        writeb(pdata->irqen ? RTC_INTS_AIE : 0, ioaddr + RTC_INTERRUPTS);
        readb(ioaddr + RTC_FLAGS);      /* clear interrupts */
        writeb(flags & ~RTC_WRITE, ioaddr + RTC_FLAGS);
-        spin_unlock_irqrestore(&pdata->rtc->irq_lock, irqflags);
+        spin_unlock_irqrestore(&pdata->lock, irqflags);
 }
 static int stk17ta8_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
@@ -202,56 +202,53 @@ static irqreturn_t stk17ta8_rtc_interrupt(int irq, void *dev_id)
        struct platform_device *pdev = dev_id;
        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
        void __iomem *ioaddr = pdata->ioaddr;
-        unsigned long events = RTC_IRQF;
+        unsigned long events = 0;
+        spin_lock(&pdata->lock);
        /* read and clear interrupt */
-        if (!(readb(ioaddr + RTC_FLAGS) & RTC_FLAGS_AF))
+        if (readb(ioaddr + RTC_FLAGS) & RTC_FLAGS_AF) {
-                return IRQ_NONE;
+                events = RTC_IRQF;
-        if (readb(ioaddr + RTC_SECONDS_ALARM) & 0x80)
+                if (readb(ioaddr + RTC_SECONDS_ALARM) & 0x80)
-                events |= RTC_UF;
+                        events |= RTC_UF;
-        else
+                else
-                events |= RTC_AF;
+                        events |= RTC_AF;
-        rtc_update_irq(pdata->rtc, 1, events);
+                if (likely(pdata->rtc))
-        return IRQ_HANDLED;
+                        rtc_update_irq(pdata->rtc, 1, events);
+        }
+        spin_unlock(&pdata->lock);
+        return events ? IRQ_HANDLED : IRQ_NONE;
 }
-static int stk17ta8_rtc_ioctl(struct device *dev, unsigned int cmd,
+static int stk17ta8_rtc_alarm_irq_enable(struct device *dev,
-                            unsigned long arg)
+        unsigned int enabled)
 {
        struct platform_device *pdev = to_platform_device(dev);
        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
        if (pdata->irq <= 0)
-                return -ENOIOCTLCMD; /* fall back into rtc-dev's emulation */
+                return -EINVAL;
-        switch (cmd) {
+        if (enabled)
-        case RTC_AIE_OFF:
-                pdata->irqen &= ~RTC_AF;
-                stk17ta8_rtc_update_alarm(pdata);
-                break;
-        case RTC_AIE_ON:
                pdata->irqen |= RTC_AF;
-                stk17ta8_rtc_update_alarm(pdata);
+        else
-                break;
+                pdata->irqen &= ~RTC_AF;
-        default:
+        stk17ta8_rtc_update_alarm(pdata);
-                return -ENOIOCTLCMD;
-        }
        return 0;
 }
 static const struct rtc_class_ops stk17ta8_rtc_ops = {
-        .read_time      = stk17ta8_rtc_read_time,
+        .read_time              = stk17ta8_rtc_read_time,
-        .set_time       = stk17ta8_rtc_set_time,
+        .set_time               = stk17ta8_rtc_set_time,
-        .read_alarm     = stk17ta8_rtc_read_alarm,
+        .read_alarm             = stk17ta8_rtc_read_alarm,
-        .set_alarm      = stk17ta8_rtc_set_alarm,
+        .set_alarm              = stk17ta8_rtc_set_alarm,
-        .ioctl          = stk17ta8_rtc_ioctl,
+        .alarm_irq_enable       = stk17ta8_rtc_alarm_irq_enable,
 };
 static ssize_t stk17ta8_nvram_read(struct kobject *kobj,
                                 struct bin_attribute *attr, char *buf,
                                 loff_t pos, size_t size)
 {
-        struct platform_device *pdev =
+        struct device *dev = container_of(kobj, struct device, kobj);
-                to_platform_device(container_of(kobj, struct device, kobj));
+        struct platform_device *pdev = to_platform_device(dev);
        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
        void __iomem *ioaddr = pdata->ioaddr;
        ssize_t count;
@@ -265,8 +262,8 @@ static ssize_t stk17ta8_nvram_write(struct kobject *kobj,
                                  struct bin_attribute *attr, char *buf,
                                  loff_t pos, size_t size)
 {
-        struct platform_device *pdev =
+        struct device *dev = container_of(kobj, struct device, kobj);
-                to_platform_device(container_of(kobj, struct device, kobj));
+        struct platform_device *pdev = to_platform_device(dev);
        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
        void __iomem *ioaddr = pdata->ioaddr;
        ssize_t count;
@@ -288,31 +285,26 @@ static struct bin_attribute stk17ta8_nvram_attr = {
 static int __devinit stk17ta8_rtc_probe(struct platform_device *pdev)
 {
-        struct rtc_device *rtc;
        struct resource *res;
        unsigned int cal;
        unsigned int flags;
        struct rtc_plat_data *pdata;
-        void __iomem *ioaddr = NULL;
+        void __iomem *ioaddr;
        int ret = 0;
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        if (!res)
                return -ENODEV;
-        pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
+        pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
        if (!pdata)
                return -ENOMEM;
-        if (!request_mem_region(res->start, RTC_REG_SIZE, pdev->name)) {
+        if (!devm_request_mem_region(&pdev->dev, res->start, RTC_REG_SIZE,
-                ret = -EBUSY;
+                        pdev->name))
-                goto out;
+                return -EBUSY;
-        }
+        ioaddr = devm_ioremap(&pdev->dev, res->start, RTC_REG_SIZE);
-        pdata->baseaddr = res->start;
+        if (!ioaddr)
-        ioaddr = ioremap(pdata->baseaddr, RTC_REG_SIZE);
+                return -ENOMEM;
-        if (!ioaddr) {
-                ret = -ENOMEM;
-                goto out;
-        }
        pdata->ioaddr = ioaddr;
        pdata->irq = platform_get_irq(pdev, 0);
@@ -328,9 +320,13 @@ static int __devinit stk17ta8_rtc_probe(struct platform_device *pdev)
        if (readb(ioaddr + RTC_FLAGS) & RTC_FLAGS_PF)
                dev_warn(&pdev->dev, "voltage-low detected.\n");
+        spin_lock_init(&pdata->lock);
+        pdata->last_jiffies = jiffies;
+        platform_set_drvdata(pdev, pdata);
        if (pdata->irq > 0) {
                writeb(0, ioaddr + RTC_INTERRUPTS);
-                if (request_irq(pdata->irq, stk17ta8_rtc_interrupt,
+                if (devm_request_irq(&pdev->dev, pdata->irq,
+                                stk17ta8_rtc_interrupt,
                                IRQF_DISABLED | IRQF_SHARED,
                                pdev->name, pdev) < 0) {
                        dev_warn(&pdev->dev, "interrupt not available.\n");
@@ -338,29 +334,14 @@ static int __devinit stk17ta8_rtc_probe(struct platform_device *pdev)
                }
        }
-        rtc = rtc_device_register(pdev->name, &pdev->dev,
+        pdata->rtc = rtc_device_register(pdev->name, &pdev->dev,
                                  &stk17ta8_rtc_ops, THIS_MODULE);
-        if (IS_ERR(rtc)) {
+        if (IS_ERR(pdata->rtc))
-                ret = PTR_ERR(rtc);
+                return PTR_ERR(pdata->rtc);
-                goto out;
-        }
-        pdata->rtc = rtc;
-        pdata->last_jiffies = jiffies;
-        platform_set_drvdata(pdev, pdata);
        ret = sysfs_create_bin_file(&pdev->dev.kobj, &stk17ta8_nvram_attr);
        if (ret)
-                goto out;
-        return 0;
- out:
-        if (pdata->rtc)
                rtc_device_unregister(pdata->rtc);
-        if (pdata->irq > 0)
-                free_irq(pdata->irq, pdev);
-        if (ioaddr)
-                iounmap(ioaddr);
-        if (pdata->baseaddr)
-                release_mem_region(pdata->baseaddr, RTC_REG_SIZE);
-        kfree(pdata);
        return ret;
 }
@@ -370,13 +351,8 @@ static int __devexit stk17ta8_rtc_remove(struct platform_device *pdev)
        sysfs_remove_bin_file(&pdev->dev.kobj, &stk17ta8_nvram_attr);
        rtc_device_unregister(pdata->rtc);
-        if (pdata->irq > 0) {
+        if (pdata->irq > 0)
                writeb(0, pdata->ioaddr + RTC_INTERRUPTS);
-                free_irq(pdata->irq, pdev);
-        }
-        iounmap(pdata->ioaddr);
-        release_mem_region(pdata->baseaddr, RTC_REG_SIZE);
-        kfree(pdata);
        return 0;
 }
diff --git a/drivers/rtc/rtc-tx4939.c b/drivers/rtc/rtc-tx4939.c
index 4a6ed1104fbb..9ee81d8aa7c0 100644
--- a/drivers/rtc/rtc-tx4939.c
+++ b/drivers/rtc/rtc-tx4939.c
@@ -17,6 +17,7 @@
 struct tx4939rtc_plat_data {
        struct rtc_device *rtc;
        struct tx4939_rtc_reg __iomem *rtcreg;
+        spinlock_t lock;
 };
 static struct tx4939rtc_plat_data *get_tx4939rtc_plat_data(struct device *dev)
@@ -52,14 +53,14 @@ static int tx4939_rtc_set_mmss(struct device *dev, unsigned long secs)
        buf[3] = secs >> 8;
        buf[4] = secs >> 16;
        buf[5] = secs >> 24;
-        spin_lock_irq(&pdata->rtc->irq_lock);
+        spin_lock_irq(&pdata->lock);
        __raw_writel(0, &rtcreg->adr);
        for (i = 0; i < 6; i++)
                __raw_writel(buf[i], &rtcreg->dat);
        ret = tx4939_rtc_cmd(rtcreg,
                             TX4939_RTCCTL_COMMAND_SETTIME |
                             (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_ALME));
-        spin_unlock_irq(&pdata->rtc->irq_lock);
+        spin_unlock_irq(&pdata->lock);
        return ret;
 }
@@ -71,18 +72,18 @@ static int tx4939_rtc_read_time(struct device *dev, struct rtc_time *tm)
        unsigned long sec;
        unsigned char buf[6];
-        spin_lock_irq(&pdata->rtc->irq_lock);
+        spin_lock_irq(&pdata->lock);
        ret = tx4939_rtc_cmd(rtcreg,
                             TX4939_RTCCTL_COMMAND_GETTIME |
                             (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_ALME));
        if (ret) {
-                spin_unlock_irq(&pdata->rtc->irq_lock);
+                spin_unlock_irq(&pdata->lock);
                return ret;
        }
        __raw_writel(2, &rtcreg->adr);
        for (i = 2; i < 6; i++)
                buf[i] = __raw_readl(&rtcreg->dat);
-        spin_unlock_irq(&pdata->rtc->irq_lock);
+        spin_unlock_irq(&pdata->lock);
        sec = (buf[5] << 24) | (buf[4] << 16) | (buf[3] << 8) | buf[2];
        rtc_time_to_tm(sec, tm);
        return rtc_valid_tm(tm);
@@ -110,13 +111,13 @@ static int tx4939_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
        buf[3] = sec >> 8;
        buf[4] = sec >> 16;
        buf[5] = sec >> 24;
-        spin_lock_irq(&pdata->rtc->irq_lock);
+        spin_lock_irq(&pdata->lock);
        __raw_writel(0, &rtcreg->adr);
        for (i = 0; i < 6; i++)
                __raw_writel(buf[i], &rtcreg->dat);
        ret = tx4939_rtc_cmd(rtcreg, TX4939_RTCCTL_COMMAND_SETALARM |
                             (alrm->enabled ? TX4939_RTCCTL_ALME : 0));
-        spin_unlock_irq(&pdata->rtc->irq_lock);
+        spin_unlock_irq(&pdata->lock);
        return ret;
 }
@@ -129,12 +130,12 @@ static int tx4939_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
        unsigned char buf[6];
        u32 ctl;
-        spin_lock_irq(&pdata->rtc->irq_lock);
+        spin_lock_irq(&pdata->lock);
        ret = tx4939_rtc_cmd(rtcreg,
                             TX4939_RTCCTL_COMMAND_GETALARM |
                             (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_ALME));
        if (ret) {
-                spin_unlock_irq(&pdata->rtc->irq_lock);
+                spin_unlock_irq(&pdata->lock);
                return ret;
        }
        __raw_writel(2, &rtcreg->adr);
@@ -143,7 +144,7 @@ static int tx4939_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
        ctl = __raw_readl(&rtcreg->ctl);
        alrm->enabled = (ctl & TX4939_RTCCTL_ALME) ? 1 : 0;
        alrm->pending = (ctl & TX4939_RTCCTL_ALMD) ? 1 : 0;
-        spin_unlock_irq(&pdata->rtc->irq_lock);
+        spin_unlock_irq(&pdata->lock);
        sec = (buf[5] << 24) | (buf[4] << 16) | (buf[3] << 8) | buf[2];
        rtc_time_to_tm(sec, &alrm->time);
        return rtc_valid_tm(&alrm->time);
@@ -153,11 +154,11 @@ static int tx4939_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 {
        struct tx4939rtc_plat_data *pdata = get_tx4939rtc_plat_data(dev);
-        spin_lock_irq(&pdata->rtc->irq_lock);
+        spin_lock_irq(&pdata->lock);
        tx4939_rtc_cmd(pdata->rtcreg,
                       TX4939_RTCCTL_COMMAND_NOP |
                       (enabled ? TX4939_RTCCTL_ALME : 0));
-        spin_unlock_irq(&pdata->rtc->irq_lock);
+        spin_unlock_irq(&pdata->lock);
        return 0;
 }
@@ -167,13 +168,14 @@ static irqreturn_t tx4939_rtc_interrupt(int irq, void *dev_id)
        struct tx4939_rtc_reg __iomem *rtcreg = pdata->rtcreg;
        unsigned long events = RTC_IRQF;
-        spin_lock(&pdata->rtc->irq_lock);
+        spin_lock(&pdata->lock);
        if (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_ALMD) {
                events |= RTC_AF;
                tx4939_rtc_cmd(rtcreg, TX4939_RTCCTL_COMMAND_NOP);
        }
-        spin_unlock(&pdata->rtc->irq_lock);
+        spin_unlock(&pdata->lock);
-        rtc_update_irq(pdata->rtc, 1, events);
+        if (likely(pdata->rtc))
+                rtc_update_irq(pdata->rtc, 1, events);
        return IRQ_HANDLED;
 }
@@ -194,13 +196,13 @@ static ssize_t tx4939_rtc_nvram_read(struct kobject *kobj,
        struct tx4939_rtc_reg __iomem *rtcreg = pdata->rtcreg;
        ssize_t count;
-        spin_lock_irq(&pdata->rtc->irq_lock);
+        spin_lock_irq(&pdata->lock);
        for (count = 0; size > 0 && pos < TX4939_RTC_REG_RAMSIZE;
             count++, size--) {
                __raw_writel(pos++, &rtcreg->adr);
                *buf++ = __raw_readl(&rtcreg->dat);
        }
-        spin_unlock_irq(&pdata->rtc->irq_lock);
+        spin_unlock_irq(&pdata->lock);
        return count;
 }
@@ -213,13 +215,13 @@ static ssize_t tx4939_rtc_nvram_write(struct kobject *kobj,
        struct tx4939_rtc_reg __iomem *rtcreg = pdata->rtcreg;
        ssize_t count;
-        spin_lock_irq(&pdata->rtc->irq_lock);
+        spin_lock_irq(&pdata->lock);
        for (count = 0; size > 0 && pos < TX4939_RTC_REG_RAMSIZE;
             count++, size--) {
                __raw_writel(pos++, &rtcreg->adr);
                __raw_writel(*buf++, &rtcreg->dat);
        }
-        spin_unlock_irq(&pdata->rtc->irq_lock);
+        spin_unlock_irq(&pdata->lock);
        return count;
 }
@@ -259,6 +261,7 @@ static int __init tx4939_rtc_probe(struct platform_device *pdev)
        if (!pdata->rtcreg)
                return -EBUSY;
+        spin_lock_init(&pdata->lock);
        tx4939_rtc_cmd(pdata->rtcreg, TX4939_RTCCTL_COMMAND_NOP);
        if (devm_request_irq(&pdev->dev, irq, tx4939_rtc_interrupt,
                             IRQF_DISABLED, pdev->name, &pdev->dev) < 0)
@@ -277,14 +280,12 @@ static int __init tx4939_rtc_probe(struct platform_device *pdev)
 static int __exit tx4939_rtc_remove(struct platform_device *pdev)
 {
        struct tx4939rtc_plat_data *pdata = platform_get_drvdata(pdev);
-        struct rtc_device *rtc = pdata->rtc;
-        spin_lock_irq(&rtc->irq_lock);
-        tx4939_rtc_cmd(pdata->rtcreg, TX4939_RTCCTL_COMMAND_NOP);
-        spin_unlock_irq(&rtc->irq_lock);
        sysfs_remove_bin_file(&pdev->dev.kobj, &tx4939_rtc_nvram_attr);
-        rtc_device_unregister(rtc);
+        rtc_device_unregister(pdata->rtc);
-        platform_set_drvdata(pdev, NULL);
+        spin_lock_irq(&pdata->lock);
+        tx4939_rtc_cmd(pdata->rtcreg, TX4939_RTCCTL_COMMAND_NOP);
+        spin_unlock_irq(&pdata->lock);
        return 0;
 }
diff --git a/drivers/rtc/rtc-v3020.c b/drivers/rtc/rtc-v3020.c
index ad741afd47d8..bed4cab07043 100644
--- a/drivers/rtc/rtc-v3020.c
+++ b/drivers/rtc/rtc-v3020.c
@@ -304,7 +304,6 @@ static int rtc_probe(struct platform_device *pdev)
 {
        struct v3020_platform_data *pdata = pdev->dev.platform_data;
        struct v3020 *chip;
-        struct rtc_device *rtc;
        int retval = -EBUSY;
        int i;
        int temp;
@@ -353,13 +352,12 @@ static int rtc_probe(struct platform_device *pdev)
        platform_set_drvdata(pdev, chip);
-        rtc = rtc_device_register("v3020",
+        chip->rtc = rtc_device_register("v3020",
                                &pdev->dev, &v3020_rtc_ops, THIS_MODULE);
-        if (IS_ERR(rtc)) {
+        if (IS_ERR(chip->rtc)) {
-                retval = PTR_ERR(rtc);
+                retval = PTR_ERR(chip->rtc);
                goto err_io;
        }
-        chip->rtc = rtc;
        return 0;
diff --git a/drivers/rtc/rtc-vr41xx.c b/drivers/rtc/rtc-vr41xx.c
index fadddac1e5a4..c3244244e8cf 100644
--- a/drivers/rtc/rtc-vr41xx.c
+++ b/drivers/rtc/rtc-vr41xx.c
@@ -327,7 +327,7 @@ static int __devinit rtc_probe(struct platform_device *pdev)
        if (!res)
                return -EBUSY;
-        rtc1_base = ioremap(res->start, res->end - res->start + 1);
+        rtc1_base = ioremap(res->start, resource_size(res));
        if (!rtc1_base)
                return -EBUSY;
@@ -337,7 +337,7 @@ static int __devinit rtc_probe(struct platform_device *pdev)
                goto err_rtc1_iounmap;
        }
-        rtc2_base = ioremap(res->start, res->end - res->start + 1);
+        rtc2_base = ioremap(res->start, resource_size(res));
        if (!rtc2_base) {
                retval = -EBUSY;
                goto err_rtc1_iounmap;
diff --git a/drivers/rtc/rtc-wm8350.c b/drivers/rtc/rtc-wm8350.c
index f16486635a8e..f1e440521c54 100644
--- a/drivers/rtc/rtc-wm8350.c
+++ b/drivers/rtc/rtc-wm8350.c
@@ -354,8 +354,9 @@ static const struct rtc_class_ops wm8350_rtc_ops = {
 };
 #ifdef CONFIG_PM
-static int wm8350_rtc_suspend(struct platform_device *pdev, pm_message_t state)
+static int wm8350_rtc_suspend(struct device *dev)
 {
+        struct platform_device *pdev = to_platform_device(dev);
        struct wm8350 *wm8350 = dev_get_drvdata(&pdev->dev);
        int ret = 0;
        u16 reg;
@@ -373,8 +374,9 @@ static int wm8350_rtc_suspend(struct platform_device *pdev, pm_message_t state)
        return ret;
 }
-static int wm8350_rtc_resume(struct platform_device *pdev)
+static int wm8350_rtc_resume(struct device *dev)
 {
+        struct platform_device *pdev = to_platform_device(dev);
        struct wm8350 *wm8350 = dev_get_drvdata(&pdev->dev);
        int ret;
@@ -484,13 +486,17 @@ static int __devexit wm8350_rtc_remove(struct platform_device *pdev)
        return 0;
 }
+static struct dev_pm_ops wm8350_rtc_pm_ops = {
+        .suspend = wm8350_rtc_suspend,
+        .resume = wm8350_rtc_resume,
+};
 static struct platform_driver wm8350_rtc_driver = {
        .probe = wm8350_rtc_probe,
        .remove = __devexit_p(wm8350_rtc_remove),
-        .suspend = wm8350_rtc_suspend,
-        .resume = wm8350_rtc_resume,
        .driver = {
                .name = "wm8350-rtc",
+                .pm = &wm8350_rtc_pm_ops,
        },
 };
diff --git a/drivers/rtc/rtc-x1205.c b/drivers/rtc/rtc-x1205.c
index 6583c1a8b070..9aae49139a0a 100644
--- a/drivers/rtc/rtc-x1205.c
+++ b/drivers/rtc/rtc-x1205.c
@@ -155,11 +155,11 @@ static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
 }
 static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
-                        int datetoo, u8 reg_base, unsigned char alm_enable)
+                        u8 reg_base, unsigned char alm_enable)
 {
-        int i, xfer, nbytes;
+        int i, xfer;
-        unsigned char buf[8];
        unsigned char rdata[10] = { 0, reg_base };
+        unsigned char *buf = rdata + 2;
        static const unsigned char wel[3] = { 0, X1205_REG_SR,
                                                X1205_SR_WEL };
@@ -170,9 +170,9 @@ static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
        static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
        dev_dbg(&client->dev,
-                "%s: secs=%d, mins=%d, hours=%d\n",
+                "%s: sec=%d min=%d hour=%d mday=%d mon=%d year=%d wday=%d\n",
-                __func__,
+                __func__, tm->tm_sec, tm->tm_min, tm->tm_hour, tm->tm_mday,
-                tm->tm_sec, tm->tm_min, tm->tm_hour);
+                tm->tm_mon, tm->tm_year, tm->tm_wday);
        buf[CCR_SEC] = bin2bcd(tm->tm_sec);
        buf[CCR_MIN] = bin2bcd(tm->tm_min);
@@ -180,23 +180,15 @@ static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
        /* set hour and 24hr bit */
        buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL;
-        /* should we also set the date? */
+        buf[CCR_MDAY] = bin2bcd(tm->tm_mday);
-        if (datetoo) {
-                dev_dbg(&client->dev,
-                        "%s: mday=%d, mon=%d, year=%d, wday=%d\n",
-                        __func__,
-                        tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
-                buf[CCR_MDAY] = bin2bcd(tm->tm_mday);
+        /* month, 1 - 12 */
+        buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1);
-                /* month, 1 - 12 */
+        /* year, since the rtc epoch*/
-                buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1);
+        buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100);
+        buf[CCR_WDAY] = tm->tm_wday & 0x07;
-                /* year, since the rtc epoch*/
+        buf[CCR_Y2K] = bin2bcd((tm->tm_year + 1900) / 100);
-                buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100);
-                buf[CCR_WDAY] = tm->tm_wday & 0x07;
-                buf[CCR_Y2K] = bin2bcd((tm->tm_year + 1900) / 100);
-        }
        /* If writing alarm registers, set compare bits on registers 0-4 */
        if (reg_base < X1205_CCR_BASE)
@@ -214,17 +206,8 @@ static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
                return -EIO;
        }
+        xfer = i2c_master_send(client, rdata, sizeof(rdata));
-        /* write register's data */
+        if (xfer != sizeof(rdata)) {
-        if (datetoo)
-                nbytes = 8;
-        else
-                nbytes = 3;
-        for (i = 0; i < nbytes; i++)
-                rdata[2+i] = buf[i];
-        xfer = i2c_master_send(client, rdata, nbytes+2);
-        if (xfer != nbytes+2) {
                dev_err(&client->dev,
                        "%s: result=%d addr=%02x, data=%02x\n",
                        __func__,
@@ -282,7 +265,7 @@ static int x1205_fix_osc(struct i2c_client *client)
        memset(&tm, 0, sizeof(tm));
-        err = x1205_set_datetime(client, &tm, 1, X1205_CCR_BASE, 0);
+        err = x1205_set_datetime(client, &tm, X1205_CCR_BASE, 0);
        if (err < 0)
                dev_err(&client->dev, "unable to restart the oscillator\n");
@@ -481,7 +464,7 @@ static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 {
        return x1205_set_datetime(to_i2c_client(dev),
-                &alrm->time, 1, X1205_ALM0_BASE, alrm->enabled);
+                &alrm->time, X1205_ALM0_BASE, alrm->enabled);
 }
 static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
@@ -493,7 +476,7 @@ static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
 static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
 {
        return x1205_set_datetime(to_i2c_client(dev),
-                tm, 1, X1205_CCR_BASE, 0);
+                tm, X1205_CCR_BASE, 0);
 }
 static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 7e3f4ff58cfd..68c7f6cfd728 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -1043,10 +1043,14 @@ static void __devinit sci_init_single(struct platform_device *dev,
        sci_port->port.iotype   = UPIO_MEM;
        sci_port->port.line     = index;
        sci_port->port.fifosize = 1;
-        sci_port->iclk          = p->clk ? clk_get(&dev->dev, p->clk) : NULL;
-        sci_port->dclk          = clk_get(&dev->dev, "peripheral_clk");
+        if (dev) {
-        sci_port->enable        = sci_clk_enable;
+                sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL;
-        sci_port->disable       = sci_clk_disable;
+                sci_port->dclk = clk_get(&dev->dev, "peripheral_clk");
+                sci_port->enable = sci_clk_enable;
+                sci_port->disable = sci_clk_disable;
+                sci_port->port.dev = &dev->dev;
+        }
        sci_port->break_timer.data = (unsigned long)sci_port;
        sci_port->break_timer.function = sci_break_timer;
@@ -1057,7 +1061,6 @@ static void __devinit sci_init_single(struct platform_device *dev,
        sci_port->port.irq      = p->irqs[SCIx_TXI_IRQ];
        sci_port->port.flags    = p->flags;
-        sci_port->port.dev      = &dev->dev;
        sci_port->type          = sci_port->port.type = p->type;
        memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs));
@@ -1101,7 +1104,7 @@ static void serial_console_write(struct console *co, const char *s,
                sci_port->disable(port);
 }
-static int __init serial_console_setup(struct console *co, char *options)
+static int __devinit serial_console_setup(struct console *co, char *options)
 {
        struct sci_port *sci_port;
        struct uart_port *port;
@@ -1119,9 +1122,14 @@ static int __init serial_console_setup(struct console *co, char *options)
        if (co->index >= SCI_NPORTS)
                co->index = 0;
-        sci_port = &sci_ports[co->index];
+        if (co->data) {
-        port = &sci_port->port;
+                port = co->data;
-        co->data = port;
+                sci_port = to_sci_port(port);
+        } else {
+                sci_port = &sci_ports[co->index];
+                port = &sci_port->port;
+                co->data = port;
+        }
        /*
         * Also need to check port->type, we don't actually have any
@@ -1165,6 +1173,15 @@ static int __init sci_console_init(void)
        return 0;
 }
 console_initcall(sci_console_init);
+static struct sci_port early_serial_port;
+static struct console early_serial_console = {
+        .name           = "early_ttySC",
+        .write          = serial_console_write,
+        .flags          = CON_PRINTBUFFER,
+};
+static char early_serial_buf[32];
 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
@@ -1250,6 +1267,21 @@ static int __devinit sci_probe(struct platform_device *dev)
        struct sh_sci_priv *priv;
        int i, ret = -EINVAL;
+#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
+        if (is_early_platform_device(dev)) {
+                if (dev->id == -1)
+                        return -ENOTSUPP;
+                early_serial_console.index = dev->id;
+                early_serial_console.data = &early_serial_port.port;
+                sci_init_single(NULL, &early_serial_port, dev->id, p);
+                serial_console_setup(&early_serial_console, early_serial_buf);
+                if (!strstr(early_serial_buf, "keep"))
+                        early_serial_console.flags |= CON_BOOT;
+                register_console(&early_serial_console);
+                return 0;
+        }
+#endif
        priv = kzalloc(sizeof(*priv), GFP_KERNEL);
        if (!priv)
                return -ENOMEM;
@@ -1349,6 +1381,10 @@ static void __exit sci_exit(void)
        uart_unregister_driver(&sci_uart_driver);
 }
+#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
+early_platform_init_buffer("earlyprintk", &sci_driver,
+                           early_serial_buf, ARRAY_SIZE(early_serial_buf));
+#endif
 module_init(sci_init);
 module_exit(sci_exit);
diff --git a/drivers/sh/intc.c b/drivers/sh/intc.c
index a7e5c2e9986c..d5d7f23c19a5 100644
--- a/drivers/sh/intc.c
+++ b/drivers/sh/intc.c
@@ -806,6 +806,8 @@ static int intc_suspend(struct sys_device *dev, pm_message_t state)
                if (d->state.event != PM_EVENT_FREEZE)
                        break;
                for_each_irq_desc(irq, desc) {
+                        if (desc->handle_irq == intc_redirect_irq)
+                                continue;
                        if (desc->chip != &d->chip)
                                continue;
                        if (desc->status & IRQ_DISABLED)
diff --git a/drivers/sh/pfc.c b/drivers/sh/pfc.c
index 841ed5030c8f..082604edc4c2 100644
--- a/drivers/sh/pfc.c
+++ b/drivers/sh/pfc.c
@@ -71,7 +71,7 @@ static void gpio_write_bit(struct pinmux_data_reg *dr,
        pos = dr->reg_width - (in_pos + 1);
-        pr_debug("write_bit addr = %lx, value = %ld, pos = %ld, "
+        pr_debug("write_bit addr = %lx, value = %d, pos = %ld, "
                 "r_width = %ld\n",
                 dr->reg, !!value, pos, dr->reg_width);
diff --git a/drivers/staging/cx25821/cx25821-audups11.c b/drivers/staging/cx25821/cx25821-audups11.c
index f78b8912d905..89c8fe2997fa 100644
--- a/drivers/staging/cx25821/cx25821-audups11.c
+++ b/drivers/staging/cx25821/cx25821-audups11.c
@@ -94,36 +94,20 @@ static struct videobuf_queue_ops cx25821_video_qops = {
 static int video_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct cx25821_dev *h, *dev = NULL;
+        struct cx25821_dev *dev = video_drvdata(file);
        struct cx25821_fh *fh;
-        struct list_head *list;
+        enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        enum v4l2_buf_type type = 0;
-        lock_kernel();
+        printk("open dev=%s type=%s\n", video_device_node_name(vdev),
-        list_for_each(list, &cx25821_devlist) {
+                v4l2_type_names[type]);
-                h = list_entry(list, struct cx25821_dev, devlist);
-                if (h->video_dev[SRAM_CH11]
-                    && h->video_dev[SRAM_CH11]->minor == minor) {
-                        dev = h;
-                        type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                }
-        }
-        if (NULL == dev) {
-                unlock_kernel();
-                return -ENODEV;
-        }
-        printk("open minor=%d type=%s\n", minor, v4l2_type_names[type]);
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh), GFP_KERNEL);
-        if (NULL == fh) {
+        if (NULL == fh)
-                unlock_kernel();
                return -ENOMEM;
-        }
+        lock_kernel();
        file->private_data = fh;
        fh->dev = dev;
@@ -427,7 +411,6 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
 struct video_device cx25821_video_template11 = {
        .name = "cx25821-audioupstream",
        .fops = &video_fops,
-        .minor = -1,
        .ioctl_ops = &video_ioctl_ops,
        .tvnorms = CX25821_NORMS,
        .current_norm = V4L2_STD_NTSC_M,
diff --git a/drivers/staging/cx25821/cx25821-video.c b/drivers/staging/cx25821/cx25821-video.c
index 8834bc80a5ab..c7c14c7698a7 100644
--- a/drivers/staging/cx25821/cx25821-video.c
+++ b/drivers/staging/cx25821/cx25821-video.c
@@ -184,11 +184,11 @@ struct video_device *cx25821_vdev_init(struct cx25821_dev *dev,
        if (NULL == vfd)
                return NULL;
        *vfd = *template;
-        vfd->minor = -1;
        vfd->v4l2_dev = &dev->v4l2_dev;
        vfd->release = video_device_release;
        snprintf(vfd->name, sizeof(vfd->name), "%s %s (%s)", dev->name, type,
                 cx25821_boards[dev->board].name);
+        video_set_drvdata(vfd, dev);
        return vfd;
 }
@@ -424,7 +424,7 @@ int cx25821_video_irq(struct cx25821_dev *dev, int chan_num, u32 status)
 void cx25821_videoioctl_unregister(struct cx25821_dev *dev)
 {
        if (dev->ioctl_dev) {
-                if (dev->ioctl_dev->minor != -1)
+                if (video_is_registered(dev->ioctl_dev))
                        video_unregister_device(dev->ioctl_dev);
                else
                        video_device_release(dev->ioctl_dev);
@@ -438,7 +438,7 @@ void cx25821_video_unregister(struct cx25821_dev *dev, int chan_num)
        cx_clear(PCI_INT_MSK, 1);
        if (dev->video_dev[chan_num]) {
-                if (-1 != dev->video_dev[chan_num]->minor)
+                if (video_is_registered(dev->video_dev[chan_num]))
                        video_unregister_device(dev->video_dev[chan_num]);
                else
                        video_device_release(dev->video_dev[chan_num]);
diff --git a/drivers/staging/cx25821/cx25821-video0.c b/drivers/staging/cx25821/cx25821-video0.c
index 950fac1d7003..ad7a69129118 100644
--- a/drivers/staging/cx25821/cx25821-video0.c
+++ b/drivers/staging/cx25821/cx25821-video0.c
@@ -94,37 +94,21 @@ static struct videobuf_queue_ops cx25821_video_qops = {
 static int video_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct cx25821_dev *h, *dev = NULL;
+        struct cx25821_dev *dev = video_drvdata(file);
        struct cx25821_fh *fh;
-        struct list_head *list;
+        enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        enum v4l2_buf_type type = 0;
        u32 pix_format;
-        lock_kernel();
+        printk("open dev=%s type=%s\n", video_device_node_name(vdev),
-        list_for_each(list, &cx25821_devlist) {
+                v4l2_type_names[type]);
-                h = list_entry(list, struct cx25821_dev, devlist);
-                if (h->video_dev[SRAM_CH00]
-                    && h->video_dev[SRAM_CH00]->minor == minor) {
-                        dev = h;
-                        type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                }
-        }
-        if (NULL == dev) {
-                unlock_kernel();
-                return -ENODEV;
-        }
-        printk("open minor=%d type=%s\n", minor, v4l2_type_names[type]);
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh), GFP_KERNEL);
-        if (NULL == fh) {
+        if (NULL == fh)
-                unlock_kernel();
                return -ENOMEM;
-        }
+        lock_kernel();
        file->private_data = fh;
        fh->dev = dev;
@@ -444,7 +428,6 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
 struct video_device cx25821_video_template0 = {
        .name = "cx25821-video",
        .fops = &video_fops,
-        .minor = -1,
        .ioctl_ops = &video_ioctl_ops,
        .tvnorms = CX25821_NORMS,
        .current_norm = V4L2_STD_NTSC_M,
diff --git a/drivers/staging/cx25821/cx25821-video1.c b/drivers/staging/cx25821/cx25821-video1.c
index a4dddc684adf..e3f3c4ac7908 100644
--- a/drivers/staging/cx25821/cx25821-video1.c
+++ b/drivers/staging/cx25821/cx25821-video1.c
@@ -94,37 +94,21 @@ static struct videobuf_queue_ops cx25821_video_qops = {
 static int video_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct cx25821_dev *h, *dev = NULL;
+        struct cx25821_dev *dev = video_drvdata(file);
        struct cx25821_fh *fh;
-        struct list_head *list;
+        enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        enum v4l2_buf_type type = 0;
        u32 pix_format;
-        lock_kernel();
+        printk("open dev=%s type=%s\n", video_device_node_name(vdev),
-        list_for_each(list, &cx25821_devlist) {
+                v4l2_type_names[type]);
-                h = list_entry(list, struct cx25821_dev, devlist);
-                if (h->video_dev[SRAM_CH01]
-                    && h->video_dev[SRAM_CH01]->minor == minor) {
-                        dev = h;
-                        type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                }
-        }
-        if (NULL == dev) {
-                unlock_kernel();
-                return -ENODEV;
-        }
-        printk("open minor=%d type=%s\n", minor, v4l2_type_names[type]);
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh), GFP_KERNEL);
-        if (NULL == fh) {
+        if (NULL == fh)
-                unlock_kernel();
                return -ENOMEM;
-        }
+        lock_kernel();
        file->private_data = fh;
        fh->dev = dev;
@@ -444,7 +428,6 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
 struct video_device cx25821_video_template1 = {
        .name = "cx25821-video",
        .fops = &video_fops,
-        .minor = -1,
        .ioctl_ops = &video_ioctl_ops,
        .tvnorms = CX25821_NORMS,
        .current_norm = V4L2_STD_NTSC_M,
diff --git a/drivers/staging/cx25821/cx25821-video2.c b/drivers/staging/cx25821/cx25821-video2.c
index 8e04e253f5d9..36fb855a497e 100644
--- a/drivers/staging/cx25821/cx25821-video2.c
+++ b/drivers/staging/cx25821/cx25821-video2.c
@@ -94,37 +94,22 @@ static struct videobuf_queue_ops cx25821_video_qops = {
 static int video_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct cx25821_dev *h, *dev = NULL;
+        struct cx25821_dev *dev = video_drvdata(file);
        struct cx25821_fh *fh;
-        struct list_head *list;
+        enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        enum v4l2_buf_type type = 0;
        u32 pix_format;
-        lock_kernel();
+        printk("open dev=%s type=%s\n", video_device_node_name(vdev),
-        list_for_each(list, &cx25821_devlist) {
+                v4l2_type_names[type]);
-                h = list_entry(list, struct cx25821_dev, devlist);
-                if (h->video_dev[SRAM_CH02]
-                    && h->video_dev[SRAM_CH02]->minor == minor) {
-                        dev = h;
-                        type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                }
-        }
-        if (NULL == dev) {
-                unlock_kernel();
-                return -ENODEV;
-        }
-        printk("open minor=%d type=%s\n", minor, v4l2_type_names[type]);
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh), GFP_KERNEL);
-        if (NULL == fh) {
+        if (NULL == fh)
-                unlock_kernel();
                return -ENOMEM;
-        }
+        lock_kernel();
        file->private_data = fh;
        fh->dev = dev;
        fh->type = type;
@@ -445,7 +430,6 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
 struct video_device cx25821_video_template2 = {
        .name = "cx25821-video",
        .fops = &video_fops,
-        .minor = -1,
        .ioctl_ops = &video_ioctl_ops,
        .tvnorms = CX25821_NORMS,
        .current_norm = V4L2_STD_NTSC_M,
diff --git a/drivers/staging/cx25821/cx25821-video3.c b/drivers/staging/cx25821/cx25821-video3.c
index 8801a8ead904..1e0f10abdbcd 100644
--- a/drivers/staging/cx25821/cx25821-video3.c
+++ b/drivers/staging/cx25821/cx25821-video3.c
@@ -94,37 +94,22 @@ static struct videobuf_queue_ops cx25821_video_qops = {
 static int video_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct cx25821_dev *h, *dev = NULL;
+        struct cx25821_dev *dev = video_drvdata(file);
        struct cx25821_fh *fh;
-        struct list_head *list;
+        enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        enum v4l2_buf_type type = 0;
        u32 pix_format;
-        lock_kernel();
+        printk("open dev=%s type=%s\n", video_device_node_name(vdev),
-        list_for_each(list, &cx25821_devlist) {
+                v4l2_type_names[type]);
-                h = list_entry(list, struct cx25821_dev, devlist);
-                if (h->video_dev[SRAM_CH03]
-                    && h->video_dev[SRAM_CH03]->minor == minor) {
-                        dev = h;
-                        type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                }
-        }
-        if (NULL == dev) {
-                unlock_kernel();
-                return -ENODEV;
-        }
-        printk("open minor=%d type=%s\n", minor, v4l2_type_names[type]);
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh), GFP_KERNEL);
-        if (NULL == fh) {
+        if (NULL == fh)
-                unlock_kernel();
                return -ENOMEM;
-        }
+        lock_kernel();
        file->private_data = fh;
        fh->dev = dev;
        fh->type = type;
@@ -444,7 +429,6 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
 struct video_device cx25821_video_template3 = {
        .name = "cx25821-video",
        .fops = &video_fops,
-        .minor = -1,
        .ioctl_ops = &video_ioctl_ops,
        .tvnorms = CX25821_NORMS,
        .current_norm = V4L2_STD_NTSC_M,
diff --git a/drivers/staging/cx25821/cx25821-video4.c b/drivers/staging/cx25821/cx25821-video4.c
index ab0d747138ad..0cbe7a79d8c0 100644
--- a/drivers/staging/cx25821/cx25821-video4.c
+++ b/drivers/staging/cx25821/cx25821-video4.c
@@ -94,37 +94,22 @@ static struct videobuf_queue_ops cx25821_video_qops = {
 static int video_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct cx25821_dev *h, *dev = NULL;
+        struct cx25821_dev *dev = video_drvdata(file);
        struct cx25821_fh *fh;
-        struct list_head *list;
+        enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        enum v4l2_buf_type type = 0;
        u32 pix_format;
-        lock_kernel();
+        printk("open dev=%s type=%s\n", video_device_node_name(vdev),
-        list_for_each(list, &cx25821_devlist) {
+                v4l2_type_names[type]);
-                h = list_entry(list, struct cx25821_dev, devlist);
-                if (h->video_dev[SRAM_CH04]
-                    && h->video_dev[SRAM_CH04]->minor == minor) {
-                        dev = h;
-                        type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                }
-        }
-        if (NULL == dev) {
-                unlock_kernel();
-                return -ENODEV;
-        }
-        printk("open minor=%d type=%s\n", minor, v4l2_type_names[type]);
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh), GFP_KERNEL);
-        if (NULL == fh) {
+        if (NULL == fh)
-                unlock_kernel();
                return -ENOMEM;
-        }
+        lock_kernel();
        file->private_data = fh;
        fh->dev = dev;
        fh->type = type;
@@ -443,7 +428,6 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
 struct video_device cx25821_video_template4 = {
        .name = "cx25821-video",
        .fops = &video_fops,
-        .minor = -1,
        .ioctl_ops = &video_ioctl_ops,
        .tvnorms = CX25821_NORMS,
        .current_norm = V4L2_STD_NTSC_M,
diff --git a/drivers/staging/cx25821/cx25821-video5.c b/drivers/staging/cx25821/cx25821-video5.c
index 7ef0b971f5cf..5dc08adc12e8 100644
--- a/drivers/staging/cx25821/cx25821-video5.c
+++ b/drivers/staging/cx25821/cx25821-video5.c
@@ -94,37 +94,22 @@ static struct videobuf_queue_ops cx25821_video_qops = {
 static int video_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct cx25821_dev *h, *dev = NULL;
+        struct cx25821_dev *dev = video_drvdata(file);
        struct cx25821_fh *fh;
-        struct list_head *list;
+        enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        enum v4l2_buf_type type = 0;
        u32 pix_format;
-        lock_kernel();
+        printk("open dev=%s type=%s\n", video_device_node_name(vdev),
-        list_for_each(list, &cx25821_devlist) {
+                v4l2_type_names[type]);
-                h = list_entry(list, struct cx25821_dev, devlist);
-                if (h->video_dev[SRAM_CH05]
-                    && h->video_dev[SRAM_CH05]->minor == minor) {
-                        dev = h;
-                        type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                }
-        }
-        if (NULL == dev) {
-                unlock_kernel();
-                return -ENODEV;
-        }
-        printk("open minor=%d type=%s\n", minor, v4l2_type_names[type]);
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh), GFP_KERNEL);
-        if (NULL == fh) {
+        if (NULL == fh)
-                unlock_kernel();
                return -ENOMEM;
-        }
+        lock_kernel();
        file->private_data = fh;
        fh->dev = dev;
        fh->type = type;
@@ -443,7 +428,6 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
 struct video_device cx25821_video_template5 = {
        .name = "cx25821-video",
        .fops = &video_fops,
-        .minor = -1,
        .ioctl_ops = &video_ioctl_ops,
        .tvnorms = CX25821_NORMS,
        .current_norm = V4L2_STD_NTSC_M,
diff --git a/drivers/staging/cx25821/cx25821-video6.c b/drivers/staging/cx25821/cx25821-video6.c
index 3c41b49e2ea9..2938ad3ad3c5 100644
--- a/drivers/staging/cx25821/cx25821-video6.c
+++ b/drivers/staging/cx25821/cx25821-video6.c
@@ -94,37 +94,22 @@ static struct videobuf_queue_ops cx25821_video_qops = {
 static int video_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct cx25821_dev *h, *dev = NULL;
+        struct cx25821_dev *dev = video_drvdata(file);
        struct cx25821_fh *fh;
-        struct list_head *list;
+        enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        enum v4l2_buf_type type = 0;
        u32 pix_format;
-        lock_kernel();
+        printk("open dev=%s type=%s\n", video_device_node_name(vdev),
-        list_for_each(list, &cx25821_devlist) {
+                v4l2_type_names[type]);
-                h = list_entry(list, struct cx25821_dev, devlist);
-                if (h->video_dev[SRAM_CH06]
-                    && h->video_dev[SRAM_CH06]->minor == minor) {
-                        dev = h;
-                        type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                }
-        }
-        if (NULL == dev) {
-                unlock_kernel();
-                return -ENODEV;
-        }
-        printk("open minor=%d type=%s\n", minor, v4l2_type_names[type]);
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh), GFP_KERNEL);
-        if (NULL == fh) {
+        if (NULL == fh)
-                unlock_kernel();
                return -ENOMEM;
-        }
+        lock_kernel();
        file->private_data = fh;
        fh->dev = dev;
        fh->type = type;
@@ -443,7 +428,6 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
 struct video_device cx25821_video_template6 = {
        .name = "cx25821-video",
        .fops = &video_fops,
-        .minor = -1,
        .ioctl_ops = &video_ioctl_ops,
        .tvnorms = CX25821_NORMS,
        .current_norm = V4L2_STD_NTSC_M,
diff --git a/drivers/staging/cx25821/cx25821-video7.c b/drivers/staging/cx25821/cx25821-video7.c
index 625c9b78a9cf..458e525d72af 100644
--- a/drivers/staging/cx25821/cx25821-video7.c
+++ b/drivers/staging/cx25821/cx25821-video7.c
@@ -93,37 +93,22 @@ static struct videobuf_queue_ops cx25821_video_qops = {
 static int video_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct cx25821_dev *h, *dev = NULL;
+        struct cx25821_dev *dev = video_drvdata(file);
        struct cx25821_fh *fh;
-        struct list_head *list;
+        enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        enum v4l2_buf_type type = 0;
        u32 pix_format;
-        lock_kernel();
+        printk("open dev=%s type=%s\n", video_device_node_name(vdev),
-        list_for_each(list, &cx25821_devlist) {
+                v4l2_type_names[type]);
-                h = list_entry(list, struct cx25821_dev, devlist);
-                if (h->video_dev[SRAM_CH07]
-                    && h->video_dev[SRAM_CH07]->minor == minor) {
-                        dev = h;
-                        type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                }
-        }
-        if (NULL == dev) {
-                unlock_kernel();
-                return -ENODEV;
-        }
-        printk("open minor=%d type=%s\n", minor, v4l2_type_names[type]);
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh), GFP_KERNEL);
-        if (NULL == fh) {
+        if (NULL == fh)
-                unlock_kernel();
                return -ENOMEM;
-        }
+        lock_kernel();
        file->private_data = fh;
        fh->dev = dev;
        fh->type = type;
@@ -442,7 +427,6 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
 struct video_device cx25821_video_template7 = {
        .name = "cx25821-video",
        .fops = &video_fops,
-        .minor = -1,
        .ioctl_ops = &video_ioctl_ops,
        .tvnorms = CX25821_NORMS,
        .current_norm = V4L2_STD_NTSC_M,
diff --git a/drivers/staging/cx25821/cx25821-videoioctl.c b/drivers/staging/cx25821/cx25821-videoioctl.c
index 2a312ce78c63..1da52b54a454 100644
--- a/drivers/staging/cx25821/cx25821-videoioctl.c
+++ b/drivers/staging/cx25821/cx25821-videoioctl.c
@@ -94,36 +94,21 @@ static struct videobuf_queue_ops cx25821_video_qops = {
 static int video_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct cx25821_dev *h, *dev = NULL;
+        struct cx25821_dev *dev = video_drvdata(file);
        struct cx25821_fh *fh;
-        struct list_head *list;
+        enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        enum v4l2_buf_type type = 0;
        u32 pix_format;
-        lock_kernel();
+        printk("open dev=%s type=%s\n", video_device_node_name(vdev),
-        list_for_each(list, &cx25821_devlist) {
+                v4l2_type_names[type]);
-                h = list_entry(list, struct cx25821_dev, devlist);
-                if (h->ioctl_dev && h->ioctl_dev->minor == minor) {
-                        dev = h;
-                        type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                }
-        }
-        if (NULL == dev) {
-                unlock_kernel();
-                return -ENODEV;
-        }
-        printk("open minor=%d type=%s\n", minor, v4l2_type_names[type]);
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh), GFP_KERNEL);
-        if (NULL == fh) {
+        if (NULL == fh)
-                unlock_kernel();
                return -ENOMEM;
-        }
+        lock_kernel();
        file->private_data = fh;
        fh->dev = dev;
@@ -489,7 +474,6 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
 struct video_device cx25821_videoioctl_template = {
        .name = "cx25821-videoioctl",
        .fops = &video_fops,
-        .minor = -1,
        .ioctl_ops = &video_ioctl_ops,
        .tvnorms = CX25821_NORMS,
        .current_norm = V4L2_STD_NTSC_M,
diff --git a/drivers/staging/cx25821/cx25821-vidups10.c b/drivers/staging/cx25821/cx25821-vidups10.c
index 77b63b060405..b76d9f62c3d1 100644
--- a/drivers/staging/cx25821/cx25821-vidups10.c
+++ b/drivers/staging/cx25821/cx25821-vidups10.c
@@ -94,36 +94,20 @@ static struct videobuf_queue_ops cx25821_video_qops = {
 static int video_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct cx25821_dev *h, *dev = NULL;
+        struct cx25821_dev *dev = video_drvdata(file);
        struct cx25821_fh *fh;
-        struct list_head *list;
+        enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        enum v4l2_buf_type type = 0;
-        lock_kernel();
+        printk("open dev=%s type=%s\n", video_device_node_name(vdev),
-        list_for_each(list, &cx25821_devlist) {
+                v4l2_type_names[type]);
-                h = list_entry(list, struct cx25821_dev, devlist);
-                if (h->video_dev[SRAM_CH10]
-                    && h->video_dev[SRAM_CH10]->minor == minor) {
-                        dev = h;
-                        type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                }
-        }
-        if (NULL == dev) {
-                unlock_kernel();
-                return -ENODEV;
-        }
-        printk("open minor=%d type=%s\n", minor, v4l2_type_names[type]);
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh), GFP_KERNEL);
-        if (NULL == fh) {
+        if (NULL == fh)
-                unlock_kernel();
                return -ENOMEM;
-        }
+        lock_kernel();
        file->private_data = fh;
        fh->dev = dev;
@@ -428,7 +412,6 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
 struct video_device cx25821_video_template10 = {
        .name = "cx25821-upstream10",
        .fops = &video_fops,
-        .minor = -1,
        .ioctl_ops = &video_ioctl_ops,
        .tvnorms = CX25821_NORMS,
        .current_norm = V4L2_STD_NTSC_M,
diff --git a/drivers/staging/cx25821/cx25821-vidups9.c b/drivers/staging/cx25821/cx25821-vidups9.c
index 75c8c1eed2da..1580da3b29aa 100644
--- a/drivers/staging/cx25821/cx25821-vidups9.c
+++ b/drivers/staging/cx25821/cx25821-vidups9.c
@@ -94,36 +94,20 @@ static struct videobuf_queue_ops cx25821_video_qops = {
 static int video_open(struct file *file)
 {
-        int minor = video_devdata(file)->minor;
+        struct video_device *vdev = video_devdata(file);
-        struct cx25821_dev *h, *dev = NULL;
+        struct cx25821_dev *dev = video_drvdata(file);
        struct cx25821_fh *fh;
-        struct list_head *list;
+        enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-        enum v4l2_buf_type type = 0;
-        lock_kernel();
+        printk("open dev=%s type=%s\n", video_device_node_name(vdev),
-        list_for_each(list, &cx25821_devlist) {
+                v4l2_type_names[type]);
-                h = list_entry(list, struct cx25821_dev, devlist);
-                if (h->video_dev[SRAM_CH09]
-                    && h->video_dev[SRAM_CH09]->minor == minor) {
-                        dev = h;
-                        type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-                }
-        }
-        if (NULL == dev) {
-                unlock_kernel();
-                return -ENODEV;
-        }
-        printk("open minor=%d type=%s\n", minor, v4l2_type_names[type]);
        /* allocate + initialize per filehandle data */
        fh = kzalloc(sizeof(*fh), GFP_KERNEL);
-        if (NULL == fh) {
+        if (NULL == fh)
-                unlock_kernel();
                return -ENOMEM;
-        }
+        lock_kernel();
        file->private_data = fh;
        fh->dev = dev;
@@ -426,7 +410,6 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
 struct video_device cx25821_video_template9 = {
        .name = "cx25821-upstream9",
        .fops = &video_fops,
-        .minor = -1,
        .ioctl_ops = &video_ioctl_ops,
        .tvnorms = CX25821_NORMS,
        .current_norm = V4L2_STD_NTSC_M,
diff --git a/drivers/staging/go7007/go7007-v4l2.c b/drivers/staging/go7007/go7007-v4l2.c
index b18d8e2d4c5e..3af79242313e 100644
--- a/drivers/staging/go7007/go7007-v4l2.c
+++ b/drivers/staging/go7007/go7007-v4l2.c
@@ -1787,7 +1787,6 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
 static struct video_device go7007_template = {
        .name           = "go7007",
        .fops           = &go7007_fops,
-        .minor          = -1,
        .release        = go7007_vfl_release,
        .ioctl_ops      = &video_ioctl_ops,
        .tvnorms        = V4L2_STD_ALL,
@@ -1817,8 +1816,8 @@ int go7007_v4l2_init(struct go7007 *go)
        }
        video_set_drvdata(go->video_dev, go);
        ++go->ref_count;
-        printk(KERN_INFO "%s: registered device video%d [v4l2]\n",
+        printk(KERN_INFO "%s: registered device %s [v4l2]\n",
-               go->video_dev->name, go->video_dev->num);
+               go->video_dev->name, video_device_node_name(go->video_dev));
        return 0;
 }
diff --git a/drivers/usb/host/isp1362-hcd.c b/drivers/usb/host/isp1362-hcd.c
index 5c774ab98252..73352f3739b5 100644
--- a/drivers/usb/host/isp1362-hcd.c
+++ b/drivers/usb/host/isp1362-hcd.c
@@ -80,7 +80,7 @@
 #include <linux/platform_device.h>
 #include <linux/pm.h>
 #include <linux/io.h>
-#include <linux/bitops.h>
+#include <linux/bitmap.h>
 #include <asm/irq.h>
 #include <asm/system.h>
@@ -190,10 +190,8 @@ static int claim_ptd_buffers(struct isp1362_ep_queue *epq,
                             struct isp1362_ep *ep, u16 len)
 {
        int ptd_offset = -EINVAL;
-        int index;
        int num_ptds = ((len + PTD_HEADER_SIZE - 1) / epq->blk_size) + 1;
-        int found = -1;
+        int found;
-        int last = -1;
        BUG_ON(len > epq->buf_size);
@@ -205,20 +203,9 @@ static int claim_ptd_buffers(struct isp1362_ep_queue *epq,
                    epq->name, len, epq->blk_size, num_ptds, epq->buf_map, epq->skip_map);
        BUG_ON(ep->num_ptds != 0);
-        for (index = 0; index <= epq->buf_count - num_ptds; index++) {
+        found = bitmap_find_next_zero_area(&epq->buf_map, epq->buf_count, 0,
-                if (test_bit(index, &epq->buf_map))
+                                                num_ptds, 0);
-                        continue;
+        if (found >= epq->buf_count)
-                found = index;
-                for (last = index + 1; last < index + num_ptds; last++) {
-                        if (test_bit(last, &epq->buf_map)) {
-                                found = -1;
-                                break;
-                        }
-                }
-                if (found >= 0)
-                        break;
-        }
-        if (found < 0)
                return -EOVERFLOW;
        DBG(1, "%s: Found %d PTDs[%d] for %d/%d byte\n", __func__,
@@ -230,8 +217,7 @@ static int claim_ptd_buffers(struct isp1362_ep_queue *epq,
        epq->buf_avail -= num_ptds;
        BUG_ON(epq->buf_avail > epq->buf_count);
        ep->ptd_index = found;
-        for (index = found; index < last; index++)
+        bitmap_set(&epq->buf_map, found, num_ptds);
-                __set_bit(index, &epq->buf_map);
        DBG(1, "%s: Done %s PTD[%d] $%04x, avail %d count %d claimed %d %08lx:%08lx\n",
            __func__, epq->name, ep->ptd_index, ep->ptd_offset,
            epq->buf_avail, epq->buf_count, num_ptds, epq->buf_map, epq->skip_map);
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 99c0df1c7ebf..5a5c303a6373 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -614,6 +614,21 @@ config FB_BFIN_T350MCQB
         This display is a QVGA 320x240 24-bit RGB display interfaced by an 8-bit wide PPI
         It uses PPI[0..7] PPI_FS1, PPI_FS2 and PPI_CLK.
+config FB_BFIN_LQ035Q1
+        tristate "SHARP LQ035Q1DH02 TFT LCD"
+        depends on FB && BLACKFIN && SPI
+        select FB_CFB_FILLRECT
+        select FB_CFB_COPYAREA
+        select FB_CFB_IMAGEBLIT
+        select BFIN_GPTIMERS
+        help
+          This is the framebuffer device driver for a SHARP LQ035Q1DH02 TFT display found on
+          the Blackfin Landscape LCD EZ-Extender Card.
+          This display is a QVGA 320x240 18-bit RGB display interfaced by an 16-bit wide PPI
+          It uses PPI[0..15] PPI_FS1, PPI_FS2 and PPI_CLK.
+          To compile this driver as a module, choose M here: the
+          module will be called bfin-lq035q1-fb.
 config FB_STI
        tristate "HP STI frame buffer device support"
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 0f8da331ba0f..4ecb30c4f3f2 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -137,6 +137,7 @@ obj-$(CONFIG_FB_EFI)              += efifb.o
 obj-$(CONFIG_FB_VGA16)            += vga16fb.o
 obj-$(CONFIG_FB_OF)               += offb.o
 obj-$(CONFIG_FB_BF54X_LQ043)      += bf54x-lq043fb.o
+obj-$(CONFIG_FB_BFIN_LQ035Q1)     += bfin-lq035q1-fb.o
 obj-$(CONFIG_FB_BFIN_T350MCQB)    += bfin-t350mcqb-fb.o
 obj-$(CONFIG_FB_MX3)              += mx3fb.o
 obj-$(CONFIG_FB_DA8XX)            += da8xx-fb.o
diff --git a/drivers/video/atafb.c b/drivers/video/atafb.c
index b7687c55fe16..2051c9dc813b 100644
--- a/drivers/video/atafb.c
+++ b/drivers/video/atafb.c
@@ -2245,6 +2245,9 @@ static int ext_setcolreg(unsigned int regno, unsigned int red,
        if (regno > 255)
                return 1;
+        if (regno > 255)
+                return 1;
        switch (external_card_type) {
        case IS_VGA:
                OUTB(0x3c8, regno);
diff --git a/drivers/video/bfin-lq035q1-fb.c b/drivers/video/bfin-lq035q1-fb.c
new file mode 100644
index 000000000000..b690c269784a
--- /dev/null
+++ b/drivers/video/bfin-lq035q1-fb.c
@@ -0,0 +1,826 @@
+/*
+ * Blackfin LCD Framebuffer driver SHARP LQ035Q1DH02
+ *
+ * Copyright 2008-2009 Analog Devices Inc.
+ * Licensed under the GPL-2 or later.
+ */
+#define DRIVER_NAME "bfin-lq035q1"
+#define pr_fmt(fmt) DRIVER_NAME ": " fmt
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/fb.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/device.h>
+#include <linux/backlight.h>
+#include <linux/lcd.h>
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/dma-mapping.h>
+#include <asm/blackfin.h>
+#include <asm/irq.h>
+#include <asm/dma.h>
+#include <asm/portmux.h>
+#include <asm/gptimers.h>
+#include <asm/bfin-lq035q1.h>
+#if defined(BF533_FAMILY) || defined(BF538_FAMILY)
+#define TIMER_HSYNC_id                  TIMER1_id
+#define TIMER_HSYNCbit                  TIMER1bit
+#define TIMER_HSYNC_STATUS_TRUN         TIMER_STATUS_TRUN1
+#define TIMER_HSYNC_STATUS_TIMIL        TIMER_STATUS_TIMIL1
+#define TIMER_HSYNC_STATUS_TOVF         TIMER_STATUS_TOVF1
+#define TIMER_VSYNC_id                  TIMER2_id
+#define TIMER_VSYNCbit                  TIMER2bit
+#define TIMER_VSYNC_STATUS_TRUN         TIMER_STATUS_TRUN2
+#define TIMER_VSYNC_STATUS_TIMIL        TIMER_STATUS_TIMIL2
+#define TIMER_VSYNC_STATUS_TOVF         TIMER_STATUS_TOVF2
+#else
+#define TIMER_HSYNC_id                  TIMER0_id
+#define TIMER_HSYNCbit                  TIMER0bit
+#define TIMER_HSYNC_STATUS_TRUN         TIMER_STATUS_TRUN0
+#define TIMER_HSYNC_STATUS_TIMIL        TIMER_STATUS_TIMIL0
+#define TIMER_HSYNC_STATUS_TOVF         TIMER_STATUS_TOVF0
+#define TIMER_VSYNC_id                  TIMER1_id
+#define TIMER_VSYNCbit                  TIMER1bit
+#define TIMER_VSYNC_STATUS_TRUN         TIMER_STATUS_TRUN1
+#define TIMER_VSYNC_STATUS_TIMIL        TIMER_STATUS_TIMIL1
+#define TIMER_VSYNC_STATUS_TOVF         TIMER_STATUS_TOVF1
+#endif
+#define LCD_X_RES               320     /* Horizontal Resolution */
+#define LCD_Y_RES               240     /* Vertical Resolution */
+#define DMA_BUS_SIZE            16
+#define USE_RGB565_16_BIT_PPI
+#ifdef USE_RGB565_16_BIT_PPI
+#define LCD_BPP         16      /* Bit Per Pixel */
+#define CLOCKS_PER_PIX  1
+#define CPLD_PIPELINE_DELAY_COR 0       /* NO CPLB */
+#endif
+/* Interface 16/18-bit TFT over an 8-bit wide PPI using a small Programmable Logic Device (CPLD)
+ * http://blackfin.uclinux.org/gf/project/stamp/frs/?action=FrsReleaseBrowse&frs_package_id=165
+ */
+#ifdef USE_RGB565_8_BIT_PPI
+#define LCD_BPP         16      /* Bit Per Pixel */
+#define CLOCKS_PER_PIX  2
+#define CPLD_PIPELINE_DELAY_COR 3       /* RGB565 */
+#endif
+#ifdef USE_RGB888_8_BIT_PPI
+#define LCD_BPP         24      /* Bit Per Pixel */
+#define CLOCKS_PER_PIX  3
+#define CPLD_PIPELINE_DELAY_COR 5       /* RGB888 */
+#endif
+        /*
+         * HS and VS timing parameters (all in number of PPI clk ticks)
+         */
+#define U_LINE          4                               /* Blanking Lines */
+#define H_ACTPIX        (LCD_X_RES * CLOCKS_PER_PIX)    /* active horizontal pixel */
+#define H_PERIOD        (336 * CLOCKS_PER_PIX)          /* HS period */
+#define H_PULSE         (2 * CLOCKS_PER_PIX)                            /* HS pulse width */
+#define H_START         (7 * CLOCKS_PER_PIX + CPLD_PIPELINE_DELAY_COR)  /* first valid pixel */
+#define V_LINES         (LCD_Y_RES + U_LINE)            /* total vertical lines */
+#define V_PULSE         (2 * CLOCKS_PER_PIX)            /* VS pulse width (1-5 H_PERIODs) */
+#define V_PERIOD        (H_PERIOD * V_LINES)            /* VS period */
+#define ACTIVE_VIDEO_MEM_OFFSET         ((U_LINE / 2) * LCD_X_RES * (LCD_BPP / 8))
+#define BFIN_LCD_NBR_PALETTE_ENTRIES    256
+#define PPI_TX_MODE                     0x2
+#define PPI_XFER_TYPE_11                0xC
+#define PPI_PORT_CFG_01                 0x10
+#define PPI_POLS_1                      0x8000
+#if (CLOCKS_PER_PIX > 1)
+#define PPI_PMODE (DLEN_8 | PACK_EN)
+#else
+#define PPI_PMODE (DLEN_16)
+#endif
+#define LQ035_INDEX                     0x74
+#define LQ035_DATA                      0x76
+#define LQ035_DRIVER_OUTPUT_CTL         0x1
+#define LQ035_SHUT_CTL                  0x11
+#define LQ035_DRIVER_OUTPUT_MASK        (LQ035_LR | LQ035_TB | LQ035_BGR | LQ035_REV)
+#define LQ035_DRIVER_OUTPUT_DEFAULT     (0x2AEF & ~LQ035_DRIVER_OUTPUT_MASK)
+#define LQ035_SHUT                      (1 << 0)        /* Shutdown */
+#define LQ035_ON                        (0 << 0)        /* Shutdown */
+struct bfin_lq035q1fb_info {
+        struct fb_info *fb;
+        struct device *dev;
+        struct spi_driver spidrv;
+        struct bfin_lq035q1fb_disp_info *disp_info;
+        unsigned char *fb_buffer;       /* RGB Buffer */
+        dma_addr_t dma_handle;
+        int lq035_open_cnt;
+        int irq;
+        spinlock_t lock;        /* lock */
+        u32 pseudo_pal[16];
+};
+static int nocursor;
+module_param(nocursor, int, 0644);
+MODULE_PARM_DESC(nocursor, "cursor enable/disable");
+struct spi_control {
+        unsigned short mode;
+};
+static int lq035q1_control(struct spi_device *spi, unsigned char reg, unsigned short value)
+{
+        int ret;
+        u8 regs[3] = { LQ035_INDEX, 0, 0 };
+        u8 dat[3] = { LQ035_DATA, 0, 0 };
+        if (!spi)
+                return -ENODEV;
+        regs[2] = reg;
+        dat[1] = value >> 8;
+        dat[2] = value & 0xFF;
+        ret = spi_write(spi, regs, ARRAY_SIZE(regs));
+        ret |= spi_write(spi, dat, ARRAY_SIZE(dat));
+        return ret;
+}
+static int __devinit lq035q1_spidev_probe(struct spi_device *spi)
+{
+        int ret;
+        struct spi_control *ctl;
+        struct bfin_lq035q1fb_info *info = container_of(spi->dev.driver,
+                                                struct bfin_lq035q1fb_info,
+                                                spidrv.driver);
+        ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
+        if (!ctl)
+                return -ENOMEM;
+        ctl->mode = (info->disp_info->mode &
+                LQ035_DRIVER_OUTPUT_MASK) | LQ035_DRIVER_OUTPUT_DEFAULT;
+        ret = lq035q1_control(spi, LQ035_SHUT_CTL, LQ035_ON);
+        ret |= lq035q1_control(spi, LQ035_DRIVER_OUTPUT_CTL, ctl->mode);
+        if (ret)
+                return ret;
+        spi_set_drvdata(spi, ctl);
+        return 0;
+}
+static int lq035q1_spidev_remove(struct spi_device *spi)
+{
+        return lq035q1_control(spi, LQ035_SHUT_CTL, LQ035_SHUT);
+}
+#ifdef CONFIG_PM
+static int lq035q1_spidev_suspend(struct spi_device *spi, pm_message_t state)
+{
+        return lq035q1_control(spi, LQ035_SHUT_CTL, LQ035_SHUT);
+}
+static int lq035q1_spidev_resume(struct spi_device *spi)
+{
+        int ret;
+        struct spi_control *ctl = spi_get_drvdata(spi);
+        ret = lq035q1_control(spi, LQ035_DRIVER_OUTPUT_CTL, ctl->mode);
+        if (ret)
+                return ret;
+        return lq035q1_control(spi, LQ035_SHUT_CTL, LQ035_ON);
+}
+#else
+# define lq035q1_spidev_suspend NULL
+# define lq035q1_spidev_resume  NULL
+#endif
+/* Power down all displays on reboot, poweroff or halt */
+static void lq035q1_spidev_shutdown(struct spi_device *spi)
+{
+        lq035q1_control(spi, LQ035_SHUT_CTL, LQ035_SHUT);
+}
+static int lq035q1_backlight(struct bfin_lq035q1fb_info *info, unsigned arg)
+{
+        if (info->disp_info->use_bl)
+                gpio_set_value(info->disp_info->gpio_bl, arg);
+        return 0;
+}
+static void bfin_lq035q1_config_ppi(struct bfin_lq035q1fb_info *fbi)
+{
+        bfin_write_PPI_DELAY(H_START);
+        bfin_write_PPI_COUNT(H_ACTPIX - 1);
+        bfin_write_PPI_FRAME(V_LINES);
+        bfin_write_PPI_CONTROL(PPI_TX_MODE |       /* output mode , PORT_DIR */
+                                PPI_XFER_TYPE_11 | /* sync mode XFR_TYPE */
+                                PPI_PORT_CFG_01 |  /* two frame sync PORT_CFG */
+                                PPI_PMODE |        /* 8/16 bit data length / PACK_EN? */
+                                PPI_POLS_1);       /* faling edge syncs POLS */
+}
+static inline void bfin_lq035q1_disable_ppi(void)
+{
+        bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN);
+}
+static inline void bfin_lq035q1_enable_ppi(void)
+{
+        bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
+}
+static void bfin_lq035q1_start_timers(void)
+{
+        enable_gptimers(TIMER_VSYNCbit | TIMER_HSYNCbit);
+}
+static void bfin_lq035q1_stop_timers(void)
+{
+        disable_gptimers(TIMER_HSYNCbit | TIMER_VSYNCbit);
+        set_gptimer_status(0, TIMER_HSYNC_STATUS_TRUN | TIMER_VSYNC_STATUS_TRUN |
+                                TIMER_HSYNC_STATUS_TIMIL | TIMER_VSYNC_STATUS_TIMIL |
+                                 TIMER_HSYNC_STATUS_TOVF | TIMER_VSYNC_STATUS_TOVF);
+}
+static void bfin_lq035q1_init_timers(void)
+{
+        bfin_lq035q1_stop_timers();
+        set_gptimer_period(TIMER_HSYNC_id, H_PERIOD);
+        set_gptimer_pwidth(TIMER_HSYNC_id, H_PULSE);
+        set_gptimer_config(TIMER_HSYNC_id, TIMER_MODE_PWM | TIMER_PERIOD_CNT |
+                                      TIMER_TIN_SEL | TIMER_CLK_SEL|
+                                      TIMER_EMU_RUN);
+        set_gptimer_period(TIMER_VSYNC_id, V_PERIOD);
+        set_gptimer_pwidth(TIMER_VSYNC_id, V_PULSE);
+        set_gptimer_config(TIMER_VSYNC_id, TIMER_MODE_PWM | TIMER_PERIOD_CNT |
+                                      TIMER_TIN_SEL | TIMER_CLK_SEL |
+                                      TIMER_EMU_RUN);
+}
+static void bfin_lq035q1_config_dma(struct bfin_lq035q1fb_info *fbi)
+{
+        set_dma_config(CH_PPI,
+                       set_bfin_dma_config(DIR_READ, DMA_FLOW_AUTO,
+                                           INTR_DISABLE, DIMENSION_2D,
+                                           DATA_SIZE_16,
+                                           DMA_NOSYNC_KEEP_DMA_BUF));
+        set_dma_x_count(CH_PPI, (LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE);
+        set_dma_x_modify(CH_PPI, DMA_BUS_SIZE / 8);
+        set_dma_y_count(CH_PPI, V_LINES);
+        set_dma_y_modify(CH_PPI, DMA_BUS_SIZE / 8);
+        set_dma_start_addr(CH_PPI, (unsigned long)fbi->fb_buffer);
+}
+#if (CLOCKS_PER_PIX == 1)
+static const u16 ppi0_req_16[] = {P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
+                            P_PPI0_D0, P_PPI0_D1, P_PPI0_D2,
+                            P_PPI0_D3, P_PPI0_D4, P_PPI0_D5,
+                            P_PPI0_D6, P_PPI0_D7, P_PPI0_D8,
+                            P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
+                            P_PPI0_D12, P_PPI0_D13, P_PPI0_D14,
+                            P_PPI0_D15, 0};
+#else
+static const u16 ppi0_req_16[] = {P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
+                            P_PPI0_D0, P_PPI0_D1, P_PPI0_D2,
+                            P_PPI0_D3, P_PPI0_D4, P_PPI0_D5,
+                            P_PPI0_D6, P_PPI0_D7, 0};
+#endif
+static inline void bfin_lq035q1_free_ports(void)
+{
+        peripheral_free_list(ppi0_req_16);
+        if (ANOMALY_05000400)
+                gpio_free(P_IDENT(P_PPI0_FS3));
+}
+static int __devinit bfin_lq035q1_request_ports(struct platform_device *pdev)
+{
+        /* ANOMALY_05000400 - PPI Does Not Start Properly In Specific Mode:
+         * Drive PPI_FS3 Low
+         */
+        if (ANOMALY_05000400) {
+                int ret = gpio_request(P_IDENT(P_PPI0_FS3), "PPI_FS3");
+                if (ret)
+                        return ret;
+                gpio_direction_output(P_IDENT(P_PPI0_FS3), 0);
+        }
+        if (peripheral_request_list(ppi0_req_16, DRIVER_NAME)) {
+                dev_err(&pdev->dev, "requesting peripherals failed\n");
+                return -EFAULT;
+        }
+        return 0;
+}
+static int bfin_lq035q1_fb_open(struct fb_info *info, int user)
+{
+        struct bfin_lq035q1fb_info *fbi = info->par;
+        spin_lock(&fbi->lock);
+        fbi->lq035_open_cnt++;
+        if (fbi->lq035_open_cnt <= 1) {
+                bfin_lq035q1_disable_ppi();
+                SSYNC();
+                bfin_lq035q1_config_dma(fbi);
+                bfin_lq035q1_config_ppi(fbi);
+                bfin_lq035q1_init_timers();
+                /* start dma */
+                enable_dma(CH_PPI);
+                bfin_lq035q1_enable_ppi();
+                bfin_lq035q1_start_timers();
+                lq035q1_backlight(fbi, 1);
+        }
+        spin_unlock(&fbi->lock);
+        return 0;
+}
+static int bfin_lq035q1_fb_release(struct fb_info *info, int user)
+{
+        struct bfin_lq035q1fb_info *fbi = info->par;
+        spin_lock(&fbi->lock);
+        fbi->lq035_open_cnt--;
+        if (fbi->lq035_open_cnt <= 0) {
+                lq035q1_backlight(fbi, 0);
+                bfin_lq035q1_disable_ppi();
+                SSYNC();
+                disable_dma(CH_PPI);
+                bfin_lq035q1_stop_timers();
+        }
+        spin_unlock(&fbi->lock);
+        return 0;
+}
+static int bfin_lq035q1_fb_check_var(struct fb_var_screeninfo *var,
+                                     struct fb_info *info)
+{
+        switch (var->bits_per_pixel) {
+#if (LCD_BPP == 24)
+        case 24:/* TRUECOLOUR, 16m */
+#else
+        case 16:/* DIRECTCOLOUR, 64k */
+#endif
+                var->red.offset = info->var.red.offset;
+                var->green.offset = info->var.green.offset;
+                var->blue.offset = info->var.blue.offset;
+                var->red.length = info->var.red.length;
+                var->green.length = info->var.green.length;
+                var->blue.length = info->var.blue.length;
+                var->transp.offset = 0;
+                var->transp.length = 0;
+                var->transp.msb_right = 0;
+                var->red.msb_right = 0;
+                var->green.msb_right = 0;
+                var->blue.msb_right = 0;
+                break;
+        default:
+                pr_debug("%s: depth not supported: %u BPP\n", __func__,
+                         var->bits_per_pixel);
+                return -EINVAL;
+        }
+        if (info->var.xres != var->xres || info->var.yres != var->yres ||
+            info->var.xres_virtual != var->xres_virtual ||
+            info->var.yres_virtual != var->yres_virtual) {
+                pr_debug("%s: Resolution not supported: X%u x Y%u \n",
+                         __func__, var->xres, var->yres);
+                return -EINVAL;
+        }
+        /*
+         *  Memory limit
+         */
+        if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
+                pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
+                         __func__, var->yres_virtual);
+                return -ENOMEM;
+        }
+        return 0;
+}
+int bfin_lq035q1_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
+{
+        if (nocursor)
+                return 0;
+        else
+                return -EINVAL; /* just to force soft_cursor() call */
+}
+static int bfin_lq035q1_fb_setcolreg(u_int regno, u_int red, u_int green,
+                                   u_int blue, u_int transp,
+                                   struct fb_info *info)
+{
+        if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
+                return -EINVAL;
+        if (info->var.grayscale) {
+                /* grayscale = 0.30*R + 0.59*G + 0.11*B */
+                red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
+        }
+        if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
+                u32 value;
+                /* Place color in the pseudopalette */
+                if (regno > 16)
+                        return -EINVAL;
+                red >>= (16 - info->var.red.length);
+                green >>= (16 - info->var.green.length);
+                blue >>= (16 - info->var.blue.length);
+                value = (red << info->var.red.offset) |
+                    (green << info->var.green.offset) |
+                    (blue << info->var.blue.offset);
+                value &= 0xFFFFFF;
+                ((u32 *) (info->pseudo_palette))[regno] = value;
+        }
+        return 0;
+}
+static struct fb_ops bfin_lq035q1_fb_ops = {
+        .owner = THIS_MODULE,
+        .fb_open = bfin_lq035q1_fb_open,
+        .fb_release = bfin_lq035q1_fb_release,
+        .fb_check_var = bfin_lq035q1_fb_check_var,
+        .fb_fillrect = cfb_fillrect,
+        .fb_copyarea = cfb_copyarea,
+        .fb_imageblit = cfb_imageblit,
+        .fb_cursor = bfin_lq035q1_fb_cursor,
+        .fb_setcolreg = bfin_lq035q1_fb_setcolreg,
+};
+static irqreturn_t bfin_lq035q1_irq_error(int irq, void *dev_id)
+{
+        /*struct bfin_lq035q1fb_info *info = (struct bfin_lq035q1fb_info *)dev_id;*/
+        u16 status = bfin_read_PPI_STATUS();
+        bfin_write_PPI_STATUS(-1);
+        if (status) {
+                bfin_lq035q1_disable_ppi();
+                disable_dma(CH_PPI);
+                /* start dma */
+                enable_dma(CH_PPI);
+                bfin_lq035q1_enable_ppi();
+                bfin_write_PPI_STATUS(-1);
+        }
+        return IRQ_HANDLED;
+}
+static int __devinit bfin_lq035q1_probe(struct platform_device *pdev)
+{
+        struct bfin_lq035q1fb_info *info;
+        struct fb_info *fbinfo;
+        int ret;
+        ret = request_dma(CH_PPI, DRIVER_NAME"_CH_PPI");
+        if (ret < 0) {
+                dev_err(&pdev->dev, "PPI DMA unavailable\n");
+                goto out1;
+        }
+        fbinfo = framebuffer_alloc(sizeof(*info), &pdev->dev);
+        if (!fbinfo) {
+                ret = -ENOMEM;
+                goto out2;
+        }
+        info = fbinfo->par;
+        info->fb = fbinfo;
+        info->dev = &pdev->dev;
+        info->disp_info = pdev->dev.platform_data;
+        platform_set_drvdata(pdev, fbinfo);
+        strcpy(fbinfo->fix.id, DRIVER_NAME);
+        fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;
+        fbinfo->fix.type_aux = 0;
+        fbinfo->fix.xpanstep = 0;
+        fbinfo->fix.ypanstep = 0;
+        fbinfo->fix.ywrapstep = 0;
+        fbinfo->fix.accel = FB_ACCEL_NONE;
+        fbinfo->fix.visual = FB_VISUAL_TRUECOLOR;
+        fbinfo->var.nonstd = 0;
+        fbinfo->var.activate = FB_ACTIVATE_NOW;
+        fbinfo->var.height = -1;
+        fbinfo->var.width = -1;
+        fbinfo->var.accel_flags = 0;
+        fbinfo->var.vmode = FB_VMODE_NONINTERLACED;
+        fbinfo->var.xres = LCD_X_RES;
+        fbinfo->var.xres_virtual = LCD_X_RES;
+        fbinfo->var.yres = LCD_Y_RES;
+        fbinfo->var.yres_virtual = LCD_Y_RES;
+        fbinfo->var.bits_per_pixel = LCD_BPP;
+        if (info->disp_info->mode & LQ035_BGR) {
+#if (LCD_BPP == 24)
+                fbinfo->var.red.offset = 0;
+                fbinfo->var.green.offset = 8;
+                fbinfo->var.blue.offset = 16;
+#else
+                fbinfo->var.red.offset = 0;
+                fbinfo->var.green.offset = 5;
+                fbinfo->var.blue.offset = 11;
+#endif
+        } else {
+#if (LCD_BPP == 24)
+                fbinfo->var.red.offset = 16;
+                fbinfo->var.green.offset = 8;
+                fbinfo->var.blue.offset = 0;
+#else
+                fbinfo->var.red.offset = 11;
+                fbinfo->var.green.offset = 5;
+                fbinfo->var.blue.offset = 0;
+#endif
+        }
+        fbinfo->var.transp.offset = 0;
+#if (LCD_BPP == 24)
+        fbinfo->var.red.length = 8;
+        fbinfo->var.green.length = 8;
+        fbinfo->var.blue.length = 8;
+#else
+        fbinfo->var.red.length = 5;
+        fbinfo->var.green.length = 6;
+        fbinfo->var.blue.length = 5;
+#endif
+        fbinfo->var.transp.length = 0;
+        fbinfo->fix.smem_len = LCD_X_RES * LCD_Y_RES * LCD_BPP / 8
+                                + ACTIVE_VIDEO_MEM_OFFSET;
+        fbinfo->fix.line_length = fbinfo->var.xres_virtual *
+            fbinfo->var.bits_per_pixel / 8;
+        fbinfo->fbops = &bfin_lq035q1_fb_ops;
+        fbinfo->flags = FBINFO_FLAG_DEFAULT;
+        info->fb_buffer =
+            dma_alloc_coherent(NULL, fbinfo->fix.smem_len, &info->dma_handle,
+                               GFP_KERNEL);
+        if (NULL == info->fb_buffer) {
+                dev_err(&pdev->dev, "couldn't allocate dma buffer\n");
+                ret = -ENOMEM;
+                goto out3;
+        }
+        fbinfo->screen_base = (void *)info->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET;
+        fbinfo->fix.smem_start = (int)info->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET;
+        fbinfo->fbops = &bfin_lq035q1_fb_ops;
+        fbinfo->pseudo_palette = &info->pseudo_pal;
+        ret = fb_alloc_cmap(&fbinfo->cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0);
+        if (ret < 0) {
+                dev_err(&pdev->dev, "failed to allocate colormap (%d entries)\n",
+                       BFIN_LCD_NBR_PALETTE_ENTRIES);
+                goto out4;
+        }
+        ret = bfin_lq035q1_request_ports(pdev);
+        if (ret) {
+                dev_err(&pdev->dev, "couldn't request gpio port\n");
+                goto out6;
+        }
+        info->irq = platform_get_irq(pdev, 0);
+        if (info->irq < 0) {
+                ret = -EINVAL;
+                goto out7;
+        }
+        ret = request_irq(info->irq, bfin_lq035q1_irq_error, IRQF_DISABLED,
+                        DRIVER_NAME" PPI ERROR", info);
+        if (ret < 0) {
+                dev_err(&pdev->dev, "unable to request PPI ERROR IRQ\n");
+                goto out7;
+        }
+        info->spidrv.driver.name = DRIVER_NAME"-spi";
+        info->spidrv.probe    = lq035q1_spidev_probe;
+        info->spidrv.remove   = __devexit_p(lq035q1_spidev_remove);
+        info->spidrv.shutdown = lq035q1_spidev_shutdown;
+        info->spidrv.suspend  = lq035q1_spidev_suspend;
+        info->spidrv.resume   = lq035q1_spidev_resume;
+        ret = spi_register_driver(&info->spidrv);
+        if (ret < 0) {
+                dev_err(&pdev->dev, "couldn't register SPI Interface\n");
+                goto out8;
+        }
+        if (info->disp_info->use_bl) {
+                ret = gpio_request(info->disp_info->gpio_bl, "LQ035 Backlight");
+                if (ret) {
+                        dev_err(&pdev->dev, "failed to request GPIO %d\n",
+                                info->disp_info->gpio_bl);
+                        goto out9;
+                }
+                gpio_direction_output(info->disp_info->gpio_bl, 0);
+        }
+        ret = register_framebuffer(fbinfo);
+        if (ret < 0) {
+                dev_err(&pdev->dev, "unable to register framebuffer\n");
+                goto out10;
+        }
+        dev_info(&pdev->dev, "%dx%d %d-bit RGB FrameBuffer initialized\n",
+                LCD_X_RES, LCD_Y_RES, LCD_BPP);
+        return 0;
+ out10:
+        if (info->disp_info->use_bl)
+                gpio_free(info->disp_info->gpio_bl);
+ out9:
+        spi_unregister_driver(&info->spidrv);
+ out8:
+        free_irq(info->irq, info);
+ out7:
+        bfin_lq035q1_free_ports();
+ out6:
+        fb_dealloc_cmap(&fbinfo->cmap);
+ out4:
+        dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
+                          info->dma_handle);
+ out3:
+        framebuffer_release(fbinfo);
+ out2:
+        free_dma(CH_PPI);
+ out1:
+        platform_set_drvdata(pdev, NULL);
+        return ret;
+}
+static int __devexit bfin_lq035q1_remove(struct platform_device *pdev)
+{
+        struct fb_info *fbinfo = platform_get_drvdata(pdev);
+        struct bfin_lq035q1fb_info *info = fbinfo->par;
+        if (info->disp_info->use_bl)
+                gpio_free(info->disp_info->gpio_bl);
+        spi_unregister_driver(&info->spidrv);
+        unregister_framebuffer(fbinfo);
+        free_dma(CH_PPI);
+        free_irq(info->irq, info);
+        if (info->fb_buffer != NULL)
+                dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
+                                  info->dma_handle);
+        fb_dealloc_cmap(&fbinfo->cmap);
+        bfin_lq035q1_free_ports();
+        platform_set_drvdata(pdev, NULL);
+        framebuffer_release(fbinfo);
+        dev_info(&pdev->dev, "unregistered LCD driver\n");
+        return 0;
+}
+#ifdef CONFIG_PM
+static int bfin_lq035q1_suspend(struct device *dev)
+{
+        struct fb_info *fbinfo = dev_get_drvdata(dev);
+        struct bfin_lq035q1fb_info *info = fbinfo->par;
+        if (info->lq035_open_cnt) {
+                lq035q1_backlight(info, 0);
+                bfin_lq035q1_disable_ppi();
+                SSYNC();
+                disable_dma(CH_PPI);
+                bfin_lq035q1_stop_timers();
+                bfin_write_PPI_STATUS(-1);
+        }
+        return 0;
+}
+static int bfin_lq035q1_resume(struct device *dev)
+{
+        struct fb_info *fbinfo = dev_get_drvdata(dev);
+        struct bfin_lq035q1fb_info *info = fbinfo->par;
+        if (info->lq035_open_cnt) {
+                bfin_lq035q1_disable_ppi();
+                SSYNC();
+                bfin_lq035q1_config_dma(info);
+                bfin_lq035q1_config_ppi(info);
+                bfin_lq035q1_init_timers();
+                /* start dma */
+                enable_dma(CH_PPI);
+                bfin_lq035q1_enable_ppi();
+                bfin_lq035q1_start_timers();
+                lq035q1_backlight(info, 1);
+        }
+        return 0;
+}
+static struct dev_pm_ops bfin_lq035q1_dev_pm_ops = {
+        .suspend = bfin_lq035q1_suspend,
+        .resume  = bfin_lq035q1_resume,
+};
+#endif
+static struct platform_driver bfin_lq035q1_driver = {
+        .probe   = bfin_lq035q1_probe,
+        .remove  = __devexit_p(bfin_lq035q1_remove),
+        .driver = {
+                .name = DRIVER_NAME,
+#ifdef CONFIG_PM
+                .pm   = &bfin_lq035q1_dev_pm_ops,
+#endif
+        },
+};
+static int __init bfin_lq035q1_driver_init(void)
+{
+        return platform_driver_register(&bfin_lq035q1_driver);
+}
+module_init(bfin_lq035q1_driver_init);
+static void __exit bfin_lq035q1_driver_cleanup(void)
+{
+        platform_driver_unregister(&bfin_lq035q1_driver);
+}
+module_exit(bfin_lq035q1_driver_cleanup);
+MODULE_DESCRIPTION("Blackfin TFT LCD Driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/video/bfin-t350mcqb-fb.c b/drivers/video/bfin-t350mcqb-fb.c
index 5cc36cfbf07b..2549c53b26a0 100644
--- a/drivers/video/bfin-t350mcqb-fb.c
+++ b/drivers/video/bfin-t350mcqb-fb.c
@@ -487,8 +487,8 @@ static int __devinit bfin_t350mcqb_probe(struct platform_device *pdev)
        fbinfo->var.nonstd = 0;
        fbinfo->var.activate = FB_ACTIVATE_NOW;
-        fbinfo->var.height = -1;
+        fbinfo->var.height = 53;
-        fbinfo->var.width = -1;
+        fbinfo->var.width = 70;
        fbinfo->var.accel_flags = 0;
        fbinfo->var.vmode = FB_VMODE_NONINTERLACED;
@@ -634,17 +634,35 @@ static int __devexit bfin_t350mcqb_remove(struct platform_device *pdev)
 #ifdef CONFIG_PM
 static int bfin_t350mcqb_suspend(struct platform_device *pdev, pm_message_t state)
 {
-        bfin_t350mcqb_disable_ppi();
+        struct fb_info *fbinfo = platform_get_drvdata(pdev);
-        disable_dma(CH_PPI);
+        struct bfin_t350mcqbfb_info *fbi = fbinfo->par;
-        bfin_write_PPI_STATUS(0xFFFF);
+        if (fbi->lq043_open_cnt) {
+                bfin_t350mcqb_disable_ppi();
+                disable_dma(CH_PPI);
+                bfin_t350mcqb_stop_timers();
+                bfin_write_PPI_STATUS(-1);
+        }
        return 0;
 }
 static int bfin_t350mcqb_resume(struct platform_device *pdev)
 {
-        enable_dma(CH_PPI);
+        struct fb_info *fbinfo = platform_get_drvdata(pdev);
-        bfin_t350mcqb_enable_ppi();
+        struct bfin_t350mcqbfb_info *fbi = fbinfo->par;
+        if (fbi->lq043_open_cnt) {
+                bfin_t350mcqb_config_dma(fbi);
+                bfin_t350mcqb_config_ppi(fbi);
+                bfin_t350mcqb_init_timers();
+                /* start dma */
+                enable_dma(CH_PPI);
+                bfin_t350mcqb_enable_ppi();
+                bfin_t350mcqb_start_timers();
+        }
        return 0;
 }
diff --git a/drivers/video/clps711xfb.c b/drivers/video/clps711xfb.c
index 16f5db471ab5..99b354b8e257 100644
--- a/drivers/video/clps711xfb.c
+++ b/drivers/video/clps711xfb.c
@@ -19,8 +19,10 @@
 *
 *  Framebuffer driver for the CLPS7111 and EP7212 processors.
 */
+#include <linux/mm.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/seq_file.h>
 #include <linux/slab.h>
 #include <linux/fb.h>
 #include <linux/init.h>
@@ -38,14 +40,6 @@ struct fb_info	*cfb;
 #define CMAP_MAX_SIZE   16
-/* The /proc entry for the backlight. */
-static struct proc_dir_entry *clps7111fb_backlight_proc_entry = NULL;
-static int clps7111fb_proc_backlight_read(char *page, char **start, off_t off,
-                int count, int *eof, void *data);
-static int clps7111fb_proc_backlight_write(struct file *file, 
-                const char *buffer, unsigned long count, void *data);
 /*
 * LCD AC Prescale.  This comes from the LCD panel manufacturers specifications.
 * This determines how many clocks + 1 of CL1 before the M signal toggles.
@@ -221,26 +215,23 @@ static struct fb_ops clps7111fb_ops = {
        .fb_imageblit   = cfb_imageblit,
 };
-static int 
+static int backlight_proc_show(struct seq_file *m, void *v)
-clps7111fb_proc_backlight_read(char *page, char **start, off_t off,
-                int count, int *eof, void *data)
 {
-        /* We need at least two characters, one for the digit, and one for
-         * the terminating NULL. */
-        if (count < 2) 
-                return -EINVAL;
        if (machine_is_edb7211()) {
-                return sprintf(page, "%d\n", 
+                seq_printf(m, "%d\n",
                                (clps_readb(PDDR) & EDB_PD3_LCDBL) ? 1 : 0);
        }
        return 0;
 }
-static int 
+static int backlight_proc_open(struct inode *inode, struct file *file)
-clps7111fb_proc_backlight_write(struct file *file, const char *buffer, 
+{
-                unsigned long count, void *data)
+        return single_open(file, backlight_proc_show, NULL);
+}
+static ssize_t backlight_proc_write(struct file *file, const char *buffer,
+                                    size_t count, loff_t *pos)
 {
        unsigned char char_value;
        int value;
@@ -271,6 +262,15 @@ clps7111fb_proc_backlight_write(struct file *file, const char *buffer,
        return count;
 }
+static const struct file_operations backlight_proc_fops = {
+        .owner          = THIS_MODULE,
+        .open           = backlight_proc_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+        .write          = backlight_proc_write,
+};
 static void __init clps711x_guess_lcd_params(struct fb_info *info)
 {
        unsigned int lcdcon, syscon, size;
@@ -379,19 +379,11 @@ int __init clps711xfb_init(void)
        fb_alloc_cmap(&cfb->cmap, CMAP_MAX_SIZE, 0);
-        /* Register the /proc entries. */
+        if (!proc_create("backlight", 0444, NULL, &backlight_proc_fops)) {
-        clps7111fb_backlight_proc_entry = create_proc_entry("backlight", 0444,
-                NULL);
-        if (clps7111fb_backlight_proc_entry == NULL) {
                printk("Couldn't create the /proc entry for the backlight.\n");
                return -EINVAL;
        }
-        clps7111fb_backlight_proc_entry->read_proc = 
-                &clps7111fb_proc_backlight_read;
-        clps7111fb_backlight_proc_entry->write_proc = 
-                &clps7111fb_proc_backlight_write;
        /*
         * Power up the LCD
         */
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index ea1fd3f47511..369a5b3ac649 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -28,6 +28,8 @@
 #include <linux/uaccess.h>
 #include <linux/interrupt.h>
 #include <linux/clk.h>
+#include <linux/cpufreq.h>
+#include <linux/console.h>
 #include <video/da8xx-fb.h>
 #define DRIVER_NAME "da8xx_lcdc"
@@ -113,6 +115,12 @@ struct da8xx_fb_par {
        unsigned short pseudo_palette[16];
        unsigned int databuf_sz;
        unsigned int palette_sz;
+        unsigned int pxl_clk;
+        int blank;
+#ifdef CONFIG_CPU_FREQ
+        struct notifier_block   freq_transition;
+#endif
+        void (*panel_power_ctrl)(int);
 };
 /* Variable Screen Information */
@@ -155,7 +163,7 @@ struct da8xx_panel {
        int             vfp;            /* Vertical front porch */
        int             vbp;            /* Vertical back porch */
        int             vsw;            /* Vertical Sync Pulse Width */
-        int             pxl_clk;        /* Pixel clock */
+        unsigned int    pxl_clk;        /* Pixel clock */
        unsigned char   invert_pxl_clk; /* Invert Pixel clock */
 };
@@ -171,7 +179,7 @@ static struct da8xx_panel known_lcd_panels[] = {
                .vfp = 2,
                .vbp = 2,
                .vsw = 0,
-                .pxl_clk = 0x10,
+                .pxl_clk = 4608000,
                .invert_pxl_clk = 1,
        },
        /* Sharp LK043T1DG01 */
@@ -185,13 +193,23 @@ static struct da8xx_panel known_lcd_panels[] = {
                .vfp = 2,
                .vbp = 2,
                .vsw = 10,
-                .pxl_clk = 0x12,
+                .pxl_clk = 7833600,
                .invert_pxl_clk = 0,
        },
 };
+/* Enable the Raster Engine of the LCD Controller */
+static inline void lcd_enable_raster(void)
+{
+        u32 reg;
+        reg = lcdc_read(LCD_RASTER_CTRL_REG);
+        if (!(reg & LCD_RASTER_ENABLE))
+                lcdc_write(reg | LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);
+}
 /* Disable the Raster Engine of the LCD Controller */
-static void lcd_disable_raster(struct da8xx_fb_par *par)
+static inline void lcd_disable_raster(void)
 {
        u32 reg;
@@ -443,14 +461,25 @@ static int fb_setcolreg(unsigned regno, unsigned red, unsigned green,
 static void lcd_reset(struct da8xx_fb_par *par)
 {
        /* Disable the Raster if previously Enabled */
-        if (lcdc_read(LCD_RASTER_CTRL_REG) & LCD_RASTER_ENABLE)
+        lcd_disable_raster();
-                lcd_disable_raster(par);
        /* DMA has to be disabled */
        lcdc_write(0, LCD_DMA_CTRL_REG);
        lcdc_write(0, LCD_RASTER_CTRL_REG);
 }
+static void lcd_calc_clk_divider(struct da8xx_fb_par *par)
+{
+        unsigned int lcd_clk, div;
+        lcd_clk = clk_get_rate(par->lcdc_clk);
+        div = lcd_clk / par->pxl_clk;
+        /* Configure the LCD clock divisor. */
+        lcdc_write(LCD_CLK_DIVISOR(div) |
+                        (LCD_RASTER_MODE & 0x1), LCD_CTRL_REG);
+}
 static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,
                struct da8xx_panel *panel)
 {
@@ -459,9 +488,8 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,
        lcd_reset(par);
-        /* Configure the LCD clock divisor. */
+        /* Calculate the divider */
-        lcdc_write(LCD_CLK_DIVISOR(panel->pxl_clk) |
+        lcd_calc_clk_divider(par);
-                        (LCD_RASTER_MODE & 0x1), LCD_CTRL_REG);
        if (panel->invert_pxl_clk)
                lcdc_write((lcdc_read(LCD_RASTER_TIMING_2_REG) |
@@ -513,13 +541,11 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,
 static irqreturn_t lcdc_irq_handler(int irq, void *arg)
 {
        u32 stat = lcdc_read(LCD_STAT_REG);
-        u32 reg;
        if ((stat & LCD_SYNC_LOST) && (stat & LCD_FIFO_UNDERFLOW)) {
-                reg = lcdc_read(LCD_RASTER_CTRL_REG);
+                lcd_disable_raster();
-                lcdc_write(reg & ~LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);
                lcdc_write(stat, LCD_STAT_REG);
-                lcdc_write(reg | LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);
+                lcd_enable_raster();
        } else
                lcdc_write(stat, LCD_STAT_REG);
@@ -574,6 +600,38 @@ static int fb_check_var(struct fb_var_screeninfo *var,
        return err;
 }
+#ifdef CONFIG_CPU_FREQ
+static int lcd_da8xx_cpufreq_transition(struct notifier_block *nb,
+                                     unsigned long val, void *data)
+{
+        struct da8xx_fb_par *par;
+        par = container_of(nb, struct da8xx_fb_par, freq_transition);
+        if (val == CPUFREQ_PRECHANGE) {
+                lcd_disable_raster();
+        } else if (val == CPUFREQ_POSTCHANGE) {
+                lcd_calc_clk_divider(par);
+                lcd_enable_raster();
+        }
+        return 0;
+}
+static inline int lcd_da8xx_cpufreq_register(struct da8xx_fb_par *par)
+{
+        par->freq_transition.notifier_call = lcd_da8xx_cpufreq_transition;
+        return cpufreq_register_notifier(&par->freq_transition,
+                                         CPUFREQ_TRANSITION_NOTIFIER);
+}
+static inline void lcd_da8xx_cpufreq_deregister(struct da8xx_fb_par *par)
+{
+        cpufreq_unregister_notifier(&par->freq_transition,
+                                    CPUFREQ_TRANSITION_NOTIFIER);
+}
+#endif
 static int __devexit fb_remove(struct platform_device *dev)
 {
        struct fb_info *info = dev_get_drvdata(&dev->dev);
@@ -581,8 +639,13 @@ static int __devexit fb_remove(struct platform_device *dev)
        if (info) {
                struct da8xx_fb_par *par = info->par;
-                if (lcdc_read(LCD_RASTER_CTRL_REG) & LCD_RASTER_ENABLE)
+#ifdef CONFIG_CPU_FREQ
-                        lcd_disable_raster(par);
+                lcd_da8xx_cpufreq_deregister(par);
+#endif
+                if (par->panel_power_ctrl)
+                        par->panel_power_ctrl(0);
+                lcd_disable_raster();
                lcdc_write(0, LCD_RASTER_CTRL_REG);
                /* disable DMA  */
@@ -639,6 +702,35 @@ static int fb_ioctl(struct fb_info *info, unsigned int cmd,
        return 0;
 }
+static int cfb_blank(int blank, struct fb_info *info)
+{
+        struct da8xx_fb_par *par = info->par;
+        int ret = 0;
+        if (par->blank == blank)
+                return 0;
+        par->blank = blank;
+        switch (blank) {
+        case FB_BLANK_UNBLANK:
+                if (par->panel_power_ctrl)
+                        par->panel_power_ctrl(1);
+                lcd_enable_raster();
+                break;
+        case FB_BLANK_POWERDOWN:
+                if (par->panel_power_ctrl)
+                        par->panel_power_ctrl(0);
+                lcd_disable_raster();
+                break;
+        default:
+                ret = -EINVAL;
+        }
+        return ret;
+}
 static struct fb_ops da8xx_fb_ops = {
        .owner = THIS_MODULE,
        .fb_check_var = fb_check_var,
@@ -647,6 +739,7 @@ static struct fb_ops da8xx_fb_ops = {
        .fb_fillrect = cfb_fillrect,
        .fb_copyarea = cfb_copyarea,
        .fb_imageblit = cfb_imageblit,
+        .fb_blank = cfb_blank,
 };
 static int __init fb_probe(struct platform_device *device)
@@ -721,6 +814,12 @@ static int __init fb_probe(struct platform_device *device)
        }
        par = da8xx_fb_info->par;
+        par->lcdc_clk = fb_clk;
+        par->pxl_clk = lcdc_info->pxl_clk;
+        if (fb_pdata->panel_power_ctrl) {
+                par->panel_power_ctrl = fb_pdata->panel_power_ctrl;
+                par->panel_power_ctrl(1);
+        }
        if (lcd_init(par, lcd_cfg, lcdc_info) < 0) {
                dev_err(&device->dev, "lcd_init failed\n");
@@ -754,8 +853,6 @@ static int __init fb_probe(struct platform_device *device)
        da8xx_fb_fix.smem_len = par->databuf_sz - par->palette_sz;
        da8xx_fb_fix.line_length = (lcdc_info->width * lcd_cfg->bpp) / 8;
-        par->lcdc_clk = fb_clk;
        par->irq = platform_get_irq(device, 0);
        if (par->irq < 0) {
                ret = -ENOENT;
@@ -814,12 +911,24 @@ static int __init fb_probe(struct platform_device *device)
                goto err_dealloc_cmap;
        }
+#ifdef CONFIG_CPU_FREQ
+        ret = lcd_da8xx_cpufreq_register(par);
+        if (ret) {
+                dev_err(&device->dev, "failed to register cpufreq\n");
+                goto err_cpu_freq;
+        }
+#endif
        /* enable raster engine */
-        lcdc_write(lcdc_read(LCD_RASTER_CTRL_REG) |
+        lcd_enable_raster();
-                        LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);
        return 0;
+#ifdef CONFIG_CPU_FREQ
+err_cpu_freq:
+        unregister_framebuffer(da8xx_fb_info);
+#endif
 err_dealloc_cmap:
        fb_dealloc_cmap(&da8xx_fb_info->cmap);
@@ -852,11 +961,35 @@ err_request_mem:
 #ifdef CONFIG_PM
 static int fb_suspend(struct platform_device *dev, pm_message_t state)
 {
-         return -EBUSY;
+        struct fb_info *info = platform_get_drvdata(dev);
+        struct da8xx_fb_par *par = info->par;
+        acquire_console_sem();
+        if (par->panel_power_ctrl)
+                par->panel_power_ctrl(0);
+        fb_set_suspend(info, 1);
+        lcd_disable_raster();
+        clk_disable(par->lcdc_clk);
+        release_console_sem();
+        return 0;
 }
 static int fb_resume(struct platform_device *dev)
 {
-         return -EBUSY;
+        struct fb_info *info = platform_get_drvdata(dev);
+        struct da8xx_fb_par *par = info->par;
+        acquire_console_sem();
+        if (par->panel_power_ctrl)
+                par->panel_power_ctrl(1);
+        clk_enable(par->lcdc_clk);
+        lcd_enable_raster();
+        fb_set_suspend(info, 0);
+        release_console_sem();
+        return 0;
 }
 #else
 #define fb_suspend NULL
diff --git a/drivers/video/ep93xx-fb.c b/drivers/video/ep93xx-fb.c
index bd9d46f95291..27aab4a06198 100644
--- a/drivers/video/ep93xx-fb.c
+++ b/drivers/video/ep93xx-fb.c
@@ -358,6 +358,8 @@ static int ep93xxfb_setcolreg(unsigned int regno, unsigned int red,
        switch (info->fix.visual) {
        case FB_VISUAL_PSEUDOCOLOR:
+                if (regno > 255)
+                        return 1;
                rgb = ((red & 0xff00) << 8) | (green & 0xff00) |
                        ((blue & 0xff00) >> 8);
diff --git a/drivers/video/geode/lxfb.h b/drivers/video/geode/lxfb.h
index fc68a8b0a144..cc781c00f75d 100644
--- a/drivers/video/geode/lxfb.h
+++ b/drivers/video/geode/lxfb.h
@@ -1,3 +1,13 @@
+/* Geode LX framebuffer driver
+ *
+ * Copyright (C) 2006-2007, Advanced Micro Devices,Inc.
+ * Copyright (c) 2008  Andres Salomon <dilinger@debian.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
 #ifndef _LXFB_H_
 #define _LXFB_H_
diff --git a/drivers/video/i810/i810_dvt.c b/drivers/video/i810/i810_dvt.c
index 27fa703a2e0a..b4b3670667ab 100644
--- a/drivers/video/i810/i810_dvt.c
+++ b/drivers/video/i810/i810_dvt.c
@@ -212,24 +212,29 @@ inline void round_off_yres(u32 *xres, u32 *yres)
        *yres = (*xres * 3) >> 2;
 }
-void i810fb_encode_registers(const struct fb_var_screeninfo *var,
+static int i810fb_find_best_mode(u32 xres, u32 yres, u32 pixclock)
-                             struct i810fb_par *par, u32 xres, u32 yres)
 { 
        u32 diff = 0, diff_best = 0xFFFFFFFF, i = 0, i_best = 0; 
-        u8 hfl;
+        u8 hfl = (u8) ((xres >> 3) - 1);
-        hfl = (u8) ((xres >> 3) - 1);
        for (i = 0; i < ARRAY_SIZE(std_modes); i++) { 
                if (std_modes[i].cr01 == hfl) { 
-                        if (std_modes[i].pixclock <= par->regs.pixclock)
+                        if (std_modes[i].pixclock <= pixclock)
-                                diff = par->regs.pixclock - 
+                                diff = pixclock - std_modes[i].pixclock;
-                                        std_modes[i].pixclock;
                        if (diff < diff_best) {  
                                i_best = i;
                                diff_best = diff;
                        }
                }
        }
+        return i_best;
+}
+void i810fb_encode_registers(const struct fb_var_screeninfo *var,
+                             struct i810fb_par *par, u32 xres, u32 yres)
+{
+        u32 i_best = i810fb_find_best_mode(xres, yres, par->regs.pixclock);
        par->regs = std_modes[i_best];
        /* overlay */
@@ -239,36 +244,36 @@ void i810fb_encode_registers(const struct fb_var_screeninfo *var,
 void i810fb_fill_var_timings(struct fb_var_screeninfo *var)
 {
-        struct i810fb_par par;
        u32 total, xres, yres;
+        u32 mode, pixclock;
        xres = var->xres;
        yres = var->yres;
        
-        par.regs.pixclock = 1000000000/var->pixclock;
+        pixclock = 1000000000 / var->pixclock;
-        i810fb_encode_registers(var, &par, xres, yres);
+        mode = i810fb_find_best_mode(xres, yres, pixclock);
        
-        total = ((par.regs.cr00 | (par.regs.cr35 & 1) << 8) + 3) << 3;
+        total = (std_modes[mode].cr00 | (std_modes[mode].cr35 & 1) << 8) + 3;
+        total <<= 3;
        
-        var->pixclock = 1000000000/par.regs.pixclock;
+        var->pixclock = 1000000000 / std_modes[mode].pixclock;
-        var->right_margin = (par.regs.cr04 << 3) - xres;
+        var->right_margin = (std_modes[mode].cr04 << 3) - xres;
-        var->hsync_len = ((par.regs.cr05 & 0x1F) - 
+        var->hsync_len = ((std_modes[mode].cr05 & 0x1F) -
-                               (par.regs.cr04 & 0x1F)) << 3;
+                         (std_modes[mode].cr04 & 0x1F)) << 3;
        var->left_margin = (total - (xres + var->right_margin + 
                                     var->hsync_len));
        var->sync = FB_SYNC_ON_GREEN;
-        if (~(par.regs.msr & (1 << 6)))
+        if (~(std_modes[mode].msr & (1 << 6)))
                var->sync |= FB_SYNC_HOR_HIGH_ACT;
-        if (~(par.regs.msr & (1 << 7)))
+        if (~(std_modes[mode].msr & (1 << 7)))
                var->sync |= FB_SYNC_VERT_HIGH_ACT;
+        total = (std_modes[mode].cr06 | (std_modes[mode].cr30 & 0xF)  << 8) + 2;
-        total = ((par.regs.cr06 | (par.regs.cr30 & 0x0F)  << 8)) + 2;
+        var->lower_margin = (std_modes[mode].cr10 |
-        var->lower_margin = (par.regs.cr10 | 
+                            (std_modes[mode].cr32 & 0x0F) << 8) - yres;
-                             (par.regs.cr32 & 0x0F) << 8) - yres;
+        var->vsync_len = (std_modes[mode].cr11 & 0x0F) -
-        var->vsync_len = (par.regs.cr11 & 0x0F) - (var->lower_margin & 0x0F);
+                         (var->lower_margin & 0x0F);
-        var->upper_margin = total - (yres + var->lower_margin + 
+        var->upper_margin = total - (yres + var->lower_margin + var->vsync_len);
-                                     var->vsync_len);
 }
 u32 i810_get_watermark(struct fb_var_screeninfo *var,
diff --git a/drivers/video/intelfb/intelfbdrv.c b/drivers/video/intelfb/intelfbdrv.c
index 0cafd642fbc0..5ba399991050 100644
--- a/drivers/video/intelfb/intelfbdrv.c
+++ b/drivers/video/intelfb/intelfbdrv.c
@@ -874,6 +874,9 @@ static int __devinit intelfb_pci_register(struct pci_dev *pdev,
        if (bailearly == 18)
                bailout(dinfo);
+        /* read active pipe */
+        dinfo->pipe = intelfbhw_active_pipe(&dinfo->save_state);
        /* Cursor initialisation */
        if (dinfo->hwcursor) {
                intelfbhw_cursor_init(dinfo);
diff --git a/drivers/video/intelfb/intelfbhw.c b/drivers/video/intelfb/intelfbhw.c
index 0689f97c5238..81627466804e 100644
--- a/drivers/video/intelfb/intelfbhw.c
+++ b/drivers/video/intelfb/intelfbhw.c
@@ -469,6 +469,32 @@ void intelfbhw_do_blank(int blank, struct fb_info *info)
 }
+/* Check which pipe is connected to an active display plane. */
+int intelfbhw_active_pipe(const struct intelfb_hwstate *hw)
+{
+        int pipe = -1;
+        /* keep old default behaviour - prefer PIPE_A */
+        if (hw->disp_b_ctrl & DISPPLANE_PLANE_ENABLE) {
+                pipe = (hw->disp_b_ctrl >> DISPPLANE_SEL_PIPE_SHIFT);
+                pipe &= PIPE_MASK;
+                if (unlikely(pipe == PIPE_A))
+                        return PIPE_A;
+        }
+        if (hw->disp_a_ctrl & DISPPLANE_PLANE_ENABLE) {
+                pipe = (hw->disp_a_ctrl >> DISPPLANE_SEL_PIPE_SHIFT);
+                pipe &= PIPE_MASK;
+                if (likely(pipe == PIPE_A))
+                        return PIPE_A;
+        }
+        /* Impossible that no pipe is selected - return PIPE_A */
+        WARN_ON(pipe == -1);
+        if (unlikely(pipe == -1))
+                pipe = PIPE_A;
+        return pipe;
+}
 void intelfbhw_setcolreg(struct intelfb_info *dinfo, unsigned regno,
                         unsigned red, unsigned green, unsigned blue,
                         unsigned transp)
@@ -1019,7 +1045,7 @@ int intelfbhw_mode_to_hw(struct intelfb_info *dinfo,
                         struct intelfb_hwstate *hw,
                         struct fb_var_screeninfo *var)
 {
-        int pipe = PIPE_A;
+        int pipe = intelfbhw_active_pipe(hw);
        u32 *dpll, *fp0, *fp1;
        u32 m1, m2, n, p1, p2, clock_target, clock;
        u32 hsync_start, hsync_end, hblank_start, hblank_end, htotal, hactive;
@@ -1033,12 +1059,6 @@ int intelfbhw_mode_to_hw(struct intelfb_info *dinfo,
        /* Disable VGA */
        hw->vgacntrl |= VGA_DISABLE;
-        /* Check whether pipe A or pipe B is enabled. */
-        if (hw->pipe_a_conf & PIPECONF_ENABLE)
-                pipe = PIPE_A;
-        else if (hw->pipe_b_conf & PIPECONF_ENABLE)
-                pipe = PIPE_B;
        /* Set which pipe's registers will be set. */
        if (pipe == PIPE_B) {
                dpll = &hw->dpll_b;
@@ -1262,7 +1282,6 @@ int intelfbhw_mode_to_hw(struct intelfb_info *dinfo,
 int intelfbhw_program_mode(struct intelfb_info *dinfo,
                           const struct intelfb_hwstate *hw, int blank)
 {
-        int pipe = PIPE_A;
        u32 tmp;
        const u32 *dpll, *fp0, *fp1, *pipe_conf;
        const u32 *hs, *ht, *hb, *vs, *vt, *vb, *ss;
@@ -1272,7 +1291,7 @@ int intelfbhw_program_mode(struct intelfb_info *dinfo,
        u32 src_size_reg;
        u32 count, tmp_val[3];
-        /* Assume single pipe, display plane A, analog CRT. */
+        /* Assume single pipe */
 #if VERBOSE > 0
        DBG_MSG("intelfbhw_program_mode\n");
@@ -1283,15 +1302,9 @@ int intelfbhw_program_mode(struct intelfb_info *dinfo,
        tmp |= VGA_DISABLE;
        OUTREG(VGACNTRL, tmp);
-        /* Check whether pipe A or pipe B is enabled. */
+        dinfo->pipe = intelfbhw_active_pipe(hw);
-        if (hw->pipe_a_conf & PIPECONF_ENABLE)
-                pipe = PIPE_A;
-        else if (hw->pipe_b_conf & PIPECONF_ENABLE)
-                pipe = PIPE_B;
-        dinfo->pipe = pipe;
-        if (pipe == PIPE_B) {
+        if (dinfo->pipe == PIPE_B) {
                dpll = &hw->dpll_b;
                fp0 = &hw->fpb0;
                fp1 = &hw->fpb1;
diff --git a/drivers/video/intelfb/intelfbhw.h b/drivers/video/intelfb/intelfbhw.h
index 0b076bac321b..216ca20f259f 100644
--- a/drivers/video/intelfb/intelfbhw.h
+++ b/drivers/video/intelfb/intelfbhw.h
@@ -604,5 +604,6 @@ extern void intelfbhw_cursor_reset(struct intelfb_info *dinfo);
 extern int intelfbhw_enable_irq(struct intelfb_info *dinfo);
 extern void intelfbhw_disable_irq(struct intelfb_info *dinfo);
 extern int intelfbhw_wait_for_vsync(struct intelfb_info *dinfo, u32 pipe);
+extern int intelfbhw_active_pipe(const struct intelfb_hwstate *hw);
 #endif /* _INTELFBHW_H */
diff --git a/drivers/video/matrox/g450_pll.c b/drivers/video/matrox/g450_pll.c
index 09f6e045d5be..c15f8a57498e 100644
--- a/drivers/video/matrox/g450_pll.c
+++ b/drivers/video/matrox/g450_pll.c
@@ -368,7 +368,8 @@ static int __g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
                                        M1064_XDVICLKCTRL_C1DVICLKEN |
                                        M1064_XDVICLKCTRL_DVILOOPCTL |
                                        M1064_XDVICLKCTRL_P1LOOPBWDTCTL;
-                                matroxfb_DAC_out(minfo, M1064_XDVICLKCTRL, tmp);
+                                /* Setting this breaks PC systems so don't do it */
+                                /* matroxfb_DAC_out(minfo, M1064_XDVICLKCTRL, tmp); */
                                matroxfb_DAC_out(minfo, M1064_XPWRCTRL,
                                                 xpwrctrl);
diff --git a/drivers/video/maxinefb.c b/drivers/video/maxinefb.c
index 5e91c2b30af9..7854c7a37dc5 100644
--- a/drivers/video/maxinefb.c
+++ b/drivers/video/maxinefb.c
@@ -92,6 +92,9 @@ static int maxinefb_setcolreg(unsigned regno, unsigned red, unsigned green,
        /* value to be written into the palette reg. */
        unsigned long hw_colorvalue = 0;
+        if (regno > 255)
+                return 1;
        red   >>= 8;    /* The cmap fields are 16 bits    */
        green >>= 8;    /* wide, but the harware colormap */
        blue  >>= 8;    /* registers are only 8 bits wide */
diff --git a/drivers/video/mb862xx/Makefile b/drivers/video/mb862xx/Makefile
index 07664814bb1d..d7777714166b 100644
--- a/drivers/video/mb862xx/Makefile
+++ b/drivers/video/mb862xx/Makefile
@@ -2,4 +2,4 @@
 # Makefile for the MB862xx framebuffer driver
 #
-obj-$(CONFIG_FB_MB862XX)        := mb862xxfb.o
+obj-$(CONFIG_FB_MB862XX)        := mb862xxfb.o mb862xxfb_accel.o
diff --git a/drivers/video/mb862xx/mb862xxfb.c b/drivers/video/mb862xx/mb862xxfb.c
index a28e3cfbbf70..fabb0c59a211 100644
--- a/drivers/video/mb862xx/mb862xxfb.c
+++ b/drivers/video/mb862xx/mb862xxfb.c
@@ -214,6 +214,8 @@ static int mb862xxfb_set_par(struct fb_info *fbi)
        unsigned long reg, sc;
        dev_dbg(par->dev, "%s\n", __func__);
+        if (par->type == BT_CORALP)
+                mb862xxfb_init_accel(fbi, fbi->var.xres);
        if (par->pre_init)
                return 0;
@@ -453,6 +455,18 @@ static ssize_t mb862xxfb_show_dispregs(struct device *dev,
                ptr += sprintf(ptr, "%08x = %08x\n",
                               reg, inreg(disp, reg));
+        for (reg = 0x400; reg <= 0x410; reg += 4)
+                ptr += sprintf(ptr, "geo %08x = %08x\n",
+                               reg, inreg(geo, reg));
+        for (reg = 0x400; reg <= 0x410; reg += 4)
+                ptr += sprintf(ptr, "draw %08x = %08x\n",
+                               reg, inreg(draw, reg));
+        for (reg = 0x440; reg <= 0x450; reg += 4)
+                ptr += sprintf(ptr, "draw %08x = %08x\n",
+                               reg, inreg(draw, reg));
        return ptr - buf;
 }
diff --git a/drivers/video/mb862xx/mb862xxfb.h b/drivers/video/mb862xx/mb862xxfb.h
index c4c8f4dd2217..d7e7cb76bbf2 100644
--- a/drivers/video/mb862xx/mb862xxfb.h
+++ b/drivers/video/mb862xx/mb862xxfb.h
@@ -61,6 +61,8 @@ struct mb862xxfb_par {
        u32                     pseudo_palette[16];
 };
+extern void mb862xxfb_init_accel(struct fb_info *info, int xres);
 #if defined(CONFIG_FB_MB862XX_LIME) && defined(CONFIG_FB_MB862XX_PCI_GDC)
 #error  "Select Lime GDC or CoralP/Carmine support, but not both together"
 #endif
diff --git a/drivers/video/mb862xx/mb862xxfb_accel.c b/drivers/video/mb862xx/mb862xxfb_accel.c
new file mode 100644
index 000000000000..049256052b1a
--- /dev/null
+++ b/drivers/video/mb862xx/mb862xxfb_accel.c
@@ -0,0 +1,331 @@
+/*
+ * drivers/mb862xx/mb862xxfb_accel.c
+ *
+ * Fujitsu Carmine/Coral-P(A)/Lime framebuffer driver acceleration support
+ *
+ * (C) 2007 Alexander Shishkin <virtuoso@slind.org>
+ * (C) 2009 Valentin Sitdikov <valentin.sitdikov@siemens.com>
+ * (C) 2009 Siemens AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/fb.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/pci.h>
+#if defined(CONFIG_OF)
+#include <linux/of_platform.h>
+#endif
+#include "mb862xxfb.h"
+#include "mb862xx_reg.h"
+#include "mb862xxfb_accel.h"
+static void mb862xxfb_write_fifo(u32 count, u32 *data, struct fb_info *info)
+{
+        struct mb862xxfb_par *par = info->par;
+        static u32 free;
+        u32 total = 0;
+        while (total < count) {
+                if (free) {
+                        outreg(geo, GDC_GEO_REG_INPUT_FIFO, data[total]);
+                        total++;
+                        free--;
+                } else {
+                        free = (u32) inreg(draw, GDC_REG_FIFO_COUNT);
+                }
+        }
+}
+static void mb86290fb_copyarea(struct fb_info *info,
+                               const struct fb_copyarea *area)
+{
+        __u32 cmd[6];
+        cmd[0] = (GDC_TYPE_SETREGISTER << 24) | (1 << 16) | GDC_REG_MODE_BITMAP;
+        /* Set raster operation */
+        cmd[1] = (2 << 7) | (GDC_ROP_COPY << 9);
+        cmd[2] = GDC_TYPE_BLTCOPYP << 24;
+        if (area->sx >= area->dx && area->sy >= area->dy)
+                cmd[2] |= GDC_CMD_BLTCOPY_TOP_LEFT << 16;
+        else if (area->sx >= area->dx && area->sy <= area->dy)
+                cmd[2] |= GDC_CMD_BLTCOPY_BOTTOM_LEFT << 16;
+        else if (area->sx <= area->dx && area->sy >= area->dy)
+                cmd[2] |= GDC_CMD_BLTCOPY_TOP_RIGHT << 16;
+        else
+                cmd[2] |= GDC_CMD_BLTCOPY_BOTTOM_RIGHT << 16;
+        cmd[3] = (area->sy << 16) | area->sx;
+        cmd[4] = (area->dy << 16) | area->dx;
+        cmd[5] = (area->height << 16) | area->width;
+        mb862xxfb_write_fifo(6, cmd, info);
+}
+/*
+ * Fill in the cmd array /GDC FIFO commands/ to draw a 1bit image.
+ * Make sure cmd has enough room!
+ */
+static void mb86290fb_imageblit1(u32 *cmd, u16 step, u16 dx, u16 dy,
+                                 u16 width, u16 height, u32 fgcolor,
+                                 u32 bgcolor, const struct fb_image *image,
+                                 struct fb_info *info)
+{
+        int i;
+        unsigned const char *line;
+        u16 bytes;
+        /* set colors and raster operation regs */
+        cmd[0] = (GDC_TYPE_SETREGISTER << 24) | (1 << 16) | GDC_REG_MODE_BITMAP;
+        /* Set raster operation */
+        cmd[1] = (2 << 7) | (GDC_ROP_COPY << 9);
+        cmd[2] =
+            (GDC_TYPE_SETCOLORREGISTER << 24) | (GDC_CMD_BODY_FORE_COLOR << 16);
+        cmd[3] = fgcolor;
+        cmd[4] =
+            (GDC_TYPE_SETCOLORREGISTER << 24) | (GDC_CMD_BODY_BACK_COLOR << 16);
+        cmd[5] = bgcolor;
+        i = 0;
+        line = image->data;
+        bytes = (image->width + 7) >> 3;
+        /* and the image */
+        cmd[6] = (GDC_TYPE_DRAWBITMAPP << 24) |
+            (GDC_CMD_BITMAP << 16) | (2 + (step * height));
+        cmd[7] = (dy << 16) | dx;
+        cmd[8] = (height << 16) | width;
+        while (i < height) {
+                memcpy(&cmd[9 + i * step], line, step << 2);
+#ifdef __LITTLE_ENDIAN
+                {
+                        int k = 0;
+                        for (k = 0; k < step; k++)
+                                cmd[9 + i * step + k] =
+                                    cpu_to_be32(cmd[9 + i * step + k]);
+                }
+#endif
+                line += bytes;
+                i++;
+        }
+}
+/*
+ * Fill in the cmd array /GDC FIFO commands/ to draw a 8bit image.
+ * Make sure cmd has enough room!
+ */
+static void mb86290fb_imageblit8(u32 *cmd, u16 step, u16 dx, u16 dy,
+                                 u16 width, u16 height, u32 fgcolor,
+                                 u32 bgcolor, const struct fb_image *image,
+                                 struct fb_info *info)
+{
+        int i, j;
+        unsigned const char *line, *ptr;
+        u16 bytes;
+        cmd[0] = (GDC_TYPE_DRAWBITMAPP << 24) |
+            (GDC_CMD_BLT_DRAW << 16) | (2 + (height * step));
+        cmd[1] = (dy << 16) | dx;
+        cmd[2] = (height << 16) | width;
+        i = 0;
+        line = ptr = image->data;
+        bytes = image->width;
+        while (i < height) {
+                ptr = line;
+                for (j = 0; j < step; j++) {
+                        cmd[3 + i * step + j] =
+                            (((u32 *) (info->pseudo_palette))[*ptr]) & 0xffff;
+                        ptr++;
+                        cmd[3 + i * step + j] |=
+                            ((((u32 *) (info->
+                                        pseudo_palette))[*ptr]) & 0xffff) << 16;
+                        ptr++;
+                }
+                line += bytes;
+                i++;
+        }
+}
+/*
+ * Fill in the cmd array /GDC FIFO commands/ to draw a 16bit image.
+ * Make sure cmd has enough room!
+ */
+static void mb86290fb_imageblit16(u32 *cmd, u16 step, u16 dx, u16 dy,
+                                  u16 width, u16 height, u32 fgcolor,
+                                  u32 bgcolor, const struct fb_image *image,
+                                  struct fb_info *info)
+{
+        int i;
+        unsigned const char *line;
+        u16 bytes;
+        i = 0;
+        line = image->data;
+        bytes = image->width << 1;
+        cmd[0] = (GDC_TYPE_DRAWBITMAPP << 24) |
+            (GDC_CMD_BLT_DRAW << 16) | (2 + step * height);
+        cmd[1] = (dy << 16) | dx;
+        cmd[2] = (height << 16) | width;
+        while (i < height) {
+                memcpy(&cmd[3 + i * step], line, step);
+                line += bytes;
+                i++;
+        }
+}
+static void mb86290fb_imageblit(struct fb_info *info,
+                                const struct fb_image *image)
+{
+        int mdr;
+        u32 *cmd = NULL;
+        void (*cmdfn) (u32 *, u16, u16, u16, u16, u16, u32, u32,
+                       const struct fb_image *, struct fb_info *) = NULL;
+        u32 cmdlen;
+        u32 fgcolor = 0, bgcolor = 0;
+        u16 step;
+        u16 width = image->width, height = image->height;
+        u16 dx = image->dx, dy = image->dy;
+        int x2, y2, vxres, vyres;
+        mdr = (GDC_ROP_COPY << 9);
+        x2 = image->dx + image->width;
+        y2 = image->dy + image->height;
+        vxres = info->var.xres_virtual;
+        vyres = info->var.yres_virtual;
+        x2 = min(x2, vxres);
+        y2 = min(y2, vyres);
+        width = x2 - dx;
+        height = y2 - dy;
+        switch (image->depth) {
+        case 1:
+                step = (width + 31) >> 5;
+                cmdlen = 9 + height * step;
+                cmdfn = mb86290fb_imageblit1;
+                if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
+                    info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
+                        fgcolor =
+                            ((u32 *) (info->pseudo_palette))[image->fg_color];
+                        bgcolor =
+                            ((u32 *) (info->pseudo_palette))[image->bg_color];
+                } else {
+                        fgcolor = image->fg_color;
+                        bgcolor = image->bg_color;
+                }
+                break;
+        case 8:
+                step = (width + 1) >> 1;
+                cmdlen = 3 + height * step;
+                cmdfn = mb86290fb_imageblit8;
+                break;
+        case 16:
+                step = (width + 1) >> 1;
+                cmdlen = 3 + height * step;
+                cmdfn = mb86290fb_imageblit16;
+                break;
+        default:
+                cfb_imageblit(info, image);
+                return;
+        }
+        cmd = kmalloc(cmdlen * 4, GFP_DMA);
+        if (!cmd)
+                return cfb_imageblit(info, image);
+        cmdfn(cmd, step, dx, dy, width, height, fgcolor, bgcolor, image, info);
+        mb862xxfb_write_fifo(cmdlen, cmd, info);
+        kfree(cmd);
+}
+static void mb86290fb_fillrect(struct fb_info *info,
+                               const struct fb_fillrect *rect)
+{
+        u32 x2, y2, vxres, vyres, height, width, fg;
+        u32 cmd[7];
+        vxres = info->var.xres_virtual;
+        vyres = info->var.yres_virtual;
+        if (!rect->width || !rect->height || rect->dx > vxres
+            || rect->dy > vyres)
+                return;
+        /* We could use hardware clipping but on many cards you get around
+         * hardware clipping by writing to framebuffer directly. */
+        x2 = rect->dx + rect->width;
+        y2 = rect->dy + rect->height;
+        x2 = min(x2, vxres);
+        y2 = min(y2, vyres);
+        width = x2 - rect->dx;
+        height = y2 - rect->dy;
+        if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
+            info->fix.visual == FB_VISUAL_DIRECTCOLOR)
+                fg = ((u32 *) (info->pseudo_palette))[rect->color];
+        else
+                fg = rect->color;
+        switch (rect->rop) {
+        case ROP_XOR:
+                /* Set raster operation */
+                cmd[1] = (2 << 7) | (GDC_ROP_XOR << 9);
+                break;
+        case ROP_COPY:
+                /* Set raster operation */
+                cmd[1] = (2 << 7) | (GDC_ROP_COPY << 9);
+                break;
+        }
+        cmd[0] = (GDC_TYPE_SETREGISTER << 24) | (1 << 16) | GDC_REG_MODE_BITMAP;
+        /* cmd[1] set earlier */
+        cmd[2] =
+            (GDC_TYPE_SETCOLORREGISTER << 24) | (GDC_CMD_BODY_FORE_COLOR << 16);
+        cmd[3] = fg;
+        cmd[4] = (GDC_TYPE_DRAWRECTP << 24) | (GDC_CMD_BLT_FILL << 16);
+        cmd[5] = (rect->dy << 16) | (rect->dx);
+        cmd[6] = (height << 16) | width;
+        mb862xxfb_write_fifo(7, cmd, info);
+}
+void mb862xxfb_init_accel(struct fb_info *info, int xres)
+{
+        struct mb862xxfb_par *par = info->par;
+        if (info->var.bits_per_pixel == 32) {
+                info->fbops->fb_fillrect = cfb_fillrect;
+                info->fbops->fb_copyarea = cfb_copyarea;
+                info->fbops->fb_imageblit = cfb_imageblit;
+        } else {
+                outreg(disp, GC_L0EM, 3);
+                info->fbops->fb_fillrect = mb86290fb_fillrect;
+                info->fbops->fb_copyarea = mb86290fb_copyarea;
+                info->fbops->fb_imageblit = mb86290fb_imageblit;
+        }
+        outreg(draw, GDC_REG_DRAW_BASE, 0);
+        outreg(draw, GDC_REG_MODE_MISC, 0x8000);
+        outreg(draw, GDC_REG_X_RESOLUTION, xres);
+        info->flags |=
+            FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT |
+            FBINFO_HWACCEL_IMAGEBLIT;
+        info->fix.accel = 0xff; /*FIXME: add right define */
+}
+EXPORT_SYMBOL(mb862xxfb_init_accel);
diff --git a/drivers/video/mb862xx/mb862xxfb_accel.h b/drivers/video/mb862xx/mb862xxfb_accel.h
new file mode 100644
index 000000000000..96a2dfef0f60
--- /dev/null
+++ b/drivers/video/mb862xx/mb862xxfb_accel.h
@@ -0,0 +1,203 @@
+#ifndef __MB826XXFB_ACCEL_H__
+#define __MB826XXFB_ACCEL_H__
+/* registers */
+#define GDC_GEO_REG_INPUT_FIFO 0x00000400L
+/* Special Registers */
+#define GDC_REG_CTRL                0x00000400L
+#define GDC_REG_FIFO_STATUS         0x00000404L
+#define GDC_REG_FIFO_COUNT          0x00000408L
+#define GDC_REG_SETUP_STATUS        0x0000040CL
+#define GDC_REG_DDA_STATUS          0x00000410L
+#define GDC_REG_ENGINE_STATUS       0x00000414L
+#define GDC_REG_ERROR_STATUS        0x00000418L
+#define GDC_REG_MODE_MISC           0x00000420L /* MDR0 */
+#define GDC_REG_MODE_LINE           0x00000424L /* MDR1 */
+#define GDC_REG_MODE_POLYGON        0x00000428L /* MDR2 */
+#define GDC_REG_MODE_TEXTURE        0x0000042CL /* MDR3 */
+#define GDC_REG_MODE_BITMAP         0x00000430L /* MDR4 */
+#define GDC_REG_MODE_EXTENSION      0x0000043CL /* MDR7 */
+/* Configuration Registers */
+#define GDC_REG_DRAW_BASE           0x00000440L
+#define GDC_REG_X_RESOLUTION        0x00000444L
+#define GDC_REG_Z_BASE              0x00000448L
+#define GDC_REG_TEXTURE_BASE        0x0000044CL
+#define GDC_REG_POLYGON_FLAG_BASE   0x00000450L
+#define GDC_REG_CLIP_XMIN           0x00000454L
+#define GDC_REG_CLIP_XMAX           0x00000458L
+#define GDC_REG_CLIP_YMIN           0x0000045CL
+#define GDC_REG_CLIP_YMAX           0x00000460L
+#define GDC_REG_TEXURE_SIZE         0x00000464L
+#define GDC_REG_TILE_SIZE           0x00000468L
+#define GDC_REG_TEX_BUF_OFFSET      0x0000046CL
+/* for MB86293 or later */
+#define GDC_REG_ALPHA_MAP_BASE      0x00000474L /* ABR */
+/* Constant Registers */
+#define GDC_REG_FOREGROUND_COLOR    0x00000480L
+#define GDC_REG_BACKGROUND_COLOR    0x00000484L
+#define GDC_REG_ALPHA               0x00000488L
+#define GDC_REG_LINE_PATTERN        0x0000048CL
+#define GDC_REG_TEX_BORDER_COLOR    0x00000494L
+#define GDC_REG_LINE_PATTERN_OFFSET 0x000003E0L
+/* Coomand Code */
+#define GDC_CMD_PIXEL                   0x00000000L
+#define GDC_CMD_PIXEL_Z                 0x00000001L
+#define GDC_CMD_X_VECTOR                0x00000020L
+#define GDC_CMD_Y_VECTOR                0x00000021L
+#define GDC_CMD_X_VECTOR_NOEND          0x00000022L
+#define GDC_CMD_Y_VECTOR_NOEND          0x00000023L
+#define GDC_CMD_X_VECTOR_BLPO           0x00000024L
+#define GDC_CMD_Y_VECTOR_BLPO           0x00000025L
+#define GDC_CMD_X_VECTOR_NOEND_BLPO     0x00000026L
+#define GDC_CMD_Y_VECTOR_NOEND_BLPO     0x00000027L
+#define GDC_CMD_AA_X_VECTOR             0x00000028L
+#define GDC_CMD_AA_Y_VECTOR             0x00000029L
+#define GDC_CMD_AA_X_VECTOR_NOEND       0x0000002AL
+#define GDC_CMD_AA_Y_VECTOR_NOEND       0x0000002BL
+#define GDC_CMD_AA_X_VECTOR_BLPO        0x0000002CL
+#define GDC_CMD_AA_Y_VECTOR_BLPO        0x0000002DL
+#define GDC_CMD_AA_X_VECTOR_NOEND_BLPO  0x0000002EL
+#define GDC_CMD_AA_Y_VECTOR_NOEND_BLPO  0x0000002FL
+#define GDC_CMD_0_VECTOR                0x00000030L
+#define GDC_CMD_1_VECTOR                0x00000031L
+#define GDC_CMD_0_VECTOR_NOEND          0x00000032L
+#define GDC_CMD_1_VECTOR_NOEND          0x00000033L
+#define GDC_CMD_0_VECTOR_BLPO           0x00000034L
+#define GDC_CMD_1_VECTOR_BLPO           0x00000035L
+#define GDC_CMD_0_VECTOR_NOEND_BLPO     0x00000036L
+#define GDC_CMD_1_VECTOR_NOEND_BLPO     0x00000037L
+#define GDC_CMD_AA_0_VECTOR             0x00000038L
+#define GDC_CMD_AA_1_VECTOR             0x00000039L
+#define GDC_CMD_AA_0_VECTOR_NOEND       0x0000003AL
+#define GDC_CMD_AA_1_VECTOR_NOEND       0x0000003BL
+#define GDC_CMD_AA_0_VECTOR_BLPO        0x0000003CL
+#define GDC_CMD_AA_1_VECTOR_BLPO        0x0000003DL
+#define GDC_CMD_AA_0_VECTOR_NOEND_BLPO  0x0000003EL
+#define GDC_CMD_AA_1_VECTOR_NOEND_BLPO  0x0000003FL
+#define GDC_CMD_BLT_FILL                0x00000041L
+#define GDC_CMD_BLT_DRAW                0x00000042L
+#define GDC_CMD_BITMAP                  0x00000043L
+#define GDC_CMD_BLTCOPY_TOP_LEFT        0x00000044L
+#define GDC_CMD_BLTCOPY_TOP_RIGHT       0x00000045L
+#define GDC_CMD_BLTCOPY_BOTTOM_LEFT     0x00000046L
+#define GDC_CMD_BLTCOPY_BOTTOM_RIGHT    0x00000047L
+#define GDC_CMD_LOAD_TEXTURE            0x00000048L
+#define GDC_CMD_LOAD_TILE               0x00000049L
+#define GDC_CMD_TRAP_RIGHT              0x00000060L
+#define GDC_CMD_TRAP_LEFT               0x00000061L
+#define GDC_CMD_TRIANGLE_FAN            0x00000062L
+#define GDC_CMD_FLAG_TRIANGLE_FAN       0x00000063L
+#define GDC_CMD_FLUSH_FB                0x000000C1L
+#define GDC_CMD_FLUSH_Z                 0x000000C2L
+#define GDC_CMD_POLYGON_BEGIN           0x000000E0L
+#define GDC_CMD_POLYGON_END             0x000000E1L
+#define GDC_CMD_CLEAR_POLY_FLAG         0x000000E2L
+#define GDC_CMD_NORMAL                  0x000000FFL
+#define GDC_CMD_VECTOR_BLPO_FLAG        0x00040000L
+#define GDC_CMD_FAST_VECTOR_BLPO_FLAG   0x00000004L
+/* for MB86293 or later */
+#define GDC_CMD_MDR1                            0x00000000L
+#define GDC_CMD_MDR1S                           0x00000002L
+#define GDC_CMD_MDR1B                           0x00000004L
+#define GDC_CMD_MDR2                            0x00000001L
+#define GDC_CMD_MDR2S                           0x00000003L
+#define GDC_CMD_MDR2TL                          0x00000007L
+#define GDC_CMD_GMDR1E                          0x00000010L
+#define GDC_CMD_GMDR2E                          0x00000020L
+#define GDC_CMD_OVERLAP_SHADOW_XY               0x00000000L
+#define GDC_CMD_OVERLAP_SHADOW_XY_COMPOSITION   0x00000001L
+#define GDC_CMD_OVERLAP_Z_PACKED_ONBS           0x00000007L
+#define GDC_CMD_OVERLAP_Z_ORIGIN                0x00000000L
+#define GDC_CMD_OVERLAP_Z_NON_TOPLEFT           0x00000001L
+#define GDC_CMD_OVERLAP_Z_BORDER                0x00000002L
+#define GDC_CMD_OVERLAP_Z_SHADOW                0x00000003L
+#define GDC_CMD_BLTCOPY_ALT_ALPHA               0x00000000L     /* Reserverd */
+#define GDC_CMD_DC_LOGOUT                       0x00000000L     /* Reserverd */
+#define GDC_CMD_BODY_FORE_COLOR                 0x00000000L
+#define GDC_CMD_BODY_BACK_COLOR                 0x00000001L
+#define GDC_CMD_SHADOW_FORE_COLOR               0x00000002L
+#define GDC_CMD_SHADOW_BACK_COLOR               0x00000003L
+#define GDC_CMD_BORDER_FORE_COLOR               0x00000004L
+#define GDC_CMD_BORDER_BACK_COLOR               0x00000005L
+/* Type Code Table */
+#define GDC_TYPE_G_NOP                                  0x00000020L
+#define GDC_TYPE_G_BEGIN                                0x00000021L
+#define GDC_TYPE_G_BEGINCONT                            0x00000022L
+#define GDC_TYPE_G_END                                  0x00000023L
+#define GDC_TYPE_G_VERTEX                               0x00000030L
+#define GDC_TYPE_G_VERTEXLOG                            0x00000032L
+#define GDC_TYPE_G_VERTEXNOPLOG                         0x00000033L
+#define GDC_TYPE_G_INIT                                 0x00000040L
+#define GDC_TYPE_G_VIEWPORT                             0x00000041L
+#define GDC_TYPE_G_DEPTHRANGE                           0x00000042L
+#define GDC_TYPE_G_LOADMATRIX                           0x00000043L
+#define GDC_TYPE_G_VIEWVOLUMEXYCLIP                     0x00000044L
+#define GDC_TYPE_G_VIEWVOLUMEZCLIP                      0x00000045L
+#define GDC_TYPE_G_VIEWVOLUMEWCLIP                      0x00000046L
+#define GDC_TYPE_SETLVERTEX2I                           0x00000072L
+#define GDC_TYPE_SETLVERTEX2IP                          0x00000073L
+#define GDC_TYPE_SETMODEREGISTER                        0x000000C0L
+#define GDC_TYPE_SETGMODEREGISTER                       0x000000C1L
+#define GDC_TYPE_OVERLAPXYOFFT                          0x000000C8L
+#define GDC_TYPE_OVERLAPZOFFT                           0x000000C9L
+#define GDC_TYPE_DC_LOGOUTADDR                          0x000000CCL
+#define GDC_TYPE_SETCOLORREGISTER                       0x000000CEL
+#define GDC_TYPE_G_BEGINE                               0x000000E1L
+#define GDC_TYPE_G_BEGINCONTE                           0x000000E2L
+#define GDC_TYPE_G_ENDE                                 0x000000E3L
+#define GDC_TYPE_DRAWPIXEL                              0x00000000L
+#define GDC_TYPE_DRAWPIXELZ                             0x00000001L
+#define GDC_TYPE_DRAWLINE                               0x00000002L
+#define GDC_TYPE_DRAWLINE2I                             0x00000003L
+#define GDC_TYPE_DRAWLINE2IP                            0x00000004L
+#define GDC_TYPE_DRAWTRAP                               0x00000005L
+#define GDC_TYPE_DRAWVERTEX2I                           0x00000006L
+#define GDC_TYPE_DRAWVERTEX2IP                          0x00000007L
+#define GDC_TYPE_DRAWRECTP                              0x00000009L
+#define GDC_TYPE_DRAWBITMAPP                            0x0000000BL
+#define GDC_TYPE_BLTCOPYP                               0x0000000DL
+#define GDC_TYPE_BLTCOPYALTERNATEP                      0x0000000FL
+#define GDC_TYPE_LOADTEXTUREP                           0x00000011L
+#define GDC_TYPE_BLTTEXTUREP                            0x00000013L
+#define GDC_TYPE_BLTCOPYALTALPHABLENDP                  0x0000001FL
+#define GDC_TYPE_SETVERTEX2I                            0x00000070L
+#define GDC_TYPE_SETVERTEX2IP                           0x00000071L
+#define GDC_TYPE_DRAW                                   0x000000F0L
+#define GDC_TYPE_SETREGISTER                            0x000000F1L
+#define GDC_TYPE_SYNC                                   0x000000FCL
+#define GDC_TYPE_INTERRUPT                              0x000000FDL
+#define GDC_TYPE_NOP                                    0x0
+/* Raster operation */
+#define GDC_ROP_CLEAR                   0x0000
+#define GDC_ROP_AND                     0x0001
+#define GDC_ROP_AND_REVERSE             0x0002
+#define GDC_ROP_COPY                    0x0003
+#define GDC_ROP_AND_INVERTED            0x0004
+#define GDC_ROP_NOP                     0x0005
+#define GDC_ROP_XOR                     0x0006
+#define GDC_ROP_OR                      0x0007
+#define GDC_ROP_NOR                     0x0008
+#define GDC_ROP_EQUIV                   0x0009
+#define GDC_ROP_INVERT                  0x000A
+#define GDC_ROP_OR_REVERSE              0x000B
+#define GDC_ROP_COPY_INVERTED           0x000C
+#define GDC_ROP_OR_INVERTED             0x000D
+#define GDC_ROP_NAND                    0x000E
+#define GDC_ROP_SET                     0x000F
+#endif
diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c
index 34e4e7995169..0129f1bc3522 100644
--- a/drivers/video/modedb.c
+++ b/drivers/video/modedb.c
@@ -13,6 +13,7 @@
 #include <linux/module.h>
 #include <linux/fb.h>
+#include <linux/kernel.h>
 #undef DEBUG
@@ -402,21 +403,6 @@ const struct fb_videomode vesa_modes[] = {
 EXPORT_SYMBOL(vesa_modes);
 #endif /* CONFIG_FB_MODE_HELPERS */
-static int my_atoi(const char *name)
-{
-    int val = 0;
-    for (;; name++) {
-        switch (*name) {
-            case '0' ... '9':
-                val = 10*val+(*name-'0');
-                break;
-            default:
-                return val;
-        }
-    }
-}
 /**
 *      fb_try_mode - test a video mode
 *      @var: frame buffer user defined part of display
@@ -539,7 +525,7 @@ int fb_find_mode(struct fb_var_screeninfo *var,
                    namelen = i;
                    if (!refresh_specified && !bpp_specified &&
                        !yres_specified) {
-                        refresh = my_atoi(&name[i+1]);
+                        refresh = simple_strtol(&name[i+1], NULL, 10);
                        refresh_specified = 1;
                        if (cvt || rb)
                            cvt = 0;
@@ -549,7 +535,7 @@ int fb_find_mode(struct fb_var_screeninfo *var,
                case '-':
                    namelen = i;
                    if (!bpp_specified && !yres_specified) {
-                        bpp = my_atoi(&name[i+1]);
+                        bpp = simple_strtol(&name[i+1], NULL, 10);
                        bpp_specified = 1;
                        if (cvt || rb)
                            cvt = 0;
@@ -558,7 +544,7 @@ int fb_find_mode(struct fb_var_screeninfo *var,
                    break;
                case 'x':
                    if (!yres_specified) {
-                        yres = my_atoi(&name[i+1]);
+                        yres = simple_strtol(&name[i+1], NULL, 10);
                        yres_specified = 1;
                    } else
                        goto done;
@@ -586,7 +572,7 @@ int fb_find_mode(struct fb_var_screeninfo *var,
            }
        }
        if (i < 0 && yres_specified) {
-            xres = my_atoi(name);
+            xres = simple_strtol(name, NULL, 10);
            res_specified = 1;
        }
 done:
diff --git a/drivers/video/pmag-ba-fb.c b/drivers/video/pmag-ba-fb.c
index 0573ec685a57..0f361b6100d2 100644
--- a/drivers/video/pmag-ba-fb.c
+++ b/drivers/video/pmag-ba-fb.c
@@ -98,7 +98,8 @@ static int pmagbafb_setcolreg(unsigned int regno, unsigned int red,
 {
        struct pmagbafb_par *par = info->par;
-        BUG_ON(regno >= info->cmap.len);
+        if (regno >= info->cmap.len)
+                return 1;
        red   >>= 8;    /* The cmap fields are 16 bits    */
        green >>= 8;    /* wide, but the hardware colormap */
diff --git a/drivers/video/pmagb-b-fb.c b/drivers/video/pmagb-b-fb.c
index 98748723af9f..2de0806421b4 100644
--- a/drivers/video/pmagb-b-fb.c
+++ b/drivers/video/pmagb-b-fb.c
@@ -102,7 +102,8 @@ static int pmagbbfb_setcolreg(unsigned int regno, unsigned int red,
 {
        struct pmagbbfb_par *par = info->par;
-        BUG_ON(regno >= info->cmap.len);
+        if (regno >= info->cmap.len)
+                return 1;
        red   >>= 8;    /* The cmap fields are 16 bits    */
        green >>= 8;    /* wide, but the hardware colormap */
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c
index b7e58059b592..415858b421b3 100644
--- a/drivers/video/pxafb.c
+++ b/drivers/video/pxafb.c
@@ -1221,13 +1221,14 @@ static void setup_smart_timing(struct pxafb_info *fbi,
 static int pxafb_smart_thread(void *arg)
 {
        struct pxafb_info *fbi = arg;
-        struct pxafb_mach_info *inf = fbi->dev->platform_data;
+        struct pxafb_mach_info *inf;
-        if (!fbi || !inf->smart_update) {
+        if (!fbi || !fbi->dev->platform_data->smart_update) {
                pr_err("%s: not properly initialized, thread terminated\n",
                                __func__);
                return -EINVAL;
        }
+        inf = fbi->dev->platform_data;
        pr_debug("%s(): task starting\n", __func__);
diff --git a/drivers/video/sh_mobile_lcdcfb.c b/drivers/video/sh_mobile_lcdcfb.c
index 8a65fb6648a6..a69830d26f7f 100644
--- a/drivers/video/sh_mobile_lcdcfb.c
+++ b/drivers/video/sh_mobile_lcdcfb.c
@@ -281,6 +281,7 @@ static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
                                       struct list_head *pagelist)
 {
        struct sh_mobile_lcdc_chan *ch = info->par;
+        struct sh_mobile_lcdc_board_cfg *bcfg = &ch->cfg.board_cfg;
        /* enable clocks before accessing hardware */
        sh_mobile_lcdc_clk_on(ch->lcdc);
@@ -305,10 +306,17 @@ static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
                /* trigger panel update */
                dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
+                if (bcfg->start_transfer)
+                        bcfg->start_transfer(bcfg->board_data, ch,
+                                             &sh_mobile_lcdc_sys_bus_ops);
                lcdc_write_chan(ch, LDSM2R, 1);
                dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
-        } else
+        } else {
+                if (bcfg->start_transfer)
+                        bcfg->start_transfer(bcfg->board_data, ch,
+                                             &sh_mobile_lcdc_sys_bus_ops);
                lcdc_write_chan(ch, LDSM2R, 1);
+        }
 }
 static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
diff --git a/drivers/video/sis/sis_main.c b/drivers/video/sis/sis_main.c
index a4e05e4d7501..9d2b6bc49036 100644
--- a/drivers/video/sis/sis_main.c
+++ b/drivers/video/sis/sis_main.c
@@ -2115,7 +2115,7 @@ sisfb_detect_VB_connect(struct sis_video_info *ivideo)
           if( (!(ivideo->vbflags2 & VB2_SISBRIDGE)) &&
               (!((ivideo->sisvga_engine == SIS_315_VGA) &&
                        (ivideo->vbflags2 & VB2_CHRONTEL))) ) {
-              if(ivideo->sisfb_tvstd & (TV_PALN | TV_PALN | TV_NTSCJ)) {
+              if(ivideo->sisfb_tvstd & (TV_PALM | TV_PALN | TV_NTSCJ)) {
                 ivideo->sisfb_tvstd = -1;
                 printk(KERN_ERR "sisfb: PALM/PALN/NTSCJ not supported\n");
              }
diff --git a/drivers/video/sm501fb.c b/drivers/video/sm501fb.c
index 924d79462780..35370d0ecf03 100644
--- a/drivers/video/sm501fb.c
+++ b/drivers/video/sm501fb.c
@@ -29,8 +29,8 @@
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 #include <linux/console.h>
+#include <linux/io.h>
-#include <asm/io.h>
 #include <asm/uaccess.h>
 #include <asm/div64.h>
@@ -66,6 +66,7 @@ struct sm501fb_info {
        struct fb_info          *fb[2];         /* fb info for both heads */
        struct resource         *fbmem_res;     /* framebuffer resource */
        struct resource         *regs_res;      /* registers resource */
+        struct resource         *regs2d_res;    /* 2d registers resource */
        struct sm501_platdata_fb *pdata;        /* our platform data */
        unsigned long            pm_crt_ctrl;   /* pm: crt ctrl save */
@@ -73,6 +74,7 @@ struct sm501fb_info {
        int                      irq;
        int                      swap_endian;   /* set to swap rgb=>bgr */
        void __iomem            *regs;          /* remapped registers */
+        void __iomem            *regs2d;        /* 2d remapped registers */
        void __iomem            *fbmem;         /* remapped framebuffer */
        size_t                   fbmem_len;     /* length of remapped region */
 };
@@ -123,9 +125,9 @@ static inline void sm501fb_sync_regs(struct sm501fb_info *info)
 * This is an attempt to lay out memory for the two framebuffers and
 * everything else
 *
- * |fbmem_res->start                                           fbmem_res->end|
+ * |fbmem_res->start                                           fbmem_res->end|
- * |                                                                         |
+ * |                                                                         |
- * |fb[0].fix.smem_start    |         |fb[1].fix.smem_start    |     2K      |
+ * |fb[0].fix.smem_start    |         |fb[1].fix.smem_start    |     2K      |
 * |-> fb[0].fix.smem_len <-| spare   |-> fb[1].fix.smem_len <-|-> cursors <-|
 *
 * The "spare" space is for the 2d engine data
@@ -1246,7 +1248,173 @@ static ssize_t sm501fb_debug_show_pnl(struct device *dev,
 static DEVICE_ATTR(fbregs_pnl, 0444, sm501fb_debug_show_pnl, NULL);
-/* framebuffer ops */
+/* acceleration operations */
+static int sm501fb_sync(struct fb_info *info)
+{
+        int count = 1000000;
+        struct sm501fb_par  *par = info->par;
+        struct sm501fb_info *fbi = par->info;
+        /* wait for the 2d engine to be ready */
+        while ((count > 0) &&
+               (readl(fbi->regs + SM501_SYSTEM_CONTROL) &
+                SM501_SYSCTRL_2D_ENGINE_STATUS) != 0)
+                count--;
+        if (count <= 0) {
+                dev_err(info->dev, "Timeout waiting for 2d engine sync\n");
+                return 1;
+        }
+        return 0;
+}
+static void sm501fb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
+{
+        struct sm501fb_par  *par = info->par;
+        struct sm501fb_info *fbi = par->info;
+        int width = area->width;
+        int height = area->height;
+        int sx = area->sx;
+        int sy = area->sy;
+        int dx = area->dx;
+        int dy = area->dy;
+        unsigned long rtl = 0;
+        /* source clip */
+        if ((sx >= info->var.xres_virtual) ||
+            (sy >= info->var.yres_virtual))
+                /* source Area not within virtual screen, skipping */
+                return;
+        if ((sx + width) >= info->var.xres_virtual)
+                width = info->var.xres_virtual - sx - 1;
+        if ((sy + height) >= info->var.yres_virtual)
+                height = info->var.yres_virtual - sy - 1;
+        /* dest clip */
+        if ((dx >= info->var.xres_virtual) ||
+            (dy >= info->var.yres_virtual))
+                /* Destination Area not within virtual screen, skipping */
+                return;
+        if ((dx + width) >= info->var.xres_virtual)
+                width = info->var.xres_virtual - dx - 1;
+        if ((dy + height) >= info->var.yres_virtual)
+                height = info->var.yres_virtual - dy - 1;
+        if ((sx < dx) || (sy < dy)) {
+                rtl = 1 << 27;
+                sx += width - 1;
+                dx += width - 1;
+                sy += height - 1;
+                dy += height - 1;
+        }
+        if (sm501fb_sync(info))
+                return;
+        /* set the base addresses */
+        writel(par->screen.sm_addr, fbi->regs2d + SM501_2D_SOURCE_BASE);
+        writel(par->screen.sm_addr, fbi->regs2d + SM501_2D_DESTINATION_BASE);
+        /* set the window width */
+        writel((info->var.xres << 16) | info->var.xres,
+               fbi->regs2d + SM501_2D_WINDOW_WIDTH);
+        /* set window stride */
+        writel((info->var.xres_virtual << 16) | info->var.xres_virtual,
+               fbi->regs2d + SM501_2D_PITCH);
+        /* set data format */
+        switch (info->var.bits_per_pixel) {
+        case 8:
+                writel(0, fbi->regs2d + SM501_2D_STRETCH);
+                break;
+        case 16:
+                writel(0x00100000, fbi->regs2d + SM501_2D_STRETCH);
+                break;
+        case 32:
+                writel(0x00200000, fbi->regs2d + SM501_2D_STRETCH);
+                break;
+        }
+        /* 2d compare mask */
+        writel(0xffffffff, fbi->regs2d + SM501_2D_COLOR_COMPARE_MASK);
+        /* 2d mask */
+        writel(0xffffffff, fbi->regs2d + SM501_2D_MASK);
+        /* source and destination x y */
+        writel((sx << 16) | sy, fbi->regs2d + SM501_2D_SOURCE);
+        writel((dx << 16) | dy, fbi->regs2d + SM501_2D_DESTINATION);
+        /* w/h */
+        writel((width << 16) | height, fbi->regs2d + SM501_2D_DIMENSION);
+        /* do area move */
+        writel(0x800000cc | rtl, fbi->regs2d + SM501_2D_CONTROL);
+}
+static void sm501fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
+{
+        struct sm501fb_par  *par = info->par;
+        struct sm501fb_info *fbi = par->info;
+        int width = rect->width, height = rect->height;
+        if ((rect->dx >= info->var.xres_virtual) ||
+            (rect->dy >= info->var.yres_virtual))
+                /* Rectangle not within virtual screen, skipping */
+                return;
+        if ((rect->dx + width) >= info->var.xres_virtual)
+                width = info->var.xres_virtual - rect->dx - 1;
+        if ((rect->dy + height) >= info->var.yres_virtual)
+                height = info->var.yres_virtual - rect->dy - 1;
+        if (sm501fb_sync(info))
+                return;
+        /* set the base addresses */
+        writel(par->screen.sm_addr, fbi->regs2d + SM501_2D_SOURCE_BASE);
+        writel(par->screen.sm_addr, fbi->regs2d + SM501_2D_DESTINATION_BASE);
+        /* set the window width */
+        writel((info->var.xres << 16) | info->var.xres,
+               fbi->regs2d + SM501_2D_WINDOW_WIDTH);
+        /* set window stride */
+        writel((info->var.xres_virtual << 16) | info->var.xres_virtual,
+               fbi->regs2d + SM501_2D_PITCH);
+        /* set data format */
+        switch (info->var.bits_per_pixel) {
+        case 8:
+                writel(0, fbi->regs2d + SM501_2D_STRETCH);
+                break;
+        case 16:
+                writel(0x00100000, fbi->regs2d + SM501_2D_STRETCH);
+                break;
+        case 32:
+                writel(0x00200000, fbi->regs2d + SM501_2D_STRETCH);
+                break;
+        }
+        /* 2d compare mask */
+        writel(0xffffffff, fbi->regs2d + SM501_2D_COLOR_COMPARE_MASK);
+        /* 2d mask */
+        writel(0xffffffff, fbi->regs2d + SM501_2D_MASK);
+        /* colour */
+        writel(rect->color, fbi->regs2d + SM501_2D_FOREGROUND);
+        /* x y */
+        writel((rect->dx << 16) | rect->dy, fbi->regs2d + SM501_2D_DESTINATION);
+        /* w/h */
+        writel((width << 16) | height, fbi->regs2d + SM501_2D_DIMENSION);
+        /* do rectangle fill */
+        writel(0x800100cc, fbi->regs2d + SM501_2D_CONTROL);
+}
 static struct fb_ops sm501fb_ops_crt = {
        .owner          = THIS_MODULE,
@@ -1256,9 +1424,10 @@ static struct fb_ops sm501fb_ops_crt = {
        .fb_setcolreg   = sm501fb_setcolreg,
        .fb_pan_display = sm501fb_pan_crt,
        .fb_cursor      = sm501fb_cursor,
-        .fb_fillrect    = cfb_fillrect,
+        .fb_fillrect    = sm501fb_fillrect,
-        .fb_copyarea    = cfb_copyarea,
+        .fb_copyarea    = sm501fb_copyarea,
        .fb_imageblit   = cfb_imageblit,
+        .fb_sync        = sm501fb_sync,
 };
 static struct fb_ops sm501fb_ops_pnl = {
@@ -1269,9 +1438,10 @@ static struct fb_ops sm501fb_ops_pnl = {
        .fb_blank       = sm501fb_blank_pnl,
        .fb_setcolreg   = sm501fb_setcolreg,
        .fb_cursor      = sm501fb_cursor,
-        .fb_fillrect    = cfb_fillrect,
+        .fb_fillrect    = sm501fb_fillrect,
-        .fb_copyarea    = cfb_copyarea,
+        .fb_copyarea    = sm501fb_copyarea,
        .fb_imageblit   = cfb_imageblit,
+        .fb_sync        = sm501fb_sync,
 };
 /* sm501_init_cursor
@@ -1329,7 +1499,8 @@ static int sm501fb_start(struct sm501fb_info *info,
                dev_warn(dev, "no irq for device\n");
        }
-        /* allocate, reserve and remap resources for registers */
+        /* allocate, reserve and remap resources for display
+         * controller registers */
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        if (res == NULL) {
                dev_err(dev, "no resource definition for registers\n");
@@ -1338,7 +1509,7 @@ static int sm501fb_start(struct sm501fb_info *info,
        }
        info->regs_res = request_mem_region(res->start,
-                                            res->end - res->start,
+                                            resource_size(res),
                                            pdev->name);
        if (info->regs_res == NULL) {
@@ -1347,37 +1518,63 @@ static int sm501fb_start(struct sm501fb_info *info,
                goto err_release;
        }
-        info->regs = ioremap(res->start, (res->end - res->start)+1);
+        info->regs = ioremap(res->start, resource_size(res));
        if (info->regs == NULL) {
                dev_err(dev, "cannot remap registers\n");
                ret = -ENXIO;
                goto err_regs_res;
        }
+        /* allocate, reserve and remap resources for 2d
+         * controller registers */
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+        if (res == NULL) {
+                dev_err(dev, "no resource definition for 2d registers\n");
+                ret = -ENOENT;
+                goto err_regs_map;
+        }
+        info->regs2d_res = request_mem_region(res->start,
+                                              resource_size(res),
+                                              pdev->name);
+        if (info->regs2d_res == NULL) {
+                dev_err(dev, "cannot claim registers\n");
+                ret = -ENXIO;
+                goto err_regs_map;
+        }
+        info->regs2d = ioremap(res->start, resource_size(res));
+        if (info->regs2d == NULL) {
+                dev_err(dev, "cannot remap registers\n");
+                ret = -ENXIO;
+                goto err_regs2d_res;
+        }
        /* allocate, reserve resources for framebuffer */
        res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
        if (res == NULL) {
                dev_err(dev, "no memory resource defined\n");
                ret = -ENXIO;
-                goto err_regs_map;
+                goto err_regs2d_map;
        }
        info->fbmem_res = request_mem_region(res->start,
-                                             (res->end - res->start)+1,
+                                             resource_size(res),
                                             pdev->name);
        if (info->fbmem_res == NULL) {
                dev_err(dev, "cannot claim framebuffer\n");
                ret = -ENXIO;
-                goto err_regs_map;
+                goto err_regs2d_map;
        }
-        info->fbmem = ioremap(res->start, (res->end - res->start)+1);
+        info->fbmem = ioremap(res->start, resource_size(res));
        if (info->fbmem == NULL) {
                dev_err(dev, "cannot remap framebuffer\n");
                goto err_mem_res;
        }
-        info->fbmem_len = (res->end - res->start)+1;
+        info->fbmem_len = resource_size(res);
        /* clear framebuffer memory - avoids garbage data on unused fb */
        memset(info->fbmem, 0, info->fbmem_len);
@@ -1389,8 +1586,10 @@ static int sm501fb_start(struct sm501fb_info *info,
        /* enable display controller */
        sm501_unit_power(dev->parent, SM501_GATE_DISPLAY, 1);
-        /* setup cursors */
+        /* enable 2d controller */
+        sm501_unit_power(dev->parent, SM501_GATE_2D_ENGINE, 1);
+        /* setup cursors */
        sm501_init_cursor(info->fb[HEAD_CRT], SM501_DC_CRT_HWC_ADDR);
        sm501_init_cursor(info->fb[HEAD_PANEL], SM501_DC_PANEL_HWC_ADDR);
@@ -1400,6 +1599,13 @@ static int sm501fb_start(struct sm501fb_info *info,
        release_resource(info->fbmem_res);
        kfree(info->fbmem_res);
+ err_regs2d_map:
+        iounmap(info->regs2d);
+ err_regs2d_res:
+        release_resource(info->regs2d_res);
+        kfree(info->regs2d_res);
 err_regs_map:
        iounmap(info->regs);
@@ -1420,6 +1626,10 @@ static void sm501fb_stop(struct sm501fb_info *info)
        release_resource(info->fbmem_res);
        kfree(info->fbmem_res);
+        iounmap(info->regs2d);
+        release_resource(info->regs2d_res);
+        kfree(info->regs2d_res);
        iounmap(info->regs);
        release_resource(info->regs_res);
        kfree(info->regs_res);
@@ -1486,7 +1696,8 @@ static int sm501fb_init_fb(struct fb_info *fb,
                par->ops.fb_cursor = NULL;
        fb->fbops = &par->ops;
-        fb->flags = FBINFO_FLAG_DEFAULT |
+        fb->flags = FBINFO_FLAG_DEFAULT | FBINFO_READS_FAST |
+                FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT |
                FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
        /* fixed data */
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c
index e3e597f937a5..09353e2b92f6 100644
--- a/drivers/video/via/lcd.c
+++ b/drivers/video/via/lcd.c
@@ -1134,45 +1134,33 @@ static void integrated_lvds_enable(struct lvds_setting_information
                            *plvds_setting_info,
                            struct lvds_chip_information *plvds_chip_info)
 {
-        bool turn_on_first_powersequence = false;
-        bool turn_on_second_powersequence = false;
        DEBUG_MSG(KERN_INFO "integrated_lvds_enable, out_interface:%d\n",
                  plvds_chip_info->output_interface);
        if (plvds_setting_info->lcd_mode == LCD_SPWG)
                viafb_write_reg_mask(CRD2, VIACR, 0x00, BIT0 + BIT1);
-         else
+        else
                viafb_write_reg_mask(CRD2, VIACR, 0x03, BIT0 + BIT1);
-        if (INTERFACE_LVDS0LVDS1 == plvds_chip_info->output_interface)
-                turn_on_first_powersequence = true;
-        if (INTERFACE_LVDS0 == plvds_chip_info->output_interface)
-                turn_on_first_powersequence = true;
-        if (INTERFACE_LVDS1 == plvds_chip_info->output_interface)
-                turn_on_second_powersequence = true;
-        if (turn_on_second_powersequence) {
-                /* Use second power sequence control: */
-                /* Use hardware control power sequence. */
-                viafb_write_reg_mask(CRD3, VIACR, 0, BIT0);
-                /* Turn on back light. */
-                viafb_write_reg_mask(CRD3, VIACR, 0, BIT6 + BIT7);
-                /* Turn on hardware power sequence. */
+        switch (plvds_chip_info->output_interface) {
-                viafb_write_reg_mask(CRD4, VIACR, 0x02, BIT1);
+        case INTERFACE_LVDS0LVDS1:
-        }
+        case INTERFACE_LVDS0:
-        if (turn_on_first_powersequence) {
                /* Use first power sequence control: */
                /* Use hardware control power sequence. */
                viafb_write_reg_mask(CR91, VIACR, 0, BIT0);
                /* Turn on back light. */
                viafb_write_reg_mask(CR91, VIACR, 0, BIT6 + BIT7);
                /* Turn on hardware power sequence. */
                viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
+                break;
+        case INTERFACE_LVDS1:
+                /* Use second power sequence control: */
+                /* Use hardware control power sequence. */
+                viafb_write_reg_mask(CRD3, VIACR, 0, BIT0);
+                /* Turn on back light. */
+                viafb_write_reg_mask(CRD3, VIACR, 0, BIT6 + BIT7);
+                /* Turn on hardware power sequence. */
+                viafb_write_reg_mask(CRD4, VIACR, 0x02, BIT1);
+                break;
        }
        /* Turn DFP High/Low pad on. */
diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c
index 56ec696e8afa..10d8c4b4baeb 100644
--- a/drivers/video/via/viafbdev.c
+++ b/drivers/video/via/viafbdev.c
@@ -1797,7 +1797,7 @@ static const struct file_operations viafb_vt1636_proc_fops = {
 static void viafb_init_proc(struct proc_dir_entry **viafb_entry)
 {
        *viafb_entry = proc_mkdir("viafb", NULL);
-        if (viafb_entry) {
+        if (*viafb_entry) {
                proc_create("dvp0", 0, *viafb_entry, &viafb_dvp0_proc_fops);
                proc_create("dvp1", 0, *viafb_entry, &viafb_dvp1_proc_fops);
                proc_create("dfph", 0, *viafb_entry, &viafb_dfph_proc_fops);
diff --git a/fs/aio.c b/fs/aio.c
index c30dfc006108..1cf12b3dd83a 100644
--- a/fs/aio.c
+++ b/fs/aio.c
@@ -711,10 +711,8 @@ static ssize_t aio_run_iocb(struct kiocb *iocb)
         */
        ret = retry(iocb);
-        if (ret != -EIOCBRETRY && ret != -EIOCBQUEUED) {
+        if (ret != -EIOCBRETRY && ret != -EIOCBQUEUED)
-                BUG_ON(!list_empty(&iocb->ki_wait.task_list));
                aio_complete(iocb, ret, 0);
-        }
 out:
        spin_lock_irq(&ctx->ctx_lock);
@@ -866,13 +864,6 @@ static void try_queue_kicked_iocb(struct kiocb *iocb)
        unsigned long flags;
        int run = 0;
-        /* We're supposed to be the only path putting the iocb back on the run
-         * list.  If we find that the iocb is *back* on a wait queue already
-         * than retry has happened before we could queue the iocb.  This also
-         * means that the retry could have completed and freed our iocb, no
-         * good. */
-        BUG_ON((!list_empty(&iocb->ki_wait.task_list)));
        spin_lock_irqsave(&ctx->ctx_lock, flags);
        /* set this inside the lock so that we can't race with aio_run_iocb()
         * testing it and putting the iocb on the run list under the lock */
@@ -886,7 +877,7 @@ static void try_queue_kicked_iocb(struct kiocb *iocb)
 /*
 * kick_iocb:
 *      Called typically from a wait queue callback context
- *      (aio_wake_function) to trigger a retry of the iocb.
+ *      to trigger a retry of the iocb.
 *      The retry is usually executed by aio workqueue
 *      threads (See aio_kick_handler).
 */
@@ -1520,31 +1511,6 @@ static ssize_t aio_setup_iocb(struct kiocb *kiocb)
        return 0;
 }
-/*
- * aio_wake_function:
- *      wait queue callback function for aio notification,
- *      Simply triggers a retry of the operation via kick_iocb.
- *
- *      This callback is specified in the wait queue entry in
- *      a kiocb.
- *
- * Note:
- * This routine is executed with the wait queue lock held.
- * Since kick_iocb acquires iocb->ctx->ctx_lock, it nests
- * the ioctx lock inside the wait queue lock. This is safe
- * because this callback isn't used for wait queues which
- * are nested inside ioctx lock (i.e. ctx->wait)
- */
-static int aio_wake_function(wait_queue_t *wait, unsigned mode,
-                             int sync, void *key)
-{
-        struct kiocb *iocb = container_of(wait, struct kiocb, ki_wait);
-        list_del_init(&wait->task_list);
-        kick_iocb(iocb);
-        return 1;
-}
 static void aio_batch_add(struct address_space *mapping,
                          struct hlist_head *batch_hash)
 {
@@ -1642,8 +1608,6 @@ static int io_submit_one(struct kioctx *ctx, struct iocb __user *user_iocb,
        req->ki_buf = (char __user *)(unsigned long)iocb->aio_buf;
        req->ki_left = req->ki_nbytes = iocb->aio_nbytes;
        req->ki_opcode = iocb->aio_lio_opcode;
-        init_waitqueue_func_entry(&req->ki_wait, aio_wake_function);
-        INIT_LIST_HEAD(&req->ki_wait.task_list);
        ret = aio_setup_iocb(req);
diff --git a/fs/autofs4/autofs_i.h b/fs/autofs4/autofs_i.h
index 8f7cdde41733..0118d67221b2 100644
--- a/fs/autofs4/autofs_i.h
+++ b/fs/autofs4/autofs_i.h
@@ -60,6 +60,11 @@ do {							\
                current->pid, __func__, ##args);        \
 } while (0)
+struct rehash_entry {
+        struct task_struct *task;
+        struct list_head list;
+};
 /* Unified info structure.  This is pointed to by both the dentry and
   inode structures.  Each file in the filesystem has an instance of this
   structure.  It holds a reference to the dentry, so dentries are never
@@ -75,6 +80,9 @@ struct autofs_info {
        struct completion expire_complete;
        struct list_head active;
+        int active_count;
+        struct list_head rehash_list;
        struct list_head expiring;
        struct autofs_sb_info *sbi;
@@ -95,6 +103,8 @@ struct autofs_info {
 #define AUTOFS_INF_EXPIRING     (1<<0) /* dentry is in the process of expiring */
 #define AUTOFS_INF_MOUNTPOINT   (1<<1) /* mountpoint status for direct expire */
+#define AUTOFS_INF_PENDING      (1<<2) /* dentry pending mount */
+#define AUTOFS_INF_REHASH       (1<<3) /* dentry in transit to ->lookup() */
 struct autofs_wait_queue {
        wait_queue_head_t queue;
@@ -161,7 +171,7 @@ static inline int autofs4_ispending(struct dentry *dentry)
 {
        struct autofs_info *inf = autofs4_dentry_ino(dentry);
-        if (dentry->d_flags & DCACHE_AUTOFS_PENDING)
+        if (inf->flags & AUTOFS_INF_PENDING)
                return 1;
        if (inf->flags & AUTOFS_INF_EXPIRING)
@@ -264,5 +274,31 @@ out:
        return ret;
 }
+static inline void autofs4_add_expiring(struct dentry *dentry)
+{
+        struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb);
+        struct autofs_info *ino = autofs4_dentry_ino(dentry);
+        if (ino) {
+                spin_lock(&sbi->lookup_lock);
+                if (list_empty(&ino->expiring))
+                        list_add(&ino->expiring, &sbi->expiring_list);
+                spin_unlock(&sbi->lookup_lock);
+        }
+        return;
+}
+static inline void autofs4_del_expiring(struct dentry *dentry)
+{
+        struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb);
+        struct autofs_info *ino = autofs4_dentry_ino(dentry);
+        if (ino) {
+                spin_lock(&sbi->lookup_lock);
+                if (!list_empty(&ino->expiring))
+                        list_del_init(&ino->expiring);
+                spin_unlock(&sbi->lookup_lock);
+        }
+        return;
+}
 void autofs4_dentry_release(struct dentry *);
 extern void autofs4_kill_sb(struct super_block *);
diff --git a/fs/autofs4/expire.c b/fs/autofs4/expire.c
index 3da18d453488..74bc9aa6df31 100644
--- a/fs/autofs4/expire.c
+++ b/fs/autofs4/expire.c
@@ -27,7 +27,7 @@ static inline int autofs4_can_expire(struct dentry *dentry,
                return 0;
        /* No point expiring a pending mount */
-        if (dentry->d_flags & DCACHE_AUTOFS_PENDING)
+        if (ino->flags & AUTOFS_INF_PENDING)
                return 0;
        if (!do_now) {
@@ -279,6 +279,7 @@ struct dentry *autofs4_expire_direct(struct super_block *sb,
                        root->d_mounted--;
                }
                ino->flags |= AUTOFS_INF_EXPIRING;
+                autofs4_add_expiring(root);
                init_completion(&ino->expire_complete);
                spin_unlock(&sbi->fs_lock);
                return root;
@@ -406,6 +407,7 @@ found:
                expired, (int)expired->d_name.len, expired->d_name.name);
        ino = autofs4_dentry_ino(expired);
        ino->flags |= AUTOFS_INF_EXPIRING;
+        autofs4_add_expiring(expired);
        init_completion(&ino->expire_complete);
        spin_unlock(&sbi->fs_lock);
        spin_lock(&dcache_lock);
@@ -433,7 +435,7 @@ int autofs4_expire_wait(struct dentry *dentry)
                DPRINTK("expire done status=%d", status);
-                if (d_unhashed(dentry))
+                if (d_unhashed(dentry) && IS_DEADDIR(dentry->d_inode))
                        return -EAGAIN;
                return status;
@@ -473,6 +475,7 @@ int autofs4_expire_run(struct super_block *sb,
        spin_lock(&sbi->fs_lock);
        ino = autofs4_dentry_ino(dentry);
        ino->flags &= ~AUTOFS_INF_EXPIRING;
+        autofs4_del_expiring(dentry);
        complete_all(&ino->expire_complete);
        spin_unlock(&sbi->fs_lock);
@@ -503,6 +506,7 @@ int autofs4_do_expire_multi(struct super_block *sb, struct vfsmount *mnt,
                        ino->flags &= ~AUTOFS_INF_MOUNTPOINT;
                }
                ino->flags &= ~AUTOFS_INF_EXPIRING;
+                autofs4_del_expiring(dentry);
                complete_all(&ino->expire_complete);
                spin_unlock(&sbi->fs_lock);
                dput(dentry);
diff --git a/fs/autofs4/inode.c b/fs/autofs4/inode.c
index 69c8142da838..d0a3de247458 100644
--- a/fs/autofs4/inode.c
+++ b/fs/autofs4/inode.c
@@ -49,6 +49,8 @@ struct autofs_info *autofs4_init_ino(struct autofs_info *ino,
                ino->dentry = NULL;
                ino->size = 0;
                INIT_LIST_HEAD(&ino->active);
+                INIT_LIST_HEAD(&ino->rehash_list);
+                ino->active_count = 0;
                INIT_LIST_HEAD(&ino->expiring);
                atomic_set(&ino->count, 0);
        }
diff --git a/fs/autofs4/root.c b/fs/autofs4/root.c
index b96a3c57359d..30cc9ddf4b70 100644
--- a/fs/autofs4/root.c
+++ b/fs/autofs4/root.c
@@ -72,6 +72,139 @@ const struct inode_operations autofs4_dir_inode_operations = {
        .rmdir          = autofs4_dir_rmdir,
 };
+static void autofs4_add_active(struct dentry *dentry)
+{
+        struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb);
+        struct autofs_info *ino = autofs4_dentry_ino(dentry);
+        if (ino) {
+                spin_lock(&sbi->lookup_lock);
+                if (!ino->active_count) {
+                        if (list_empty(&ino->active))
+                                list_add(&ino->active, &sbi->active_list);
+                }
+                ino->active_count++;
+                spin_unlock(&sbi->lookup_lock);
+        }
+        return;
+}
+static void autofs4_del_active(struct dentry *dentry)
+{
+        struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb);
+        struct autofs_info *ino = autofs4_dentry_ino(dentry);
+        if (ino) {
+                spin_lock(&sbi->lookup_lock);
+                ino->active_count--;
+                if (!ino->active_count) {
+                        if (!list_empty(&ino->active))
+                                list_del_init(&ino->active);
+                }
+                spin_unlock(&sbi->lookup_lock);
+        }
+        return;
+}
+static void autofs4_add_rehash_entry(struct autofs_info *ino,
+                                     struct rehash_entry *entry)
+{
+        entry->task = current;
+        INIT_LIST_HEAD(&entry->list);
+        list_add(&entry->list, &ino->rehash_list);
+        return;
+}
+static void autofs4_remove_rehash_entry(struct autofs_info *ino)
+{
+        struct list_head *head = &ino->rehash_list;
+        struct rehash_entry *entry;
+        list_for_each_entry(entry, head, list) {
+                if (entry->task == current) {
+                        list_del(&entry->list);
+                        kfree(entry);
+                        break;
+                }
+        }
+        return;
+}
+static void autofs4_remove_rehash_entrys(struct autofs_info *ino)
+{
+        struct autofs_sb_info *sbi = ino->sbi;
+        struct rehash_entry *entry, *next;
+        struct list_head *head;
+        spin_lock(&sbi->fs_lock);
+        spin_lock(&sbi->lookup_lock);
+        if (!(ino->flags & AUTOFS_INF_REHASH)) {
+                spin_unlock(&sbi->lookup_lock);
+                spin_unlock(&sbi->fs_lock);
+                return;
+        }
+        ino->flags &= ~AUTOFS_INF_REHASH;
+        head = &ino->rehash_list;
+        list_for_each_entry_safe(entry, next, head, list) {
+                list_del(&entry->list);
+                kfree(entry);
+        }
+        spin_unlock(&sbi->lookup_lock);
+        spin_unlock(&sbi->fs_lock);
+        dput(ino->dentry);
+        return;
+}
+static void autofs4_revalidate_drop(struct dentry *dentry,
+                                    struct rehash_entry *entry)
+{
+        struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb);
+        struct autofs_info *ino = autofs4_dentry_ino(dentry);
+        /*
+         * Add to the active list so we can pick this up in
+         * ->lookup(). Also add an entry to a rehash list so
+         * we know when there are no dentrys in flight so we
+         * know when we can rehash the dentry.
+         */
+        spin_lock(&sbi->lookup_lock);
+        if (list_empty(&ino->active))
+                list_add(&ino->active, &sbi->active_list);
+        autofs4_add_rehash_entry(ino, entry);
+        spin_unlock(&sbi->lookup_lock);
+        if (!(ino->flags & AUTOFS_INF_REHASH)) {
+                ino->flags |= AUTOFS_INF_REHASH;
+                dget(dentry);
+                spin_lock(&dentry->d_lock);
+                __d_drop(dentry);
+                spin_unlock(&dentry->d_lock);
+        }
+        return;
+}
+static void autofs4_revalidate_rehash(struct dentry *dentry)
+{
+        struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb);
+        struct autofs_info *ino = autofs4_dentry_ino(dentry);
+        if (ino->flags & AUTOFS_INF_REHASH) {
+                spin_lock(&sbi->lookup_lock);
+                autofs4_remove_rehash_entry(ino);
+                if (list_empty(&ino->rehash_list)) {
+                        spin_unlock(&sbi->lookup_lock);
+                        ino->flags &= ~AUTOFS_INF_REHASH;
+                        d_rehash(dentry);
+                        dput(ino->dentry);
+                } else
+                        spin_unlock(&sbi->lookup_lock);
+        }
+        return;
+}
+static unsigned int autofs4_need_mount(unsigned int flags)
+{
+        unsigned int res = 0;
+        if (flags & (TRIGGER_FLAGS | TRIGGER_INTENTS))
+                res = 1;
+        return res;
+}
 static int autofs4_dir_open(struct inode *inode, struct file *file)
 {
        struct dentry *dentry = file->f_path.dentry;
@@ -93,7 +226,7 @@ static int autofs4_dir_open(struct inode *inode, struct file *file)
         * it.
         */
        spin_lock(&dcache_lock);
-        if (!d_mountpoint(dentry) && __simple_empty(dentry)) {
+        if (!d_mountpoint(dentry) && list_empty(&dentry->d_subdirs)) {
                spin_unlock(&dcache_lock);
                return -ENOENT;
        }
@@ -103,7 +236,7 @@ out:
        return dcache_dir_open(inode, file);
 }
-static int try_to_fill_dentry(struct dentry *dentry, int flags)
+static int try_to_fill_dentry(struct dentry *dentry)
 {
        struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb);
        struct autofs_info *ino = autofs4_dentry_ino(dentry);
@@ -116,55 +249,17 @@ static int try_to_fill_dentry(struct dentry *dentry, int flags)
         * Wait for a pending mount, triggering one if there
         * isn't one already
         */
-        if (dentry->d_inode == NULL) {
+        DPRINTK("waiting for mount name=%.*s",
-                DPRINTK("waiting for mount name=%.*s",
+                 dentry->d_name.len, dentry->d_name.name);
-                         dentry->d_name.len, dentry->d_name.name);
-                status = autofs4_wait(sbi, dentry, NFY_MOUNT);
-                DPRINTK("mount done status=%d", status);
-                /* Turn this into a real negative dentry? */
-                if (status == -ENOENT) {
-                        spin_lock(&dentry->d_lock);
-                        dentry->d_flags &= ~DCACHE_AUTOFS_PENDING;
-                        spin_unlock(&dentry->d_lock);
-                        return status;
-                } else if (status) {
-                        /* Return a negative dentry, but leave it "pending" */
-                        return status;
-                }
-        /* Trigger mount for path component or follow link */
-        } else if (dentry->d_flags & DCACHE_AUTOFS_PENDING ||
-                        flags & (TRIGGER_FLAGS | TRIGGER_INTENTS) ||
-                        current->link_count) {
-                DPRINTK("waiting for mount name=%.*s",
-                        dentry->d_name.len, dentry->d_name.name);
-                spin_lock(&dentry->d_lock);
-                dentry->d_flags |= DCACHE_AUTOFS_PENDING;
-                spin_unlock(&dentry->d_lock);
-                status = autofs4_wait(sbi, dentry, NFY_MOUNT);
-                DPRINTK("mount done status=%d", status);
+        status = autofs4_wait(sbi, dentry, NFY_MOUNT);
-                if (status) {
+        DPRINTK("mount done status=%d", status);
-                        spin_lock(&dentry->d_lock);
-                        dentry->d_flags &= ~DCACHE_AUTOFS_PENDING;
-                        spin_unlock(&dentry->d_lock);
-                        return status;
-                }
-        }
-        /* Initialize expiry counter after successful mount */
-        if (ino)
-                ino->last_used = jiffies;
-        spin_lock(&dentry->d_lock);
+        /* Update expiry counter */
-        dentry->d_flags &= ~DCACHE_AUTOFS_PENDING;
+        ino->last_used = jiffies;
-        spin_unlock(&dentry->d_lock);
-        return 0;
+        return status;
 }
 /* For autofs direct mounts the follow link triggers the mount */
@@ -202,27 +297,39 @@ static void *autofs4_follow_link(struct dentry *dentry, struct nameidata *nd)
        autofs4_expire_wait(dentry);
        /* We trigger a mount for almost all flags */
-        lookup_type = nd->flags & (TRIGGER_FLAGS | TRIGGER_INTENTS);
+        lookup_type = autofs4_need_mount(nd->flags);
-        if (!(lookup_type || dentry->d_flags & DCACHE_AUTOFS_PENDING))
+        spin_lock(&sbi->fs_lock);
+        spin_lock(&dcache_lock);
+        if (!(lookup_type || ino->flags & AUTOFS_INF_PENDING)) {
+                spin_unlock(&dcache_lock);
+                spin_unlock(&sbi->fs_lock);
                goto follow;
+        }
        /*
         * If the dentry contains directories then it is an autofs
         * multi-mount with no root mount offset. So don't try to
         * mount it again.
         */
-        spin_lock(&dcache_lock);
+        if (ino->flags & AUTOFS_INF_PENDING ||
-        if (dentry->d_flags & DCACHE_AUTOFS_PENDING ||
+            (!d_mountpoint(dentry) && list_empty(&dentry->d_subdirs))) {
-            (!d_mountpoint(dentry) && __simple_empty(dentry))) {
+                ino->flags |= AUTOFS_INF_PENDING;
                spin_unlock(&dcache_lock);
+                spin_unlock(&sbi->fs_lock);
+                status = try_to_fill_dentry(dentry);
+                spin_lock(&sbi->fs_lock);
+                ino->flags &= ~AUTOFS_INF_PENDING;
+                spin_unlock(&sbi->fs_lock);
-                status = try_to_fill_dentry(dentry, 0);
                if (status)
                        goto out_error;
                goto follow;
        }
        spin_unlock(&dcache_lock);
+        spin_unlock(&sbi->fs_lock);
 follow:
        /*
         * If there is no root mount it must be an autofs
@@ -254,18 +361,47 @@ static int autofs4_revalidate(struct dentry *dentry, struct nameidata *nd)
 {
        struct inode *dir = dentry->d_parent->d_inode;
        struct autofs_sb_info *sbi = autofs4_sbi(dir->i_sb);
-        int oz_mode = autofs4_oz_mode(sbi);
+        struct autofs_info *ino = autofs4_dentry_ino(dentry);
+        struct rehash_entry *entry;
        int flags = nd ? nd->flags : 0;
-        int status = 1;
+        unsigned int mutex_aquired;
+        DPRINTK("name = %.*s oz_mode = %d",
+                dentry->d_name.len, dentry->d_name.name, oz_mode);
+        /* Daemon never causes a mount to trigger */
+        if (autofs4_oz_mode(sbi))
+                return 1;
+        entry = kmalloc(sizeof(struct rehash_entry), GFP_KERNEL);
+        if (!entry)
+                return -ENOMEM;
+        mutex_aquired = mutex_trylock(&dir->i_mutex);
-        /* Pending dentry */
        spin_lock(&sbi->fs_lock);
+        spin_lock(&dcache_lock);
+        /* Pending dentry */
        if (autofs4_ispending(dentry)) {
-                /* The daemon never causes a mount to trigger */
+                int status;
-                spin_unlock(&sbi->fs_lock);
-                if (oz_mode)
+                /*
-                        return 1;
+                 * We can only unhash and send this to ->lookup() if
+                 * the directory mutex is held over d_revalidate() and
+                 * ->lookup(). This prevents the VFS from incorrectly
+                 * seeing the dentry as non-existent.
+                 */
+                ino->flags |= AUTOFS_INF_PENDING;
+                if (!mutex_aquired) {
+                        autofs4_revalidate_drop(dentry, entry);
+                        spin_unlock(&dcache_lock);
+                        spin_unlock(&sbi->fs_lock);
+                        return 0;
+                }
+                spin_unlock(&dcache_lock);
+                spin_unlock(&sbi->fs_lock);
+                mutex_unlock(&dir->i_mutex);
+                kfree(entry);
                /*
                 * If the directory has gone away due to an expire
@@ -279,46 +415,82 @@ static int autofs4_revalidate(struct dentry *dentry, struct nameidata *nd)
                 * A zero status is success otherwise we have a
                 * negative error code.
                 */
-                status = try_to_fill_dentry(dentry, flags);
+                status = try_to_fill_dentry(dentry);
+                spin_lock(&sbi->fs_lock);
+                ino->flags &= ~AUTOFS_INF_PENDING;
+                spin_unlock(&sbi->fs_lock);
                if (status == 0)
                        return 1;
                return status;
        }
-        spin_unlock(&sbi->fs_lock);
-        /* Negative dentry.. invalidate if "old" */
-        if (dentry->d_inode == NULL)
-                return 0;
        /* Check for a non-mountpoint directory with no contents */
-        spin_lock(&dcache_lock);
        if (S_ISDIR(dentry->d_inode->i_mode) &&
-            !d_mountpoint(dentry) && 
+            !d_mountpoint(dentry) && list_empty(&dentry->d_subdirs)) {
-            __simple_empty(dentry)) {
                DPRINTK("dentry=%p %.*s, emptydir",
                         dentry, dentry->d_name.len, dentry->d_name.name);
-                spin_unlock(&dcache_lock);
-                /* The daemon never causes a mount to trigger */
+                if (autofs4_need_mount(flags) || current->link_count) {
-                if (oz_mode)
+                        int status;
-                        return 1;
-                /*
+                        /*
-                 * A zero status is success otherwise we have a
+                         * We can only unhash and send this to ->lookup() if
-                 * negative error code.
+                         * the directory mutex is held over d_revalidate() and
-                 */
+                         * ->lookup(). This prevents the VFS from incorrectly
-                status = try_to_fill_dentry(dentry, flags);
+                         * seeing the dentry as non-existent.
-                if (status == 0)
+                         */
-                        return 1;
+                        ino->flags |= AUTOFS_INF_PENDING;
+                        if (!mutex_aquired) {
+                                autofs4_revalidate_drop(dentry, entry);
+                                spin_unlock(&dcache_lock);
+                                spin_unlock(&sbi->fs_lock);
+                                return 0;
+                        }
+                        spin_unlock(&dcache_lock);
+                        spin_unlock(&sbi->fs_lock);
+                        mutex_unlock(&dir->i_mutex);
+                        kfree(entry);
-                return status;
+                        /*
+                         * A zero status is success otherwise we have a
+                         * negative error code.
+                         */
+                        status = try_to_fill_dentry(dentry);
+                        spin_lock(&sbi->fs_lock);
+                        ino->flags &= ~AUTOFS_INF_PENDING;
+                        spin_unlock(&sbi->fs_lock);
+                        if (status == 0)
+                                return 1;
+                        return status;
+                }
        }
        spin_unlock(&dcache_lock);
+        spin_unlock(&sbi->fs_lock);
+        if (mutex_aquired)
+                mutex_unlock(&dir->i_mutex);
+        kfree(entry);
        return 1;
 }
+static void autofs4_free_rehash_entrys(struct autofs_info *inf)
+{
+        struct list_head *head = &inf->rehash_list;
+        struct rehash_entry *entry, *next;
+        list_for_each_entry_safe(entry, next, head, list) {
+                list_del(&entry->list);
+                kfree(entry);
+        }
+}
 void autofs4_dentry_release(struct dentry *de)
 {
        struct autofs_info *inf;
@@ -337,6 +509,8 @@ void autofs4_dentry_release(struct dentry *de)
                                list_del(&inf->active);
                        if (!list_empty(&inf->expiring))
                                list_del(&inf->expiring);
+                        if (!list_empty(&inf->rehash_list))
+                                autofs4_free_rehash_entrys(inf);
                        spin_unlock(&sbi->lookup_lock);
                }
@@ -359,35 +533,52 @@ static const struct dentry_operations autofs4_dentry_operations = {
        .d_release      = autofs4_dentry_release,
 };
-static struct dentry *autofs4_lookup_active(struct autofs_sb_info *sbi, struct dentry *parent, struct qstr *name)
+static struct dentry *autofs4_lookup_active(struct dentry *dentry)
 {
+        struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb);
+        struct dentry *parent = dentry->d_parent;
+        struct qstr *name = &dentry->d_name;
        unsigned int len = name->len;
        unsigned int hash = name->hash;
        const unsigned char *str = name->name;
        struct list_head *p, *head;
+restart:
        spin_lock(&dcache_lock);
        spin_lock(&sbi->lookup_lock);
        head = &sbi->active_list;
        list_for_each(p, head) {
                struct autofs_info *ino;
-                struct dentry *dentry;
+                struct dentry *active;
                struct qstr *qstr;
                ino = list_entry(p, struct autofs_info, active);
-                dentry = ino->dentry;
+                active = ino->dentry;
-                spin_lock(&dentry->d_lock);
+                spin_lock(&active->d_lock);
                /* Already gone? */
-                if (atomic_read(&dentry->d_count) == 0)
+                if (atomic_read(&active->d_count) == 0)
                        goto next;
-                qstr = &dentry->d_name;
+                if (active->d_inode && IS_DEADDIR(active->d_inode)) {
+                        if (!list_empty(&ino->rehash_list)) {
+                                dget(active);
+                                spin_unlock(&active->d_lock);
+                                spin_unlock(&sbi->lookup_lock);
+                                spin_unlock(&dcache_lock);
+                                autofs4_remove_rehash_entrys(ino);
+                                dput(active);
+                                goto restart;
+                        }
+                        goto next;
+                }
+                qstr = &active->d_name;
-                if (dentry->d_name.hash != hash)
+                if (active->d_name.hash != hash)
                        goto next;
-                if (dentry->d_parent != parent)
+                if (active->d_parent != parent)
                        goto next;
                if (qstr->len != len)
@@ -395,15 +586,13 @@ static struct dentry *autofs4_lookup_active(struct autofs_sb_info *sbi, struct d
                if (memcmp(qstr->name, str, len))
                        goto next;
-                if (d_unhashed(dentry)) {
+                dget(active);
-                        dget(dentry);
+                spin_unlock(&active->d_lock);
-                        spin_unlock(&dentry->d_lock);
+                spin_unlock(&sbi->lookup_lock);
-                        spin_unlock(&sbi->lookup_lock);
+                spin_unlock(&dcache_lock);
-                        spin_unlock(&dcache_lock);
+                return active;
-                        return dentry;
-                }
 next:
-                spin_unlock(&dentry->d_lock);
+                spin_unlock(&active->d_lock);
        }
        spin_unlock(&sbi->lookup_lock);
        spin_unlock(&dcache_lock);
@@ -411,8 +600,11 @@ next:
        return NULL;
 }
-static struct dentry *autofs4_lookup_expiring(struct autofs_sb_info *sbi, struct dentry *parent, struct qstr *name)
+static struct dentry *autofs4_lookup_expiring(struct dentry *dentry)
 {
+        struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb);
+        struct dentry *parent = dentry->d_parent;
+        struct qstr *name = &dentry->d_name;
        unsigned int len = name->len;
        unsigned int hash = name->hash;
        const unsigned char *str = name->name;
@@ -423,23 +615,23 @@ static struct dentry *autofs4_lookup_expiring(struct autofs_sb_info *sbi, struct
        head = &sbi->expiring_list;
        list_for_each(p, head) {
                struct autofs_info *ino;
-                struct dentry *dentry;
+                struct dentry *expiring;
                struct qstr *qstr;
                ino = list_entry(p, struct autofs_info, expiring);
-                dentry = ino->dentry;
+                expiring = ino->dentry;
-                spin_lock(&dentry->d_lock);
+                spin_lock(&expiring->d_lock);
                /* Bad luck, we've already been dentry_iput */
-                if (!dentry->d_inode)
+                if (!expiring->d_inode)
                        goto next;
-                qstr = &dentry->d_name;
+                qstr = &expiring->d_name;
-                if (dentry->d_name.hash != hash)
+                if (expiring->d_name.hash != hash)
                        goto next;
-                if (dentry->d_parent != parent)
+                if (expiring->d_parent != parent)
                        goto next;
                if (qstr->len != len)
@@ -447,15 +639,13 @@ static struct dentry *autofs4_lookup_expiring(struct autofs_sb_info *sbi, struct
                if (memcmp(qstr->name, str, len))
                        goto next;
-                if (d_unhashed(dentry)) {
+                dget(expiring);
-                        dget(dentry);
+                spin_unlock(&expiring->d_lock);
-                        spin_unlock(&dentry->d_lock);
+                spin_unlock(&sbi->lookup_lock);
-                        spin_unlock(&sbi->lookup_lock);
+                spin_unlock(&dcache_lock);
-                        spin_unlock(&dcache_lock);
+                return expiring;
-                        return dentry;
-                }
 next:
-                spin_unlock(&dentry->d_lock);
+                spin_unlock(&expiring->d_lock);
        }
        spin_unlock(&sbi->lookup_lock);
        spin_unlock(&dcache_lock);
@@ -463,13 +653,56 @@ next:
        return NULL;
 }
+static struct autofs_info *init_new_dentry(struct autofs_sb_info *sbi,
+                                           struct dentry *dentry, int oz_mode)
+{
+        struct autofs_info *ino;
+        /*
+         * Mark the dentry incomplete but don't hash it. We do this
+         * to serialize our inode creation operations (symlink and
+         * mkdir) which prevents deadlock during the callback to
+         * the daemon. Subsequent user space lookups for the same
+         * dentry are placed on the wait queue while the daemon
+         * itself is allowed passage unresticted so the create
+         * operation itself can then hash the dentry. Finally,
+         * we check for the hashed dentry and return the newly
+         * hashed dentry.
+         */
+        dentry->d_op = &autofs4_root_dentry_operations;
+        /*
+         * And we need to ensure that the same dentry is used for
+         * all following lookup calls until it is hashed so that
+         * the dentry flags are persistent throughout the request.
+         */
+        ino = autofs4_init_ino(NULL, sbi, 0555);
+        if (!ino)
+                return ERR_PTR(-ENOMEM);
+        dentry->d_fsdata = ino;
+        ino->dentry = dentry;
+        /*
+         * Only set the mount pending flag for new dentrys not created
+         * by the daemon.
+         */
+        if (!oz_mode)
+                ino->flags |= AUTOFS_INF_PENDING;
+        d_instantiate(dentry, NULL);
+        return ino;
+}
 /* Lookups in the root directory */
 static struct dentry *autofs4_lookup(struct inode *dir, struct dentry *dentry, struct nameidata *nd)
 {
        struct autofs_sb_info *sbi;
        struct autofs_info *ino;
-        struct dentry *expiring, *unhashed;
+        struct dentry *expiring, *active;
        int oz_mode;
+        int status = 0;
        DPRINTK("name = %.*s",
                dentry->d_name.len, dentry->d_name.name);
@@ -484,123 +717,100 @@ static struct dentry *autofs4_lookup(struct inode *dir, struct dentry *dentry, s
        DPRINTK("pid = %u, pgrp = %u, catatonic = %d, oz_mode = %d",
                 current->pid, task_pgrp_nr(current), sbi->catatonic, oz_mode);
-        unhashed = autofs4_lookup_active(sbi, dentry->d_parent, &dentry->d_name);
+        spin_lock(&sbi->fs_lock);
-        if (unhashed)
+        active = autofs4_lookup_active(dentry);
-                dentry = unhashed;
+        if (active) {
-        else {
+                dentry = active;
-                /*
+                ino = autofs4_dentry_ino(dentry);
-                 * Mark the dentry incomplete but don't hash it. We do this
+                /* If this came from revalidate, rehash it */
-                 * to serialize our inode creation operations (symlink and
+                autofs4_revalidate_rehash(dentry);
-                 * mkdir) which prevents deadlock during the callback to
+                spin_unlock(&sbi->fs_lock);
-                 * the daemon. Subsequent user space lookups for the same
+        } else {
-                 * dentry are placed on the wait queue while the daemon
+                spin_unlock(&sbi->fs_lock);
-                 * itself is allowed passage unresticted so the create
+                ino = init_new_dentry(sbi, dentry, oz_mode);
-                 * operation itself can then hash the dentry. Finally,
+                if (IS_ERR(ino))
-                 * we check for the hashed dentry and return the newly
+                        return (struct dentry *) ino;
-                 * hashed dentry.
-                 */
-                dentry->d_op = &autofs4_root_dentry_operations;
-                /*
-                 * And we need to ensure that the same dentry is used for
-                 * all following lookup calls until it is hashed so that
-                 * the dentry flags are persistent throughout the request.
-                 */
-                ino = autofs4_init_ino(NULL, sbi, 0555);
-                if (!ino)
-                        return ERR_PTR(-ENOMEM);
-                dentry->d_fsdata = ino;
-                ino->dentry = dentry;
-                spin_lock(&sbi->lookup_lock);
-                list_add(&ino->active, &sbi->active_list);
-                spin_unlock(&sbi->lookup_lock);
-                d_instantiate(dentry, NULL);
        }
+        autofs4_add_active(dentry);
        if (!oz_mode) {
+                expiring = autofs4_lookup_expiring(dentry);
                mutex_unlock(&dir->i_mutex);
-                expiring = autofs4_lookup_expiring(sbi,
-                                                   dentry->d_parent,
-                                                   &dentry->d_name);
                if (expiring) {
                        /*
                         * If we are racing with expire the request might not
                         * be quite complete but the directory has been removed
                         * so it must have been successful, so just wait for it.
                         */
-                        ino = autofs4_dentry_ino(expiring);
                        autofs4_expire_wait(expiring);
-                        spin_lock(&sbi->lookup_lock);
-                        if (!list_empty(&ino->expiring))
-                                list_del_init(&ino->expiring);
-                        spin_unlock(&sbi->lookup_lock);
                        dput(expiring);
                }
+                status = try_to_fill_dentry(dentry);
-                spin_lock(&dentry->d_lock);
-                dentry->d_flags |= DCACHE_AUTOFS_PENDING;
-                spin_unlock(&dentry->d_lock);
-                if (dentry->d_op && dentry->d_op->d_revalidate)
-                        (dentry->d_op->d_revalidate)(dentry, nd);
                mutex_lock(&dir->i_mutex);
+                spin_lock(&sbi->fs_lock);
+                ino->flags &= ~AUTOFS_INF_PENDING;
+                spin_unlock(&sbi->fs_lock);
        }
+        autofs4_del_active(dentry);
        /*
-         * If we are still pending, check if we had to handle
+         * If we had a mount fail, check if we had to handle
         * a signal. If so we can force a restart..
         */
-        if (dentry->d_flags & DCACHE_AUTOFS_PENDING) {
+        if (status) {
                /* See if we were interrupted */
                if (signal_pending(current)) {
                        sigset_t *sigset = &current->pending.signal;
                        if (sigismember (sigset, SIGKILL) ||
                            sigismember (sigset, SIGQUIT) ||
                            sigismember (sigset, SIGINT)) {
-                            if (unhashed)
+                            if (active)
-                                dput(unhashed);
+                                dput(active);
                            return ERR_PTR(-ERESTARTNOINTR);
                        }
                }
-                if (!oz_mode) {
+        }
-                        spin_lock(&dentry->d_lock);
-                        dentry->d_flags &= ~DCACHE_AUTOFS_PENDING;
+        /*
-                        spin_unlock(&dentry->d_lock);
+         * User space can (and has done in the past) remove and re-create
+         * this directory during the callback. This can leave us with an
+         * unhashed dentry, but a successful mount!  So we need to
+         * perform another cached lookup in case the dentry now exists.
+         */
+        if (!oz_mode && !have_submounts(dentry)) {
+                struct dentry *new;
+                new = d_lookup(dentry->d_parent, &dentry->d_name);
+                if (new) {
+                        if (active)
+                                dput(active);
+                        return new;
+                } else {
+                        if (!status)
+                                status = -ENOENT;
                }
        }
        /*
-         * If this dentry is unhashed, then we shouldn't honour this
+         * If we had a mount failure, return status to user space.
-         * lookup.  Returning ENOENT here doesn't do the right thing
+         * If the mount succeeded and we used a dentry from the active queue
-         * for all system calls, but it should be OK for the operations
+         * return it.
-         * we permit from an autofs.
         */
-        if (!oz_mode && d_unhashed(dentry)) {
+        if (status) {
+                dentry = ERR_PTR(status);
+                if (active)
+                        dput(active);
+                return dentry;
+        } else {
                /*
-                 * A user space application can (and has done in the past)
+                 * Valid successful mount, return active dentry or NULL
-                 * remove and re-create this directory during the callback.
+                 * for a new dentry.
-                 * This can leave us with an unhashed dentry, but a
-                 * successful mount!  So we need to perform another
-                 * cached lookup in case the dentry now exists.
                 */
-                struct dentry *parent = dentry->d_parent;
+                if (active)
-                struct dentry *new = d_lookup(parent, &dentry->d_name);
+                        return active;
-                if (new != NULL)
-                        dentry = new;
-                else
-                        dentry = ERR_PTR(-ENOENT);
-                if (unhashed)
-                        dput(unhashed);
-                return dentry;
        }
-        if (unhashed)
-                return unhashed;
        return NULL;
 }
@@ -624,11 +834,6 @@ static int autofs4_dir_symlink(struct inode *dir,
        if (!ino)
                return -ENOMEM;
-        spin_lock(&sbi->lookup_lock);
-        if (!list_empty(&ino->active))
-                list_del_init(&ino->active);
-        spin_unlock(&sbi->lookup_lock);
        ino->size = strlen(symname);
        cp = kmalloc(ino->size + 1, GFP_KERNEL);
        if (!cp) {
@@ -705,10 +910,6 @@ static int autofs4_dir_unlink(struct inode *dir, struct dentry *dentry)
        dir->i_mtime = CURRENT_TIME;
        spin_lock(&dcache_lock);
-        spin_lock(&sbi->lookup_lock);
-        if (list_empty(&ino->expiring))
-                list_add(&ino->expiring, &sbi->expiring_list);
-        spin_unlock(&sbi->lookup_lock);
        spin_lock(&dentry->d_lock);
        __d_drop(dentry);
        spin_unlock(&dentry->d_lock);
@@ -734,10 +935,6 @@ static int autofs4_dir_rmdir(struct inode *dir, struct dentry *dentry)
                spin_unlock(&dcache_lock);
                return -ENOTEMPTY;
        }
-        spin_lock(&sbi->lookup_lock);
-        if (list_empty(&ino->expiring))
-                list_add(&ino->expiring, &sbi->expiring_list);
-        spin_unlock(&sbi->lookup_lock);
        spin_lock(&dentry->d_lock);
        __d_drop(dentry);
        spin_unlock(&dentry->d_lock);
@@ -775,11 +972,6 @@ static int autofs4_dir_mkdir(struct inode *dir, struct dentry *dentry, int mode)
        if (!ino)
                return -ENOMEM;
-        spin_lock(&sbi->lookup_lock);
-        if (!list_empty(&ino->active))
-                list_del_init(&ino->active);
-        spin_unlock(&sbi->lookup_lock);
        inode = autofs4_get_inode(dir->i_sb, ino);
        if (!inode) {
                if (!dentry->d_fsdata)
diff --git a/fs/binfmt_elf.c b/fs/binfmt_elf.c
index d15ea1790bfb..97b6e9efeb7f 100644
--- a/fs/binfmt_elf.c
+++ b/fs/binfmt_elf.c
@@ -44,7 +44,7 @@ static unsigned long elf_map(struct file *, unsigned long, struct elf_phdr *,
 * If we don't support core dumping, then supply a NULL so we
 * don't even try.
 */
-#if defined(USE_ELF_CORE_DUMP) && defined(CONFIG_ELF_CORE)
+#ifdef CONFIG_ELF_CORE
 static int elf_core_dump(long signr, struct pt_regs *regs, struct file *file, unsigned long limit);
 #else
 #define elf_core_dump   NULL
@@ -1101,12 +1101,7 @@ out:
        return error;
 }
-/*
+#ifdef CONFIG_ELF_CORE
- * Note that some platforms still use traditional core dumps and not
- * the ELF core dump.  Each platform can select it as appropriate.
- */
-#if defined(USE_ELF_CORE_DUMP) && defined(CONFIG_ELF_CORE)
 /*
 * ELF core dumper
 *
@@ -2063,7 +2058,7 @@ out:
        return has_dumped;
 }
-#endif          /* USE_ELF_CORE_DUMP */
+#endif          /* CONFIG_ELF_CORE */
 static int __init init_elf_binfmt(void)
 {
diff --git a/fs/binfmt_elf_fdpic.c b/fs/binfmt_elf_fdpic.c
index 79d2b1aa389f..7b055385db8e 100644
--- a/fs/binfmt_elf_fdpic.c
+++ b/fs/binfmt_elf_fdpic.c
@@ -75,14 +75,14 @@ static int elf_fdpic_map_file_constdisp_on_uclinux(struct elf_fdpic_params *,
 static int elf_fdpic_map_file_by_direct_mmap(struct elf_fdpic_params *,
                                             struct file *, struct mm_struct *);
-#if defined(USE_ELF_CORE_DUMP) && defined(CONFIG_ELF_CORE)
+#ifdef CONFIG_ELF_CORE
 static int elf_fdpic_core_dump(long, struct pt_regs *, struct file *, unsigned long limit);
 #endif
 static struct linux_binfmt elf_fdpic_format = {
        .module         = THIS_MODULE,
        .load_binary    = load_elf_fdpic_binary,
-#if defined(USE_ELF_CORE_DUMP) && defined(CONFIG_ELF_CORE)
+#ifdef CONFIG_ELF_CORE
        .core_dump      = elf_fdpic_core_dump,
 #endif
        .min_coredump   = ELF_EXEC_PAGESIZE,
@@ -1201,7 +1201,7 @@ static int elf_fdpic_map_file_by_direct_mmap(struct elf_fdpic_params *params,
 *
 * Modelled on fs/binfmt_elf.c core dumper
 */
-#if defined(USE_ELF_CORE_DUMP) && defined(CONFIG_ELF_CORE)
+#ifdef CONFIG_ELF_CORE
 /*
 * These are the only things you should do on a core-file: use only these
@@ -1826,4 +1826,4 @@ cleanup:
 #undef NUM_NOTES
 }
-#endif          /* USE_ELF_CORE_DUMP */
+#endif          /* CONFIG_ELF_CORE */
diff --git a/fs/cifs/export.c b/fs/cifs/export.c
index 75949d6a5f1b..6177f7cca16a 100644
--- a/fs/cifs/export.c
+++ b/fs/cifs/export.c
@@ -24,7 +24,7 @@
 */
 /*
-  * See Documentation/filesystems/Exporting
+  * See Documentation/filesystems/nfs/Exporting
  * and examples in fs/exportfs
  *
  * Since cifs is a network file system, an "fsid" must be included for
diff --git a/fs/compat.c b/fs/compat.c
index 6c19040ffeef..00d90c2e66f0 100644
--- a/fs/compat.c
+++ b/fs/compat.c
@@ -38,8 +38,6 @@
 #include <linux/dirent.h>
 #include <linux/fsnotify.h>
 #include <linux/highuid.h>
-#include <linux/sunrpc/svc.h>
-#include <linux/nfsd/nfsd.h>
 #include <linux/nfsd/syscall.h>
 #include <linux/personality.h>
 #include <linux/rwsem.h>
diff --git a/fs/direct-io.c b/fs/direct-io.c
index 7dde0df8e8b6..4012885d027f 100644
--- a/fs/direct-io.c
+++ b/fs/direct-io.c
@@ -97,6 +97,18 @@ struct dio {
        unsigned cur_page_len;          /* Nr of bytes at cur_page_offset */
        sector_t cur_page_block;        /* Where it starts */
+        /* BIO completion state */
+        spinlock_t bio_lock;            /* protects BIO fields below */
+        unsigned long refcount;         /* direct_io_worker() and bios */
+        struct bio *bio_list;           /* singly linked via bi_private */
+        struct task_struct *waiter;     /* waiting task (NULL if none) */
+        /* AIO related stuff */
+        struct kiocb *iocb;             /* kiocb */
+        int is_async;                   /* is IO async ? */
+        int io_error;                   /* IO error in completion path */
+        ssize_t result;                 /* IO result */
        /*
         * Page fetching state. These variables belong to dio_refill_pages().
         */
@@ -108,22 +120,16 @@ struct dio {
         * Page queue.  These variables belong to dio_refill_pages() and
         * dio_get_page().
         */
-        struct page *pages[DIO_PAGES];  /* page buffer */
        unsigned head;                  /* next page to process */
        unsigned tail;                  /* last valid page + 1 */
        int page_errors;                /* errno from get_user_pages() */
-        /* BIO completion state */
+        /*
-        spinlock_t bio_lock;            /* protects BIO fields below */
+         * pages[] (and any fields placed after it) are not zeroed out at
-        unsigned long refcount;         /* direct_io_worker() and bios */
+         * allocation time.  Don't add new fields after pages[] unless you
-        struct bio *bio_list;           /* singly linked via bi_private */
+         * wish that they not be zeroed.
-        struct task_struct *waiter;     /* waiting task (NULL if none) */
+         */
+        struct page *pages[DIO_PAGES];  /* page buffer */
-        /* AIO related stuff */
-        struct kiocb *iocb;             /* kiocb */
-        int is_async;                   /* is IO async ? */
-        int io_error;                   /* IO error in completion path */
-        ssize_t result;                 /* IO result */
 };
 /*
@@ -1144,10 +1150,16 @@ __blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode,
                }
        }
-        dio = kzalloc(sizeof(*dio), GFP_KERNEL);
+        dio = kmalloc(sizeof(*dio), GFP_KERNEL);
        retval = -ENOMEM;
        if (!dio)
                goto out;
+        /*
+         * Believe it or not, zeroing out the page array caused a .5%
+         * performance regression in a database benchmark.  So, we take
+         * care to only zero out what's needed.
+         */
+        memset(dio, 0, offsetof(struct dio, pages));
        dio->flags = flags;
        if (dio->flags & DIO_LOCKING) {
@@ -1197,7 +1209,7 @@ __blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode,
        if (dio->flags & DIO_LOCKING) {
                if (unlikely((rw & WRITE) && retval < 0)) {
                        loff_t isize = i_size_read(inode);
-                        if (end > isize )
+                        if (end > isize)
                                vmtruncate(inode, isize);
                }
        }
diff --git a/fs/exportfs/expfs.c b/fs/exportfs/expfs.c
index 197c7db583c7..e9e175949a63 100644
--- a/fs/exportfs/expfs.c
+++ b/fs/exportfs/expfs.c
@@ -6,7 +6,7 @@
 * and for mapping back from file handles to dentries.
 *
 * For details on why we do all the strange and hairy things in here
- * take a look at Documentation/filesystems/Exporting.
+ * take a look at Documentation/filesystems/nfs/Exporting.
 */
 #include <linux/exportfs.h>
 #include <linux/fs.h>
diff --git a/fs/ext2/dir.c b/fs/ext2/dir.c
index fc2bd05d3559..7516957273ed 100644
--- a/fs/ext2/dir.c
+++ b/fs/ext2/dir.c
@@ -721,5 +721,5 @@ const struct file_operations ext2_dir_operations = {
 #ifdef CONFIG_COMPAT
        .compat_ioctl   = ext2_compat_ioctl,
 #endif
-        .fsync          = simple_fsync,
+        .fsync          = ext2_fsync,
 };
diff --git a/fs/ext2/ext2.h b/fs/ext2/ext2.h
index da318b0fa637..061914add3cf 100644
--- a/fs/ext2/ext2.h
+++ b/fs/ext2/ext2.h
@@ -155,6 +155,7 @@ extern void ext2_write_super (struct super_block *);
 extern const struct file_operations ext2_dir_operations;
 /* file.c */
+extern int ext2_fsync(struct file *file, struct dentry *dentry, int datasync);
 extern const struct inode_operations ext2_file_inode_operations;
 extern const struct file_operations ext2_file_operations;
 extern const struct file_operations ext2_xip_file_operations;
diff --git a/fs/ext2/file.c b/fs/ext2/file.c
index a2f3afd1a1c1..586e3589d4c2 100644
--- a/fs/ext2/file.c
+++ b/fs/ext2/file.c
@@ -19,6 +19,7 @@
 */
 #include <linux/time.h>
+#include <linux/pagemap.h>
 #include "ext2.h"
 #include "xattr.h"
 #include "acl.h"
@@ -38,6 +39,22 @@ static int ext2_release_file (struct inode * inode, struct file * filp)
        return 0;
 }
+int ext2_fsync(struct file *file, struct dentry *dentry, int datasync)
+{
+        int ret;
+        struct super_block *sb = dentry->d_inode->i_sb;
+        struct address_space *mapping = sb->s_bdev->bd_inode->i_mapping;
+        ret = simple_fsync(file, dentry, datasync);
+        if (ret == -EIO || test_and_clear_bit(AS_EIO, &mapping->flags)) {
+                /* We don't really know where the IO error happened... */
+                ext2_error(sb, __func__,
+                           "detected IO error when writing metadata buffers");
+                ret = -EIO;
+        }
+        return ret;
+}
 /*
 * We have mostly NULL's here: the current defaults are ok for
 * the ext2 filesystem.
@@ -55,7 +72,7 @@ const struct file_operations ext2_file_operations = {
        .mmap           = generic_file_mmap,
        .open           = generic_file_open,
        .release        = ext2_release_file,
-        .fsync          = simple_fsync,
+        .fsync          = ext2_fsync,
        .splice_read    = generic_file_splice_read,
        .splice_write   = generic_file_splice_write,
 };
@@ -72,7 +89,7 @@ const struct file_operations ext2_xip_file_operations = {
        .mmap           = xip_file_mmap,
        .open           = generic_file_open,
        .release        = ext2_release_file,
-        .fsync          = simple_fsync,
+        .fsync          = ext2_fsync,
 };
 #endif
diff --git a/fs/ext2/super.c b/fs/ext2/super.c
index 1388802b7803..f9cb54a585ce 100644
--- a/fs/ext2/super.c
+++ b/fs/ext2/super.c
@@ -1105,9 +1105,30 @@ failed_sbi:
        return ret;
 }
+static void ext2_clear_super_error(struct super_block *sb)
+{
+        struct buffer_head *sbh = EXT2_SB(sb)->s_sbh;
+        if (buffer_write_io_error(sbh)) {
+                /*
+                 * Oh, dear.  A previous attempt to write the
+                 * superblock failed.  This could happen because the
+                 * USB device was yanked out.  Or it could happen to
+                 * be a transient write error and maybe the block will
+                 * be remapped.  Nothing we can do but to retry the
+                 * write and hope for the best.
+                 */
+                printk(KERN_ERR "EXT2-fs: %s previous I/O error to "
+                       "superblock detected", sb->s_id);
+                clear_buffer_write_io_error(sbh);
+                set_buffer_uptodate(sbh);
+        }
+}
 static void ext2_commit_super (struct super_block * sb,
                               struct ext2_super_block * es)
 {
+        ext2_clear_super_error(sb);
        es->s_wtime = cpu_to_le32(get_seconds());
        mark_buffer_dirty(EXT2_SB(sb)->s_sbh);
        sb->s_dirt = 0;
@@ -1115,6 +1136,7 @@ static void ext2_commit_super (struct super_block * sb,
 static void ext2_sync_super(struct super_block *sb, struct ext2_super_block *es)
 {
+        ext2_clear_super_error(sb);
        es->s_free_blocks_count = cpu_to_le32(ext2_count_free_blocks(sb));
        es->s_free_inodes_count = cpu_to_le32(ext2_count_free_inodes(sb));
        es->s_wtime = cpu_to_le32(get_seconds());
diff --git a/fs/fat/fat.h b/fs/fat/fat.h
index 7db0979c6b72..e6efdfa0f6db 100644
--- a/fs/fat/fat.h
+++ b/fs/fat/fat.h
@@ -44,7 +44,8 @@ struct fat_mount_options {
                 nocase:1,        /* Does this need case conversion? 0=need case conversion*/
                 usefree:1,       /* Use free_clusters for FAT32 */
                 tz_utc:1,        /* Filesystem timestamps are in UTC */
-                 rodir:1;         /* allow ATTR_RO for directory */
+                 rodir:1,         /* allow ATTR_RO for directory */
+                 discard:1;       /* Issue discard requests on deletions */
 };
 #define FAT_HASH_BITS   8
diff --git a/fs/fat/fatent.c b/fs/fat/fatent.c
index a81037721a6f..81184d3b75a3 100644
--- a/fs/fat/fatent.c
+++ b/fs/fat/fatent.c
@@ -566,16 +566,21 @@ int fat_free_clusters(struct inode *inode, int cluster)
                        goto error;
                }
-                /* 
+                if (sbi->options.discard) {
-                 * Issue discard for the sectors we no longer care about,
+                        /*
-                 * batching contiguous clusters into one request
+                         * Issue discard for the sectors we no longer
-                 */
+                         * care about, batching contiguous clusters
-                if (cluster != fatent.entry + 1) {
+                         * into one request
-                        int nr_clus = fatent.entry - first_cl + 1;
+                         */
+                        if (cluster != fatent.entry + 1) {
-                        sb_issue_discard(sb, fat_clus_to_blknr(sbi, first_cl),
+                                int nr_clus = fatent.entry - first_cl + 1;
-                                         nr_clus * sbi->sec_per_clus);
-                        first_cl = cluster;
+                                sb_issue_discard(sb,
+                                        fat_clus_to_blknr(sbi, first_cl),
+                                        nr_clus * sbi->sec_per_clus);
+                                first_cl = cluster;
+                        }
                }
                ops->ent_put(&fatent, FAT_ENT_FREE);
diff --git a/fs/fat/inode.c b/fs/fat/inode.c
index 76b7961ab663..14da530b05ca 100644
--- a/fs/fat/inode.c
+++ b/fs/fat/inode.c
@@ -858,6 +858,8 @@ static int fat_show_options(struct seq_file *m, struct vfsmount *mnt)
                seq_puts(m, ",errors=panic");
        else
                seq_puts(m, ",errors=remount-ro");
+        if (opts->discard)
+                seq_puts(m, ",discard");
        return 0;
 }
@@ -871,7 +873,7 @@ enum {
        Opt_shortname_winnt, Opt_shortname_mixed, Opt_utf8_no, Opt_utf8_yes,
        Opt_uni_xl_no, Opt_uni_xl_yes, Opt_nonumtail_no, Opt_nonumtail_yes,
        Opt_obsolate, Opt_flush, Opt_tz_utc, Opt_rodir, Opt_err_cont,
-        Opt_err_panic, Opt_err_ro, Opt_err,
+        Opt_err_panic, Opt_err_ro, Opt_discard, Opt_err,
 };
 static const match_table_t fat_tokens = {
@@ -899,6 +901,7 @@ static const match_table_t fat_tokens = {
        {Opt_err_cont, "errors=continue"},
        {Opt_err_panic, "errors=panic"},
        {Opt_err_ro, "errors=remount-ro"},
+        {Opt_discard, "discard"},
        {Opt_obsolate, "conv=binary"},
        {Opt_obsolate, "conv=text"},
        {Opt_obsolate, "conv=auto"},
@@ -1136,6 +1139,9 @@ static int parse_options(char *options, int is_vfat, int silent, int *debug,
                case Opt_rodir:
                        opts->rodir = 1;
                        break;
+                case Opt_discard:
+                        opts->discard = 1;
+                        break;
                /* obsolete mount options */
                case Opt_obsolate:
diff --git a/fs/fat/misc.c b/fs/fat/misc.c
index 0f55f5cb732f..d3da05f26465 100644
--- a/fs/fat/misc.c
+++ b/fs/fat/misc.c
@@ -9,6 +9,7 @@
 #include <linux/module.h>
 #include <linux/fs.h>
 #include <linux/buffer_head.h>
+#include <linux/time.h>
 #include "fat.h"
 /*
@@ -157,10 +158,6 @@ extern struct timezone sys_tz;
 #define SECS_PER_MIN    60
 #define SECS_PER_HOUR   (60 * 60)
 #define SECS_PER_DAY    (SECS_PER_HOUR * 24)
-#define UNIX_SECS_1980  315532800L
-#if BITS_PER_LONG == 64
-#define UNIX_SECS_2108  4354819200L
-#endif
 /* days between 1.1.70 and 1.1.80 (2 leap days) */
 #define DAYS_DELTA      (365 * 10 + 2)
 /* 120 (2100 - 1980) isn't leap year */
@@ -213,58 +210,35 @@ void fat_time_fat2unix(struct msdos_sb_info *sbi, struct timespec *ts,
 void fat_time_unix2fat(struct msdos_sb_info *sbi, struct timespec *ts,
                       __le16 *time, __le16 *date, u8 *time_cs)
 {
-        time_t second = ts->tv_sec;
+        struct tm tm;
-        time_t day, leap_day, month, year;
+        time_to_tm(ts->tv_sec, sbi->options.tz_utc ? 0 :
+                   -sys_tz.tz_minuteswest * 60, &tm);
-        if (!sbi->options.tz_utc)
+        /*  FAT can only support year between 1980 to 2107 */
-                second -= sys_tz.tz_minuteswest * SECS_PER_MIN;
+        if (tm.tm_year < 1980 - 1900) {
-        /* Jan 1 GMT 00:00:00 1980. But what about another time zone? */
-        if (second < UNIX_SECS_1980) {
                *time = 0;
                *date = cpu_to_le16((0 << 9) | (1 << 5) | 1);
                if (time_cs)
                        *time_cs = 0;
                return;
        }
-#if BITS_PER_LONG == 64
+        if (tm.tm_year > 2107 - 1900) {
-        if (second >= UNIX_SECS_2108) {
                *time = cpu_to_le16((23 << 11) | (59 << 5) | 29);
                *date = cpu_to_le16((127 << 9) | (12 << 5) | 31);
                if (time_cs)
                        *time_cs = 199;
                return;
        }
-#endif
-        day = second / SECS_PER_DAY - DAYS_DELTA;
+        /* from 1900 -> from 1980 */
-        year = day / 365;
+        tm.tm_year -= 80;
-        leap_day = (year + 3) / 4;
+        /* 0~11 -> 1~12 */
-        if (year > YEAR_2100)           /* 2100 isn't leap year */
+        tm.tm_mon++;
-                leap_day--;
+        /* 0~59 -> 0~29(2sec counts) */
-        if (year * 365 + leap_day > day)
+        tm.tm_sec >>= 1;
-                year--;
-        leap_day = (year + 3) / 4;
-        if (year > YEAR_2100)           /* 2100 isn't leap year */
-                leap_day--;
-        day -= year * 365 + leap_day;
-        if (IS_LEAP_YEAR(year) && day == days_in_year[3]) {
-                month = 2;
-        } else {
-                if (IS_LEAP_YEAR(year) && day > days_in_year[3])
-                        day--;
-                for (month = 1; month < 12; month++) {
-                        if (days_in_year[month + 1] > day)
-                                break;
-                }
-        }
-        day -= days_in_year[month];
-        *time = cpu_to_le16(((second / SECS_PER_HOUR) % 24) << 11
+        *time = cpu_to_le16(tm.tm_hour << 11 | tm.tm_min << 5 | tm.tm_sec);
-                            | ((second / SECS_PER_MIN) % 60) << 5
+        *date = cpu_to_le16(tm.tm_year << 9 | tm.tm_mon << 5 | tm.tm_mday);
-                            | (second % SECS_PER_MIN) >> 1);
-        *date = cpu_to_le16((year << 9) | (month << 5) | (day + 1));
        if (time_cs)
                *time_cs = (ts->tv_sec & 1) * 100 + ts->tv_nsec / 10000000;
 }
@@ -285,4 +259,3 @@ int fat_sync_bhs(struct buffer_head **bhs, int nr_bhs)
        }
        return err;
 }
diff --git a/fs/fscache/object-list.c b/fs/fscache/object-list.c
index e590242fa41a..3221a0c7944e 100644
--- a/fs/fscache/object-list.c
+++ b/fs/fscache/object-list.c
@@ -91,7 +91,7 @@ EXPORT_SYMBOL(fscache_object_destroy);
 */
 static struct fscache_object *fscache_objlist_lookup(loff_t *_pos)
 {
-        struct fscache_object *pobj, *obj, *minobj = NULL;
+        struct fscache_object *pobj, *obj = NULL, *minobj = NULL;
        struct rb_node *p;
        unsigned long pos;
diff --git a/fs/hpfs/super.c b/fs/hpfs/super.c
index f2feaa06bf26..cadc4ce48656 100644
--- a/fs/hpfs/super.c
+++ b/fs/hpfs/super.c
@@ -14,6 +14,7 @@
 #include <linux/magic.h>
 #include <linux/sched.h>
 #include <linux/smp_lock.h>
+#include <linux/bitmap.h>
 /* Mark the filesystem dirty, so that chkdsk checks it when os/2 booted */
@@ -115,15 +116,13 @@ static void hpfs_put_super(struct super_block *s)
 unsigned hpfs_count_one_bitmap(struct super_block *s, secno secno)
 {
        struct quad_buffer_head qbh;
-        unsigned *bits;
+        unsigned long *bits;
-        unsigned i, count;
+        unsigned count;
-        if (!(bits = hpfs_map_4sectors(s, secno, &qbh, 4))) return 0;
-        count = 0;
+        bits = hpfs_map_4sectors(s, secno, &qbh, 4);
-        for (i = 0; i < 2048 / sizeof(unsigned); i++) {
+        if (!bits)
-                unsigned b; 
+                return 0;
-                if (!bits[i]) continue;
+        count = bitmap_weight(bits, 2048 * BITS_PER_BYTE);
-                for (b = bits[i]; b; b>>=1) count += b & 1;
-        }
        hpfs_brelse4(&qbh);
        return count;
 }
diff --git a/fs/isofs/export.c b/fs/isofs/export.c
index e81a30593ba9..ed752cb38474 100644
--- a/fs/isofs/export.c
+++ b/fs/isofs/export.c
@@ -9,7 +9,7 @@
 *
 * The following files are helpful:
 *
- *     Documentation/filesystems/Exporting
+ *     Documentation/filesystems/nfs/Exporting
 *     fs/exportfs/expfs.c.
 */
diff --git a/fs/jffs2/gc.c b/fs/jffs2/gc.c
index 090c556ffed2..3b6f2fa12cff 100644
--- a/fs/jffs2/gc.c
+++ b/fs/jffs2/gc.c
@@ -700,7 +700,8 @@ static int jffs2_garbage_collect_metadata(struct jffs2_sb_info *c, struct jffs2_
        struct jffs2_raw_inode ri;
        struct jffs2_node_frag *last_frag;
        union jffs2_device_node dev;
-        char *mdata = NULL, mdatalen = 0;
+        char *mdata = NULL;
+        int mdatalen = 0;
        uint32_t alloclen, ilen;
        int ret;
diff --git a/fs/jffs2/readinode.c b/fs/jffs2/readinode.c
index 378991cfe40f..e22de8397b74 100644
--- a/fs/jffs2/readinode.c
+++ b/fs/jffs2/readinode.c
@@ -1284,7 +1284,7 @@ static int jffs2_do_read_inode_internal(struct jffs2_sb_info *c,
                                f->target = NULL;
                                mutex_unlock(&f->sem);
                                jffs2_do_clear_inode(c, f);
-                                return -ret;
+                                return ret;
                        }
                        f->target[je32_to_cpu(latest_node->csize)] = '\0';
diff --git a/fs/jffs2/summary.c b/fs/jffs2/summary.c
index 6caf1e1ee26d..800171dca53b 100644
--- a/fs/jffs2/summary.c
+++ b/fs/jffs2/summary.c
@@ -23,7 +23,7 @@
 int jffs2_sum_init(struct jffs2_sb_info *c)
 {
-        uint32_t sum_size = max_t(uint32_t, c->sector_size, MAX_SUMMARY_SIZE);
+        uint32_t sum_size = min_t(uint32_t, c->sector_size, MAX_SUMMARY_SIZE);
        c->summary = kzalloc(sizeof(struct jffs2_summary), GFP_KERNEL);
diff --git a/fs/lockd/svc4proc.c b/fs/lockd/svc4proc.c
index bd173a6ca3b1..a7966eed3c17 100644
--- a/fs/lockd/svc4proc.c
+++ b/fs/lockd/svc4proc.c
@@ -11,10 +11,6 @@
 #include <linux/time.h>
 #include <linux/slab.h>
 #include <linux/smp_lock.h>
-#include <linux/in.h>
-#include <linux/sunrpc/svc.h>
-#include <linux/sunrpc/clnt.h>
-#include <linux/nfsd/nfsd.h>
 #include <linux/lockd/lockd.h>
 #include <linux/lockd/share.h>
diff --git a/fs/lockd/svcproc.c b/fs/lockd/svcproc.c
index e1d28ddd2169..56c9519d900a 100644
--- a/fs/lockd/svcproc.c
+++ b/fs/lockd/svcproc.c
@@ -11,10 +11,6 @@
 #include <linux/time.h>
 #include <linux/slab.h>
 #include <linux/smp_lock.h>
-#include <linux/in.h>
-#include <linux/sunrpc/svc.h>
-#include <linux/sunrpc/clnt.h>
-#include <linux/nfsd/nfsd.h>
 #include <linux/lockd/lockd.h>
 #include <linux/lockd/share.h>
diff --git a/fs/nfs/Kconfig b/fs/nfs/Kconfig
index 2a77bc25d5af..59e5673b4597 100644
--- a/fs/nfs/Kconfig
+++ b/fs/nfs/Kconfig
@@ -90,7 +90,7 @@ config ROOT_NFS
          If you want your system to mount its root file system via NFS,
          choose Y here.  This is common practice for managing systems
          without local permanent storage.  For details, read
-          <file:Documentation/filesystems/nfsroot.txt>.
+          <file:Documentation/filesystems/nfs/nfsroot.txt>.
          Most people say N here.
diff --git a/fs/nfs/nfs4_fs.h b/fs/nfs/nfs4_fs.h
index 7e57b04e4014..865265bdca03 100644
--- a/fs/nfs/nfs4_fs.h
+++ b/fs/nfs/nfs4_fs.h
@@ -108,6 +108,10 @@ enum {
        NFS_OWNER_RECLAIM_NOGRACE
 };
+#define NFS_LOCK_NEW            0
+#define NFS_LOCK_RECLAIM        1
+#define NFS_LOCK_EXPIRED        2
 /*
 * struct nfs4_state maintains the client-side state for a given
 * (state_owner,inode) tuple (OPEN) or state_owner (LOCK).
@@ -282,6 +286,7 @@ extern struct nfs_seqid *nfs_alloc_seqid(struct nfs_seqid_counter *counter);
 extern int nfs_wait_on_sequence(struct nfs_seqid *seqid, struct rpc_task *task);
 extern void nfs_increment_open_seqid(int status, struct nfs_seqid *seqid);
 extern void nfs_increment_lock_seqid(int status, struct nfs_seqid *seqid);
+extern void nfs_release_seqid(struct nfs_seqid *seqid);
 extern void nfs_free_seqid(struct nfs_seqid *seqid);
 extern const nfs4_stateid zero_stateid;
diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c
index 9f5f11ecfd93..198d51d17c13 100644
--- a/fs/nfs/nfs4proc.c
+++ b/fs/nfs/nfs4proc.c
@@ -64,6 +64,7 @@
 struct nfs4_opendata;
 static int _nfs4_proc_open(struct nfs4_opendata *data);
+static int _nfs4_recover_proc_open(struct nfs4_opendata *data);
 static int nfs4_do_fsinfo(struct nfs_server *, struct nfs_fh *, struct nfs_fsinfo *);
 static int nfs4_async_handle_error(struct rpc_task *, const struct nfs_server *, struct nfs4_state *);
 static int _nfs4_proc_lookup(struct inode *dir, const struct qstr *name, struct nfs_fh *fhandle, struct nfs_fattr *fattr);
@@ -341,6 +342,27 @@ nfs4_free_slot(struct nfs4_slot_table *tbl, u8 free_slotid)
                free_slotid, tbl->highest_used_slotid);
 }
+/*
+ * Signal state manager thread if session is drained
+ */
+static void nfs41_check_drain_session_complete(struct nfs4_session *ses)
+{
+        struct rpc_task *task;
+        if (!test_bit(NFS4CLNT_SESSION_DRAINING, &ses->clp->cl_state)) {
+                task = rpc_wake_up_next(&ses->fc_slot_table.slot_tbl_waitq);
+                if (task)
+                        rpc_task_set_priority(task, RPC_PRIORITY_PRIVILEGED);
+                return;
+        }
+        if (ses->fc_slot_table.highest_used_slotid != -1)
+                return;
+        dprintk("%s COMPLETE: Session Drained\n", __func__);
+        complete(&ses->complete);
+}
 static void nfs41_sequence_free_slot(const struct nfs_client *clp,
                              struct nfs4_sequence_res *res)
 {
@@ -356,15 +378,7 @@ static void nfs41_sequence_free_slot(const struct nfs_client *clp,
        spin_lock(&tbl->slot_tbl_lock);
        nfs4_free_slot(tbl, res->sr_slotid);
+        nfs41_check_drain_session_complete(clp->cl_session);
-        /* Signal state manager thread if session is drained */
-        if (test_bit(NFS4CLNT_SESSION_DRAINING, &clp->cl_state)) {
-                if (tbl->highest_used_slotid == -1) {
-                        dprintk("%s COMPLETE: Session Drained\n", __func__);
-                        complete(&clp->cl_session->complete);
-                }
-        } else
-                rpc_wake_up_next(&tbl->slot_tbl_waitq);
        spin_unlock(&tbl->slot_tbl_lock);
        res->sr_slotid = NFS4_MAX_SLOT_TABLE;
 }
@@ -421,7 +435,7 @@ out:
 * Note: must be called with under the slot_tbl_lock.
 */
 static u8
-nfs4_find_slot(struct nfs4_slot_table *tbl, struct rpc_task *task)
+nfs4_find_slot(struct nfs4_slot_table *tbl)
 {
        int slotid;
        u8 ret_id = NFS4_MAX_SLOT_TABLE;
@@ -463,7 +477,8 @@ static int nfs41_setup_sequence(struct nfs4_session *session,
        tbl = &session->fc_slot_table;
        spin_lock(&tbl->slot_tbl_lock);
-        if (test_bit(NFS4CLNT_SESSION_DRAINING, &session->clp->cl_state)) {
+        if (test_bit(NFS4CLNT_SESSION_DRAINING, &session->clp->cl_state) &&
+            !rpc_task_has_priority(task, RPC_PRIORITY_PRIVILEGED)) {
                /*
                 * The state manager will wait until the slot table is empty.
                 * Schedule the reset thread
@@ -474,7 +489,15 @@ static int nfs41_setup_sequence(struct nfs4_session *session,
                return -EAGAIN;
        }
-        slotid = nfs4_find_slot(tbl, task);
+        if (!rpc_queue_empty(&tbl->slot_tbl_waitq) &&
+            !rpc_task_has_priority(task, RPC_PRIORITY_PRIVILEGED)) {
+                rpc_sleep_on(&tbl->slot_tbl_waitq, task, NULL);
+                spin_unlock(&tbl->slot_tbl_lock);
+                dprintk("%s enforce FIFO order\n", __func__);
+                return -EAGAIN;
+        }
+        slotid = nfs4_find_slot(tbl);
        if (slotid == NFS4_MAX_SLOT_TABLE) {
                rpc_sleep_on(&tbl->slot_tbl_waitq, task, NULL);
                spin_unlock(&tbl->slot_tbl_lock);
@@ -483,6 +506,7 @@ static int nfs41_setup_sequence(struct nfs4_session *session,
        }
        spin_unlock(&tbl->slot_tbl_lock);
+        rpc_task_set_priority(task, RPC_PRIORITY_NORMAL);
        slot = tbl->slots + slotid;
        args->sa_session = session;
        args->sa_slotid = slotid;
@@ -545,6 +569,12 @@ static void nfs41_call_sync_prepare(struct rpc_task *task, void *calldata)
        rpc_call_start(task);
 }
+static void nfs41_call_priv_sync_prepare(struct rpc_task *task, void *calldata)
+{
+        rpc_task_set_priority(task, RPC_PRIORITY_PRIVILEGED);
+        nfs41_call_sync_prepare(task, calldata);
+}
 static void nfs41_call_sync_done(struct rpc_task *task, void *calldata)
 {
        struct nfs41_call_sync_data *data = calldata;
@@ -557,12 +587,18 @@ struct rpc_call_ops nfs41_call_sync_ops = {
        .rpc_call_done = nfs41_call_sync_done,
 };
+struct rpc_call_ops nfs41_call_priv_sync_ops = {
+        .rpc_call_prepare = nfs41_call_priv_sync_prepare,
+        .rpc_call_done = nfs41_call_sync_done,
+};
 static int nfs4_call_sync_sequence(struct nfs_client *clp,
                                   struct rpc_clnt *clnt,
                                   struct rpc_message *msg,
                                   struct nfs4_sequence_args *args,
                                   struct nfs4_sequence_res *res,
-                                   int cache_reply)
+                                   int cache_reply,
+                                   int privileged)
 {
        int ret;
        struct rpc_task *task;
@@ -580,6 +616,8 @@ static int nfs4_call_sync_sequence(struct nfs_client *clp,
        };
        res->sr_slotid = NFS4_MAX_SLOT_TABLE;
+        if (privileged)
+                task_setup.callback_ops = &nfs41_call_priv_sync_ops;
        task = rpc_run_task(&task_setup);
        if (IS_ERR(task))
                ret = PTR_ERR(task);
@@ -597,7 +635,7 @@ int _nfs4_call_sync_session(struct nfs_server *server,
                            int cache_reply)
 {
        return nfs4_call_sync_sequence(server->nfs_client, server->client,
-                                       msg, args, res, cache_reply);
+                                       msg, args, res, cache_reply, 0);
 }
 #endif /* CONFIG_NFS_V4_1 */
@@ -1035,7 +1073,7 @@ static int nfs4_open_recover_helper(struct nfs4_opendata *opendata, fmode_t fmod
        memset(&opendata->o_res, 0, sizeof(opendata->o_res));
        memset(&opendata->c_res, 0, sizeof(opendata->c_res));
        nfs4_init_opendata_res(opendata);
-        ret = _nfs4_proc_open(opendata);
+        ret = _nfs4_recover_proc_open(opendata);
        if (ret != 0)
                return ret; 
        newstate = nfs4_opendata_to_nfs4_state(opendata);
@@ -1326,6 +1364,12 @@ out_no_action:
 }
+static void nfs4_recover_open_prepare(struct rpc_task *task, void *calldata)
+{
+        rpc_task_set_priority(task, RPC_PRIORITY_PRIVILEGED);
+        nfs4_open_prepare(task, calldata);
+}
 static void nfs4_open_done(struct rpc_task *task, void *calldata)
 {
        struct nfs4_opendata *data = calldata;
@@ -1384,10 +1428,13 @@ static const struct rpc_call_ops nfs4_open_ops = {
        .rpc_release = nfs4_open_release,
 };
-/*
+static const struct rpc_call_ops nfs4_recover_open_ops = {
- * Note: On error, nfs4_proc_open will free the struct nfs4_opendata
+        .rpc_call_prepare = nfs4_recover_open_prepare,
- */
+        .rpc_call_done = nfs4_open_done,
-static int _nfs4_proc_open(struct nfs4_opendata *data)
+        .rpc_release = nfs4_open_release,
+};
+static int nfs4_run_open_task(struct nfs4_opendata *data, int isrecover)
 {
        struct inode *dir = data->dir->d_inode;
        struct nfs_server *server = NFS_SERVER(dir);
@@ -1414,21 +1461,57 @@ static int _nfs4_proc_open(struct nfs4_opendata *data)
        data->rpc_done = 0;
        data->rpc_status = 0;
        data->cancelled = 0;
+        if (isrecover)
+                task_setup_data.callback_ops = &nfs4_recover_open_ops;
        task = rpc_run_task(&task_setup_data);
-        if (IS_ERR(task))
+        if (IS_ERR(task))
-                return PTR_ERR(task);
+                return PTR_ERR(task);
-        status = nfs4_wait_for_completion_rpc_task(task);
+        status = nfs4_wait_for_completion_rpc_task(task);
-        if (status != 0) {
+        if (status != 0) {
-                data->cancelled = 1;
+                data->cancelled = 1;
-                smp_wmb();
+                smp_wmb();
-        } else
+        } else
-                status = data->rpc_status;
+                status = data->rpc_status;
-        rpc_put_task(task);
+        rpc_put_task(task);
+        return status;
+}
+static int _nfs4_recover_proc_open(struct nfs4_opendata *data)
+{
+        struct inode *dir = data->dir->d_inode;
+        struct nfs_openres *o_res = &data->o_res;
+        int status;
+        status = nfs4_run_open_task(data, 1);
        if (status != 0 || !data->rpc_done)
                return status;
-        if (o_res->fh.size == 0)
+        nfs_refresh_inode(dir, o_res->dir_attr);
-                _nfs4_proc_lookup(dir, o_arg->name, &o_res->fh, o_res->f_attr);
+        if (o_res->rflags & NFS4_OPEN_RESULT_CONFIRM) {
+                status = _nfs4_proc_open_confirm(data);
+                if (status != 0)
+                        return status;
+        }
+        return status;
+}
+/*
+ * Note: On error, nfs4_proc_open will free the struct nfs4_opendata
+ */
+static int _nfs4_proc_open(struct nfs4_opendata *data)
+{
+        struct inode *dir = data->dir->d_inode;
+        struct nfs_server *server = NFS_SERVER(dir);
+        struct nfs_openargs *o_arg = &data->o_arg;
+        struct nfs_openres *o_res = &data->o_res;
+        int status;
+        status = nfs4_run_open_task(data, 0);
+        if (status != 0 || !data->rpc_done)
+                return status;
        if (o_arg->open_flags & O_CREAT) {
                update_changeattr(dir, &o_res->cinfo);
@@ -1752,11 +1835,10 @@ static void nfs4_close_done(struct rpc_task *task, void *data)
                        if (calldata->arg.fmode == 0)
                                break;
                default:
-                        if (nfs4_async_handle_error(task, server, state) == -EAGAIN) {
+                        if (nfs4_async_handle_error(task, server, state) == -EAGAIN)
-                                nfs_restart_rpc(task, server->nfs_client);
+                                rpc_restart_call_prepare(task);
-                                return;
-                        }
        }
+        nfs_release_seqid(calldata->arg.seqid);
        nfs_refresh_inode(calldata->inode, calldata->res.fattr);
 }
@@ -1848,8 +1930,6 @@ int nfs4_do_close(struct path *path, struct nfs4_state *state, int wait)
        calldata->state = state;
        calldata->arg.fh = NFS_FH(state->inode);
        calldata->arg.stateid = &state->open_stateid;
-        if (nfs4_has_session(server->nfs_client))
-                memset(calldata->arg.stateid->data, 0, 4);    /* clear seqid */
        /* Serialization for the sequence id */
        calldata->arg.seqid = nfs_alloc_seqid(&state->owner->so_seqid);
        if (calldata->arg.seqid == NULL)
@@ -3941,6 +4021,12 @@ static void nfs4_lock_prepare(struct rpc_task *task, void *calldata)
        dprintk("%s: done!, ret = %d\n", __func__, data->rpc_status);
 }
+static void nfs4_recover_lock_prepare(struct rpc_task *task, void *calldata)
+{
+        rpc_task_set_priority(task, RPC_PRIORITY_PRIVILEGED);
+        nfs4_lock_prepare(task, calldata);
+}
 static void nfs4_lock_done(struct rpc_task *task, void *calldata)
 {
        struct nfs4_lockdata *data = calldata;
@@ -3996,7 +4082,13 @@ static const struct rpc_call_ops nfs4_lock_ops = {
        .rpc_release = nfs4_lock_release,
 };
-static int _nfs4_do_setlk(struct nfs4_state *state, int cmd, struct file_lock *fl, int reclaim)
+static const struct rpc_call_ops nfs4_recover_lock_ops = {
+        .rpc_call_prepare = nfs4_recover_lock_prepare,
+        .rpc_call_done = nfs4_lock_done,
+        .rpc_release = nfs4_lock_release,
+};
+static int _nfs4_do_setlk(struct nfs4_state *state, int cmd, struct file_lock *fl, int recovery_type)
 {
        struct nfs4_lockdata *data;
        struct rpc_task *task;
@@ -4020,8 +4112,11 @@ static int _nfs4_do_setlk(struct nfs4_state *state, int cmd, struct file_lock *f
                return -ENOMEM;
        if (IS_SETLKW(cmd))
                data->arg.block = 1;
-        if (reclaim != 0)
+        if (recovery_type > NFS_LOCK_NEW) {
-                data->arg.reclaim = 1;
+                if (recovery_type == NFS_LOCK_RECLAIM)
+                        data->arg.reclaim = NFS_LOCK_RECLAIM;
+                task_setup_data.callback_ops = &nfs4_recover_lock_ops;
+        }
        msg.rpc_argp = &data->arg,
        msg.rpc_resp = &data->res,
        task_setup_data.callback_data = data;
@@ -4048,7 +4143,7 @@ static int nfs4_lock_reclaim(struct nfs4_state *state, struct file_lock *request
                /* Cache the lock if possible... */
                if (test_bit(NFS_DELEGATED_STATE, &state->flags) != 0)
                        return 0;
-                err = _nfs4_do_setlk(state, F_SETLK, request, 1);
+                err = _nfs4_do_setlk(state, F_SETLK, request, NFS_LOCK_RECLAIM);
                if (err != -NFS4ERR_DELAY)
                        break;
                nfs4_handle_exception(server, err, &exception);
@@ -4068,7 +4163,7 @@ static int nfs4_lock_expired(struct nfs4_state *state, struct file_lock *request
        do {
                if (test_bit(NFS_DELEGATED_STATE, &state->flags) != 0)
                        return 0;
-                err = _nfs4_do_setlk(state, F_SETLK, request, 0);
+                err = _nfs4_do_setlk(state, F_SETLK, request, NFS_LOCK_EXPIRED);
                switch (err) {
                default:
                        goto out;
@@ -4104,7 +4199,7 @@ static int _nfs4_proc_setlk(struct nfs4_state *state, int cmd, struct file_lock
                status = do_vfs_lock(request->fl_file, request);
                goto out_unlock;
        }
-        status = _nfs4_do_setlk(state, cmd, request, 0);
+        status = _nfs4_do_setlk(state, cmd, request, NFS_LOCK_NEW);
        if (status != 0)
                goto out_unlock;
        /* Note: we always want to sleep here! */
@@ -4187,7 +4282,7 @@ int nfs4_lock_delegation_recall(struct nfs4_state *state, struct file_lock *fl)
        if (err != 0)
                goto out;
        do {
-                err = _nfs4_do_setlk(state, F_SETLK, fl, 0);
+                err = _nfs4_do_setlk(state, F_SETLK, fl, NFS_LOCK_NEW);
                switch (err) {
                        default:
                                printk(KERN_ERR "%s: unhandled error %d.\n",
@@ -4395,11 +4490,12 @@ static void nfs4_get_lease_time_prepare(struct rpc_task *task,
                        (struct nfs4_get_lease_time_data *)calldata;
        dprintk("--> %s\n", __func__);
+        rpc_task_set_priority(task, RPC_PRIORITY_PRIVILEGED);
        /* just setup sequence, do not trigger session recovery
           since we're invoked within one */
        ret = nfs41_setup_sequence(data->clp->cl_session,
-                                        &data->args->la_seq_args,
+                                   &data->args->la_seq_args,
-                                        &data->res->lr_seq_res, 0, task);
+                                   &data->res->lr_seq_res, 0, task);
        BUG_ON(ret == -EAGAIN);
        rpc_call_start(task);
@@ -4619,7 +4715,7 @@ struct nfs4_session *nfs4_alloc_session(struct nfs_client *clp)
        tbl = &session->fc_slot_table;
        tbl->highest_used_slotid = -1;
        spin_lock_init(&tbl->slot_tbl_lock);
-        rpc_init_wait_queue(&tbl->slot_tbl_waitq, "ForeChannel Slot table");
+        rpc_init_priority_wait_queue(&tbl->slot_tbl_waitq, "ForeChannel Slot table");
        tbl = &session->bc_slot_table;
        tbl->highest_used_slotid = -1;
@@ -4838,14 +4934,22 @@ int nfs4_init_session(struct nfs_server *server)
 {
        struct nfs_client *clp = server->nfs_client;
        struct nfs4_session *session;
+        unsigned int rsize, wsize;
        int ret;
        if (!nfs4_has_session(clp))
                return 0;
+        rsize = server->rsize;
+        if (rsize == 0)
+                rsize = NFS_MAX_FILE_IO_SIZE;
+        wsize = server->wsize;
+        if (wsize == 0)
+                wsize = NFS_MAX_FILE_IO_SIZE;
        session = clp->cl_session;
-        session->fc_attrs.max_rqst_sz = server->wsize + nfs41_maxwrite_overhead;
+        session->fc_attrs.max_rqst_sz = wsize + nfs41_maxwrite_overhead;
-        session->fc_attrs.max_resp_sz = server->rsize + nfs41_maxread_overhead;
+        session->fc_attrs.max_resp_sz = rsize + nfs41_maxread_overhead;
        ret = nfs4_recover_expired_lease(server);
        if (!ret)
@@ -4871,7 +4975,7 @@ static int nfs4_proc_sequence(struct nfs_client *clp, struct rpc_cred *cred)
        args.sa_cache_this = 0;
        return nfs4_call_sync_sequence(clp, clp->cl_rpcclient, &msg, &args,
-                                       &res, 0);
+                                       &res, args.sa_cache_this, 1);
 }
 void nfs41_sequence_call_done(struct rpc_task *task, void *data)
@@ -4953,6 +5057,7 @@ static void nfs4_reclaim_complete_prepare(struct rpc_task *task, void *data)
 {
        struct nfs4_reclaim_complete_data *calldata = data;
+        rpc_task_set_priority(task, RPC_PRIORITY_PRIVILEGED);
        if (nfs4_setup_sequence(calldata->clp, &calldata->arg.seq_args,
                                &calldata->res.seq_res, 0, task))
                return;
diff --git a/fs/nfs/nfs4state.c b/fs/nfs/nfs4state.c
index e76427e6346f..6d263ed79e92 100644
--- a/fs/nfs/nfs4state.c
+++ b/fs/nfs/nfs4state.c
@@ -135,16 +135,30 @@ static int nfs41_setup_state_renewal(struct nfs_client *clp)
        return status;
 }
-static void nfs41_end_drain_session(struct nfs_client *clp,
+static void nfs4_end_drain_session(struct nfs_client *clp)
-                struct nfs4_session *ses)
 {
-        if (test_and_clear_bit(NFS4CLNT_SESSION_DRAINING, &clp->cl_state))
+        struct nfs4_session *ses = clp->cl_session;
-                rpc_wake_up(&ses->fc_slot_table.slot_tbl_waitq);
+        int max_slots;
+        if (test_and_clear_bit(NFS4CLNT_SESSION_DRAINING, &clp->cl_state)) {
+                spin_lock(&ses->fc_slot_table.slot_tbl_lock);
+                max_slots = ses->fc_slot_table.max_slots;
+                while (max_slots--) {
+                        struct rpc_task *task;
+                        task = rpc_wake_up_next(&ses->fc_slot_table.
+                                                slot_tbl_waitq);
+                        if (!task)
+                                break;
+                        rpc_task_set_priority(task, RPC_PRIORITY_PRIVILEGED);
+                }
+                spin_unlock(&ses->fc_slot_table.slot_tbl_lock);
+        }
 }
-static int nfs41_begin_drain_session(struct nfs_client *clp,
+static int nfs4_begin_drain_session(struct nfs_client *clp)
-                struct nfs4_session *ses)
 {
+        struct nfs4_session *ses = clp->cl_session;
        struct nfs4_slot_table *tbl = &ses->fc_slot_table;
        spin_lock(&tbl->slot_tbl_lock);
@@ -162,16 +176,13 @@ int nfs41_init_clientid(struct nfs_client *clp, struct rpc_cred *cred)
 {
        int status;
-        status = nfs41_begin_drain_session(clp, clp->cl_session);
+        nfs4_begin_drain_session(clp);
-        if (status != 0)
-                goto out;
        status = nfs4_proc_exchange_id(clp, cred);
        if (status != 0)
                goto out;
        status = nfs4_proc_create_session(clp);
        if (status != 0)
                goto out;
-        nfs41_end_drain_session(clp, clp->cl_session);
        nfs41_setup_state_renewal(clp);
        nfs_mark_client_ready(clp, NFS_CS_READY);
 out:
@@ -755,16 +766,21 @@ struct nfs_seqid *nfs_alloc_seqid(struct nfs_seqid_counter *counter)
        return new;
 }
-void nfs_free_seqid(struct nfs_seqid *seqid)
+void nfs_release_seqid(struct nfs_seqid *seqid)
 {
        if (!list_empty(&seqid->list)) {
                struct rpc_sequence *sequence = seqid->sequence->sequence;
                spin_lock(&sequence->lock);
-                list_del(&seqid->list);
+                list_del_init(&seqid->list);
                spin_unlock(&sequence->lock);
                rpc_wake_up(&sequence->wait);
        }
+}
+void nfs_free_seqid(struct nfs_seqid *seqid)
+{
+        nfs_release_seqid(seqid);
        kfree(seqid);
 }
@@ -1257,13 +1273,9 @@ void nfs41_handle_sequence_flag_errors(struct nfs_client *clp, u32 flags)
 static int nfs4_reset_session(struct nfs_client *clp)
 {
-        struct nfs4_session *ses = clp->cl_session;
        int status;
-        status = nfs41_begin_drain_session(clp, ses);
+        nfs4_begin_drain_session(clp);
-        if (status != 0)
-                return status;
        status = nfs4_proc_destroy_session(clp->cl_session);
        if (status && status != -NFS4ERR_BADSESSION &&
            status != -NFS4ERR_DEADSESSION) {
@@ -1279,19 +1291,17 @@ static int nfs4_reset_session(struct nfs_client *clp)
 out:
        /*
         * Let the state manager reestablish state
-         * without waking other tasks yet.
         */
-        if (!test_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state)) {
+        if (!test_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state) &&
-                /* Wake up the next rpc task */
+            status == 0)
-                nfs41_end_drain_session(clp, ses);
+                nfs41_setup_state_renewal(clp);
-                if (status == 0)
-                        nfs41_setup_state_renewal(clp);
-        }
        return status;
 }
 #else /* CONFIG_NFS_V4_1 */
 static int nfs4_reset_session(struct nfs_client *clp) { return 0; }
+static int nfs4_end_drain_session(struct nfs_client *clp) { return 0; }
 #endif /* CONFIG_NFS_V4_1 */
 /* Set NFS4CLNT_LEASE_EXPIRED for all v4.0 errors and for recoverable errors
@@ -1382,6 +1392,7 @@ static void nfs4_state_manager(struct nfs_client *clp)
                                goto out_error;
                }
+                nfs4_end_drain_session(clp);
                if (test_and_clear_bit(NFS4CLNT_DELEGRETURN, &clp->cl_state)) {
                        nfs_client_return_marked_delegations(clp);
                        continue;
@@ -1398,6 +1409,7 @@ static void nfs4_state_manager(struct nfs_client *clp)
 out_error:
        printk(KERN_WARNING "Error: state manager failed on NFSv4 server %s"
                        " with error %d\n", clp->cl_hostname, -status);
+        nfs4_end_drain_session(clp);
        nfs4_clear_state_manager_bit(clp);
 }
diff --git a/fs/nfsctl.c b/fs/nfsctl.c
index 8f9a20556f79..d3854d94b7cf 100644
--- a/fs/nfsctl.c
+++ b/fs/nfsctl.c
@@ -7,8 +7,6 @@
 #include <linux/types.h>
 #include <linux/file.h>
 #include <linux/fs.h>
-#include <linux/sunrpc/svc.h>
-#include <linux/nfsd/nfsd.h>
 #include <linux/nfsd/syscall.h>
 #include <linux/cred.h>
 #include <linux/sched.h>
diff --git a/fs/nfsd/auth.c b/fs/nfsd/auth.c
index 36fcabbf5186..79717a40daba 100644
--- a/fs/nfsd/auth.c
+++ b/fs/nfsd/auth.c
@@ -1,15 +1,7 @@
-/*
+/* Copyright (C) 1995, 1996 Olaf Kirch <okir@monad.swb.de> */
- * linux/fs/nfsd/auth.c
- *
- * Copyright (C) 1995, 1996 Olaf Kirch <okir@monad.swb.de>
- */
-#include <linux/types.h>
 #include <linux/sched.h>
-#include <linux/sunrpc/svc.h>
+#include "nfsd.h"
-#include <linux/sunrpc/svcauth.h>
-#include <linux/nfsd/nfsd.h>
-#include <linux/nfsd/export.h>
 #include "auth.h"
 int nfsexp_flags(struct svc_rqst *rqstp, struct svc_export *exp)
diff --git a/include/linux/nfsd/cache.h b/fs/nfsd/cache.h
index 3a3f58934f5e..d892be61016c 100644
--- a/include/linux/nfsd/cache.h
+++ b/fs/nfsd/cache.h
@@ -1,6 +1,4 @@
 /*
- * include/linux/nfsd/cache.h
- *
 * Request reply cache. This was heavily inspired by the
 * implementation in 4.3BSD/4.4BSD.
 *
@@ -10,8 +8,7 @@
 #ifndef NFSCACHE_H
 #define NFSCACHE_H
-#include <linux/in.h>
+#include <linux/sunrpc/svc.h>
-#include <linux/uio.h>
 /*
 * Representation of a reply cache entry.
diff --git a/fs/nfsd/export.c b/fs/nfsd/export.c
index c1c9e035d4a4..c487810a2366 100644
--- a/fs/nfsd/export.c
+++ b/fs/nfsd/export.c
@@ -1,7 +1,5 @@
 #define MSNFS   /* HACK HACK */
 /*
- * linux/fs/nfsd/export.c
- *
 * NFS exporting and validation.
 *
 * We maintain a list of clients, each of which has a list of
@@ -14,29 +12,16 @@
 * Copyright (C) 1995, 1996 Olaf Kirch, <okir@monad.swb.de>
 */
-#include <linux/unistd.h>
-#include <linux/slab.h>
-#include <linux/stat.h>
-#include <linux/in.h>
-#include <linux/seq_file.h>
-#include <linux/syscalls.h>
-#include <linux/rwsem.h>
-#include <linux/dcache.h>
 #include <linux/namei.h>
-#include <linux/mount.h>
-#include <linux/hash.h>
 #include <linux/module.h>
 #include <linux/exportfs.h>
-#include <linux/sunrpc/svc.h>
-#include <linux/nfsd/nfsd.h>
-#include <linux/nfsd/nfsfh.h>
 #include <linux/nfsd/syscall.h>
-#include <linux/lockd/bind.h>
-#include <linux/sunrpc/msg_prot.h>
-#include <linux/sunrpc/gss_api.h>
 #include <net/ipv6.h>
+#include "nfsd.h"
+#include "nfsfh.h"
 #define NFSDDBG_FACILITY        NFSDDBG_EXPORT
 typedef struct auth_domain      svc_client;
@@ -369,16 +354,25 @@ static struct svc_export *svc_export_update(struct svc_export *new,
                                            struct svc_export *old);
 static struct svc_export *svc_export_lookup(struct svc_export *);
-static int check_export(struct inode *inode, int flags, unsigned char *uuid)
+static int check_export(struct inode *inode, int *flags, unsigned char *uuid)
 {
-        /* We currently export only dirs and regular files.
+        /*
-         * This is what umountd does.
+         * We currently export only dirs, regular files, and (for v4
+         * pseudoroot) symlinks.
         */
        if (!S_ISDIR(inode->i_mode) &&
+            !S_ISLNK(inode->i_mode) &&
            !S_ISREG(inode->i_mode))
                return -ENOTDIR;
+        /*
+         * Mountd should never pass down a writeable V4ROOT export, but,
+         * just to make sure:
+         */
+        if (*flags & NFSEXP_V4ROOT)
+                *flags |= NFSEXP_READONLY;
        /* There are two requirements on a filesystem to be exportable.
         * 1:  We must be able to identify the filesystem from a number.
         *       either a device number (so FS_REQUIRES_DEV needed)
@@ -387,7 +381,7 @@ static int check_export(struct inode *inode, int flags, unsigned char *uuid)
         *       This means that s_export_op must be set.
         */
        if (!(inode->i_sb->s_type->fs_flags & FS_REQUIRES_DEV) &&
-            !(flags & NFSEXP_FSID) &&
+            !(*flags & NFSEXP_FSID) &&
            uuid == NULL) {
                dprintk("exp_export: export of non-dev fs without fsid\n");
                return -EINVAL;
@@ -602,7 +596,7 @@ static int svc_export_parse(struct cache_detail *cd, char *mesg, int mlen)
                                goto out4;
                }
-                err = check_export(exp.ex_path.dentry->d_inode, exp.ex_flags,
+                err = check_export(exp.ex_path.dentry->d_inode, &exp.ex_flags,
                                   exp.ex_uuid);
                if (err)
                        goto out4;
@@ -1041,7 +1035,7 @@ exp_export(struct nfsctl_export *nxp)
                goto finish;
        }
-        err = check_export(path.dentry->d_inode, nxp->ex_flags, NULL);
+        err = check_export(path.dentry->d_inode, &nxp->ex_flags, NULL);
        if (err) goto finish;
        err = -ENOMEM;
@@ -1320,6 +1314,23 @@ rqst_exp_parent(struct svc_rqst *rqstp, struct path *path)
        return exp;
 }
+static struct svc_export *find_fsidzero_export(struct svc_rqst *rqstp)
+{
+        struct svc_export *exp;
+        u32 fsidv[2];
+        mk_fsid(FSID_NUM, fsidv, 0, 0, 0, NULL);
+        exp = rqst_exp_find(rqstp, FSID_NUM, fsidv);
+        /*
+         * We shouldn't have accepting an nfsv4 request at all if we
+         * don't have a pseudoexport!:
+         */
+        if (IS_ERR(exp) && PTR_ERR(exp) == -ENOENT)
+                exp = ERR_PTR(-ESERVERFAULT);
+        return exp;
+}
 /*
 * Called when we need the filehandle for the root of the pseudofs,
 * for a given NFSv4 client.   The root is defined to be the
@@ -1330,11 +1341,8 @@ exp_pseudoroot(struct svc_rqst *rqstp, struct svc_fh *fhp)
 {
        struct svc_export *exp;
        __be32 rv;
-        u32 fsidv[2];
-        mk_fsid(FSID_NUM, fsidv, 0, 0, 0, NULL);
+        exp = find_fsidzero_export(rqstp);
-        exp = rqst_exp_find(rqstp, FSID_NUM, fsidv);
        if (IS_ERR(exp))
                return nfserrno(PTR_ERR(exp));
        rv = fh_compose(fhp, exp, exp->ex_path.dentry, NULL);
@@ -1425,6 +1433,7 @@ static struct flags {
        { NFSEXP_CROSSMOUNT, {"crossmnt", ""}},
        { NFSEXP_NOSUBTREECHECK, {"no_subtree_check", ""}},
        { NFSEXP_NOAUTHNLM, {"insecure_locks", ""}},
+        { NFSEXP_V4ROOT, {"v4root", ""}},
 #ifdef MSNFS
        { NFSEXP_MSNFS, {"msnfs", ""}},
 #endif
diff --git a/fs/nfsd/lockd.c b/fs/nfsd/lockd.c
index b2786a5f9afe..0c6d81670137 100644
--- a/fs/nfsd/lockd.c
+++ b/fs/nfsd/lockd.c
@@ -1,6 +1,4 @@
 /*
- * linux/fs/nfsd/lockd.c
- *
 * This file contains all the stubs needed when communicating with lockd.
 * This level of indirection is necessary so we can run nfsd+lockd without
 * requiring the nfs client to be compiled in/loaded, and vice versa.
@@ -8,14 +6,10 @@
 * Copyright (C) 1996, Olaf Kirch <okir@monad.swb.de>
 */
-#include <linux/types.h>
-#include <linux/fs.h>
 #include <linux/file.h>
-#include <linux/mount.h>
-#include <linux/sunrpc/clnt.h>
-#include <linux/sunrpc/svc.h>
-#include <linux/nfsd/nfsd.h>
 #include <linux/lockd/bind.h>
+#include "nfsd.h"
+#include "vfs.h"
 #define NFSDDBG_FACILITY                NFSDDBG_LOCKD
diff --git a/fs/nfsd/nfs2acl.c b/fs/nfsd/nfs2acl.c
index 4e3219e84116..f20589d2ae27 100644
--- a/fs/nfsd/nfs2acl.c
+++ b/fs/nfsd/nfs2acl.c
@@ -1,19 +1,15 @@
 /*
- * linux/fs/nfsd/nfs2acl.c
- *
 * Process version 2 NFSACL requests.
 *
 * Copyright (C) 2002-2003 Andreas Gruenbacher <agruen@suse.de>
 */
-#include <linux/sunrpc/svc.h>
+#include "nfsd.h"
-#include <linux/nfs.h>
+/* FIXME: nfsacl.h is a broken header */
-#include <linux/nfsd/nfsd.h>
-#include <linux/nfsd/cache.h>
-#include <linux/nfsd/xdr.h>
-#include <linux/nfsd/xdr3.h>
-#include <linux/posix_acl.h>
 #include <linux/nfsacl.h>
+#include "cache.h"
+#include "xdr3.h"
+#include "vfs.h"
 #define NFSDDBG_FACILITY                NFSDDBG_PROC
 #define RETURN_STATUS(st)       { resp->status = (st); return (st); }
@@ -217,6 +213,16 @@ static int nfsaclsvc_decode_accessargs(struct svc_rqst *rqstp, __be32 *p,
 * XDR encode functions
 */
+/*
+ * There must be an encoding function for void results so svc_process
+ * will work properly.
+ */
+int
+nfsaclsvc_encode_voidres(struct svc_rqst *rqstp, __be32 *p, void *dummy)
+{
+        return xdr_ressize_check(rqstp, p);
+}
 /* GETACL */
 static int nfsaclsvc_encode_getaclres(struct svc_rqst *rqstp, __be32 *p,
                struct nfsd3_getaclres *resp)
@@ -308,7 +314,6 @@ static int nfsaclsvc_release_access(struct svc_rqst *rqstp, __be32 *p,
 }
 #define nfsaclsvc_decode_voidargs       NULL
-#define nfsaclsvc_encode_voidres        NULL
 #define nfsaclsvc_release_void          NULL
 #define nfsd3_fhandleargs       nfsd_fhandle
 #define nfsd3_attrstatres       nfsd_attrstat
@@ -346,5 +351,5 @@ struct svc_version	nfsd_acl_version2 = {
                .vs_proc        = nfsd_acl_procedures2,
                .vs_dispatch    = nfsd_dispatch,
                .vs_xdrsize     = NFS3_SVC_XDRSIZE,
-                .vs_hidden      = 1,
+                .vs_hidden      = 0,
 };
diff --git a/fs/nfsd/nfs3acl.c b/fs/nfsd/nfs3acl.c
index 9981dbb377a3..e0c4846bad92 100644
--- a/fs/nfsd/nfs3acl.c
+++ b/fs/nfsd/nfs3acl.c
@@ -1,18 +1,15 @@
 /*
- * linux/fs/nfsd/nfs3acl.c
- *
 * Process version 3 NFSACL requests.
 *
 * Copyright (C) 2002-2003 Andreas Gruenbacher <agruen@suse.de>
 */
-#include <linux/sunrpc/svc.h>
+#include "nfsd.h"
-#include <linux/nfs3.h>
+/* FIXME: nfsacl.h is a broken header */
-#include <linux/nfsd/nfsd.h>
-#include <linux/nfsd/cache.h>
-#include <linux/nfsd/xdr3.h>
-#include <linux/posix_acl.h>
 #include <linux/nfsacl.h>
+#include "cache.h"
+#include "xdr3.h"
+#include "vfs.h"
 #define RETURN_STATUS(st)       { resp->status = (st); return (st); }
@@ -264,6 +261,6 @@ struct svc_version	nfsd_acl_version3 = {
                .vs_proc        = nfsd_acl_procedures3,
                .vs_dispatch    = nfsd_dispatch,
                .vs_xdrsize     = NFS3_SVC_XDRSIZE,
-                .vs_hidden      = 1,
+                .vs_hidden      = 0,
 };
diff --git a/fs/nfsd/nfs3proc.c b/fs/nfsd/nfs3proc.c
index a713c418a922..3d68f45a37b9 100644
--- a/fs/nfsd/nfs3proc.c
+++ b/fs/nfsd/nfs3proc.c
@@ -1,30 +1,16 @@
 /*
- * linux/fs/nfsd/nfs3proc.c
- *
 * Process version 3 NFS requests.
 *
 * Copyright (C) 1996, 1997, 1998 Olaf Kirch <okir@monad.swb.de>
 */
-#include <linux/linkage.h>
-#include <linux/time.h>
-#include <linux/errno.h>
 #include <linux/fs.h>
 #include <linux/ext2_fs.h>
-#include <linux/stat.h>
-#include <linux/fcntl.h>
-#include <linux/net.h>
-#include <linux/in.h>
-#include <linux/unistd.h>
-#include <linux/slab.h>
-#include <linux/major.h>
 #include <linux/magic.h>
-#include <linux/sunrpc/svc.h>
+#include "cache.h"
-#include <linux/nfsd/nfsd.h>
+#include "xdr3.h"
-#include <linux/nfsd/cache.h>
+#include "vfs.h"
-#include <linux/nfsd/xdr3.h>
-#include <linux/nfs3.h>
 #define NFSDDBG_FACILITY                NFSDDBG_PROC
diff --git a/fs/nfsd/nfs3xdr.c b/fs/nfsd/nfs3xdr.c
index d0a2ce1b4324..2a533a0af2a9 100644
--- a/fs/nfsd/nfs3xdr.c
+++ b/fs/nfsd/nfs3xdr.c
@@ -1,6 +1,4 @@
 /*
- * linux/fs/nfsd/nfs3xdr.c
- *
 * XDR support for nfsd/protocol version 3.
 *
 * Copyright (C) 1995, 1996, 1997 Olaf Kirch <okir@monad.swb.de>
@@ -8,19 +6,8 @@
 * 2003-08-09 Jamie Lokier: Use htonl() for nanoseconds, not htons()!
 */
-#include <linux/types.h>
-#include <linux/time.h>
-#include <linux/nfs3.h>
-#include <linux/list.h>
-#include <linux/spinlock.h>
-#include <linux/dcache.h>
 #include <linux/namei.h>
-#include <linux/mm.h>
+#include "xdr3.h"
-#include <linux/vfs.h>
-#include <linux/sunrpc/xdr.h>
-#include <linux/sunrpc/svc.h>
-#include <linux/nfsd/nfsd.h>
-#include <linux/nfsd/xdr3.h>
 #include "auth.h"
 #define NFSDDBG_FACILITY                NFSDDBG_XDR
diff --git a/fs/nfsd/nfs4acl.c b/fs/nfsd/nfs4acl.c
index 725d02f210e2..88150685df34 100644
--- a/fs/nfsd/nfs4acl.c
+++ b/fs/nfsd/nfs4acl.c
@@ -1,6 +1,4 @@
 /*
- *  fs/nfs4acl/acl.c
- *
 *  Common NFSv4 ACL handling code.
 *
 *  Copyright (c) 2002, 2003 The Regents of the University of Michigan.
@@ -36,15 +34,7 @@
 *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
-#include <linux/string.h>
-#include <linux/slab.h>
-#include <linux/list.h>
-#include <linux/types.h>
-#include <linux/fs.h>
-#include <linux/module.h>
 #include <linux/nfs_fs.h>
-#include <linux/posix_acl.h>
-#include <linux/nfs4.h>
 #include <linux/nfs4_acl.h>
@@ -389,7 +379,7 @@ sort_pacl(struct posix_acl *pacl)
        sort_pacl_range(pacl, 1, i-1);
        BUG_ON(pacl->a_entries[i].e_tag != ACL_GROUP_OBJ);
-        j = i++;
+        j = ++i;
        while (pacl->a_entries[j].e_tag == ACL_GROUP)
                j++;
        sort_pacl_range(pacl, i, j-1);
diff --git a/fs/nfsd/nfs4callback.c b/fs/nfsd/nfs4callback.c
index 24e8d78f8dde..c6eed2a3b093 100644
--- a/fs/nfsd/nfs4callback.c
+++ b/fs/nfsd/nfs4callback.c
@@ -1,6 +1,4 @@
 /*
- *  linux/fs/nfsd/nfs4callback.c
- *
 *  Copyright (c) 2001 The Regents of the University of Michigan.
 *  All rights reserved.
 *
@@ -33,22 +31,9 @@
 *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
-#include <linux/module.h>
-#include <linux/list.h>
-#include <linux/inet.h>
-#include <linux/errno.h>
-#include <linux/delay.h>
-#include <linux/sched.h>
-#include <linux/kthread.h>
-#include <linux/sunrpc/xdr.h>
-#include <linux/sunrpc/svc.h>
 #include <linux/sunrpc/clnt.h>
-#include <linux/sunrpc/svcsock.h>
+#include "nfsd.h"
-#include <linux/nfsd/nfsd.h>
+#include "state.h"
-#include <linux/nfsd/state.h>
-#include <linux/sunrpc/sched.h>
-#include <linux/nfs4.h>
-#include <linux/sunrpc/xprtsock.h>
 #define NFSDDBG_FACILITY                NFSDDBG_PROC
diff --git a/fs/nfsd/nfs4idmap.c b/fs/nfsd/nfs4idmap.c
index ba2c199592fd..6e2983b27f3c 100644
--- a/fs/nfsd/nfs4idmap.c
+++ b/fs/nfsd/nfs4idmap.c
@@ -1,6 +1,4 @@
 /*
- *  fs/nfsd/nfs4idmap.c
- *
 *  Mapping of UID/GIDs to name and vice versa.
 *
 *  Copyright (c) 2002, 2003 The Regents of the University of
@@ -35,22 +33,9 @@
 */
 #include <linux/module.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/sunrpc/clnt.h>
-#include <linux/nfs.h>
-#include <linux/nfs4.h>
-#include <linux/nfs_fs.h>
-#include <linux/nfs_page.h>
-#include <linux/sunrpc/cache.h>
 #include <linux/nfsd_idmap.h>
-#include <linux/list.h>
-#include <linux/time.h>
 #include <linux/seq_file.h>
-#include <linux/sunrpc/svcauth.h>
+#include <linux/sched.h>
 /*
 * Cache entry
diff --git a/fs/nfsd/nfs4proc.c b/fs/nfsd/nfs4proc.c
index bebc0c2e1b0a..37514c469846 100644
--- a/fs/nfsd/nfs4proc.c
+++ b/fs/nfsd/nfs4proc.c
@@ -1,6 +1,4 @@
 /*
- *  fs/nfsd/nfs4proc.c
- *
 *  Server-side procedures for NFSv4.
 *
 *  Copyright (c) 2002 The Regents of the University of Michigan.
@@ -34,20 +32,11 @@
 *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
-#include <linux/param.h>
-#include <linux/major.h>
-#include <linux/slab.h>
 #include <linux/file.h>
-#include <linux/sunrpc/svc.h>
+#include "cache.h"
-#include <linux/nfsd/nfsd.h>
+#include "xdr4.h"
-#include <linux/nfsd/cache.h>
+#include "vfs.h"
-#include <linux/nfs4.h>
-#include <linux/nfsd/state.h>
-#include <linux/nfsd/xdr4.h>
-#include <linux/nfs4_acl.h>
-#include <linux/sunrpc/gss_api.h>
 #define NFSDDBG_FACILITY                NFSDDBG_PROC
@@ -170,7 +159,7 @@ do_open_permission(struct svc_rqst *rqstp, struct svc_fh *current_fh, struct nfs
                accmode |= NFSD_MAY_READ;
        if (open->op_share_access & NFS4_SHARE_ACCESS_WRITE)
                accmode |= (NFSD_MAY_WRITE | NFSD_MAY_TRUNC);
-        if (open->op_share_deny & NFS4_SHARE_DENY_WRITE)
+        if (open->op_share_deny & NFS4_SHARE_DENY_READ)
                accmode |= NFSD_MAY_WRITE;
        status = fh_verify(rqstp, current_fh, S_IFREG, accmode);
diff --git a/fs/nfsd/nfs4recover.c b/fs/nfsd/nfs4recover.c
index b5348405046b..5a754f7b71ed 100644
--- a/fs/nfsd/nfs4recover.c
+++ b/fs/nfsd/nfs4recover.c
@@ -1,6 +1,4 @@
 /*
-*  linux/fs/nfsd/nfs4recover.c
-*
 *  Copyright (c) 2004 The Regents of the University of Michigan.
 *  All rights reserved.
 *
@@ -33,20 +31,14 @@
 *
 */
-#include <linux/err.h>
-#include <linux/sunrpc/svc.h>
-#include <linux/nfsd/nfsd.h>
-#include <linux/nfs4.h>
-#include <linux/nfsd/state.h>
-#include <linux/nfsd/xdr4.h>
-#include <linux/param.h>
 #include <linux/file.h>
 #include <linux/namei.h>
-#include <asm/uaccess.h>
-#include <linux/scatterlist.h>
 #include <linux/crypto.h>
 #include <linux/sched.h>
-#include <linux/mount.h>
+#include "nfsd.h"
+#include "state.h"
+#include "vfs.h"
 #define NFSDDBG_FACILITY                NFSDDBG_PROC
diff --git a/fs/nfsd/nfs4state.c b/fs/nfsd/nfs4state.c
index 2153f9bdbebd..f19ed866c95f 100644
--- a/fs/nfsd/nfs4state.c
+++ b/fs/nfsd/nfs4state.c
@@ -1,6 +1,4 @@
 /*
-*  linux/fs/nfsd/nfs4state.c
-*
 *  Copyright (c) 2001 The Regents of the University of Michigan.
 *  All rights reserved.
 *
@@ -34,28 +32,14 @@
 *
 */
-#include <linux/param.h>
-#include <linux/major.h>
-#include <linux/slab.h>
-#include <linux/sunrpc/svc.h>
-#include <linux/nfsd/nfsd.h>
-#include <linux/nfsd/cache.h>
 #include <linux/file.h>
-#include <linux/mount.h>
-#include <linux/workqueue.h>
 #include <linux/smp_lock.h>
-#include <linux/kthread.h>
-#include <linux/nfs4.h>
-#include <linux/nfsd/state.h>
-#include <linux/nfsd/xdr4.h>
 #include <linux/namei.h>
 #include <linux/swap.h>
-#include <linux/mutex.h>
-#include <linux/lockd/bind.h>
-#include <linux/module.h>
 #include <linux/sunrpc/svcauth_gss.h>
 #include <linux/sunrpc/clnt.h>
+#include "xdr4.h"
+#include "vfs.h"
 #define NFSDDBG_FACILITY                NFSDDBG_PROC
@@ -477,13 +461,14 @@ static int set_forechannel_drc_size(struct nfsd4_channel_attrs *fchan)
 /*
 * fchan holds the client values on input, and the server values on output
+ * sv_max_mesg is the maximum payload plus one page for overhead.
 */
 static int init_forechannel_attrs(struct svc_rqst *rqstp,
                                  struct nfsd4_channel_attrs *session_fchan,
                                  struct nfsd4_channel_attrs *fchan)
 {
        int status = 0;
-        __u32   maxcount = svc_max_payload(rqstp);
+        __u32   maxcount = nfsd_serv->sv_max_mesg;
        /* headerpadsz set to zero in encode routine */
@@ -523,6 +508,15 @@ free_session_slots(struct nfsd4_session *ses)
                kfree(ses->se_slots[i]);
 }
+/*
+ * We don't actually need to cache the rpc and session headers, so we
+ * can allocate a little less for each slot:
+ */
+static inline int slot_bytes(struct nfsd4_channel_attrs *ca)
+{
+        return ca->maxresp_cached - NFSD_MIN_HDR_SEQ_SZ;
+}
 static int
 alloc_init_session(struct svc_rqst *rqstp, struct nfs4_client *clp,
                   struct nfsd4_create_session *cses)
@@ -554,7 +548,7 @@ alloc_init_session(struct svc_rqst *rqstp, struct nfs4_client *clp,
        memcpy(new, &tmp, sizeof(*new));
        /* allocate each struct nfsd4_slot and data cache in one piece */
-        cachesize = new->se_fchannel.maxresp_cached - NFSD_MIN_HDR_SEQ_SZ;
+        cachesize = slot_bytes(&new->se_fchannel);
        for (i = 0; i < new->se_fchannel.maxreqs; i++) {
                sp = kzalloc(sizeof(*sp) + cachesize, GFP_KERNEL);
                if (!sp)
@@ -628,10 +622,12 @@ void
 free_session(struct kref *kref)
 {
        struct nfsd4_session *ses;
+        int mem;
        ses = container_of(kref, struct nfsd4_session, se_ref);
        spin_lock(&nfsd_drc_lock);
-        nfsd_drc_mem_used -= ses->se_fchannel.maxreqs * NFSD_SLOT_CACHE_SIZE;
+        mem = ses->se_fchannel.maxreqs * slot_bytes(&ses->se_fchannel);
+        nfsd_drc_mem_used -= mem;
        spin_unlock(&nfsd_drc_lock);
        free_session_slots(ses);
        kfree(ses);
@@ -2404,11 +2400,8 @@ nfs4_open_delegation(struct svc_fh *fh, struct nfsd4_open *open, struct nfs4_sta
        memcpy(&open->op_delegate_stateid, &dp->dl_stateid, sizeof(dp->dl_stateid));
-        dprintk("NFSD: delegation stateid=(%08x/%08x/%08x/%08x)\n\n",
+        dprintk("NFSD: delegation stateid=" STATEID_FMT "\n",
-                     dp->dl_stateid.si_boot,
+                STATEID_VAL(&dp->dl_stateid));
-                     dp->dl_stateid.si_stateownerid,
-                     dp->dl_stateid.si_fileid,
-                     dp->dl_stateid.si_generation);
 out:
        if (open->op_claim_type == NFS4_OPEN_CLAIM_PREVIOUS
                        && flag == NFS4_OPEN_DELEGATE_NONE
@@ -2498,9 +2491,8 @@ nfsd4_process_open2(struct svc_rqst *rqstp, struct svc_fh *current_fh, struct nf
        status = nfs_ok;
-        dprintk("nfs4_process_open2: stateid=(%08x/%08x/%08x/%08x)\n",
+        dprintk("%s: stateid=" STATEID_FMT "\n", __func__,
-                    stp->st_stateid.si_boot, stp->st_stateid.si_stateownerid,
+                STATEID_VAL(&stp->st_stateid));
-                    stp->st_stateid.si_fileid, stp->st_stateid.si_generation);
 out:
        if (fp)
                put_nfs4_file(fp);
@@ -2666,9 +2658,8 @@ STALE_STATEID(stateid_t *stateid)
 {
        if (time_after((unsigned long)boot_time,
                        (unsigned long)stateid->si_boot)) {
-                dprintk("NFSD: stale stateid (%08x/%08x/%08x/%08x)!\n",
+                dprintk("NFSD: stale stateid " STATEID_FMT "!\n",
-                        stateid->si_boot, stateid->si_stateownerid,
+                        STATEID_VAL(stateid));
-                        stateid->si_fileid, stateid->si_generation);
                return 1;
        }
        return 0;
@@ -2680,9 +2671,8 @@ EXPIRED_STATEID(stateid_t *stateid)
        if (time_before((unsigned long)boot_time,
                        ((unsigned long)stateid->si_boot)) &&
            time_before((unsigned long)(stateid->si_boot + lease_time), get_seconds())) {
-                dprintk("NFSD: expired stateid (%08x/%08x/%08x/%08x)!\n",
+                dprintk("NFSD: expired stateid " STATEID_FMT "!\n",
-                        stateid->si_boot, stateid->si_stateownerid,
+                        STATEID_VAL(stateid));
-                        stateid->si_fileid, stateid->si_generation);
                return 1;
        }
        return 0;
@@ -2696,9 +2686,8 @@ stateid_error_map(stateid_t *stateid)
        if (EXPIRED_STATEID(stateid))
                return nfserr_expired;
-        dprintk("NFSD: bad stateid (%08x/%08x/%08x/%08x)!\n",
+        dprintk("NFSD: bad stateid " STATEID_FMT "!\n",
-                stateid->si_boot, stateid->si_stateownerid,
+                STATEID_VAL(stateid));
-                stateid->si_fileid, stateid->si_generation);
        return nfserr_bad_stateid;
 }
@@ -2884,10 +2873,8 @@ nfs4_preprocess_seqid_op(struct nfsd4_compound_state *cstate, u32 seqid,
        struct svc_fh *current_fh = &cstate->current_fh;
        __be32 status;
-        dprintk("NFSD: preprocess_seqid_op: seqid=%d " 
+        dprintk("NFSD: %s: seqid=%d stateid = " STATEID_FMT "\n", __func__,
-                        "stateid = (%08x/%08x/%08x/%08x)\n", seqid,
+                seqid, STATEID_VAL(stateid));
-                stateid->si_boot, stateid->si_stateownerid, stateid->si_fileid,
-                stateid->si_generation);
        *stpp = NULL;
        *sopp = NULL;
@@ -3019,12 +3006,8 @@ nfsd4_open_confirm(struct svc_rqst *rqstp, struct nfsd4_compound_state *cstate,
        sop->so_confirmed = 1;
        update_stateid(&stp->st_stateid);
        memcpy(&oc->oc_resp_stateid, &stp->st_stateid, sizeof(stateid_t));
-        dprintk("NFSD: nfsd4_open_confirm: success, seqid=%d " 
+        dprintk("NFSD: %s: success, seqid=%d stateid=" STATEID_FMT "\n",
-                "stateid=(%08x/%08x/%08x/%08x)\n", oc->oc_seqid,
+                __func__, oc->oc_seqid, STATEID_VAL(&stp->st_stateid));
-                         stp->st_stateid.si_boot,
-                         stp->st_stateid.si_stateownerid,
-                         stp->st_stateid.si_fileid,
-                         stp->st_stateid.si_generation);
        nfsd4_create_clid_dir(sop->so_client);
 out:
@@ -3283,9 +3266,8 @@ find_delegation_stateid(struct inode *ino, stateid_t *stid)
        struct nfs4_file *fp;
        struct nfs4_delegation *dl;
-        dprintk("NFSD:find_delegation_stateid stateid=(%08x/%08x/%08x/%08x)\n",
+        dprintk("NFSD: %s: stateid=" STATEID_FMT "\n", __func__,
-                    stid->si_boot, stid->si_stateownerid,
+                STATEID_VAL(stid));
-                    stid->si_fileid, stid->si_generation);
        fp = find_file(ino);
        if (!fp)
diff --git a/fs/nfsd/nfs4xdr.c b/fs/nfsd/nfs4xdr.c
index 0fbd50cee1f6..a8587e90fd5a 100644
--- a/fs/nfsd/nfs4xdr.c
+++ b/fs/nfsd/nfs4xdr.c
@@ -40,24 +40,16 @@
 * at the end of nfs4svc_decode_compoundargs.
 */
-#include <linux/param.h>
-#include <linux/smp.h>
-#include <linux/fs.h>
 #include <linux/namei.h>
-#include <linux/vfs.h>
+#include <linux/statfs.h>
 #include <linux/utsname.h>
-#include <linux/sunrpc/xdr.h>
-#include <linux/sunrpc/svc.h>
-#include <linux/sunrpc/clnt.h>
-#include <linux/nfsd/nfsd.h>
-#include <linux/nfsd/state.h>
-#include <linux/nfsd/xdr4.h>
 #include <linux/nfsd_idmap.h>
-#include <linux/nfs4.h>
 #include <linux/nfs4_acl.h>
-#include <linux/sunrpc/gss_api.h>
 #include <linux/sunrpc/svcauth_gss.h>
+#include "xdr4.h"
+#include "vfs.h"
 #define NFSDDBG_FACILITY                NFSDDBG_XDR
 /*
@@ -2204,11 +2196,14 @@ nfsd4_encode_dirent_fattr(struct nfsd4_readdir *cd,
         * we will not follow the cross mount and will fill the attribtutes
         * directly from the mountpoint dentry.
         */
-        if (d_mountpoint(dentry) && !attributes_need_mount(cd->rd_bmval))
+        if (nfsd_mountpoint(dentry, exp)) {
-                ignore_crossmnt = 1;
-        else if (d_mountpoint(dentry)) {
                int err;
+                if (!(exp->ex_flags & NFSEXP_V4ROOT)
+                                && !attributes_need_mount(cd->rd_bmval)) {
+                        ignore_crossmnt = 1;
+                        goto out_encode;
+                }
                /*
                 * Why the heck aren't we just using nfsd_lookup??
                 * Different "."/".." handling?  Something else?
@@ -2224,6 +2219,7 @@ nfsd4_encode_dirent_fattr(struct nfsd4_readdir *cd,
                        goto out_put;
        }
+out_encode:
        nfserr = nfsd4_encode_fattr(NULL, exp, dentry, p, buflen, cd->rd_bmval,
                                        cd->rd_rqstp, ignore_crossmnt);
 out_put:
diff --git a/fs/nfsd/nfscache.c b/fs/nfsd/nfscache.c
index 4638635c5d87..da08560c4818 100644
--- a/fs/nfsd/nfscache.c
+++ b/fs/nfsd/nfscache.c
@@ -1,6 +1,4 @@
 /*
- * linux/fs/nfsd/nfscache.c
- *
 * Request reply cache. This is currently a global cache, but this may
 * change in the future and be a per-client cache.
 *
@@ -10,16 +8,8 @@
 * Copyright (C) 1995, 1996 Olaf Kirch <okir@monad.swb.de>
 */
-#include <linux/kernel.h>
+#include "nfsd.h"
-#include <linux/time.h>
+#include "cache.h"
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/spinlock.h>
-#include <linux/list.h>
-#include <linux/sunrpc/svc.h>
-#include <linux/nfsd/nfsd.h>
-#include <linux/nfsd/cache.h>
 /* Size of reply cache. Common values are:
 * 4.3BSD:      128
diff --git a/fs/nfsd/nfsctl.c b/fs/nfsd/nfsctl.c
index 5c01fc148ce8..2604c3e70ea5 100644
--- a/fs/nfsd/nfsctl.c
+++ b/fs/nfsd/nfsctl.c
@@ -1,46 +1,20 @@
 /*
- * linux/fs/nfsd/nfsctl.c
- *
 * Syscall interface to knfsd.
 *
 * Copyright (C) 1995, 1996 Olaf Kirch <okir@monad.swb.de>
 */
-#include <linux/module.h>
-#include <linux/linkage.h>
-#include <linux/time.h>
-#include <linux/errno.h>
-#include <linux/fs.h>
 #include <linux/namei.h>
-#include <linux/fcntl.h>
-#include <linux/net.h>
-#include <linux/in.h>
-#include <linux/syscalls.h>
-#include <linux/unistd.h>
-#include <linux/slab.h>
-#include <linux/proc_fs.h>
-#include <linux/seq_file.h>
-#include <linux/pagemap.h>
-#include <linux/init.h>
-#include <linux/inet.h>
-#include <linux/string.h>
 #include <linux/ctype.h>
-#include <linux/nfs.h>
 #include <linux/nfsd_idmap.h>
-#include <linux/lockd/bind.h>
-#include <linux/sunrpc/svc.h>
 #include <linux/sunrpc/svcsock.h>
-#include <linux/nfsd/nfsd.h>
-#include <linux/nfsd/cache.h>
-#include <linux/nfsd/xdr.h>
 #include <linux/nfsd/syscall.h>
 #include <linux/lockd/lockd.h>
 #include <linux/sunrpc/clnt.h>
-#include <asm/uaccess.h>
+#include "nfsd.h"
-#include <net/ipv6.h>
+#include "cache.h"
 /*
 *      We have a single directory with 9 nodes in it.
@@ -55,6 +29,7 @@ enum {
        NFSD_Getfd,
        NFSD_Getfs,
        NFSD_List,
+        NFSD_Export_features,
        NFSD_Fh,
        NFSD_FO_UnlockIP,
        NFSD_FO_UnlockFS,
@@ -173,6 +148,24 @@ static const struct file_operations exports_operations = {
        .owner          = THIS_MODULE,
 };
+static int export_features_show(struct seq_file *m, void *v)
+{
+        seq_printf(m, "0x%x 0x%x\n", NFSEXP_ALLFLAGS, NFSEXP_SECINFO_FLAGS);
+        return 0;
+}
+static int export_features_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, export_features_show, NULL);
+}
+static struct file_operations export_features_operations = {
+        .open           = export_features_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
 extern int nfsd_pool_stats_open(struct inode *inode, struct file *file);
 extern int nfsd_pool_stats_release(struct inode *inode, struct file *file);
@@ -1330,6 +1323,8 @@ static int nfsd_fill_super(struct super_block * sb, void * data, int silent)
                [NFSD_Getfd] = {".getfd", &transaction_ops, S_IWUSR|S_IRUSR},
                [NFSD_Getfs] = {".getfs", &transaction_ops, S_IWUSR|S_IRUSR},
                [NFSD_List] = {"exports", &exports_operations, S_IRUGO},
+                [NFSD_Export_features] = {"export_features",
+                                        &export_features_operations, S_IRUGO},
                [NFSD_FO_UnlockIP] = {"unlock_ip",
                                        &transaction_ops, S_IWUSR|S_IRUSR},
                [NFSD_FO_UnlockFS] = {"unlock_filesystem",
diff --git a/include/linux/nfsd/nfsd.h b/fs/nfsd/nfsd.h
index 510ffdd5020e..e942a1aaac92 100644
--- a/include/linux/nfsd/nfsd.h
+++ b/fs/nfsd/nfsd.h
@@ -1,6 +1,4 @@
 /*
- * linux/include/linux/nfsd/nfsd.h
- *
 * Hodge-podge collection of knfsd-related stuff.
 * I will sort this out later.
 *
@@ -11,13 +9,9 @@
 #define LINUX_NFSD_NFSD_H
 #include <linux/types.h>
-#include <linux/unistd.h>
-#include <linux/fs.h>
-#include <linux/posix_acl.h>
 #include <linux/mount.h>
 #include <linux/nfsd/debug.h>
-#include <linux/nfsd/nfsfh.h>
 #include <linux/nfsd/export.h>
 #include <linux/nfsd/stats.h>
 /*
@@ -25,30 +19,10 @@
 */
 #define NFSD_SUPPORTED_MINOR_VERSION    1
-/*
- * Flags for nfsd_permission
- */
-#define NFSD_MAY_NOP            0
-#define NFSD_MAY_EXEC           1 /* == MAY_EXEC */
-#define NFSD_MAY_WRITE          2 /* == MAY_WRITE */
-#define NFSD_MAY_READ           4 /* == MAY_READ */
-#define NFSD_MAY_SATTR          8
-#define NFSD_MAY_TRUNC          16
-#define NFSD_MAY_LOCK           32
-#define NFSD_MAY_OWNER_OVERRIDE 64
-#define NFSD_MAY_LOCAL_ACCESS   128 /* IRIX doing local access check on device special file*/
-#define NFSD_MAY_BYPASS_GSS_ON_ROOT 256
-#define NFSD_MAY_CREATE         (NFSD_MAY_EXEC|NFSD_MAY_WRITE)
-#define NFSD_MAY_REMOVE         (NFSD_MAY_EXEC|NFSD_MAY_WRITE|NFSD_MAY_TRUNC)
-/*
- * Callback function for readdir
- */
 struct readdir_cd {
        __be32                  err;    /* 0, nfserr, or nfserr_eof */
 };
-typedef int (*nfsd_dirop_t)(struct inode *, struct dentry *, int, int);
 extern struct svc_program       nfsd_program;
 extern struct svc_version       nfsd_version2, nfsd_version3,
@@ -73,69 +47,6 @@ int		nfsd_nrpools(void);
 int             nfsd_get_nrthreads(int n, int *);
 int             nfsd_set_nrthreads(int n, int *);
-/* nfsd/vfs.c */
-int             fh_lock_parent(struct svc_fh *, struct dentry *);
-int             nfsd_racache_init(int);
-void            nfsd_racache_shutdown(void);
-int             nfsd_cross_mnt(struct svc_rqst *rqstp, struct dentry **dpp,
-                                struct svc_export **expp);
-__be32          nfsd_lookup(struct svc_rqst *, struct svc_fh *,
-                                const char *, unsigned int, struct svc_fh *);
-__be32           nfsd_lookup_dentry(struct svc_rqst *, struct svc_fh *,
-                                const char *, unsigned int,
-                                struct svc_export **, struct dentry **);
-__be32          nfsd_setattr(struct svc_rqst *, struct svc_fh *,
-                                struct iattr *, int, time_t);
-#ifdef CONFIG_NFSD_V4
-__be32          nfsd4_set_nfs4_acl(struct svc_rqst *, struct svc_fh *,
-                    struct nfs4_acl *);
-int             nfsd4_get_nfs4_acl(struct svc_rqst *, struct dentry *, struct nfs4_acl **);
-#endif /* CONFIG_NFSD_V4 */
-__be32          nfsd_create(struct svc_rqst *, struct svc_fh *,
-                                char *name, int len, struct iattr *attrs,
-                                int type, dev_t rdev, struct svc_fh *res);
-#ifdef CONFIG_NFSD_V3
-__be32          nfsd_access(struct svc_rqst *, struct svc_fh *, u32 *, u32 *);
-__be32          nfsd_create_v3(struct svc_rqst *, struct svc_fh *,
-                                char *name, int len, struct iattr *attrs,
-                                struct svc_fh *res, int createmode,
-                                u32 *verifier, int *truncp, int *created);
-__be32          nfsd_commit(struct svc_rqst *, struct svc_fh *,
-                                loff_t, unsigned long);
-#endif /* CONFIG_NFSD_V3 */
-__be32          nfsd_open(struct svc_rqst *, struct svc_fh *, int,
-                                int, struct file **);
-void            nfsd_close(struct file *);
-__be32          nfsd_read(struct svc_rqst *, struct svc_fh *, struct file *,
-                                loff_t, struct kvec *, int, unsigned long *);
-__be32          nfsd_write(struct svc_rqst *, struct svc_fh *,struct file *,
-                                loff_t, struct kvec *,int, unsigned long *, int *);
-__be32          nfsd_readlink(struct svc_rqst *, struct svc_fh *,
-                                char *, int *);
-__be32          nfsd_symlink(struct svc_rqst *, struct svc_fh *,
-                                char *name, int len, char *path, int plen,
-                                struct svc_fh *res, struct iattr *);
-__be32          nfsd_link(struct svc_rqst *, struct svc_fh *,
-                                char *, int, struct svc_fh *);
-__be32          nfsd_rename(struct svc_rqst *,
-                                struct svc_fh *, char *, int,
-                                struct svc_fh *, char *, int);
-__be32          nfsd_remove(struct svc_rqst *,
-                                struct svc_fh *, char *, int);
-__be32          nfsd_unlink(struct svc_rqst *, struct svc_fh *, int type,
-                                char *name, int len);
-int             nfsd_truncate(struct svc_rqst *, struct svc_fh *,
-                                unsigned long size);
-__be32          nfsd_readdir(struct svc_rqst *, struct svc_fh *,
-                             loff_t *, struct readdir_cd *, filldir_t);
-__be32          nfsd_statfs(struct svc_rqst *, struct svc_fh *,
-                                struct kstatfs *, int access);
-int             nfsd_notify_change(struct inode *, struct iattr *);
-__be32          nfsd_permission(struct svc_rqst *, struct svc_export *,
-                                struct dentry *, int);
-int             nfsd_sync_dir(struct dentry *dp);
 #if defined(CONFIG_NFSD_V2_ACL) || defined(CONFIG_NFSD_V3_ACL)
 #ifdef CONFIG_NFSD_V2_ACL
 extern struct svc_version nfsd_acl_version2;
@@ -147,8 +58,6 @@ extern struct svc_version nfsd_acl_version3;
 #else
 #define nfsd_acl_version3 NULL
 #endif
-struct posix_acl *nfsd_get_posix_acl(struct svc_fh *, int);
-int nfsd_set_posix_acl(struct svc_fh *, int, struct posix_acl *);
 #endif
 enum vers_op {NFSD_SET, NFSD_CLEAR, NFSD_TEST, NFSD_AVAIL };
@@ -159,6 +68,11 @@ int nfsd_create_serv(void);
 extern int nfsd_max_blksize;
+static inline int nfsd_v4client(struct svc_rqst *rq)
+{
+        return rq->rq_prog == NFS_PROGRAM && rq->rq_vers == 4;
+}
 /* 
 * NFSv4 State
 */
diff --git a/fs/nfsd/nfsfh.c b/fs/nfsd/nfsfh.c
index 01965b2f3a76..1c12177b908c 100644
--- a/fs/nfsd/nfsfh.c
+++ b/fs/nfsd/nfsfh.c
@@ -1,6 +1,4 @@
 /*
- * linux/fs/nfsd/nfsfh.c
- *
 * NFS server file handle treatment.
 *
 * Copyright (C) 1995, 1996 Olaf Kirch <okir@monad.swb.de>
@@ -9,19 +7,11 @@
 * ... and again Southern-Winter 2001 to support export_operations
 */
-#include <linux/slab.h>
-#include <linux/fs.h>
-#include <linux/unistd.h>
-#include <linux/string.h>
-#include <linux/stat.h>
-#include <linux/dcache.h>
 #include <linux/exportfs.h>
-#include <linux/mount.h>
-#include <linux/sunrpc/clnt.h>
-#include <linux/sunrpc/svc.h>
 #include <linux/sunrpc/svcauth_gss.h>
-#include <linux/nfsd/nfsd.h>
+#include "nfsd.h"
+#include "vfs.h"
 #include "auth.h"
 #define NFSDDBG_FACILITY                NFSDDBG_FH
@@ -96,8 +86,10 @@ nfsd_mode_check(struct svc_rqst *rqstp, umode_t mode, int type)
 static __be32 nfsd_setuser_and_check_port(struct svc_rqst *rqstp,
                                          struct svc_export *exp)
 {
+        int flags = nfsexp_flags(rqstp, exp);
        /* Check if the request originated from a secure port. */
-        if (!rqstp->rq_secure && EX_SECURE(exp)) {
+        if (!rqstp->rq_secure && (flags & NFSEXP_INSECURE_PORT)) {
                RPC_IFDEBUG(char buf[RPC_MAX_ADDRBUFLEN]);
                dprintk(KERN_WARNING
                       "nfsd: request from insecure port %s!\n",
@@ -109,6 +101,36 @@ static __be32 nfsd_setuser_and_check_port(struct svc_rqst *rqstp,
        return nfserrno(nfsd_setuser(rqstp, exp));
 }
+static inline __be32 check_pseudo_root(struct svc_rqst *rqstp,
+        struct dentry *dentry, struct svc_export *exp)
+{
+        if (!(exp->ex_flags & NFSEXP_V4ROOT))
+                return nfs_ok;
+        /*
+         * v2/v3 clients have no need for the V4ROOT export--they use
+         * the mount protocl instead; also, further V4ROOT checks may be
+         * in v4-specific code, in which case v2/v3 clients could bypass
+         * them.
+         */
+        if (!nfsd_v4client(rqstp))
+                return nfserr_stale;
+        /*
+         * We're exposing only the directories and symlinks that have to be
+         * traversed on the way to real exports:
+         */
+        if (unlikely(!S_ISDIR(dentry->d_inode->i_mode) &&
+                     !S_ISLNK(dentry->d_inode->i_mode)))
+                return nfserr_stale;
+        /*
+         * A pseudoroot export gives permission to access only one
+         * single directory; the kernel has to make another upcall
+         * before granting access to anything else under it:
+         */
+        if (unlikely(dentry != exp->ex_path.dentry))
+                return nfserr_stale;
+        return nfs_ok;
+}
 /*
 * Use the given filehandle to look up the corresponding export and
 * dentry.  On success, the results are used to set fh_export and
@@ -232,14 +254,6 @@ static __be32 nfsd_set_fh_dentry(struct svc_rqst *rqstp, struct svc_fh *fhp)
                goto out;
        }
-        if (exp->ex_flags & NFSEXP_NOSUBTREECHECK) {
-                error = nfsd_setuser_and_check_port(rqstp, exp);
-                if (error) {
-                        dput(dentry);
-                        goto out;
-                }
-        }
        if (S_ISDIR(dentry->d_inode->i_mode) &&
                        (dentry->d_flags & DCACHE_DISCONNECTED)) {
                printk("nfsd: find_fh_dentry returned a DISCONNECTED directory: %s/%s\n",
@@ -294,28 +308,32 @@ fh_verify(struct svc_rqst *rqstp, struct svc_fh *fhp, int type, int access)
                error = nfsd_set_fh_dentry(rqstp, fhp);
                if (error)
                        goto out;
-                dentry = fhp->fh_dentry;
-                exp = fhp->fh_export;
-        } else {
-                /*
-                 * just rechecking permissions
-                 * (e.g. nfsproc_create calls fh_verify, then nfsd_create
-                 * does as well)
-                 */
-                dprintk("nfsd: fh_verify - just checking\n");
-                dentry = fhp->fh_dentry;
-                exp = fhp->fh_export;
-                /*
-                 * Set user creds for this exportpoint; necessary even
-                 * in the "just checking" case because this may be a
-                 * filehandle that was created by fh_compose, and that
-                 * is about to be used in another nfsv4 compound
-                 * operation.
-                 */
-                error = nfsd_setuser_and_check_port(rqstp, exp);
-                if (error)
-                        goto out;
        }
+        dentry = fhp->fh_dentry;
+        exp = fhp->fh_export;
+        /*
+         * We still have to do all these permission checks, even when
+         * fh_dentry is already set:
+         *      - fh_verify may be called multiple times with different
+         *        "access" arguments (e.g. nfsd_proc_create calls
+         *        fh_verify(...,NFSD_MAY_EXEC) first, then later (in
+         *        nfsd_create) calls fh_verify(...,NFSD_MAY_CREATE).
+         *      - in the NFSv4 case, the filehandle may have been filled
+         *        in by fh_compose, and given a dentry, but further
+         *        compound operations performed with that filehandle
+         *        still need permissions checks.  In the worst case, a
+         *        mountpoint crossing may have changed the export
+         *        options, and we may now need to use a different uid
+         *        (for example, if different id-squashing options are in
+         *        effect on the new filesystem).
+         */
+        error = check_pseudo_root(rqstp, dentry, exp);
+        if (error)
+                goto out;
+        error = nfsd_setuser_and_check_port(rqstp, exp);
+        if (error)
+                goto out;
        error = nfsd_mode_check(rqstp, dentry->d_inode->i_mode, type);
        if (error)
diff --git a/fs/nfsd/nfsfh.h b/fs/nfsd/nfsfh.h
new file mode 100644
index 000000000000..cdfb8c6a4206
--- /dev/null
+++ b/fs/nfsd/nfsfh.h
@@ -0,0 +1,208 @@
+/* Copyright (C) 1995, 1996, 1997 Olaf Kirch <okir@monad.swb.de> */
+#ifndef _LINUX_NFSD_FH_INT_H
+#define _LINUX_NFSD_FH_INT_H
+#include <linux/nfsd/nfsfh.h>
+enum nfsd_fsid {
+        FSID_DEV = 0,
+        FSID_NUM,
+        FSID_MAJOR_MINOR,
+        FSID_ENCODE_DEV,
+        FSID_UUID4_INUM,
+        FSID_UUID8,
+        FSID_UUID16,
+        FSID_UUID16_INUM,
+};
+enum fsid_source {
+        FSIDSOURCE_DEV,
+        FSIDSOURCE_FSID,
+        FSIDSOURCE_UUID,
+};
+extern enum fsid_source fsid_source(struct svc_fh *fhp);
+/* This might look a little large to "inline" but in all calls except
+ * one, 'vers' is constant so moste of the function disappears.
+ */
+static inline void mk_fsid(int vers, u32 *fsidv, dev_t dev, ino_t ino,
+                           u32 fsid, unsigned char *uuid)
+{
+        u32 *up;
+        switch(vers) {
+        case FSID_DEV:
+                fsidv[0] = htonl((MAJOR(dev)<<16) |
+                                 MINOR(dev));
+                fsidv[1] = ino_t_to_u32(ino);
+                break;
+        case FSID_NUM:
+                fsidv[0] = fsid;
+                break;
+        case FSID_MAJOR_MINOR:
+                fsidv[0] = htonl(MAJOR(dev));
+                fsidv[1] = htonl(MINOR(dev));
+                fsidv[2] = ino_t_to_u32(ino);
+                break;
+        case FSID_ENCODE_DEV:
+                fsidv[0] = new_encode_dev(dev);
+                fsidv[1] = ino_t_to_u32(ino);
+                break;
+        case FSID_UUID4_INUM:
+                /* 4 byte fsid and inode number */
+                up = (u32*)uuid;
+                fsidv[0] = ino_t_to_u32(ino);
+                fsidv[1] = up[0] ^ up[1] ^ up[2] ^ up[3];
+                break;
+        case FSID_UUID8:
+                /* 8 byte fsid  */
+                up = (u32*)uuid;
+                fsidv[0] = up[0] ^ up[2];
+                fsidv[1] = up[1] ^ up[3];
+                break;
+        case FSID_UUID16:
+                /* 16 byte fsid - NFSv3+ only */
+                memcpy(fsidv, uuid, 16);
+                break;
+        case FSID_UUID16_INUM:
+                /* 8 byte inode and 16 byte fsid */
+                *(u64*)fsidv = (u64)ino;
+                memcpy(fsidv+2, uuid, 16);
+                break;
+        default: BUG();
+        }
+}
+static inline int key_len(int type)
+{
+        switch(type) {
+        case FSID_DEV:          return 8;
+        case FSID_NUM:          return 4;
+        case FSID_MAJOR_MINOR:  return 12;
+        case FSID_ENCODE_DEV:   return 8;
+        case FSID_UUID4_INUM:   return 8;
+        case FSID_UUID8:        return 8;
+        case FSID_UUID16:       return 16;
+        case FSID_UUID16_INUM:  return 24;
+        default: return 0;
+        }
+}
+/*
+ * Shorthand for dprintk()'s
+ */
+extern char * SVCFH_fmt(struct svc_fh *fhp);
+/*
+ * Function prototypes
+ */
+__be32  fh_verify(struct svc_rqst *, struct svc_fh *, int, int);
+__be32  fh_compose(struct svc_fh *, struct svc_export *, struct dentry *, struct svc_fh *);
+__be32  fh_update(struct svc_fh *);
+void    fh_put(struct svc_fh *);
+static __inline__ struct svc_fh *
+fh_copy(struct svc_fh *dst, struct svc_fh *src)
+{
+        WARN_ON(src->fh_dentry || src->fh_locked);
+                        
+        *dst = *src;
+        return dst;
+}
+static inline void
+fh_copy_shallow(struct knfsd_fh *dst, struct knfsd_fh *src)
+{
+        dst->fh_size = src->fh_size;
+        memcpy(&dst->fh_base, &src->fh_base, src->fh_size);
+}
+static __inline__ struct svc_fh *
+fh_init(struct svc_fh *fhp, int maxsize)
+{
+        memset(fhp, 0, sizeof(*fhp));
+        fhp->fh_maxsize = maxsize;
+        return fhp;
+}
+#ifdef CONFIG_NFSD_V3
+/*
+ * Fill in the pre_op attr for the wcc data
+ */
+static inline void
+fill_pre_wcc(struct svc_fh *fhp)
+{
+        struct inode    *inode;
+        inode = fhp->fh_dentry->d_inode;
+        if (!fhp->fh_pre_saved) {
+                fhp->fh_pre_mtime = inode->i_mtime;
+                fhp->fh_pre_ctime = inode->i_ctime;
+                fhp->fh_pre_size  = inode->i_size;
+                fhp->fh_pre_change = inode->i_version;
+                fhp->fh_pre_saved = 1;
+        }
+}
+extern void fill_post_wcc(struct svc_fh *);
+#else
+#define fill_pre_wcc(ignored)
+#define fill_post_wcc(notused)
+#endif /* CONFIG_NFSD_V3 */
+/*
+ * Lock a file handle/inode
+ * NOTE: both fh_lock and fh_unlock are done "by hand" in
+ * vfs.c:nfsd_rename as it needs to grab 2 i_mutex's at once
+ * so, any changes here should be reflected there.
+ */
+static inline void
+fh_lock_nested(struct svc_fh *fhp, unsigned int subclass)
+{
+        struct dentry   *dentry = fhp->fh_dentry;
+        struct inode    *inode;
+        BUG_ON(!dentry);
+        if (fhp->fh_locked) {
+                printk(KERN_WARNING "fh_lock: %s/%s already locked!\n",
+                        dentry->d_parent->d_name.name, dentry->d_name.name);
+                return;
+        }
+        inode = dentry->d_inode;
+        mutex_lock_nested(&inode->i_mutex, subclass);
+        fill_pre_wcc(fhp);
+        fhp->fh_locked = 1;
+}
+static inline void
+fh_lock(struct svc_fh *fhp)
+{
+        fh_lock_nested(fhp, I_MUTEX_NORMAL);
+}
+/*
+ * Unlock a file handle/inode
+ */
+static inline void
+fh_unlock(struct svc_fh *fhp)
+{
+        BUG_ON(!fhp->fh_dentry);
+        if (fhp->fh_locked) {
+                fill_post_wcc(fhp);
+                mutex_unlock(&fhp->fh_dentry->d_inode->i_mutex);
+                fhp->fh_locked = 0;
+        }
+}
+#endif /* _LINUX_NFSD_FH_INT_H */
diff --git a/fs/nfsd/nfsproc.c b/fs/nfsd/nfsproc.c
index 0eb9c820b7a6..a047ad6111ef 100644
--- a/fs/nfsd/nfsproc.c
+++ b/fs/nfsd/nfsproc.c
@@ -1,29 +1,14 @@
 /*
- * nfsproc2.c   Process version 2 NFS requests.
- * linux/fs/nfsd/nfs2proc.c
- * 
 * Process version 2 NFS requests.
 *
 * Copyright (C) 1995-1997 Olaf Kirch <okir@monad.swb.de>
 */
-#include <linux/linkage.h>
-#include <linux/time.h>
-#include <linux/errno.h>
-#include <linux/fs.h>
-#include <linux/stat.h>
-#include <linux/fcntl.h>
-#include <linux/net.h>
-#include <linux/in.h>
 #include <linux/namei.h>
-#include <linux/unistd.h>
-#include <linux/slab.h>
-#include <linux/sunrpc/clnt.h>
+#include "cache.h"
-#include <linux/sunrpc/svc.h>
+#include "xdr.h"
-#include <linux/nfsd/nfsd.h>
+#include "vfs.h"
-#include <linux/nfsd/cache.h>
-#include <linux/nfsd/xdr.h>
 typedef struct svc_rqst svc_rqst;
 typedef struct svc_buf  svc_buf;
@@ -758,6 +743,7 @@ nfserrno (int errno)
                { nfserr_io, -ETXTBSY },
                { nfserr_notsupp, -EOPNOTSUPP },
                { nfserr_toosmall, -ETOOSMALL },
+                { nfserr_serverfault, -ESERVERFAULT },
        };
        int     i;
diff --git a/fs/nfsd/nfssvc.c b/fs/nfsd/nfssvc.c
index 67ea83eedd43..171699eb07c8 100644
--- a/fs/nfsd/nfssvc.c
+++ b/fs/nfsd/nfssvc.c
@@ -1,6 +1,4 @@
 /*
- * linux/fs/nfsd/nfssvc.c
- *
 * Central processing for nfsd.
 *
 * Authors:     Olaf Kirch (okir@monad.swb.de)
@@ -8,33 +6,19 @@
 * Copyright (C) 1995, 1996, 1997 Olaf Kirch <okir@monad.swb.de>
 */
-#include <linux/module.h>
 #include <linux/sched.h>
-#include <linux/time.h>
-#include <linux/errno.h>
-#include <linux/nfs.h>
-#include <linux/in.h>
-#include <linux/uio.h>
-#include <linux/unistd.h>
-#include <linux/slab.h>
-#include <linux/smp.h>
 #include <linux/freezer.h>
 #include <linux/fs_struct.h>
-#include <linux/kthread.h>
 #include <linux/swap.h>
-#include <linux/sunrpc/types.h>
 #include <linux/sunrpc/stats.h>
-#include <linux/sunrpc/svc.h>
 #include <linux/sunrpc/svcsock.h>
-#include <linux/sunrpc/cache.h>
-#include <linux/nfsd/nfsd.h>
-#include <linux/nfsd/stats.h>
-#include <linux/nfsd/cache.h>
-#include <linux/nfsd/syscall.h>
 #include <linux/lockd/bind.h>
 #include <linux/nfsacl.h>
 #include <linux/seq_file.h>
+#include "nfsd.h"
+#include "cache.h"
+#include "vfs.h"
 #define NFSDDBG_FACILITY        NFSDDBG_SVC
diff --git a/fs/nfsd/nfsxdr.c b/fs/nfsd/nfsxdr.c
index afd08e2c90a5..4ce005dbf3e6 100644
--- a/fs/nfsd/nfsxdr.c
+++ b/fs/nfsd/nfsxdr.c
@@ -1,20 +1,10 @@
 /*
- * linux/fs/nfsd/nfsxdr.c
- *
 * XDR support for nfsd
 *
 * Copyright (C) 1995, 1996 Olaf Kirch <okir@monad.swb.de>
 */
-#include <linux/types.h>
+#include "xdr.h"
-#include <linux/time.h>
-#include <linux/nfs.h>
-#include <linux/vfs.h>
-#include <linux/sunrpc/xdr.h>
-#include <linux/sunrpc/svc.h>
-#include <linux/nfsd/nfsd.h>
-#include <linux/nfsd/xdr.h>
-#include <linux/mm.h>
 #include "auth.h"
 #define NFSDDBG_FACILITY                NFSDDBG_XDR
diff --git a/include/linux/nfsd/state.h b/fs/nfsd/state.h
index b38d11324189..fefeae27f25e 100644
--- a/include/linux/nfsd/state.h
+++ b/fs/nfsd/state.h
@@ -1,6 +1,4 @@
 /*
- *  linux/include/nfsd/state.h
- *
 *  Copyright (c) 2001 The Regents of the University of Michigan.
 *  All rights reserved.
 *
@@ -37,9 +35,8 @@
 #ifndef _NFSD4_STATE_H
 #define _NFSD4_STATE_H
-#include <linux/list.h>
+#include <linux/nfsd/nfsfh.h>
-#include <linux/kref.h>
+#include "nfsfh.h"
-#include <linux/sunrpc/clnt.h>
 typedef struct {
        u32             cl_boot;
@@ -60,6 +57,13 @@ typedef struct {
 #define si_stateownerid   si_opaque.so_stateownerid
 #define si_fileid         si_opaque.so_fileid
+#define STATEID_FMT     "(%08x/%08x/%08x/%08x)"
+#define STATEID_VAL(s) \
+        (s)->si_boot, \
+        (s)->si_stateownerid, \
+        (s)->si_fileid, \
+        (s)->si_generation
 struct nfsd4_cb_sequence {
        /* args/res */
        u32                     cbs_minorversion;
diff --git a/fs/nfsd/stats.c b/fs/nfsd/stats.c
index 71944cddf680..5232d3e8fb2f 100644
--- a/fs/nfsd/stats.c
+++ b/fs/nfsd/stats.c
@@ -1,6 +1,4 @@
 /*
- * linux/fs/nfsd/stats.c
- *
 * procfs-based user access to knfsd statistics
 *
 * /proc/net/rpc/nfsd
@@ -23,18 +21,13 @@
 * Copyright (C) 1995, 1996, 1997 Olaf Kirch <okir@monad.swb.de>
 */
-#include <linux/kernel.h>
-#include <linux/time.h>
-#include <linux/proc_fs.h>
 #include <linux/seq_file.h>
-#include <linux/stat.h>
 #include <linux/module.h>
-#include <linux/sunrpc/svc.h>
 #include <linux/sunrpc/stats.h>
-#include <linux/nfsd/nfsd.h>
 #include <linux/nfsd/stats.h>
+#include "nfsd.h"
 struct nfsd_stats       nfsdstats;
 struct svc_stat         nfsd_svcstats = {
        .program        = &nfsd_program,
diff --git a/fs/nfsd/vfs.c b/fs/nfsd/vfs.c
index 936f08400db6..7c2e337d05af 100644
--- a/fs/nfsd/vfs.c
+++ b/fs/nfsd/vfs.c
@@ -1,7 +1,5 @@
 #define MSNFS   /* HACK HACK */
 /*
- * linux/fs/nfsd/vfs.c
- *
 * File operations used by nfsd. Some of these have been ripped from
 * other parts of the kernel because they weren't exported, others
 * are partial duplicates with added or changed functionality.
@@ -16,48 +14,31 @@
 * Zerocpy NFS support (C) 2002 Hirokazu Takahashi <taka@valinux.co.jp>
 */
-#include <linux/string.h>
-#include <linux/time.h>
-#include <linux/errno.h>
 #include <linux/fs.h>
 #include <linux/file.h>
-#include <linux/mount.h>
-#include <linux/major.h>
 #include <linux/splice.h>
-#include <linux/proc_fs.h>
-#include <linux/stat.h>
 #include <linux/fcntl.h>
-#include <linux/net.h>
-#include <linux/unistd.h>
-#include <linux/slab.h>
-#include <linux/pagemap.h>
-#include <linux/in.h>
-#include <linux/module.h>
 #include <linux/namei.h>
-#include <linux/vfs.h>
 #include <linux/delay.h>
-#include <linux/sunrpc/svc.h>
-#include <linux/nfsd/nfsd.h>
-#ifdef CONFIG_NFSD_V3
-#include <linux/nfs3.h>
-#include <linux/nfsd/xdr3.h>
-#endif /* CONFIG_NFSD_V3 */
-#include <linux/nfsd/nfsfh.h>
 #include <linux/quotaops.h>
 #include <linux/fsnotify.h>
-#include <linux/posix_acl.h>
 #include <linux/posix_acl_xattr.h>
 #include <linux/xattr.h>
+#include <linux/jhash.h>
+#include <linux/ima.h>
+#include <asm/uaccess.h>
+#ifdef CONFIG_NFSD_V3
+#include "xdr3.h"
+#endif /* CONFIG_NFSD_V3 */
 #ifdef CONFIG_NFSD_V4
-#include <linux/nfs4.h>
 #include <linux/nfs4_acl.h>
 #include <linux/nfsd_idmap.h>
-#include <linux/security.h>
 #endif /* CONFIG_NFSD_V4 */
-#include <linux/jhash.h>
-#include <linux/ima.h>
-#include <asm/uaccess.h>
+#include "nfsd.h"
+#include "vfs.h"
 #define NFSDDBG_FACILITY                NFSDDBG_FILEOP
@@ -89,12 +70,6 @@ struct raparm_hbucket {
 #define RAPARM_HASH_MASK        (RAPARM_HASH_SIZE-1)
 static struct raparm_hbucket    raparm_hash[RAPARM_HASH_SIZE];
-static inline int
-nfsd_v4client(struct svc_rqst *rq)
-{
-    return rq->rq_prog == NFS_PROGRAM && rq->rq_vers == 4;
-}
 /* 
 * Called from nfsd_lookup and encode_dirent. Check if we have crossed 
 * a mount point.
@@ -116,8 +91,16 @@ nfsd_cross_mnt(struct svc_rqst *rqstp, struct dentry **dpp,
        exp2 = rqst_exp_get_by_name(rqstp, &path);
        if (IS_ERR(exp2)) {
-                if (PTR_ERR(exp2) != -ENOENT)
+                err = PTR_ERR(exp2);
-                        err = PTR_ERR(exp2);
+                /*
+                 * We normally allow NFS clients to continue
+                 * "underneath" a mountpoint that is not exported.
+                 * The exception is V4ROOT, where no traversal is ever
+                 * allowed without an explicit export of the new
+                 * directory.
+                 */
+                if (err == -ENOENT && !(exp->ex_flags & NFSEXP_V4ROOT))
+                        err = 0;
                path_put(&path);
                goto out;
        }
@@ -141,6 +124,53 @@ out:
        return err;
 }
+static void follow_to_parent(struct path *path)
+{
+        struct dentry *dp;
+        while (path->dentry == path->mnt->mnt_root && follow_up(path))
+                ;
+        dp = dget_parent(path->dentry);
+        dput(path->dentry);
+        path->dentry = dp;
+}
+static int nfsd_lookup_parent(struct svc_rqst *rqstp, struct dentry *dparent, struct svc_export **exp, struct dentry **dentryp)
+{
+        struct svc_export *exp2;
+        struct path path = {.mnt = mntget((*exp)->ex_path.mnt),
+                            .dentry = dget(dparent)};
+        follow_to_parent(&path);
+        exp2 = rqst_exp_parent(rqstp, &path);
+        if (PTR_ERR(exp2) == -ENOENT) {
+                *dentryp = dget(dparent);
+        } else if (IS_ERR(exp2)) {
+                path_put(&path);
+                return PTR_ERR(exp2);
+        } else {
+                *dentryp = dget(path.dentry);
+                exp_put(*exp);
+                *exp = exp2;
+        }
+        path_put(&path);
+        return 0;
+}
+/*
+ * For nfsd purposes, we treat V4ROOT exports as though there was an
+ * export at *every* directory.
+ */
+int nfsd_mountpoint(struct dentry *dentry, struct svc_export *exp)
+{
+        if (d_mountpoint(dentry))
+                return 1;
+        if (!(exp->ex_flags & NFSEXP_V4ROOT))
+                return 0;
+        return dentry->d_inode != NULL;
+}
 __be32
 nfsd_lookup_dentry(struct svc_rqst *rqstp, struct svc_fh *fhp,
                   const char *name, unsigned int len,
@@ -169,35 +199,13 @@ nfsd_lookup_dentry(struct svc_rqst *rqstp, struct svc_fh *fhp,
                        dentry = dget(dparent);
                else if (dparent != exp->ex_path.dentry)
                        dentry = dget_parent(dparent);
-                else if (!EX_NOHIDE(exp))
+                else if (!EX_NOHIDE(exp) && !nfsd_v4client(rqstp))
                        dentry = dget(dparent); /* .. == . just like at / */
                else {
                        /* checking mountpoint crossing is very different when stepping up */
-                        struct svc_export *exp2 = NULL;
+                        host_err = nfsd_lookup_parent(rqstp, dparent, &exp, &dentry);
-                        struct dentry *dp;
+                        if (host_err)
-                        struct path path = {.mnt = mntget(exp->ex_path.mnt),
-                                            .dentry = dget(dparent)};
-                        while (path.dentry == path.mnt->mnt_root &&
-                               follow_up(&path))
-                                ;
-                        dp = dget_parent(path.dentry);
-                        dput(path.dentry);
-                        path.dentry = dp;
-                        exp2 = rqst_exp_parent(rqstp, &path);
-                        if (PTR_ERR(exp2) == -ENOENT) {
-                                dentry = dget(dparent);
-                        } else if (IS_ERR(exp2)) {
-                                host_err = PTR_ERR(exp2);
-                                path_put(&path);
                                goto out_nfserr;
-                        } else {
-                                dentry = dget(path.dentry);
-                                exp_put(exp);
-                                exp = exp2;
-                        }
-                        path_put(&path);
                }
        } else {
                fh_lock(fhp);
@@ -208,7 +216,7 @@ nfsd_lookup_dentry(struct svc_rqst *rqstp, struct svc_fh *fhp,
                /*
                 * check if we have crossed a mount point ...
                 */
-                if (d_mountpoint(dentry)) {
+                if (nfsd_mountpoint(dentry, exp)) {
                        if ((host_err = nfsd_cross_mnt(rqstp, &dentry, &exp))) {
                                dput(dentry);
                                goto out_nfserr;
diff --git a/fs/nfsd/vfs.h b/fs/nfsd/vfs.h
new file mode 100644
index 000000000000..4b1de0a9ea75
--- /dev/null
+++ b/fs/nfsd/vfs.h
@@ -0,0 +1,101 @@
+/*
+ * Copyright (C) 1995-1997 Olaf Kirch <okir@monad.swb.de>
+ */
+#ifndef LINUX_NFSD_VFS_H
+#define LINUX_NFSD_VFS_H
+#include "nfsfh.h"
+/*
+ * Flags for nfsd_permission
+ */
+#define NFSD_MAY_NOP            0
+#define NFSD_MAY_EXEC           1 /* == MAY_EXEC */
+#define NFSD_MAY_WRITE          2 /* == MAY_WRITE */
+#define NFSD_MAY_READ           4 /* == MAY_READ */
+#define NFSD_MAY_SATTR          8
+#define NFSD_MAY_TRUNC          16
+#define NFSD_MAY_LOCK           32
+#define NFSD_MAY_OWNER_OVERRIDE 64
+#define NFSD_MAY_LOCAL_ACCESS   128 /* IRIX doing local access check on device special file*/
+#define NFSD_MAY_BYPASS_GSS_ON_ROOT 256
+#define NFSD_MAY_CREATE         (NFSD_MAY_EXEC|NFSD_MAY_WRITE)
+#define NFSD_MAY_REMOVE         (NFSD_MAY_EXEC|NFSD_MAY_WRITE|NFSD_MAY_TRUNC)
+/*
+ * Callback function for readdir
+ */
+typedef int (*nfsd_dirop_t)(struct inode *, struct dentry *, int, int);
+/* nfsd/vfs.c */
+int             fh_lock_parent(struct svc_fh *, struct dentry *);
+int             nfsd_racache_init(int);
+void            nfsd_racache_shutdown(void);
+int             nfsd_cross_mnt(struct svc_rqst *rqstp, struct dentry **dpp,
+                                struct svc_export **expp);
+__be32          nfsd_lookup(struct svc_rqst *, struct svc_fh *,
+                                const char *, unsigned int, struct svc_fh *);
+__be32           nfsd_lookup_dentry(struct svc_rqst *, struct svc_fh *,
+                                const char *, unsigned int,
+                                struct svc_export **, struct dentry **);
+__be32          nfsd_setattr(struct svc_rqst *, struct svc_fh *,
+                                struct iattr *, int, time_t);
+int nfsd_mountpoint(struct dentry *, struct svc_export *);
+#ifdef CONFIG_NFSD_V4
+__be32          nfsd4_set_nfs4_acl(struct svc_rqst *, struct svc_fh *,
+                    struct nfs4_acl *);
+int             nfsd4_get_nfs4_acl(struct svc_rqst *, struct dentry *, struct nfs4_acl **);
+#endif /* CONFIG_NFSD_V4 */
+__be32          nfsd_create(struct svc_rqst *, struct svc_fh *,
+                                char *name, int len, struct iattr *attrs,
+                                int type, dev_t rdev, struct svc_fh *res);
+#ifdef CONFIG_NFSD_V3
+__be32          nfsd_access(struct svc_rqst *, struct svc_fh *, u32 *, u32 *);
+__be32          nfsd_create_v3(struct svc_rqst *, struct svc_fh *,
+                                char *name, int len, struct iattr *attrs,
+                                struct svc_fh *res, int createmode,
+                                u32 *verifier, int *truncp, int *created);
+__be32          nfsd_commit(struct svc_rqst *, struct svc_fh *,
+                                loff_t, unsigned long);
+#endif /* CONFIG_NFSD_V3 */
+__be32          nfsd_open(struct svc_rqst *, struct svc_fh *, int,
+                                int, struct file **);
+void            nfsd_close(struct file *);
+__be32          nfsd_read(struct svc_rqst *, struct svc_fh *, struct file *,
+                                loff_t, struct kvec *, int, unsigned long *);
+__be32          nfsd_write(struct svc_rqst *, struct svc_fh *,struct file *,
+                                loff_t, struct kvec *,int, unsigned long *, int *);
+__be32          nfsd_readlink(struct svc_rqst *, struct svc_fh *,
+                                char *, int *);
+__be32          nfsd_symlink(struct svc_rqst *, struct svc_fh *,
+                                char *name, int len, char *path, int plen,
+                                struct svc_fh *res, struct iattr *);
+__be32          nfsd_link(struct svc_rqst *, struct svc_fh *,
+                                char *, int, struct svc_fh *);
+__be32          nfsd_rename(struct svc_rqst *,
+                                struct svc_fh *, char *, int,
+                                struct svc_fh *, char *, int);
+__be32          nfsd_remove(struct svc_rqst *,
+                                struct svc_fh *, char *, int);
+__be32          nfsd_unlink(struct svc_rqst *, struct svc_fh *, int type,
+                                char *name, int len);
+int             nfsd_truncate(struct svc_rqst *, struct svc_fh *,
+                                unsigned long size);
+__be32          nfsd_readdir(struct svc_rqst *, struct svc_fh *,
+                             loff_t *, struct readdir_cd *, filldir_t);
+__be32          nfsd_statfs(struct svc_rqst *, struct svc_fh *,
+                                struct kstatfs *, int access);
+int             nfsd_notify_change(struct inode *, struct iattr *);
+__be32          nfsd_permission(struct svc_rqst *, struct svc_export *,
+                                struct dentry *, int);
+int             nfsd_sync_dir(struct dentry *dp);
+#if defined(CONFIG_NFSD_V2_ACL) || defined(CONFIG_NFSD_V3_ACL)
+struct posix_acl *nfsd_get_posix_acl(struct svc_fh *, int);
+int nfsd_set_posix_acl(struct svc_fh *, int, struct posix_acl *);
+#endif
+#endif /* LINUX_NFSD_VFS_H */
diff --git a/include/linux/nfsd/xdr.h b/fs/nfsd/xdr.h
index a0132ef58f21..53b1863dd8f6 100644
--- a/include/linux/nfsd/xdr.h
+++ b/fs/nfsd/xdr.h
@@ -1,15 +1,11 @@
-/*
+/* XDR types for nfsd. This is mainly a typing exercise. */
- * linux/include/linux/nfsd/xdr.h
- *
- * XDR types for nfsd. This is mainly a typing exercise.
- */
 #ifndef LINUX_NFSD_H
 #define LINUX_NFSD_H
-#include <linux/fs.h>
 #include <linux/vfs.h>
-#include <linux/nfs.h>
+#include "nfsd.h"
+#include "nfsfh.h"
 struct nfsd_fhandle {
        struct svc_fh           fh;
diff --git a/include/linux/nfsd/xdr3.h b/fs/nfsd/xdr3.h
index 421eddd65a25..7df980eb0562 100644
--- a/include/linux/nfsd/xdr3.h
+++ b/fs/nfsd/xdr3.h
@@ -1,6 +1,4 @@
 /*
- * linux/include/linux/nfsd/xdr3.h
- *
 * XDR types for NFSv3 in nfsd.
 *
 * Copyright (C) 1996-1998, Olaf Kirch <okir@monad.swb.de>
@@ -9,7 +7,7 @@
 #ifndef _LINUX_NFSD_XDR3_H
 #define _LINUX_NFSD_XDR3_H
-#include <linux/nfsd/xdr.h>
+#include "xdr.h"
 struct nfsd3_sattrargs {
        struct svc_fh           fh;
diff --git a/include/linux/nfsd/xdr4.h b/fs/nfsd/xdr4.h
index 73164c2b3d29..efa337739534 100644
--- a/include/linux/nfsd/xdr4.h
+++ b/fs/nfsd/xdr4.h
@@ -1,6 +1,4 @@
 /*
- *  include/linux/nfsd/xdr4.h
- *
 *  Server-side types for NFSv4.
 *
 *  Copyright (c) 2002 The Regents of the University of Michigan.
@@ -39,7 +37,8 @@
 #ifndef _LINUX_NFSD_XDR4_H
 #define _LINUX_NFSD_XDR4_H
-#include <linux/nfs4.h>
+#include "state.h"
+#include "nfsd.h"
 #define NFSD4_MAX_TAGLEN        128
 #define XDR_LEN(n)                     (((n) + 3) & ~3)
diff --git a/fs/proc/base.c b/fs/proc/base.c
index 4df4a464a919..18d5cc62d8ed 100644
--- a/fs/proc/base.c
+++ b/fs/proc/base.c
@@ -2266,7 +2266,7 @@ static const struct inode_operations proc_attr_dir_inode_operations = {
 #endif
-#if defined(USE_ELF_CORE_DUMP) && defined(CONFIG_ELF_CORE)
+#ifdef CONFIG_ELF_CORE
 static ssize_t proc_coredump_filter_read(struct file *file, char __user *buf,
                                         size_t count, loff_t *ppos)
 {
@@ -2623,7 +2623,7 @@ static const struct pid_entry tgid_base_stuff[] = {
 #ifdef CONFIG_FAULT_INJECTION
        REG("make-it-fail", S_IRUGO|S_IWUSR, proc_fault_inject_operations),
 #endif
-#if defined(USE_ELF_CORE_DUMP) && defined(CONFIG_ELF_CORE)
+#ifdef CONFIG_ELF_CORE
        REG("coredump_filter", S_IRUGO|S_IWUSR, proc_coredump_filter_operations),
 #endif
 #ifdef CONFIG_TASK_IO_ACCOUNTING
diff --git a/fs/proc/generic.c b/fs/proc/generic.c
index fa678abc9db1..480cb1065eec 100644
--- a/fs/proc/generic.c
+++ b/fs/proc/generic.c
@@ -429,7 +429,7 @@ struct dentry *proc_lookup_de(struct proc_dir_entry *de, struct inode *dir,
                        unsigned int ino;
                        ino = de->low_ino;
-                        de_get(de);
+                        pde_get(de);
                        spin_unlock(&proc_subdir_lock);
                        error = -EINVAL;
                        inode = proc_get_inode(dir->i_sb, ino, de);
@@ -445,7 +445,7 @@ out_unlock:
                return NULL;
        }
        if (de)
-                de_put(de);
+                pde_put(de);
        return ERR_PTR(error);
 }
@@ -509,17 +509,17 @@ int proc_readdir_de(struct proc_dir_entry *de, struct file *filp, void *dirent,
                                struct proc_dir_entry *next;
                                /* filldir passes info to user space */
-                                de_get(de);
+                                pde_get(de);
                                spin_unlock(&proc_subdir_lock);
                                if (filldir(dirent, de->name, de->namelen, filp->f_pos,
                                            de->low_ino, de->mode >> 12) < 0) {
-                                        de_put(de);
+                                        pde_put(de);
                                        goto out;
                                }
                                spin_lock(&proc_subdir_lock);
                                filp->f_pos++;
                                next = de->next;
-                                de_put(de);
+                                pde_put(de);
                                de = next;
                        } while (de);
                        spin_unlock(&proc_subdir_lock);
@@ -763,7 +763,7 @@ out:
        return NULL;
 }
-void free_proc_entry(struct proc_dir_entry *de)
+static void free_proc_entry(struct proc_dir_entry *de)
 {
        unsigned int ino = de->low_ino;
@@ -777,6 +777,12 @@ void free_proc_entry(struct proc_dir_entry *de)
        kfree(de);
 }
+void pde_put(struct proc_dir_entry *pde)
+{
+        if (atomic_dec_and_test(&pde->count))
+                free_proc_entry(pde);
+}
 /*
 * Remove a /proc entry and free it if it's not currently in use.
 */
@@ -845,6 +851,5 @@ continue_removing:
        WARN(de->subdir, KERN_WARNING "%s: removing non-empty directory "
                        "'%s/%s', leaking at least '%s'\n", __func__,
                        de->parent->name, de->name, de->subdir->name);
-        if (atomic_dec_and_test(&de->count))
+        pde_put(de);
-                free_proc_entry(de);
 }
diff --git a/fs/proc/inode.c b/fs/proc/inode.c
index d78ade305541..445a02bcaab3 100644
--- a/fs/proc/inode.c
+++ b/fs/proc/inode.c
@@ -24,29 +24,6 @@
 #include "internal.h"
-struct proc_dir_entry *de_get(struct proc_dir_entry *de)
-{
-        atomic_inc(&de->count);
-        return de;
-}
-/*
- * Decrements the use count and checks for deferred deletion.
- */
-void de_put(struct proc_dir_entry *de)
-{
-        if (!atomic_read(&de->count)) {
-                printk("de_put: entry %s already free!\n", de->name);
-                return;
-        }
-        if (atomic_dec_and_test(&de->count))
-                free_proc_entry(de);
-}
-/*
- * Decrement the use count of the proc_dir_entry.
- */
 static void proc_delete_inode(struct inode *inode)
 {
        struct proc_dir_entry *de;
@@ -59,7 +36,7 @@ static void proc_delete_inode(struct inode *inode)
        /* Let go of any associated proc directory entry */
        de = PROC_I(inode)->pde;
        if (de)
-                de_put(de);
+                pde_put(de);
        if (PROC_I(inode)->sysctl)
                sysctl_head_put(PROC_I(inode)->sysctl);
        clear_inode(inode);
@@ -480,7 +457,7 @@ struct inode *proc_get_inode(struct super_block *sb, unsigned int ino,
                }
                unlock_new_inode(inode);
        } else
-               de_put(de);
+               pde_put(de);
        return inode;
 }                       
@@ -495,7 +472,7 @@ int proc_fill_super(struct super_block *s)
        s->s_op = &proc_sops;
        s->s_time_gran = 1;
        
-        de_get(&proc_root);
+        pde_get(&proc_root);
        root_inode = proc_get_inode(s, PROC_ROOT_INO, &proc_root);
        if (!root_inode)
                goto out_no_root;
@@ -509,6 +486,6 @@ int proc_fill_super(struct super_block *s)
 out_no_root:
        printk("proc_read_super: get root inode failed\n");
        iput(root_inode);
-        de_put(&proc_root);
+        pde_put(&proc_root);
        return -ENOMEM;
 }
diff --git a/fs/proc/internal.h b/fs/proc/internal.h
index 753ca37002c8..1f24a3eddd12 100644
--- a/fs/proc/internal.h
+++ b/fs/proc/internal.h
@@ -61,8 +61,6 @@ extern const struct file_operations proc_pagemap_operations;
 extern const struct file_operations proc_net_operations;
 extern const struct inode_operations proc_net_inode_operations;
-void free_proc_entry(struct proc_dir_entry *de);
 void proc_init_inodecache(void);
 static inline struct pid *proc_pid(struct inode *inode)
@@ -101,8 +99,12 @@ unsigned long task_vsize(struct mm_struct *);
 int task_statm(struct mm_struct *, int *, int *, int *, int *);
 void task_mem(struct seq_file *, struct mm_struct *);
-struct proc_dir_entry *de_get(struct proc_dir_entry *de);
+static inline struct proc_dir_entry *pde_get(struct proc_dir_entry *pde)
-void de_put(struct proc_dir_entry *de);
+{
+        atomic_inc(&pde->count);
+        return pde;
+}
+void pde_put(struct proc_dir_entry *pde);
 extern struct vfsmount *proc_mnt;
 int proc_fill_super(struct super_block *);
diff --git a/fs/qnx4/bitmap.c b/fs/qnx4/bitmap.c
index 32f5d131a644..22e0d60e53ef 100644
--- a/fs/qnx4/bitmap.c
+++ b/fs/qnx4/bitmap.c
@@ -17,13 +17,6 @@
 #include <linux/bitops.h>
 #include "qnx4.h"
-#if 0
-int qnx4_new_block(struct super_block *sb)
-{
-        return 0;
-}
-#endif  /*  0  */
 static void count_bits(register const char *bmPart, register int size,
                       int *const tf)
 {
@@ -35,22 +28,7 @@ static void count_bits(register const char *bmPart, register int size,
        }
        do {
                b = *bmPart++;
-                if ((b & 1) == 0)
+                tot += 8 - hweight8(b);
-                        tot++;
-                if ((b & 2) == 0)
-                        tot++;
-                if ((b & 4) == 0)
-                        tot++;
-                if ((b & 8) == 0)
-                        tot++;
-                if ((b & 16) == 0)
-                        tot++;
-                if ((b & 32) == 0)
-                        tot++;
-                if ((b & 64) == 0)
-                        tot++;
-                if ((b & 128) == 0)
-                        tot++;
                size--;
        } while (size != 0);
        *tf = tot;
diff --git a/fs/qnx4/inode.c b/fs/qnx4/inode.c
index 449f5a66dd34..ebf3440d28ca 100644
--- a/fs/qnx4/inode.c
+++ b/fs/qnx4/inode.c
@@ -64,25 +64,7 @@ static struct buffer_head *qnx4_getblk(struct inode *inode, int nr,
                result = sb_getblk(inode->i_sb, nr);
                return result;
        }
-        if (!create) {
+        return NULL;
-                return NULL;
-        }
-#if 0
-        tmp = qnx4_new_block(inode->i_sb);
-        if (!tmp) {
-                return NULL;
-        }
-        result = sb_getblk(inode->i_sb, tmp);
-        if (tst) {
-                qnx4_free_block(inode->i_sb, tmp);
-                brelse(result);
-                goto repeat;
-        }
-        tst = tmp;
-#endif
-        inode->i_ctime = CURRENT_TIME_SEC;
-        mark_inode_dirty(inode);
-        return result;
 }
 struct buffer_head *qnx4_bread(struct inode *inode, int block, int create)
@@ -113,8 +95,6 @@ static int qnx4_get_block( struct inode *inode, sector_t iblock, struct buffer_h
        if ( phys ) {
                // logical block is before EOF
                map_bh(bh, inode->i_sb, phys);
-        } else if ( create ) {
-                // to be done.
        }
        return 0;
 }
diff --git a/fs/reiserfs/Makefile b/fs/reiserfs/Makefile
index 6a9e30c041dd..792b3cb2cd18 100644
--- a/fs/reiserfs/Makefile
+++ b/fs/reiserfs/Makefile
@@ -7,7 +7,11 @@ obj-$(CONFIG_REISERFS_FS) += reiserfs.o
 reiserfs-objs := bitmap.o do_balan.o namei.o inode.o file.o dir.o fix_node.o \
                 super.o prints.o objectid.o lbalance.o ibalance.o stree.o \
                 hashes.o tail_conversion.o journal.o resize.o \
-                 item_ops.o ioctl.o procfs.o xattr.o lock.o
+                 item_ops.o ioctl.o xattr.o lock.o
+ifeq ($(CONFIG_REISERFS_PROC_INFO),y)
+reiserfs-objs += procfs.o
+endif
 ifeq ($(CONFIG_REISERFS_FS_XATTR),y)
 reiserfs-objs += xattr_user.o xattr_trusted.o
diff --git a/fs/reiserfs/procfs.c b/fs/reiserfs/procfs.c
index 9229e5514a4e..7a9981196c1c 100644
--- a/fs/reiserfs/procfs.c
+++ b/fs/reiserfs/procfs.c
@@ -17,8 +17,6 @@
 #include <linux/init.h>
 #include <linux/proc_fs.h>
-#ifdef CONFIG_REISERFS_PROC_INFO
 /*
 * LOCKING:
 *
@@ -48,14 +46,6 @@ static int show_version(struct seq_file *m, struct super_block *sb)
        return 0;
 }
-int reiserfs_global_version_in_proc(char *buffer, char **start, off_t offset,
-                                    int count, int *eof, void *data)
-{
-        *start = buffer;
-        *eof = 1;
-        return 0;
-}
 #define SF( x ) ( r -> x )
 #define SFP( x ) SF( s_proc_info_data.x )
 #define SFPL( x ) SFP( x[ level ] )
@@ -538,19 +528,6 @@ int reiserfs_proc_info_done(struct super_block *sb)
        return 0;
 }
-struct proc_dir_entry *reiserfs_proc_register_global(char *name,
-                                                     read_proc_t * func)
-{
-        return (proc_info_root) ? create_proc_read_entry(name, 0,
-                                                         proc_info_root,
-                                                         func, NULL) : NULL;
-}
-void reiserfs_proc_unregister_global(const char *name)
-{
-        remove_proc_entry(name, proc_info_root);
-}
 int reiserfs_proc_info_global_init(void)
 {
        if (proc_info_root == NULL) {
@@ -572,48 +549,6 @@ int reiserfs_proc_info_global_done(void)
        }
        return 0;
 }
-/* REISERFS_PROC_INFO */
-#else
-int reiserfs_proc_info_init(struct super_block *sb)
-{
-        return 0;
-}
-int reiserfs_proc_info_done(struct super_block *sb)
-{
-        return 0;
-}
-struct proc_dir_entry *reiserfs_proc_register_global(char *name,
-                                                     read_proc_t * func)
-{
-        return NULL;
-}
-void reiserfs_proc_unregister_global(const char *name)
-{;
-}
-int reiserfs_proc_info_global_init(void)
-{
-        return 0;
-}
-int reiserfs_proc_info_global_done(void)
-{
-        return 0;
-}
-int reiserfs_global_version_in_proc(char *buffer, char **start,
-                                    off_t offset,
-                                    int count, int *eof, void *data)
-{
-        return 0;
-}
-/* REISERFS_PROC_INFO */
-#endif
 /*
 * Revision 1.1.8.2  2001/07/15 17:08:42  god
 *  . use get_super() in procfs.c
diff --git a/fs/reiserfs/super.c b/fs/reiserfs/super.c
index 339b0baf2af6..b4a7dd03bdb9 100644
--- a/fs/reiserfs/super.c
+++ b/fs/reiserfs/super.c
@@ -2222,8 +2222,6 @@ static int __init init_reiserfs_fs(void)
        }
        reiserfs_proc_info_global_init();
-        reiserfs_proc_register_global("version",
-                                      reiserfs_global_version_in_proc);
        ret = register_filesystem(&reiserfs_fs_type);
@@ -2231,7 +2229,6 @@ static int __init init_reiserfs_fs(void)
                return 0;
        }
-        reiserfs_proc_unregister_global("version");
        reiserfs_proc_info_global_done();
        destroy_inodecache();
@@ -2240,7 +2237,6 @@ static int __init init_reiserfs_fs(void)
 static void __exit exit_reiserfs_fs(void)
 {
-        reiserfs_proc_unregister_global("version");
        reiserfs_proc_info_global_done();
        unregister_filesystem(&reiserfs_fs_type);
        destroy_inodecache();
diff --git a/fs/ufs/dir.c b/fs/ufs/dir.c
index 6f671f1ac271..22af68f8b682 100644
--- a/fs/ufs/dir.c
+++ b/fs/ufs/dir.c
@@ -70,13 +70,13 @@ static inline unsigned long ufs_dir_pages(struct inode *inode)
        return (inode->i_size+PAGE_CACHE_SIZE-1)>>PAGE_CACHE_SHIFT;
 }
-ino_t ufs_inode_by_name(struct inode *dir, struct dentry *dentry)
+ino_t ufs_inode_by_name(struct inode *dir, struct qstr *qstr)
 {
        ino_t res = 0;
        struct ufs_dir_entry *de;
        struct page *page;
        
-        de = ufs_find_entry(dir, dentry, &page);
+        de = ufs_find_entry(dir, qstr, &page);
        if (de) {
                res = fs32_to_cpu(dir->i_sb, de->d_ino);
                ufs_put_page(page);
@@ -249,12 +249,12 @@ struct ufs_dir_entry *ufs_dotdot(struct inode *dir, struct page **p)
 * (as a parameter - res_dir). Page is returned mapped and unlocked.
 * Entry is guaranteed to be valid.
 */
-struct ufs_dir_entry *ufs_find_entry(struct inode *dir, struct dentry *dentry,
+struct ufs_dir_entry *ufs_find_entry(struct inode *dir, struct qstr *qstr,
                                     struct page **res_page)
 {
        struct super_block *sb = dir->i_sb;
-        const char *name = dentry->d_name.name;
+        const char *name = qstr->name;
-        int namelen = dentry->d_name.len;
+        int namelen = qstr->len;
        unsigned reclen = UFS_DIR_REC_LEN(namelen);
        unsigned long start, n;
        unsigned long npages = ufs_dir_pages(dir);
diff --git a/fs/ufs/namei.c b/fs/ufs/namei.c
index 23119fe7ad62..4c26d9e8bc94 100644
--- a/fs/ufs/namei.c
+++ b/fs/ufs/namei.c
@@ -56,7 +56,7 @@ static struct dentry *ufs_lookup(struct inode * dir, struct dentry *dentry, stru
                return ERR_PTR(-ENAMETOOLONG);
        lock_kernel();
-        ino = ufs_inode_by_name(dir, dentry);
+        ino = ufs_inode_by_name(dir, &dentry->d_name);
        if (ino) {
                inode = ufs_iget(dir->i_sb, ino);
                if (IS_ERR(inode)) {
@@ -237,7 +237,7 @@ static int ufs_unlink(struct inode *dir, struct dentry *dentry)
        struct page *page;
        int err = -ENOENT;
-        de = ufs_find_entry(dir, dentry, &page);
+        de = ufs_find_entry(dir, &dentry->d_name, &page);
        if (!de)
                goto out;
@@ -281,7 +281,7 @@ static int ufs_rename(struct inode *old_dir, struct dentry *old_dentry,
        struct ufs_dir_entry *old_de;
        int err = -ENOENT;
-        old_de = ufs_find_entry(old_dir, old_dentry, &old_page);
+        old_de = ufs_find_entry(old_dir, &old_dentry->d_name, &old_page);
        if (!old_de)
                goto out;
@@ -301,7 +301,7 @@ static int ufs_rename(struct inode *old_dir, struct dentry *old_dentry,
                        goto out_dir;
                err = -ENOENT;
-                new_de = ufs_find_entry(new_dir, new_dentry, &new_page);
+                new_de = ufs_find_entry(new_dir, &new_dentry->d_name, &new_page);
                if (!new_de)
                        goto out_dir;
                inode_inc_link_count(old_inode);
diff --git a/fs/ufs/super.c b/fs/ufs/super.c
index 5faed7954d0a..143c20bfb04b 100644
--- a/fs/ufs/super.c
+++ b/fs/ufs/super.c
@@ -66,6 +66,7 @@
 */
+#include <linux/exportfs.h>
 #include <linux/module.h>
 #include <linux/bitops.h>
@@ -96,6 +97,56 @@
 #include "swab.h"
 #include "util.h"
+static struct inode *ufs_nfs_get_inode(struct super_block *sb, u64 ino, u32 generation)
+{
+        struct ufs_sb_private_info *uspi = UFS_SB(sb)->s_uspi;
+        struct inode *inode;
+        if (ino < UFS_ROOTINO || ino > uspi->s_ncg * uspi->s_ipg)
+                return ERR_PTR(-ESTALE);
+        inode = ufs_iget(sb, ino);
+        if (IS_ERR(inode))
+                return ERR_CAST(inode);
+        if (generation && inode->i_generation != generation) {
+                iput(inode);
+                return ERR_PTR(-ESTALE);
+        }
+        return inode;
+}
+static struct dentry *ufs_fh_to_dentry(struct super_block *sb, struct fid *fid,
+                                       int fh_len, int fh_type)
+{
+        return generic_fh_to_dentry(sb, fid, fh_len, fh_type, ufs_nfs_get_inode);
+}
+static struct dentry *ufs_fh_to_parent(struct super_block *sb, struct fid *fid,
+                                       int fh_len, int fh_type)
+{
+        return generic_fh_to_parent(sb, fid, fh_len, fh_type, ufs_nfs_get_inode);
+}
+static struct dentry *ufs_get_parent(struct dentry *child)
+{
+        struct qstr dot_dot = {
+                .name   = "..",
+                .len    = 2,
+        };
+        ino_t ino;
+        ino = ufs_inode_by_name(child->d_inode, &dot_dot);
+        if (!ino)
+                return ERR_PTR(-ENOENT);
+        return d_obtain_alias(ufs_iget(child->d_inode->i_sb, ino));
+}
+static const struct export_operations ufs_export_ops = {
+        .fh_to_dentry   = ufs_fh_to_dentry,
+        .fh_to_parent   = ufs_fh_to_parent,
+        .get_parent     = ufs_get_parent,
+};
 #ifdef CONFIG_UFS_DEBUG
 /*
 * Print contents of ufs_super_block, useful for debugging
@@ -990,6 +1041,7 @@ magic_found:
         * Read ufs_super_block into internal data structures
         */
        sb->s_op = &ufs_super_ops;
+        sb->s_export_op = &ufs_export_ops;
        sb->dq_op = NULL; /***/
        sb->s_magic = fs32_to_cpu(sb, usb3->fs_magic);
diff --git a/fs/ufs/ufs.h b/fs/ufs/ufs.h
index 644e77e13599..0b4c39bc0d9e 100644
--- a/fs/ufs/ufs.h
+++ b/fs/ufs/ufs.h
@@ -86,9 +86,9 @@ extern void ufs_put_cylinder (struct super_block *, unsigned);
 /* dir.c */
 extern const struct inode_operations ufs_dir_inode_operations;
 extern int ufs_add_link (struct dentry *, struct inode *);
-extern ino_t ufs_inode_by_name(struct inode *, struct dentry *);
+extern ino_t ufs_inode_by_name(struct inode *, struct qstr *);
 extern int ufs_make_empty(struct inode *, struct inode *);
-extern struct ufs_dir_entry *ufs_find_entry(struct inode *, struct dentry *, struct page **);
+extern struct ufs_dir_entry *ufs_find_entry(struct inode *, struct qstr *, struct page **);
 extern int ufs_delete_entry(struct inode *, struct ufs_dir_entry *, struct page *);
 extern int ufs_empty_dir (struct inode *);
 extern struct ufs_dir_entry *ufs_dotdot(struct inode *, struct page **);
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index 204bed37e82d..485eeb6c4ef3 100644
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@ -145,6 +145,7 @@ extern int __gpio_to_irq(unsigned gpio);
 extern int gpio_export(unsigned gpio, bool direction_may_change);
 extern int gpio_export_link(struct device *dev, const char *name,
                        unsigned gpio);
+extern int gpio_sysfs_set_active_low(unsigned gpio, int value);
 extern void gpio_unexport(unsigned gpio);
 #endif  /* CONFIG_GPIO_SYSFS */
@@ -197,6 +198,11 @@ static inline int gpio_export_link(struct device *dev, const char *name,
        return -ENOSYS;
 }
+static inline int gpio_sysfs_set_active_low(unsigned gpio, int value)
+{
+        return -ENOSYS;
+}
 static inline void gpio_unexport(unsigned gpio)
 {
 }
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index b6e818f4b247..67e652068e0e 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -52,8 +52,12 @@
 #define LOAD_OFFSET 0
 #endif
-#ifndef VMLINUX_SYMBOL
+#ifndef SYMBOL_PREFIX
-#define VMLINUX_SYMBOL(_sym_) _sym_
+#define VMLINUX_SYMBOL(sym) sym
+#else
+#define PASTE2(x,y) x##y
+#define PASTE(x,y) PASTE2(x,y)
+#define VMLINUX_SYMBOL(sym) PASTE(SYMBOL_PREFIX, sym)
 #endif
 /* Align . to a 8 byte boundary equals to maximum function alignment. */
diff --git a/include/linux/aio.h b/include/linux/aio.h
index aea219d7d8d1..811dbb369379 100644
--- a/include/linux/aio.h
+++ b/include/linux/aio.h
@@ -102,7 +102,6 @@ struct kiocb {
        } ki_obj;
        __u64                   ki_user_data;   /* user's data for completion */
-        wait_queue_t            ki_wait;
        loff_t                  ki_pos;
        void                    *private;
@@ -140,7 +139,6 @@ struct kiocb {
                (x)->ki_dtor = NULL;                    \
                (x)->ki_obj.tsk = tsk;                  \
                (x)->ki_user_data = 0;                  \
-                init_wait((&(x)->ki_wait));             \
        } while (0)
 #define AIO_RING_MAGIC                  0xa10a10a1
@@ -223,8 +221,6 @@ struct mm_struct;
 static inline void exit_aio(struct mm_struct *mm) { }
 #endif /* CONFIG_AIO */
-#define io_wait_to_kiocb(wait) container_of(wait, struct kiocb, ki_wait)
 static inline struct kiocb *list_kiocb(struct list_head *h)
 {
        return list_entry(h, struct kiocb, ki_list);
diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h
index 756d78b8c1c5..daf8c480c786 100644
--- a/include/linux/bitmap.h
+++ b/include/linux/bitmap.h
@@ -42,6 +42,9 @@
 * bitmap_empty(src, nbits)                     Are all bits zero in *src?
 * bitmap_full(src, nbits)                      Are all bits set in *src?
 * bitmap_weight(src, nbits)                    Hamming Weight: number set bits
+ * bitmap_set(dst, pos, nbits)                  Set specified bit area
+ * bitmap_clear(dst, pos, nbits)                Clear specified bit area
+ * bitmap_find_next_zero_area(buf, len, pos, n, mask)   Find bit free area
 * bitmap_shift_right(dst, src, n, nbits)       *dst = *src >> n
 * bitmap_shift_left(dst, src, n, nbits)        *dst = *src << n
 * bitmap_remap(dst, src, old, new, nbits)      *dst = map(old, new)(src)
@@ -108,6 +111,14 @@ extern int __bitmap_subset(const unsigned long *bitmap1,
                        const unsigned long *bitmap2, int bits);
 extern int __bitmap_weight(const unsigned long *bitmap, int bits);
+extern void bitmap_set(unsigned long *map, int i, int len);
+extern void bitmap_clear(unsigned long *map, int start, int nr);
+extern unsigned long bitmap_find_next_zero_area(unsigned long *map,
+                                         unsigned long size,
+                                         unsigned long start,
+                                         unsigned int nr,
+                                         unsigned long align_mask);
 extern int bitmap_scnprintf(char *buf, unsigned int len,
                        const unsigned long *src, int nbits);
 extern int __bitmap_parse(const char *buf, unsigned int buflen, int is_user,
diff --git a/include/linux/can/dev.h b/include/linux/can/dev.h
index 1ed2a5cc03f5..3db7767d2a17 100644
--- a/include/linux/can/dev.h
+++ b/include/linux/can/dev.h
@@ -51,6 +51,15 @@ struct can_priv {
        struct sk_buff **echo_skb;
 };
+/*
+ * get_can_dlc(value) - helper macro to cast a given data length code (dlc)
+ * to __u8 and ensure the dlc value to be max. 8 bytes.
+ *
+ * To be used in the CAN netdriver receive path to ensure conformance with
+ * ISO 11898-1 Chapter 8.4.2.3 (DLC field)
+ */
+#define get_can_dlc(i)  (min_t(__u8, (i), 8))
 struct net_device *alloc_candev(int sizeof_priv, unsigned int echo_skb_max);
 void free_candev(struct net_device *dev);
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 2b9f2ac7ed60..78784982b33e 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -74,7 +74,7 @@ enum dma_transaction_type {
 *  control completion, and communicate status.
 * @DMA_PREP_INTERRUPT - trigger an interrupt (callback) upon completion of
 *  this transaction
- * @DMA_CTRL_ACK - the descriptor cannot be reused until the client
+ * @DMA_CTRL_ACK - if clear, the descriptor cannot be reused until the client
 *  acknowledges receipt, i.e. has has a chance to establish any dependency
 *  chains
 * @DMA_COMPL_SKIP_SRC_UNMAP - set to disable dma-unmapping the source buffer(s)
diff --git a/include/linux/exportfs.h b/include/linux/exportfs.h
index 27e772cefb6a..dc12f416a49f 100644
--- a/include/linux/exportfs.h
+++ b/include/linux/exportfs.h
@@ -97,7 +97,7 @@ struct fid {
 * @get_name:       find the name for a given inode in a given directory
 * @get_parent:     find the parent of a given directory
 *
- * See Documentation/filesystems/Exporting for details on how to use
+ * See Documentation/filesystems/nfs/Exporting for details on how to use
 * this interface correctly.
 *
 * encode_fh:
diff --git a/include/linux/ftrace_event.h b/include/linux/ftrace_event.h
index 38f8d6553831..2233c98d80df 100644
--- a/include/linux/ftrace_event.h
+++ b/include/linux/ftrace_event.h
@@ -131,7 +131,7 @@ struct ftrace_event_call {
        void                    *mod;
        void                    *data;
-        atomic_t                profile_count;
+        int                     profile_count;
        int                     (*profile_enable)(struct ftrace_event_call *);
        void                    (*profile_disable)(struct ftrace_event_call *);
 };
@@ -158,7 +158,7 @@ enum {
        FILTER_PTR_STRING,
 };
-extern int trace_define_common_fields(struct ftrace_event_call *call);
+extern int trace_event_raw_init(struct ftrace_event_call *call);
 extern int trace_define_field(struct ftrace_event_call *call, const char *type,
                              const char *name, int offset, int size,
                              int is_signed, int filter_type);
diff --git a/include/linux/gpio.h b/include/linux/gpio.h
index 059bd189d35d..4e949a5b5b85 100644
--- a/include/linux/gpio.h
+++ b/include/linux/gpio.h
@@ -99,6 +99,12 @@ static inline int gpio_export_link(struct device *dev, const char *name,
        return -EINVAL;
 }
+static inline int gpio_sysfs_set_active_low(unsigned gpio, int value)
+{
+        /* GPIO can never have been requested */
+        WARN_ON(1);
+        return -EINVAL;
+}
 static inline void gpio_unexport(unsigned gpio)
 {
diff --git a/include/linux/i8042.h b/include/linux/i8042.h
index 60c3360ef6ad..9bf6870ee5f4 100644
--- a/include/linux/i8042.h
+++ b/include/linux/i8042.h
@@ -39,6 +39,10 @@ void i8042_lock_chip(void);
 void i8042_unlock_chip(void);
 int i8042_command(unsigned char *param, int command);
 bool i8042_check_port_owner(const struct serio *);
+int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
+                                        struct serio *serio));
+int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
+                                       struct serio *serio));
 #else
@@ -52,7 +56,7 @@ void i8042_unlock_chip(void)
 int i8042_command(unsigned char *param, int command)
 {
-        return -ENOSYS;
+        return -ENODEV;
 }
 bool i8042_check_port_owner(const struct serio *serio)
@@ -60,6 +64,18 @@ bool i8042_check_port_owner(const struct serio *serio)
        return false;
 }
+int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
+                                        struct serio *serio))
+{
+        return -ENODEV;
+}
+int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
+                                       struct serio *serio))
+{
+        return -ENODEV;
+}
 #endif
 #endif
diff --git a/include/linux/init.h b/include/linux/init.h
index ff8bde520d03..ab1d31f9352b 100644
--- a/include/linux/init.h
+++ b/include/linux/init.h
@@ -149,6 +149,8 @@ void prepare_namespace(void);
 extern void (*late_time_init)(void);
+extern int initcall_debug;
 #endif
  
 #ifndef MODULE
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index 4f0a72a9740c..9310c699a37d 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -332,6 +332,7 @@ struct intel_iommu {
 #ifdef CONFIG_INTR_REMAP
        struct ir_table *ir_table;      /* Interrupt remapping info */
 #endif
+        int             node;
 };
 static inline void __iommu_flush_cache(
diff --git a/include/linux/iommu-helper.h b/include/linux/iommu-helper.h
index 3b068e5b5671..64d1b638745d 100644
--- a/include/linux/iommu-helper.h
+++ b/include/linux/iommu-helper.h
@@ -14,14 +14,11 @@ static inline unsigned long iommu_device_max_index(unsigned long size,
 extern int iommu_is_span_boundary(unsigned int index, unsigned int nr,
                                  unsigned long shift,
                                  unsigned long boundary_size);
-extern void iommu_area_reserve(unsigned long *map, unsigned long i, int len);
 extern unsigned long iommu_area_alloc(unsigned long *map, unsigned long size,
                                      unsigned long start, unsigned int nr,
                                      unsigned long shift,
                                      unsigned long boundary_size,
                                      unsigned long align_mask);
-extern void iommu_area_free(unsigned long *map, unsigned long start,
-                            unsigned int nr);
 extern unsigned long iommu_num_pages(unsigned long addr, unsigned long len,
                                     unsigned long io_page_size);
diff --git a/include/linux/ioport.h b/include/linux/ioport.h
index 83aa81297ea3..7129504e053d 100644
--- a/include/linux/ioport.h
+++ b/include/linux/ioport.h
@@ -126,11 +126,11 @@ extern int allocate_resource(struct resource *root, struct resource *new,
 int adjust_resource(struct resource *res, resource_size_t start,
                    resource_size_t size);
 resource_size_t resource_alignment(struct resource *res);
-static inline resource_size_t resource_size(struct resource *res)
+static inline resource_size_t resource_size(const struct resource *res)
 {
        return res->end - res->start + 1;
 }
-static inline unsigned long resource_type(struct resource *res)
+static inline unsigned long resource_type(const struct resource *res)
 {
        return res->flags & IORESOURCE_TYPE_BITS;
 }
diff --git a/include/linux/ipc_namespace.h b/include/linux/ipc_namespace.h
index e408722a84c7..07baa38bce37 100644
--- a/include/linux/ipc_namespace.h
+++ b/include/linux/ipc_namespace.h
@@ -87,7 +87,7 @@ extern int mq_init_ns(struct ipc_namespace *ns);
 /* default values */
 #define DFLT_QUEUESMAX 256     /* max number of message queues */
 #define DFLT_MSGMAX    10      /* max number of messages in each queue */
-#define HARD_MSGMAX    (131072/sizeof(void *))
+#define HARD_MSGMAX    (32768*sizeof(void *)/4)
 #define DFLT_MSGSIZEMAX 8192   /* max message size */
 #else
 static inline int mq_init_ns(struct ipc_namespace *ns) { return 0; }
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index 4d9c916d06d9..3fc9f5aab5f8 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -535,6 +535,8 @@ extern int
 __trace_printk(unsigned long ip, const char *fmt, ...)
        __attribute__ ((format (printf, 2, 3)));
+extern void trace_dump_stack(void);
 /*
 * The double __builtin_constant_p is because gcc will give us an error
 * if we try to allocate the static variable to fmt if it is not a
@@ -568,6 +570,7 @@ trace_printk(const char *fmt, ...) __attribute__ ((format (printf, 1, 2)));
 static inline void tracing_start(void) { }
 static inline void tracing_stop(void) { }
 static inline void ftrace_off_permanent(void) { }
+static inline void trace_dump_stack(void) { }
 static inline int
 trace_printk(const char *fmt, ...)
 {
diff --git a/include/linux/kexec.h b/include/linux/kexec.h
index adc34f2c6eff..c356b6914ffd 100644
--- a/include/linux/kexec.h
+++ b/include/linux/kexec.h
@@ -206,6 +206,8 @@ extern size_t vmcoreinfo_max_size;
 int __init parse_crashkernel(char *cmdline, unsigned long long system_ram,
                unsigned long long *crash_size, unsigned long long *crash_base);
+int crash_shrink_memory(unsigned long new_size);
+size_t crash_get_memory_size(void);
 #else /* !CONFIG_KEXEC */
 struct pt_regs;
diff --git a/include/linux/kmsg_dump.h b/include/linux/kmsg_dump.h
new file mode 100644
index 000000000000..e32aa268efac
--- /dev/null
+++ b/include/linux/kmsg_dump.h
@@ -0,0 +1,60 @@
+/*
+ * linux/include/kmsg_dump.h
+ *
+ * Copyright (C) 2009 Net Insight AB
+ *
+ * Author: Simon Kagstrom <simon.kagstrom@netinsight.net>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+#ifndef _LINUX_KMSG_DUMP_H
+#define _LINUX_KMSG_DUMP_H
+#include <linux/list.h>
+enum kmsg_dump_reason {
+        KMSG_DUMP_OOPS,
+        KMSG_DUMP_PANIC,
+};
+/**
+ * struct kmsg_dumper - kernel crash message dumper structure
+ * @dump:       The callback which gets called on crashes. The buffer is passed
+ *              as two sections, where s1 (length l1) contains the older
+ *              messages and s2 (length l2) contains the newer.
+ * @list:       Entry in the dumper list (private)
+ * @registered: Flag that specifies if this is already registered
+ */
+struct kmsg_dumper {
+        void (*dump)(struct kmsg_dumper *dumper, enum kmsg_dump_reason reason,
+                        const char *s1, unsigned long l1,
+                        const char *s2, unsigned long l2);
+        struct list_head list;
+        int registered;
+};
+#ifdef CONFIG_PRINTK
+void kmsg_dump(enum kmsg_dump_reason reason);
+int kmsg_dump_register(struct kmsg_dumper *dumper);
+int kmsg_dump_unregister(struct kmsg_dumper *dumper);
+#else
+static inline void kmsg_dump(enum kmsg_dump_reason reason)
+{
+}
+static inline int kmsg_dump_register(struct kmsg_dumper *dumper)
+{
+        return -EINVAL;
+}
+static inline int kmsg_dump_unregister(struct kmsg_dumper *dumper)
+{
+        return -EINVAL;
+}
+#endif
+#endif /* _LINUX_KMSG_DUMP_H */
diff --git a/include/linux/ksm.h b/include/linux/ksm.h
index bed5f16ba827..43bdab769fc3 100644
--- a/include/linux/ksm.h
+++ b/include/linux/ksm.h
@@ -94,12 +94,6 @@ void ksm_migrate_page(struct page *newpage, struct page *oldpage);
 #else  /* !CONFIG_KSM */
-static inline int ksm_madvise(struct vm_area_struct *vma, unsigned long start,
-                unsigned long end, int advice, unsigned long *vm_flags)
-{
-        return 0;
-}
 static inline int ksm_fork(struct mm_struct *mm, struct mm_struct *oldmm)
 {
        return 0;
@@ -114,6 +108,13 @@ static inline int PageKsm(struct page *page)
        return 0;
 }
+#ifdef CONFIG_MMU
+static inline int ksm_madvise(struct vm_area_struct *vma, unsigned long start,
+                unsigned long end, int advice, unsigned long *vm_flags)
+{
+        return 0;
+}
 static inline struct page *ksm_might_need_to_copy(struct page *page,
                        struct vm_area_struct *vma, unsigned long address)
 {
@@ -140,6 +141,7 @@ static inline int rmap_walk_ksm(struct page *page, int (*rmap_one)(struct page*,
 static inline void ksm_migrate_page(struct page *newpage, struct page *oldpage)
 {
 }
+#endif /* CONFIG_MMU */
 #endif /* !CONFIG_KSM */
 #endif /* __LINUX_KSM_H */
diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h
index bf9213b2db8f..0b46c2068b96 100644
--- a/include/linux/memcontrol.h
+++ b/include/linux/memcontrol.h
@@ -54,6 +54,11 @@ extern void mem_cgroup_rotate_lru_list(struct page *page, enum lru_list lru);
 extern void mem_cgroup_del_lru(struct page *page);
 extern void mem_cgroup_move_lists(struct page *page,
                                  enum lru_list from, enum lru_list to);
+/* For coalescing uncharge for reducing memcg' overhead*/
+extern void mem_cgroup_uncharge_start(void);
+extern void mem_cgroup_uncharge_end(void);
 extern void mem_cgroup_uncharge_page(struct page *page);
 extern void mem_cgroup_uncharge_cache_page(struct page *page);
 extern int mem_cgroup_shmem_charge_fallback(struct page *page,
@@ -117,7 +122,7 @@ static inline bool mem_cgroup_disabled(void)
 }
 extern bool mem_cgroup_oom_called(struct task_struct *task);
-void mem_cgroup_update_mapped_file_stat(struct page *page, int val);
+void mem_cgroup_update_file_mapped(struct page *page, int val);
 unsigned long mem_cgroup_soft_limit_reclaim(struct zone *zone, int order,
                                                gfp_t gfp_mask, int nid,
                                                int zid);
@@ -151,6 +156,14 @@ static inline void mem_cgroup_cancel_charge_swapin(struct mem_cgroup *ptr)
 {
 }
+static inline void mem_cgroup_uncharge_start(void)
+{
+}
+static inline void mem_cgroup_uncharge_end(void)
+{
+}
 static inline void mem_cgroup_uncharge_page(struct page *page)
 {
 }
@@ -274,7 +287,7 @@ mem_cgroup_print_oom_info(struct mem_cgroup *memcg, struct task_struct *p)
 {
 }
-static inline void mem_cgroup_update_mapped_file_stat(struct page *page,
+static inline void mem_cgroup_update_file_mapped(struct page *page,
                                                        int val)
 {
 }
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index ce7cc6c7bcbb..e92d1bfdb330 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -61,6 +61,7 @@ enum {
        MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1 <<  8,
        MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1 <<  9,
        MLX4_DEV_CAP_FLAG_DPDP          = 1 << 12,
+        MLX4_DEV_CAP_FLAG_BLH           = 1 << 15,
        MLX4_DEV_CAP_FLAG_MEM_WINDOW    = 1 << 16,
        MLX4_DEV_CAP_FLAG_APM           = 1 << 17,
        MLX4_DEV_CAP_FLAG_ATOMIC        = 1 << 18,
diff --git a/include/linux/module.h b/include/linux/module.h
index 482efc865acf..6cb1a3cab5d3 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -25,8 +25,10 @@
 /* Not Yet Implemented */
 #define MODULE_SUPPORTED_DEVICE(name)
-/* some toolchains uses a `_' prefix for all user symbols */
+/* Some toolchains use a `_' prefix for all user symbols. */
-#ifndef MODULE_SYMBOL_PREFIX
+#ifdef CONFIG_SYMBOL_PREFIX
+#define MODULE_SYMBOL_PREFIX CONFIG_SYMBOL_PREFIX
+#else
 #define MODULE_SYMBOL_PREFIX ""
 #endif
diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h
index fff8c53e5434..9c3757c5759d 100644
--- a/include/linux/mtd/bbm.h
+++ b/include/linux/mtd/bbm.h
@@ -19,22 +19,21 @@
 /**
 * struct nand_bbt_descr - bad block table descriptor
- * @options:            options for this descriptor
+ * @options:    options for this descriptor
- * @pages:              the page(s) where we find the bbt, used with
+ * @pages:      the page(s) where we find the bbt, used with option BBT_ABSPAGE
- *                      option BBT_ABSPAGE when bbt is searched,
+ *              when bbt is searched, then we store the found bbts pages here.
- *                      then we store the found bbts pages here.
+ *              Its an array and supports up to 8 chips now
- *                      Its an array and supports up to 8 chips now
+ * @offs:       offset of the pattern in the oob area of the page
- * @offs:               offset of the pattern in the oob area of the page
+ * @veroffs:    offset of the bbt version counter in the oob are of the page
- * @veroffs:            offset of the bbt version counter in the oob area of the page
+ * @version:    version read from the bbt page during scan
- * @version:            version read from the bbt page during scan
+ * @len:        length of the pattern, if 0 no pattern check is performed
- * @len:                length of the pattern, if 0 no pattern check is performed
+ * @maxblocks:  maximum number of blocks to search for a bbt. This number of
- * @maxblocks:          maximum number of blocks to search for a bbt. This
+ *              blocks is reserved at the end of the device where the tables are
- *                      number of blocks is reserved at the end of the device
+ *              written.
- *                      where the tables are written.
+ * @reserved_block_code: if non-0, this pattern denotes a reserved (rather than
- * @reserved_block_code: if non-0, this pattern denotes a reserved
+ *              bad) block in the stored bbt
- *                      (rather than bad) block in the stored bbt
+ * @pattern:    pattern to identify bad block table or factory marked good /
- * @pattern:            pattern to identify bad block table or factory marked
+ *              bad blocks, can be NULL, if len = 0
- *                      good / bad blocks, can be NULL, if len = 0
 *
 * Descriptor for the bad block table marker and the descriptor for the
 * pattern which identifies good and bad blocks. The assumption is made
@@ -90,7 +89,9 @@ struct nand_bbt_descr {
 /*
 * Constants for oob configuration
 */
-#define ONENAND_BADBLOCK_POS    0
+#define NAND_SMALL_BADBLOCK_POS         5
+#define NAND_LARGE_BADBLOCK_POS         0
+#define ONENAND_BADBLOCK_POS            0
 /*
 * Bad block scanning errors
diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h
index 88d3d8fbf9f2..df89f4275232 100644
--- a/include/linux/mtd/cfi.h
+++ b/include/linux/mtd/cfi.h
@@ -518,10 +518,11 @@ struct cfi_fixup {
 #define CFI_MFR_ANY 0xffff
 #define CFI_ID_ANY  0xffff
-#define CFI_MFR_AMD 0x0001
+#define CFI_MFR_AMD     0x0001
-#define CFI_MFR_ATMEL 0x001F
+#define CFI_MFR_INTEL   0x0089
-#define CFI_MFR_SAMSUNG 0x00EC
+#define CFI_MFR_ATMEL   0x001F
-#define CFI_MFR_ST  0x0020      /* STMicroelectronics */
+#define CFI_MFR_SAMSUNG 0x00EC
+#define CFI_MFR_ST      0x0020 /* STMicroelectronics */
 void cfi_fixup(struct mtd_info *mtd, struct cfi_fixup* fixups);
diff --git a/include/linux/mtd/flashchip.h b/include/linux/mtd/flashchip.h
index d4f38c5fd44e..d0bf422ae374 100644
--- a/include/linux/mtd/flashchip.h
+++ b/include/linux/mtd/flashchip.h
@@ -38,6 +38,15 @@ typedef enum {
        FL_XIP_WHILE_ERASING,
        FL_XIP_WHILE_WRITING,
        FL_SHUTDOWN,
+        /* These 2 come from nand_state_t, which has been unified here */
+        FL_READING,
+        FL_CACHEDPRG,
+        /* These 4 come from onenand_state_t, which has been unified here */
+        FL_RESETING,
+        FL_OTPING,
+        FL_PREPARING_ERASE,
+        FL_VERIFYING_ERASE,
        FL_UNKNOWN
 } flstate_t;
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 7a232a9bdd62..ccab9dfc5217 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -21,6 +21,8 @@
 #include <linux/wait.h>
 #include <linux/spinlock.h>
 #include <linux/mtd/mtd.h>
+#include <linux/mtd/flashchip.h>
+#include <linux/mtd/bbm.h>
 struct mtd_info;
 /* Scan and identify a NAND device */
@@ -168,7 +170,6 @@ typedef enum {
 /* Chip does not allow subpage writes */
 #define NAND_NO_SUBPAGE_WRITE   0x00000200
 /* Options valid for Samsung large page devices */
 #define NAND_SAMSUNG_LP_OPTIONS \
        (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK)
@@ -194,6 +195,9 @@ typedef enum {
 /* This option is defined if the board driver allocates its own buffers
   (e.g. because it needs them DMA-coherent */
 #define NAND_OWN_BUFFERS        0x00040000
+/* Chip may not exist, so silence any errors in scan */
+#define NAND_SCAN_SILENT_NODEV  0x00080000
 /* Options set by nand scan */
 /* Nand scan has allocated controller struct */
 #define NAND_CONTROLLER_ALLOC   0x80000000
@@ -202,20 +206,6 @@ typedef enum {
 #define NAND_CI_CHIPNR_MSK      0x03
 #define NAND_CI_CELLTYPE_MSK    0x0C
-/*
- * nand_state_t - chip states
- * Enumeration for NAND flash chip state
- */
-typedef enum {
-        FL_READY,
-        FL_READING,
-        FL_WRITING,
-        FL_ERASING,
-        FL_SYNCING,
-        FL_CACHEDPRG,
-        FL_PM_SUSPENDED,
-} nand_state_t;
 /* Keep gcc happy */
 struct nand_chip;
@@ -402,7 +392,7 @@ struct nand_chip {
        uint8_t         cellinfo;
        int             badblockpos;
-        nand_state_t    state;
+        flstate_t       state;
        uint8_t         *oob_poi;
        struct nand_hw_control  *controller;
@@ -470,75 +460,6 @@ struct nand_manufacturers {
 extern struct nand_flash_dev nand_flash_ids[];
 extern struct nand_manufacturers nand_manuf_ids[];
-/**
- * struct nand_bbt_descr - bad block table descriptor
- * @options:    options for this descriptor
- * @pages:      the page(s) where we find the bbt, used with option BBT_ABSPAGE
- *              when bbt is searched, then we store the found bbts pages here.
- *              Its an array and supports up to 8 chips now
- * @offs:       offset of the pattern in the oob area of the page
- * @veroffs:    offset of the bbt version counter in the oob are of the page
- * @version:    version read from the bbt page during scan
- * @len:        length of the pattern, if 0 no pattern check is performed
- * @maxblocks:  maximum number of blocks to search for a bbt. This number of
- *              blocks is reserved at the end of the device where the tables are
- *              written.
- * @reserved_block_code: if non-0, this pattern denotes a reserved (rather than
- *              bad) block in the stored bbt
- * @pattern:    pattern to identify bad block table or factory marked good /
- *              bad blocks, can be NULL, if len = 0
- *
- * Descriptor for the bad block table marker and the descriptor for the
- * pattern which identifies good and bad blocks. The assumption is made
- * that the pattern and the version count are always located in the oob area
- * of the first block.
- */
-struct nand_bbt_descr {
-        int     options;
-        int     pages[NAND_MAX_CHIPS];
-        int     offs;
-        int     veroffs;
-        uint8_t version[NAND_MAX_CHIPS];
-        int     len;
-        int     maxblocks;
-        int     reserved_block_code;
-        uint8_t *pattern;
-};
-/* Options for the bad block table descriptors */
-/* The number of bits used per block in the bbt on the device */
-#define NAND_BBT_NRBITS_MSK     0x0000000F
-#define NAND_BBT_1BIT           0x00000001
-#define NAND_BBT_2BIT           0x00000002
-#define NAND_BBT_4BIT           0x00000004
-#define NAND_BBT_8BIT           0x00000008
-/* The bad block table is in the last good block of the device */
-#define NAND_BBT_LASTBLOCK      0x00000010
-/* The bbt is at the given page, else we must scan for the bbt */
-#define NAND_BBT_ABSPAGE        0x00000020
-/* The bbt is at the given page, else we must scan for the bbt */
-#define NAND_BBT_SEARCH         0x00000040
-/* bbt is stored per chip on multichip devices */
-#define NAND_BBT_PERCHIP        0x00000080
-/* bbt has a version counter at offset veroffs */
-#define NAND_BBT_VERSION        0x00000100
-/* Create a bbt if none axists */
-#define NAND_BBT_CREATE         0x00000200
-/* Search good / bad pattern through all pages of a block */
-#define NAND_BBT_SCANALLPAGES   0x00000400
-/* Scan block empty during good / bad block scan */
-#define NAND_BBT_SCANEMPTY      0x00000800
-/* Write bbt if neccecary */
-#define NAND_BBT_WRITE          0x00001000
-/* Read and write back block contents when writing bbt */
-#define NAND_BBT_SAVECONTENT    0x00002000
-/* Search good / bad pattern on the first and the second page */
-#define NAND_BBT_SCAN2NDPAGE    0x00004000
-/* The maximum number of blocks to scan for a bbt */
-#define NAND_BBT_SCAN_MAXBLOCKS 4
 extern int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd);
 extern int nand_update_bbt(struct mtd_info *mtd, loff_t offs);
 extern int nand_default_bbt(struct mtd_info *mtd);
@@ -548,12 +469,6 @@ extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
 extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
                        size_t * retlen, uint8_t * buf);
-/*
-* Constants for oob configuration
-*/
-#define NAND_SMALL_BADBLOCK_POS         5
-#define NAND_LARGE_BADBLOCK_POS         0
 /**
 * struct platform_nand_chip - chip level device structure
 * @nr_chips:           max. number of chips to scan for
diff --git a/include/linux/mtd/nand_ecc.h b/include/linux/mtd/nand_ecc.h
index 052ea8ca2434..41bc013571d0 100644
--- a/include/linux/mtd/nand_ecc.h
+++ b/include/linux/mtd/nand_ecc.h
@@ -16,7 +16,13 @@
 struct mtd_info;
 /*
- * Calculate 3 byte ECC code for 256 byte block
+ * Calculate 3 byte ECC code for eccsize byte block
+ */
+void __nand_calculate_ecc(const u_char *dat, unsigned int eccsize,
+                                u_char *ecc_code);
+/*
+ * Calculate 3 byte ECC code for 256/512 byte block
 */
 int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code);
@@ -27,7 +33,7 @@ int __nand_correct_data(u_char *dat, u_char *read_ecc, u_char *calc_ecc,
                        unsigned int eccsize);
 /*
- * Detect and correct a 1 bit error for 256 byte block
+ * Detect and correct a 1 bit error for 256/512 byte block
 */
 int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc);
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h
index 4e49f3350678..5509eb06b326 100644
--- a/include/linux/mtd/onenand.h
+++ b/include/linux/mtd/onenand.h
@@ -1,7 +1,7 @@
 /*
 *  linux/include/linux/mtd/onenand.h
 *
- *  Copyright (C) 2005-2007 Samsung Electronics
+ *  Copyright © 2005-2009 Samsung Electronics
 *  Kyungmin Park <kyungmin.park@samsung.com>
 *
 * This program is free software; you can redistribute it and/or modify
@@ -14,6 +14,7 @@
 #include <linux/spinlock.h>
 #include <linux/completion.h>
+#include <linux/mtd/flashchip.h>
 #include <linux/mtd/onenand_regs.h>
 #include <linux/mtd/bbm.h>
@@ -25,22 +26,6 @@ extern int onenand_scan(struct mtd_info *mtd, int max_chips);
 /* Free resources held by the OneNAND device */
 extern void onenand_release(struct mtd_info *mtd);
-/*
- * onenand_state_t - chip states
- * Enumeration for OneNAND flash chip state
- */
-typedef enum {
-        FL_READY,
-        FL_READING,
-        FL_WRITING,
-        FL_ERASING,
-        FL_SYNCING,
-        FL_LOCKING,
-        FL_RESETING,
-        FL_OTPING,
-        FL_PM_SUSPENDED,
-} onenand_state_t;
 /**
 * struct onenand_bufferram - OneNAND BufferRAM Data
 * @blockpage:          block & page address in BufferRAM
@@ -137,7 +122,7 @@ struct onenand_chip {
        spinlock_t              chip_lock;
        wait_queue_head_t       wq;
-        onenand_state_t         state;
+        flstate_t               state;
        unsigned char           *page_buf;
        unsigned char           *oob_buf;
@@ -152,6 +137,8 @@ struct onenand_chip {
 /*
 * Helper macros
 */
+#define ONENAND_PAGES_PER_BLOCK        (1<<6)
 #define ONENAND_CURRENT_BUFFERRAM(this)         (this->bufferram_index)
 #define ONENAND_NEXT_BUFFERRAM(this)            (this->bufferram_index ^ 1)
 #define ONENAND_SET_NEXT_BUFFERRAM(this)        (this->bufferram_index ^= 1)
diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h
index acadbf53a69f..cd6f3b431195 100644
--- a/include/linux/mtd/onenand_regs.h
+++ b/include/linux/mtd/onenand_regs.h
@@ -131,6 +131,8 @@
 #define ONENAND_CMD_LOCK_TIGHT          (0x2C)
 #define ONENAND_CMD_UNLOCK_ALL          (0x27)
 #define ONENAND_CMD_ERASE               (0x94)
+#define ONENAND_CMD_MULTIBLOCK_ERASE    (0x95)
+#define ONENAND_CMD_ERASE_VERIFY        (0x71)
 #define ONENAND_CMD_RESET               (0xF0)
 #define ONENAND_CMD_OTP_ACCESS          (0x65)
 #define ONENAND_CMD_READID              (0x90)
diff --git a/include/linux/nfs_xdr.h b/include/linux/nfs_xdr.h
index 51071b335751..89b28812ec24 100644
--- a/include/linux/nfs_xdr.h
+++ b/include/linux/nfs_xdr.h
@@ -2,6 +2,7 @@
 #define _LINUX_NFS_XDR_H
 #include <linux/nfsacl.h>
+#include <linux/nfs3.h>
 /*
 * To change the maximum rsize and wsize supported by the NFS client, adjust
diff --git a/include/linux/nfsacl.h b/include/linux/nfsacl.h
index 43011b69297c..f321b578edeb 100644
--- a/include/linux/nfsacl.h
+++ b/include/linux/nfsacl.h
@@ -29,6 +29,7 @@
 #ifdef __KERNEL__
 #include <linux/posix_acl.h>
+#include <linux/sunrpc/xdr.h>
 /* Maximum number of ACL entries over NFS */
 #define NFS_ACL_MAX_ENTRIES     1024
diff --git a/include/linux/nfsd/export.h b/include/linux/nfsd/export.h
index a6d9ef2bb34a..8ae78a61eea4 100644
--- a/include/linux/nfsd/export.h
+++ b/include/linux/nfsd/export.h
@@ -12,7 +12,7 @@
 # include <linux/types.h>
 #ifdef __KERNEL__
-# include <linux/in.h>
+# include <linux/nfsd/nfsfh.h>
 #endif
 /*
@@ -39,11 +39,23 @@
 #define NFSEXP_FSID             0x2000
 #define NFSEXP_CROSSMOUNT       0x4000
 #define NFSEXP_NOACL            0x8000  /* reserved for possible ACL related use */
-#define NFSEXP_ALLFLAGS         0xFE3F
+/*
+ * The NFSEXP_V4ROOT flag causes the kernel to give access only to NFSv4
+ * clients, and only to the single directory that is the root of the
+ * export; further lookup and readdir operations are treated as if every
+ * subdirectory was a mountpoint, and ignored if they are not themselves
+ * exported.  This is used by nfsd and mountd to construct the NFSv4
+ * pseudofilesystem, which provides access only to paths leading to each
+ * exported filesystem.
+ */
+#define NFSEXP_V4ROOT           0x10000
+/* All flags that we claim to support.  (Note we don't support NOACL.) */
+#define NFSEXP_ALLFLAGS         0x17E3F
 /* The flags that may vary depending on security flavor: */
 #define NFSEXP_SECINFO_FLAGS    (NFSEXP_READONLY | NFSEXP_ROOTSQUASH \
-                                        | NFSEXP_ALLSQUASH)
+                                        | NFSEXP_ALLSQUASH \
+                                        | NFSEXP_INSECURE_PORT)
 #ifdef __KERNEL__
@@ -108,7 +120,6 @@ struct svc_expkey {
        struct path             ek_path;
 };
-#define EX_SECURE(exp)          (!((exp)->ex_flags & NFSEXP_INSECURE_PORT))
 #define EX_ISSYNC(exp)          (!((exp)->ex_flags & NFSEXP_ASYNC))
 #define EX_NOHIDE(exp)          ((exp)->ex_flags & NFSEXP_NOHIDE)
 #define EX_WGATHER(exp)         ((exp)->ex_flags & NFSEXP_GATHERED_WRITES)
diff --git a/include/linux/nfsd/nfsfh.h b/include/linux/nfsd/nfsfh.h
index 8f641c908450..65e333afaee4 100644
--- a/include/linux/nfsd/nfsfh.h
+++ b/include/linux/nfsd/nfsfh.h
@@ -16,11 +16,9 @@
 # include <linux/types.h>
 #ifdef __KERNEL__
-# include <linux/string.h>
+# include <linux/sunrpc/svc.h>
-# include <linux/fs.h>
 #endif
 #include <linux/nfsd/const.h>
-#include <linux/nfsd/debug.h>
 /*
 * This is the old "dentry style" Linux NFSv2 file handle.
@@ -164,208 +162,6 @@ typedef struct svc_fh {
 } svc_fh;
-enum nfsd_fsid {
-        FSID_DEV = 0,
-        FSID_NUM,
-        FSID_MAJOR_MINOR,
-        FSID_ENCODE_DEV,
-        FSID_UUID4_INUM,
-        FSID_UUID8,
-        FSID_UUID16,
-        FSID_UUID16_INUM,
-};
-enum fsid_source {
-        FSIDSOURCE_DEV,
-        FSIDSOURCE_FSID,
-        FSIDSOURCE_UUID,
-};
-extern enum fsid_source fsid_source(struct svc_fh *fhp);
-/* This might look a little large to "inline" but in all calls except
- * one, 'vers' is constant so moste of the function disappears.
- */
-static inline void mk_fsid(int vers, u32 *fsidv, dev_t dev, ino_t ino,
-                           u32 fsid, unsigned char *uuid)
-{
-        u32 *up;
-        switch(vers) {
-        case FSID_DEV:
-                fsidv[0] = htonl((MAJOR(dev)<<16) |
-                                 MINOR(dev));
-                fsidv[1] = ino_t_to_u32(ino);
-                break;
-        case FSID_NUM:
-                fsidv[0] = fsid;
-                break;
-        case FSID_MAJOR_MINOR:
-                fsidv[0] = htonl(MAJOR(dev));
-                fsidv[1] = htonl(MINOR(dev));
-                fsidv[2] = ino_t_to_u32(ino);
-                break;
-        case FSID_ENCODE_DEV:
-                fsidv[0] = new_encode_dev(dev);
-                fsidv[1] = ino_t_to_u32(ino);
-                break;
-        case FSID_UUID4_INUM:
-                /* 4 byte fsid and inode number */
-                up = (u32*)uuid;
-                fsidv[0] = ino_t_to_u32(ino);
-                fsidv[1] = up[0] ^ up[1] ^ up[2] ^ up[3];
-                break;
-        case FSID_UUID8:
-                /* 8 byte fsid  */
-                up = (u32*)uuid;
-                fsidv[0] = up[0] ^ up[2];
-                fsidv[1] = up[1] ^ up[3];
-                break;
-        case FSID_UUID16:
-                /* 16 byte fsid - NFSv3+ only */
-                memcpy(fsidv, uuid, 16);
-                break;
-        case FSID_UUID16_INUM:
-                /* 8 byte inode and 16 byte fsid */
-                *(u64*)fsidv = (u64)ino;
-                memcpy(fsidv+2, uuid, 16);
-                break;
-        default: BUG();
-        }
-}
-static inline int key_len(int type)
-{
-        switch(type) {
-        case FSID_DEV:          return 8;
-        case FSID_NUM:          return 4;
-        case FSID_MAJOR_MINOR:  return 12;
-        case FSID_ENCODE_DEV:   return 8;
-        case FSID_UUID4_INUM:   return 8;
-        case FSID_UUID8:        return 8;
-        case FSID_UUID16:       return 16;
-        case FSID_UUID16_INUM:  return 24;
-        default: return 0;
-        }
-}
-/*
- * Shorthand for dprintk()'s
- */
-extern char * SVCFH_fmt(struct svc_fh *fhp);
-/*
- * Function prototypes
- */
-__be32  fh_verify(struct svc_rqst *, struct svc_fh *, int, int);
-__be32  fh_compose(struct svc_fh *, struct svc_export *, struct dentry *, struct svc_fh *);
-__be32  fh_update(struct svc_fh *);
-void    fh_put(struct svc_fh *);
-static __inline__ struct svc_fh *
-fh_copy(struct svc_fh *dst, struct svc_fh *src)
-{
-        WARN_ON(src->fh_dentry || src->fh_locked);
-                        
-        *dst = *src;
-        return dst;
-}
-static inline void
-fh_copy_shallow(struct knfsd_fh *dst, struct knfsd_fh *src)
-{
-        dst->fh_size = src->fh_size;
-        memcpy(&dst->fh_base, &src->fh_base, src->fh_size);
-}
-static __inline__ struct svc_fh *
-fh_init(struct svc_fh *fhp, int maxsize)
-{
-        memset(fhp, 0, sizeof(*fhp));
-        fhp->fh_maxsize = maxsize;
-        return fhp;
-}
-#ifdef CONFIG_NFSD_V3
-/*
- * Fill in the pre_op attr for the wcc data
- */
-static inline void
-fill_pre_wcc(struct svc_fh *fhp)
-{
-        struct inode    *inode;
-        inode = fhp->fh_dentry->d_inode;
-        if (!fhp->fh_pre_saved) {
-                fhp->fh_pre_mtime = inode->i_mtime;
-                fhp->fh_pre_ctime = inode->i_ctime;
-                fhp->fh_pre_size  = inode->i_size;
-                fhp->fh_pre_change = inode->i_version;
-                fhp->fh_pre_saved = 1;
-        }
-}
-extern void fill_post_wcc(struct svc_fh *);
-#else
-#define fill_pre_wcc(ignored)
-#define fill_post_wcc(notused)
-#endif /* CONFIG_NFSD_V3 */
-/*
- * Lock a file handle/inode
- * NOTE: both fh_lock and fh_unlock are done "by hand" in
- * vfs.c:nfsd_rename as it needs to grab 2 i_mutex's at once
- * so, any changes here should be reflected there.
- */
-static inline void
-fh_lock_nested(struct svc_fh *fhp, unsigned int subclass)
-{
-        struct dentry   *dentry = fhp->fh_dentry;
-        struct inode    *inode;
-        dfprintk(FILEOP, "nfsd: fh_lock(%s) locked = %d\n",
-                        SVCFH_fmt(fhp), fhp->fh_locked);
-        BUG_ON(!dentry);
-        if (fhp->fh_locked) {
-                printk(KERN_WARNING "fh_lock: %s/%s already locked!\n",
-                        dentry->d_parent->d_name.name, dentry->d_name.name);
-                return;
-        }
-        inode = dentry->d_inode;
-        mutex_lock_nested(&inode->i_mutex, subclass);
-        fill_pre_wcc(fhp);
-        fhp->fh_locked = 1;
-}
-static inline void
-fh_lock(struct svc_fh *fhp)
-{
-        fh_lock_nested(fhp, I_MUTEX_NORMAL);
-}
-/*
- * Unlock a file handle/inode
- */
-static inline void
-fh_unlock(struct svc_fh *fhp)
-{
-        BUG_ON(!fhp->fh_dentry);
-        if (fhp->fh_locked) {
-                fill_post_wcc(fhp);
-                mutex_unlock(&fhp->fh_dentry->d_inode->i_mutex);
-                fhp->fh_locked = 0;
-        }
-}
 #endif /* __KERNEL__ */
diff --git a/include/linux/nfsd/syscall.h b/include/linux/nfsd/syscall.h
index 7a3b565b898f..812bc1e160dc 100644
--- a/include/linux/nfsd/syscall.h
+++ b/include/linux/nfsd/syscall.h
@@ -9,14 +9,8 @@
 #ifndef NFSD_SYSCALL_H
 #define NFSD_SYSCALL_H
-# include <linux/types.h>
+#include <linux/types.h>
-#ifdef __KERNEL__
-# include <linux/in.h>
-#endif 
-#include <linux/posix_types.h>
-#include <linux/nfsd/const.h>
 #include <linux/nfsd/export.h>
-#include <linux/nfsd/nfsfh.h>
 /*
 * Version of the syscall interface
diff --git a/include/linux/oom.h b/include/linux/oom.h
index 6aac5fe4f6f1..537662315627 100644
--- a/include/linux/oom.h
+++ b/include/linux/oom.h
@@ -10,6 +10,7 @@
 #ifdef __KERNEL__
 #include <linux/types.h>
+#include <linux/nodemask.h>
 struct zonelist;
 struct notifier_block;
@@ -26,7 +27,8 @@ enum oom_constraint {
 extern int try_set_zone_oom(struct zonelist *zonelist, gfp_t gfp_flags);
 extern void clear_zonelist_oom(struct zonelist *zonelist, gfp_t gfp_flags);
-extern void out_of_memory(struct zonelist *zonelist, gfp_t gfp_mask, int order);
+extern void out_of_memory(struct zonelist *zonelist, gfp_t gfp_mask,
+                int order, nodemask_t *mask);
 extern int register_oom_notifier(struct notifier_block *nb);
 extern int unregister_oom_notifier(struct notifier_block *nb);
diff --git a/include/linux/page_cgroup.h b/include/linux/page_cgroup.h
index 4b938d4f3ac2..b0e4eb126236 100644
--- a/include/linux/page_cgroup.h
+++ b/include/linux/page_cgroup.h
@@ -57,6 +57,8 @@ static inline void ClearPageCgroup##uname(struct page_cgroup *pc)	\
 static inline int TestClearPageCgroup##uname(struct page_cgroup *pc)    \
        { return test_and_clear_bit(PCG_##lname, &pc->flags);  }
+TESTPCGFLAG(Locked, LOCK)
 /* Cache flag is set only once (at allocation) */
 TESTPCGFLAG(Cache, CACHE)
 CLEARPCGFLAG(Cache, CACHE)
@@ -86,11 +88,6 @@ static inline void lock_page_cgroup(struct page_cgroup *pc)
        bit_spin_lock(PCG_LOCK, &pc->flags);
 }
-static inline int trylock_page_cgroup(struct page_cgroup *pc)
-{
-        return bit_spin_trylock(PCG_LOCK, &pc->flags);
-}
 static inline void unlock_page_cgroup(struct page_cgroup *pc)
 {
        bit_spin_unlock(PCG_LOCK, &pc->flags);
diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h
index 7456d7d87a19..56f2d63a5cbb 100644
--- a/include/linux/ptrace.h
+++ b/include/linux/ptrace.h
@@ -105,12 +105,7 @@ static inline int ptrace_reparented(struct task_struct *child)
 {
        return child->real_parent != child->parent;
 }
-static inline void ptrace_link(struct task_struct *child,
-                               struct task_struct *new_parent)
-{
-        if (unlikely(child->ptrace))
-                __ptrace_link(child, new_parent);
-}
 static inline void ptrace_unlink(struct task_struct *child)
 {
        if (unlikely(child->ptrace))
@@ -169,9 +164,9 @@ static inline void ptrace_init_task(struct task_struct *child, bool ptrace)
        INIT_LIST_HEAD(&child->ptraced);
        child->parent = child->real_parent;
        child->ptrace = 0;
-        if (unlikely(ptrace)) {
+        if (unlikely(ptrace) && (current->ptrace & PT_PTRACED)) {
                child->ptrace = current->ptrace;
-                ptrace_link(child, current->parent);
+                __ptrace_link(child, current->parent);
        }
 }
@@ -278,6 +273,18 @@ static inline void user_enable_block_step(struct task_struct *task)
 }
 #endif  /* arch_has_block_step */
+#ifdef ARCH_HAS_USER_SINGLE_STEP_INFO
+extern void user_single_step_siginfo(struct task_struct *tsk,
+                                struct pt_regs *regs, siginfo_t *info);
+#else
+static inline void user_single_step_siginfo(struct task_struct *tsk,
+                                struct pt_regs *regs, siginfo_t *info)
+{
+        memset(info, 0, sizeof(*info));
+        info->si_signo = SIGTRAP;
+}
+#endif
 #ifndef arch_ptrace_stop_needed
 /**
 * arch_ptrace_stop_needed - Decide whether arch_ptrace_stop() should be called
diff --git a/include/linux/reiserfs_fs.h b/include/linux/reiserfs_fs.h
index a05b4a20768d..c96c1858fe2c 100644
--- a/include/linux/reiserfs_fs.h
+++ b/include/linux/reiserfs_fs.h
@@ -2051,25 +2051,12 @@ void set_de_name_and_namelen(struct reiserfs_dir_entry *de);
 int search_by_entry_key(struct super_block *sb, const struct cpu_key *key,
                        struct treepath *path, struct reiserfs_dir_entry *de);
 struct dentry *reiserfs_get_parent(struct dentry *);
-/* procfs.c */
-#if defined( CONFIG_PROC_FS ) && defined( CONFIG_REISERFS_PROC_INFO )
-#define REISERFS_PROC_INFO
-#else
-#undef REISERFS_PROC_INFO
-#endif
+#ifdef CONFIG_REISERFS_PROC_INFO
 int reiserfs_proc_info_init(struct super_block *sb);
 int reiserfs_proc_info_done(struct super_block *sb);
-struct proc_dir_entry *reiserfs_proc_register_global(char *name,
-                                                     read_proc_t * func);
-void reiserfs_proc_unregister_global(const char *name);
 int reiserfs_proc_info_global_init(void);
 int reiserfs_proc_info_global_done(void);
-int reiserfs_global_version_in_proc(char *buffer, char **start, off_t offset,
-                                    int count, int *eof, void *data);
-#if defined( REISERFS_PROC_INFO )
 #define PROC_EXP( e )   e
@@ -2084,6 +2071,26 @@ int reiserfs_global_version_in_proc(char *buffer, char **start, off_t offset,
    PROC_INFO_ADD( sb, free_at[ ( level ) ], B_FREE_SPACE( bh ) );      \
    PROC_INFO_ADD( sb, items_at[ ( level ) ], B_NR_ITEMS( bh ) )
 #else
+static inline int reiserfs_proc_info_init(struct super_block *sb)
+{
+        return 0;
+}
+static inline int reiserfs_proc_info_done(struct super_block *sb)
+{
+        return 0;
+}
+static inline int reiserfs_proc_info_global_init(void)
+{
+        return 0;
+}
+static inline int reiserfs_proc_info_global_done(void)
+{
+        return 0;
+}
 #define PROC_EXP( e )
 #define VOID_V ( ( void ) 0 )
 #define PROC_INFO_MAX( sb, field, value ) VOID_V
diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h
index 14fc906ed602..05330fc5b436 100644
--- a/include/linux/rtnetlink.h
+++ b/include/linux/rtnetlink.h
@@ -368,11 +368,9 @@ enum {
 #define RTAX_MAX (__RTAX_MAX - 1)
 #define RTAX_FEATURE_ECN        0x00000001
-#define RTAX_FEATURE_NO_SACK    0x00000002
+#define RTAX_FEATURE_SACK       0x00000002
-#define RTAX_FEATURE_NO_TSTAMP  0x00000004
+#define RTAX_FEATURE_TIMESTAMP  0x00000004
 #define RTAX_FEATURE_ALLFRAG    0x00000008
-#define RTAX_FEATURE_NO_WSCALE  0x00000010
-#define RTAX_FEATURE_NO_DSACK   0x00000020
 struct rta_session {
        __u8    proto;
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 5c858f38e81a..244c287a5ac1 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -1544,6 +1544,14 @@ struct task_struct {
        unsigned long trace_recursion;
 #endif /* CONFIG_TRACING */
        unsigned long stack_start;
+#ifdef CONFIG_CGROUP_MEM_RES_CTLR /* memcg uses this to do batch job */
+        struct memcg_batch_info {
+                int do_batch;   /* incremented when batch uncharge started */
+                struct mem_cgroup *memcg; /* target memcg of uncharge */
+                unsigned long bytes;            /* uncharged usage */
+                unsigned long memsw_bytes; /* uncharged mem+swap usage */
+        } memcg_batch;
+#endif
 };
 /* Future-safe accessor for struct task_struct's cpus_allowed. */
@@ -2075,7 +2083,6 @@ extern int kill_proc_info(int, struct siginfo *, pid_t);
 extern int do_notify_parent(struct task_struct *, int);
 extern void __wake_up_parent(struct task_struct *p, struct task_struct *parent);
 extern void force_sig(int, struct task_struct *);
-extern void force_sig_specific(int, struct task_struct *);
 extern int send_sig(int, struct task_struct *, int);
 extern void zap_other_threads(struct task_struct *p);
 extern struct sigqueue *sigqueue_alloc(void);
@@ -2094,11 +2101,6 @@ static inline int kill_cad_pid(int sig, int priv)
 #define SEND_SIG_PRIV   ((struct siginfo *) 1)
 #define SEND_SIG_FORCED ((struct siginfo *) 2)
-static inline int is_si_special(const struct siginfo *info)
-{
-        return info <= SEND_SIG_FORCED;
-}
 /*
 * True if we are on the alternate signal stack.
 */
diff --git a/include/linux/sem.h b/include/linux/sem.h
index 1b191c176bcd..8a4adbef8a0f 100644
--- a/include/linux/sem.h
+++ b/include/linux/sem.h
@@ -86,6 +86,7 @@ struct task_struct;
 struct sem {
        int     semval;         /* current value */
        int     sempid;         /* pid of last operation */
+        struct list_head sem_pending; /* pending single-sop operations */
 };
 /* One sem_array data structure for each set of semaphores in the system. */
@@ -96,11 +97,13 @@ struct sem_array {
        struct sem              *sem_base;      /* ptr to first semaphore in array */
        struct list_head        sem_pending;    /* pending operations to be processed */
        struct list_head        list_id;        /* undo requests on this array */
-        unsigned long           sem_nsems;      /* no. of semaphores in array */
+        int                     sem_nsems;      /* no. of semaphores in array */
+        int                     complex_count;  /* pending complex operations */
 };
 /* One queue for each sleeping process in the system. */
 struct sem_queue {
+        struct list_head        simple_list; /* queue of pending operations */
        struct list_head        list;    /* queue of pending operations */
        struct task_struct      *sleeper; /* this process */
        struct sem_undo         *undo;   /* undo structure */
diff --git a/include/linux/sm501-regs.h b/include/linux/sm501-regs.h
index d53642d2d899..67ed2c542831 100644
--- a/include/linux/sm501-regs.h
+++ b/include/linux/sm501-regs.h
@@ -31,6 +31,8 @@
 #define SM501_SYSCTRL_PCI_SUBSYS_LOCK   (1<<11)
 #define SM501_SYSCTRL_PCI_BURST_READ_EN (1<<15)
+#define SM501_SYSCTRL_2D_ENGINE_STATUS  (1<<19)
 /* miscellaneous control */
 #define SM501_MISC_CONTROL              (0x000004)
diff --git a/include/linux/sunrpc/debug.h b/include/linux/sunrpc/debug.h
index 10709cbe96fd..c2786f20016f 100644
--- a/include/linux/sunrpc/debug.h
+++ b/include/linux/sunrpc/debug.h
@@ -28,9 +28,6 @@
 #ifdef __KERNEL__
-#include <linux/timer.h>
-#include <linux/workqueue.h>
 /*
 * Enable RPC debugging/profiling.
 */
diff --git a/include/linux/sunrpc/rpc_rdma.h b/include/linux/sunrpc/rpc_rdma.h
index 87b895d5c786..b78f16b1dea3 100644
--- a/include/linux/sunrpc/rpc_rdma.h
+++ b/include/linux/sunrpc/rpc_rdma.h
@@ -40,6 +40,8 @@
 #ifndef _LINUX_SUNRPC_RPC_RDMA_H
 #define _LINUX_SUNRPC_RPC_RDMA_H
+#include <linux/types.h>
 struct rpcrdma_segment {
        __be32 rs_handle;       /* Registered memory handle */
        __be32 rs_length;       /* Length of the chunk in bytes */
diff --git a/include/linux/sunrpc/sched.h b/include/linux/sunrpc/sched.h
index 1906782ec86b..7bc7fd5291ce 100644
--- a/include/linux/sunrpc/sched.h
+++ b/include/linux/sunrpc/sched.h
@@ -173,7 +173,8 @@ struct rpc_task_setup {
 #define RPC_PRIORITY_LOW        (-1)
 #define RPC_PRIORITY_NORMAL     (0)
 #define RPC_PRIORITY_HIGH       (1)
-#define RPC_NR_PRIORITY         (1 + RPC_PRIORITY_HIGH - RPC_PRIORITY_LOW)
+#define RPC_PRIORITY_PRIVILEGED (2)
+#define RPC_NR_PRIORITY         (1 + RPC_PRIORITY_PRIVILEGED - RPC_PRIORITY_LOW)
 struct rpc_timer {
        struct timer_list timer;
@@ -229,6 +230,7 @@ void		rpc_wake_up_queued_task(struct rpc_wait_queue *,
 void            rpc_wake_up(struct rpc_wait_queue *);
 struct rpc_task *rpc_wake_up_next(struct rpc_wait_queue *);
 void            rpc_wake_up_status(struct rpc_wait_queue *, int);
+int             rpc_queue_empty(struct rpc_wait_queue *);
 void            rpc_delay(struct rpc_task *, unsigned long);
 void *          rpc_malloc(struct rpc_task *, size_t);
 void            rpc_free(void *);
@@ -254,6 +256,16 @@ static inline int rpc_wait_for_completion_task(struct rpc_task *task)
        return __rpc_wait_for_completion_task(task, NULL);
 }
+static inline void rpc_task_set_priority(struct rpc_task *task, unsigned char prio)
+{
+        task->tk_priority = prio - RPC_PRIORITY_LOW;
+}
+static inline int rpc_task_has_priority(struct rpc_task *task, unsigned char prio)
+{
+        return (task->tk_priority + RPC_PRIORITY_LOW == prio);
+}
 #ifdef RPC_DEBUG
 static inline const char * rpc_qname(struct rpc_wait_queue *q)
 {
diff --git a/include/linux/sunrpc/svc.h b/include/linux/sunrpc/svc.h
index 52e8cb0a7569..5a3085b9b394 100644
--- a/include/linux/sunrpc/svc.h
+++ b/include/linux/sunrpc/svc.h
@@ -29,7 +29,6 @@ struct svc_pool_stats {
        unsigned long   packets;
        unsigned long   sockets_queued;
        unsigned long   threads_woken;
-        unsigned long   overloads_avoided;
        unsigned long   threads_timedout;
 };
@@ -50,7 +49,6 @@ struct svc_pool {
        struct list_head        sp_sockets;     /* pending sockets */
        unsigned int            sp_nrthreads;   /* # of threads in pool */
        struct list_head        sp_all_threads; /* all server threads */
-        int                     sp_nwaking;     /* number of threads woken but not yet active */
        struct svc_pool_stats   sp_stats;       /* statistics on pool operation */
 } ____cacheline_aligned_in_smp;
@@ -275,16 +273,11 @@ struct svc_rqst {
        struct auth_domain *    rq_client;      /* RPC peer info */
        struct auth_domain *    rq_gssclient;   /* "gss/"-style peer info */
        struct svc_cacherep *   rq_cacherep;    /* cache info */
-        struct knfsd_fh *       rq_reffh;       /* Referrence filehandle, used to
-                                                 * determine what device number
-                                                 * to report (real or virtual)
-                                                 */
        int                     rq_splice_ok;   /* turned off in gss privacy
                                                 * to prevent encrypting page
                                                 * cache pages */
        wait_queue_head_t       rq_wait;        /* synchronization */
        struct task_struct      *rq_task;       /* service thread */
-        int                     rq_waking;      /* 1 if thread is being woken */
 };
 /*
diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h
index 939a61507ac5..65793e90d6f6 100644
--- a/include/linux/syscalls.h
+++ b/include/linux/syscalls.h
@@ -102,12 +102,10 @@ struct perf_event_attr;
 #ifdef CONFIG_EVENT_PROFILE
 #define TRACE_SYS_ENTER_PROFILE_INIT(sname)                                    \
-        .profile_count = ATOMIC_INIT(-1),                                      \
        .profile_enable = prof_sysenter_enable,                                \
        .profile_disable = prof_sysenter_disable,
 #define TRACE_SYS_EXIT_PROFILE_INIT(sname)                                     \
-        .profile_count = ATOMIC_INIT(-1),                                      \
        .profile_enable = prof_sysexit_enable,                                 \
        .profile_disable = prof_sysexit_disable,
 #else
@@ -145,7 +143,7 @@ struct perf_event_attr;
                .name                   = "sys_enter"#sname,            \
                .system                 = "syscalls",                   \
                .event                  = &enter_syscall_print_##sname, \
-                .raw_init               = init_syscall_trace,           \
+                .raw_init               = trace_event_raw_init,         \
                .show_format            = syscall_enter_format,         \
                .define_fields          = syscall_enter_define_fields,  \
                .regfunc                = reg_event_syscall_enter,      \
@@ -167,7 +165,7 @@ struct perf_event_attr;
                .name                   = "sys_exit"#sname,             \
                .system                 = "syscalls",                   \
                .event                  = &exit_syscall_print_##sname,  \
-                .raw_init               = init_syscall_trace,           \
+                .raw_init               = trace_event_raw_init,         \
                .show_format            = syscall_exit_format,          \
                .define_fields          = syscall_exit_define_fields,   \
                .regfunc                = reg_event_syscall_exit,       \
diff --git a/include/linux/timb_gpio.h b/include/linux/timb_gpio.h
new file mode 100644
index 000000000000..ce456eaae861
--- /dev/null
+++ b/include/linux/timb_gpio.h
@@ -0,0 +1,37 @@
+/*
+ * timb_gpio.h timberdale FPGA GPIO driver, platform data definition
+ * Copyright (c) 2009 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#ifndef _LINUX_TIMB_GPIO_H
+#define _LINUX_TIMB_GPIO_H
+/**
+ * struct timbgpio_platform_data - Platform data of the Timberdale GPIO driver
+ * @gpio_base           The number of the first GPIO pin, set to -1 for
+ *                      dynamic number allocation.
+ * @nr_pins             Number of pins that is supported by the hardware (1-32)
+ * @irq_base            If IRQ is supported by the hardware, this is the base
+ *                      number of IRQ:s. One IRQ per pin will be used. Set to
+ *                      -1 if IRQ:s is not supported.
+ */
+struct timbgpio_platform_data {
+        int gpio_base;
+        int nr_pins;
+        int irq_base;
+};
+#endif
diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h
index 1eb44a924e56..10db0102a890 100644
--- a/include/linux/tracehook.h
+++ b/include/linux/tracehook.h
@@ -134,6 +134,13 @@ static inline __must_check int tracehook_report_syscall_entry(
 */
 static inline void tracehook_report_syscall_exit(struct pt_regs *regs, int step)
 {
+        if (step) {
+                siginfo_t info;
+                user_single_step_siginfo(current, regs, &info);
+                force_sig_info(SIGTRAP, &info, current);
+                return;
+        }
        ptrace_report_syscall(regs);
 }
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index 32b92298fd79..d4962a782b8a 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -294,6 +294,7 @@ struct v4l2_pix_format {
 /* Grey formats */
 #define V4L2_PIX_FMT_GREY    v4l2_fourcc('G', 'R', 'E', 'Y') /*  8  Greyscale     */
+#define V4L2_PIX_FMT_Y10     v4l2_fourcc('Y', '1', '0', ' ') /* 10  Greyscale     */
 #define V4L2_PIX_FMT_Y16     v4l2_fourcc('Y', '1', '6', ' ') /* 16  Greyscale     */
 /* Palette formats */
@@ -329,7 +330,11 @@ struct v4l2_pix_format {
 #define V4L2_PIX_FMT_SBGGR8  v4l2_fourcc('B', 'A', '8', '1') /*  8  BGBG.. GRGR.. */
 #define V4L2_PIX_FMT_SGBRG8  v4l2_fourcc('G', 'B', 'R', 'G') /*  8  GBGB.. RGRG.. */
 #define V4L2_PIX_FMT_SGRBG8  v4l2_fourcc('G', 'R', 'B', 'G') /*  8  GRGR.. BGBG.. */
-#define V4L2_PIX_FMT_SGRBG10 v4l2_fourcc('B', 'A', '1', '0') /* 10bit raw bayer */
+#define V4L2_PIX_FMT_SRGGB8  v4l2_fourcc('R', 'G', 'G', 'B') /*  8  RGRG.. GBGB.. */
+#define V4L2_PIX_FMT_SBGGR10 v4l2_fourcc('B', 'G', '1', '0') /* 10  BGBG.. GRGR.. */
+#define V4L2_PIX_FMT_SGBRG10 v4l2_fourcc('G', 'B', '1', '0') /* 10  GBGB.. RGRG.. */
+#define V4L2_PIX_FMT_SGRBG10 v4l2_fourcc('B', 'A', '1', '0') /* 10  GRGR.. BGBG.. */
+#define V4L2_PIX_FMT_SRGGB10 v4l2_fourcc('R', 'G', '1', '0') /* 10  RGRG.. GBGB.. */
        /* 10bit raw bayer DPCM compressed to 8 bits */
 #define V4L2_PIX_FMT_SGRBG10DPCM8 v4l2_fourcc('B', 'D', '1', '0')
        /*
@@ -732,6 +737,99 @@ struct v4l2_standard {
 };
 /*
+ *      V I D E O       T I M I N G S   D V     P R E S E T
+ */
+struct v4l2_dv_preset {
+        __u32   preset;
+        __u32   reserved[4];
+};
+/*
+ *      D V     P R E S E T S   E N U M E R A T I O N
+ */
+struct v4l2_dv_enum_preset {
+        __u32   index;
+        __u32   preset;
+        __u8    name[32]; /* Name of the preset timing */
+        __u32   width;
+        __u32   height;
+        __u32   reserved[4];
+};
+/*
+ *      D V     P R E S E T     V A L U E S
+ */
+#define         V4L2_DV_INVALID         0
+#define         V4L2_DV_480P59_94       1 /* BT.1362 */
+#define         V4L2_DV_576P50          2 /* BT.1362 */
+#define         V4L2_DV_720P24          3 /* SMPTE 296M */
+#define         V4L2_DV_720P25          4 /* SMPTE 296M */
+#define         V4L2_DV_720P30          5 /* SMPTE 296M */
+#define         V4L2_DV_720P50          6 /* SMPTE 296M */
+#define         V4L2_DV_720P59_94       7 /* SMPTE 274M */
+#define         V4L2_DV_720P60          8 /* SMPTE 274M/296M */
+#define         V4L2_DV_1080I29_97      9 /* BT.1120/ SMPTE 274M */
+#define         V4L2_DV_1080I30         10 /* BT.1120/ SMPTE 274M */
+#define         V4L2_DV_1080I25         11 /* BT.1120 */
+#define         V4L2_DV_1080I50         12 /* SMPTE 296M */
+#define         V4L2_DV_1080I60         13 /* SMPTE 296M */
+#define         V4L2_DV_1080P24         14 /* SMPTE 296M */
+#define         V4L2_DV_1080P25         15 /* SMPTE 296M */
+#define         V4L2_DV_1080P30         16 /* SMPTE 296M */
+#define         V4L2_DV_1080P50         17 /* BT.1120 */
+#define         V4L2_DV_1080P60         18 /* BT.1120 */
+/*
+ *      D V     B T     T I M I N G S
+ */
+/* BT.656/BT.1120 timing data */
+struct v4l2_bt_timings {
+        __u32   width;          /* width in pixels */
+        __u32   height;         /* height in lines */
+        __u32   interlaced;     /* Interlaced or progressive */
+        __u32   polarities;     /* Positive or negative polarity */
+        __u64   pixelclock;     /* Pixel clock in HZ. Ex. 74.25MHz->74250000 */
+        __u32   hfrontporch;    /* Horizpontal front porch in pixels */
+        __u32   hsync;          /* Horizontal Sync length in pixels */
+        __u32   hbackporch;     /* Horizontal back porch in pixels */
+        __u32   vfrontporch;    /* Vertical front porch in pixels */
+        __u32   vsync;          /* Vertical Sync length in lines */
+        __u32   vbackporch;     /* Vertical back porch in lines */
+        __u32   il_vfrontporch; /* Vertical front porch for bottom field of
+                                 * interlaced field formats
+                                 */
+        __u32   il_vsync;       /* Vertical sync length for bottom field of
+                                 * interlaced field formats
+                                 */
+        __u32   il_vbackporch;  /* Vertical back porch for bottom field of
+                                 * interlaced field formats
+                                 */
+        __u32   reserved[16];
+} __attribute__ ((packed));
+/* Interlaced or progressive format */
+#define V4L2_DV_PROGRESSIVE     0
+#define V4L2_DV_INTERLACED      1
+/* Polarities. If bit is not set, it is assumed to be negative polarity */
+#define V4L2_DV_VSYNC_POS_POL   0x00000001
+#define V4L2_DV_HSYNC_POS_POL   0x00000002
+/* DV timings */
+struct v4l2_dv_timings {
+        __u32 type;
+        union {
+                struct v4l2_bt_timings  bt;
+                __u32   reserved[32];
+        };
+} __attribute__ ((packed));
+/* Values for the type field */
+#define V4L2_DV_BT_656_1120     0       /* BT.656/1120 timing type */
+/*
 *      V I D E O   I N P U T S
 */
 struct v4l2_input {
@@ -742,7 +840,8 @@ struct v4l2_input {
        __u32        tuner;             /*  Associated tuner */
        v4l2_std_id  std;
        __u32        status;
-        __u32        reserved[4];
+        __u32        capabilities;
+        __u32        reserved[3];
 };
 /*  Values for the 'type' field */
@@ -773,6 +872,11 @@ struct v4l2_input {
 #define V4L2_IN_ST_NO_ACCESS   0x02000000  /* Conditional access denied */
 #define V4L2_IN_ST_VTR         0x04000000  /* VTR time constant */
+/* capabilities flags */
+#define V4L2_IN_CAP_PRESETS             0x00000001 /* Supports S_DV_PRESET */
+#define V4L2_IN_CAP_CUSTOM_TIMINGS      0x00000002 /* Supports S_DV_TIMINGS */
+#define V4L2_IN_CAP_STD                 0x00000004 /* Supports S_STD */
 /*
 *      V I D E O   O U T P U T S
 */
@@ -783,13 +887,19 @@ struct v4l2_output {
        __u32        audioset;          /*  Associated audios (bitfield) */
        __u32        modulator;         /*  Associated modulator */
        v4l2_std_id  std;
-        __u32        reserved[4];
+        __u32        capabilities;
+        __u32        reserved[3];
 };
 /*  Values for the 'type' field */
 #define V4L2_OUTPUT_TYPE_MODULATOR              1
 #define V4L2_OUTPUT_TYPE_ANALOG                 2
 #define V4L2_OUTPUT_TYPE_ANALOGVGAOVERLAY       3
+/* capabilities flags */
+#define V4L2_OUT_CAP_PRESETS            0x00000001 /* Supports S_DV_PRESET */
+#define V4L2_OUT_CAP_CUSTOM_TIMINGS     0x00000002 /* Supports S_DV_TIMINGS */
+#define V4L2_OUT_CAP_STD                0x00000004 /* Supports S_STD */
 /*
 *      C O N T R O L S
 */
@@ -1624,6 +1734,13 @@ struct v4l2_dbg_chip_ident {
 #endif
 #define VIDIOC_S_HW_FREQ_SEEK    _IOW('V', 82, struct v4l2_hw_freq_seek)
+#define VIDIOC_ENUM_DV_PRESETS  _IOWR('V', 83, struct v4l2_dv_enum_preset)
+#define VIDIOC_S_DV_PRESET      _IOWR('V', 84, struct v4l2_dv_preset)
+#define VIDIOC_G_DV_PRESET      _IOWR('V', 85, struct v4l2_dv_preset)
+#define VIDIOC_QUERY_DV_PRESET  _IOR('V',  86, struct v4l2_dv_preset)
+#define VIDIOC_S_DV_TIMINGS     _IOWR('V', 87, struct v4l2_dv_timings)
+#define VIDIOC_G_DV_TIMINGS     _IOWR('V', 88, struct v4l2_dv_timings)
 /* Reminder: when adding new ioctls please add support for them to
   drivers/media/video/v4l2-compat-ioctl32.c as well! */
diff --git a/include/media/ir-common.h b/include/media/ir-common.h
index e41a99ee353e..2c6af24b905e 100644
--- a/include/media/ir-common.h
+++ b/include/media/ir-common.h
@@ -26,26 +26,7 @@
 #include <linux/input.h>
 #include <linux/workqueue.h>
 #include <linux/interrupt.h>
-#include <linux/spinlock.h>
+#include <media/ir-core.h>
-extern int media_ir_debug;    /* media_ir_debug level (0,1,2) */
-#define IR_dprintk(level, fmt, arg...)  if (media_ir_debug >= level) \
-        printk(KERN_DEBUG "%s: " fmt , __func__, ## arg)
-#define IR_TYPE_RC5     1
-#define IR_TYPE_PD      2 /* Pulse distance encoded IR */
-#define IR_TYPE_OTHER  99
-struct ir_scancode {
-        u16     scancode;
-        u32     keycode;
-};
-struct ir_scancode_table {
-        struct ir_scancode *scan;
-        int size;
-        spinlock_t lock;
-};
 #define RC5_START(x)    (((x)>>12)&3)
 #define RC5_TOGGLE(x)   (((x)>>11)&1)
@@ -56,8 +37,6 @@ struct ir_input_state {
        /* configuration */
        int                ir_type;
-        struct ir_scancode_table keytable;
        /* key info */
        u32                ir_key;      /* ir scancode */
        u32                keycode;     /* linux key code */
@@ -105,7 +84,7 @@ struct card_ir {
 /* Routines from ir-functions.c */
 int ir_input_init(struct input_dev *dev, struct ir_input_state *ir,
-                   int ir_type, struct ir_scancode_table *ir_codes);
+                   int ir_type);
 void ir_input_nokey(struct input_dev *dev, struct ir_input_state *ir);
 void ir_input_keydown(struct input_dev *dev, struct ir_input_state *ir,
                      u32 ir_key);
@@ -118,19 +97,6 @@ u32  ir_rc5_decode(unsigned int code);
 void ir_rc5_timer_end(unsigned long data);
 void ir_rc5_timer_keyup(unsigned long data);
-/* Routines from ir-keytable.c */
-u32 ir_g_keycode_from_table(struct input_dev *input_dev,
-                            u32 scancode);
-int ir_set_keycode_table(struct input_dev *input_dev,
-                         struct ir_scancode_table *rc_tab);
-int ir_roundup_tablesize(int n_elems);
-int ir_copy_table(struct ir_scancode_table *destin,
-                 const struct ir_scancode_table *origin);
-void ir_input_free(struct input_dev *input_dev);
 /* scancode->keycode map tables from ir-keymaps.c */
 extern struct ir_scancode_table ir_codes_empty_table;
@@ -195,4 +161,5 @@ extern struct ir_scancode_table ir_codes_evga_indtube_table;
 extern struct ir_scancode_table ir_codes_terratec_cinergy_xs_table;
 extern struct ir_scancode_table ir_codes_videomate_s350_table;
 extern struct ir_scancode_table ir_codes_gadmei_rm008z_table;
+extern struct ir_scancode_table ir_codes_nec_terratec_cinergy_xs_table;
 #endif
diff --git a/include/media/ir-core.h b/include/media/ir-core.h
new file mode 100644
index 000000000000..299d201e1339
--- /dev/null
+++ b/include/media/ir-core.h
@@ -0,0 +1,62 @@
+/*
+ * Remote Controller core header
+ *
+ * This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation version 2 of the License.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+#ifndef _IR_CORE
+#define _IR_CORE
+#include <linux/input.h>
+#include <linux/spinlock.h>
+extern int ir_core_debug;
+#define IR_dprintk(level, fmt, arg...)  if (ir_core_debug >= level) \
+        printk(KERN_DEBUG "%s: " fmt , __func__, ## arg)
+enum ir_type {
+        IR_TYPE_UNKNOWN = 0,
+        IR_TYPE_RC5     = 1,
+        IR_TYPE_PD      = 2,             /* Pulse distance encoded IR */
+        IR_TYPE_NEC     = 3,
+        IR_TYPE_OTHER   = 99,
+};
+struct ir_scancode {
+        u16     scancode;
+        u32     keycode;
+};
+struct ir_scancode_table {
+        struct ir_scancode      *scan;
+        int                     size;
+        enum                    ir_type ir_type;
+        spinlock_t              lock;
+};
+struct ir_input_dev {
+        struct input_dev                *dev;
+        struct ir_scancode_table        rc_tab;
+};
+/* Routines from ir-keytable.c */
+u32 ir_g_keycode_from_table(struct input_dev *input_dev,
+                            u32 scancode);
+int ir_set_keycode_table(struct input_dev *input_dev,
+                         struct ir_scancode_table *rc_tab);
+int ir_roundup_tablesize(int n_elems);
+int ir_input_register(struct input_dev *dev,
+                      struct ir_scancode_table *ir_codes);
+void ir_input_unregister(struct input_dev *input_dev);
+#endif
diff --git a/include/media/mt9t112.h b/include/media/mt9t112.h
new file mode 100644
index 000000000000..a43c74ab05ec
--- /dev/null
+++ b/include/media/mt9t112.h
@@ -0,0 +1,30 @@
+/* mt9t112 Camera
+ *
+ * Copyright (C) 2009 Renesas Solutions Corp.
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __MT9T112_H__
+#define __MT9T112_H__
+#define MT9T112_FLAG_PCLK_RISING_EDGE   (1 << 0)
+#define MT9T112_FLAG_DATAWIDTH_8        (1 << 1) /* default width is 10 */
+struct mt9t112_pll_divider {
+        u8 m, n;
+        u8 p1, p2, p3, p4, p5, p6, p7;
+};
+/*
+ * mt9t112 camera info
+ */
+struct mt9t112_camera_info {
+        u32 flags;
+        struct mt9t112_pll_divider divider;
+};
+#endif /* __MT9T112_H__ */
diff --git a/include/media/ov772x.h b/include/media/ov772x.h
index 30d9629198ef..14c77efd6a85 100644
--- a/include/media/ov772x.h
+++ b/include/media/ov772x.h
@@ -1,4 +1,5 @@
-/* ov772x Camera
+/*
+ * ov772x Camera
 *
 * Copyright (C) 2008 Renesas Solutions Corp.
 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
@@ -54,7 +55,6 @@ struct ov772x_edge_ctrl {
 struct ov772x_camera_info {
        unsigned long          buswidth;
        unsigned long          flags;
-        struct soc_camera_link link;
        struct ov772x_edge_ctrl edgectrl;
 };
diff --git a/include/media/rj54n1cb0c.h b/include/media/rj54n1cb0c.h
new file mode 100644
index 000000000000..8ae3288ae925
--- /dev/null
+++ b/include/media/rj54n1cb0c.h
@@ -0,0 +1,19 @@
+/*
+ * RJ54N1CB0C Private data
+ *
+ * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __RJ54N1CB0C_H__
+#define __RJ54N1CB0C_H__
+struct rj54n1_pdata {
+        unsigned int    mclk_freq;
+        bool            ioctl_high;
+};
+#endif
diff --git a/include/media/saa7146_vv.h b/include/media/saa7146_vv.h
index eed5fccc83f3..4aeff96ff7d8 100644
--- a/include/media/saa7146_vv.h
+++ b/include/media/saa7146_vv.h
@@ -108,8 +108,6 @@ struct saa7146_fh {
 struct saa7146_vv
 {
-        int vbi_minor;
        /* vbi capture */
        struct saa7146_dmaqueue         vbi_q;
        /* vbi workaround interrupt queue */
@@ -117,8 +115,6 @@ struct saa7146_vv
        int                             vbi_fieldcount;
        struct saa7146_fh               *vbi_streaming;
-        int video_minor;
        int                             video_status;
        struct saa7146_fh               *video_fh;
diff --git a/include/media/sh_mobile_ceu.h b/include/media/sh_mobile_ceu.h
index 0f3524cff435..b67747836878 100644
--- a/include/media/sh_mobile_ceu.h
+++ b/include/media/sh_mobile_ceu.h
@@ -3,6 +3,8 @@
 #define SH_CEU_FLAG_USE_8BIT_BUS        (1 << 0) /* use  8bit bus width */
 #define SH_CEU_FLAG_USE_16BIT_BUS       (1 << 1) /* use 16bit bus width */
+#define SH_CEU_FLAG_HSYNC_LOW           (1 << 2) /* default High if possible */
+#define SH_CEU_FLAG_VSYNC_LOW           (1 << 3) /* default High if possible */
 struct sh_mobile_ceu_info {
        unsigned long flags;
diff --git a/include/media/soc_camera.h b/include/media/soc_camera.h
index 3d74e60032dd..dcc5b86bcb6c 100644
--- a/include/media/soc_camera.h
+++ b/include/media/soc_camera.h
@@ -24,18 +24,13 @@ struct soc_camera_device {
        struct device *pdev;            /* Platform device */
        s32 user_width;
        s32 user_height;
-        unsigned short width_min;
+        enum v4l2_colorspace colorspace;
-        unsigned short height_min;
-        unsigned short y_skip_top;      /* Lines to skip at the top */
        unsigned char iface;            /* Host number */
        unsigned char devnum;           /* Device number per host */
-        unsigned char buswidth;         /* See comment in .c */
        struct soc_camera_sense *sense; /* See comment in struct definition */
        struct soc_camera_ops *ops;
        struct video_device *vdev;
-        const struct soc_camera_data_format *current_fmt;
+        const struct soc_camera_format_xlate *current_fmt;
-        const struct soc_camera_data_format *formats;
-        int num_formats;
        struct soc_camera_format_xlate *user_formats;
        int num_user_formats;
        enum v4l2_field field;          /* Preserve field over close() */
@@ -107,6 +102,8 @@ struct soc_camera_link {
        int i2c_adapter_id;
        struct i2c_board_info *board_info;
        const char *module_name;
+        void *priv;
        /*
         * For non-I2C devices platform platform has to provide methods to
         * add a device to the system and to remove
@@ -162,23 +159,13 @@ static inline struct v4l2_subdev *soc_camera_to_subdev(
 int soc_camera_host_register(struct soc_camera_host *ici);
 void soc_camera_host_unregister(struct soc_camera_host *ici);
-const struct soc_camera_data_format *soc_camera_format_by_fourcc(
-        struct soc_camera_device *icd, unsigned int fourcc);
 const struct soc_camera_format_xlate *soc_camera_xlate_by_fourcc(
        struct soc_camera_device *icd, unsigned int fourcc);
-struct soc_camera_data_format {
-        const char *name;
-        unsigned int depth;
-        __u32 fourcc;
-        enum v4l2_colorspace colorspace;
-};
 /**
 * struct soc_camera_format_xlate - match between host and sensor formats
- * @cam_fmt: sensor format provided by the sensor
+ * @code: code of a sensor provided format
- * @host_fmt: host format after host translation from cam_fmt
+ * @host_fmt: host format after host translation from code
- * @buswidth: bus width for this format
 *
 * Host and sensor translation structure. Used in table of host and sensor
 * formats matchings in soc_camera_device. A host can override the generic list
@@ -186,9 +173,8 @@ struct soc_camera_data_format {
 * format setup.
 */
 struct soc_camera_format_xlate {
-        const struct soc_camera_data_format *cam_fmt;
+        enum v4l2_mbus_pixelcode code;
-        const struct soc_camera_data_format *host_fmt;
+        const struct soc_mbus_pixelfmt *host_fmt;
-        unsigned char buswidth;
 };
 struct soc_camera_ops {
diff --git a/include/media/soc_camera_platform.h b/include/media/soc_camera_platform.h
index bb70401b8141..0ecefe227b76 100644
--- a/include/media/soc_camera_platform.h
+++ b/include/media/soc_camera_platform.h
@@ -19,11 +19,10 @@ struct device;
 struct soc_camera_platform_info {
        const char *format_name;
        unsigned long format_depth;
-        struct v4l2_pix_format format;
+        struct v4l2_mbus_framefmt format;
        unsigned long bus_param;
        struct device *dev;
        int (*set_capture)(struct soc_camera_platform_info *info, int enable);
-        struct soc_camera_link link;
 };
 #endif /* __SOC_CAMERA_H__ */
diff --git a/include/media/soc_mediabus.h b/include/media/soc_mediabus.h
new file mode 100644
index 000000000000..037cd7be001e
--- /dev/null
+++ b/include/media/soc_mediabus.h
@@ -0,0 +1,65 @@
+/*
+ * SoC-camera Media Bus API extensions
+ *
+ * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef SOC_MEDIABUS_H
+#define SOC_MEDIABUS_H
+#include <linux/videodev2.h>
+#include <media/v4l2-mediabus.h>
+/**
+ * enum soc_mbus_packing - data packing types on the media-bus
+ * @SOC_MBUS_PACKING_NONE:      no packing, bit-for-bit transfer to RAM
+ * @SOC_MBUS_PACKING_2X8_PADHI: 16 bits transferred in 2 8-bit samples, in the
+ *                              possibly incomplete byte high bits are padding
+ * @SOC_MBUS_PACKING_2X8_PADLO: as above, but low bits are padding
+ * @SOC_MBUS_PACKING_EXTEND16:  sample width (e.g., 10 bits) has to be extended
+ *                              to 16 bits
+ */
+enum soc_mbus_packing {
+        SOC_MBUS_PACKING_NONE,
+        SOC_MBUS_PACKING_2X8_PADHI,
+        SOC_MBUS_PACKING_2X8_PADLO,
+        SOC_MBUS_PACKING_EXTEND16,
+};
+/**
+ * enum soc_mbus_order - sample order on the media bus
+ * @SOC_MBUS_ORDER_LE:          least significant sample first
+ * @SOC_MBUS_ORDER_BE:          most significant sample first
+ */
+enum soc_mbus_order {
+        SOC_MBUS_ORDER_LE,
+        SOC_MBUS_ORDER_BE,
+};
+/**
+ * struct soc_mbus_pixelfmt - Data format on the media bus
+ * @name:               Name of the format
+ * @fourcc:             Fourcc code, that will be obtained if the data is
+ *                      stored in memory in the following way:
+ * @packing:            Type of sample-packing, that has to be used
+ * @order:              Sample order when storing in memory
+ * @bits_per_sample:    How many bits the bridge has to sample
+ */
+struct soc_mbus_pixelfmt {
+        const char              *name;
+        u32                     fourcc;
+        enum soc_mbus_packing   packing;
+        enum soc_mbus_order     order;
+        u8                      bits_per_sample;
+};
+const struct soc_mbus_pixelfmt *soc_mbus_get_fmtdesc(
+        enum v4l2_mbus_pixelcode code);
+s32 soc_mbus_bytes_per_line(u32 width, const struct soc_mbus_pixelfmt *mf);
+#endif
diff --git a/include/media/tw9910.h b/include/media/tw9910.h
index 73231e7880d8..5e2895a05e6b 100644
--- a/include/media/tw9910.h
+++ b/include/media/tw9910.h
@@ -32,7 +32,6 @@ enum tw9910_mpout_pin {
 struct tw9910_video_info {
        unsigned long          buswidth;
        enum tw9910_mpout_pin  mpout;
-        struct soc_camera_link link;
 };
diff --git a/include/media/v4l2-chip-ident.h b/include/media/v4l2-chip-ident.h
index 91942dbe64e3..6cc107d198a0 100644
--- a/include/media/v4l2-chip-ident.h
+++ b/include/media/v4l2-chip-ident.h
@@ -267,6 +267,8 @@ enum {
        V4L2_IDENT_MT9V022IX7ATC        = 45010, /* No way to detect "normal" I77ATx */
        V4L2_IDENT_MT9V022IX7ATM        = 45015, /* and "lead free" IA7ATx chips */
        V4L2_IDENT_MT9T031              = 45020,
+        V4L2_IDENT_MT9T111              = 45021,
+        V4L2_IDENT_MT9T112              = 45022,
        V4L2_IDENT_MT9V111              = 45031,
        V4L2_IDENT_MT9V112              = 45032,
diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h
index 1c25b10da34b..1c7b259f341c 100644
--- a/include/media/v4l2-common.h
+++ b/include/media/v4l2-common.h
@@ -212,5 +212,5 @@ void v4l_bound_align_image(unsigned int *w, unsigned int wmin,
                           unsigned int *h, unsigned int hmin,
                           unsigned int hmax, unsigned int halign,
                           unsigned int salign);
+int v4l_fill_dv_preset_info(u32 preset, struct v4l2_dv_enum_preset *info);
 #endif /* V4L2_COMMON_H_ */
diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h
index 73c9867d744c..2dee93892ea2 100644
--- a/include/media/v4l2-dev.h
+++ b/include/media/v4l2-dev.h
@@ -28,10 +28,10 @@ struct v4l2_ioctl_callbacks;
 struct video_device;
 struct v4l2_device;
-/* Flag to mark the video_device struct as unregistered.
+/* Flag to mark the video_device struct as registered.
-   Drivers can set this flag if they want to block all future
+   Drivers can clear this flag if they want to block all future
-   device access. It is set by video_unregister_device. */
+   device access. It is cleared by video_unregister_device. */
-#define V4L2_FL_UNREGISTERED    (0)
+#define V4L2_FL_REGISTERED      (0)
 struct v4l2_file_operations {
        struct module *owner;
@@ -96,9 +96,7 @@ struct video_device
 /* Register video devices. Note that if video_register_device fails,
   the release() callback of the video_device structure is *not* called, so
   the caller is responsible for freeing any data. Usually that means that
-   you call video_device_release() on failure.
+   you call video_device_release() on failure. */
-   Also note that vdev->minor is set to -1 if the registration failed. */
 int __must_check video_register_device(struct video_device *vdev, int type, int nr);
 /* Same as video_register_device, but no warning is issued if the desired
@@ -106,7 +104,7 @@ int __must_check video_register_device(struct video_device *vdev, int type, int
 int __must_check video_register_device_no_warn(struct video_device *vdev, int type, int nr);
 /* Unregister video devices. Will do nothing if vdev == NULL or
-   vdev->minor < 0. */
+   video_is_registered() returns false. */
 void video_unregister_device(struct video_device *vdev);
 /* helper functions to alloc/release struct video_device, the
@@ -141,9 +139,14 @@ static inline void *video_drvdata(struct file *file)
        return video_get_drvdata(video_devdata(file));
 }
-static inline int video_is_unregistered(struct video_device *vdev)
+static inline const char *video_device_node_name(struct video_device *vdev)
+{
+        return dev_name(&vdev->dev);
+}
+static inline int video_is_registered(struct video_device *vdev)
 {
-        return test_bit(V4L2_FL_UNREGISTERED, &vdev->flags);
+        return test_bit(V4L2_FL_REGISTERED, &vdev->flags);
 }
 #endif /* _V4L2_DEV_H */
diff --git a/include/media/v4l2-ioctl.h b/include/media/v4l2-ioctl.h
index 7a4529defa88..e8ba0f2efbae 100644
--- a/include/media/v4l2-ioctl.h
+++ b/include/media/v4l2-ioctl.h
@@ -239,6 +239,21 @@ struct v4l2_ioctl_ops {
        int (*vidioc_enum_frameintervals) (struct file *file, void *fh,
                                           struct v4l2_frmivalenum *fival);
+        /* DV Timings IOCTLs */
+        int (*vidioc_enum_dv_presets) (struct file *file, void *fh,
+                                       struct v4l2_dv_enum_preset *preset);
+        int (*vidioc_s_dv_preset) (struct file *file, void *fh,
+                                   struct v4l2_dv_preset *preset);
+        int (*vidioc_g_dv_preset) (struct file *file, void *fh,
+                                   struct v4l2_dv_preset *preset);
+        int (*vidioc_query_dv_preset) (struct file *file, void *fh,
+                                        struct v4l2_dv_preset *qpreset);
+        int (*vidioc_s_dv_timings) (struct file *file, void *fh,
+                                    struct v4l2_dv_timings *timings);
+        int (*vidioc_g_dv_timings) (struct file *file, void *fh,
+                                    struct v4l2_dv_timings *timings);
        /* For other private ioctls */
        long (*vidioc_default)         (struct file *file, void *fh,
                                        int cmd, void *arg);
diff --git a/include/media/v4l2-mediabus.h b/include/media/v4l2-mediabus.h
new file mode 100644
index 000000000000..0dbe02ada259
--- /dev/null
+++ b/include/media/v4l2-mediabus.h
@@ -0,0 +1,61 @@
+/*
+ * Media Bus API header
+ *
+ * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef V4L2_MEDIABUS_H
+#define V4L2_MEDIABUS_H
+/*
+ * These pixel codes uniquely identify data formats on the media bus. Mostly
+ * they correspond to similarly named V4L2_PIX_FMT_* formats, format 0 is
+ * reserved, V4L2_MBUS_FMT_FIXED shall be used by host-client pairs, where the
+ * data format is fixed. Additionally, "2X8" means that one pixel is transferred
+ * in two 8-bit samples, "BE" or "LE" specify in which order those samples are
+ * transferred over the bus: "LE" means that the least significant bits are
+ * transferred first, "BE" means that the most significant bits are transferred
+ * first, and "PADHI" and "PADLO" define which bits - low or high, in the
+ * incomplete high byte, are filled with padding bits.
+ */
+enum v4l2_mbus_pixelcode {
+        V4L2_MBUS_FMT_FIXED = 1,
+        V4L2_MBUS_FMT_YUYV8_2X8_LE,
+        V4L2_MBUS_FMT_YVYU8_2X8_LE,
+        V4L2_MBUS_FMT_YUYV8_2X8_BE,
+        V4L2_MBUS_FMT_YVYU8_2X8_BE,
+        V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE,
+        V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE,
+        V4L2_MBUS_FMT_RGB565_2X8_LE,
+        V4L2_MBUS_FMT_RGB565_2X8_BE,
+        V4L2_MBUS_FMT_SBGGR8_1X8,
+        V4L2_MBUS_FMT_SBGGR10_1X10,
+        V4L2_MBUS_FMT_GREY8_1X8,
+        V4L2_MBUS_FMT_Y10_1X10,
+        V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE,
+        V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE,
+        V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE,
+        V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE,
+};
+/**
+ * struct v4l2_mbus_framefmt - frame format on the media bus
+ * @width:      frame width
+ * @height:     frame height
+ * @code:       data format code
+ * @field:      used interlacing type
+ * @colorspace: colorspace of the data
+ */
+struct v4l2_mbus_framefmt {
+        __u32                           width;
+        __u32                           height;
+        enum v4l2_mbus_pixelcode        code;
+        enum v4l2_field                 field;
+        enum v4l2_colorspace            colorspace;
+};
+#endif
diff --git a/include/media/v4l2-subdev.h b/include/media/v4l2-subdev.h
index 00bf17608453..9ba99cd39ee7 100644
--- a/include/media/v4l2-subdev.h
+++ b/include/media/v4l2-subdev.h
@@ -22,6 +22,7 @@
 #define _V4L2_SUBDEV_H
 #include <media/v4l2-common.h>
+#include <media/v4l2-mediabus.h>
 /* generic v4l2_device notify callback notification values */
 #define V4L2_SUBDEV_IR_RX_NOTIFY                _IOW('v', 0, u32)
@@ -207,7 +208,7 @@ struct v4l2_subdev_audio_ops {
   s_std_output: set v4l2_std_id for video OUTPUT devices. This is ignored by
        video input devices.
-  s_crystal_freq: sets the frequency of the crystal used to generate the
+   s_crystal_freq: sets the frequency of the crystal used to generate the
        clocks in Hz. An extra flags field allows device specific configuration
        regarding clock frequency dividers, etc. If not used, then set flags
        to 0. If the frequency is not supported, then -EINVAL is returned.
@@ -217,6 +218,26 @@ struct v4l2_subdev_audio_ops {
   s_routing: see s_routing in audio_ops, except this version is for video
        devices.
+   s_dv_preset: set dv (Digital Video) preset in the sub device. Similar to
+        s_std()
+   query_dv_preset: query dv preset in the sub device. This is similar to
+        querystd()
+   s_dv_timings(): Set custom dv timings in the sub device. This is used
+        when sub device is capable of setting detailed timing information
+        in the hardware to generate/detect the video signal.
+   g_dv_timings(): Get custom dv timings in the sub device.
+   enum_mbus_fmt: enumerate pixel formats, provided by a video data source
+   g_mbus_fmt: get the current pixel format, provided by a video data source
+   try_mbus_fmt: try to set a pixel format on a video data source
+   s_mbus_fmt: set a pixel format on a video data source
 */
 struct v4l2_subdev_video_ops {
        int (*s_routing)(struct v4l2_subdev *sd, u32 input, u32 output, u32 config);
@@ -240,6 +261,33 @@ struct v4l2_subdev_video_ops {
        int (*s_parm)(struct v4l2_subdev *sd, struct v4l2_streamparm *param);
        int (*enum_framesizes)(struct v4l2_subdev *sd, struct v4l2_frmsizeenum *fsize);
        int (*enum_frameintervals)(struct v4l2_subdev *sd, struct v4l2_frmivalenum *fival);
+        int (*s_dv_preset)(struct v4l2_subdev *sd,
+                        struct v4l2_dv_preset *preset);
+        int (*query_dv_preset)(struct v4l2_subdev *sd,
+                        struct v4l2_dv_preset *preset);
+        int (*s_dv_timings)(struct v4l2_subdev *sd,
+                        struct v4l2_dv_timings *timings);
+        int (*g_dv_timings)(struct v4l2_subdev *sd,
+                        struct v4l2_dv_timings *timings);
+        int (*enum_mbus_fmt)(struct v4l2_subdev *sd, int index,
+                             enum v4l2_mbus_pixelcode *code);
+        int (*g_mbus_fmt)(struct v4l2_subdev *sd,
+                          struct v4l2_mbus_framefmt *fmt);
+        int (*try_mbus_fmt)(struct v4l2_subdev *sd,
+                            struct v4l2_mbus_framefmt *fmt);
+        int (*s_mbus_fmt)(struct v4l2_subdev *sd,
+                          struct v4l2_mbus_framefmt *fmt);
+};
+/**
+ * struct v4l2_subdev_sensor_ops - v4l2-subdev sensor operations
+ * @g_skip_top_lines: number of lines at the top of the image to be skipped.
+ *                    This is needed for some sensors, which always corrupt
+ *                    several top lines of the output image, or which send their
+ *                    metadata in them.
+ */
+struct v4l2_subdev_sensor_ops {
+        int (*g_skip_top_lines)(struct v4l2_subdev *sd, u32 *lines);
 };
 /*
@@ -326,11 +374,12 @@ struct v4l2_subdev_ir_ops {
 };
 struct v4l2_subdev_ops {
-        const struct v4l2_subdev_core_ops  *core;
+        const struct v4l2_subdev_core_ops       *core;
-        const struct v4l2_subdev_tuner_ops *tuner;
+        const struct v4l2_subdev_tuner_ops      *tuner;
-        const struct v4l2_subdev_audio_ops *audio;
+        const struct v4l2_subdev_audio_ops      *audio;
-        const struct v4l2_subdev_video_ops *video;
+        const struct v4l2_subdev_video_ops      *video;
-        const struct v4l2_subdev_ir_ops    *ir;
+        const struct v4l2_subdev_ir_ops         *ir;
+        const struct v4l2_subdev_sensor_ops     *sensor;
 };
 #define V4L2_SUBDEV_NAME_SIZE 32
diff --git a/include/net/dst.h b/include/net/dst.h
index 387cb3cfde7e..39c4a5963e12 100644
--- a/include/net/dst.h
+++ b/include/net/dst.h
@@ -113,7 +113,7 @@ dst_metric(const struct dst_entry *dst, int metric)
 static inline u32
 dst_feature(const struct dst_entry *dst, u32 feature)
 {
-        return (dst ? dst_metric(dst, RTAX_FEATURES) & feature : 0);
+        return dst_metric(dst, RTAX_FEATURES) & feature;
 }
 static inline u32 dst_mtu(const struct dst_entry *dst)
diff --git a/include/net/ip.h b/include/net/ip.h
index e6b9d12d5f62..85108cfbb1ae 100644
--- a/include/net/ip.h
+++ b/include/net/ip.h
@@ -337,6 +337,7 @@ enum ip_defrag_users {
        IP_DEFRAG_CALL_RA_CHAIN,
        IP_DEFRAG_CONNTRACK_IN,
        IP_DEFRAG_CONNTRACK_OUT,
+        IP_DEFRAG_CONNTRACK_BRIDGE_IN,
        IP_DEFRAG_VS_IN,
        IP_DEFRAG_VS_OUT,
        IP_DEFRAG_VS_FWD
diff --git a/include/net/ipv6.h b/include/net/ipv6.h
index 92db8617d188..ccab5946c830 100644
--- a/include/net/ipv6.h
+++ b/include/net/ipv6.h
@@ -350,8 +350,16 @@ static inline int ipv6_prefix_equal(const struct in6_addr *a1,
 struct inet_frag_queue;
+enum ip6_defrag_users {
+        IP6_DEFRAG_LOCAL_DELIVER,
+        IP6_DEFRAG_CONNTRACK_IN,
+        IP6_DEFRAG_CONNTRACK_OUT,
+        IP6_DEFRAG_CONNTRACK_BRIDGE_IN,
+};
 struct ip6_create_arg {
        __be32 id;
+        u32 user;
        struct in6_addr *src;
        struct in6_addr *dst;
 };
diff --git a/include/net/netfilter/ipv6/nf_conntrack_ipv6.h b/include/net/netfilter/ipv6/nf_conntrack_ipv6.h
index abc55ad75c2b..1ee717eb5b09 100644
--- a/include/net/netfilter/ipv6/nf_conntrack_ipv6.h
+++ b/include/net/netfilter/ipv6/nf_conntrack_ipv6.h
@@ -9,7 +9,7 @@ extern struct nf_conntrack_l4proto nf_conntrack_l4proto_icmpv6;
 extern int nf_ct_frag6_init(void);
 extern void nf_ct_frag6_cleanup(void);
-extern struct sk_buff *nf_ct_frag6_gather(struct sk_buff *skb);
+extern struct sk_buff *nf_ct_frag6_gather(struct sk_buff *skb, u32 user);
 extern void nf_ct_frag6_output(unsigned int hooknum, struct sk_buff *skb,
                               struct net_device *in,
                               struct net_device *out,
diff --git a/include/net/tcp.h b/include/net/tcp.h
index 1b6f7d348cee..34f5cc24d903 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -408,8 +408,7 @@ extern int			tcp_recvmsg(struct kiocb *iocb, struct sock *sk,
 extern void                     tcp_parse_options(struct sk_buff *skb,
                                                  struct tcp_options_received *opt_rx,
                                                  u8 **hvpp,
-                                                  int estab,
+                                                  int estab);
-                                                  struct dst_entry *dst);
 extern u8                       *tcp_parse_md5sig_option(struct tcphdr *th);
diff --git a/include/rdma/ib_addr.h b/include/rdma/ib_addr.h
index 483057b2f4b4..fa0d52b8e622 100644
--- a/include/rdma/ib_addr.h
+++ b/include/rdma/ib_addr.h
@@ -36,6 +36,7 @@
 #include <linux/in.h>
 #include <linux/in6.h>
+#include <linux/if_arp.h>
 #include <linux/netdevice.h>
 #include <linux/socket.h>
 #include <rdma/ib_verbs.h>
@@ -60,8 +61,8 @@ struct rdma_dev_addr {
        unsigned char src_dev_addr[MAX_ADDR_LEN];
        unsigned char dst_dev_addr[MAX_ADDR_LEN];
        unsigned char broadcast[MAX_ADDR_LEN];
-        enum rdma_node_type dev_type;
+        unsigned short dev_type;
-        struct net_device *src_dev;
+        int bound_dev_if;
 };
 /**
@@ -121,40 +122,29 @@ static inline void ib_addr_get_mgid(struct rdma_dev_addr *dev_addr,
        memcpy(gid, dev_addr->broadcast + 4, sizeof *gid);
 }
-static inline void ib_addr_get_sgid(struct rdma_dev_addr *dev_addr,
+static inline int rdma_addr_gid_offset(struct rdma_dev_addr *dev_addr)
-                                    union ib_gid *gid)
 {
-        memcpy(gid, dev_addr->src_dev_addr + 4, sizeof *gid);
+        return dev_addr->dev_type == ARPHRD_INFINIBAND ? 4 : 0;
 }
-static inline void ib_addr_set_sgid(struct rdma_dev_addr *dev_addr,
+static inline void rdma_addr_get_sgid(struct rdma_dev_addr *dev_addr, union ib_gid *gid)
-                                    union ib_gid *gid)
 {
-        memcpy(dev_addr->src_dev_addr + 4, gid, sizeof *gid);
+        memcpy(gid, dev_addr->src_dev_addr + rdma_addr_gid_offset(dev_addr), sizeof *gid);
 }
-static inline void ib_addr_get_dgid(struct rdma_dev_addr *dev_addr,
+static inline void rdma_addr_set_sgid(struct rdma_dev_addr *dev_addr, union ib_gid *gid)
-                                    union ib_gid *gid)
 {
-        memcpy(gid, dev_addr->dst_dev_addr + 4, sizeof *gid);
+        memcpy(dev_addr->src_dev_addr + rdma_addr_gid_offset(dev_addr), gid, sizeof *gid);
 }
-static inline void ib_addr_set_dgid(struct rdma_dev_addr *dev_addr,
+static inline void rdma_addr_get_dgid(struct rdma_dev_addr *dev_addr, union ib_gid *gid)
-                                    union ib_gid *gid)
 {
-        memcpy(dev_addr->dst_dev_addr + 4, gid, sizeof *gid);
+        memcpy(gid, dev_addr->dst_dev_addr + rdma_addr_gid_offset(dev_addr), sizeof *gid);
 }
-static inline void iw_addr_get_sgid(struct rdma_dev_addr *dev_addr,
+static inline void rdma_addr_set_dgid(struct rdma_dev_addr *dev_addr, union ib_gid *gid)
-                                    union ib_gid *gid)
-{
-        memcpy(gid, dev_addr->src_dev_addr, sizeof *gid);
-}
-static inline void iw_addr_get_dgid(struct rdma_dev_addr *dev_addr,
-                                    union ib_gid *gid)
 {
-        memcpy(gid, dev_addr->dst_dev_addr, sizeof *gid);
+        memcpy(dev_addr->dst_dev_addr + rdma_addr_gid_offset(dev_addr), gid, sizeof *gid);
 }
 #endif /* IB_ADDR_H */
diff --git a/include/rdma/ib_sa.h b/include/rdma/ib_sa.h
index 3841c1aff692..1082afaed158 100644
--- a/include/rdma/ib_sa.h
+++ b/include/rdma/ib_sa.h
@@ -379,4 +379,10 @@ int ib_init_ah_from_path(struct ib_device *device, u8 port_num,
                         struct ib_sa_path_rec *rec,
                         struct ib_ah_attr *ah_attr);
+/**
+ * ib_sa_unpack_path - Convert a path record from MAD format to struct
+ * ib_sa_path_rec.
+ */
+void ib_sa_unpack_path(void *attribute, struct ib_sa_path_rec *rec);
 #endif /* IB_SA_H */
diff --git a/include/rdma/ib_user_sa.h b/include/rdma/ib_user_sa.h
index 659120157e14..cfc7c9ba781e 100644
--- a/include/rdma/ib_user_sa.h
+++ b/include/rdma/ib_user_sa.h
@@ -35,6 +35,22 @@
 #include <linux/types.h>
+enum {
+        IB_PATH_GMP             = 1,
+        IB_PATH_PRIMARY         = (1<<1),
+        IB_PATH_ALTERNATE       = (1<<2),
+        IB_PATH_OUTBOUND        = (1<<3),
+        IB_PATH_INBOUND         = (1<<4),
+        IB_PATH_INBOUND_REVERSE = (1<<5),
+        IB_PATH_BIDIRECTIONAL   = IB_PATH_OUTBOUND | IB_PATH_INBOUND_REVERSE
+};
+struct ib_path_rec_data {
+        __u32   flags;
+        __u32   reserved;
+        __u32   path_rec[16];
+};
 struct ib_user_path_rec {
        __u8    dgid[16];
        __u8    sgid[16];
diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h
index c179318edd92..09509edb1c5f 100644
--- a/include/rdma/ib_verbs.h
+++ b/include/rdma/ib_verbs.h
@@ -1425,6 +1425,11 @@ int ib_destroy_qp(struct ib_qp *qp);
 * @send_wr: A list of work requests to post on the send queue.
 * @bad_send_wr: On an immediate failure, this parameter will reference
 *   the work request that failed to be posted on the QP.
+ *
+ * While IBA Vol. 1 section 11.4.1.1 specifies that if an immediate
+ * error is returned, the QP state shall not be affected,
+ * ib_post_send() will return an immediate error after queueing any
+ * earlier work requests in the list.
 */
 static inline int ib_post_send(struct ib_qp *qp,
                               struct ib_send_wr *send_wr,
diff --git a/include/rdma/rdma_user_cm.h b/include/rdma/rdma_user_cm.h
index c55705460b87..1d165022c02d 100644
--- a/include/rdma/rdma_user_cm.h
+++ b/include/rdma/rdma_user_cm.h
@@ -215,12 +215,14 @@ struct rdma_ucm_event_resp {
 /* Option levels */
 enum {
-        RDMA_OPTION_ID          = 0
+        RDMA_OPTION_ID          = 0,
+        RDMA_OPTION_IB          = 1
 };
 /* Option details */
 enum {
-        RDMA_OPTION_ID_TOS      = 0
+        RDMA_OPTION_ID_TOS      = 0,
+        RDMA_OPTION_IB_PATH     = 1
 };
 struct rdma_ucm_set_option {
diff --git a/include/trace/ftrace.h b/include/trace/ftrace.h
index d1b3de9c1a71..73523151a731 100644
--- a/include/trace/ftrace.h
+++ b/include/trace/ftrace.h
@@ -436,10 +436,6 @@ ftrace_define_fields_##call(struct ftrace_event_call *event_call)	\
        struct ftrace_raw_##call field;                                 \
        int ret;                                                        \
                                                                        \
-        ret = trace_define_common_fields(event_call);                   \
-        if (ret)                                                        \
-                return ret;                                             \
-                                                                        \
        tstruct;                                                        \
                                                                        \
        return ret;                                                     \
@@ -559,13 +555,7 @@ static void ftrace_profile_disable_##name(struct ftrace_event_call *unused)\
 *
 * static int ftrace_reg_event_<call>(struct ftrace_event_call *unused)
 * {
- *      int ret;
+ *      return register_trace_<call>(ftrace_event_<call>);
- *
- *      ret = register_trace_<call>(ftrace_event_<call>);
- *      if (!ret)
- *              pr_info("event trace: Could not activate trace point "
- *                      "probe to  <call>");
- *      return ret;
 * }
 *
 * static void ftrace_unreg_event_<call>(struct ftrace_event_call *unused)
@@ -623,23 +613,12 @@ static void ftrace_profile_disable_##name(struct ftrace_event_call *unused)\
 *      .trace                  = ftrace_raw_output_<call>, <-- stage 2
 * };
 *
- * static int ftrace_raw_init_event_<call>(struct ftrace_event_call *unused)
- * {
- *      int id;
- *
- *      id = register_ftrace_event(&ftrace_event_type_<call>);
- *      if (!id)
- *              return -ENODEV;
- *      event_<call>.id = id;
- *      return 0;
- * }
- *
 * static struct ftrace_event_call __used
 * __attribute__((__aligned__(4)))
 * __attribute__((section("_ftrace_events"))) event_<call> = {
 *      .name                   = "<call>",
 *      .system                 = "<system>",
- *      .raw_init               = ftrace_raw_init_event_<call>,
+ *      .raw_init               = trace_event_raw_init,
 *      .regfunc                = ftrace_reg_event_<call>,
 *      .unregfunc              = ftrace_unreg_event_<call>,
 *      .show_format            = ftrace_format_<call>,
@@ -647,13 +626,9 @@ static void ftrace_profile_disable_##name(struct ftrace_event_call *unused)\
 *
 */
-#undef TP_FMT
-#define TP_FMT(fmt, args...)    fmt "\n", ##args
 #ifdef CONFIG_EVENT_PROFILE
 #define _TRACE_PROFILE_INIT(call)                                       \
-        .profile_count = ATOMIC_INIT(-1),                               \
        .profile_enable = ftrace_profile_enable_##call,                 \
        .profile_disable = ftrace_profile_disable_##call,
@@ -728,13 +703,7 @@ static void ftrace_raw_event_##call(proto)				\
                                                                        \
 static int ftrace_raw_reg_event_##call(struct ftrace_event_call *unused)\
 {                                                                       \
-        int ret;                                                        \
+        return register_trace_##call(ftrace_raw_event_##call);          \
-                                                                        \
-        ret = register_trace_##call(ftrace_raw_event_##call);           \
-        if (ret)                                                        \
-                pr_info("event trace: Could not activate trace point "  \
-                        "probe to " #call "\n");                        \
-        return ret;                                                     \
 }                                                                       \
                                                                        \
 static void ftrace_raw_unreg_event_##call(struct ftrace_event_call *unused)\
@@ -744,19 +713,7 @@ static void ftrace_raw_unreg_event_##call(struct ftrace_event_call *unused)\
                                                                        \
 static struct trace_event ftrace_event_type_##call = {                  \
        .trace                  = ftrace_raw_output_##call,             \
-};                                                                      \
+};
-                                                                        \
-static int ftrace_raw_init_event_##call(struct ftrace_event_call *unused)\
-{                                                                       \
-        int id;                                                         \
-                                                                        \
-        id = register_ftrace_event(&ftrace_event_type_##call);          \
-        if (!id)                                                        \
-                return -ENODEV;                                         \
-        event_##call.id = id;                                           \
-        INIT_LIST_HEAD(&event_##call.fields);                           \
-        return 0;                                                       \
-}
 #undef DEFINE_EVENT_PRINT
 #define DEFINE_EVENT_PRINT(template, name, proto, args, print)  \
@@ -776,7 +733,7 @@ __attribute__((section("_ftrace_events"))) event_##call = {		\
        .name                   = #call,                                \
        .system                 = __stringify(TRACE_SYSTEM),            \
        .event                  = &ftrace_event_type_##call,            \
-        .raw_init               = ftrace_raw_init_event_##call,         \
+        .raw_init               = trace_event_raw_init,                 \
        .regfunc                = ftrace_raw_reg_event_##call,          \
        .unregfunc              = ftrace_raw_unreg_event_##call,        \
        .show_format            = ftrace_format_##template,             \
@@ -793,7 +750,7 @@ __attribute__((section("_ftrace_events"))) event_##call = {		\
        .name                   = #call,                                \
        .system                 = __stringify(TRACE_SYSTEM),            \
        .event                  = &ftrace_event_type_##call,            \
-        .raw_init               = ftrace_raw_init_event_##call,         \
+        .raw_init               = trace_event_raw_init,                 \
        .regfunc                = ftrace_raw_reg_event_##call,          \
        .unregfunc              = ftrace_raw_unreg_event_##call,        \
        .show_format            = ftrace_format_##call,                 \
@@ -953,7 +910,6 @@ end:									\
        perf_swevent_put_recursion_context(rctx);                       \
 end_recursion:                                                          \
        local_irq_restore(irq_flags);                                   \
-                                                                        \
 }
 #undef DEFINE_EVENT
diff --git a/include/video/da8xx-fb.h b/include/video/da8xx-fb.h
index c051a50ed528..89d43b3d4cb9 100644
--- a/include/video/da8xx-fb.h
+++ b/include/video/da8xx-fb.h
@@ -38,6 +38,7 @@ struct da8xx_lcdc_platform_data {
        const char manu_name[10];
        void *controller_data;
        const char type[25];
+        void (*panel_power_ctrl)(int);
 };
 struct lcd_ctrl_config {
diff --git a/include/video/sh_mobile_lcdc.h b/include/video/sh_mobile_lcdc.h
index 25144ab22b95..288205457713 100644
--- a/include/video/sh_mobile_lcdc.h
+++ b/include/video/sh_mobile_lcdc.h
@@ -50,6 +50,8 @@ struct sh_mobile_lcdc_board_cfg {
        void *board_data;
        int (*setup_sys)(void *board_data, void *sys_ops_handle,
                         struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
+        void (*start_transfer)(void *board_data, void *sys_ops_handle,
+                               struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
        void (*display_on)(void *board_data);
        void (*display_off)(void *board_data);
 };
diff --git a/ipc/msg.c b/ipc/msg.c
index 085bd58f2f07..af42ef8900a6 100644
--- a/ipc/msg.c
+++ b/ipc/msg.c
@@ -125,6 +125,7 @@ void msg_init_ns(struct ipc_namespace *ns)
 void msg_exit_ns(struct ipc_namespace *ns)
 {
        free_ipcs(ns, &msg_ids(ns), freeque);
+        idr_destroy(&ns->ids[IPC_MSG_IDS].ipcs_idr);
 }
 #endif
diff --git a/ipc/sem.c b/ipc/sem.c
index 87c2b641fd7b..dbef95b15941 100644
--- a/ipc/sem.c
+++ b/ipc/sem.c
@@ -129,6 +129,7 @@ void sem_init_ns(struct ipc_namespace *ns)
 void sem_exit_ns(struct ipc_namespace *ns)
 {
        free_ipcs(ns, &sem_ids(ns), freeary);
+        idr_destroy(&ns->ids[IPC_SEM_IDS].ipcs_idr);
 }
 #endif
@@ -240,6 +241,7 @@ static int newary(struct ipc_namespace *ns, struct ipc_params *params)
        key_t key = params->key;
        int nsems = params->u.nsems;
        int semflg = params->flg;
+        int i;
        if (!nsems)
                return -EINVAL;
@@ -272,6 +274,11 @@ static int newary(struct ipc_namespace *ns, struct ipc_params *params)
        ns->used_sems += nsems;
        sma->sem_base = (struct sem *) &sma[1];
+        for (i = 0; i < nsems; i++)
+                INIT_LIST_HEAD(&sma->sem_base[i].sem_pending);
+        sma->complex_count = 0;
        INIT_LIST_HEAD(&sma->sem_pending);
        INIT_LIST_HEAD(&sma->list_id);
        sma->sem_nsems = nsems;
@@ -397,63 +404,109 @@ undo:
        return result;
 }
-/* Go through the pending queue for the indicated semaphore
+/*
- * looking for tasks that can be completed.
+ * Wake up a process waiting on the sem queue with a given error.
+ * The queue is invalid (may not be accessed) after the function returns.
 */
-static void update_queue (struct sem_array * sma)
+static void wake_up_sem_queue(struct sem_queue *q, int error)
 {
-        int error;
+        /*
-        struct sem_queue * q;
+         * Hold preempt off so that we don't get preempted and have the
+         * wakee busy-wait until we're scheduled back on. We're holding
+         * locks here so it may not strictly be needed, however if the
+         * locks become preemptible then this prevents such a problem.
+         */
+        preempt_disable();
+        q->status = IN_WAKEUP;
+        wake_up_process(q->sleeper);
+        /* hands-off: q can disappear immediately after writing q->status. */
+        smp_wmb();
+        q->status = error;
+        preempt_enable();
+}
+static void unlink_queue(struct sem_array *sma, struct sem_queue *q)
+{
+        list_del(&q->list);
+        if (q->nsops == 1)
+                list_del(&q->simple_list);
+        else
+                sma->complex_count--;
+}
+/**
+ * update_queue(sma, semnum): Look for tasks that can be completed.
+ * @sma: semaphore array.
+ * @semnum: semaphore that was modified.
+ *
+ * update_queue must be called after a semaphore in a semaphore array
+ * was modified. If multiple semaphore were modified, then @semnum
+ * must be set to -1.
+ */
+static void update_queue(struct sem_array *sma, int semnum)
+{
+        struct sem_queue *q;
+        struct list_head *walk;
+        struct list_head *pending_list;
+        int offset;
+        /* if there are complex operations around, then knowing the semaphore
+         * that was modified doesn't help us. Assume that multiple semaphores
+         * were modified.
+         */
+        if (sma->complex_count)
+                semnum = -1;
+        if (semnum == -1) {
+                pending_list = &sma->sem_pending;
+                offset = offsetof(struct sem_queue, list);
+        } else {
+                pending_list = &sma->sem_base[semnum].sem_pending;
+                offset = offsetof(struct sem_queue, simple_list);
+        }
+again:
+        walk = pending_list->next;
+        while (walk != pending_list) {
+                int error, alter;
+                q = (struct sem_queue *)((char *)walk - offset);
+                walk = walk->next;
+                /* If we are scanning the single sop, per-semaphore list of
+                 * one semaphore and that semaphore is 0, then it is not
+                 * necessary to scan the "alter" entries: simple increments
+                 * that affect only one entry succeed immediately and cannot
+                 * be in the  per semaphore pending queue, and decrements
+                 * cannot be successful if the value is already 0.
+                 */
+                if (semnum != -1 && sma->sem_base[semnum].semval == 0 &&
+                                q->alter)
+                        break;
-        q = list_entry(sma->sem_pending.next, struct sem_queue, list);
-        while (&q->list != &sma->sem_pending) {
                error = try_atomic_semop(sma, q->sops, q->nsops,
                                         q->undo, q->pid);
                /* Does q->sleeper still need to sleep? */
-                if (error <= 0) {
+                if (error > 0)
-                        struct sem_queue *n;
+                        continue;
-                        /*
-                         * Continue scanning. The next operation
-                         * that must be checked depends on the type of the
-                         * completed operation:
-                         * - if the operation modified the array, then
-                         *   restart from the head of the queue and
-                         *   check for threads that might be waiting
-                         *   for semaphore values to become 0.
-                         * - if the operation didn't modify the array,
-                         *   then just continue.
-                         * The order of list_del() and reading ->next
-                         * is crucial: In the former case, the list_del()
-                         * must be done first [because we might be the
-                         * first entry in ->sem_pending], in the latter
-                         * case the list_del() must be done last
-                         * [because the list is invalid after the list_del()]
-                         */
-                        if (q->alter) {
-                                list_del(&q->list);
-                                n = list_entry(sma->sem_pending.next,
-                                                struct sem_queue, list);
-                        } else {
-                                n = list_entry(q->list.next, struct sem_queue,
-                                                list);
-                                list_del(&q->list);
-                        }
-                        /* wake up the waiting thread */
-                        q->status = IN_WAKEUP;
-                        wake_up_process(q->sleeper);
+                unlink_queue(sma, q);
-                        /* hands-off: q will disappear immediately after
-                         * writing q->status.
+                /*
-                         */
+                 * The next operation that must be checked depends on the type
-                        smp_wmb();
+                 * of the completed operation:
-                        q->status = error;
+                 * - if the operation modified the array, then restart from the
-                        q = n;
+                 *   head of the queue and check for threads that might be
-                } else {
+                 *   waiting for the new semaphore values.
-                        q = list_entry(q->list.next, struct sem_queue, list);
+                 * - if the operation didn't modify the array, then just
-                }
+                 *   continue.
+                 */
+                alter = q->alter;
+                wake_up_sem_queue(q, error);
+                if (alter && !error)
+                        goto again;
        }
 }
@@ -533,12 +586,8 @@ static void freeary(struct ipc_namespace *ns, struct kern_ipc_perm *ipcp)
        /* Wake up all pending processes and let them fail with EIDRM. */
        list_for_each_entry_safe(q, tq, &sma->sem_pending, list) {
-                list_del(&q->list);
+                unlink_queue(sma, q);
+                wake_up_sem_queue(q, -EIDRM);
-                q->status = IN_WAKEUP;
-                wake_up_process(q->sleeper); /* doesn't sleep */
-                smp_wmb();
-                q->status = -EIDRM;     /* hands-off q */
        }
        /* Remove the semaphore set from the IDR */
@@ -575,7 +624,7 @@ static unsigned long copy_semid_to_user(void __user *buf, struct semid64_ds *in,
 static int semctl_nolock(struct ipc_namespace *ns, int semid,
                         int cmd, int version, union semun arg)
 {
-        int err = -EINVAL;
+        int err;
        struct sem_array *sma;
        switch(cmd) {
@@ -652,7 +701,6 @@ static int semctl_nolock(struct ipc_namespace *ns, int semid,
        default:
                return -EINVAL;
        }
-        return err;
 out_unlock:
        sem_unlock(sma);
        return err;
@@ -759,7 +807,7 @@ static int semctl_main(struct ipc_namespace *ns, int semid, int semnum,
                }
                sma->sem_ctime = get_seconds();
                /* maybe some queued-up processes were waiting for this */
-                update_queue(sma);
+                update_queue(sma, -1);
                err = 0;
                goto out_unlock;
        }
@@ -801,7 +849,7 @@ static int semctl_main(struct ipc_namespace *ns, int semid, int semnum,
                curr->sempid = task_tgid_vnr(current);
                sma->sem_ctime = get_seconds();
                /* maybe some queued-up processes were waiting for this */
-                update_queue(sma);
+                update_queue(sma, semnum);
                err = 0;
                goto out_unlock;
        }
@@ -961,17 +1009,31 @@ static inline int get_undo_list(struct sem_undo_list **undo_listp)
        return 0;
 }
-static struct sem_undo *lookup_undo(struct sem_undo_list *ulp, int semid)
+static struct sem_undo *__lookup_undo(struct sem_undo_list *ulp, int semid)
 {
-        struct sem_undo *walk;
+        struct sem_undo *un;
-        list_for_each_entry_rcu(walk, &ulp->list_proc, list_proc) {
+        list_for_each_entry_rcu(un, &ulp->list_proc, list_proc) {
-                if (walk->semid == semid)
+                if (un->semid == semid)
-                        return walk;
+                        return un;
        }
        return NULL;
 }
+static struct sem_undo *lookup_undo(struct sem_undo_list *ulp, int semid)
+{
+        struct sem_undo *un;
+        assert_spin_locked(&ulp->lock);
+        un = __lookup_undo(ulp, semid);
+        if (un) {
+                list_del_rcu(&un->list_proc);
+                list_add_rcu(&un->list_proc, &ulp->list_proc);
+        }
+        return un;
+}
 /**
 * find_alloc_undo - Lookup (and if not present create) undo array
 * @ns: namespace
@@ -1163,7 +1225,8 @@ SYSCALL_DEFINE4(semtimedop, int, semid, struct sembuf __user *, tsops,
        error = try_atomic_semop (sma, sops, nsops, un, task_tgid_vnr(current));
        if (error <= 0) {
                if (alter && error == 0)
-                        update_queue (sma);
+                        update_queue(sma, (nsops == 1) ? sops[0].sem_num : -1);
                goto out_unlock_free;
        }
@@ -1181,6 +1244,19 @@ SYSCALL_DEFINE4(semtimedop, int, semid, struct sembuf __user *, tsops,
        else
                list_add(&queue.list, &sma->sem_pending);
+        if (nsops == 1) {
+                struct sem *curr;
+                curr = &sma->sem_base[sops->sem_num];
+                if (alter)
+                        list_add_tail(&queue.simple_list, &curr->sem_pending);
+                else
+                        list_add(&queue.simple_list, &curr->sem_pending);
+        } else {
+                INIT_LIST_HEAD(&queue.simple_list);
+                sma->complex_count++;
+        }
        queue.status = -EINTR;
        queue.sleeper = current;
        current->state = TASK_INTERRUPTIBLE;
@@ -1222,7 +1298,7 @@ SYSCALL_DEFINE4(semtimedop, int, semid, struct sembuf __user *, tsops,
         */
        if (timeout && jiffies_left == 0)
                error = -EAGAIN;
-        list_del(&queue.list);
+        unlink_queue(sma, &queue);
 out_unlock_free:
        sem_unlock(sma);
@@ -1307,7 +1383,7 @@ void exit_sem(struct task_struct *tsk)
                if (IS_ERR(sma))
                        continue;
-                un = lookup_undo(ulp, semid);
+                un = __lookup_undo(ulp, semid);
                if (un == NULL) {
                        /* exit_sem raced with IPC_RMID+semget() that created
                         * exactly the same semid. Nothing to do.
@@ -1351,7 +1427,7 @@ void exit_sem(struct task_struct *tsk)
                }
                sma->sem_otime = get_seconds();
                /* maybe some queued-up processes were waiting for this */
-                update_queue(sma);
+                update_queue(sma, -1);
                sem_unlock(sma);
                call_rcu(&un->rcu, free_un);
@@ -1365,7 +1441,7 @@ static int sysvipc_sem_proc_show(struct seq_file *s, void *it)
        struct sem_array *sma = it;
        return seq_printf(s,
-                          "%10d %10d  %4o %10lu %5u %5u %5u %5u %10lu %10lu\n",
+                          "%10d %10d  %4o %10u %5u %5u %5u %5u %10lu %10lu\n",
                          sma->sem_perm.key,
                          sma->sem_perm.id,
                          sma->sem_perm.mode,
diff --git a/ipc/shm.c b/ipc/shm.c
index 02620fae8e1f..92fe9236258b 100644
--- a/ipc/shm.c
+++ b/ipc/shm.c
@@ -100,6 +100,7 @@ static void do_shm_rmid(struct ipc_namespace *ns, struct kern_ipc_perm *ipcp)
 void shm_exit_ns(struct ipc_namespace *ns)
 {
        free_ipcs(ns, &shm_ids(ns), do_shm_rmid);
+        idr_destroy(&ns->ids[IPC_SHM_IDS].ipcs_idr);
 }
 #endif
diff --git a/kernel/fork.c b/kernel/fork.c
index 9bd91447e052..202a0ba63d3c 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -1127,6 +1127,10 @@ static struct task_struct *copy_process(unsigned long clone_flags,
 #ifdef CONFIG_DEBUG_MUTEXES
        p->blocked_on = NULL; /* not blocked yet */
 #endif
+#ifdef CONFIG_CGROUP_MEM_RES_CTLR
+        p->memcg_batch.do_batch = 0;
+        p->memcg_batch.memcg = NULL;
+#endif
        p->bts = NULL;
@@ -1206,9 +1210,10 @@ static struct task_struct *copy_process(unsigned long clone_flags,
                p->sas_ss_sp = p->sas_ss_size = 0;
        /*
-         * Syscall tracing should be turned off in the child regardless
+         * Syscall tracing and stepping should be turned off in the
-         * of CLONE_PTRACE.
+         * child regardless of CLONE_PTRACE.
         */
+        user_disable_single_step(p);
        clear_tsk_thread_flag(p, TIF_SYSCALL_TRACE);
 #ifdef TIF_SYSCALL_EMU
        clear_tsk_thread_flag(p, TIF_SYSCALL_EMU);
diff --git a/kernel/kexec.c b/kernel/kexec.c
index f336e2107f98..433e9fcc1fc5 100644
--- a/kernel/kexec.c
+++ b/kernel/kexec.c
@@ -31,6 +31,7 @@
 #include <linux/cpu.h>
 #include <linux/console.h>
 #include <linux/vmalloc.h>
+#include <linux/swap.h>
 #include <asm/page.h>
 #include <asm/uaccess.h>
@@ -1082,6 +1083,64 @@ void crash_kexec(struct pt_regs *regs)
        }
 }
+size_t crash_get_memory_size(void)
+{
+        size_t size;
+        mutex_lock(&kexec_mutex);
+        size = crashk_res.end - crashk_res.start + 1;
+        mutex_unlock(&kexec_mutex);
+        return size;
+}
+static void free_reserved_phys_range(unsigned long begin, unsigned long end)
+{
+        unsigned long addr;
+        for (addr = begin; addr < end; addr += PAGE_SIZE) {
+                ClearPageReserved(pfn_to_page(addr >> PAGE_SHIFT));
+                init_page_count(pfn_to_page(addr >> PAGE_SHIFT));
+                free_page((unsigned long)__va(addr));
+                totalram_pages++;
+        }
+}
+int crash_shrink_memory(unsigned long new_size)
+{
+        int ret = 0;
+        unsigned long start, end;
+        mutex_lock(&kexec_mutex);
+        if (kexec_crash_image) {
+                ret = -ENOENT;
+                goto unlock;
+        }
+        start = crashk_res.start;
+        end = crashk_res.end;
+        if (new_size >= end - start + 1) {
+                ret = -EINVAL;
+                if (new_size == end - start + 1)
+                        ret = 0;
+                goto unlock;
+        }
+        start = roundup(start, PAGE_SIZE);
+        end = roundup(start + new_size, PAGE_SIZE);
+        free_reserved_phys_range(end, crashk_res.end);
+        if (start == end) {
+                crashk_res.end = end;
+                release_resource(&crashk_res);
+        } else
+                crashk_res.end = end - 1;
+unlock:
+        mutex_unlock(&kexec_mutex);
+        return ret;
+}
 static u32 *append_elf_note(u32 *buf, char *name, unsigned type, void *data,
                            size_t data_len)
 {
diff --git a/kernel/ksysfs.c b/kernel/ksysfs.c
index 528dd78e7e7e..3feaf5a74514 100644
--- a/kernel/ksysfs.c
+++ b/kernel/ksysfs.c
@@ -100,6 +100,26 @@ static ssize_t kexec_crash_loaded_show(struct kobject *kobj,
 }
 KERNEL_ATTR_RO(kexec_crash_loaded);
+static ssize_t kexec_crash_size_show(struct kobject *kobj,
+                                       struct kobj_attribute *attr, char *buf)
+{
+        return sprintf(buf, "%zu\n", crash_get_memory_size());
+}
+static ssize_t kexec_crash_size_store(struct kobject *kobj,
+                                   struct kobj_attribute *attr,
+                                   const char *buf, size_t count)
+{
+        unsigned long cnt;
+        int ret;
+        if (strict_strtoul(buf, 0, &cnt))
+                return -EINVAL;
+        ret = crash_shrink_memory(cnt);
+        return ret < 0 ? ret : count;
+}
+KERNEL_ATTR_RW(kexec_crash_size);
 static ssize_t vmcoreinfo_show(struct kobject *kobj,
                               struct kobj_attribute *attr, char *buf)
 {
@@ -147,6 +167,7 @@ static struct attribute * kernel_attrs[] = {
 #ifdef CONFIG_KEXEC
        &kexec_loaded_attr.attr,
        &kexec_crash_loaded_attr.attr,
+        &kexec_crash_size_attr.attr,
        &vmcoreinfo_attr.attr,
 #endif
        NULL
diff --git a/kernel/module.c b/kernel/module.c
index 12afc5a3ddd3..a65dc787a27b 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -880,11 +880,23 @@ static int try_to_force_load(struct module *mod, const char *reason)
 }
 #ifdef CONFIG_MODVERSIONS
+/* If the arch applies (non-zero) relocations to kernel kcrctab, unapply it. */
+static unsigned long maybe_relocated(unsigned long crc,
+                                     const struct module *crc_owner)
+{
+#ifdef ARCH_RELOCATES_KCRCTAB
+        if (crc_owner == NULL)
+                return crc - (unsigned long)reloc_start;
+#endif
+        return crc;
+}
 static int check_version(Elf_Shdr *sechdrs,
                         unsigned int versindex,
                         const char *symname,
                         struct module *mod, 
-                         const unsigned long *crc)
+                         const unsigned long *crc,
+                         const struct module *crc_owner)
 {
        unsigned int i, num_versions;
        struct modversion_info *versions;
@@ -905,10 +917,10 @@ static int check_version(Elf_Shdr *sechdrs,
                if (strcmp(versions[i].name, symname) != 0)
                        continue;
-                if (versions[i].crc == *crc)
+                if (versions[i].crc == maybe_relocated(*crc, crc_owner))
                        return 1;
                DEBUGP("Found checksum %lX vs module %lX\n",
-                       *crc, versions[i].crc);
+                       maybe_relocated(*crc, crc_owner), versions[i].crc);
                goto bad_version;
        }
@@ -931,7 +943,8 @@ static inline int check_modstruct_version(Elf_Shdr *sechdrs,
        if (!find_symbol(MODULE_SYMBOL_PREFIX "module_layout", NULL,
                         &crc, true, false))
                BUG();
-        return check_version(sechdrs, versindex, "module_layout", mod, crc);
+        return check_version(sechdrs, versindex, "module_layout", mod, crc,
+                             NULL);
 }
 /* First part is kernel version, which we ignore if module has crcs. */
@@ -949,7 +962,8 @@ static inline int check_version(Elf_Shdr *sechdrs,
                                unsigned int versindex,
                                const char *symname,
                                struct module *mod, 
-                                const unsigned long *crc)
+                                const unsigned long *crc,
+                                const struct module *crc_owner)
 {
        return 1;
 }
@@ -984,8 +998,8 @@ static const struct kernel_symbol *resolve_symbol(Elf_Shdr *sechdrs,
        /* use_module can fail due to OOM,
           or module initialization or unloading */
        if (sym) {
-                if (!check_version(sechdrs, versindex, name, mod, crc) ||
+                if (!check_version(sechdrs, versindex, name, mod, crc, owner)
-                    !use_module(mod, owner))
+                    || !use_module(mod, owner))
                        sym = NULL;
        }
        return sym;
diff --git a/kernel/panic.c b/kernel/panic.c
index 96b45d0b4ba5..5827f7b97254 100644
--- a/kernel/panic.c
+++ b/kernel/panic.c
@@ -10,6 +10,7 @@
 */
 #include <linux/debug_locks.h>
 #include <linux/interrupt.h>
+#include <linux/kmsg_dump.h>
 #include <linux/kallsyms.h>
 #include <linux/notifier.h>
 #include <linux/module.h>
@@ -74,6 +75,7 @@ NORET_TYPE void panic(const char * fmt, ...)
        dump_stack();
 #endif
+        kmsg_dump(KMSG_DUMP_PANIC);
        /*
         * If we have crashed and we have a crash kernel loaded let it handle
         * everything else.
@@ -339,6 +341,7 @@ void oops_exit(void)
 {
        do_oops_enter_exit();
        print_oops_end_marker();
+        kmsg_dump(KMSG_DUMP_OOPS);
 }
 #ifdef WANT_WARN_ON_SLOWPATH
diff --git a/kernel/pid.c b/kernel/pid.c
index d3f722d20f9c..2e17c9c92cbe 100644
--- a/kernel/pid.c
+++ b/kernel/pid.c
@@ -141,11 +141,12 @@ static int alloc_pidmap(struct pid_namespace *pid_ns)
                         * installing it:
                         */
                        spin_lock_irq(&pidmap_lock);
-                        if (map->page)
+                        if (!map->page) {
-                                kfree(page);
-                        else
                                map->page = page;
+                                page = NULL;
+                        }
                        spin_unlock_irq(&pidmap_lock);
+                        kfree(page);
                        if (unlikely(!map->page))
                                break;
                }
@@ -268,12 +269,11 @@ struct pid *alloc_pid(struct pid_namespace *ns)
        for (type = 0; type < PIDTYPE_MAX; ++type)
                INIT_HLIST_HEAD(&pid->tasks[type]);
+        upid = pid->numbers + ns->level;
        spin_lock_irq(&pidmap_lock);
-        for (i = ns->level; i >= 0; i--) {
+        for ( ; upid >= pid->numbers; --upid)
-                upid = &pid->numbers[i];
                hlist_add_head_rcu(&upid->pid_chain,
                                &pid_hash[pid_hashfn(upid->nr, upid->ns)]);
-        }
        spin_unlock_irq(&pidmap_lock);
 out:
diff --git a/kernel/printk.c b/kernel/printk.c
index b5ac4d99c667..1ded8e7dd19b 100644
--- a/kernel/printk.c
+++ b/kernel/printk.c
@@ -34,6 +34,7 @@
 #include <linux/syscalls.h>
 #include <linux/kexec.h>
 #include <linux/ratelimit.h>
+#include <linux/kmsg_dump.h>
 #include <asm/uaccess.h>
@@ -1405,4 +1406,122 @@ bool printk_timed_ratelimit(unsigned long *caller_jiffies,
        return false;
 }
 EXPORT_SYMBOL(printk_timed_ratelimit);
+static DEFINE_SPINLOCK(dump_list_lock);
+static LIST_HEAD(dump_list);
+/**
+ * kmsg_dump_register - register a kernel log dumper.
+ * @dump: pointer to the kmsg_dumper structure
+ *
+ * Adds a kernel log dumper to the system. The dump callback in the
+ * structure will be called when the kernel oopses or panics and must be
+ * set. Returns zero on success and %-EINVAL or %-EBUSY otherwise.
+ */
+int kmsg_dump_register(struct kmsg_dumper *dumper)
+{
+        unsigned long flags;
+        int err = -EBUSY;
+        /* The dump callback needs to be set */
+        if (!dumper->dump)
+                return -EINVAL;
+        spin_lock_irqsave(&dump_list_lock, flags);
+        /* Don't allow registering multiple times */
+        if (!dumper->registered) {
+                dumper->registered = 1;
+                list_add_tail(&dumper->list, &dump_list);
+                err = 0;
+        }
+        spin_unlock_irqrestore(&dump_list_lock, flags);
+        return err;
+}
+EXPORT_SYMBOL_GPL(kmsg_dump_register);
+/**
+ * kmsg_dump_unregister - unregister a kmsg dumper.
+ * @dump: pointer to the kmsg_dumper structure
+ *
+ * Removes a dump device from the system. Returns zero on success and
+ * %-EINVAL otherwise.
+ */
+int kmsg_dump_unregister(struct kmsg_dumper *dumper)
+{
+        unsigned long flags;
+        int err = -EINVAL;
+        spin_lock_irqsave(&dump_list_lock, flags);
+        if (dumper->registered) {
+                dumper->registered = 0;
+                list_del(&dumper->list);
+                err = 0;
+        }
+        spin_unlock_irqrestore(&dump_list_lock, flags);
+        return err;
+}
+EXPORT_SYMBOL_GPL(kmsg_dump_unregister);
+static const char const *kmsg_reasons[] = {
+        [KMSG_DUMP_OOPS]        = "oops",
+        [KMSG_DUMP_PANIC]       = "panic",
+};
+static const char *kmsg_to_str(enum kmsg_dump_reason reason)
+{
+        if (reason >= ARRAY_SIZE(kmsg_reasons) || reason < 0)
+                return "unknown";
+        return kmsg_reasons[reason];
+}
+/**
+ * kmsg_dump - dump kernel log to kernel message dumpers.
+ * @reason: the reason (oops, panic etc) for dumping
+ *
+ * Iterate through each of the dump devices and call the oops/panic
+ * callbacks with the log buffer.
+ */
+void kmsg_dump(enum kmsg_dump_reason reason)
+{
+        unsigned long end;
+        unsigned chars;
+        struct kmsg_dumper *dumper;
+        const char *s1, *s2;
+        unsigned long l1, l2;
+        unsigned long flags;
+        /* Theoretically, the log could move on after we do this, but
+           there's not a lot we can do about that. The new messages
+           will overwrite the start of what we dump. */
+        spin_lock_irqsave(&logbuf_lock, flags);
+        end = log_end & LOG_BUF_MASK;
+        chars = logged_chars;
+        spin_unlock_irqrestore(&logbuf_lock, flags);
+        if (logged_chars > end) {
+                s1 = log_buf + log_buf_len - logged_chars + end;
+                l1 = logged_chars - end;
+                s2 = log_buf;
+                l2 = end;
+        } else {
+                s1 = "";
+                l1 = 0;
+                s2 = log_buf + end - logged_chars;
+                l2 = logged_chars;
+        }
+        if (!spin_trylock_irqsave(&dump_list_lock, flags)) {
+                printk(KERN_ERR "dump_kmsg: dump list lock is held during %s, skipping dump\n",
+                                kmsg_to_str(reason));
+                return;
+        }
+        list_for_each_entry(dumper, &dump_list, list)
+                dumper->dump(dumper, reason, s1, l1, s2, l2);
+        spin_unlock_irqrestore(&dump_list_lock, flags);
+}
 #endif
diff --git a/kernel/relay.c b/kernel/relay.c
index 760c26209a3c..c705a41b4ba3 100644
--- a/kernel/relay.c
+++ b/kernel/relay.c
@@ -1198,7 +1198,7 @@ static void relay_pipe_buf_release(struct pipe_inode_info *pipe,
        relay_consume_bytes(rbuf, buf->private);
 }
-static struct pipe_buf_operations relay_pipe_buf_ops = {
+static const struct pipe_buf_operations relay_pipe_buf_ops = {
        .can_merge = 0,
        .map = generic_pipe_buf_map,
        .unmap = generic_pipe_buf_unmap,
diff --git a/kernel/signal.c b/kernel/signal.c
index 6b982f2cf524..1814e68e4de3 100644
--- a/kernel/signal.c
+++ b/kernel/signal.c
@@ -423,7 +423,7 @@ still_pending:
                 */
                info->si_signo = sig;
                info->si_errno = 0;
-                info->si_code = 0;
+                info->si_code = SI_USER;
                info->si_pid = 0;
                info->si_uid = 0;
        }
@@ -607,6 +607,17 @@ static int rm_from_queue(unsigned long mask, struct sigpending *s)
        return 1;
 }
+static inline int is_si_special(const struct siginfo *info)
+{
+        return info <= SEND_SIG_FORCED;
+}
+static inline bool si_fromuser(const struct siginfo *info)
+{
+        return info == SEND_SIG_NOINFO ||
+                (!is_si_special(info) && SI_FROMUSER(info));
+}
 /*
 * Bad permissions for sending the signal
 * - the caller must hold at least the RCU read lock
@@ -621,7 +632,7 @@ static int check_kill_permission(int sig, struct siginfo *info,
        if (!valid_signal(sig))
                return -EINVAL;
-        if (info != SEND_SIG_NOINFO && (is_si_special(info) || SI_FROMKERNEL(info)))
+        if (!si_fromuser(info))
                return 0;
        error = audit_signal_info(sig, t); /* Let audit system see the signal */
@@ -949,9 +960,8 @@ static int send_signal(int sig, struct siginfo *info, struct task_struct *t,
        int from_ancestor_ns = 0;
 #ifdef CONFIG_PID_NS
-        if (!is_si_special(info) && SI_FROMUSER(info) &&
+        from_ancestor_ns = si_fromuser(info) &&
-                        task_pid_nr_ns(current, task_active_pid_ns(t)) <= 0)
+                           !task_pid_nr_ns(current, task_active_pid_ns(t));
-                from_ancestor_ns = 1;
 #endif
        return __send_signal(sig, info, t, group, from_ancestor_ns);
@@ -1052,12 +1062,6 @@ force_sig_info(int sig, struct siginfo *info, struct task_struct *t)
        return ret;
 }
-void
-force_sig_specific(int sig, struct task_struct *t)
-{
-        force_sig_info(sig, SEND_SIG_FORCED, t);
-}
 /*
 * Nuke all other threads in the group.
 */
@@ -1186,8 +1190,7 @@ int kill_pid_info_as_uid(int sig, struct siginfo *info, struct pid *pid,
                goto out_unlock;
        }
        pcred = __task_cred(p);
-        if ((info == SEND_SIG_NOINFO ||
+        if (si_fromuser(info) &&
-             (!is_si_special(info) && SI_FROMUSER(info))) &&
            euid != pcred->suid && euid != pcred->uid &&
            uid  != pcred->suid && uid  != pcred->uid) {
                ret = -EPERM;
@@ -1837,11 +1840,6 @@ relock:
        for (;;) {
                struct k_sigaction *ka;
-                if (unlikely(signal->group_stop_count > 0) &&
-                    do_signal_stop(0))
-                        goto relock;
                /*
                 * Tracing can induce an artifical signal and choose sigaction.
                 * The return value in @signr determines the default action,
@@ -1853,6 +1851,10 @@ relock:
                if (unlikely(signr != 0))
                        ka = return_ka;
                else {
+                        if (unlikely(signal->group_stop_count > 0) &&
+                            do_signal_stop(0))
+                                goto relock;
                        signr = dequeue_signal(current, &current->blocked,
                                               info);
diff --git a/kernel/time/timecompare.c b/kernel/time/timecompare.c
index 96ff643a5a59..12f5c55090be 100644
--- a/kernel/time/timecompare.c
+++ b/kernel/time/timecompare.c
@@ -89,7 +89,7 @@ int timecompare_offset(struct timecompare *sync,
                         * source time
                         */
                        sample.offset =
-                                ktime_to_ns(ktime_add(end, start)) / 2 -
+                                (ktime_to_ns(end) + ktime_to_ns(start)) / 2 -
                                ts;
                        /* simple insertion sort based on duration */
diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c
index e51a1bcb7bed..7968762c8167 100644
--- a/kernel/trace/ftrace.c
+++ b/kernel/trace/ftrace.c
@@ -1724,7 +1724,7 @@ ftrace_match_record(struct dyn_ftrace *rec, char *regex, int len, int type)
        return ftrace_match(str, regex, len, type);
 }
-static void ftrace_match_records(char *buff, int len, int enable)
+static int ftrace_match_records(char *buff, int len, int enable)
 {
        unsigned int search_len;
        struct ftrace_page *pg;
@@ -1733,6 +1733,7 @@ static void ftrace_match_records(char *buff, int len, int enable)
        char *search;
        int type;
        int not;
+        int found = 0;
        flag = enable ? FTRACE_FL_FILTER : FTRACE_FL_NOTRACE;
        type = filter_parse_regex(buff, len, &search, &not);
@@ -1750,6 +1751,7 @@ static void ftrace_match_records(char *buff, int len, int enable)
                                rec->flags &= ~flag;
                        else
                                rec->flags |= flag;
+                        found = 1;
                }
                /*
                 * Only enable filtering if we have a function that
@@ -1759,6 +1761,8 @@ static void ftrace_match_records(char *buff, int len, int enable)
                        ftrace_filtered = 1;
        } while_for_each_ftrace_rec();
        mutex_unlock(&ftrace_lock);
+        return found;
 }
 static int
@@ -1780,7 +1784,7 @@ ftrace_match_module_record(struct dyn_ftrace *rec, char *mod,
                return 1;
 }
-static void ftrace_match_module_records(char *buff, char *mod, int enable)
+static int ftrace_match_module_records(char *buff, char *mod, int enable)
 {
        unsigned search_len = 0;
        struct ftrace_page *pg;
@@ -1789,6 +1793,7 @@ static void ftrace_match_module_records(char *buff, char *mod, int enable)
        char *search = buff;
        unsigned long flag;
        int not = 0;
+        int found = 0;
        flag = enable ? FTRACE_FL_FILTER : FTRACE_FL_NOTRACE;
@@ -1819,12 +1824,15 @@ static void ftrace_match_module_records(char *buff, char *mod, int enable)
                                rec->flags &= ~flag;
                        else
                                rec->flags |= flag;
+                        found = 1;
                }
                if (enable && (rec->flags & FTRACE_FL_FILTER))
                        ftrace_filtered = 1;
        } while_for_each_ftrace_rec();
        mutex_unlock(&ftrace_lock);
+        return found;
 }
 /*
@@ -1853,8 +1861,9 @@ ftrace_mod_callback(char *func, char *cmd, char *param, int enable)
        if (!strlen(mod))
                return -EINVAL;
-        ftrace_match_module_records(func, mod, enable);
+        if (ftrace_match_module_records(func, mod, enable))
-        return 0;
+                return 0;
+        return -EINVAL;
 }
 static struct ftrace_func_command ftrace_mod_cmd = {
@@ -2151,8 +2160,9 @@ static int ftrace_process_regex(char *buff, int len, int enable)
        func = strsep(&next, ":");
        if (!next) {
-                ftrace_match_records(func, len, enable);
+                if (ftrace_match_records(func, len, enable))
-                return 0;
+                        return 0;
+                return ret;
        }
        /* command found */
@@ -2198,10 +2208,9 @@ ftrace_regex_write(struct file *file, const char __user *ubuf,
            !trace_parser_cont(parser)) {
                ret = ftrace_process_regex(parser->buffer,
                                           parser->idx, enable);
+                trace_parser_clear(parser);
                if (ret)
                        goto out_unlock;
-                trace_parser_clear(parser);
        }
        ret = read;
@@ -2543,10 +2552,9 @@ ftrace_set_func(unsigned long *array, int *idx, char *buffer)
                                        exists = true;
                                        break;
                                }
-                        if (!exists) {
+                        if (!exists)
                                array[(*idx)++] = rec->ip;
-                                found = 1;
+                        found = 1;
-                        }
                }
        } while_for_each_ftrace_rec();
diff --git a/kernel/trace/power-traces.c b/kernel/trace/power-traces.c
index e06c6e3d56a3..9f4f565b01e6 100644
--- a/kernel/trace/power-traces.c
+++ b/kernel/trace/power-traces.c
@@ -14,7 +14,5 @@
 #define CREATE_TRACE_POINTS
 #include <trace/events/power.h>
-EXPORT_TRACEPOINT_SYMBOL_GPL(power_start);
-EXPORT_TRACEPOINT_SYMBOL_GPL(power_end);
 EXPORT_TRACEPOINT_SYMBOL_GPL(power_frequency);
diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c
index f58c9ad15830..2326b04c95c4 100644
--- a/kernel/trace/ring_buffer.c
+++ b/kernel/trace/ring_buffer.c
@@ -1193,9 +1193,6 @@ rb_remove_pages(struct ring_buffer_per_cpu *cpu_buffer, unsigned nr_pages)
        struct list_head *p;
        unsigned i;
-        atomic_inc(&cpu_buffer->record_disabled);
-        synchronize_sched();
        spin_lock_irq(&cpu_buffer->reader_lock);
        rb_head_page_deactivate(cpu_buffer);
@@ -1211,12 +1208,9 @@ rb_remove_pages(struct ring_buffer_per_cpu *cpu_buffer, unsigned nr_pages)
                return;
        rb_reset_cpu(cpu_buffer);
-        spin_unlock_irq(&cpu_buffer->reader_lock);
        rb_check_pages(cpu_buffer);
-        atomic_dec(&cpu_buffer->record_disabled);
+        spin_unlock_irq(&cpu_buffer->reader_lock);
 }
 static void
@@ -1227,9 +1221,6 @@ rb_insert_pages(struct ring_buffer_per_cpu *cpu_buffer,
        struct list_head *p;
        unsigned i;
-        atomic_inc(&cpu_buffer->record_disabled);
-        synchronize_sched();
        spin_lock_irq(&cpu_buffer->reader_lock);
        rb_head_page_deactivate(cpu_buffer);
@@ -1242,11 +1233,9 @@ rb_insert_pages(struct ring_buffer_per_cpu *cpu_buffer,
                list_add_tail(&bpage->list, cpu_buffer->pages);
        }
        rb_reset_cpu(cpu_buffer);
-        spin_unlock_irq(&cpu_buffer->reader_lock);
        rb_check_pages(cpu_buffer);
-        atomic_dec(&cpu_buffer->record_disabled);
+        spin_unlock_irq(&cpu_buffer->reader_lock);
 }
 /**
@@ -1254,11 +1243,6 @@ rb_insert_pages(struct ring_buffer_per_cpu *cpu_buffer,
 * @buffer: the buffer to resize.
 * @size: the new size.
 *
- * The tracer is responsible for making sure that the buffer is
- * not being used while changing the size.
- * Note: We may be able to change the above requirement by using
- *  RCU synchronizations.
- *
 * Minimum size is 2 * BUF_PAGE_SIZE.
 *
 * Returns -1 on failure.
@@ -1290,6 +1274,11 @@ int ring_buffer_resize(struct ring_buffer *buffer, unsigned long size)
        if (size == buffer_size)
                return size;
+        atomic_inc(&buffer->record_disabled);
+        /* Make sure all writers are done with this buffer. */
+        synchronize_sched();
        mutex_lock(&buffer->mutex);
        get_online_cpus();
@@ -1352,6 +1341,8 @@ int ring_buffer_resize(struct ring_buffer *buffer, unsigned long size)
        put_online_cpus();
        mutex_unlock(&buffer->mutex);
+        atomic_dec(&buffer->record_disabled);
        return size;
 free_pages:
@@ -1361,6 +1352,7 @@ int ring_buffer_resize(struct ring_buffer *buffer, unsigned long size)
        }
        put_online_cpus();
        mutex_unlock(&buffer->mutex);
+        atomic_dec(&buffer->record_disabled);
        return -ENOMEM;
        /*
@@ -1370,6 +1362,7 @@ int ring_buffer_resize(struct ring_buffer *buffer, unsigned long size)
 out_fail:
        put_online_cpus();
        mutex_unlock(&buffer->mutex);
+        atomic_dec(&buffer->record_disabled);
        return -1;
 }
 EXPORT_SYMBOL_GPL(ring_buffer_resize);
diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c
index bb6b5e7fa2a2..06ba26747d7e 100644
--- a/kernel/trace/trace.c
+++ b/kernel/trace/trace.c
@@ -313,7 +313,6 @@ static const char *trace_options[] = {
        "bin",
        "block",
        "stacktrace",
-        "sched-tree",
        "trace_printk",
        "ftrace_preempt",
        "branch",
@@ -1151,6 +1150,22 @@ void __trace_stack(struct trace_array *tr, unsigned long flags, int skip,
        __ftrace_trace_stack(tr->buffer, flags, skip, pc);
 }
+/**
+ * trace_dump_stack - record a stack back trace in the trace buffer
+ */
+void trace_dump_stack(void)
+{
+        unsigned long flags;
+        if (tracing_disabled || tracing_selftest_running)
+                return;
+        local_save_flags(flags);
+        /* skipping 3 traces, seems to get us at the caller of this function */
+        __ftrace_trace_stack(global_trace.buffer, flags, 3, preempt_count());
+}
 void
 ftrace_trace_userstack(struct ring_buffer *buffer, unsigned long flags, int pc)
 {
@@ -2316,67 +2331,49 @@ static const struct file_operations tracing_cpumask_fops = {
        .write          = tracing_cpumask_write,
 };
-static ssize_t
+static int tracing_trace_options_show(struct seq_file *m, void *v)
-tracing_trace_options_read(struct file *filp, char __user *ubuf,
-                       size_t cnt, loff_t *ppos)
 {
        struct tracer_opt *trace_opts;
        u32 tracer_flags;
-        int len = 0;
-        char *buf;
-        int r = 0;
        int i;
-        /* calculate max size */
-        for (i = 0; trace_options[i]; i++) {
-                len += strlen(trace_options[i]);
-                len += 3; /* "no" and newline */
-        }
        mutex_lock(&trace_types_lock);
        tracer_flags = current_trace->flags->val;
        trace_opts = current_trace->flags->opts;
-        /*
-         * Increase the size with names of options specific
-         * of the current tracer.
-         */
-        for (i = 0; trace_opts[i].name; i++) {
-                len += strlen(trace_opts[i].name);
-                len += 3; /* "no" and newline */
-        }
-        /* +1 for \0 */
-        buf = kmalloc(len + 1, GFP_KERNEL);
-        if (!buf) {
-                mutex_unlock(&trace_types_lock);
-                return -ENOMEM;
-        }
        for (i = 0; trace_options[i]; i++) {
                if (trace_flags & (1 << i))
-                        r += sprintf(buf + r, "%s\n", trace_options[i]);
+                        seq_printf(m, "%s\n", trace_options[i]);
                else
-                        r += sprintf(buf + r, "no%s\n", trace_options[i]);
+                        seq_printf(m, "no%s\n", trace_options[i]);
        }
        for (i = 0; trace_opts[i].name; i++) {
                if (tracer_flags & trace_opts[i].bit)
-                        r += sprintf(buf + r, "%s\n",
+                        seq_printf(m, "%s\n", trace_opts[i].name);
-                                trace_opts[i].name);
                else
-                        r += sprintf(buf + r, "no%s\n",
+                        seq_printf(m, "no%s\n", trace_opts[i].name);
-                                trace_opts[i].name);
        }
        mutex_unlock(&trace_types_lock);
-        WARN_ON(r >= len + 1);
+        return 0;
+}
-        r = simple_read_from_buffer(ubuf, cnt, ppos, buf, r);
+static int __set_tracer_option(struct tracer *trace,
+                               struct tracer_flags *tracer_flags,
+                               struct tracer_opt *opts, int neg)
+{
+        int ret;
-        kfree(buf);
+        ret = trace->set_flag(tracer_flags->val, opts->bit, !neg);
-        return r;
+        if (ret)
+                return ret;
+        if (neg)
+                tracer_flags->val &= ~opts->bit;
+        else
+                tracer_flags->val |= opts->bit;
+        return 0;
 }
 /* Try to assign a tracer specific option */
@@ -2384,33 +2381,17 @@ static int set_tracer_option(struct tracer *trace, char *cmp, int neg)
 {
        struct tracer_flags *tracer_flags = trace->flags;
        struct tracer_opt *opts = NULL;
-        int ret = 0, i = 0;
+        int i;
-        int len;
        for (i = 0; tracer_flags->opts[i].name; i++) {
                opts = &tracer_flags->opts[i];
-                len = strlen(opts->name);
-                if (strncmp(cmp, opts->name, len) == 0) {
+                if (strcmp(cmp, opts->name) == 0)
-                        ret = trace->set_flag(tracer_flags->val,
+                        return __set_tracer_option(trace, trace->flags,
-                                opts->bit, !neg);
+                                                   opts, neg);
-                        break;
-                }
        }
-        /* Not found */
-        if (!tracer_flags->opts[i].name)
-                return -EINVAL;
-        /* Refused to handle */
-        if (ret)
-                return ret;
-        if (neg)
-                tracer_flags->val &= ~opts->bit;
-        else
-                tracer_flags->val |= opts->bit;
-        return 0;
+        return -EINVAL;
 }
 static void set_tracer_flags(unsigned int mask, int enabled)
@@ -2430,7 +2411,7 @@ tracing_trace_options_write(struct file *filp, const char __user *ubuf,
                        size_t cnt, loff_t *ppos)
 {
        char buf[64];
-        char *cmp = buf;
+        char *cmp;
        int neg = 0;
        int ret;
        int i;
@@ -2442,16 +2423,15 @@ tracing_trace_options_write(struct file *filp, const char __user *ubuf,
                return -EFAULT;
        buf[cnt] = 0;
+        cmp = strstrip(buf);
-        if (strncmp(buf, "no", 2) == 0) {
+        if (strncmp(cmp, "no", 2) == 0) {
                neg = 1;
                cmp += 2;
        }
        for (i = 0; trace_options[i]; i++) {
-                int len = strlen(trace_options[i]);
+                if (strcmp(cmp, trace_options[i]) == 0) {
-                if (strncmp(cmp, trace_options[i], len) == 0) {
                        set_tracer_flags(1 << i, !neg);
                        break;
                }
@@ -2471,9 +2451,18 @@ tracing_trace_options_write(struct file *filp, const char __user *ubuf,
        return cnt;
 }
+static int tracing_trace_options_open(struct inode *inode, struct file *file)
+{
+        if (tracing_disabled)
+                return -ENODEV;
+        return single_open(file, tracing_trace_options_show, NULL);
+}
 static const struct file_operations tracing_iter_fops = {
-        .open           = tracing_open_generic,
+        .open           = tracing_trace_options_open,
-        .read           = tracing_trace_options_read,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
        .write          = tracing_trace_options_write,
 };
@@ -3133,7 +3122,7 @@ static void tracing_spd_release_pipe(struct splice_pipe_desc *spd,
        __free_page(spd->pages[idx]);
 }
-static struct pipe_buf_operations tracing_pipe_buf_ops = {
+static const struct pipe_buf_operations tracing_pipe_buf_ops = {
        .can_merge              = 0,
        .map                    = generic_pipe_buf_map,
        .unmap                  = generic_pipe_buf_unmap,
@@ -3392,21 +3381,18 @@ tracing_mark_write(struct file *filp, const char __user *ubuf,
        return cnt;
 }
-static ssize_t tracing_clock_read(struct file *filp, char __user *ubuf,
+static int tracing_clock_show(struct seq_file *m, void *v)
-                                  size_t cnt, loff_t *ppos)
 {
-        char buf[64];
-        int bufiter = 0;
        int i;
        for (i = 0; i < ARRAY_SIZE(trace_clocks); i++)
-                bufiter += snprintf(buf + bufiter, sizeof(buf) - bufiter,
+                seq_printf(m,
                        "%s%s%s%s", i ? " " : "",
                        i == trace_clock_id ? "[" : "", trace_clocks[i].name,
                        i == trace_clock_id ? "]" : "");
-        bufiter += snprintf(buf + bufiter, sizeof(buf) - bufiter, "\n");
+        seq_putc(m, '\n');
-        return simple_read_from_buffer(ubuf, cnt, ppos, buf, bufiter);
+        return 0;
 }
 static ssize_t tracing_clock_write(struct file *filp, const char __user *ubuf,
@@ -3448,6 +3434,13 @@ static ssize_t tracing_clock_write(struct file *filp, const char __user *ubuf,
        return cnt;
 }
+static int tracing_clock_open(struct inode *inode, struct file *file)
+{
+        if (tracing_disabled)
+                return -ENODEV;
+        return single_open(file, tracing_clock_show, NULL);
+}
 static const struct file_operations tracing_max_lat_fops = {
        .open           = tracing_open_generic,
        .read           = tracing_max_lat_read,
@@ -3486,8 +3479,10 @@ static const struct file_operations tracing_mark_fops = {
 };
 static const struct file_operations trace_clock_fops = {
-        .open           = tracing_open_generic,
+        .open           = tracing_clock_open,
-        .read           = tracing_clock_read,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
        .write          = tracing_clock_write,
 };
@@ -3617,7 +3612,7 @@ static void buffer_pipe_buf_get(struct pipe_inode_info *pipe,
 }
 /* Pipe buffer operations for a buffer. */
-static struct pipe_buf_operations buffer_pipe_buf_ops = {
+static const struct pipe_buf_operations buffer_pipe_buf_ops = {
        .can_merge              = 0,
        .map                    = generic_pipe_buf_map,
        .unmap                  = generic_pipe_buf_unmap,
@@ -3948,39 +3943,16 @@ trace_options_write(struct file *filp, const char __user *ubuf, size_t cnt,
        if (ret < 0)
                return ret;
-        ret = 0;
+        if (val != 0 && val != 1)
-        switch (val) {
+                return -EINVAL;
-        case 0:
-                /* do nothing if already cleared */
-                if (!(topt->flags->val & topt->opt->bit))
-                        break;
-                mutex_lock(&trace_types_lock);
-                if (current_trace->set_flag)
-                        ret = current_trace->set_flag(topt->flags->val,
-                                                      topt->opt->bit, 0);
-                mutex_unlock(&trace_types_lock);
-                if (ret)
-                        return ret;
-                topt->flags->val &= ~topt->opt->bit;
-                break;
-        case 1:
-                /* do nothing if already set */
-                if (topt->flags->val & topt->opt->bit)
-                        break;
+        if (!!(topt->flags->val & topt->opt->bit) != val) {
                mutex_lock(&trace_types_lock);
-                if (current_trace->set_flag)
+                ret = __set_tracer_option(current_trace, topt->flags,
-                        ret = current_trace->set_flag(topt->flags->val,
+                                          topt->opt, val);
-                                                      topt->opt->bit, 1);
                mutex_unlock(&trace_types_lock);
                if (ret)
                        return ret;
-                topt->flags->val |= topt->opt->bit;
-                break;
-        default:
-                return -EINVAL;
        }
        *ppos += cnt;
diff --git a/kernel/trace/trace.h b/kernel/trace/trace.h
index a52bed2eedd8..4df6a77eb196 100644
--- a/kernel/trace/trace.h
+++ b/kernel/trace/trace.h
@@ -597,18 +597,17 @@ enum trace_iterator_flags {
        TRACE_ITER_BIN                  = 0x40,
        TRACE_ITER_BLOCK                = 0x80,
        TRACE_ITER_STACKTRACE           = 0x100,
-        TRACE_ITER_SCHED_TREE           = 0x200,
+        TRACE_ITER_PRINTK               = 0x200,
-        TRACE_ITER_PRINTK               = 0x400,
+        TRACE_ITER_PREEMPTONLY          = 0x400,
-        TRACE_ITER_PREEMPTONLY          = 0x800,
+        TRACE_ITER_BRANCH               = 0x800,
-        TRACE_ITER_BRANCH               = 0x1000,
+        TRACE_ITER_ANNOTATE             = 0x1000,
-        TRACE_ITER_ANNOTATE             = 0x2000,
+        TRACE_ITER_USERSTACKTRACE       = 0x2000,
-        TRACE_ITER_USERSTACKTRACE       = 0x4000,
+        TRACE_ITER_SYM_USEROBJ          = 0x4000,
-        TRACE_ITER_SYM_USEROBJ          = 0x8000,
+        TRACE_ITER_PRINTK_MSGONLY       = 0x8000,
-        TRACE_ITER_PRINTK_MSGONLY       = 0x10000,
+        TRACE_ITER_CONTEXT_INFO         = 0x10000, /* Print pid/cpu/time */
-        TRACE_ITER_CONTEXT_INFO         = 0x20000, /* Print pid/cpu/time */
+        TRACE_ITER_LATENCY_FMT          = 0x20000,
-        TRACE_ITER_LATENCY_FMT          = 0x40000,
+        TRACE_ITER_SLEEP_TIME           = 0x40000,
-        TRACE_ITER_SLEEP_TIME           = 0x80000,
+        TRACE_ITER_GRAPH_TIME           = 0x80000,
-        TRACE_ITER_GRAPH_TIME           = 0x100000,
 };
 /*
diff --git a/kernel/trace/trace_event_profile.c b/kernel/trace/trace_event_profile.c
index d9c60f80aa0d..9e25573242cf 100644
--- a/kernel/trace/trace_event_profile.c
+++ b/kernel/trace/trace_event_profile.c
@@ -25,7 +25,7 @@ static int ftrace_profile_enable_event(struct ftrace_event_call *event)
        char *buf;
        int ret = -ENOMEM;
-        if (atomic_inc_return(&event->profile_count))
+        if (event->profile_count++ > 0)
                return 0;
        if (!total_profile_count) {
@@ -56,7 +56,7 @@ fail_buf_nmi:
                perf_trace_buf = NULL;
        }
 fail_buf:
-        atomic_dec(&event->profile_count);
+        event->profile_count--;
        return ret;
 }
@@ -83,7 +83,7 @@ static void ftrace_profile_disable_event(struct ftrace_event_call *event)
 {
        char *buf, *nmi_buf;
-        if (!atomic_add_negative(-1, &event->profile_count))
+        if (--event->profile_count > 0)
                return;
        event->profile_disable(event);
diff --git a/kernel/trace/trace_events.c b/kernel/trace/trace_events.c
index 1d18315dc836..189b09baf4fb 100644
--- a/kernel/trace/trace_events.c
+++ b/kernel/trace/trace_events.c
@@ -78,7 +78,7 @@ EXPORT_SYMBOL_GPL(trace_define_field);
        if (ret)                                                        \
                return ret;
-int trace_define_common_fields(struct ftrace_event_call *call)
+static int trace_define_common_fields(struct ftrace_event_call *call)
 {
        int ret;
        struct trace_entry ent;
@@ -91,7 +91,6 @@ int trace_define_common_fields(struct ftrace_event_call *call)
        return ret;
 }
-EXPORT_SYMBOL_GPL(trace_define_common_fields);
 void trace_destroy_fields(struct ftrace_event_call *call)
 {
@@ -105,9 +104,25 @@ void trace_destroy_fields(struct ftrace_event_call *call)
        }
 }
-static void ftrace_event_enable_disable(struct ftrace_event_call *call,
+int trace_event_raw_init(struct ftrace_event_call *call)
+{
+        int id;
+        id = register_ftrace_event(call->event);
+        if (!id)
+                return -ENODEV;
+        call->id = id;
+        INIT_LIST_HEAD(&call->fields);
+        return 0;
+}
+EXPORT_SYMBOL_GPL(trace_event_raw_init);
+static int ftrace_event_enable_disable(struct ftrace_event_call *call,
                                        int enable)
 {
+        int ret = 0;
        switch (enable) {
        case 0:
                if (call->enabled) {
@@ -118,12 +133,20 @@ static void ftrace_event_enable_disable(struct ftrace_event_call *call,
                break;
        case 1:
                if (!call->enabled) {
-                        call->enabled = 1;
                        tracing_start_cmdline_record();
-                        call->regfunc(call);
+                        ret = call->regfunc(call);
+                        if (ret) {
+                                tracing_stop_cmdline_record();
+                                pr_info("event trace: Could not enable event "
+                                        "%s\n", call->name);
+                                break;
+                        }
+                        call->enabled = 1;
                }
                break;
        }
+        return ret;
 }
 static void ftrace_clear_events(void)
@@ -402,7 +425,7 @@ event_enable_write(struct file *filp, const char __user *ubuf, size_t cnt,
        case 0:
        case 1:
                mutex_lock(&event_mutex);
-                ftrace_event_enable_disable(call, val);
+                ret = ftrace_event_enable_disable(call, val);
                mutex_unlock(&event_mutex);
                break;
@@ -412,7 +435,7 @@ event_enable_write(struct file *filp, const char __user *ubuf, size_t cnt,
        *ppos += cnt;
-        return cnt;
+        return ret ? ret : cnt;
 }
 static ssize_t
@@ -913,7 +936,9 @@ event_create_dir(struct ftrace_event_call *call, struct dentry *d_events,
                                  id);
        if (call->define_fields) {
-                ret = call->define_fields(call);
+                ret = trace_define_common_fields(call);
+                if (!ret)
+                        ret = call->define_fields(call);
                if (ret < 0) {
                        pr_warning("Could not initialize trace point"
                                   " events/%s\n", call->name);
diff --git a/kernel/trace/trace_export.c b/kernel/trace/trace_export.c
index dff8c84ddf17..458e5bfe26d0 100644
--- a/kernel/trace/trace_export.c
+++ b/kernel/trace/trace_export.c
@@ -184,10 +184,6 @@ ftrace_define_fields_##name(struct ftrace_event_call *event_call)	\
        struct struct_name field;                                       \
        int ret;                                                        \
                                                                        \
-        ret = trace_define_common_fields(event_call);                   \
-        if (ret)                                                        \
-                return ret;                                             \
-                                                                        \
        tstruct;                                                        \
                                                                        \
        return ret;                                                     \
diff --git a/kernel/trace/trace_irqsoff.c b/kernel/trace/trace_irqsoff.c
index 3aa7eaa2114c..2974bc7538c7 100644
--- a/kernel/trace/trace_irqsoff.c
+++ b/kernel/trace/trace_irqsoff.c
@@ -151,6 +151,8 @@ check_critical_timing(struct trace_array *tr,
                goto out_unlock;
        trace_function(tr, CALLER_ADDR0, parent_ip, flags, pc);
+        /* Skip 5 functions to get to the irq/preempt enable function */
+        __trace_stack(tr, flags, 5, pc);
        if (data->critical_sequence != max_sequence)
                goto out_unlock;
diff --git a/kernel/trace/trace_kprobe.c b/kernel/trace/trace_kprobe.c
index b52d397e57eb..7ecab06547a5 100644
--- a/kernel/trace/trace_kprobe.c
+++ b/kernel/trace/trace_kprobe.c
@@ -1132,10 +1132,6 @@ static int kprobe_event_define_fields(struct ftrace_event_call *event_call)
        struct kprobe_trace_entry field;
        struct trace_probe *tp = (struct trace_probe *)event_call->data;
-        ret = trace_define_common_fields(event_call);
-        if (ret)
-                return ret;
        DEFINE_FIELD(unsigned long, ip, FIELD_STRING_IP, 0);
        DEFINE_FIELD(int, nargs, FIELD_STRING_NARGS, 1);
        /* Set argument names as fields */
@@ -1150,10 +1146,6 @@ static int kretprobe_event_define_fields(struct ftrace_event_call *event_call)
        struct kretprobe_trace_entry field;
        struct trace_probe *tp = (struct trace_probe *)event_call->data;
-        ret = trace_define_common_fields(event_call);
-        if (ret)
-                return ret;
        DEFINE_FIELD(unsigned long, func, FIELD_STRING_FUNC, 0);
        DEFINE_FIELD(unsigned long, ret_ip, FIELD_STRING_RETIP, 0);
        DEFINE_FIELD(int, nargs, FIELD_STRING_NARGS, 1);
@@ -1453,7 +1445,6 @@ static int register_probe_event(struct trace_probe *tp)
        call->unregfunc = probe_event_disable;
 #ifdef CONFIG_EVENT_PROFILE
-        atomic_set(&call->profile_count, -1);
        call->profile_enable = probe_profile_enable;
        call->profile_disable = probe_profile_disable;
 #endif
diff --git a/kernel/trace/trace_ksym.c b/kernel/trace/trace_ksym.c
index acb87d4a4ac1..faf37fa4408c 100644
--- a/kernel/trace/trace_ksym.c
+++ b/kernel/trace/trace_ksym.c
@@ -236,7 +236,8 @@ static ssize_t ksym_trace_filter_read(struct file *filp, char __user *ubuf,
        mutex_lock(&ksym_tracer_mutex);
        hlist_for_each_entry(entry, node, &ksym_filter_head, ksym_hlist) {
-                ret = trace_seq_printf(s, "%pS:", (void *)entry->attr.bp_addr);
+                ret = trace_seq_printf(s, "%pS:",
+                                (void *)(unsigned long)entry->attr.bp_addr);
                if (entry->attr.bp_type == HW_BREAKPOINT_R)
                        ret = trace_seq_puts(s, "r--\n");
                else if (entry->attr.bp_type == HW_BREAKPOINT_W)
@@ -278,21 +279,20 @@ static ssize_t ksym_trace_filter_write(struct file *file,
 {
        struct trace_ksym *entry;
        struct hlist_node *node;
-        char *input_string, *ksymname = NULL;
+        char *buf, *input_string, *ksymname = NULL;
        unsigned long ksym_addr = 0;
        int ret, op, changed = 0;
-        input_string = kzalloc(count + 1, GFP_KERNEL);
+        buf = kzalloc(count + 1, GFP_KERNEL);
-        if (!input_string)
+        if (!buf)
                return -ENOMEM;
-        if (copy_from_user(input_string, buffer, count)) {
+        ret = -EFAULT;
-                kfree(input_string);
+        if (copy_from_user(buf, buffer, count))
-                return -EFAULT;
+                goto out;
-        }
-        input_string[count] = '\0';
-        strstrip(input_string);
+        buf[count] = '\0';
+        input_string = strstrip(buf);
        /*
         * Clear all breakpoints if:
@@ -300,18 +300,16 @@ static ssize_t ksym_trace_filter_write(struct file *file,
         * 2: echo 0 > ksym_trace_filter
         * 3: echo "*:---" > ksym_trace_filter
         */
-        if (!input_string[0] || !strcmp(input_string, "0") ||
+        if (!buf[0] || !strcmp(buf, "0") ||
-            !strcmp(input_string, "*:---")) {
+            !strcmp(buf, "*:---")) {
                __ksym_trace_reset();
-                kfree(input_string);
+                ret = 0;
-                return count;
+                goto out;
        }
        ret = op = parse_ksym_trace_str(input_string, &ksymname, &ksym_addr);
-        if (ret < 0) {
+        if (ret < 0)
-                kfree(input_string);
+                goto out;
-                return ret;
-        }
        mutex_lock(&ksym_tracer_mutex);
@@ -322,7 +320,7 @@ static ssize_t ksym_trace_filter_write(struct file *file,
                        if (entry->attr.bp_type != op)
                                changed = 1;
                        else
-                                goto out;
+                                goto out_unlock;
                        break;
                }
        }
@@ -337,28 +335,24 @@ static ssize_t ksym_trace_filter_write(struct file *file,
                        if (IS_ERR(entry->ksym_hbp))
                                ret = PTR_ERR(entry->ksym_hbp);
                        else
-                                goto out;
+                                goto out_unlock;
                }
                /* Error or "symbol:---" case: drop it */
                ksym_filter_entry_count--;
                hlist_del_rcu(&(entry->ksym_hlist));
                synchronize_rcu();
                kfree(entry);
-                goto out;
+                goto out_unlock;
        } else {
                /* Check for malformed request: (4) */
-                if (op == 0)
+                if (op)
-                        goto out;
+                        ret = process_new_ksym_entry(ksymname, op, ksym_addr);
-                ret = process_new_ksym_entry(ksymname, op, ksym_addr);
        }
-out:
+out_unlock:
        mutex_unlock(&ksym_tracer_mutex);
+out:
-        kfree(input_string);
+        kfree(buf);
+        return !ret ? count : ret;
-        if (!ret)
-                ret = count;
-        return ret;
 }
 static const struct file_operations ksym_tracing_fops = {
diff --git a/kernel/trace/trace_syscalls.c b/kernel/trace/trace_syscalls.c
index 57501d90096a..75289f372dd2 100644
--- a/kernel/trace/trace_syscalls.c
+++ b/kernel/trace/trace_syscalls.c
@@ -217,10 +217,6 @@ int syscall_enter_define_fields(struct ftrace_event_call *call)
        int i;
        int offset = offsetof(typeof(trace), args);
-        ret = trace_define_common_fields(call);
-        if (ret)
-                return ret;
        ret = trace_define_field(call, SYSCALL_FIELD(int, nr), FILTER_OTHER);
        if (ret)
                return ret;
@@ -241,10 +237,6 @@ int syscall_exit_define_fields(struct ftrace_event_call *call)
        struct syscall_trace_exit trace;
        int ret;
-        ret = trace_define_common_fields(call);
-        if (ret)
-                return ret;
        ret = trace_define_field(call, SYSCALL_FIELD(int, nr), FILTER_OTHER);
        if (ret)
                return ret;
@@ -333,10 +325,7 @@ int reg_event_syscall_enter(struct ftrace_event_call *call)
        mutex_lock(&syscall_trace_lock);
        if (!sys_refcount_enter)
                ret = register_trace_sys_enter(ftrace_syscall_enter);
-        if (ret) {
+        if (!ret) {
-                pr_info("event trace: Could not activate"
-                                "syscall entry trace point");
-        } else {
                set_bit(num, enabled_enter_syscalls);
                sys_refcount_enter++;
        }
@@ -370,10 +359,7 @@ int reg_event_syscall_exit(struct ftrace_event_call *call)
        mutex_lock(&syscall_trace_lock);
        if (!sys_refcount_exit)
                ret = register_trace_sys_exit(ftrace_syscall_exit);
-        if (ret) {
+        if (!ret) {
-                pr_info("event trace: Could not activate"
-                                "syscall exit trace point");
-        } else {
                set_bit(num, enabled_exit_syscalls);
                sys_refcount_exit++;
        }
diff --git a/lib/bitmap.c b/lib/bitmap.c
index 702565821c99..11bf49750583 100644
--- a/lib/bitmap.c
+++ b/lib/bitmap.c
@@ -271,6 +271,87 @@ int __bitmap_weight(const unsigned long *bitmap, int bits)
 }
 EXPORT_SYMBOL(__bitmap_weight);
+#define BITMAP_FIRST_WORD_MASK(start) (~0UL << ((start) % BITS_PER_LONG))
+void bitmap_set(unsigned long *map, int start, int nr)
+{
+        unsigned long *p = map + BIT_WORD(start);
+        const int size = start + nr;
+        int bits_to_set = BITS_PER_LONG - (start % BITS_PER_LONG);
+        unsigned long mask_to_set = BITMAP_FIRST_WORD_MASK(start);
+        while (nr - bits_to_set >= 0) {
+                *p |= mask_to_set;
+                nr -= bits_to_set;
+                bits_to_set = BITS_PER_LONG;
+                mask_to_set = ~0UL;
+                p++;
+        }
+        if (nr) {
+                mask_to_set &= BITMAP_LAST_WORD_MASK(size);
+                *p |= mask_to_set;
+        }
+}
+EXPORT_SYMBOL(bitmap_set);
+void bitmap_clear(unsigned long *map, int start, int nr)
+{
+        unsigned long *p = map + BIT_WORD(start);
+        const int size = start + nr;
+        int bits_to_clear = BITS_PER_LONG - (start % BITS_PER_LONG);
+        unsigned long mask_to_clear = BITMAP_FIRST_WORD_MASK(start);
+        while (nr - bits_to_clear >= 0) {
+                *p &= ~mask_to_clear;
+                nr -= bits_to_clear;
+                bits_to_clear = BITS_PER_LONG;
+                mask_to_clear = ~0UL;
+                p++;
+        }
+        if (nr) {
+                mask_to_clear &= BITMAP_LAST_WORD_MASK(size);
+                *p &= ~mask_to_clear;
+        }
+}
+EXPORT_SYMBOL(bitmap_clear);
+/*
+ * bitmap_find_next_zero_area - find a contiguous aligned zero area
+ * @map: The address to base the search on
+ * @size: The bitmap size in bits
+ * @start: The bitnumber to start searching at
+ * @nr: The number of zeroed bits we're looking for
+ * @align_mask: Alignment mask for zero area
+ *
+ * The @align_mask should be one less than a power of 2; the effect is that
+ * the bit offset of all zero areas this function finds is multiples of that
+ * power of 2. A @align_mask of 0 means no alignment is required.
+ */
+unsigned long bitmap_find_next_zero_area(unsigned long *map,
+                                         unsigned long size,
+                                         unsigned long start,
+                                         unsigned int nr,
+                                         unsigned long align_mask)
+{
+        unsigned long index, end, i;
+again:
+        index = find_next_zero_bit(map, size, start);
+        /* Align allocation */
+        index = __ALIGN_MASK(index, align_mask);
+        end = index + nr;
+        if (end > size)
+                return end;
+        i = find_next_bit(map, end, index);
+        if (i < end) {
+                start = i + 1;
+                goto again;
+        }
+        return index;
+}
+EXPORT_SYMBOL(bitmap_find_next_zero_area);
 /*
 * Bitmap printing & parsing functions: first version by Bill Irwin,
 * second version by Paul Jackson, third by Joe Korty.
diff --git a/lib/genalloc.c b/lib/genalloc.c
index eed2bdb865e7..e67f97495dd5 100644
--- a/lib/genalloc.c
+++ b/lib/genalloc.c
@@ -11,6 +11,7 @@
 */
 #include <linux/module.h>
+#include <linux/bitmap.h>
 #include <linux/genalloc.h>
@@ -114,7 +115,7 @@ unsigned long gen_pool_alloc(struct gen_pool *pool, size_t size)
        struct gen_pool_chunk *chunk;
        unsigned long addr, flags;
        int order = pool->min_alloc_order;
-        int nbits, bit, start_bit, end_bit;
+        int nbits, start_bit, end_bit;
        if (size == 0)
                return 0;
@@ -129,29 +130,19 @@ unsigned long gen_pool_alloc(struct gen_pool *pool, size_t size)
                end_bit -= nbits + 1;
                spin_lock_irqsave(&chunk->lock, flags);
-                bit = -1;
+                start_bit = bitmap_find_next_zero_area(chunk->bits, end_bit, 0,
-                while (bit + 1 < end_bit) {
+                                                nbits, 0);
-                        bit = find_next_zero_bit(chunk->bits, end_bit, bit + 1);
+                if (start_bit >= end_bit) {
-                        if (bit >= end_bit)
-                                break;
-                        start_bit = bit;
-                        if (nbits > 1) {
-                                bit = find_next_bit(chunk->bits, bit + nbits,
-                                                        bit + 1);
-                                if (bit - start_bit < nbits)
-                                        continue;
-                        }
-                        addr = chunk->start_addr +
-                                            ((unsigned long)start_bit << order);
-                        while (nbits--)
-                                __set_bit(start_bit++, chunk->bits);
                        spin_unlock_irqrestore(&chunk->lock, flags);
-                        read_unlock(&pool->lock);
+                        continue;
-                        return addr;
                }
+                addr = chunk->start_addr + ((unsigned long)start_bit << order);
+                bitmap_set(chunk->bits, start_bit, nbits);
                spin_unlock_irqrestore(&chunk->lock, flags);
+                read_unlock(&pool->lock);
+                return addr;
        }
        read_unlock(&pool->lock);
        return 0;
diff --git a/lib/iommu-helper.c b/lib/iommu-helper.c
index 75dbda03f4fb..c0251f4ad08b 100644
--- a/lib/iommu-helper.c
+++ b/lib/iommu-helper.c
@@ -3,41 +3,7 @@
 */
 #include <linux/module.h>
-#include <linux/bitops.h>
+#include <linux/bitmap.h>
-static unsigned long find_next_zero_area(unsigned long *map,
-                                         unsigned long size,
-                                         unsigned long start,
-                                         unsigned int nr,
-                                         unsigned long align_mask)
-{
-        unsigned long index, end, i;
-again:
-        index = find_next_zero_bit(map, size, start);
-        /* Align allocation */
-        index = (index + align_mask) & ~align_mask;
-        end = index + nr;
-        if (end >= size)
-                return -1;
-        for (i = index; i < end; i++) {
-                if (test_bit(i, map)) {
-                        start = i+1;
-                        goto again;
-                }
-        }
-        return index;
-}
-void iommu_area_reserve(unsigned long *map, unsigned long i, int len)
-{
-        unsigned long end = i + len;
-        while (i < end) {
-                __set_bit(i, map);
-                i++;
-        }
-}
 int iommu_is_span_boundary(unsigned int index, unsigned int nr,
                           unsigned long shift,
@@ -55,31 +21,24 @@ unsigned long iommu_area_alloc(unsigned long *map, unsigned long size,
                               unsigned long align_mask)
 {
        unsigned long index;
+        /* We don't want the last of the limit */
+        size -= 1;
 again:
-        index = find_next_zero_area(map, size, start, nr, align_mask);
+        index = bitmap_find_next_zero_area(map, size, start, nr, align_mask);
-        if (index != -1) {
+        if (index < size) {
                if (iommu_is_span_boundary(index, nr, shift, boundary_size)) {
                        /* we could do more effectively */
                        start = index + 1;
                        goto again;
                }
-                iommu_area_reserve(map, index, nr);
+                bitmap_set(map, index, nr);
+                return index;
        }
-        return index;
+        return -1;
 }
 EXPORT_SYMBOL(iommu_area_alloc);
-void iommu_area_free(unsigned long *map, unsigned long start, unsigned int nr)
-{
-        unsigned long end = start + nr;
-        while (start < end) {
-                __clear_bit(start, map);
-                start++;
-        }
-}
-EXPORT_SYMBOL(iommu_area_free);
 unsigned long iommu_num_pages(unsigned long addr, unsigned long len,
                              unsigned long io_page_size)
 {
diff --git a/lib/swiotlb.c b/lib/swiotlb.c
index 5bc01803f8f8..437eedb5a53b 100644
--- a/lib/swiotlb.c
+++ b/lib/swiotlb.c
@@ -549,7 +549,7 @@ swiotlb_alloc_coherent(struct device *hwdev, size_t size,
                dma_mask = hwdev->coherent_dma_mask;
        ret = (void *)__get_free_pages(flags, order);
-        if (ret && swiotlb_virt_to_bus(hwdev, ret) + size > dma_mask) {
+        if (ret && swiotlb_virt_to_bus(hwdev, ret) + size - 1 > dma_mask) {
                /*
                 * The allocated memory isn't reachable by the device.
                 */
@@ -571,7 +571,7 @@ swiotlb_alloc_coherent(struct device *hwdev, size_t size,
        dev_addr = swiotlb_virt_to_bus(hwdev, ret);
        /* Confirm address can be DMA'd by device */
-        if (dev_addr + size > dma_mask) {
+        if (dev_addr + size - 1 > dma_mask) {
                printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
                       (unsigned long long)dma_mask,
                       (unsigned long long)dev_addr);
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index e0c2066495e3..878808c4fcbe 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -38,6 +38,7 @@
 #include <linux/vmalloc.h>
 #include <linux/mm_inline.h>
 #include <linux/page_cgroup.h>
+#include <linux/cpu.h>
 #include "internal.h"
 #include <asm/uaccess.h>
@@ -54,7 +55,6 @@ static int really_do_swap_account __initdata = 1; /* for remember boot option*/
 #define do_swap_account         (0)
 #endif
-static DEFINE_MUTEX(memcg_tasklist);    /* can be hold under cgroup_mutex */
 #define SOFTLIMIT_EVENTS_THRESH (1000)
 /*
@@ -66,7 +66,7 @@ enum mem_cgroup_stat_index {
         */
        MEM_CGROUP_STAT_CACHE,     /* # of pages charged as cache */
        MEM_CGROUP_STAT_RSS,       /* # of pages charged as anon rss */
-        MEM_CGROUP_STAT_MAPPED_FILE,  /* # of pages charged as file rss */
+        MEM_CGROUP_STAT_FILE_MAPPED,  /* # of pages charged as file rss */
        MEM_CGROUP_STAT_PGPGIN_COUNT,   /* # of pages paged in */
        MEM_CGROUP_STAT_PGPGOUT_COUNT,  /* # of pages paged out */
        MEM_CGROUP_STAT_EVENTS, /* sum of pagein + pageout for internal use */
@@ -275,6 +275,7 @@ enum charge_type {
 static void mem_cgroup_get(struct mem_cgroup *mem);
 static void mem_cgroup_put(struct mem_cgroup *mem);
 static struct mem_cgroup *parent_mem_cgroup(struct mem_cgroup *mem);
+static void drain_all_stock_async(void);
 static struct mem_cgroup_per_zone *
 mem_cgroup_zoneinfo(struct mem_cgroup *mem, int nid, int zid)
@@ -758,7 +759,13 @@ int task_in_mem_cgroup(struct task_struct *task, const struct mem_cgroup *mem)
        task_unlock(task);
        if (!curr)
                return 0;
-        if (curr->use_hierarchy)
+        /*
+         * We should check use_hierarchy of "mem" not "curr". Because checking
+         * use_hierarchy of "curr" here make this function true if hierarchy is
+         * enabled in "curr" and "curr" is a child of "mem" in *cgroup*
+         * hierarchy(even if use_hierarchy is disabled in "mem").
+         */
+        if (mem->use_hierarchy)
                ret = css_is_ancestor(&curr->css, &mem->css);
        else
                ret = (curr == mem);
@@ -1007,7 +1014,7 @@ void mem_cgroup_print_oom_info(struct mem_cgroup *memcg, struct task_struct *p)
        static char memcg_name[PATH_MAX];
        int ret;
-        if (!memcg)
+        if (!memcg || !p)
                return;
@@ -1137,6 +1144,8 @@ static int mem_cgroup_hierarchical_reclaim(struct mem_cgroup *root_mem,
                victim = mem_cgroup_select_victim(root_mem);
                if (victim == root_mem) {
                        loop++;
+                        if (loop >= 1)
+                                drain_all_stock_async();
                        if (loop >= 2) {
                                /*
                                 * If we have not been able to reclaim
@@ -1223,7 +1232,7 @@ static void record_last_oom(struct mem_cgroup *mem)
 * Currently used to update mapped file statistics, but the routine can be
 * generalized to update other statistics as well.
 */
-void mem_cgroup_update_mapped_file_stat(struct page *page, int val)
+void mem_cgroup_update_file_mapped(struct page *page, int val)
 {
        struct mem_cgroup *mem;
        struct mem_cgroup_stat *stat;
@@ -1231,9 +1240,6 @@ void mem_cgroup_update_mapped_file_stat(struct page *page, int val)
        int cpu;
        struct page_cgroup *pc;
-        if (!page_is_file_cache(page))
-                return;
        pc = lookup_page_cgroup(page);
        if (unlikely(!pc))
                return;
@@ -1253,12 +1259,139 @@ void mem_cgroup_update_mapped_file_stat(struct page *page, int val)
        stat = &mem->stat;
        cpustat = &stat->cpustat[cpu];
-        __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_MAPPED_FILE, val);
+        __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_FILE_MAPPED, val);
 done:
        unlock_page_cgroup(pc);
 }
 /*
+ * size of first charge trial. "32" comes from vmscan.c's magic value.
+ * TODO: maybe necessary to use big numbers in big irons.
+ */
+#define CHARGE_SIZE     (32 * PAGE_SIZE)
+struct memcg_stock_pcp {
+        struct mem_cgroup *cached; /* this never be root cgroup */
+        int charge;
+        struct work_struct work;
+};
+static DEFINE_PER_CPU(struct memcg_stock_pcp, memcg_stock);
+static atomic_t memcg_drain_count;
+/*
+ * Try to consume stocked charge on this cpu. If success, PAGE_SIZE is consumed
+ * from local stock and true is returned. If the stock is 0 or charges from a
+ * cgroup which is not current target, returns false. This stock will be
+ * refilled.
+ */
+static bool consume_stock(struct mem_cgroup *mem)
+{
+        struct memcg_stock_pcp *stock;
+        bool ret = true;
+        stock = &get_cpu_var(memcg_stock);
+        if (mem == stock->cached && stock->charge)
+                stock->charge -= PAGE_SIZE;
+        else /* need to call res_counter_charge */
+                ret = false;
+        put_cpu_var(memcg_stock);
+        return ret;
+}
+/*
+ * Returns stocks cached in percpu to res_counter and reset cached information.
+ */
+static void drain_stock(struct memcg_stock_pcp *stock)
+{
+        struct mem_cgroup *old = stock->cached;
+        if (stock->charge) {
+                res_counter_uncharge(&old->res, stock->charge);
+                if (do_swap_account)
+                        res_counter_uncharge(&old->memsw, stock->charge);
+        }
+        stock->cached = NULL;
+        stock->charge = 0;
+}
+/*
+ * This must be called under preempt disabled or must be called by
+ * a thread which is pinned to local cpu.
+ */
+static void drain_local_stock(struct work_struct *dummy)
+{
+        struct memcg_stock_pcp *stock = &__get_cpu_var(memcg_stock);
+        drain_stock(stock);
+}
+/*
+ * Cache charges(val) which is from res_counter, to local per_cpu area.
+ * This will be consumed by consumt_stock() function, later.
+ */
+static void refill_stock(struct mem_cgroup *mem, int val)
+{
+        struct memcg_stock_pcp *stock = &get_cpu_var(memcg_stock);
+        if (stock->cached != mem) { /* reset if necessary */
+                drain_stock(stock);
+                stock->cached = mem;
+        }
+        stock->charge += val;
+        put_cpu_var(memcg_stock);
+}
+/*
+ * Tries to drain stocked charges in other cpus. This function is asynchronous
+ * and just put a work per cpu for draining localy on each cpu. Caller can
+ * expects some charges will be back to res_counter later but cannot wait for
+ * it.
+ */
+static void drain_all_stock_async(void)
+{
+        int cpu;
+        /* This function is for scheduling "drain" in asynchronous way.
+         * The result of "drain" is not directly handled by callers. Then,
+         * if someone is calling drain, we don't have to call drain more.
+         * Anyway, WORK_STRUCT_PENDING check in queue_work_on() will catch if
+         * there is a race. We just do loose check here.
+         */
+        if (atomic_read(&memcg_drain_count))
+                return;
+        /* Notify other cpus that system-wide "drain" is running */
+        atomic_inc(&memcg_drain_count);
+        get_online_cpus();
+        for_each_online_cpu(cpu) {
+                struct memcg_stock_pcp *stock = &per_cpu(memcg_stock, cpu);
+                schedule_work_on(cpu, &stock->work);
+        }
+        put_online_cpus();
+        atomic_dec(&memcg_drain_count);
+        /* We don't wait for flush_work */
+}
+/* This is a synchronous drain interface. */
+static void drain_all_stock_sync(void)
+{
+        /* called when force_empty is called */
+        atomic_inc(&memcg_drain_count);
+        schedule_on_each_cpu(drain_local_stock);
+        atomic_dec(&memcg_drain_count);
+}
+static int __cpuinit memcg_stock_cpu_callback(struct notifier_block *nb,
+                                        unsigned long action,
+                                        void *hcpu)
+{
+        int cpu = (unsigned long)hcpu;
+        struct memcg_stock_pcp *stock;
+        if (action != CPU_DEAD)
+                return NOTIFY_OK;
+        stock = &per_cpu(memcg_stock, cpu);
+        drain_stock(stock);
+        return NOTIFY_OK;
+}
+/*
 * Unlike exported interface, "oom" parameter is added. if oom==true,
 * oom-killer can be invoked.
 */
@@ -1269,6 +1402,7 @@ static int __mem_cgroup_try_charge(struct mm_struct *mm,
        struct mem_cgroup *mem, *mem_over_limit;
        int nr_retries = MEM_CGROUP_RECLAIM_RETRIES;
        struct res_counter *fail_res;
+        int csize = CHARGE_SIZE;
        if (unlikely(test_thread_flag(TIF_MEMDIE))) {
                /* Don't account this! */
@@ -1293,23 +1427,25 @@ static int __mem_cgroup_try_charge(struct mm_struct *mm,
                return 0;
        VM_BUG_ON(css_is_removed(&mem->css));
+        if (mem_cgroup_is_root(mem))
+                goto done;
        while (1) {
                int ret = 0;
                unsigned long flags = 0;
-                if (mem_cgroup_is_root(mem))
+                if (consume_stock(mem))
-                        goto done;
+                        goto charged;
-                ret = res_counter_charge(&mem->res, PAGE_SIZE, &fail_res);
+                ret = res_counter_charge(&mem->res, csize, &fail_res);
                if (likely(!ret)) {
                        if (!do_swap_account)
                                break;
-                        ret = res_counter_charge(&mem->memsw, PAGE_SIZE,
+                        ret = res_counter_charge(&mem->memsw, csize, &fail_res);
-                                                        &fail_res);
                        if (likely(!ret))
                                break;
                        /* mem+swap counter fails */
-                        res_counter_uncharge(&mem->res, PAGE_SIZE);
+                        res_counter_uncharge(&mem->res, csize);
                        flags |= MEM_CGROUP_RECLAIM_NOSWAP;
                        mem_over_limit = mem_cgroup_from_res_counter(fail_res,
                                                                        memsw);
@@ -1318,6 +1454,11 @@ static int __mem_cgroup_try_charge(struct mm_struct *mm,
                        mem_over_limit = mem_cgroup_from_res_counter(fail_res,
                                                                        res);
+                /* reduce request size and retry */
+                if (csize > PAGE_SIZE) {
+                        csize = PAGE_SIZE;
+                        continue;
+                }
                if (!(gfp_mask & __GFP_WAIT))
                        goto nomem;
@@ -1339,14 +1480,15 @@ static int __mem_cgroup_try_charge(struct mm_struct *mm,
                if (!nr_retries--) {
                        if (oom) {
-                                mutex_lock(&memcg_tasklist);
                                mem_cgroup_out_of_memory(mem_over_limit, gfp_mask);
-                                mutex_unlock(&memcg_tasklist);
                                record_last_oom(mem_over_limit);
                        }
                        goto nomem;
                }
        }
+        if (csize > PAGE_SIZE)
+                refill_stock(mem, csize - PAGE_SIZE);
+charged:
        /*
         * Insert ancestor (and ancestor's ancestors), to softlimit RB-tree.
         * if they exceeds softlimit.
@@ -1361,6 +1503,21 @@ nomem:
 }
 /*
+ * Somemtimes we have to undo a charge we got by try_charge().
+ * This function is for that and do uncharge, put css's refcnt.
+ * gotten by try_charge().
+ */
+static void mem_cgroup_cancel_charge(struct mem_cgroup *mem)
+{
+        if (!mem_cgroup_is_root(mem)) {
+                res_counter_uncharge(&mem->res, PAGE_SIZE);
+                if (do_swap_account)
+                        res_counter_uncharge(&mem->memsw, PAGE_SIZE);
+        }
+        css_put(&mem->css);
+}
+/*
 * A helper function to get mem_cgroup from ID. must be called under
 * rcu_read_lock(). The caller must check css_is_removed() or some if
 * it's concern. (dropping refcnt from swap can be called against removed
@@ -1426,12 +1583,7 @@ static void __mem_cgroup_commit_charge(struct mem_cgroup *mem,
        lock_page_cgroup(pc);
        if (unlikely(PageCgroupUsed(pc))) {
                unlock_page_cgroup(pc);
-                if (!mem_cgroup_is_root(mem)) {
+                mem_cgroup_cancel_charge(mem);
-                        res_counter_uncharge(&mem->res, PAGE_SIZE);
-                        if (do_swap_account)
-                                res_counter_uncharge(&mem->memsw, PAGE_SIZE);
-                }
-                css_put(&mem->css);
                return;
        }
@@ -1464,27 +1616,22 @@ static void __mem_cgroup_commit_charge(struct mem_cgroup *mem,
 }
 /**
- * mem_cgroup_move_account - move account of the page
+ * __mem_cgroup_move_account - move account of the page
 * @pc: page_cgroup of the page.
 * @from: mem_cgroup which the page is moved from.
 * @to: mem_cgroup which the page is moved to. @from != @to.
 *
 * The caller must confirm following.
 * - page is not on LRU (isolate_page() is useful.)
- *
+ * - the pc is locked, used, and ->mem_cgroup points to @from.
- * returns 0 at success,
- * returns -EBUSY when lock is busy or "pc" is unstable.
 *
 * This function does "uncharge" from old cgroup but doesn't do "charge" to
 * new cgroup. It should be done by a caller.
 */
-static int mem_cgroup_move_account(struct page_cgroup *pc,
+static void __mem_cgroup_move_account(struct page_cgroup *pc,
        struct mem_cgroup *from, struct mem_cgroup *to)
 {
-        struct mem_cgroup_per_zone *from_mz, *to_mz;
-        int nid, zid;
-        int ret = -EBUSY;
        struct page *page;
        int cpu;
        struct mem_cgroup_stat *stat;
@@ -1492,38 +1639,27 @@ static int mem_cgroup_move_account(struct page_cgroup *pc,
        VM_BUG_ON(from == to);
        VM_BUG_ON(PageLRU(pc->page));
+        VM_BUG_ON(!PageCgroupLocked(pc));
-        nid = page_cgroup_nid(pc);
+        VM_BUG_ON(!PageCgroupUsed(pc));
-        zid = page_cgroup_zid(pc);
+        VM_BUG_ON(pc->mem_cgroup != from);
-        from_mz =  mem_cgroup_zoneinfo(from, nid, zid);
-        to_mz =  mem_cgroup_zoneinfo(to, nid, zid);
-        if (!trylock_page_cgroup(pc))
-                return ret;
-        if (!PageCgroupUsed(pc))
-                goto out;
-        if (pc->mem_cgroup != from)
-                goto out;
        if (!mem_cgroup_is_root(from))
                res_counter_uncharge(&from->res, PAGE_SIZE);
        mem_cgroup_charge_statistics(from, pc, false);
        page = pc->page;
-        if (page_is_file_cache(page) && page_mapped(page)) {
+        if (page_mapped(page) && !PageAnon(page)) {
                cpu = smp_processor_id();
                /* Update mapped_file data for mem_cgroup "from" */
                stat = &from->stat;
                cpustat = &stat->cpustat[cpu];
-                __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_MAPPED_FILE,
+                __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_FILE_MAPPED,
                                                -1);
                /* Update mapped_file data for mem_cgroup "to" */
                stat = &to->stat;
                cpustat = &stat->cpustat[cpu];
-                __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_MAPPED_FILE,
+                __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_FILE_MAPPED,
                                                1);
        }
@@ -1534,15 +1670,28 @@ static int mem_cgroup_move_account(struct page_cgroup *pc,
        css_get(&to->css);
        pc->mem_cgroup = to;
        mem_cgroup_charge_statistics(to, pc, true);
-        ret = 0;
-out:
-        unlock_page_cgroup(pc);
        /*
         * We charges against "to" which may not have any tasks. Then, "to"
         * can be under rmdir(). But in current implementation, caller of
         * this function is just force_empty() and it's garanteed that
         * "to" is never removed. So, we don't check rmdir status here.
         */
+}
+/*
+ * check whether the @pc is valid for moving account and call
+ * __mem_cgroup_move_account()
+ */
+static int mem_cgroup_move_account(struct page_cgroup *pc,
+                                struct mem_cgroup *from, struct mem_cgroup *to)
+{
+        int ret = -EINVAL;
+        lock_page_cgroup(pc);
+        if (PageCgroupUsed(pc) && pc->mem_cgroup == from) {
+                __mem_cgroup_move_account(pc, from, to);
+                ret = 0;
+        }
+        unlock_page_cgroup(pc);
        return ret;
 }
@@ -1564,45 +1713,27 @@ static int mem_cgroup_move_parent(struct page_cgroup *pc,
        if (!pcg)
                return -EINVAL;
+        ret = -EBUSY;
+        if (!get_page_unless_zero(page))
+                goto out;
+        if (isolate_lru_page(page))
+                goto put;
        parent = mem_cgroup_from_cont(pcg);
        ret = __mem_cgroup_try_charge(NULL, gfp_mask, &parent, false, page);
        if (ret || !parent)
-                return ret;
+                goto put_back;
-        if (!get_page_unless_zero(page)) {
-                ret = -EBUSY;
-                goto uncharge;
-        }
-        ret = isolate_lru_page(page);
-        if (ret)
-                goto cancel;
        ret = mem_cgroup_move_account(pc, child, parent);
+        if (!ret)
+                css_put(&parent->css);  /* drop extra refcnt by try_charge() */
+        else
+                mem_cgroup_cancel_charge(parent);       /* does css_put */
+put_back:
        putback_lru_page(page);
-        if (!ret) {
+put:
-                put_page(page);
-                /* drop extra refcnt by try_charge() */
-                css_put(&parent->css);
-                return 0;
-        }
-cancel:
        put_page(page);
-uncharge:
+out:
-        /* drop extra refcnt by try_charge() */
-        css_put(&parent->css);
-        /* uncharge if move fails */
-        if (!mem_cgroup_is_root(parent)) {
-                res_counter_uncharge(&parent->res, PAGE_SIZE);
-                if (do_swap_account)
-                        res_counter_uncharge(&parent->memsw, PAGE_SIZE);
-        }
        return ret;
 }
@@ -1819,14 +1950,53 @@ void mem_cgroup_cancel_charge_swapin(struct mem_cgroup *mem)
                return;
        if (!mem)
                return;
-        if (!mem_cgroup_is_root(mem)) {
+        mem_cgroup_cancel_charge(mem);
-                res_counter_uncharge(&mem->res, PAGE_SIZE);
-                if (do_swap_account)
-                        res_counter_uncharge(&mem->memsw, PAGE_SIZE);
-        }
-        css_put(&mem->css);
 }
+static void
+__do_uncharge(struct mem_cgroup *mem, const enum charge_type ctype)
+{
+        struct memcg_batch_info *batch = NULL;
+        bool uncharge_memsw = true;
+        /* If swapout, usage of swap doesn't decrease */
+        if (!do_swap_account || ctype == MEM_CGROUP_CHARGE_TYPE_SWAPOUT)
+                uncharge_memsw = false;
+        /*
+         * do_batch > 0 when unmapping pages or inode invalidate/truncate.
+         * In those cases, all pages freed continously can be expected to be in
+         * the same cgroup and we have chance to coalesce uncharges.
+         * But we do uncharge one by one if this is killed by OOM(TIF_MEMDIE)
+         * because we want to do uncharge as soon as possible.
+         */
+        if (!current->memcg_batch.do_batch || test_thread_flag(TIF_MEMDIE))
+                goto direct_uncharge;
+        batch = &current->memcg_batch;
+        /*
+         * In usual, we do css_get() when we remember memcg pointer.
+         * But in this case, we keep res->usage until end of a series of
+         * uncharges. Then, it's ok to ignore memcg's refcnt.
+         */
+        if (!batch->memcg)
+                batch->memcg = mem;
+        /*
+         * In typical case, batch->memcg == mem. This means we can
+         * merge a series of uncharges to an uncharge of res_counter.
+         * If not, we uncharge res_counter ony by one.
+         */
+        if (batch->memcg != mem)
+                goto direct_uncharge;
+        /* remember freed charge and uncharge it later */
+        batch->bytes += PAGE_SIZE;
+        if (uncharge_memsw)
+                batch->memsw_bytes += PAGE_SIZE;
+        return;
+direct_uncharge:
+        res_counter_uncharge(&mem->res, PAGE_SIZE);
+        if (uncharge_memsw)
+                res_counter_uncharge(&mem->memsw, PAGE_SIZE);
+        return;
+}
 /*
 * uncharge if !page_mapped(page)
@@ -1875,12 +2045,8 @@ __mem_cgroup_uncharge_common(struct page *page, enum charge_type ctype)
                break;
        }
-        if (!mem_cgroup_is_root(mem)) {
+        if (!mem_cgroup_is_root(mem))
-                res_counter_uncharge(&mem->res, PAGE_SIZE);
+                __do_uncharge(mem, ctype);
-                if (do_swap_account &&
-                                (ctype != MEM_CGROUP_CHARGE_TYPE_SWAPOUT))
-                        res_counter_uncharge(&mem->memsw, PAGE_SIZE);
-        }
        if (ctype == MEM_CGROUP_CHARGE_TYPE_SWAPOUT)
                mem_cgroup_swap_statistics(mem, true);
        mem_cgroup_charge_statistics(mem, pc, false);
@@ -1926,6 +2092,50 @@ void mem_cgroup_uncharge_cache_page(struct page *page)
        __mem_cgroup_uncharge_common(page, MEM_CGROUP_CHARGE_TYPE_CACHE);
 }
+/*
+ * Batch_start/batch_end is called in unmap_page_range/invlidate/trucate.
+ * In that cases, pages are freed continuously and we can expect pages
+ * are in the same memcg. All these calls itself limits the number of
+ * pages freed at once, then uncharge_start/end() is called properly.
+ * This may be called prural(2) times in a context,
+ */
+void mem_cgroup_uncharge_start(void)
+{
+        current->memcg_batch.do_batch++;
+        /* We can do nest. */
+        if (current->memcg_batch.do_batch == 1) {
+                current->memcg_batch.memcg = NULL;
+                current->memcg_batch.bytes = 0;
+                current->memcg_batch.memsw_bytes = 0;
+        }
+}
+void mem_cgroup_uncharge_end(void)
+{
+        struct memcg_batch_info *batch = &current->memcg_batch;
+        if (!batch->do_batch)
+                return;
+        batch->do_batch--;
+        if (batch->do_batch) /* If stacked, do nothing. */
+                return;
+        if (!batch->memcg)
+                return;
+        /*
+         * This "batch->memcg" is valid without any css_get/put etc...
+         * bacause we hide charges behind us.
+         */
+        if (batch->bytes)
+                res_counter_uncharge(&batch->memcg->res, batch->bytes);
+        if (batch->memsw_bytes)
+                res_counter_uncharge(&batch->memcg->memsw, batch->memsw_bytes);
+        /* forget this pointer (for sanity check) */
+        batch->memcg = NULL;
+}
 #ifdef CONFIG_SWAP
 /*
 * called after __delete_from_swap_cache() and drop "page" account.
@@ -2101,7 +2311,6 @@ static int mem_cgroup_resize_limit(struct mem_cgroup *memcg,
                                unsigned long long val)
 {
        int retry_count;
-        int progress;
        u64 memswlimit;
        int ret = 0;
        int children = mem_cgroup_count_children(memcg);
@@ -2145,8 +2354,7 @@ static int mem_cgroup_resize_limit(struct mem_cgroup *memcg,
                if (!ret)
                        break;
-                progress = mem_cgroup_hierarchical_reclaim(memcg, NULL,
+                mem_cgroup_hierarchical_reclaim(memcg, NULL, GFP_KERNEL,
-                                                GFP_KERNEL,
                                                MEM_CGROUP_RECLAIM_SHRINK);
                curusage = res_counter_read_u64(&memcg->res, RES_USAGE);
                /* Usage is reduced ? */
@@ -2385,6 +2593,7 @@ move_account:
                        goto out;
                /* This is for making all *used* pages to be on LRU. */
                lru_add_drain_all();
+                drain_all_stock_sync();
                ret = 0;
                for_each_node_state(node, N_HIGH_MEMORY) {
                        for (zid = 0; !ret && zid < MAX_NR_ZONES; zid++) {
@@ -2542,6 +2751,7 @@ static u64 mem_cgroup_read(struct cgroup *cont, struct cftype *cft)
                        val += idx_val;
                        mem_cgroup_get_recursive_idx_stat(mem,
                                MEM_CGROUP_STAT_SWAPOUT, &idx_val);
+                        val += idx_val;
                        val <<= PAGE_SHIFT;
                } else
                        val = res_counter_read_u64(&mem->memsw, name);
@@ -2661,7 +2871,7 @@ static int mem_cgroup_reset(struct cgroup *cont, unsigned int event)
 enum {
        MCS_CACHE,
        MCS_RSS,
-        MCS_MAPPED_FILE,
+        MCS_FILE_MAPPED,
        MCS_PGPGIN,
        MCS_PGPGOUT,
        MCS_SWAP,
@@ -2705,8 +2915,8 @@ static int mem_cgroup_get_local_stat(struct mem_cgroup *mem, void *data)
        s->stat[MCS_CACHE] += val * PAGE_SIZE;
        val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_RSS);
        s->stat[MCS_RSS] += val * PAGE_SIZE;
-        val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_MAPPED_FILE);
+        val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_FILE_MAPPED);
-        s->stat[MCS_MAPPED_FILE] += val * PAGE_SIZE;
+        s->stat[MCS_FILE_MAPPED] += val * PAGE_SIZE;
        val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_PGPGIN_COUNT);
        s->stat[MCS_PGPGIN] += val;
        val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_PGPGOUT_COUNT);
@@ -3098,11 +3308,18 @@ mem_cgroup_create(struct cgroup_subsys *ss, struct cgroup *cont)
        /* root ? */
        if (cont->parent == NULL) {
+                int cpu;
                enable_swap_cgroup();
                parent = NULL;
                root_mem_cgroup = mem;
                if (mem_cgroup_soft_limit_tree_init())
                        goto free_out;
+                for_each_possible_cpu(cpu) {
+                        struct memcg_stock_pcp *stock =
+                                                &per_cpu(memcg_stock, cpu);
+                        INIT_WORK(&stock->work, drain_local_stock);
+                }
+                hotcpu_notifier(memcg_stock_cpu_callback, 0);
        } else {
                parent = mem_cgroup_from_cont(cont->parent);
@@ -3171,12 +3388,10 @@ static void mem_cgroup_move_task(struct cgroup_subsys *ss,
                                struct task_struct *p,
                                bool threadgroup)
 {
-        mutex_lock(&memcg_tasklist);
        /*
         * FIXME: It's better to move charges of this process from old
         * memcg to new memcg. But it's just on TODO-List now.
         */
-        mutex_unlock(&memcg_tasklist);
 }
 struct cgroup_subsys mem_cgroup_subsys = {
diff --git a/mm/memory.c b/mm/memory.c
index a54b2c498444..aed45eaf8ac9 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -956,6 +956,7 @@ static unsigned long unmap_page_range(struct mmu_gather *tlb,
                details = NULL;
        BUG_ON(addr >= end);
+        mem_cgroup_uncharge_start();
        tlb_start_vma(tlb, vma);
        pgd = pgd_offset(vma->vm_mm, addr);
        do {
@@ -968,6 +969,7 @@ static unsigned long unmap_page_range(struct mmu_gather *tlb,
                                                zap_work, details);
        } while (pgd++, addr = next, (addr != end && *zap_work > 0));
        tlb_end_vma(tlb, vma);
+        mem_cgroup_uncharge_end();
        return addr;
 }
diff --git a/mm/oom_kill.c b/mm/oom_kill.c
index 492c98624fc1..f52481b1c1e5 100644
--- a/mm/oom_kill.c
+++ b/mm/oom_kill.c
@@ -196,27 +196,46 @@ unsigned long badness(struct task_struct *p, unsigned long uptime)
 /*
 * Determine the type of allocation constraint.
 */
-static inline enum oom_constraint constrained_alloc(struct zonelist *zonelist,
-                                                    gfp_t gfp_mask)
-{
 #ifdef CONFIG_NUMA
+static enum oom_constraint constrained_alloc(struct zonelist *zonelist,
+                                    gfp_t gfp_mask, nodemask_t *nodemask)
+{
        struct zone *zone;
        struct zoneref *z;
        enum zone_type high_zoneidx = gfp_zone(gfp_mask);
-        nodemask_t nodes = node_states[N_HIGH_MEMORY];
-        for_each_zone_zonelist(zone, z, zonelist, high_zoneidx)
+        /*
-                if (cpuset_zone_allowed_softwall(zone, gfp_mask))
+         * Reach here only when __GFP_NOFAIL is used. So, we should avoid
-                        node_clear(zone_to_nid(zone), nodes);
+         * to kill current.We have to random task kill in this case.
-                else
+         * Hopefully, CONSTRAINT_THISNODE...but no way to handle it, now.
-                        return CONSTRAINT_CPUSET;
+         */
+        if (gfp_mask & __GFP_THISNODE)
+                return CONSTRAINT_NONE;
-        if (!nodes_empty(nodes))
+        /*
+         * The nodemask here is a nodemask passed to alloc_pages(). Now,
+         * cpuset doesn't use this nodemask for its hardwall/softwall/hierarchy
+         * feature. mempolicy is an only user of nodemask here.
+         * check mempolicy's nodemask contains all N_HIGH_MEMORY
+         */
+        if (nodemask && !nodes_subset(node_states[N_HIGH_MEMORY], *nodemask))
                return CONSTRAINT_MEMORY_POLICY;
-#endif
+        /* Check this allocation failure is caused by cpuset's wall function */
+        for_each_zone_zonelist_nodemask(zone, z, zonelist,
+                        high_zoneidx, nodemask)
+                if (!cpuset_zone_allowed_softwall(zone, gfp_mask))
+                        return CONSTRAINT_CPUSET;
        return CONSTRAINT_NONE;
 }
+#else
+static enum oom_constraint constrained_alloc(struct zonelist *zonelist,
+                                gfp_t gfp_mask, nodemask_t *nodemask)
+{
+        return CONSTRAINT_NONE;
+}
+#endif
 /*
 * Simple selection loop. We chose the process with the highest
@@ -337,7 +356,8 @@ static void dump_tasks(const struct mem_cgroup *mem)
        } while_each_thread(g, p);
 }
-static void dump_header(gfp_t gfp_mask, int order, struct mem_cgroup *mem)
+static void dump_header(struct task_struct *p, gfp_t gfp_mask, int order,
+                                                        struct mem_cgroup *mem)
 {
        pr_warning("%s invoked oom-killer: gfp_mask=0x%x, order=%d, "
                "oom_adj=%d\n",
@@ -346,12 +366,14 @@ static void dump_header(gfp_t gfp_mask, int order, struct mem_cgroup *mem)
        cpuset_print_task_mems_allowed(current);
        task_unlock(current);
        dump_stack();
-        mem_cgroup_print_oom_info(mem, current);
+        mem_cgroup_print_oom_info(mem, p);
        show_mem();
        if (sysctl_oom_dump_tasks)
                dump_tasks(mem);
 }
+#define K(x) ((x) << (PAGE_SHIFT-10))
 /*
 * Send SIGKILL to the selected  process irrespective of  CAP_SYS_RAW_IO
 * flag though it's unlikely that  we select a process with CAP_SYS_RAW_IO
@@ -365,15 +387,23 @@ static void __oom_kill_task(struct task_struct *p, int verbose)
                return;
        }
+        task_lock(p);
        if (!p->mm) {
                WARN_ON(1);
-                printk(KERN_WARNING "tried to kill an mm-less task!\n");
+                printk(KERN_WARNING "tried to kill an mm-less task %d (%s)!\n",
+                        task_pid_nr(p), p->comm);
+                task_unlock(p);
                return;
        }
        if (verbose)
-                printk(KERN_ERR "Killed process %d (%s)\n",
+                printk(KERN_ERR "Killed process %d (%s) "
-                                task_pid_nr(p), p->comm);
+                       "vsz:%lukB, anon-rss:%lukB, file-rss:%lukB\n",
+                       task_pid_nr(p), p->comm,
+                       K(p->mm->total_vm),
+                       K(get_mm_counter(p->mm, anon_rss)),
+                       K(get_mm_counter(p->mm, file_rss)));
+        task_unlock(p);
        /*
         * We give our sacrificial lamb high priority and access to
@@ -411,7 +441,7 @@ static int oom_kill_process(struct task_struct *p, gfp_t gfp_mask, int order,
        struct task_struct *c;
        if (printk_ratelimit())
-                dump_header(gfp_mask, order, mem);
+                dump_header(p, gfp_mask, order, mem);
        /*
         * If the task is already exiting, don't alarm the sysadmin or kill
@@ -547,7 +577,7 @@ retry:
        /* Found nothing?!?! Either we hang forever, or we panic. */
        if (!p) {
                read_unlock(&tasklist_lock);
-                dump_header(gfp_mask, order, NULL);
+                dump_header(NULL, gfp_mask, order, NULL);
                panic("Out of memory and no killable processes...\n");
        }
@@ -603,7 +633,8 @@ rest_and_return:
 * OR try to be smart about which process to kill. Note that we
 * don't have to be perfect here, we just have to be good.
 */
-void out_of_memory(struct zonelist *zonelist, gfp_t gfp_mask, int order)
+void out_of_memory(struct zonelist *zonelist, gfp_t gfp_mask,
+                int order, nodemask_t *nodemask)
 {
        unsigned long freed = 0;
        enum oom_constraint constraint;
@@ -614,7 +645,7 @@ void out_of_memory(struct zonelist *zonelist, gfp_t gfp_mask, int order)
                return;
        if (sysctl_panic_on_oom == 2) {
-                dump_header(gfp_mask, order, NULL);
+                dump_header(NULL, gfp_mask, order, NULL);
                panic("out of memory. Compulsory panic_on_oom is selected.\n");
        }
@@ -622,7 +653,7 @@ void out_of_memory(struct zonelist *zonelist, gfp_t gfp_mask, int order)
         * Check if there were limitations on the allocation (only relevant for
         * NUMA) that may require different handling.
         */
-        constraint = constrained_alloc(zonelist, gfp_mask);
+        constraint = constrained_alloc(zonelist, gfp_mask, nodemask);
        read_lock(&tasklist_lock);
        switch (constraint) {
@@ -633,7 +664,7 @@ void out_of_memory(struct zonelist *zonelist, gfp_t gfp_mask, int order)
        case CONSTRAINT_NONE:
                if (sysctl_panic_on_oom) {
-                        dump_header(gfp_mask, order, NULL);
+                        dump_header(NULL, gfp_mask, order, NULL);
                        panic("out of memory. panic_on_oom is selected\n");
                }
                /* Fall-through */
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index 59d2e88fb47c..850c4a7e2fe5 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -1654,12 +1654,22 @@ __alloc_pages_may_oom(gfp_t gfp_mask, unsigned int order,
        if (page)
                goto out;
-        /* The OOM killer will not help higher order allocs */
+        if (!(gfp_mask & __GFP_NOFAIL)) {
-        if (order > PAGE_ALLOC_COSTLY_ORDER && !(gfp_mask & __GFP_NOFAIL))
+                /* The OOM killer will not help higher order allocs */
-                goto out;
+                if (order > PAGE_ALLOC_COSTLY_ORDER)
+                        goto out;
+                /*
+                 * GFP_THISNODE contains __GFP_NORETRY and we never hit this.
+                 * Sanity check for bare calls of __GFP_THISNODE, not real OOM.
+                 * The caller should handle page allocation failure by itself if
+                 * it specifies __GFP_THISNODE.
+                 * Note: Hugepage uses it but will hit PAGE_ALLOC_COSTLY_ORDER.
+                 */
+                if (gfp_mask & __GFP_THISNODE)
+                        goto out;
+        }
        /* Exhausted what can be done so it's blamo time */
-        out_of_memory(zonelist, gfp_mask, order);
+        out_of_memory(zonelist, gfp_mask, order, nodemask);
 out:
        clear_zonelist_oom(zonelist, gfp_mask);
@@ -3123,7 +3133,7 @@ static int __cpuinit process_zones(int cpu)
                if (percpu_pagelist_fraction)
                        setup_pagelist_highmark(zone_pcp(zone, cpu),
-                                (zone->present_pages / percpu_pagelist_fraction));
+                            (zone->present_pages / percpu_pagelist_fraction));
        }
        return 0;
diff --git a/mm/rmap.c b/mm/rmap.c
index 98135dbd25ba..278cd277bdec 100644
--- a/mm/rmap.c
+++ b/mm/rmap.c
@@ -721,7 +721,7 @@ void page_add_file_rmap(struct page *page)
 {
        if (atomic_inc_and_test(&page->_mapcount)) {
                __inc_zone_page_state(page, NR_FILE_MAPPED);
-                mem_cgroup_update_mapped_file_stat(page, 1);
+                mem_cgroup_update_file_mapped(page, 1);
        }
 }
@@ -753,8 +753,8 @@ void page_remove_rmap(struct page *page)
                __dec_zone_page_state(page, NR_ANON_PAGES);
        } else {
                __dec_zone_page_state(page, NR_FILE_MAPPED);
+                mem_cgroup_update_file_mapped(page, -1);
        }
-        mem_cgroup_update_mapped_file_stat(page, -1);
        /*
         * It would be tidy to reset the PageAnon mapping here,
         * but that might overwrite a racing page_add_anon_rmap
diff --git a/mm/truncate.c b/mm/truncate.c
index 2c147a7e5f2c..342deee22684 100644
--- a/mm/truncate.c
+++ b/mm/truncate.c
@@ -272,6 +272,7 @@ void truncate_inode_pages_range(struct address_space *mapping,
                        pagevec_release(&pvec);
                        break;
                }
+                mem_cgroup_uncharge_start();
                for (i = 0; i < pagevec_count(&pvec); i++) {
                        struct page *page = pvec.pages[i];
@@ -286,6 +287,7 @@ void truncate_inode_pages_range(struct address_space *mapping,
                        unlock_page(page);
                }
                pagevec_release(&pvec);
+                mem_cgroup_uncharge_end();
        }
 }
 EXPORT_SYMBOL(truncate_inode_pages_range);
@@ -327,6 +329,7 @@ unsigned long invalidate_mapping_pages(struct address_space *mapping,
        pagevec_init(&pvec, 0);
        while (next <= end &&
                        pagevec_lookup(&pvec, mapping, next, PAGEVEC_SIZE)) {
+                mem_cgroup_uncharge_start();
                for (i = 0; i < pagevec_count(&pvec); i++) {
                        struct page *page = pvec.pages[i];
                        pgoff_t index;
@@ -354,6 +357,7 @@ unsigned long invalidate_mapping_pages(struct address_space *mapping,
                                break;
                }
                pagevec_release(&pvec);
+                mem_cgroup_uncharge_end();
                cond_resched();
        }
        return ret;
@@ -428,6 +432,7 @@ int invalidate_inode_pages2_range(struct address_space *mapping,
        while (next <= end && !wrapped &&
                pagevec_lookup(&pvec, mapping, next,
                        min(end - next, (pgoff_t)PAGEVEC_SIZE - 1) + 1)) {
+                mem_cgroup_uncharge_start();
                for (i = 0; i < pagevec_count(&pvec); i++) {
                        struct page *page = pvec.pages[i];
                        pgoff_t page_index;
@@ -477,6 +482,7 @@ int invalidate_inode_pages2_range(struct address_space *mapping,
                        unlock_page(page);
                }
                pagevec_release(&pvec);
+                mem_cgroup_uncharge_end();
                cond_resched();
        }
        return ret;
diff --git a/net/core/dev.c b/net/core/dev.c
index 6fe7d739e59b..be9924f60ec3 100644
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -5035,6 +5035,11 @@ int register_netdevice(struct net_device *dev)
                rollback_registered(dev);
                dev->reg_state = NETREG_UNREGISTERED;
        }
+        /*
+         *      Prevent userspace races by waiting until the network
+         *      device is fully setup before sending notifications.
+         */
+        rtmsg_ifinfo(RTM_NEWLINK, dev, ~0U);
 out:
        return ret;
@@ -5597,6 +5602,12 @@ int dev_change_net_namespace(struct net_device *dev, struct net *net, const char
        /* Notify protocols, that a new device appeared. */
        call_netdevice_notifiers(NETDEV_REGISTER, dev);
+        /*
+         *      Prevent userspace races by waiting until the network
+         *      device is fully setup before sending notifications.
+         */
+        rtmsg_ifinfo(RTM_NEWLINK, dev, ~0U);
        synchronize_net();
        err = 0;
 out:
diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c
index 33148a568199..794bcb897ff0 100644
--- a/net/core/rtnetlink.c
+++ b/net/core/rtnetlink.c
@@ -1364,15 +1364,15 @@ static int rtnetlink_event(struct notifier_block *this, unsigned long event, voi
        case NETDEV_UNREGISTER:
                rtmsg_ifinfo(RTM_DELLINK, dev, ~0U);
                break;
-        case NETDEV_REGISTER:
-                rtmsg_ifinfo(RTM_NEWLINK, dev, ~0U);
-                break;
        case NETDEV_UP:
        case NETDEV_DOWN:
                rtmsg_ifinfo(RTM_NEWLINK, dev, IFF_UP|IFF_RUNNING);
                break;
+        case NETDEV_POST_INIT:
+        case NETDEV_REGISTER:
        case NETDEV_CHANGE:
        case NETDEV_GOING_DOWN:
+        case NETDEV_UNREGISTER_BATCH:
                break;
        default:
                rtmsg_ifinfo(RTM_NEWLINK, dev, 0);
diff --git a/net/core/skbuff.c b/net/core/skbuff.c
index bfa3e7865a8c..93c4e060c91e 100644
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -93,7 +93,7 @@ static int sock_pipe_buf_steal(struct pipe_inode_info *pipe,
 /* Pipe buffer operations for a socket. */
-static struct pipe_buf_operations sock_pipe_buf_ops = {
+static const struct pipe_buf_operations sock_pipe_buf_ops = {
        .can_merge = 0,
        .map = generic_pipe_buf_map,
        .unmap = generic_pipe_buf_unmap,
diff --git a/net/ipv4/Kconfig b/net/ipv4/Kconfig
index 70491d9035eb..0c94a1ac2946 100644
--- a/net/ipv4/Kconfig
+++ b/net/ipv4/Kconfig
@@ -166,7 +166,7 @@ config IP_PNP_DHCP
          If unsure, say Y. Note that if you want to use DHCP, a DHCP server
          must be operating on your network.  Read
-          <file:Documentation/filesystems/nfsroot.txt> for details.
+          <file:Documentation/filesystems/nfs/nfsroot.txt> for details.
 config IP_PNP_BOOTP
        bool "IP: BOOTP support"
@@ -181,7 +181,7 @@ config IP_PNP_BOOTP
          does BOOTP itself, providing all necessary information on the kernel
          command line, you can say N here. If unsure, say Y. Note that if you
          want to use BOOTP, a BOOTP server must be operating on your network.
-          Read <file:Documentation/filesystems/nfsroot.txt> for details.
+          Read <file:Documentation/filesystems/nfs/nfsroot.txt> for details.
 config IP_PNP_RARP
        bool "IP: RARP support"
@@ -194,7 +194,7 @@ config IP_PNP_RARP
          older protocol which is being obsoleted by BOOTP and DHCP), say Y
          here. Note that if you want to use RARP, a RARP server must be
          operating on your network. Read
-          <file:Documentation/filesystems/nfsroot.txt> for details.
+          <file:Documentation/filesystems/nfs/nfsroot.txt> for details.
 # not yet ready..
 #   bool '    IP: ARP support' CONFIG_IP_PNP_ARP
diff --git a/net/ipv4/ipconfig.c b/net/ipv4/ipconfig.c
index 4e08b7f2331c..10a6a604bf32 100644
--- a/net/ipv4/ipconfig.c
+++ b/net/ipv4/ipconfig.c
@@ -1446,7 +1446,7 @@ late_initcall(ip_auto_config);
 /*
 *  Decode any IP configuration options in the "ip=" or "nfsaddrs=" kernel
- *  command line parameter.  See Documentation/filesystems/nfsroot.txt.
+ *  command line parameter.  See Documentation/filesystems/nfs/nfsroot.txt.
 */
 static int __init ic_proto_name(char *name)
 {
diff --git a/net/ipv4/netfilter/nf_defrag_ipv4.c b/net/ipv4/netfilter/nf_defrag_ipv4.c
index fa2d6b6fc3e5..331ead3ebd1b 100644
--- a/net/ipv4/netfilter/nf_defrag_ipv4.c
+++ b/net/ipv4/netfilter/nf_defrag_ipv4.c
@@ -14,6 +14,7 @@
 #include <net/route.h>
 #include <net/ip.h>
+#include <linux/netfilter_bridge.h>
 #include <linux/netfilter_ipv4.h>
 #include <net/netfilter/ipv4/nf_defrag_ipv4.h>
@@ -34,6 +35,20 @@ static int nf_ct_ipv4_gather_frags(struct sk_buff *skb, u_int32_t user)
        return err;
 }
+static enum ip_defrag_users nf_ct_defrag_user(unsigned int hooknum,
+                                              struct sk_buff *skb)
+{
+#ifdef CONFIG_BRIDGE_NETFILTER
+        if (skb->nf_bridge &&
+            skb->nf_bridge->mask & BRNF_NF_BRIDGE_PREROUTING)
+                return IP_DEFRAG_CONNTRACK_BRIDGE_IN;
+#endif
+        if (hooknum == NF_INET_PRE_ROUTING)
+                return IP_DEFRAG_CONNTRACK_IN;
+        else
+                return IP_DEFRAG_CONNTRACK_OUT;
+}
 static unsigned int ipv4_conntrack_defrag(unsigned int hooknum,
                                          struct sk_buff *skb,
                                          const struct net_device *in,
@@ -50,10 +65,8 @@ static unsigned int ipv4_conntrack_defrag(unsigned int hooknum,
 #endif
        /* Gather fragments. */
        if (ip_hdr(skb)->frag_off & htons(IP_MF | IP_OFFSET)) {
-                if (nf_ct_ipv4_gather_frags(skb,
+                enum ip_defrag_users user = nf_ct_defrag_user(hooknum, skb);
-                                            hooknum == NF_INET_PRE_ROUTING ?
+                if (nf_ct_ipv4_gather_frags(skb, user))
-                                            IP_DEFRAG_CONNTRACK_IN :
-                                            IP_DEFRAG_CONNTRACK_OUT))
                        return NF_STOLEN;
        }
        return NF_ACCEPT;
diff --git a/net/ipv4/syncookies.c b/net/ipv4/syncookies.c
index 26399ad2a289..66fd80ef2473 100644
--- a/net/ipv4/syncookies.c
+++ b/net/ipv4/syncookies.c
@@ -277,6 +277,13 @@ struct sock *cookie_v4_check(struct sock *sk, struct sk_buff *skb,
        NET_INC_STATS_BH(sock_net(sk), LINUX_MIB_SYNCOOKIESRECV);
+        /* check for timestamp cookie support */
+        memset(&tcp_opt, 0, sizeof(tcp_opt));
+        tcp_parse_options(skb, &tcp_opt, &hash_location, 0);
+        if (tcp_opt.saw_tstamp)
+                cookie_check_timestamp(&tcp_opt);
        ret = NULL;
        req = inet_reqsk_alloc(&tcp_request_sock_ops); /* for safety */
        if (!req)
@@ -292,6 +299,12 @@ struct sock *cookie_v4_check(struct sock *sk, struct sk_buff *skb,
        ireq->loc_addr          = ip_hdr(skb)->daddr;
        ireq->rmt_addr          = ip_hdr(skb)->saddr;
        ireq->ecn_ok            = 0;
+        ireq->snd_wscale        = tcp_opt.snd_wscale;
+        ireq->rcv_wscale        = tcp_opt.rcv_wscale;
+        ireq->sack_ok           = tcp_opt.sack_ok;
+        ireq->wscale_ok         = tcp_opt.wscale_ok;
+        ireq->tstamp_ok         = tcp_opt.saw_tstamp;
+        req->ts_recent          = tcp_opt.saw_tstamp ? tcp_opt.rcv_tsval : 0;
        /* We throwed the options of the initial SYN away, so we hope
         * the ACK carries the same options again (see RFC1122 4.2.3.8)
@@ -340,20 +353,6 @@ struct sock *cookie_v4_check(struct sock *sk, struct sk_buff *skb,
                }
        }
-        /* check for timestamp cookie support */
-        memset(&tcp_opt, 0, sizeof(tcp_opt));
-        tcp_parse_options(skb, &tcp_opt, &hash_location, 0, &rt->u.dst);
-        if (tcp_opt.saw_tstamp)
-                cookie_check_timestamp(&tcp_opt);
-        ireq->snd_wscale        = tcp_opt.snd_wscale;
-        ireq->rcv_wscale        = tcp_opt.rcv_wscale;
-        ireq->sack_ok           = tcp_opt.sack_ok;
-        ireq->wscale_ok         = tcp_opt.wscale_ok;
-        ireq->tstamp_ok         = tcp_opt.saw_tstamp;
-        req->ts_recent          = tcp_opt.saw_tstamp ? tcp_opt.rcv_tsval : 0;
        /* Try to redo what tcp_v4_send_synack did. */
        req->window_clamp = tp->window_clamp ? :dst_metric(&rt->u.dst, RTAX_WINDOW);
diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index 12cab7d74dba..28e029632493 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -3727,7 +3727,7 @@ old_ack:
 * the fast version below fails.
 */
 void tcp_parse_options(struct sk_buff *skb, struct tcp_options_received *opt_rx,
-                       u8 **hvpp, int estab,  struct dst_entry *dst)
+                       u8 **hvpp, int estab)
 {
        unsigned char *ptr;
        struct tcphdr *th = tcp_hdr(skb);
@@ -3766,8 +3766,7 @@ void tcp_parse_options(struct sk_buff *skb, struct tcp_options_received *opt_rx,
                                break;
                        case TCPOPT_WINDOW:
                                if (opsize == TCPOLEN_WINDOW && th->syn &&
-                                    !estab && sysctl_tcp_window_scaling &&
+                                    !estab && sysctl_tcp_window_scaling) {
-                                    !dst_feature(dst, RTAX_FEATURE_NO_WSCALE)) {
                                        __u8 snd_wscale = *(__u8 *)ptr;
                                        opt_rx->wscale_ok = 1;
                                        if (snd_wscale > 14) {
@@ -3783,8 +3782,7 @@ void tcp_parse_options(struct sk_buff *skb, struct tcp_options_received *opt_rx,
                        case TCPOPT_TIMESTAMP:
                                if ((opsize == TCPOLEN_TIMESTAMP) &&
                                    ((estab && opt_rx->tstamp_ok) ||
-                                     (!estab && sysctl_tcp_timestamps &&
+                                     (!estab && sysctl_tcp_timestamps))) {
-                                      !dst_feature(dst, RTAX_FEATURE_NO_TSTAMP)))) {
                                        opt_rx->saw_tstamp = 1;
                                        opt_rx->rcv_tsval = get_unaligned_be32(ptr);
                                        opt_rx->rcv_tsecr = get_unaligned_be32(ptr + 4);
@@ -3792,8 +3790,7 @@ void tcp_parse_options(struct sk_buff *skb, struct tcp_options_received *opt_rx,
                                break;
                        case TCPOPT_SACK_PERM:
                                if (opsize == TCPOLEN_SACK_PERM && th->syn &&
-                                    !estab && sysctl_tcp_sack &&
+                                    !estab && sysctl_tcp_sack) {
-                                    !dst_feature(dst, RTAX_FEATURE_NO_SACK)) {
                                        opt_rx->sack_ok = 1;
                                        tcp_sack_reset(opt_rx);
                                }
@@ -3878,7 +3875,7 @@ static int tcp_fast_parse_options(struct sk_buff *skb, struct tcphdr *th,
                if (tcp_parse_aligned_timestamp(tp, th))
                        return 1;
        }
-        tcp_parse_options(skb, &tp->rx_opt, hvpp, 1, NULL);
+        tcp_parse_options(skb, &tp->rx_opt, hvpp, 1);
        return 1;
 }
@@ -4133,10 +4130,8 @@ static inline int tcp_sack_extend(struct tcp_sack_block *sp, u32 seq,
 static void tcp_dsack_set(struct sock *sk, u32 seq, u32 end_seq)
 {
        struct tcp_sock *tp = tcp_sk(sk);
-        struct dst_entry *dst = __sk_dst_get(sk);
-        if (tcp_is_sack(tp) && sysctl_tcp_dsack &&
+        if (tcp_is_sack(tp) && sysctl_tcp_dsack) {
-            !dst_feature(dst, RTAX_FEATURE_NO_DSACK)) {
                int mib_idx;
                if (before(seq, tp->rcv_nxt))
@@ -4165,15 +4160,13 @@ static void tcp_dsack_extend(struct sock *sk, u32 seq, u32 end_seq)
 static void tcp_send_dupack(struct sock *sk, struct sk_buff *skb)
 {
        struct tcp_sock *tp = tcp_sk(sk);
-        struct dst_entry *dst = __sk_dst_get(sk);
        if (TCP_SKB_CB(skb)->end_seq != TCP_SKB_CB(skb)->seq &&
            before(TCP_SKB_CB(skb)->seq, tp->rcv_nxt)) {
                NET_INC_STATS_BH(sock_net(sk), LINUX_MIB_DELAYEDACKLOST);
                tcp_enter_quickack_mode(sk);
-                if (tcp_is_sack(tp) && sysctl_tcp_dsack &&
+                if (tcp_is_sack(tp) && sysctl_tcp_dsack) {
-                    !dst_feature(dst, RTAX_FEATURE_NO_DSACK)) {
                        u32 end_seq = TCP_SKB_CB(skb)->end_seq;
                        if (after(TCP_SKB_CB(skb)->end_seq, tp->rcv_nxt))
@@ -5428,11 +5421,10 @@ static int tcp_rcv_synsent_state_process(struct sock *sk, struct sk_buff *skb,
        u8 *hash_location;
        struct inet_connection_sock *icsk = inet_csk(sk);
        struct tcp_sock *tp = tcp_sk(sk);
-        struct dst_entry *dst = __sk_dst_get(sk);
        struct tcp_cookie_values *cvp = tp->cookie_values;
        int saved_clamp = tp->rx_opt.mss_clamp;
-        tcp_parse_options(skb, &tp->rx_opt, &hash_location, 0, dst);
+        tcp_parse_options(skb, &tp->rx_opt, &hash_location, 0);
        if (th->ack) {
                /* rfc793:
diff --git a/net/ipv4/tcp_ipv4.c b/net/ipv4/tcp_ipv4.c
index 15e96030ce47..65b8ebfd078a 100644
--- a/net/ipv4/tcp_ipv4.c
+++ b/net/ipv4/tcp_ipv4.c
@@ -1262,20 +1262,10 @@ int tcp_v4_conn_request(struct sock *sk, struct sk_buff *skb)
        tcp_rsk(req)->af_specific = &tcp_request_sock_ipv4_ops;
 #endif
-        ireq = inet_rsk(req);
-        ireq->loc_addr = daddr;
-        ireq->rmt_addr = saddr;
-        ireq->no_srccheck = inet_sk(sk)->transparent;
-        ireq->opt = tcp_v4_save_options(sk, skb);
-        dst = inet_csk_route_req(sk, req);
-        if(!dst)
-                goto drop_and_free;
        tcp_clear_options(&tmp_opt);
        tmp_opt.mss_clamp = TCP_MSS_DEFAULT;
        tmp_opt.user_mss  = tp->rx_opt.user_mss;
-        tcp_parse_options(skb, &tmp_opt, &hash_location, 0, dst);
+        tcp_parse_options(skb, &tmp_opt, &hash_location, 0);
        if (tmp_opt.cookie_plus > 0 &&
            tmp_opt.saw_tstamp &&
@@ -1319,8 +1309,14 @@ int tcp_v4_conn_request(struct sock *sk, struct sk_buff *skb)
        tmp_opt.tstamp_ok = tmp_opt.saw_tstamp;
        tcp_openreq_init(req, &tmp_opt, skb);
+        ireq = inet_rsk(req);
+        ireq->loc_addr = daddr;
+        ireq->rmt_addr = saddr;
+        ireq->no_srccheck = inet_sk(sk)->transparent;
+        ireq->opt = tcp_v4_save_options(sk, skb);
        if (security_inet_conn_request(sk, skb, req))
-                goto drop_and_release;
+                goto drop_and_free;
        if (!want_cookie)
                TCP_ECN_create_request(req, tcp_hdr(skb));
@@ -1345,6 +1341,7 @@ int tcp_v4_conn_request(struct sock *sk, struct sk_buff *skb)
                 */
                if (tmp_opt.saw_tstamp &&
                    tcp_death_row.sysctl_tw_recycle &&
+                    (dst = inet_csk_route_req(sk, req)) != NULL &&
                    (peer = rt_get_peer((struct rtable *)dst)) != NULL &&
                    peer->v4daddr == saddr) {
                        if ((u32)get_seconds() - peer->tcp_ts_stamp < TCP_PAWS_MSL &&
diff --git a/net/ipv4/tcp_minisocks.c b/net/ipv4/tcp_minisocks.c
index 87accec8d097..f206ee5dda80 100644
--- a/net/ipv4/tcp_minisocks.c
+++ b/net/ipv4/tcp_minisocks.c
@@ -95,9 +95,9 @@ tcp_timewait_state_process(struct inet_timewait_sock *tw, struct sk_buff *skb,
        struct tcp_timewait_sock *tcptw = tcp_twsk((struct sock *)tw);
        int paws_reject = 0;
+        tmp_opt.saw_tstamp = 0;
        if (th->doff > (sizeof(*th) >> 2) && tcptw->tw_ts_recent_stamp) {
-                tmp_opt.tstamp_ok = 1;
+                tcp_parse_options(skb, &tmp_opt, &hash_location, 0);
-                tcp_parse_options(skb, &tmp_opt, &hash_location, 1, NULL);
                if (tmp_opt.saw_tstamp) {
                        tmp_opt.ts_recent       = tcptw->tw_ts_recent;
@@ -526,9 +526,9 @@ struct sock *tcp_check_req(struct sock *sk, struct sk_buff *skb,
        __be32 flg = tcp_flag_word(th) & (TCP_FLAG_RST|TCP_FLAG_SYN|TCP_FLAG_ACK);
        int paws_reject = 0;
-        if ((th->doff > (sizeof(*th) >> 2)) && (req->ts_recent)) {
+        tmp_opt.saw_tstamp = 0;
-                tmp_opt.tstamp_ok = 1;
+        if (th->doff > (sizeof(struct tcphdr)>>2)) {
-                tcp_parse_options(skb, &tmp_opt, &hash_location, 1, NULL);
+                tcp_parse_options(skb, &tmp_opt, &hash_location, 0);
                if (tmp_opt.saw_tstamp) {
                        tmp_opt.ts_recent = req->ts_recent;
diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c
index 93316a96d820..383ce237640f 100644
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -553,7 +553,6 @@ static unsigned tcp_syn_options(struct sock *sk, struct sk_buff *skb,
                                struct tcp_md5sig_key **md5) {
        struct tcp_sock *tp = tcp_sk(sk);
        struct tcp_cookie_values *cvp = tp->cookie_values;
-        struct dst_entry *dst = __sk_dst_get(sk);
        unsigned remaining = MAX_TCP_OPTION_SPACE;
        u8 cookie_size = (!tp->rx_opt.cookie_out_never && cvp != NULL) ?
                         tcp_cookie_size_check(cvp->cookie_desired) :
@@ -581,22 +580,18 @@ static unsigned tcp_syn_options(struct sock *sk, struct sk_buff *skb,
        opts->mss = tcp_advertise_mss(sk);
        remaining -= TCPOLEN_MSS_ALIGNED;
-        if (likely(sysctl_tcp_timestamps &&
+        if (likely(sysctl_tcp_timestamps && *md5 == NULL)) {
-                   !dst_feature(dst, RTAX_FEATURE_NO_TSTAMP) &&
-                   *md5 == NULL)) {
                opts->options |= OPTION_TS;
                opts->tsval = TCP_SKB_CB(skb)->when;
                opts->tsecr = tp->rx_opt.ts_recent;
                remaining -= TCPOLEN_TSTAMP_ALIGNED;
        }
-        if (likely(sysctl_tcp_window_scaling &&
+        if (likely(sysctl_tcp_window_scaling)) {
-                   !dst_feature(dst, RTAX_FEATURE_NO_WSCALE))) {
                opts->ws = tp->rx_opt.rcv_wscale;
                opts->options |= OPTION_WSCALE;
                remaining -= TCPOLEN_WSCALE_ALIGNED;
        }
-        if (likely(sysctl_tcp_sack &&
+        if (likely(sysctl_tcp_sack)) {
-                   !dst_feature(dst, RTAX_FEATURE_NO_SACK))) {
                opts->options |= OPTION_SACK_ADVERTISE;
                if (unlikely(!(OPTION_TS & opts->options)))
                        remaining -= TCPOLEN_SACKPERM_ALIGNED;
@@ -2527,9 +2522,7 @@ static void tcp_connect_init(struct sock *sk)
         * See tcp_input.c:tcp_rcv_state_process case TCP_SYN_SENT.
         */
        tp->tcp_header_len = sizeof(struct tcphdr) +
-                (sysctl_tcp_timestamps &&
+                (sysctl_tcp_timestamps ? TCPOLEN_TSTAMP_ALIGNED : 0);
-                (!dst_feature(dst, RTAX_FEATURE_NO_TSTAMP) ?
-                  TCPOLEN_TSTAMP_ALIGNED : 0));
 #ifdef CONFIG_TCP_MD5SIG
        if (tp->af_specific->md5_lookup(sk, sk) != NULL)
@@ -2555,8 +2548,7 @@ static void tcp_connect_init(struct sock *sk)
                                  tp->advmss - (tp->rx_opt.ts_recent_stamp ? tp->tcp_header_len - sizeof(struct tcphdr) : 0),
                                  &tp->rcv_wnd,
                                  &tp->window_clamp,
-                                  (sysctl_tcp_window_scaling &&
+                                  sysctl_tcp_window_scaling,
-                                   !dst_feature(dst, RTAX_FEATURE_NO_WSCALE)),
                                  &rcv_wscale);
        tp->rx_opt.rcv_wscale = rcv_wscale;
diff --git a/net/ipv4/udp.c b/net/ipv4/udp.c
index 1f9534846ca9..f0126fdd7e04 100644
--- a/net/ipv4/udp.c
+++ b/net/ipv4/udp.c
@@ -216,9 +216,8 @@ int udp_lib_get_port(struct sock *sk, unsigned short snum,
                 * force rand to be an odd multiple of UDP_HTABLE_SIZE
                 */
                rand = (rand | 1) * (udptable->mask + 1);
-                for (last = first + udptable->mask + 1;
+                last = first + udptable->mask + 1;
-                     first != last;
+                do {
-                     first++) {
                        hslot = udp_hashslot(udptable, net, first);
                        bitmap_zero(bitmap, PORTS_PER_CHAIN);
                        spin_lock_bh(&hslot->lock);
@@ -238,7 +237,7 @@ int udp_lib_get_port(struct sock *sk, unsigned short snum,
                                snum += rand;
                        } while (snum != first);
                        spin_unlock_bh(&hslot->lock);
-                }
+                } while (++first != last);
                goto fail;
        } else {
                hslot = udp_hashslot(udptable, net, snum);
diff --git a/net/ipv6/netfilter/nf_conntrack_l3proto_ipv6.c b/net/ipv6/netfilter/nf_conntrack_l3proto_ipv6.c
index 5f2ec208a8c3..0956ebabbff2 100644
--- a/net/ipv6/netfilter/nf_conntrack_l3proto_ipv6.c
+++ b/net/ipv6/netfilter/nf_conntrack_l3proto_ipv6.c
@@ -20,6 +20,7 @@
 #include <net/ipv6.h>
 #include <net/inet_frag.h>
+#include <linux/netfilter_bridge.h>
 #include <linux/netfilter_ipv6.h>
 #include <net/netfilter/nf_conntrack.h>
 #include <net/netfilter/nf_conntrack_helper.h>
@@ -187,6 +188,21 @@ out:
        return nf_conntrack_confirm(skb);
 }
+static enum ip6_defrag_users nf_ct6_defrag_user(unsigned int hooknum,
+                                                struct sk_buff *skb)
+{
+#ifdef CONFIG_BRIDGE_NETFILTER
+        if (skb->nf_bridge &&
+            skb->nf_bridge->mask & BRNF_NF_BRIDGE_PREROUTING)
+                return IP6_DEFRAG_CONNTRACK_BRIDGE_IN;
+#endif
+        if (hooknum == NF_INET_PRE_ROUTING)
+                return IP6_DEFRAG_CONNTRACK_IN;
+        else
+                return IP6_DEFRAG_CONNTRACK_OUT;
+}
 static unsigned int ipv6_defrag(unsigned int hooknum,
                                struct sk_buff *skb,
                                const struct net_device *in,
@@ -199,8 +215,7 @@ static unsigned int ipv6_defrag(unsigned int hooknum,
        if (skb->nfct)
                return NF_ACCEPT;
-        reasm = nf_ct_frag6_gather(skb);
+        reasm = nf_ct_frag6_gather(skb, nf_ct6_defrag_user(hooknum, skb));
        /* queued */
        if (reasm == NULL)
                return NF_STOLEN;
diff --git a/net/ipv6/netfilter/nf_conntrack_reasm.c b/net/ipv6/netfilter/nf_conntrack_reasm.c
index e0b9424fa1b2..312c20adc83f 100644
--- a/net/ipv6/netfilter/nf_conntrack_reasm.c
+++ b/net/ipv6/netfilter/nf_conntrack_reasm.c
@@ -168,13 +168,14 @@ out:
 /* Creation primitives. */
 static __inline__ struct nf_ct_frag6_queue *
-fq_find(__be32 id, struct in6_addr *src, struct in6_addr *dst)
+fq_find(__be32 id, u32 user, struct in6_addr *src, struct in6_addr *dst)
 {
        struct inet_frag_queue *q;
        struct ip6_create_arg arg;
        unsigned int hash;
        arg.id = id;
+        arg.user = user;
        arg.src = src;
        arg.dst = dst;
@@ -559,7 +560,7 @@ find_prev_fhdr(struct sk_buff *skb, u8 *prevhdrp, int *prevhoff, int *fhoff)
        return 0;
 }
-struct sk_buff *nf_ct_frag6_gather(struct sk_buff *skb)
+struct sk_buff *nf_ct_frag6_gather(struct sk_buff *skb, u32 user)
 {
        struct sk_buff *clone;
        struct net_device *dev = skb->dev;
@@ -605,7 +606,7 @@ struct sk_buff *nf_ct_frag6_gather(struct sk_buff *skb)
        if (atomic_read(&nf_init_frags.mem) > nf_init_frags.high_thresh)
                nf_ct_frag6_evictor();
-        fq = fq_find(fhdr->identification, &hdr->saddr, &hdr->daddr);
+        fq = fq_find(fhdr->identification, user, &hdr->saddr, &hdr->daddr);
        if (fq == NULL) {
                pr_debug("Can't find and can't create new queue\n");
                goto ret_orig;
diff --git a/net/ipv6/reassembly.c b/net/ipv6/reassembly.c
index 4d98549a6868..3b3a95607125 100644
--- a/net/ipv6/reassembly.c
+++ b/net/ipv6/reassembly.c
@@ -72,6 +72,7 @@ struct frag_queue
        struct inet_frag_queue  q;
        __be32                  id;             /* fragment id          */
+        u32                     user;
        struct in6_addr         saddr;
        struct in6_addr         daddr;
@@ -141,7 +142,7 @@ int ip6_frag_match(struct inet_frag_queue *q, void *a)
        struct ip6_create_arg *arg = a;
        fq = container_of(q, struct frag_queue, q);
-        return (fq->id == arg->id &&
+        return (fq->id == arg->id && fq->user == arg->user &&
                        ipv6_addr_equal(&fq->saddr, arg->src) &&
                        ipv6_addr_equal(&fq->daddr, arg->dst));
 }
@@ -163,6 +164,7 @@ void ip6_frag_init(struct inet_frag_queue *q, void *a)
        struct ip6_create_arg *arg = a;
        fq->id = arg->id;
+        fq->user = arg->user;
        ipv6_addr_copy(&fq->saddr, arg->src);
        ipv6_addr_copy(&fq->daddr, arg->dst);
 }
@@ -243,6 +245,7 @@ fq_find(struct net *net, __be32 id, struct in6_addr *src, struct in6_addr *dst,
        unsigned int hash;
        arg.id = id;
+        arg.user = IP6_DEFRAG_LOCAL_DELIVER;
        arg.src = src;
        arg.dst = dst;
diff --git a/net/ipv6/syncookies.c b/net/ipv6/syncookies.c
index 5b9af508b8f2..7208a06576c6 100644
--- a/net/ipv6/syncookies.c
+++ b/net/ipv6/syncookies.c
@@ -185,6 +185,13 @@ struct sock *cookie_v6_check(struct sock *sk, struct sk_buff *skb)
        NET_INC_STATS_BH(sock_net(sk), LINUX_MIB_SYNCOOKIESRECV);
+        /* check for timestamp cookie support */
+        memset(&tcp_opt, 0, sizeof(tcp_opt));
+        tcp_parse_options(skb, &tcp_opt, &hash_location, 0);
+        if (tcp_opt.saw_tstamp)
+                cookie_check_timestamp(&tcp_opt);
        ret = NULL;
        req = inet6_reqsk_alloc(&tcp6_request_sock_ops);
        if (!req)
@@ -218,6 +225,12 @@ struct sock *cookie_v6_check(struct sock *sk, struct sk_buff *skb)
        req->expires = 0UL;
        req->retrans = 0;
        ireq->ecn_ok            = 0;
+        ireq->snd_wscale        = tcp_opt.snd_wscale;
+        ireq->rcv_wscale        = tcp_opt.rcv_wscale;
+        ireq->sack_ok           = tcp_opt.sack_ok;
+        ireq->wscale_ok         = tcp_opt.wscale_ok;
+        ireq->tstamp_ok         = tcp_opt.saw_tstamp;
+        req->ts_recent          = tcp_opt.saw_tstamp ? tcp_opt.rcv_tsval : 0;
        treq->rcv_isn = ntohl(th->seq) - 1;
        treq->snt_isn = cookie;
@@ -253,21 +266,6 @@ struct sock *cookie_v6_check(struct sock *sk, struct sk_buff *skb)
                        goto out_free;
        }
-        /* check for timestamp cookie support */
-        memset(&tcp_opt, 0, sizeof(tcp_opt));
-        tcp_parse_options(skb, &tcp_opt, &hash_location, 0, dst);
-        if (tcp_opt.saw_tstamp)
-                cookie_check_timestamp(&tcp_opt);
-        req->ts_recent          = tcp_opt.saw_tstamp ? tcp_opt.rcv_tsval : 0;
-        ireq->snd_wscale        = tcp_opt.snd_wscale;
-        ireq->rcv_wscale        = tcp_opt.rcv_wscale;
-        ireq->sack_ok           = tcp_opt.sack_ok;
-        ireq->wscale_ok         = tcp_opt.wscale_ok;
-        ireq->tstamp_ok         = tcp_opt.saw_tstamp;
        req->window_clamp = tp->window_clamp ? :dst_metric(dst, RTAX_WINDOW);
        tcp_select_initial_window(tcp_full_space(sk), req->mss,
                                  &req->rcv_wnd, &req->window_clamp,
diff --git a/net/ipv6/tcp_ipv6.c b/net/ipv6/tcp_ipv6.c
index ee9cf62458d4..febfd595a40d 100644
--- a/net/ipv6/tcp_ipv6.c
+++ b/net/ipv6/tcp_ipv6.c
@@ -1169,7 +1169,6 @@ static int tcp_v6_conn_request(struct sock *sk, struct sk_buff *skb)
        struct inet6_request_sock *treq;
        struct ipv6_pinfo *np = inet6_sk(sk);
        struct tcp_sock *tp = tcp_sk(sk);
-        struct dst_entry *dst = __sk_dst_get(sk);
        __u32 isn = TCP_SKB_CB(skb)->when;
 #ifdef CONFIG_SYN_COOKIES
        int want_cookie = 0;
@@ -1208,7 +1207,7 @@ static int tcp_v6_conn_request(struct sock *sk, struct sk_buff *skb)
        tcp_clear_options(&tmp_opt);
        tmp_opt.mss_clamp = IPV6_MIN_MTU - sizeof(struct tcphdr) - sizeof(struct ipv6hdr);
        tmp_opt.user_mss = tp->rx_opt.user_mss;
-        tcp_parse_options(skb, &tmp_opt, &hash_location, 0, dst);
+        tcp_parse_options(skb, &tmp_opt, &hash_location, 0);
        if (tmp_opt.cookie_plus > 0 &&
            tmp_opt.saw_tstamp &&
diff --git a/net/netfilter/ipvs/ip_vs_core.c b/net/netfilter/ipvs/ip_vs_core.c
index b95699f00545..847ffca40184 100644
--- a/net/netfilter/ipvs/ip_vs_core.c
+++ b/net/netfilter/ipvs/ip_vs_core.c
@@ -1366,6 +1366,7 @@ ip_vs_in(unsigned int hooknum, struct sk_buff *skb,
               == sysctl_ip_vs_sync_threshold[0])) ||
             ((cp->protocol == IPPROTO_TCP) && (cp->old_state != cp->state) &&
              ((cp->state == IP_VS_TCP_S_FIN_WAIT) ||
+               (cp->state == IP_VS_TCP_S_CLOSE) ||
               (cp->state == IP_VS_TCP_S_CLOSE_WAIT) ||
               (cp->state == IP_VS_TCP_S_TIME_WAIT)))))
                ip_vs_sync_conn(cp);
diff --git a/net/netfilter/ipvs/ip_vs_ctl.c b/net/netfilter/ipvs/ip_vs_ctl.c
index e55a6861d26f..6bde12da2fe0 100644
--- a/net/netfilter/ipvs/ip_vs_ctl.c
+++ b/net/netfilter/ipvs/ip_vs_ctl.c
@@ -2714,6 +2714,8 @@ static int ip_vs_genl_parse_service(struct ip_vs_service_user_kern *usvc,
        if (!(nla_af && (nla_fwmark || (nla_port && nla_protocol && nla_addr))))
                return -EINVAL;
+        memset(usvc, 0, sizeof(*usvc));
        usvc->af = nla_get_u16(nla_af);
 #ifdef CONFIG_IP_VS_IPV6
        if (usvc->af != AF_INET && usvc->af != AF_INET6)
@@ -2901,6 +2903,8 @@ static int ip_vs_genl_parse_dest(struct ip_vs_dest_user_kern *udest,
        if (!(nla_addr && nla_port))
                return -EINVAL;
+        memset(udest, 0, sizeof(*udest));
        nla_memcpy(&udest->addr, nla_addr, sizeof(udest->addr));
        udest->port = nla_get_u16(nla_port);
diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
index 020562164b56..e0516a22be2e 100644
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -415,7 +415,7 @@ static int packet_sendmsg_spkt(struct kiocb *iocb, struct socket *sock,
 {
        struct sock *sk = sock->sk;
        struct sockaddr_pkt *saddr = (struct sockaddr_pkt *)msg->msg_name;
-        struct sk_buff *skb;
+        struct sk_buff *skb = NULL;
        struct net_device *dev;
        __be16 proto = 0;
        int err;
@@ -437,6 +437,7 @@ static int packet_sendmsg_spkt(struct kiocb *iocb, struct socket *sock,
         */
        saddr->spkt_device[13] = 0;
+retry:
        rcu_read_lock();
        dev = dev_get_by_name_rcu(sock_net(sk), saddr->spkt_device);
        err = -ENODEV;
@@ -456,58 +457,48 @@ static int packet_sendmsg_spkt(struct kiocb *iocb, struct socket *sock,
        if (len > dev->mtu + dev->hard_header_len)
                goto out_unlock;
-        err = -ENOBUFS;
+        if (!skb) {
-        skb = sock_wmalloc(sk, len + LL_RESERVED_SPACE(dev), 0, GFP_KERNEL);
+                size_t reserved = LL_RESERVED_SPACE(dev);
+                unsigned int hhlen = dev->header_ops ? dev->hard_header_len : 0;
-        /*
-         * If the write buffer is full, then tough. At this level the user
+                rcu_read_unlock();
-         * gets to deal with the problem - do your own algorithmic backoffs.
+                skb = sock_wmalloc(sk, len + reserved, 0, GFP_KERNEL);
-         * That's far more flexible.
+                if (skb == NULL)
-         */
+                        return -ENOBUFS;
+                /* FIXME: Save some space for broken drivers that write a hard
-        if (skb == NULL)
+                 * header at transmission time by themselves. PPP is the notable
-                goto out_unlock;
+                 * one here. This should really be fixed at the driver level.
+                 */
-        /*
+                skb_reserve(skb, reserved);
-         *      Fill it in
+                skb_reset_network_header(skb);
-         */
+                /* Try to align data part correctly */
-        /* FIXME: Save some space for broken drivers that write a
+                if (hhlen) {
-         * hard header at transmission time by themselves. PPP is the
+                        skb->data -= hhlen;
-         * notable one here. This should really be fixed at the driver level.
+                        skb->tail -= hhlen;
-         */
+                        if (len < hhlen)
-        skb_reserve(skb, LL_RESERVED_SPACE(dev));
+                                skb_reset_network_header(skb);
-        skb_reset_network_header(skb);
+                }
+                err = memcpy_fromiovec(skb_put(skb, len), msg->msg_iov, len);
-        /* Try to align data part correctly */
+                if (err)
-        if (dev->header_ops) {
+                        goto out_free;
-                skb->data -= dev->hard_header_len;
+                goto retry;
-                skb->tail -= dev->hard_header_len;
-                if (len < dev->hard_header_len)
-                        skb_reset_network_header(skb);
        }
-        /* Returns -EFAULT on error */
-        err = memcpy_fromiovec(skb_put(skb, len), msg->msg_iov, len);
        skb->protocol = proto;
        skb->dev = dev;
        skb->priority = sk->sk_priority;
        skb->mark = sk->sk_mark;
-        if (err)
-                goto out_free;
-        /*
-         *      Now send it
-         */
        dev_queue_xmit(skb);
        rcu_read_unlock();
        return len;
-out_free:
-        kfree_skb(skb);
 out_unlock:
        rcu_read_unlock();
+out_free:
+        kfree_skb(skb);
        return err;
 }
diff --git a/net/rds/ib.c b/net/rds/ib.c
index 536ebe5d3f6b..3b8992361042 100644
--- a/net/rds/ib.c
+++ b/net/rds/ib.c
@@ -182,8 +182,8 @@ static int rds_ib_conn_info_visitor(struct rds_connection *conn,
                ic = conn->c_transport_data;
                dev_addr = &ic->i_cm_id->route.addr.dev_addr;
-                ib_addr_get_sgid(dev_addr, (union ib_gid *) &iinfo->src_gid);
+                rdma_addr_get_sgid(dev_addr, (union ib_gid *) &iinfo->src_gid);
-                ib_addr_get_dgid(dev_addr, (union ib_gid *) &iinfo->dst_gid);
+                rdma_addr_get_dgid(dev_addr, (union ib_gid *) &iinfo->dst_gid);
                rds_ibdev = ib_get_client_data(ic->i_cm_id->device, &rds_ib_client);
                iinfo->max_send_wr = ic->i_send_ring.w_nr;
diff --git a/net/rds/iw.c b/net/rds/iw.c
index db224f7c2937..b28fa8525b24 100644
--- a/net/rds/iw.c
+++ b/net/rds/iw.c
@@ -184,8 +184,8 @@ static int rds_iw_conn_info_visitor(struct rds_connection *conn,
                ic = conn->c_transport_data;
                dev_addr = &ic->i_cm_id->route.addr.dev_addr;
-                ib_addr_get_sgid(dev_addr, (union ib_gid *) &iinfo->src_gid);
+                rdma_addr_get_sgid(dev_addr, (union ib_gid *) &iinfo->src_gid);
-                ib_addr_get_dgid(dev_addr, (union ib_gid *) &iinfo->dst_gid);
+                rdma_addr_get_dgid(dev_addr, (union ib_gid *) &iinfo->dst_gid);
                rds_iwdev = ib_get_client_data(ic->i_cm_id->device, &rds_iw_client);
                iinfo->max_send_wr = ic->i_send_ring.w_nr;
diff --git a/net/sunrpc/sched.c b/net/sunrpc/sched.c
index cef74ba0666c..aae6907fd546 100644
--- a/net/sunrpc/sched.c
+++ b/net/sunrpc/sched.c
@@ -210,6 +210,7 @@ void rpc_init_priority_wait_queue(struct rpc_wait_queue *queue, const char *qnam
 {
        __rpc_init_priority_wait_queue(queue, qname, RPC_NR_PRIORITY);
 }
+EXPORT_SYMBOL_GPL(rpc_init_priority_wait_queue);
 void rpc_init_wait_queue(struct rpc_wait_queue *queue, const char *qname)
 {
@@ -385,6 +386,20 @@ static void rpc_wake_up_task_queue_locked(struct rpc_wait_queue *queue, struct r
 }
 /*
+ * Tests whether rpc queue is empty
+ */
+int rpc_queue_empty(struct rpc_wait_queue *queue)
+{
+        int res;
+        spin_lock_bh(&queue->lock);
+        res = queue->qlen;
+        spin_unlock_bh(&queue->lock);
+        return (res == 0);
+}
+EXPORT_SYMBOL_GPL(rpc_queue_empty);
+/*
 * Wake up a task on a specific queue
 */
 void rpc_wake_up_queued_task(struct rpc_wait_queue *queue, struct rpc_task *task)
diff --git a/net/sunrpc/svc_xprt.c b/net/sunrpc/svc_xprt.c
index b845e2293dfe..1c924ee0a1ef 100644
--- a/net/sunrpc/svc_xprt.c
+++ b/net/sunrpc/svc_xprt.c
@@ -16,8 +16,6 @@
 #define RPCDBG_FACILITY RPCDBG_SVCXPRT
-#define SVC_MAX_WAKING 5
 static struct svc_deferred_req *svc_deferred_dequeue(struct svc_xprt *xprt);
 static int svc_deferred_recv(struct svc_rqst *rqstp);
 static struct cache_deferred_req *svc_defer(struct cache_req *req);
@@ -306,7 +304,6 @@ void svc_xprt_enqueue(struct svc_xprt *xprt)
        struct svc_pool *pool;
        struct svc_rqst *rqstp;
        int cpu;
-        int thread_avail;
        if (!(xprt->xpt_flags &
              ((1<<XPT_CONN)|(1<<XPT_DATA)|(1<<XPT_CLOSE)|(1<<XPT_DEFERRED))))
@@ -318,6 +315,12 @@ void svc_xprt_enqueue(struct svc_xprt *xprt)
        spin_lock_bh(&pool->sp_lock);
+        if (!list_empty(&pool->sp_threads) &&
+            !list_empty(&pool->sp_sockets))
+                printk(KERN_ERR
+                       "svc_xprt_enqueue: "
+                       "threads and transports both waiting??\n");
        if (test_bit(XPT_DEAD, &xprt->xpt_flags)) {
                /* Don't enqueue dead transports */
                dprintk("svc: transport %p is dead, not enqueued\n", xprt);
@@ -358,15 +361,7 @@ void svc_xprt_enqueue(struct svc_xprt *xprt)
        }
 process:
-        /* Work out whether threads are available */
+        if (!list_empty(&pool->sp_threads)) {
-        thread_avail = !list_empty(&pool->sp_threads);  /* threads are asleep */
-        if (pool->sp_nwaking >= SVC_MAX_WAKING) {
-                /* too many threads are runnable and trying to wake up */
-                thread_avail = 0;
-                pool->sp_stats.overloads_avoided++;
-        }
-        if (thread_avail) {
                rqstp = list_entry(pool->sp_threads.next,
                                   struct svc_rqst,
                                   rq_list);
@@ -381,8 +376,6 @@ void svc_xprt_enqueue(struct svc_xprt *xprt)
                svc_xprt_get(xprt);
                rqstp->rq_reserved = serv->sv_max_mesg;
                atomic_add(rqstp->rq_reserved, &xprt->xpt_reserved);
-                rqstp->rq_waking = 1;
-                pool->sp_nwaking++;
                pool->sp_stats.threads_woken++;
                BUG_ON(xprt->xpt_pool != pool);
                wake_up(&rqstp->rq_wait);
@@ -651,11 +644,6 @@ int svc_recv(struct svc_rqst *rqstp, long timeout)
                return -EINTR;
        spin_lock_bh(&pool->sp_lock);
-        if (rqstp->rq_waking) {
-                rqstp->rq_waking = 0;
-                pool->sp_nwaking--;
-                BUG_ON(pool->sp_nwaking < 0);
-        }
        xprt = svc_xprt_dequeue(pool);
        if (xprt) {
                rqstp->rq_xprt = xprt;
@@ -1204,16 +1192,15 @@ static int svc_pool_stats_show(struct seq_file *m, void *p)
        struct svc_pool *pool = p;
        if (p == SEQ_START_TOKEN) {
-                seq_puts(m, "# pool packets-arrived sockets-enqueued threads-woken overloads-avoided threads-timedout\n");
+                seq_puts(m, "# pool packets-arrived sockets-enqueued threads-woken threads-timedout\n");
                return 0;
        }
-        seq_printf(m, "%u %lu %lu %lu %lu %lu\n",
+        seq_printf(m, "%u %lu %lu %lu %lu\n",
                pool->sp_id,
                pool->sp_stats.packets,
                pool->sp_stats.sockets_queued,
                pool->sp_stats.threads_woken,
-                pool->sp_stats.overloads_avoided,
                pool->sp_stats.threads_timedout);
        return 0;
diff --git a/net/sunrpc/svcauth_unix.c b/net/sunrpc/svcauth_unix.c
index 4a8f6558718a..d8c041114497 100644
--- a/net/sunrpc/svcauth_unix.c
+++ b/net/sunrpc/svcauth_unix.c
@@ -655,23 +655,25 @@ static struct unix_gid *unix_gid_lookup(uid_t uid)
                return NULL;
 }
-static int unix_gid_find(uid_t uid, struct group_info **gip,
+static struct group_info *unix_gid_find(uid_t uid, struct svc_rqst *rqstp)
-                         struct svc_rqst *rqstp)
 {
-        struct unix_gid *ug = unix_gid_lookup(uid);
+        struct unix_gid *ug;
+        struct group_info *gi;
+        int ret;
+        ug = unix_gid_lookup(uid);
        if (!ug)
-                return -EAGAIN;
+                return ERR_PTR(-EAGAIN);
-        switch (cache_check(&unix_gid_cache, &ug->h, &rqstp->rq_chandle)) {
+        ret = cache_check(&unix_gid_cache, &ug->h, &rqstp->rq_chandle);
+        switch (ret) {
        case -ENOENT:
-                *gip = NULL;
+                return ERR_PTR(-ENOENT);
-                return 0;
        case 0:
-                *gip = ug->gi;
+                gi = get_group_info(ug->gi);
-                get_group_info(*gip);
                cache_put(&ug->h, &unix_gid_cache);
-                return 0;
+                return gi;
        default:
-                return -EAGAIN;
+                return ERR_PTR(-EAGAIN);
        }
 }
@@ -681,6 +683,8 @@ svcauth_unix_set_client(struct svc_rqst *rqstp)
        struct sockaddr_in *sin;
        struct sockaddr_in6 *sin6, sin6_storage;
        struct ip_map *ipm;
+        struct group_info *gi;
+        struct svc_cred *cred = &rqstp->rq_cred;
        switch (rqstp->rq_addr.ss_family) {
        case AF_INET:
@@ -721,6 +725,17 @@ svcauth_unix_set_client(struct svc_rqst *rqstp)
                        ip_map_cached_put(rqstp, ipm);
                        break;
        }
+        gi = unix_gid_find(cred->cr_uid, rqstp);
+        switch (PTR_ERR(gi)) {
+        case -EAGAIN:
+                return SVC_DROP;
+        case -ENOENT:
+                break;
+        default:
+                put_group_info(cred->cr_group_info);
+                cred->cr_group_info = gi;
+        }
        return SVC_OK;
 }
@@ -817,19 +832,11 @@ svcauth_unix_accept(struct svc_rqst *rqstp, __be32 *authp)
        slen = svc_getnl(argv);                 /* gids length */
        if (slen > 16 || (len -= (slen + 2)*4) < 0)
                goto badcred;
-        if (unix_gid_find(cred->cr_uid, &cred->cr_group_info, rqstp)
+        cred->cr_group_info = groups_alloc(slen);
-            == -EAGAIN)
+        if (cred->cr_group_info == NULL)
                return SVC_DROP;
-        if (cred->cr_group_info == NULL) {
+        for (i = 0; i < slen; i++)
-                cred->cr_group_info = groups_alloc(slen);
+                GROUP_AT(cred->cr_group_info, i) = svc_getnl(argv);
-                if (cred->cr_group_info == NULL)
-                        return SVC_DROP;
-                for (i = 0; i < slen; i++)
-                        GROUP_AT(cred->cr_group_info, i) = svc_getnl(argv);
-        } else {
-                for (i = 0; i < slen ; i++)
-                        svc_getnl(argv);
-        }
        if (svc_getu32(argv) != htonl(RPC_AUTH_NULL) || svc_getu32(argv) != 0) {
                *authp = rpc_autherr_badverf;
                return SVC_DENIED;
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index ffdafb26f539..224d85e72ef1 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -127,6 +127,11 @@ _c_flags += $(if $(patsubst n%,, \
                $(CFLAGS_GCOV))
 endif
+ifdef CONFIG_SYMBOL_PREFIX
+_cpp_flags += -DSYMBOL_PREFIX=$(patsubst "%",%,$(CONFIG_SYMBOL_PREFIX))
+endif
 # If building the kernel in a separate objtree expand all occurrences
 # of -Idir to -I$(srctree)/dir except for absolute paths (starting with '/').
diff --git a/scripts/mod/Makefile b/scripts/mod/Makefile
index 11d69c35e5b4..ff954f8168c1 100644
--- a/scripts/mod/Makefile
+++ b/scripts/mod/Makefile
@@ -8,7 +8,7 @@ modpost-objs	:= modpost.o file2alias.o sumversion.o
 $(obj)/modpost.o $(obj)/file2alias.o $(obj)/sumversion.o: $(obj)/elfconfig.h
 quiet_cmd_elfconfig = MKELF   $@
-      cmd_elfconfig = $(obj)/mk_elfconfig $(ARCH) < $< > $@
+      cmd_elfconfig = $(obj)/mk_elfconfig < $< > $@
 $(obj)/elfconfig.h: $(obj)/empty.o $(obj)/mk_elfconfig FORCE
        $(call if_changed,elfconfig)
diff --git a/scripts/mod/mk_elfconfig.c b/scripts/mod/mk_elfconfig.c
index 6a96d47bd1e6..639bca7ba559 100644
--- a/scripts/mod/mk_elfconfig.c
+++ b/scripts/mod/mk_elfconfig.c
@@ -9,9 +9,6 @@ main(int argc, char **argv)
        unsigned char ei[EI_NIDENT];
        union { short s; char c[2]; } endian_test;
-        if (argc != 2) {
-                fprintf(stderr, "Error: no arch\n");
-        }
        if (fread(ei, 1, EI_NIDENT, stdin) != EI_NIDENT) {
                fprintf(stderr, "Error: input truncated\n");
                return 1;
@@ -55,12 +52,6 @@ main(int argc, char **argv)
        else
                exit(1);
-        if ((strcmp(argv[1], "h8300") == 0)
-            || (strcmp(argv[1], "blackfin") == 0))
-                printf("#define MODULE_SYMBOL_PREFIX \"_\"\n");
-        else
-                printf("#define MODULE_SYMBOL_PREFIX \"\"\n");
        return 0;
 }
diff --git a/scripts/mod/modpost.c b/scripts/mod/modpost.c
index 801a16a17545..6c4ffc767b91 100644
--- a/scripts/mod/modpost.c
+++ b/scripts/mod/modpost.c
@@ -15,8 +15,17 @@
 #include <stdio.h>
 #include <ctype.h>
 #include "modpost.h"
+#include "../../include/linux/autoconf.h"
 #include "../../include/linux/license.h"
+/* Some toolchains use a `_' prefix for all user symbols. */
+#ifdef CONFIG_SYMBOL_PREFIX
+#define MODULE_SYMBOL_PREFIX CONFIG_SYMBOL_PREFIX
+#else
+#define MODULE_SYMBOL_PREFIX ""
+#endif
 /* Are we using CONFIG_MODVERSIONS? */
 int modversions = 0;
 /* Warn about undefined symbols? (do so if we have vmlinux) */
@@ -451,8 +460,6 @@ static int parse_elf(struct elf_info *info, const char *filename)
                        info->export_unused_gpl_sec = i;
                else if (strcmp(secname, "__ksymtab_gpl_future") == 0)
                        info->export_gpl_future_sec = i;
-                else if (strcmp(secname, "__markers_strings") == 0)
-                        info->markers_strings_sec = i;
                if (sechdrs[i].sh_type != SHT_SYMTAB)
                        continue;
@@ -515,7 +522,7 @@ static void handle_modversions(struct module *mod, struct elf_info *info,
                break;
        case SHN_ABS:
                /* CRC'd symbol */
-                if (memcmp(symname, CRC_PFX, strlen(CRC_PFX)) == 0) {
+                if (strncmp(symname, CRC_PFX, strlen(CRC_PFX)) == 0) {
                        crc = (unsigned int) sym->st_value;
                        sym_update_crc(symname + strlen(CRC_PFX), mod, crc,
                                        export);
@@ -559,7 +566,7 @@ static void handle_modversions(struct module *mod, struct elf_info *info,
                break;
        default:
                /* All exported symbols */
-                if (memcmp(symname, KSYMTAB_PFX, strlen(KSYMTAB_PFX)) == 0) {
+                if (strncmp(symname, KSYMTAB_PFX, strlen(KSYMTAB_PFX)) == 0) {
                        sym_add_exported(symname + strlen(KSYMTAB_PFX), mod,
                                        export);
                }
@@ -1509,62 +1516,6 @@ static void check_sec_ref(struct module *mod, const char *modname,
        }
 }
-static void get_markers(struct elf_info *info, struct module *mod)
-{
-        const Elf_Shdr *sh = &info->sechdrs[info->markers_strings_sec];
-        const char *strings = (const char *) info->hdr + sh->sh_offset;
-        const Elf_Sym *sym, *first_sym, *last_sym;
-        size_t n;
-        if (!info->markers_strings_sec)
-                return;
-        /*
-         * First count the strings.  We look for all the symbols defined
-         * in the __markers_strings section named __mstrtab_*.  For
-         * these local names, the compiler puts a random .NNN suffix on,
-         * so the names don't correspond exactly.
-         */
-        first_sym = last_sym = NULL;
-        n = 0;
-        for (sym = info->symtab_start; sym < info->symtab_stop; sym++)
-                if (ELF_ST_TYPE(sym->st_info) == STT_OBJECT &&
-                    sym->st_shndx == info->markers_strings_sec &&
-                    !strncmp(info->strtab + sym->st_name,
-                             "__mstrtab_", sizeof "__mstrtab_" - 1)) {
-                        if (first_sym == NULL)
-                                first_sym = sym;
-                        last_sym = sym;
-                        ++n;
-                }
-        if (n == 0)
-                return;
-        /*
-         * Now collect each name and format into a line for the output.
-         * Lines look like:
-         *      marker_name     vmlinux marker %s format %d
-         * The format string after the second \t can use whitespace.
-         */
-        mod->markers = NOFAIL(malloc(sizeof mod->markers[0] * n));
-        mod->nmarkers = n;
-        n = 0;
-        for (sym = first_sym; sym <= last_sym; sym++)
-                if (ELF_ST_TYPE(sym->st_info) == STT_OBJECT &&
-                    sym->st_shndx == info->markers_strings_sec &&
-                    !strncmp(info->strtab + sym->st_name,
-                             "__mstrtab_", sizeof "__mstrtab_" - 1)) {
-                        const char *name = strings + sym->st_value;
-                        const char *fmt = strchr(name, '\0') + 1;
-                        char *line = NULL;
-                        asprintf(&line, "%s\t%s\t%s\n", name, mod->name, fmt);
-                        NOFAIL(line);
-                        mod->markers[n++] = line;
-                }
-}
 static void read_symbols(char *modname)
 {
        const char *symname;
@@ -1620,8 +1571,6 @@ static void read_symbols(char *modname)
                get_src_version(modname, mod->srcversion,
                                sizeof(mod->srcversion)-1);
-        get_markers(&info, mod);
        parse_elf_finish(&info);
        /* Our trick to get versioning for module struct etc. - it's
@@ -1976,96 +1925,6 @@ static void write_dump(const char *fname)
        write_if_changed(&buf, fname);
 }
-static void add_marker(struct module *mod, const char *name, const char *fmt)
-{
-        char *line = NULL;
-        asprintf(&line, "%s\t%s\t%s\n", name, mod->name, fmt);
-        NOFAIL(line);
-        mod->markers = NOFAIL(realloc(mod->markers, ((mod->nmarkers + 1) *
-                                                     sizeof mod->markers[0])));
-        mod->markers[mod->nmarkers++] = line;
-}
-static void read_markers(const char *fname)
-{
-        unsigned long size, pos = 0;
-        void *file = grab_file(fname, &size);
-        char *line;
-        if (!file)              /* No old markers, silently ignore */
-                return;
-        while ((line = get_next_line(&pos, file, size))) {
-                char *marker, *modname, *fmt;
-                struct module *mod;
-                marker = line;
-                modname = strchr(marker, '\t');
-                if (!modname)
-                        goto fail;
-                *modname++ = '\0';
-                fmt = strchr(modname, '\t');
-                if (!fmt)
-                        goto fail;
-                *fmt++ = '\0';
-                if (*marker == '\0' || *modname == '\0')
-                        goto fail;
-                mod = find_module(modname);
-                if (!mod) {
-                        mod = new_module(modname);
-                        mod->skip = 1;
-                }
-                if (is_vmlinux(modname)) {
-                        have_vmlinux = 1;
-                        mod->skip = 0;
-                }
-                if (!mod->skip)
-                        add_marker(mod, marker, fmt);
-        }
-        release_file(file, size);
-        return;
-fail:
-        fatal("parse error in markers list file\n");
-}
-static int compare_strings(const void *a, const void *b)
-{
-        return strcmp(*(const char **) a, *(const char **) b);
-}
-static void write_markers(const char *fname)
-{
-        struct buffer buf = { };
-        struct module *mod;
-        size_t i;
-        for (mod = modules; mod; mod = mod->next)
-                if ((!external_module || !mod->skip) && mod->markers != NULL) {
-                        /*
-                         * Sort the strings so we can skip duplicates when
-                         * we write them out.
-                         */
-                        qsort(mod->markers, mod->nmarkers,
-                              sizeof mod->markers[0], &compare_strings);
-                        for (i = 0; i < mod->nmarkers; ++i) {
-                                char *line = mod->markers[i];
-                                buf_write(&buf, line, strlen(line));
-                                while (i + 1 < mod->nmarkers &&
-                                       !strcmp(mod->markers[i],
-                                               mod->markers[i + 1]))
-                                        free(mod->markers[i++]);
-                                free(mod->markers[i]);
-                        }
-                        free(mod->markers);
-                        mod->markers = NULL;
-                }
-        write_if_changed(&buf, fname);
-}
 struct ext_sym_list {
        struct ext_sym_list *next;
        const char *file;
@@ -2077,8 +1936,6 @@ int main(int argc, char **argv)
        struct buffer buf = { };
        char *kernel_read = NULL, *module_read = NULL;
        char *dump_write = NULL;
-        char *markers_read = NULL;
-        char *markers_write = NULL;
        int opt;
        int err;
        struct ext_sym_list *extsym_iter;
@@ -2122,12 +1979,6 @@ int main(int argc, char **argv)
                case 'w':
                        warn_unresolved = 1;
                        break;
-                        case 'M':
-                                markers_write = optarg;
-                                break;
-                        case 'K':
-                                markers_read = optarg;
-                                break;
                default:
                        exit(1);
                }
@@ -2182,11 +2033,5 @@ int main(int argc, char **argv)
                     "'make CONFIG_DEBUG_SECTION_MISMATCH=y'\n",
                     sec_mismatch_count);
-        if (markers_read)
-                read_markers(markers_read);
-        if (markers_write)
-                write_markers(markers_write);
        return err;
 }
diff --git a/scripts/mod/modpost.h b/scripts/mod/modpost.h
index 09f58e33d227..be987a44f250 100644
--- a/scripts/mod/modpost.h
+++ b/scripts/mod/modpost.h
@@ -112,8 +112,6 @@ struct module {
        int has_init;
        int has_cleanup;
        struct buffer dev_table_buf;
-        char **markers;
-        size_t nmarkers;
        char         srcversion[25];
 };
@@ -128,7 +126,6 @@ struct elf_info {
        Elf_Section  export_gpl_sec;
        Elf_Section  export_unused_gpl_sec;
        Elf_Section  export_gpl_future_sec;
-        Elf_Section  markers_strings_sec;
        const char   *strtab;
        char         *modinfo;
        unsigned int modinfo_len;