5 files changed, 80 insertions, 32 deletions

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 93224b569187..7d0ab8942cfb 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -462,10 +462,6 @@ config X86_CYCLONE_TIMER
         def_bool y
         depends on X86_GENERICARCH
 
-config ES7000_CLUSTERED_APIC
-        def_bool y
-        depends on SMP && X86_ES7000 && MPENTIUMIII
-
 source "arch/x86/Kconfig.cpu"
 
 config HPET_TIMER
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h
index 9d8cf776c285..e24ef876915f 100644
--- a/arch/x86/include/asm/es7000/apic.h
+++ b/arch/x86/include/asm/es7000/apic.h
@@ -9,28 +9,27 @@ static inline int apic_id_registered(void)
                 return (1);
 }
 
-static inline cpumask_t target_cpus(void)
+static inline cpumask_t target_cpus_cluster(void)
 {
-#if defined CONFIG_ES7000_CLUSTERED_APIC
         return CPU_MASK_ALL;
-#else
+}
+
+static inline cpumask_t target_cpus(void)
+{
         return cpumask_of_cpu(smp_processor_id());
-#endif
 }
 
-#if defined CONFIG_ES7000_CLUSTERED_APIC
-#define APIC_DFR_VALUE          (APIC_DFR_CLUSTER)
-#define INT_DELIVERY_MODE       (dest_LowestPrio)
-#define INT_DEST_MODE           (1)    /* logical delivery broadcast to all procs */
-#define NO_BALANCE_IRQ          (1)
-#else
+#define APIC_DFR_VALUE_CLUSTER          (APIC_DFR_CLUSTER)
+#define INT_DELIVERY_MODE_CLUSTER       (dest_LowestPrio)
+#define INT_DEST_MODE_CLUSTER           (1) /* logical delivery broadcast to all procs */
+#define NO_BALANCE_IRQ_CLUSTER          (1)
+
 #define APIC_DFR_VALUE          (APIC_DFR_FLAT)
 #define INT_DELIVERY_MODE       (dest_Fixed)
 #define INT_DEST_MODE           (0)    /* phys delivery to target procs */
 #define NO_BALANCE_IRQ          (0)
 #undef  APIC_DEST_LOGICAL
 #define APIC_DEST_LOGICAL       0x0
-#endif
 
 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
 {
@@ -57,6 +56,16 @@ static inline unsigned long calculate_ldr(int cpu)
  * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
  * document number 292116).  So here it goes...
  */
+static inline void init_apic_ldr_cluster(void)
+{
+        unsigned long val;
+        int cpu = smp_processor_id();
+
+        apic_write(APIC_DFR, APIC_DFR_VALUE_CLUSTER);
+        val = calculate_ldr(cpu);
+        apic_write(APIC_LDR, val);
+}
+
 static inline void init_apic_ldr(void)
 {
         unsigned long val;
@@ -67,10 +76,6 @@ static inline void init_apic_ldr(void)
         apic_write(APIC_LDR, val);
 }
 
-#ifndef CONFIG_X86_GENERICARCH
-extern void enable_apic_mode(void);
-#endif
-
 extern int apic_version [MAX_APICS];
 static inline void setup_apic_routing(void)
 {
@@ -141,7 +146,7 @@ static inline int check_phys_apicid_present(int cpu_physical_apicid)
         return (1);
 }
 
-static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
+static inline unsigned int cpu_mask_to_apicid_cluster(cpumask_t cpumask)
 {
         int num_bits_set;
         int cpus_found = 0;
@@ -151,11 +156,7 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
         num_bits_set = cpus_weight(cpumask);
         /* Return id to all */
         if (num_bits_set == NR_CPUS)
-#if defined CONFIG_ES7000_CLUSTERED_APIC
                 return 0xFF;
-#else
-                return cpu_to_logical_apicid(0);
-#endif
         /*
          * The cpus in the mask must all be on the apic cluster.  If are not
          * on the same apicid cluster return default value of TARGET_CPUS.
@@ -168,11 +169,40 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
                         if (apicid_cluster(apicid) !=
                                         apicid_cluster(new_apicid)){
                                 printk ("%s: Not a valid mask!\n", __func__);
-#if defined CONFIG_ES7000_CLUSTERED_APIC
                                 return 0xFF;
-#else
+                        }
+                        apicid = new_apicid;
+                        cpus_found++;
+                }
+                cpu++;
+        }
+        return apicid;
+}
+
+static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
+{
+        int num_bits_set;
+        int cpus_found = 0;
+        int cpu;
+        int apicid;
+
+        num_bits_set = cpus_weight(cpumask);
+        /* Return id to all */
+        if (num_bits_set == NR_CPUS)
+                return cpu_to_logical_apicid(0);
+        /*
+         * The cpus in the mask must all be on the apic cluster.  If are not
+         * on the same apicid cluster return default value of TARGET_CPUS.
+         */
+        cpu = first_cpu(cpumask);
+        apicid = cpu_to_logical_apicid(cpu);
+        while (cpus_found < num_bits_set) {
+                if (cpu_isset(cpu, cpumask)) {
+                        int new_apicid = cpu_to_logical_apicid(cpu);
+                        if (apicid_cluster(apicid) !=
+                                        apicid_cluster(new_apicid)){
+                                printk ("%s: Not a valid mask!\n", __func__);
                                 return cpu_to_logical_apicid(0);
-#endif
                         }
                         apicid = new_apicid;
                         cpus_found++;
diff --git a/arch/x86/include/asm/genapic_32.h b/arch/x86/include/asm/genapic_32.h
index 455d6c27a98b..0ac17d33a8c7 100644
--- a/arch/x86/include/asm/genapic_32.h
+++ b/arch/x86/include/asm/genapic_32.h
@@ -131,6 +131,7 @@ struct genapic {
 }
 
 extern struct genapic *genapic;
+extern void es7000_update_genapic_to_cluster(void);
 
 enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
 #define get_uv_system_type()            UV_NONE
diff --git a/arch/x86/kernel/es7000_32.c b/arch/x86/kernel/es7000_32.c
index fb3bfe66fbe2..71d7be624d46 100644
--- a/arch/x86/kernel/es7000_32.c
+++ b/arch/x86/kernel/es7000_32.c
@@ -38,6 +38,7 @@
 #include <asm/io.h>
 #include <asm/nmi.h>
 #include <asm/smp.h>
+#include <asm/atomic.h>
 #include <asm/apicdef.h>
 #include <mach_mpparse.h>
 #include <asm/genapic.h>
@@ -163,7 +164,6 @@ es7000_rename_gsi(int ioapic, int gsi)
         return gsi;
 }
 
-#ifdef CONFIG_ES7000_CLUSTERED_APIC
 static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
 {
         unsigned long vect = 0, psaival = 0;
@@ -182,13 +182,24 @@ static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
         return 0;
 }
 
+static void noop_wait_for_deassert(atomic_t *deassert_not_used)
+{
+}
+
 static int __init es7000_update_genapic(void)
 {
         genapic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
 
+        /* MPENTIUMIII */
+        if (boot_cpu_data.x86 == 6 &&
+            (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) {
+                es7000_update_genapic_to_cluster();
+                genapic->wait_for_init_deassert = noop_wait_for_deassert;
+                genapic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
+        }
+
         return 0;
 }
-#endif
 
 void __init
 setup_unisys(void)
@@ -206,9 +217,7 @@ setup_unisys(void)
                 es7000_plat = ES7000_CLASSIC;
         ioapic_renumber_irq = es7000_rename_gsi;
 
-#ifdef CONFIG_ES7000_CLUSTERED_APIC
         x86_quirks->update_genapic = es7000_update_genapic;
-#endif
 }
 
 /*
diff --git a/arch/x86/mach-generic/es7000.c b/arch/x86/mach-generic/es7000.c
index 28459cab3ddb..7b4e6d0d1690 100644
--- a/arch/x86/mach-generic/es7000.c
+++ b/arch/x86/mach-generic/es7000.c
@@ -16,7 +16,19 @@
 #include <asm/es7000/apic.h>
 #include <asm/es7000/ipi.h>
 #include <asm/es7000/mpparse.h>
-#include <asm/es7000/wakecpu.h>
+#include <asm/mach-default/mach_wakecpu.h>
+
+void __init es7000_update_genapic_to_cluster(void)
+{
+        genapic->target_cpus = target_cpus_cluster;
+        genapic->int_delivery_mode = INT_DELIVERY_MODE_CLUSTER;
+        genapic->int_dest_mode = INT_DEST_MODE_CLUSTER;
+        genapic->no_balance_irq = NO_BALANCE_IRQ_CLUSTER;
+
+        genapic->init_apic_ldr = init_apic_ldr_cluster;
+
+        genapic->cpu_mask_to_apicid = cpu_mask_to_apicid_cluster;
+}
 
 static int probe_es7000(void)
 {