167 files changed, 5809 insertions, 2543 deletions

diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index d08759aa0903..d77fbd8b79ac 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -1915,6 +1915,12 @@ and is between 256 and 4096 characters. It is defined in the file
                         Format: { 0 | 1 }
                         See arch/parisc/kernel/pdc_chassis.c
 
+        percpu_alloc=   [X86] Select which percpu first chunk allocator to use.
+                        Allowed values are one of "lpage", "embed" and "4k".
+                        See comments in arch/x86/kernel/setup_percpu.c for
+                        details on each allocator.  This parameter is primarily
+                        for debugging and performance comparison.
+
         pf.             [PARIDE]
                         See Documentation/blockdev/paride.txt.
 
@@ -2467,7 +2473,8 @@ and is between 256 and 4096 characters. It is defined in the file
 
         tp720=          [HW,PS2]
 
-        trace_buf_size=nn[KMG] [ftrace] will set tracing buffer size.
+        trace_buf_size=nn[KMG]
+                        [FTRACE] will set tracing buffer size.
 
         trix=           [HW,OSS] MediaTrix AudioTrix Pro
                         Format:
diff --git a/Documentation/leds-lp3944.txt b/Documentation/leds-lp3944.txt
new file mode 100644
index 000000000000..c6eda18b15ef
--- /dev/null
+++ b/Documentation/leds-lp3944.txt
@@ -0,0 +1,50 @@
+Kernel driver lp3944
+====================
+
+  * National Semiconductor LP3944 Fun-light Chip
+    Prefix: 'lp3944'
+    Addresses scanned: None (see the Notes section below)
+    Datasheet: Publicly available at the National Semiconductor website
+               http://www.national.com/pf/LP/LP3944.html
+
+Authors:
+        Antonio Ospite <ospite@studenti.unina.it>
+
+
+Description
+-----------
+The LP3944 is a helper chip that can drive up to 8 leds, with two programmable
+DIM modes; it could even be used as a gpio expander but this driver assumes it
+is used as a led controller.
+
+The DIM modes are used to set _blink_ patterns for leds, the pattern is
+specified supplying two parameters:
+  - period: from 0s to 1.6s
+  - duty cycle: percentage of the period the led is on, from 0 to 100
+
+Setting a led in DIM0 or DIM1 mode makes it blink according to the pattern.
+See the datasheet for details.
+
+LP3944 can be found on Motorola A910 smartphone, where it drives the rgb
+leds, the camera flash light and the lcds power.
+
+
+Notes
+-----
+The chip is used mainly in embedded contexts, so this driver expects it is
+registered using the i2c_board_info mechanism.
+
+To register the chip at address 0x60 on adapter 0, set the platform data
+according to include/linux/leds-lp3944.h, set the i2c board info:
+
+        static struct i2c_board_info __initdata a910_i2c_board_info[] = {
+                {
+                        I2C_BOARD_INFO("lp3944", 0x60),
+                        .platform_data = &a910_lp3944_leds,
+                },
+        };
+
+and register it in the platform init function
+
+        i2c_register_board_info(0, a910_i2c_board_info,
+                        ARRAY_SIZE(a910_i2c_board_info));
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 8d999d862d0e..79f533f38c61 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -1238,1122 +1238,7 @@ descriptions for the SOC devices for which new nodes have been
 defined; this list will expand as more and more SOC-containing
 platforms are moved over to use the flattened-device-tree model.
 
-   a) PHY nodes
-
-   Required properties:
-
-    - device_type : Should be "ethernet-phy"
-    - interrupts : <a b> where a is the interrupt number and b is a
-      field that represents an encoding of the sense and level
-      information for the interrupt.  This should be encoded based on
-      the information in section 2) depending on the type of interrupt
-      controller you have.
-    - interrupt-parent : the phandle for the interrupt controller that
-      services interrupts for this device.
-    - reg : The ID number for the phy, usually a small integer
-    - linux,phandle :  phandle for this node; likely referenced by an
-      ethernet controller node.
-
-
-   Example:
-
-        ethernet-phy@0 {
-                linux,phandle = <2452000>
-                interrupt-parent = <40000>;
-                interrupts = <35 1>;
-                reg = <0>;
-                device_type = "ethernet-phy";
-        };
-
-
-   b) Interrupt controllers
-
-   Some SOC devices contain interrupt controllers that are different
-   from the standard Open PIC specification.  The SOC device nodes for
-   these types of controllers should be specified just like a standard
-   OpenPIC controller.  Sense and level information should be encoded
-   as specified in section 2) of this chapter for each device that
-   specifies an interrupt.
-
-   Example :
-
-        pic@40000 {
-                linux,phandle = <40000>;
-                interrupt-controller;
-                #address-cells = <0>;
-                reg = <40000 40000>;
-                compatible = "chrp,open-pic";
-                device_type = "open-pic";
-        };
-
-    c) 4xx/Axon EMAC ethernet nodes
-
-    The EMAC ethernet controller in IBM and AMCC 4xx chips, and also
-    the Axon bridge.  To operate this needs to interact with a ths
-    special McMAL DMA controller, and sometimes an RGMII or ZMII
-    interface.  In addition to the nodes and properties described
-    below, the node for the OPB bus on which the EMAC sits must have a
-    correct clock-frequency property.
-
-      i) The EMAC node itself
-
-    Required properties:
-    - device_type       : "network"
-
-    - compatible        : compatible list, contains 2 entries, first is
-                          "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
-                          405gp, Axon) and second is either "ibm,emac" or
-                          "ibm,emac4".  For Axon, thus, we have: "ibm,emac-axon",
-                          "ibm,emac4"
-    - interrupts        : <interrupt mapping for EMAC IRQ and WOL IRQ>
-    - interrupt-parent  : optional, if needed for interrupt mapping
-    - reg               : <registers mapping>
-    - local-mac-address : 6 bytes, MAC address
-    - mal-device        : phandle of the associated McMAL node
-    - mal-tx-channel    : 1 cell, index of the tx channel on McMAL associated
-                          with this EMAC
-    - mal-rx-channel    : 1 cell, index of the rx channel on McMAL associated
-                          with this EMAC
-    - cell-index        : 1 cell, hardware index of the EMAC cell on a given
-                          ASIC (typically 0x0 and 0x1 for EMAC0 and EMAC1 on
-                          each Axon chip)
-    - max-frame-size    : 1 cell, maximum frame size supported in bytes
-    - rx-fifo-size      : 1 cell, Rx fifo size in bytes for 10 and 100 Mb/sec
-                          operations.
-                          For Axon, 2048
-    - tx-fifo-size      : 1 cell, Tx fifo size in bytes for 10 and 100 Mb/sec
-                          operations.
-                          For Axon, 2048.
-    - fifo-entry-size   : 1 cell, size of a fifo entry (used to calculate
-                          thresholds).
-                          For Axon, 0x00000010
-    - mal-burst-size    : 1 cell, MAL burst size (used to calculate thresholds)
-                          in bytes.
-                          For Axon, 0x00000100 (I think ...)
-    - phy-mode          : string, mode of operations of the PHY interface.
-                          Supported values are: "mii", "rmii", "smii", "rgmii",
-                          "tbi", "gmii", rtbi", "sgmii".
-                          For Axon on CAB, it is "rgmii"
-    - mdio-device       : 1 cell, required iff using shared MDIO registers
-                          (440EP).  phandle of the EMAC to use to drive the
-                          MDIO lines for the PHY used by this EMAC.
-    - zmii-device       : 1 cell, required iff connected to a ZMII.  phandle of
-                          the ZMII device node
-    - zmii-channel      : 1 cell, required iff connected to a ZMII.  Which ZMII
-                          channel or 0xffffffff if ZMII is only used for MDIO.
-    - rgmii-device      : 1 cell, required iff connected to an RGMII. phandle
-                          of the RGMII device node.
-                          For Axon: phandle of plb5/plb4/opb/rgmii
-    - rgmii-channel     : 1 cell, required iff connected to an RGMII.  Which
-                          RGMII channel is used by this EMAC.
-                          Fox Axon: present, whatever value is appropriate for each
-                          EMAC, that is the content of the current (bogus) "phy-port"
-                          property.
-
-    Optional properties:
-    - phy-address       : 1 cell, optional, MDIO address of the PHY. If absent,
-                          a search is performed.
-    - phy-map           : 1 cell, optional, bitmap of addresses to probe the PHY
-                          for, used if phy-address is absent. bit 0x00000001 is
-                          MDIO address 0.
-                          For Axon it can be absent, though my current driver
-                          doesn't handle phy-address yet so for now, keep
-                          0x00ffffff in it.
-    - rx-fifo-size-gige : 1 cell, Rx fifo size in bytes for 1000 Mb/sec
-                          operations (if absent the value is the same as
-                          rx-fifo-size).  For Axon, either absent or 2048.
-    - tx-fifo-size-gige : 1 cell, Tx fifo size in bytes for 1000 Mb/sec
-                          operations (if absent the value is the same as
-                          tx-fifo-size). For Axon, either absent or 2048.
-    - tah-device        : 1 cell, optional. If connected to a TAH engine for
-                          offload, phandle of the TAH device node.
-    - tah-channel       : 1 cell, optional. If appropriate, channel used on the
-                          TAH engine.
-
-    Example:
-
-        EMAC0: ethernet@40000800 {
-                device_type = "network";
-                compatible = "ibm,emac-440gp", "ibm,emac";
-                interrupt-parent = <&UIC1>;
-                interrupts = <1c 4 1d 4>;
-                reg = <40000800 70>;
-                local-mac-address = [00 04 AC E3 1B 1E];
-                mal-device = <&MAL0>;
-                mal-tx-channel = <0 1>;
-                mal-rx-channel = <0>;
-                cell-index = <0>;
-                max-frame-size = <5dc>;
-                rx-fifo-size = <1000>;
-                tx-fifo-size = <800>;
-                phy-mode = "rmii";
-                phy-map = <00000001>;
-                zmii-device = <&ZMII0>;
-                zmii-channel = <0>;
-        };
-
-      ii) McMAL node
-
-    Required properties:
-    - device_type        : "dma-controller"
-    - compatible         : compatible list, containing 2 entries, first is
-                           "ibm,mcmal-CHIP" where CHIP is the host ASIC (like
-                           emac) and the second is either "ibm,mcmal" or
-                           "ibm,mcmal2".
-                           For Axon, "ibm,mcmal-axon","ibm,mcmal2"
-    - interrupts         : <interrupt mapping for the MAL interrupts sources:
-                           5 sources: tx_eob, rx_eob, serr, txde, rxde>.
-                           For Axon: This is _different_ from the current
-                           firmware.  We use the "delayed" interrupts for txeob
-                           and rxeob. Thus we end up with mapping those 5 MPIC
-                           interrupts, all level positive sensitive: 10, 11, 32,
-                           33, 34 (in decimal)
-    - dcr-reg            : < DCR registers range >
-    - dcr-parent         : if needed for dcr-reg
-    - num-tx-chans       : 1 cell, number of Tx channels
-    - num-rx-chans       : 1 cell, number of Rx channels
-
-      iii) ZMII node
-
-    Required properties:
-    - compatible         : compatible list, containing 2 entries, first is
-                           "ibm,zmii-CHIP" where CHIP is the host ASIC (like
-                           EMAC) and the second is "ibm,zmii".
-                           For Axon, there is no ZMII node.
-    - reg                : <registers mapping>
-
-      iv) RGMII node
-
-    Required properties:
-    - compatible         : compatible list, containing 2 entries, first is
-                           "ibm,rgmii-CHIP" where CHIP is the host ASIC (like
-                           EMAC) and the second is "ibm,rgmii".
-                           For Axon, "ibm,rgmii-axon","ibm,rgmii"
-    - reg                : <registers mapping>
-    - revision           : as provided by the RGMII new version register if
-                           available.
-                           For Axon: 0x0000012a
-
-   d) Xilinx IP cores
-
-   The Xilinx EDK toolchain ships with a set of IP cores (devices) for use
-   in Xilinx Spartan and Virtex FPGAs.  The devices cover the whole range
-   of standard device types (network, serial, etc.) and miscellaneous
-   devices (gpio, LCD, spi, etc).  Also, since these devices are
-   implemented within the fpga fabric every instance of the device can be
-   synthesised with different options that change the behaviour.
-
-   Each IP-core has a set of parameters which the FPGA designer can use to
-   control how the core is synthesized.  Historically, the EDK tool would
-   extract the device parameters relevant to device drivers and copy them
-   into an 'xparameters.h' in the form of #define symbols.  This tells the
-   device drivers how the IP cores are configured, but it requres the kernel
-   to be recompiled every time the FPGA bitstream is resynthesized.
-
-   The new approach is to export the parameters into the device tree and
-   generate a new device tree each time the FPGA bitstream changes.  The
-   parameters which used to be exported as #defines will now become
-   properties of the device node.  In general, device nodes for IP-cores
-   will take the following form:
-
-        (name): (generic-name)@(base-address) {
-                compatible = "xlnx,(ip-core-name)-(HW_VER)"
-                             [, (list of compatible devices), ...];
-                reg = <(baseaddr) (size)>;
-                interrupt-parent = <&interrupt-controller-phandle>;
-                interrupts = < ... >;
-                xlnx,(parameter1) = "(string-value)";
-                xlnx,(parameter2) = <(int-value)>;
-        };
-
-        (generic-name):   an open firmware-style name that describes the
-                        generic class of device.  Preferably, this is one word, such
-                        as 'serial' or 'ethernet'.
-        (ip-core-name): the name of the ip block (given after the BEGIN
-                        directive in system.mhs).  Should be in lowercase
-                        and all underscores '_' converted to dashes '-'.
-        (name):         is derived from the "PARAMETER INSTANCE" value.
-        (parameter#):   C_* parameters from system.mhs.  The C_ prefix is
-                        dropped from the parameter name, the name is converted
-                        to lowercase and all underscore '_' characters are
-                        converted to dashes '-'.
-        (baseaddr):     the baseaddr parameter value (often named C_BASEADDR).
-        (HW_VER):       from the HW_VER parameter.
-        (size):         the address range size (often C_HIGHADDR - C_BASEADDR + 1).
-
-   Typically, the compatible list will include the exact IP core version
-   followed by an older IP core version which implements the same
-   interface or any other device with the same interface.
-
-   'reg', 'interrupt-parent' and 'interrupts' are all optional properties.
-
-   For example, the following block from system.mhs:
-
-        BEGIN opb_uartlite
-                PARAMETER INSTANCE = opb_uartlite_0
-                PARAMETER HW_VER = 1.00.b
-                PARAMETER C_BAUDRATE = 115200
-                PARAMETER C_DATA_BITS = 8
-                PARAMETER C_ODD_PARITY = 0
-                PARAMETER C_USE_PARITY = 0
-                PARAMETER C_CLK_FREQ = 50000000
-                PARAMETER C_BASEADDR = 0xEC100000
-                PARAMETER C_HIGHADDR = 0xEC10FFFF
-                BUS_INTERFACE SOPB = opb_7
-                PORT OPB_Clk = CLK_50MHz
-                PORT Interrupt = opb_uartlite_0_Interrupt
-                PORT RX = opb_uartlite_0_RX
-                PORT TX = opb_uartlite_0_TX
-                PORT OPB_Rst = sys_bus_reset_0
-        END
-
-   becomes the following device tree node:
-
-        opb_uartlite_0: serial@ec100000 {
-                device_type = "serial";
-                compatible = "xlnx,opb-uartlite-1.00.b";
-                reg = <ec100000 10000>;
-                interrupt-parent = <&opb_intc_0>;
-                interrupts = <1 0>; // got this from the opb_intc parameters
-                current-speed = <d#115200>;     // standard serial device prop
-                clock-frequency = <d#50000000>; // standard serial device prop
-                xlnx,data-bits = <8>;
-                xlnx,odd-parity = <0>;
-                xlnx,use-parity = <0>;
-        };
-
-   Some IP cores actually implement 2 or more logical devices.  In
-   this case, the device should still describe the whole IP core with
-   a single node and add a child node for each logical device.  The
-   ranges property can be used to translate from parent IP-core to the
-   registers of each device.  In addition, the parent node should be
-   compatible with the bus type 'xlnx,compound', and should contain
-   #address-cells and #size-cells, as with any other bus.  (Note: this
-   makes the assumption that both logical devices have the same bus
-   binding.  If this is not true, then separate nodes should be used
-   for each logical device).  The 'cell-index' property can be used to
-   enumerate logical devices within an IP core.  For example, the
-   following is the system.mhs entry for the dual ps2 controller found
-   on the ml403 reference design.
-
-        BEGIN opb_ps2_dual_ref
-                PARAMETER INSTANCE = opb_ps2_dual_ref_0
-                PARAMETER HW_VER = 1.00.a
-                PARAMETER C_BASEADDR = 0xA9000000
-                PARAMETER C_HIGHADDR = 0xA9001FFF
-                BUS_INTERFACE SOPB = opb_v20_0
-                PORT Sys_Intr1 = ps2_1_intr
-                PORT Sys_Intr2 = ps2_2_intr
-                PORT Clkin1 = ps2_clk_rx_1
-                PORT Clkin2 = ps2_clk_rx_2
-                PORT Clkpd1 = ps2_clk_tx_1
-                PORT Clkpd2 = ps2_clk_tx_2
-                PORT Rx1 = ps2_d_rx_1
-                PORT Rx2 = ps2_d_rx_2
-                PORT Txpd1 = ps2_d_tx_1
-                PORT Txpd2 = ps2_d_tx_2
-        END
-
-   It would result in the following device tree nodes:
-
-        opb_ps2_dual_ref_0: opb-ps2-dual-ref@a9000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                compatible = "xlnx,compound";
-                ranges = <0 a9000000 2000>;
-                // If this device had extra parameters, then they would
-                // go here.
-                ps2@0 {
-                        compatible = "xlnx,opb-ps2-dual-ref-1.00.a";
-                        reg = <0 40>;
-                        interrupt-parent = <&opb_intc_0>;
-                        interrupts = <3 0>;
-                        cell-index = <0>;
-                };
-                ps2@1000 {
-                        compatible = "xlnx,opb-ps2-dual-ref-1.00.a";
-                        reg = <1000 40>;
-                        interrupt-parent = <&opb_intc_0>;
-                        interrupts = <3 0>;
-                        cell-index = <0>;
-                };
-        };
-
-   Also, the system.mhs file defines bus attachments from the processor
-   to the devices.  The device tree structure should reflect the bus
-   attachments.  Again an example; this system.mhs fragment:
-
-        BEGIN ppc405_virtex4
-                PARAMETER INSTANCE = ppc405_0
-                PARAMETER HW_VER = 1.01.a
-                BUS_INTERFACE DPLB = plb_v34_0
-                BUS_INTERFACE IPLB = plb_v34_0
-        END
-
-        BEGIN opb_intc
-                PARAMETER INSTANCE = opb_intc_0
-                PARAMETER HW_VER = 1.00.c
-                PARAMETER C_BASEADDR = 0xD1000FC0
-                PARAMETER C_HIGHADDR = 0xD1000FDF
-                BUS_INTERFACE SOPB = opb_v20_0
-        END
-
-        BEGIN opb_uart16550
-                PARAMETER INSTANCE = opb_uart16550_0
-                PARAMETER HW_VER = 1.00.d
-                PARAMETER C_BASEADDR = 0xa0000000
-                PARAMETER C_HIGHADDR = 0xa0001FFF
-                BUS_INTERFACE SOPB = opb_v20_0
-        END
-
-        BEGIN plb_v34
-                PARAMETER INSTANCE = plb_v34_0
-                PARAMETER HW_VER = 1.02.a
-        END
-
-        BEGIN plb_bram_if_cntlr
-                PARAMETER INSTANCE = plb_bram_if_cntlr_0
-                PARAMETER HW_VER = 1.00.b
-                PARAMETER C_BASEADDR = 0xFFFF0000
-                PARAMETER C_HIGHADDR = 0xFFFFFFFF
-                BUS_INTERFACE SPLB = plb_v34_0
-        END
-
-        BEGIN plb2opb_bridge
-                PARAMETER INSTANCE = plb2opb_bridge_0
-                PARAMETER HW_VER = 1.01.a
-                PARAMETER C_RNG0_BASEADDR = 0x20000000
-                PARAMETER C_RNG0_HIGHADDR = 0x3FFFFFFF
-                PARAMETER C_RNG1_BASEADDR = 0x60000000
-                PARAMETER C_RNG1_HIGHADDR = 0x7FFFFFFF
-                PARAMETER C_RNG2_BASEADDR = 0x80000000
-                PARAMETER C_RNG2_HIGHADDR = 0xBFFFFFFF
-                PARAMETER C_RNG3_BASEADDR = 0xC0000000
-                PARAMETER C_RNG3_HIGHADDR = 0xDFFFFFFF
-                BUS_INTERFACE SPLB = plb_v34_0
-                BUS_INTERFACE MOPB = opb_v20_0
-        END
-
-   Gives this device tree (some properties removed for clarity):
-
-        plb@0 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                compatible = "xlnx,plb-v34-1.02.a";
-                device_type = "ibm,plb";
-                ranges; // 1:1 translation
-
-                plb_bram_if_cntrl_0: bram@ffff0000 {
-                        reg = <ffff0000 10000>;
-                }
-
-                opb@20000000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        ranges = <20000000 20000000 20000000
-                                  60000000 60000000 20000000
-                                  80000000 80000000 40000000
-                                  c0000000 c0000000 20000000>;
-
-                        opb_uart16550_0: serial@a0000000 {
-                                reg = <a00000000 2000>;
-                        };
-
-                        opb_intc_0: interrupt-controller@d1000fc0 {
-                                reg = <d1000fc0 20>;
-                        };
-                };
-        };
-
-   That covers the general approach to binding xilinx IP cores into the
-   device tree.  The following are bindings for specific devices:
-
-      i) Xilinx ML300 Framebuffer
-
-      Simple framebuffer device from the ML300 reference design (also on the
-      ML403 reference design as well as others).
-
-      Optional properties:
-       - resolution = <xres yres> : pixel resolution of framebuffer.  Some
-                                    implementations use a different resolution.
-                                    Default is <d#640 d#480>
-       - virt-resolution = <xvirt yvirt> : Size of framebuffer in memory.
-                                           Default is <d#1024 d#480>.
-       - rotate-display (empty) : rotate display 180 degrees.
-
-      ii) Xilinx SystemACE
-
-      The Xilinx SystemACE device is used to program FPGAs from an FPGA
-      bitstream stored on a CF card.  It can also be used as a generic CF
-      interface device.
-
-      Optional properties:
-       - 8-bit (empty) : Set this property for SystemACE in 8 bit mode
-
-      iii) Xilinx EMAC and Xilinx TEMAC
-
-      Xilinx Ethernet devices.  In addition to general xilinx properties
-      listed above, nodes for these devices should include a phy-handle
-      property, and may include other common network device properties
-      like local-mac-address.
-
-      iv) Xilinx Uartlite
-
-      Xilinx uartlite devices are simple fixed speed serial ports.
-
-      Required properties:
-       - current-speed : Baud rate of uartlite
-
-      v) Xilinx hwicap
-
-                Xilinx hwicap devices provide access to the configuration logic
-                of the FPGA through the Internal Configuration Access Port
-                (ICAP).  The ICAP enables partial reconfiguration of the FPGA,
-                readback of the configuration information, and some control over
-                'warm boots' of the FPGA fabric.
-
-                Required properties:
-                - xlnx,family : The family of the FPGA, necessary since the
-                      capabilities of the underlying ICAP hardware
-                      differ between different families.  May be
-                      'virtex2p', 'virtex4', or 'virtex5'.
-
-      vi) Xilinx Uart 16550
-
-      Xilinx UART 16550 devices are very similar to the NS16550 but with
-      different register spacing and an offset from the base address.
-
-      Required properties:
-       - clock-frequency : Frequency of the clock input
-       - reg-offset : A value of 3 is required
-       - reg-shift : A value of 2 is required
-
-    e) USB EHCI controllers
-
-    Required properties:
-      - compatible : should be "usb-ehci".
-      - reg : should contain at least address and length of the standard EHCI
-        register set for the device. Optional platform-dependent registers
-        (debug-port or other) can be also specified here, but only after
-        definition of standard EHCI registers.
-      - interrupts : one EHCI interrupt should be described here.
-    If device registers are implemented in big endian mode, the device
-    node should have "big-endian-regs" property.
-    If controller implementation operates with big endian descriptors,
-    "big-endian-desc" property should be specified.
-    If both big endian registers and descriptors are used by the controller
-    implementation, "big-endian" property can be specified instead of having
-    both "big-endian-regs" and "big-endian-desc".
-
-     Example (Sequoia 440EPx):
-            ehci@e0000300 {
-                   compatible = "ibm,usb-ehci-440epx", "usb-ehci";
-                   interrupt-parent = <&UIC0>;
-                   interrupts = <1a 4>;
-                   reg = <0 e0000300 90 0 e0000390 70>;
-                   big-endian;
-           };
-
-   f) MDIO on GPIOs
-
-   Currently defined compatibles:
-   - virtual,gpio-mdio
-
-   MDC and MDIO lines connected to GPIO controllers are listed in the
-   gpios property as described in section VIII.1 in the following order:
-
-   MDC, MDIO.
-
-   Example:
-
-        mdio {
-                compatible = "virtual,mdio-gpio";
-                #address-cells = <1>;
-                #size-cells = <0>;
-                gpios = <&qe_pio_a 11
-                         &qe_pio_c 6>;
-        };
-
-    g) SPI (Serial Peripheral Interface) busses
-
-    SPI busses can be described with a node for the SPI master device
-    and a set of child nodes for each SPI slave on the bus.  For this
-    discussion, it is assumed that the system's SPI controller is in
-    SPI master mode.  This binding does not describe SPI controllers
-    in slave mode.
-
-    The SPI master node requires the following properties:
-    - #address-cells  - number of cells required to define a chip select
-                        address on the SPI bus.
-    - #size-cells     - should be zero.
-    - compatible      - name of SPI bus controller following generic names
-                        recommended practice.
-    No other properties are required in the SPI bus node.  It is assumed
-    that a driver for an SPI bus device will understand that it is an SPI bus.
-    However, the binding does not attempt to define the specific method for
-    assigning chip select numbers.  Since SPI chip select configuration is
-    flexible and non-standardized, it is left out of this binding with the
-    assumption that board specific platform code will be used to manage
-    chip selects.  Individual drivers can define additional properties to
-    support describing the chip select layout.
-
-    SPI slave nodes must be children of the SPI master node and can
-    contain the following properties.
-    - reg             - (required) chip select address of device.
-    - compatible      - (required) name of SPI device following generic names
-                        recommended practice
-    - spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz
-    - spi-cpol        - (optional) Empty property indicating device requires
-                        inverse clock polarity (CPOL) mode
-    - spi-cpha        - (optional) Empty property indicating device requires
-                        shifted clock phase (CPHA) mode
-    - spi-cs-high     - (optional) Empty property indicating device requires
-                        chip select active high
-
-    SPI example for an MPC5200 SPI bus:
-                spi@f00 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
-                        reg = <0xf00 0x20>;
-                        interrupts = <2 13 0 2 14 0>;
-                        interrupt-parent = <&mpc5200_pic>;
-
-                        ethernet-switch@0 {
-                                compatible = "micrel,ks8995m";
-                                spi-max-frequency = <1000000>;
-                                reg = <0>;
-                        };
-
-                        codec@1 {
-                                compatible = "ti,tlv320aic26";
-                                spi-max-frequency = <100000>;
-                                reg = <1>;
-                        };
-                };
-
-VII - Marvell Discovery mv64[345]6x System Controller chips
-===========================================================
-
-The Marvell mv64[345]60 series of system controller chips contain
-many of the peripherals needed to implement a complete computer
-system.  In this section, we define device tree nodes to describe
-the system controller chip itself and each of the peripherals
-which it contains.  Compatible string values for each node are
-prefixed with the string "marvell,", for Marvell Technology Group Ltd.
-
-1) The /system-controller node
-
-  This node is used to represent the system-controller and must be
-  present when the system uses a system controller chip. The top-level
-  system-controller node contains information that is global to all
-  devices within the system controller chip. The node name begins
-  with "system-controller" followed by the unit address, which is
-  the base address of the memory-mapped register set for the system
-  controller chip.
-
-  Required properties:
-
-    - ranges : Describes the translation of system controller addresses
-      for memory mapped registers.
-    - clock-frequency: Contains the main clock frequency for the system
-      controller chip.
-    - reg : This property defines the address and size of the
-      memory-mapped registers contained within the system controller
-      chip.  The address specified in the "reg" property should match
-      the unit address of the system-controller node.
-    - #address-cells : Address representation for system controller
-      devices.  This field represents the number of cells needed to
-      represent the address of the memory-mapped registers of devices
-      within the system controller chip.
-    - #size-cells : Size representation for for the memory-mapped
-      registers within the system controller chip.
-    - #interrupt-cells : Defines the width of cells used to represent
-      interrupts.
-
-  Optional properties:
-
-    - model : The specific model of the system controller chip.  Such
-      as, "mv64360", "mv64460", or "mv64560".
-    - compatible : A string identifying the compatibility identifiers
-      of the system controller chip.
-
-  The system-controller node contains child nodes for each system
-  controller device that the platform uses.  Nodes should not be created
-  for devices which exist on the system controller chip but are not used
-
-  Example Marvell Discovery mv64360 system-controller node:
-
-    system-controller@f1000000 { /* Marvell Discovery mv64360 */
-            #address-cells = <1>;
-            #size-cells = <1>;
-            model = "mv64360";                      /* Default */
-            compatible = "marvell,mv64360";
-            clock-frequency = <133333333>;
-            reg = <0xf1000000 0x10000>;
-            virtual-reg = <0xf1000000>;
-            ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */
-                    0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */
-                    0xa0000000 0xa0000000 0x4000000 /* User FLASH */
-                    0x00000000 0xf1000000 0x0010000 /* Bridge's regs */
-                    0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */
-
-            [ child node definitions... ]
-    }
-
-2) Child nodes of /system-controller
-
-   a) Marvell Discovery MDIO bus
-
-   The MDIO is a bus to which the PHY devices are connected.  For each
-   device that exists on this bus, a child node should be created.  See
-   the definition of the PHY node below for an example of how to define
-   a PHY.
-
-   Required properties:
-     - #address-cells : Should be <1>
-     - #size-cells : Should be <0>
-     - device_type : Should be "mdio"
-     - compatible : Should be "marvell,mv64360-mdio"
-
-   Example:
-
-     mdio {
-             #address-cells = <1>;
-             #size-cells = <0>;
-             device_type = "mdio";
-             compatible = "marvell,mv64360-mdio";
-
-             ethernet-phy@0 {
-                     ......
-             };
-     };
-
-
-   b) Marvell Discovery ethernet controller
-
-   The Discover ethernet controller is described with two levels
-   of nodes.  The first level describes an ethernet silicon block
-   and the second level describes up to 3 ethernet nodes within
-   that block.  The reason for the multiple levels is that the
-   registers for the node are interleaved within a single set
-   of registers.  The "ethernet-block" level describes the
-   shared register set, and the "ethernet" nodes describe ethernet
-   port-specific properties.
-
-   Ethernet block node
-
-   Required properties:
-     - #address-cells : <1>
-     - #size-cells : <0>
-     - compatible : "marvell,mv64360-eth-block"
-     - reg : Offset and length of the register set for this block
-
-   Example Discovery Ethernet block node:
-     ethernet-block@2000 {
-             #address-cells = <1>;
-             #size-cells = <0>;
-             compatible = "marvell,mv64360-eth-block";
-             reg = <0x2000 0x2000>;
-             ethernet@0 {
-                     .......
-             };
-     };
-
-   Ethernet port node
-
-   Required properties:
-     - device_type : Should be "network".
-     - compatible : Should be "marvell,mv64360-eth".
-     - reg : Should be <0>, <1>, or <2>, according to which registers
-       within the silicon block the device uses.
-     - interrupts : <a> where a is the interrupt number for the port.
-     - interrupt-parent : the phandle for the interrupt controller
-       that services interrupts for this device.
-     - phy : the phandle for the PHY connected to this ethernet
-       controller.
-     - local-mac-address : 6 bytes, MAC address
-
-   Example Discovery Ethernet port node:
-     ethernet@0 {
-             device_type = "network";
-             compatible = "marvell,mv64360-eth";
-             reg = <0>;
-             interrupts = <32>;
-             interrupt-parent = <&PIC>;
-             phy = <&PHY0>;
-             local-mac-address = [ 00 00 00 00 00 00 ];
-     };
-
-
-
-   c) Marvell Discovery PHY nodes
-
-   Required properties:
-     - device_type : Should be "ethernet-phy"
-     - interrupts : <a> where a is the interrupt number for this phy.
-     - interrupt-parent : the phandle for the interrupt controller that
-       services interrupts for this device.
-     - reg : The ID number for the phy, usually a small integer
-
-   Example Discovery PHY node:
-     ethernet-phy@1 {
-             device_type = "ethernet-phy";
-             compatible = "broadcom,bcm5421";
-             interrupts = <76>;      /* GPP 12 */
-             interrupt-parent = <&PIC>;
-             reg = <1>;
-     };
-
-
-   d) Marvell Discovery SDMA nodes
-
-   Represent DMA hardware associated with the MPSC (multiprotocol
-   serial controllers).
-
-   Required properties:
-     - compatible : "marvell,mv64360-sdma"
-     - reg : Offset and length of the register set for this device
-     - interrupts : <a> where a is the interrupt number for the DMA
-       device.
-     - interrupt-parent : the phandle for the interrupt controller
-       that services interrupts for this device.
-
-   Example Discovery SDMA node:
-     sdma@4000 {
-             compatible = "marvell,mv64360-sdma";
-             reg = <0x4000 0xc18>;
-             virtual-reg = <0xf1004000>;
-             interrupts = <36>;
-             interrupt-parent = <&PIC>;
-     };
-
-
-   e) Marvell Discovery BRG nodes
-
-   Represent baud rate generator hardware associated with the MPSC
-   (multiprotocol serial controllers).
-
-   Required properties:
-     - compatible : "marvell,mv64360-brg"
-     - reg : Offset and length of the register set for this device
-     - clock-src : A value from 0 to 15 which selects the clock
-       source for the baud rate generator.  This value corresponds
-       to the CLKS value in the BRGx configuration register.  See
-       the mv64x60 User's Manual.
-     - clock-frequence : The frequency (in Hz) of the baud rate
-       generator's input clock.
-     - current-speed : The current speed setting (presumably by
-       firmware) of the baud rate generator.
-
-   Example Discovery BRG node:
-     brg@b200 {
-             compatible = "marvell,mv64360-brg";
-             reg = <0xb200 0x8>;
-             clock-src = <8>;
-             clock-frequency = <133333333>;
-             current-speed = <9600>;
-     };
-
-
-   f) Marvell Discovery CUNIT nodes
-
-   Represent the Serial Communications Unit device hardware.
-
-   Required properties:
-     - reg : Offset and length of the register set for this device
-
-   Example Discovery CUNIT node:
-     cunit@f200 {
-             reg = <0xf200 0x200>;
-     };
-
-
-   g) Marvell Discovery MPSCROUTING nodes
-
-   Represent the Discovery's MPSC routing hardware
-
-   Required properties:
-     - reg : Offset and length of the register set for this device
-
-   Example Discovery CUNIT node:
-     mpscrouting@b500 {
-             reg = <0xb400 0xc>;
-     };
-
-
-   h) Marvell Discovery MPSCINTR nodes
-
-   Represent the Discovery's MPSC DMA interrupt hardware registers
-   (SDMA cause and mask registers).
-
-   Required properties:
-     - reg : Offset and length of the register set for this device
-
-   Example Discovery MPSCINTR node:
-     mpsintr@b800 {
-             reg = <0xb800 0x100>;
-     };
-
-
-   i) Marvell Discovery MPSC nodes
-
-   Represent the Discovery's MPSC (Multiprotocol Serial Controller)
-   serial port.
-
-   Required properties:
-     - device_type : "serial"
-     - compatible : "marvell,mv64360-mpsc"
-     - reg : Offset and length of the register set for this device
-     - sdma : the phandle for the SDMA node used by this port
-     - brg : the phandle for the BRG node used by this port
-     - cunit : the phandle for the CUNIT node used by this port
-     - mpscrouting : the phandle for the MPSCROUTING node used by this port
-     - mpscintr : the phandle for the MPSCINTR node used by this port
-     - cell-index : the hardware index of this cell in the MPSC core
-     - max_idle : value needed for MPSC CHR3 (Maximum Frame Length)
-       register
-     - interrupts : <a> where a is the interrupt number for the MPSC.
-     - interrupt-parent : the phandle for the interrupt controller
-       that services interrupts for this device.
-
-   Example Discovery MPSCINTR node:
-     mpsc@8000 {
-             device_type = "serial";
-             compatible = "marvell,mv64360-mpsc";
-             reg = <0x8000 0x38>;
-             virtual-reg = <0xf1008000>;
-             sdma = <&SDMA0>;
-             brg = <&BRG0>;
-             cunit = <&CUNIT>;
-             mpscrouting = <&MPSCROUTING>;
-             mpscintr = <&MPSCINTR>;
-             cell-index = <0>;
-             max_idle = <40>;
-             interrupts = <40>;
-             interrupt-parent = <&PIC>;
-     };
-
-
-   j) Marvell Discovery Watch Dog Timer nodes
-
-   Represent the Discovery's watchdog timer hardware
-
-   Required properties:
-     - compatible : "marvell,mv64360-wdt"
-     - reg : Offset and length of the register set for this device
-
-   Example Discovery Watch Dog Timer node:
-     wdt@b410 {
-             compatible = "marvell,mv64360-wdt";
-             reg = <0xb410 0x8>;
-     };
-
-
-   k) Marvell Discovery I2C nodes
-
-   Represent the Discovery's I2C hardware
-
-   Required properties:
-     - device_type : "i2c"
-     - compatible : "marvell,mv64360-i2c"
-     - reg : Offset and length of the register set for this device
-     - interrupts : <a> where a is the interrupt number for the I2C.
-     - interrupt-parent : the phandle for the interrupt controller
-       that services interrupts for this device.
-
-   Example Discovery I2C node:
-             compatible = "marvell,mv64360-i2c";
-             reg = <0xc000 0x20>;
-             virtual-reg = <0xf100c000>;
-             interrupts = <37>;
-             interrupt-parent = <&PIC>;
-     };
-
-
-   l) Marvell Discovery PIC (Programmable Interrupt Controller) nodes
-
-   Represent the Discovery's PIC hardware
-
-   Required properties:
-     - #interrupt-cells : <1>
-     - #address-cells : <0>
-     - compatible : "marvell,mv64360-pic"
-     - reg : Offset and length of the register set for this device
-     - interrupt-controller
-
-   Example Discovery PIC node:
-     pic {
-             #interrupt-cells = <1>;
-             #address-cells = <0>;
-             compatible = "marvell,mv64360-pic";
-             reg = <0x0 0x88>;
-             interrupt-controller;
-     };
-
-
-   m) Marvell Discovery MPP (Multipurpose Pins) multiplexing nodes
-
-   Represent the Discovery's MPP hardware
-
-   Required properties:
-     - compatible : "marvell,mv64360-mpp"
-     - reg : Offset and length of the register set for this device
-
-   Example Discovery MPP node:
-     mpp@f000 {
-             compatible = "marvell,mv64360-mpp";
-             reg = <0xf000 0x10>;
-     };
-
-
-   n) Marvell Discovery GPP (General Purpose Pins) nodes
-
-   Represent the Discovery's GPP hardware
-
-   Required properties:
-     - compatible : "marvell,mv64360-gpp"
-     - reg : Offset and length of the register set for this device
-
-   Example Discovery GPP node:
-     gpp@f000 {
-             compatible = "marvell,mv64360-gpp";
-             reg = <0xf100 0x20>;
-     };
-
-
-   o) Marvell Discovery PCI host bridge node
-
-   Represents the Discovery's PCI host bridge device.  The properties
-   for this node conform to Rev 2.1 of the PCI Bus Binding to IEEE
-   1275-1994.  A typical value for the compatible property is
-   "marvell,mv64360-pci".
-
-   Example Discovery PCI host bridge node
-     pci@80000000 {
-             #address-cells = <3>;
-             #size-cells = <2>;
-             #interrupt-cells = <1>;
-             device_type = "pci";
-             compatible = "marvell,mv64360-pci";
-             reg = <0xcf8 0x8>;
-             ranges = <0x01000000 0x0        0x0
-                             0x88000000 0x0 0x01000000
-                       0x02000000 0x0 0x80000000
-                             0x80000000 0x0 0x08000000>;
-             bus-range = <0 255>;
-             clock-frequency = <66000000>;
-             interrupt-parent = <&PIC>;
-             interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-             interrupt-map = <
-                     /* IDSEL 0x0a */
-                     0x5000 0 0 1 &PIC 80
-                     0x5000 0 0 2 &PIC 81
-                     0x5000 0 0 3 &PIC 91
-                     0x5000 0 0 4 &PIC 93
-
-                     /* IDSEL 0x0b */
-                     0x5800 0 0 1 &PIC 91
-                     0x5800 0 0 2 &PIC 93
-                     0x5800 0 0 3 &PIC 80
-                     0x5800 0 0 4 &PIC 81
-
-                     /* IDSEL 0x0c */
-                     0x6000 0 0 1 &PIC 91
-                     0x6000 0 0 2 &PIC 93
-                     0x6000 0 0 3 &PIC 80
-                     0x6000 0 0 4 &PIC 81
-
-                     /* IDSEL 0x0d */
-                     0x6800 0 0 1 &PIC 93
-                     0x6800 0 0 2 &PIC 80
-                     0x6800 0 0 3 &PIC 81
-                     0x6800 0 0 4 &PIC 91
-             >;
-     };
-
-
-   p) Marvell Discovery CPU Error nodes
-
-   Represent the Discovery's CPU error handler device.
-
-   Required properties:
-     - compatible : "marvell,mv64360-cpu-error"
-     - reg : Offset and length of the register set for this device
-     - interrupts : the interrupt number for this device
-     - interrupt-parent : the phandle for the interrupt controller
-       that services interrupts for this device.
-
-   Example Discovery CPU Error node:
-     cpu-error@0070 {
-             compatible = "marvell,mv64360-cpu-error";
-             reg = <0x70 0x10 0x128 0x28>;
-             interrupts = <3>;
-             interrupt-parent = <&PIC>;
-     };
-
-
-   q) Marvell Discovery SRAM Controller nodes
-
-   Represent the Discovery's SRAM controller device.
-
-   Required properties:
-     - compatible : "marvell,mv64360-sram-ctrl"
-     - reg : Offset and length of the register set for this device
-     - interrupts : the interrupt number for this device
-     - interrupt-parent : the phandle for the interrupt controller
-       that services interrupts for this device.
-
-   Example Discovery SRAM Controller node:
-     sram-ctrl@0380 {
-             compatible = "marvell,mv64360-sram-ctrl";
-             reg = <0x380 0x80>;
-             interrupts = <13>;
-             interrupt-parent = <&PIC>;
-     };
-
-
-   r) Marvell Discovery PCI Error Handler nodes
-
-   Represent the Discovery's PCI error handler device.
-
-   Required properties:
-     - compatible : "marvell,mv64360-pci-error"
-     - reg : Offset and length of the register set for this device
-     - interrupts : the interrupt number for this device
-     - interrupt-parent : the phandle for the interrupt controller
-       that services interrupts for this device.
-
-   Example Discovery PCI Error Handler node:
-     pci-error@1d40 {
-             compatible = "marvell,mv64360-pci-error";
-             reg = <0x1d40 0x40 0xc28 0x4>;
-             interrupts = <12>;
-             interrupt-parent = <&PIC>;
-     };
-
-
-   s) Marvell Discovery Memory Controller nodes
-
-   Represent the Discovery's memory controller device.
-
-   Required properties:
-     - compatible : "marvell,mv64360-mem-ctrl"
-     - reg : Offset and length of the register set for this device
-     - interrupts : the interrupt number for this device
-     - interrupt-parent : the phandle for the interrupt controller
-       that services interrupts for this device.
-
-   Example Discovery Memory Controller node:
-     mem-ctrl@1400 {
-             compatible = "marvell,mv64360-mem-ctrl";
-             reg = <0x1400 0x60>;
-             interrupts = <17>;
-             interrupt-parent = <&PIC>;
-     };
-
-
-VIII - Specifying interrupt information for devices
+VII - Specifying interrupt information for devices
 ===================================================
 
 The device tree represents the busses and devices of a hardware
@@ -2439,56 +1324,7 @@ encodings listed below:
         2 =  high to low edge sensitive type enabled
         3 =  low to high edge sensitive type enabled
 
-IX - Specifying GPIO information for devices
-============================================
-
-1) gpios property
------------------
-
-Nodes that makes use of GPIOs should define them using `gpios' property,
-format of which is: <&gpio-controller1-phandle gpio1-specifier
-                     &gpio-controller2-phandle gpio2-specifier
-                     0 /* holes are permitted, means no GPIO 3 */
-                     &gpio-controller4-phandle gpio4-specifier
-                     ...>;
-
-Note that gpio-specifier length is controller dependent.
-
-gpio-specifier may encode: bank, pin position inside the bank,
-whether pin is open-drain and whether pin is logically inverted.
-
-Example of the node using GPIOs:
-
-        node {
-                gpios = <&qe_pio_e 18 0>;
-        };
-
-In this example gpio-specifier is "18 0" and encodes GPIO pin number,
-and empty GPIO flags as accepted by the "qe_pio_e" gpio-controller.
-
-2) gpio-controller nodes
-------------------------
-
-Every GPIO controller node must have #gpio-cells property defined,
-this information will be used to translate gpio-specifiers.
-
-Example of two SOC GPIO banks defined as gpio-controller nodes:
-
-        qe_pio_a: gpio-controller@1400 {
-                #gpio-cells = <2>;
-                compatible = "fsl,qe-pario-bank-a", "fsl,qe-pario-bank";
-                reg = <0x1400 0x18>;
-                gpio-controller;
-        };
-
-        qe_pio_e: gpio-controller@1460 {
-                #gpio-cells = <2>;
-                compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
-                reg = <0x1460 0x18>;
-                gpio-controller;
-        };
-
-X - Specifying Device Power Management Information (sleep property)
+VIII - Specifying Device Power Management Information (sleep property)
 ===================================================================
 
 Devices on SOCs often have mechanisms for placing devices into low-power
diff --git a/Documentation/powerpc/dts-bindings/4xx/emac.txt b/Documentation/powerpc/dts-bindings/4xx/emac.txt
new file mode 100644
index 000000000000..2161334a7ca5
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/4xx/emac.txt
@@ -0,0 +1,148 @@
+    4xx/Axon EMAC ethernet nodes
+
+    The EMAC ethernet controller in IBM and AMCC 4xx chips, and also
+    the Axon bridge.  To operate this needs to interact with a ths
+    special McMAL DMA controller, and sometimes an RGMII or ZMII
+    interface.  In addition to the nodes and properties described
+    below, the node for the OPB bus on which the EMAC sits must have a
+    correct clock-frequency property.
+
+      i) The EMAC node itself
+
+    Required properties:
+    - device_type       : "network"
+
+    - compatible        : compatible list, contains 2 entries, first is
+                          "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
+                          405gp, Axon) and second is either "ibm,emac" or
+                          "ibm,emac4".  For Axon, thus, we have: "ibm,emac-axon",
+                          "ibm,emac4"
+    - interrupts        : <interrupt mapping for EMAC IRQ and WOL IRQ>
+    - interrupt-parent  : optional, if needed for interrupt mapping
+    - reg               : <registers mapping>
+    - local-mac-address : 6 bytes, MAC address
+    - mal-device        : phandle of the associated McMAL node
+    - mal-tx-channel    : 1 cell, index of the tx channel on McMAL associated
+                          with this EMAC
+    - mal-rx-channel    : 1 cell, index of the rx channel on McMAL associated
+                          with this EMAC
+    - cell-index        : 1 cell, hardware index of the EMAC cell on a given
+                          ASIC (typically 0x0 and 0x1 for EMAC0 and EMAC1 on
+                          each Axon chip)
+    - max-frame-size    : 1 cell, maximum frame size supported in bytes
+    - rx-fifo-size      : 1 cell, Rx fifo size in bytes for 10 and 100 Mb/sec
+                          operations.
+                          For Axon, 2048
+    - tx-fifo-size      : 1 cell, Tx fifo size in bytes for 10 and 100 Mb/sec
+                          operations.
+                          For Axon, 2048.
+    - fifo-entry-size   : 1 cell, size of a fifo entry (used to calculate
+                          thresholds).
+                          For Axon, 0x00000010
+    - mal-burst-size    : 1 cell, MAL burst size (used to calculate thresholds)
+                          in bytes.
+                          For Axon, 0x00000100 (I think ...)
+    - phy-mode          : string, mode of operations of the PHY interface.
+                          Supported values are: "mii", "rmii", "smii", "rgmii",
+                          "tbi", "gmii", rtbi", "sgmii".
+                          For Axon on CAB, it is "rgmii"
+    - mdio-device       : 1 cell, required iff using shared MDIO registers
+                          (440EP).  phandle of the EMAC to use to drive the
+                          MDIO lines for the PHY used by this EMAC.
+    - zmii-device       : 1 cell, required iff connected to a ZMII.  phandle of
+                          the ZMII device node
+    - zmii-channel      : 1 cell, required iff connected to a ZMII.  Which ZMII
+                          channel or 0xffffffff if ZMII is only used for MDIO.
+    - rgmii-device      : 1 cell, required iff connected to an RGMII. phandle
+                          of the RGMII device node.
+                          For Axon: phandle of plb5/plb4/opb/rgmii
+    - rgmii-channel     : 1 cell, required iff connected to an RGMII.  Which
+                          RGMII channel is used by this EMAC.
+                          Fox Axon: present, whatever value is appropriate for each
+                          EMAC, that is the content of the current (bogus) "phy-port"
+                          property.
+
+    Optional properties:
+    - phy-address       : 1 cell, optional, MDIO address of the PHY. If absent,
+                          a search is performed.
+    - phy-map           : 1 cell, optional, bitmap of addresses to probe the PHY
+                          for, used if phy-address is absent. bit 0x00000001 is
+                          MDIO address 0.
+                          For Axon it can be absent, though my current driver
+                          doesn't handle phy-address yet so for now, keep
+                          0x00ffffff in it.
+    - rx-fifo-size-gige : 1 cell, Rx fifo size in bytes for 1000 Mb/sec
+                          operations (if absent the value is the same as
+                          rx-fifo-size).  For Axon, either absent or 2048.
+    - tx-fifo-size-gige : 1 cell, Tx fifo size in bytes for 1000 Mb/sec
+                          operations (if absent the value is the same as
+                          tx-fifo-size). For Axon, either absent or 2048.
+    - tah-device        : 1 cell, optional. If connected to a TAH engine for
+                          offload, phandle of the TAH device node.
+    - tah-channel       : 1 cell, optional. If appropriate, channel used on the
+                          TAH engine.
+
+    Example:
+
+        EMAC0: ethernet@40000800 {
+                device_type = "network";
+                compatible = "ibm,emac-440gp", "ibm,emac";
+                interrupt-parent = <&UIC1>;
+                interrupts = <1c 4 1d 4>;
+                reg = <40000800 70>;
+                local-mac-address = [00 04 AC E3 1B 1E];
+                mal-device = <&MAL0>;
+                mal-tx-channel = <0 1>;
+                mal-rx-channel = <0>;
+                cell-index = <0>;
+                max-frame-size = <5dc>;
+                rx-fifo-size = <1000>;
+                tx-fifo-size = <800>;
+                phy-mode = "rmii";
+                phy-map = <00000001>;
+                zmii-device = <&ZMII0>;
+                zmii-channel = <0>;
+        };
+
+      ii) McMAL node
+
+    Required properties:
+    - device_type        : "dma-controller"
+    - compatible         : compatible list, containing 2 entries, first is
+                           "ibm,mcmal-CHIP" where CHIP is the host ASIC (like
+                           emac) and the second is either "ibm,mcmal" or
+                           "ibm,mcmal2".
+                           For Axon, "ibm,mcmal-axon","ibm,mcmal2"
+    - interrupts         : <interrupt mapping for the MAL interrupts sources:
+                           5 sources: tx_eob, rx_eob, serr, txde, rxde>.
+                           For Axon: This is _different_ from the current
+                           firmware.  We use the "delayed" interrupts for txeob
+                           and rxeob. Thus we end up with mapping those 5 MPIC
+                           interrupts, all level positive sensitive: 10, 11, 32,
+                           33, 34 (in decimal)
+    - dcr-reg            : < DCR registers range >
+    - dcr-parent         : if needed for dcr-reg
+    - num-tx-chans       : 1 cell, number of Tx channels
+    - num-rx-chans       : 1 cell, number of Rx channels
+
+      iii) ZMII node
+
+    Required properties:
+    - compatible         : compatible list, containing 2 entries, first is
+                           "ibm,zmii-CHIP" where CHIP is the host ASIC (like
+                           EMAC) and the second is "ibm,zmii".
+                           For Axon, there is no ZMII node.
+    - reg                : <registers mapping>
+
+      iv) RGMII node
+
+    Required properties:
+    - compatible         : compatible list, containing 2 entries, first is
+                           "ibm,rgmii-CHIP" where CHIP is the host ASIC (like
+                           EMAC) and the second is "ibm,rgmii".
+                           For Axon, "ibm,rgmii-axon","ibm,rgmii"
+    - reg                : <registers mapping>
+    - revision           : as provided by the RGMII new version register if
+                           available.
+                           For Axon: 0x0000012a
+
diff --git a/Documentation/powerpc/dts-bindings/gpio/gpio.txt b/Documentation/powerpc/dts-bindings/gpio/gpio.txt
new file mode 100644
index 000000000000..edaa84d288a1
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/gpio/gpio.txt
@@ -0,0 +1,50 @@
+Specifying GPIO information for devices
+============================================
+
+1) gpios property
+-----------------
+
+Nodes that makes use of GPIOs should define them using `gpios' property,
+format of which is: <&gpio-controller1-phandle gpio1-specifier
+                     &gpio-controller2-phandle gpio2-specifier
+                     0 /* holes are permitted, means no GPIO 3 */
+                     &gpio-controller4-phandle gpio4-specifier
+                     ...>;
+
+Note that gpio-specifier length is controller dependent.
+
+gpio-specifier may encode: bank, pin position inside the bank,
+whether pin is open-drain and whether pin is logically inverted.
+
+Example of the node using GPIOs:
+
+        node {
+                gpios = <&qe_pio_e 18 0>;
+        };
+
+In this example gpio-specifier is "18 0" and encodes GPIO pin number,
+and empty GPIO flags as accepted by the "qe_pio_e" gpio-controller.
+
+2) gpio-controller nodes
+------------------------
+
+Every GPIO controller node must have #gpio-cells property defined,
+this information will be used to translate gpio-specifiers.
+
+Example of two SOC GPIO banks defined as gpio-controller nodes:
+
+        qe_pio_a: gpio-controller@1400 {
+                #gpio-cells = <2>;
+                compatible = "fsl,qe-pario-bank-a", "fsl,qe-pario-bank";
+                reg = <0x1400 0x18>;
+                gpio-controller;
+        };
+
+        qe_pio_e: gpio-controller@1460 {
+                #gpio-cells = <2>;
+                compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
+                reg = <0x1460 0x18>;
+                gpio-controller;
+        };
+
+
diff --git a/Documentation/powerpc/dts-bindings/gpio/led.txt b/Documentation/powerpc/dts-bindings/gpio/led.txt
index 4fe14deedc0a..064db928c3c1 100644
--- a/Documentation/powerpc/dts-bindings/gpio/led.txt
+++ b/Documentation/powerpc/dts-bindings/gpio/led.txt
@@ -16,10 +16,17 @@ LED sub-node properties:
   string defining the trigger assigned to the LED.  Current triggers are:
     "backlight" - LED will act as a back-light, controlled by the framebuffer
                   system
-    "default-on" - LED will turn on
+    "default-on" - LED will turn on, but see "default-state" below
     "heartbeat" - LED "double" flashes at a load average based rate
     "ide-disk" - LED indicates disk activity
     "timer" - LED flashes at a fixed, configurable rate
+- default-state:  (optional) The initial state of the LED.  Valid
+  values are "on", "off", and "keep".  If the LED is already on or off
+  and the default-state property is set the to same value, then no
+  glitch should be produced where the LED momentarily turns off (or
+  on).  The "keep" setting will keep the LED at whatever its current
+  state is, without producing a glitch.  The default is off if this
+  property is not present.
 
 Examples:
 
@@ -30,14 +37,22 @@ leds {
                 gpios = <&mcu_pio 0 1>; /* Active low */
                 linux,default-trigger = "ide-disk";
         };
+
+        fault {
+                gpios = <&mcu_pio 1 0>;
+                /* Keep LED on if BIOS detected hardware fault */
+                default-state = "keep";
+        };
 };
 
 run-control {
         compatible = "gpio-leds";
         red {
                 gpios = <&mpc8572 6 0>;
+                default-state = "off";
         };
         green {
                 gpios = <&mpc8572 7 0>;
+                default-state = "on";
         };
 }
diff --git a/Documentation/powerpc/dts-bindings/gpio/mdio.txt b/Documentation/powerpc/dts-bindings/gpio/mdio.txt
new file mode 100644
index 000000000000..bc9549529014
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/gpio/mdio.txt
@@ -0,0 +1,19 @@
+MDIO on GPIOs
+
+Currently defined compatibles:
+- virtual,gpio-mdio
+
+MDC and MDIO lines connected to GPIO controllers are listed in the
+gpios property as described in section VIII.1 in the following order:
+
+MDC, MDIO.
+
+Example:
+
+mdio {
+        compatible = "virtual,mdio-gpio";
+        #address-cells = <1>;
+        #size-cells = <0>;
+        gpios = <&qe_pio_a 11
+                 &qe_pio_c 6>;
+};
diff --git a/Documentation/powerpc/dts-bindings/marvell.txt b/Documentation/powerpc/dts-bindings/marvell.txt
new file mode 100644
index 000000000000..3708a2fd4747
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/marvell.txt
@@ -0,0 +1,521 @@
+Marvell Discovery mv64[345]6x System Controller chips
+===========================================================
+
+The Marvell mv64[345]60 series of system controller chips contain
+many of the peripherals needed to implement a complete computer
+system.  In this section, we define device tree nodes to describe
+the system controller chip itself and each of the peripherals
+which it contains.  Compatible string values for each node are
+prefixed with the string "marvell,", for Marvell Technology Group Ltd.
+
+1) The /system-controller node
+
+  This node is used to represent the system-controller and must be
+  present when the system uses a system controller chip. The top-level
+  system-controller node contains information that is global to all
+  devices within the system controller chip. The node name begins
+  with "system-controller" followed by the unit address, which is
+  the base address of the memory-mapped register set for the system
+  controller chip.
+
+  Required properties:
+
+    - ranges : Describes the translation of system controller addresses
+      for memory mapped registers.
+    - clock-frequency: Contains the main clock frequency for the system
+      controller chip.
+    - reg : This property defines the address and size of the
+      memory-mapped registers contained within the system controller
+      chip.  The address specified in the "reg" property should match
+      the unit address of the system-controller node.
+    - #address-cells : Address representation for system controller
+      devices.  This field represents the number of cells needed to
+      represent the address of the memory-mapped registers of devices
+      within the system controller chip.
+    - #size-cells : Size representation for for the memory-mapped
+      registers within the system controller chip.
+    - #interrupt-cells : Defines the width of cells used to represent
+      interrupts.
+
+  Optional properties:
+
+    - model : The specific model of the system controller chip.  Such
+      as, "mv64360", "mv64460", or "mv64560".
+    - compatible : A string identifying the compatibility identifiers
+      of the system controller chip.
+
+  The system-controller node contains child nodes for each system
+  controller device that the platform uses.  Nodes should not be created
+  for devices which exist on the system controller chip but are not used
+
+  Example Marvell Discovery mv64360 system-controller node:
+
+    system-controller@f1000000 { /* Marvell Discovery mv64360 */
+            #address-cells = <1>;
+            #size-cells = <1>;
+            model = "mv64360";                      /* Default */
+            compatible = "marvell,mv64360";
+            clock-frequency = <133333333>;
+            reg = <0xf1000000 0x10000>;
+            virtual-reg = <0xf1000000>;
+            ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */
+                    0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */
+                    0xa0000000 0xa0000000 0x4000000 /* User FLASH */
+                    0x00000000 0xf1000000 0x0010000 /* Bridge's regs */
+                    0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */
+
+            [ child node definitions... ]
+    }
+
+2) Child nodes of /system-controller
+
+   a) Marvell Discovery MDIO bus
+
+   The MDIO is a bus to which the PHY devices are connected.  For each
+   device that exists on this bus, a child node should be created.  See
+   the definition of the PHY node below for an example of how to define
+   a PHY.
+
+   Required properties:
+     - #address-cells : Should be <1>
+     - #size-cells : Should be <0>
+     - device_type : Should be "mdio"
+     - compatible : Should be "marvell,mv64360-mdio"
+
+   Example:
+
+     mdio {
+             #address-cells = <1>;
+             #size-cells = <0>;
+             device_type = "mdio";
+             compatible = "marvell,mv64360-mdio";
+
+             ethernet-phy@0 {
+                     ......
+             };
+     };
+
+
+   b) Marvell Discovery ethernet controller
+
+   The Discover ethernet controller is described with two levels
+   of nodes.  The first level describes an ethernet silicon block
+   and the second level describes up to 3 ethernet nodes within
+   that block.  The reason for the multiple levels is that the
+   registers for the node are interleaved within a single set
+   of registers.  The "ethernet-block" level describes the
+   shared register set, and the "ethernet" nodes describe ethernet
+   port-specific properties.
+
+   Ethernet block node
+
+   Required properties:
+     - #address-cells : <1>
+     - #size-cells : <0>
+     - compatible : "marvell,mv64360-eth-block"
+     - reg : Offset and length of the register set for this block
+
+   Example Discovery Ethernet block node:
+     ethernet-block@2000 {
+             #address-cells = <1>;
+             #size-cells = <0>;
+             compatible = "marvell,mv64360-eth-block";
+             reg = <0x2000 0x2000>;
+             ethernet@0 {
+                     .......
+             };
+     };
+
+   Ethernet port node
+
+   Required properties:
+     - device_type : Should be "network".
+     - compatible : Should be "marvell,mv64360-eth".
+     - reg : Should be <0>, <1>, or <2>, according to which registers
+       within the silicon block the device uses.
+     - interrupts : <a> where a is the interrupt number for the port.
+     - interrupt-parent : the phandle for the interrupt controller
+       that services interrupts for this device.
+     - phy : the phandle for the PHY connected to this ethernet
+       controller.
+     - local-mac-address : 6 bytes, MAC address
+
+   Example Discovery Ethernet port node:
+     ethernet@0 {
+             device_type = "network";
+             compatible = "marvell,mv64360-eth";
+             reg = <0>;
+             interrupts = <32>;
+             interrupt-parent = <&PIC>;
+             phy = <&PHY0>;
+             local-mac-address = [ 00 00 00 00 00 00 ];
+     };
+
+
+
+   c) Marvell Discovery PHY nodes
+
+   Required properties:
+     - device_type : Should be "ethernet-phy"
+     - interrupts : <a> where a is the interrupt number for this phy.
+     - interrupt-parent : the phandle for the interrupt controller that
+       services interrupts for this device.
+     - reg : The ID number for the phy, usually a small integer
+
+   Example Discovery PHY node:
+     ethernet-phy@1 {
+             device_type = "ethernet-phy";
+             compatible = "broadcom,bcm5421";
+             interrupts = <76>;      /* GPP 12 */
+             interrupt-parent = <&PIC>;
+             reg = <1>;
+     };
+
+
+   d) Marvell Discovery SDMA nodes
+
+   Represent DMA hardware associated with the MPSC (multiprotocol
+   serial controllers).
+
+   Required properties:
+     - compatible : "marvell,mv64360-sdma"
+     - reg : Offset and length of the register set for this device
+     - interrupts : <a> where a is the interrupt number for the DMA
+       device.
+     - interrupt-parent : the phandle for the interrupt controller
+       that services interrupts for this device.
+
+   Example Discovery SDMA node:
+     sdma@4000 {
+             compatible = "marvell,mv64360-sdma";
+             reg = <0x4000 0xc18>;
+             virtual-reg = <0xf1004000>;
+             interrupts = <36>;
+             interrupt-parent = <&PIC>;
+     };
+
+
+   e) Marvell Discovery BRG nodes
+
+   Represent baud rate generator hardware associated with the MPSC
+   (multiprotocol serial controllers).
+
+   Required properties:
+     - compatible : "marvell,mv64360-brg"
+     - reg : Offset and length of the register set for this device
+     - clock-src : A value from 0 to 15 which selects the clock
+       source for the baud rate generator.  This value corresponds
+       to the CLKS value in the BRGx configuration register.  See
+       the mv64x60 User's Manual.
+     - clock-frequence : The frequency (in Hz) of the baud rate
+       generator's input clock.
+     - current-speed : The current speed setting (presumably by
+       firmware) of the baud rate generator.
+
+   Example Discovery BRG node:
+     brg@b200 {
+             compatible = "marvell,mv64360-brg";
+             reg = <0xb200 0x8>;
+             clock-src = <8>;
+             clock-frequency = <133333333>;
+             current-speed = <9600>;
+     };
+
+
+   f) Marvell Discovery CUNIT nodes
+
+   Represent the Serial Communications Unit device hardware.
+
+   Required properties:
+     - reg : Offset and length of the register set for this device
+
+   Example Discovery CUNIT node:
+     cunit@f200 {
+             reg = <0xf200 0x200>;
+     };
+
+
+   g) Marvell Discovery MPSCROUTING nodes
+
+   Represent the Discovery's MPSC routing hardware
+
+   Required properties:
+     - reg : Offset and length of the register set for this device
+
+   Example Discovery CUNIT node:
+     mpscrouting@b500 {
+             reg = <0xb400 0xc>;
+     };
+
+
+   h) Marvell Discovery MPSCINTR nodes
+
+   Represent the Discovery's MPSC DMA interrupt hardware registers
+   (SDMA cause and mask registers).
+
+   Required properties:
+     - reg : Offset and length of the register set for this device
+
+   Example Discovery MPSCINTR node:
+     mpsintr@b800 {
+             reg = <0xb800 0x100>;
+     };
+
+
+   i) Marvell Discovery MPSC nodes
+
+   Represent the Discovery's MPSC (Multiprotocol Serial Controller)
+   serial port.
+
+   Required properties:
+     - device_type : "serial"
+     - compatible : "marvell,mv64360-mpsc"
+     - reg : Offset and length of the register set for this device
+     - sdma : the phandle for the SDMA node used by this port
+     - brg : the phandle for the BRG node used by this port
+     - cunit : the phandle for the CUNIT node used by this port
+     - mpscrouting : the phandle for the MPSCROUTING node used by this port
+     - mpscintr : the phandle for the MPSCINTR node used by this port
+     - cell-index : the hardware index of this cell in the MPSC core
+     - max_idle : value needed for MPSC CHR3 (Maximum Frame Length)
+       register
+     - interrupts : <a> where a is the interrupt number for the MPSC.
+     - interrupt-parent : the phandle for the interrupt controller
+       that services interrupts for this device.
+
+   Example Discovery MPSCINTR node:
+     mpsc@8000 {
+             device_type = "serial";
+             compatible = "marvell,mv64360-mpsc";
+             reg = <0x8000 0x38>;
+             virtual-reg = <0xf1008000>;
+             sdma = <&SDMA0>;
+             brg = <&BRG0>;
+             cunit = <&CUNIT>;
+             mpscrouting = <&MPSCROUTING>;
+             mpscintr = <&MPSCINTR>;
+             cell-index = <0>;
+             max_idle = <40>;
+             interrupts = <40>;
+             interrupt-parent = <&PIC>;
+     };
+
+
+   j) Marvell Discovery Watch Dog Timer nodes
+
+   Represent the Discovery's watchdog timer hardware
+
+   Required properties:
+     - compatible : "marvell,mv64360-wdt"
+     - reg : Offset and length of the register set for this device
+
+   Example Discovery Watch Dog Timer node:
+     wdt@b410 {
+             compatible = "marvell,mv64360-wdt";
+             reg = <0xb410 0x8>;
+     };
+
+
+   k) Marvell Discovery I2C nodes
+
+   Represent the Discovery's I2C hardware
+
+   Required properties:
+     - device_type : "i2c"
+     - compatible : "marvell,mv64360-i2c"
+     - reg : Offset and length of the register set for this device
+     - interrupts : <a> where a is the interrupt number for the I2C.
+     - interrupt-parent : the phandle for the interrupt controller
+       that services interrupts for this device.
+
+   Example Discovery I2C node:
+             compatible = "marvell,mv64360-i2c";
+             reg = <0xc000 0x20>;
+             virtual-reg = <0xf100c000>;
+             interrupts = <37>;
+             interrupt-parent = <&PIC>;
+     };
+
+
+   l) Marvell Discovery PIC (Programmable Interrupt Controller) nodes
+
+   Represent the Discovery's PIC hardware
+
+   Required properties:
+     - #interrupt-cells : <1>
+     - #address-cells : <0>
+     - compatible : "marvell,mv64360-pic"
+     - reg : Offset and length of the register set for this device
+     - interrupt-controller
+
+   Example Discovery PIC node:
+     pic {
+             #interrupt-cells = <1>;
+             #address-cells = <0>;
+             compatible = "marvell,mv64360-pic";
+             reg = <0x0 0x88>;
+             interrupt-controller;
+     };
+
+
+   m) Marvell Discovery MPP (Multipurpose Pins) multiplexing nodes
+
+   Represent the Discovery's MPP hardware
+
+   Required properties:
+     - compatible : "marvell,mv64360-mpp"
+     - reg : Offset and length of the register set for this device
+
+   Example Discovery MPP node:
+     mpp@f000 {
+             compatible = "marvell,mv64360-mpp";
+             reg = <0xf000 0x10>;
+     };
+
+
+   n) Marvell Discovery GPP (General Purpose Pins) nodes
+
+   Represent the Discovery's GPP hardware
+
+   Required properties:
+     - compatible : "marvell,mv64360-gpp"
+     - reg : Offset and length of the register set for this device
+
+   Example Discovery GPP node:
+     gpp@f000 {
+             compatible = "marvell,mv64360-gpp";
+             reg = <0xf100 0x20>;
+     };
+
+
+   o) Marvell Discovery PCI host bridge node
+
+   Represents the Discovery's PCI host bridge device.  The properties
+   for this node conform to Rev 2.1 of the PCI Bus Binding to IEEE
+   1275-1994.  A typical value for the compatible property is
+   "marvell,mv64360-pci".
+
+   Example Discovery PCI host bridge node
+     pci@80000000 {
+             #address-cells = <3>;
+             #size-cells = <2>;
+             #interrupt-cells = <1>;
+             device_type = "pci";
+             compatible = "marvell,mv64360-pci";
+             reg = <0xcf8 0x8>;
+             ranges = <0x01000000 0x0        0x0
+                             0x88000000 0x0 0x01000000
+                       0x02000000 0x0 0x80000000
+                             0x80000000 0x0 0x08000000>;
+             bus-range = <0 255>;
+             clock-frequency = <66000000>;
+             interrupt-parent = <&PIC>;
+             interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+             interrupt-map = <
+                     /* IDSEL 0x0a */
+                     0x5000 0 0 1 &PIC 80
+                     0x5000 0 0 2 &PIC 81
+                     0x5000 0 0 3 &PIC 91
+                     0x5000 0 0 4 &PIC 93
+
+                     /* IDSEL 0x0b */
+                     0x5800 0 0 1 &PIC 91
+                     0x5800 0 0 2 &PIC 93
+                     0x5800 0 0 3 &PIC 80
+                     0x5800 0 0 4 &PIC 81
+
+                     /* IDSEL 0x0c */
+                     0x6000 0 0 1 &PIC 91
+                     0x6000 0 0 2 &PIC 93
+                     0x6000 0 0 3 &PIC 80
+                     0x6000 0 0 4 &PIC 81
+
+                     /* IDSEL 0x0d */
+                     0x6800 0 0 1 &PIC 93
+                     0x6800 0 0 2 &PIC 80
+                     0x6800 0 0 3 &PIC 81
+                     0x6800 0 0 4 &PIC 91
+             >;
+     };
+
+
+   p) Marvell Discovery CPU Error nodes
+
+   Represent the Discovery's CPU error handler device.
+
+   Required properties:
+     - compatible : "marvell,mv64360-cpu-error"
+     - reg : Offset and length of the register set for this device
+     - interrupts : the interrupt number for this device
+     - interrupt-parent : the phandle for the interrupt controller
+       that services interrupts for this device.
+
+   Example Discovery CPU Error node:
+     cpu-error@0070 {
+             compatible = "marvell,mv64360-cpu-error";
+             reg = <0x70 0x10 0x128 0x28>;
+             interrupts = <3>;
+             interrupt-parent = <&PIC>;
+     };
+
+
+   q) Marvell Discovery SRAM Controller nodes
+
+   Represent the Discovery's SRAM controller device.
+
+   Required properties:
+     - compatible : "marvell,mv64360-sram-ctrl"
+     - reg : Offset and length of the register set for this device
+     - interrupts : the interrupt number for this device
+     - interrupt-parent : the phandle for the interrupt controller
+       that services interrupts for this device.
+
+   Example Discovery SRAM Controller node:
+     sram-ctrl@0380 {
+             compatible = "marvell,mv64360-sram-ctrl";
+             reg = <0x380 0x80>;
+             interrupts = <13>;
+             interrupt-parent = <&PIC>;
+     };
+
+
+   r) Marvell Discovery PCI Error Handler nodes
+
+   Represent the Discovery's PCI error handler device.
+
+   Required properties:
+     - compatible : "marvell,mv64360-pci-error"
+     - reg : Offset and length of the register set for this device
+     - interrupts : the interrupt number for this device
+     - interrupt-parent : the phandle for the interrupt controller
+       that services interrupts for this device.
+
+   Example Discovery PCI Error Handler node:
+     pci-error@1d40 {
+             compatible = "marvell,mv64360-pci-error";
+             reg = <0x1d40 0x40 0xc28 0x4>;
+             interrupts = <12>;
+             interrupt-parent = <&PIC>;
+     };
+
+
+   s) Marvell Discovery Memory Controller nodes
+
+   Represent the Discovery's memory controller device.
+
+   Required properties:
+     - compatible : "marvell,mv64360-mem-ctrl"
+     - reg : Offset and length of the register set for this device
+     - interrupts : the interrupt number for this device
+     - interrupt-parent : the phandle for the interrupt controller
+       that services interrupts for this device.
+
+   Example Discovery Memory Controller node:
+     mem-ctrl@1400 {
+             compatible = "marvell,mv64360-mem-ctrl";
+             reg = <0x1400 0x60>;
+             interrupts = <17>;
+             interrupt-parent = <&PIC>;
+     };
+
+
diff --git a/Documentation/powerpc/dts-bindings/phy.txt b/Documentation/powerpc/dts-bindings/phy.txt
new file mode 100644
index 000000000000..bb8c742eb8c5
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/phy.txt
@@ -0,0 +1,25 @@
+PHY nodes
+
+Required properties:
+
+ - device_type : Should be "ethernet-phy"
+ - interrupts : <a b> where a is the interrupt number and b is a
+   field that represents an encoding of the sense and level
+   information for the interrupt.  This should be encoded based on
+   the information in section 2) depending on the type of interrupt
+   controller you have.
+ - interrupt-parent : the phandle for the interrupt controller that
+   services interrupts for this device.
+ - reg : The ID number for the phy, usually a small integer
+ - linux,phandle :  phandle for this node; likely referenced by an
+   ethernet controller node.
+
+Example:
+
+ethernet-phy@0 {
+        linux,phandle = <2452000>
+        interrupt-parent = <40000>;
+        interrupts = <35 1>;
+        reg = <0>;
+        device_type = "ethernet-phy";
+};
diff --git a/Documentation/powerpc/dts-bindings/spi-bus.txt b/Documentation/powerpc/dts-bindings/spi-bus.txt
new file mode 100644
index 000000000000..e782add2e457
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/spi-bus.txt
@@ -0,0 +1,57 @@
+SPI (Serial Peripheral Interface) busses
+
+SPI busses can be described with a node for the SPI master device
+and a set of child nodes for each SPI slave on the bus.  For this
+discussion, it is assumed that the system's SPI controller is in
+SPI master mode.  This binding does not describe SPI controllers
+in slave mode.
+
+The SPI master node requires the following properties:
+- #address-cells  - number of cells required to define a chip select
+                address on the SPI bus.
+- #size-cells     - should be zero.
+- compatible      - name of SPI bus controller following generic names
+                recommended practice.
+No other properties are required in the SPI bus node.  It is assumed
+that a driver for an SPI bus device will understand that it is an SPI bus.
+However, the binding does not attempt to define the specific method for
+assigning chip select numbers.  Since SPI chip select configuration is
+flexible and non-standardized, it is left out of this binding with the
+assumption that board specific platform code will be used to manage
+chip selects.  Individual drivers can define additional properties to
+support describing the chip select layout.
+
+SPI slave nodes must be children of the SPI master node and can
+contain the following properties.
+- reg             - (required) chip select address of device.
+- compatible      - (required) name of SPI device following generic names
+                recommended practice
+- spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz
+- spi-cpol        - (optional) Empty property indicating device requires
+                inverse clock polarity (CPOL) mode
+- spi-cpha        - (optional) Empty property indicating device requires
+                shifted clock phase (CPHA) mode
+- spi-cs-high     - (optional) Empty property indicating device requires
+                chip select active high
+
+SPI example for an MPC5200 SPI bus:
+        spi@f00 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
+                reg = <0xf00 0x20>;
+                interrupts = <2 13 0 2 14 0>;
+                interrupt-parent = <&mpc5200_pic>;
+
+                ethernet-switch@0 {
+                        compatible = "micrel,ks8995m";
+                        spi-max-frequency = <1000000>;
+                        reg = <0>;
+                };
+
+                codec@1 {
+                        compatible = "ti,tlv320aic26";
+                        spi-max-frequency = <100000>;
+                        reg = <1>;
+                };
+        };
diff --git a/Documentation/powerpc/dts-bindings/usb-ehci.txt b/Documentation/powerpc/dts-bindings/usb-ehci.txt
new file mode 100644
index 000000000000..fa18612f757b
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/usb-ehci.txt
@@ -0,0 +1,25 @@
+USB EHCI controllers
+
+Required properties:
+  - compatible : should be "usb-ehci".
+  - reg : should contain at least address and length of the standard EHCI
+    register set for the device. Optional platform-dependent registers
+    (debug-port or other) can be also specified here, but only after
+    definition of standard EHCI registers.
+  - interrupts : one EHCI interrupt should be described here.
+If device registers are implemented in big endian mode, the device
+node should have "big-endian-regs" property.
+If controller implementation operates with big endian descriptors,
+"big-endian-desc" property should be specified.
+If both big endian registers and descriptors are used by the controller
+implementation, "big-endian" property can be specified instead of having
+both "big-endian-regs" and "big-endian-desc".
+
+Example (Sequoia 440EPx):
+    ehci@e0000300 {
+           compatible = "ibm,usb-ehci-440epx", "usb-ehci";
+           interrupt-parent = <&UIC0>;
+           interrupts = <1a 4>;
+           reg = <0 e0000300 90 0 e0000390 70>;
+           big-endian;
+   };
diff --git a/Documentation/powerpc/dts-bindings/xilinx.txt b/Documentation/powerpc/dts-bindings/xilinx.txt
new file mode 100644
index 000000000000..80339fe4300b
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/xilinx.txt
@@ -0,0 +1,295 @@
+   d) Xilinx IP cores
+
+   The Xilinx EDK toolchain ships with a set of IP cores (devices) for use
+   in Xilinx Spartan and Virtex FPGAs.  The devices cover the whole range
+   of standard device types (network, serial, etc.) and miscellaneous
+   devices (gpio, LCD, spi, etc).  Also, since these devices are
+   implemented within the fpga fabric every instance of the device can be
+   synthesised with different options that change the behaviour.
+
+   Each IP-core has a set of parameters which the FPGA designer can use to
+   control how the core is synthesized.  Historically, the EDK tool would
+   extract the device parameters relevant to device drivers and copy them
+   into an 'xparameters.h' in the form of #define symbols.  This tells the
+   device drivers how the IP cores are configured, but it requres the kernel
+   to be recompiled every time the FPGA bitstream is resynthesized.
+
+   The new approach is to export the parameters into the device tree and
+   generate a new device tree each time the FPGA bitstream changes.  The
+   parameters which used to be exported as #defines will now become
+   properties of the device node.  In general, device nodes for IP-cores
+   will take the following form:
+
+        (name): (generic-name)@(base-address) {
+                compatible = "xlnx,(ip-core-name)-(HW_VER)"
+                             [, (list of compatible devices), ...];
+                reg = <(baseaddr) (size)>;
+                interrupt-parent = <&interrupt-controller-phandle>;
+                interrupts = < ... >;
+                xlnx,(parameter1) = "(string-value)";
+                xlnx,(parameter2) = <(int-value)>;
+        };
+
+        (generic-name):   an open firmware-style name that describes the
+                        generic class of device.  Preferably, this is one word, such
+                        as 'serial' or 'ethernet'.
+        (ip-core-name): the name of the ip block (given after the BEGIN
+                        directive in system.mhs).  Should be in lowercase
+                        and all underscores '_' converted to dashes '-'.
+        (name):         is derived from the "PARAMETER INSTANCE" value.
+        (parameter#):   C_* parameters from system.mhs.  The C_ prefix is
+                        dropped from the parameter name, the name is converted
+                        to lowercase and all underscore '_' characters are
+                        converted to dashes '-'.
+        (baseaddr):     the baseaddr parameter value (often named C_BASEADDR).
+        (HW_VER):       from the HW_VER parameter.
+        (size):         the address range size (often C_HIGHADDR - C_BASEADDR + 1).
+
+   Typically, the compatible list will include the exact IP core version
+   followed by an older IP core version which implements the same
+   interface or any other device with the same interface.
+
+   'reg', 'interrupt-parent' and 'interrupts' are all optional properties.
+
+   For example, the following block from system.mhs:
+
+        BEGIN opb_uartlite
+                PARAMETER INSTANCE = opb_uartlite_0
+                PARAMETER HW_VER = 1.00.b
+                PARAMETER C_BAUDRATE = 115200
+                PARAMETER C_DATA_BITS = 8
+                PARAMETER C_ODD_PARITY = 0
+                PARAMETER C_USE_PARITY = 0
+                PARAMETER C_CLK_FREQ = 50000000
+                PARAMETER C_BASEADDR = 0xEC100000
+                PARAMETER C_HIGHADDR = 0xEC10FFFF
+                BUS_INTERFACE SOPB = opb_7
+                PORT OPB_Clk = CLK_50MHz
+                PORT Interrupt = opb_uartlite_0_Interrupt
+                PORT RX = opb_uartlite_0_RX
+                PORT TX = opb_uartlite_0_TX
+                PORT OPB_Rst = sys_bus_reset_0
+        END
+
+   becomes the following device tree node:
+
+        opb_uartlite_0: serial@ec100000 {
+                device_type = "serial";
+                compatible = "xlnx,opb-uartlite-1.00.b";
+                reg = <ec100000 10000>;
+                interrupt-parent = <&opb_intc_0>;
+                interrupts = <1 0>; // got this from the opb_intc parameters
+                current-speed = <d#115200>;     // standard serial device prop
+                clock-frequency = <d#50000000>; // standard serial device prop
+                xlnx,data-bits = <8>;
+                xlnx,odd-parity = <0>;
+                xlnx,use-parity = <0>;
+        };
+
+   Some IP cores actually implement 2 or more logical devices.  In
+   this case, the device should still describe the whole IP core with
+   a single node and add a child node for each logical device.  The
+   ranges property can be used to translate from parent IP-core to the
+   registers of each device.  In addition, the parent node should be
+   compatible with the bus type 'xlnx,compound', and should contain
+   #address-cells and #size-cells, as with any other bus.  (Note: this
+   makes the assumption that both logical devices have the same bus
+   binding.  If this is not true, then separate nodes should be used
+   for each logical device).  The 'cell-index' property can be used to
+   enumerate logical devices within an IP core.  For example, the
+   following is the system.mhs entry for the dual ps2 controller found
+   on the ml403 reference design.
+
+        BEGIN opb_ps2_dual_ref
+                PARAMETER INSTANCE = opb_ps2_dual_ref_0
+                PARAMETER HW_VER = 1.00.a
+                PARAMETER C_BASEADDR = 0xA9000000
+                PARAMETER C_HIGHADDR = 0xA9001FFF
+                BUS_INTERFACE SOPB = opb_v20_0
+                PORT Sys_Intr1 = ps2_1_intr
+                PORT Sys_Intr2 = ps2_2_intr
+                PORT Clkin1 = ps2_clk_rx_1
+                PORT Clkin2 = ps2_clk_rx_2
+                PORT Clkpd1 = ps2_clk_tx_1
+                PORT Clkpd2 = ps2_clk_tx_2
+                PORT Rx1 = ps2_d_rx_1
+                PORT Rx2 = ps2_d_rx_2
+                PORT Txpd1 = ps2_d_tx_1
+                PORT Txpd2 = ps2_d_tx_2
+        END
+
+   It would result in the following device tree nodes:
+
+        opb_ps2_dual_ref_0: opb-ps2-dual-ref@a9000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "xlnx,compound";
+                ranges = <0 a9000000 2000>;
+                // If this device had extra parameters, then they would
+                // go here.
+                ps2@0 {
+                        compatible = "xlnx,opb-ps2-dual-ref-1.00.a";
+                        reg = <0 40>;
+                        interrupt-parent = <&opb_intc_0>;
+                        interrupts = <3 0>;
+                        cell-index = <0>;
+                };
+                ps2@1000 {
+                        compatible = "xlnx,opb-ps2-dual-ref-1.00.a";
+                        reg = <1000 40>;
+                        interrupt-parent = <&opb_intc_0>;
+                        interrupts = <3 0>;
+                        cell-index = <0>;
+                };
+        };
+
+   Also, the system.mhs file defines bus attachments from the processor
+   to the devices.  The device tree structure should reflect the bus
+   attachments.  Again an example; this system.mhs fragment:
+
+        BEGIN ppc405_virtex4
+                PARAMETER INSTANCE = ppc405_0
+                PARAMETER HW_VER = 1.01.a
+                BUS_INTERFACE DPLB = plb_v34_0
+                BUS_INTERFACE IPLB = plb_v34_0
+        END
+
+        BEGIN opb_intc
+                PARAMETER INSTANCE = opb_intc_0
+                PARAMETER HW_VER = 1.00.c
+                PARAMETER C_BASEADDR = 0xD1000FC0
+                PARAMETER C_HIGHADDR = 0xD1000FDF
+                BUS_INTERFACE SOPB = opb_v20_0
+        END
+
+        BEGIN opb_uart16550
+                PARAMETER INSTANCE = opb_uart16550_0
+                PARAMETER HW_VER = 1.00.d
+                PARAMETER C_BASEADDR = 0xa0000000
+                PARAMETER C_HIGHADDR = 0xa0001FFF
+                BUS_INTERFACE SOPB = opb_v20_0
+        END
+
+        BEGIN plb_v34
+                PARAMETER INSTANCE = plb_v34_0
+                PARAMETER HW_VER = 1.02.a
+        END
+
+        BEGIN plb_bram_if_cntlr
+                PARAMETER INSTANCE = plb_bram_if_cntlr_0
+                PARAMETER HW_VER = 1.00.b
+                PARAMETER C_BASEADDR = 0xFFFF0000
+                PARAMETER C_HIGHADDR = 0xFFFFFFFF
+                BUS_INTERFACE SPLB = plb_v34_0
+        END
+
+        BEGIN plb2opb_bridge
+                PARAMETER INSTANCE = plb2opb_bridge_0
+                PARAMETER HW_VER = 1.01.a
+                PARAMETER C_RNG0_BASEADDR = 0x20000000
+                PARAMETER C_RNG0_HIGHADDR = 0x3FFFFFFF
+                PARAMETER C_RNG1_BASEADDR = 0x60000000
+                PARAMETER C_RNG1_HIGHADDR = 0x7FFFFFFF
+                PARAMETER C_RNG2_BASEADDR = 0x80000000
+                PARAMETER C_RNG2_HIGHADDR = 0xBFFFFFFF
+                PARAMETER C_RNG3_BASEADDR = 0xC0000000
+                PARAMETER C_RNG3_HIGHADDR = 0xDFFFFFFF
+                BUS_INTERFACE SPLB = plb_v34_0
+                BUS_INTERFACE MOPB = opb_v20_0
+        END
+
+   Gives this device tree (some properties removed for clarity):
+
+        plb@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "xlnx,plb-v34-1.02.a";
+                device_type = "ibm,plb";
+                ranges; // 1:1 translation
+
+                plb_bram_if_cntrl_0: bram@ffff0000 {
+                        reg = <ffff0000 10000>;
+                }
+
+                opb@20000000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges = <20000000 20000000 20000000
+                                  60000000 60000000 20000000
+                                  80000000 80000000 40000000
+                                  c0000000 c0000000 20000000>;
+
+                        opb_uart16550_0: serial@a0000000 {
+                                reg = <a00000000 2000>;
+                        };
+
+                        opb_intc_0: interrupt-controller@d1000fc0 {
+                                reg = <d1000fc0 20>;
+                        };
+                };
+        };
+
+   That covers the general approach to binding xilinx IP cores into the
+   device tree.  The following are bindings for specific devices:
+
+      i) Xilinx ML300 Framebuffer
+
+      Simple framebuffer device from the ML300 reference design (also on the
+      ML403 reference design as well as others).
+
+      Optional properties:
+       - resolution = <xres yres> : pixel resolution of framebuffer.  Some
+                                    implementations use a different resolution.
+                                    Default is <d#640 d#480>
+       - virt-resolution = <xvirt yvirt> : Size of framebuffer in memory.
+                                           Default is <d#1024 d#480>.
+       - rotate-display (empty) : rotate display 180 degrees.
+
+      ii) Xilinx SystemACE
+
+      The Xilinx SystemACE device is used to program FPGAs from an FPGA
+      bitstream stored on a CF card.  It can also be used as a generic CF
+      interface device.
+
+      Optional properties:
+       - 8-bit (empty) : Set this property for SystemACE in 8 bit mode
+
+      iii) Xilinx EMAC and Xilinx TEMAC
+
+      Xilinx Ethernet devices.  In addition to general xilinx properties
+      listed above, nodes for these devices should include a phy-handle
+      property, and may include other common network device properties
+      like local-mac-address.
+
+      iv) Xilinx Uartlite
+
+      Xilinx uartlite devices are simple fixed speed serial ports.
+
+      Required properties:
+       - current-speed : Baud rate of uartlite
+
+      v) Xilinx hwicap
+
+                Xilinx hwicap devices provide access to the configuration logic
+                of the FPGA through the Internal Configuration Access Port
+                (ICAP).  The ICAP enables partial reconfiguration of the FPGA,
+                readback of the configuration information, and some control over
+                'warm boots' of the FPGA fabric.
+
+                Required properties:
+                - xlnx,family : The family of the FPGA, necessary since the
+                      capabilities of the underlying ICAP hardware
+                      differ between different families.  May be
+                      'virtex2p', 'virtex4', or 'virtex5'.
+
+      vi) Xilinx Uart 16550
+
+      Xilinx UART 16550 devices are very similar to the NS16550 but with
+      different register spacing and an offset from the base address.
+
+      Required properties:
+       - clock-frequency : Frequency of the clock input
+       - reg-offset : A value of 3 is required
+       - reg-shift : A value of 2 is required
+
+
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index bf6cedfa05db..d00131ca0835 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -62,7 +62,6 @@ config HAVE_LATENCYTOP_SUPPORT
 
 config TRACE_IRQFLAGS_SUPPORT
         bool
-        depends on PPC64
         default y
 
 config LOCKDEP_SUPPORT
diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore
index 2f50acd11a60..3d80c3e9cf60 100644
--- a/arch/powerpc/boot/.gitignore
+++ b/arch/powerpc/boot/.gitignore
@@ -36,3 +36,13 @@ zImage.pseries
 zconf.h
 zlib.h
 zutil.h
+fdt.c
+fdt.h
+fdt_ro.c
+fdt_rw.c
+fdt_strerror.c
+fdt_sw.c
+fdt_wip.c
+libfdt.h
+libfdt_internal.h
+
diff --git a/arch/powerpc/boot/dts/amigaone.dts b/arch/powerpc/boot/dts/amigaone.dts
index 26549fca2ed4..49ac36b16dd7 100644
--- a/arch/powerpc/boot/dts/amigaone.dts
+++ b/arch/powerpc/boot/dts/amigaone.dts
@@ -70,8 +70,8 @@
                         devsel-speed = <0x00000001>;
                         min-grant = <0>;
                         max-latency = <0>;
-                        /* First 64k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */
-                        ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00010000>;
+                        /* First 4k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */
+                        ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00001000>;
                         interrupt-parent = <&i8259>;
                         #interrupt-cells = <2>;
                         #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/mpc8569mds.dts b/arch/powerpc/boot/dts/mpc8569mds.dts
index a8dcb018c4a5..a680165292f2 100644
--- a/arch/powerpc/boot/dts/mpc8569mds.dts
+++ b/arch/powerpc/boot/dts/mpc8569mds.dts
@@ -253,6 +253,7 @@
                         /* Filled in by U-Boot */
                         clock-frequency = <0>;
                         status = "disabled";
+                        sdhci,1-bit-only;
                 };
 
                 crypto@30000 {
diff --git a/arch/powerpc/include/asm/cpm1.h b/arch/powerpc/include/asm/cpm1.h
index 2ff798744c1d..7685ffde8821 100644
--- a/arch/powerpc/include/asm/cpm1.h
+++ b/arch/powerpc/include/asm/cpm1.h
@@ -598,8 +598,6 @@ typedef struct risc_timer_pram {
 #define CICR_IEN                ((uint)0x00000080)      /* Int. enable */
 #define CICR_SPS                ((uint)0x00000001)      /* SCC Spread */
 
-#define IMAP_ADDR               (get_immrbase())
-
 #define CPM_PIN_INPUT     0
 #define CPM_PIN_OUTPUT    1
 #define CPM_PIN_PRIMARY   0
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index 3d9e887c3c0c..b44aaabdd1a6 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -309,7 +309,9 @@ static inline void dma_sync_single_for_cpu(struct device *dev,
         struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
 
         BUG_ON(!dma_ops);
-        dma_ops->sync_single_range_for_cpu(dev, dma_handle, 0,
+
+        if (dma_ops->sync_single_range_for_cpu)
+                dma_ops->sync_single_range_for_cpu(dev, dma_handle, 0,
                                            size, direction);
 }
 
@@ -320,7 +322,9 @@ static inline void dma_sync_single_for_device(struct device *dev,
         struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
 
         BUG_ON(!dma_ops);
-        dma_ops->sync_single_range_for_device(dev, dma_handle,
+
+        if (dma_ops->sync_single_range_for_device)
+                dma_ops->sync_single_range_for_device(dev, dma_handle,
                                               0, size, direction);
 }
 
@@ -331,7 +335,9 @@ static inline void dma_sync_sg_for_cpu(struct device *dev,
         struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
 
         BUG_ON(!dma_ops);
-        dma_ops->sync_sg_for_cpu(dev, sgl, nents, direction);
+
+        if (dma_ops->sync_sg_for_cpu)
+                dma_ops->sync_sg_for_cpu(dev, sgl, nents, direction);
 }
 
 static inline void dma_sync_sg_for_device(struct device *dev,
@@ -341,7 +347,9 @@ static inline void dma_sync_sg_for_device(struct device *dev,
         struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
 
         BUG_ON(!dma_ops);
-        dma_ops->sync_sg_for_device(dev, sgl, nents, direction);
+
+        if (dma_ops->sync_sg_for_device)
+                dma_ops->sync_sg_for_device(dev, sgl, nents, direction);
 }
 
 static inline void dma_sync_single_range_for_cpu(struct device *dev,
@@ -351,7 +359,9 @@ static inline void dma_sync_single_range_for_cpu(struct device *dev,
         struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
 
         BUG_ON(!dma_ops);
-        dma_ops->sync_single_range_for_cpu(dev, dma_handle,
+
+        if (dma_ops->sync_single_range_for_cpu)
+                dma_ops->sync_single_range_for_cpu(dev, dma_handle,
                                            offset, size, direction);
 }
 
@@ -362,7 +372,9 @@ static inline void dma_sync_single_range_for_device(struct device *dev,
         struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
 
         BUG_ON(!dma_ops);
-        dma_ops->sync_single_range_for_device(dev, dma_handle, offset,
+
+        if (dma_ops->sync_single_range_for_device)
+                dma_ops->sync_single_range_for_device(dev, dma_handle, offset,
                                               size, direction);
 }
 #else /* CONFIG_PPC_NEED_DMA_SYNC_OPS */
diff --git a/arch/powerpc/include/asm/highmem.h b/arch/powerpc/include/asm/highmem.h
index 684a73f4324f..a74c4ee6c020 100644
--- a/arch/powerpc/include/asm/highmem.h
+++ b/arch/powerpc/include/asm/highmem.h
@@ -22,9 +22,7 @@
 
 #ifdef __KERNEL__
 
-#include <linux/init.h>
 #include <linux/interrupt.h>
-#include <linux/highmem.h>
 #include <asm/kmap_types.h>
 #include <asm/tlbflush.h>
 #include <asm/page.h>
@@ -62,6 +60,9 @@ extern pte_t *pkmap_page_table;
 
 extern void *kmap_high(struct page *page);
 extern void kunmap_high(struct page *page);
+extern void *kmap_atomic_prot(struct page *page, enum km_type type,
+                              pgprot_t prot);
+extern void kunmap_atomic(void *kvaddr, enum km_type type);
 
 static inline void *kmap(struct page *page)
 {
@@ -79,62 +80,11 @@ static inline void kunmap(struct page *page)
         kunmap_high(page);
 }
 
-/*
- * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
- * gives a more generic (and caching) interface. But kmap_atomic can
- * be used in IRQ contexts, so in some (very limited) cases we need
- * it.
- */
-static inline void *kmap_atomic_prot(struct page *page, enum km_type type, pgprot_t prot)
-{
-        unsigned int idx;
-        unsigned long vaddr;
-
-        /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */
-        pagefault_disable();
-        if (!PageHighMem(page))
-                return page_address(page);
-
-        debug_kmap_atomic(type);
-        idx = type + KM_TYPE_NR*smp_processor_id();
-        vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
-#ifdef CONFIG_DEBUG_HIGHMEM
-        BUG_ON(!pte_none(*(kmap_pte-idx)));
-#endif
-        __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot), 1);
-        local_flush_tlb_page(NULL, vaddr);
-
-        return (void*) vaddr;
-}
-
 static inline void *kmap_atomic(struct page *page, enum km_type type)
 {
         return kmap_atomic_prot(page, type, kmap_prot);
 }
 
-static inline void kunmap_atomic(void *kvaddr, enum km_type type)
-{
-#ifdef CONFIG_DEBUG_HIGHMEM
-        unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
-        enum fixed_addresses idx = type + KM_TYPE_NR*smp_processor_id();
-
-        if (vaddr < __fix_to_virt(FIX_KMAP_END)) {
-                pagefault_enable();
-                return;
-        }
-
-        BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
-
-        /*
-         * force other mappings to Oops if they'll try to access
-         * this pte without first remap it
-         */
-        pte_clear(&init_mm, vaddr, kmap_pte-idx);
-        local_flush_tlb_page(NULL, vaddr);
-#endif
-        pagefault_enable();
-}
-
 static inline struct page *kmap_atomic_to_page(void *ptr)
 {
         unsigned long idx, vaddr = (unsigned long) ptr;
@@ -148,6 +98,7 @@ static inline struct page *kmap_atomic_to_page(void *ptr)
         return pte_page(*pte);
 }
 
+
 #define flush_cache_kmaps()     flush_cache_all()
 
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index 867ab8ed69b3..8b505eaaa38a 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -68,13 +68,13 @@ static inline int irqs_disabled_flags(unsigned long flags)
 
 #if defined(CONFIG_BOOKE)
 #define SET_MSR_EE(x)   mtmsr(x)
-#define local_irq_restore(flags)        __asm__ __volatile__("wrtee %0" : : "r" (flags) : "memory")
+#define raw_local_irq_restore(flags)    __asm__ __volatile__("wrtee %0" : : "r" (flags) : "memory")
 #else
 #define SET_MSR_EE(x)   mtmsr(x)
-#define local_irq_restore(flags)        mtmsr(flags)
+#define raw_local_irq_restore(flags)    mtmsr(flags)
 #endif
 
-static inline void local_irq_disable(void)
+static inline void raw_local_irq_disable(void)
 {
 #ifdef CONFIG_BOOKE
         __asm__ __volatile__("wrteei 0": : :"memory");
@@ -86,7 +86,7 @@ static inline void local_irq_disable(void)
 #endif
 }
 
-static inline void local_irq_enable(void)
+static inline void raw_local_irq_enable(void)
 {
 #ifdef CONFIG_BOOKE
         __asm__ __volatile__("wrteei 1": : :"memory");
@@ -98,7 +98,7 @@ static inline void local_irq_enable(void)
 #endif
 }
 
-static inline void local_irq_save_ptr(unsigned long *flags)
+static inline void raw_local_irq_save_ptr(unsigned long *flags)
 {
         unsigned long msr;
         msr = mfmsr();
@@ -110,12 +110,12 @@ static inline void local_irq_save_ptr(unsigned long *flags)
 #endif
 }
 
-#define local_save_flags(flags) ((flags) = mfmsr())
-#define local_irq_save(flags)   local_irq_save_ptr(&flags)
-#define irqs_disabled()         ((mfmsr() & MSR_EE) == 0)
+#define raw_local_save_flags(flags)     ((flags) = mfmsr())
+#define raw_local_irq_save(flags)       raw_local_irq_save_ptr(&flags)
+#define raw_irqs_disabled()             ((mfmsr() & MSR_EE) == 0)
+#define raw_irqs_disabled_flags(flags)  (((flags) & MSR_EE) == 0)
 
-#define hard_irq_enable()       local_irq_enable()
-#define hard_irq_disable()      local_irq_disable()
+#define hard_irq_disable()              raw_local_irq_disable()
 
 static inline int irqs_disabled_flags(unsigned long flags)
 {
diff --git a/arch/powerpc/include/asm/pte-hash64-64k.h b/arch/powerpc/include/asm/pte-hash64-64k.h
index e05d26fa372f..82b72207c51c 100644
--- a/arch/powerpc/include/asm/pte-hash64-64k.h
+++ b/arch/powerpc/include/asm/pte-hash64-64k.h
@@ -47,7 +47,8 @@
  * generic accessors and iterators here
  */
 #define __real_pte(e,p)         ((real_pte_t) { \
-        (e), pte_val(*((p) + PTRS_PER_PTE)) })
+                        (e), ((e) & _PAGE_COMBO) ? \
+                                (pte_val(*((p) + PTRS_PER_PTE))) : 0 })
 #define __rpte_to_hidx(r,index) ((pte_val((r).pte) & _PAGE_COMBO) ? \
         (((r).hidx >> ((index)<<2)) & 0xf) : ((pte_val((r).pte) >> 12) & 0xf))
 #define __rpte_to_pte(r)        ((r).pte)
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index 01c12339b304..168fce726201 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -58,7 +58,7 @@ struct rtas_t {
         unsigned long entry;            /* physical address pointer */
         unsigned long base;             /* physical address pointer */
         unsigned long size;
-        spinlock_t lock;
+        raw_spinlock_t lock;
         struct rtas_args args;
         struct device_node *dev;        /* virtual address pointer */
 };
@@ -245,5 +245,8 @@ static inline u32 rtas_config_addr(int busno, int devfn, int reg)
                         (devfn << 8) | (reg & 0xff);
 }
 
+extern void __cpuinit rtas_give_timebase(void);
+extern void __cpuinit rtas_take_timebase(void);
+
 #endif /* __KERNEL__ */
 #endif /* _POWERPC_RTAS_H */
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 4dd38f129153..3cadba60a4b6 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -191,11 +191,49 @@ transfer_to_handler_cont:
         mflr    r9
         lwz     r11,0(r9)               /* virtual address of handler */
         lwz     r9,4(r9)                /* where to go when done */
+#ifdef CONFIG_TRACE_IRQFLAGS
+        lis     r12,reenable_mmu@h
+        ori     r12,r12,reenable_mmu@l
+        mtspr   SPRN_SRR0,r12
+        mtspr   SPRN_SRR1,r10
+        SYNC
+        RFI
+reenable_mmu:                           /* re-enable mmu so we can */
+        mfmsr   r10
+        lwz     r12,_MSR(r1)
+        xor     r10,r10,r12
+        andi.   r10,r10,MSR_EE          /* Did EE change? */
+        beq     1f
+
+        /* Save handler and return address into the 2 unused words
+         * of the STACK_FRAME_OVERHEAD (sneak sneak sneak). Everything
+         * else can be recovered from the pt_regs except r3 which for
+         * normal interrupts has been set to pt_regs and for syscalls
+         * is an argument, so we temporarily use ORIG_GPR3 to save it
+         */
+        stw     r9,8(r1)
+        stw     r11,12(r1)
+        stw     r3,ORIG_GPR3(r1)
+        bl      trace_hardirqs_off
+        lwz     r0,GPR0(r1)
+        lwz     r3,ORIG_GPR3(r1)
+        lwz     r4,GPR4(r1)
+        lwz     r5,GPR5(r1)
+        lwz     r6,GPR6(r1)
+        lwz     r7,GPR7(r1)
+        lwz     r8,GPR8(r1)
+        lwz     r9,8(r1)
+        lwz     r11,12(r1)
+1:      mtctr   r11
+        mtlr    r9
+        bctr                            /* jump to handler */
+#else /* CONFIG_TRACE_IRQFLAGS */
         mtspr   SPRN_SRR0,r11
         mtspr   SPRN_SRR1,r10
         mtlr    r9
         SYNC
         RFI                             /* jump to handler, enable MMU */
+#endif /* CONFIG_TRACE_IRQFLAGS */
 
 #if defined (CONFIG_6xx) || defined(CONFIG_E500)
 4:      rlwinm  r12,r12,0,~_TLF_NAPPING
@@ -251,6 +289,31 @@ _GLOBAL(DoSyscall)
 #ifdef SHOW_SYSCALLS
         bl      do_show_syscall
 #endif /* SHOW_SYSCALLS */
+#ifdef CONFIG_TRACE_IRQFLAGS
+        /* Return from syscalls can (and generally will) hard enable
+         * interrupts. You aren't supposed to call a syscall with
+         * interrupts disabled in the first place. However, to ensure
+         * that we get it right vs. lockdep if it happens, we force
+         * that hard enable here with appropriate tracing if we see
+         * that we have been called with interrupts off
+         */
+        mfmsr   r11
+        andi.   r12,r11,MSR_EE
+        bne+    1f
+        /* We came in with interrupts disabled, we enable them now */
+        bl      trace_hardirqs_on
+        mfmsr   r11
+        lwz     r0,GPR0(r1)
+        lwz     r3,GPR3(r1)
+        lwz     r4,GPR4(r1)
+        ori     r11,r11,MSR_EE
+        lwz     r5,GPR5(r1)
+        lwz     r6,GPR6(r1)
+        lwz     r7,GPR7(r1)
+        lwz     r8,GPR8(r1)
+        mtmsr   r11
+1:
+#endif /* CONFIG_TRACE_IRQFLAGS */
         rlwinm  r10,r1,0,0,(31-THREAD_SHIFT)    /* current_thread_info() */
         lwz     r11,TI_FLAGS(r10)
         andi.   r11,r11,_TIF_SYSCALL_T_OR_A
@@ -275,6 +338,7 @@ ret_from_syscall:
         rlwinm  r12,r1,0,0,(31-THREAD_SHIFT)    /* current_thread_info() */
         /* disable interrupts so current_thread_info()->flags can't change */
         LOAD_MSR_KERNEL(r10,MSR_KERNEL) /* doesn't include MSR_EE */
+        /* Note: We don't bother telling lockdep about it */
         SYNC
         MTMSRD(r10)
         lwz     r9,TI_FLAGS(r12)
@@ -288,6 +352,19 @@ ret_from_syscall:
         oris    r11,r11,0x1000  /* Set SO bit in CR */
         stw     r11,_CCR(r1)
 syscall_exit_cont:
+        lwz     r8,_MSR(r1)
+#ifdef CONFIG_TRACE_IRQFLAGS
+        /* If we are going to return from the syscall with interrupts
+         * off, we trace that here. It shouldn't happen though but we
+         * want to catch the bugger if it does right ?
+         */
+        andi.   r10,r8,MSR_EE
+        bne+    1f
+        stw     r3,GPR3(r1)
+        bl      trace_hardirqs_off
+        lwz     r3,GPR3(r1)
+1:
+#endif /* CONFIG_TRACE_IRQFLAGS */
 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
         /* If the process has its own DBCR0 value, load it up.  The internal
            debug mode bit tells us that dbcr0 should be loaded. */
@@ -311,7 +388,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX)
         mtlr    r4
         mtcr    r5
         lwz     r7,_NIP(r1)
-        lwz     r8,_MSR(r1)
         FIX_SRR1(r8, r0)
         lwz     r2,GPR2(r1)
         lwz     r1,GPR1(r1)
@@ -394,7 +470,9 @@ syscall_exit_work:
         andi.   r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP)
         beq     ret_from_except
 
-        /* Re-enable interrupts */
+        /* Re-enable interrupts. There is no need to trace that with
+         * lockdep as we are supposed to have IRQs on at this point
+         */
         ori     r10,r10,MSR_EE
         SYNC
         MTMSRD(r10)
@@ -705,6 +783,7 @@ ret_from_except:
         /* Hard-disable interrupts so that current_thread_info()->flags
          * can't change between when we test it and when we return
          * from the interrupt. */
+        /* Note: We don't bother telling lockdep about it */
         LOAD_MSR_KERNEL(r10,MSR_KERNEL)
         SYNC                    /* Some chip revs have problems here... */
         MTMSRD(r10)             /* disable interrupts */
@@ -744,11 +823,24 @@ resume_kernel:
         beq+    restore
         andi.   r0,r3,MSR_EE    /* interrupts off? */
         beq     restore         /* don't schedule if so */
+#ifdef CONFIG_TRACE_IRQFLAGS
+        /* Lockdep thinks irqs are enabled, we need to call
+         * preempt_schedule_irq with IRQs off, so we inform lockdep
+         * now that we -did- turn them off already
+         */
+        bl      trace_hardirqs_off
+#endif
 1:      bl      preempt_schedule_irq
         rlwinm  r9,r1,0,0,(31-THREAD_SHIFT)
         lwz     r3,TI_FLAGS(r9)
         andi.   r0,r3,_TIF_NEED_RESCHED
         bne-    1b
+#ifdef CONFIG_TRACE_IRQFLAGS
+        /* And now, to properly rebalance the above, we tell lockdep they
+         * are being turned back on, which will happen when we return
+         */
+        bl      trace_hardirqs_on
+#endif
 #else
 resume_kernel:
 #endif /* CONFIG_PREEMPT */
@@ -765,6 +857,28 @@ restore:
         stw     r6,icache_44x_need_flush@l(r4)
 1:
 #endif  /* CONFIG_44x */
+
+        lwz     r9,_MSR(r1)
+#ifdef CONFIG_TRACE_IRQFLAGS
+        /* Lockdep doesn't know about the fact that IRQs are temporarily turned
+         * off in this assembly code while peeking at TI_FLAGS() and such. However
+         * we need to inform it if the exception turned interrupts off, and we
+         * are about to trun them back on.
+         *
+         * The problem here sadly is that we don't know whether the exceptions was
+         * one that turned interrupts off or not. So we always tell lockdep about
+         * turning them on here when we go back to wherever we came from with EE
+         * on, even if that may meen some redudant calls being tracked. Maybe later
+         * we could encode what the exception did somewhere or test the exception
+         * type in the pt_regs but that sounds overkill
+         */
+        andi.   r10,r9,MSR_EE
+        beq     1f
+        bl      trace_hardirqs_on
+        lwz     r9,_MSR(r1)
+1:
+#endif /* CONFIG_TRACE_IRQFLAGS */
+
         lwz     r0,GPR0(r1)
         lwz     r2,GPR2(r1)
         REST_4GPRS(3, r1)
@@ -782,7 +896,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX)
         stwcx.  r0,0,r1                 /* to clear the reservation */
 
 #if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
-        lwz     r9,_MSR(r1)
         andi.   r10,r9,MSR_RI           /* check if this exception occurred */
         beql    nonrecoverable          /* at a bad place (MSR:RI = 0) */
 
@@ -805,7 +918,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX)
         MTMSRD(r10)             /* clear the RI bit */
         .globl exc_exit_restart
 exc_exit_restart:
-        lwz     r9,_MSR(r1)
         lwz     r12,_NIP(r1)
         FIX_SRR1(r9,r10)
         mtspr   SPRN_SRR0,r12
@@ -1035,11 +1147,18 @@ do_work:			/* r10 contains MSR_KERNEL here */
         beq     do_user_signal
 
 do_resched:                     /* r10 contains MSR_KERNEL here */
+        /* Note: We don't need to inform lockdep that we are enabling
+         * interrupts here. As far as it knows, they are already enabled
+         */
         ori     r10,r10,MSR_EE
         SYNC
         MTMSRD(r10)             /* hard-enable interrupts */
         bl      schedule
 recheck:
+        /* Note: And we don't tell it we are disabling them again
+         * neither. Those disable/enable cycles used to peek at
+         * TI_FLAGS aren't advertised.
+         */
         LOAD_MSR_KERNEL(r10,MSR_KERNEL)
         SYNC
         MTMSRD(r10)             /* disable interrupts */
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 48469463f89e..fc2132942754 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -1124,9 +1124,8 @@ mmu_off:
         RFI
 
 /*
- * Use the first pair of BAT registers to map the 1st 16MB
- * of RAM to PAGE_OFFSET.  From this point on we can't safely
- * call OF any more.
+ * On 601, we use 3 BATs to map up to 24M of RAM at _PAGE_OFFSET
+ * (we keep one for debugging) and on others, we use one 256M BAT.
  */
 initial_bats:
         lis     r11,PAGE_OFFSET@h
@@ -1136,12 +1135,16 @@ initial_bats:
         bne     4f
         ori     r11,r11,4               /* set up BAT registers for 601 */
         li      r8,0x7f                 /* valid, block length = 8MB */
-        oris    r9,r11,0x800000@h       /* set up BAT reg for 2nd 8M */
-        oris    r10,r8,0x800000@h       /* set up BAT reg for 2nd 8M */
         mtspr   SPRN_IBAT0U,r11         /* N.B. 601 has valid bit in */
         mtspr   SPRN_IBAT0L,r8          /* lower BAT register */
-        mtspr   SPRN_IBAT1U,r9
-        mtspr   SPRN_IBAT1L,r10
+        addis   r11,r11,0x800000@h
+        addis   r8,r8,0x800000@h
+        mtspr   SPRN_IBAT1U,r11
+        mtspr   SPRN_IBAT1L,r8
+        addis   r11,r11,0x800000@h
+        addis   r8,r8,0x800000@h
+        mtspr   SPRN_IBAT2U,r11
+        mtspr   SPRN_IBAT2L,r8
         isync
         blr
 
diff --git a/arch/powerpc/kernel/of_device.c b/arch/powerpc/kernel/of_device.c
index fa983a59c4ce..a359cb08e900 100644
--- a/arch/powerpc/kernel/of_device.c
+++ b/arch/powerpc/kernel/of_device.c
@@ -76,7 +76,7 @@ struct of_device *of_device_alloc(struct device_node *np,
         dev->dev.archdata.of_node = np;
 
         if (bus_id)
-                dev_set_name(&dev->dev, bus_id);
+                dev_set_name(&dev->dev, "%s", bus_id);
         else
                 of_device_make_bus_id(dev);
 
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 3e7135bbe40f..892a9f2e6d76 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -528,7 +528,7 @@ void show_regs(struct pt_regs * regs)
 
         for (i = 0;  i < 32;  i++) {
                 if ((i % REGS_PER_LINE) == 0)
-                        printk("\n" KERN_INFO "GPR%02d: ", i);
+                        printk("\nGPR%02d: ", i);
                 printk(REG " ", regs->gpr[i]);
                 if (i == LAST_VOLATILE && !FULL_REGS(regs))
                         break;
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index ee4c7609b649..c434823b8c83 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -38,9 +38,10 @@
 #include <asm/syscalls.h>
 #include <asm/smp.h>
 #include <asm/atomic.h>
+#include <asm/time.h>
 
 struct rtas_t rtas = {
-        .lock = SPIN_LOCK_UNLOCKED
+        .lock = __RAW_SPIN_LOCK_UNLOCKED
 };
 EXPORT_SYMBOL(rtas);
 
@@ -67,6 +68,28 @@ unsigned long rtas_rmo_buf;
 void (*rtas_flash_term_hook)(int);
 EXPORT_SYMBOL(rtas_flash_term_hook);
 
+/* RTAS use home made raw locking instead of spin_lock_irqsave
+ * because those can be called from within really nasty contexts
+ * such as having the timebase stopped which would lockup with
+ * normal locks and spinlock debugging enabled
+ */
+static unsigned long lock_rtas(void)
+{
+        unsigned long flags;
+
+        local_irq_save(flags);
+        preempt_disable();
+        __raw_spin_lock_flags(&rtas.lock, flags);
+        return flags;
+}
+
+static void unlock_rtas(unsigned long flags)
+{
+        __raw_spin_unlock(&rtas.lock);
+        local_irq_restore(flags);
+        preempt_enable();
+}
+
 /*
  * call_rtas_display_status and call_rtas_display_status_delay
  * are designed only for very early low-level debugging, which
@@ -79,7 +102,7 @@ static void call_rtas_display_status(char c)
 
         if (!rtas.base)
                 return;
-        spin_lock_irqsave(&rtas.lock, s);
+        s = lock_rtas();
 
         args->token = 10;
         args->nargs = 1;
@@ -89,7 +112,7 @@ static void call_rtas_display_status(char c)
 
         enter_rtas(__pa(args));
 
-        spin_unlock_irqrestore(&rtas.lock, s);
+        unlock_rtas(s);
 }
 
 static void call_rtas_display_status_delay(char c)
@@ -411,8 +434,7 @@ int rtas_call(int token, int nargs, int nret, int *outputs, ...)
         if (!rtas.entry || token == RTAS_UNKNOWN_SERVICE)
                 return -1;
 
-        /* Gotta do something different here, use global lock for now... */
-        spin_lock_irqsave(&rtas.lock, s);
+        s = lock_rtas();
         rtas_args = &rtas.args;
 
         rtas_args->token = token;
@@ -439,8 +461,7 @@ int rtas_call(int token, int nargs, int nret, int *outputs, ...)
                         outputs[i] = rtas_args->rets[i+1];
         ret = (nret > 0)? rtas_args->rets[0]: 0;
 
-        /* Gotta do something different here, use global lock for now... */
-        spin_unlock_irqrestore(&rtas.lock, s);
+        unlock_rtas(s);
 
         if (buff_copy) {
                 log_error(buff_copy, ERR_TYPE_RTAS_LOG, 0);
@@ -837,7 +858,7 @@ asmlinkage int ppc_rtas(struct rtas_args __user *uargs)
 
         buff_copy = get_errorlog_buffer();
 
-        spin_lock_irqsave(&rtas.lock, flags);
+        flags = lock_rtas();
 
         rtas.args = args;
         enter_rtas(__pa(&rtas.args));
@@ -848,7 +869,7 @@ asmlinkage int ppc_rtas(struct rtas_args __user *uargs)
         if (args.rets[0] == -1)
                 errbuf = __fetch_rtas_last_error(buff_copy);
 
-        spin_unlock_irqrestore(&rtas.lock, flags);
+        unlock_rtas(flags);
 
         if (buff_copy) {
                 if (errbuf)
@@ -951,3 +972,33 @@ int __init early_init_dt_scan_rtas(unsigned long node,
         /* break now */
         return 1;
 }
+
+static raw_spinlock_t timebase_lock;
+static u64 timebase = 0;
+
+void __cpuinit rtas_give_timebase(void)
+{
+        unsigned long flags;
+
+        local_irq_save(flags);
+        hard_irq_disable();
+        __raw_spin_lock(&timebase_lock);
+        rtas_call(rtas_token("freeze-time-base"), 0, 1, NULL);
+        timebase = get_tb();
+        __raw_spin_unlock(&timebase_lock);
+
+        while (timebase)
+                barrier();
+        rtas_call(rtas_token("thaw-time-base"), 0, 1, NULL);
+        local_irq_restore(flags);
+}
+
+void __cpuinit rtas_take_timebase(void)
+{
+        while (!timebase)
+                barrier();
+        __raw_spin_lock(&timebase_lock);
+        set_tb(timebase >> 32, timebase & 0xffffffff);
+        timebase = 0;
+        __raw_spin_unlock(&timebase_lock);
+}
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 1d154248cf40..e1e3059cf34b 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -119,6 +119,8 @@ notrace unsigned long __init early_init(unsigned long dt_ptr)
  */
 notrace void __init machine_init(unsigned long dt_ptr)
 {
+        lockdep_init();
+
         /* Enable early debugging if any specified (see udbg.h) */
         udbg_early_init();
 
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 65484b2200b3..0b47de07302d 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -68,7 +68,8 @@ EXPORT_PER_CPU_SYMBOL(cpu_core_map);
 /* SMP operations for this machine */
 struct smp_ops_t *smp_ops;
 
-static volatile unsigned int cpu_callin_map[NR_CPUS];
+/* Can't be static due to PowerMac hackery */
+volatile unsigned int cpu_callin_map[NR_CPUS];
 
 int smt_enabled_at_boot = 1;
 
diff --git a/arch/powerpc/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c
index 0362a891e54e..acb74a17bbbf 100644
--- a/arch/powerpc/kernel/udbg_16550.c
+++ b/arch/powerpc/kernel/udbg_16550.c
@@ -219,7 +219,7 @@ void udbg_init_pas_realmode(void)
 #ifdef CONFIG_PPC_EARLY_DEBUG_44x
 #include <platforms/44x/44x.h>
 
-static int udbg_44x_as1_flush(void)
+static void udbg_44x_as1_flush(void)
 {
         if (udbg_comport) {
                 while ((as1_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index 2d2192e48de7..3e68363405b7 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -30,3 +30,4 @@ obj-$(CONFIG_PPC_MM_SLICES)	+= slice.o
 obj-$(CONFIG_HUGETLB_PAGE)      += hugetlbpage.o
 obj-$(CONFIG_PPC_SUBPAGE_PROT)  += subpage-prot.o
 obj-$(CONFIG_NOT_COHERENT_CACHE) += dma-noncoherent.o
+obj-$(CONFIG_HIGHMEM)           += highmem.o
diff --git a/arch/powerpc/mm/highmem.c b/arch/powerpc/mm/highmem.c
new file mode 100644
index 000000000000..c2186c74c85a
--- /dev/null
+++ b/arch/powerpc/mm/highmem.c
@@ -0,0 +1,77 @@
+/*
+ * highmem.c: virtual kernel memory mappings for high memory
+ *
+ * PowerPC version, stolen from the i386 version.
+ *
+ * Used in CONFIG_HIGHMEM systems for memory pages which
+ * are not addressable by direct kernel virtual addresses.
+ *
+ * Copyright (C) 1999 Gerhard Wichert, Siemens AG
+ *                    Gerhard.Wichert@pdb.siemens.de
+ *
+ *
+ * Redesigned the x86 32-bit VM architecture to deal with
+ * up to 16 Terrabyte physical memory. With current x86 CPUs
+ * we now support up to 64 Gigabytes physical RAM.
+ *
+ * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com>
+ *
+ * Reworked for PowerPC by various contributors. Moved from
+ * highmem.h by Benjamin Herrenschmidt (c) 2009 IBM Corp.
+ */
+
+#include <linux/highmem.h>
+#include <linux/module.h>
+
+/*
+ * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
+ * gives a more generic (and caching) interface. But kmap_atomic can
+ * be used in IRQ contexts, so in some (very limited) cases we need
+ * it.
+ */
+void *kmap_atomic_prot(struct page *page, enum km_type type, pgprot_t prot)
+{
+        unsigned int idx;
+        unsigned long vaddr;
+
+        /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */
+        pagefault_disable();
+        if (!PageHighMem(page))
+                return page_address(page);
+
+        debug_kmap_atomic(type);
+        idx = type + KM_TYPE_NR*smp_processor_id();
+        vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
+#ifdef CONFIG_DEBUG_HIGHMEM
+        BUG_ON(!pte_none(*(kmap_pte-idx)));
+#endif
+        __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot), 1);
+        local_flush_tlb_page(NULL, vaddr);
+
+        return (void*) vaddr;
+}
+EXPORT_SYMBOL(kmap_atomic_prot);
+
+void kunmap_atomic(void *kvaddr, enum km_type type)
+{
+#ifdef CONFIG_DEBUG_HIGHMEM
+        unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
+        enum fixed_addresses idx = type + KM_TYPE_NR*smp_processor_id();
+
+        if (vaddr < __fix_to_virt(FIX_KMAP_END)) {
+                pagefault_enable();
+                return;
+        }
+
+        BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
+
+        /*
+         * force other mappings to Oops if they'll try to access
+         * this pte without first remap it
+         */
+        pte_clear(&init_mm, vaddr, kmap_pte-idx);
+        local_flush_tlb_page(NULL, vaddr);
+#endif
+        pagefault_enable();
+}
+EXPORT_SYMBOL(kunmap_atomic);
diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c
index 42e09a9f77e2..0362c88f47d7 100644
--- a/arch/powerpc/platforms/44x/warp.c
+++ b/arch/powerpc/platforms/44x/warp.c
@@ -16,6 +16,7 @@
 #include <linux/interrupt.h>
 #include <linux/delay.h>
 #include <linux/of_gpio.h>
+#include <linux/of_i2c.h>
 
 #include <asm/machdep.h>
 #include <asm/prom.h>
@@ -65,7 +66,6 @@ define_machine(warp) {
 
 static u32 post_info;
 
-/* I am not sure this is the best place for this... */
 static int __init warp_post_info(void)
 {
         struct device_node *np;
@@ -194,9 +194,9 @@ static int pika_setup_leds(void)
         return 0;
 }
 
-static void pika_setup_critical_temp(struct i2c_client *client)
+static void pika_setup_critical_temp(struct device_node *np,
+                                     struct i2c_client *client)
 {
-        struct device_node *np;
         int irq, rc;
 
         /* Do this before enabling critical temp interrupt since we
@@ -208,14 +208,7 @@ static void pika_setup_critical_temp(struct i2c_client *client)
         i2c_smbus_write_byte_data(client, 2, 65); /* Thigh */
         i2c_smbus_write_byte_data(client, 3,  0); /* Tlow */
 
-        np = of_find_compatible_node(NULL, NULL, "adi,ad7414");
-        if (np == NULL) {
-                printk(KERN_ERR __FILE__ ": Unable to find ad7414\n");
-                return;
-        }
-
         irq = irq_of_parse_and_map(np, 0);
-        of_node_put(np);
         if (irq  == NO_IRQ) {
                 printk(KERN_ERR __FILE__ ": Unable to get ad7414 irq\n");
                 return;
@@ -244,32 +237,24 @@ static inline void pika_dtm_check_fan(void __iomem *fpga)
 
 static int pika_dtm_thread(void __iomem *fpga)
 {
-        struct i2c_adapter *adap;
+        struct device_node *np;
         struct i2c_client *client;
 
-        /* We loop in case either driver was compiled as a module and
-         * has not been insmoded yet.
-         */
-        while (!(adap = i2c_get_adapter(0))) {
-                set_current_state(TASK_INTERRUPTIBLE);
-                schedule_timeout(HZ);
-        }
-
-        while (1) {
-                list_for_each_entry(client, &adap->clients, list)
-                        if (client->addr == 0x4a)
-                                goto found_it;
+        np = of_find_compatible_node(NULL, NULL, "adi,ad7414");
+        if (np == NULL)
+                return -ENOENT;
 
-                set_current_state(TASK_INTERRUPTIBLE);
-                schedule_timeout(HZ);
+        client = of_find_i2c_device_by_node(np);
+        if (client == NULL) {
+                of_node_put(np);
+                return -ENOENT;
         }
 
-found_it:
-        pika_setup_critical_temp(client);
+        pika_setup_critical_temp(np, client);
 
-        i2c_put_adapter(adap);
+        of_node_put(np);
 
-        printk(KERN_INFO "PIKA DTM thread running.\n");
+        printk(KERN_INFO "Warp DTM thread running.\n");
 
         while (!kthread_should_stop()) {
                 int val;
@@ -291,7 +276,6 @@ found_it:
         return 0;
 }
 
-
 static int __init pika_dtm_start(void)
 {
         struct task_struct *dtm_thread;
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 77f90b356356..60ed9c067b1d 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -285,6 +285,7 @@ static struct of_device_id mpc85xx_ids[] = {
         { .type = "qe", },
         { .compatible = "fsl,qe", },
         { .compatible = "gianfar", },
+        { .compatible = "fsl,rapidio-delta", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index cc0b0db8a6f3..62c592ede641 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -52,20 +52,19 @@ smp_85xx_kick_cpu(int nr)
 
         pr_debug("smp_85xx_kick_cpu: kick CPU #%d\n", nr);
 
-        local_irq_save(flags);
-
         np = of_get_cpu_node(nr, NULL);
         cpu_rel_addr = of_get_property(np, "cpu-release-addr", NULL);
 
         if (cpu_rel_addr == NULL) {
                 printk(KERN_ERR "No cpu-release-addr for cpu %d\n", nr);
-                local_irq_restore(flags);
                 return;
         }
 
         /* Map the spin table */
         bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY);
 
+        local_irq_save(flags);
+
         out_be32(bptr_vaddr + BOOT_ENTRY_PIR, nr);
         out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start));
 
@@ -73,10 +72,10 @@ smp_85xx_kick_cpu(int nr)
         while ((__secondary_hold_acknowledge != nr) && (++n < 1000))
                 mdelay(1);
 
-        iounmap(bptr_vaddr);
-
         local_irq_restore(flags);
 
+        iounmap(bptr_vaddr);
+
         pr_debug("waited %d msecs for CPU #%d.\n", n, nr);
 }
 
diff --git a/arch/powerpc/platforms/85xx/socrates.c b/arch/powerpc/platforms/85xx/socrates.c
index d0e8443b12c6..747d8fb3ab82 100644
--- a/arch/powerpc/platforms/85xx/socrates.c
+++ b/arch/powerpc/platforms/85xx/socrates.c
@@ -102,10 +102,11 @@ static struct of_device_id __initdata socrates_of_bus_ids[] = {
         {},
 };
 
-static void __init socrates_init(void)
+static int __init socrates_publish_devices(void)
 {
-        of_platform_bus_probe(NULL, socrates_of_bus_ids, NULL);
+        return of_platform_bus_probe(NULL, socrates_of_bus_ids, NULL);
 }
+machine_device_initcall(socrates, socrates_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
@@ -124,7 +125,6 @@ define_machine(socrates) {
         .name                   = "Socrates",
         .probe                  = socrates_probe,
         .setup_arch             = socrates_setup_arch,
-        .init                   = socrates_init,
         .init_IRQ               = socrates_pic_init,
         .get_irq                = mpic_get_irq,
         .restart                = fsl_rstcr_restart,
diff --git a/arch/powerpc/platforms/85xx/xes_mpc85xx.c b/arch/powerpc/platforms/85xx/xes_mpc85xx.c
index ee01532786e4..1b426050a2f9 100644
--- a/arch/powerpc/platforms/85xx/xes_mpc85xx.c
+++ b/arch/powerpc/platforms/85xx/xes_mpc85xx.c
@@ -32,7 +32,6 @@
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
-#include <linux/of_platform.h>
 
 /* A few bit definitions needed for fixups on some boards */
 #define MPC85xx_L2CTL_L2E               0x80000000 /* L2 enable */
diff --git a/arch/powerpc/platforms/cell/smp.c b/arch/powerpc/platforms/cell/smp.c
index 9046803c8276..bc97fada48c6 100644
--- a/arch/powerpc/platforms/cell/smp.c
+++ b/arch/powerpc/platforms/cell/smp.c
@@ -36,7 +36,6 @@
 #include <asm/prom.h>
 #include <asm/smp.h>
 #include <asm/paca.h>
-#include <asm/time.h>
 #include <asm/machdep.h>
 #include <asm/cputable.h>
 #include <asm/firmware.h>
@@ -140,31 +139,6 @@ static void __devinit smp_cell_setup_cpu(int cpu)
         mtspr(SPRN_DABRX, DABRX_KERNEL | DABRX_USER);
 }
 
-static DEFINE_SPINLOCK(timebase_lock);
-static unsigned long timebase = 0;
-
-static void __devinit cell_give_timebase(void)
-{
-        spin_lock(&timebase_lock);
-        rtas_call(rtas_token("freeze-time-base"), 0, 1, NULL);
-        timebase = get_tb();
-        spin_unlock(&timebase_lock);
-
-        while (timebase)
-                barrier();
-        rtas_call(rtas_token("thaw-time-base"), 0, 1, NULL);
-}
-
-static void __devinit cell_take_timebase(void)
-{
-        while (!timebase)
-                barrier();
-        spin_lock(&timebase_lock);
-        set_tb(timebase >> 32, timebase & 0xffffffff);
-        timebase = 0;
-        spin_unlock(&timebase_lock);
-}
-
 static void __devinit smp_cell_kick_cpu(int nr)
 {
         BUG_ON(nr < 0 || nr >= NR_CPUS);
@@ -224,8 +198,8 @@ void __init smp_init_cell(void)
 
         /* Non-lpar has additional take/give timebase */
         if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
-                smp_ops->give_timebase = cell_give_timebase;
-                smp_ops->take_timebase = cell_take_timebase;
+                smp_ops->give_timebase = rtas_give_timebase;
+                smp_ops->take_timebase = rtas_take_timebase;
         }
 
         DBG(" <- smp_init_cell()\n");
diff --git a/arch/powerpc/platforms/chrp/smp.c b/arch/powerpc/platforms/chrp/smp.c
index 10a4a4d063b6..02cafecc90e3 100644
--- a/arch/powerpc/platforms/chrp/smp.c
+++ b/arch/powerpc/platforms/chrp/smp.c
@@ -26,7 +26,6 @@
 #include <asm/io.h>
 #include <asm/prom.h>
 #include <asm/smp.h>
-#include <asm/time.h>
 #include <asm/machdep.h>
 #include <asm/mpic.h>
 #include <asm/rtas.h>
@@ -42,40 +41,12 @@ static void __devinit smp_chrp_setup_cpu(int cpu_nr)
         mpic_setup_this_cpu();
 }
 
-static DEFINE_SPINLOCK(timebase_lock);
-static unsigned int timebase_upper = 0, timebase_lower = 0;
-
-void __devinit smp_chrp_give_timebase(void)
-{
-        spin_lock(&timebase_lock);
-        rtas_call(rtas_token("freeze-time-base"), 0, 1, NULL);
-        timebase_upper = get_tbu();
-        timebase_lower = get_tbl();
-        spin_unlock(&timebase_lock);
-
-        while (timebase_upper || timebase_lower)
-                barrier();
-        rtas_call(rtas_token("thaw-time-base"), 0, 1, NULL);
-}
-
-void __devinit smp_chrp_take_timebase(void)
-{
-        while (!(timebase_upper || timebase_lower))
-                barrier();
-        spin_lock(&timebase_lock);
-        set_tb(timebase_upper, timebase_lower);
-        timebase_upper = 0;
-        timebase_lower = 0;
-        spin_unlock(&timebase_lock);
-        printk("CPU %i taken timebase\n", smp_processor_id());
-}
-
 /* CHRP with openpic */
 struct smp_ops_t chrp_smp_ops = {
         .message_pass = smp_mpic_message_pass,
         .probe = smp_mpic_probe,
         .kick_cpu = smp_chrp_kick_cpu,
         .setup_cpu = smp_chrp_setup_cpu,
-        .give_timebase = smp_chrp_give_timebase,
-        .take_timebase = smp_chrp_take_timebase,
+        .give_timebase = rtas_give_timebase,
+        .take_timebase = rtas_take_timebase,
 };
diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c
index 153051eb6d93..a4619347aa7e 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -71,20 +71,25 @@ static void pas_restart(char *cmd)
 }
 
 #ifdef CONFIG_SMP
-static DEFINE_SPINLOCK(timebase_lock);
+static raw_spinlock_t timebase_lock;
 static unsigned long timebase;
 
 static void __devinit pas_give_timebase(void)
 {
-        spin_lock(&timebase_lock);
+        unsigned long flags;
+
+        local_irq_save(flags);
+        hard_irq_disable();
+        __raw_spin_lock(&timebase_lock);
         mtspr(SPRN_TBCTL, TBCTL_FREEZE);
         isync();
         timebase = get_tb();
-        spin_unlock(&timebase_lock);
+        __raw_spin_unlock(&timebase_lock);
 
         while (timebase)
                 barrier();
         mtspr(SPRN_TBCTL, TBCTL_RESTART);
+        local_irq_restore(flags);
 }
 
 static void __devinit pas_take_timebase(void)
@@ -92,10 +97,10 @@ static void __devinit pas_take_timebase(void)
         while (!timebase)
                 smp_rmb();
 
-        spin_lock(&timebase_lock);
+        __raw_spin_lock(&timebase_lock);
         set_tb(timebase >> 32, timebase & 0xffffffff);
         timebase = 0;
-        spin_unlock(&timebase_lock);
+        __raw_spin_unlock(&timebase_lock);
 }
 
 struct smp_ops_t pas_smp_ops = {
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 86f69a4eb49b..c20522656367 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -103,11 +103,6 @@ unsigned long smu_cmdbuf_abs;
 EXPORT_SYMBOL(smu_cmdbuf_abs);
 #endif
 
-#ifdef CONFIG_SMP
-extern struct smp_ops_t psurge_smp_ops;
-extern struct smp_ops_t core99_smp_ops;
-#endif /* CONFIG_SMP */
-
 static void pmac_show_cpuinfo(struct seq_file *m)
 {
         struct device_node *np;
@@ -341,34 +336,6 @@ static void __init pmac_setup_arch(void)
                 ROOT_DEV = DEFAULT_ROOT_DEVICE;
 #endif
 
-#ifdef CONFIG_SMP
-        /* Check for Core99 */
-        ic = of_find_node_by_name(NULL, "uni-n");
-        if (!ic)
-                ic = of_find_node_by_name(NULL, "u3");
-        if (!ic)
-                ic = of_find_node_by_name(NULL, "u4");
-        if (ic) {
-                of_node_put(ic);
-                smp_ops = &core99_smp_ops;
-        }
-#ifdef CONFIG_PPC32
-        else {
-                /*
-                 * We have to set bits in cpu_possible_map here since the
-                 * secondary CPU(s) aren't in the device tree, and
-                 * setup_per_cpu_areas only allocates per-cpu data for
-                 * CPUs in the cpu_possible_map.
-                 */
-                int cpu;
-
-                for (cpu = 1; cpu < 4 && cpu < NR_CPUS; ++cpu)
-                        cpu_set(cpu, cpu_possible_map);
-                smp_ops = &psurge_smp_ops;
-        }
-#endif
-#endif /* CONFIG_SMP */
-
 #ifdef CONFIG_ADB
         if (strstr(cmd_line, "adb_sync")) {
                 extern int __adb_probe_sync;
@@ -512,6 +479,14 @@ static void __init pmac_init_early(void)
 #ifdef CONFIG_PPC64
         iommu_init_early_dart();
 #endif
+
+        /* SMP Init has to be done early as we need to patch up
+         * cpu_possible_map before interrupt stacks are allocated
+         * or kaboom...
+         */
+#ifdef CONFIG_SMP
+        pmac_setup_smp();
+#endif
 }
 
 static int __init pmac_declare_of_platform_devices(void)
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index cf1dbe758890..6d4da7b46b41 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -64,10 +64,11 @@
 extern void __secondary_start_pmac_0(void);
 extern int pmac_pfunc_base_install(void);
 
-#ifdef CONFIG_PPC32
+static void (*pmac_tb_freeze)(int freeze);
+static u64 timebase;
+static int tb_req;
 
-/* Sync flag for HW tb sync */
-static volatile int sec_tb_reset = 0;
+#ifdef CONFIG_PPC32
 
 /*
  * Powersurge (old powermac SMP) support.
@@ -294,6 +295,9 @@ static int __init smp_psurge_probe(void)
                 psurge_quad_init();
                 /* All released cards using this HW design have 4 CPUs */
                 ncpus = 4;
+                /* No sure how timebase sync works on those, let's use SW */
+                smp_ops->give_timebase = smp_generic_give_timebase;
+                smp_ops->take_timebase = smp_generic_take_timebase;
         } else {
                 iounmap(quad_base);
                 if ((in_8(hhead_base + HHEAD_CONFIG) & 0x02) == 0) {
@@ -308,18 +312,15 @@ static int __init smp_psurge_probe(void)
         psurge_start = ioremap(PSURGE_START, 4);
         psurge_pri_intr = ioremap(PSURGE_PRI_INTR, 4);
 
-        /*
-         * This is necessary because OF doesn't know about the
+        /* This is necessary because OF doesn't know about the
          * secondary cpu(s), and thus there aren't nodes in the
          * device tree for them, and smp_setup_cpu_maps hasn't
-         * set their bits in cpu_possible_map and cpu_present_map.
+         * set their bits in cpu_present_map.
          */
         if (ncpus > NR_CPUS)
                 ncpus = NR_CPUS;
-        for (i = 1; i < ncpus ; ++i) {
+        for (i = 1; i < ncpus ; ++i)
                 cpu_set(i, cpu_present_map);
-                set_hard_smp_processor_id(i, i);
-        }
 
         if (ppc_md.progress) ppc_md.progress("smp_psurge_probe - done", 0x352);
 
@@ -329,8 +330,14 @@ static int __init smp_psurge_probe(void)
 static void __init smp_psurge_kick_cpu(int nr)
 {
         unsigned long start = __pa(__secondary_start_pmac_0) + nr * 8;
-        unsigned long a;
-        int i;
+        unsigned long a, flags;
+        int i, j;
+
+        /* Defining this here is evil ... but I prefer hiding that
+         * crap to avoid giving people ideas that they can do the
+         * same.
+         */
+        extern volatile unsigned int cpu_callin_map[NR_CPUS];
 
         /* may need to flush here if secondary bats aren't setup */
         for (a = KERNELBASE; a < KERNELBASE + 0x800000; a += 32)
@@ -339,47 +346,52 @@ static void __init smp_psurge_kick_cpu(int nr)
 
         if (ppc_md.progress) ppc_md.progress("smp_psurge_kick_cpu", 0x353);
 
+        /* This is going to freeze the timeebase, we disable interrupts */
+        local_irq_save(flags);
+
         out_be32(psurge_start, start);
         mb();
 
         psurge_set_ipi(nr);
+
         /*
          * We can't use udelay here because the timebase is now frozen.
          */
         for (i = 0; i < 2000; ++i)
-                barrier();
+                asm volatile("nop" : : : "memory");
         psurge_clr_ipi(nr);
 
-        if (ppc_md.progress) ppc_md.progress("smp_psurge_kick_cpu - done", 0x354);
-}
-
-/*
- * With the dual-cpu powersurge board, the decrementers and timebases
- * of both cpus are frozen after the secondary cpu is started up,
- * until we give the secondary cpu another interrupt.  This routine
- * uses this to get the timebases synchronized.
- *  -- paulus.
- */
-static void __init psurge_dual_sync_tb(int cpu_nr)
-{
-        int t;
-
-        set_dec(tb_ticks_per_jiffy);
-        /* XXX fixme */
-        set_tb(0, 0);
-
-        if (cpu_nr > 0) {
+        /*
+         * Also, because the timebase is frozen, we must not return to the
+         * caller which will try to do udelay's etc... Instead, we wait -here-
+         * for the CPU to callin.
+         */
+        for (i = 0; i < 100000 && !cpu_callin_map[nr]; ++i) {
+                for (j = 1; j < 10000; j++)
+                        asm volatile("nop" : : : "memory");
+                asm volatile("sync" : : : "memory");
+        }
+        if (!cpu_callin_map[nr])
+                goto stuck;
+
+        /* And we do the TB sync here too for standard dual CPU cards */
+        if (psurge_type == PSURGE_DUAL) {
+                while(!tb_req)
+                        barrier();
+                tb_req = 0;
+                mb();
+                timebase = get_tb();
+                mb();
+                while (timebase)
+                        barrier();
                 mb();
-                sec_tb_reset = 1;
-                return;
         }
+ stuck:
+        /* now interrupt the secondary, restarting both TBs */
+        if (psurge_type == PSURGE_DUAL)
+                psurge_set_ipi(1);
 
-        /* wait for the secondary to have reset its TB before proceeding */
-        for (t = 10000000; t > 0 && !sec_tb_reset; --t)
-                ;
-
-        /* now interrupt the secondary, starting both TBs */
-        psurge_set_ipi(1);
+        if (ppc_md.progress) ppc_md.progress("smp_psurge_kick_cpu - done", 0x354);
 }
 
 static struct irqaction psurge_irqaction = {
@@ -390,36 +402,35 @@ static struct irqaction psurge_irqaction = {
 
 static void __init smp_psurge_setup_cpu(int cpu_nr)
 {
+        if (cpu_nr != 0)
+                return;
 
-        if (cpu_nr == 0) {
-                /* If we failed to start the second CPU, we should still
-                 * send it an IPI to start the timebase & DEC or we might
-                 * have them stuck.
-                 */
-                if (num_online_cpus() < 2) {
-                        if (psurge_type == PSURGE_DUAL)
-                                psurge_set_ipi(1);
-                        return;
-                }
-                /* reset the entry point so if we get another intr we won't
-                 * try to startup again */
-                out_be32(psurge_start, 0x100);
-                if (setup_irq(30, &psurge_irqaction))
-                        printk(KERN_ERR "Couldn't get primary IPI interrupt");
-        }
-
-        if (psurge_type == PSURGE_DUAL)
-                psurge_dual_sync_tb(cpu_nr);
+        /* reset the entry point so if we get another intr we won't
+         * try to startup again */
+        out_be32(psurge_start, 0x100);
+        if (setup_irq(30, &psurge_irqaction))
+                printk(KERN_ERR "Couldn't get primary IPI interrupt");
 }
 
 void __init smp_psurge_take_timebase(void)
 {
-        /* Dummy implementation */
+        if (psurge_type != PSURGE_DUAL)
+                return;
+
+        tb_req = 1;
+        mb();
+        while (!timebase)
+                barrier();
+        mb();
+        set_tb(timebase >> 32, timebase & 0xffffffff);
+        timebase = 0;
+        mb();
+        set_dec(tb_ticks_per_jiffy/2);
 }
 
 void __init smp_psurge_give_timebase(void)
 {
-        /* Dummy implementation */
+        /* Nothing to do here */
 }
 
 /* PowerSurge-style Macs */
@@ -437,9 +448,6 @@ struct smp_ops_t psurge_smp_ops = {
  * Core 99 and later support
  */
 
-static void (*pmac_tb_freeze)(int freeze);
-static u64 timebase;
-static int tb_req;
 
 static void smp_core99_give_timebase(void)
 {
@@ -478,7 +486,6 @@ static void __devinit smp_core99_take_timebase(void)
         set_tb(timebase >> 32, timebase & 0xffffffff);
         timebase = 0;
         mb();
-        set_dec(tb_ticks_per_jiffy/2);
 
         local_irq_restore(flags);
 }
@@ -920,3 +927,34 @@ struct smp_ops_t core99_smp_ops = {
 # endif
 #endif
 };
+
+void __init pmac_setup_smp(void)
+{
+        struct device_node *np;
+
+        /* Check for Core99 */
+        np = of_find_node_by_name(NULL, "uni-n");
+        if (!np)
+                np = of_find_node_by_name(NULL, "u3");
+        if (!np)
+                np = of_find_node_by_name(NULL, "u4");
+        if (np) {
+                of_node_put(np);
+                smp_ops = &core99_smp_ops;
+        }
+#ifdef CONFIG_PPC32
+        else {
+                /* We have to set bits in cpu_possible_map here since the
+                 * secondary CPU(s) aren't in the device tree. Various
+                 * things won't be initialized for CPUs not in the possible
+                 * map, so we really need to fix it up here.
+                 */
+                int cpu;
+
+                for (cpu = 1; cpu < 4 && cpu < NR_CPUS; ++cpu)
+                        cpu_set(cpu, cpu_possible_map);
+                smp_ops = &psurge_smp_ops;
+        }
+#endif /* CONFIG_PPC32 */
+}
+
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c
index 1a231c389ba0..1f8f6cfb94f7 100644
--- a/arch/powerpc/platforms/pseries/smp.c
+++ b/arch/powerpc/platforms/pseries/smp.c
@@ -35,7 +35,6 @@
 #include <asm/prom.h>
 #include <asm/smp.h>
 #include <asm/paca.h>
-#include <asm/time.h>
 #include <asm/machdep.h>
 #include <asm/cputable.h>
 #include <asm/firmware.h>
@@ -118,31 +117,6 @@ static void __devinit smp_xics_setup_cpu(int cpu)
 }
 #endif /* CONFIG_XICS */
 
-static DEFINE_SPINLOCK(timebase_lock);
-static unsigned long timebase = 0;
-
-static void __devinit pSeries_give_timebase(void)
-{
-        spin_lock(&timebase_lock);
-        rtas_call(rtas_token("freeze-time-base"), 0, 1, NULL);
-        timebase = get_tb();
-        spin_unlock(&timebase_lock);
-
-        while (timebase)
-                barrier();
-        rtas_call(rtas_token("thaw-time-base"), 0, 1, NULL);
-}
-
-static void __devinit pSeries_take_timebase(void)
-{
-        while (!timebase)
-                barrier();
-        spin_lock(&timebase_lock);
-        set_tb(timebase >> 32, timebase & 0xffffffff);
-        timebase = 0;
-        spin_unlock(&timebase_lock);
-}
-
 static void __devinit smp_pSeries_kick_cpu(int nr)
 {
         BUG_ON(nr < 0 || nr >= NR_CPUS);
@@ -209,8 +183,8 @@ static void __init smp_init_pseries(void)
 
         /* Non-lpar has additional take/give timebase */
         if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
-                smp_ops->give_timebase = pSeries_give_timebase;
-                smp_ops->take_timebase = pSeries_take_timebase;
+                smp_ops->give_timebase = rtas_give_timebase;
+                smp_ops->take_timebase = rtas_take_timebase;
         }
 
         pr_debug(" <- smp_init_pSeries()\n");
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 9c3af5045495..d46de1f0f3ee 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -279,28 +279,29 @@ static void _mpic_map_mmio(struct mpic *mpic, phys_addr_t phys_addr,
 }
 
 #ifdef CONFIG_PPC_DCR
-static void _mpic_map_dcr(struct mpic *mpic, struct mpic_reg_bank *rb,
+static void _mpic_map_dcr(struct mpic *mpic, struct device_node *node,
+                          struct mpic_reg_bank *rb,
                           unsigned int offset, unsigned int size)
 {
         const u32 *dbasep;
 
-        dbasep = of_get_property(mpic->irqhost->of_node, "dcr-reg", NULL);
+        dbasep = of_get_property(node, "dcr-reg", NULL);
 
-        rb->dhost = dcr_map(mpic->irqhost->of_node, *dbasep + offset, size);
+        rb->dhost = dcr_map(node, *dbasep + offset, size);
         BUG_ON(!DCR_MAP_OK(rb->dhost));
 }
 
-static inline void mpic_map(struct mpic *mpic, phys_addr_t phys_addr,
-                            struct mpic_reg_bank *rb, unsigned int offset,
-                            unsigned int size)
+static inline void mpic_map(struct mpic *mpic, struct device_node *node,
+                            phys_addr_t phys_addr, struct mpic_reg_bank *rb,
+                            unsigned int offset, unsigned int size)
 {
         if (mpic->flags & MPIC_USES_DCR)
-                _mpic_map_dcr(mpic, rb, offset, size);
+                _mpic_map_dcr(mpic, node, rb, offset, size);
         else
                 _mpic_map_mmio(mpic, phys_addr, rb, offset, size);
 }
 #else /* CONFIG_PPC_DCR */
-#define mpic_map(m,p,b,o,s)     _mpic_map_mmio(m,p,b,o,s)
+#define mpic_map(m,n,p,b,o,s)   _mpic_map_mmio(m,p,b,o,s)
 #endif /* !CONFIG_PPC_DCR */
 
 
@@ -1052,11 +1053,10 @@ struct mpic * __init mpic_alloc(struct device_node *node,
         int             intvec_top;
         u64             paddr = phys_addr;
 
-        mpic = alloc_bootmem(sizeof(struct mpic));
+        mpic = kzalloc(sizeof(struct mpic), GFP_KERNEL);
         if (mpic == NULL)
                 return NULL;
-        
-        memset(mpic, 0, sizeof(struct mpic));
+
         mpic->name = name;
 
         mpic->hc_irq = mpic_irq_chip;
@@ -1152,8 +1152,8 @@ struct mpic * __init mpic_alloc(struct device_node *node,
         }
 
         /* Map the global registers */
-        mpic_map(mpic, paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);
-        mpic_map(mpic, paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
+        mpic_map(mpic, node, paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);
+        mpic_map(mpic, node, paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
 
         /* Reset */
         if (flags & MPIC_WANTS_RESET) {
@@ -1194,7 +1194,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
 
         /* Map the per-CPU registers */
         for (i = 0; i < mpic->num_cpus; i++) {
-                mpic_map(mpic, paddr, &mpic->cpuregs[i],
+                mpic_map(mpic, node, paddr, &mpic->cpuregs[i],
                          MPIC_INFO(CPU_BASE) + i * MPIC_INFO(CPU_STRIDE),
                          0x1000);
         }
@@ -1202,7 +1202,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
         /* Initialize main ISU if none provided */
         if (mpic->isu_size == 0) {
                 mpic->isu_size = mpic->num_sources;
-                mpic_map(mpic, paddr, &mpic->isus[0],
+                mpic_map(mpic, node, paddr, &mpic->isus[0],
                          MPIC_INFO(IRQ_BASE), MPIC_INFO(IRQ_STRIDE) * mpic->isu_size);
         }
         mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1);
@@ -1256,8 +1256,10 @@ void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
 
         BUG_ON(isu_num >= MPIC_MAX_ISU);
 
-        mpic_map(mpic, paddr, &mpic->isus[isu_num], 0,
+        mpic_map(mpic, mpic->irqhost->of_node,
+                 paddr, &mpic->isus[isu_num], 0,
                  MPIC_INFO(IRQ_STRIDE) * mpic->isu_size);
+
         if ((isu_first + mpic->isu_size) > mpic->num_sources)
                 mpic->num_sources = isu_first + mpic->isu_size;
 }
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index b28b0e512d67..237e3654f48c 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -112,6 +112,7 @@ int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input)
 {
         unsigned long flags;
         u8 mcn_shift = 0, dev_shift = 0;
+        u32 ret;
 
         spin_lock_irqsave(&qe_lock, flags);
         if (cmd == QE_RESET) {
@@ -139,11 +140,13 @@ int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input)
         }
 
         /* wait for the QE_CR_FLG to clear */
-        while(in_be32(&qe_immr->cp.cecr) & QE_CR_FLG)
-                cpu_relax();
+        ret = spin_event_timeout((in_be32(&qe_immr->cp.cecr) & QE_CR_FLG) == 0,
+                           100, 0);
+        /* On timeout (e.g. failure), the expression will be false (ret == 0),
+           otherwise it will be true (ret == 1). */
         spin_unlock_irqrestore(&qe_lock, flags);
 
-        return 0;
+        return ret == 1;
 }
 EXPORT_SYMBOL(qe_issue_cmd);
 
diff --git a/arch/sparc/boot/Makefile b/arch/sparc/boot/Makefile
index 96041a8d39e8..1ff0fd924756 100644
--- a/arch/sparc/boot/Makefile
+++ b/arch/sparc/boot/Makefile
@@ -15,7 +15,7 @@ quiet_cmd_elftoaout	= ELFTOAOUT $@
 
 ifeq ($(CONFIG_SPARC32),y)
 quiet_cmd_piggy         = PIGGY   $@
-      cmd_piggy         = $(obj)/piggyback_32 $@ $(obj)/System.map $(ROOT_IMG)
+      cmd_piggy         = $(obj)/piggyback_32 $@ System.map $(ROOT_IMG)
 quiet_cmd_btfix         = BTFIX   $@
       cmd_btfix         = $(OBJDUMP) -x vmlinux | $(obj)/btfixupprep > $@
 quiet_cmd_sysmap        = SYSMAP  $(obj)/System.map
@@ -58,7 +58,7 @@ $(obj)/image: $(obj)/btfix.o FORCE
 $(obj)/zImage: $(obj)/image
         $(call if_changed,strip)
 
-$(obj)/tftpboot.img: $(obj)/piggyback $(obj)/System.map $(obj)/image FORCE
+$(obj)/tftpboot.img: $(obj)/image $(obj)/piggyback_32 System.map $(ROOT_IMG) FORCE
         $(call if_changed,elftoaout)
         $(call if_changed,piggy)
 
@@ -79,7 +79,7 @@ $(obj)/image: vmlinux FORCE
         $(call if_changed,strip)
         @echo '  kernel: $@ is ready'
 
-$(obj)/tftpboot.img: vmlinux $(obj)/piggyback_64 System.map $(ROOT_IMG) FORCE
+$(obj)/tftpboot.img: $(obj)/image $(obj)/piggyback_64 System.map $(ROOT_IMG) FORCE
         $(call if_changed,elftoaout)
         $(call if_changed,piggy)
         @echo '  kernel: $@ is ready'
diff --git a/arch/sparc/boot/piggyback_32.c b/arch/sparc/boot/piggyback_32.c
index c9f500c1a8b2..e8dc9adfcd61 100644
--- a/arch/sparc/boot/piggyback_32.c
+++ b/arch/sparc/boot/piggyback_32.c
@@ -70,7 +70,7 @@ void die(char *str)
 int main(int argc,char **argv)
 {
         static char aout_magic[] = { 0x01, 0x03, 0x01, 0x07 };
-        unsigned char buffer[1024], *q, *r;
+        char buffer[1024], *q, *r;
         unsigned int i, j, k, start, end, offset;
         FILE *map;
         struct stat s;
@@ -84,7 +84,7 @@ int main(int argc,char **argv)
         while (fgets (buffer, 1024, map)) {
                 if (!strcmp (buffer + 8, " T start\n") || !strcmp (buffer + 16, " T start\n"))
                         start = strtoul (buffer, NULL, 16);
-                else if (!strcmp (buffer + 8, " A end\n") || !strcmp (buffer + 16, " A end\n"))
+                else if (!strcmp (buffer + 8, " A _end\n") || !strcmp (buffer + 16, " A _end\n"))
                         end = strtoul (buffer, NULL, 16);
         }
         fclose (map);
diff --git a/arch/sparc/boot/piggyback_64.c b/arch/sparc/boot/piggyback_64.c
index de364bfed0bb..c63fd1b6bdd4 100644
--- a/arch/sparc/boot/piggyback_64.c
+++ b/arch/sparc/boot/piggyback_64.c
@@ -46,6 +46,7 @@ int main(int argc,char **argv)
         struct stat s;
         int image, tail;
         
+        start = end = 0;
         if (stat (argv[3], &s) < 0) die (argv[3]);
         map = fopen (argv[2], "r");
         if (!map) die(argv[2]);
diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c
index bd075054942b..f0ee79055409 100644
--- a/arch/sparc/kernel/irq_64.c
+++ b/arch/sparc/kernel/irq_64.c
@@ -20,7 +20,6 @@
 #include <linux/delay.h>
 #include <linux/proc_fs.h>
 #include <linux/seq_file.h>
-#include <linux/bootmem.h>
 #include <linux/irq.h>
 
 #include <asm/ptrace.h>
@@ -914,25 +913,19 @@ void __cpuinit notrace sun4v_register_mondo_queues(int this_cpu)
                            tb->nonresum_qmask);
 }
 
-static void __init alloc_one_mondo(unsigned long *pa_ptr, unsigned long qmask)
-{
-        unsigned long size = PAGE_ALIGN(qmask + 1);
-        void *p = __alloc_bootmem(size, size, 0);
-        if (!p) {
-                prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
-                prom_halt();
-        }
-
-        *pa_ptr = __pa(p);
-}
-
-static void __init alloc_one_kbuf(unsigned long *pa_ptr, unsigned long qmask)
+/* Each queue region must be a power of 2 multiple of 64 bytes in
+ * size.  The base real address must be aligned to the size of the
+ * region.  Thus, an 8KB queue must be 8KB aligned, for example.
+ */
+static void __init alloc_one_queue(unsigned long *pa_ptr, unsigned long qmask)
 {
         unsigned long size = PAGE_ALIGN(qmask + 1);
-        void *p = __alloc_bootmem(size, size, 0);
+        unsigned long order = get_order(size);
+        unsigned long p;
 
+        p = __get_free_pages(GFP_KERNEL, order);
         if (!p) {
-                prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
+                prom_printf("SUN4V: Error, cannot allocate queue.\n");
                 prom_halt();
         }
 
@@ -942,11 +935,11 @@ static void __init alloc_one_kbuf(unsigned long *pa_ptr, unsigned long qmask)
 static void __init init_cpu_send_mondo_info(struct trap_per_cpu *tb)
 {
 #ifdef CONFIG_SMP
-        void *page;
+        unsigned long page;
 
         BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
 
-        page = alloc_bootmem_pages(PAGE_SIZE);
+        page = get_zeroed_page(GFP_KERNEL);
         if (!page) {
                 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
                 prom_halt();
@@ -965,13 +958,13 @@ static void __init sun4v_init_mondo_queues(void)
         for_each_possible_cpu(cpu) {
                 struct trap_per_cpu *tb = &trap_block[cpu];
 
-                alloc_one_mondo(&tb->cpu_mondo_pa, tb->cpu_mondo_qmask);
-                alloc_one_mondo(&tb->dev_mondo_pa, tb->dev_mondo_qmask);
-                alloc_one_mondo(&tb->resum_mondo_pa, tb->resum_qmask);
-                alloc_one_kbuf(&tb->resum_kernel_buf_pa, tb->resum_qmask);
-                alloc_one_mondo(&tb->nonresum_mondo_pa, tb->nonresum_qmask);
-                alloc_one_kbuf(&tb->nonresum_kernel_buf_pa,
-                               tb->nonresum_qmask);
+                alloc_one_queue(&tb->cpu_mondo_pa, tb->cpu_mondo_qmask);
+                alloc_one_queue(&tb->dev_mondo_pa, tb->dev_mondo_qmask);
+                alloc_one_queue(&tb->resum_mondo_pa, tb->resum_qmask);
+                alloc_one_queue(&tb->resum_kernel_buf_pa, tb->resum_qmask);
+                alloc_one_queue(&tb->nonresum_mondo_pa, tb->nonresum_qmask);
+                alloc_one_queue(&tb->nonresum_kernel_buf_pa,
+                                tb->nonresum_qmask);
         }
 }
 
@@ -999,7 +992,7 @@ void __init init_IRQ(void)
         kill_prom_timer();
 
         size = sizeof(struct ino_bucket) * NUM_IVECS;
-        ivector_table = alloc_bootmem(size);
+        ivector_table = kzalloc(size, GFP_KERNEL);
         if (!ivector_table) {
                 prom_printf("Fatal error, cannot allocate ivector_table\n");
                 prom_halt();
diff --git a/arch/um/drivers/slip_kern.c b/arch/um/drivers/slip_kern.c
index 5ec17563142e..dd2aadc14af0 100644
--- a/arch/um/drivers/slip_kern.c
+++ b/arch/um/drivers/slip_kern.c
@@ -30,7 +30,6 @@ static void slip_init(struct net_device *dev, void *data)
 
         slip_proto_init(&spri->slip);
 
-        dev->init = NULL;
         dev->hard_header_len = 0;
         dev->header_ops = NULL;
         dev->addr_len = 0;
diff --git a/arch/um/drivers/slirp_kern.c b/arch/um/drivers/slirp_kern.c
index f15a6e7654f3..e376284f0fb7 100644
--- a/arch/um/drivers/slirp_kern.c
+++ b/arch/um/drivers/slirp_kern.c
@@ -32,7 +32,6 @@ void slirp_init(struct net_device *dev, void *data)
 
         slip_proto_init(&spri->slip);
 
-        dev->init = NULL;
         dev->hard_header_len = 0;
         dev->header_ops = NULL;
         dev->addr_len = 0;
diff --git a/arch/um/include/asm/dma-mapping.h b/arch/um/include/asm/dma-mapping.h
index 90fc708b320e..378de4bbf49f 100644
--- a/arch/um/include/asm/dma-mapping.h
+++ b/arch/um/include/asm/dma-mapping.h
@@ -79,14 +79,14 @@ dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
 }
 
 static inline void
-dma_sync_single(struct device *dev, dma_addr_t dma_handle, size_t size,
+dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
                 enum dma_data_direction direction)
 {
         BUG();
 }
 
 static inline void
-dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems,
+dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
             enum dma_data_direction direction)
 {
         BUG();
diff --git a/arch/x86/include/asm/boot.h b/arch/x86/include/asm/boot.h
index 418e632d4a80..7a1065958ba9 100644
--- a/arch/x86/include/asm/boot.h
+++ b/arch/x86/include/asm/boot.h
@@ -8,7 +8,7 @@
 
 #ifdef __KERNEL__
 
-#include <asm/page_types.h>
+#include <asm/pgtable_types.h>
 
 /* Physical address where kernel should be loaded. */
 #define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \
@@ -16,10 +16,10 @@
                                 & ~(CONFIG_PHYSICAL_ALIGN - 1))
 
 /* Minimum kernel alignment, as a power of two */
-#ifdef CONFIG_x86_64
+#ifdef CONFIG_X86_64
 #define MIN_KERNEL_ALIGN_LG2    PMD_SHIFT
 #else
-#define MIN_KERNEL_ALIGN_LG2    (PAGE_SHIFT+1)
+#define MIN_KERNEL_ALIGN_LG2    (PAGE_SHIFT + THREAD_ORDER)
 #endif
 #define MIN_KERNEL_ALIGN        (_AC(1, UL) << MIN_KERNEL_ALIGN_LG2)
 
diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h
index 02ecb30982a3..103f1ddb0d85 100644
--- a/arch/x86/include/asm/percpu.h
+++ b/arch/x86/include/asm/percpu.h
@@ -42,6 +42,7 @@
 
 #else /* ...!ASSEMBLY */
 
+#include <linux/kernel.h>
 #include <linux/stringify.h>
 
 #ifdef CONFIG_SMP
@@ -155,6 +156,15 @@ do {							\
 /* We can use this directly for local CPU (faster). */
 DECLARE_PER_CPU(unsigned long, this_cpu_off);
 
+#ifdef CONFIG_NEED_MULTIPLE_NODES
+void *pcpu_lpage_remapped(void *kaddr);
+#else
+static inline void *pcpu_lpage_remapped(void *kaddr)
+{
+        return NULL;
+}
+#endif
+
 #endif /* !__ASSEMBLY__ */
 
 #ifdef CONFIG_SMP
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index e5b27d8f1b47..28e5f5956042 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -258,13 +258,15 @@ static void __cpuinit amd_detect_cmp(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_X86_HT
         unsigned bits;
+        int cpu = smp_processor_id();
 
         bits = c->x86_coreid_bits;
-
         /* Low order bits define the core id (index of core in socket) */
         c->cpu_core_id = c->initial_apicid & ((1 << bits)-1);
         /* Convert the initial APIC ID into the socket ID */
         c->phys_proc_id = c->initial_apicid >> bits;
+        /* use socket ID also for last level cache */
+        per_cpu(cpu_llc_id, cpu) = c->phys_proc_id;
 #endif
 }
 
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 284d1de968bc..af425b83202b 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1117,7 +1117,7 @@ static void mcheck_timer(unsigned long data)
                 *n = min(*n*2, (int)round_jiffies_relative(check_interval*HZ));
 
         t->expires = jiffies + *n;
-        add_timer(t);
+        add_timer_on(t, smp_processor_id());
 }
 
 static void mce_do_trigger(struct work_struct *work)
@@ -1321,7 +1321,7 @@ static void mce_init_timer(void)
                 return;
         setup_timer(t, mcheck_timer, smp_processor_id());
         t->expires = round_jiffies(jiffies + *n);
-        add_timer(t);
+        add_timer_on(t, smp_processor_id());
 }
 
 /*
diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c
index 95ea5fa7d444..c8405718a4c3 100644
--- a/arch/x86/kernel/dumpstack.c
+++ b/arch/x86/kernel/dumpstack.c
@@ -22,6 +22,7 @@
 #include "dumpstack.h"
 
 int panic_on_unrecovered_nmi;
+int panic_on_io_nmi;
 unsigned int code_bytes = 64;
 int kstack_depth_to_print = 3 * STACKSLOTS_PER_LINE;
 static int die_counter;
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index be5ae80f897f..de2cab132844 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -289,6 +289,20 @@ void * __init extend_brk(size_t size, size_t align)
         return ret;
 }
 
+#ifdef CONFIG_X86_64
+static void __init init_gbpages(void)
+{
+        if (direct_gbpages && cpu_has_gbpages)
+                printk(KERN_INFO "Using GB pages for direct mapping\n");
+        else
+                direct_gbpages = 0;
+}
+#else
+static inline void init_gbpages(void)
+{
+}
+#endif
+
 static void __init reserve_brk(void)
 {
         if (_brk_end > _brk_start)
@@ -871,6 +885,8 @@ void __init setup_arch(char **cmdline_p)
 
         reserve_brk();
 
+        init_gbpages();
+
         /* max_pfn_mapped is updated here */
         max_low_pfn_mapped = init_memory_mapping(0, max_low_pfn<<PAGE_SHIFT);
         max_pfn_mapped = max_low_pfn_mapped;
diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c
index 9c3f0823e6aa..29a3eef7cf4a 100644
--- a/arch/x86/kernel/setup_percpu.c
+++ b/arch/x86/kernel/setup_percpu.c
@@ -124,7 +124,7 @@ static void * __init pcpu_alloc_bootmem(unsigned int cpu, unsigned long size,
 }
 
 /*
- * Remap allocator
+ * Large page remap allocator
  *
  * This allocator uses PMD page as unit.  A PMD page is allocated for
  * each cpu and each is remapped into vmalloc area using PMD mapping.
@@ -137,105 +137,185 @@ static void * __init pcpu_alloc_bootmem(unsigned int cpu, unsigned long size,
  * better than only using 4k mappings while still being NUMA friendly.
  */
 #ifdef CONFIG_NEED_MULTIPLE_NODES
-static size_t pcpur_size __initdata;
-static void **pcpur_ptrs __initdata;
+struct pcpul_ent {
+        unsigned int    cpu;
+        void            *ptr;
+};
+
+static size_t pcpul_size;
+static struct pcpul_ent *pcpul_map;
+static struct vm_struct pcpul_vm;
 
-static struct page * __init pcpur_get_page(unsigned int cpu, int pageno)
+static struct page * __init pcpul_get_page(unsigned int cpu, int pageno)
 {
         size_t off = (size_t)pageno << PAGE_SHIFT;
 
-        if (off >= pcpur_size)
+        if (off >= pcpul_size)
                 return NULL;
 
-        return virt_to_page(pcpur_ptrs[cpu] + off);
+        return virt_to_page(pcpul_map[cpu].ptr + off);
 }
 
-static ssize_t __init setup_pcpu_remap(size_t static_size)
+static ssize_t __init setup_pcpu_lpage(size_t static_size, bool chosen)
 {
-        static struct vm_struct vm;
-        size_t ptrs_size, dyn_size;
+        size_t map_size, dyn_size;
         unsigned int cpu;
+        int i, j;
         ssize_t ret;
 
-        /*
-         * If large page isn't supported, there's no benefit in doing
-         * this.  Also, on non-NUMA, embedding is better.
-         *
-         * NOTE: disabled for now.
-         */
-        if (true || !cpu_has_pse || !pcpu_need_numa())
+        if (!chosen) {
+                size_t vm_size = VMALLOC_END - VMALLOC_START;
+                size_t tot_size = num_possible_cpus() * PMD_SIZE;
+
+                /* on non-NUMA, embedding is better */
+                if (!pcpu_need_numa())
+                        return -EINVAL;
+
+                /* don't consume more than 20% of vmalloc area */
+                if (tot_size > vm_size / 5) {
+                        pr_info("PERCPU: too large chunk size %zuMB for "
+                                "large page remap\n", tot_size >> 20);
+                        return -EINVAL;
+                }
+        }
+
+        /* need PSE */
+        if (!cpu_has_pse) {
+                pr_warning("PERCPU: lpage allocator requires PSE\n");
                 return -EINVAL;
+        }
 
         /*
          * Currently supports only single page.  Supporting multiple
          * pages won't be too difficult if it ever becomes necessary.
          */
-        pcpur_size = PFN_ALIGN(static_size + PERCPU_MODULE_RESERVE +
+        pcpul_size = PFN_ALIGN(static_size + PERCPU_MODULE_RESERVE +
                                PERCPU_DYNAMIC_RESERVE);
-        if (pcpur_size > PMD_SIZE) {
+        if (pcpul_size > PMD_SIZE) {
                 pr_warning("PERCPU: static data is larger than large page, "
                            "can't use large page\n");
                 return -EINVAL;
         }
-        dyn_size = pcpur_size - static_size - PERCPU_FIRST_CHUNK_RESERVE;
+        dyn_size = pcpul_size - static_size - PERCPU_FIRST_CHUNK_RESERVE;
 
         /* allocate pointer array and alloc large pages */
-        ptrs_size = PFN_ALIGN(num_possible_cpus() * sizeof(pcpur_ptrs[0]));
-        pcpur_ptrs = alloc_bootmem(ptrs_size);
+        map_size = PFN_ALIGN(num_possible_cpus() * sizeof(pcpul_map[0]));
+        pcpul_map = alloc_bootmem(map_size);
 
         for_each_possible_cpu(cpu) {
-                pcpur_ptrs[cpu] = pcpu_alloc_bootmem(cpu, PMD_SIZE, PMD_SIZE);
-                if (!pcpur_ptrs[cpu])
+                pcpul_map[cpu].cpu = cpu;
+                pcpul_map[cpu].ptr = pcpu_alloc_bootmem(cpu, PMD_SIZE,
+                                                        PMD_SIZE);
+                if (!pcpul_map[cpu].ptr) {
+                        pr_warning("PERCPU: failed to allocate large page "
+                                   "for cpu%u\n", cpu);
                         goto enomem;
+                }
 
                 /*
-                 * Only use pcpur_size bytes and give back the rest.
+                 * Only use pcpul_size bytes and give back the rest.
                  *
                  * Ingo: The 2MB up-rounding bootmem is needed to make
                  * sure the partial 2MB page is still fully RAM - it's
                  * not well-specified to have a PAT-incompatible area
                  * (unmapped RAM, device memory, etc.) in that hole.
                  */
-                free_bootmem(__pa(pcpur_ptrs[cpu] + pcpur_size),
-                             PMD_SIZE - pcpur_size);
+                free_bootmem(__pa(pcpul_map[cpu].ptr + pcpul_size),
+                             PMD_SIZE - pcpul_size);
 
-                memcpy(pcpur_ptrs[cpu], __per_cpu_load, static_size);
+                memcpy(pcpul_map[cpu].ptr, __per_cpu_load, static_size);
         }
 
         /* allocate address and map */
-        vm.flags = VM_ALLOC;
-        vm.size = num_possible_cpus() * PMD_SIZE;
-        vm_area_register_early(&vm, PMD_SIZE);
+        pcpul_vm.flags = VM_ALLOC;
+        pcpul_vm.size = num_possible_cpus() * PMD_SIZE;
+        vm_area_register_early(&pcpul_vm, PMD_SIZE);
 
         for_each_possible_cpu(cpu) {
-                pmd_t *pmd;
+                pmd_t *pmd, pmd_v;
 
-                pmd = populate_extra_pmd((unsigned long)vm.addr
-                                         + cpu * PMD_SIZE);
-                set_pmd(pmd, pfn_pmd(page_to_pfn(virt_to_page(pcpur_ptrs[cpu])),
-                                     PAGE_KERNEL_LARGE));
+                pmd = populate_extra_pmd((unsigned long)pcpul_vm.addr +
+                                         cpu * PMD_SIZE);
+                pmd_v = pfn_pmd(page_to_pfn(virt_to_page(pcpul_map[cpu].ptr)),
+                                PAGE_KERNEL_LARGE);
+                set_pmd(pmd, pmd_v);
         }
 
         /* we're ready, commit */
         pr_info("PERCPU: Remapped at %p with large pages, static data "
-                "%zu bytes\n", vm.addr, static_size);
+                "%zu bytes\n", pcpul_vm.addr, static_size);
 
-        ret = pcpu_setup_first_chunk(pcpur_get_page, static_size,
+        ret = pcpu_setup_first_chunk(pcpul_get_page, static_size,
                                      PERCPU_FIRST_CHUNK_RESERVE, dyn_size,
-                                     PMD_SIZE, vm.addr, NULL);
-        goto out_free_ar;
+                                     PMD_SIZE, pcpul_vm.addr, NULL);
+
+        /* sort pcpul_map array for pcpu_lpage_remapped() */
+        for (i = 0; i < num_possible_cpus() - 1; i++)
+                for (j = i + 1; j < num_possible_cpus(); j++)
+                        if (pcpul_map[i].ptr > pcpul_map[j].ptr) {
+                                struct pcpul_ent tmp = pcpul_map[i];
+                                pcpul_map[i] = pcpul_map[j];
+                                pcpul_map[j] = tmp;
+                        }
+
+        return ret;
 
 enomem:
         for_each_possible_cpu(cpu)
-                if (pcpur_ptrs[cpu])
-                        free_bootmem(__pa(pcpur_ptrs[cpu]), PMD_SIZE);
-        ret = -ENOMEM;
-out_free_ar:
-        free_bootmem(__pa(pcpur_ptrs), ptrs_size);
-        return ret;
+                if (pcpul_map[cpu].ptr)
+                        free_bootmem(__pa(pcpul_map[cpu].ptr), pcpul_size);
+        free_bootmem(__pa(pcpul_map), map_size);
+        return -ENOMEM;
+}
+
+/**
+ * pcpu_lpage_remapped - determine whether a kaddr is in pcpul recycled area
+ * @kaddr: the kernel address in question
+ *
+ * Determine whether @kaddr falls in the pcpul recycled area.  This is
+ * used by pageattr to detect VM aliases and break up the pcpu PMD
+ * mapping such that the same physical page is not mapped under
+ * different attributes.
+ *
+ * The recycled area is always at the tail of a partially used PMD
+ * page.
+ *
+ * RETURNS:
+ * Address of corresponding remapped pcpu address if match is found;
+ * otherwise, NULL.
+ */
+void *pcpu_lpage_remapped(void *kaddr)
+{
+        void *pmd_addr = (void *)((unsigned long)kaddr & PMD_MASK);
+        unsigned long offset = (unsigned long)kaddr & ~PMD_MASK;
+        int left = 0, right = num_possible_cpus() - 1;
+        int pos;
+
+        /* pcpul in use at all? */
+        if (!pcpul_map)
+                return NULL;
+
+        /* okay, perform binary search */
+        while (left <= right) {
+                pos = (left + right) / 2;
+
+                if (pcpul_map[pos].ptr < pmd_addr)
+                        left = pos + 1;
+                else if (pcpul_map[pos].ptr > pmd_addr)
+                        right = pos - 1;
+                else {
+                        /* it shouldn't be in the area for the first chunk */
+                        WARN_ON(offset < pcpul_size);
+
+                        return pcpul_vm.addr +
+                                pcpul_map[pos].cpu * PMD_SIZE + offset;
+                }
+        }
+
+        return NULL;
 }
 #else
-static ssize_t __init setup_pcpu_remap(size_t static_size)
+static ssize_t __init setup_pcpu_lpage(size_t static_size, bool chosen)
 {
         return -EINVAL;
 }
@@ -249,7 +329,7 @@ static ssize_t __init setup_pcpu_remap(size_t static_size)
  * mapping so that it can use PMD mapping without additional TLB
  * pressure.
  */
-static ssize_t __init setup_pcpu_embed(size_t static_size)
+static ssize_t __init setup_pcpu_embed(size_t static_size, bool chosen)
 {
         size_t reserve = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE;
 
@@ -258,7 +338,7 @@ static ssize_t __init setup_pcpu_embed(size_t static_size)
          * this.  Also, embedding allocation doesn't play well with
          * NUMA.
          */
-        if (!cpu_has_pse || pcpu_need_numa())
+        if (!chosen && (!cpu_has_pse || pcpu_need_numa()))
                 return -EINVAL;
 
         return pcpu_embed_first_chunk(static_size, PERCPU_FIRST_CHUNK_RESERVE,
@@ -308,8 +388,11 @@ static ssize_t __init setup_pcpu_4k(size_t static_size)
                         void *ptr;
 
                         ptr = pcpu_alloc_bootmem(cpu, PAGE_SIZE, PAGE_SIZE);
-                        if (!ptr)
+                        if (!ptr) {
+                                pr_warning("PERCPU: failed to allocate "
+                                           "4k page for cpu%u\n", cpu);
                                 goto enomem;
+                        }
 
                         memcpy(ptr, __per_cpu_load + i * PAGE_SIZE, PAGE_SIZE);
                         pcpu4k_pages[j++] = virt_to_page(ptr);
@@ -333,6 +416,16 @@ out_free_ar:
         return ret;
 }
 
+/* for explicit first chunk allocator selection */
+static char pcpu_chosen_alloc[16] __initdata;
+
+static int __init percpu_alloc_setup(char *str)
+{
+        strncpy(pcpu_chosen_alloc, str, sizeof(pcpu_chosen_alloc) - 1);
+        return 0;
+}
+early_param("percpu_alloc", percpu_alloc_setup);
+
 static inline void setup_percpu_segment(int cpu)
 {
 #ifdef CONFIG_X86_32
@@ -346,11 +439,6 @@ static inline void setup_percpu_segment(int cpu)
 #endif
 }
 
-/*
- * Great future plan:
- * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
- * Always point %gs to its beginning
- */
 void __init setup_per_cpu_areas(void)
 {
         size_t static_size = __per_cpu_end - __per_cpu_start;
@@ -367,9 +455,26 @@ void __init setup_per_cpu_areas(void)
          * of large page mappings.  Please read comments on top of
          * each allocator for details.
          */
-        ret = setup_pcpu_remap(static_size);
-        if (ret < 0)
-                ret = setup_pcpu_embed(static_size);
+        ret = -EINVAL;
+        if (strlen(pcpu_chosen_alloc)) {
+                if (strcmp(pcpu_chosen_alloc, "4k")) {
+                        if (!strcmp(pcpu_chosen_alloc, "lpage"))
+                                ret = setup_pcpu_lpage(static_size, true);
+                        else if (!strcmp(pcpu_chosen_alloc, "embed"))
+                                ret = setup_pcpu_embed(static_size, true);
+                        else
+                                pr_warning("PERCPU: unknown allocator %s "
+                                           "specified\n", pcpu_chosen_alloc);
+                        if (ret < 0)
+                                pr_warning("PERCPU: %s allocator failed (%zd), "
+                                           "falling back to 4k\n",
+                                           pcpu_chosen_alloc, ret);
+                }
+        } else {
+                ret = setup_pcpu_lpage(static_size, false);
+                if (ret < 0)
+                        ret = setup_pcpu_embed(static_size, false);
+        }
         if (ret < 0)
                 ret = setup_pcpu_4k(static_size);
         if (ret < 0)
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index 124d40c575df..8ccabb8a2f6a 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -711,7 +711,6 @@ uv_activation_descriptor_init(int node, int pnode)
         unsigned long pa;
         unsigned long m;
         unsigned long n;
-        unsigned long mmr_image;
         struct bau_desc *adp;
         struct bau_desc *ad2;
 
@@ -727,12 +726,8 @@ uv_activation_descriptor_init(int node, int pnode)
         n = pa >> uv_nshift;
         m = pa & uv_mmask;
 
-        mmr_image = uv_read_global_mmr64(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE);
-        if (mmr_image) {
-                uv_write_global_mmr64(pnode, (unsigned long)
-                                      UVH_LB_BAU_SB_DESCRIPTOR_BASE,
-                                      (n << UV_DESC_BASE_PNODE_SHIFT | m));
-        }
+        uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE,
+                              (n << UV_DESC_BASE_PNODE_SHIFT | m));
 
         /*
          * initializing all 8 (UV_ITEMS_PER_DESCRIPTOR) descriptors for each
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index a0f48f5671c0..5204332f475d 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -346,6 +346,9 @@ io_check_error(unsigned char reason, struct pt_regs *regs)
         printk(KERN_EMERG "NMI: IOCK error (debug interrupt?)\n");
         show_registers(regs);
 
+        if (panic_on_io_nmi)
+                panic("NMI IOCK error: Not continuing");
+
         /* Re-enable the IOCK line, wait for a few seconds */
         reason = (reason & 0xf) | 8;
         outb(reason, 0x61);
diff --git a/arch/x86/lib/delay.c b/arch/x86/lib/delay.c
index f4568605d7d5..ff485d361182 100644
--- a/arch/x86/lib/delay.c
+++ b/arch/x86/lib/delay.c
@@ -55,8 +55,10 @@ static void delay_tsc(unsigned long loops)
 
         preempt_disable();
         cpu = smp_processor_id();
+        rdtsc_barrier();
         rdtscl(bclock);
         for (;;) {
+                rdtsc_barrier();
                 rdtscl(now);
                 if ((now - bclock) >= loops)
                         break;
@@ -78,6 +80,7 @@ static void delay_tsc(unsigned long loops)
                 if (unlikely(cpu != smp_processor_id())) {
                         loops -= (now - bclock);
                         cpu = smp_processor_id();
+                        rdtsc_barrier();
                         rdtscl(bclock);
                 }
         }
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index f53b57e4086f..47ce9a2ce5e7 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -177,20 +177,6 @@ static int __meminit save_mr(struct map_range *mr, int nr_range,
         return nr_range;
 }
 
-#ifdef CONFIG_X86_64
-static void __init init_gbpages(void)
-{
-        if (direct_gbpages && cpu_has_gbpages)
-                printk(KERN_INFO "Using GB pages for direct mapping\n");
-        else
-                direct_gbpages = 0;
-}
-#else
-static inline void init_gbpages(void)
-{
-}
-#endif
-
 /*
  * Setup the direct mapping of the physical memory at PAGE_OFFSET.
  * This runs before bootmem is initialized and gets pages directly from
@@ -210,9 +196,6 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,
 
         printk(KERN_INFO "init_memory_mapping: %016lx-%016lx\n", start, end);
 
-        if (!after_bootmem)
-                init_gbpages();
-
 #if defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_KMEMCHECK)
         /*
          * For CONFIG_DEBUG_PAGEALLOC, identity mapping will use small pages.
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 3cfe9ced8a4c..1b734d7a8966 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -11,6 +11,7 @@
 #include <linux/interrupt.h>
 #include <linux/seq_file.h>
 #include <linux/debugfs.h>
+#include <linux/pfn.h>
 
 #include <asm/e820.h>
 #include <asm/processor.h>
@@ -681,8 +682,9 @@ static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
 static int cpa_process_alias(struct cpa_data *cpa)
 {
         struct cpa_data alias_cpa;
-        int ret = 0;
-        unsigned long temp_cpa_vaddr, vaddr;
+        unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
+        unsigned long vaddr, remapped;
+        int ret;
 
         if (cpa->pfn >= max_pfn_mapped)
                 return 0;
@@ -706,42 +708,55 @@ static int cpa_process_alias(struct cpa_data *cpa)
                     PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
 
                 alias_cpa = *cpa;
-                temp_cpa_vaddr = (unsigned long) __va(cpa->pfn << PAGE_SHIFT);
-                alias_cpa.vaddr = &temp_cpa_vaddr;
+                alias_cpa.vaddr = &laddr;
                 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
 
-
                 ret = __change_page_attr_set_clr(&alias_cpa, 0);
+                if (ret)
+                        return ret;
         }
 
 #ifdef CONFIG_X86_64
-        if (ret)
-                return ret;
         /*
-         * No need to redo, when the primary call touched the high
-         * mapping already:
-         */
-        if (within(vaddr, (unsigned long) _text, _brk_end))
-                return 0;
-
-        /*
-         * If the physical address is inside the kernel map, we need
+         * If the primary call didn't touch the high mapping already
+         * and the physical address is inside the kernel map, we need
          * to touch the high mapped kernel as well:
          */
-        if (!within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn()))
-                return 0;
+        if (!within(vaddr, (unsigned long)_text, _brk_end) &&
+            within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
+                unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
+                                               __START_KERNEL_map - phys_base;
+                alias_cpa = *cpa;
+                alias_cpa.vaddr = &temp_cpa_vaddr;
+                alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
 
-        alias_cpa = *cpa;
-        temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) + __START_KERNEL_map - phys_base;
-        alias_cpa.vaddr = &temp_cpa_vaddr;
-        alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
+                /*
+                 * The high mapping range is imprecise, so ignore the
+                 * return value.
+                 */
+                __change_page_attr_set_clr(&alias_cpa, 0);
+        }
+#endif
 
         /*
-         * The high mapping range is imprecise, so ignore the return value.
+         * If the PMD page was partially used for per-cpu remapping,
+         * the recycled area needs to be split and modified.  Because
+         * the area is always proper subset of a PMD page
+         * cpa->numpages is guaranteed to be 1 for these areas, so
+         * there's no need to loop over and check for further remaps.
          */
-        __change_page_attr_set_clr(&alias_cpa, 0);
-#endif
-        return ret;
+        remapped = (unsigned long)pcpu_lpage_remapped((void *)laddr);
+        if (remapped) {
+                WARN_ON(cpa->numpages > 1);
+                alias_cpa = *cpa;
+                alias_cpa.vaddr = &remapped;
+                alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
+                ret = __change_page_attr_set_clr(&alias_cpa, 0);
+                if (ret)
+                        return ret;
+        }
+
+        return 0;
 }
 
 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c
index d277ef1eea51..b3d20b9cac63 100644
--- a/arch/x86/power/cpu.c
+++ b/arch/x86/power/cpu.c
@@ -244,7 +244,7 @@ static void __restore_processor_state(struct saved_context *ctxt)
         do_fpu_end();
         mtrr_ap_init();
 
-#ifdef CONFIG_X86_32
+#ifdef CONFIG_X86_OLD_MCE
         mcheck_init(&boot_cpu_data);
 #endif
 }
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 8a5bf3b356fa..55b5b90c2a44 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -395,7 +395,7 @@ struct pci_dev *acpi_get_pci_dev(acpi_handle handle)
                 fn  = adr & 0xffff;
 
                 pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn));
-                if (hnd == handle)
+                if (!pdev || hnd == handle)
                         break;
 
                 pbus = pdev->subordinate;
diff --git a/drivers/char/bsr.c b/drivers/char/bsr.c
index 140ea10ecb88..c02db01f736e 100644
--- a/drivers/char/bsr.c
+++ b/drivers/char/bsr.c
@@ -27,6 +27,7 @@
 #include <linux/cdev.h>
 #include <linux/list.h>
 #include <linux/mm.h>
+#include <asm/pgtable.h>
 #include <asm/io.h>
 
 /*
@@ -75,12 +76,13 @@ static struct class *bsr_class;
 static int bsr_major;
 
 enum {
-        BSR_8   = 0,
-        BSR_16  = 1,
-        BSR_64  = 2,
-        BSR_128 = 3,
-        BSR_UNKNOWN = 4,
-        BSR_MAX = 5,
+        BSR_8    = 0,
+        BSR_16   = 1,
+        BSR_64   = 2,
+        BSR_128  = 3,
+        BSR_4096 = 4,
+        BSR_UNKNOWN = 5,
+        BSR_MAX  = 6,
 };
 
 static unsigned bsr_types[BSR_MAX];
@@ -117,15 +119,22 @@ static int bsr_mmap(struct file *filp, struct vm_area_struct *vma)
 {
         unsigned long size   = vma->vm_end - vma->vm_start;
         struct bsr_dev *dev = filp->private_data;
+        int ret;
 
-        if (size > dev->bsr_len || (size & (PAGE_SIZE-1)))
-                return -EINVAL;
-
-        vma->vm_flags |= (VM_IO | VM_DONTEXPAND);
         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 
-        if (io_remap_pfn_range(vma, vma->vm_start, dev->bsr_addr >> PAGE_SHIFT,
-                               size, vma->vm_page_prot))
+        /* check for the case of a small BSR device and map one 4k page for it*/
+        if (dev->bsr_len < PAGE_SIZE && size == PAGE_SIZE)
+                ret = remap_4k_pfn(vma, vma->vm_start, dev->bsr_addr >> 12,
+                                   vma->vm_page_prot);
+        else if (size <= dev->bsr_len)
+                ret = io_remap_pfn_range(vma, vma->vm_start,
+                                         dev->bsr_addr >> PAGE_SHIFT,
+                                         size, vma->vm_page_prot);
+        else
+                return -EINVAL;
+
+        if (ret)
                 return -EAGAIN;
 
         return 0;
@@ -205,6 +214,11 @@ static int bsr_add_node(struct device_node *bn)
                 cur->bsr_stride = bsr_stride[i];
                 cur->bsr_dev    = MKDEV(bsr_major, i + total_bsr_devs);
 
+                /* if we have a bsr_len of > 4k and less then PAGE_SIZE (64k pages) */
+                /* we can only map 4k of it, so only advertise the 4k in sysfs */
+                if (cur->bsr_len > 4096 && cur->bsr_len < PAGE_SIZE)
+                        cur->bsr_len = 4096;
+
                 switch(cur->bsr_bytes) {
                 case 8:
                         cur->bsr_type = BSR_8;
@@ -218,9 +232,11 @@ static int bsr_add_node(struct device_node *bn)
                 case 128:
                         cur->bsr_type = BSR_128;
                         break;
+                case 4096:
+                        cur->bsr_type = BSR_4096;
+                        break;
                 default:
                         cur->bsr_type = BSR_UNKNOWN;
-                        printk(KERN_INFO "unknown BSR size %d\n",cur->bsr_bytes);
                 }
 
                 cur->bsr_num = bsr_types[cur->bsr_type];
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index c36bf40568cf..858fe6037223 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -754,13 +754,13 @@ static void amd64_cpu_display_info(struct amd64_pvt *pvt)
 static enum edac_type amd64_determine_edac_cap(struct amd64_pvt *pvt)
 {
         int bit;
-        enum dev_type edac_cap = EDAC_NONE;
+        enum dev_type edac_cap = EDAC_FLAG_NONE;
 
         bit = (boot_cpu_data.x86 > 0xf || pvt->ext_model >= OPTERON_CPU_REV_F)
                 ? 19
                 : 17;
 
-        if (pvt->dclr0 >> BIT(bit))
+        if (pvt->dclr0 & BIT(bit))
                 edac_cap = EDAC_FLAG_SECDED;
 
         return edac_cap;
@@ -1269,7 +1269,7 @@ static int f10_early_channel_count(struct amd64_pvt *pvt)
         if (channels == 0)
                 channels = 1;
 
-        debugf0("DIMM count= %d\n", channels);
+        debugf0("MCT channel count: %d\n", channels);
 
         return channels;
 
@@ -2966,7 +2966,12 @@ static int amd64_check_ecc_enabled(struct amd64_pvt *pvt)
                                 "    Use of the override can cause "
                                 "unknown side effects.\n");
                         ret = -ENODEV;
-                }
+                } else
+                        /*
+                         * enable further driver loading if ECC enable is
+                         * overridden.
+                         */
+                        ret = 0;
         } else {
                 amd64_printk(KERN_INFO,
                         "ECC is enabled by BIOS, Proceeding "
@@ -3006,7 +3011,6 @@ static void amd64_setup_mci_misc_attributes(struct mem_ctl_info *mci)
 
         mci->mtype_cap          = MEM_FLAG_DDR2 | MEM_FLAG_RDDR2;
         mci->edac_ctl_cap       = EDAC_FLAG_NONE;
-        mci->edac_cap           = EDAC_FLAG_NONE;
 
         if (pvt->nbcap & K8_NBCAP_SECDED)
                 mci->edac_ctl_cap |= EDAC_FLAG_SECDED;
@@ -3052,7 +3056,7 @@ static int amd64_probe_one_instance(struct pci_dev *dram_f2_ctl,
         if (!pvt)
                 goto err_exit;
 
-        pvt->mc_node_id = get_mc_node_id_from_pdev(dram_f2_ctl);
+        pvt->mc_node_id = get_node_id(dram_f2_ctl);
 
         pvt->dram_f2_ctl        = dram_f2_ctl;
         pvt->ext_model          = boot_cpu_data.x86_model >> 4;
@@ -3179,8 +3183,7 @@ static int __devinit amd64_init_one_instance(struct pci_dev *pdev,
 {
         int ret = 0;
 
-        debugf0("(MC node=%d,mc_type='%s')\n",
-                get_mc_node_id_from_pdev(pdev),
+        debugf0("(MC node=%d,mc_type='%s')\n", get_node_id(pdev),
                 get_amd_family_name(mc_type->driver_data));
 
         ret = pci_enable_device(pdev);
@@ -3319,15 +3322,17 @@ static int __init amd64_edac_init(void)
 
                 err = amd64_init_2nd_stage(pvt_lookup[nb]);
                 if (err)
-                        goto err_exit;
+                        goto err_2nd_stage;
         }
 
         amd64_setup_pci_device();
 
         return 0;
 
+err_2nd_stage:
+        debugf0("2nd stage failed\n");
+
 err_exit:
-        debugf0("'finish_setup' stage failed\n");
         pci_unregister_driver(&amd64_pci_driver);
 
         return err;
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index a159957e167b..ba73015af8e4 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -444,7 +444,7 @@ enum {
 #define K8_MSR_MC4ADDR                  0x0412
 
 /* AMD sets the first MC device at device ID 0x18. */
-static inline int get_mc_node_id_from_pdev(struct pci_dev *pdev)
+static inline int get_node_id(struct pci_dev *pdev)
 {
         return PCI_SLOT(pdev->devfn) - 0x18;
 }
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index c961fe415aef..39b393d38bb3 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -81,6 +81,7 @@ config DRM_I830
 
 config DRM_I915
         tristate "i915 driver"
+        depends on AGP_INTEL
         select FB_CFB_FILLRECT
         select FB_CFB_COPYAREA
         select FB_CFB_IMAGEBLIT
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 4e89ab08b7b8..fe23f29f7cba 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -16,6 +16,7 @@ drm-y       :=	drm_auth.o drm_bufs.o drm_cache.o \
 drm-$(CONFIG_COMPAT) += drm_ioc32.o
 
 obj-$(CONFIG_DRM)       += drm.o
+obj-$(CONFIG_DRM_TTM)   += ttm/
 obj-$(CONFIG_DRM_TDFX)  += tdfx/
 obj-$(CONFIG_DRM_R128)  += r128/
 obj-$(CONFIG_DRM_RADEON)+= radeon/
@@ -26,4 +27,3 @@ obj-$(CONFIG_DRM_I915)  += i915/
 obj-$(CONFIG_DRM_SIS)   += sis/
 obj-$(CONFIG_DRM_SAVAGE)+= savage/
 obj-$(CONFIG_DRM_VIA)   +=via/
-obj-$(CONFIG_DRM_TTM)   += ttm/
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 7d0835226f6e..80cc6d06d61b 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -294,10 +294,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
         unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
         unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
         unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
-        unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 8 | pt->hsync_offset_lo;
-        unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 6 | pt->hsync_pulse_width_lo;
-        unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) | (pt->vsync_offset_pulse_width_lo & 0xf);
-        unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
+        unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
+        unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
+        unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
+        unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
 
         /* ignore tiny modes */
         if (hactive < 64 || vactive < 64)
@@ -347,8 +347,8 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
         mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
                 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
 
-        mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
-        mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
+        mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
+        mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
 
         if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
                 mode->width_mm *= 10;
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 51c5a050aa73..30d6b99fb302 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -13,6 +13,8 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \
           intel_crt.o \
           intel_lvds.o \
           intel_bios.o \
+          intel_dp.o \
+          intel_dp_i2c.o \
           intel_hdmi.o \
           intel_sdvo.o \
           intel_modes.o \
diff --git a/drivers/gpu/drm/i915/dvo.h b/drivers/gpu/drm/i915/dvo.h
index e747ac42fe3a..288fc50627e2 100644
--- a/drivers/gpu/drm/i915/dvo.h
+++ b/drivers/gpu/drm/i915/dvo.h
@@ -37,7 +37,7 @@ struct intel_dvo_device {
         /* GPIO register used for i2c bus to control this device */
         u32 gpio;
         int slave_addr;
-        struct intel_i2c_chan *i2c_bus;
+        struct i2c_adapter *i2c_bus;
 
         const struct intel_dvo_dev_ops *dev_ops;
         void *dev_priv;
@@ -52,7 +52,7 @@ struct intel_dvo_dev_ops {
          * Returns NULL if the device does not exist.
          */
         bool (*init)(struct intel_dvo_device *dvo,
-                     struct intel_i2c_chan *i2cbus);
+                     struct i2c_adapter *i2cbus);
 
         /*
          * Called to allow the output a chance to create properties after the
diff --git a/drivers/gpu/drm/i915/dvo_ch7017.c b/drivers/gpu/drm/i915/dvo_ch7017.c
index 03d4b4973b02..621815b531db 100644
--- a/drivers/gpu/drm/i915/dvo_ch7017.c
+++ b/drivers/gpu/drm/i915/dvo_ch7017.c
@@ -176,19 +176,20 @@ static void ch7017_dpms(struct intel_dvo_device *dvo, int mode);
 
 static bool ch7017_read(struct intel_dvo_device *dvo, int addr, uint8_t *val)
 {
-        struct intel_i2c_chan *i2cbus = dvo->i2c_bus;
+        struct i2c_adapter *adapter = dvo->i2c_bus;
+        struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
         u8 out_buf[2];
         u8 in_buf[2];
 
         struct i2c_msg msgs[] = {
                 {
-                        .addr = i2cbus->slave_addr,
+                        .addr = dvo->slave_addr,
                         .flags = 0,
                         .len = 1,
                         .buf = out_buf,
                 },
                 {
-                        .addr = i2cbus->slave_addr,
+                        .addr = dvo->slave_addr,
                         .flags = I2C_M_RD,
                         .len = 1,
                         .buf = in_buf,
@@ -208,10 +209,11 @@ static bool ch7017_read(struct intel_dvo_device *dvo, int addr, uint8_t *val)
 
 static bool ch7017_write(struct intel_dvo_device *dvo, int addr, uint8_t val)
 {
-        struct intel_i2c_chan *i2cbus = dvo->i2c_bus;
+        struct i2c_adapter *adapter = dvo->i2c_bus;
+        struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
         uint8_t out_buf[2];
         struct i2c_msg msg = {
-                .addr = i2cbus->slave_addr,
+                .addr = dvo->slave_addr,
                 .flags = 0,
                 .len = 2,
                 .buf = out_buf,
@@ -228,8 +230,9 @@ static bool ch7017_write(struct intel_dvo_device *dvo, int addr, uint8_t val)
 
 /** Probes for a CH7017 on the given bus and slave address. */
 static bool ch7017_init(struct intel_dvo_device *dvo,
-                        struct intel_i2c_chan *i2cbus)
+                        struct i2c_adapter *adapter)
 {
+        struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
         struct ch7017_priv *priv;
         uint8_t val;
 
@@ -237,8 +240,7 @@ static bool ch7017_init(struct intel_dvo_device *dvo,
         if (priv == NULL)
                 return false;
 
-        dvo->i2c_bus = i2cbus;
-        dvo->i2c_bus->slave_addr = dvo->slave_addr;
+        dvo->i2c_bus = adapter;
         dvo->dev_priv = priv;
 
         if (!ch7017_read(dvo, CH7017_DEVICE_ID, &val))
@@ -248,7 +250,7 @@ static bool ch7017_init(struct intel_dvo_device *dvo,
             val != CH7018_DEVICE_ID_VALUE &&
             val != CH7019_DEVICE_ID_VALUE) {
                 DRM_DEBUG("ch701x not detected, got %d: from %s Slave %d.\n",
-                          val, i2cbus->adapter.name,i2cbus->slave_addr);
+                          val, i2cbus->adapter.name,dvo->slave_addr);
                 goto fail;
         }
 
diff --git a/drivers/gpu/drm/i915/dvo_ch7xxx.c b/drivers/gpu/drm/i915/dvo_ch7xxx.c
index d2fd95dbd034..a9b896289680 100644
--- a/drivers/gpu/drm/i915/dvo_ch7xxx.c
+++ b/drivers/gpu/drm/i915/dvo_ch7xxx.c
@@ -123,19 +123,20 @@ static char *ch7xxx_get_id(uint8_t vid)
 static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
 {
         struct ch7xxx_priv *ch7xxx= dvo->dev_priv;
-        struct intel_i2c_chan *i2cbus = dvo->i2c_bus;
+        struct i2c_adapter *adapter = dvo->i2c_bus;
+        struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
         u8 out_buf[2];
         u8 in_buf[2];
 
         struct i2c_msg msgs[] = {
                 {
-                        .addr = i2cbus->slave_addr,
+                        .addr = dvo->slave_addr,
                         .flags = 0,
                         .len = 1,
                         .buf = out_buf,
                 },
                 {
-                        .addr = i2cbus->slave_addr,
+                        .addr = dvo->slave_addr,
                         .flags = I2C_M_RD,
                         .len = 1,
                         .buf = in_buf,
@@ -152,7 +153,7 @@ static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
 
         if (!ch7xxx->quiet) {
                 DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
-                          addr, i2cbus->adapter.name, i2cbus->slave_addr);
+                          addr, i2cbus->adapter.name, dvo->slave_addr);
         }
         return false;
 }
@@ -161,10 +162,11 @@ static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
 static bool ch7xxx_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
 {
         struct ch7xxx_priv *ch7xxx = dvo->dev_priv;
-        struct intel_i2c_chan *i2cbus = dvo->i2c_bus;
+        struct i2c_adapter *adapter = dvo->i2c_bus;
+        struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
         uint8_t out_buf[2];
         struct i2c_msg msg = {
-                .addr = i2cbus->slave_addr,
+                .addr = dvo->slave_addr,
                 .flags = 0,
                 .len = 2,
                 .buf = out_buf,
@@ -178,14 +180,14 @@ static bool ch7xxx_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
 
         if (!ch7xxx->quiet) {
                 DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
-                          addr, i2cbus->adapter.name, i2cbus->slave_addr);
+                          addr, i2cbus->adapter.name, dvo->slave_addr);
         }
 
         return false;
 }
 
 static bool ch7xxx_init(struct intel_dvo_device *dvo,
-                        struct intel_i2c_chan *i2cbus)
+                        struct i2c_adapter *adapter)
 {
         /* this will detect the CH7xxx chip on the specified i2c bus */
         struct ch7xxx_priv *ch7xxx;
@@ -196,8 +198,7 @@ static bool ch7xxx_init(struct intel_dvo_device *dvo,
         if (ch7xxx == NULL)
                 return false;
 
-        dvo->i2c_bus = i2cbus;
-        dvo->i2c_bus->slave_addr = dvo->slave_addr;
+        dvo->i2c_bus = adapter;
         dvo->dev_priv = ch7xxx;
         ch7xxx->quiet = true;
 
@@ -207,7 +208,7 @@ static bool ch7xxx_init(struct intel_dvo_device *dvo,
         name = ch7xxx_get_id(vendor);
         if (!name) {
                 DRM_DEBUG("ch7xxx not detected; got 0x%02x from %s slave %d.\n",
-                          vendor, i2cbus->adapter.name, i2cbus->slave_addr);
+                          vendor, adapter->name, dvo->slave_addr);
                 goto out;
         }
 
@@ -217,7 +218,7 @@ static bool ch7xxx_init(struct intel_dvo_device *dvo,
 
         if (device != CH7xxx_DID) {
                 DRM_DEBUG("ch7xxx not detected; got 0x%02x from %s slave %d.\n",
-                          vendor, i2cbus->adapter.name, i2cbus->slave_addr);
+                          vendor, adapter->name, dvo->slave_addr);
                 goto out;
         }
 
diff --git a/drivers/gpu/drm/i915/dvo_ivch.c b/drivers/gpu/drm/i915/dvo_ivch.c
index 0c8d375e8e37..aa176f9921fe 100644
--- a/drivers/gpu/drm/i915/dvo_ivch.c
+++ b/drivers/gpu/drm/i915/dvo_ivch.c
@@ -169,13 +169,14 @@ static void ivch_dump_regs(struct intel_dvo_device *dvo);
 static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
 {
         struct ivch_priv *priv = dvo->dev_priv;
-        struct intel_i2c_chan *i2cbus = dvo->i2c_bus;
+        struct i2c_adapter *adapter = dvo->i2c_bus;
+        struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
         u8 out_buf[1];
         u8 in_buf[2];
 
         struct i2c_msg msgs[] = {
                 {
-                        .addr = i2cbus->slave_addr,
+                        .addr = dvo->slave_addr,
                         .flags = I2C_M_RD,
                         .len = 0,
                 },
@@ -186,7 +187,7 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
                         .buf = out_buf,
                 },
                 {
-                        .addr = i2cbus->slave_addr,
+                        .addr = dvo->slave_addr,
                         .flags = I2C_M_RD | I2C_M_NOSTART,
                         .len = 2,
                         .buf = in_buf,
@@ -202,7 +203,7 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
 
         if (!priv->quiet) {
                 DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
-                          addr, i2cbus->adapter.name, i2cbus->slave_addr);
+                          addr, i2cbus->adapter.name, dvo->slave_addr);
         }
         return false;
 }
@@ -211,10 +212,11 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
 static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
 {
         struct ivch_priv *priv = dvo->dev_priv;
-        struct intel_i2c_chan *i2cbus = dvo->i2c_bus;
+        struct i2c_adapter *adapter = dvo->i2c_bus;
+        struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
         u8 out_buf[3];
         struct i2c_msg msg = {
-                .addr = i2cbus->slave_addr,
+                .addr = dvo->slave_addr,
                 .flags = 0,
                 .len = 3,
                 .buf = out_buf,
@@ -229,7 +231,7 @@ static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
 
         if (!priv->quiet) {
                 DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
-                          addr, i2cbus->adapter.name, i2cbus->slave_addr);
+                          addr, i2cbus->adapter.name, dvo->slave_addr);
         }
 
         return false;
@@ -237,7 +239,7 @@ static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
 
 /** Probes the given bus and slave address for an ivch */
 static bool ivch_init(struct intel_dvo_device *dvo,
-                      struct intel_i2c_chan *i2cbus)
+                      struct i2c_adapter *adapter)
 {
         struct ivch_priv *priv;
         uint16_t temp;
@@ -246,8 +248,7 @@ static bool ivch_init(struct intel_dvo_device *dvo,
         if (priv == NULL)
                 return false;
 
-        dvo->i2c_bus = i2cbus;
-        dvo->i2c_bus->slave_addr = dvo->slave_addr;
+        dvo->i2c_bus = adapter;
         dvo->dev_priv = priv;
         priv->quiet = true;
 
diff --git a/drivers/gpu/drm/i915/dvo_sil164.c b/drivers/gpu/drm/i915/dvo_sil164.c
index 033a4bb070b2..e1c1f7341e5c 100644
--- a/drivers/gpu/drm/i915/dvo_sil164.c
+++ b/drivers/gpu/drm/i915/dvo_sil164.c
@@ -76,19 +76,20 @@ struct sil164_priv {
 static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
 {
         struct sil164_priv *sil = dvo->dev_priv;
-        struct intel_i2c_chan *i2cbus = dvo->i2c_bus;
+        struct i2c_adapter *adapter = dvo->i2c_bus;
+        struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
         u8 out_buf[2];
         u8 in_buf[2];
 
         struct i2c_msg msgs[] = {
                 {
-                        .addr = i2cbus->slave_addr,
+                        .addr = dvo->slave_addr,
                         .flags = 0,
                         .len = 1,
                         .buf = out_buf,
                 },
                 {
-                        .addr = i2cbus->slave_addr,
+                        .addr = dvo->slave_addr,
                         .flags = I2C_M_RD,
                         .len = 1,
                         .buf = in_buf,
@@ -105,7 +106,7 @@ static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
 
         if (!sil->quiet) {
                 DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
-                          addr, i2cbus->adapter.name, i2cbus->slave_addr);
+                          addr, i2cbus->adapter.name, dvo->slave_addr);
         }
         return false;
 }
@@ -113,10 +114,11 @@ static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
 static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
 {
         struct sil164_priv *sil= dvo->dev_priv;
-        struct intel_i2c_chan *i2cbus = dvo->i2c_bus;
+        struct i2c_adapter *adapter = dvo->i2c_bus;
+        struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
         uint8_t out_buf[2];
         struct i2c_msg msg = {
-                .addr = i2cbus->slave_addr,
+                .addr = dvo->slave_addr,
                 .flags = 0,
                 .len = 2,
                 .buf = out_buf,
@@ -130,7 +132,7 @@ static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
 
         if (!sil->quiet) {
                 DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
-                          addr, i2cbus->adapter.name, i2cbus->slave_addr);
+                          addr, i2cbus->adapter.name, dvo->slave_addr);
         }
 
         return false;
@@ -138,7 +140,7 @@ static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
 
 /* Silicon Image 164 driver for chip on i2c bus */
 static bool sil164_init(struct intel_dvo_device *dvo,
-                        struct intel_i2c_chan *i2cbus)
+                        struct i2c_adapter *adapter)
 {
         /* this will detect the SIL164 chip on the specified i2c bus */
         struct sil164_priv *sil;
@@ -148,8 +150,7 @@ static bool sil164_init(struct intel_dvo_device *dvo,
         if (sil == NULL)
                 return false;
 
-        dvo->i2c_bus = i2cbus;
-        dvo->i2c_bus->slave_addr = dvo->slave_addr;
+        dvo->i2c_bus = adapter;
         dvo->dev_priv = sil;
         sil->quiet = true;
 
@@ -158,7 +159,7 @@ static bool sil164_init(struct intel_dvo_device *dvo,
 
         if (ch != (SIL164_VID & 0xff)) {
                 DRM_DEBUG("sil164 not detected got %d: from %s Slave %d.\n",
-                          ch, i2cbus->adapter.name, i2cbus->slave_addr);
+                          ch, adapter->name, dvo->slave_addr);
                 goto out;
         }
 
@@ -167,7 +168,7 @@ static bool sil164_init(struct intel_dvo_device *dvo,
 
         if (ch != (SIL164_DID & 0xff)) {
                 DRM_DEBUG("sil164 not detected got %d: from %s Slave %d.\n",
-                          ch, i2cbus->adapter.name, i2cbus->slave_addr);
+                          ch, adapter->name, dvo->slave_addr);
                 goto out;
         }
         sil->quiet = false;
diff --git a/drivers/gpu/drm/i915/dvo_tfp410.c b/drivers/gpu/drm/i915/dvo_tfp410.c
index 207fda806ebf..9ecc907384ec 100644
--- a/drivers/gpu/drm/i915/dvo_tfp410.c
+++ b/drivers/gpu/drm/i915/dvo_tfp410.c
@@ -101,19 +101,20 @@ struct tfp410_priv {
 static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
 {
         struct tfp410_priv *tfp = dvo->dev_priv;
-        struct intel_i2c_chan *i2cbus = dvo->i2c_bus;
+        struct i2c_adapter *adapter = dvo->i2c_bus;
+        struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
         u8 out_buf[2];
         u8 in_buf[2];
 
         struct i2c_msg msgs[] = {
                 {
-                        .addr = i2cbus->slave_addr,
+                        .addr = dvo->slave_addr,
                         .flags = 0,
                         .len = 1,
                         .buf = out_buf,
                 },
                 {
-                        .addr = i2cbus->slave_addr,
+                        .addr = dvo->slave_addr,
                         .flags = I2C_M_RD,
                         .len = 1,
                         .buf = in_buf,
@@ -130,7 +131,7 @@ static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
 
         if (!tfp->quiet) {
                 DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
-                          addr, i2cbus->adapter.name, i2cbus->slave_addr);
+                          addr, i2cbus->adapter.name, dvo->slave_addr);
         }
         return false;
 }
@@ -138,10 +139,11 @@ static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
 static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
 {
         struct tfp410_priv *tfp = dvo->dev_priv;
-        struct intel_i2c_chan *i2cbus = dvo->i2c_bus;
+        struct i2c_adapter *adapter = dvo->i2c_bus;
+        struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
         uint8_t out_buf[2];
         struct i2c_msg msg = {
-                .addr = i2cbus->slave_addr,
+                .addr = dvo->slave_addr,
                 .flags = 0,
                 .len = 2,
                 .buf = out_buf,
@@ -155,7 +157,7 @@ static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
 
         if (!tfp->quiet) {
                 DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
-                          addr, i2cbus->adapter.name, i2cbus->slave_addr);
+                          addr, i2cbus->adapter.name, dvo->slave_addr);
         }
 
         return false;
@@ -174,7 +176,7 @@ static int tfp410_getid(struct intel_dvo_device *dvo, int addr)
 
 /* Ti TFP410 driver for chip on i2c bus */
 static bool tfp410_init(struct intel_dvo_device *dvo,
-                        struct intel_i2c_chan *i2cbus)
+                        struct i2c_adapter *adapter)
 {
         /* this will detect the tfp410 chip on the specified i2c bus */
         struct tfp410_priv *tfp;
@@ -184,20 +186,19 @@ static bool tfp410_init(struct intel_dvo_device *dvo,
         if (tfp == NULL)
                 return false;
 
-        dvo->i2c_bus = i2cbus;
-        dvo->i2c_bus->slave_addr = dvo->slave_addr;
+        dvo->i2c_bus = adapter;
         dvo->dev_priv = tfp;
         tfp->quiet = true;
 
         if ((id = tfp410_getid(dvo, TFP410_VID_LO)) != TFP410_VID) {
                 DRM_DEBUG("tfp410 not detected got VID %X: from %s Slave %d.\n",
-                          id, i2cbus->adapter.name, i2cbus->slave_addr);
+                          id, adapter->name, dvo->slave_addr);
                 goto out;
         }
 
         if ((id = tfp410_getid(dvo, TFP410_DID_LO)) != TFP410_DID) {
                 DRM_DEBUG("tfp410 not detected got DID %X: from %s Slave %d.\n",
-                          id, i2cbus->adapter.name, i2cbus->slave_addr);
+                          id, adapter->name, dvo->slave_addr);
                 goto out;
         }
         tfp->quiet = false;
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 98560e1e899a..e3cb4025e323 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -67,8 +67,6 @@ static int i915_suspend(struct drm_device *dev, pm_message_t state)
 
         pci_save_state(dev->pdev);
 
-        i915_save_state(dev);
-
         /* If KMS is active, we do the leavevt stuff here */
         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
                 if (i915_gem_idle(dev))
@@ -77,6 +75,8 @@ static int i915_suspend(struct drm_device *dev, pm_message_t state)
                 drm_irq_uninstall(dev);
         }
 
+        i915_save_state(dev);
+
         intel_opregion_free(dev, 1);
 
         if (state.event == PM_EVENT_SUSPEND) {
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7a84f04e8439..bb4c2d387b6c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -306,6 +306,17 @@ typedef struct drm_i915_private {
         u32 saveCURBPOS;
         u32 saveCURBBASE;
         u32 saveCURSIZE;
+        u32 saveDP_B;
+        u32 saveDP_C;
+        u32 saveDP_D;
+        u32 savePIPEA_GMCH_DATA_M;
+        u32 savePIPEB_GMCH_DATA_M;
+        u32 savePIPEA_GMCH_DATA_N;
+        u32 savePIPEB_GMCH_DATA_N;
+        u32 savePIPEA_DP_LINK_M;
+        u32 savePIPEB_DP_LINK_M;
+        u32 savePIPEA_DP_LINK_N;
+        u32 savePIPEB_DP_LINK_N;
 
         struct {
                 struct drm_mm gtt_space;
@@ -857,6 +868,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 #define HAS_128_BYTE_Y_TILING(dev) (IS_I9XX(dev) && !(IS_I915G(dev) || \
                                                       IS_I915GM(dev)))
 #define SUPPORTS_INTEGRATED_HDMI(dev)   (IS_G4X(dev) || IS_IGDNG(dev))
+#define SUPPORTS_INTEGRATED_DP(dev)     (IS_G4X(dev) || IS_IGDNG(dev))
 #define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev))
 
 #define PRIMARY_RINGBUFFER_SIZE         (128*1024)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fd2b8bdffe3f..876b65cb7629 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1006,7 +1006,7 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
 
         mutex_lock(&dev->struct_mutex);
 #if WATCH_BUF
-        DRM_INFO("set_domain_ioctl %p(%d), %08x %08x\n",
+        DRM_INFO("set_domain_ioctl %p(%zd), %08x %08x\n",
                  obj, obj->size, read_domains, write_domain);
 #endif
         if (read_domains & I915_GEM_DOMAIN_GTT) {
@@ -1050,7 +1050,7 @@ i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
         }
 
 #if WATCH_BUF
-        DRM_INFO("%s: sw_finish %d (%p %d)\n",
+        DRM_INFO("%s: sw_finish %d (%p %zd)\n",
                  __func__, args->handle, obj, obj->size);
 #endif
         obj_priv = obj->driver_private;
@@ -2423,7 +2423,7 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
         }
 
 #if WATCH_BUF
-        DRM_INFO("Binding object of size %d at 0x%08x\n",
+        DRM_INFO("Binding object of size %zd at 0x%08x\n",
                  obj->size, obj_priv->gtt_offset);
 #endif
         ret = i915_gem_object_get_pages(obj);
@@ -4227,6 +4227,7 @@ i915_gem_lastclose(struct drm_device *dev)
 void
 i915_gem_load(struct drm_device *dev)
 {
+        int i;
         drm_i915_private_t *dev_priv = dev->dev_private;
 
         spin_lock_init(&dev_priv->mm.active_list_lock);
@@ -4246,6 +4247,18 @@ i915_gem_load(struct drm_device *dev)
         else
                 dev_priv->num_fence_regs = 8;
 
+        /* Initialize fence registers to zero */
+        if (IS_I965G(dev)) {
+                for (i = 0; i < 16; i++)
+                        I915_WRITE64(FENCE_REG_965_0 + (i * 8), 0);
+        } else {
+                for (i = 0; i < 8; i++)
+                        I915_WRITE(FENCE_REG_830_0 + (i * 4), 0);
+                if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
+                        for (i = 0; i < 8; i++)
+                                I915_WRITE(FENCE_REG_945_8 + (i * 4), 0);
+        }
+
         i915_gem_detect_bit_6_swizzle(dev);
 }
 
diff --git a/drivers/gpu/drm/i915/i915_gem_debug.c b/drivers/gpu/drm/i915/i915_gem_debug.c
index 8d0b943e2c5a..e602614bd3f8 100644
--- a/drivers/gpu/drm/i915/i915_gem_debug.c
+++ b/drivers/gpu/drm/i915/i915_gem_debug.c
@@ -87,7 +87,7 @@ i915_gem_dump_object(struct drm_gem_object *obj, int len,
                         chunk_len = page_len - chunk;
                         if (chunk_len > 128)
                                 chunk_len = 128;
-                        i915_gem_dump_page(obj_priv->page_list[page],
+                        i915_gem_dump_page(obj_priv->pages[page],
                                            chunk, chunk + chunk_len,
                                            obj_priv->gtt_offset +
                                            page * PAGE_SIZE,
@@ -143,7 +143,7 @@ i915_gem_object_check_coherency(struct drm_gem_object *obj, int handle)
         uint32_t *backing_map = NULL;
         int bad_count = 0;
 
-        DRM_INFO("%s: checking coherency of object %p@0x%08x (%d, %dkb):\n",
+        DRM_INFO("%s: checking coherency of object %p@0x%08x (%d, %zdkb):\n",
                  __func__, obj, obj_priv->gtt_offset, handle,
                  obj->size / 1024);
 
@@ -157,7 +157,7 @@ i915_gem_object_check_coherency(struct drm_gem_object *obj, int handle)
         for (page = 0; page < obj->size / PAGE_SIZE; page++) {
                 int i;
 
-                backing_map = kmap_atomic(obj_priv->page_list[page], KM_USER0);
+                backing_map = kmap_atomic(obj_priv->pages[page], KM_USER0);
 
                 if (backing_map == NULL) {
                         DRM_ERROR("failed to map backing page\n");
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 5c1ceec49f5b..daeae62e1c28 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -114,11 +114,13 @@ intel_alloc_mchbar_resource(struct drm_device *dev)
         mchbar_addr = ((u64)temp_hi << 32) | temp_lo;
 
         /* If ACPI doesn't have it, assume we need to allocate it ourselves */
+#ifdef CONFIG_PNP
         if (mchbar_addr &&
             pnp_range_reserved(mchbar_addr, mchbar_addr + MCHBAR_SIZE)) {
                 ret = 0;
                 goto out_put;
         }
+#endif
 
         /* Get some space for it */
         ret = pci_bus_alloc_resource(bridge_dev->bus, &dev_priv->mch_res,
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b86b7b7130c6..228546f6eaa4 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -232,7 +232,17 @@ static void i915_hotplug_work_func(struct work_struct *work)
         drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,
                                                     hotplug_work);
         struct drm_device *dev = dev_priv->dev;
-
+        struct drm_mode_config *mode_config = &dev->mode_config;
+        struct drm_connector *connector;
+
+        if (mode_config->num_connector) {
+                list_for_each_entry(connector, &mode_config->connector_list, head) {
+                        struct intel_output *intel_output = to_intel_output(connector);
+        
+                        if (intel_output->hot_plug)
+                                (*intel_output->hot_plug) (intel_output);
+                }
+        }
         /* Just fire off a uevent and let userspace tell us what to do */
         drm_sysfs_hotplug_event(dev);
 }
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index f6237a0b1133..88bf7521405f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -569,6 +569,19 @@
 #define C0DRB3                  0x10206
 #define C1DRB3                  0x10606
 
+/* Clocking configuration register */
+#define CLKCFG                  0x10c00
+#define CLKCFG_FSB_400                                  (0 << 0)        /* hrawclk 100 */
+#define CLKCFG_FSB_533                                  (1 << 0)        /* hrawclk 133 */
+#define CLKCFG_FSB_667                                  (3 << 0)        /* hrawclk 166 */
+#define CLKCFG_FSB_800                                  (2 << 0)        /* hrawclk 200 */
+#define CLKCFG_FSB_1067                                 (6 << 0)        /* hrawclk 266 */
+#define CLKCFG_FSB_1333                                 (7 << 0)        /* hrawclk 333 */
+/* this is a guess, could be 5 as well */
+#define CLKCFG_FSB_1600                                 (4 << 0)        /* hrawclk 400 */
+#define CLKCFG_FSB_1600_ALT                             (5 << 0)        /* hrawclk 400 */
+#define CLKCFG_FSB_MASK                                 (7 << 0)
+ 
 /** GM965 GM45 render standby register */
 #define MCHBAR_RENDER_STANDBY   0x111B8
 
@@ -834,9 +847,25 @@
 #define   HORIZ_INTERP_MASK     (3 << 6)
 #define   HORIZ_AUTO_SCALE      (1 << 5)
 #define   PANEL_8TO6_DITHER_ENABLE (1 << 3)
+#define   PFIT_FILTER_FUZZY     (0 << 24)
+#define   PFIT_SCALING_AUTO     (0 << 26)
+#define   PFIT_SCALING_PROGRAMMED (1 << 26)
+#define   PFIT_SCALING_PILLAR   (2 << 26)
+#define   PFIT_SCALING_LETTER   (3 << 26)
 #define PFIT_PGM_RATIOS 0x61234
 #define   PFIT_VERT_SCALE_MASK                  0xfff00000
 #define   PFIT_HORIZ_SCALE_MASK                 0x0000fff0
+/* Pre-965 */
+#define         PFIT_VERT_SCALE_SHIFT           20
+#define         PFIT_VERT_SCALE_MASK            0xfff00000
+#define         PFIT_HORIZ_SCALE_SHIFT          4
+#define         PFIT_HORIZ_SCALE_MASK           0x0000fff0
+/* 965+ */
+#define         PFIT_VERT_SCALE_SHIFT_965       16
+#define         PFIT_VERT_SCALE_MASK_965        0x1fff0000
+#define         PFIT_HORIZ_SCALE_SHIFT_965      0
+#define         PFIT_HORIZ_SCALE_MASK_965       0x00001fff
+
 #define PFIT_AUTO_RATIOS 0x61238
 
 /* Backlight control */
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index a98e2831ed31..8d8e083d14ab 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -322,6 +322,20 @@ int i915_save_state(struct drm_device *dev)
         dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS);
         dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR);
 
+        /* Display Port state */
+        if (SUPPORTS_INTEGRATED_DP(dev)) {
+                dev_priv->saveDP_B = I915_READ(DP_B);
+                dev_priv->saveDP_C = I915_READ(DP_C);
+                dev_priv->saveDP_D = I915_READ(DP_D);
+                dev_priv->savePIPEA_GMCH_DATA_M = I915_READ(PIPEA_GMCH_DATA_M);
+                dev_priv->savePIPEB_GMCH_DATA_M = I915_READ(PIPEB_GMCH_DATA_M);
+                dev_priv->savePIPEA_GMCH_DATA_N = I915_READ(PIPEA_GMCH_DATA_N);
+                dev_priv->savePIPEB_GMCH_DATA_N = I915_READ(PIPEB_GMCH_DATA_N);
+                dev_priv->savePIPEA_DP_LINK_M = I915_READ(PIPEA_DP_LINK_M);
+                dev_priv->savePIPEB_DP_LINK_M = I915_READ(PIPEB_DP_LINK_M);
+                dev_priv->savePIPEA_DP_LINK_N = I915_READ(PIPEA_DP_LINK_N);
+                dev_priv->savePIPEB_DP_LINK_N = I915_READ(PIPEB_DP_LINK_N);
+        }
         /* FIXME: save TV & SDVO state */
 
         /* FBC state */
@@ -404,7 +418,19 @@ int i915_restore_state(struct drm_device *dev)
                         for (i = 0; i < 8; i++)
                                 I915_WRITE(FENCE_REG_945_8 + (i * 4), dev_priv->saveFENCE[i+8]);
         }
-
+        
+        /* Display port ratios (must be done before clock is set) */
+        if (SUPPORTS_INTEGRATED_DP(dev)) {
+                I915_WRITE(PIPEA_GMCH_DATA_M, dev_priv->savePIPEA_GMCH_DATA_M);
+                I915_WRITE(PIPEB_GMCH_DATA_M, dev_priv->savePIPEB_GMCH_DATA_M);
+                I915_WRITE(PIPEA_GMCH_DATA_N, dev_priv->savePIPEA_GMCH_DATA_N);
+                I915_WRITE(PIPEB_GMCH_DATA_N, dev_priv->savePIPEB_GMCH_DATA_N);
+                I915_WRITE(PIPEA_DP_LINK_M, dev_priv->savePIPEA_DP_LINK_M);
+                I915_WRITE(PIPEB_DP_LINK_M, dev_priv->savePIPEB_DP_LINK_M);
+                I915_WRITE(PIPEA_DP_LINK_N, dev_priv->savePIPEA_DP_LINK_N);
+                I915_WRITE(PIPEB_DP_LINK_N, dev_priv->savePIPEB_DP_LINK_N);
+        }
+        
         /* Pipe & plane A info */
         /* Prime the clock */
         if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) {
@@ -518,6 +544,12 @@ int i915_restore_state(struct drm_device *dev)
         I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR);
         I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL);
 
+        /* Display Port state */
+        if (SUPPORTS_INTEGRATED_DP(dev)) {
+                I915_WRITE(DP_B, dev_priv->saveDP_B);
+                I915_WRITE(DP_C, dev_priv->saveDP_C);
+                I915_WRITE(DP_D, dev_priv->saveDP_D);
+        }
         /* FIXME: restore TV & SDVO state */
 
         /* FBC info */
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index cdd126d068a7..716409a57244 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -99,9 +99,11 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
 {
         struct bdb_lvds_options *lvds_options;
         struct bdb_lvds_lfp_data *lvds_lfp_data;
+        struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
         struct bdb_lvds_lfp_data_entry *entry;
         struct lvds_dvo_timing *dvo_timing;
         struct drm_display_mode *panel_fixed_mode;
+        int lfp_data_size;
 
         /* Defaults if we can't find VBT info */
         dev_priv->lvds_dither = 0;
@@ -119,9 +121,17 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
         if (!lvds_lfp_data)
                 return;
 
+        lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
+        if (!lvds_lfp_data_ptrs)
+                return;
+
         dev_priv->lvds_vbt = 1;
 
-        entry = &lvds_lfp_data->data[lvds_options->panel_type];
+        lfp_data_size = lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
+                lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
+        entry = (struct bdb_lvds_lfp_data_entry *)
+                ((uint8_t *)lvds_lfp_data->data + (lfp_data_size *
+                                                   lvds_options->panel_type));
         dvo_timing = &entry->dvo_timing;
 
         panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3e1c78162119..73e7b9cecac8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -29,6 +29,7 @@
 #include "intel_drv.h"
 #include "i915_drm.h"
 #include "i915_drv.h"
+#include "intel_dp.h"
 
 #include "drm_crtc_helper.h"
 
@@ -127,19 +128,6 @@ struct intel_limit {
 #define I9XX_P2_LVDS_FAST                     7
 #define I9XX_P2_LVDS_SLOW_LIMIT          112000
 
-#define INTEL_LIMIT_I8XX_DVO_DAC    0
-#define INTEL_LIMIT_I8XX_LVDS       1
-#define INTEL_LIMIT_I9XX_SDVO_DAC   2
-#define INTEL_LIMIT_I9XX_LVDS       3
-#define INTEL_LIMIT_G4X_SDVO        4
-#define INTEL_LIMIT_G4X_HDMI_DAC   5
-#define INTEL_LIMIT_G4X_SINGLE_CHANNEL_LVDS   6
-#define INTEL_LIMIT_G4X_DUAL_CHANNEL_LVDS   7
-#define INTEL_LIMIT_IGD_SDVO_DAC    8
-#define INTEL_LIMIT_IGD_LVDS        9
-#define INTEL_LIMIT_IGDNG_SDVO_DAC  10
-#define INTEL_LIMIT_IGDNG_LVDS      11
-
 /*The parameter is for SDVO on G4x platform*/
 #define G4X_DOT_SDVO_MIN           25000
 #define G4X_DOT_SDVO_MAX           270000
@@ -218,6 +206,25 @@ struct intel_limit {
 #define G4X_P2_DUAL_CHANNEL_LVDS_FAST           7
 #define G4X_P2_DUAL_CHANNEL_LVDS_LIMIT          0
 
+/*The parameter is for DISPLAY PORT on G4x platform*/
+#define G4X_DOT_DISPLAY_PORT_MIN           161670
+#define G4X_DOT_DISPLAY_PORT_MAX           227000
+#define G4X_N_DISPLAY_PORT_MIN             1
+#define G4X_N_DISPLAY_PORT_MAX             2
+#define G4X_M_DISPLAY_PORT_MIN             97
+#define G4X_M_DISPLAY_PORT_MAX             108
+#define G4X_M1_DISPLAY_PORT_MIN            0x10
+#define G4X_M1_DISPLAY_PORT_MAX            0x12
+#define G4X_M2_DISPLAY_PORT_MIN            0x05
+#define G4X_M2_DISPLAY_PORT_MAX            0x06
+#define G4X_P_DISPLAY_PORT_MIN             10
+#define G4X_P_DISPLAY_PORT_MAX             20
+#define G4X_P1_DISPLAY_PORT_MIN            1
+#define G4X_P1_DISPLAY_PORT_MAX            2
+#define G4X_P2_DISPLAY_PORT_SLOW           10
+#define G4X_P2_DISPLAY_PORT_FAST           10
+#define G4X_P2_DISPLAY_PORT_LIMIT          0
+
 /* IGDNG */
 /* as we calculate clock using (register_value + 2) for
    N/M1/M2, so here the range value for them is (actual_value-2).
@@ -256,8 +263,11 @@ static bool
 intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
                         int target, int refclk, intel_clock_t *best_clock);
 
-static const intel_limit_t intel_limits[] = {
-    { /* INTEL_LIMIT_I8XX_DVO_DAC */
+static bool
+intel_find_pll_g4x_dp(const intel_limit_t *, struct drm_crtc *crtc,
+                      int target, int refclk, intel_clock_t *best_clock);
+
+static const intel_limit_t intel_limits_i8xx_dvo = {
         .dot = { .min = I8XX_DOT_MIN,           .max = I8XX_DOT_MAX },
         .vco = { .min = I8XX_VCO_MIN,           .max = I8XX_VCO_MAX },
         .n   = { .min = I8XX_N_MIN,             .max = I8XX_N_MAX },
@@ -269,8 +279,9 @@ static const intel_limit_t intel_limits[] = {
         .p2  = { .dot_limit = I8XX_P2_SLOW_LIMIT,
                  .p2_slow = I8XX_P2_SLOW,       .p2_fast = I8XX_P2_FAST },
         .find_pll = intel_find_best_PLL,
-    },
-    { /* INTEL_LIMIT_I8XX_LVDS */
+};
+
+static const intel_limit_t intel_limits_i8xx_lvds = {
         .dot = { .min = I8XX_DOT_MIN,           .max = I8XX_DOT_MAX },
         .vco = { .min = I8XX_VCO_MIN,           .max = I8XX_VCO_MAX },
         .n   = { .min = I8XX_N_MIN,             .max = I8XX_N_MAX },
@@ -282,8 +293,9 @@ static const intel_limit_t intel_limits[] = {
         .p2  = { .dot_limit = I8XX_P2_SLOW_LIMIT,
                  .p2_slow = I8XX_P2_LVDS_SLOW,  .p2_fast = I8XX_P2_LVDS_FAST },
         .find_pll = intel_find_best_PLL,
-    },
-    { /* INTEL_LIMIT_I9XX_SDVO_DAC */
+};
+        
+static const intel_limit_t intel_limits_i9xx_sdvo = {
         .dot = { .min = I9XX_DOT_MIN,           .max = I9XX_DOT_MAX },
         .vco = { .min = I9XX_VCO_MIN,           .max = I9XX_VCO_MAX },
         .n   = { .min = I9XX_N_MIN,             .max = I9XX_N_MAX },
@@ -295,8 +307,9 @@ static const intel_limit_t intel_limits[] = {
         .p2  = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
                  .p2_slow = I9XX_P2_SDVO_DAC_SLOW,      .p2_fast = I9XX_P2_SDVO_DAC_FAST },
         .find_pll = intel_find_best_PLL,
-    },
-    { /* INTEL_LIMIT_I9XX_LVDS */
+};
+
+static const intel_limit_t intel_limits_i9xx_lvds = {
         .dot = { .min = I9XX_DOT_MIN,           .max = I9XX_DOT_MAX },
         .vco = { .min = I9XX_VCO_MIN,           .max = I9XX_VCO_MAX },
         .n   = { .min = I9XX_N_MIN,             .max = I9XX_N_MAX },
@@ -311,9 +324,10 @@ static const intel_limit_t intel_limits[] = {
         .p2  = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
                  .p2_slow = I9XX_P2_LVDS_SLOW,  .p2_fast = I9XX_P2_LVDS_FAST },
         .find_pll = intel_find_best_PLL,
-    },
+};
+
     /* below parameter and function is for G4X Chipset Family*/
-    { /* INTEL_LIMIT_G4X_SDVO */
+static const intel_limit_t intel_limits_g4x_sdvo = {
         .dot = { .min = G4X_DOT_SDVO_MIN,       .max = G4X_DOT_SDVO_MAX },
         .vco = { .min = G4X_VCO_MIN,            .max = G4X_VCO_MAX},
         .n   = { .min = G4X_N_SDVO_MIN,         .max = G4X_N_SDVO_MAX },
@@ -327,8 +341,9 @@ static const intel_limit_t intel_limits[] = {
                  .p2_fast = G4X_P2_SDVO_FAST
         },
         .find_pll = intel_g4x_find_best_PLL,
-    },
-    { /* INTEL_LIMIT_G4X_HDMI_DAC */
+};
+
+static const intel_limit_t intel_limits_g4x_hdmi = {
         .dot = { .min = G4X_DOT_HDMI_DAC_MIN,   .max = G4X_DOT_HDMI_DAC_MAX },
         .vco = { .min = G4X_VCO_MIN,            .max = G4X_VCO_MAX},
         .n   = { .min = G4X_N_HDMI_DAC_MIN,     .max = G4X_N_HDMI_DAC_MAX },
@@ -342,8 +357,9 @@ static const intel_limit_t intel_limits[] = {
                  .p2_fast = G4X_P2_HDMI_DAC_FAST
         },
         .find_pll = intel_g4x_find_best_PLL,
-    },
-    { /* INTEL_LIMIT_G4X_SINGLE_CHANNEL_LVDS */
+};
+
+static const intel_limit_t intel_limits_g4x_single_channel_lvds = {
         .dot = { .min = G4X_DOT_SINGLE_CHANNEL_LVDS_MIN,
                  .max = G4X_DOT_SINGLE_CHANNEL_LVDS_MAX },
         .vco = { .min = G4X_VCO_MIN,
@@ -365,8 +381,9 @@ static const intel_limit_t intel_limits[] = {
                  .p2_fast = G4X_P2_SINGLE_CHANNEL_LVDS_FAST
         },
         .find_pll = intel_g4x_find_best_PLL,
-    },
-    { /* INTEL_LIMIT_G4X_DUAL_CHANNEL_LVDS */
+};
+
+static const intel_limit_t intel_limits_g4x_dual_channel_lvds = {
         .dot = { .min = G4X_DOT_DUAL_CHANNEL_LVDS_MIN,
                  .max = G4X_DOT_DUAL_CHANNEL_LVDS_MAX },
         .vco = { .min = G4X_VCO_MIN,
@@ -388,8 +405,32 @@ static const intel_limit_t intel_limits[] = {
                  .p2_fast = G4X_P2_DUAL_CHANNEL_LVDS_FAST
         },
         .find_pll = intel_g4x_find_best_PLL,
-    },
-    { /* INTEL_LIMIT_IGD_SDVO */
+};
+
+static const intel_limit_t intel_limits_g4x_display_port = {
+        .dot = { .min = G4X_DOT_DISPLAY_PORT_MIN,
+                 .max = G4X_DOT_DISPLAY_PORT_MAX },
+        .vco = { .min = G4X_VCO_MIN,
+                 .max = G4X_VCO_MAX},
+        .n   = { .min = G4X_N_DISPLAY_PORT_MIN,
+                 .max = G4X_N_DISPLAY_PORT_MAX },
+        .m   = { .min = G4X_M_DISPLAY_PORT_MIN,
+                 .max = G4X_M_DISPLAY_PORT_MAX },
+        .m1  = { .min = G4X_M1_DISPLAY_PORT_MIN,
+                 .max = G4X_M1_DISPLAY_PORT_MAX },
+        .m2  = { .min = G4X_M2_DISPLAY_PORT_MIN,
+                 .max = G4X_M2_DISPLAY_PORT_MAX },
+        .p   = { .min = G4X_P_DISPLAY_PORT_MIN,
+                 .max = G4X_P_DISPLAY_PORT_MAX },
+        .p1  = { .min = G4X_P1_DISPLAY_PORT_MIN,
+                 .max = G4X_P1_DISPLAY_PORT_MAX},
+        .p2  = { .dot_limit = G4X_P2_DISPLAY_PORT_LIMIT,
+                 .p2_slow = G4X_P2_DISPLAY_PORT_SLOW,
+                 .p2_fast = G4X_P2_DISPLAY_PORT_FAST },
+        .find_pll = intel_find_pll_g4x_dp,
+};
+
+static const intel_limit_t intel_limits_igd_sdvo = {
         .dot = { .min = I9XX_DOT_MIN,           .max = I9XX_DOT_MAX},
         .vco = { .min = IGD_VCO_MIN,            .max = IGD_VCO_MAX },
         .n   = { .min = IGD_N_MIN,              .max = IGD_N_MAX },
@@ -401,8 +442,9 @@ static const intel_limit_t intel_limits[] = {
         .p2  = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
                  .p2_slow = I9XX_P2_SDVO_DAC_SLOW,      .p2_fast = I9XX_P2_SDVO_DAC_FAST },
         .find_pll = intel_find_best_PLL,
-    },
-    { /* INTEL_LIMIT_IGD_LVDS */
+};
+
+static const intel_limit_t intel_limits_igd_lvds = {
         .dot = { .min = I9XX_DOT_MIN,           .max = I9XX_DOT_MAX },
         .vco = { .min = IGD_VCO_MIN,            .max = IGD_VCO_MAX },
         .n   = { .min = IGD_N_MIN,              .max = IGD_N_MAX },
@@ -415,8 +457,9 @@ static const intel_limit_t intel_limits[] = {
         .p2  = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
                  .p2_slow = I9XX_P2_LVDS_SLOW,  .p2_fast = I9XX_P2_LVDS_SLOW },
         .find_pll = intel_find_best_PLL,
-    },
-    { /* INTEL_LIMIT_IGDNG_SDVO_DAC */
+};
+
+static const intel_limit_t intel_limits_igdng_sdvo = {
         .dot = { .min = IGDNG_DOT_MIN,          .max = IGDNG_DOT_MAX },
         .vco = { .min = IGDNG_VCO_MIN,          .max = IGDNG_VCO_MAX },
         .n   = { .min = IGDNG_N_MIN,            .max = IGDNG_N_MAX },
@@ -429,8 +472,9 @@ static const intel_limit_t intel_limits[] = {
                  .p2_slow = IGDNG_P2_SDVO_DAC_SLOW,
                  .p2_fast = IGDNG_P2_SDVO_DAC_FAST },
         .find_pll = intel_igdng_find_best_PLL,
-    },
-    { /* INTEL_LIMIT_IGDNG_LVDS */
+};
+
+static const intel_limit_t intel_limits_igdng_lvds = {
         .dot = { .min = IGDNG_DOT_MIN,          .max = IGDNG_DOT_MAX },
         .vco = { .min = IGDNG_VCO_MIN,          .max = IGDNG_VCO_MAX },
         .n   = { .min = IGDNG_N_MIN,            .max = IGDNG_N_MAX },
@@ -443,16 +487,15 @@ static const intel_limit_t intel_limits[] = {
                  .p2_slow = IGDNG_P2_LVDS_SLOW,
                  .p2_fast = IGDNG_P2_LVDS_FAST },
         .find_pll = intel_igdng_find_best_PLL,
-    },
 };
 
 static const intel_limit_t *intel_igdng_limit(struct drm_crtc *crtc)
 {
         const intel_limit_t *limit;
         if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
-                limit = &intel_limits[INTEL_LIMIT_IGDNG_LVDS];
+                limit = &intel_limits_igdng_lvds;
         else
-                limit = &intel_limits[INTEL_LIMIT_IGDNG_SDVO_DAC];
+                limit = &intel_limits_igdng_sdvo;
 
         return limit;
 }
@@ -467,19 +510,19 @@ static const intel_limit_t *intel_g4x_limit(struct drm_crtc *crtc)
                 if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
                     LVDS_CLKB_POWER_UP)
                         /* LVDS with dual channel */
-                        limit = &intel_limits
-                                        [INTEL_LIMIT_G4X_DUAL_CHANNEL_LVDS];
+                        limit = &intel_limits_g4x_dual_channel_lvds;
                 else
                         /* LVDS with dual channel */
-                        limit = &intel_limits
-                                        [INTEL_LIMIT_G4X_SINGLE_CHANNEL_LVDS];
+                        limit = &intel_limits_g4x_single_channel_lvds;
         } else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_HDMI) ||
                    intel_pipe_has_type(crtc, INTEL_OUTPUT_ANALOG)) {
-                limit = &intel_limits[INTEL_LIMIT_G4X_HDMI_DAC];
+                limit = &intel_limits_g4x_hdmi;
         } else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_SDVO)) {
-                limit = &intel_limits[INTEL_LIMIT_G4X_SDVO];
+                limit = &intel_limits_g4x_sdvo;
+        } else if (intel_pipe_has_type (crtc, INTEL_OUTPUT_DISPLAYPORT)) {
+                limit = &intel_limits_g4x_display_port;
         } else /* The option is for other outputs */
-                limit = &intel_limits[INTEL_LIMIT_I9XX_SDVO_DAC];
+                limit = &intel_limits_i9xx_sdvo;
 
         return limit;
 }
@@ -495,19 +538,19 @@ static const intel_limit_t *intel_limit(struct drm_crtc *crtc)
                 limit = intel_g4x_limit(crtc);
         } else if (IS_I9XX(dev) && !IS_IGD(dev)) {
                 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
-                        limit = &intel_limits[INTEL_LIMIT_I9XX_LVDS];
+                        limit = &intel_limits_i9xx_lvds;
                 else
-                        limit = &intel_limits[INTEL_LIMIT_I9XX_SDVO_DAC];
+                        limit = &intel_limits_i9xx_sdvo;
         } else if (IS_IGD(dev)) {
                 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
-                        limit = &intel_limits[INTEL_LIMIT_IGD_LVDS];
+                        limit = &intel_limits_igd_lvds;
                 else
-                        limit = &intel_limits[INTEL_LIMIT_IGD_SDVO_DAC];
+                        limit = &intel_limits_igd_sdvo;
         } else {
                 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
-                        limit = &intel_limits[INTEL_LIMIT_I8XX_LVDS];
+                        limit = &intel_limits_i8xx_lvds;
                 else
-                        limit = &intel_limits[INTEL_LIMIT_I8XX_DVO_DAC];
+                        limit = &intel_limits_i8xx_dvo;
         }
         return limit;
 }
@@ -764,6 +807,35 @@ out:
         return found;
 }
 
+/* DisplayPort has only two frequencies, 162MHz and 270MHz */
+static bool
+intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
+                      int target, int refclk, intel_clock_t *best_clock)
+{
+    intel_clock_t clock;
+    if (target < 200000) {
+        clock.dot = 161670;
+        clock.p = 20;
+        clock.p1 = 2;
+        clock.p2 = 10;
+        clock.n = 0x01;
+        clock.m = 97;
+        clock.m1 = 0x10;
+        clock.m2 = 0x05;
+    } else {
+        clock.dot = 270000;
+        clock.p = 10;
+        clock.p1 = 1;
+        clock.p2 = 10;
+        clock.n = 0x02;
+        clock.m = 108;
+        clock.m1 = 0x12;
+        clock.m2 = 0x06;
+    }
+    memcpy(best_clock, &clock, sizeof(intel_clock_t));
+    return true;
+}
+
 void
 intel_wait_for_vblank(struct drm_device *dev)
 {
@@ -1541,7 +1613,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
         intel_clock_t clock;
         u32 dpll = 0, fp = 0, dspcntr, pipeconf;
         bool ok, is_sdvo = false, is_dvo = false;
-        bool is_crt = false, is_lvds = false, is_tv = false;
+        bool is_crt = false, is_lvds = false, is_tv = false, is_dp = false;
         struct drm_mode_config *mode_config = &dev->mode_config;
         struct drm_connector *connector;
         const intel_limit_t *limit;
@@ -1585,6 +1657,9 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
                 case INTEL_OUTPUT_ANALOG:
                         is_crt = true;
                         break;
+                case INTEL_OUTPUT_DISPLAYPORT:
+                        is_dp = true;
+                        break;
                 }
 
                 num_outputs++;
@@ -1600,6 +1675,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
         } else {
                 refclk = 48000;
         }
+        
 
         /*
          * Returns a set of divisors for the desired target clock with the given
@@ -1662,6 +1738,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
                         else if (IS_IGDNG(dev))
                                 dpll |= (sdvo_pixel_multiply - 1) << PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT;
                 }
+                if (is_dp)
+                        dpll |= DPLL_DVO_HIGH_SPEED;
 
                 /* compute bitmask from p1 value */
                 if (IS_IGD(dev))
@@ -1809,6 +1887,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
                 I915_WRITE(lvds_reg, lvds);
                 I915_READ(lvds_reg);
         }
+        if (is_dp)
+                intel_dp_set_m_n(crtc, mode, adjusted_mode);
 
         I915_WRITE(fp_reg, fp);
         I915_WRITE(dpll_reg, dpll);
@@ -2475,6 +2555,8 @@ static void intel_setup_outputs(struct drm_device *dev)
                         found = intel_sdvo_init(dev, SDVOB);
                         if (!found && SUPPORTS_INTEGRATED_HDMI(dev))
                                 intel_hdmi_init(dev, SDVOB);
+                        if (!found && SUPPORTS_INTEGRATED_DP(dev))
+                                intel_dp_init(dev, DP_B);
                 }
 
                 /* Before G4X SDVOC doesn't have its own detect register */
@@ -2487,7 +2569,11 @@ static void intel_setup_outputs(struct drm_device *dev)
                         found = intel_sdvo_init(dev, SDVOC);
                         if (!found && SUPPORTS_INTEGRATED_HDMI(dev))
                                 intel_hdmi_init(dev, SDVOC);
+                        if (!found && SUPPORTS_INTEGRATED_DP(dev))
+                                intel_dp_init(dev, DP_C);
                 }
+                if (SUPPORTS_INTEGRATED_DP(dev) && (I915_READ(DP_D) & DP_DETECTED))
+                        intel_dp_init(dev, DP_D);
         } else
                 intel_dvo_init(dev);
 
@@ -2530,6 +2616,11 @@ static void intel_setup_outputs(struct drm_device *dev)
                                      (1 << 1));
                         clone_mask = (1 << INTEL_OUTPUT_TVOUT);
                         break;
+                case INTEL_OUTPUT_DISPLAYPORT:
+                        crtc_mask = ((1 << 0) |
+                                     (1 << 1));
+                        clone_mask = (1 << INTEL_OUTPUT_DISPLAYPORT);
+                        break;
                 }
                 encoder->possible_crtcs = crtc_mask;
                 encoder->possible_clones = intel_connector_clones(dev, clone_mask);
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
new file mode 100644
index 000000000000..8f8d37d5663a
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -0,0 +1,1153 @@
+/*
+ * Copyright © 2008 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Keith Packard <keithp@keithp.com>
+ *
+ */
+
+#include <linux/i2c.h>
+#include "drmP.h"
+#include "drm.h"
+#include "drm_crtc.h"
+#include "drm_crtc_helper.h"
+#include "intel_drv.h"
+#include "i915_drm.h"
+#include "i915_drv.h"
+#include "intel_dp.h"
+
+#define DP_LINK_STATUS_SIZE     6
+#define DP_LINK_CHECK_TIMEOUT   (10 * 1000)
+
+#define DP_LINK_CONFIGURATION_SIZE      9
+
+struct intel_dp_priv {
+        uint32_t output_reg;
+        uint32_t DP;
+        uint8_t  link_configuration[DP_LINK_CONFIGURATION_SIZE];
+        uint32_t save_DP;
+        uint8_t  save_link_configuration[DP_LINK_CONFIGURATION_SIZE];
+        bool has_audio;
+        int dpms_mode;
+        uint8_t link_bw;
+        uint8_t lane_count;
+        uint8_t dpcd[4];
+        struct intel_output *intel_output;
+        struct i2c_adapter adapter;
+        struct i2c_algo_dp_aux_data algo;
+};
+
+static void
+intel_dp_link_train(struct intel_output *intel_output, uint32_t DP,
+                    uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]);
+
+static void
+intel_dp_link_down(struct intel_output *intel_output, uint32_t DP);
+
+static int
+intel_dp_max_lane_count(struct intel_output *intel_output)
+{
+        struct intel_dp_priv   *dp_priv = intel_output->dev_priv;
+        int max_lane_count = 4;
+
+        if (dp_priv->dpcd[0] >= 0x11) {
+                max_lane_count = dp_priv->dpcd[2] & 0x1f;
+                switch (max_lane_count) {
+                case 1: case 2: case 4:
+                        break;
+                default:
+                        max_lane_count = 4;
+                }
+        }
+        return max_lane_count;
+}
+
+static int
+intel_dp_max_link_bw(struct intel_output *intel_output)
+{
+        struct intel_dp_priv   *dp_priv = intel_output->dev_priv;
+        int max_link_bw = dp_priv->dpcd[1];
+
+        switch (max_link_bw) {
+        case DP_LINK_BW_1_62:
+        case DP_LINK_BW_2_7:
+                break;
+        default:
+                max_link_bw = DP_LINK_BW_1_62;
+                break;
+        }
+        return max_link_bw;
+}
+
+static int
+intel_dp_link_clock(uint8_t link_bw)
+{
+        if (link_bw == DP_LINK_BW_2_7)
+                return 270000;
+        else
+                return 162000;
+}
+
+/* I think this is a fiction */
+static int
+intel_dp_link_required(int pixel_clock)
+{
+        return pixel_clock * 3;
+}
+
+static int
+intel_dp_mode_valid(struct drm_connector *connector,
+                    struct drm_display_mode *mode)
+{
+        struct intel_output *intel_output = to_intel_output(connector);
+        int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_output));
+        int max_lanes = intel_dp_max_lane_count(intel_output);
+
+        if (intel_dp_link_required(mode->clock) > max_link_clock * max_lanes)
+                return MODE_CLOCK_HIGH;
+
+        if (mode->clock < 10000)
+                return MODE_CLOCK_LOW;
+
+        return MODE_OK;
+}
+
+static uint32_t
+pack_aux(uint8_t *src, int src_bytes)
+{
+        int     i;
+        uint32_t v = 0;
+
+        if (src_bytes > 4)
+                src_bytes = 4;
+        for (i = 0; i < src_bytes; i++)
+                v |= ((uint32_t) src[i]) << ((3-i) * 8);
+        return v;
+}
+
+static void
+unpack_aux(uint32_t src, uint8_t *dst, int dst_bytes)
+{
+        int i;
+        if (dst_bytes > 4)
+                dst_bytes = 4;
+        for (i = 0; i < dst_bytes; i++)
+                dst[i] = src >> ((3-i) * 8);
+}
+
+/* hrawclock is 1/4 the FSB frequency */
+static int
+intel_hrawclk(struct drm_device *dev)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        uint32_t clkcfg;
+
+        clkcfg = I915_READ(CLKCFG);
+        switch (clkcfg & CLKCFG_FSB_MASK) {
+        case CLKCFG_FSB_400:
+                return 100;
+        case CLKCFG_FSB_533:
+                return 133;
+        case CLKCFG_FSB_667:
+                return 166;
+        case CLKCFG_FSB_800:
+                return 200;
+        case CLKCFG_FSB_1067:
+                return 266;
+        case CLKCFG_FSB_1333:
+                return 333;
+        /* these two are just a guess; one of them might be right */
+        case CLKCFG_FSB_1600:
+        case CLKCFG_FSB_1600_ALT:
+                return 400;
+        default:
+                return 133;
+        }
+}
+
+static int
+intel_dp_aux_ch(struct intel_output *intel_output,
+                uint8_t *send, int send_bytes,
+                uint8_t *recv, int recv_size)
+{
+        struct intel_dp_priv *dp_priv = intel_output->dev_priv;
+        uint32_t output_reg = dp_priv->output_reg;
+        struct drm_device *dev = intel_output->base.dev;
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        uint32_t ch_ctl = output_reg + 0x10;
+        uint32_t ch_data = ch_ctl + 4;
+        int i;
+        int recv_bytes;
+        uint32_t ctl;
+        uint32_t status;
+        uint32_t aux_clock_divider;
+        int try;
+
+        /* The clock divider is based off the hrawclk,
+         * and would like to run at 2MHz. So, take the
+         * hrawclk value and divide by 2 and use that
+         */
+        aux_clock_divider = intel_hrawclk(dev) / 2;
+        /* Must try at least 3 times according to DP spec */
+        for (try = 0; try < 5; try++) {
+                /* Load the send data into the aux channel data registers */
+                for (i = 0; i < send_bytes; i += 4) {
+                        uint32_t    d = pack_aux(send + i, send_bytes - i);;
+        
+                        I915_WRITE(ch_data + i, d);
+                }
+        
+                ctl = (DP_AUX_CH_CTL_SEND_BUSY |
+                       DP_AUX_CH_CTL_TIME_OUT_400us |
+                       (send_bytes << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) |
+                       (5 << DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT) |
+                       (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT) |
+                       DP_AUX_CH_CTL_DONE |
+                       DP_AUX_CH_CTL_TIME_OUT_ERROR |
+                       DP_AUX_CH_CTL_RECEIVE_ERROR);
+        
+                /* Send the command and wait for it to complete */
+                I915_WRITE(ch_ctl, ctl);
+                (void) I915_READ(ch_ctl);
+                for (;;) {
+                        udelay(100);
+                        status = I915_READ(ch_ctl);
+                        if ((status & DP_AUX_CH_CTL_SEND_BUSY) == 0)
+                                break;
+                }
+        
+                /* Clear done status and any errors */
+                I915_WRITE(ch_ctl, (ctl |
+                                DP_AUX_CH_CTL_DONE |
+                                DP_AUX_CH_CTL_TIME_OUT_ERROR |
+                                DP_AUX_CH_CTL_RECEIVE_ERROR));
+                (void) I915_READ(ch_ctl);
+                if ((status & DP_AUX_CH_CTL_TIME_OUT_ERROR) == 0)
+                        break;
+        }
+
+        if ((status & DP_AUX_CH_CTL_DONE) == 0) {
+                printk(KERN_ERR "dp_aux_ch not done status 0x%08x\n", status);
+                return -EBUSY;
+        }
+
+        /* Check for timeout or receive error.
+         * Timeouts occur when the sink is not connected
+         */
+        if (status & DP_AUX_CH_CTL_RECEIVE_ERROR) {
+                printk(KERN_ERR "dp_aux_ch receive error status 0x%08x\n", status);
+                return -EIO;
+        }
+        if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR) {
+                printk(KERN_ERR "dp_aux_ch timeout status 0x%08x\n", status);
+                return -ETIMEDOUT;
+        }
+
+        /* Unload any bytes sent back from the other side */
+        recv_bytes = ((status & DP_AUX_CH_CTL_MESSAGE_SIZE_MASK) >>
+                      DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT);
+
+        if (recv_bytes > recv_size)
+                recv_bytes = recv_size;
+        
+        for (i = 0; i < recv_bytes; i += 4) {
+                uint32_t    d = I915_READ(ch_data + i);
+
+                unpack_aux(d, recv + i, recv_bytes - i);
+        }
+
+        return recv_bytes;
+}
+
+/* Write data to the aux channel in native mode */
+static int
+intel_dp_aux_native_write(struct intel_output *intel_output,
+                          uint16_t address, uint8_t *send, int send_bytes)
+{
+        int ret;
+        uint8_t msg[20];
+        int msg_bytes;
+        uint8_t ack;
+
+        if (send_bytes > 16)
+                return -1;
+        msg[0] = AUX_NATIVE_WRITE << 4;
+        msg[1] = address >> 8;
+        msg[2] = address;
+        msg[3] = send_bytes - 1;
+        memcpy(&msg[4], send, send_bytes);
+        msg_bytes = send_bytes + 4;
+        for (;;) {
+                ret = intel_dp_aux_ch(intel_output, msg, msg_bytes, &ack, 1);
+                if (ret < 0)
+                        return ret;
+                if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK)
+                        break;
+                else if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_DEFER)
+                        udelay(100);
+                else
+                        return -EIO;
+        }
+        return send_bytes;
+}
+
+/* Write a single byte to the aux channel in native mode */
+static int
+intel_dp_aux_native_write_1(struct intel_output *intel_output,
+                            uint16_t address, uint8_t byte)
+{
+        return intel_dp_aux_native_write(intel_output, address, &byte, 1);
+}
+
+/* read bytes from a native aux channel */
+static int
+intel_dp_aux_native_read(struct intel_output *intel_output,
+                         uint16_t address, uint8_t *recv, int recv_bytes)
+{
+        uint8_t msg[4];
+        int msg_bytes;
+        uint8_t reply[20];
+        int reply_bytes;
+        uint8_t ack;
+        int ret;
+
+        msg[0] = AUX_NATIVE_READ << 4;
+        msg[1] = address >> 8;
+        msg[2] = address & 0xff;
+        msg[3] = recv_bytes - 1;
+
+        msg_bytes = 4;
+        reply_bytes = recv_bytes + 1;
+
+        for (;;) {
+                ret = intel_dp_aux_ch(intel_output, msg, msg_bytes,
+                                      reply, reply_bytes);
+                if (ret == 0)
+                        return -EPROTO;
+                if (ret < 0)
+                        return ret;
+                ack = reply[0];
+                if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK) {
+                        memcpy(recv, reply + 1, ret - 1);
+                        return ret - 1;
+                }
+                else if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_DEFER)
+                        udelay(100);
+                else
+                        return -EIO;
+        }
+}
+
+static int
+intel_dp_i2c_aux_ch(struct i2c_adapter *adapter,
+                    uint8_t *send, int send_bytes,
+                    uint8_t *recv, int recv_bytes)
+{
+        struct intel_dp_priv *dp_priv = container_of(adapter,
+                                                     struct intel_dp_priv,
+                                                     adapter);
+        struct intel_output *intel_output = dp_priv->intel_output;
+
+        return intel_dp_aux_ch(intel_output,
+                               send, send_bytes, recv, recv_bytes);
+}
+
+static int
+intel_dp_i2c_init(struct intel_output *intel_output, const char *name)
+{
+        struct intel_dp_priv   *dp_priv = intel_output->dev_priv;
+
+        DRM_ERROR("i2c_init %s\n", name);
+        dp_priv->algo.running = false;
+        dp_priv->algo.address = 0;
+        dp_priv->algo.aux_ch = intel_dp_i2c_aux_ch;
+
+        memset(&dp_priv->adapter, '\0', sizeof (dp_priv->adapter));
+        dp_priv->adapter.owner = THIS_MODULE;
+        dp_priv->adapter.class = I2C_CLASS_DDC;
+        strncpy (dp_priv->adapter.name, name, sizeof dp_priv->adapter.name - 1);
+        dp_priv->adapter.name[sizeof dp_priv->adapter.name - 1] = '\0';
+        dp_priv->adapter.algo_data = &dp_priv->algo;
+        dp_priv->adapter.dev.parent = &intel_output->base.kdev;
+        
+        return i2c_dp_aux_add_bus(&dp_priv->adapter);
+}
+
+static bool
+intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
+                    struct drm_display_mode *adjusted_mode)
+{
+        struct intel_output *intel_output = enc_to_intel_output(encoder);
+        struct intel_dp_priv   *dp_priv = intel_output->dev_priv;
+        int lane_count, clock;
+        int max_lane_count = intel_dp_max_lane_count(intel_output);
+        int max_clock = intel_dp_max_link_bw(intel_output) == DP_LINK_BW_2_7 ? 1 : 0;
+        static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };
+
+        for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
+                for (clock = 0; clock <= max_clock; clock++) {
+                        int link_avail = intel_dp_link_clock(bws[clock]) * lane_count;
+
+                        if (intel_dp_link_required(mode->clock) <= link_avail) {
+                                dp_priv->link_bw = bws[clock];
+                                dp_priv->lane_count = lane_count;
+                                adjusted_mode->clock = intel_dp_link_clock(dp_priv->link_bw);
+                                printk(KERN_ERR "link bw %02x lane count %d clock %d\n",
+                                       dp_priv->link_bw, dp_priv->lane_count,
+                                       adjusted_mode->clock);
+                                return true;
+                        }
+                }
+        }
+        return false;
+}
+
+struct intel_dp_m_n {
+        uint32_t        tu;
+        uint32_t        gmch_m;
+        uint32_t        gmch_n;
+        uint32_t        link_m;
+        uint32_t        link_n;
+};
+
+static void
+intel_reduce_ratio(uint32_t *num, uint32_t *den)
+{
+        while (*num > 0xffffff || *den > 0xffffff) {
+                *num >>= 1;
+                *den >>= 1;
+        }
+}
+
+static void
+intel_dp_compute_m_n(int bytes_per_pixel,
+                     int nlanes,
+                     int pixel_clock,
+                     int link_clock,
+                     struct intel_dp_m_n *m_n)
+{
+        m_n->tu = 64;
+        m_n->gmch_m = pixel_clock * bytes_per_pixel;
+        m_n->gmch_n = link_clock * nlanes;
+        intel_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n);
+        m_n->link_m = pixel_clock;
+        m_n->link_n = link_clock;
+        intel_reduce_ratio(&m_n->link_m, &m_n->link_n);
+}
+
+void
+intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
+                 struct drm_display_mode *adjusted_mode)
+{
+        struct drm_device *dev = crtc->dev;
+        struct drm_mode_config *mode_config = &dev->mode_config;
+        struct drm_connector *connector;
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+        int lane_count = 4;
+        struct intel_dp_m_n m_n;
+
+        /*
+         * Find the lane count in the intel_output private
+         */
+        list_for_each_entry(connector, &mode_config->connector_list, head) {
+                struct intel_output *intel_output = to_intel_output(connector);
+                struct intel_dp_priv *dp_priv = intel_output->dev_priv;
+
+                if (!connector->encoder || connector->encoder->crtc != crtc)
+                        continue;
+
+                if (intel_output->type == INTEL_OUTPUT_DISPLAYPORT) {
+                        lane_count = dp_priv->lane_count;
+                        break;
+                }
+        }
+
+        /*
+         * Compute the GMCH and Link ratios. The '3' here is
+         * the number of bytes_per_pixel post-LUT, which we always
+         * set up for 8-bits of R/G/B, or 3 bytes total.
+         */
+        intel_dp_compute_m_n(3, lane_count,
+                             mode->clock, adjusted_mode->clock, &m_n);
+
+        if (intel_crtc->pipe == 0) {
+                I915_WRITE(PIPEA_GMCH_DATA_M,
+                       ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
+                       m_n.gmch_m);
+                I915_WRITE(PIPEA_GMCH_DATA_N,
+                       m_n.gmch_n);
+                I915_WRITE(PIPEA_DP_LINK_M, m_n.link_m);
+                I915_WRITE(PIPEA_DP_LINK_N, m_n.link_n);
+        } else {
+                I915_WRITE(PIPEB_GMCH_DATA_M,
+                       ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
+                       m_n.gmch_m);
+                I915_WRITE(PIPEB_GMCH_DATA_N,
+                       m_n.gmch_n);
+                I915_WRITE(PIPEB_DP_LINK_M, m_n.link_m);
+                I915_WRITE(PIPEB_DP_LINK_N, m_n.link_n);
+        }
+}
+
+static void
+intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
+                  struct drm_display_mode *adjusted_mode)
+{
+        struct intel_output *intel_output = enc_to_intel_output(encoder);
+        struct intel_dp_priv *dp_priv = intel_output->dev_priv;
+        struct drm_crtc *crtc = intel_output->enc.crtc;
+        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+
+        dp_priv->DP = (DP_LINK_TRAIN_OFF |
+                        DP_VOLTAGE_0_4 |
+                        DP_PRE_EMPHASIS_0 |
+                        DP_SYNC_VS_HIGH |
+                        DP_SYNC_HS_HIGH);
+
+        switch (dp_priv->lane_count) {
+        case 1:
+                dp_priv->DP |= DP_PORT_WIDTH_1;
+                break;
+        case 2:
+                dp_priv->DP |= DP_PORT_WIDTH_2;
+                break;
+        case 4:
+                dp_priv->DP |= DP_PORT_WIDTH_4;
+                break;
+        }
+        if (dp_priv->has_audio)
+                dp_priv->DP |= DP_AUDIO_OUTPUT_ENABLE;
+
+        memset(dp_priv->link_configuration, 0, DP_LINK_CONFIGURATION_SIZE);
+        dp_priv->link_configuration[0] = dp_priv->link_bw;
+        dp_priv->link_configuration[1] = dp_priv->lane_count;
+
+        /*
+         * Check for DPCD version > 1.1,
+         * enable enahanced frame stuff in that case
+         */
+        if (dp_priv->dpcd[0] >= 0x11) {
+                dp_priv->link_configuration[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
+                dp_priv->DP |= DP_ENHANCED_FRAMING;
+        }
+
+        if (intel_crtc->pipe == 1)
+                dp_priv->DP |= DP_PIPEB_SELECT;
+}
+
+
+static void
+intel_dp_dpms(struct drm_encoder *encoder, int mode)
+{
+        struct intel_output *intel_output = enc_to_intel_output(encoder);
+        struct intel_dp_priv *dp_priv = intel_output->dev_priv;
+        struct drm_device *dev = intel_output->base.dev;
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        uint32_t dp_reg = I915_READ(dp_priv->output_reg);
+
+        if (mode != DRM_MODE_DPMS_ON) {
+                if (dp_reg & DP_PORT_EN)
+                        intel_dp_link_down(intel_output, dp_priv->DP);
+        } else {
+                if (!(dp_reg & DP_PORT_EN))
+                        intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration);
+        }
+        dp_priv->dpms_mode = mode;
+}
+
+/*
+ * Fetch AUX CH registers 0x202 - 0x207 which contain
+ * link status information
+ */
+static bool
+intel_dp_get_link_status(struct intel_output *intel_output,
+                         uint8_t link_status[DP_LINK_STATUS_SIZE])
+{
+        int ret;
+
+        ret = intel_dp_aux_native_read(intel_output,
+                                       DP_LANE0_1_STATUS,
+                                       link_status, DP_LINK_STATUS_SIZE);
+        if (ret != DP_LINK_STATUS_SIZE)
+                return false;
+        return true;
+}
+
+static uint8_t
+intel_dp_link_status(uint8_t link_status[DP_LINK_STATUS_SIZE],
+                     int r)
+{
+        return link_status[r - DP_LANE0_1_STATUS];
+}
+
+static void
+intel_dp_save(struct drm_connector *connector)
+{
+        struct intel_output *intel_output = to_intel_output(connector);
+        struct drm_device *dev = intel_output->base.dev;
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        struct intel_dp_priv *dp_priv = intel_output->dev_priv;
+
+        dp_priv->save_DP = I915_READ(dp_priv->output_reg);
+        intel_dp_aux_native_read(intel_output, DP_LINK_BW_SET,
+                                 dp_priv->save_link_configuration,
+                                 sizeof (dp_priv->save_link_configuration));
+}
+
+static uint8_t
+intel_get_adjust_request_voltage(uint8_t link_status[DP_LINK_STATUS_SIZE],
+                                 int lane)
+{
+        int         i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
+        int         s = ((lane & 1) ?
+                         DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
+                         DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
+        uint8_t l = intel_dp_link_status(link_status, i);
+
+        return ((l >> s) & 3) << DP_TRAIN_VOLTAGE_SWING_SHIFT;
+}
+
+static uint8_t
+intel_get_adjust_request_pre_emphasis(uint8_t link_status[DP_LINK_STATUS_SIZE],
+                                      int lane)
+{
+        int         i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
+        int         s = ((lane & 1) ?
+                         DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
+                         DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
+        uint8_t l = intel_dp_link_status(link_status, i);
+
+        return ((l >> s) & 3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
+}
+
+
+#if 0
+static char     *voltage_names[] = {
+        "0.4V", "0.6V", "0.8V", "1.2V"
+};
+static char     *pre_emph_names[] = {
+        "0dB", "3.5dB", "6dB", "9.5dB"
+};
+static char     *link_train_names[] = {
+        "pattern 1", "pattern 2", "idle", "off"
+};
+#endif
+
+/*
+ * These are source-specific values; current Intel hardware supports
+ * a maximum voltage of 800mV and a maximum pre-emphasis of 6dB
+ */
+#define I830_DP_VOLTAGE_MAX         DP_TRAIN_VOLTAGE_SWING_800
+
+static uint8_t
+intel_dp_pre_emphasis_max(uint8_t voltage_swing)
+{
+        switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) {
+        case DP_TRAIN_VOLTAGE_SWING_400:
+                return DP_TRAIN_PRE_EMPHASIS_6;
+        case DP_TRAIN_VOLTAGE_SWING_600:
+                return DP_TRAIN_PRE_EMPHASIS_6;
+        case DP_TRAIN_VOLTAGE_SWING_800:
+                return DP_TRAIN_PRE_EMPHASIS_3_5;
+        case DP_TRAIN_VOLTAGE_SWING_1200:
+        default:
+                return DP_TRAIN_PRE_EMPHASIS_0;
+        }
+}
+
+static void
+intel_get_adjust_train(struct intel_output *intel_output,
+                       uint8_t link_status[DP_LINK_STATUS_SIZE],
+                       int lane_count,
+                       uint8_t train_set[4])
+{
+        uint8_t v = 0;
+        uint8_t p = 0;
+        int lane;
+
+        for (lane = 0; lane < lane_count; lane++) {
+                uint8_t this_v = intel_get_adjust_request_voltage(link_status, lane);
+                uint8_t this_p = intel_get_adjust_request_pre_emphasis(link_status, lane);
+
+                if (this_v > v)
+                        v = this_v;
+                if (this_p > p)
+                        p = this_p;
+        }
+
+        if (v >= I830_DP_VOLTAGE_MAX)
+                v = I830_DP_VOLTAGE_MAX | DP_TRAIN_MAX_SWING_REACHED;
+
+        if (p >= intel_dp_pre_emphasis_max(v))
+                p = intel_dp_pre_emphasis_max(v) | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
+
+        for (lane = 0; lane < 4; lane++)
+                train_set[lane] = v | p;
+}
+
+static uint32_t
+intel_dp_signal_levels(uint8_t train_set, int lane_count)
+{
+        uint32_t        signal_levels = 0;
+
+        switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {
+        case DP_TRAIN_VOLTAGE_SWING_400:
+        default:
+                signal_levels |= DP_VOLTAGE_0_4;
+                break;
+        case DP_TRAIN_VOLTAGE_SWING_600:
+                signal_levels |= DP_VOLTAGE_0_6;
+                break;
+        case DP_TRAIN_VOLTAGE_SWING_800:
+                signal_levels |= DP_VOLTAGE_0_8;
+                break;
+        case DP_TRAIN_VOLTAGE_SWING_1200:
+                signal_levels |= DP_VOLTAGE_1_2;
+                break;
+        }
+        switch (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) {
+        case DP_TRAIN_PRE_EMPHASIS_0:
+        default:
+                signal_levels |= DP_PRE_EMPHASIS_0;
+                break;
+        case DP_TRAIN_PRE_EMPHASIS_3_5:
+                signal_levels |= DP_PRE_EMPHASIS_3_5;
+                break;
+        case DP_TRAIN_PRE_EMPHASIS_6:
+                signal_levels |= DP_PRE_EMPHASIS_6;
+                break;
+        case DP_TRAIN_PRE_EMPHASIS_9_5:
+                signal_levels |= DP_PRE_EMPHASIS_9_5;
+                break;
+        }
+        return signal_levels;
+}
+
+static uint8_t
+intel_get_lane_status(uint8_t link_status[DP_LINK_STATUS_SIZE],
+                      int lane)
+{
+        int i = DP_LANE0_1_STATUS + (lane >> 1);
+        int s = (lane & 1) * 4;
+        uint8_t l = intel_dp_link_status(link_status, i);
+
+        return (l >> s) & 0xf;
+}
+
+/* Check for clock recovery is done on all channels */
+static bool
+intel_clock_recovery_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count)
+{
+        int lane;
+        uint8_t lane_status;
+
+        for (lane = 0; lane < lane_count; lane++) {
+                lane_status = intel_get_lane_status(link_status, lane);
+                if ((lane_status & DP_LANE_CR_DONE) == 0)
+                        return false;
+        }
+        return true;
+}
+
+/* Check to see if channel eq is done on all channels */
+#define CHANNEL_EQ_BITS (DP_LANE_CR_DONE|\
+                         DP_LANE_CHANNEL_EQ_DONE|\
+                         DP_LANE_SYMBOL_LOCKED)
+static bool
+intel_channel_eq_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count)
+{
+        uint8_t lane_align;
+        uint8_t lane_status;
+        int lane;
+
+        lane_align = intel_dp_link_status(link_status,
+                                          DP_LANE_ALIGN_STATUS_UPDATED);
+        if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0)
+                return false;
+        for (lane = 0; lane < lane_count; lane++) {
+                lane_status = intel_get_lane_status(link_status, lane);
+                if ((lane_status & CHANNEL_EQ_BITS) != CHANNEL_EQ_BITS)
+                        return false;
+        }
+        return true;
+}
+
+static bool
+intel_dp_set_link_train(struct intel_output *intel_output,
+                        uint32_t dp_reg_value,
+                        uint8_t dp_train_pat,
+                        uint8_t train_set[4],
+                        bool first)
+{
+        struct drm_device *dev = intel_output->base.dev;
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        struct intel_dp_priv *dp_priv = intel_output->dev_priv;
+        int ret;
+
+        I915_WRITE(dp_priv->output_reg, dp_reg_value);
+        POSTING_READ(dp_priv->output_reg);
+        if (first)
+                intel_wait_for_vblank(dev);
+
+        intel_dp_aux_native_write_1(intel_output,
+                                    DP_TRAINING_PATTERN_SET,
+                                    dp_train_pat);
+
+        ret = intel_dp_aux_native_write(intel_output,
+                                        DP_TRAINING_LANE0_SET, train_set, 4);
+        if (ret != 4)
+                return false;
+
+        return true;
+}
+
+static void
+intel_dp_link_train(struct intel_output *intel_output, uint32_t DP,
+                    uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE])
+{
+        struct drm_device *dev = intel_output->base.dev;
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        struct intel_dp_priv *dp_priv = intel_output->dev_priv;
+        uint8_t train_set[4];
+        uint8_t link_status[DP_LINK_STATUS_SIZE];
+        int i;
+        uint8_t voltage;
+        bool clock_recovery = false;
+        bool channel_eq = false;
+        bool first = true;
+        int tries;
+
+        /* Write the link configuration data */
+        intel_dp_aux_native_write(intel_output, 0x100,
+                                  link_configuration, DP_LINK_CONFIGURATION_SIZE);
+
+        DP |= DP_PORT_EN;
+        DP &= ~DP_LINK_TRAIN_MASK;
+        memset(train_set, 0, 4);
+        voltage = 0xff;
+        tries = 0;
+        clock_recovery = false;
+        for (;;) {
+                /* Use train_set[0] to set the voltage and pre emphasis values */
+                uint32_t    signal_levels = intel_dp_signal_levels(train_set[0], dp_priv->lane_count);
+                DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels;
+
+                if (!intel_dp_set_link_train(intel_output, DP | DP_LINK_TRAIN_PAT_1,
+                                             DP_TRAINING_PATTERN_1, train_set, first))
+                        break;
+                first = false;
+                /* Set training pattern 1 */
+
+                udelay(100);
+                if (!intel_dp_get_link_status(intel_output, link_status))
+                        break;
+
+                if (intel_clock_recovery_ok(link_status, dp_priv->lane_count)) {
+                        clock_recovery = true;
+                        break;
+                }
+
+                /* Check to see if we've tried the max voltage */
+                for (i = 0; i < dp_priv->lane_count; i++)
+                        if ((train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0)
+                                break;
+                if (i == dp_priv->lane_count)
+                        break;
+
+                /* Check to see if we've tried the same voltage 5 times */
+                if ((train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) {
+                        ++tries;
+                        if (tries == 5)
+                                break;
+                } else
+                        tries = 0;
+                voltage = train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
+
+                /* Compute new train_set as requested by target */
+                intel_get_adjust_train(intel_output, link_status, dp_priv->lane_count, train_set);
+        }
+
+        /* channel equalization */
+        tries = 0;
+        channel_eq = false;
+        for (;;) {
+                /* Use train_set[0] to set the voltage and pre emphasis values */
+                uint32_t    signal_levels = intel_dp_signal_levels(train_set[0], dp_priv->lane_count);
+                DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels;
+
+                /* channel eq pattern */
+                if (!intel_dp_set_link_train(intel_output, DP | DP_LINK_TRAIN_PAT_2,
+                                             DP_TRAINING_PATTERN_2, train_set,
+                                             false))
+                        break;
+
+                udelay(400);
+                if (!intel_dp_get_link_status(intel_output, link_status))
+                        break;
+
+                if (intel_channel_eq_ok(link_status, dp_priv->lane_count)) {
+                        channel_eq = true;
+                        break;
+                }
+
+                /* Try 5 times */
+                if (tries > 5)
+                        break;
+
+                /* Compute new train_set as requested by target */
+                intel_get_adjust_train(intel_output, link_status, dp_priv->lane_count, train_set);
+                ++tries;
+        }
+
+        I915_WRITE(dp_priv->output_reg, DP | DP_LINK_TRAIN_OFF);
+        POSTING_READ(dp_priv->output_reg);
+        intel_dp_aux_native_write_1(intel_output,
+                                    DP_TRAINING_PATTERN_SET, DP_TRAINING_PATTERN_DISABLE);
+}
+
+static void
+intel_dp_link_down(struct intel_output *intel_output, uint32_t DP)
+{
+        struct drm_device *dev = intel_output->base.dev;
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        struct intel_dp_priv *dp_priv = intel_output->dev_priv;
+
+        I915_WRITE(dp_priv->output_reg, DP & ~DP_PORT_EN);
+        POSTING_READ(dp_priv->output_reg);
+}
+
+static void
+intel_dp_restore(struct drm_connector *connector)
+{
+        struct intel_output *intel_output = to_intel_output(connector);
+        struct intel_dp_priv *dp_priv = intel_output->dev_priv;
+
+        if (dp_priv->save_DP & DP_PORT_EN)
+                intel_dp_link_train(intel_output, dp_priv->save_DP, dp_priv->save_link_configuration);
+        else
+                intel_dp_link_down(intel_output,  dp_priv->save_DP);
+}
+
+/*
+ * According to DP spec
+ * 5.1.2:
+ *  1. Read DPCD
+ *  2. Configure link according to Receiver Capabilities
+ *  3. Use Link Training from 2.5.3.3 and 3.5.1.3
+ *  4. Check link status on receipt of hot-plug interrupt
+ */
+
+static void
+intel_dp_check_link_status(struct intel_output *intel_output)
+{
+        struct intel_dp_priv *dp_priv = intel_output->dev_priv;
+        uint8_t link_status[DP_LINK_STATUS_SIZE];
+
+        if (!intel_output->enc.crtc)
+                return;
+
+        if (!intel_dp_get_link_status(intel_output, link_status)) {
+                intel_dp_link_down(intel_output, dp_priv->DP);
+                return;
+        }
+
+        if (!intel_channel_eq_ok(link_status, dp_priv->lane_count))
+                intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration);
+}
+
+/**
+ * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect DP connection.
+ *
+ * \return true if DP port is connected.
+ * \return false if DP port is disconnected.
+ */
+static enum drm_connector_status
+intel_dp_detect(struct drm_connector *connector)
+{
+        struct intel_output *intel_output = to_intel_output(connector);
+        struct drm_device *dev = intel_output->base.dev;
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        struct intel_dp_priv *dp_priv = intel_output->dev_priv;
+        uint32_t temp, bit;
+        enum drm_connector_status status;
+
+        dp_priv->has_audio = false;
+
+        temp = I915_READ(PORT_HOTPLUG_EN);
+
+        I915_WRITE(PORT_HOTPLUG_EN,
+               temp |
+               DPB_HOTPLUG_INT_EN |
+               DPC_HOTPLUG_INT_EN |
+               DPD_HOTPLUG_INT_EN);
+
+        POSTING_READ(PORT_HOTPLUG_EN);
+
+        switch (dp_priv->output_reg) {
+        case DP_B:
+                bit = DPB_HOTPLUG_INT_STATUS;
+                break;
+        case DP_C:
+                bit = DPC_HOTPLUG_INT_STATUS;
+                break;
+        case DP_D:
+                bit = DPD_HOTPLUG_INT_STATUS;
+                break;
+        default:
+                return connector_status_unknown;
+        }
+
+        temp = I915_READ(PORT_HOTPLUG_STAT);
+
+        if ((temp & bit) == 0)
+                return connector_status_disconnected;
+
+        status = connector_status_disconnected;
+        if (intel_dp_aux_native_read(intel_output,
+                                     0x000, dp_priv->dpcd,
+                                     sizeof (dp_priv->dpcd)) == sizeof (dp_priv->dpcd))
+        {
+                if (dp_priv->dpcd[0] != 0)
+                        status = connector_status_connected;
+        }
+        return status;
+}
+
+static int intel_dp_get_modes(struct drm_connector *connector)
+{
+        struct intel_output *intel_output = to_intel_output(connector);
+
+        /* We should parse the EDID data and find out if it has an audio sink
+         */
+
+        return intel_ddc_get_modes(intel_output);
+}
+
+static void
+intel_dp_destroy (struct drm_connector *connector)
+{
+        struct intel_output *intel_output = to_intel_output(connector);
+
+        if (intel_output->i2c_bus)
+                intel_i2c_destroy(intel_output->i2c_bus);
+        drm_sysfs_connector_remove(connector);
+        drm_connector_cleanup(connector);
+        kfree(intel_output);
+}
+
+static const struct drm_encoder_helper_funcs intel_dp_helper_funcs = {
+        .dpms = intel_dp_dpms,
+        .mode_fixup = intel_dp_mode_fixup,
+        .prepare = intel_encoder_prepare,
+        .mode_set = intel_dp_mode_set,
+        .commit = intel_encoder_commit,
+};
+
+static const struct drm_connector_funcs intel_dp_connector_funcs = {
+        .dpms = drm_helper_connector_dpms,
+        .save = intel_dp_save,
+        .restore = intel_dp_restore,
+        .detect = intel_dp_detect,
+        .fill_modes = drm_helper_probe_single_connector_modes,
+        .destroy = intel_dp_destroy,
+};
+
+static const struct drm_connector_helper_funcs intel_dp_connector_helper_funcs = {
+        .get_modes = intel_dp_get_modes,
+        .mode_valid = intel_dp_mode_valid,
+        .best_encoder = intel_best_encoder,
+};
+
+static void intel_dp_enc_destroy(struct drm_encoder *encoder)
+{
+        drm_encoder_cleanup(encoder);
+}
+
+static const struct drm_encoder_funcs intel_dp_enc_funcs = {
+        .destroy = intel_dp_enc_destroy,
+};
+
+void
+intel_dp_hot_plug(struct intel_output *intel_output)
+{
+        struct intel_dp_priv *dp_priv = intel_output->dev_priv;
+
+        if (dp_priv->dpms_mode == DRM_MODE_DPMS_ON)
+                intel_dp_check_link_status(intel_output);
+}
+
+void
+intel_dp_init(struct drm_device *dev, int output_reg)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        struct drm_connector *connector;
+        struct intel_output *intel_output;
+        struct intel_dp_priv *dp_priv;
+
+        intel_output = kcalloc(sizeof(struct intel_output) + 
+                               sizeof(struct intel_dp_priv), 1, GFP_KERNEL);
+        if (!intel_output)
+                return;
+
+        dp_priv = (struct intel_dp_priv *)(intel_output + 1);
+
+        connector = &intel_output->base;
+        drm_connector_init(dev, connector, &intel_dp_connector_funcs,
+                           DRM_MODE_CONNECTOR_DisplayPort);
+        drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
+
+        intel_output->type = INTEL_OUTPUT_DISPLAYPORT;
+
+        connector->interlace_allowed = true;
+        connector->doublescan_allowed = 0;
+
+        dp_priv->intel_output = intel_output;
+        dp_priv->output_reg = output_reg;
+        dp_priv->has_audio = false;
+        dp_priv->dpms_mode = DRM_MODE_DPMS_ON;
+        intel_output->dev_priv = dp_priv;
+
+        drm_encoder_init(dev, &intel_output->enc, &intel_dp_enc_funcs,
+                         DRM_MODE_ENCODER_TMDS);
+        drm_encoder_helper_add(&intel_output->enc, &intel_dp_helper_funcs);
+
+        drm_mode_connector_attach_encoder(&intel_output->base,
+                                          &intel_output->enc);
+        drm_sysfs_connector_add(connector);
+
+        /* Set up the DDC bus. */
+        intel_dp_i2c_init(intel_output,
+                          (output_reg == DP_B) ? "DPDDC-B" :
+                          (output_reg == DP_C) ? "DPDDC-C" : "DPDDC-D");
+        intel_output->ddc_bus = &dp_priv->adapter;
+        intel_output->hot_plug = intel_dp_hot_plug;
+
+        /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
+         * 0xd.  Failure to do so will result in spurious interrupts being
+         * generated on the port when a cable is not attached.
+         */
+        if (IS_G4X(dev) && !IS_GM45(dev)) {
+                u32 temp = I915_READ(PEG_BAND_GAP_DATA);
+                I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
+        }
+}
diff --git a/drivers/gpu/drm/i915/intel_dp.h b/drivers/gpu/drm/i915/intel_dp.h
new file mode 100644
index 000000000000..2b38054d3b6d
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_dp.h
@@ -0,0 +1,144 @@
+/*
+ * Copyright © 2008 Keith Packard
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that copyright
+ * notice and this permission notice appear in supporting documentation, and
+ * that the name of the copyright holders not be used in advertising or
+ * publicity pertaining to distribution of the software without specific,
+ * written prior permission.  The copyright holders make no representations
+ * about the suitability of this software for any purpose.  It is provided "as
+ * is" without express or implied warranty.
+ *
+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
+ * OF THIS SOFTWARE.
+ */
+
+#ifndef _INTEL_DP_H_
+#define _INTEL_DP_H_
+
+/* From the VESA DisplayPort spec */
+
+#define AUX_NATIVE_WRITE        0x8
+#define AUX_NATIVE_READ         0x9
+#define AUX_I2C_WRITE           0x0
+#define AUX_I2C_READ            0x1
+#define AUX_I2C_STATUS          0x2
+#define AUX_I2C_MOT             0x4
+
+#define AUX_NATIVE_REPLY_ACK    (0x0 << 4)
+#define AUX_NATIVE_REPLY_NACK   (0x1 << 4)
+#define AUX_NATIVE_REPLY_DEFER  (0x2 << 4)
+#define AUX_NATIVE_REPLY_MASK   (0x3 << 4)
+
+#define AUX_I2C_REPLY_ACK       (0x0 << 6)
+#define AUX_I2C_REPLY_NACK      (0x1 << 6)
+#define AUX_I2C_REPLY_DEFER     (0x2 << 6)
+#define AUX_I2C_REPLY_MASK      (0x3 << 6)
+
+/* AUX CH addresses */
+#define DP_LINK_BW_SET          0x100
+# define DP_LINK_BW_1_62                    0x06
+# define DP_LINK_BW_2_7                     0x0a
+
+#define DP_LANE_COUNT_SET       0x101
+# define DP_LANE_COUNT_MASK                 0x0f
+# define DP_LANE_COUNT_ENHANCED_FRAME_EN    (1 << 7)
+
+#define DP_TRAINING_PATTERN_SET 0x102
+
+# define DP_TRAINING_PATTERN_DISABLE        0
+# define DP_TRAINING_PATTERN_1              1
+# define DP_TRAINING_PATTERN_2              2
+# define DP_TRAINING_PATTERN_MASK           0x3
+
+# define DP_LINK_QUAL_PATTERN_DISABLE       (0 << 2)
+# define DP_LINK_QUAL_PATTERN_D10_2         (1 << 2)
+# define DP_LINK_QUAL_PATTERN_ERROR_RATE    (2 << 2)
+# define DP_LINK_QUAL_PATTERN_PRBS7         (3 << 2)
+# define DP_LINK_QUAL_PATTERN_MASK          (3 << 2)
+
+# define DP_RECOVERED_CLOCK_OUT_EN          (1 << 4)
+# define DP_LINK_SCRAMBLING_DISABLE         (1 << 5)
+
+# define DP_SYMBOL_ERROR_COUNT_BOTH         (0 << 6)
+# define DP_SYMBOL_ERROR_COUNT_DISPARITY    (1 << 6)
+# define DP_SYMBOL_ERROR_COUNT_SYMBOL       (2 << 6)
+# define DP_SYMBOL_ERROR_COUNT_MASK         (3 << 6)
+
+#define DP_TRAINING_LANE0_SET               0x103
+#define DP_TRAINING_LANE1_SET               0x104
+#define DP_TRAINING_LANE2_SET               0x105
+#define DP_TRAINING_LANE3_SET               0x106
+
+# define DP_TRAIN_VOLTAGE_SWING_MASK        0x3
+# define DP_TRAIN_VOLTAGE_SWING_SHIFT       0
+# define DP_TRAIN_MAX_SWING_REACHED         (1 << 2)
+# define DP_TRAIN_VOLTAGE_SWING_400         (0 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_600         (1 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_800         (2 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_1200        (3 << 0)
+
+# define DP_TRAIN_PRE_EMPHASIS_MASK         (3 << 3)
+# define DP_TRAIN_PRE_EMPHASIS_0            (0 << 3)
+# define DP_TRAIN_PRE_EMPHASIS_3_5          (1 << 3)
+# define DP_TRAIN_PRE_EMPHASIS_6            (2 << 3)
+# define DP_TRAIN_PRE_EMPHASIS_9_5          (3 << 3)
+
+# define DP_TRAIN_PRE_EMPHASIS_SHIFT        3
+# define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED  (1 << 5)
+
+#define DP_DOWNSPREAD_CTRL                  0x107
+# define DP_SPREAD_AMP_0_5                  (1 << 4)
+
+#define DP_MAIN_LINK_CHANNEL_CODING_SET     0x108
+# define DP_SET_ANSI_8B10B                  (1 << 0)
+
+#define DP_LANE0_1_STATUS                   0x202
+#define DP_LANE2_3_STATUS                   0x203
+
+# define DP_LANE_CR_DONE                    (1 << 0)
+# define DP_LANE_CHANNEL_EQ_DONE            (1 << 1)
+# define DP_LANE_SYMBOL_LOCKED              (1 << 2)
+
+#define DP_LANE_ALIGN_STATUS_UPDATED        0x204
+
+#define DP_INTERLANE_ALIGN_DONE             (1 << 0)
+#define DP_DOWNSTREAM_PORT_STATUS_CHANGED   (1 << 6)
+#define DP_LINK_STATUS_UPDATED              (1 << 7)
+
+#define DP_SINK_STATUS                      0x205
+
+#define DP_RECEIVE_PORT_0_STATUS            (1 << 0)
+#define DP_RECEIVE_PORT_1_STATUS            (1 << 1)
+
+#define DP_ADJUST_REQUEST_LANE0_1           0x206
+#define DP_ADJUST_REQUEST_LANE2_3           0x207
+
+#define DP_ADJUST_VOLTAGE_SWING_LANE0_MASK  0x03
+#define DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT 0
+#define DP_ADJUST_PRE_EMPHASIS_LANE0_MASK   0x0c
+#define DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT  2
+#define DP_ADJUST_VOLTAGE_SWING_LANE1_MASK  0x30
+#define DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT 4
+#define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK   0xc0
+#define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT  6
+
+struct i2c_algo_dp_aux_data {
+        bool running;
+        u16 address;
+        int (*aux_ch) (struct i2c_adapter *adapter,
+                       uint8_t *send, int send_bytes,
+                       uint8_t *recv, int recv_bytes);
+};
+
+int
+i2c_dp_aux_add_bus(struct i2c_adapter *adapter);
+
+#endif /* _INTEL_DP_H_ */
diff --git a/drivers/gpu/drm/i915/intel_dp_i2c.c b/drivers/gpu/drm/i915/intel_dp_i2c.c
new file mode 100644
index 000000000000..4e60f14b1a6d
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_dp_i2c.c
@@ -0,0 +1,272 @@
+/*
+ * Copyright © 2009 Keith Packard
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that copyright
+ * notice and this permission notice appear in supporting documentation, and
+ * that the name of the copyright holders not be used in advertising or
+ * publicity pertaining to distribution of the software without specific,
+ * written prior permission.  The copyright holders make no representations
+ * about the suitability of this software for any purpose.  It is provided "as
+ * is" without express or implied warranty.
+ *
+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
+ * OF THIS SOFTWARE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/i2c.h>
+#include "intel_dp.h"
+
+/* Run a single AUX_CH I2C transaction, writing/reading data as necessary */
+
+#define MODE_I2C_START  1
+#define MODE_I2C_WRITE  2
+#define MODE_I2C_READ   4
+#define MODE_I2C_STOP   8
+
+static int
+i2c_algo_dp_aux_transaction(struct i2c_adapter *adapter, int mode,
+                            uint8_t write_byte, uint8_t *read_byte)
+{
+        struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
+        uint16_t address = algo_data->address;
+        uint8_t msg[5];
+        uint8_t reply[2];
+        int msg_bytes;
+        int reply_bytes;
+        int ret;
+
+        /* Set up the command byte */
+        if (mode & MODE_I2C_READ)
+                msg[0] = AUX_I2C_READ << 4;
+        else
+                msg[0] = AUX_I2C_WRITE << 4;
+
+        if (!(mode & MODE_I2C_STOP))
+                msg[0] |= AUX_I2C_MOT << 4;
+
+        msg[1] = address >> 8;
+        msg[2] = address;
+
+        switch (mode) {
+        case MODE_I2C_WRITE:
+                msg[3] = 0;
+                msg[4] = write_byte;
+                msg_bytes = 5;
+                reply_bytes = 1;
+                break;
+        case MODE_I2C_READ:
+                msg[3] = 0;
+                msg_bytes = 4;
+                reply_bytes = 2;
+                break;
+        default:
+                msg_bytes = 3;
+                reply_bytes = 1;
+                break;
+        }
+
+        for (;;) {
+                ret = (*algo_data->aux_ch)(adapter,
+                                           msg, msg_bytes,
+                                           reply, reply_bytes);
+                if (ret < 0) {
+                        printk(KERN_ERR "aux_ch failed %d\n", ret);
+                        return ret;
+                }
+                switch (reply[0] & AUX_I2C_REPLY_MASK) {
+                case AUX_I2C_REPLY_ACK:
+                        if (mode == MODE_I2C_READ) {
+                                *read_byte = reply[1];
+                        }
+                        return reply_bytes - 1;
+                case AUX_I2C_REPLY_NACK:
+                        printk(KERN_ERR "aux_ch nack\n");
+                        return -EREMOTEIO;
+                case AUX_I2C_REPLY_DEFER:
+                        printk(KERN_ERR "aux_ch defer\n");
+                        udelay(100);
+                        break;
+                default:
+                        printk(KERN_ERR "aux_ch invalid reply 0x%02x\n", reply[0]);
+                        return -EREMOTEIO;
+                }
+        }
+}
+
+/*
+ * I2C over AUX CH
+ */
+
+/*
+ * Send the address. If the I2C link is running, this 'restarts'
+ * the connection with the new address, this is used for doing
+ * a write followed by a read (as needed for DDC)
+ */
+static int
+i2c_algo_dp_aux_address(struct i2c_adapter *adapter, u16 address, bool reading)
+{
+        struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
+        int mode = MODE_I2C_START;
+        int ret;
+
+        if (reading)
+                mode |= MODE_I2C_READ;
+        else
+                mode |= MODE_I2C_WRITE;
+        algo_data->address = address;
+        algo_data->running = true;
+        ret = i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL);
+        return ret;
+}
+
+/*
+ * Stop the I2C transaction. This closes out the link, sending
+ * a bare address packet with the MOT bit turned off
+ */
+static void
+i2c_algo_dp_aux_stop(struct i2c_adapter *adapter, bool reading)
+{
+        struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
+        int mode = MODE_I2C_STOP;
+
+        if (reading)
+                mode |= MODE_I2C_READ;
+        else
+                mode |= MODE_I2C_WRITE;
+        if (algo_data->running) {
+                (void) i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL);
+                algo_data->running = false;
+        }
+}
+
+/*
+ * Write a single byte to the current I2C address, the
+ * the I2C link must be running or this returns -EIO
+ */
+static int
+i2c_algo_dp_aux_put_byte(struct i2c_adapter *adapter, u8 byte)
+{
+        struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
+        int ret;
+
+        if (!algo_data->running)
+                return -EIO;
+
+        ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_WRITE, byte, NULL);
+        return ret;
+}
+
+/*
+ * Read a single byte from the current I2C address, the
+ * I2C link must be running or this returns -EIO
+ */
+static int
+i2c_algo_dp_aux_get_byte(struct i2c_adapter *adapter, u8 *byte_ret)
+{
+        struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
+        int ret;
+
+        if (!algo_data->running)
+                return -EIO;
+
+        ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_READ, 0, byte_ret);
+        return ret;
+}
+
+static int
+i2c_algo_dp_aux_xfer(struct i2c_adapter *adapter,
+                     struct i2c_msg *msgs,
+                     int num)
+{
+        int ret = 0;
+        bool reading = false;
+        int m;
+        int b;
+
+        for (m = 0; m < num; m++) {
+                u16 len = msgs[m].len;
+                u8 *buf = msgs[m].buf;
+                reading = (msgs[m].flags & I2C_M_RD) != 0;
+                ret = i2c_algo_dp_aux_address(adapter, msgs[m].addr, reading);
+                if (ret < 0)
+                        break;
+                if (reading) {
+                        for (b = 0; b < len; b++) {
+                                ret = i2c_algo_dp_aux_get_byte(adapter, &buf[b]);
+                                if (ret < 0)
+                                        break;
+                        }
+                } else {
+                        for (b = 0; b < len; b++) {
+                                ret = i2c_algo_dp_aux_put_byte(adapter, buf[b]);
+                                if (ret < 0)
+                                        break;
+                        }
+                }
+                if (ret < 0)
+                        break;
+        }
+        if (ret >= 0)
+                ret = num;
+        i2c_algo_dp_aux_stop(adapter, reading);
+        printk(KERN_ERR "dp_aux_xfer return %d\n", ret);
+        return ret;
+}
+
+static u32
+i2c_algo_dp_aux_functionality(struct i2c_adapter *adapter)
+{
+        return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
+               I2C_FUNC_SMBUS_READ_BLOCK_DATA |
+               I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
+               I2C_FUNC_10BIT_ADDR;
+}
+
+static const struct i2c_algorithm i2c_dp_aux_algo = {
+        .master_xfer    = i2c_algo_dp_aux_xfer,
+        .functionality  = i2c_algo_dp_aux_functionality,
+};
+
+static void
+i2c_dp_aux_reset_bus(struct i2c_adapter *adapter)
+{
+        (void) i2c_algo_dp_aux_address(adapter, 0, false);
+        (void) i2c_algo_dp_aux_stop(adapter, false);
+                                           
+}
+
+static int
+i2c_dp_aux_prepare_bus(struct i2c_adapter *adapter)
+{
+        adapter->algo = &i2c_dp_aux_algo;
+        adapter->retries = 3;
+        i2c_dp_aux_reset_bus(adapter);
+        return 0;
+}
+
+int
+i2c_dp_aux_add_bus(struct i2c_adapter *adapter)
+{
+        int error;
+        
+        error = i2c_dp_aux_prepare_bus(adapter);
+        if (error)
+                return error;
+        error = i2c_add_adapter(adapter);
+        return error;
+}
+EXPORT_SYMBOL(i2c_dp_aux_add_bus);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index cd4b9c5f715e..004541c935a8 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -54,6 +54,7 @@
 #define INTEL_OUTPUT_LVDS 4
 #define INTEL_OUTPUT_TVOUT 5
 #define INTEL_OUTPUT_HDMI 6
+#define INTEL_OUTPUT_DISPLAYPORT 7
 
 #define INTEL_DVO_CHIP_NONE 0
 #define INTEL_DVO_CHIP_LVDS 1
@@ -65,7 +66,6 @@ struct intel_i2c_chan {
         u32 reg; /* GPIO reg */
         struct i2c_adapter adapter;
         struct i2c_algo_bit_data algo;
-        u8 slave_addr;
 };
 
 struct intel_framebuffer {
@@ -79,11 +79,12 @@ struct intel_output {
 
         struct drm_encoder enc;
         int type;
-        struct intel_i2c_chan *i2c_bus; /* for control functions */
-        struct intel_i2c_chan *ddc_bus; /* for DDC only stuff */
+        struct i2c_adapter *i2c_bus;
+        struct i2c_adapter *ddc_bus;
         bool load_detect_temp;
         bool needs_tv_clock;
         void *dev_priv;
+        void (*hot_plug)(struct intel_output *);
 };
 
 struct intel_crtc {
@@ -104,9 +105,9 @@ struct intel_crtc {
 #define enc_to_intel_output(x) container_of(x, struct intel_output, enc)
 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
 
-struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev, const u32 reg,
-                                        const char *name);
-void intel_i2c_destroy(struct intel_i2c_chan *chan);
+struct i2c_adapter *intel_i2c_create(struct drm_device *dev, const u32 reg,
+                                     const char *name);
+void intel_i2c_destroy(struct i2c_adapter *adapter);
 int intel_ddc_get_modes(struct intel_output *intel_output);
 extern bool intel_ddc_probe(struct intel_output *intel_output);
 void intel_i2c_quirk_set(struct drm_device *dev, bool enable);
@@ -116,6 +117,10 @@ extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
 extern void intel_dvo_init(struct drm_device *dev);
 extern void intel_tv_init(struct drm_device *dev);
 extern void intel_lvds_init(struct drm_device *dev);
+extern void intel_dp_init(struct drm_device *dev, int dp_reg);
+void
+intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
+                 struct drm_display_mode *adjusted_mode);
 
 extern void intel_crtc_load_lut(struct drm_crtc *crtc);
 extern void intel_encoder_prepare (struct drm_encoder *encoder);
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index 1ee3007d6ec0..13bff20930e8 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -384,10 +384,9 @@ void intel_dvo_init(struct drm_device *dev)
 {
         struct intel_output *intel_output;
         struct intel_dvo_device *dvo;
-        struct intel_i2c_chan *i2cbus = NULL;
+        struct i2c_adapter *i2cbus = NULL;
         int ret = 0;
         int i;
-        int gpio_inited = 0;
         int encoder_type = DRM_MODE_ENCODER_NONE;
         intel_output = kzalloc (sizeof(struct intel_output), GFP_KERNEL);
         if (!intel_output)
@@ -420,14 +419,11 @@ void intel_dvo_init(struct drm_device *dev)
                  * It appears that everything is on GPIOE except for panels
                  * on i830 laptops, which are on GPIOB (DVOA).
                  */
-                if (gpio_inited != gpio) {
-                        if (i2cbus != NULL)
-                                intel_i2c_destroy(i2cbus);
-                        if (!(i2cbus = intel_i2c_create(dev, gpio,
-                                gpio == GPIOB ? "DVOI2C_B" : "DVOI2C_E"))) {
-                                continue;
-                        }
-                        gpio_inited = gpio;
+                if (i2cbus != NULL)
+                        intel_i2c_destroy(i2cbus);
+                if (!(i2cbus = intel_i2c_create(dev, gpio,
+                        gpio == GPIOB ? "DVOI2C_B" : "DVOI2C_E"))) {
+                        continue;
                 }
 
                 if (dvo->dev_ops!= NULL)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 4ea2a651b92c..9e30daae37dc 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -31,6 +31,7 @@
 #include "drmP.h"
 #include "drm.h"
 #include "drm_crtc.h"
+#include "drm_edid.h"
 #include "intel_drv.h"
 #include "i915_drm.h"
 #include "i915_drv.h"
@@ -56,8 +57,7 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,
         sdvox = SDVO_ENCODING_HDMI |
                 SDVO_BORDER_ENABLE |
                 SDVO_VSYNC_ACTIVE_HIGH |
-                SDVO_HSYNC_ACTIVE_HIGH |
-                SDVO_NULL_PACKETS_DURING_VSYNC;
+                SDVO_HSYNC_ACTIVE_HIGH;
 
         if (hdmi_priv->has_hdmi_sink)
                 sdvox |= SDVO_AUDIO_ENABLE;
@@ -129,20 +129,26 @@ static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
         return true;
 }
 
-static void
-intel_hdmi_sink_detect(struct drm_connector *connector)
+static enum drm_connector_status
+intel_hdmi_edid_detect(struct drm_connector *connector)
 {
         struct intel_output *intel_output = to_intel_output(connector);
         struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv;
         struct edid *edid = NULL;
+        enum drm_connector_status status = connector_status_disconnected;
 
         edid = drm_get_edid(&intel_output->base,
-                            &intel_output->ddc_bus->adapter);
-        if (edid != NULL) {
-                hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
-                kfree(edid);
+                            intel_output->ddc_bus);
+        hdmi_priv->has_hdmi_sink = false;
+        if (edid) {
+                if (edid->input & DRM_EDID_INPUT_DIGITAL) {
+                        status = connector_status_connected;
+                        hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
+                }
                 intel_output->base.display_info.raw_edid = NULL;
+                kfree(edid);
         }
+        return status;
 }
 
 static enum drm_connector_status
@@ -154,11 +160,7 @@ igdng_hdmi_detect(struct drm_connector *connector)
         /* FIXME hotplug detect */
 
         hdmi_priv->has_hdmi_sink = false;
-        intel_hdmi_sink_detect(connector);
-        if (hdmi_priv->has_hdmi_sink)
-                return connector_status_connected;
-        else
-                return connector_status_disconnected;
+        return intel_hdmi_edid_detect(connector);
 }
 
 static enum drm_connector_status
@@ -201,10 +203,9 @@ intel_hdmi_detect(struct drm_connector *connector)
                 return connector_status_unknown;
         }
 
-        if ((I915_READ(PORT_HOTPLUG_STAT) & bit) != 0) {
-                intel_hdmi_sink_detect(connector);
-                return connector_status_connected;
-        } else
+        if ((I915_READ(PORT_HOTPLUG_STAT) & bit) != 0)
+                return intel_hdmi_edid_detect(connector);
+        else
                 return connector_status_disconnected;
 }
 
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index f7061f68d050..62b8bead7652 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -124,6 +124,7 @@ static void set_data(void *data, int state_high)
  * @output: driver specific output device
  * @reg: GPIO reg to use
  * @name: name for this bus
+ * @slave_addr: slave address (if fixed)
  *
  * Creates and registers a new i2c bus with the Linux i2c layer, for use
  * in output probing and control (e.g. DDC or SDVO control functions).
@@ -139,8 +140,8 @@ static void set_data(void *data, int state_high)
  *   %GPIOH
  * see PRM for details on how these different busses are used.
  */
-struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev, const u32 reg,
-                                        const char *name)
+struct i2c_adapter *intel_i2c_create(struct drm_device *dev, const u32 reg,
+                                     const char *name)
 {
         struct intel_i2c_chan *chan;
 
@@ -174,7 +175,7 @@ struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev, const u32 reg,
         intel_i2c_quirk_set(dev, false);
         udelay(20);
 
-        return chan;
+        return &chan->adapter;
 
 out_free:
         kfree(chan);
@@ -187,11 +188,16 @@ out_free:
  *
  * Unregister the adapter from the i2c layer, then free the structure.
  */
-void intel_i2c_destroy(struct intel_i2c_chan *chan)
+void intel_i2c_destroy(struct i2c_adapter *adapter)
 {
-        if (!chan)
+        struct intel_i2c_chan *chan;
+
+        if (!adapter)
                 return;
 
+        chan = container_of(adapter,
+                            struct intel_i2c_chan,
+                            adapter);
         i2c_del_adapter(&chan->adapter);
         kfree(chan);
 }
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index f073ed8432e8..9564ca44a977 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -39,6 +39,21 @@
 
 #define I915_LVDS "i915_lvds"
 
+/*
+ * the following four scaling options are defined.
+ * #define DRM_MODE_SCALE_NON_GPU       0
+ * #define DRM_MODE_SCALE_FULLSCREEN    1
+ * #define DRM_MODE_SCALE_NO_SCALE      2
+ * #define DRM_MODE_SCALE_ASPECT        3
+ */
+
+/* Private structure for the integrated LVDS support */
+struct intel_lvds_priv {
+        int fitting_mode;
+        u32 pfit_control;
+        u32 pfit_pgm_ratios;
+};
+
 /**
  * Sets the backlight level.
  *
@@ -213,10 +228,27 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
                                   struct drm_display_mode *mode,
                                   struct drm_display_mode *adjusted_mode)
 {
+        /*
+         * float point operation is not supported . So the PANEL_RATIO_FACTOR
+         * is defined, which can avoid the float point computation when
+         * calculating the panel ratio.
+         */
+#define PANEL_RATIO_FACTOR 8192
         struct drm_device *dev = encoder->dev;
         struct drm_i915_private *dev_priv = dev->dev_private;
         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
         struct drm_encoder *tmp_encoder;
+        struct intel_output *intel_output = enc_to_intel_output(encoder);
+        struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
+        u32 pfit_control = 0, pfit_pgm_ratios = 0;
+        int left_border = 0, right_border = 0, top_border = 0;
+        int bottom_border = 0;
+        bool border = 0;
+        int panel_ratio, desired_ratio, vert_scale, horiz_scale;
+        int horiz_ratio, vert_ratio;
+        u32 hsync_width, vsync_width;
+        u32 hblank_width, vblank_width;
+        u32 hsync_pos, vsync_pos;
 
         /* Should never happen!! */
         if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
@@ -232,7 +264,9 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
                         return false;
                 }
         }
-
+        /* If we don't have a panel mode, there is nothing we can do */
+        if (dev_priv->panel_fixed_mode == NULL)
+                return true;
         /*
          * If we have timings from the BIOS for the panel, put them in
          * to the adjusted mode.  The CRTC will be set up for this mode,
@@ -256,6 +290,243 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
                 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
         }
 
+        /* Make sure pre-965s set dither correctly */
+        if (!IS_I965G(dev)) {
+                if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
+                        pfit_control |= PANEL_8TO6_DITHER_ENABLE;
+        }
+
+        /* Native modes don't need fitting */
+        if (adjusted_mode->hdisplay == mode->hdisplay &&
+                        adjusted_mode->vdisplay == mode->vdisplay) {
+                pfit_pgm_ratios = 0;
+                border = 0;
+                goto out;
+        }
+
+        /* 965+ wants fuzzy fitting */
+        if (IS_I965G(dev))
+                pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
+                                        PFIT_FILTER_FUZZY;
+
+        hsync_width = adjusted_mode->crtc_hsync_end -
+                                        adjusted_mode->crtc_hsync_start;
+        vsync_width = adjusted_mode->crtc_vsync_end -
+                                        adjusted_mode->crtc_vsync_start;
+        hblank_width = adjusted_mode->crtc_hblank_end -
+                                        adjusted_mode->crtc_hblank_start;
+        vblank_width = adjusted_mode->crtc_vblank_end -
+                                        adjusted_mode->crtc_vblank_start;
+        /*
+         * Deal with panel fitting options. Figure out how to stretch the
+         * image based on its aspect ratio & the current panel fitting mode.
+         */
+        panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
+                                adjusted_mode->vdisplay;
+        desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
+                                mode->vdisplay;
+        /*
+         * Enable automatic panel scaling for non-native modes so that they fill
+         * the screen.  Should be enabled before the pipe is enabled, according
+         * to register description and PRM.
+         * Change the value here to see the borders for debugging
+         */
+        I915_WRITE(BCLRPAT_A, 0);
+        I915_WRITE(BCLRPAT_B, 0);
+
+        switch (lvds_priv->fitting_mode) {
+        case DRM_MODE_SCALE_NO_SCALE:
+                /*
+                 * For centered modes, we have to calculate border widths &
+                 * heights and modify the values programmed into the CRTC.
+                 */
+                left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
+                right_border = left_border;
+                if (mode->hdisplay & 1)
+                        right_border++;
+                top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
+                bottom_border = top_border;
+                if (mode->vdisplay & 1)
+                        bottom_border++;
+                /* Set active & border values */
+                adjusted_mode->crtc_hdisplay = mode->hdisplay;
+                /* Keep the boder be even */
+                if (right_border & 1)
+                        right_border++;
+                /* use the border directly instead of border minuse one */
+                adjusted_mode->crtc_hblank_start = mode->hdisplay +
+                                                right_border;
+                /* keep the blank width constant */
+                adjusted_mode->crtc_hblank_end =
+                        adjusted_mode->crtc_hblank_start + hblank_width;
+                /* get the hsync pos relative to hblank start */
+                hsync_pos = (hblank_width - hsync_width) / 2;
+                /* keep the hsync pos be even */
+                if (hsync_pos & 1)
+                        hsync_pos++;
+                adjusted_mode->crtc_hsync_start =
+                                adjusted_mode->crtc_hblank_start + hsync_pos;
+                /* keep the hsync width constant */
+                adjusted_mode->crtc_hsync_end =
+                                adjusted_mode->crtc_hsync_start + hsync_width;
+                adjusted_mode->crtc_vdisplay = mode->vdisplay;
+                /* use the border instead of border minus one */
+                adjusted_mode->crtc_vblank_start = mode->vdisplay +
+                                                bottom_border;
+                /* keep the vblank width constant */
+                adjusted_mode->crtc_vblank_end =
+                                adjusted_mode->crtc_vblank_start + vblank_width;
+                /* get the vsync start postion relative to vblank start */
+                vsync_pos = (vblank_width - vsync_width) / 2;
+                adjusted_mode->crtc_vsync_start =
+                                adjusted_mode->crtc_vblank_start + vsync_pos;
+                /* keep the vsync width constant */
+                adjusted_mode->crtc_vsync_end =
+                                adjusted_mode->crtc_vblank_start + vsync_width;
+                border = 1;
+                break;
+        case DRM_MODE_SCALE_ASPECT:
+                /* Scale but preserve the spect ratio */
+                pfit_control |= PFIT_ENABLE;
+                if (IS_I965G(dev)) {
+                        /* 965+ is easy, it does everything in hw */
+                        if (panel_ratio > desired_ratio)
+                                pfit_control |= PFIT_SCALING_PILLAR;
+                        else if (panel_ratio < desired_ratio)
+                                pfit_control |= PFIT_SCALING_LETTER;
+                        else
+                                pfit_control |= PFIT_SCALING_AUTO;
+                } else {
+                        /*
+                         * For earlier chips we have to calculate the scaling
+                         * ratio by hand and program it into the
+                         * PFIT_PGM_RATIO register
+                         */
+                        u32 horiz_bits, vert_bits, bits = 12;
+                        horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
+                                                adjusted_mode->hdisplay;
+                        vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
+                                                adjusted_mode->vdisplay;
+                        horiz_scale = adjusted_mode->hdisplay *
+                                        PANEL_RATIO_FACTOR / mode->hdisplay;
+                        vert_scale = adjusted_mode->vdisplay *
+                                        PANEL_RATIO_FACTOR / mode->vdisplay;
+
+                        /* retain aspect ratio */
+                        if (panel_ratio > desired_ratio) { /* Pillar */
+                                u32 scaled_width;
+                                scaled_width = mode->hdisplay * vert_scale /
+                                                PANEL_RATIO_FACTOR;
+                                horiz_ratio = vert_ratio;
+                                pfit_control |= (VERT_AUTO_SCALE |
+                                                 VERT_INTERP_BILINEAR |
+                                                 HORIZ_INTERP_BILINEAR);
+                                /* Pillar will have left/right borders */
+                                left_border = (adjusted_mode->hdisplay -
+                                                scaled_width) / 2;
+                                right_border = left_border;
+                                if (mode->hdisplay & 1) /* odd resolutions */
+                                        right_border++;
+                                /* keep the border be even */
+                                if (right_border & 1)
+                                        right_border++;
+                                adjusted_mode->crtc_hdisplay = scaled_width;
+                                /* use border instead of border minus one */
+                                adjusted_mode->crtc_hblank_start =
+                                        scaled_width + right_border;
+                                /* keep the hblank width constant */
+                                adjusted_mode->crtc_hblank_end =
+                                        adjusted_mode->crtc_hblank_start +
+                                                        hblank_width;
+                                /*
+                                 * get the hsync start pos relative to
+                                 * hblank start
+                                 */
+                                hsync_pos = (hblank_width - hsync_width) / 2;
+                                /* keep the hsync_pos be even */
+                                if (hsync_pos & 1)
+                                        hsync_pos++;
+                                adjusted_mode->crtc_hsync_start =
+                                        adjusted_mode->crtc_hblank_start +
+                                                        hsync_pos;
+                                /* keept hsync width constant */
+                                adjusted_mode->crtc_hsync_end =
+                                        adjusted_mode->crtc_hsync_start +
+                                                        hsync_width;
+                                border = 1;
+                        } else if (panel_ratio < desired_ratio) { /* letter */
+                                u32 scaled_height = mode->vdisplay *
+                                        horiz_scale / PANEL_RATIO_FACTOR;
+                                vert_ratio = horiz_ratio;
+                                pfit_control |= (HORIZ_AUTO_SCALE |
+                                                 VERT_INTERP_BILINEAR |
+                                                 HORIZ_INTERP_BILINEAR);
+                                /* Letterbox will have top/bottom border */
+                                top_border = (adjusted_mode->vdisplay -
+                                        scaled_height) / 2;
+                                bottom_border = top_border;
+                                if (mode->vdisplay & 1)
+                                        bottom_border++;
+                                adjusted_mode->crtc_vdisplay = scaled_height;
+                                /* use border instead of border minus one */
+                                adjusted_mode->crtc_vblank_start =
+                                        scaled_height + bottom_border;
+                                /* keep the vblank width constant */
+                                adjusted_mode->crtc_vblank_end =
+                                        adjusted_mode->crtc_vblank_start +
+                                                        vblank_width;
+                                /*
+                                 * get the vsync start pos relative to
+                                 * vblank start
+                                 */
+                                vsync_pos = (vblank_width - vsync_width) / 2;
+                                adjusted_mode->crtc_vsync_start =
+                                        adjusted_mode->crtc_vblank_start +
+                                                        vsync_pos;
+                                /* keep the vsync width constant */
+                                adjusted_mode->crtc_vsync_end =
+                                        adjusted_mode->crtc_vsync_start +
+                                                        vsync_width;
+                                border = 1;
+                        } else {
+                        /* Aspects match, Let hw scale both directions */
+                                pfit_control |= (VERT_AUTO_SCALE |
+                                                 HORIZ_AUTO_SCALE |
+                                                 VERT_INTERP_BILINEAR |
+                                                 HORIZ_INTERP_BILINEAR);
+                        }
+                        horiz_bits = (1 << bits) * horiz_ratio /
+                                        PANEL_RATIO_FACTOR;
+                        vert_bits = (1 << bits) * vert_ratio /
+                                        PANEL_RATIO_FACTOR;
+                        pfit_pgm_ratios =
+                                ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
+                                                PFIT_VERT_SCALE_MASK) |
+                                ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
+                                                PFIT_HORIZ_SCALE_MASK);
+                }
+                break;
+
+        case DRM_MODE_SCALE_FULLSCREEN:
+                /*
+                 * Full scaling, even if it changes the aspect ratio.
+                 * Fortunately this is all done for us in hw.
+                 */
+                pfit_control |= PFIT_ENABLE;
+                if (IS_I965G(dev))
+                        pfit_control |= PFIT_SCALING_AUTO;
+                else
+                        pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
+                                         VERT_INTERP_BILINEAR |
+                                         HORIZ_INTERP_BILINEAR);
+                break;
+        default:
+                break;
+        }
+
+out:
+        lvds_priv->pfit_control = pfit_control;
+        lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
         /*
          * XXX: It would be nice to support lower refresh rates on the
          * panels to reduce power consumption, and perhaps match the
@@ -301,8 +572,8 @@ static void intel_lvds_mode_set(struct drm_encoder *encoder,
 {
         struct drm_device *dev = encoder->dev;
         struct drm_i915_private *dev_priv = dev->dev_private;
-        struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
-        u32 pfit_control;
+        struct intel_output *intel_output = enc_to_intel_output(encoder);
+        struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
 
         /*
          * The LVDS pin pair will already have been turned on in the
@@ -319,22 +590,8 @@ static void intel_lvds_mode_set(struct drm_encoder *encoder,
          * screen.  Should be enabled before the pipe is enabled, according to
          * register description and PRM.
          */
-        if (mode->hdisplay != adjusted_mode->hdisplay ||
-            mode->vdisplay != adjusted_mode->vdisplay)
-                pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
-                                HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
-                                HORIZ_INTERP_BILINEAR);
-        else
-                pfit_control = 0;
-
-        if (!IS_I965G(dev)) {
-                if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
-                        pfit_control |= PANEL_8TO6_DITHER_ENABLE;
-        }
-        else
-                pfit_control |= intel_crtc->pipe << PFIT_PIPE_SHIFT;
-
-        I915_WRITE(PFIT_CONTROL, pfit_control);
+        I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
+        I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
 }
 
 /**
@@ -406,6 +663,34 @@ static int intel_lvds_set_property(struct drm_connector *connector,
                                    struct drm_property *property,
                                    uint64_t value)
 {
+        struct drm_device *dev = connector->dev;
+        struct intel_output *intel_output =
+                        to_intel_output(connector);
+
+        if (property == dev->mode_config.scaling_mode_property &&
+                                connector->encoder) {
+                struct drm_crtc *crtc = connector->encoder->crtc;
+                struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
+                if (value == DRM_MODE_SCALE_NON_GPU) {
+                        DRM_DEBUG_KMS(I915_LVDS,
+                                        "non_GPU property is unsupported\n");
+                        return 0;
+                }
+                if (lvds_priv->fitting_mode == value) {
+                        /* the LVDS scaling property is not changed */
+                        return 0;
+                }
+                lvds_priv->fitting_mode = value;
+                if (crtc && crtc->enabled) {
+                        /*
+                         * If the CRTC is enabled, the display will be changed
+                         * according to the new panel fitting mode.
+                         */
+                        drm_crtc_helper_set_mode(crtc, &crtc->mode,
+                                crtc->x, crtc->y, crtc->fb);
+                }
+        }
+
         return 0;
 }
 
@@ -456,7 +741,7 @@ static const struct dmi_system_id intel_no_lvds[] = {
                 .callback = intel_no_lvds_dmi_callback,
                 .ident = "Apple Mac Mini (Core series)",
                 .matches = {
-                        DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
+                        DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
                 },
         },
@@ -464,7 +749,7 @@ static const struct dmi_system_id intel_no_lvds[] = {
                 .callback = intel_no_lvds_dmi_callback,
                 .ident = "Apple Mac Mini (Core 2 series)",
                 .matches = {
-                        DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
+                        DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
                 },
         },
@@ -518,6 +803,7 @@ void intel_lvds_init(struct drm_device *dev)
         struct drm_encoder *encoder;
         struct drm_display_mode *scan; /* *modes, *bios_mode; */
         struct drm_crtc *crtc;
+        struct intel_lvds_priv *lvds_priv;
         u32 lvds;
         int pipe, gpio = GPIOC;
 
@@ -531,7 +817,8 @@ void intel_lvds_init(struct drm_device *dev)
                 gpio = PCH_GPIOC;
         }
 
-        intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
+        intel_output = kzalloc(sizeof(struct intel_output) +
+                                sizeof(struct intel_lvds_priv), GFP_KERNEL);
         if (!intel_output) {
                 return;
         }
@@ -553,7 +840,18 @@ void intel_lvds_init(struct drm_device *dev)
         connector->interlace_allowed = false;
         connector->doublescan_allowed = false;
 
+        lvds_priv = (struct intel_lvds_priv *)(intel_output + 1);
+        intel_output->dev_priv = lvds_priv;
+        /* create the scaling mode property */
+        drm_mode_create_scaling_mode_property(dev);
+        /*
+         * the initial panel fitting mode will be FULL_SCREEN.
+         */
 
+        drm_connector_attach_property(&intel_output->base,
+                                      dev->mode_config.scaling_mode_property,
+                                      DRM_MODE_SCALE_FULLSCREEN);
+        lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
         /*
          * LVDS discovery:
          * 1) check for EDID on DDC
@@ -649,5 +947,5 @@ failed:
         if (intel_output->ddc_bus)
                 intel_i2c_destroy(intel_output->ddc_bus);
         drm_connector_cleanup(connector);
-        kfree(connector);
+        kfree(intel_output);
 }
diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c
index e0910fefce87..67e2f4632a24 100644
--- a/drivers/gpu/drm/i915/intel_modes.c
+++ b/drivers/gpu/drm/i915/intel_modes.c
@@ -53,10 +53,9 @@ bool intel_ddc_probe(struct intel_output *intel_output)
                 }
         };
 
-        intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, true);
-        ret = i2c_transfer(&intel_output->ddc_bus->adapter, msgs, 2);
-        intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, false);
-
+        intel_i2c_quirk_set(intel_output->base.dev, true);
+        ret = i2c_transfer(intel_output->ddc_bus, msgs, 2);
+        intel_i2c_quirk_set(intel_output->base.dev, false);
         if (ret == 2)
                 return true;
 
@@ -74,10 +73,9 @@ int intel_ddc_get_modes(struct intel_output *intel_output)
         struct edid *edid;
         int ret = 0;
 
-        intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, true);
-        edid = drm_get_edid(&intel_output->base,
-                            &intel_output->ddc_bus->adapter);
-        intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, false);
+        intel_i2c_quirk_set(intel_output->base.dev, true);
+        edid = drm_get_edid(&intel_output->base, intel_output->ddc_bus);
+        intel_i2c_quirk_set(intel_output->base.dev, false);
         if (edid) {
                 drm_mode_connector_update_edid_property(&intel_output->base,
                                                         edid);
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 9a00adb3a508..f03473779feb 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -38,8 +38,7 @@
 #undef SDVO_DEBUG
 #define I915_SDVO       "i915_sdvo"
 struct intel_sdvo_priv {
-        struct intel_i2c_chan *i2c_bus;
-        int slaveaddr;
+        u8 slave_addr;
 
         /* Register for the SDVO device: SDVOB or SDVOC */
         int output_device;
@@ -146,13 +145,13 @@ static bool intel_sdvo_read_byte(struct intel_output *intel_output, u8 addr,
 
         struct i2c_msg msgs[] = {
                 {
-                        .addr = sdvo_priv->i2c_bus->slave_addr,
+                        .addr = sdvo_priv->slave_addr >> 1,
                         .flags = 0,
                         .len = 1,
                         .buf = out_buf,
                 },
                 {
-                        .addr = sdvo_priv->i2c_bus->slave_addr,
+                        .addr = sdvo_priv->slave_addr >> 1,
                         .flags = I2C_M_RD,
                         .len = 1,
                         .buf = buf,
@@ -162,7 +161,7 @@ static bool intel_sdvo_read_byte(struct intel_output *intel_output, u8 addr,
         out_buf[0] = addr;
         out_buf[1] = 0;
 
-        if ((ret = i2c_transfer(&sdvo_priv->i2c_bus->adapter, msgs, 2)) == 2)
+        if ((ret = i2c_transfer(intel_output->i2c_bus, msgs, 2)) == 2)
         {
                 *ch = buf[0];
                 return true;
@@ -175,10 +174,11 @@ static bool intel_sdvo_read_byte(struct intel_output *intel_output, u8 addr,
 static bool intel_sdvo_write_byte(struct intel_output *intel_output, int addr,
                                   u8 ch)
 {
+        struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
         u8 out_buf[2];
         struct i2c_msg msgs[] = {
                 {
-                        .addr = intel_output->i2c_bus->slave_addr,
+                        .addr = sdvo_priv->slave_addr >> 1,
                         .flags = 0,
                         .len = 2,
                         .buf = out_buf,
@@ -188,7 +188,7 @@ static bool intel_sdvo_write_byte(struct intel_output *intel_output, int addr,
         out_buf[0] = addr;
         out_buf[1] = ch;
 
-        if (i2c_transfer(&intel_output->i2c_bus->adapter, msgs, 1) == 1)
+        if (i2c_transfer(intel_output->i2c_bus, msgs, 1) == 1)
         {
                 return true;
         }
@@ -1369,9 +1369,8 @@ intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
         struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
         struct edid *edid = NULL;
 
-        intel_sdvo_set_control_bus_switch(intel_output, sdvo_priv->ddc_bus);
         edid = drm_get_edid(&intel_output->base,
-                            &intel_output->ddc_bus->adapter);
+                            intel_output->ddc_bus);
         if (edid != NULL) {
                 sdvo_priv->is_hdmi = drm_detect_hdmi_monitor(edid);
                 kfree(edid);
@@ -1549,7 +1548,6 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
 {
         struct intel_output *intel_output = to_intel_output(connector);
-        struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
         struct drm_i915_private *dev_priv = connector->dev->dev_private;
 
         /*
@@ -1557,8 +1555,6 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
          * Assume that the preferred modes are
          * arranged in priority order.
          */
-        /* set the bus switch and get the modes */
-        intel_sdvo_set_control_bus_switch(intel_output, sdvo_priv->ddc_bus);
         intel_ddc_get_modes(intel_output);
         if (list_empty(&connector->probed_modes) == false)
                 return;
@@ -1709,7 +1705,7 @@ intel_sdvo_chan_to_intel_output(struct intel_i2c_chan *chan)
 
         list_for_each_entry(connector,
                         &dev->mode_config.connector_list, head) {
-                if (to_intel_output(connector)->ddc_bus == chan) {
+                if (to_intel_output(connector)->ddc_bus == &chan->adapter) {
                         intel_output = to_intel_output(connector);
                         break;
                 }
@@ -1723,7 +1719,7 @@ static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap,
         struct intel_output *intel_output;
         struct intel_sdvo_priv *sdvo_priv;
         struct i2c_algo_bit_data *algo_data;
-        struct i2c_algorithm *algo;
+        const struct i2c_algorithm *algo;
 
         algo_data = (struct i2c_algo_bit_data *)i2c_adap->algo_data;
         intel_output =
@@ -1733,7 +1729,7 @@ static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap,
                 return -EINVAL;
 
         sdvo_priv = intel_output->dev_priv;
-        algo = (struct i2c_algorithm *)intel_output->i2c_bus->adapter.algo;
+        algo = intel_output->i2c_bus->algo;
 
         intel_sdvo_set_control_bus_switch(intel_output, sdvo_priv->ddc_bus);
         return algo->master_xfer(i2c_adap, msgs, num);
@@ -1785,13 +1781,11 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
         struct drm_connector *connector;
         struct intel_output *intel_output;
         struct intel_sdvo_priv *sdvo_priv;
-        struct intel_i2c_chan *i2cbus = NULL;
-        struct intel_i2c_chan *ddcbus = NULL;
+
         int connector_type;
         u8 ch[0x40];
         int i;
-        int encoder_type, output_id;
-        u8 slave_addr;
+        int encoder_type;
 
         intel_output = kcalloc(sizeof(struct intel_output)+sizeof(struct intel_sdvo_priv), 1, GFP_KERNEL);
         if (!intel_output) {
@@ -1799,29 +1793,24 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
         }
 
         sdvo_priv = (struct intel_sdvo_priv *)(intel_output + 1);
+        sdvo_priv->output_device = output_device;
+
+        intel_output->dev_priv = sdvo_priv;
         intel_output->type = INTEL_OUTPUT_SDVO;
 
         /* setup the DDC bus. */
         if (output_device == SDVOB)
-                i2cbus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOB");
+                intel_output->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOB");
         else
-                i2cbus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOC");
+                intel_output->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOC");
 
-        if (!i2cbus)
+        if (!intel_output->i2c_bus)
                 goto err_inteloutput;
 
-        slave_addr = intel_sdvo_get_slave_addr(dev, output_device);
-        sdvo_priv->i2c_bus = i2cbus;
+        sdvo_priv->slave_addr = intel_sdvo_get_slave_addr(dev, output_device);
 
-        if (output_device == SDVOB) {
-                output_id = 1;
-        } else {
-                output_id = 2;
-        }
-        sdvo_priv->i2c_bus->slave_addr = slave_addr >> 1;
-        sdvo_priv->output_device = output_device;
-        intel_output->i2c_bus = i2cbus;
-        intel_output->dev_priv = sdvo_priv;
+        /* Save the bit-banging i2c functionality for use by the DDC wrapper */
+        intel_sdvo_i2c_bit_algo.functionality = intel_output->i2c_bus->algo->functionality;
 
         /* Read the regs to test if we can talk to the device */
         for (i = 0; i < 0x40; i++) {
@@ -1835,17 +1824,15 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
 
         /* setup the DDC bus. */
         if (output_device == SDVOB)
-                ddcbus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS");
+                intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS");
         else
-                ddcbus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS");
+                intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS");
 
-        if (ddcbus == NULL)
+        if (intel_output->ddc_bus == NULL)
                 goto err_i2c;
 
-        intel_sdvo_i2c_bit_algo.functionality =
-                intel_output->i2c_bus->adapter.algo->functionality;
-        ddcbus->adapter.algo = &intel_sdvo_i2c_bit_algo;
-        intel_output->ddc_bus = ddcbus;
+        /* Wrap with our custom algo which switches to DDC mode */
+        intel_output->ddc_bus->algo = &intel_sdvo_i2c_bit_algo;
 
         /* In defaut case sdvo lvds is false */
         sdvo_priv->is_lvds = false;
@@ -1965,9 +1952,10 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
         return true;
 
 err_i2c:
-        if (ddcbus != NULL)
+        if (intel_output->ddc_bus != NULL)
                 intel_i2c_destroy(intel_output->ddc_bus);
-        intel_i2c_destroy(intel_output->i2c_bus);
+        if (intel_output->i2c_bus != NULL)
+                intel_i2c_destroy(intel_output->i2c_bus);
 err_inteloutput:
         kfree(intel_output);
 
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index ea68992e4416..a43c98e3f077 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1383,34 +1383,31 @@ intel_tv_detect_type (struct drm_crtc *crtc, struct intel_output *intel_output)
         /*
          * Detect TV by polling)
          */
-        if (intel_output->load_detect_temp) {
-                /* TV not currently running, prod it with destructive detect */
-                save_tv_dac = tv_dac;
-                tv_ctl = I915_READ(TV_CTL);
-                save_tv_ctl = tv_ctl;
-                tv_ctl &= ~TV_ENC_ENABLE;
-                tv_ctl &= ~TV_TEST_MODE_MASK;
-                tv_ctl |= TV_TEST_MODE_MONITOR_DETECT;
-                tv_dac &= ~TVDAC_SENSE_MASK;
-                tv_dac &= ~DAC_A_MASK;
-                tv_dac &= ~DAC_B_MASK;
-                tv_dac &= ~DAC_C_MASK;
-                tv_dac |= (TVDAC_STATE_CHG_EN |
-                           TVDAC_A_SENSE_CTL |
-                           TVDAC_B_SENSE_CTL |
-                           TVDAC_C_SENSE_CTL |
-                           DAC_CTL_OVERRIDE |
-                           DAC_A_0_7_V |
-                           DAC_B_0_7_V |
-                           DAC_C_0_7_V);
-                I915_WRITE(TV_CTL, tv_ctl);
-                I915_WRITE(TV_DAC, tv_dac);
-                intel_wait_for_vblank(dev);
-                tv_dac = I915_READ(TV_DAC);
-                I915_WRITE(TV_DAC, save_tv_dac);
-                I915_WRITE(TV_CTL, save_tv_ctl);
-                intel_wait_for_vblank(dev);
-        }
+        save_tv_dac = tv_dac;
+        tv_ctl = I915_READ(TV_CTL);
+        save_tv_ctl = tv_ctl;
+        tv_ctl &= ~TV_ENC_ENABLE;
+        tv_ctl &= ~TV_TEST_MODE_MASK;
+        tv_ctl |= TV_TEST_MODE_MONITOR_DETECT;
+        tv_dac &= ~TVDAC_SENSE_MASK;
+        tv_dac &= ~DAC_A_MASK;
+        tv_dac &= ~DAC_B_MASK;
+        tv_dac &= ~DAC_C_MASK;
+        tv_dac |= (TVDAC_STATE_CHG_EN |
+                   TVDAC_A_SENSE_CTL |
+                   TVDAC_B_SENSE_CTL |
+                   TVDAC_C_SENSE_CTL |
+                   DAC_CTL_OVERRIDE |
+                   DAC_A_0_7_V |
+                   DAC_B_0_7_V |
+                   DAC_C_0_7_V);
+        I915_WRITE(TV_CTL, tv_ctl);
+        I915_WRITE(TV_DAC, tv_dac);
+        intel_wait_for_vblank(dev);
+        tv_dac = I915_READ(TV_DAC);
+        I915_WRITE(TV_DAC, save_tv_dac);
+        I915_WRITE(TV_CTL, save_tv_ctl);
+        intel_wait_for_vblank(dev);
         /*
          *  A B C
          *  0 1 1 Composite
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index f30aa7274a54..f97563db4e59 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -35,6 +35,23 @@
 #include "atom.h"
 
 /*
+ * Clear GPU surface registers.
+ */
+static void radeon_surface_init(struct radeon_device *rdev)
+{
+        /* FIXME: check this out */
+        if (rdev->family < CHIP_R600) {
+                int i;
+
+                for (i = 0; i < 8; i++) {
+                        WREG32(RADEON_SURFACE0_INFO +
+                               i * (RADEON_SURFACE1_INFO - RADEON_SURFACE0_INFO),
+                               0);
+                }
+        }
+}
+
+/*
  * GPU scratch registers helpers function.
  */
 static void radeon_scratch_init(struct radeon_device *rdev)
@@ -496,6 +513,8 @@ int radeon_device_init(struct radeon_device *rdev,
         radeon_errata(rdev);
         /* Initialize scratch registers */
         radeon_scratch_init(rdev);
+        /* Initialize surface registers */
+        radeon_surface_init(rdev);
 
         /* TODO: disable VGA need to use VGA request */
         /* BIOS*/
@@ -604,9 +623,6 @@ int radeon_device_init(struct radeon_device *rdev,
         if (r) {
                 return r;
         }
-        if (rdev->fbdev_rfb && rdev->fbdev_rfb->obj) {
-                rdev->fbdev_robj = rdev->fbdev_rfb->obj->driver_private;
-        }
         if (!ret) {
                 DRM_INFO("radeon: kernel modesetting successfully initialized.\n");
         }
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index 09c9fb9f6210..84ba69f48784 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -345,7 +345,7 @@ static void __exit radeon_exit(void)
         drm_exit(driver);
 }
 
-late_initcall(radeon_init);
+module_init(radeon_init);
 module_exit(radeon_exit);
 
 MODULE_AUTHOR(DRIVER_AUTHOR);
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index fa86d398945e..9e8f191eb64a 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -478,14 +478,16 @@ int radeonfb_create(struct radeon_device *rdev,
 {
         struct fb_info *info;
         struct radeon_fb_device *rfbdev;
-        struct drm_framebuffer *fb;
+        struct drm_framebuffer *fb = NULL;
         struct radeon_framebuffer *rfb;
         struct drm_mode_fb_cmd mode_cmd;
         struct drm_gem_object *gobj = NULL;
         struct radeon_object *robj = NULL;
         struct device *device = &rdev->pdev->dev;
         int size, aligned_size, ret;
+        u64 fb_gpuaddr;
         void *fbptr = NULL;
+        unsigned long tmp;
 
         mode_cmd.width = surface_width;
         mode_cmd.height = surface_height;
@@ -498,11 +500,12 @@ int radeonfb_create(struct radeon_device *rdev,
         aligned_size = ALIGN(size, PAGE_SIZE);
 
         ret = radeon_gem_object_create(rdev, aligned_size, 0,
-                                       RADEON_GEM_DOMAIN_VRAM,
-                                       false, ttm_bo_type_kernel,
-                                       false, &gobj);
+                        RADEON_GEM_DOMAIN_VRAM,
+                        false, ttm_bo_type_kernel,
+                        false, &gobj);
         if (ret) {
-                printk(KERN_ERR "failed to allocate framebuffer\n");
+                printk(KERN_ERR "failed to allocate framebuffer (%d %d)\n",
+                       surface_width, surface_height);
                 ret = -ENOMEM;
                 goto out;
         }
@@ -515,12 +518,19 @@ int radeonfb_create(struct radeon_device *rdev,
                 ret = -ENOMEM;
                 goto out_unref;
         }
+        ret = radeon_object_pin(robj, RADEON_GEM_DOMAIN_VRAM, &fb_gpuaddr);
+        if (ret) {
+                printk(KERN_ERR "failed to pin framebuffer\n");
+                ret = -ENOMEM;
+                goto out_unref;
+        }
 
         list_add(&fb->filp_head, &rdev->ddev->mode_config.fb_kernel_list);
 
         rfb = to_radeon_framebuffer(fb);
         *rfb_p = rfb;
         rdev->fbdev_rfb = rfb;
+        rdev->fbdev_robj = robj;
 
         info = framebuffer_alloc(sizeof(struct radeon_fb_device), device);
         if (info == NULL) {
@@ -541,13 +551,13 @@ int radeonfb_create(struct radeon_device *rdev,
         info->fix.xpanstep = 1; /* doing it in hw */
         info->fix.ypanstep = 1; /* doing it in hw */
         info->fix.ywrapstep = 0;
-        info->fix.accel = FB_ACCEL_I830;
+        info->fix.accel = FB_ACCEL_NONE;
         info->fix.type_aux = 0;
         info->flags = FBINFO_DEFAULT;
         info->fbops = &radeonfb_ops;
         info->fix.line_length = fb->pitch;
-        info->screen_base = fbptr;
-        info->fix.smem_start = (unsigned long)fbptr;
+        tmp = fb_gpuaddr - rdev->mc.vram_location;
+        info->fix.smem_start = rdev->mc.aper_base + tmp;
         info->fix.smem_len = size;
         info->screen_base = fbptr;
         info->screen_size = size;
@@ -562,8 +572,8 @@ int radeonfb_create(struct radeon_device *rdev,
         info->var.width = -1;
         info->var.xres = fb_width;
         info->var.yres = fb_height;
-        info->fix.mmio_start = pci_resource_start(rdev->pdev, 2);
-        info->fix.mmio_len = pci_resource_len(rdev->pdev, 2);
+        info->fix.mmio_start = 0;
+        info->fix.mmio_len = 0;
         info->pixmap.size = 64*1024;
         info->pixmap.buf_align = 8;
         info->pixmap.access_align = 32;
@@ -644,7 +654,7 @@ out_unref:
         if (robj) {
                 radeon_object_kunmap(robj);
         }
-        if (ret) {
+        if (fb && ret) {
                 list_del(&fb->filp_head);
                 drm_gem_object_unreference(gobj);
                 drm_framebuffer_cleanup(fb);
@@ -813,6 +823,7 @@ int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb)
                 robj = rfb->obj->driver_private;
                 unregister_framebuffer(info);
                 radeon_object_kunmap(robj);
+                radeon_object_unpin(robj);
                 framebuffer_release(info);
         }
 
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index 983e8df5e000..bac0d06c52ac 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -223,7 +223,6 @@ int radeon_object_pin(struct radeon_object *robj, uint32_t domain,
 {
         uint32_t flags;
         uint32_t tmp;
-        void *fbptr;
         int r;
 
         flags = radeon_object_flags_from_domain(domain);
@@ -242,10 +241,6 @@ int radeon_object_pin(struct radeon_object *robj, uint32_t domain,
                 DRM_ERROR("radeon: failed to reserve object for pinning it.\n");
                 return r;
         }
-        if (robj->rdev->fbdev_robj == robj) {
-                mutex_lock(&robj->rdev->fbdev_info->lock);
-                radeon_object_kunmap(robj);
-        }
         tmp = robj->tobj.mem.placement;
         ttm_flag_masked(&tmp, flags, TTM_PL_MASK_MEM);
         robj->tobj.proposed_placement = tmp | TTM_PL_FLAG_NO_EVICT | TTM_PL_MASK_CACHING;
@@ -261,23 +256,12 @@ int radeon_object_pin(struct radeon_object *robj, uint32_t domain,
                 DRM_ERROR("radeon: failed to pin object.\n");
         }
         radeon_object_unreserve(robj);
-        if (robj->rdev->fbdev_robj == robj) {
-                if (!r) {
-                        r = radeon_object_kmap(robj, &fbptr);
-                }
-                if (!r) {
-                        robj->rdev->fbdev_info->screen_base = fbptr;
-                        robj->rdev->fbdev_info->fix.smem_start = (unsigned long)fbptr;
-                }
-                mutex_unlock(&robj->rdev->fbdev_info->lock);
-        }
         return r;
 }
 
 void radeon_object_unpin(struct radeon_object *robj)
 {
         uint32_t flags;
-        void *fbptr;
         int r;
 
         spin_lock(&robj->tobj.lock);
@@ -297,10 +281,6 @@ void radeon_object_unpin(struct radeon_object *robj)
                 DRM_ERROR("radeon: failed to reserve object for unpinning it.\n");
                 return;
         }
-        if (robj->rdev->fbdev_robj == robj) {
-                mutex_lock(&robj->rdev->fbdev_info->lock);
-                radeon_object_kunmap(robj);
-        }
         flags = robj->tobj.mem.placement;
         robj->tobj.proposed_placement = flags & ~TTM_PL_FLAG_NO_EVICT;
         r = ttm_buffer_object_validate(&robj->tobj,
@@ -310,16 +290,6 @@ void radeon_object_unpin(struct radeon_object *robj)
                 DRM_ERROR("radeon: failed to unpin buffer.\n");
         }
         radeon_object_unreserve(robj);
-        if (robj->rdev->fbdev_robj == robj) {
-                if (!r) {
-                        r = radeon_object_kmap(robj, &fbptr);
-                }
-                if (!r) {
-                        robj->rdev->fbdev_info->screen_base = fbptr;
-                        robj->rdev->fbdev_info->fix.smem_start = (unsigned long)fbptr;
-                }
-                mutex_unlock(&robj->rdev->fbdev_info->lock);
-        }
 }
 
 int radeon_object_wait(struct radeon_object *robj)
diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c
index 517c84559633..bdec583901eb 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_util.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
@@ -34,7 +34,6 @@
 #include <linux/highmem.h>
 #include <linux/wait.h>
 #include <linux/vmalloc.h>
-#include <linux/version.h>
 #include <linux/module.h>
 
 void ttm_bo_free_old_node(struct ttm_buffer_object *bo)
diff --git a/drivers/gpu/drm/ttm/ttm_bo_vm.c b/drivers/gpu/drm/ttm/ttm_bo_vm.c
index 27b146c54fbc..40b75032ea47 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_vm.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_vm.c
@@ -32,7 +32,6 @@
 #include <ttm/ttm_bo_driver.h>
 #include <ttm/ttm_placement.h>
 #include <linux/mm.h>
-#include <linux/version.h>
 #include <linux/rbtree.h>
 #include <linux/module.h>
 #include <linux/uaccess.h>
diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c
index 0331fa74cd3f..75dc8bd24592 100644
--- a/drivers/gpu/drm/ttm/ttm_tt.c
+++ b/drivers/gpu/drm/ttm/ttm_tt.c
@@ -28,7 +28,6 @@
  * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
  */
 
-#include <linux/version.h>
 #include <linux/vmalloc.h>
 #include <linux/sched.h>
 #include <linux/highmem.h>
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index aa87b6a3bbef..8206442fbabd 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -328,6 +328,7 @@ config I2C_DAVINCI
 
 config I2C_DESIGNWARE
         tristate "Synopsys DesignWare"
+        depends on HAVE_CLK
         help
           If you say yes to this option, support will be included for the
           Synopsys DesignWare I2C adapter. Only master mode is supported.
diff --git a/drivers/ide/cs5520.c b/drivers/ide/cs5520.c
index bd066bb9d611..09f98ed0731f 100644
--- a/drivers/ide/cs5520.c
+++ b/drivers/ide/cs5520.c
@@ -135,6 +135,7 @@ static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_devic
 
         ide_pci_setup_ports(dev, d, &hw[0], &hws[0]);
         hw[0].irq = 14;
+        hw[1].irq = 15;
 
         return ide_host_add(d, hws, 2, NULL);
 }
diff --git a/drivers/ide/ide-cd.c b/drivers/ide/ide-cd.c
index 4a19686fcfe9..f0ede5953af8 100644
--- a/drivers/ide/ide-cd.c
+++ b/drivers/ide/ide-cd.c
@@ -876,9 +876,12 @@ static int cdrom_read_capacity(ide_drive_t *drive, unsigned long *capacity,
                 return stat;
 
         /*
-         * Sanity check the given block size
+         * Sanity check the given block size, in so far as making
+         * sure the sectors_per_frame we give to the caller won't
+         * end up being bogus.
          */
         blocklen = be32_to_cpu(capbuf.blocklen);
+        blocklen = (blocklen >> SECTOR_BITS) << SECTOR_BITS;
         switch (blocklen) {
         case 512:
         case 1024:
@@ -886,10 +889,9 @@ static int cdrom_read_capacity(ide_drive_t *drive, unsigned long *capacity,
         case 4096:
                 break;
         default:
-                printk(KERN_ERR PFX "%s: weird block size %u\n",
+                printk_once(KERN_ERR PFX "%s: weird block size %u; "
+                                "setting default block size to 2048\n",
                                 drive->name, blocklen);
-                printk(KERN_ERR PFX "%s: default to 2kb block size\n",
-                                drive->name);
                 blocklen = 2048;
                 break;
         }
diff --git a/drivers/ide/ide-dma.c b/drivers/ide/ide-dma.c
index 219e6fb78dc6..ee58c88dee5a 100644
--- a/drivers/ide/ide-dma.c
+++ b/drivers/ide/ide-dma.c
@@ -361,9 +361,6 @@ static int ide_tune_dma(ide_drive_t *drive)
         if (__ide_dma_bad_drive(drive))
                 return 0;
 
-        if (ide_id_dma_bug(drive))
-                return 0;
-
         if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
                 return config_drive_for_dma(drive);
 
@@ -394,24 +391,6 @@ static int ide_dma_check(ide_drive_t *drive)
         return -1;
 }
 
-int ide_id_dma_bug(ide_drive_t *drive)
-{
-        u16 *id = drive->id;
-
-        if (id[ATA_ID_FIELD_VALID] & 4) {
-                if ((id[ATA_ID_UDMA_MODES] >> 8) &&
-                    (id[ATA_ID_MWDMA_MODES] >> 8))
-                        goto err_out;
-        } else if ((id[ATA_ID_MWDMA_MODES] >> 8) &&
-                   (id[ATA_ID_SWDMA_MODES] >> 8))
-                goto err_out;
-
-        return 0;
-err_out:
-        printk(KERN_ERR "%s: bad DMA info in identify block\n", drive->name);
-        return 1;
-}
-
 int ide_set_dma(ide_drive_t *drive)
 {
         int rc;
diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c
index 1059f809b809..93b7886a2d6e 100644
--- a/drivers/ide/ide-io.c
+++ b/drivers/ide/ide-io.c
@@ -476,10 +476,14 @@ void do_ide_request(struct request_queue *q)
 
         if (!ide_lock_port(hwif)) {
                 ide_hwif_t *prev_port;
-
-                WARN_ON_ONCE(hwif->rq);
 repeat:
                 prev_port = hwif->host->cur_port;
+
+                if (drive->dev_flags & IDE_DFLAG_BLOCKED)
+                        rq = hwif->rq;
+                else
+                        WARN_ON_ONCE(hwif->rq);
+
                 if (drive->dev_flags & IDE_DFLAG_SLEEPING &&
                     time_after(drive->sleep, jiffies)) {
                         ide_unlock_port(hwif);
@@ -506,43 +510,29 @@ repeat:
                 hwif->cur_dev = drive;
                 drive->dev_flags &= ~(IDE_DFLAG_SLEEPING | IDE_DFLAG_PARKED);
 
-                spin_unlock_irq(&hwif->lock);
-                spin_lock_irq(q->queue_lock);
-                /*
-                 * we know that the queue isn't empty, but this can happen
-                 * if the q->prep_rq_fn() decides to kill a request
-                 */
-                if (!rq)
+                if (rq == NULL) {
+                        spin_unlock_irq(&hwif->lock);
+                        spin_lock_irq(q->queue_lock);
+                        /*
+                         * we know that the queue isn't empty, but this can
+                         * happen if ->prep_rq_fn() decides to kill a request
+                         */
                         rq = blk_fetch_request(drive->queue);
+                        spin_unlock_irq(q->queue_lock);
+                        spin_lock_irq(&hwif->lock);
 
-                spin_unlock_irq(q->queue_lock);
-                spin_lock_irq(&hwif->lock);
-
-                if (!rq) {
-                        ide_unlock_port(hwif);
-                        goto out;
+                        if (rq == NULL) {
+                                ide_unlock_port(hwif);
+                                goto out;
+                        }
                 }
 
                 /*
                  * Sanity: don't accept a request that isn't a PM request
-                 * if we are currently power managed. This is very important as
-                 * blk_stop_queue() doesn't prevent the blk_fetch_request()
-                 * above to return us whatever is in the queue. Since we call
-                 * ide_do_request() ourselves, we end up taking requests while
-                 * the queue is blocked...
-                 * 
-                 * We let requests forced at head of queue with ide-preempt
-                 * though. I hope that doesn't happen too much, hopefully not
-                 * unless the subdriver triggers such a thing in its own PM
-                 * state machine.
+                 * if we are currently power managed.
                  */
-                if ((drive->dev_flags & IDE_DFLAG_BLOCKED) &&
-                    blk_pm_request(rq) == 0 &&
-                    (rq->cmd_flags & REQ_PREEMPT) == 0) {
-                        /* there should be no pending command at this point */
-                        ide_unlock_port(hwif);
-                        goto plug_device;
-                }
+                BUG_ON((drive->dev_flags & IDE_DFLAG_BLOCKED) &&
+                       blk_pm_request(rq) == 0);
 
                 hwif->rq = rq;
 
diff --git a/drivers/ide/ide-iops.c b/drivers/ide/ide-iops.c
index fa047150a1c6..2892b242bbe1 100644
--- a/drivers/ide/ide-iops.c
+++ b/drivers/ide/ide-iops.c
@@ -210,6 +210,7 @@ EXPORT_SYMBOL_GPL(ide_in_drive_list);
  */
 static const struct drive_list_entry ivb_list[] = {
         { "QUANTUM FIREBALLlct10 05"    , "A03.0900"    },
+        { "QUANTUM FIREBALLlct20 30"    , "APL.0900"    },
         { "TSSTcorp CDDVDW SH-S202J"    , "SB00"        },
         { "TSSTcorp CDDVDW SH-S202J"    , "SB01"        },
         { "TSSTcorp CDDVDW SH-S202N"    , "SB00"        },
@@ -329,9 +330,6 @@ int ide_driveid_update(ide_drive_t *drive)
 
         kfree(id);
 
-        if ((drive->dev_flags & IDE_DFLAG_USING_DMA) && ide_id_dma_bug(drive))
-                ide_dma_off(drive);
-
         return 1;
 out_err:
         if (rc == 2)
diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c
index 51af4eea0d36..1bb106f6221a 100644
--- a/drivers/ide/ide-probe.c
+++ b/drivers/ide/ide-probe.c
@@ -818,6 +818,24 @@ static int ide_port_setup_devices(ide_hwif_t *hwif)
         return j;
 }
 
+static void ide_host_enable_irqs(struct ide_host *host)
+{
+        ide_hwif_t *hwif;
+        int i;
+
+        ide_host_for_each_port(i, hwif, host) {
+                if (hwif == NULL)
+                        continue;
+
+                /* clear any pending IRQs */
+                hwif->tp_ops->read_status(hwif);
+
+                /* unmask IRQs */
+                if (hwif->io_ports.ctl_addr)
+                        hwif->tp_ops->write_devctl(hwif, ATA_DEVCTL_OBS);
+        }
+}
+
 /*
  * This routine sets up the IRQ for an IDE interface.
  */
@@ -831,9 +849,6 @@ static int init_irq (ide_hwif_t *hwif)
         if (irq_handler == NULL)
                 irq_handler = ide_intr;
 
-        if (io_ports->ctl_addr)
-                hwif->tp_ops->write_devctl(hwif, ATA_DEVCTL_OBS);
-
         if (request_irq(hwif->irq, irq_handler, sa, hwif->name, hwif))
                 goto out_up;
 
@@ -1404,6 +1419,8 @@ int ide_host_register(struct ide_host *host, const struct ide_port_info *d,
                         ide_port_tune_devices(hwif);
         }
 
+        ide_host_enable_irqs(host);
+
         ide_host_for_each_port(i, hwif, host) {
                 if (hwif == NULL)
                         continue;
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index 9b60b6b684d9..7c8e7122aaa9 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -75,6 +75,7 @@ config LEDS_ALIX2
         depends on LEDS_CLASS && X86 && EXPERIMENTAL
         help
           This option enables support for the PCEngines ALIX.2 and ALIX.3 LEDs.
+          You have to set leds-alix2.force=1 for boards with Award BIOS.
 
 config LEDS_H1940
         tristate "LED Support for iPAQ H1940 device"
@@ -145,15 +146,16 @@ config LEDS_GPIO_OF
           of_platform devices.  For instance, LEDs which are listed in a "dts"
           file.
 
-config LEDS_LP5521
-        tristate "LED Support for the LP5521 LEDs"
+config LEDS_LP3944
+        tristate "LED Support for N.S. LP3944 (Fun Light) I2C chip"
         depends on LEDS_CLASS && I2C
         help
-          If you say 'Y' here you get support for the National Semiconductor
-          LP5521 LED driver used in n8x0 boards.
+    This option enables support for LEDs connected to the National
+    Semiconductor LP3944 Lighting Management Unit (LMU) also known as
+    Fun Light Chip.
 
-          This driver can be built as a module by choosing 'M'. The module
-          will be called leds-lp5521.
+          To compile this driver as a module, choose M here: the
+          module will be called leds-lp3944.
 
 config LEDS_CLEVO_MAIL
         tristate "Mail LED on Clevo notebook"
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
index 2d41c4dcf92f..e8cdcf77a4c3 100644
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_LEDS_COBALT_RAQ)		+= leds-cobalt-raq.o
 obj-$(CONFIG_LEDS_SUNFIRE)              += leds-sunfire.o
 obj-$(CONFIG_LEDS_PCA9532)              += leds-pca9532.o
 obj-$(CONFIG_LEDS_GPIO)                 += leds-gpio.o
+obj-$(CONFIG_LEDS_LP3944)               += leds-lp3944.o
 obj-$(CONFIG_LEDS_CLEVO_MAIL)           += leds-clevo-mail.o
 obj-$(CONFIG_LEDS_HP6XX)                += leds-hp6xx.o
 obj-$(CONFIG_LEDS_FSG)                  += leds-fsg.o
diff --git a/drivers/leds/leds-alix2.c b/drivers/leds/leds-alix2.c
index ddbd7730dfc8..731d4eef3425 100644
--- a/drivers/leds/leds-alix2.c
+++ b/drivers/leds/leds-alix2.c
@@ -14,7 +14,7 @@
 
 static int force = 0;
 module_param(force, bool, 0444);
-MODULE_PARM_DESC(force, "Assume system has ALIX.2 style LEDs");
+MODULE_PARM_DESC(force, "Assume system has ALIX.2/ALIX.3 style LEDs");
 
 struct alix_led {
         struct led_classdev cdev;
@@ -155,6 +155,11 @@ static int __init alix_led_init(void)
                 goto out;
         }
 
+        /* enable output on GPIO for LED 1,2,3 */
+        outl(1 << 6, 0x6104);
+        outl(1 << 9, 0x6184);
+        outl(1 << 11, 0x6184);
+
         pdev = platform_device_register_simple(KBUILD_MODNAME, -1, NULL, 0);
         if (!IS_ERR(pdev)) {
                 ret = platform_driver_probe(&alix_led_driver, alix_led_probe);
diff --git a/drivers/leds/leds-bd2802.c b/drivers/leds/leds-bd2802.c
index 4149ecb3a9b2..779d7f262c04 100644
--- a/drivers/leds/leds-bd2802.c
+++ b/drivers/leds/leds-bd2802.c
@@ -97,6 +97,10 @@ struct bd2802_led {
         enum led_ids                    led_id;
         enum led_colors                 color;
         enum led_bits                   state;
+
+        /* General attributes of RGB LEDs */
+        int                             wave_pattern;
+        int                             rgb_current;
 };
 
 
@@ -254,7 +258,7 @@ static void bd2802_set_on(struct bd2802_led *led, enum led_ids id,
                 bd2802_reset_cancel(led);
 
         reg = bd2802_get_reg_addr(id, color, BD2802_REG_CURRENT1SETUP);
-        bd2802_write_byte(led->client, reg, BD2802_CURRENT_032);
+        bd2802_write_byte(led->client, reg, led->rgb_current);
         reg = bd2802_get_reg_addr(id, color, BD2802_REG_CURRENT2SETUP);
         bd2802_write_byte(led->client, reg, BD2802_CURRENT_000);
         reg = bd2802_get_reg_addr(id, color, BD2802_REG_WAVEPATTERN);
@@ -275,9 +279,9 @@ static void bd2802_set_blink(struct bd2802_led *led, enum led_ids id,
         reg = bd2802_get_reg_addr(id, color, BD2802_REG_CURRENT1SETUP);
         bd2802_write_byte(led->client, reg, BD2802_CURRENT_000);
         reg = bd2802_get_reg_addr(id, color, BD2802_REG_CURRENT2SETUP);
-        bd2802_write_byte(led->client, reg, BD2802_CURRENT_032);
+        bd2802_write_byte(led->client, reg, led->rgb_current);
         reg = bd2802_get_reg_addr(id, color, BD2802_REG_WAVEPATTERN);
-        bd2802_write_byte(led->client, reg, BD2802_PATTERN_HALF);
+        bd2802_write_byte(led->client, reg, led->wave_pattern);
 
         bd2802_enable(led, id);
         bd2802_update_state(led, id, color, BD2802_BLINK);
@@ -406,7 +410,7 @@ static void bd2802_enable_adv_conf(struct bd2802_led *led)
                 ret = device_create_file(&led->client->dev,
                                                 bd2802_addr_attributes[i]);
                 if (ret) {
-                        dev_err(&led->client->dev, "failed to sysfs file %s\n",
+                        dev_err(&led->client->dev, "failed: sysfs file %s\n",
                                         bd2802_addr_attributes[i]->attr.name);
                         goto failed_remove_files;
                 }
@@ -483,6 +487,52 @@ static struct device_attribute bd2802_adv_conf_attr = {
         .store = bd2802_store_adv_conf,
 };
 
+#define BD2802_CONTROL_ATTR(attr_name, name_str)                        \
+static ssize_t bd2802_show_##attr_name(struct device *dev,              \
+        struct device_attribute *attr, char *buf)                       \
+{                                                                       \
+        struct bd2802_led *led = i2c_get_clientdata(to_i2c_client(dev));\
+        ssize_t ret;                                                    \
+        down_read(&led->rwsem);                                         \
+        ret = sprintf(buf, "0x%02x\n", led->attr_name);                 \
+        up_read(&led->rwsem);                                           \
+        return ret;                                                     \
+}                                                                       \
+static ssize_t bd2802_store_##attr_name(struct device *dev,             \
+        struct device_attribute *attr, const char *buf, size_t count)   \
+{                                                                       \
+        struct bd2802_led *led = i2c_get_clientdata(to_i2c_client(dev));\
+        unsigned long val;                                              \
+        int ret;                                                        \
+        if (!count)                                                     \
+                return -EINVAL;                                         \
+        ret = strict_strtoul(buf, 16, &val);                            \
+        if (ret)                                                        \
+                return ret;                                             \
+        down_write(&led->rwsem);                                        \
+        led->attr_name = val;                                           \
+        up_write(&led->rwsem);                                          \
+        return count;                                                   \
+}                                                                       \
+static struct device_attribute bd2802_##attr_name##_attr = {            \
+        .attr = {                                                       \
+                .name = name_str,                                       \
+                .mode = 0644,                                           \
+                .owner = THIS_MODULE                                    \
+        },                                                              \
+        .show = bd2802_show_##attr_name,                                \
+        .store = bd2802_store_##attr_name,                              \
+};
+
+BD2802_CONTROL_ATTR(wave_pattern, "wave_pattern");
+BD2802_CONTROL_ATTR(rgb_current, "rgb_current");
+
+static struct device_attribute *bd2802_attributes[] = {
+        &bd2802_adv_conf_attr,
+        &bd2802_wave_pattern_attr,
+        &bd2802_rgb_current_attr,
+};
+
 static void bd2802_led_work(struct work_struct *work)
 {
         struct bd2802_led *led = container_of(work, struct bd2802_led, work);
@@ -538,7 +588,6 @@ static int bd2802_register_led_classdev(struct bd2802_led *led)
         led->cdev_led1r.brightness = LED_OFF;
         led->cdev_led1r.brightness_set = bd2802_set_led1r_brightness;
         led->cdev_led1r.blink_set = bd2802_set_led1r_blink;
-        led->cdev_led1r.flags |= LED_CORE_SUSPENDRESUME;
 
         ret = led_classdev_register(&led->client->dev, &led->cdev_led1r);
         if (ret < 0) {
@@ -551,7 +600,6 @@ static int bd2802_register_led_classdev(struct bd2802_led *led)
         led->cdev_led1g.brightness = LED_OFF;
         led->cdev_led1g.brightness_set = bd2802_set_led1g_brightness;
         led->cdev_led1g.blink_set = bd2802_set_led1g_blink;
-        led->cdev_led1g.flags |= LED_CORE_SUSPENDRESUME;
 
         ret = led_classdev_register(&led->client->dev, &led->cdev_led1g);
         if (ret < 0) {
@@ -564,7 +612,6 @@ static int bd2802_register_led_classdev(struct bd2802_led *led)
         led->cdev_led1b.brightness = LED_OFF;
         led->cdev_led1b.brightness_set = bd2802_set_led1b_brightness;
         led->cdev_led1b.blink_set = bd2802_set_led1b_blink;
-        led->cdev_led1b.flags |= LED_CORE_SUSPENDRESUME;
 
         ret = led_classdev_register(&led->client->dev, &led->cdev_led1b);
         if (ret < 0) {
@@ -577,7 +624,6 @@ static int bd2802_register_led_classdev(struct bd2802_led *led)
         led->cdev_led2r.brightness = LED_OFF;
         led->cdev_led2r.brightness_set = bd2802_set_led2r_brightness;
         led->cdev_led2r.blink_set = bd2802_set_led2r_blink;
-        led->cdev_led2r.flags |= LED_CORE_SUSPENDRESUME;
 
         ret = led_classdev_register(&led->client->dev, &led->cdev_led2r);
         if (ret < 0) {
@@ -590,7 +636,6 @@ static int bd2802_register_led_classdev(struct bd2802_led *led)
         led->cdev_led2g.brightness = LED_OFF;
         led->cdev_led2g.brightness_set = bd2802_set_led2g_brightness;
         led->cdev_led2g.blink_set = bd2802_set_led2g_blink;
-        led->cdev_led2g.flags |= LED_CORE_SUSPENDRESUME;
 
         ret = led_classdev_register(&led->client->dev, &led->cdev_led2g);
         if (ret < 0) {
@@ -640,7 +685,7 @@ static int __devinit bd2802_probe(struct i2c_client *client,
 {
         struct bd2802_led *led;
         struct bd2802_led_platform_data *pdata;
-        int ret;
+        int ret, i;
 
         led = kzalloc(sizeof(struct bd2802_led), GFP_KERNEL);
         if (!led) {
@@ -670,13 +715,20 @@ static int __devinit bd2802_probe(struct i2c_client *client,
         /* To save the power, reset BD2802 after detecting */
         gpio_set_value(led->pdata->reset_gpio, 0);
 
+        /* Default attributes */
+        led->wave_pattern = BD2802_PATTERN_HALF;
+        led->rgb_current = BD2802_CURRENT_032;
+
         init_rwsem(&led->rwsem);
 
-        ret = device_create_file(&client->dev, &bd2802_adv_conf_attr);
-        if (ret) {
-                dev_err(&client->dev, "failed to create sysfs file %s\n",
-                                        bd2802_adv_conf_attr.attr.name);
-                goto failed_free;
+        for (i = 0; i < ARRAY_SIZE(bd2802_attributes); i++) {
+                ret = device_create_file(&led->client->dev,
+                                                bd2802_attributes[i]);
+                if (ret) {
+                        dev_err(&led->client->dev, "failed: sysfs file %s\n",
+                                        bd2802_attributes[i]->attr.name);
+                        goto failed_unregister_dev_file;
+                }
         }
 
         ret = bd2802_register_led_classdev(led);
@@ -686,7 +738,8 @@ static int __devinit bd2802_probe(struct i2c_client *client,
         return 0;
 
 failed_unregister_dev_file:
-        device_remove_file(&client->dev, &bd2802_adv_conf_attr);
+        for (i--; i >= 0; i--)
+                device_remove_file(&led->client->dev, bd2802_attributes[i]);
 failed_free:
         i2c_set_clientdata(client, NULL);
         kfree(led);
@@ -697,12 +750,14 @@ failed_free:
 static int __exit bd2802_remove(struct i2c_client *client)
 {
         struct bd2802_led *led = i2c_get_clientdata(client);
+        int i;
 
-        bd2802_unregister_led_classdev(led);
         gpio_set_value(led->pdata->reset_gpio, 0);
+        bd2802_unregister_led_classdev(led);
         if (led->adf_on)
                 bd2802_disable_adv_conf(led);
-        device_remove_file(&client->dev, &bd2802_adv_conf_attr);
+        for (i = 0; i < ARRAY_SIZE(bd2802_attributes); i++)
+                device_remove_file(&led->client->dev, bd2802_attributes[i]);
         i2c_set_clientdata(client, NULL);
         kfree(led);
 
@@ -723,8 +778,7 @@ static int bd2802_resume(struct i2c_client *client)
         struct bd2802_led *led = i2c_get_clientdata(client);
 
         if (!bd2802_is_all_off(led) || led->adf_on) {
-                gpio_set_value(led->pdata->reset_gpio, 1);
-                udelay(100);
+                bd2802_reset_cancel(led);
                 bd2802_restore_state(led);
         }
 
@@ -762,4 +816,4 @@ module_exit(bd2802_exit);
 
 MODULE_AUTHOR("Kim Kyuwon <q1.kim@samsung.com>");
 MODULE_DESCRIPTION("BD2802 LED driver");
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/leds/leds-gpio.c b/drivers/leds/leds-gpio.c
index d2109054de85..6b06638eb5b4 100644
--- a/drivers/leds/leds-gpio.c
+++ b/drivers/leds/leds-gpio.c
@@ -76,7 +76,7 @@ static int __devinit create_gpio_led(const struct gpio_led *template,
         struct gpio_led_data *led_dat, struct device *parent,
         int (*blink_set)(unsigned, unsigned long *, unsigned long *))
 {
-        int ret;
+        int ret, state;
 
         /* skip leds that aren't available */
         if (!gpio_is_valid(template->gpio)) {
@@ -99,11 +99,15 @@ static int __devinit create_gpio_led(const struct gpio_led *template,
                 led_dat->cdev.blink_set = gpio_blink_set;
         }
         led_dat->cdev.brightness_set = gpio_led_set;
-        led_dat->cdev.brightness = LED_OFF;
+        if (template->default_state == LEDS_GPIO_DEFSTATE_KEEP)
+                state = !!gpio_get_value(led_dat->gpio) ^ led_dat->active_low;
+        else
+                state = (template->default_state == LEDS_GPIO_DEFSTATE_ON);
+        led_dat->cdev.brightness = state ? LED_FULL : LED_OFF;
         if (!template->retain_state_suspended)
                 led_dat->cdev.flags |= LED_CORE_SUSPENDRESUME;
 
-        ret = gpio_direction_output(led_dat->gpio, led_dat->active_low);
+        ret = gpio_direction_output(led_dat->gpio, led_dat->active_low ^ state);
         if (ret < 0)
                 goto err;
 
@@ -129,7 +133,7 @@ static void delete_gpio_led(struct gpio_led_data *led)
 }
 
 #ifdef CONFIG_LEDS_GPIO_PLATFORM
-static int gpio_led_probe(struct platform_device *pdev)
+static int __devinit gpio_led_probe(struct platform_device *pdev)
 {
         struct gpio_led_platform_data *pdata = pdev->dev.platform_data;
         struct gpio_led_data *leds_data;
@@ -223,12 +227,22 @@ static int __devinit of_gpio_leds_probe(struct of_device *ofdev,
         memset(&led, 0, sizeof(led));
         for_each_child_of_node(np, child) {
                 enum of_gpio_flags flags;
+                const char *state;
 
                 led.gpio = of_get_gpio_flags(child, 0, &flags);
                 led.active_low = flags & OF_GPIO_ACTIVE_LOW;
                 led.name = of_get_property(child, "label", NULL) ? : child->name;
                 led.default_trigger =
                         of_get_property(child, "linux,default-trigger", NULL);
+                state = of_get_property(child, "default-state", NULL);
+                if (state) {
+                        if (!strcmp(state, "keep"))
+                                led.default_state = LEDS_GPIO_DEFSTATE_KEEP;
+                        else if(!strcmp(state, "on"))
+                                led.default_state = LEDS_GPIO_DEFSTATE_ON;
+                        else
+                                led.default_state = LEDS_GPIO_DEFSTATE_OFF;
+                }
 
                 ret = create_gpio_led(&led, &pdata->led_data[pdata->num_leds++],
                                       &ofdev->dev, NULL);
diff --git a/drivers/leds/leds-lp3944.c b/drivers/leds/leds-lp3944.c
new file mode 100644
index 000000000000..5946208ba26e
--- /dev/null
+++ b/drivers/leds/leds-lp3944.c
@@ -0,0 +1,466 @@
+/*
+ * leds-lp3944.c - driver for National Semiconductor LP3944 Funlight Chip
+ *
+ * Copyright (C) 2009 Antonio Ospite <ospite@studenti.unina.it>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+/*
+ * I2C driver for National Semiconductor LP3944 Funlight Chip
+ * http://www.national.com/pf/LP/LP3944.html
+ *
+ * This helper chip can drive up to 8 leds, with two programmable DIM modes;
+ * it could even be used as a gpio expander but this driver assumes it is used
+ * as a led controller.
+ *
+ * The DIM modes are used to set _blink_ patterns for leds, the pattern is
+ * specified supplying two parameters:
+ *   - period: from 0s to 1.6s
+ *   - duty cycle: percentage of the period the led is on, from 0 to 100
+ *
+ * LP3944 can be found on Motorola A910 smartphone, where it drives the rgb
+ * leds, the camera flash light and the displays backlights.
+ */
+
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/leds.h>
+#include <linux/mutex.h>
+#include <linux/workqueue.h>
+#include <linux/leds-lp3944.h>
+
+/* Read Only Registers */
+#define LP3944_REG_INPUT1     0x00 /* LEDs 0-7 InputRegister (Read Only) */
+#define LP3944_REG_REGISTER1  0x01 /* None (Read Only) */
+
+#define LP3944_REG_PSC0       0x02 /* Frequency Prescaler 0 (R/W) */
+#define LP3944_REG_PWM0       0x03 /* PWM Register 0 (R/W) */
+#define LP3944_REG_PSC1       0x04 /* Frequency Prescaler 1 (R/W) */
+#define LP3944_REG_PWM1       0x05 /* PWM Register 1 (R/W) */
+#define LP3944_REG_LS0        0x06 /* LEDs 0-3 Selector (R/W) */
+#define LP3944_REG_LS1        0x07 /* LEDs 4-7 Selector (R/W) */
+
+/* These registers are not used to control leds in LP3944, they can store
+ * arbitrary values which the chip will ignore.
+ */
+#define LP3944_REG_REGISTER8  0x08
+#define LP3944_REG_REGISTER9  0x09
+
+#define LP3944_DIM0 0
+#define LP3944_DIM1 1
+
+/* period in ms */
+#define LP3944_PERIOD_MIN 0
+#define LP3944_PERIOD_MAX 1600
+
+/* duty cycle is a percentage */
+#define LP3944_DUTY_CYCLE_MIN 0
+#define LP3944_DUTY_CYCLE_MAX 100
+
+#define ldev_to_led(c)       container_of(c, struct lp3944_led_data, ldev)
+
+/* Saved data */
+struct lp3944_led_data {
+        u8 id;
+        enum lp3944_type type;
+        enum lp3944_status status;
+        struct led_classdev ldev;
+        struct i2c_client *client;
+        struct work_struct work;
+};
+
+struct lp3944_data {
+        struct mutex lock;
+        struct i2c_client *client;
+        struct lp3944_led_data leds[LP3944_LEDS_MAX];
+};
+
+static int lp3944_reg_read(struct i2c_client *client, u8 reg, u8 *value)
+{
+        int tmp;
+
+        tmp = i2c_smbus_read_byte_data(client, reg);
+        if (tmp < 0)
+                return -EINVAL;
+
+        *value = tmp;
+
+        return 0;
+}
+
+static int lp3944_reg_write(struct i2c_client *client, u8 reg, u8 value)
+{
+        return i2c_smbus_write_byte_data(client, reg, value);
+}
+
+/**
+ * Set the period for DIM status
+ *
+ * @client: the i2c client
+ * @dim: either LP3944_DIM0 or LP3944_DIM1
+ * @period: period of a blink, that is a on/off cycle, expressed in ms.
+ */
+static int lp3944_dim_set_period(struct i2c_client *client, u8 dim, u16 period)
+{
+        u8 psc_reg;
+        u8 psc_value;
+        int err;
+
+        if (dim == LP3944_DIM0)
+                psc_reg = LP3944_REG_PSC0;
+        else if (dim == LP3944_DIM1)
+                psc_reg = LP3944_REG_PSC1;
+        else
+                return -EINVAL;
+
+        /* Convert period to Prescaler value */
+        if (period > LP3944_PERIOD_MAX)
+                return -EINVAL;
+
+        psc_value = (period * 255) / LP3944_PERIOD_MAX;
+
+        err = lp3944_reg_write(client, psc_reg, psc_value);
+
+        return err;
+}
+
+/**
+ * Set the duty cycle for DIM status
+ *
+ * @client: the i2c client
+ * @dim: either LP3944_DIM0 or LP3944_DIM1
+ * @duty_cycle: percentage of a period during which a led is ON
+ */
+static int lp3944_dim_set_dutycycle(struct i2c_client *client, u8 dim,
+                                    u8 duty_cycle)
+{
+        u8 pwm_reg;
+        u8 pwm_value;
+        int err;
+
+        if (dim == LP3944_DIM0)
+                pwm_reg = LP3944_REG_PWM0;
+        else if (dim == LP3944_DIM1)
+                pwm_reg = LP3944_REG_PWM1;
+        else
+                return -EINVAL;
+
+        /* Convert duty cycle to PWM value */
+        if (duty_cycle > LP3944_DUTY_CYCLE_MAX)
+                return -EINVAL;
+
+        pwm_value = (duty_cycle * 255) / LP3944_DUTY_CYCLE_MAX;
+
+        err = lp3944_reg_write(client, pwm_reg, pwm_value);
+
+        return err;
+}
+
+/**
+ * Set the led status
+ *
+ * @led: a lp3944_led_data structure
+ * @status: one of LP3944_LED_STATUS_OFF
+ *                 LP3944_LED_STATUS_ON
+ *                 LP3944_LED_STATUS_DIM0
+ *                 LP3944_LED_STATUS_DIM1
+ */
+static int lp3944_led_set(struct lp3944_led_data *led, u8 status)
+{
+        struct lp3944_data *data = i2c_get_clientdata(led->client);
+        u8 id = led->id;
+        u8 reg;
+        u8 val = 0;
+        int err;
+
+        dev_dbg(&led->client->dev, "%s: %s, status before normalization:%d\n",
+                __func__, led->ldev.name, status);
+
+        switch (id) {
+        case LP3944_LED0:
+        case LP3944_LED1:
+        case LP3944_LED2:
+        case LP3944_LED3:
+                reg = LP3944_REG_LS0;
+                break;
+        case LP3944_LED4:
+        case LP3944_LED5:
+        case LP3944_LED6:
+        case LP3944_LED7:
+                id -= LP3944_LED4;
+                reg = LP3944_REG_LS1;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        if (status > LP3944_LED_STATUS_DIM1)
+                return -EINVAL;
+
+        /* invert only 0 and 1, leave unchanged the other values,
+         * remember we are abusing status to set blink patterns
+         */
+        if (led->type == LP3944_LED_TYPE_LED_INVERTED && status < 2)
+                status = 1 - status;
+
+        mutex_lock(&data->lock);
+        lp3944_reg_read(led->client, reg, &val);
+
+        val &= ~(LP3944_LED_STATUS_MASK << (id << 1));
+        val |= (status << (id << 1));
+
+        dev_dbg(&led->client->dev, "%s: %s, reg:%d id:%d status:%d val:%#x\n",
+                __func__, led->ldev.name, reg, id, status, val);
+
+        /* set led status */
+        err = lp3944_reg_write(led->client, reg, val);
+        mutex_unlock(&data->lock);
+
+        return err;
+}
+
+static int lp3944_led_set_blink(struct led_classdev *led_cdev,
+                                unsigned long *delay_on,
+                                unsigned long *delay_off)
+{
+        struct lp3944_led_data *led = ldev_to_led(led_cdev);
+        u16 period;
+        u8 duty_cycle;
+        int err;
+
+        /* units are in ms */
+        if (*delay_on + *delay_off > LP3944_PERIOD_MAX)
+                return -EINVAL;
+
+        if (*delay_on == 0 && *delay_off == 0) {
+                /* Special case: the leds subsystem requires a default user
+                 * friendly blink pattern for the LED.  Let's blink the led
+                 * slowly (1Hz).
+                 */
+                *delay_on = 500;
+                *delay_off = 500;
+        }
+
+        period = (*delay_on) + (*delay_off);
+
+        /* duty_cycle is the percentage of period during which the led is ON */
+        duty_cycle = 100 * (*delay_on) / period;
+
+        /* invert duty cycle for inverted leds, this has the same effect of
+         * swapping delay_on and delay_off
+         */
+        if (led->type == LP3944_LED_TYPE_LED_INVERTED)
+                duty_cycle = 100 - duty_cycle;
+
+        /* NOTE: using always the first DIM mode, this means that all leds
+         * will have the same blinking pattern.
+         *
+         * We could find a way later to have two leds blinking in hardware
+         * with different patterns at the same time, falling back to software
+         * control for the other ones.
+         */
+        err = lp3944_dim_set_period(led->client, LP3944_DIM0, period);
+        if (err)
+                return err;
+
+        err = lp3944_dim_set_dutycycle(led->client, LP3944_DIM0, duty_cycle);
+        if (err)
+                return err;
+
+        dev_dbg(&led->client->dev, "%s: OK hardware accelerated blink!\n",
+                __func__);
+
+        led->status = LP3944_LED_STATUS_DIM0;
+        schedule_work(&led->work);
+
+        return 0;
+}
+
+static void lp3944_led_set_brightness(struct led_classdev *led_cdev,
+                                      enum led_brightness brightness)
+{
+        struct lp3944_led_data *led = ldev_to_led(led_cdev);
+
+        dev_dbg(&led->client->dev, "%s: %s, %d\n",
+                __func__, led_cdev->name, brightness);
+
+        led->status = brightness;
+        schedule_work(&led->work);
+}
+
+static void lp3944_led_work(struct work_struct *work)
+{
+        struct lp3944_led_data *led;
+
+        led = container_of(work, struct lp3944_led_data, work);
+        lp3944_led_set(led, led->status);
+}
+
+static int lp3944_configure(struct i2c_client *client,
+                            struct lp3944_data *data,
+                            struct lp3944_platform_data *pdata)
+{
+        int i, err = 0;
+
+        for (i = 0; i < pdata->leds_size; i++) {
+                struct lp3944_led *pled = &pdata->leds[i];
+                struct lp3944_led_data *led = &data->leds[i];
+                led->client = client;
+                led->id = i;
+
+                switch (pled->type) {
+
+                case LP3944_LED_TYPE_LED:
+                case LP3944_LED_TYPE_LED_INVERTED:
+                        led->type = pled->type;
+                        led->status = pled->status;
+                        led->ldev.name = pled->name;
+                        led->ldev.max_brightness = 1;
+                        led->ldev.brightness_set = lp3944_led_set_brightness;
+                        led->ldev.blink_set = lp3944_led_set_blink;
+                        led->ldev.flags = LED_CORE_SUSPENDRESUME;
+
+                        INIT_WORK(&led->work, lp3944_led_work);
+                        err = led_classdev_register(&client->dev, &led->ldev);
+                        if (err < 0) {
+                                dev_err(&client->dev,
+                                        "couldn't register LED %s\n",
+                                        led->ldev.name);
+                                goto exit;
+                        }
+
+                        /* to expose the default value to userspace */
+                        led->ldev.brightness = led->status;
+
+                        /* Set the default led status */
+                        err = lp3944_led_set(led, led->status);
+                        if (err < 0) {
+                                dev_err(&client->dev,
+                                        "%s couldn't set STATUS %d\n",
+                                        led->ldev.name, led->status);
+                                goto exit;
+                        }
+                        break;
+
+                case LP3944_LED_TYPE_NONE:
+                default:
+                        break;
+
+                }
+        }
+        return 0;
+
+exit:
+        if (i > 0)
+                for (i = i - 1; i >= 0; i--)
+                        switch (pdata->leds[i].type) {
+
+                        case LP3944_LED_TYPE_LED:
+                        case LP3944_LED_TYPE_LED_INVERTED:
+                                led_classdev_unregister(&data->leds[i].ldev);
+                                cancel_work_sync(&data->leds[i].work);
+                                break;
+
+                        case LP3944_LED_TYPE_NONE:
+                        default:
+                                break;
+                        }
+
+        return err;
+}
+
+static int __devinit lp3944_probe(struct i2c_client *client,
+                                  const struct i2c_device_id *id)
+{
+        struct lp3944_platform_data *lp3944_pdata = client->dev.platform_data;
+        struct lp3944_data *data;
+
+        if (lp3944_pdata == NULL) {
+                dev_err(&client->dev, "no platform data\n");
+                return -EINVAL;
+        }
+
+        /* Let's see whether this adapter can support what we need. */
+        if (!i2c_check_functionality(client->adapter,
+                                I2C_FUNC_SMBUS_BYTE_DATA)) {
+                dev_err(&client->dev, "insufficient functionality!\n");
+                return -ENODEV;
+        }
+
+        data = kzalloc(sizeof(struct lp3944_data), GFP_KERNEL);
+        if (!data)
+                return -ENOMEM;
+
+        data->client = client;
+        i2c_set_clientdata(client, data);
+
+        mutex_init(&data->lock);
+
+        dev_info(&client->dev, "lp3944 enabled\n");
+
+        lp3944_configure(client, data, lp3944_pdata);
+        return 0;
+}
+
+static int __devexit lp3944_remove(struct i2c_client *client)
+{
+        struct lp3944_platform_data *pdata = client->dev.platform_data;
+        struct lp3944_data *data = i2c_get_clientdata(client);
+        int i;
+
+        for (i = 0; i < pdata->leds_size; i++)
+                switch (data->leds[i].type) {
+                case LP3944_LED_TYPE_LED:
+                case LP3944_LED_TYPE_LED_INVERTED:
+                        led_classdev_unregister(&data->leds[i].ldev);
+                        cancel_work_sync(&data->leds[i].work);
+                        break;
+
+                case LP3944_LED_TYPE_NONE:
+                default:
+                        break;
+                }
+
+        kfree(data);
+        i2c_set_clientdata(client, NULL);
+
+        return 0;
+}
+
+/* lp3944 i2c driver struct */
+static const struct i2c_device_id lp3944_id[] = {
+        {"lp3944", 0},
+        {}
+};
+
+MODULE_DEVICE_TABLE(i2c, lp3944_id);
+
+static struct i2c_driver lp3944_driver = {
+        .driver   = {
+                   .name = "lp3944",
+        },
+        .probe    = lp3944_probe,
+        .remove   = __devexit_p(lp3944_remove),
+        .id_table = lp3944_id,
+};
+
+static int __init lp3944_module_init(void)
+{
+        return i2c_add_driver(&lp3944_driver);
+}
+
+static void __exit lp3944_module_exit(void)
+{
+        i2c_del_driver(&lp3944_driver);
+}
+
+module_init(lp3944_module_init);
+module_exit(lp3944_module_exit);
+
+MODULE_AUTHOR("Antonio Ospite <ospite@studenti.unina.it>");
+MODULE_DESCRIPTION("LP3944 Fun Light Chip");
+MODULE_LICENSE("GPL");
diff --git a/drivers/leds/leds-pca9532.c b/drivers/leds/leds-pca9532.c
index 3937244fdcab..dba8921240f2 100644
--- a/drivers/leds/leds-pca9532.c
+++ b/drivers/leds/leds-pca9532.c
@@ -35,7 +35,7 @@ struct pca9532_data {
         struct pca9532_led leds[16];
         struct mutex update_lock;
         struct input_dev    *idev;
-       struct work_struct work;
+        struct work_struct work;
         u8 pwm[2];
         u8 psc[2];
 };
@@ -87,14 +87,14 @@ static int pca9532_calcpwm(struct i2c_client *client, int pwm, int blink,
         if (b > 0xFF)
                 return -EINVAL;
         data->pwm[pwm] = b;
-       data->psc[pwm] = blink;
-       return 0;
+        data->psc[pwm] = blink;
+        return 0;
 }
 
 static int pca9532_setpwm(struct i2c_client *client, int pwm)
 {
-       struct pca9532_data *data = i2c_get_clientdata(client);
-       mutex_lock(&data->update_lock);
+        struct pca9532_data *data = i2c_get_clientdata(client);
+        mutex_lock(&data->update_lock);
         i2c_smbus_write_byte_data(client, PCA9532_REG_PWM(pwm),
                 data->pwm[pwm]);
         i2c_smbus_write_byte_data(client, PCA9532_REG_PSC(pwm),
@@ -132,11 +132,11 @@ static void pca9532_set_brightness(struct led_classdev *led_cdev,
                 led->state = PCA9532_ON;
         else {
                 led->state = PCA9532_PWM0; /* Thecus: hardcode one pwm */
-               err = pca9532_calcpwm(led->client, 0, 0, value);
+                err = pca9532_calcpwm(led->client, 0, 0, value);
                 if (err)
                         return; /* XXX: led api doesn't allow error code? */
         }
-       schedule_work(&led->work);
+        schedule_work(&led->work);
 }
 
 static int pca9532_set_blink(struct led_classdev *led_cdev,
@@ -145,7 +145,7 @@ static int pca9532_set_blink(struct led_classdev *led_cdev,
         struct pca9532_led *led = ldev_to_led(led_cdev);
         struct i2c_client *client = led->client;
         int psc;
-       int err = 0;
+        int err = 0;
 
         if (*delay_on == 0 && *delay_off == 0) {
         /* led subsystem ask us for a blink rate */
@@ -157,11 +157,11 @@ static int pca9532_set_blink(struct led_classdev *led_cdev,
 
         /* Thecus specific: only use PSC/PWM 0 */
         psc = (*delay_on * 152-1)/1000;
-       err = pca9532_calcpwm(client, 0, psc, led_cdev->brightness);
-       if (err)
-               return err;
-       schedule_work(&led->work);
-       return 0;
+        err = pca9532_calcpwm(client, 0, psc, led_cdev->brightness);
+        if (err)
+                return err;
+        schedule_work(&led->work);
+        return 0;
 }
 
 static int pca9532_event(struct input_dev *dev, unsigned int type,
@@ -178,15 +178,15 @@ static int pca9532_event(struct input_dev *dev, unsigned int type,
         else
                 data->pwm[1] = 0;
 
-       schedule_work(&data->work);
+        schedule_work(&data->work);
 
-       return 0;
+        return 0;
 }
 
 static void pca9532_input_work(struct work_struct *work)
 {
-       struct pca9532_data *data;
-       data = container_of(work, struct pca9532_data, work);
+        struct pca9532_data *data;
+        data = container_of(work, struct pca9532_data, work);
         mutex_lock(&data->update_lock);
         i2c_smbus_write_byte_data(data->client, PCA9532_REG_PWM(1),
                 data->pwm[1]);
@@ -195,11 +195,11 @@ static void pca9532_input_work(struct work_struct *work)
 
 static void pca9532_led_work(struct work_struct *work)
 {
-       struct pca9532_led *led;
-       led = container_of(work, struct pca9532_led, work);
-       if (led->state == PCA9532_PWM0)
-               pca9532_setpwm(led->client, 0);
-       pca9532_setled(led);
+        struct pca9532_led *led;
+        led = container_of(work, struct pca9532_led, work);
+        if (led->state == PCA9532_PWM0)
+                pca9532_setpwm(led->client, 0);
+        pca9532_setled(led);
 }
 
 static int pca9532_configure(struct i2c_client *client,
@@ -232,7 +232,7 @@ static int pca9532_configure(struct i2c_client *client,
                         led->ldev.brightness = LED_OFF;
                         led->ldev.brightness_set = pca9532_set_brightness;
                         led->ldev.blink_set = pca9532_set_blink;
-                       INIT_WORK(&led->work, pca9532_led_work);
+                        INIT_WORK(&led->work, pca9532_led_work);
                         err = led_classdev_register(&client->dev, &led->ldev);
                         if (err < 0) {
                                 dev_err(&client->dev,
@@ -262,11 +262,11 @@ static int pca9532_configure(struct i2c_client *client,
                                                 BIT_MASK(SND_TONE);
                         data->idev->event = pca9532_event;
                         input_set_drvdata(data->idev, data);
-                       INIT_WORK(&data->work, pca9532_input_work);
+                        INIT_WORK(&data->work, pca9532_input_work);
                         err = input_register_device(data->idev);
                         if (err) {
                                 input_free_device(data->idev);
-                               cancel_work_sync(&data->work);
+                                cancel_work_sync(&data->work);
                                 data->idev = NULL;
                                 goto exit;
                         }
@@ -283,13 +283,13 @@ exit:
                                 break;
                         case PCA9532_TYPE_LED:
                                 led_classdev_unregister(&data->leds[i].ldev);
-                               cancel_work_sync(&data->leds[i].work);
+                                cancel_work_sync(&data->leds[i].work);
                                 break;
                         case PCA9532_TYPE_N2100_BEEP:
                                 if (data->idev != NULL) {
                                         input_unregister_device(data->idev);
                                         input_free_device(data->idev);
-                                       cancel_work_sync(&data->work);
+                                        cancel_work_sync(&data->work);
                                         data->idev = NULL;
                                 }
                                 break;
@@ -340,13 +340,13 @@ static int pca9532_remove(struct i2c_client *client)
                         break;
                 case PCA9532_TYPE_LED:
                         led_classdev_unregister(&data->leds[i].ldev);
-                       cancel_work_sync(&data->leds[i].work);
+                        cancel_work_sync(&data->leds[i].work);
                         break;
                 case PCA9532_TYPE_N2100_BEEP:
                         if (data->idev != NULL) {
                                 input_unregister_device(data->idev);
                                 input_free_device(data->idev);
-                               cancel_work_sync(&data->work);
+                                cancel_work_sync(&data->work);
                                 data->idev = NULL;
                         }
                         break;
diff --git a/drivers/macintosh/macio_asic.c b/drivers/macintosh/macio_asic.c
index 6e149f4a1fff..a0f68386c12f 100644
--- a/drivers/macintosh/macio_asic.c
+++ b/drivers/macintosh/macio_asic.c
@@ -378,6 +378,17 @@ static struct macio_dev * macio_add_one_device(struct macio_chip *chip,
         dev->ofdev.dev.bus = &macio_bus_type;
         dev->ofdev.dev.release = macio_release_dev;
 
+#ifdef CONFIG_PCI
+        /* Set the DMA ops to the ones from the PCI device, this could be
+         * fishy if we didn't know that on PowerMac it's always direct ops
+         * or iommu ops that will work fine
+         */
+        dev->ofdev.dev.archdata.dma_ops =
+                chip->lbus.pdev->dev.archdata.dma_ops;
+        dev->ofdev.dev.archdata.dma_data =
+                chip->lbus.pdev->dev.archdata.dma_data;
+#endif /* CONFIG_PCI */
+
 #ifdef DEBUG
         printk("preparing mdev @%p, ofdev @%p, dev @%p, kobj @%p\n",
                dev, &dev->ofdev, &dev->ofdev.dev, &dev->ofdev.dev.kobj);
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
index 7232fe7104aa..fee6a4022bc1 100644
--- a/drivers/platform/x86/Kconfig
+++ b/drivers/platform/x86/Kconfig
@@ -357,6 +357,8 @@ config EEEPC_LAPTOP
         depends on RFKILL || RFKILL = n
         select BACKLIGHT_CLASS_DEVICE
         select HWMON
+        select HOTPLUG
+        select HOTPLUG_PCI if PCI
         ---help---
           This driver supports the Fn-Fx keys on Eee PC laptops.
 
diff --git a/drivers/platform/x86/eeepc-laptop.c b/drivers/platform/x86/eeepc-laptop.c
index 4207b26ff990..ec560f16d720 100644
--- a/drivers/platform/x86/eeepc-laptop.c
+++ b/drivers/platform/x86/eeepc-laptop.c
@@ -16,6 +16,8 @@
  *  GNU General Public License for more details.
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/init.h>
@@ -31,6 +33,7 @@
 #include <linux/input.h>
 #include <linux/rfkill.h>
 #include <linux/pci.h>
+#include <linux/pci_hotplug.h>
 
 #define EEEPC_LAPTOP_VERSION    "0.1"
 
@@ -40,11 +43,6 @@
 #define EEEPC_HOTK_DEVICE_NAME  "Hotkey"
 #define EEEPC_HOTK_HID          "ASUS010"
 
-#define EEEPC_LOG       EEEPC_HOTK_FILE ": "
-#define EEEPC_ERR       KERN_ERR        EEEPC_LOG
-#define EEEPC_WARNING   KERN_WARNING    EEEPC_LOG
-#define EEEPC_NOTICE    KERN_NOTICE     EEEPC_LOG
-#define EEEPC_INFO      KERN_INFO       EEEPC_LOG
 
 /*
  * Definitions for Asus EeePC
@@ -141,8 +139,10 @@ struct eeepc_hotk {
         u16 event_count[128];           /* count for each event */
         struct input_dev *inputdev;
         u16 *keycode_map;
-        struct rfkill *eeepc_wlan_rfkill;
-        struct rfkill *eeepc_bluetooth_rfkill;
+        struct rfkill *wlan_rfkill;
+        struct rfkill *bluetooth_rfkill;
+        struct rfkill *wwan3g_rfkill;
+        struct hotplug_slot *hotplug_slot;
 };
 
 /* The actual device the driver binds to */
@@ -213,6 +213,15 @@ static struct acpi_driver eeepc_hotk_driver = {
         },
 };
 
+/* PCI hotplug ops */
+static int eeepc_get_adapter_status(struct hotplug_slot *slot, u8 *value);
+
+static struct hotplug_slot_ops eeepc_hotplug_slot_ops = {
+        .owner = THIS_MODULE,
+        .get_adapter_status = eeepc_get_adapter_status,
+        .get_power_status = eeepc_get_adapter_status,
+};
+
 /* The backlight device /sys/class/backlight */
 static struct backlight_device *eeepc_backlight_device;
 
@@ -274,20 +283,20 @@ static int set_acpi(int cm, int value)
                 if (method == NULL)
                         return -ENODEV;
                 if (write_acpi_int(ehotk->handle, method, value, NULL))
-                        printk(EEEPC_WARNING "Error writing %s\n", method);
+                        pr_warning("Error writing %s\n", method);
         }
         return 0;
 }
 
 static int get_acpi(int cm)
 {
-        int value = -1;
+        int value = -ENODEV;
         if ((ehotk->cm_supported & (0x1 << cm))) {
                 const char *method = cm_getv[cm];
                 if (method == NULL)
                         return -ENODEV;
                 if (read_acpi_int(ehotk->handle, method, &value))
-                        printk(EEEPC_WARNING "Error reading %s\n", method);
+                        pr_warning("Error reading %s\n", method);
         }
         return value;
 }
@@ -359,13 +368,19 @@ static ssize_t store_sys_acpi(int cm, const char *buf, size_t count)
 
         rv = parse_arg(buf, count, &value);
         if (rv > 0)
-                set_acpi(cm, value);
+                value = set_acpi(cm, value);
+        if (value < 0)
+                return value;
         return rv;
 }
 
 static ssize_t show_sys_acpi(int cm, char *buf)
 {
-        return sprintf(buf, "%d\n", get_acpi(cm));
+        int value = get_acpi(cm);
+
+        if (value < 0)
+                return value;
+        return sprintf(buf, "%d\n", value);
 }
 
 #define EEEPC_CREATE_DEVICE_ATTR(_name, _cm)                            \
@@ -539,6 +554,28 @@ static int eeepc_setkeycode(struct input_dev *dev, int scancode, int keycode)
         return -EINVAL;
 }
 
+static void cmsg_quirk(int cm, const char *name)
+{
+        int dummy;
+
+        /* Some BIOSes do not report cm although it is avaliable.
+           Check if cm_getv[cm] works and, if yes, assume cm should be set. */
+        if (!(ehotk->cm_supported & (1 << cm))
+            && !read_acpi_int(ehotk->handle, cm_getv[cm], &dummy)) {
+                pr_info("%s (%x) not reported by BIOS,"
+                        " enabling anyway\n", name, 1 << cm);
+                ehotk->cm_supported |= 1 << cm;
+        }
+}
+
+static void cmsg_quirks(void)
+{
+        cmsg_quirk(CM_ASL_LID, "LID");
+        cmsg_quirk(CM_ASL_TYPE, "TYPE");
+        cmsg_quirk(CM_ASL_PANELPOWER, "PANELPOWER");
+        cmsg_quirk(CM_ASL_TPD, "TPD");
+}
+
 static int eeepc_hotk_check(void)
 {
         const struct key_entry *key;
@@ -551,26 +588,24 @@ static int eeepc_hotk_check(void)
         if (ehotk->device->status.present) {
                 if (write_acpi_int(ehotk->handle, "INIT", ehotk->init_flag,
                                     &buffer)) {
-                        printk(EEEPC_ERR "Hotkey initialization failed\n");
+                        pr_err("Hotkey initialization failed\n");
                         return -ENODEV;
                 } else {
-                        printk(EEEPC_NOTICE "Hotkey init flags 0x%x\n",
-                               ehotk->init_flag);
+                        pr_notice("Hotkey init flags 0x%x\n", ehotk->init_flag);
                 }
                 /* get control methods supported */
                 if (read_acpi_int(ehotk->handle, "CMSG"
                                    , &ehotk->cm_supported)) {
-                        printk(EEEPC_ERR
-                               "Get control methods supported failed\n");
+                        pr_err("Get control methods supported failed\n");
                         return -ENODEV;
                 } else {
-                        printk(EEEPC_INFO
-                               "Get control methods supported: 0x%x\n",
-                               ehotk->cm_supported);
+                        cmsg_quirks();
+                        pr_info("Get control methods supported: 0x%x\n",
+                                ehotk->cm_supported);
                 }
                 ehotk->inputdev = input_allocate_device();
                 if (!ehotk->inputdev) {
-                        printk(EEEPC_INFO "Unable to allocate input device\n");
+                        pr_info("Unable to allocate input device\n");
                         return 0;
                 }
                 ehotk->inputdev->name = "Asus EeePC extra buttons";
@@ -589,12 +624,12 @@ static int eeepc_hotk_check(void)
                 }
                 result = input_register_device(ehotk->inputdev);
                 if (result) {
-                        printk(EEEPC_INFO "Unable to register input device\n");
+                        pr_info("Unable to register input device\n");
                         input_free_device(ehotk->inputdev);
                         return 0;
                 }
         } else {
-                printk(EEEPC_ERR "Hotkey device not present, aborting\n");
+                pr_err("Hotkey device not present, aborting\n");
                 return -EINVAL;
         }
         return 0;
@@ -612,6 +647,19 @@ static int notify_brn(void)
         return -1;
 }
 
+static int eeepc_get_adapter_status(struct hotplug_slot *hotplug_slot,
+                                    u8 *value)
+{
+        int val = get_acpi(CM_ASL_WLAN);
+
+        if (val == 1 || val == 0)
+                *value = val;
+        else
+                return -EINVAL;
+
+        return 0;
+}
+
 static void eeepc_rfkill_hotplug(void)
 {
         struct pci_dev *dev;
@@ -619,7 +667,7 @@ static void eeepc_rfkill_hotplug(void)
         bool blocked;
 
         if (!bus) {
-                printk(EEEPC_WARNING "Unable to find PCI bus 1?\n");
+                pr_warning("Unable to find PCI bus 1?\n");
                 return;
         }
 
@@ -635,7 +683,7 @@ static void eeepc_rfkill_hotplug(void)
                 if (dev) {
                         pci_bus_assign_resources(bus);
                         if (pci_bus_add_device(dev))
-                                printk(EEEPC_ERR "Unable to hotplug wifi\n");
+                                pr_err("Unable to hotplug wifi\n");
                 }
         } else {
                 dev = pci_get_slot(bus, 0);
@@ -645,7 +693,7 @@ static void eeepc_rfkill_hotplug(void)
                 }
         }
 
-        rfkill_set_sw_state(ehotk->eeepc_wlan_rfkill, blocked);
+        rfkill_set_sw_state(ehotk->wlan_rfkill, blocked);
 }
 
 static void eeepc_rfkill_notify(acpi_handle handle, u32 event, void *data)
@@ -718,8 +766,7 @@ static int eeepc_register_rfkill_notifier(char *node)
                                                      eeepc_rfkill_notify,
                                                      NULL);
                 if (ACPI_FAILURE(status))
-                        printk(EEEPC_WARNING
-                               "Failed to register notify on %s\n", node);
+                        pr_warning("Failed to register notify on %s\n", node);
         } else
                 return -ENODEV;
 
@@ -738,19 +785,66 @@ static void eeepc_unregister_rfkill_notifier(char *node)
                                                      ACPI_SYSTEM_NOTIFY,
                                                      eeepc_rfkill_notify);
                 if (ACPI_FAILURE(status))
-                        printk(EEEPC_ERR
-                               "Error removing rfkill notify handler %s\n",
+                        pr_err("Error removing rfkill notify handler %s\n",
                                 node);
         }
 }
 
+static void eeepc_cleanup_pci_hotplug(struct hotplug_slot *hotplug_slot)
+{
+        kfree(hotplug_slot->info);
+        kfree(hotplug_slot);
+}
+
+static int eeepc_setup_pci_hotplug(void)
+{
+        int ret = -ENOMEM;
+        struct pci_bus *bus = pci_find_bus(0, 1);
+
+        if (!bus) {
+                pr_err("Unable to find wifi PCI bus\n");
+                return -ENODEV;
+        }
+
+        ehotk->hotplug_slot = kzalloc(sizeof(struct hotplug_slot), GFP_KERNEL);
+        if (!ehotk->hotplug_slot)
+                goto error_slot;
+
+        ehotk->hotplug_slot->info = kzalloc(sizeof(struct hotplug_slot_info),
+                                            GFP_KERNEL);
+        if (!ehotk->hotplug_slot->info)
+                goto error_info;
+
+        ehotk->hotplug_slot->private = ehotk;
+        ehotk->hotplug_slot->release = &eeepc_cleanup_pci_hotplug;
+        ehotk->hotplug_slot->ops = &eeepc_hotplug_slot_ops;
+        eeepc_get_adapter_status(ehotk->hotplug_slot,
+                                 &ehotk->hotplug_slot->info->adapter_status);
+
+        ret = pci_hp_register(ehotk->hotplug_slot, bus, 0, "eeepc-wifi");
+        if (ret) {
+                pr_err("Unable to register hotplug slot - %d\n", ret);
+                goto error_register;
+        }
+
+        return 0;
+
+error_register:
+        kfree(ehotk->hotplug_slot->info);
+error_info:
+        kfree(ehotk->hotplug_slot);
+        ehotk->hotplug_slot = NULL;
+error_slot:
+        return ret;
+}
+
 static int eeepc_hotk_add(struct acpi_device *device)
 {
         int result;
 
         if (!device)
                  return -EINVAL;
-        printk(EEEPC_NOTICE EEEPC_HOTK_NAME "\n");
+        pr_notice(EEEPC_HOTK_NAME "\n");
         ehotk = kzalloc(sizeof(struct eeepc_hotk), GFP_KERNEL);
         if (!ehotk)
                 return -ENOMEM;
@@ -764,53 +858,8 @@ static int eeepc_hotk_add(struct acpi_device *device)
         if (result)
                 goto ehotk_fail;
 
-        eeepc_register_rfkill_notifier("\\_SB.PCI0.P0P6");
-        eeepc_register_rfkill_notifier("\\_SB.PCI0.P0P7");
-
-        if (get_acpi(CM_ASL_WLAN) != -1) {
-                ehotk->eeepc_wlan_rfkill = rfkill_alloc("eeepc-wlan",
-                                                        &device->dev,
-                                                        RFKILL_TYPE_WLAN,
-                                                        &eeepc_rfkill_ops,
-                                                        (void *)CM_ASL_WLAN);
-
-                if (!ehotk->eeepc_wlan_rfkill)
-                        goto wlan_fail;
-
-                rfkill_init_sw_state(ehotk->eeepc_wlan_rfkill,
-                                     get_acpi(CM_ASL_WLAN) != 1);
-                result = rfkill_register(ehotk->eeepc_wlan_rfkill);
-                if (result)
-                        goto wlan_fail;
-        }
-
-        if (get_acpi(CM_ASL_BLUETOOTH) != -1) {
-                ehotk->eeepc_bluetooth_rfkill =
-                        rfkill_alloc("eeepc-bluetooth",
-                                     &device->dev,
-                                     RFKILL_TYPE_BLUETOOTH,
-                                     &eeepc_rfkill_ops,
-                                     (void *)CM_ASL_BLUETOOTH);
-
-                if (!ehotk->eeepc_bluetooth_rfkill)
-                        goto bluetooth_fail;
-
-                rfkill_init_sw_state(ehotk->eeepc_bluetooth_rfkill,
-                                     get_acpi(CM_ASL_BLUETOOTH) != 1);
-                result = rfkill_register(ehotk->eeepc_bluetooth_rfkill);
-                if (result)
-                        goto bluetooth_fail;
-        }
-
         return 0;
 
- bluetooth_fail:
-        rfkill_destroy(ehotk->eeepc_bluetooth_rfkill);
-        rfkill_unregister(ehotk->eeepc_wlan_rfkill);
- wlan_fail:
-        rfkill_destroy(ehotk->eeepc_wlan_rfkill);
-        eeepc_unregister_rfkill_notifier("\\_SB.PCI0.P0P6");
-        eeepc_unregister_rfkill_notifier("\\_SB.PCI0.P0P7");
  ehotk_fail:
         kfree(ehotk);
         ehotk = NULL;
@@ -823,16 +872,13 @@ static int eeepc_hotk_remove(struct acpi_device *device, int type)
         if (!device || !acpi_driver_data(device))
                  return -EINVAL;
 
-        eeepc_unregister_rfkill_notifier("\\_SB.PCI0.P0P6");
-        eeepc_unregister_rfkill_notifier("\\_SB.PCI0.P0P7");
-
         kfree(ehotk);
         return 0;
 }
 
 static int eeepc_hotk_resume(struct acpi_device *device)
 {
-        if (ehotk->eeepc_wlan_rfkill) {
+        if (ehotk->wlan_rfkill) {
                 bool wlan;
 
                 /* Workaround - it seems that _PTS disables the wireless
@@ -844,14 +890,13 @@ static int eeepc_hotk_resume(struct acpi_device *device)
                 wlan = get_acpi(CM_ASL_WLAN);
                 set_acpi(CM_ASL_WLAN, wlan);
 
-                rfkill_set_sw_state(ehotk->eeepc_wlan_rfkill,
-                                    wlan != 1);
+                rfkill_set_sw_state(ehotk->wlan_rfkill, wlan != 1);
 
                 eeepc_rfkill_hotplug();
         }
 
-        if (ehotk->eeepc_bluetooth_rfkill)
-                rfkill_set_sw_state(ehotk->eeepc_bluetooth_rfkill,
+        if (ehotk->bluetooth_rfkill)
+                rfkill_set_sw_state(ehotk->bluetooth_rfkill,
                                     get_acpi(CM_ASL_BLUETOOTH) != 1);
 
         return 0;
@@ -973,10 +1018,16 @@ static void eeepc_backlight_exit(void)
 
 static void eeepc_rfkill_exit(void)
 {
-        if (ehotk->eeepc_wlan_rfkill)
-                rfkill_unregister(ehotk->eeepc_wlan_rfkill);
-        if (ehotk->eeepc_bluetooth_rfkill)
-                rfkill_unregister(ehotk->eeepc_bluetooth_rfkill);
+        eeepc_unregister_rfkill_notifier("\\_SB.PCI0.P0P6");
+        eeepc_unregister_rfkill_notifier("\\_SB.PCI0.P0P7");
+        if (ehotk->wlan_rfkill)
+                rfkill_unregister(ehotk->wlan_rfkill);
+        if (ehotk->bluetooth_rfkill)
+                rfkill_unregister(ehotk->bluetooth_rfkill);
+        if (ehotk->wwan3g_rfkill)
+                rfkill_unregister(ehotk->wwan3g_rfkill);
+        if (ehotk->hotplug_slot)
+                pci_hp_deregister(ehotk->hotplug_slot);
 }
 
 static void eeepc_input_exit(void)
@@ -1011,6 +1062,75 @@ static void __exit eeepc_laptop_exit(void)
         platform_driver_unregister(&platform_driver);
 }
 
+static int eeepc_new_rfkill(struct rfkill **rfkill,
+                            const char *name, struct device *dev,
+                            enum rfkill_type type, int cm)
+{
+        int result;
+
+        result = get_acpi(cm);
+        if (result < 0)
+                return result;
+
+        *rfkill = rfkill_alloc(name, dev, type,
+                               &eeepc_rfkill_ops, (void *)(unsigned long)cm);
+
+        if (!*rfkill)
+                return -EINVAL;
+
+        rfkill_init_sw_state(*rfkill, get_acpi(cm) != 1);
+        result = rfkill_register(*rfkill);
+        if (result) {
+                rfkill_destroy(*rfkill);
+                *rfkill = NULL;
+                return result;
+        }
+        return 0;
+}
+
+
+static int eeepc_rfkill_init(struct device *dev)
+{
+        int result = 0;
+
+        eeepc_register_rfkill_notifier("\\_SB.PCI0.P0P6");
+        eeepc_register_rfkill_notifier("\\_SB.PCI0.P0P7");
+
+        result = eeepc_new_rfkill(&ehotk->wlan_rfkill,
+                                  "eeepc-wlan", dev,
+                                  RFKILL_TYPE_WLAN, CM_ASL_WLAN);
+
+        if (result && result != -ENODEV)
+                goto exit;
+
+        result = eeepc_new_rfkill(&ehotk->bluetooth_rfkill,
+                                  "eeepc-bluetooth", dev,
+                                  RFKILL_TYPE_BLUETOOTH, CM_ASL_BLUETOOTH);
+
+        if (result && result != -ENODEV)
+                goto exit;
+
+        result = eeepc_new_rfkill(&ehotk->wwan3g_rfkill,
+                                  "eeepc-wwan3g", dev,
+                                  RFKILL_TYPE_WWAN, CM_ASL_3G);
+
+        if (result && result != -ENODEV)
+                goto exit;
+
+        result = eeepc_setup_pci_hotplug();
+        /*
+         * If we get -EBUSY then something else is handling the PCI hotplug -
+         * don't fail in this case
+         */
+        if (result == -EBUSY)
+                result = 0;
+
+exit:
+        if (result && result != -ENODEV)
+                eeepc_rfkill_exit();
+        return result;
+}
+
 static int eeepc_backlight_init(struct device *dev)
 {
         struct backlight_device *bd;
@@ -1018,8 +1138,7 @@ static int eeepc_backlight_init(struct device *dev)
         bd = backlight_device_register(EEEPC_HOTK_FILE, dev,
                                        NULL, &eeepcbl_ops);
         if (IS_ERR(bd)) {
-                printk(EEEPC_ERR
-                       "Could not register eeepc backlight device\n");
+                pr_err("Could not register eeepc backlight device\n");
                 eeepc_backlight_device = NULL;
                 return PTR_ERR(bd);
         }
@@ -1038,8 +1157,7 @@ static int eeepc_hwmon_init(struct device *dev)
 
         hwmon = hwmon_device_register(dev);
         if (IS_ERR(hwmon)) {
-                printk(EEEPC_ERR
-                       "Could not register eeepc hwmon device\n");
+                pr_err("Could not register eeepc hwmon device\n");
                 eeepc_hwmon_device = NULL;
                 return PTR_ERR(hwmon);
         }
@@ -1065,19 +1183,6 @@ static int __init eeepc_laptop_init(void)
                 acpi_bus_unregister_driver(&eeepc_hotk_driver);
                 return -ENODEV;
         }
-        dev = acpi_get_physical_device(ehotk->device->handle);
-
-        if (!acpi_video_backlight_support()) {
-                result = eeepc_backlight_init(dev);
-                if (result)
-                        goto fail_backlight;
-        } else
-                printk(EEEPC_INFO "Backlight controlled by ACPI video "
-                       "driver\n");
-
-        result = eeepc_hwmon_init(dev);
-        if (result)
-                goto fail_hwmon;
 
         eeepc_enable_camera();
 
@@ -1097,7 +1202,33 @@ static int __init eeepc_laptop_init(void)
                                     &platform_attribute_group);
         if (result)
                 goto fail_sysfs;
+
+        dev = &platform_device->dev;
+
+        if (!acpi_video_backlight_support()) {
+                result = eeepc_backlight_init(dev);
+                if (result)
+                        goto fail_backlight;
+        } else
+                pr_info("Backlight controlled by ACPI video "
+                        "driver\n");
+
+        result = eeepc_hwmon_init(dev);
+        if (result)
+                goto fail_hwmon;
+
+        result = eeepc_rfkill_init(dev);
+        if (result)
+                goto fail_rfkill;
+
         return 0;
+fail_rfkill:
+        eeepc_hwmon_exit();
+fail_hwmon:
+        eeepc_backlight_exit();
+fail_backlight:
+        sysfs_remove_group(&platform_device->dev.kobj,
+                           &platform_attribute_group);
 fail_sysfs:
         platform_device_del(platform_device);
 fail_platform_device2:
@@ -1105,12 +1236,7 @@ fail_platform_device2:
 fail_platform_device1:
         platform_driver_unregister(&platform_driver);
 fail_platform_driver:
-        eeepc_hwmon_exit();
-fail_hwmon:
-        eeepc_backlight_exit();
-fail_backlight:
         eeepc_input_exit();
-        eeepc_rfkill_exit();
         return result;
 }
 
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index 38bfdb0f6660..3f1045993474 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -550,7 +550,7 @@ static void acm_waker(struct work_struct *waker)
 static int acm_tty_open(struct tty_struct *tty, struct file *filp)
 {
         struct acm *acm;
-        int rv = -EINVAL;
+        int rv = -ENODEV;
         int i;
         dbg("Entering acm_tty_open.");
 
@@ -677,7 +677,7 @@ static void acm_tty_close(struct tty_struct *tty, struct file *filp)
 
         /* Perform the closing process and see if we need to do the hardware
            shutdown */
-        if (tty_port_close_start(&acm->port, tty, filp) == 0)
+        if (!acm || tty_port_close_start(&acm->port, tty, filp) == 0)
                 return;
         acm_port_down(acm, 0);
         tty_port_close_end(&acm->port, tty);
diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c
index d595aa5586a7..a84216464ca0 100644
--- a/drivers/usb/serial/usb-serial.c
+++ b/drivers/usb/serial/usb-serial.c
@@ -333,6 +333,9 @@ static void serial_close(struct tty_struct *tty, struct file *filp)
 {
         struct usb_serial_port *port = tty->driver_data;
 
+        if (!port)
+                return;
+
         dbg("%s - port %d", __func__, port->number);
 
 
diff --git a/drivers/watchdog/wdrtas.c b/drivers/watchdog/wdrtas.c
index a4fe7a38d9b0..3bde56bce63a 100644
--- a/drivers/watchdog/wdrtas.c
+++ b/drivers/watchdog/wdrtas.c
@@ -218,16 +218,14 @@ static void wdrtas_timer_keepalive(void)
  */
 static int wdrtas_get_temperature(void)
 {
-        long result;
+        int result;
         int temperature = 0;
 
-        result = rtas_call(wdrtas_token_get_sensor_state, 2, 2,
-                           (void *)__pa(&temperature),
-                           WDRTAS_THERMAL_SENSOR, 0);
+        result = rtas_get_sensor(WDRTAS_THERMAL_SENSOR, 0, &temperature);
 
         if (result < 0)
                 printk(KERN_WARNING "wdrtas: reading the thermal sensor "
-                       "faild: %li\n", result);
+                       "failed: %i\n", result);
         else
                 temperature = ((temperature * 9) / 5) + 32; /* fahrenheit */
 
diff --git a/fs/cifs/CHANGES b/fs/cifs/CHANGES
index b48689839428..3a9b7a58a51d 100644
--- a/fs/cifs/CHANGES
+++ b/fs/cifs/CHANGES
@@ -5,7 +5,7 @@ client generated ones by default (mount option "serverino" turned
 on by default if server supports it).  Add forceuid and forcegid
 mount options (so that when negotiating unix extensions specifying
 which uid mounted does not immediately force the server's reported
-uids to be overridden).
+uids to be overridden).  Add support for scope moutn parm.
 
 Version 1.58
 ------------
diff --git a/fs/cifs/asn1.c b/fs/cifs/asn1.c
index 1b09f1670061..20692fbfdb24 100644
--- a/fs/cifs/asn1.c
+++ b/fs/cifs/asn1.c
@@ -49,6 +49,7 @@
 #define ASN1_OJI        6       /* Object Identifier  */
 #define ASN1_OJD        7       /* Object Description */
 #define ASN1_EXT        8       /* External */
+#define ASN1_ENUM       10      /* Enumerated */
 #define ASN1_SEQ        16      /* Sequence */
 #define ASN1_SET        17      /* Set */
 #define ASN1_NUMSTR     18      /* Numerical String */
@@ -78,10 +79,12 @@
 #define SPNEGO_OID_LEN 7
 #define NTLMSSP_OID_LEN  10
 #define KRB5_OID_LEN  7
+#define KRB5U2U_OID_LEN  8
 #define MSKRB5_OID_LEN  7
 static unsigned long SPNEGO_OID[7] = { 1, 3, 6, 1, 5, 5, 2 };
 static unsigned long NTLMSSP_OID[10] = { 1, 3, 6, 1, 4, 1, 311, 2, 2, 10 };
 static unsigned long KRB5_OID[7] = { 1, 2, 840, 113554, 1, 2, 2 };
+static unsigned long KRB5U2U_OID[8] = { 1, 2, 840, 113554, 1, 2, 2, 3 };
 static unsigned long MSKRB5_OID[7] = { 1, 2, 840, 48018, 1, 2, 2 };
 
 /*
@@ -122,6 +125,28 @@ asn1_octet_decode(struct asn1_ctx *ctx, unsigned char *ch)
         return 1;
 }
 
+#if 0 /* will be needed later by spnego decoding/encoding of ntlmssp */
+static unsigned char
+asn1_enum_decode(struct asn1_ctx *ctx, __le32 *val)
+{
+        unsigned char ch;
+
+        if (ctx->pointer >= ctx->end) {
+                ctx->error = ASN1_ERR_DEC_EMPTY;
+                return 0;
+        }
+
+        ch = *(ctx->pointer)++; /* ch has 0xa, ptr points to lenght octet */
+        if ((ch) == ASN1_ENUM)  /* if ch value is ENUM, 0xa */
+                *val = *(++(ctx->pointer)); /* value has enum value */
+        else
+                return 0;
+
+        ctx->pointer++;
+        return 1;
+}
+#endif
+
 static unsigned char
 asn1_tag_decode(struct asn1_ctx *ctx, unsigned int *tag)
 {
@@ -476,10 +501,9 @@ decode_negTokenInit(unsigned char *security_blob, int length,
         unsigned int cls, con, tag, oidlen, rc;
         bool use_ntlmssp = false;
         bool use_kerberos = false;
+        bool use_kerberosu2u = false;
         bool use_mskerberos = false;
 
-        *secType = NTLM; /* BB eventually make Kerberos or NLTMSSP the default*/
-
         /* cifs_dump_mem(" Received SecBlob ", security_blob, length); */
 
         asn1_open(&ctx, security_blob, length);
@@ -515,6 +539,7 @@ decode_negTokenInit(unsigned char *security_blob, int length,
                 return 0;
         }
 
+        /* SPNEGO */
         if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
                 cFYI(1, ("Error decoding negTokenInit"));
                 return 0;
@@ -526,6 +551,7 @@ decode_negTokenInit(unsigned char *security_blob, int length,
                 return 0;
         }
 
+        /* negTokenInit */
         if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
                 cFYI(1, ("Error decoding negTokenInit"));
                 return 0;
@@ -537,6 +563,7 @@ decode_negTokenInit(unsigned char *security_blob, int length,
                 return 0;
         }
 
+        /* sequence */
         if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
                 cFYI(1, ("Error decoding 2nd part of negTokenInit"));
                 return 0;
@@ -548,6 +575,7 @@ decode_negTokenInit(unsigned char *security_blob, int length,
                 return 0;
         }
 
+        /* sequence of */
         if (asn1_header_decode
             (&ctx, &sequence_end, &cls, &con, &tag) == 0) {
                 cFYI(1, ("Error decoding 2nd part of negTokenInit"));
@@ -560,6 +588,7 @@ decode_negTokenInit(unsigned char *security_blob, int length,
                 return 0;
         }
 
+        /* list of security mechanisms */
         while (!asn1_eoc_decode(&ctx, sequence_end)) {
                 rc = asn1_header_decode(&ctx, &end, &cls, &con, &tag);
                 if (!rc) {
@@ -576,11 +605,15 @@ decode_negTokenInit(unsigned char *security_blob, int length,
 
                                 if (compare_oid(oid, oidlen, MSKRB5_OID,
                                                 MSKRB5_OID_LEN) &&
-                                                !use_kerberos)
+                                                !use_mskerberos)
                                         use_mskerberos = true;
+                                else if (compare_oid(oid, oidlen, KRB5U2U_OID,
+                                                     KRB5U2U_OID_LEN) &&
+                                                     !use_kerberosu2u)
+                                        use_kerberosu2u = true;
                                 else if (compare_oid(oid, oidlen, KRB5_OID,
                                                      KRB5_OID_LEN) &&
-                                                     !use_mskerberos)
+                                                     !use_kerberos)
                                         use_kerberos = true;
                                 else if (compare_oid(oid, oidlen, NTLMSSP_OID,
                                                      NTLMSSP_OID_LEN))
@@ -593,7 +626,12 @@ decode_negTokenInit(unsigned char *security_blob, int length,
                 }
         }
 
+        /* mechlistMIC */
         if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
+                /* Check if we have reached the end of the blob, but with
+                   no mechListMic (e.g. NTLMSSP instead of KRB5) */
+                if (ctx.error == ASN1_ERR_DEC_EMPTY)
+                        goto decode_negtoken_exit;
                 cFYI(1, ("Error decoding last part negTokenInit exit3"));
                 return 0;
         } else if ((cls != ASN1_CTX) || (con != ASN1_CON)) {
@@ -602,6 +640,8 @@ decode_negTokenInit(unsigned char *security_blob, int length,
                          cls, con, tag, end, *end));
                 return 0;
         }
+
+        /* sequence */
         if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
                 cFYI(1, ("Error decoding last part negTokenInit exit5"));
                 return 0;
@@ -611,6 +651,7 @@ decode_negTokenInit(unsigned char *security_blob, int length,
                         cls, con, tag, end, *end));
         }
 
+        /* sequence of */
         if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
                 cFYI(1, ("Error decoding last part negTokenInit exit 7"));
                 return 0;
@@ -619,6 +660,8 @@ decode_negTokenInit(unsigned char *security_blob, int length,
                          cls, con, tag, end, *end));
                 return 0;
         }
+
+        /* general string */
         if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
                 cFYI(1, ("Error decoding last part negTokenInit exit9"));
                 return 0;
@@ -630,13 +673,13 @@ decode_negTokenInit(unsigned char *security_blob, int length,
         }
         cFYI(1, ("Need to call asn1_octets_decode() function for %s",
                  ctx.pointer)); /* is this UTF-8 or ASCII? */
-
+decode_negtoken_exit:
         if (use_kerberos)
                 *secType = Kerberos;
         else if (use_mskerberos)
                 *secType = MSKerberos;
         else if (use_ntlmssp)
-                *secType = NTLMSSP;
+                *secType = RawNTLMSSP;
 
         return 1;
 }
diff --git a/fs/cifs/cifsfs.c b/fs/cifs/cifsfs.c
index 0d92114195ab..9f669f982c4d 100644
--- a/fs/cifs/cifsfs.c
+++ b/fs/cifs/cifsfs.c
@@ -333,6 +333,27 @@ cifs_destroy_inode(struct inode *inode)
         kmem_cache_free(cifs_inode_cachep, CIFS_I(inode));
 }
 
+static void
+cifs_show_address(struct seq_file *s, struct TCP_Server_Info *server)
+{
+        seq_printf(s, ",addr=");
+
+        switch (server->addr.sockAddr.sin_family) {
+        case AF_INET:
+                seq_printf(s, "%pI4", &server->addr.sockAddr.sin_addr.s_addr);
+                break;
+        case AF_INET6:
+                seq_printf(s, "%pI6",
+                           &server->addr.sockAddr6.sin6_addr.s6_addr);
+                if (server->addr.sockAddr6.sin6_scope_id)
+                        seq_printf(s, "%%%u",
+                                   server->addr.sockAddr6.sin6_scope_id);
+                break;
+        default:
+                seq_printf(s, "(unknown)");
+        }
+}
+
 /*
  * cifs_show_options() is for displaying mount options in /proc/mounts.
  * Not all settable options are displayed but most of the important
@@ -343,83 +364,64 @@ cifs_show_options(struct seq_file *s, struct vfsmount *m)
 {
         struct cifs_sb_info *cifs_sb;
         struct cifsTconInfo *tcon;
-        struct TCP_Server_Info *server;
 
         cifs_sb = CIFS_SB(m->mnt_sb);
+        tcon = cifs_sb->tcon;
 
-        if (cifs_sb) {
-                tcon = cifs_sb->tcon;
-                if (tcon) {
-                        seq_printf(s, ",unc=%s", cifs_sb->tcon->treeName);
-                        if (tcon->ses) {
-                                if (tcon->ses->userName)
-                                        seq_printf(s, ",username=%s",
-                                           tcon->ses->userName);
-                                if (tcon->ses->domainName)
-                                        seq_printf(s, ",domain=%s",
-                                           tcon->ses->domainName);
-                                server = tcon->ses->server;
-                                if (server) {
-                                        seq_printf(s, ",addr=");
-                                        switch (server->addr.sockAddr6.
-                                                sin6_family) {
-                                        case AF_INET6:
-                                                seq_printf(s, "%pI6",
-                                                           &server->addr.sockAddr6.sin6_addr);
-                                                break;
-                                        case AF_INET:
-                                                seq_printf(s, "%pI4",
-                                                           &server->addr.sockAddr.sin_addr.s_addr);
-                                                break;
-                                        }
-                                }
-                        }
-                        if ((cifs_sb->mnt_cifs_flags & CIFS_MOUNT_OVERR_UID) ||
-                           !(tcon->unix_ext))
-                                seq_printf(s, ",uid=%d", cifs_sb->mnt_uid);
-                        if ((cifs_sb->mnt_cifs_flags & CIFS_MOUNT_OVERR_GID) ||
-                           !(tcon->unix_ext))
-                                seq_printf(s, ",gid=%d", cifs_sb->mnt_gid);
-                        if (!tcon->unix_ext) {
-                                seq_printf(s, ",file_mode=0%o,dir_mode=0%o",
+        seq_printf(s, ",unc=%s", cifs_sb->tcon->treeName);
+        if (tcon->ses->userName)
+                seq_printf(s, ",username=%s", tcon->ses->userName);
+        if (tcon->ses->domainName)
+                seq_printf(s, ",domain=%s", tcon->ses->domainName);
+
+        seq_printf(s, ",uid=%d", cifs_sb->mnt_uid);
+        if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_OVERR_UID)
+                seq_printf(s, ",forceuid");
+
+        seq_printf(s, ",gid=%d", cifs_sb->mnt_gid);
+        if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_OVERR_GID)
+                seq_printf(s, ",forcegid");
+
+        cifs_show_address(s, tcon->ses->server);
+
+        if (!tcon->unix_ext)
+                seq_printf(s, ",file_mode=0%o,dir_mode=0%o",
                                            cifs_sb->mnt_file_mode,
                                            cifs_sb->mnt_dir_mode);
-                        }
-                        if (tcon->seal)
-                                seq_printf(s, ",seal");
-                        if (tcon->nocase)
-                                seq_printf(s, ",nocase");
-                        if (tcon->retry)
-                                seq_printf(s, ",hard");
-                }
-                if (cifs_sb->prepath)
-                        seq_printf(s, ",prepath=%s", cifs_sb->prepath);
-                if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_POSIX_PATHS)
-                        seq_printf(s, ",posixpaths");
-                if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SET_UID)
-                        seq_printf(s, ",setuids");
-                if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SERVER_INUM)
-                        seq_printf(s, ",serverino");
-                if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_DIRECT_IO)
-                        seq_printf(s, ",directio");
-                if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_XATTR)
-                        seq_printf(s, ",nouser_xattr");
-                if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR)
-                        seq_printf(s, ",mapchars");
-                if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_UNX_EMUL)
-                        seq_printf(s, ",sfu");
-                if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_BRL)
-                        seq_printf(s, ",nobrl");
-                if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_CIFS_ACL)
-                        seq_printf(s, ",cifsacl");
-                if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_DYNPERM)
-                        seq_printf(s, ",dynperm");
-                if (m->mnt_sb->s_flags & MS_POSIXACL)
-                        seq_printf(s, ",acl");
-
-                seq_printf(s, ",rsize=%d", cifs_sb->rsize);
-                seq_printf(s, ",wsize=%d", cifs_sb->wsize);
-        }
+        if (tcon->seal)
+                seq_printf(s, ",seal");
+        if (tcon->nocase)
+                seq_printf(s, ",nocase");
+        if (tcon->retry)
+                seq_printf(s, ",hard");
+        if (cifs_sb->prepath)
+                seq_printf(s, ",prepath=%s", cifs_sb->prepath);
+        if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_POSIX_PATHS)
+                seq_printf(s, ",posixpaths");
+        if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SET_UID)
+                seq_printf(s, ",setuids");
+        if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SERVER_INUM)
+                seq_printf(s, ",serverino");
+        if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_DIRECT_IO)
+                seq_printf(s, ",directio");
+        if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_XATTR)
+                seq_printf(s, ",nouser_xattr");
+        if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR)
+                seq_printf(s, ",mapchars");
+        if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_UNX_EMUL)
+                seq_printf(s, ",sfu");
+        if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_BRL)
+                seq_printf(s, ",nobrl");
+        if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_CIFS_ACL)
+                seq_printf(s, ",cifsacl");
+        if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_DYNPERM)
+                seq_printf(s, ",dynperm");
+        if (m->mnt_sb->s_flags & MS_POSIXACL)
+                seq_printf(s, ",acl");
+
+        seq_printf(s, ",rsize=%d", cifs_sb->rsize);
+        seq_printf(s, ",wsize=%d", cifs_sb->wsize);
+
         return 0;
 }
 
@@ -535,9 +537,14 @@ static void cifs_umount_begin(struct super_block *sb)
         if (tcon == NULL)
                 return;
 
-        lock_kernel();
         read_lock(&cifs_tcp_ses_lock);
-        if (tcon->tc_count == 1)
+        if ((tcon->tc_count > 1) || (tcon->tidStatus == CifsExiting)) {
+                /* we have other mounts to same share or we have
+                   already tried to force umount this and woken up
+                   all waiting network requests, nothing to do */
+                read_unlock(&cifs_tcp_ses_lock);
+                return;
+        } else if (tcon->tc_count == 1)
                 tcon->tidStatus = CifsExiting;
         read_unlock(&cifs_tcp_ses_lock);
 
@@ -552,9 +559,7 @@ static void cifs_umount_begin(struct super_block *sb)
                 wake_up_all(&tcon->ses->server->response_q);
                 msleep(1);
         }
-/* BB FIXME - finish add checks for tidStatus BB */
 
-        unlock_kernel();
         return;
 }
 
diff --git a/fs/cifs/cifsglob.h b/fs/cifs/cifsglob.h
index a61ab772c6f6..e1225e6ded2f 100644
--- a/fs/cifs/cifsglob.h
+++ b/fs/cifs/cifsglob.h
@@ -83,7 +83,7 @@ enum securityEnum {
         NTLM,                   /* Legacy NTLM012 auth with NTLM hash */
         NTLMv2,                 /* Legacy NTLM auth with NTLMv2 hash */
         RawNTLMSSP,             /* NTLMSSP without SPNEGO, NTLMv2 hash */
-        NTLMSSP,                /* NTLMSSP via SPNEGO, NTLMv2 hash */
+/*      NTLMSSP, */ /* can use rawNTLMSSP instead of NTLMSSP via SPNEGO */
         Kerberos,               /* Kerberos via SPNEGO */
         MSKerberos,             /* MS Kerberos via SPNEGO */
 };
diff --git a/fs/cifs/cifsproto.h b/fs/cifs/cifsproto.h
index f9452329bcce..c419416a42ee 100644
--- a/fs/cifs/cifsproto.h
+++ b/fs/cifs/cifsproto.h
@@ -74,7 +74,7 @@ extern unsigned int smbCalcSize(struct smb_hdr *ptr);
 extern unsigned int smbCalcSize_LE(struct smb_hdr *ptr);
 extern int decode_negTokenInit(unsigned char *security_blob, int length,
                         enum securityEnum *secType);
-extern int cifs_inet_pton(const int, const char *source, void *dst);
+extern int cifs_convert_address(char *src, void *dst);
 extern int map_smb_to_linux_error(struct smb_hdr *smb, int logErr);
 extern void header_assemble(struct smb_hdr *, char /* command */ ,
                             const struct cifsTconInfo *, int /* length of
diff --git a/fs/cifs/cifssmb.c b/fs/cifs/cifssmb.c
index b84c61d5bca4..61007c627497 100644
--- a/fs/cifs/cifssmb.c
+++ b/fs/cifs/cifssmb.c
@@ -594,7 +594,7 @@ CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses)
         else if (secFlags & CIFSSEC_MAY_KRB5)
                 server->secType = Kerberos;
         else if (secFlags & CIFSSEC_MAY_NTLMSSP)
-                server->secType = NTLMSSP;
+                server->secType = RawNTLMSSP;
         else if (secFlags & CIFSSEC_MAY_LANMAN)
                 server->secType = LANMAN;
 /* #ifdef CONFIG_CIFS_EXPERIMENTAL
@@ -729,7 +729,7 @@ CIFSSMBTDis(const int xid, struct cifsTconInfo *tcon)
          * the tcon is no longer on the list, so no need to take lock before
          * checking this.
          */
-        if (tcon->need_reconnect)
+        if ((tcon->need_reconnect) || (tcon->ses->need_reconnect))
                 return 0;
 
         rc = small_smb_init(SMB_COM_TREE_DISCONNECT, 0, tcon,
diff --git a/fs/cifs/connect.c b/fs/cifs/connect.c
index 97f4311b9a8e..e16d7592116a 100644
--- a/fs/cifs/connect.c
+++ b/fs/cifs/connect.c
@@ -70,7 +70,6 @@ struct smb_vol {
         mode_t file_mode;
         mode_t dir_mode;
         unsigned secFlg;
-        bool rw:1;
         bool retry:1;
         bool intr:1;
         bool setuids:1;
@@ -832,7 +831,6 @@ cifs_parse_mount_options(char *options, const char *devname,
         vol->dir_mode = vol->file_mode = S_IRUGO | S_IXUGO | S_IWUSR;
 
         /* vol->retry default is 0 (i.e. "soft" limited retry not hard retry) */
-        vol->rw = true;
         /* default is always to request posix paths. */
         vol->posix_paths = 1;
         /* default to using server inode numbers where available */
@@ -1199,7 +1197,9 @@ cifs_parse_mount_options(char *options, const char *devname,
                 } else if (strnicmp(data, "guest", 5) == 0) {
                         /* ignore */
                 } else if (strnicmp(data, "rw", 2) == 0) {
-                        vol->rw = true;
+                        /* ignore */
+                } else if (strnicmp(data, "ro", 2) == 0) {
+                        /* ignore */
                 } else if (strnicmp(data, "noblocksend", 11) == 0) {
                         vol->noblocksnd = 1;
                 } else if (strnicmp(data, "noautotune", 10) == 0) {
@@ -1218,8 +1218,6 @@ cifs_parse_mount_options(char *options, const char *devname,
                             parse these options again and set anything and it
                             is ok to just ignore them */
                         continue;
-                } else if (strnicmp(data, "ro", 2) == 0) {
-                        vol->rw = false;
                 } else if (strnicmp(data, "hard", 4) == 0) {
                         vol->retry = 1;
                 } else if (strnicmp(data, "soft", 4) == 0) {
@@ -1386,8 +1384,10 @@ cifs_find_tcp_session(struct sockaddr_storage *addr)
                      server->addr.sockAddr.sin_addr.s_addr))
                         continue;
                 else if (addr->ss_family == AF_INET6 &&
-                         !ipv6_addr_equal(&server->addr.sockAddr6.sin6_addr,
-                                          &addr6->sin6_addr))
+                         (!ipv6_addr_equal(&server->addr.sockAddr6.sin6_addr,
+                                           &addr6->sin6_addr) ||
+                          server->addr.sockAddr6.sin6_scope_id !=
+                                           addr6->sin6_scope_id))
                         continue;
 
                 ++server->srv_count;
@@ -1433,28 +1433,15 @@ cifs_get_tcp_session(struct smb_vol *volume_info)
 
         memset(&addr, 0, sizeof(struct sockaddr_storage));
 
-        if (volume_info->UNCip && volume_info->UNC) {
-                rc = cifs_inet_pton(AF_INET, volume_info->UNCip,
-                                    &sin_server->sin_addr.s_addr);
-
-                if (rc <= 0) {
-                        /* not ipv4 address, try ipv6 */
-                        rc = cifs_inet_pton(AF_INET6, volume_info->UNCip,
-                                            &sin_server6->sin6_addr.in6_u);
-                        if (rc > 0)
-                                addr.ss_family = AF_INET6;
-                } else {
-                        addr.ss_family = AF_INET;
-                }
+        cFYI(1, ("UNC: %s ip: %s", volume_info->UNC, volume_info->UNCip));
 
-                if (rc <= 0) {
+        if (volume_info->UNCip && volume_info->UNC) {
+                rc = cifs_convert_address(volume_info->UNCip, &addr);
+                if (!rc) {
                         /* we failed translating address */
                         rc = -EINVAL;
                         goto out_err;
                 }
-
-                cFYI(1, ("UNC: %s ip: %s", volume_info->UNC,
-                         volume_info->UNCip));
         } else if (volume_info->UNCip) {
                 /* BB using ip addr as tcp_ses name to connect to the
                    DFS root below */
@@ -1513,14 +1500,14 @@ cifs_get_tcp_session(struct smb_vol *volume_info)
                 cFYI(1, ("attempting ipv6 connect"));
                 /* BB should we allow ipv6 on port 139? */
                 /* other OS never observed in Wild doing 139 with v6 */
+                sin_server6->sin6_port = htons(volume_info->port);
                 memcpy(&tcp_ses->addr.sockAddr6, sin_server6,
                         sizeof(struct sockaddr_in6));
-                sin_server6->sin6_port = htons(volume_info->port);
                 rc = ipv6_connect(tcp_ses);
         } else {
+                sin_server->sin_port = htons(volume_info->port);
                 memcpy(&tcp_ses->addr.sockAddr, sin_server,
                         sizeof(struct sockaddr_in));
-                sin_server->sin_port = htons(volume_info->port);
                 rc = ipv4_connect(tcp_ses);
         }
         if (rc < 0) {
diff --git a/fs/cifs/dir.c b/fs/cifs/dir.c
index 3758965d73d5..7dc6b74f9def 100644
--- a/fs/cifs/dir.c
+++ b/fs/cifs/dir.c
@@ -307,8 +307,9 @@ cifs_create(struct inode *inode, struct dentry *direntry, int mode,
 
         full_path = build_path_from_dentry(direntry);
         if (full_path == NULL) {
+                rc = -ENOMEM;
                 FreeXid(xid);
-                return -ENOMEM;
+                return rc;
         }
 
         if (oplockEnabled)
@@ -540,8 +541,9 @@ int cifs_mknod(struct inode *inode, struct dentry *direntry, int mode,
                         buf = kmalloc(sizeof(FILE_ALL_INFO), GFP_KERNEL);
                         if (buf == NULL) {
                                 kfree(full_path);
+                                rc = -ENOMEM;
                                 FreeXid(xid);
-                                return -ENOMEM;
+                                return rc;
                         }
 
                         rc = CIFSSMBOpen(xid, pTcon, full_path,
diff --git a/fs/cifs/dns_resolve.c b/fs/cifs/dns_resolve.c
index df4a306f697e..87948147d7ec 100644
--- a/fs/cifs/dns_resolve.c
+++ b/fs/cifs/dns_resolve.c
@@ -35,26 +35,11 @@
  *              0 - name is not IP
  */
 static int
-is_ip(const char *name)
+is_ip(char *name)
 {
-        int rc;
-        struct sockaddr_in sin_server;
-        struct sockaddr_in6 sin_server6;
-
-        rc = cifs_inet_pton(AF_INET, name,
-                        &sin_server.sin_addr.s_addr);
-
-        if (rc <= 0) {
-                /* not ipv4 address, try ipv6 */
-                rc = cifs_inet_pton(AF_INET6, name,
-                                &sin_server6.sin6_addr.in6_u);
-                if (rc > 0)
-                        return 1;
-        } else {
-                return 1;
-        }
-        /* we failed translating address */
-        return 0;
+        struct sockaddr_storage ss;
+
+        return cifs_convert_address(name, &ss);
 }
 
 static int
@@ -72,7 +57,7 @@ dns_resolver_instantiate(struct key *key, const void *data,
         ip[datalen] = '\0';
 
         /* make sure this looks like an address */
-        if (!is_ip((const char *) ip)) {
+        if (!is_ip(ip)) {
                 kfree(ip);
                 return -EINVAL;
         }
diff --git a/fs/cifs/file.c b/fs/cifs/file.c
index 06866841b97f..ebdbe62a829c 100644
--- a/fs/cifs/file.c
+++ b/fs/cifs/file.c
@@ -300,14 +300,16 @@ int cifs_open(struct inode *inode, struct file *file)
         pCifsInode = CIFS_I(file->f_path.dentry->d_inode);
         pCifsFile = cifs_fill_filedata(file);
         if (pCifsFile) {
+                rc = 0;
                 FreeXid(xid);
-                return 0;
+                return rc;
         }
 
         full_path = build_path_from_dentry(file->f_path.dentry);
         if (full_path == NULL) {
+                rc = -ENOMEM;
                 FreeXid(xid);
-                return -ENOMEM;
+                return rc;
         }
 
         cFYI(1, ("inode = 0x%p file flags are 0x%x for %s",
@@ -494,8 +496,9 @@ static int cifs_reopen_file(struct file *file, bool can_flush)
         mutex_unlock(&pCifsFile->fh_mutex);
         if (!pCifsFile->invalidHandle) {
                 mutex_lock(&pCifsFile->fh_mutex);
+                rc = 0;
                 FreeXid(xid);
-                return 0;
+                return rc;
         }
 
         if (file->f_path.dentry == NULL) {
@@ -845,8 +848,9 @@ int cifs_lock(struct file *file, int cmd, struct file_lock *pfLock)
         tcon = cifs_sb->tcon;
 
         if (file->private_data == NULL) {
+                rc = -EBADF;
                 FreeXid(xid);
-                return -EBADF;
+                return rc;
         }
         netfid = ((struct cifsFileInfo *)file->private_data)->netfid;
 
@@ -1805,8 +1809,9 @@ ssize_t cifs_user_read(struct file *file, char __user *read_data,
         pTcon = cifs_sb->tcon;
 
         if (file->private_data == NULL) {
+                rc = -EBADF;
                 FreeXid(xid);
-                return -EBADF;
+                return rc;
         }
         open_file = (struct cifsFileInfo *)file->private_data;
 
@@ -1885,8 +1890,9 @@ static ssize_t cifs_read(struct file *file, char *read_data, size_t read_size,
         pTcon = cifs_sb->tcon;
 
         if (file->private_data == NULL) {
+                rc = -EBADF;
                 FreeXid(xid);
-                return -EBADF;
+                return rc;
         }
         open_file = (struct cifsFileInfo *)file->private_data;
 
@@ -2019,8 +2025,9 @@ static int cifs_readpages(struct file *file, struct address_space *mapping,
 
         xid = GetXid();
         if (file->private_data == NULL) {
+                rc = -EBADF;
                 FreeXid(xid);
-                return -EBADF;
+                return rc;
         }
         open_file = (struct cifsFileInfo *)file->private_data;
         cifs_sb = CIFS_SB(file->f_path.dentry->d_sb);
@@ -2185,8 +2192,9 @@ static int cifs_readpage(struct file *file, struct page *page)
         xid = GetXid();
 
         if (file->private_data == NULL) {
+                rc = -EBADF;
                 FreeXid(xid);
-                return -EBADF;
+                return rc;
         }
 
         cFYI(1, ("readpage %p at offset %d 0x%x\n",
diff --git a/fs/cifs/inode.c b/fs/cifs/inode.c
index fad882b075ba..155c9e785d0c 100644
--- a/fs/cifs/inode.c
+++ b/fs/cifs/inode.c
@@ -988,8 +988,9 @@ int cifs_unlink(struct inode *dir, struct dentry *dentry)
          * sb->s_vfs_rename_mutex here */
         full_path = build_path_from_dentry(dentry);
         if (full_path == NULL) {
+                rc = -ENOMEM;
                 FreeXid(xid);
-                return -ENOMEM;
+                return rc;
         }
 
         if ((tcon->ses->capabilities & CAP_UNIX) &&
@@ -1118,8 +1119,9 @@ int cifs_mkdir(struct inode *inode, struct dentry *direntry, int mode)
 
         full_path = build_path_from_dentry(direntry);
         if (full_path == NULL) {
+                rc = -ENOMEM;
                 FreeXid(xid);
-                return -ENOMEM;
+                return rc;
         }
 
         if ((pTcon->ses->capabilities & CAP_UNIX) &&
@@ -1303,8 +1305,9 @@ int cifs_rmdir(struct inode *inode, struct dentry *direntry)
 
         full_path = build_path_from_dentry(direntry);
         if (full_path == NULL) {
+                rc = -ENOMEM;
                 FreeXid(xid);
-                return -ENOMEM;
+                return rc;
         }
 
         rc = CIFSSMBRmDir(xid, pTcon, full_path, cifs_sb->local_nls,
@@ -1508,8 +1511,9 @@ int cifs_revalidate(struct dentry *direntry)
            since that would deadlock */
         full_path = build_path_from_dentry(direntry);
         if (full_path == NULL) {
+                rc = -ENOMEM;
                 FreeXid(xid);
-                return -ENOMEM;
+                return rc;
         }
         cFYI(1, ("Revalidate: %s inode 0x%p count %d dentry: 0x%p d_time %ld "
                  "jiffies %ld", full_path, direntry->d_inode,
@@ -1911,8 +1915,9 @@ cifs_setattr_nounix(struct dentry *direntry, struct iattr *attrs)
 
         full_path = build_path_from_dentry(direntry);
         if (full_path == NULL) {
+                rc = -ENOMEM;
                 FreeXid(xid);
-                return -ENOMEM;
+                return rc;
         }
 
         /*
diff --git a/fs/cifs/link.c b/fs/cifs/link.c
index cd83c53fcbb5..fc1e0487eaee 100644
--- a/fs/cifs/link.c
+++ b/fs/cifs/link.c
@@ -172,8 +172,9 @@ cifs_symlink(struct inode *inode, struct dentry *direntry, const char *symname)
         full_path = build_path_from_dentry(direntry);
 
         if (full_path == NULL) {
+                rc = -ENOMEM;
                 FreeXid(xid);
-                return -ENOMEM;
+                return rc;
         }
 
         cFYI(1, ("Full path: %s", full_path));
diff --git a/fs/cifs/netmisc.c b/fs/cifs/netmisc.c
index 32d6baa0a54f..bd6d6895730d 100644
--- a/fs/cifs/netmisc.c
+++ b/fs/cifs/netmisc.c
@@ -133,10 +133,12 @@ static const struct smb_to_posix_error mapping_table_ERRHRD[] = {
         {0, 0}
 };
 
-/* Convert string containing dotted ip address to binary form */
-/* returns 0 if invalid address */
-
-int
+/*
+ * Convert a string containing text IPv4 or IPv6 address to binary form.
+ *
+ * Returns 0 on failure.
+ */
+static int
 cifs_inet_pton(const int address_family, const char *cp, void *dst)
 {
         int ret = 0;
@@ -153,6 +155,52 @@ cifs_inet_pton(const int address_family, const char *cp, void *dst)
         return ret;
 }
 
+/*
+ * Try to convert a string to an IPv4 address and then attempt to convert
+ * it to an IPv6 address if that fails. Set the family field if either
+ * succeeds. If it's an IPv6 address and it has a '%' sign in it, try to
+ * treat the part following it as a numeric sin6_scope_id.
+ *
+ * Returns 0 on failure.
+ */
+int
+cifs_convert_address(char *src, void *dst)
+{
+        int rc;
+        char *pct, *endp;
+        struct sockaddr_in *s4 = (struct sockaddr_in *) dst;
+        struct sockaddr_in6 *s6 = (struct sockaddr_in6 *) dst;
+
+        /* IPv4 address */
+        if (cifs_inet_pton(AF_INET, src, &s4->sin_addr.s_addr)) {
+                s4->sin_family = AF_INET;
+                return 1;
+        }
+
+        /* temporarily terminate string */
+        pct = strchr(src, '%');
+        if (pct)
+                *pct = '\0';
+
+        rc = cifs_inet_pton(AF_INET6, src, &s6->sin6_addr.s6_addr);
+
+        /* repair temp termination (if any) and make pct point to scopeid */
+        if (pct)
+                *pct++ = '%';
+
+        if (!rc)
+                return rc;
+
+        s6->sin6_family = AF_INET6;
+        if (pct) {
+                s6->sin6_scope_id = (u32) simple_strtoul(pct, &endp, 0);
+                if (!*pct || *endp)
+                        return 0;
+        }
+
+        return rc;
+}
+
 /*****************************************************************************
 convert a NT status code to a dos class/code
  *****************************************************************************/
diff --git a/fs/cifs/sess.c b/fs/cifs/sess.c
index 897a052270f9..7085a6275c4c 100644
--- a/fs/cifs/sess.c
+++ b/fs/cifs/sess.c
@@ -802,7 +802,7 @@ ssetup_ntlmssp_authenticate:
 #endif /* CONFIG_CIFS_UPCALL */
         } else {
 #ifdef CONFIG_CIFS_EXPERIMENTAL
-                if ((experimEnabled > 1) && (type == RawNTLMSSP)) {
+                if (type == RawNTLMSSP) {
                         if ((pSMB->req.hdr.Flags2 & SMBFLG2_UNICODE) == 0) {
                                 cERROR(1, ("NTLMSSP requires Unicode support"));
                                 rc = -ENOSYS;
diff --git a/fs/cifs/xattr.c b/fs/cifs/xattr.c
index e9527eedc639..a75afa3dd9e1 100644
--- a/fs/cifs/xattr.c
+++ b/fs/cifs/xattr.c
@@ -64,8 +64,9 @@ int cifs_removexattr(struct dentry *direntry, const char *ea_name)
 
         full_path = build_path_from_dentry(direntry);
         if (full_path == NULL) {
+                rc = -ENOMEM;
                 FreeXid(xid);
-                return -ENOMEM;
+                return rc;
         }
         if (ea_name == NULL) {
                 cFYI(1, ("Null xattr names not supported"));
@@ -118,8 +119,9 @@ int cifs_setxattr(struct dentry *direntry, const char *ea_name,
 
         full_path = build_path_from_dentry(direntry);
         if (full_path == NULL) {
+                rc = -ENOMEM;
                 FreeXid(xid);
-                return -ENOMEM;
+                return rc;
         }
         /* return dos attributes as pseudo xattr */
         /* return alt name if available as pseudo attr */
@@ -225,8 +227,9 @@ ssize_t cifs_getxattr(struct dentry *direntry, const char *ea_name,
 
         full_path = build_path_from_dentry(direntry);
         if (full_path == NULL) {
+                rc = -ENOMEM;
                 FreeXid(xid);
-                return -ENOMEM;
+                return rc;
         }
         /* return dos attributes as pseudo xattr */
         /* return alt name if available as pseudo attr */
@@ -351,8 +354,9 @@ ssize_t cifs_listxattr(struct dentry *direntry, char *data, size_t buf_size)
 
         full_path = build_path_from_dentry(direntry);
         if (full_path == NULL) {
+                rc = -ENOMEM;
                 FreeXid(xid);
-                return -ENOMEM;
+                return rc;
         }
         /* return dos attributes as pseudo xattr */
         /* return alt name if available as pseudo attr */
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index c263e4d71754..7d6c9a2dfcbb 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -35,11 +35,11 @@ struct est_timings {
 } __attribute__((packed));
 
 /* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */
-#define EDID_TIMING_ASPECT_SHIFT 0
+#define EDID_TIMING_ASPECT_SHIFT 6
 #define EDID_TIMING_ASPECT_MASK  (0x3 << EDID_TIMING_ASPECT_SHIFT)
 
 /* need to add 60 */
-#define EDID_TIMING_VFREQ_SHIFT  2
+#define EDID_TIMING_VFREQ_SHIFT  0
 #define EDID_TIMING_VFREQ_MASK   (0x3f << EDID_TIMING_VFREQ_SHIFT)
 
 struct std_timing {
@@ -47,11 +47,11 @@ struct std_timing {
         u8 vfreq_aspect;
 } __attribute__((packed));
 
-#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 6)
-#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 5)
+#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1)
+#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2)
 #define DRM_EDID_PT_SEPARATE_SYNC  (3 << 3)
-#define DRM_EDID_PT_STEREO         (1 << 2)
-#define DRM_EDID_PT_INTERLACED     (1 << 1)
+#define DRM_EDID_PT_STEREO         (1 << 5)
+#define DRM_EDID_PT_INTERLACED     (1 << 7)
 
 /* If detailed data is pixel timing */
 struct detailed_pixel_timing {
@@ -93,7 +93,7 @@ struct detailed_data_monitor_range {
 } __attribute__((packed));
 
 struct detailed_data_wpindex {
-        u8 white_xy_lo; /* Upper 2 bits each */
+        u8 white_yx_lo; /* Lower 2 bits each */
         u8 white_x_hi;
         u8 white_y_hi;
         u8 gamma; /* need to divide by 100 then add 1 */
@@ -135,21 +135,21 @@ struct detailed_timing {
         } data;
 } __attribute__((packed));
 
-#define DRM_EDID_INPUT_SERRATION_VSYNC (1 << 7)
-#define DRM_EDID_INPUT_SYNC_ON_GREEN   (1 << 5)
-#define DRM_EDID_INPUT_COMPOSITE_SYNC  (1 << 4)
+#define DRM_EDID_INPUT_SERRATION_VSYNC (1 << 0)
+#define DRM_EDID_INPUT_SYNC_ON_GREEN   (1 << 1)
+#define DRM_EDID_INPUT_COMPOSITE_SYNC  (1 << 2)
 #define DRM_EDID_INPUT_SEPARATE_SYNCS  (1 << 3)
-#define DRM_EDID_INPUT_BLANK_TO_BLACK  (1 << 2)
-#define DRM_EDID_INPUT_VIDEO_LEVEL     (3 << 1)
-#define DRM_EDID_INPUT_DIGITAL         (1 << 0) /* bits above must be zero if set */
+#define DRM_EDID_INPUT_BLANK_TO_BLACK  (1 << 4)
+#define DRM_EDID_INPUT_VIDEO_LEVEL     (3 << 5)
+#define DRM_EDID_INPUT_DIGITAL         (1 << 7) /* bits below must be zero if set */
 
-#define DRM_EDID_FEATURE_DEFAULT_GTF      (1 << 7)
-#define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 6)
-#define DRM_EDID_FEATURE_STANDARD_COLOR   (1 << 5)
+#define DRM_EDID_FEATURE_DEFAULT_GTF      (1 << 0)
+#define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1)
+#define DRM_EDID_FEATURE_STANDARD_COLOR   (1 << 2)
 #define DRM_EDID_FEATURE_DISPLAY_TYPE     (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */
-#define DRM_EDID_FEATURE_PM_ACTIVE_OFF    (1 << 2)
-#define DRM_EDID_FEATURE_PM_SUSPEND       (1 << 1)
-#define DRM_EDID_FEATURE_PM_STANDBY       (1 << 0)
+#define DRM_EDID_FEATURE_PM_ACTIVE_OFF    (1 << 5)
+#define DRM_EDID_FEATURE_PM_SUSPEND       (1 << 6)
+#define DRM_EDID_FEATURE_PM_STANDBY       (1 << 7)
 
 struct edid {
         u8 header[8];
diff --git a/include/linux/hrtimer.h b/include/linux/hrtimer.h
index 7400900de94a..54648e625efd 100644
--- a/include/linux/hrtimer.h
+++ b/include/linux/hrtimer.h
@@ -21,6 +21,7 @@
 #include <linux/list.h>
 #include <linux/wait.h>
 #include <linux/percpu.h>
+#include <linux/timer.h>
 
 
 struct hrtimer_clock_base;
@@ -447,6 +448,8 @@ extern void timer_stats_update_stats(void *timer, pid_t pid, void *startf,
 
 static inline void timer_stats_account_hrtimer(struct hrtimer *timer)
 {
+        if (likely(!timer->start_pid))
+                return;
         timer_stats_update_stats(timer, timer->start_pid, timer->start_site,
                                  timer->function, timer->start_comm, 0);
 }
@@ -456,6 +459,8 @@ extern void __timer_stats_hrtimer_set_start_info(struct hrtimer *timer,
 
 static inline void timer_stats_hrtimer_set_start_info(struct hrtimer *timer)
 {
+        if (likely(!timer_stats_active))
+                return;
         __timer_stats_hrtimer_set_start_info(timer, __builtin_return_address(0));
 }
 
diff --git a/include/linux/ide.h b/include/linux/ide.h
index 95c6e00a72e8..cf1f3888067c 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -1361,7 +1361,6 @@ int ide_in_drive_list(u16 *, const struct drive_list_entry *);
 #ifdef CONFIG_BLK_DEV_IDEDMA
 int ide_dma_good_drive(ide_drive_t *);
 int __ide_dma_bad_drive(ide_drive_t *);
-int ide_id_dma_bug(ide_drive_t *);
 
 u8 ide_find_dma_mode(ide_drive_t *, u8);
 
@@ -1402,7 +1401,6 @@ void ide_dma_lost_irq(ide_drive_t *);
 ide_startstop_t ide_dma_timeout_retry(ide_drive_t *, int);
 
 #else
-static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
 static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
 static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
 static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index fac104e7186a..d6320a3e8def 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -303,6 +303,7 @@ extern int oops_in_progress;		/* If set, an oops, panic(), BUG() or die() is in
 extern int panic_timeout;
 extern int panic_on_oops;
 extern int panic_on_unrecovered_nmi;
+extern int panic_on_io_nmi;
 extern const char *print_tainted(void);
 extern void add_taint(unsigned flag);
 extern int test_taint(unsigned flag);
diff --git a/include/linux/leds-lp3944.h b/include/linux/leds-lp3944.h
new file mode 100644
index 000000000000..afc9f9fd70f5
--- /dev/null
+++ b/include/linux/leds-lp3944.h
@@ -0,0 +1,53 @@
+/*
+ * leds-lp3944.h - platform data structure for lp3944 led controller
+ *
+ * Copyright (C) 2009 Antonio Ospite <ospite@studenti.unina.it>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __LINUX_LEDS_LP3944_H
+#define __LINUX_LEDS_LP3944_H
+
+#include <linux/leds.h>
+#include <linux/workqueue.h>
+
+#define LP3944_LED0 0
+#define LP3944_LED1 1
+#define LP3944_LED2 2
+#define LP3944_LED3 3
+#define LP3944_LED4 4
+#define LP3944_LED5 5
+#define LP3944_LED6 6
+#define LP3944_LED7 7
+#define LP3944_LEDS_MAX 8
+
+#define LP3944_LED_STATUS_MASK  0x03
+enum lp3944_status {
+        LP3944_LED_STATUS_OFF  = 0x0,
+        LP3944_LED_STATUS_ON   = 0x1,
+        LP3944_LED_STATUS_DIM0 = 0x2,
+        LP3944_LED_STATUS_DIM1 = 0x3
+};
+
+enum lp3944_type {
+        LP3944_LED_TYPE_NONE,
+        LP3944_LED_TYPE_LED,
+        LP3944_LED_TYPE_LED_INVERTED,
+};
+
+struct lp3944_led {
+        char *name;
+        enum lp3944_type type;
+        enum lp3944_status status;
+};
+
+struct lp3944_platform_data {
+        struct lp3944_led leds[LP3944_LEDS_MAX];
+        u8 leds_size;
+};
+
+#endif /* __LINUX_LEDS_LP3944_H */
diff --git a/include/linux/leds.h b/include/linux/leds.h
index 376fe07732ea..d8bf9665e70c 100644
--- a/include/linux/leds.h
+++ b/include/linux/leds.h
@@ -45,7 +45,10 @@ struct led_classdev {
         /* Get LED brightness level */
         enum led_brightness (*brightness_get)(struct led_classdev *led_cdev);
 
-        /* Activate hardware accelerated blink */
+        /* Activate hardware accelerated blink, delays are in
+         * miliseconds and if none is provided then a sensible default
+         * should be chosen. The call can adjust the timings if it can't
+         * match the values specified exactly. */
         int             (*blink_set)(struct led_classdev *led_cdev,
                                      unsigned long *delay_on,
                                      unsigned long *delay_off);
@@ -141,9 +144,14 @@ struct gpio_led {
         const char *name;
         const char *default_trigger;
         unsigned        gpio;
-        u8              active_low : 1;
-        u8              retain_state_suspended : 1;
+        unsigned        active_low : 1;
+        unsigned        retain_state_suspended : 1;
+        unsigned        default_state : 2;
+        /* default_state should be one of LEDS_GPIO_DEFSTATE_(ON|OFF|KEEP) */
 };
+#define LEDS_GPIO_DEFSTATE_OFF  0
+#define LEDS_GPIO_DEFSTATE_ON   1
+#define LEDS_GPIO_DEFSTATE_KEEP 2
 
 struct gpio_led_platform_data {
         int             num_leds;
diff --git a/include/linux/mm.h b/include/linux/mm.h
index d006e93d5c93..ba3a7cb1eaa0 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -826,7 +826,7 @@ extern int make_pages_present(unsigned long addr, unsigned long end);
 extern int access_process_vm(struct task_struct *tsk, unsigned long addr, void *buf, int len, int write);
 
 int get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
-                        unsigned long start, int len, int write, int force,
+                        unsigned long start, int nr_pages, int write, int force,
                         struct page **pages, struct vm_area_struct **vmas);
 int get_user_pages_fast(unsigned long start, int nr_pages, int write,
                         struct page **pages);
diff --git a/include/linux/timer.h b/include/linux/timer.h
index ccf882eed8f8..be62ec2ebea5 100644
--- a/include/linux/timer.h
+++ b/include/linux/timer.h
@@ -190,6 +190,8 @@ extern unsigned long get_next_timer_interrupt(unsigned long now);
  */
 #ifdef CONFIG_TIMER_STATS
 
+extern int timer_stats_active;
+
 #define TIMER_STATS_FLAG_DEFERRABLE     0x1
 
 extern void init_timer_stats(void);
@@ -203,6 +205,8 @@ extern void __timer_stats_timer_set_start_info(struct timer_list *timer,
 
 static inline void timer_stats_timer_set_start_info(struct timer_list *timer)
 {
+        if (likely(!timer_stats_active))
+                return;
         __timer_stats_timer_set_start_info(timer, __builtin_return_address(0));
 }
 
diff --git a/kernel/Makefile b/kernel/Makefile
index 780c8dcf4516..2093a691f1c2 100644
--- a/kernel/Makefile
+++ b/kernel/Makefile
@@ -96,6 +96,7 @@ obj-$(CONFIG_HAVE_GENERIC_DMA_COHERENT) += dma-coherent.o
 obj-$(CONFIG_FUNCTION_TRACER) += trace/
 obj-$(CONFIG_TRACING) += trace/
 obj-$(CONFIG_X86_DS) += trace/
+obj-$(CONFIG_RING_BUFFER) += trace/
 obj-$(CONFIG_SMP) += sched_cpupri.o
 obj-$(CONFIG_SLOW_WORK) += slow-work.o
 obj-$(CONFIG_PERF_COUNTERS) += perf_counter.o
diff --git a/kernel/futex.c b/kernel/futex.c
index 1c337112335c..794c862125fe 100644
--- a/kernel/futex.c
+++ b/kernel/futex.c
@@ -299,7 +299,7 @@ void put_futex_key(int fshared, union futex_key *key)
 static int fault_in_user_writeable(u32 __user *uaddr)
 {
         int ret = get_user_pages(current, current->mm, (unsigned long)uaddr,
-                                 sizeof(*uaddr), 1, 0, NULL, NULL);
+                                 1, 1, 0, NULL, NULL);
         return ret < 0 ? ret : 0;
 }
 
diff --git a/kernel/sysctl.c b/kernel/sysctl.c
index 62e4ff9968b5..98e02328c67d 100644
--- a/kernel/sysctl.c
+++ b/kernel/sysctl.c
@@ -335,7 +335,10 @@ static struct ctl_table kern_table[] = {
                 .data           = &sysctl_timer_migration,
                 .maxlen         = sizeof(unsigned int),
                 .mode           = 0644,
-                .proc_handler   = &proc_dointvec,
+                .proc_handler   = &proc_dointvec_minmax,
+                .strategy       = &sysctl_intvec,
+                .extra1         = &zero,
+                .extra2         = &one,
         },
 #endif
         {
@@ -744,6 +747,14 @@ static struct ctl_table kern_table[] = {
                 .proc_handler   = &proc_dointvec,
         },
         {
+                .ctl_name       = CTL_UNNUMBERED,
+                .procname       = "panic_on_io_nmi",
+                .data           = &panic_on_io_nmi,
+                .maxlen         = sizeof(int),
+                .mode           = 0644,
+                .proc_handler   = &proc_dointvec,
+        },
+        {
                 .ctl_name       = KERN_BOOTLOADER_TYPE,
                 .procname       = "bootloader_type",
                 .data           = &bootloader_type,
diff --git a/kernel/time/timer_stats.c b/kernel/time/timer_stats.c
index c994530d166d..4cde8b9c716f 100644
--- a/kernel/time/timer_stats.c
+++ b/kernel/time/timer_stats.c
@@ -96,7 +96,7 @@ static DEFINE_MUTEX(show_mutex);
 /*
  * Collection status, active/inactive:
  */
-static int __read_mostly active;
+int __read_mostly timer_stats_active;
 
 /*
  * Beginning/end timestamps of measurement:
@@ -242,7 +242,7 @@ void timer_stats_update_stats(void *timer, pid_t pid, void *startf,
         struct entry *entry, input;
         unsigned long flags;
 
-        if (likely(!active))
+        if (likely(!timer_stats_active))
                 return;
 
         lock = &per_cpu(lookup_lock, raw_smp_processor_id());
@@ -254,7 +254,7 @@ void timer_stats_update_stats(void *timer, pid_t pid, void *startf,
         input.timer_flag = timer_flag;
 
         spin_lock_irqsave(lock, flags);
-        if (!active)
+        if (!timer_stats_active)
                 goto out_unlock;
 
         entry = tstat_lookup(&input, comm);
@@ -290,7 +290,7 @@ static int tstats_show(struct seq_file *m, void *v)
         /*
          * If still active then calculate up to now:
          */
-        if (active)
+        if (timer_stats_active)
                 time_stop = ktime_get();
 
         time = ktime_sub(time_stop, time_start);
@@ -368,18 +368,18 @@ static ssize_t tstats_write(struct file *file, const char __user *buf,
         mutex_lock(&show_mutex);
         switch (ctl[0]) {
         case '0':
-                if (active) {
-                        active = 0;
+                if (timer_stats_active) {
+                        timer_stats_active = 0;
                         time_stop = ktime_get();
                         sync_access();
                 }
                 break;
         case '1':
-                if (!active) {
+                if (!timer_stats_active) {
                         reset_entries();
                         time_start = ktime_get();
                         smp_mb();
-                        active = 1;
+                        timer_stats_active = 1;
                 }
                 break;
         default:
diff --git a/kernel/timer.c b/kernel/timer.c
index 54d3912f8cad..0b36b9e5cc8b 100644
--- a/kernel/timer.c
+++ b/kernel/timer.c
@@ -380,6 +380,8 @@ static void timer_stats_account_timer(struct timer_list *timer)
 {
         unsigned int flag = 0;
 
+        if (likely(!timer->start_site))
+                return;
         if (unlikely(tbase_get_deferrable(timer->base)))
                 flag |= TIMER_STATS_FLAG_DEFERRABLE;
 
diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c
index 3718d55fb4c3..f3716bf04df6 100644
--- a/kernel/trace/ftrace.c
+++ b/kernel/trace/ftrace.c
@@ -291,7 +291,9 @@ function_stat_next(void *v, int idx)
         pg = (struct ftrace_profile_page *)((unsigned long)rec & PAGE_MASK);
 
  again:
-        rec++;
+        if (idx != 0)
+                rec++;
+
         if ((void *)rec >= (void *)&pg->records[pg->index]) {
                 pg = pg->next;
                 if (!pg)
@@ -1417,10 +1419,20 @@ static void *t_hash_start(struct seq_file *m, loff_t *pos)
 {
         struct ftrace_iterator *iter = m->private;
         void *p = NULL;
+        loff_t l;
+
+        if (!(iter->flags & FTRACE_ITER_HASH))
+                *pos = 0;
 
         iter->flags |= FTRACE_ITER_HASH;
 
-        return t_hash_next(m, p, pos);
+        iter->hidx = 0;
+        for (l = 0; l <= *pos; ) {
+                p = t_hash_next(m, p, &l);
+                if (!p)
+                        break;
+        }
+        return p;
 }
 
 static int t_hash_show(struct seq_file *m, void *v)
@@ -1467,8 +1479,6 @@ t_next(struct seq_file *m, void *v, loff_t *pos)
                         iter->pg = iter->pg->next;
                         iter->idx = 0;
                         goto retry;
-                } else {
-                        iter->idx = -1;
                 }
         } else {
                 rec = &iter->pg->records[iter->idx++];
@@ -1497,6 +1507,7 @@ static void *t_start(struct seq_file *m, loff_t *pos)
 {
         struct ftrace_iterator *iter = m->private;
         void *p = NULL;
+        loff_t l;
 
         mutex_lock(&ftrace_lock);
         /*
@@ -1508,23 +1519,21 @@ static void *t_start(struct seq_file *m, loff_t *pos)
                 if (*pos > 0)
                         return t_hash_start(m, pos);
                 iter->flags |= FTRACE_ITER_PRINTALL;
-                (*pos)++;
                 return iter;
         }
 
         if (iter->flags & FTRACE_ITER_HASH)
                 return t_hash_start(m, pos);
 
-        if (*pos > 0) {
-                if (iter->idx < 0)
-                        return p;
-                (*pos)--;
-                iter->idx--;
+        iter->pg = ftrace_pages_start;
+        iter->idx = 0;
+        for (l = 0; l <= *pos; ) {
+                p = t_next(m, p, &l);
+                if (!p)
+                        break;
         }
 
-        p = t_next(m, p, pos);
-
-        if (!p)
+        if (!p && iter->flags & FTRACE_ITER_FILTER)
                 return t_hash_start(m, pos);
 
         return p;
@@ -2500,32 +2509,31 @@ int ftrace_graph_count;
 unsigned long ftrace_graph_funcs[FTRACE_GRAPH_MAX_FUNCS] __read_mostly;
 
 static void *
-g_next(struct seq_file *m, void *v, loff_t *pos)
+__g_next(struct seq_file *m, loff_t *pos)
 {
         unsigned long *array = m->private;
-        int index = *pos;
 
-        (*pos)++;
-
-        if (index >= ftrace_graph_count)
+        if (*pos >= ftrace_graph_count)
                 return NULL;
+        return &array[*pos];
+}
 
-        return &array[index];
+static void *
+g_next(struct seq_file *m, void *v, loff_t *pos)
+{
+        (*pos)++;
+        return __g_next(m, pos);
 }
 
 static void *g_start(struct seq_file *m, loff_t *pos)
 {
-        void *p = NULL;
-
         mutex_lock(&graph_lock);
 
         /* Nothing, tell g_show to print all functions are enabled */
         if (!ftrace_graph_count && !*pos)
                 return (void *)1;
 
-        p = g_next(m, p, pos);
-
-        return p;
+        return __g_next(m, pos);
 }
 
 static void g_stop(struct seq_file *m, void *p)
diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c
index 04dac2638258..bf27bb7a63e2 100644
--- a/kernel/trace/ring_buffer.c
+++ b/kernel/trace/ring_buffer.c
@@ -1563,6 +1563,8 @@ rb_reserve_next_event(struct ring_buffer_per_cpu *cpu_buffer,
         return NULL;
 }
 
+#ifdef CONFIG_TRACING
+
 #define TRACE_RECURSIVE_DEPTH 16
 
 static int trace_recursive_lock(void)
@@ -1593,6 +1595,13 @@ static void trace_recursive_unlock(void)
         current->trace_recursion--;
 }
 
+#else
+
+#define trace_recursive_lock()          (0)
+#define trace_recursive_unlock()        do { } while (0)
+
+#endif
+
 static DEFINE_PER_CPU(int, rb_need_resched);
 
 /**
@@ -3104,6 +3113,7 @@ int ring_buffer_read_page(struct ring_buffer *buffer,
 }
 EXPORT_SYMBOL_GPL(ring_buffer_read_page);
 
+#ifdef CONFIG_TRACING
 static ssize_t
 rb_simple_read(struct file *filp, char __user *ubuf,
                size_t cnt, loff_t *ppos)
@@ -3171,6 +3181,7 @@ static __init int rb_init_debugfs(void)
 }
 
 fs_initcall(rb_init_debugfs);
+#endif
 
 #ifdef CONFIG_HOTPLUG_CPU
 static int rb_cpu_notify(struct notifier_block *self,
diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c
index 076fa6f0ee48..3aa0a0dfdfa8 100644
--- a/kernel/trace/trace.c
+++ b/kernel/trace/trace.c
@@ -284,13 +284,12 @@ void trace_wake_up(void)
 static int __init set_buf_size(char *str)
 {
         unsigned long buf_size;
-        int ret;
 
         if (!str)
                 return 0;
-        ret = strict_strtoul(str, 0, &buf_size);
+        buf_size = memparse(str, &str);
         /* nr_entries can not be zero */
-        if (ret < 0 || buf_size == 0)
+        if (buf_size == 0)
                 return 0;
         trace_buf_size = buf_size;
         return 1;
@@ -2053,25 +2052,23 @@ static int tracing_open(struct inode *inode, struct file *file)
 static void *
 t_next(struct seq_file *m, void *v, loff_t *pos)
 {
-        struct tracer *t = m->private;
+        struct tracer *t = v;
 
         (*pos)++;
 
         if (t)
                 t = t->next;
 
-        m->private = t;
-
         return t;
 }
 
 static void *t_start(struct seq_file *m, loff_t *pos)
 {
-        struct tracer *t = m->private;
+        struct tracer *t;
         loff_t l = 0;
 
         mutex_lock(&trace_types_lock);
-        for (; t && l < *pos; t = t_next(m, t, &l))
+        for (t = trace_types; t && l < *pos; t = t_next(m, t, &l))
                 ;
 
         return t;
@@ -2107,18 +2104,10 @@ static struct seq_operations show_traces_seq_ops = {
 
 static int show_traces_open(struct inode *inode, struct file *file)
 {
-        int ret;
-
         if (tracing_disabled)
                 return -ENODEV;
 
-        ret = seq_open(file, &show_traces_seq_ops);
-        if (!ret) {
-                struct seq_file *m = file->private_data;
-                m->private = trace_types;
-        }
-
-        return ret;
+        return seq_open(file, &show_traces_seq_ops);
 }
 
 static ssize_t
diff --git a/kernel/trace/trace.h b/kernel/trace/trace.h
index 6e735d4771f8..3548ae5cc780 100644
--- a/kernel/trace/trace.h
+++ b/kernel/trace/trace.h
@@ -597,6 +597,7 @@ print_graph_function(struct trace_iterator *iter)
 
 extern struct pid *ftrace_pid_trace;
 
+#ifdef CONFIG_FUNCTION_TRACER
 static inline int ftrace_trace_task(struct task_struct *task)
 {
         if (!ftrace_pid_trace)
@@ -604,6 +605,12 @@ static inline int ftrace_trace_task(struct task_struct *task)
 
         return test_tsk_trace_trace(task);
 }
+#else
+static inline int ftrace_trace_task(struct task_struct *task)
+{
+        return 1;
+}
+#endif
 
 /*
  * trace_iterator_flags is an enumeration that defines bit
diff --git a/kernel/trace/trace_events.c b/kernel/trace/trace_events.c
index aa08be69a1b6..53c8fd376a88 100644
--- a/kernel/trace/trace_events.c
+++ b/kernel/trace/trace_events.c
@@ -300,10 +300,18 @@ t_next(struct seq_file *m, void *v, loff_t *pos)
 
 static void *t_start(struct seq_file *m, loff_t *pos)
 {
+        struct ftrace_event_call *call = NULL;
+        loff_t l;
+
         mutex_lock(&event_mutex);
-        if (*pos == 0)
-                m->private = ftrace_events.next;
-        return t_next(m, NULL, pos);
+
+        m->private = ftrace_events.next;
+        for (l = 0; l <= *pos; ) {
+                call = t_next(m, NULL, &l);
+                if (!call)
+                        break;
+        }
+        return call;
 }
 
 static void *
@@ -332,10 +340,18 @@ s_next(struct seq_file *m, void *v, loff_t *pos)
 
 static void *s_start(struct seq_file *m, loff_t *pos)
 {
+        struct ftrace_event_call *call = NULL;
+        loff_t l;
+
         mutex_lock(&event_mutex);
-        if (*pos == 0)
-                m->private = ftrace_events.next;
-        return s_next(m, NULL, pos);
+
+        m->private = ftrace_events.next;
+        for (l = 0; l <= *pos; ) {
+                call = s_next(m, NULL, &l);
+                if (!call)
+                        break;
+        }
+        return call;
 }
 
 static int t_show(struct seq_file *m, void *v)
diff --git a/kernel/trace/trace_functions.c b/kernel/trace/trace_functions.c
index 90f134764837..7402144bff21 100644
--- a/kernel/trace/trace_functions.c
+++ b/kernel/trace/trace_functions.c
@@ -302,8 +302,7 @@ ftrace_trace_onoff_print(struct seq_file *m, unsigned long ip,
         if (count == -1)
                 seq_printf(m, ":unlimited\n");
         else
-                seq_printf(m, ":count=%ld", count);
-        seq_putc(m, '\n');
+                seq_printf(m, ":count=%ld\n", count);
 
         return 0;
 }
diff --git a/kernel/trace/trace_printk.c b/kernel/trace/trace_printk.c
index 9bece9687b62..7b6278110827 100644
--- a/kernel/trace/trace_printk.c
+++ b/kernel/trace/trace_printk.c
@@ -155,25 +155,19 @@ int __ftrace_vprintk(unsigned long ip, const char *fmt, va_list ap)
 EXPORT_SYMBOL_GPL(__ftrace_vprintk);
 
 static void *
-t_next(struct seq_file *m, void *v, loff_t *pos)
+t_start(struct seq_file *m, loff_t *pos)
 {
-        const char **fmt = m->private;
-        const char **next = fmt;
-
-        (*pos)++;
+        const char **fmt = __start___trace_bprintk_fmt + *pos;
 
         if ((unsigned long)fmt >= (unsigned long)__stop___trace_bprintk_fmt)
                 return NULL;
-
-        next = fmt;
-        m->private = ++next;
-
         return fmt;
 }
 
-static void *t_start(struct seq_file *m, loff_t *pos)
+static void *t_next(struct seq_file *m, void * v, loff_t *pos)
 {
-        return t_next(m, NULL, pos);
+        (*pos)++;
+        return t_start(m, pos);
 }
 
 static int t_show(struct seq_file *m, void *v)
@@ -224,15 +218,7 @@ static const struct seq_operations show_format_seq_ops = {
 static int
 ftrace_formats_open(struct inode *inode, struct file *file)
 {
-        int ret;
-
-        ret = seq_open(file, &show_format_seq_ops);
-        if (!ret) {
-                struct seq_file *m = file->private_data;
-
-                m->private = __start___trace_bprintk_fmt;
-        }
-        return ret;
+        return seq_open(file, &show_format_seq_ops);
 }
 
 static const struct file_operations ftrace_formats_fops = {
diff --git a/kernel/trace/trace_stat.c b/kernel/trace/trace_stat.c
index c00643733f4c..e66f5e493342 100644
--- a/kernel/trace/trace_stat.c
+++ b/kernel/trace/trace_stat.c
@@ -199,17 +199,13 @@ static void *stat_seq_start(struct seq_file *s, loff_t *pos)
         mutex_lock(&session->stat_mutex);
 
         /* If we are in the beginning of the file, print the headers */
-        if (!*pos && session->ts->stat_headers) {
-                (*pos)++;
+        if (!*pos && session->ts->stat_headers)
                 return SEQ_START_TOKEN;
-        }
 
         node = rb_first(&session->stat_root);
         for (i = 0; node && i < *pos; i++)
                 node = rb_next(node);
 
-        (*pos)++;
-
         return node;
 }
 
diff --git a/mm/memory.c b/mm/memory.c
index f46ac18ba231..65216194eb8d 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -1207,8 +1207,8 @@ static inline int use_zero_page(struct vm_area_struct *vma)
 
 
 int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
-                     unsigned long start, int len, int flags,
-                struct page **pages, struct vm_area_struct **vmas)
+                     unsigned long start, int nr_pages, int flags,
+                     struct page **pages, struct vm_area_struct **vmas)
 {
         int i;
         unsigned int vm_flags = 0;
@@ -1217,7 +1217,7 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
         int ignore = !!(flags & GUP_FLAGS_IGNORE_VMA_PERMISSIONS);
         int ignore_sigkill = !!(flags & GUP_FLAGS_IGNORE_SIGKILL);
 
-        if (len <= 0)
+        if (nr_pages <= 0)
                 return 0;
         /* 
          * Require read or write permissions.
@@ -1269,7 +1269,7 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
                                 vmas[i] = gate_vma;
                         i++;
                         start += PAGE_SIZE;
-                        len--;
+                        nr_pages--;
                         continue;
                 }
 
@@ -1280,7 +1280,7 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
 
                 if (is_vm_hugetlb_page(vma)) {
                         i = follow_hugetlb_page(mm, vma, pages, vmas,
-                                                &start, &len, i, write);
+                                                &start, &nr_pages, i, write);
                         continue;
                 }
 
@@ -1357,9 +1357,9 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
                                 vmas[i] = vma;
                         i++;
                         start += PAGE_SIZE;
-                        len--;
-                } while (len && start < vma->vm_end);
-        } while (len);
+                        nr_pages--;
+                } while (nr_pages && start < vma->vm_end);
+        } while (nr_pages);
         return i;
 }
 
@@ -1368,7 +1368,7 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
  * @tsk:        task_struct of target task
  * @mm:         mm_struct of target mm
  * @start:      starting user address
- * @len:        number of pages from start to pin
+ * @nr_pages:   number of pages from start to pin
  * @write:      whether pages will be written to by the caller
  * @force:      whether to force write access even if user mapping is
  *              readonly. This will result in the page being COWed even
@@ -1380,7 +1380,7 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
  *              Or NULL if the caller does not require them.
  *
  * Returns number of pages pinned. This may be fewer than the number
- * requested. If len is 0 or negative, returns 0. If no pages
+ * requested. If nr_pages is 0 or negative, returns 0. If no pages
  * were pinned, returns -errno. Each page returned must be released
  * with a put_page() call when it is finished with. vmas will only
  * remain valid while mmap_sem is held.
@@ -1414,7 +1414,7 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
  * See also get_user_pages_fast, for performance critical applications.
  */
 int get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
-                unsigned long start, int len, int write, int force,
+                unsigned long start, int nr_pages, int write, int force,
                 struct page **pages, struct vm_area_struct **vmas)
 {
         int flags = 0;
@@ -1424,9 +1424,7 @@ int get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
         if (force)
                 flags |= GUP_FLAGS_FORCE;
 
-        return __get_user_pages(tsk, mm,
-                                start, len, flags,
-                                pages, vmas);
+        return __get_user_pages(tsk, mm, start, nr_pages, flags, pages, vmas);
 }
 
 EXPORT_SYMBOL(get_user_pages);
diff --git a/mm/nommu.c b/mm/nommu.c
index 2fd2ad5da98e..bf0cc762a7d2 100644
--- a/mm/nommu.c
+++ b/mm/nommu.c
@@ -173,8 +173,8 @@ unsigned int kobjsize(const void *objp)
 }
 
 int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
-                     unsigned long start, int len, int flags,
-                struct page **pages, struct vm_area_struct **vmas)
+                     unsigned long start, int nr_pages, int flags,
+                     struct page **pages, struct vm_area_struct **vmas)
 {
         struct vm_area_struct *vma;
         unsigned long vm_flags;
@@ -189,7 +189,7 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
         vm_flags  = write ? (VM_WRITE | VM_MAYWRITE) : (VM_READ | VM_MAYREAD);
         vm_flags &= force ? (VM_MAYREAD | VM_MAYWRITE) : (VM_READ | VM_WRITE);
 
-        for (i = 0; i < len; i++) {
+        for (i = 0; i < nr_pages; i++) {
                 vma = find_vma(mm, start);
                 if (!vma)
                         goto finish_or_fault;
@@ -224,7 +224,7 @@ finish_or_fault:
  * - don't permit access to VMAs that don't support it, such as I/O mappings
  */
 int get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
-        unsigned long start, int len, int write, int force,
+        unsigned long start, int nr_pages, int write, int force,
         struct page **pages, struct vm_area_struct **vmas)
 {
         int flags = 0;
@@ -234,9 +234,7 @@ int get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
         if (force)
                 flags |= GUP_FLAGS_FORCE;
 
-        return __get_user_pages(tsk, mm,
-                                start, len, flags,
-                                pages, vmas);
+        return __get_user_pages(tsk, mm, start, nr_pages, flags, pages, vmas);
 }
 EXPORT_SYMBOL(get_user_pages);
 
diff --git a/mm/percpu.c b/mm/percpu.c
index c0b2c1a76e81..b70f2acd8853 100644
--- a/mm/percpu.c
+++ b/mm/percpu.c
@@ -549,14 +549,14 @@ static void pcpu_free_area(struct pcpu_chunk *chunk, int freeme)
  * @chunk: chunk of interest
  * @page_start: page index of the first page to unmap
  * @page_end: page index of the last page to unmap + 1
- * @flush: whether to flush cache and tlb or not
+ * @flush_tlb: whether to flush tlb or not
  *
  * For each cpu, unmap pages [@page_start,@page_end) out of @chunk.
  * If @flush is true, vcache is flushed before unmapping and tlb
  * after.
  */
 static void pcpu_unmap(struct pcpu_chunk *chunk, int page_start, int page_end,
-                       bool flush)
+                       bool flush_tlb)
 {
         unsigned int last = num_possible_cpus() - 1;
         unsigned int cpu;
@@ -569,9 +569,8 @@ static void pcpu_unmap(struct pcpu_chunk *chunk, int page_start, int page_end,
          * the whole region at once rather than doing it for each cpu.
          * This could be an overkill but is more scalable.
          */
-        if (flush)
-                flush_cache_vunmap(pcpu_chunk_addr(chunk, 0, page_start),
-                                   pcpu_chunk_addr(chunk, last, page_end));
+        flush_cache_vunmap(pcpu_chunk_addr(chunk, 0, page_start),
+                           pcpu_chunk_addr(chunk, last, page_end));
 
         for_each_possible_cpu(cpu)
                 unmap_kernel_range_noflush(
@@ -579,7 +578,7 @@ static void pcpu_unmap(struct pcpu_chunk *chunk, int page_start, int page_end,
                                 (page_end - page_start) << PAGE_SHIFT);
 
         /* ditto as flush_cache_vunmap() */
-        if (flush)
+        if (flush_tlb)
                 flush_tlb_kernel_range(pcpu_chunk_addr(chunk, 0, page_start),
                                        pcpu_chunk_addr(chunk, last, page_end));
 }
@@ -1234,6 +1233,7 @@ static struct page * __init pcpue_get_page(unsigned int cpu, int pageno)
 ssize_t __init pcpu_embed_first_chunk(size_t static_size, size_t reserved_size,
                                       ssize_t dyn_size, ssize_t unit_size)
 {
+        size_t chunk_size;
         unsigned int cpu;
 
         /* determine parameters and allocate */
@@ -1248,11 +1248,15 @@ ssize_t __init pcpu_embed_first_chunk(size_t static_size, size_t reserved_size,
         } else
                 pcpue_unit_size = max_t(size_t, pcpue_size, PCPU_MIN_UNIT_SIZE);
 
-        pcpue_ptr = __alloc_bootmem_nopanic(
-                                        num_possible_cpus() * pcpue_unit_size,
-                                        PAGE_SIZE, __pa(MAX_DMA_ADDRESS));
-        if (!pcpue_ptr)
+        chunk_size = pcpue_unit_size * num_possible_cpus();
+
+        pcpue_ptr = __alloc_bootmem_nopanic(chunk_size, PAGE_SIZE,
+                                            __pa(MAX_DMA_ADDRESS));
+        if (!pcpue_ptr) {
+                pr_warning("PERCPU: failed to allocate %zu bytes for "
+                           "embedding\n", chunk_size);
                 return -ENOMEM;
+        }
 
         /* return the leftover and copy */
         for_each_possible_cpu(cpu) {
diff --git a/scripts/dtc/.gitignore b/scripts/dtc/.gitignore
new file mode 100644
index 000000000000..095acb49a374
--- /dev/null
+++ b/scripts/dtc/.gitignore
@@ -0,0 +1,5 @@
+dtc
+dtc-lexer.lex.c
+dtc-parser.tab.c
+dtc-parser.tab.h
+