3 files changed, 28 insertions, 30 deletions

diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index f63721ed86c2..06ed0609a95d 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -19,34 +19,26 @@
 #include <asm/io.h>
 #include "dma-sh.h"
 
-
-
-#ifdef CONFIG_CPU_SH4
-static struct ipr_data dmae_ipr_map[] = {
-        { DMAE_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
-};
+static int dmte_irq_map[] = {
+        DMTE0_IRQ,
+        DMTE1_IRQ,
+        DMTE2_IRQ,
+        DMTE3_IRQ,
+#if defined(CONFIG_CPU_SUBTYPE_SH7751R) ||      \
+    defined(CONFIG_CPU_SUBTYPE_SH7760)  ||      \
+    defined(CONFIG_CPU_SUBTYPE_SH7780)
+        DMTE4_IRQ,
+        DMTE5_IRQ,
+        DMTE6_IRQ,
+        DMTE7_IRQ,    
 #endif
-static struct ipr_data dmte_ipr_map[] = {
-        /*
-         * Normally we could just do DMTE0_IRQ + chan outright, though in the
-         * case of the 7751R, the DMTE IRQs for channels > 4 start right above
-         * the SCIF
-         */
-        { DMTE0_IRQ + 0, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
-        { DMTE0_IRQ + 1, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
-        { DMTE0_IRQ + 2, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
-        { DMTE0_IRQ + 3, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
-        { DMTE4_IRQ + 0, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
-        { DMTE4_IRQ + 1, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
-        { DMTE4_IRQ + 2, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
-        { DMTE4_IRQ + 3, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
 };
 
 static inline unsigned int get_dmte_irq(unsigned int chan)
 {
         unsigned int irq = 0;
-        if (chan < ARRAY_SIZE(dmte_ipr_map))
-                irq = dmte_ipr_map[chan].irq;
+        if (chan < ARRAY_SIZE(dmte_irq_map))
+                irq = dmte_irq_map[chan];
         return irq;
 }
 
@@ -103,7 +95,7 @@ static void sh_dmac_free_dma(struct dma_channel *chan)
         free_irq(get_dmte_irq(chan->chan), chan);
 }
 
-static void
+static int
 sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
 {
         if (!chcr)
@@ -119,6 +111,7 @@ sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
         ctrl_outl(chcr, CHCR[chan->chan]);
 
         chan->flags |= DMA_CONFIGURED;
+        return 0;
 }
 
 static void sh_dmac_enable_dma(struct dma_channel *chan)
@@ -262,17 +255,11 @@ static int __init sh_dmac_init(void)
         int i;
 
 #ifdef CONFIG_CPU_SH4
-        make_ipr_irq(dmae_ipr_map, ARRAY_SIZE(dmae_ipr_map));
         i = request_irq(DMAE_IRQ, dma_err, IRQF_DISABLED, "DMAC Address Error", 0);
         if (unlikely(i < 0))
                 return i;
 #endif
 
-        i = info->nr_channels;
-        if (i > ARRAY_SIZE(dmte_ipr_map))
-                i = ARRAY_SIZE(dmte_ipr_map);
-        make_ipr_irq(dmte_ipr_map, i);
-
         /*
          * Initialize DMAOR, and clean up any error flags that may have
          * been set.
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index cbac27634c0b..aa26245f0344 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -101,7 +101,7 @@ static struct ipr_data sh7750_ipr_map[] = {
         { 35, 2,  8, 7 }, /* DMAC DMTE1 */
         { 36, 2,  8, 7 }, /* DMAC DMTE2 */
         { 37, 2,  8, 7 }, /* DMAC DMTE3 */
-        { 28, 2,  8, 7 }, /* DMAC DMAE */
+        { 38, 2,  8, 7 }, /* DMAC DMAE */
 };
 
 static struct ipr_data sh7751_ipr_map[] = {
diff --git a/include/asm-sh/cpu-sh4/dma.h b/include/asm-sh/cpu-sh4/dma.h
index 3e4b3e6d80c0..c135e9cebd9c 100644
--- a/include/asm-sh/cpu-sh4/dma.h
+++ b/include/asm-sh/cpu-sh4/dma.h
@@ -3,6 +3,17 @@
 
 #define DMAOR_INIT      ( 0x8000 | DMAOR_DME )
 
+/* SH7751/7760/7780 DMA IRQ sources */
+#define DMTE0_IRQ       34
+#define DMTE1_IRQ       35
+#define DMTE2_IRQ       36
+#define DMTE3_IRQ       37
+#define DMTE4_IRQ       44
+#define DMTE5_IRQ       45
+#define DMTE6_IRQ       46
+#define DMTE7_IRQ       47
+#define DMAE_IRQ        38
+
 #ifdef CONFIG_CPU_SH4A
 #define SH_DMAC_BASE    0xfc808020