diff options
57 files changed, 563 insertions, 288 deletions
diff --git a/arch/microblaze/include/asm/page.h b/arch/microblaze/include/asm/page.h index de493f86d28f..464ff32bee3d 100644 --- a/arch/microblaze/include/asm/page.h +++ b/arch/microblaze/include/asm/page.h | |||
@@ -34,6 +34,8 @@ | |||
34 | /* MS be sure that SLAB allocates aligned objects */ | 34 | /* MS be sure that SLAB allocates aligned objects */ |
35 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES | 35 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES |
36 | 36 | ||
37 | #define ARCH_SLAB_MINALIGN L1_CACHE_BYTES | ||
38 | |||
37 | #define PAGE_UP(addr) (((addr)+((PAGE_SIZE)-1))&(~((PAGE_SIZE)-1))) | 39 | #define PAGE_UP(addr) (((addr)+((PAGE_SIZE)-1))&(~((PAGE_SIZE)-1))) |
38 | #define PAGE_DOWN(addr) ((addr)&(~((PAGE_SIZE)-1))) | 40 | #define PAGE_DOWN(addr) ((addr)&(~((PAGE_SIZE)-1))) |
39 | 41 | ||
diff --git a/arch/microblaze/kernel/dma.c b/arch/microblaze/kernel/dma.c index 9dcd90b5df55..79c74659f204 100644 --- a/arch/microblaze/kernel/dma.c +++ b/arch/microblaze/kernel/dma.c | |||
@@ -90,7 +90,6 @@ static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, | |||
90 | /* FIXME this part of code is untested */ | 90 | /* FIXME this part of code is untested */ |
91 | for_each_sg(sgl, sg, nents, i) { | 91 | for_each_sg(sgl, sg, nents, i) { |
92 | sg->dma_address = sg_phys(sg) + get_dma_direct_offset(dev); | 92 | sg->dma_address = sg_phys(sg) + get_dma_direct_offset(dev); |
93 | sg->dma_length = sg->length; | ||
94 | __dma_sync_page(page_to_phys(sg_page(sg)), sg->offset, | 93 | __dma_sync_page(page_to_phys(sg_page(sg)), sg->offset, |
95 | sg->length, direction); | 94 | sg->length, direction); |
96 | } | 95 | } |
diff --git a/arch/s390/appldata/appldata_os.c b/arch/s390/appldata/appldata_os.c index 55c80ffd42b9..92f1cb745d69 100644 --- a/arch/s390/appldata/appldata_os.c +++ b/arch/s390/appldata/appldata_os.c | |||
@@ -181,7 +181,7 @@ static int __init appldata_os_init(void) | |||
181 | goto out; | 181 | goto out; |
182 | } | 182 | } |
183 | 183 | ||
184 | appldata_os_data = kzalloc(max_size, GFP_DMA); | 184 | appldata_os_data = kzalloc(max_size, GFP_KERNEL | GFP_DMA); |
185 | if (appldata_os_data == NULL) { | 185 | if (appldata_os_data == NULL) { |
186 | rc = -ENOMEM; | 186 | rc = -ENOMEM; |
187 | goto out; | 187 | goto out; |
diff --git a/arch/s390/defconfig b/arch/s390/defconfig index bcd6884985ad..253f158db668 100644 --- a/arch/s390/defconfig +++ b/arch/s390/defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.34-rc3 | 3 | # Linux kernel version: 2.6.35-rc1 |
4 | # Fri Apr 9 09:57:10 2010 | 4 | # Fri Jun 4 11:32:40 2010 |
5 | # | 5 | # |
6 | CONFIG_SCHED_MC=y | 6 | CONFIG_SCHED_MC=y |
7 | CONFIG_MMU=y | 7 | CONFIG_MMU=y |
@@ -35,11 +35,13 @@ CONFIG_CONSTRUCTORS=y | |||
35 | CONFIG_EXPERIMENTAL=y | 35 | CONFIG_EXPERIMENTAL=y |
36 | CONFIG_LOCK_KERNEL=y | 36 | CONFIG_LOCK_KERNEL=y |
37 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 37 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
38 | CONFIG_CROSS_COMPILE="" | ||
38 | CONFIG_LOCALVERSION="" | 39 | CONFIG_LOCALVERSION="" |
39 | CONFIG_LOCALVERSION_AUTO=y | 40 | CONFIG_LOCALVERSION_AUTO=y |
40 | CONFIG_HAVE_KERNEL_GZIP=y | 41 | CONFIG_HAVE_KERNEL_GZIP=y |
41 | CONFIG_HAVE_KERNEL_BZIP2=y | 42 | CONFIG_HAVE_KERNEL_BZIP2=y |
42 | CONFIG_HAVE_KERNEL_LZMA=y | 43 | CONFIG_HAVE_KERNEL_LZMA=y |
44 | CONFIG_HAVE_KERNEL_LZO=y | ||
43 | CONFIG_KERNEL_GZIP=y | 45 | CONFIG_KERNEL_GZIP=y |
44 | # CONFIG_KERNEL_BZIP2 is not set | 46 | # CONFIG_KERNEL_BZIP2 is not set |
45 | # CONFIG_KERNEL_LZMA is not set | 47 | # CONFIG_KERNEL_LZMA is not set |
@@ -77,6 +79,7 @@ CONFIG_CGROUP_NS=y | |||
77 | # CONFIG_CGROUP_CPUACCT is not set | 79 | # CONFIG_CGROUP_CPUACCT is not set |
78 | # CONFIG_RESOURCE_COUNTERS is not set | 80 | # CONFIG_RESOURCE_COUNTERS is not set |
79 | # CONFIG_CGROUP_SCHED is not set | 81 | # CONFIG_CGROUP_SCHED is not set |
82 | # CONFIG_BLK_CGROUP is not set | ||
80 | CONFIG_SYSFS_DEPRECATED=y | 83 | CONFIG_SYSFS_DEPRECATED=y |
81 | CONFIG_SYSFS_DEPRECATED_V2=y | 84 | CONFIG_SYSFS_DEPRECATED_V2=y |
82 | # CONFIG_RELAY is not set | 85 | # CONFIG_RELAY is not set |
@@ -157,7 +160,6 @@ CONFIG_STOP_MACHINE=y | |||
157 | CONFIG_BLOCK=y | 160 | CONFIG_BLOCK=y |
158 | CONFIG_BLK_DEV_BSG=y | 161 | CONFIG_BLK_DEV_BSG=y |
159 | # CONFIG_BLK_DEV_INTEGRITY is not set | 162 | # CONFIG_BLK_DEV_INTEGRITY is not set |
160 | # CONFIG_BLK_CGROUP is not set | ||
161 | CONFIG_BLOCK_COMPAT=y | 163 | CONFIG_BLOCK_COMPAT=y |
162 | 164 | ||
163 | # | 165 | # |
@@ -166,7 +168,6 @@ CONFIG_BLOCK_COMPAT=y | |||
166 | CONFIG_IOSCHED_NOOP=y | 168 | CONFIG_IOSCHED_NOOP=y |
167 | CONFIG_IOSCHED_DEADLINE=y | 169 | CONFIG_IOSCHED_DEADLINE=y |
168 | CONFIG_IOSCHED_CFQ=y | 170 | CONFIG_IOSCHED_CFQ=y |
169 | # CONFIG_CFQ_GROUP_IOSCHED is not set | ||
170 | CONFIG_DEFAULT_DEADLINE=y | 171 | CONFIG_DEFAULT_DEADLINE=y |
171 | # CONFIG_DEFAULT_CFQ is not set | 172 | # CONFIG_DEFAULT_CFQ is not set |
172 | # CONFIG_DEFAULT_NOOP is not set | 173 | # CONFIG_DEFAULT_NOOP is not set |
@@ -247,7 +248,6 @@ CONFIG_64BIT=y | |||
247 | CONFIG_SMP=y | 248 | CONFIG_SMP=y |
248 | CONFIG_NR_CPUS=32 | 249 | CONFIG_NR_CPUS=32 |
249 | CONFIG_HOTPLUG_CPU=y | 250 | CONFIG_HOTPLUG_CPU=y |
250 | # CONFIG_SCHED_BOOK is not set | ||
251 | CONFIG_COMPAT=y | 251 | CONFIG_COMPAT=y |
252 | CONFIG_SYSVIPC_COMPAT=y | 252 | CONFIG_SYSVIPC_COMPAT=y |
253 | CONFIG_AUDIT_ARCH=y | 253 | CONFIG_AUDIT_ARCH=y |
@@ -320,7 +320,6 @@ CONFIG_COMPAT_BINFMT_ELF=y | |||
320 | # CONFIG_HAVE_AOUT is not set | 320 | # CONFIG_HAVE_AOUT is not set |
321 | CONFIG_BINFMT_MISC=m | 321 | CONFIG_BINFMT_MISC=m |
322 | CONFIG_FORCE_MAX_ZONEORDER=9 | 322 | CONFIG_FORCE_MAX_ZONEORDER=9 |
323 | # CONFIG_PROCESS_DEBUG is not set | ||
324 | CONFIG_PFAULT=y | 323 | CONFIG_PFAULT=y |
325 | # CONFIG_SHARED_KERNEL is not set | 324 | # CONFIG_SHARED_KERNEL is not set |
326 | # CONFIG_CMM is not set | 325 | # CONFIG_CMM is not set |
@@ -457,6 +456,7 @@ CONFIG_NF_CONNTRACK=m | |||
457 | # CONFIG_IP6_NF_IPTABLES is not set | 456 | # CONFIG_IP6_NF_IPTABLES is not set |
458 | # CONFIG_IP_DCCP is not set | 457 | # CONFIG_IP_DCCP is not set |
459 | CONFIG_IP_SCTP=m | 458 | CONFIG_IP_SCTP=m |
459 | # CONFIG_NET_SCTPPROBE is not set | ||
460 | # CONFIG_SCTP_DBG_MSG is not set | 460 | # CONFIG_SCTP_DBG_MSG is not set |
461 | # CONFIG_SCTP_DBG_OBJCNT is not set | 461 | # CONFIG_SCTP_DBG_OBJCNT is not set |
462 | # CONFIG_SCTP_HMAC_NONE is not set | 462 | # CONFIG_SCTP_HMAC_NONE is not set |
@@ -465,6 +465,7 @@ CONFIG_SCTP_HMAC_MD5=y | |||
465 | # CONFIG_RDS is not set | 465 | # CONFIG_RDS is not set |
466 | # CONFIG_TIPC is not set | 466 | # CONFIG_TIPC is not set |
467 | # CONFIG_ATM is not set | 467 | # CONFIG_ATM is not set |
468 | # CONFIG_L2TP is not set | ||
468 | # CONFIG_BRIDGE is not set | 469 | # CONFIG_BRIDGE is not set |
469 | # CONFIG_VLAN_8021Q is not set | 470 | # CONFIG_VLAN_8021Q is not set |
470 | # CONFIG_DECNET is not set | 471 | # CONFIG_DECNET is not set |
@@ -525,6 +526,7 @@ CONFIG_NET_ACT_NAT=m | |||
525 | # CONFIG_NET_CLS_IND is not set | 526 | # CONFIG_NET_CLS_IND is not set |
526 | CONFIG_NET_SCH_FIFO=y | 527 | CONFIG_NET_SCH_FIFO=y |
527 | # CONFIG_DCB is not set | 528 | # CONFIG_DCB is not set |
529 | CONFIG_RPS=y | ||
528 | 530 | ||
529 | # | 531 | # |
530 | # Network testing | 532 | # Network testing |
@@ -546,6 +548,7 @@ CONFIG_CAN_VCAN=m | |||
546 | # CONFIG_WIMAX is not set | 548 | # CONFIG_WIMAX is not set |
547 | # CONFIG_RFKILL is not set | 549 | # CONFIG_RFKILL is not set |
548 | # CONFIG_NET_9P is not set | 550 | # CONFIG_NET_9P is not set |
551 | # CONFIG_CAIF is not set | ||
549 | # CONFIG_PCMCIA is not set | 552 | # CONFIG_PCMCIA is not set |
550 | CONFIG_CCW=y | 553 | CONFIG_CCW=y |
551 | 554 | ||
@@ -728,6 +731,7 @@ CONFIG_VIRTIO_NET=m | |||
728 | # Character devices | 731 | # Character devices |
729 | # | 732 | # |
730 | CONFIG_DEVKMEM=y | 733 | CONFIG_DEVKMEM=y |
734 | # CONFIG_N_GSM is not set | ||
731 | CONFIG_UNIX98_PTYS=y | 735 | CONFIG_UNIX98_PTYS=y |
732 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 736 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
733 | CONFIG_LEGACY_PTYS=y | 737 | CONFIG_LEGACY_PTYS=y |
@@ -775,6 +779,7 @@ CONFIG_S390_TAPE_34XX=m | |||
775 | # CONFIG_MONREADER is not set | 779 | # CONFIG_MONREADER is not set |
776 | CONFIG_MONWRITER=m | 780 | CONFIG_MONWRITER=m |
777 | CONFIG_S390_VMUR=m | 781 | CONFIG_S390_VMUR=m |
782 | # CONFIG_RAMOOPS is not set | ||
778 | 783 | ||
779 | # | 784 | # |
780 | # PPS support | 785 | # PPS support |
@@ -788,10 +793,6 @@ CONFIG_S390_VMUR=m | |||
788 | # CONFIG_NEW_LEDS is not set | 793 | # CONFIG_NEW_LEDS is not set |
789 | CONFIG_ACCESSIBILITY=y | 794 | CONFIG_ACCESSIBILITY=y |
790 | # CONFIG_AUXDISPLAY is not set | 795 | # CONFIG_AUXDISPLAY is not set |
791 | |||
792 | # | ||
793 | # TI VLYNQ | ||
794 | # | ||
795 | # CONFIG_STAGING is not set | 796 | # CONFIG_STAGING is not set |
796 | 797 | ||
797 | # | 798 | # |
@@ -976,6 +977,7 @@ CONFIG_DEBUG_MEMORY_INIT=y | |||
976 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 977 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
977 | CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y | 978 | CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y |
978 | # CONFIG_LKDTM is not set | 979 | # CONFIG_LKDTM is not set |
980 | # CONFIG_CPU_NOTIFIER_ERROR_INJECT is not set | ||
979 | # CONFIG_FAULT_INJECTION is not set | 981 | # CONFIG_FAULT_INJECTION is not set |
980 | # CONFIG_LATENCYTOP is not set | 982 | # CONFIG_LATENCYTOP is not set |
981 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 983 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
@@ -1010,6 +1012,7 @@ CONFIG_BRANCH_PROFILE_NONE=y | |||
1010 | CONFIG_KPROBE_EVENT=y | 1012 | CONFIG_KPROBE_EVENT=y |
1011 | # CONFIG_RING_BUFFER_BENCHMARK is not set | 1013 | # CONFIG_RING_BUFFER_BENCHMARK is not set |
1012 | # CONFIG_DYNAMIC_DEBUG is not set | 1014 | # CONFIG_DYNAMIC_DEBUG is not set |
1015 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
1013 | CONFIG_SAMPLES=y | 1016 | CONFIG_SAMPLES=y |
1014 | # CONFIG_SAMPLE_TRACEPOINTS is not set | 1017 | # CONFIG_SAMPLE_TRACEPOINTS is not set |
1015 | # CONFIG_SAMPLE_TRACE_EVENTS is not set | 1018 | # CONFIG_SAMPLE_TRACE_EVENTS is not set |
diff --git a/arch/s390/kernel/module.c b/arch/s390/kernel/module.c index 639380a0c45c..22cfd634c355 100644 --- a/arch/s390/kernel/module.c +++ b/arch/s390/kernel/module.c | |||
@@ -55,8 +55,10 @@ void *module_alloc(unsigned long size) | |||
55 | /* Free memory returned from module_alloc */ | 55 | /* Free memory returned from module_alloc */ |
56 | void module_free(struct module *mod, void *module_region) | 56 | void module_free(struct module *mod, void *module_region) |
57 | { | 57 | { |
58 | vfree(mod->arch.syminfo); | 58 | if (mod) { |
59 | mod->arch.syminfo = NULL; | 59 | vfree(mod->arch.syminfo); |
60 | mod->arch.syminfo = NULL; | ||
61 | } | ||
60 | vfree(module_region); | 62 | vfree(module_region); |
61 | } | 63 | } |
62 | 64 | ||
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c index 8093e6f47f49..ae3705816878 100644 --- a/arch/s390/kvm/kvm-s390.c +++ b/arch/s390/kvm/kvm-s390.c | |||
@@ -761,7 +761,7 @@ static int __init kvm_s390_init(void) | |||
761 | * to hold the maximum amount of facilites. On the other hand, we | 761 | * to hold the maximum amount of facilites. On the other hand, we |
762 | * only set facilities that are known to work in KVM. | 762 | * only set facilities that are known to work in KVM. |
763 | */ | 763 | */ |
764 | facilities = (unsigned long long *) get_zeroed_page(GFP_DMA); | 764 | facilities = (unsigned long long *) get_zeroed_page(GFP_KERNEL|GFP_DMA); |
765 | if (!facilities) { | 765 | if (!facilities) { |
766 | kvm_exit(); | 766 | kvm_exit(); |
767 | return -ENOMEM; | 767 | return -ENOMEM; |
diff --git a/arch/s390/kvm/sigp.c b/arch/s390/kvm/sigp.c index eff3c5989b46..702276f5e2fa 100644 --- a/arch/s390/kvm/sigp.c +++ b/arch/s390/kvm/sigp.c | |||
@@ -113,7 +113,7 @@ static int __inject_sigp_stop(struct kvm_s390_local_interrupt *li, int action) | |||
113 | { | 113 | { |
114 | struct kvm_s390_interrupt_info *inti; | 114 | struct kvm_s390_interrupt_info *inti; |
115 | 115 | ||
116 | inti = kzalloc(sizeof(*inti), GFP_KERNEL); | 116 | inti = kzalloc(sizeof(*inti), GFP_ATOMIC); |
117 | if (!inti) | 117 | if (!inti) |
118 | return -ENOMEM; | 118 | return -ENOMEM; |
119 | inti->type = KVM_S390_SIGP_STOP; | 119 | inti->type = KVM_S390_SIGP_STOP; |
diff --git a/arch/s390/mm/extmem.c b/arch/s390/mm/extmem.c index 6409fd57eb04..3cc95dd0a3a6 100644 --- a/arch/s390/mm/extmem.c +++ b/arch/s390/mm/extmem.c | |||
@@ -105,7 +105,7 @@ static int | |||
105 | dcss_set_subcodes(void) | 105 | dcss_set_subcodes(void) |
106 | { | 106 | { |
107 | #ifdef CONFIG_64BIT | 107 | #ifdef CONFIG_64BIT |
108 | char *name = kmalloc(8 * sizeof(char), GFP_DMA); | 108 | char *name = kmalloc(8 * sizeof(char), GFP_KERNEL | GFP_DMA); |
109 | unsigned long rx, ry; | 109 | unsigned long rx, ry; |
110 | int rc; | 110 | int rc; |
111 | 111 | ||
@@ -252,12 +252,13 @@ dcss_diag_translate_rc (int vm_rc) { | |||
252 | static int | 252 | static int |
253 | query_segment_type (struct dcss_segment *seg) | 253 | query_segment_type (struct dcss_segment *seg) |
254 | { | 254 | { |
255 | struct qin64 *qin = kmalloc (sizeof(struct qin64), GFP_DMA); | ||
256 | struct qout64 *qout = kmalloc (sizeof(struct qout64), GFP_DMA); | ||
257 | |||
258 | int diag_cc, rc, i; | ||
259 | unsigned long dummy, vmrc; | 255 | unsigned long dummy, vmrc; |
256 | int diag_cc, rc, i; | ||
257 | struct qout64 *qout; | ||
258 | struct qin64 *qin; | ||
260 | 259 | ||
260 | qin = kmalloc(sizeof(*qin), GFP_KERNEL | GFP_DMA); | ||
261 | qout = kmalloc(sizeof(*qout), GFP_KERNEL | GFP_DMA); | ||
261 | if ((qin == NULL) || (qout == NULL)) { | 262 | if ((qin == NULL) || (qout == NULL)) { |
262 | rc = -ENOMEM; | 263 | rc = -ENOMEM; |
263 | goto out_free; | 264 | goto out_free; |
@@ -286,7 +287,7 @@ query_segment_type (struct dcss_segment *seg) | |||
286 | copy data for the new format. */ | 287 | copy data for the new format. */ |
287 | if (segext_scode == DCSS_SEGEXT) { | 288 | if (segext_scode == DCSS_SEGEXT) { |
288 | struct qout64_old *qout_old; | 289 | struct qout64_old *qout_old; |
289 | qout_old = kzalloc(sizeof(struct qout64_old), GFP_DMA); | 290 | qout_old = kzalloc(sizeof(*qout_old), GFP_KERNEL | GFP_DMA); |
290 | if (qout_old == NULL) { | 291 | if (qout_old == NULL) { |
291 | rc = -ENOMEM; | 292 | rc = -ENOMEM; |
292 | goto out_free; | 293 | goto out_free; |
@@ -407,11 +408,11 @@ segment_overlaps_others (struct dcss_segment *seg) | |||
407 | static int | 408 | static int |
408 | __segment_load (char *name, int do_nonshared, unsigned long *addr, unsigned long *end) | 409 | __segment_load (char *name, int do_nonshared, unsigned long *addr, unsigned long *end) |
409 | { | 410 | { |
410 | struct dcss_segment *seg = kmalloc(sizeof(struct dcss_segment), | ||
411 | GFP_DMA); | ||
412 | int rc, diag_cc; | ||
413 | unsigned long start_addr, end_addr, dummy; | 411 | unsigned long start_addr, end_addr, dummy; |
412 | struct dcss_segment *seg; | ||
413 | int rc, diag_cc; | ||
414 | 414 | ||
415 | seg = kmalloc(sizeof(*seg), GFP_KERNEL | GFP_DMA); | ||
415 | if (seg == NULL) { | 416 | if (seg == NULL) { |
416 | rc = -ENOMEM; | 417 | rc = -ENOMEM; |
417 | goto out; | 418 | goto out; |
diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c index 1984a6e89e84..261f86d102e8 100644 --- a/drivers/ata/libahci.c +++ b/drivers/ata/libahci.c | |||
@@ -541,29 +541,11 @@ static int ahci_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) | |||
541 | return -EINVAL; | 541 | return -EINVAL; |
542 | } | 542 | } |
543 | 543 | ||
544 | static int ahci_is_device_present(void __iomem *port_mmio) | ||
545 | { | ||
546 | u8 status = readl(port_mmio + PORT_TFDATA) & 0xff; | ||
547 | |||
548 | /* Make sure PxTFD.STS.BSY and PxTFD.STS.DRQ are 0 */ | ||
549 | if (status & (ATA_BUSY | ATA_DRQ)) | ||
550 | return 0; | ||
551 | |||
552 | /* Make sure PxSSTS.DET is 3h */ | ||
553 | status = readl(port_mmio + PORT_SCR_STAT) & 0xf; | ||
554 | if (status != 3) | ||
555 | return 0; | ||
556 | return 1; | ||
557 | } | ||
558 | |||
559 | void ahci_start_engine(struct ata_port *ap) | 544 | void ahci_start_engine(struct ata_port *ap) |
560 | { | 545 | { |
561 | void __iomem *port_mmio = ahci_port_base(ap); | 546 | void __iomem *port_mmio = ahci_port_base(ap); |
562 | u32 tmp; | 547 | u32 tmp; |
563 | 548 | ||
564 | if (!ahci_is_device_present(port_mmio)) | ||
565 | return; | ||
566 | |||
567 | /* start DMA */ | 549 | /* start DMA */ |
568 | tmp = readl(port_mmio + PORT_CMD); | 550 | tmp = readl(port_mmio + PORT_CMD); |
569 | tmp |= PORT_CMD_START; | 551 | tmp |= PORT_CMD_START; |
@@ -1892,6 +1874,9 @@ static void ahci_error_handler(struct ata_port *ap) | |||
1892 | } | 1874 | } |
1893 | 1875 | ||
1894 | sata_pmp_error_handler(ap); | 1876 | sata_pmp_error_handler(ap); |
1877 | |||
1878 | if (!ata_dev_enabled(ap->link.device)) | ||
1879 | ahci_stop_engine(ap); | ||
1895 | } | 1880 | } |
1896 | 1881 | ||
1897 | static void ahci_post_internal_cmd(struct ata_queued_cmd *qc) | 1882 | static void ahci_post_internal_cmd(struct ata_queued_cmd *qc) |
diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c index e9250514734b..70b58fe9e5b1 100644 --- a/drivers/ata/sata_sil24.c +++ b/drivers/ata/sata_sil24.c | |||
@@ -539,12 +539,12 @@ static void sil24_config_port(struct ata_port *ap) | |||
539 | writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_CLR); | 539 | writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_CLR); |
540 | 540 | ||
541 | /* zero error counters. */ | 541 | /* zero error counters. */ |
542 | writel(0x8000, port + PORT_DECODE_ERR_THRESH); | 542 | writew(0x8000, port + PORT_DECODE_ERR_THRESH); |
543 | writel(0x8000, port + PORT_CRC_ERR_THRESH); | 543 | writew(0x8000, port + PORT_CRC_ERR_THRESH); |
544 | writel(0x8000, port + PORT_HSHK_ERR_THRESH); | 544 | writew(0x8000, port + PORT_HSHK_ERR_THRESH); |
545 | writel(0x0000, port + PORT_DECODE_ERR_CNT); | 545 | writew(0x0000, port + PORT_DECODE_ERR_CNT); |
546 | writel(0x0000, port + PORT_CRC_ERR_CNT); | 546 | writew(0x0000, port + PORT_CRC_ERR_CNT); |
547 | writel(0x0000, port + PORT_HSHK_ERR_CNT); | 547 | writew(0x0000, port + PORT_HSHK_ERR_CNT); |
548 | 548 | ||
549 | /* always use 64bit activation */ | 549 | /* always use 64bit activation */ |
550 | writel(PORT_CS_32BIT_ACTV, port + PORT_CTRL_CLR); | 550 | writel(PORT_CS_32BIT_ACTV, port + PORT_CTRL_CLR); |
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c index 0ecd0f6aa2c0..4730c42a5ee5 100644 --- a/drivers/ata/sata_via.c +++ b/drivers/ata/sata_via.c | |||
@@ -578,10 +578,24 @@ static void svia_configure(struct pci_dev *pdev) | |||
578 | 578 | ||
579 | /* | 579 | /* |
580 | * vt6421 has problems talking to some drives. The following | 580 | * vt6421 has problems talking to some drives. The following |
581 | * is the magic fix from Joseph Chan <JosephChan@via.com.tw>. | 581 | * is the fix from Joseph Chan <JosephChan@via.com.tw>. |
582 | * Please add proper documentation if possible. | 582 | * |
583 | * When host issues HOLD, device may send up to 20DW of data | ||
584 | * before acknowledging it with HOLDA and the host should be | ||
585 | * able to buffer them in FIFO. Unfortunately, some WD drives | ||
586 | * send upto 40DW before acknowledging HOLD and, in the | ||
587 | * default configuration, this ends up overflowing vt6421's | ||
588 | * FIFO, making the controller abort the transaction with | ||
589 | * R_ERR. | ||
590 | * | ||
591 | * Rx52[2] is the internal 128DW FIFO Flow control watermark | ||
592 | * adjusting mechanism enable bit and the default value 0 | ||
593 | * means host will issue HOLD to device when the left FIFO | ||
594 | * size goes below 32DW. Setting it to 1 makes the watermark | ||
595 | * 64DW. | ||
583 | * | 596 | * |
584 | * https://bugzilla.kernel.org/show_bug.cgi?id=15173 | 597 | * https://bugzilla.kernel.org/show_bug.cgi?id=15173 |
598 | * http://article.gmane.org/gmane.linux.ide/46352 | ||
585 | */ | 599 | */ |
586 | if (pdev->device == 0x3249) { | 600 | if (pdev->device == 0x3249) { |
587 | pci_read_config_byte(pdev, 0x52, &tmp8); | 601 | pci_read_config_byte(pdev, 0x52, &tmp8); |
diff --git a/drivers/firewire/core-card.c b/drivers/firewire/core-card.c index 9dcb30466ec0..371713ff0266 100644 --- a/drivers/firewire/core-card.c +++ b/drivers/firewire/core-card.c | |||
@@ -231,7 +231,7 @@ void fw_schedule_bm_work(struct fw_card *card, unsigned long delay) | |||
231 | static void fw_card_bm_work(struct work_struct *work) | 231 | static void fw_card_bm_work(struct work_struct *work) |
232 | { | 232 | { |
233 | struct fw_card *card = container_of(work, struct fw_card, work.work); | 233 | struct fw_card *card = container_of(work, struct fw_card, work.work); |
234 | struct fw_device *root_device; | 234 | struct fw_device *root_device, *irm_device; |
235 | struct fw_node *root_node; | 235 | struct fw_node *root_node; |
236 | unsigned long flags; | 236 | unsigned long flags; |
237 | int root_id, new_root_id, irm_id, local_id; | 237 | int root_id, new_root_id, irm_id, local_id; |
@@ -239,6 +239,7 @@ static void fw_card_bm_work(struct work_struct *work) | |||
239 | bool do_reset = false; | 239 | bool do_reset = false; |
240 | bool root_device_is_running; | 240 | bool root_device_is_running; |
241 | bool root_device_is_cmc; | 241 | bool root_device_is_cmc; |
242 | bool irm_is_1394_1995_only; | ||
242 | 243 | ||
243 | spin_lock_irqsave(&card->lock, flags); | 244 | spin_lock_irqsave(&card->lock, flags); |
244 | 245 | ||
@@ -248,12 +249,18 @@ static void fw_card_bm_work(struct work_struct *work) | |||
248 | } | 249 | } |
249 | 250 | ||
250 | generation = card->generation; | 251 | generation = card->generation; |
252 | |||
251 | root_node = card->root_node; | 253 | root_node = card->root_node; |
252 | fw_node_get(root_node); | 254 | fw_node_get(root_node); |
253 | root_device = root_node->data; | 255 | root_device = root_node->data; |
254 | root_device_is_running = root_device && | 256 | root_device_is_running = root_device && |
255 | atomic_read(&root_device->state) == FW_DEVICE_RUNNING; | 257 | atomic_read(&root_device->state) == FW_DEVICE_RUNNING; |
256 | root_device_is_cmc = root_device && root_device->cmc; | 258 | root_device_is_cmc = root_device && root_device->cmc; |
259 | |||
260 | irm_device = card->irm_node->data; | ||
261 | irm_is_1394_1995_only = irm_device && irm_device->config_rom && | ||
262 | (irm_device->config_rom[2] & 0x000000f0) == 0; | ||
263 | |||
257 | root_id = root_node->node_id; | 264 | root_id = root_node->node_id; |
258 | irm_id = card->irm_node->node_id; | 265 | irm_id = card->irm_node->node_id; |
259 | local_id = card->local_node->node_id; | 266 | local_id = card->local_node->node_id; |
@@ -276,8 +283,15 @@ static void fw_card_bm_work(struct work_struct *work) | |||
276 | 283 | ||
277 | if (!card->irm_node->link_on) { | 284 | if (!card->irm_node->link_on) { |
278 | new_root_id = local_id; | 285 | new_root_id = local_id; |
279 | fw_notify("IRM has link off, making local node (%02x) root.\n", | 286 | fw_notify("%s, making local node (%02x) root.\n", |
280 | new_root_id); | 287 | "IRM has link off", new_root_id); |
288 | goto pick_me; | ||
289 | } | ||
290 | |||
291 | if (irm_is_1394_1995_only) { | ||
292 | new_root_id = local_id; | ||
293 | fw_notify("%s, making local node (%02x) root.\n", | ||
294 | "IRM is not 1394a compliant", new_root_id); | ||
281 | goto pick_me; | 295 | goto pick_me; |
282 | } | 296 | } |
283 | 297 | ||
@@ -316,8 +330,8 @@ static void fw_card_bm_work(struct work_struct *work) | |||
316 | * root, and thus, IRM. | 330 | * root, and thus, IRM. |
317 | */ | 331 | */ |
318 | new_root_id = local_id; | 332 | new_root_id = local_id; |
319 | fw_notify("BM lock failed, making local node (%02x) root.\n", | 333 | fw_notify("%s, making local node (%02x) root.\n", |
320 | new_root_id); | 334 | "BM lock failed", new_root_id); |
321 | goto pick_me; | 335 | goto pick_me; |
322 | } | 336 | } |
323 | } else if (card->bm_generation != generation) { | 337 | } else if (card->bm_generation != generation) { |
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c index 994d23beeb1d..57cea01c4ffb 100644 --- a/drivers/gpu/drm/drm_crtc.c +++ b/drivers/gpu/drm/drm_crtc.c | |||
@@ -1840,8 +1840,10 @@ int drm_mode_dirtyfb_ioctl(struct drm_device *dev, | |||
1840 | 1840 | ||
1841 | ret = copy_from_user(clips, clips_ptr, | 1841 | ret = copy_from_user(clips, clips_ptr, |
1842 | num_clips * sizeof(*clips)); | 1842 | num_clips * sizeof(*clips)); |
1843 | if (ret) | 1843 | if (ret) { |
1844 | ret = -EFAULT; | ||
1844 | goto out_err2; | 1845 | goto out_err2; |
1846 | } | ||
1845 | } | 1847 | } |
1846 | 1848 | ||
1847 | if (fb->funcs->dirty) { | 1849 | if (fb->funcs->dirty) { |
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index b3779d243aef..08c4c926e65f 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c | |||
@@ -264,7 +264,7 @@ bool drm_fb_helper_force_kernel_mode(void) | |||
264 | int drm_fb_helper_panic(struct notifier_block *n, unsigned long ununsed, | 264 | int drm_fb_helper_panic(struct notifier_block *n, unsigned long ununsed, |
265 | void *panic_str) | 265 | void *panic_str) |
266 | { | 266 | { |
267 | DRM_ERROR("panic occurred, switching back to text console\n"); | 267 | printk(KERN_ERR "panic occurred, switching back to text console\n"); |
268 | return drm_fb_helper_force_kernel_mode(); | 268 | return drm_fb_helper_force_kernel_mode(); |
269 | return 0; | 269 | return 0; |
270 | } | 270 | } |
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index b2ebf02e4f8a..59a2bf8592ec 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -1402,19 +1402,19 @@ static int i915_load_modeset_init(struct drm_device *dev, | |||
1402 | /* if we have > 1 VGA cards, then disable the radeon VGA resources */ | 1402 | /* if we have > 1 VGA cards, then disable the radeon VGA resources */ |
1403 | ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode); | 1403 | ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode); |
1404 | if (ret) | 1404 | if (ret) |
1405 | goto destroy_ringbuffer; | 1405 | goto cleanup_ringbuffer; |
1406 | 1406 | ||
1407 | ret = vga_switcheroo_register_client(dev->pdev, | 1407 | ret = vga_switcheroo_register_client(dev->pdev, |
1408 | i915_switcheroo_set_state, | 1408 | i915_switcheroo_set_state, |
1409 | i915_switcheroo_can_switch); | 1409 | i915_switcheroo_can_switch); |
1410 | if (ret) | 1410 | if (ret) |
1411 | goto destroy_ringbuffer; | 1411 | goto cleanup_vga_client; |
1412 | 1412 | ||
1413 | intel_modeset_init(dev); | 1413 | intel_modeset_init(dev); |
1414 | 1414 | ||
1415 | ret = drm_irq_install(dev); | 1415 | ret = drm_irq_install(dev); |
1416 | if (ret) | 1416 | if (ret) |
1417 | goto destroy_ringbuffer; | 1417 | goto cleanup_vga_switcheroo; |
1418 | 1418 | ||
1419 | /* Always safe in the mode setting case. */ | 1419 | /* Always safe in the mode setting case. */ |
1420 | /* FIXME: do pre/post-mode set stuff in core KMS code */ | 1420 | /* FIXME: do pre/post-mode set stuff in core KMS code */ |
@@ -1426,11 +1426,20 @@ static int i915_load_modeset_init(struct drm_device *dev, | |||
1426 | 1426 | ||
1427 | I915_WRITE(INSTPM, (1 << 5) | (1 << 21)); | 1427 | I915_WRITE(INSTPM, (1 << 5) | (1 << 21)); |
1428 | 1428 | ||
1429 | intel_fbdev_init(dev); | 1429 | ret = intel_fbdev_init(dev); |
1430 | if (ret) | ||
1431 | goto cleanup_irq; | ||
1432 | |||
1430 | drm_kms_helper_poll_init(dev); | 1433 | drm_kms_helper_poll_init(dev); |
1431 | return 0; | 1434 | return 0; |
1432 | 1435 | ||
1433 | destroy_ringbuffer: | 1436 | cleanup_irq: |
1437 | drm_irq_uninstall(dev); | ||
1438 | cleanup_vga_switcheroo: | ||
1439 | vga_switcheroo_unregister_client(dev->pdev); | ||
1440 | cleanup_vga_client: | ||
1441 | vga_client_register(dev->pdev, NULL, NULL, NULL); | ||
1442 | cleanup_ringbuffer: | ||
1434 | mutex_lock(&dev->struct_mutex); | 1443 | mutex_lock(&dev->struct_mutex); |
1435 | i915_gem_cleanup_ringbuffer(dev); | 1444 | i915_gem_cleanup_ringbuffer(dev); |
1436 | mutex_unlock(&dev->struct_mutex); | 1445 | mutex_unlock(&dev->struct_mutex); |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 9ed8ecd95801..276583159847 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -278,6 +278,7 @@ typedef struct drm_i915_private { | |||
278 | struct mem_block *agp_heap; | 278 | struct mem_block *agp_heap; |
279 | unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds; | 279 | unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds; |
280 | int vblank_pipe; | 280 | int vblank_pipe; |
281 | int num_pipe; | ||
281 | 282 | ||
282 | /* For hangcheck timer */ | 283 | /* For hangcheck timer */ |
283 | #define DRM_I915_HANGCHECK_PERIOD 75 /* in jiffies */ | 284 | #define DRM_I915_HANGCHECK_PERIOD 75 /* in jiffies */ |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 04e1bb499ff8..cc8131ff319f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -3653,6 +3653,11 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
3653 | pipeconf &= ~PIPEACONF_DOUBLE_WIDE; | 3653 | pipeconf &= ~PIPEACONF_DOUBLE_WIDE; |
3654 | } | 3654 | } |
3655 | 3655 | ||
3656 | dspcntr |= DISPLAY_PLANE_ENABLE; | ||
3657 | pipeconf |= PIPEACONF_ENABLE; | ||
3658 | dpll |= DPLL_VCO_ENABLE; | ||
3659 | |||
3660 | |||
3656 | /* Disable the panel fitter if it was on our pipe */ | 3661 | /* Disable the panel fitter if it was on our pipe */ |
3657 | if (!HAS_PCH_SPLIT(dev) && intel_panel_fitter_pipe(dev) == pipe) | 3662 | if (!HAS_PCH_SPLIT(dev) && intel_panel_fitter_pipe(dev) == pipe) |
3658 | I915_WRITE(PFIT_CONTROL, 0); | 3663 | I915_WRITE(PFIT_CONTROL, 0); |
@@ -5470,7 +5475,6 @@ static void intel_init_display(struct drm_device *dev) | |||
5470 | void intel_modeset_init(struct drm_device *dev) | 5475 | void intel_modeset_init(struct drm_device *dev) |
5471 | { | 5476 | { |
5472 | struct drm_i915_private *dev_priv = dev->dev_private; | 5477 | struct drm_i915_private *dev_priv = dev->dev_private; |
5473 | int num_pipe; | ||
5474 | int i; | 5478 | int i; |
5475 | 5479 | ||
5476 | drm_mode_config_init(dev); | 5480 | drm_mode_config_init(dev); |
@@ -5500,13 +5504,13 @@ void intel_modeset_init(struct drm_device *dev) | |||
5500 | dev->mode_config.fb_base = pci_resource_start(dev->pdev, 0); | 5504 | dev->mode_config.fb_base = pci_resource_start(dev->pdev, 0); |
5501 | 5505 | ||
5502 | if (IS_MOBILE(dev) || IS_I9XX(dev)) | 5506 | if (IS_MOBILE(dev) || IS_I9XX(dev)) |
5503 | num_pipe = 2; | 5507 | dev_priv->num_pipe = 2; |
5504 | else | 5508 | else |
5505 | num_pipe = 1; | 5509 | dev_priv->num_pipe = 1; |
5506 | DRM_DEBUG_KMS("%d display pipe%s available.\n", | 5510 | DRM_DEBUG_KMS("%d display pipe%s available.\n", |
5507 | num_pipe, num_pipe > 1 ? "s" : ""); | 5511 | dev_priv->num_pipe, dev_priv->num_pipe > 1 ? "s" : ""); |
5508 | 5512 | ||
5509 | for (i = 0; i < num_pipe; i++) { | 5513 | for (i = 0; i < dev_priv->num_pipe; i++) { |
5510 | intel_crtc_init(dev, i); | 5514 | intel_crtc_init(dev, i); |
5511 | } | 5515 | } |
5512 | 5516 | ||
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c index f8c76e64bb77..c3c505244e07 100644 --- a/drivers/gpu/drm/i915/intel_fb.c +++ b/drivers/gpu/drm/i915/intel_fb.c | |||
@@ -245,6 +245,7 @@ int intel_fbdev_init(struct drm_device *dev) | |||
245 | { | 245 | { |
246 | struct intel_fbdev *ifbdev; | 246 | struct intel_fbdev *ifbdev; |
247 | drm_i915_private_t *dev_priv = dev->dev_private; | 247 | drm_i915_private_t *dev_priv = dev->dev_private; |
248 | int ret; | ||
248 | 249 | ||
249 | ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL); | 250 | ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL); |
250 | if (!ifbdev) | 251 | if (!ifbdev) |
@@ -253,8 +254,13 @@ int intel_fbdev_init(struct drm_device *dev) | |||
253 | dev_priv->fbdev = ifbdev; | 254 | dev_priv->fbdev = ifbdev; |
254 | ifbdev->helper.funcs = &intel_fb_helper_funcs; | 255 | ifbdev->helper.funcs = &intel_fb_helper_funcs; |
255 | 256 | ||
256 | drm_fb_helper_init(dev, &ifbdev->helper, 2, | 257 | ret = drm_fb_helper_init(dev, &ifbdev->helper, |
257 | INTELFB_CONN_LIMIT); | 258 | dev_priv->num_pipe, |
259 | INTELFB_CONN_LIMIT); | ||
260 | if (ret) { | ||
261 | kfree(ifbdev); | ||
262 | return ret; | ||
263 | } | ||
258 | 264 | ||
259 | drm_fb_helper_single_add_all_connectors(&ifbdev->helper); | 265 | drm_fb_helper_single_add_all_connectors(&ifbdev->helper); |
260 | drm_fb_helper_initial_config(&ifbdev->helper, 32); | 266 | drm_fb_helper_initial_config(&ifbdev->helper, 32); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c index 9ba2deaadcc7..fc924b649195 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bios.c +++ b/drivers/gpu/drm/nouveau/nouveau_bios.c | |||
@@ -834,7 +834,7 @@ init_i2c_device_find(struct drm_device *dev, int i2c_index) | |||
834 | if (i2c_index == 0x81) | 834 | if (i2c_index == 0x81) |
835 | i2c_index = (dcb->i2c_default_indices & 0xf0) >> 4; | 835 | i2c_index = (dcb->i2c_default_indices & 0xf0) >> 4; |
836 | 836 | ||
837 | if (i2c_index > DCB_MAX_NUM_I2C_ENTRIES) { | 837 | if (i2c_index >= DCB_MAX_NUM_I2C_ENTRIES) { |
838 | NV_ERROR(dev, "invalid i2c_index 0x%x\n", i2c_index); | 838 | NV_ERROR(dev, "invalid i2c_index 0x%x\n", i2c_index); |
839 | return NULL; | 839 | return NULL; |
840 | } | 840 | } |
@@ -3920,7 +3920,8 @@ int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, b | |||
3920 | 3920 | ||
3921 | static uint8_t * | 3921 | static uint8_t * |
3922 | bios_output_config_match(struct drm_device *dev, struct dcb_entry *dcbent, | 3922 | bios_output_config_match(struct drm_device *dev, struct dcb_entry *dcbent, |
3923 | uint16_t record, int record_len, int record_nr) | 3923 | uint16_t record, int record_len, int record_nr, |
3924 | bool match_link) | ||
3924 | { | 3925 | { |
3925 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 3926 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
3926 | struct nvbios *bios = &dev_priv->vbios; | 3927 | struct nvbios *bios = &dev_priv->vbios; |
@@ -3928,12 +3929,28 @@ bios_output_config_match(struct drm_device *dev, struct dcb_entry *dcbent, | |||
3928 | uint16_t table; | 3929 | uint16_t table; |
3929 | int i, v; | 3930 | int i, v; |
3930 | 3931 | ||
3932 | switch (dcbent->type) { | ||
3933 | case OUTPUT_TMDS: | ||
3934 | case OUTPUT_LVDS: | ||
3935 | case OUTPUT_DP: | ||
3936 | break; | ||
3937 | default: | ||
3938 | match_link = false; | ||
3939 | break; | ||
3940 | } | ||
3941 | |||
3931 | for (i = 0; i < record_nr; i++, record += record_len) { | 3942 | for (i = 0; i < record_nr; i++, record += record_len) { |
3932 | table = ROM16(bios->data[record]); | 3943 | table = ROM16(bios->data[record]); |
3933 | if (!table) | 3944 | if (!table) |
3934 | continue; | 3945 | continue; |
3935 | entry = ROM32(bios->data[table]); | 3946 | entry = ROM32(bios->data[table]); |
3936 | 3947 | ||
3948 | if (match_link) { | ||
3949 | v = (entry & 0x00c00000) >> 22; | ||
3950 | if (!(v & dcbent->sorconf.link)) | ||
3951 | continue; | ||
3952 | } | ||
3953 | |||
3937 | v = (entry & 0x000f0000) >> 16; | 3954 | v = (entry & 0x000f0000) >> 16; |
3938 | if (!(v & dcbent->or)) | 3955 | if (!(v & dcbent->or)) |
3939 | continue; | 3956 | continue; |
@@ -3975,7 +3992,7 @@ nouveau_bios_dp_table(struct drm_device *dev, struct dcb_entry *dcbent, | |||
3975 | *length = table[4]; | 3992 | *length = table[4]; |
3976 | return bios_output_config_match(dev, dcbent, | 3993 | return bios_output_config_match(dev, dcbent, |
3977 | bios->display.dp_table_ptr + table[1], | 3994 | bios->display.dp_table_ptr + table[1], |
3978 | table[2], table[3]); | 3995 | table[2], table[3], table[0] >= 0x21); |
3979 | } | 3996 | } |
3980 | 3997 | ||
3981 | int | 3998 | int |
@@ -4064,7 +4081,7 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent, | |||
4064 | dcbent->type, dcbent->location, dcbent->or); | 4081 | dcbent->type, dcbent->location, dcbent->or); |
4065 | otable = bios_output_config_match(dev, dcbent, table[1] + | 4082 | otable = bios_output_config_match(dev, dcbent, table[1] + |
4066 | bios->display.script_table_ptr, | 4083 | bios->display.script_table_ptr, |
4067 | table[2], table[3]); | 4084 | table[2], table[3], table[0] >= 0x21); |
4068 | if (!otable) { | 4085 | if (!otable) { |
4069 | NV_ERROR(dev, "Couldn't find matching output script table\n"); | 4086 | NV_ERROR(dev, "Couldn't find matching output script table\n"); |
4070 | return 1; | 4087 | return 1; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c index fd4a2df715e9..c9a4a0d2a115 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c +++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c | |||
@@ -377,6 +377,7 @@ int nouveau_fbcon_init(struct drm_device *dev) | |||
377 | { | 377 | { |
378 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 378 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
379 | struct nouveau_fbdev *nfbdev; | 379 | struct nouveau_fbdev *nfbdev; |
380 | int ret; | ||
380 | 381 | ||
381 | nfbdev = kzalloc(sizeof(struct nouveau_fbdev), GFP_KERNEL); | 382 | nfbdev = kzalloc(sizeof(struct nouveau_fbdev), GFP_KERNEL); |
382 | if (!nfbdev) | 383 | if (!nfbdev) |
@@ -386,7 +387,12 @@ int nouveau_fbcon_init(struct drm_device *dev) | |||
386 | dev_priv->nfbdev = nfbdev; | 387 | dev_priv->nfbdev = nfbdev; |
387 | nfbdev->helper.funcs = &nouveau_fbcon_helper_funcs; | 388 | nfbdev->helper.funcs = &nouveau_fbcon_helper_funcs; |
388 | 389 | ||
389 | drm_fb_helper_init(dev, &nfbdev->helper, 2, 4); | 390 | ret = drm_fb_helper_init(dev, &nfbdev->helper, 2, 4); |
391 | if (ret) { | ||
392 | kfree(nfbdev); | ||
393 | return ret; | ||
394 | } | ||
395 | |||
390 | drm_fb_helper_single_add_all_connectors(&nfbdev->helper); | 396 | drm_fb_helper_single_add_all_connectors(&nfbdev->helper); |
391 | drm_fb_helper_initial_config(&nfbdev->helper, 32); | 397 | drm_fb_helper_initial_config(&nfbdev->helper, 32); |
392 | return 0; | 398 | return 0; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c index 147e59c40151..b02a231d6937 100644 --- a/drivers/gpu/drm/nouveau/nouveau_state.c +++ b/drivers/gpu/drm/nouveau/nouveau_state.c | |||
@@ -779,29 +779,24 @@ int nouveau_load(struct drm_device *dev, unsigned long flags) | |||
779 | return ret; | 779 | return ret; |
780 | } | 780 | } |
781 | 781 | ||
782 | /* map larger RAMIN aperture on NV40 cards */ | 782 | /* Map PRAMIN BAR, or on older cards, the aperture withing BAR0 */ |
783 | dev_priv->ramin = NULL; | ||
784 | if (dev_priv->card_type >= NV_40) { | 783 | if (dev_priv->card_type >= NV_40) { |
785 | int ramin_bar = 2; | 784 | int ramin_bar = 2; |
786 | if (pci_resource_len(dev->pdev, ramin_bar) == 0) | 785 | if (pci_resource_len(dev->pdev, ramin_bar) == 0) |
787 | ramin_bar = 3; | 786 | ramin_bar = 3; |
788 | 787 | ||
789 | dev_priv->ramin_size = pci_resource_len(dev->pdev, ramin_bar); | 788 | dev_priv->ramin_size = pci_resource_len(dev->pdev, ramin_bar); |
790 | dev_priv->ramin = ioremap( | 789 | dev_priv->ramin = |
791 | pci_resource_start(dev->pdev, ramin_bar), | 790 | ioremap(pci_resource_start(dev->pdev, ramin_bar), |
792 | dev_priv->ramin_size); | 791 | dev_priv->ramin_size); |
793 | if (!dev_priv->ramin) { | 792 | if (!dev_priv->ramin) { |
794 | NV_ERROR(dev, "Failed to init RAMIN mapping, " | 793 | NV_ERROR(dev, "Failed to PRAMIN BAR"); |
795 | "limited instance memory available\n"); | 794 | return -ENOMEM; |
796 | } | 795 | } |
797 | } | 796 | } else { |
798 | |||
799 | /* On older cards (or if the above failed), create a map covering | ||
800 | * the BAR0 PRAMIN aperture */ | ||
801 | if (!dev_priv->ramin) { | ||
802 | dev_priv->ramin_size = 1 * 1024 * 1024; | 797 | dev_priv->ramin_size = 1 * 1024 * 1024; |
803 | dev_priv->ramin = ioremap(mmio_start_offs + NV_RAMIN, | 798 | dev_priv->ramin = ioremap(mmio_start_offs + NV_RAMIN, |
804 | dev_priv->ramin_size); | 799 | dev_priv->ramin_size); |
805 | if (!dev_priv->ramin) { | 800 | if (!dev_priv->ramin) { |
806 | NV_ERROR(dev, "Failed to map BAR0 PRAMIN.\n"); | 801 | NV_ERROR(dev, "Failed to map BAR0 PRAMIN.\n"); |
807 | return -ENOMEM; | 802 | return -ENOMEM; |
diff --git a/drivers/gpu/drm/nouveau/nv50_fb.c b/drivers/gpu/drm/nouveau/nv50_fb.c index a95e6941ba88..32611bd30e6d 100644 --- a/drivers/gpu/drm/nouveau/nv50_fb.c +++ b/drivers/gpu/drm/nouveau/nv50_fb.c | |||
@@ -6,10 +6,16 @@ | |||
6 | int | 6 | int |
7 | nv50_fb_init(struct drm_device *dev) | 7 | nv50_fb_init(struct drm_device *dev) |
8 | { | 8 | { |
9 | /* This is needed to get meaningful information from 100c90 | ||
10 | * on traps. No idea what these values mean exactly. */ | ||
11 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 9 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
12 | 10 | ||
11 | /* Not a clue what this is exactly. Without pointing it at a | ||
12 | * scratch page, VRAM->GART blits with M2MF (as in DDX DFS) | ||
13 | * cause IOMMU "read from address 0" errors (rh#561267) | ||
14 | */ | ||
15 | nv_wr32(dev, 0x100c08, dev_priv->gart_info.sg_dummy_bus >> 8); | ||
16 | |||
17 | /* This is needed to get meaningful information from 100c90 | ||
18 | * on traps. No idea what these values mean exactly. */ | ||
13 | switch (dev_priv->chipset) { | 19 | switch (dev_priv->chipset) { |
14 | case 0x50: | 20 | case 0x50: |
15 | nv_wr32(dev, 0x100c90, 0x0707ff); | 21 | nv_wr32(dev, 0x100c90, 0x0707ff); |
diff --git a/drivers/gpu/drm/nouveau/nv50_gpio.c b/drivers/gpu/drm/nouveau/nv50_gpio.c index c61782b314e7..bb47ad737267 100644 --- a/drivers/gpu/drm/nouveau/nv50_gpio.c +++ b/drivers/gpu/drm/nouveau/nv50_gpio.c | |||
@@ -31,7 +31,7 @@ nv50_gpio_location(struct dcb_gpio_entry *gpio, uint32_t *reg, uint32_t *shift) | |||
31 | { | 31 | { |
32 | const uint32_t nv50_gpio_reg[4] = { 0xe104, 0xe108, 0xe280, 0xe284 }; | 32 | const uint32_t nv50_gpio_reg[4] = { 0xe104, 0xe108, 0xe280, 0xe284 }; |
33 | 33 | ||
34 | if (gpio->line > 32) | 34 | if (gpio->line >= 32) |
35 | return -EINVAL; | 35 | return -EINVAL; |
36 | 36 | ||
37 | *reg = nv50_gpio_reg[gpio->line >> 3]; | 37 | *reg = nv50_gpio_reg[gpio->line >> 3]; |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 0440c0939bdd..4b6623df3b96 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -41,12 +41,18 @@ void evergreen_fini(struct radeon_device *rdev); | |||
41 | 41 | ||
42 | void evergreen_pm_misc(struct radeon_device *rdev) | 42 | void evergreen_pm_misc(struct radeon_device *rdev) |
43 | { | 43 | { |
44 | int requested_index = rdev->pm.requested_power_state_index; | 44 | int req_ps_idx = rdev->pm.requested_power_state_index; |
45 | struct radeon_power_state *ps = &rdev->pm.power_state[requested_index]; | 45 | int req_cm_idx = rdev->pm.requested_clock_mode_index; |
46 | struct radeon_voltage *voltage = &ps->clock_info[0].voltage; | 46 | struct radeon_power_state *ps = &rdev->pm.power_state[req_ps_idx]; |
47 | 47 | struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage; | |
48 | if ((voltage->type == VOLTAGE_SW) && voltage->voltage) | 48 | |
49 | radeon_atom_set_voltage(rdev, voltage->voltage); | 49 | if ((voltage->type == VOLTAGE_SW) && voltage->voltage) { |
50 | if (voltage->voltage != rdev->pm.current_vddc) { | ||
51 | radeon_atom_set_voltage(rdev, voltage->voltage); | ||
52 | rdev->pm.current_vddc = voltage->voltage; | ||
53 | DRM_DEBUG("Setting: v: %d\n", voltage->voltage); | ||
54 | } | ||
55 | } | ||
50 | } | 56 | } |
51 | 57 | ||
52 | void evergreen_pm_prepare(struct radeon_device *rdev) | 58 | void evergreen_pm_prepare(struct radeon_device *rdev) |
@@ -2153,7 +2159,7 @@ int evergreen_init(struct radeon_device *rdev) | |||
2153 | if (r) | 2159 | if (r) |
2154 | return r; | 2160 | return r; |
2155 | 2161 | ||
2156 | rdev->accel_working = false; | 2162 | rdev->accel_working = true; |
2157 | r = evergreen_startup(rdev); | 2163 | r = evergreen_startup(rdev); |
2158 | if (r) { | 2164 | if (r) { |
2159 | dev_err(rdev->dev, "disabling GPU acceleration\n"); | 2165 | dev_err(rdev->dev, "disabling GPU acceleration\n"); |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index cc004b05d63e..cf89aa2eb28c 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -162,6 +162,11 @@ void r100_pm_init_profile(struct radeon_device *rdev) | |||
162 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 0; | 162 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 0; |
163 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; | 163 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; |
164 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; | 164 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; |
165 | /* mid sh */ | ||
166 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 0; | ||
167 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 0; | ||
168 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; | ||
169 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0; | ||
165 | /* high sh */ | 170 | /* high sh */ |
166 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 0; | 171 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 0; |
167 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; | 172 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; |
@@ -172,6 +177,11 @@ void r100_pm_init_profile(struct radeon_device *rdev) | |||
172 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; | 177 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; |
173 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; | 178 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; |
174 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; | 179 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; |
180 | /* mid mh */ | ||
181 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 0; | ||
182 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; | ||
183 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; | ||
184 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0; | ||
175 | /* high mh */ | 185 | /* high mh */ |
176 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 0; | 186 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 0; |
177 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; | 187 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; |
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c index 4415a5ee5871..e6c89142bb4d 100644 --- a/drivers/gpu/drm/radeon/r420.c +++ b/drivers/gpu/drm/radeon/r420.c | |||
@@ -45,9 +45,14 @@ void r420_pm_init_profile(struct radeon_device *rdev) | |||
45 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0; | 45 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0; |
46 | /* low sh */ | 46 | /* low sh */ |
47 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = 0; | 47 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = 0; |
48 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 1; | 48 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 0; |
49 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; | 49 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; |
50 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; | 50 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; |
51 | /* mid sh */ | ||
52 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 0; | ||
53 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 1; | ||
54 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; | ||
55 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0; | ||
51 | /* high sh */ | 56 | /* high sh */ |
52 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 0; | 57 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 0; |
53 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; | 58 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; |
@@ -58,6 +63,11 @@ void r420_pm_init_profile(struct radeon_device *rdev) | |||
58 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; | 63 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; |
59 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; | 64 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; |
60 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; | 65 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; |
66 | /* mid mh */ | ||
67 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 0; | ||
68 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; | ||
69 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; | ||
70 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0; | ||
61 | /* high mh */ | 71 | /* high mh */ |
62 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 0; | 72 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 0; |
63 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; | 73 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index e14f59748e65..0e91871f45be 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -291,6 +291,11 @@ void rs780_pm_init_profile(struct radeon_device *rdev) | |||
291 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 0; | 291 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 0; |
292 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; | 292 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; |
293 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; | 293 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; |
294 | /* mid sh */ | ||
295 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 0; | ||
296 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 0; | ||
297 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; | ||
298 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0; | ||
294 | /* high sh */ | 299 | /* high sh */ |
295 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 0; | 300 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 0; |
296 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = 1; | 301 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = 1; |
@@ -301,6 +306,11 @@ void rs780_pm_init_profile(struct radeon_device *rdev) | |||
301 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = 0; | 306 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = 0; |
302 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; | 307 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; |
303 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; | 308 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; |
309 | /* mid mh */ | ||
310 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 0; | ||
311 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = 0; | ||
312 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; | ||
313 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0; | ||
304 | /* high mh */ | 314 | /* high mh */ |
305 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 0; | 315 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 0; |
306 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = 1; | 316 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = 1; |
@@ -317,6 +327,11 @@ void rs780_pm_init_profile(struct radeon_device *rdev) | |||
317 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 1; | 327 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 1; |
318 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; | 328 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; |
319 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; | 329 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; |
330 | /* mid sh */ | ||
331 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 1; | ||
332 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 1; | ||
333 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; | ||
334 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0; | ||
320 | /* high sh */ | 335 | /* high sh */ |
321 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 1; | 336 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 1; |
322 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = 2; | 337 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = 2; |
@@ -327,6 +342,11 @@ void rs780_pm_init_profile(struct radeon_device *rdev) | |||
327 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = 1; | 342 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = 1; |
328 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; | 343 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; |
329 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; | 344 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; |
345 | /* mid mh */ | ||
346 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 1; | ||
347 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = 1; | ||
348 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; | ||
349 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0; | ||
330 | /* high mh */ | 350 | /* high mh */ |
331 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 1; | 351 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 1; |
332 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = 2; | 352 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = 2; |
@@ -343,6 +363,11 @@ void rs780_pm_init_profile(struct radeon_device *rdev) | |||
343 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 2; | 363 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 2; |
344 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; | 364 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; |
345 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; | 365 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; |
366 | /* mid sh */ | ||
367 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 2; | ||
368 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 2; | ||
369 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; | ||
370 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0; | ||
346 | /* high sh */ | 371 | /* high sh */ |
347 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 2; | 372 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 2; |
348 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = 3; | 373 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = 3; |
@@ -353,6 +378,11 @@ void rs780_pm_init_profile(struct radeon_device *rdev) | |||
353 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = 0; | 378 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = 0; |
354 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; | 379 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; |
355 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; | 380 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; |
381 | /* mid mh */ | ||
382 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 2; | ||
383 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = 0; | ||
384 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; | ||
385 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0; | ||
356 | /* high mh */ | 386 | /* high mh */ |
357 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 2; | 387 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 2; |
358 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = 3; | 388 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = 3; |
@@ -375,6 +405,11 @@ void r600_pm_init_profile(struct radeon_device *rdev) | |||
375 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; | 405 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; |
376 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; | 406 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; |
377 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; | 407 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; |
408 | /* mid sh */ | ||
409 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; | ||
410 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; | ||
411 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; | ||
412 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0; | ||
378 | /* high sh */ | 413 | /* high sh */ |
379 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; | 414 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; |
380 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; | 415 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; |
@@ -385,6 +420,11 @@ void r600_pm_init_profile(struct radeon_device *rdev) | |||
385 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; | 420 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; |
386 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; | 421 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; |
387 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; | 422 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; |
423 | /* mid mh */ | ||
424 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; | ||
425 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; | ||
426 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; | ||
427 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0; | ||
388 | /* high mh */ | 428 | /* high mh */ |
389 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; | 429 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; |
390 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; | 430 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; |
@@ -401,7 +441,12 @@ void r600_pm_init_profile(struct radeon_device *rdev) | |||
401 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = 1; | 441 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = 1; |
402 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 1; | 442 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 1; |
403 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; | 443 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; |
404 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 1; | 444 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; |
445 | /* mid sh */ | ||
446 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 1; | ||
447 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 1; | ||
448 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; | ||
449 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1; | ||
405 | /* high sh */ | 450 | /* high sh */ |
406 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 1; | 451 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 1; |
407 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = 1; | 452 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = 1; |
@@ -411,7 +456,12 @@ void r600_pm_init_profile(struct radeon_device *rdev) | |||
411 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = 2; | 456 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = 2; |
412 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = 2; | 457 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = 2; |
413 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; | 458 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; |
414 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 1; | 459 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; |
460 | /* low mh */ | ||
461 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 2; | ||
462 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = 2; | ||
463 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; | ||
464 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1; | ||
415 | /* high mh */ | 465 | /* high mh */ |
416 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 2; | 466 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 2; |
417 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = 2; | 467 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = 2; |
@@ -430,14 +480,30 @@ void r600_pm_init_profile(struct radeon_device *rdev) | |||
430 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = | 480 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = |
431 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); | 481 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); |
432 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; | 482 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; |
433 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 1; | 483 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; |
434 | } else { | 484 | } else { |
435 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = | 485 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = |
436 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | 486 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); |
437 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = | 487 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = |
438 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | 488 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); |
439 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; | 489 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; |
440 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 1; | 490 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; |
491 | } | ||
492 | /* mid sh */ | ||
493 | if (rdev->flags & RADEON_IS_MOBILITY) { | ||
494 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = | ||
495 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); | ||
496 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = | ||
497 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); | ||
498 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; | ||
499 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1; | ||
500 | } else { | ||
501 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = | ||
502 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | ||
503 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = | ||
504 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | ||
505 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; | ||
506 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1; | ||
441 | } | 507 | } |
442 | /* high sh */ | 508 | /* high sh */ |
443 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = | 509 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = |
@@ -453,14 +519,30 @@ void r600_pm_init_profile(struct radeon_device *rdev) | |||
453 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = | 519 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = |
454 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); | 520 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); |
455 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; | 521 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; |
456 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 2; | 522 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; |
457 | } else { | 523 | } else { |
458 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = | 524 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = |
459 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); | 525 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); |
460 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = | 526 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = |
461 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); | 527 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); |
462 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; | 528 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; |
463 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 1; | 529 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; |
530 | } | ||
531 | /* mid mh */ | ||
532 | if (rdev->flags & RADEON_IS_MOBILITY) { | ||
533 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = | ||
534 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); | ||
535 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = | ||
536 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); | ||
537 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; | ||
538 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1; | ||
539 | } else { | ||
540 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = | ||
541 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); | ||
542 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = | ||
543 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); | ||
544 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; | ||
545 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1; | ||
464 | } | 546 | } |
465 | /* high mh */ | 547 | /* high mh */ |
466 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = | 548 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = |
@@ -475,13 +557,18 @@ void r600_pm_init_profile(struct radeon_device *rdev) | |||
475 | 557 | ||
476 | void r600_pm_misc(struct radeon_device *rdev) | 558 | void r600_pm_misc(struct radeon_device *rdev) |
477 | { | 559 | { |
478 | int requested_index = rdev->pm.requested_power_state_index; | 560 | int req_ps_idx = rdev->pm.requested_power_state_index; |
479 | struct radeon_power_state *ps = &rdev->pm.power_state[requested_index]; | 561 | int req_cm_idx = rdev->pm.requested_clock_mode_index; |
480 | struct radeon_voltage *voltage = &ps->clock_info[0].voltage; | 562 | struct radeon_power_state *ps = &rdev->pm.power_state[req_ps_idx]; |
481 | 563 | struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage; | |
482 | if ((voltage->type == VOLTAGE_SW) && voltage->voltage) | ||
483 | radeon_atom_set_voltage(rdev, voltage->voltage); | ||
484 | 564 | ||
565 | if ((voltage->type == VOLTAGE_SW) && voltage->voltage) { | ||
566 | if (voltage->voltage != rdev->pm.current_vddc) { | ||
567 | radeon_atom_set_voltage(rdev, voltage->voltage); | ||
568 | rdev->pm.current_vddc = voltage->voltage; | ||
569 | DRM_DEBUG("Setting: v: %d\n", voltage->voltage); | ||
570 | } | ||
571 | } | ||
485 | } | 572 | } |
486 | 573 | ||
487 | bool r600_gui_idle(struct radeon_device *rdev) | 574 | bool r600_gui_idle(struct radeon_device *rdev) |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 5f96fe871b3f..8e1d44ca26ec 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -648,15 +648,18 @@ enum radeon_pm_profile_type { | |||
648 | PM_PROFILE_DEFAULT, | 648 | PM_PROFILE_DEFAULT, |
649 | PM_PROFILE_AUTO, | 649 | PM_PROFILE_AUTO, |
650 | PM_PROFILE_LOW, | 650 | PM_PROFILE_LOW, |
651 | PM_PROFILE_MID, | ||
651 | PM_PROFILE_HIGH, | 652 | PM_PROFILE_HIGH, |
652 | }; | 653 | }; |
653 | 654 | ||
654 | #define PM_PROFILE_DEFAULT_IDX 0 | 655 | #define PM_PROFILE_DEFAULT_IDX 0 |
655 | #define PM_PROFILE_LOW_SH_IDX 1 | 656 | #define PM_PROFILE_LOW_SH_IDX 1 |
656 | #define PM_PROFILE_HIGH_SH_IDX 2 | 657 | #define PM_PROFILE_MID_SH_IDX 2 |
657 | #define PM_PROFILE_LOW_MH_IDX 3 | 658 | #define PM_PROFILE_HIGH_SH_IDX 3 |
658 | #define PM_PROFILE_HIGH_MH_IDX 4 | 659 | #define PM_PROFILE_LOW_MH_IDX 4 |
659 | #define PM_PROFILE_MAX 5 | 660 | #define PM_PROFILE_MID_MH_IDX 5 |
661 | #define PM_PROFILE_HIGH_MH_IDX 6 | ||
662 | #define PM_PROFILE_MAX 7 | ||
660 | 663 | ||
661 | struct radeon_pm_profile { | 664 | struct radeon_pm_profile { |
662 | int dpms_off_ps_idx; | 665 | int dpms_off_ps_idx; |
@@ -745,6 +748,7 @@ struct radeon_pm { | |||
745 | int default_power_state_index; | 748 | int default_power_state_index; |
746 | u32 current_sclk; | 749 | u32 current_sclk; |
747 | u32 current_mclk; | 750 | u32 current_mclk; |
751 | u32 current_vddc; | ||
748 | struct radeon_i2c_chan *i2c_bus; | 752 | struct radeon_i2c_chan *i2c_bus; |
749 | /* selected pm method */ | 753 | /* selected pm method */ |
750 | enum radeon_pm_method pm_method; | 754 | enum radeon_pm_method pm_method; |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 4305cd55d0ac..99bd8a9c56b3 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -1833,10 +1833,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) | |||
1833 | /* skip invalid modes */ | 1833 | /* skip invalid modes */ |
1834 | if (rdev->pm.power_state[state_index].clock_info[mode_index].sclk == 0) | 1834 | if (rdev->pm.power_state[state_index].clock_info[mode_index].sclk == 0) |
1835 | continue; | 1835 | continue; |
1836 | rdev->pm.power_state[state_index].clock_info[mode_index].voltage.type = | 1836 | /* voltage works differently on IGPs */ |
1837 | VOLTAGE_SW; | ||
1838 | rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage = | ||
1839 | clock_info->usVDDC; | ||
1840 | mode_index++; | 1837 | mode_index++; |
1841 | } else if (ASIC_IS_DCE4(rdev)) { | 1838 | } else if (ASIC_IS_DCE4(rdev)) { |
1842 | struct _ATOM_PPLIB_EVERGREEN_CLOCK_INFO *clock_info = | 1839 | struct _ATOM_PPLIB_EVERGREEN_CLOCK_INFO *clock_info = |
@@ -1969,6 +1966,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) | |||
1969 | 1966 | ||
1970 | rdev->pm.current_power_state_index = rdev->pm.default_power_state_index; | 1967 | rdev->pm.current_power_state_index = rdev->pm.default_power_state_index; |
1971 | rdev->pm.current_clock_mode_index = 0; | 1968 | rdev->pm.current_clock_mode_index = 0; |
1969 | rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.voltage; | ||
1972 | } | 1970 | } |
1973 | 1971 | ||
1974 | void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable) | 1972 | void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable) |
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index 102c744eaf5a..1bee2f9e24a5 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c | |||
@@ -2026,6 +2026,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2026 | combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); | 2026 | combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); |
2027 | break; | 2027 | break; |
2028 | default: | 2028 | default: |
2029 | ddc_i2c.valid = false; | ||
2029 | break; | 2030 | break; |
2030 | } | 2031 | } |
2031 | 2032 | ||
@@ -2339,6 +2340,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2339 | if (RBIOS8(tv_info + 6) == 'T') { | 2340 | if (RBIOS8(tv_info + 6) == 'T') { |
2340 | if (radeon_apply_legacy_tv_quirks(dev)) { | 2341 | if (radeon_apply_legacy_tv_quirks(dev)) { |
2341 | hpd.hpd = RADEON_HPD_NONE; | 2342 | hpd.hpd = RADEON_HPD_NONE; |
2343 | ddc_i2c.valid = false; | ||
2342 | radeon_add_legacy_encoder(dev, | 2344 | radeon_add_legacy_encoder(dev, |
2343 | radeon_get_encoder_id | 2345 | radeon_get_encoder_id |
2344 | (dev, | 2346 | (dev, |
@@ -2455,7 +2457,7 @@ default_mode: | |||
2455 | rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk; | 2457 | rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk; |
2456 | rdev->pm.power_state[state_index].default_clock_mode = &rdev->pm.power_state[state_index].clock_info[0]; | 2458 | rdev->pm.power_state[state_index].default_clock_mode = &rdev->pm.power_state[state_index].clock_info[0]; |
2457 | if ((state_index > 0) && | 2459 | if ((state_index > 0) && |
2458 | (rdev->pm.power_state[0].clock_info[0].voltage.type = VOLTAGE_GPIO)) | 2460 | (rdev->pm.power_state[0].clock_info[0].voltage.type == VOLTAGE_GPIO)) |
2459 | rdev->pm.power_state[state_index].clock_info[0].voltage = | 2461 | rdev->pm.power_state[state_index].clock_info[0].voltage = |
2460 | rdev->pm.power_state[0].clock_info[0].voltage; | 2462 | rdev->pm.power_state[0].clock_info[0].voltage; |
2461 | else | 2463 | else |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 1006549d1570..8154cdf796e4 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -284,8 +284,7 @@ static const char *connector_names[15] = { | |||
284 | "eDP", | 284 | "eDP", |
285 | }; | 285 | }; |
286 | 286 | ||
287 | static const char *hpd_names[7] = { | 287 | static const char *hpd_names[6] = { |
288 | "NONE", | ||
289 | "HPD1", | 288 | "HPD1", |
290 | "HPD2", | 289 | "HPD2", |
291 | "HPD3", | 290 | "HPD3", |
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 902d1731a652..e166fe4d7c30 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c | |||
@@ -45,9 +45,10 @@ | |||
45 | * - 2.2.0 - add r6xx/r7xx const buffer support | 45 | * - 2.2.0 - add r6xx/r7xx const buffer support |
46 | * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs | 46 | * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs |
47 | * - 2.4.0 - add crtc id query | 47 | * - 2.4.0 - add crtc id query |
48 | * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen | ||
48 | */ | 49 | */ |
49 | #define KMS_DRIVER_MAJOR 2 | 50 | #define KMS_DRIVER_MAJOR 2 |
50 | #define KMS_DRIVER_MINOR 4 | 51 | #define KMS_DRIVER_MINOR 5 |
51 | #define KMS_DRIVER_PATCHLEVEL 0 | 52 | #define KMS_DRIVER_PATCHLEVEL 0 |
52 | int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); | 53 | int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); |
53 | int radeon_driver_unload_kms(struct drm_device *dev); | 54 | int radeon_driver_unload_kms(struct drm_device *dev); |
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c index e192acfbf0cd..dc1634bb0c11 100644 --- a/drivers/gpu/drm/radeon/radeon_fb.c +++ b/drivers/gpu/drm/radeon/radeon_fb.c | |||
@@ -363,6 +363,7 @@ int radeon_fbdev_init(struct radeon_device *rdev) | |||
363 | { | 363 | { |
364 | struct radeon_fbdev *rfbdev; | 364 | struct radeon_fbdev *rfbdev; |
365 | int bpp_sel = 32; | 365 | int bpp_sel = 32; |
366 | int ret; | ||
366 | 367 | ||
367 | /* select 8 bpp console on RN50 or 16MB cards */ | 368 | /* select 8 bpp console on RN50 or 16MB cards */ |
368 | if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024)) | 369 | if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024)) |
@@ -376,9 +377,14 @@ int radeon_fbdev_init(struct radeon_device *rdev) | |||
376 | rdev->mode_info.rfbdev = rfbdev; | 377 | rdev->mode_info.rfbdev = rfbdev; |
377 | rfbdev->helper.funcs = &radeon_fb_helper_funcs; | 378 | rfbdev->helper.funcs = &radeon_fb_helper_funcs; |
378 | 379 | ||
379 | drm_fb_helper_init(rdev->ddev, &rfbdev->helper, | 380 | ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper, |
380 | rdev->num_crtc, | 381 | rdev->num_crtc, |
381 | RADEONFB_CONN_LIMIT); | 382 | RADEONFB_CONN_LIMIT); |
383 | if (ret) { | ||
384 | kfree(rfbdev); | ||
385 | return ret; | ||
386 | } | ||
387 | |||
382 | drm_fb_helper_single_add_all_connectors(&rfbdev->helper); | 388 | drm_fb_helper_single_add_all_connectors(&rfbdev->helper); |
383 | drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel); | 389 | drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel); |
384 | return 0; | 390 | return 0; |
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index 04068352ccd2..6a70c0dc7f92 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c | |||
@@ -118,7 +118,11 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
118 | value = rdev->num_z_pipes; | 118 | value = rdev->num_z_pipes; |
119 | break; | 119 | break; |
120 | case RADEON_INFO_ACCEL_WORKING: | 120 | case RADEON_INFO_ACCEL_WORKING: |
121 | value = rdev->accel_working; | 121 | /* xf86-video-ati 6.13.0 relies on this being false for evergreen */ |
122 | if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK)) | ||
123 | value = false; | ||
124 | else | ||
125 | value = rdev->accel_working; | ||
122 | break; | 126 | break; |
123 | case RADEON_INFO_CRTC_FROM_ID: | 127 | case RADEON_INFO_CRTC_FROM_ID: |
124 | for (i = 0, found = 0; i < rdev->num_crtc; i++) { | 128 | for (i = 0, found = 0; i < rdev->num_crtc; i++) { |
@@ -134,6 +138,9 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
134 | return -EINVAL; | 138 | return -EINVAL; |
135 | } | 139 | } |
136 | break; | 140 | break; |
141 | case RADEON_INFO_ACCEL_WORKING2: | ||
142 | value = rdev->accel_working; | ||
143 | break; | ||
137 | default: | 144 | default: |
138 | DRM_DEBUG("Invalid request %d\n", info->request); | 145 | DRM_DEBUG("Invalid request %d\n", info->request); |
139 | return -EINVAL; | 146 | return -EINVAL; |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index 5a13b3eeef19..5b07b8848e09 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c | |||
@@ -1168,6 +1168,17 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder | |||
1168 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 1168 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
1169 | struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; | 1169 | struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; |
1170 | bool color = true; | 1170 | bool color = true; |
1171 | struct drm_crtc *crtc; | ||
1172 | |||
1173 | /* find out if crtc2 is in use or if this encoder is using it */ | ||
1174 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | ||
1175 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | ||
1176 | if ((radeon_crtc->crtc_id == 1) && crtc->enabled) { | ||
1177 | if (encoder->crtc != crtc) { | ||
1178 | return connector_status_disconnected; | ||
1179 | } | ||
1180 | } | ||
1181 | } | ||
1171 | 1182 | ||
1172 | if (connector->connector_type == DRM_MODE_CONNECTOR_SVIDEO || | 1183 | if (connector->connector_type == DRM_MODE_CONNECTOR_SVIDEO || |
1173 | connector->connector_type == DRM_MODE_CONNECTOR_Composite || | 1184 | connector->connector_type == DRM_MODE_CONNECTOR_Composite || |
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index 02281269a881..63f679a04b25 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -33,6 +33,14 @@ | |||
33 | #define RADEON_WAIT_VBLANK_TIMEOUT 200 | 33 | #define RADEON_WAIT_VBLANK_TIMEOUT 200 |
34 | #define RADEON_WAIT_IDLE_TIMEOUT 200 | 34 | #define RADEON_WAIT_IDLE_TIMEOUT 200 |
35 | 35 | ||
36 | static const char *radeon_pm_state_type_name[5] = { | ||
37 | "Default", | ||
38 | "Powersave", | ||
39 | "Battery", | ||
40 | "Balanced", | ||
41 | "Performance", | ||
42 | }; | ||
43 | |||
36 | static void radeon_dynpm_idle_work_handler(struct work_struct *work); | 44 | static void radeon_dynpm_idle_work_handler(struct work_struct *work); |
37 | static int radeon_debugfs_pm_init(struct radeon_device *rdev); | 45 | static int radeon_debugfs_pm_init(struct radeon_device *rdev); |
38 | static bool radeon_pm_in_vbl(struct radeon_device *rdev); | 46 | static bool radeon_pm_in_vbl(struct radeon_device *rdev); |
@@ -84,9 +92,9 @@ static void radeon_pm_update_profile(struct radeon_device *rdev) | |||
84 | rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; | 92 | rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; |
85 | } else { | 93 | } else { |
86 | if (rdev->pm.active_crtc_count > 1) | 94 | if (rdev->pm.active_crtc_count > 1) |
87 | rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX; | 95 | rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; |
88 | else | 96 | else |
89 | rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX; | 97 | rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; |
90 | } | 98 | } |
91 | break; | 99 | break; |
92 | case PM_PROFILE_LOW: | 100 | case PM_PROFILE_LOW: |
@@ -95,6 +103,12 @@ static void radeon_pm_update_profile(struct radeon_device *rdev) | |||
95 | else | 103 | else |
96 | rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX; | 104 | rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX; |
97 | break; | 105 | break; |
106 | case PM_PROFILE_MID: | ||
107 | if (rdev->pm.active_crtc_count > 1) | ||
108 | rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; | ||
109 | else | ||
110 | rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; | ||
111 | break; | ||
98 | case PM_PROFILE_HIGH: | 112 | case PM_PROFILE_HIGH: |
99 | if (rdev->pm.active_crtc_count > 1) | 113 | if (rdev->pm.active_crtc_count > 1) |
100 | rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; | 114 | rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; |
@@ -127,15 +141,6 @@ static void radeon_unmap_vram_bos(struct radeon_device *rdev) | |||
127 | if (bo->tbo.mem.mem_type == TTM_PL_VRAM) | 141 | if (bo->tbo.mem.mem_type == TTM_PL_VRAM) |
128 | ttm_bo_unmap_virtual(&bo->tbo); | 142 | ttm_bo_unmap_virtual(&bo->tbo); |
129 | } | 143 | } |
130 | |||
131 | if (rdev->gart.table.vram.robj) | ||
132 | ttm_bo_unmap_virtual(&rdev->gart.table.vram.robj->tbo); | ||
133 | |||
134 | if (rdev->stollen_vga_memory) | ||
135 | ttm_bo_unmap_virtual(&rdev->stollen_vga_memory->tbo); | ||
136 | |||
137 | if (rdev->r600_blit.shader_obj) | ||
138 | ttm_bo_unmap_virtual(&rdev->r600_blit.shader_obj->tbo); | ||
139 | } | 144 | } |
140 | 145 | ||
141 | static void radeon_sync_with_vblank(struct radeon_device *rdev) | 146 | static void radeon_sync_with_vblank(struct radeon_device *rdev) |
@@ -281,6 +286,42 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev) | |||
281 | mutex_unlock(&rdev->ddev->struct_mutex); | 286 | mutex_unlock(&rdev->ddev->struct_mutex); |
282 | } | 287 | } |
283 | 288 | ||
289 | static void radeon_pm_print_states(struct radeon_device *rdev) | ||
290 | { | ||
291 | int i, j; | ||
292 | struct radeon_power_state *power_state; | ||
293 | struct radeon_pm_clock_info *clock_info; | ||
294 | |||
295 | DRM_DEBUG("%d Power State(s)\n", rdev->pm.num_power_states); | ||
296 | for (i = 0; i < rdev->pm.num_power_states; i++) { | ||
297 | power_state = &rdev->pm.power_state[i]; | ||
298 | DRM_DEBUG("State %d: %s\n", i, | ||
299 | radeon_pm_state_type_name[power_state->type]); | ||
300 | if (i == rdev->pm.default_power_state_index) | ||
301 | DRM_DEBUG("\tDefault"); | ||
302 | if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP)) | ||
303 | DRM_DEBUG("\t%d PCIE Lanes\n", power_state->pcie_lanes); | ||
304 | if (power_state->flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY) | ||
305 | DRM_DEBUG("\tSingle display only\n"); | ||
306 | DRM_DEBUG("\t%d Clock Mode(s)\n", power_state->num_clock_modes); | ||
307 | for (j = 0; j < power_state->num_clock_modes; j++) { | ||
308 | clock_info = &(power_state->clock_info[j]); | ||
309 | if (rdev->flags & RADEON_IS_IGP) | ||
310 | DRM_DEBUG("\t\t%d e: %d%s\n", | ||
311 | j, | ||
312 | clock_info->sclk * 10, | ||
313 | clock_info->flags & RADEON_PM_MODE_NO_DISPLAY ? "\tNo display only" : ""); | ||
314 | else | ||
315 | DRM_DEBUG("\t\t%d e: %d\tm: %d\tv: %d%s\n", | ||
316 | j, | ||
317 | clock_info->sclk * 10, | ||
318 | clock_info->mclk * 10, | ||
319 | clock_info->voltage.voltage, | ||
320 | clock_info->flags & RADEON_PM_MODE_NO_DISPLAY ? "\tNo display only" : ""); | ||
321 | } | ||
322 | } | ||
323 | } | ||
324 | |||
284 | static ssize_t radeon_get_pm_profile(struct device *dev, | 325 | static ssize_t radeon_get_pm_profile(struct device *dev, |
285 | struct device_attribute *attr, | 326 | struct device_attribute *attr, |
286 | char *buf) | 327 | char *buf) |
@@ -311,6 +352,8 @@ static ssize_t radeon_set_pm_profile(struct device *dev, | |||
311 | rdev->pm.profile = PM_PROFILE_AUTO; | 352 | rdev->pm.profile = PM_PROFILE_AUTO; |
312 | else if (strncmp("low", buf, strlen("low")) == 0) | 353 | else if (strncmp("low", buf, strlen("low")) == 0) |
313 | rdev->pm.profile = PM_PROFILE_LOW; | 354 | rdev->pm.profile = PM_PROFILE_LOW; |
355 | else if (strncmp("mid", buf, strlen("mid")) == 0) | ||
356 | rdev->pm.profile = PM_PROFILE_MID; | ||
314 | else if (strncmp("high", buf, strlen("high")) == 0) | 357 | else if (strncmp("high", buf, strlen("high")) == 0) |
315 | rdev->pm.profile = PM_PROFILE_HIGH; | 358 | rdev->pm.profile = PM_PROFILE_HIGH; |
316 | else { | 359 | else { |
@@ -377,15 +420,19 @@ void radeon_pm_suspend(struct radeon_device *rdev) | |||
377 | { | 420 | { |
378 | mutex_lock(&rdev->pm.mutex); | 421 | mutex_lock(&rdev->pm.mutex); |
379 | cancel_delayed_work(&rdev->pm.dynpm_idle_work); | 422 | cancel_delayed_work(&rdev->pm.dynpm_idle_work); |
380 | rdev->pm.current_power_state_index = -1; | ||
381 | rdev->pm.current_clock_mode_index = -1; | ||
382 | rdev->pm.current_sclk = 0; | ||
383 | rdev->pm.current_mclk = 0; | ||
384 | mutex_unlock(&rdev->pm.mutex); | 423 | mutex_unlock(&rdev->pm.mutex); |
385 | } | 424 | } |
386 | 425 | ||
387 | void radeon_pm_resume(struct radeon_device *rdev) | 426 | void radeon_pm_resume(struct radeon_device *rdev) |
388 | { | 427 | { |
428 | /* asic init will reset the default power state */ | ||
429 | mutex_lock(&rdev->pm.mutex); | ||
430 | rdev->pm.current_power_state_index = rdev->pm.default_power_state_index; | ||
431 | rdev->pm.current_clock_mode_index = 0; | ||
432 | rdev->pm.current_sclk = rdev->clock.default_sclk; | ||
433 | rdev->pm.current_mclk = rdev->clock.default_mclk; | ||
434 | rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.voltage; | ||
435 | mutex_unlock(&rdev->pm.mutex); | ||
389 | radeon_pm_compute_clocks(rdev); | 436 | radeon_pm_compute_clocks(rdev); |
390 | } | 437 | } |
391 | 438 | ||
@@ -394,32 +441,24 @@ int radeon_pm_init(struct radeon_device *rdev) | |||
394 | int ret; | 441 | int ret; |
395 | /* default to profile method */ | 442 | /* default to profile method */ |
396 | rdev->pm.pm_method = PM_METHOD_PROFILE; | 443 | rdev->pm.pm_method = PM_METHOD_PROFILE; |
444 | rdev->pm.profile = PM_PROFILE_DEFAULT; | ||
397 | rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; | 445 | rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; |
398 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; | 446 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; |
399 | rdev->pm.dynpm_can_upclock = true; | 447 | rdev->pm.dynpm_can_upclock = true; |
400 | rdev->pm.dynpm_can_downclock = true; | 448 | rdev->pm.dynpm_can_downclock = true; |
401 | rdev->pm.current_sclk = 0; | 449 | rdev->pm.current_sclk = rdev->clock.default_sclk; |
402 | rdev->pm.current_mclk = 0; | 450 | rdev->pm.current_mclk = rdev->clock.default_mclk; |
403 | 451 | ||
404 | if (rdev->bios) { | 452 | if (rdev->bios) { |
405 | if (rdev->is_atom_bios) | 453 | if (rdev->is_atom_bios) |
406 | radeon_atombios_get_power_modes(rdev); | 454 | radeon_atombios_get_power_modes(rdev); |
407 | else | 455 | else |
408 | radeon_combios_get_power_modes(rdev); | 456 | radeon_combios_get_power_modes(rdev); |
457 | radeon_pm_print_states(rdev); | ||
409 | radeon_pm_init_profile(rdev); | 458 | radeon_pm_init_profile(rdev); |
410 | rdev->pm.current_power_state_index = -1; | ||
411 | rdev->pm.current_clock_mode_index = -1; | ||
412 | } | 459 | } |
413 | 460 | ||
414 | if (rdev->pm.num_power_states > 1) { | 461 | if (rdev->pm.num_power_states > 1) { |
415 | if (rdev->pm.pm_method == PM_METHOD_PROFILE) { | ||
416 | mutex_lock(&rdev->pm.mutex); | ||
417 | rdev->pm.profile = PM_PROFILE_DEFAULT; | ||
418 | radeon_pm_update_profile(rdev); | ||
419 | radeon_pm_set_clocks(rdev); | ||
420 | mutex_unlock(&rdev->pm.mutex); | ||
421 | } | ||
422 | |||
423 | /* where's the best place to put these? */ | 462 | /* where's the best place to put these? */ |
424 | ret = device_create_file(rdev->dev, &dev_attr_power_profile); | 463 | ret = device_create_file(rdev->dev, &dev_attr_power_profile); |
425 | if (ret) | 464 | if (ret) |
@@ -705,6 +744,8 @@ static int radeon_debugfs_pm_info(struct seq_file *m, void *data) | |||
705 | seq_printf(m, "default memory clock: %u0 kHz\n", rdev->clock.default_mclk); | 744 | seq_printf(m, "default memory clock: %u0 kHz\n", rdev->clock.default_mclk); |
706 | if (rdev->asic->get_memory_clock) | 745 | if (rdev->asic->get_memory_clock) |
707 | seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); | 746 | seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); |
747 | if (rdev->pm.current_vddc) | ||
748 | seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc); | ||
708 | if (rdev->asic->get_pcie_lanes) | 749 | if (rdev->asic->get_pcie_lanes) |
709 | seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev)); | 750 | seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev)); |
710 | 751 | ||
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 33952da65340..cec536c222c5 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -44,12 +44,18 @@ void rv770_fini(struct radeon_device *rdev); | |||
44 | 44 | ||
45 | void rv770_pm_misc(struct radeon_device *rdev) | 45 | void rv770_pm_misc(struct radeon_device *rdev) |
46 | { | 46 | { |
47 | int requested_index = rdev->pm.requested_power_state_index; | 47 | int req_ps_idx = rdev->pm.requested_power_state_index; |
48 | struct radeon_power_state *ps = &rdev->pm.power_state[requested_index]; | 48 | int req_cm_idx = rdev->pm.requested_clock_mode_index; |
49 | struct radeon_voltage *voltage = &ps->clock_info[0].voltage; | 49 | struct radeon_power_state *ps = &rdev->pm.power_state[req_ps_idx]; |
50 | 50 | struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage; | |
51 | if ((voltage->type == VOLTAGE_SW) && voltage->voltage) | 51 | |
52 | radeon_atom_set_voltage(rdev, voltage->voltage); | 52 | if ((voltage->type == VOLTAGE_SW) && voltage->voltage) { |
53 | if (voltage->voltage != rdev->pm.current_vddc) { | ||
54 | radeon_atom_set_voltage(rdev, voltage->voltage); | ||
55 | rdev->pm.current_vddc = voltage->voltage; | ||
56 | DRM_DEBUG("Setting: v: %d\n", voltage->voltage); | ||
57 | } | ||
58 | } | ||
53 | } | 59 | } |
54 | 60 | ||
55 | /* | 61 | /* |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c index bdd67cf83315..8e396850513c 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | |||
@@ -644,6 +644,7 @@ int vmw_execbuf_ioctl(struct drm_device *dev, void *data, | |||
644 | ret = copy_from_user(cmd, user_cmd, arg->command_size); | 644 | ret = copy_from_user(cmd, user_cmd, arg->command_size); |
645 | 645 | ||
646 | if (unlikely(ret != 0)) { | 646 | if (unlikely(ret != 0)) { |
647 | ret = -EFAULT; | ||
647 | DRM_ERROR("Failed copying commands.\n"); | 648 | DRM_ERROR("Failed copying commands.\n"); |
648 | goto out_commit; | 649 | goto out_commit; |
649 | } | 650 | } |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c index f8fbbc67a406..8612378b131e 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | |||
@@ -597,8 +597,10 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data, | |||
597 | 597 | ||
598 | ret = copy_from_user(srf->sizes, user_sizes, | 598 | ret = copy_from_user(srf->sizes, user_sizes, |
599 | srf->num_sizes * sizeof(*srf->sizes)); | 599 | srf->num_sizes * sizeof(*srf->sizes)); |
600 | if (unlikely(ret != 0)) | 600 | if (unlikely(ret != 0)) { |
601 | ret = -EFAULT; | ||
601 | goto out_err1; | 602 | goto out_err1; |
603 | } | ||
602 | 604 | ||
603 | if (srf->scanout && | 605 | if (srf->scanout && |
604 | srf->num_sizes == 1 && | 606 | srf->num_sizes == 1 && |
@@ -697,9 +699,11 @@ int vmw_surface_reference_ioctl(struct drm_device *dev, void *data, | |||
697 | if (user_sizes) | 699 | if (user_sizes) |
698 | ret = copy_to_user(user_sizes, srf->sizes, | 700 | ret = copy_to_user(user_sizes, srf->sizes, |
699 | srf->num_sizes * sizeof(*srf->sizes)); | 701 | srf->num_sizes * sizeof(*srf->sizes)); |
700 | if (unlikely(ret != 0)) | 702 | if (unlikely(ret != 0)) { |
701 | DRM_ERROR("copy_to_user failed %p %u\n", | 703 | DRM_ERROR("copy_to_user failed %p %u\n", |
702 | user_sizes, srf->num_sizes); | 704 | user_sizes, srf->num_sizes); |
705 | ret = -EFAULT; | ||
706 | } | ||
703 | out_bad_resource: | 707 | out_bad_resource: |
704 | out_no_reference: | 708 | out_no_reference: |
705 | ttm_base_object_unref(&base); | 709 | ttm_base_object_unref(&base); |
diff --git a/drivers/input/misc/hp_sdc_rtc.c b/drivers/input/misc/hp_sdc_rtc.c index e00a1cc79c0a..c19066479057 100644 --- a/drivers/input/misc/hp_sdc_rtc.c +++ b/drivers/input/misc/hp_sdc_rtc.c | |||
@@ -678,7 +678,7 @@ static const struct file_operations hp_sdc_rtc_fops = { | |||
678 | .llseek = no_llseek, | 678 | .llseek = no_llseek, |
679 | .read = hp_sdc_rtc_read, | 679 | .read = hp_sdc_rtc_read, |
680 | .poll = hp_sdc_rtc_poll, | 680 | .poll = hp_sdc_rtc_poll, |
681 | .unlocked_ioctl = hp_sdc_rtc_ioctl, | 681 | .unlocked_ioctl = hp_sdc_rtc_unlocked_ioctl, |
682 | .open = hp_sdc_rtc_open, | 682 | .open = hp_sdc_rtc_open, |
683 | .fasync = hp_sdc_rtc_fasync, | 683 | .fasync = hp_sdc_rtc_fasync, |
684 | }; | 684 | }; |
diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c index 000d65ea55a4..91c8013cf0d9 100644 --- a/drivers/mtd/mtdchar.c +++ b/drivers/mtd/mtdchar.c | |||
@@ -404,14 +404,9 @@ static int mtd_do_writeoob(struct file *file, struct mtd_info *mtd, | |||
404 | if (ops.ooboffs && ops.ooblen > (mtd->oobsize - ops.ooboffs)) | 404 | if (ops.ooboffs && ops.ooblen > (mtd->oobsize - ops.ooboffs)) |
405 | return -EINVAL; | 405 | return -EINVAL; |
406 | 406 | ||
407 | ops.oobbuf = kmalloc(length, GFP_KERNEL); | 407 | ops.oobbuf = memdup_user(ptr, length); |
408 | if (!ops.oobbuf) | 408 | if (IS_ERR(ops.oobbuf)) |
409 | return -ENOMEM; | 409 | return PTR_ERR(ops.oobbuf); |
410 | |||
411 | if (copy_from_user(ops.oobbuf, ptr, length)) { | ||
412 | kfree(ops.oobbuf); | ||
413 | return -EFAULT; | ||
414 | } | ||
415 | 410 | ||
416 | start &= ~((uint64_t)mtd->oobsize - 1); | 411 | start &= ~((uint64_t)mtd->oobsize - 1); |
417 | ret = mtd->write_oob(mtd, start, &ops); | 412 | ret = mtd->write_oob(mtd, start, &ops); |
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 98a04b3c9526..ffc3720929f1 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig | |||
@@ -1,13 +1,3 @@ | |||
1 | menuconfig MTD_NAND | ||
2 | tristate "NAND Device Support" | ||
3 | depends on MTD | ||
4 | select MTD_NAND_IDS | ||
5 | select MTD_NAND_ECC | ||
6 | help | ||
7 | This enables support for accessing all type of NAND flash | ||
8 | devices. For further information see | ||
9 | <http://www.linux-mtd.infradead.org/doc/nand.html>. | ||
10 | |||
11 | config MTD_NAND_ECC | 1 | config MTD_NAND_ECC |
12 | tristate | 2 | tristate |
13 | 3 | ||
@@ -19,6 +9,17 @@ config MTD_NAND_ECC_SMC | |||
19 | Software ECC according to the Smart Media Specification. | 9 | Software ECC according to the Smart Media Specification. |
20 | The original Linux implementation had byte 0 and 1 swapped. | 10 | The original Linux implementation had byte 0 and 1 swapped. |
21 | 11 | ||
12 | |||
13 | menuconfig MTD_NAND | ||
14 | tristate "NAND Device Support" | ||
15 | depends on MTD | ||
16 | select MTD_NAND_IDS | ||
17 | select MTD_NAND_ECC | ||
18 | help | ||
19 | This enables support for accessing all type of NAND flash | ||
20 | devices. For further information see | ||
21 | <http://www.linux-mtd.infradead.org/doc/nand.html>. | ||
22 | |||
22 | if MTD_NAND | 23 | if MTD_NAND |
23 | 24 | ||
24 | config MTD_NAND_VERIFY_WRITE | 25 | config MTD_NAND_VERIFY_WRITE |
diff --git a/drivers/mtd/nand/r852.c b/drivers/mtd/nand/r852.c index 78a423295474..bcfc851fe550 100644 --- a/drivers/mtd/nand/r852.c +++ b/drivers/mtd/nand/r852.c | |||
@@ -150,7 +150,6 @@ static void r852_dma_done(struct r852_device *dev, int error) | |||
150 | if (dev->phys_dma_addr && dev->phys_dma_addr != dev->phys_bounce_buffer) | 150 | if (dev->phys_dma_addr && dev->phys_dma_addr != dev->phys_bounce_buffer) |
151 | pci_unmap_single(dev->pci_dev, dev->phys_dma_addr, R852_DMA_LEN, | 151 | pci_unmap_single(dev->pci_dev, dev->phys_dma_addr, R852_DMA_LEN, |
152 | dev->dma_dir ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE); | 152 | dev->dma_dir ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE); |
153 | complete(&dev->dma_done); | ||
154 | } | 153 | } |
155 | 154 | ||
156 | /* | 155 | /* |
@@ -182,6 +181,7 @@ static void r852_do_dma(struct r852_device *dev, uint8_t *buf, int do_read) | |||
182 | /* Set dma direction */ | 181 | /* Set dma direction */ |
183 | dev->dma_dir = do_read; | 182 | dev->dma_dir = do_read; |
184 | dev->dma_stage = 1; | 183 | dev->dma_stage = 1; |
184 | INIT_COMPLETION(dev->dma_done); | ||
185 | 185 | ||
186 | dbg_verbose("doing dma %s ", do_read ? "read" : "write"); | 186 | dbg_verbose("doing dma %s ", do_read ? "read" : "write"); |
187 | 187 | ||
@@ -494,6 +494,11 @@ int r852_ecc_correct(struct mtd_info *mtd, uint8_t *dat, | |||
494 | if (dev->card_unstable) | 494 | if (dev->card_unstable) |
495 | return 0; | 495 | return 0; |
496 | 496 | ||
497 | if (dev->dma_error) { | ||
498 | dev->dma_error = 0; | ||
499 | return -1; | ||
500 | } | ||
501 | |||
497 | r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS); | 502 | r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS); |
498 | ecc_reg = r852_read_reg_dword(dev, R852_DATALINE); | 503 | ecc_reg = r852_read_reg_dword(dev, R852_DATALINE); |
499 | r852_write_reg(dev, R852_CTL, dev->ctlreg); | 504 | r852_write_reg(dev, R852_CTL, dev->ctlreg); |
@@ -707,6 +712,7 @@ void r852_card_detect_work(struct work_struct *work) | |||
707 | container_of(work, struct r852_device, card_detect_work.work); | 712 | container_of(work, struct r852_device, card_detect_work.work); |
708 | 713 | ||
709 | r852_card_update_present(dev); | 714 | r852_card_update_present(dev); |
715 | r852_update_card_detect(dev); | ||
710 | dev->card_unstable = 0; | 716 | dev->card_unstable = 0; |
711 | 717 | ||
712 | /* False alarm */ | 718 | /* False alarm */ |
@@ -722,7 +728,6 @@ void r852_card_detect_work(struct work_struct *work) | |||
722 | else | 728 | else |
723 | r852_unregister_nand_device(dev); | 729 | r852_unregister_nand_device(dev); |
724 | exit: | 730 | exit: |
725 | /* Update detection logic */ | ||
726 | r852_update_card_detect(dev); | 731 | r852_update_card_detect(dev); |
727 | } | 732 | } |
728 | 733 | ||
@@ -796,6 +801,7 @@ static irqreturn_t r852_irq(int irq, void *data) | |||
796 | if (dma_status & R852_DMA_IRQ_ERROR) { | 801 | if (dma_status & R852_DMA_IRQ_ERROR) { |
797 | dbg("recieved dma error IRQ"); | 802 | dbg("recieved dma error IRQ"); |
798 | r852_dma_done(dev, -EIO); | 803 | r852_dma_done(dev, -EIO); |
804 | complete(&dev->dma_done); | ||
799 | goto out; | 805 | goto out; |
800 | } | 806 | } |
801 | 807 | ||
@@ -825,8 +831,10 @@ static irqreturn_t r852_irq(int irq, void *data) | |||
825 | r852_dma_enable(dev); | 831 | r852_dma_enable(dev); |
826 | 832 | ||
827 | /* Operation done */ | 833 | /* Operation done */ |
828 | if (dev->dma_stage == 3) | 834 | if (dev->dma_stage == 3) { |
829 | r852_dma_done(dev, 0); | 835 | r852_dma_done(dev, 0); |
836 | complete(&dev->dma_done); | ||
837 | } | ||
830 | goto out; | 838 | goto out; |
831 | } | 839 | } |
832 | 840 | ||
@@ -940,18 +948,19 @@ int r852_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) | |||
940 | 948 | ||
941 | r852_dma_test(dev); | 949 | r852_dma_test(dev); |
942 | 950 | ||
951 | dev->irq = pci_dev->irq; | ||
952 | spin_lock_init(&dev->irqlock); | ||
953 | |||
954 | dev->card_detected = 0; | ||
955 | r852_card_update_present(dev); | ||
956 | |||
943 | /*register irq handler*/ | 957 | /*register irq handler*/ |
944 | error = -ENODEV; | 958 | error = -ENODEV; |
945 | if (request_irq(pci_dev->irq, &r852_irq, IRQF_SHARED, | 959 | if (request_irq(pci_dev->irq, &r852_irq, IRQF_SHARED, |
946 | DRV_NAME, dev)) | 960 | DRV_NAME, dev)) |
947 | goto error10; | 961 | goto error10; |
948 | 962 | ||
949 | dev->irq = pci_dev->irq; | ||
950 | spin_lock_init(&dev->irqlock); | ||
951 | |||
952 | /* kick initial present test */ | 963 | /* kick initial present test */ |
953 | dev->card_detected = 0; | ||
954 | r852_card_update_present(dev); | ||
955 | queue_delayed_work(dev->card_workqueue, | 964 | queue_delayed_work(dev->card_workqueue, |
956 | &dev->card_detect_work, 0); | 965 | &dev->card_detect_work, 0); |
957 | 966 | ||
@@ -1081,7 +1090,7 @@ int r852_resume(struct device *device) | |||
1081 | dev->card_detected ? "added" : "removed"); | 1090 | dev->card_detected ? "added" : "removed"); |
1082 | 1091 | ||
1083 | queue_delayed_work(dev->card_workqueue, | 1092 | queue_delayed_work(dev->card_workqueue, |
1084 | &dev->card_detect_work, 1000); | 1093 | &dev->card_detect_work, msecs_to_jiffies(1000)); |
1085 | return 0; | 1094 | return 0; |
1086 | } | 1095 | } |
1087 | 1096 | ||
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index b7512cf08c58..477345d41641 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c | |||
@@ -1457,7 +1457,8 @@ static void quirk_jmicron_ata(struct pci_dev *pdev) | |||
1457 | conf5 &= ~(1 << 24); /* Clear bit 24 */ | 1457 | conf5 &= ~(1 << 24); /* Clear bit 24 */ |
1458 | 1458 | ||
1459 | switch (pdev->device) { | 1459 | switch (pdev->device) { |
1460 | case PCI_DEVICE_ID_JMICRON_JMB360: | 1460 | case PCI_DEVICE_ID_JMICRON_JMB360: /* SATA single port */ |
1461 | case PCI_DEVICE_ID_JMICRON_JMB362: /* SATA dual ports */ | ||
1461 | /* The controller should be in single function ahci mode */ | 1462 | /* The controller should be in single function ahci mode */ |
1462 | conf1 |= 0x0002A100; /* Set 8, 13, 15, 17 */ | 1463 | conf1 |= 0x0002A100; /* Set 8, 13, 15, 17 */ |
1463 | break; | 1464 | break; |
@@ -1493,12 +1494,14 @@ static void quirk_jmicron_ata(struct pci_dev *pdev) | |||
1493 | } | 1494 | } |
1494 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB360, quirk_jmicron_ata); | 1495 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB360, quirk_jmicron_ata); |
1495 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, quirk_jmicron_ata); | 1496 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, quirk_jmicron_ata); |
1497 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB362, quirk_jmicron_ata); | ||
1496 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, quirk_jmicron_ata); | 1498 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, quirk_jmicron_ata); |
1497 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, quirk_jmicron_ata); | 1499 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, quirk_jmicron_ata); |
1498 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, quirk_jmicron_ata); | 1500 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, quirk_jmicron_ata); |
1499 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368, quirk_jmicron_ata); | 1501 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368, quirk_jmicron_ata); |
1500 | DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB360, quirk_jmicron_ata); | 1502 | DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB360, quirk_jmicron_ata); |
1501 | DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, quirk_jmicron_ata); | 1503 | DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, quirk_jmicron_ata); |
1504 | DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB362, quirk_jmicron_ata); | ||
1502 | DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, quirk_jmicron_ata); | 1505 | DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, quirk_jmicron_ata); |
1503 | DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, quirk_jmicron_ata); | 1506 | DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, quirk_jmicron_ata); |
1504 | DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, quirk_jmicron_ata); | 1507 | DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, quirk_jmicron_ata); |
diff --git a/drivers/s390/cio/itcw.c b/drivers/s390/cio/itcw.c index 17da9ab932ed..a0ae29564774 100644 --- a/drivers/s390/cio/itcw.c +++ b/drivers/s390/cio/itcw.c | |||
@@ -42,7 +42,7 @@ | |||
42 | * size_t size; | 42 | * size_t size; |
43 | * | 43 | * |
44 | * size = itcw_calc_size(1, 2, 0); | 44 | * size = itcw_calc_size(1, 2, 0); |
45 | * buffer = kmalloc(size, GFP_DMA); | 45 | * buffer = kmalloc(size, GFP_KERNEL | GFP_DMA); |
46 | * if (!buffer) | 46 | * if (!buffer) |
47 | * return -ENOMEM; | 47 | * return -ENOMEM; |
48 | * itcw = itcw_init(buffer, size, ITCW_OP_READ, 1, 2, 0); | 48 | * itcw = itcw_init(buffer, size, ITCW_OP_READ, 1, 2, 0); |
diff --git a/drivers/vhost/net.c b/drivers/vhost/net.c index 0f41c9195e9b..df5b6b971f26 100644 --- a/drivers/vhost/net.c +++ b/drivers/vhost/net.c | |||
@@ -637,7 +637,7 @@ const static struct file_operations vhost_net_fops = { | |||
637 | }; | 637 | }; |
638 | 638 | ||
639 | static struct miscdevice vhost_net_misc = { | 639 | static struct miscdevice vhost_net_misc = { |
640 | VHOST_NET_MINOR, | 640 | MISC_DYNAMIC_MINOR, |
641 | "vhost-net", | 641 | "vhost-net", |
642 | &vhost_net_fops, | 642 | &vhost_net_fops, |
643 | }; | 643 | }; |
diff --git a/drivers/watchdog/wm8350_wdt.c b/drivers/watchdog/wm8350_wdt.c index 89dd7b035295..b68d928c8f90 100644 --- a/drivers/watchdog/wm8350_wdt.c +++ b/drivers/watchdog/wm8350_wdt.c | |||
@@ -284,7 +284,7 @@ static int __devinit wm8350_wdt_probe(struct platform_device *pdev) | |||
284 | struct wm8350 *wm8350 = platform_get_drvdata(pdev); | 284 | struct wm8350 *wm8350 = platform_get_drvdata(pdev); |
285 | 285 | ||
286 | if (!wm8350) { | 286 | if (!wm8350) { |
287 | dev_err(wm8350->dev, "No driver data supplied\n"); | 287 | pr_err("No driver data supplied\n"); |
288 | return -ENODEV; | 288 | return -ENODEV; |
289 | } | 289 | } |
290 | 290 | ||
diff --git a/fs/jffs2/acl.c b/fs/jffs2/acl.c index a33aab6b5e68..54a92fd02bbd 100644 --- a/fs/jffs2/acl.c +++ b/fs/jffs2/acl.c | |||
@@ -234,8 +234,9 @@ static int jffs2_set_acl(struct inode *inode, int type, struct posix_acl *acl) | |||
234 | if (inode->i_mode != mode) { | 234 | if (inode->i_mode != mode) { |
235 | struct iattr attr; | 235 | struct iattr attr; |
236 | 236 | ||
237 | attr.ia_valid = ATTR_MODE; | 237 | attr.ia_valid = ATTR_MODE | ATTR_CTIME; |
238 | attr.ia_mode = mode; | 238 | attr.ia_mode = mode; |
239 | attr.ia_ctime = CURRENT_TIME_SEC; | ||
239 | rc = jffs2_do_setattr(inode, &attr); | 240 | rc = jffs2_do_setattr(inode, &attr); |
240 | if (rc < 0) | 241 | if (rc < 0) |
241 | return rc; | 242 | return rc; |
diff --git a/fs/jffs2/dir.c b/fs/jffs2/dir.c index 7aa4417e085f..166062a68230 100644 --- a/fs/jffs2/dir.c +++ b/fs/jffs2/dir.c | |||
@@ -222,15 +222,18 @@ static int jffs2_create(struct inode *dir_i, struct dentry *dentry, int mode, | |||
222 | dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(ri->ctime)); | 222 | dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(ri->ctime)); |
223 | 223 | ||
224 | jffs2_free_raw_inode(ri); | 224 | jffs2_free_raw_inode(ri); |
225 | d_instantiate(dentry, inode); | ||
226 | 225 | ||
227 | D1(printk(KERN_DEBUG "jffs2_create: Created ino #%lu with mode %o, nlink %d(%d). nrpages %ld\n", | 226 | D1(printk(KERN_DEBUG "jffs2_create: Created ino #%lu with mode %o, nlink %d(%d). nrpages %ld\n", |
228 | inode->i_ino, inode->i_mode, inode->i_nlink, | 227 | inode->i_ino, inode->i_mode, inode->i_nlink, |
229 | f->inocache->pino_nlink, inode->i_mapping->nrpages)); | 228 | f->inocache->pino_nlink, inode->i_mapping->nrpages)); |
229 | |||
230 | d_instantiate(dentry, inode); | ||
231 | unlock_new_inode(inode); | ||
230 | return 0; | 232 | return 0; |
231 | 233 | ||
232 | fail: | 234 | fail: |
233 | make_bad_inode(inode); | 235 | make_bad_inode(inode); |
236 | unlock_new_inode(inode); | ||
234 | iput(inode); | 237 | iput(inode); |
235 | jffs2_free_raw_inode(ri); | 238 | jffs2_free_raw_inode(ri); |
236 | return ret; | 239 | return ret; |
@@ -360,8 +363,8 @@ static int jffs2_symlink (struct inode *dir_i, struct dentry *dentry, const char | |||
360 | /* Eeek. Wave bye bye */ | 363 | /* Eeek. Wave bye bye */ |
361 | mutex_unlock(&f->sem); | 364 | mutex_unlock(&f->sem); |
362 | jffs2_complete_reservation(c); | 365 | jffs2_complete_reservation(c); |
363 | jffs2_clear_inode(inode); | 366 | ret = PTR_ERR(fn); |
364 | return PTR_ERR(fn); | 367 | goto fail; |
365 | } | 368 | } |
366 | 369 | ||
367 | /* We use f->target field to store the target path. */ | 370 | /* We use f->target field to store the target path. */ |
@@ -370,8 +373,8 @@ static int jffs2_symlink (struct inode *dir_i, struct dentry *dentry, const char | |||
370 | printk(KERN_WARNING "Can't allocate %d bytes of memory\n", targetlen + 1); | 373 | printk(KERN_WARNING "Can't allocate %d bytes of memory\n", targetlen + 1); |
371 | mutex_unlock(&f->sem); | 374 | mutex_unlock(&f->sem); |
372 | jffs2_complete_reservation(c); | 375 | jffs2_complete_reservation(c); |
373 | jffs2_clear_inode(inode); | 376 | ret = -ENOMEM; |
374 | return -ENOMEM; | 377 | goto fail; |
375 | } | 378 | } |
376 | 379 | ||
377 | memcpy(f->target, target, targetlen + 1); | 380 | memcpy(f->target, target, targetlen + 1); |
@@ -386,30 +389,24 @@ static int jffs2_symlink (struct inode *dir_i, struct dentry *dentry, const char | |||
386 | jffs2_complete_reservation(c); | 389 | jffs2_complete_reservation(c); |
387 | 390 | ||
388 | ret = jffs2_init_security(inode, dir_i); | 391 | ret = jffs2_init_security(inode, dir_i); |
389 | if (ret) { | 392 | if (ret) |
390 | jffs2_clear_inode(inode); | 393 | goto fail; |
391 | return ret; | 394 | |
392 | } | ||
393 | ret = jffs2_init_acl_post(inode); | 395 | ret = jffs2_init_acl_post(inode); |
394 | if (ret) { | 396 | if (ret) |
395 | jffs2_clear_inode(inode); | 397 | goto fail; |
396 | return ret; | ||
397 | } | ||
398 | 398 | ||
399 | ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, | 399 | ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, |
400 | ALLOC_NORMAL, JFFS2_SUMMARY_DIRENT_SIZE(namelen)); | 400 | ALLOC_NORMAL, JFFS2_SUMMARY_DIRENT_SIZE(namelen)); |
401 | if (ret) { | 401 | if (ret) |
402 | /* Eep. */ | 402 | goto fail; |
403 | jffs2_clear_inode(inode); | ||
404 | return ret; | ||
405 | } | ||
406 | 403 | ||
407 | rd = jffs2_alloc_raw_dirent(); | 404 | rd = jffs2_alloc_raw_dirent(); |
408 | if (!rd) { | 405 | if (!rd) { |
409 | /* Argh. Now we treat it like a normal delete */ | 406 | /* Argh. Now we treat it like a normal delete */ |
410 | jffs2_complete_reservation(c); | 407 | jffs2_complete_reservation(c); |
411 | jffs2_clear_inode(inode); | 408 | ret = -ENOMEM; |
412 | return -ENOMEM; | 409 | goto fail; |
413 | } | 410 | } |
414 | 411 | ||
415 | dir_f = JFFS2_INODE_INFO(dir_i); | 412 | dir_f = JFFS2_INODE_INFO(dir_i); |
@@ -437,8 +434,8 @@ static int jffs2_symlink (struct inode *dir_i, struct dentry *dentry, const char | |||
437 | jffs2_complete_reservation(c); | 434 | jffs2_complete_reservation(c); |
438 | jffs2_free_raw_dirent(rd); | 435 | jffs2_free_raw_dirent(rd); |
439 | mutex_unlock(&dir_f->sem); | 436 | mutex_unlock(&dir_f->sem); |
440 | jffs2_clear_inode(inode); | 437 | ret = PTR_ERR(fd); |
441 | return PTR_ERR(fd); | 438 | goto fail; |
442 | } | 439 | } |
443 | 440 | ||
444 | dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(rd->mctime)); | 441 | dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(rd->mctime)); |
@@ -453,7 +450,14 @@ static int jffs2_symlink (struct inode *dir_i, struct dentry *dentry, const char | |||
453 | jffs2_complete_reservation(c); | 450 | jffs2_complete_reservation(c); |
454 | 451 | ||
455 | d_instantiate(dentry, inode); | 452 | d_instantiate(dentry, inode); |
453 | unlock_new_inode(inode); | ||
456 | return 0; | 454 | return 0; |
455 | |||
456 | fail: | ||
457 | make_bad_inode(inode); | ||
458 | unlock_new_inode(inode); | ||
459 | iput(inode); | ||
460 | return ret; | ||
457 | } | 461 | } |
458 | 462 | ||
459 | 463 | ||
@@ -519,8 +523,8 @@ static int jffs2_mkdir (struct inode *dir_i, struct dentry *dentry, int mode) | |||
519 | /* Eeek. Wave bye bye */ | 523 | /* Eeek. Wave bye bye */ |
520 | mutex_unlock(&f->sem); | 524 | mutex_unlock(&f->sem); |
521 | jffs2_complete_reservation(c); | 525 | jffs2_complete_reservation(c); |
522 | jffs2_clear_inode(inode); | 526 | ret = PTR_ERR(fn); |
523 | return PTR_ERR(fn); | 527 | goto fail; |
524 | } | 528 | } |
525 | /* No data here. Only a metadata node, which will be | 529 | /* No data here. Only a metadata node, which will be |
526 | obsoleted by the first data write | 530 | obsoleted by the first data write |
@@ -531,30 +535,24 @@ static int jffs2_mkdir (struct inode *dir_i, struct dentry *dentry, int mode) | |||
531 | jffs2_complete_reservation(c); | 535 | jffs2_complete_reservation(c); |
532 | 536 | ||
533 | ret = jffs2_init_security(inode, dir_i); | 537 | ret = jffs2_init_security(inode, dir_i); |
534 | if (ret) { | 538 | if (ret) |
535 | jffs2_clear_inode(inode); | 539 | goto fail; |
536 | return ret; | 540 | |
537 | } | ||
538 | ret = jffs2_init_acl_post(inode); | 541 | ret = jffs2_init_acl_post(inode); |
539 | if (ret) { | 542 | if (ret) |
540 | jffs2_clear_inode(inode); | 543 | goto fail; |
541 | return ret; | ||
542 | } | ||
543 | 544 | ||
544 | ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, | 545 | ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, |
545 | ALLOC_NORMAL, JFFS2_SUMMARY_DIRENT_SIZE(namelen)); | 546 | ALLOC_NORMAL, JFFS2_SUMMARY_DIRENT_SIZE(namelen)); |
546 | if (ret) { | 547 | if (ret) |
547 | /* Eep. */ | 548 | goto fail; |
548 | jffs2_clear_inode(inode); | ||
549 | return ret; | ||
550 | } | ||
551 | 549 | ||
552 | rd = jffs2_alloc_raw_dirent(); | 550 | rd = jffs2_alloc_raw_dirent(); |
553 | if (!rd) { | 551 | if (!rd) { |
554 | /* Argh. Now we treat it like a normal delete */ | 552 | /* Argh. Now we treat it like a normal delete */ |
555 | jffs2_complete_reservation(c); | 553 | jffs2_complete_reservation(c); |
556 | jffs2_clear_inode(inode); | 554 | ret = -ENOMEM; |
557 | return -ENOMEM; | 555 | goto fail; |
558 | } | 556 | } |
559 | 557 | ||
560 | dir_f = JFFS2_INODE_INFO(dir_i); | 558 | dir_f = JFFS2_INODE_INFO(dir_i); |
@@ -582,8 +580,8 @@ static int jffs2_mkdir (struct inode *dir_i, struct dentry *dentry, int mode) | |||
582 | jffs2_complete_reservation(c); | 580 | jffs2_complete_reservation(c); |
583 | jffs2_free_raw_dirent(rd); | 581 | jffs2_free_raw_dirent(rd); |
584 | mutex_unlock(&dir_f->sem); | 582 | mutex_unlock(&dir_f->sem); |
585 | jffs2_clear_inode(inode); | 583 | ret = PTR_ERR(fd); |
586 | return PTR_ERR(fd); | 584 | goto fail; |
587 | } | 585 | } |
588 | 586 | ||
589 | dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(rd->mctime)); | 587 | dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(rd->mctime)); |
@@ -599,7 +597,14 @@ static int jffs2_mkdir (struct inode *dir_i, struct dentry *dentry, int mode) | |||
599 | jffs2_complete_reservation(c); | 597 | jffs2_complete_reservation(c); |
600 | 598 | ||
601 | d_instantiate(dentry, inode); | 599 | d_instantiate(dentry, inode); |
600 | unlock_new_inode(inode); | ||
602 | return 0; | 601 | return 0; |
602 | |||
603 | fail: | ||
604 | make_bad_inode(inode); | ||
605 | unlock_new_inode(inode); | ||
606 | iput(inode); | ||
607 | return ret; | ||
603 | } | 608 | } |
604 | 609 | ||
605 | static int jffs2_rmdir (struct inode *dir_i, struct dentry *dentry) | 610 | static int jffs2_rmdir (struct inode *dir_i, struct dentry *dentry) |
@@ -693,8 +698,8 @@ static int jffs2_mknod (struct inode *dir_i, struct dentry *dentry, int mode, de | |||
693 | /* Eeek. Wave bye bye */ | 698 | /* Eeek. Wave bye bye */ |
694 | mutex_unlock(&f->sem); | 699 | mutex_unlock(&f->sem); |
695 | jffs2_complete_reservation(c); | 700 | jffs2_complete_reservation(c); |
696 | jffs2_clear_inode(inode); | 701 | ret = PTR_ERR(fn); |
697 | return PTR_ERR(fn); | 702 | goto fail; |
698 | } | 703 | } |
699 | /* No data here. Only a metadata node, which will be | 704 | /* No data here. Only a metadata node, which will be |
700 | obsoleted by the first data write | 705 | obsoleted by the first data write |
@@ -705,30 +710,24 @@ static int jffs2_mknod (struct inode *dir_i, struct dentry *dentry, int mode, de | |||
705 | jffs2_complete_reservation(c); | 710 | jffs2_complete_reservation(c); |
706 | 711 | ||
707 | ret = jffs2_init_security(inode, dir_i); | 712 | ret = jffs2_init_security(inode, dir_i); |
708 | if (ret) { | 713 | if (ret) |
709 | jffs2_clear_inode(inode); | 714 | goto fail; |
710 | return ret; | 715 | |
711 | } | ||
712 | ret = jffs2_init_acl_post(inode); | 716 | ret = jffs2_init_acl_post(inode); |
713 | if (ret) { | 717 | if (ret) |
714 | jffs2_clear_inode(inode); | 718 | goto fail; |
715 | return ret; | ||
716 | } | ||
717 | 719 | ||
718 | ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, | 720 | ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, |
719 | ALLOC_NORMAL, JFFS2_SUMMARY_DIRENT_SIZE(namelen)); | 721 | ALLOC_NORMAL, JFFS2_SUMMARY_DIRENT_SIZE(namelen)); |
720 | if (ret) { | 722 | if (ret) |
721 | /* Eep. */ | 723 | goto fail; |
722 | jffs2_clear_inode(inode); | ||
723 | return ret; | ||
724 | } | ||
725 | 724 | ||
726 | rd = jffs2_alloc_raw_dirent(); | 725 | rd = jffs2_alloc_raw_dirent(); |
727 | if (!rd) { | 726 | if (!rd) { |
728 | /* Argh. Now we treat it like a normal delete */ | 727 | /* Argh. Now we treat it like a normal delete */ |
729 | jffs2_complete_reservation(c); | 728 | jffs2_complete_reservation(c); |
730 | jffs2_clear_inode(inode); | 729 | ret = -ENOMEM; |
731 | return -ENOMEM; | 730 | goto fail; |
732 | } | 731 | } |
733 | 732 | ||
734 | dir_f = JFFS2_INODE_INFO(dir_i); | 733 | dir_f = JFFS2_INODE_INFO(dir_i); |
@@ -759,8 +758,8 @@ static int jffs2_mknod (struct inode *dir_i, struct dentry *dentry, int mode, de | |||
759 | jffs2_complete_reservation(c); | 758 | jffs2_complete_reservation(c); |
760 | jffs2_free_raw_dirent(rd); | 759 | jffs2_free_raw_dirent(rd); |
761 | mutex_unlock(&dir_f->sem); | 760 | mutex_unlock(&dir_f->sem); |
762 | jffs2_clear_inode(inode); | 761 | ret = PTR_ERR(fd); |
763 | return PTR_ERR(fd); | 762 | goto fail; |
764 | } | 763 | } |
765 | 764 | ||
766 | dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(rd->mctime)); | 765 | dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(rd->mctime)); |
@@ -775,8 +774,14 @@ static int jffs2_mknod (struct inode *dir_i, struct dentry *dentry, int mode, de | |||
775 | jffs2_complete_reservation(c); | 774 | jffs2_complete_reservation(c); |
776 | 775 | ||
777 | d_instantiate(dentry, inode); | 776 | d_instantiate(dentry, inode); |
778 | 777 | unlock_new_inode(inode); | |
779 | return 0; | 778 | return 0; |
779 | |||
780 | fail: | ||
781 | make_bad_inode(inode); | ||
782 | unlock_new_inode(inode); | ||
783 | iput(inode); | ||
784 | return ret; | ||
780 | } | 785 | } |
781 | 786 | ||
782 | static int jffs2_rename (struct inode *old_dir_i, struct dentry *old_dentry, | 787 | static int jffs2_rename (struct inode *old_dir_i, struct dentry *old_dentry, |
diff --git a/fs/jffs2/fs.c b/fs/jffs2/fs.c index 8bc2c80ab159..459d39d1ea0b 100644 --- a/fs/jffs2/fs.c +++ b/fs/jffs2/fs.c | |||
@@ -465,7 +465,12 @@ struct inode *jffs2_new_inode (struct inode *dir_i, int mode, struct jffs2_raw_i | |||
465 | inode->i_blocks = 0; | 465 | inode->i_blocks = 0; |
466 | inode->i_size = 0; | 466 | inode->i_size = 0; |
467 | 467 | ||
468 | insert_inode_hash(inode); | 468 | if (insert_inode_locked(inode) < 0) { |
469 | make_bad_inode(inode); | ||
470 | unlock_new_inode(inode); | ||
471 | iput(inode); | ||
472 | return ERR_PTR(-EINVAL); | ||
473 | } | ||
469 | 474 | ||
470 | return inode; | 475 | return inode; |
471 | } | 476 | } |
diff --git a/fs/xfs/linux-2.6/xfs_aops.c b/fs/xfs/linux-2.6/xfs_aops.c index a0fa3bf0d1bb..34640d6dbdcb 100644 --- a/fs/xfs/linux-2.6/xfs_aops.c +++ b/fs/xfs/linux-2.6/xfs_aops.c | |||
@@ -1381,14 +1381,6 @@ xfs_vm_writepage( | |||
1381 | if (!page_has_buffers(page)) | 1381 | if (!page_has_buffers(page)) |
1382 | create_empty_buffers(page, 1 << inode->i_blkbits, 0); | 1382 | create_empty_buffers(page, 1 << inode->i_blkbits, 0); |
1383 | 1383 | ||
1384 | |||
1385 | /* | ||
1386 | * VM calculation for nr_to_write seems off. Bump it way | ||
1387 | * up, this gets simple streaming writes zippy again. | ||
1388 | * To be reviewed again after Jens' writeback changes. | ||
1389 | */ | ||
1390 | wbc->nr_to_write *= 4; | ||
1391 | |||
1392 | /* | 1384 | /* |
1393 | * Convert delayed allocate, unwritten or unmapped space | 1385 | * Convert delayed allocate, unwritten or unmapped space |
1394 | * to real space and flush out to disk. | 1386 | * to real space and flush out to disk. |
diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h index 3ff9fc071dfe..5347063e9d5a 100644 --- a/include/drm/radeon_drm.h +++ b/include/drm/radeon_drm.h | |||
@@ -903,6 +903,7 @@ struct drm_radeon_cs { | |||
903 | #define RADEON_INFO_NUM_Z_PIPES 0x02 | 903 | #define RADEON_INFO_NUM_Z_PIPES 0x02 |
904 | #define RADEON_INFO_ACCEL_WORKING 0x03 | 904 | #define RADEON_INFO_ACCEL_WORKING 0x03 |
905 | #define RADEON_INFO_CRTC_FROM_ID 0x04 | 905 | #define RADEON_INFO_CRTC_FROM_ID 0x04 |
906 | #define RADEON_INFO_ACCEL_WORKING2 0x05 | ||
906 | 907 | ||
907 | struct drm_radeon_info { | 908 | struct drm_radeon_info { |
908 | uint32_t request; | 909 | uint32_t request; |
diff --git a/include/linux/miscdevice.h b/include/linux/miscdevice.h index b631c46cffd9..f6c9b7dcb9fd 100644 --- a/include/linux/miscdevice.h +++ b/include/linux/miscdevice.h | |||
@@ -3,6 +3,12 @@ | |||
3 | #include <linux/module.h> | 3 | #include <linux/module.h> |
4 | #include <linux/major.h> | 4 | #include <linux/major.h> |
5 | 5 | ||
6 | /* | ||
7 | * These allocations are managed by device@lanana.org. If you use an | ||
8 | * entry that is not in assigned your entry may well be moved and | ||
9 | * reassigned, or set dynamic if a fixed value is not justified. | ||
10 | */ | ||
11 | |||
6 | #define PSMOUSE_MINOR 1 | 12 | #define PSMOUSE_MINOR 1 |
7 | #define MS_BUSMOUSE_MINOR 2 | 13 | #define MS_BUSMOUSE_MINOR 2 |
8 | #define ATIXL_BUSMOUSE_MINOR 3 | 14 | #define ATIXL_BUSMOUSE_MINOR 3 |
@@ -30,7 +36,6 @@ | |||
30 | #define HPET_MINOR 228 | 36 | #define HPET_MINOR 228 |
31 | #define FUSE_MINOR 229 | 37 | #define FUSE_MINOR 229 |
32 | #define KVM_MINOR 232 | 38 | #define KVM_MINOR 232 |
33 | #define VHOST_NET_MINOR 233 | ||
34 | #define BTRFS_MINOR 234 | 39 | #define BTRFS_MINOR 234 |
35 | #define AUTOFS_MINOR 235 | 40 | #define AUTOFS_MINOR 235 |
36 | #define MISC_DYNAMIC_MINOR 255 | 41 | #define MISC_DYNAMIC_MINOR 255 |
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index f149dd10908b..4eb467910a45 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h | |||
@@ -2321,6 +2321,7 @@ | |||
2321 | #define PCI_VENDOR_ID_JMICRON 0x197B | 2321 | #define PCI_VENDOR_ID_JMICRON 0x197B |
2322 | #define PCI_DEVICE_ID_JMICRON_JMB360 0x2360 | 2322 | #define PCI_DEVICE_ID_JMICRON_JMB360 0x2360 |
2323 | #define PCI_DEVICE_ID_JMICRON_JMB361 0x2361 | 2323 | #define PCI_DEVICE_ID_JMICRON_JMB361 0x2361 |
2324 | #define PCI_DEVICE_ID_JMICRON_JMB362 0x2362 | ||
2324 | #define PCI_DEVICE_ID_JMICRON_JMB363 0x2363 | 2325 | #define PCI_DEVICE_ID_JMICRON_JMB363 0x2363 |
2325 | #define PCI_DEVICE_ID_JMICRON_JMB365 0x2365 | 2326 | #define PCI_DEVICE_ID_JMICRON_JMB365 0x2365 |
2326 | #define PCI_DEVICE_ID_JMICRON_JMB366 0x2366 | 2327 | #define PCI_DEVICE_ID_JMICRON_JMB366 0x2366 |
diff --git a/include/linux/writeback.h b/include/linux/writeback.h index f64134653a8c..d63ef8f9609f 100644 --- a/include/linux/writeback.h +++ b/include/linux/writeback.h | |||
@@ -56,15 +56,6 @@ struct writeback_control { | |||
56 | unsigned for_reclaim:1; /* Invoked from the page allocator */ | 56 | unsigned for_reclaim:1; /* Invoked from the page allocator */ |
57 | unsigned range_cyclic:1; /* range_start is cyclic */ | 57 | unsigned range_cyclic:1; /* range_start is cyclic */ |
58 | unsigned more_io:1; /* more io to be dispatched */ | 58 | unsigned more_io:1; /* more io to be dispatched */ |
59 | /* | ||
60 | * write_cache_pages() won't update wbc->nr_to_write and | ||
61 | * mapping->writeback_index if no_nrwrite_index_update | ||
62 | * is set. write_cache_pages() may write more than we | ||
63 | * requested and we want to make sure nr_to_write and | ||
64 | * writeback_index are updated in a consistent manner | ||
65 | * so we use a single control to update them | ||
66 | */ | ||
67 | unsigned no_nrwrite_index_update:1; | ||
68 | }; | 59 | }; |
69 | 60 | ||
70 | /* | 61 | /* |
diff --git a/include/trace/events/ext4.h b/include/trace/events/ext4.h index f5b1ba90e952..f3865c7b4166 100644 --- a/include/trace/events/ext4.h +++ b/include/trace/events/ext4.h | |||
@@ -306,7 +306,6 @@ TRACE_EVENT(ext4_da_writepages_result, | |||
306 | __field( int, pages_written ) | 306 | __field( int, pages_written ) |
307 | __field( long, pages_skipped ) | 307 | __field( long, pages_skipped ) |
308 | __field( char, more_io ) | 308 | __field( char, more_io ) |
309 | __field( char, no_nrwrite_index_update ) | ||
310 | __field( pgoff_t, writeback_index ) | 309 | __field( pgoff_t, writeback_index ) |
311 | ), | 310 | ), |
312 | 311 | ||
@@ -317,16 +316,14 @@ TRACE_EVENT(ext4_da_writepages_result, | |||
317 | __entry->pages_written = pages_written; | 316 | __entry->pages_written = pages_written; |
318 | __entry->pages_skipped = wbc->pages_skipped; | 317 | __entry->pages_skipped = wbc->pages_skipped; |
319 | __entry->more_io = wbc->more_io; | 318 | __entry->more_io = wbc->more_io; |
320 | __entry->no_nrwrite_index_update = wbc->no_nrwrite_index_update; | ||
321 | __entry->writeback_index = inode->i_mapping->writeback_index; | 319 | __entry->writeback_index = inode->i_mapping->writeback_index; |
322 | ), | 320 | ), |
323 | 321 | ||
324 | TP_printk("dev %s ino %lu ret %d pages_written %d pages_skipped %ld more_io %d no_nrwrite_index_update %d writeback_index %lu", | 322 | TP_printk("dev %s ino %lu ret %d pages_written %d pages_skipped %ld more_io %d writeback_index %lu", |
325 | jbd2_dev_to_name(__entry->dev), | 323 | jbd2_dev_to_name(__entry->dev), |
326 | (unsigned long) __entry->ino, __entry->ret, | 324 | (unsigned long) __entry->ino, __entry->ret, |
327 | __entry->pages_written, __entry->pages_skipped, | 325 | __entry->pages_written, __entry->pages_skipped, |
328 | __entry->more_io, | 326 | __entry->more_io, |
329 | __entry->no_nrwrite_index_update, | ||
330 | (unsigned long) __entry->writeback_index) | 327 | (unsigned long) __entry->writeback_index) |
331 | ); | 328 | ); |
332 | 329 | ||
diff --git a/mm/page-writeback.c b/mm/page-writeback.c index 5fa63bdf52e4..bbd396ac9546 100644 --- a/mm/page-writeback.c +++ b/mm/page-writeback.c | |||
@@ -835,7 +835,6 @@ int write_cache_pages(struct address_space *mapping, | |||
835 | pgoff_t done_index; | 835 | pgoff_t done_index; |
836 | int cycled; | 836 | int cycled; |
837 | int range_whole = 0; | 837 | int range_whole = 0; |
838 | long nr_to_write = wbc->nr_to_write; | ||
839 | 838 | ||
840 | pagevec_init(&pvec, 0); | 839 | pagevec_init(&pvec, 0); |
841 | if (wbc->range_cyclic) { | 840 | if (wbc->range_cyclic) { |
@@ -852,7 +851,22 @@ int write_cache_pages(struct address_space *mapping, | |||
852 | if (wbc->range_start == 0 && wbc->range_end == LLONG_MAX) | 851 | if (wbc->range_start == 0 && wbc->range_end == LLONG_MAX) |
853 | range_whole = 1; | 852 | range_whole = 1; |
854 | cycled = 1; /* ignore range_cyclic tests */ | 853 | cycled = 1; /* ignore range_cyclic tests */ |
854 | |||
855 | /* | ||
856 | * If this is a data integrity sync, cap the writeback to the | ||
857 | * current end of file. Any extension to the file that occurs | ||
858 | * after this is a new write and we don't need to write those | ||
859 | * pages out to fulfil our data integrity requirements. If we | ||
860 | * try to write them out, we can get stuck in this scan until | ||
861 | * the concurrent writer stops adding dirty pages and extending | ||
862 | * EOF. | ||
863 | */ | ||
864 | if (wbc->sync_mode == WB_SYNC_ALL && | ||
865 | wbc->range_end == LLONG_MAX) { | ||
866 | end = i_size_read(mapping->host) >> PAGE_CACHE_SHIFT; | ||
867 | } | ||
855 | } | 868 | } |
869 | |||
856 | retry: | 870 | retry: |
857 | done_index = index; | 871 | done_index = index; |
858 | while (!done && (index <= end)) { | 872 | while (!done && (index <= end)) { |
@@ -935,11 +949,10 @@ continue_unlock: | |||
935 | done = 1; | 949 | done = 1; |
936 | break; | 950 | break; |
937 | } | 951 | } |
938 | } | 952 | } |
939 | 953 | ||
940 | if (nr_to_write > 0) { | 954 | if (wbc->nr_to_write > 0) { |
941 | nr_to_write--; | 955 | if (--wbc->nr_to_write == 0 && |
942 | if (nr_to_write == 0 && | ||
943 | wbc->sync_mode == WB_SYNC_NONE) { | 956 | wbc->sync_mode == WB_SYNC_NONE) { |
944 | /* | 957 | /* |
945 | * We stop writing back only if we are | 958 | * We stop writing back only if we are |
@@ -970,11 +983,8 @@ continue_unlock: | |||
970 | end = writeback_index - 1; | 983 | end = writeback_index - 1; |
971 | goto retry; | 984 | goto retry; |
972 | } | 985 | } |
973 | if (!wbc->no_nrwrite_index_update) { | 986 | if (wbc->range_cyclic || (range_whole && wbc->nr_to_write > 0)) |
974 | if (wbc->range_cyclic || (range_whole && nr_to_write > 0)) | 987 | mapping->writeback_index = done_index; |
975 | mapping->writeback_index = done_index; | ||
976 | wbc->nr_to_write = nr_to_write; | ||
977 | } | ||
978 | 988 | ||
979 | return ret; | 989 | return ret; |
980 | } | 990 | } |