diff options
| -rw-r--r-- | arch/powerpc/boot/flatdevtree.c | 18 | ||||
| -rw-r--r-- | arch/powerpc/kernel/Makefile | 1 | ||||
| -rw-r--r-- | arch/powerpc/kernel/misc_32.S | 12 | ||||
| -rw-r--r-- | arch/powerpc/mm/hash_utils_64.c | 2 | ||||
| -rw-r--r-- | arch/powerpc/platforms/cell/spu_syscalls.c | 1 | ||||
| -rw-r--r-- | arch/powerpc/platforms/ps3/device-init.c | 2 | ||||
| -rw-r--r-- | arch/ppc/kernel/misc.S | 12 |
7 files changed, 26 insertions, 22 deletions
diff --git a/arch/powerpc/boot/flatdevtree.c b/arch/powerpc/boot/flatdevtree.c index b732644788db..13761bf160c4 100644 --- a/arch/powerpc/boot/flatdevtree.c +++ b/arch/powerpc/boot/flatdevtree.c | |||
| @@ -134,20 +134,6 @@ static char *ft_next(struct ft_cxt *cxt, char *p, struct ft_atom *ret) | |||
| 134 | #define HDR_SIZE _ALIGN(sizeof(struct boot_param_header), 8) | 134 | #define HDR_SIZE _ALIGN(sizeof(struct boot_param_header), 8) |
| 135 | #define EXPAND_INCR 1024 /* alloc this much extra when expanding */ | 135 | #define EXPAND_INCR 1024 /* alloc this much extra when expanding */ |
| 136 | 136 | ||
| 137 | /* See if the regions are in the standard order and non-overlapping */ | ||
| 138 | static int ft_ordered(struct ft_cxt *cxt) | ||
| 139 | { | ||
| 140 | char *p = (char *)cxt->bph + HDR_SIZE; | ||
| 141 | enum ft_rgn_id r; | ||
| 142 | |||
| 143 | for (r = FT_RSVMAP; r <= FT_STRINGS; ++r) { | ||
| 144 | if (p > cxt->rgn[r].start) | ||
| 145 | return 0; | ||
| 146 | p = cxt->rgn[r].start + cxt->rgn[r].size; | ||
| 147 | } | ||
| 148 | return p <= (char *)cxt->bph + cxt->max_size; | ||
| 149 | } | ||
| 150 | |||
| 151 | /* Copy the tree to a newly-allocated region and put things in order */ | 137 | /* Copy the tree to a newly-allocated region and put things in order */ |
| 152 | static int ft_reorder(struct ft_cxt *cxt, int nextra) | 138 | static int ft_reorder(struct ft_cxt *cxt, int nextra) |
| 153 | { | 139 | { |
| @@ -573,10 +559,6 @@ int ft_open(struct ft_cxt *cxt, void *blob, unsigned int max_size, | |||
| 573 | cxt->rgn[FT_STRUCT].size = struct_size(cxt); | 559 | cxt->rgn[FT_STRUCT].size = struct_size(cxt); |
| 574 | cxt->rgn[FT_STRINGS].start = blob + be32_to_cpu(bph->off_dt_strings); | 560 | cxt->rgn[FT_STRINGS].start = blob + be32_to_cpu(bph->off_dt_strings); |
| 575 | cxt->rgn[FT_STRINGS].size = be32_to_cpu(bph->dt_strings_size); | 561 | cxt->rgn[FT_STRINGS].size = be32_to_cpu(bph->dt_strings_size); |
| 576 | /* Leave as '0' to force first ft_make_space call to do a ft_reorder | ||
| 577 | * and move dt to an area allocated by realloc. | ||
| 578 | cxt->isordered = ft_ordered(cxt); | ||
| 579 | */ | ||
| 580 | 562 | ||
| 581 | cxt->p = cxt->rgn[FT_STRUCT].start; | 563 | cxt->p = cxt->rgn[FT_STRUCT].start; |
| 582 | cxt->str_anchor = cxt->rgn[FT_STRINGS].start; | 564 | cxt->str_anchor = cxt->rgn[FT_STRINGS].start; |
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index f39a72f30aad..b0cb2e662c25 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile | |||
| @@ -81,6 +81,7 @@ obj-y += iomap.o | |||
| 81 | endif | 81 | endif |
| 82 | 82 | ||
| 83 | ifeq ($(CONFIG_PPC_ISERIES),y) | 83 | ifeq ($(CONFIG_PPC_ISERIES),y) |
| 84 | CFLAGS_lparmap.s += -g0 | ||
| 84 | extra-y += lparmap.s | 85 | extra-y += lparmap.s |
| 85 | $(obj)/head_64.o: $(obj)/lparmap.s | 86 | $(obj)/head_64.o: $(obj)/lparmap.s |
| 86 | AFLAGS_head_64.o += -I$(obj) | 87 | AFLAGS_head_64.o += -I$(obj) |
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index e708ab7ca9e8..8533de50347d 100644 --- a/arch/powerpc/kernel/misc_32.S +++ b/arch/powerpc/kernel/misc_32.S | |||
| @@ -301,9 +301,19 @@ _GLOBAL(_tlbie) | |||
| 301 | mfspr r4,SPRN_MMUCR | 301 | mfspr r4,SPRN_MMUCR |
| 302 | mfspr r5,SPRN_PID /* Get PID */ | 302 | mfspr r5,SPRN_PID /* Get PID */ |
| 303 | rlwimi r4,r5,0,24,31 /* Set TID */ | 303 | rlwimi r4,r5,0,24,31 /* Set TID */ |
| 304 | mtspr SPRN_MMUCR,r4 | ||
| 305 | 304 | ||
| 305 | /* We have to run the search with interrupts disabled, even critical | ||
| 306 | * and debug interrupts (in fact the only critical exceptions we have | ||
| 307 | * are debug and machine check). Otherwise an interrupt which causes | ||
| 308 | * a TLB miss can clobber the MMUCR between the mtspr and the tlbsx. */ | ||
| 309 | mfmsr r5 | ||
| 310 | lis r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@ha | ||
| 311 | addi r6,r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@l | ||
| 312 | andc r6,r5,r6 | ||
| 313 | mtmsr r6 | ||
| 314 | mtspr SPRN_MMUCR,r4 | ||
| 306 | tlbsx. r3, 0, r3 | 315 | tlbsx. r3, 0, r3 |
| 316 | mtmsr r5 | ||
| 307 | bne 10f | 317 | bne 10f |
| 308 | sync | 318 | sync |
| 309 | /* There are only 64 TLB entries, so r3 < 64, | 319 | /* There are only 64 TLB entries, so r3 < 64, |
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index f1789578747a..a47151e806ca 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c | |||
| @@ -795,7 +795,7 @@ void hash_preload(struct mm_struct *mm, unsigned long ea, | |||
| 795 | 795 | ||
| 796 | #ifdef CONFIG_PPC_MM_SLICES | 796 | #ifdef CONFIG_PPC_MM_SLICES |
| 797 | /* We only prefault standard pages for now */ | 797 | /* We only prefault standard pages for now */ |
| 798 | if (unlikely(get_slice_psize(mm, ea) != mm->context.user_psize)); | 798 | if (unlikely(get_slice_psize(mm, ea) != mm->context.user_psize)) |
| 799 | return; | 799 | return; |
| 800 | #endif | 800 | #endif |
| 801 | 801 | ||
diff --git a/arch/powerpc/platforms/cell/spu_syscalls.c b/arch/powerpc/platforms/cell/spu_syscalls.c index dd2c6688c8aa..027ac32cc636 100644 --- a/arch/powerpc/platforms/cell/spu_syscalls.c +++ b/arch/powerpc/platforms/cell/spu_syscalls.c | |||
| @@ -45,6 +45,7 @@ asmlinkage long sys_spu_create(const char __user *name, | |||
| 45 | if (owner && try_module_get(owner)) { | 45 | if (owner && try_module_get(owner)) { |
| 46 | if (flags & SPU_CREATE_AFFINITY_SPU) { | 46 | if (flags & SPU_CREATE_AFFINITY_SPU) { |
| 47 | neighbor = fget_light(neighbor_fd, &fput_needed); | 47 | neighbor = fget_light(neighbor_fd, &fput_needed); |
| 48 | ret = -EBADF; | ||
| 48 | if (neighbor) { | 49 | if (neighbor) { |
| 49 | ret = spufs_calls.create_thread(name, flags, | 50 | ret = spufs_calls.create_thread(name, flags, |
| 50 | mode, neighbor); | 51 | mode, neighbor); |
diff --git a/arch/powerpc/platforms/ps3/device-init.c b/arch/powerpc/platforms/ps3/device-init.c index e23a5a874ad3..ce15cada88d4 100644 --- a/arch/powerpc/platforms/ps3/device-init.c +++ b/arch/powerpc/platforms/ps3/device-init.c | |||
| @@ -372,7 +372,7 @@ static int ps3_storage_wait_for_device(const struct ps3_repository_device *repo) | |||
| 372 | notify_event->dev_type == repo->dev_type) { | 372 | notify_event->dev_type == repo->dev_type) { |
| 373 | pr_debug("%s:%u: device ready: dev_id %u\n", __func__, | 373 | pr_debug("%s:%u: device ready: dev_id %u\n", __func__, |
| 374 | __LINE__, repo->dev_id); | 374 | __LINE__, repo->dev_id); |
| 375 | result = 0; | 375 | error = 0; |
| 376 | break; | 376 | break; |
| 377 | } | 377 | } |
| 378 | 378 | ||
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S index 0da55368655c..a22e1f4d94c8 100644 --- a/arch/ppc/kernel/misc.S +++ b/arch/ppc/kernel/misc.S | |||
| @@ -237,9 +237,19 @@ _GLOBAL(_tlbie) | |||
| 237 | mfspr r4,SPRN_MMUCR | 237 | mfspr r4,SPRN_MMUCR |
| 238 | mfspr r5,SPRN_PID /* Get PID */ | 238 | mfspr r5,SPRN_PID /* Get PID */ |
| 239 | rlwimi r4,r5,0,24,31 /* Set TID */ | 239 | rlwimi r4,r5,0,24,31 /* Set TID */ |
| 240 | mtspr SPRN_MMUCR,r4 | ||
| 241 | 240 | ||
| 241 | /* We have to run the search with interrupts disabled, even critical | ||
| 242 | * and debug interrupts (in fact the only critical exceptions we have | ||
| 243 | * are debug and machine check). Otherwise an interrupt which causes | ||
| 244 | * a TLB miss can clobber the MMUCR between the mtspr and the tlbsx. */ | ||
| 245 | mfmsr r5 | ||
| 246 | lis r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@ha | ||
| 247 | addi r6,r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@l | ||
| 248 | andc r6,r5,r6 | ||
| 249 | mtmsr r6 | ||
| 250 | mtspr SPRN_MMUCR,r4 | ||
| 242 | tlbsx. r3, 0, r3 | 251 | tlbsx. r3, 0, r3 |
| 252 | mtmsr r5 | ||
| 243 | bne 10f | 253 | bne 10f |
| 244 | sync | 254 | sync |
| 245 | /* There are only 64 TLB entries, so r3 < 64, | 255 | /* There are only 64 TLB entries, so r3 < 64, |
