diff options
177 files changed, 9290 insertions, 5692 deletions
diff --git a/Documentation/cpu-freq/user-guide.txt b/Documentation/cpu-freq/user-guide.txt index 4f3f3840320e..e3443ddcfb89 100644 --- a/Documentation/cpu-freq/user-guide.txt +++ b/Documentation/cpu-freq/user-guide.txt | |||
| @@ -93,10 +93,8 @@ Several "PowerBook" and "iBook2" notebooks are supported. | |||
| 93 | 1.5 SuperH | 93 | 1.5 SuperH |
| 94 | ---------- | 94 | ---------- |
| 95 | 95 | ||
| 96 | The following SuperH processors are supported by cpufreq: | 96 | All SuperH processors supporting rate rounding through the clock |
| 97 | 97 | framework are supported by cpufreq. | |
| 98 | SH-3 | ||
| 99 | SH-4 | ||
| 100 | 98 | ||
| 101 | 1.6 Blackfin | 99 | 1.6 Blackfin |
| 102 | ------------ | 100 | ------------ |
diff --git a/Documentation/sh/kgdb.txt b/Documentation/sh/kgdb.txt deleted file mode 100644 index 05b4ba89d28c..000000000000 --- a/Documentation/sh/kgdb.txt +++ /dev/null | |||
| @@ -1,179 +0,0 @@ | |||
| 1 | |||
| 2 | This file describes the configuration and behavior of KGDB for the SH | ||
| 3 | kernel. Based on a description from Henry Bell <henry.bell@st.com>, it | ||
| 4 | has been modified to account for quirks in the current implementation. | ||
| 5 | |||
| 6 | Version | ||
| 7 | ======= | ||
| 8 | |||
| 9 | This version of KGDB was written for 2.4.xx kernels for the SH architecture. | ||
| 10 | Further documentation is available from the linux-sh project website. | ||
| 11 | |||
| 12 | |||
| 13 | Debugging Setup: Host | ||
| 14 | ====================== | ||
| 15 | |||
| 16 | The two machines will be connected together via a serial line - this | ||
| 17 | should be a null modem cable i.e. with a twist. | ||
| 18 | |||
| 19 | On your DEVELOPMENT machine, go to your kernel source directory and | ||
| 20 | build the kernel, enabling KGDB support in the "kernel hacking" section. | ||
| 21 | This includes the KGDB code, and also makes the kernel be compiled with | ||
| 22 | the "-g" option set -- necessary for debugging. | ||
| 23 | |||
| 24 | To install this new kernel, use the following installation procedure. | ||
| 25 | |||
| 26 | Decide on which tty port you want the machines to communicate, then | ||
| 27 | cable them up back-to-back using the null modem. On the DEVELOPMENT | ||
| 28 | machine, you may wish to create an initialization file called .gdbinit | ||
| 29 | (in the kernel source directory or in your home directory) to execute | ||
| 30 | commonly-used commands at startup. | ||
| 31 | |||
| 32 | A minimal .gdbinit might look like this: | ||
| 33 | |||
| 34 | file vmlinux | ||
| 35 | set remotebaud 115200 | ||
| 36 | target remote /dev/ttyS0 | ||
| 37 | |||
| 38 | Change the "target" definition so that it specifies the tty port that | ||
| 39 | you intend to use. Change the "remotebaud" definition to match the | ||
| 40 | data rate that you are going to use for the com line (115200 is the | ||
| 41 | default). | ||
| 42 | |||
| 43 | Debugging Setup: Target | ||
| 44 | ======================== | ||
| 45 | |||
| 46 | By default, the KGDB stub will communicate with the host GDB using | ||
| 47 | ttySC1 at 115200 baud, 8 databits, no parity; these defaults can be | ||
| 48 | changed in the kernel configuration. As the kernel starts up, KGDB will | ||
| 49 | initialize so that breakpoints, kernel segfaults, and so forth will | ||
| 50 | generally enter the debugger. | ||
| 51 | |||
| 52 | This behavior can be modified by including the "kgdb" option in the | ||
| 53 | kernel command line; this option has the general form: | ||
| 54 | |||
| 55 | kgdb=<ttyspec>,<action> | ||
| 56 | |||
| 57 | The <ttyspec> indicates the port to use, and can optionally specify | ||
| 58 | baud, parity and databits -- e.g. "ttySC0,9600N8" or "ttySC1,19200". | ||
| 59 | |||
| 60 | The <action> can be "halt" or "disabled". The "halt" action enters the | ||
| 61 | debugger via a breakpoint as soon as kgdb is initialized; the "disabled" | ||
| 62 | action causes kgdb to ignore kernel segfaults and such until explicitly | ||
| 63 | entered by a breakpoint in the code or by external action (sysrq or NMI). | ||
| 64 | |||
| 65 | (Both <ttyspec> and <action> can appear alone, w/o the separating comma.) | ||
| 66 | |||
| 67 | For example, if you wish to debug early in kernel startup code, you | ||
| 68 | might specify the halt option: | ||
| 69 | |||
| 70 | kgdb=halt | ||
| 71 | |||
| 72 | Boot the TARGET machine, which will appear to hang. | ||
| 73 | |||
| 74 | On your DEVELOPMENT machine, cd to the source directory and run the gdb | ||
| 75 | program. (This is likely to be a cross GDB which runs on your host but | ||
| 76 | is built for an SH target.) If everything is working correctly you | ||
| 77 | should see gdb print out a few lines indicating that a breakpoint has | ||
| 78 | been taken. It will actually show a line of code in the target kernel | ||
| 79 | inside the gdbstub activation code. | ||
| 80 | |||
| 81 | NOTE: BE SURE TO TERMINATE OR SUSPEND any other host application which | ||
| 82 | may be using the same serial port (for example, a terminal emulator you | ||
| 83 | have been using to connect to the target boot code.) Otherwise, data | ||
| 84 | from the target may not all get to GDB! | ||
| 85 | |||
| 86 | You can now use whatever gdb commands you like to set breakpoints. | ||
| 87 | Enter "continue" to start your target machine executing again. At this | ||
| 88 | point the target system will run at full speed until it encounters | ||
| 89 | your breakpoint or gets a segment violation in the kernel, or whatever. | ||
| 90 | |||
| 91 | Serial Ports: KGDB, Console | ||
| 92 | ============================ | ||
| 93 | |||
| 94 | This version of KGDB may not gracefully handle conflict with other | ||
| 95 | drivers in the kernel using the same port. If KGDB is configured on the | ||
| 96 | same port (and with the same parameters) as the kernel console, or if | ||
| 97 | CONFIG_SH_KGDB_CONSOLE is configured, things should be fine (though in | ||
| 98 | some cases console messages may appear twice through GDB). But if the | ||
| 99 | KGDB port is not the kernel console and used by another serial driver | ||
| 100 | which assumes different serial parameters (e.g. baud rate) KGDB may not | ||
| 101 | recover. | ||
| 102 | |||
| 103 | Also, when KGDB is entered via sysrq-g (requires CONFIG_KGDB_SYSRQ) and | ||
| 104 | the kgdb port uses the same port as the console, detaching GDB will not | ||
| 105 | restore the console to working order without the port being re-opened. | ||
| 106 | |||
| 107 | Another serious consequence of this is that GDB currently CANNOT break | ||
| 108 | into KGDB externally (e.g. via ^C or <BREAK>); unless a breakpoint or | ||
| 109 | error is encountered, the only way to enter KGDB after the initial halt | ||
| 110 | (see above) is via NMI (CONFIG_KGDB_NMI) or sysrq-g (CONFIG_KGDB_SYSRQ). | ||
| 111 | |||
| 112 | Code is included for the basic Hitachi Solution Engine boards to allow | ||
| 113 | the use of ttyS0 for KGDB if desired; this is less robust, but may be | ||
| 114 | useful in some cases. (This cannot be selected using the config file, | ||
| 115 | but only through the kernel command line, e.g. "kgdb=ttyS0", though the | ||
| 116 | configured defaults for baud rate etc. still apply if not overridden.) | ||
| 117 | |||
| 118 | If gdbstub Does Not Work | ||
| 119 | ======================== | ||
| 120 | |||
| 121 | If it doesn't work, you will have to troubleshoot it. Do the easy | ||
| 122 | things first like double checking your cabling and data rates. You | ||
| 123 | might try some non-kernel based programs to see if the back-to-back | ||
| 124 | connection works properly. Just something simple like cat /etc/hosts | ||
| 125 | /dev/ttyS0 on one machine and cat /dev/ttyS0 on the other will tell you | ||
| 126 | if you can send data from one machine to the other. There is no point | ||
| 127 | in tearing out your hair in the kernel if the line doesn't work. | ||
| 128 | |||
| 129 | If you need to debug the GDB/KGDB communication itself, the gdb commands | ||
| 130 | "set debug remote 1" and "set debug serial 1" may be useful, but be | ||
| 131 | warned: they produce a lot of output. | ||
| 132 | |||
| 133 | Threads | ||
| 134 | ======= | ||
| 135 | |||
| 136 | Each process in a target machine is seen as a gdb thread. gdb thread related | ||
| 137 | commands (info threads, thread n) can be used. CONFIG_KGDB_THREAD must | ||
| 138 | be defined for this to work. | ||
| 139 | |||
| 140 | In this version, kgdb reports PID_MAX (32768) as the process ID for the | ||
| 141 | idle process (pid 0), since GDB does not accept 0 as an ID. | ||
| 142 | |||
| 143 | Detaching (exiting KGDB) | ||
| 144 | ========================= | ||
| 145 | |||
| 146 | There are two ways to resume full-speed target execution: "continue" and | ||
| 147 | "detach". With "continue", GDB inserts any specified breakpoints in the | ||
| 148 | target code and resumes execution; the target is still in "gdb mode". | ||
| 149 | If a breakpoint or other debug event (e.g. NMI) happens, the target | ||
| 150 | halts and communicates with GDB again, which is waiting for it. | ||
| 151 | |||
| 152 | With "detach", GDB does *not* insert any breakpoints; target execution | ||
| 153 | is resumed and GDB stops communicating (does not wait for the target). | ||
| 154 | In this case, the target is no longer in "gdb mode" -- for example, | ||
| 155 | console messages no longer get sent separately to the KGDB port, or | ||
| 156 | encapsulated for GDB. If a debug event (e.g. NMI) occurs, the target | ||
| 157 | will re-enter "gdb mode" and will display this fact on the console; you | ||
| 158 | must give a new "target remote" command to gdb. | ||
| 159 | |||
| 160 | NOTE: TO AVOID LOSSING CONSOLE MESSAGES IN CASE THE KERNEL CONSOLE AND | ||
| 161 | KGDB USING THE SAME PORT, THE TARGET WAITS FOR ANY INPUT CHARACTER ON | ||
| 162 | THE KGDB PORT AFTER A DETACH COMMAND. For example, after the detach you | ||
| 163 | could start a terminal emulator on the same host port and enter a <cr>; | ||
| 164 | however, this program must then be terminated or suspended in order to | ||
| 165 | use GBD again if KGDB is re-entered. | ||
| 166 | |||
| 167 | |||
| 168 | Acknowledgements | ||
| 169 | ================ | ||
| 170 | |||
| 171 | This code was mostly generated by Henry Bell <henry.bell@st.com>; | ||
| 172 | largely from KGDB by Amit S. Kale <akale@veritas.com> - extracts from | ||
| 173 | code by Glenn Engel, Jim Kingdon, David Grothe <dave@gcom.com>, Tigran | ||
| 174 | Aivazian <tigran@sco.com>, William Gatliff <bgat@open-widgets.com>, Ben | ||
| 175 | Lee, Steve Chamberlain and Benoit Miller <fulg@iname.com> are also | ||
| 176 | included. | ||
| 177 | |||
| 178 | Jeremy Siegel | ||
| 179 | <jsiegel@mvista.com> | ||
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 5c9cbfc14c4d..f32a5197128d 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig | |||
| @@ -13,6 +13,7 @@ config SUPERH | |||
| 13 | select HAVE_OPROFILE | 13 | select HAVE_OPROFILE |
| 14 | select HAVE_GENERIC_DMA_COHERENT | 14 | select HAVE_GENERIC_DMA_COHERENT |
| 15 | select HAVE_IOREMAP_PROT if MMU | 15 | select HAVE_IOREMAP_PROT if MMU |
| 16 | select HAVE_ARCH_TRACEHOOK | ||
| 16 | help | 17 | help |
| 17 | The SuperH is a RISC processor targeted for use in embedded systems | 18 | The SuperH is a RISC processor targeted for use in embedded systems |
| 18 | and consumer electronics; it was also used in the Sega Dreamcast | 19 | and consumer electronics; it was also used in the Sega Dreamcast |
| @@ -23,8 +24,10 @@ config SUPERH32 | |||
| 23 | def_bool !SUPERH64 | 24 | def_bool !SUPERH64 |
| 24 | select HAVE_KPROBES | 25 | select HAVE_KPROBES |
| 25 | select HAVE_KRETPROBES | 26 | select HAVE_KRETPROBES |
| 26 | select HAVE_ARCH_TRACEHOOK | ||
| 27 | select HAVE_FUNCTION_TRACER | 27 | select HAVE_FUNCTION_TRACER |
| 28 | select HAVE_FTRACE_MCOUNT_RECORD | ||
| 29 | select HAVE_DYNAMIC_FTRACE | ||
| 30 | select HAVE_ARCH_KGDB | ||
| 28 | 31 | ||
| 29 | config SUPERH64 | 32 | config SUPERH64 |
| 30 | def_bool y if CPU_SH5 | 33 | def_bool y if CPU_SH5 |
| @@ -55,8 +58,6 @@ config GENERIC_HARDIRQS | |||
| 55 | 58 | ||
| 56 | config GENERIC_HARDIRQS_NO__DO_IRQ | 59 | config GENERIC_HARDIRQS_NO__DO_IRQ |
| 57 | def_bool y | 60 | def_bool y |
| 58 | depends on SUPERH32 && (!SH_DREAMCAST && !SH_SH4202_MICRODEV && \ | ||
| 59 | !SH_7751_SYSTEMH && !HD64461) | ||
| 60 | 61 | ||
| 61 | config GENERIC_IRQ_PROBE | 62 | config GENERIC_IRQ_PROBE |
| 62 | def_bool y | 63 | def_bool y |
| @@ -85,10 +86,17 @@ config GENERIC_LOCKBREAK | |||
| 85 | 86 | ||
| 86 | config SYS_SUPPORTS_PM | 87 | config SYS_SUPPORTS_PM |
| 87 | bool | 88 | bool |
| 89 | depends on !SMP | ||
| 90 | |||
| 91 | config ARCH_SUSPEND_POSSIBLE | ||
| 92 | def_bool n | ||
| 93 | |||
| 94 | config ARCH_HIBERNATION_POSSIBLE | ||
| 95 | def_bool n | ||
| 88 | 96 | ||
| 89 | config SYS_SUPPORTS_APM_EMULATION | 97 | config SYS_SUPPORTS_APM_EMULATION |
| 90 | bool | 98 | bool |
| 91 | select SYS_SUPPORTS_PM | 99 | select ARCH_SUSPEND_POSSIBLE |
| 92 | 100 | ||
| 93 | config SYS_SUPPORTS_SMP | 101 | config SYS_SUPPORTS_SMP |
| 94 | bool | 102 | bool |
| @@ -183,6 +191,11 @@ config CPU_SUBTYPE_SH7619 | |||
| 183 | 191 | ||
| 184 | # SH-2A Processor Support | 192 | # SH-2A Processor Support |
| 185 | 193 | ||
| 194 | config CPU_SUBTYPE_SH7201 | ||
| 195 | bool "Support SH7201 processor" | ||
| 196 | select CPU_SH2A | ||
| 197 | select CPU_HAS_FPU | ||
| 198 | |||
| 186 | config CPU_SUBTYPE_SH7203 | 199 | config CPU_SUBTYPE_SH7203 |
| 187 | bool "Support SH7203 processor" | 200 | bool "Support SH7203 processor" |
| 188 | select CPU_SH2A | 201 | select CPU_SH2A |
| @@ -456,8 +469,12 @@ config SH_CPU_FREQ | |||
| 456 | depends on CPU_FREQ | 469 | depends on CPU_FREQ |
| 457 | select CPU_FREQ_TABLE | 470 | select CPU_FREQ_TABLE |
| 458 | help | 471 | help |
| 459 | This adds the cpufreq driver for SuperH. At present, only | 472 | This adds the cpufreq driver for SuperH. Any CPU that supports |
| 460 | the SH-4 is supported. | 473 | clock rate rounding through the clock framework can use this |
| 474 | driver. While it will make the kernel slightly larger, this is | ||
| 475 | harmless for CPUs that don't support rate rounding. The driver | ||
| 476 | will also generate a notice in the boot log before disabling | ||
| 477 | itself if the CPU in question is not capable of rate rounding. | ||
| 461 | 478 | ||
| 462 | For details, take a look at <file:Documentation/cpu-freq>. | 479 | For details, take a look at <file:Documentation/cpu-freq>. |
| 463 | 480 | ||
| @@ -469,9 +486,6 @@ source "arch/sh/drivers/Kconfig" | |||
| 469 | 486 | ||
| 470 | endmenu | 487 | endmenu |
| 471 | 488 | ||
| 472 | config ISA_DMA_API | ||
| 473 | bool | ||
| 474 | |||
| 475 | menu "Kernel features" | 489 | menu "Kernel features" |
| 476 | 490 | ||
| 477 | source kernel/Kconfig.hz | 491 | source kernel/Kconfig.hz |
| @@ -688,49 +702,6 @@ config MAPLE | |||
| 688 | Dreamcast with a serial line terminal or a remote network | 702 | Dreamcast with a serial line terminal or a remote network |
| 689 | connection. | 703 | connection. |
| 690 | 704 | ||
| 691 | config CF_ENABLER | ||
| 692 | bool "Compact Flash Enabler support" | ||
| 693 | depends on SOLUTION_ENGINE || SH_SH03 | ||
| 694 | ---help--- | ||
| 695 | Compact Flash is a small, removable mass storage device introduced | ||
| 696 | in 1994 originally as a PCMCIA device. If you say `Y' here, you | ||
| 697 | compile in support for Compact Flash devices directly connected to | ||
| 698 | a SuperH processor. A Compact Flash FAQ is available at | ||
| 699 | <http://www.compactflash.org/faqs/faq.htm>. | ||
| 700 | |||
| 701 | If your board has "Directly Connected" CompactFlash at area 5 or 6, | ||
| 702 | you may want to enable this option. Then, you can use CF as | ||
| 703 | primary IDE drive (only tested for SanDisk). | ||
| 704 | |||
| 705 | If in doubt, select 'N'. | ||
| 706 | |||
| 707 | choice | ||
| 708 | prompt "Compact Flash Connection Area" | ||
| 709 | depends on CF_ENABLER | ||
| 710 | default CF_AREA6 | ||
| 711 | |||
| 712 | config CF_AREA5 | ||
| 713 | bool "Area5" | ||
| 714 | help | ||
| 715 | If your board has "Directly Connected" CompactFlash, You should | ||
| 716 | select the area where your CF is connected to. | ||
| 717 | |||
| 718 | - "Area5" if CompactFlash is connected to Area 5 (0x14000000) | ||
| 719 | - "Area6" if it is connected to Area 6 (0x18000000) | ||
| 720 | |||
| 721 | "Area6" will work for most boards. | ||
| 722 | |||
| 723 | config CF_AREA6 | ||
| 724 | bool "Area6" | ||
| 725 | |||
| 726 | endchoice | ||
| 727 | |||
| 728 | config CF_BASE_ADDR | ||
| 729 | hex | ||
| 730 | depends on CF_ENABLER | ||
| 731 | default "0xb8000000" if CF_AREA6 | ||
| 732 | default "0xb4000000" if CF_AREA5 | ||
| 733 | |||
| 734 | source "arch/sh/drivers/pci/Kconfig" | 705 | source "arch/sh/drivers/pci/Kconfig" |
| 735 | 706 | ||
| 736 | source "drivers/pci/Kconfig" | 707 | source "drivers/pci/Kconfig" |
| @@ -748,13 +719,11 @@ source "fs/Kconfig.binfmt" | |||
| 748 | endmenu | 719 | endmenu |
| 749 | 720 | ||
| 750 | menu "Power management options (EXPERIMENTAL)" | 721 | menu "Power management options (EXPERIMENTAL)" |
| 751 | depends on EXPERIMENTAL && SYS_SUPPORTS_PM | 722 | depends on EXPERIMENTAL |
| 752 | 723 | ||
| 753 | config ARCH_SUSPEND_POSSIBLE | 724 | source "kernel/power/Kconfig" |
| 754 | def_bool y | ||
| 755 | depends on !SMP | ||
| 756 | 725 | ||
| 757 | source kernel/power/Kconfig | 726 | source "drivers/cpuidle/Kconfig" |
| 758 | 727 | ||
| 759 | endmenu | 728 | endmenu |
| 760 | 729 | ||
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug index e6d2c8b11abd..0d62681f72a0 100644 --- a/arch/sh/Kconfig.debug +++ b/arch/sh/Kconfig.debug | |||
| @@ -98,18 +98,29 @@ config IRQSTACKS | |||
| 98 | for handling hard and soft interrupts. This can help avoid | 98 | for handling hard and soft interrupts. This can help avoid |
| 99 | overflowing the process kernel stacks. | 99 | overflowing the process kernel stacks. |
| 100 | 100 | ||
| 101 | config SH_KGDB | 101 | config DUMP_CODE |
| 102 | bool "Include KGDB kernel debugger" | 102 | bool "Show disassembly of nearby code in register dumps" |
| 103 | select FRAME_POINTER | 103 | depends on DEBUG_KERNEL && SUPERH32 |
| 104 | select DEBUG_INFO | 104 | default y if DEBUG_BUGVERBOSE |
| 105 | depends on CPU_SH3 || CPU_SH4 | 105 | default n |
| 106 | help | ||
| 107 | This prints out a code trace of the instructions leading up to | ||
| 108 | the faulting instruction as a debugging aid. As this does grow | ||
| 109 | the kernel in size a bit, most users will want to say N here. | ||
| 110 | |||
| 111 | Those looking for more verbose debugging output should say Y. | ||
| 112 | |||
| 113 | config SH_NO_BSS_INIT | ||
| 114 | bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)" | ||
| 115 | depends on DEBUG_KERNEL | ||
| 116 | default n | ||
| 106 | help | 117 | help |
| 107 | Include in-kernel hooks for kgdb, the Linux kernel source level | 118 | If running in painfully slow environments, such as an RTL |
| 108 | debugger. See <http://kgdb.sourceforge.net/> for more information. | 119 | simulation or from remote memory via SHdebug, where the memory |
| 109 | Unless you are intending to debug the kernel, say N here. | 120 | can already be gauranteed to ber zeroed on boot, say Y. |
| 110 | 121 | ||
| 111 | menu "KGDB configuration options" | 122 | For all other cases, say N. If this option seems perplexing, or |
| 112 | depends on SH_KGDB | 123 | you aren't sure, say N. |
| 113 | 124 | ||
| 114 | config MORE_COMPILE_OPTIONS | 125 | config MORE_COMPILE_OPTIONS |
| 115 | bool "Add any additional compile options" | 126 | bool "Add any additional compile options" |
| @@ -122,85 +133,16 @@ config COMPILE_OPTIONS | |||
| 122 | string "Additional compile arguments" | 133 | string "Additional compile arguments" |
| 123 | depends on MORE_COMPILE_OPTIONS | 134 | depends on MORE_COMPILE_OPTIONS |
| 124 | 135 | ||
| 125 | config KGDB_NMI | ||
| 126 | def_bool n | ||
| 127 | prompt "Enter KGDB on NMI" | ||
| 128 | |||
| 129 | config SH_KGDB_CONSOLE | ||
| 130 | def_bool n | ||
| 131 | prompt "Console messages through GDB" | ||
| 132 | depends on !SERIAL_SH_SCI_CONSOLE && SERIAL_SH_SCI=y | ||
| 133 | select SERIAL_CORE_CONSOLE | ||
| 134 | |||
| 135 | config KGDB_SYSRQ | ||
| 136 | def_bool y | ||
| 137 | prompt "Allow SysRq 'G' to enter KGDB" | ||
| 138 | depends on MAGIC_SYSRQ | ||
| 139 | |||
| 140 | comment "Serial port setup" | ||
| 141 | |||
| 142 | config KGDB_DEFPORT | ||
| 143 | int "Port number (ttySCn)" | ||
| 144 | default "1" | ||
| 145 | |||
| 146 | config KGDB_DEFBAUD | ||
| 147 | int "Baud rate" | ||
| 148 | default "115200" | ||
| 149 | |||
| 150 | choice | ||
| 151 | prompt "Parity" | ||
| 152 | depends on SH_KGDB | ||
| 153 | default KGDB_DEFPARITY_N | ||
| 154 | |||
| 155 | config KGDB_DEFPARITY_N | ||
| 156 | bool "None" | ||
| 157 | |||
| 158 | config KGDB_DEFPARITY_E | ||
| 159 | bool "Even" | ||
| 160 | |||
| 161 | config KGDB_DEFPARITY_O | ||
| 162 | bool "Odd" | ||
| 163 | |||
| 164 | endchoice | ||
| 165 | |||
| 166 | choice | ||
| 167 | prompt "Data bits" | ||
| 168 | depends on SH_KGDB | ||
| 169 | default KGDB_DEFBITS_8 | ||
| 170 | |||
| 171 | config KGDB_DEFBITS_8 | ||
| 172 | bool "8" | ||
| 173 | |||
| 174 | config KGDB_DEFBITS_7 | ||
| 175 | bool "7" | ||
| 176 | |||
| 177 | endchoice | ||
| 178 | |||
| 179 | endmenu | ||
| 180 | |||
| 181 | if SUPERH64 | ||
| 182 | |||
| 183 | config SH64_PROC_ASIDS | ||
| 184 | bool "Debug: report ASIDs through /proc/asids" | ||
| 185 | depends on PROC_FS && MMU | ||
| 186 | |||
| 187 | config SH64_SR_WATCH | 136 | config SH64_SR_WATCH |
| 188 | bool "Debug: set SR.WATCH to enable hardware watchpoints and trace" | 137 | bool "Debug: set SR.WATCH to enable hardware watchpoints and trace" |
| 138 | depends on SUPERH64 | ||
| 189 | 139 | ||
| 190 | config POOR_MANS_STRACE | 140 | config POOR_MANS_STRACE |
| 191 | bool "Debug: enable rudimentary strace facility" | 141 | bool "Debug: enable rudimentary strace facility" |
| 142 | depends on SUPERH64 | ||
| 192 | help | 143 | help |
| 193 | This option allows system calls to be traced to the console. It also | 144 | This option allows system calls to be traced to the console. It also |
| 194 | aids in detecting kernel stack underflow. It is useful for debugging | 145 | aids in detecting kernel stack underflow. It is useful for debugging |
| 195 | early-userland problems (e.g. init incurring fatal exceptions.) | 146 | early-userland problems (e.g. init incurring fatal exceptions.) |
| 196 | 147 | ||
| 197 | config SH_ALPHANUMERIC | ||
| 198 | bool "Enable debug outputs to on-board alphanumeric display" | ||
| 199 | depends on SH_CAYMAN | ||
| 200 | |||
| 201 | config SH_NO_BSS_INIT | ||
| 202 | bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)" | ||
| 203 | |||
| 204 | endif | ||
| 205 | |||
| 206 | endmenu | 148 | endmenu |
diff --git a/arch/sh/Makefile b/arch/sh/Makefile index c43eb0d7fa3b..4067b0d9287b 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile | |||
| @@ -32,6 +32,7 @@ cflags-$(CONFIG_CPU_SH4) := $(call cc-option,-m4,) \ | |||
| 32 | $(call cc-option,-mno-implicit-fp,-m4-nofpu) | 32 | $(call cc-option,-mno-implicit-fp,-m4-nofpu) |
| 33 | cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a,) \ | 33 | cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a,) \ |
| 34 | $(call cc-option,-m4a-nofpu,) | 34 | $(call cc-option,-m4a-nofpu,) |
| 35 | cflags-$(CONFIG_CPU_SH4AL_DSP) += $(call cc-option,-m4al,) | ||
| 35 | cflags-$(CONFIG_CPU_SH5) := $(call cc-option,-m5-32media-nofpu,) | 36 | cflags-$(CONFIG_CPU_SH5) := $(call cc-option,-m5-32media-nofpu,) |
| 36 | 37 | ||
| 37 | ifeq ($(cflags-y),) | 38 | ifeq ($(cflags-y),) |
| @@ -39,22 +40,16 @@ ifeq ($(cflags-y),) | |||
| 39 | # In the case where we are stuck with a compiler that has been uselessly | 40 | # In the case where we are stuck with a compiler that has been uselessly |
| 40 | # restricted to a particular ISA, a favourite default of newer GCCs when | 41 | # restricted to a particular ISA, a favourite default of newer GCCs when |
| 41 | # extensive multilib targets are not provided, ensure we get the best fit | 42 | # extensive multilib targets are not provided, ensure we get the best fit |
| 42 | # regarding FP generation. This is necessary to avoid references to FP | 43 | # regarding FP generation. This is intentionally stupid (albeit many |
| 43 | # variants in libgcc where integer variants exist, which otherwise result | 44 | # orders of magnitude less than GCC's default behaviour), as anything |
| 44 | # in link errors. This is intentionally stupid (albeit many orders of | 45 | # with a large number of multilib targets better have been built |
| 45 | # magnitude less than GCC's default behaviour), as anything with a large | 46 | # correctly for the target in mind. |
| 46 | # number of multilib targets better have been built correctly for | ||
| 47 | # the target in mind. | ||
| 48 | # | 47 | # |
| 49 | cflags-y += $(shell $(CC) $(KBUILD_CFLAGS) -print-multi-lib | \ | 48 | cflags-y += $(shell $(CC) $(KBUILD_CFLAGS) -print-multi-lib | \ |
| 50 | grep nofpu | sed q | sed -e 's/^/-/;s/;.*$$//') | 49 | grep nofpu | sed q | sed -e 's/^/-/;s/;.*$$//') |
| 51 | endif | 50 | # At this point, anything goes. |
| 52 | 51 | isaflags-y := $(call as-option,-Wa$(comma)-isa=any,) | |
| 53 | cflags-$(CONFIG_CPU_BIG_ENDIAN) += -mb | 52 | else |
| 54 | cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -ml | ||
| 55 | |||
| 56 | cflags-y += $(call cc-option,-mno-fdpic) | ||
| 57 | |||
| 58 | # | 53 | # |
| 59 | # -Wa,-isa= tuning implies -Wa,-dsp for the versions of binutils that | 54 | # -Wa,-isa= tuning implies -Wa,-dsp for the versions of binutils that |
| 60 | # support it, while -Wa,-dsp by itself limits the range of usable opcodes | 55 | # support it, while -Wa,-dsp by itself limits the range of usable opcodes |
| @@ -67,7 +62,12 @@ isaflags-y := $(call as-option,-Wa$(comma)-isa=$(isa-y),) | |||
| 67 | 62 | ||
| 68 | isaflags-$(CONFIG_SH_DSP) := \ | 63 | isaflags-$(CONFIG_SH_DSP) := \ |
| 69 | $(call as-option,-Wa$(comma)-isa=$(isa-y),-Wa$(comma)-dsp) | 64 | $(call as-option,-Wa$(comma)-isa=$(isa-y),-Wa$(comma)-dsp) |
| 65 | endif | ||
| 70 | 66 | ||
| 67 | cflags-$(CONFIG_CPU_BIG_ENDIAN) += -mb | ||
| 68 | cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -ml | ||
| 69 | |||
| 70 | cflags-y += $(call cc-option,-mno-fdpic) | ||
| 71 | cflags-y += $(isaflags-y) -ffreestanding | 71 | cflags-y += $(isaflags-y) -ffreestanding |
| 72 | 72 | ||
| 73 | cflags-$(CONFIG_MORE_COMPILE_OPTIONS) += \ | 73 | cflags-$(CONFIG_MORE_COMPILE_OPTIONS) += \ |
| @@ -79,6 +79,9 @@ OBJCOPYFLAGS := -O binary -R .note -R .note.gnu.build-id -R .comment \ | |||
| 79 | # Give the various platforms the opportunity to set default image types | 79 | # Give the various platforms the opportunity to set default image types |
| 80 | defaultimage-$(CONFIG_SUPERH32) := zImage | 80 | defaultimage-$(CONFIG_SUPERH32) := zImage |
| 81 | defaultimage-$(CONFIG_SH_SH7785LCR) := uImage | 81 | defaultimage-$(CONFIG_SH_SH7785LCR) := uImage |
| 82 | defaultimage-$(CONFIG_SH_RSK) := uImage | ||
| 83 | defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE) := vmlinux | ||
| 84 | defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE) := vmlinux | ||
| 82 | 85 | ||
| 83 | # Set some sensible Kbuild defaults | 86 | # Set some sensible Kbuild defaults |
| 84 | KBUILD_DEFCONFIG := shx3_defconfig | 87 | KBUILD_DEFCONFIG := shx3_defconfig |
| @@ -132,6 +135,7 @@ machdir-$(CONFIG_SH_LANDISK) += mach-landisk | |||
| 132 | machdir-$(CONFIG_SH_TITAN) += mach-titan | 135 | machdir-$(CONFIG_SH_TITAN) += mach-titan |
| 133 | machdir-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2 | 136 | machdir-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2 |
| 134 | machdir-$(CONFIG_SH_CAYMAN) += mach-cayman | 137 | machdir-$(CONFIG_SH_CAYMAN) += mach-cayman |
| 138 | machdir-$(CONFIG_SH_RSK) += mach-rsk | ||
| 135 | 139 | ||
| 136 | ifneq ($(machdir-y),) | 140 | ifneq ($(machdir-y),) |
| 137 | core-y += $(addprefix arch/sh/boards/, \ | 141 | core-y += $(addprefix arch/sh/boards/, \ |
| @@ -173,11 +177,8 @@ KBUILD_CFLAGS += -pipe $(cflags-y) | |||
| 173 | KBUILD_CPPFLAGS += $(cflags-y) | 177 | KBUILD_CPPFLAGS += $(cflags-y) |
| 174 | KBUILD_AFLAGS += $(cflags-y) | 178 | KBUILD_AFLAGS += $(cflags-y) |
| 175 | 179 | ||
| 176 | LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) | ||
| 177 | |||
| 178 | libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) | 180 | libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) |
| 179 | libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) | 181 | libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) |
| 180 | libs-y += $(LIBGCC) | ||
| 181 | 182 | ||
| 182 | PHONY += maketools FORCE | 183 | PHONY += maketools FORCE |
| 183 | 184 | ||
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig index 50467f9d0d0b..861914747e4e 100644 --- a/arch/sh/boards/Kconfig +++ b/arch/sh/boards/Kconfig | |||
| @@ -126,10 +126,12 @@ config SH_RTS7751R2D | |||
| 126 | Select RTS7751R2D if configuring for a Renesas Technology | 126 | Select RTS7751R2D if configuring for a Renesas Technology |
| 127 | Sales SH-Graphics board. | 127 | Sales SH-Graphics board. |
| 128 | 128 | ||
| 129 | config SH_RSK7203 | 129 | config SH_RSK |
| 130 | bool "RSK7203" | 130 | bool "Renesas Starter Kit" |
| 131 | select GENERIC_GPIO | 131 | depends on CPU_SUBTYPE_SH7201 || CPU_SUBTYPE_SH7203 |
| 132 | depends on CPU_SUBTYPE_SH7203 | 132 | help |
| 133 | Select this option if configuring for any of the RSK+ MCU | ||
| 134 | evaluation platforms. | ||
| 133 | 135 | ||
| 134 | config SH_SDK7780 | 136 | config SH_SDK7780 |
| 135 | bool "SDK7780R3" | 137 | bool "SDK7780R3" |
| @@ -253,6 +255,7 @@ source "arch/sh/boards/mach-r2d/Kconfig" | |||
| 253 | source "arch/sh/boards/mach-highlander/Kconfig" | 255 | source "arch/sh/boards/mach-highlander/Kconfig" |
| 254 | source "arch/sh/boards/mach-sdk7780/Kconfig" | 256 | source "arch/sh/boards/mach-sdk7780/Kconfig" |
| 255 | source "arch/sh/boards/mach-migor/Kconfig" | 257 | source "arch/sh/boards/mach-migor/Kconfig" |
| 258 | source "arch/sh/boards/mach-rsk/Kconfig" | ||
| 256 | 259 | ||
| 257 | if SH_MAGIC_PANEL_R2 | 260 | if SH_MAGIC_PANEL_R2 |
| 258 | 261 | ||
diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile index d9efa3923721..269ae2be49ef 100644 --- a/arch/sh/boards/Makefile +++ b/arch/sh/boards/Makefile | |||
| @@ -3,7 +3,6 @@ | |||
| 3 | # | 3 | # |
| 4 | obj-$(CONFIG_SH_AP325RXA) += board-ap325rxa.o | 4 | obj-$(CONFIG_SH_AP325RXA) += board-ap325rxa.o |
| 5 | obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o | 5 | obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o |
| 6 | obj-$(CONFIG_SH_RSK7203) += board-rsk7203.o | ||
| 7 | obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o | 6 | obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o |
| 8 | obj-$(CONFIG_SH_SHMIN) += board-shmin.o | 7 | obj-$(CONFIG_SH_SHMIN) += board-shmin.o |
| 9 | obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o | 8 | obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o |
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c index 8881a643ac32..1c67cba6e34f 100644 --- a/arch/sh/boards/board-ap325rxa.c +++ b/arch/sh/boards/board-ap325rxa.c | |||
| @@ -197,6 +197,10 @@ static struct resource lcdc_resources[] = { | |||
| 197 | .end = 0xfe941fff, | 197 | .end = 0xfe941fff, |
| 198 | .flags = IORESOURCE_MEM, | 198 | .flags = IORESOURCE_MEM, |
| 199 | }, | 199 | }, |
| 200 | [1] = { | ||
| 201 | .start = 28, | ||
| 202 | .flags = IORESOURCE_IRQ, | ||
| 203 | }, | ||
| 200 | }; | 204 | }; |
| 201 | 205 | ||
| 202 | static struct platform_device lcdc_device = { | 206 | static struct platform_device lcdc_device = { |
| @@ -303,6 +307,7 @@ static struct resource ceu_resources[] = { | |||
| 303 | 307 | ||
| 304 | static struct platform_device ceu_device = { | 308 | static struct platform_device ceu_device = { |
| 305 | .name = "sh_mobile_ceu", | 309 | .name = "sh_mobile_ceu", |
| 310 | .id = 0, /* "ceu0" clock */ | ||
| 306 | .num_resources = ARRAY_SIZE(ceu_resources), | 311 | .num_resources = ARRAY_SIZE(ceu_resources), |
| 307 | .resource = ceu_resources, | 312 | .resource = ceu_resources, |
| 308 | .dev = { | 313 | .dev = { |
| @@ -344,7 +349,6 @@ static int __init ap325rxa_devices_setup(void) | |||
| 344 | gpio_export(GPIO_PTF7, 0); | 349 | gpio_export(GPIO_PTF7, 0); |
| 345 | 350 | ||
| 346 | /* LCDC */ | 351 | /* LCDC */ |
| 347 | clk_always_enable("mstp200"); | ||
| 348 | gpio_request(GPIO_FN_LCDD15, NULL); | 352 | gpio_request(GPIO_FN_LCDD15, NULL); |
| 349 | gpio_request(GPIO_FN_LCDD14, NULL); | 353 | gpio_request(GPIO_FN_LCDD14, NULL); |
| 350 | gpio_request(GPIO_FN_LCDD13, NULL); | 354 | gpio_request(GPIO_FN_LCDD13, NULL); |
| @@ -375,7 +379,6 @@ static int __init ap325rxa_devices_setup(void) | |||
| 375 | gpio_direction_output(GPIO_PTS3, 1); | 379 | gpio_direction_output(GPIO_PTS3, 1); |
| 376 | 380 | ||
| 377 | /* CEU */ | 381 | /* CEU */ |
| 378 | clk_always_enable("mstp203"); | ||
| 379 | gpio_request(GPIO_FN_VIO_CLK2, NULL); | 382 | gpio_request(GPIO_FN_VIO_CLK2, NULL); |
| 380 | gpio_request(GPIO_FN_VIO_VD2, NULL); | 383 | gpio_request(GPIO_FN_VIO_VD2, NULL); |
| 381 | gpio_request(GPIO_FN_VIO_HD2, NULL); | 384 | gpio_request(GPIO_FN_VIO_HD2, NULL); |
diff --git a/arch/sh/boards/board-shmin.c b/arch/sh/boards/board-shmin.c index 5cc0867de5ab..b1dcbbc89188 100644 --- a/arch/sh/boards/board-shmin.c +++ b/arch/sh/boards/board-shmin.c | |||
| @@ -22,21 +22,13 @@ static void __init init_shmin_irq(void) | |||
| 22 | plat_irq_setup_pins(IRQ_MODE_IRQ); | 22 | plat_irq_setup_pins(IRQ_MODE_IRQ); |
| 23 | } | 23 | } |
| 24 | 24 | ||
| 25 | static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size) | 25 | static void __init shmin_setup(char **cmdline_p) |
| 26 | { | 26 | { |
| 27 | static int dummy; | 27 | __set_io_port_base(SHMIN_IO_BASE); |
| 28 | |||
| 29 | if ((port & ~0x1f) == SHMIN_NE_BASE) | ||
| 30 | return (void __iomem *)(SHMIN_IO_BASE + port); | ||
| 31 | |||
| 32 | dummy = 0; | ||
| 33 | |||
| 34 | return &dummy; | ||
| 35 | |||
| 36 | } | 28 | } |
| 37 | 29 | ||
| 38 | static struct sh_machine_vector mv_shmin __initmv = { | 30 | static struct sh_machine_vector mv_shmin __initmv = { |
| 39 | .mv_name = "SHMIN", | 31 | .mv_name = "SHMIN", |
| 32 | .mv_setup = shmin_setup, | ||
| 40 | .mv_init_irq = init_shmin_irq, | 33 | .mv_init_irq = init_shmin_irq, |
| 41 | .mv_ioport_map = shmin_ioport_map, | ||
| 42 | }; | 34 | }; |
diff --git a/arch/sh/boards/mach-cayman/Makefile b/arch/sh/boards/mach-cayman/Makefile index 489a8f867368..cafe1ac3b29c 100644 --- a/arch/sh/boards/mach-cayman/Makefile +++ b/arch/sh/boards/mach-cayman/Makefile | |||
| @@ -2,4 +2,3 @@ | |||
| 2 | # Makefile for the Hitachi Cayman specific parts of the kernel | 2 | # Makefile for the Hitachi Cayman specific parts of the kernel |
| 3 | # | 3 | # |
| 4 | obj-y := setup.o irq.o | 4 | obj-y := setup.o irq.o |
| 5 | obj-$(CONFIG_HEARTBEAT) += led.o | ||
diff --git a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c index ceb37ae92c70..da62ad516994 100644 --- a/arch/sh/boards/mach-cayman/irq.c +++ b/arch/sh/boards/mach-cayman/irq.c | |||
| @@ -94,31 +94,11 @@ static void ack_cayman_irq(unsigned int irq) | |||
| 94 | disable_cayman_irq(irq); | 94 | disable_cayman_irq(irq); |
| 95 | } | 95 | } |
| 96 | 96 | ||
| 97 | static void end_cayman_irq(unsigned int irq) | 97 | struct irq_chip cayman_irq_type = { |
| 98 | { | 98 | .name = "Cayman-IRQ", |
| 99 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | 99 | .unmask = enable_cayman_irq, |
| 100 | enable_cayman_irq(irq); | 100 | .mask = disable_cayman_irq, |
| 101 | } | 101 | .mask_ack = ack_cayman_irq, |
| 102 | |||
| 103 | static unsigned int startup_cayman_irq(unsigned int irq) | ||
| 104 | { | ||
| 105 | enable_cayman_irq(irq); | ||
| 106 | return 0; /* never anything pending */ | ||
| 107 | } | ||
| 108 | |||
| 109 | static void shutdown_cayman_irq(unsigned int irq) | ||
| 110 | { | ||
| 111 | disable_cayman_irq(irq); | ||
| 112 | } | ||
| 113 | |||
| 114 | struct hw_interrupt_type cayman_irq_type = { | ||
| 115 | .typename = "Cayman-IRQ", | ||
| 116 | .startup = startup_cayman_irq, | ||
| 117 | .shutdown = shutdown_cayman_irq, | ||
| 118 | .enable = enable_cayman_irq, | ||
| 119 | .disable = disable_cayman_irq, | ||
| 120 | .ack = ack_cayman_irq, | ||
| 121 | .end = end_cayman_irq, | ||
| 122 | }; | 102 | }; |
| 123 | 103 | ||
| 124 | int cayman_irq_demux(int evt) | 104 | int cayman_irq_demux(int evt) |
| @@ -187,8 +167,9 @@ void init_cayman_irq(void) | |||
| 187 | return; | 167 | return; |
| 188 | } | 168 | } |
| 189 | 169 | ||
| 190 | for (i=0; i<NR_EXT_IRQS; i++) { | 170 | for (i = 0; i < NR_EXT_IRQS; i++) { |
| 191 | irq_desc[START_EXT_IRQS + i].chip = &cayman_irq_type; | 171 | set_irq_chip_and_handler(START_EXT_IRQS + i, &cayman_irq_type, |
| 172 | handle_level_irq); | ||
| 192 | } | 173 | } |
| 193 | 174 | ||
| 194 | /* Setup the SMSC interrupt */ | 175 | /* Setup the SMSC interrupt */ |
diff --git a/arch/sh/boards/mach-cayman/led.c b/arch/sh/boards/mach-cayman/led.c deleted file mode 100644 index a808eac4ecd6..000000000000 --- a/arch/sh/boards/mach-cayman/led.c +++ /dev/null | |||
| @@ -1,51 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/boards/cayman/led.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com> | ||
| 5 | * | ||
| 6 | * May be copied or modified under the terms of the GNU General Public | ||
| 7 | * License. See linux/COPYING for more information. | ||
| 8 | * | ||
| 9 | * Flash the LEDs | ||
| 10 | */ | ||
| 11 | #include <asm/io.h> | ||
| 12 | |||
| 13 | /* | ||
| 14 | ** It is supposed these functions to be used for a low level | ||
| 15 | ** debugging (via Cayman LEDs), hence to be available as soon | ||
| 16 | ** as possible. | ||
| 17 | ** Unfortunately Cayman LEDs relies on Cayman EPLD to be mapped | ||
| 18 | ** (this happen when IRQ are initialized... quite late). | ||
| 19 | ** These triky dependencies should be removed. Temporary, it | ||
| 20 | ** may be enough to NOP until EPLD is mapped. | ||
| 21 | */ | ||
| 22 | |||
| 23 | extern unsigned long epld_virt; | ||
| 24 | |||
| 25 | #define LED_ADDR (epld_virt + 0x008) | ||
| 26 | #define HDSP2534_ADDR (epld_virt + 0x100) | ||
| 27 | |||
| 28 | void mach_led(int position, int value) | ||
| 29 | { | ||
| 30 | if (!epld_virt) | ||
| 31 | return; | ||
| 32 | |||
| 33 | if (value) | ||
| 34 | ctrl_outl(0, LED_ADDR); | ||
| 35 | else | ||
| 36 | ctrl_outl(1, LED_ADDR); | ||
| 37 | |||
| 38 | } | ||
| 39 | |||
| 40 | void mach_alphanum(int position, unsigned char value) | ||
| 41 | { | ||
| 42 | if (!epld_virt) | ||
| 43 | return; | ||
| 44 | |||
| 45 | ctrl_outb(value, HDSP2534_ADDR + 0xe0 + (position << 2)); | ||
| 46 | } | ||
| 47 | |||
| 48 | void mach_alphanum_brightness(int setting) | ||
| 49 | { | ||
| 50 | ctrl_outb(setting & 7, HDSP2534_ADDR + 0xc0); | ||
| 51 | } | ||
diff --git a/arch/sh/boards/mach-dreamcast/irq.c b/arch/sh/boards/mach-dreamcast/irq.c index 67bdc33dd411..f55fc8e795e9 100644 --- a/arch/sh/boards/mach-dreamcast/irq.c +++ b/arch/sh/boards/mach-dreamcast/irq.c | |||
| @@ -10,106 +10,90 @@ | |||
| 10 | */ | 10 | */ |
| 11 | 11 | ||
| 12 | #include <linux/irq.h> | 12 | #include <linux/irq.h> |
| 13 | #include <asm/io.h> | 13 | #include <linux/io.h> |
| 14 | #include <asm/irq.h> | 14 | #include <asm/irq.h> |
| 15 | #include <mach/sysasic.h> | 15 | #include <mach/sysasic.h> |
| 16 | 16 | ||
| 17 | /* Dreamcast System ASIC Hardware Events - | 17 | /* |
| 18 | 18 | * Dreamcast System ASIC Hardware Events - | |
| 19 | The Dreamcast's System ASIC (a.k.a. Holly) is responsible for receiving | 19 | * |
| 20 | hardware events from system peripherals and triggering an SH7750 IRQ. | 20 | * The Dreamcast's System ASIC (a.k.a. Holly) is responsible for receiving |
| 21 | Hardware events can trigger IRQs 13, 11, or 9 depending on which bits are | 21 | * hardware events from system peripherals and triggering an SH7750 IRQ. |
| 22 | set in the Event Mask Registers (EMRs). When a hardware event is | 22 | * Hardware events can trigger IRQs 13, 11, or 9 depending on which bits are |
| 23 | triggered, it's corresponding bit in the Event Status Registers (ESRs) | 23 | * set in the Event Mask Registers (EMRs). When a hardware event is |
| 24 | is set, and that bit should be rewritten to the ESR to acknowledge that | 24 | * triggered, its corresponding bit in the Event Status Registers (ESRs) |
| 25 | event. | 25 | * is set, and that bit should be rewritten to the ESR to acknowledge that |
| 26 | 26 | * event. | |
| 27 | There are three 32-bit ESRs located at 0xa05f8900 - 0xa05f6908. Event | 27 | * |
| 28 | types can be found in include/asm-sh/dreamcast/sysasic.h. There are three | 28 | * There are three 32-bit ESRs located at 0xa05f6900 - 0xa05f6908. Event |
| 29 | groups of EMRs that parallel the ESRs. Each EMR group corresponds to an | 29 | * types can be found in arch/sh/include/mach-dreamcast/mach/sysasic.h. |
| 30 | IRQ, so 0xa05f6910 - 0xa05f6918 triggers IRQ 13, 0xa05f6920 - 0xa05f6928 | 30 | * There are three groups of EMRs that parallel the ESRs. Each EMR group |
| 31 | triggers IRQ 11, and 0xa05f6930 - 0xa05f6938 triggers IRQ 9. | 31 | * corresponds to an IRQ, so 0xa05f6910 - 0xa05f6918 triggers IRQ 13, |
| 32 | 32 | * 0xa05f6920 - 0xa05f6928 triggers IRQ 11, and 0xa05f6930 - 0xa05f6938 | |
| 33 | In the kernel, these events are mapped to virtual IRQs so that drivers can | 33 | * triggers IRQ 9. |
| 34 | respond to them as they would a normal interrupt. In order to keep this | 34 | * |
| 35 | mapping simple, the events are mapped as: | 35 | * In the kernel, these events are mapped to virtual IRQs so that drivers can |
| 36 | 36 | * respond to them as they would a normal interrupt. In order to keep this | |
| 37 | 6900/6910 - Events 0-31, IRQ 13 | 37 | * mapping simple, the events are mapped as: |
| 38 | 6904/6924 - Events 32-63, IRQ 11 | 38 | * |
| 39 | 6908/6938 - Events 64-95, IRQ 9 | 39 | * 6900/6910 - Events 0-31, IRQ 13 |
| 40 | 40 | * 6904/6924 - Events 32-63, IRQ 11 | |
| 41 | */ | 41 | * 6908/6938 - Events 64-95, IRQ 9 |
| 42 | * | ||
| 43 | */ | ||
| 42 | 44 | ||
| 43 | #define ESR_BASE 0x005f6900 /* Base event status register */ | 45 | #define ESR_BASE 0x005f6900 /* Base event status register */ |
| 44 | #define EMR_BASE 0x005f6910 /* Base event mask register */ | 46 | #define EMR_BASE 0x005f6910 /* Base event mask register */ |
| 45 | 47 | ||
| 46 | /* Helps us determine the EMR group that this event belongs to: 0 = 0x6910, | 48 | /* |
| 47 | 1 = 0x6920, 2 = 0x6930; also determine the event offset */ | 49 | * Helps us determine the EMR group that this event belongs to: 0 = 0x6910, |
| 50 | * 1 = 0x6920, 2 = 0x6930; also determine the event offset. | ||
| 51 | */ | ||
| 48 | #define LEVEL(event) (((event) - HW_EVENT_IRQ_BASE) / 32) | 52 | #define LEVEL(event) (((event) - HW_EVENT_IRQ_BASE) / 32) |
| 49 | 53 | ||
| 50 | /* Return the hardware event's bit positon within the EMR/ESR */ | 54 | /* Return the hardware event's bit positon within the EMR/ESR */ |
| 51 | #define EVENT_BIT(event) (((event) - HW_EVENT_IRQ_BASE) & 31) | 55 | #define EVENT_BIT(event) (((event) - HW_EVENT_IRQ_BASE) & 31) |
| 52 | 56 | ||
| 53 | /* For each of these *_irq routines, the IRQ passed in is the virtual IRQ | 57 | /* |
| 54 | (logically mapped to the corresponding bit for the hardware event). */ | 58 | * For each of these *_irq routines, the IRQ passed in is the virtual IRQ |
| 59 | * (logically mapped to the corresponding bit for the hardware event). | ||
| 60 | */ | ||
| 55 | 61 | ||
| 56 | /* Disable the hardware event by masking its bit in its EMR */ | 62 | /* Disable the hardware event by masking its bit in its EMR */ |
| 57 | static inline void disable_systemasic_irq(unsigned int irq) | 63 | static inline void disable_systemasic_irq(unsigned int irq) |
| 58 | { | 64 | { |
| 59 | __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); | 65 | __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); |
| 60 | __u32 mask; | 66 | __u32 mask; |
| 61 | 67 | ||
| 62 | mask = inl(emr); | 68 | mask = inl(emr); |
| 63 | mask &= ~(1 << EVENT_BIT(irq)); | 69 | mask &= ~(1 << EVENT_BIT(irq)); |
| 64 | outl(mask, emr); | 70 | outl(mask, emr); |
| 65 | } | 71 | } |
| 66 | 72 | ||
| 67 | /* Enable the hardware event by setting its bit in its EMR */ | 73 | /* Enable the hardware event by setting its bit in its EMR */ |
| 68 | static inline void enable_systemasic_irq(unsigned int irq) | 74 | static inline void enable_systemasic_irq(unsigned int irq) |
| 69 | { | 75 | { |
| 70 | __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); | 76 | __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); |
| 71 | __u32 mask; | 77 | __u32 mask; |
| 72 | 78 | ||
| 73 | mask = inl(emr); | 79 | mask = inl(emr); |
| 74 | mask |= (1 << EVENT_BIT(irq)); | 80 | mask |= (1 << EVENT_BIT(irq)); |
| 75 | outl(mask, emr); | 81 | outl(mask, emr); |
| 76 | } | 82 | } |
| 77 | 83 | ||
| 78 | /* Acknowledge a hardware event by writing its bit back to its ESR */ | 84 | /* Acknowledge a hardware event by writing its bit back to its ESR */ |
| 79 | static void ack_systemasic_irq(unsigned int irq) | 85 | static void mask_ack_systemasic_irq(unsigned int irq) |
| 80 | { | ||
| 81 | __u32 esr = ESR_BASE + (LEVEL(irq) << 2); | ||
| 82 | disable_systemasic_irq(irq); | ||
| 83 | outl((1 << EVENT_BIT(irq)), esr); | ||
| 84 | } | ||
| 85 | |||
| 86 | /* After a IRQ has been ack'd and responded to, it needs to be renabled */ | ||
| 87 | static void end_systemasic_irq(unsigned int irq) | ||
| 88 | { | ||
| 89 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | ||
| 90 | enable_systemasic_irq(irq); | ||
| 91 | } | ||
| 92 | |||
| 93 | static unsigned int startup_systemasic_irq(unsigned int irq) | ||
| 94 | { | ||
| 95 | enable_systemasic_irq(irq); | ||
| 96 | |||
| 97 | return 0; | ||
| 98 | } | ||
| 99 | |||
| 100 | static void shutdown_systemasic_irq(unsigned int irq) | ||
| 101 | { | 86 | { |
| 102 | disable_systemasic_irq(irq); | 87 | __u32 esr = ESR_BASE + (LEVEL(irq) << 2); |
| 88 | disable_systemasic_irq(irq); | ||
| 89 | outl((1 << EVENT_BIT(irq)), esr); | ||
| 103 | } | 90 | } |
| 104 | 91 | ||
| 105 | struct hw_interrupt_type systemasic_int = { | 92 | struct irq_chip systemasic_int = { |
| 106 | .typename = "System ASIC", | 93 | .name = "System ASIC", |
| 107 | .startup = startup_systemasic_irq, | 94 | .mask = disable_systemasic_irq, |
| 108 | .shutdown = shutdown_systemasic_irq, | 95 | .mask_ack = mask_ack_systemasic_irq, |
| 109 | .enable = enable_systemasic_irq, | 96 | .unmask = enable_systemasic_irq, |
| 110 | .disable = disable_systemasic_irq, | ||
| 111 | .ack = ack_systemasic_irq, | ||
| 112 | .end = end_systemasic_irq, | ||
| 113 | }; | 97 | }; |
| 114 | 98 | ||
| 115 | /* | 99 | /* |
| @@ -117,37 +101,37 @@ struct hw_interrupt_type systemasic_int = { | |||
| 117 | */ | 101 | */ |
| 118 | int systemasic_irq_demux(int irq) | 102 | int systemasic_irq_demux(int irq) |
| 119 | { | 103 | { |
| 120 | __u32 emr, esr, status, level; | 104 | __u32 emr, esr, status, level; |
| 121 | __u32 j, bit; | 105 | __u32 j, bit; |
| 122 | 106 | ||
| 123 | switch (irq) { | 107 | switch (irq) { |
| 124 | case 13: | 108 | case 13: |
| 125 | level = 0; | 109 | level = 0; |
| 126 | break; | 110 | break; |
| 127 | case 11: | 111 | case 11: |
| 128 | level = 1; | 112 | level = 1; |
| 129 | break; | 113 | break; |
| 130 | case 9: | 114 | case 9: |
| 131 | level = 2; | 115 | level = 2; |
| 132 | break; | 116 | break; |
| 133 | default: | 117 | default: |
| 134 | return irq; | 118 | return irq; |
| 135 | } | 119 | } |
| 136 | emr = EMR_BASE + (level << 4) + (level << 2); | 120 | emr = EMR_BASE + (level << 4) + (level << 2); |
| 137 | esr = ESR_BASE + (level << 2); | 121 | esr = ESR_BASE + (level << 2); |
| 138 | 122 | ||
| 139 | /* Mask the ESR to filter any spurious, unwanted interrupts */ | 123 | /* Mask the ESR to filter any spurious, unwanted interrupts */ |
| 140 | status = inl(esr); | 124 | status = inl(esr); |
| 141 | status &= inl(emr); | 125 | status &= inl(emr); |
| 142 | 126 | ||
| 143 | /* Now scan and find the first set bit as the event to map */ | 127 | /* Now scan and find the first set bit as the event to map */ |
| 144 | for (bit = 1, j = 0; j < 32; bit <<= 1, j++) { | 128 | for (bit = 1, j = 0; j < 32; bit <<= 1, j++) { |
| 145 | if (status & bit) { | 129 | if (status & bit) { |
| 146 | irq = HW_EVENT_IRQ_BASE + j + (level << 5); | 130 | irq = HW_EVENT_IRQ_BASE + j + (level << 5); |
| 147 | return irq; | 131 | return irq; |
| 148 | } | 132 | } |
| 149 | } | 133 | } |
| 150 | 134 | ||
| 151 | /* Not reached */ | 135 | /* Not reached */ |
| 152 | return irq; | 136 | return irq; |
| 153 | } | 137 | } |
diff --git a/arch/sh/boards/mach-dreamcast/setup.c b/arch/sh/boards/mach-dreamcast/setup.c index 7d944fc75e93..d1bee4884cd6 100644 --- a/arch/sh/boards/mach-dreamcast/setup.c +++ b/arch/sh/boards/mach-dreamcast/setup.c | |||
| @@ -28,7 +28,7 @@ | |||
| 28 | #include <asm/machvec.h> | 28 | #include <asm/machvec.h> |
| 29 | #include <mach/sysasic.h> | 29 | #include <mach/sysasic.h> |
| 30 | 30 | ||
| 31 | extern struct hw_interrupt_type systemasic_int; | 31 | extern struct irq_chip systemasic_int; |
| 32 | extern void aica_time_init(void); | 32 | extern void aica_time_init(void); |
| 33 | extern int gapspci_init(void); | 33 | extern int gapspci_init(void); |
| 34 | extern int systemasic_irq_demux(int); | 34 | extern int systemasic_irq_demux(int); |
| @@ -47,7 +47,8 @@ static void __init dreamcast_setup(char **cmdline_p) | |||
| 47 | 47 | ||
| 48 | /* Assign all virtual IRQs to the System ASIC int. handler */ | 48 | /* Assign all virtual IRQs to the System ASIC int. handler */ |
| 49 | for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) | 49 | for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) |
| 50 | irq_desc[i].chip = &systemasic_int; | 50 | set_irq_chip_and_handler(i, &systemasic_int, |
| 51 | handle_level_irq); | ||
| 51 | 52 | ||
| 52 | board_time_init = aica_time_init; | 53 | board_time_init = aica_time_init; |
| 53 | 54 | ||
diff --git a/arch/sh/boards/mach-edosk7705/Makefile b/arch/sh/boards/mach-edosk7705/Makefile index 14bdd531f116..cd54acb51499 100644 --- a/arch/sh/boards/mach-edosk7705/Makefile +++ b/arch/sh/boards/mach-edosk7705/Makefile | |||
| @@ -3,4 +3,3 @@ | |||
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | obj-y := setup.o io.o | 5 | obj-y := setup.o io.o |
| 6 | |||
diff --git a/arch/sh/boards/mach-edosk7705/io.c b/arch/sh/boards/mach-edosk7705/io.c index 7d153e50a01b..5b9c57c43241 100644 --- a/arch/sh/boards/mach-edosk7705/io.c +++ b/arch/sh/boards/mach-edosk7705/io.c | |||
| @@ -10,28 +10,24 @@ | |||
| 10 | 10 | ||
| 11 | #include <linux/kernel.h> | 11 | #include <linux/kernel.h> |
| 12 | #include <linux/types.h> | 12 | #include <linux/types.h> |
| 13 | #include <asm/io.h> | 13 | #include <linux/io.h> |
| 14 | #include <mach/edosk7705.h> | 14 | #include <mach/edosk7705.h> |
| 15 | #include <asm/addrspace.h> | 15 | #include <asm/addrspace.h> |
| 16 | 16 | ||
| 17 | #define SMC_IOADDR 0xA2000000 | 17 | #define SMC_IOADDR 0xA2000000 |
| 18 | 18 | ||
| 19 | #define maybebadio(name,port) \ | ||
| 20 | printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \ | ||
| 21 | #name, (port), (__u32) __builtin_return_address(0)) | ||
| 22 | |||
| 23 | /* Map the Ethernet addresses as if it is at 0x300 - 0x320 */ | 19 | /* Map the Ethernet addresses as if it is at 0x300 - 0x320 */ |
| 24 | unsigned long sh_edosk7705_isa_port2addr(unsigned long port) | 20 | static unsigned long sh_edosk7705_isa_port2addr(unsigned long port) |
| 25 | { | 21 | { |
| 26 | if (port >= 0x300 && port < 0x320) { | 22 | /* |
| 27 | /* SMC91C96 registers are 4 byte aligned rather than the | 23 | * SMC91C96 registers are 4 byte aligned rather than the |
| 28 | * usual 2 byte! | 24 | * usual 2 byte! |
| 29 | */ | 25 | */ |
| 30 | return SMC_IOADDR + ( (port - 0x300) * 2); | 26 | if (port >= 0x300 && port < 0x320) |
| 31 | } | 27 | return SMC_IOADDR + ((port - 0x300) * 2); |
| 32 | 28 | ||
| 33 | maybebadio(sh_edosk7705_isa_port2addr, port); | 29 | maybebadio(port); |
| 34 | return port; | 30 | return port; |
| 35 | } | 31 | } |
| 36 | 32 | ||
| 37 | /* Trying to read / write bytes on odd-byte boundaries to the Ethernet | 33 | /* Trying to read / write bytes on odd-byte boundaries to the Ethernet |
| @@ -42,53 +38,34 @@ unsigned long sh_edosk7705_isa_port2addr(unsigned long port) | |||
| 42 | */ | 38 | */ |
| 43 | unsigned char sh_edosk7705_inb(unsigned long port) | 39 | unsigned char sh_edosk7705_inb(unsigned long port) |
| 44 | { | 40 | { |
| 45 | if (port >= 0x300 && port < 0x320 && port & 0x01) { | 41 | if (port >= 0x300 && port < 0x320 && port & 0x01) |
| 46 | return (volatile unsigned char)(generic_inw(port -1) >> 8); | 42 | return __raw_readw(port - 1) >> 8; |
| 47 | } | ||
| 48 | return *(volatile unsigned char *)sh_edosk7705_isa_port2addr(port); | ||
| 49 | } | ||
| 50 | 43 | ||
| 51 | unsigned int sh_edosk7705_inl(unsigned long port) | 44 | return __raw_readb(sh_edosk7705_isa_port2addr(port)); |
| 52 | { | ||
| 53 | return *(volatile unsigned long *)port; | ||
| 54 | } | 45 | } |
| 55 | 46 | ||
| 56 | void sh_edosk7705_outb(unsigned char value, unsigned long port) | 47 | void sh_edosk7705_outb(unsigned char value, unsigned long port) |
| 57 | { | 48 | { |
| 58 | if (port >= 0x300 && port < 0x320 && port & 0x01) { | 49 | if (port >= 0x300 && port < 0x320 && port & 0x01) { |
| 59 | generic_outw(((unsigned short)value << 8), port -1); | 50 | __raw_writew(((unsigned short)value << 8), port - 1); |
| 60 | return; | 51 | return; |
| 61 | } | 52 | } |
| 62 | *(volatile unsigned char *)sh_edosk7705_isa_port2addr(port) = value; | ||
| 63 | } | ||
| 64 | 53 | ||
| 65 | void sh_edosk7705_outl(unsigned int value, unsigned long port) | 54 | __raw_writeb(value, sh_edosk7705_isa_port2addr(port)); |
| 66 | { | ||
| 67 | *(volatile unsigned long *)port = value; | ||
| 68 | } | 55 | } |
| 69 | 56 | ||
| 70 | void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count) | 57 | void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count) |
| 71 | { | 58 | { |
| 72 | unsigned char *p = addr; | 59 | unsigned char *p = addr; |
| 73 | while (count--) *p++ = sh_edosk7705_inb(port); | ||
| 74 | } | ||
| 75 | 60 | ||
| 76 | void sh_edosk7705_insl(unsigned long port, void *addr, unsigned long count) | ||
| 77 | { | ||
| 78 | unsigned long *p = (unsigned long*)addr; | ||
| 79 | while (count--) | 61 | while (count--) |
| 80 | *p++ = *(volatile unsigned long *)port; | 62 | *p++ = sh_edosk7705_inb(port); |
| 81 | } | 63 | } |
| 82 | 64 | ||
| 83 | void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count) | 65 | void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count) |
| 84 | { | 66 | { |
| 85 | unsigned char *p = (unsigned char*)addr; | 67 | unsigned char *p = (unsigned char *)addr; |
| 86 | while (count--) sh_edosk7705_outb(*p++, port); | ||
| 87 | } | ||
| 88 | 68 | ||
| 89 | void sh_edosk7705_outsl(unsigned long port, const void *addr, unsigned long count) | 69 | while (count--) |
| 90 | { | 70 | sh_edosk7705_outb(*p++, port); |
| 91 | unsigned long *p = (unsigned long*)addr; | ||
| 92 | while (count--) sh_edosk7705_outl(*p++, port); | ||
| 93 | } | 71 | } |
| 94 | |||
diff --git a/arch/sh/boards/mach-edosk7705/setup.c b/arch/sh/boards/mach-edosk7705/setup.c index ab3f47bffdf3..d59225e26fb9 100644 --- a/arch/sh/boards/mach-edosk7705/setup.c +++ b/arch/sh/boards/mach-edosk7705/setup.c | |||
| @@ -9,6 +9,7 @@ | |||
| 9 | * board by S. Dunn, 2003. | 9 | * board by S. Dunn, 2003. |
| 10 | */ | 10 | */ |
| 11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
| 12 | #include <linux/irq.h> | ||
| 12 | #include <asm/machvec.h> | 13 | #include <asm/machvec.h> |
| 13 | #include <mach/edosk7705.h> | 14 | #include <mach/edosk7705.h> |
| 14 | 15 | ||
| @@ -26,18 +27,10 @@ static struct sh_machine_vector mv_edosk7705 __initmv = { | |||
| 26 | .mv_nr_irqs = 80, | 27 | .mv_nr_irqs = 80, |
| 27 | 28 | ||
| 28 | .mv_inb = sh_edosk7705_inb, | 29 | .mv_inb = sh_edosk7705_inb, |
| 29 | .mv_inl = sh_edosk7705_inl, | ||
| 30 | .mv_outb = sh_edosk7705_outb, | 30 | .mv_outb = sh_edosk7705_outb, |
| 31 | .mv_outl = sh_edosk7705_outl, | ||
| 32 | |||
| 33 | .mv_inl_p = sh_edosk7705_inl, | ||
| 34 | .mv_outl_p = sh_edosk7705_outl, | ||
| 35 | 31 | ||
| 36 | .mv_insb = sh_edosk7705_insb, | 32 | .mv_insb = sh_edosk7705_insb, |
| 37 | .mv_insl = sh_edosk7705_insl, | ||
| 38 | .mv_outsb = sh_edosk7705_outsb, | 33 | .mv_outsb = sh_edosk7705_outsb, |
| 39 | .mv_outsl = sh_edosk7705_outsl, | ||
| 40 | 34 | ||
| 41 | .mv_isa_port2addr = sh_edosk7705_isa_port2addr, | ||
| 42 | .mv_init_irq = sh_edosk7705_init_irq, | 35 | .mv_init_irq = sh_edosk7705_init_irq, |
| 43 | }; | 36 | }; |
diff --git a/arch/sh/boards/mach-hp6xx/pm.c b/arch/sh/boards/mach-hp6xx/pm.c index 64af1f2eef05..d936c1af7620 100644 --- a/arch/sh/boards/mach-hp6xx/pm.c +++ b/arch/sh/boards/mach-hp6xx/pm.c | |||
| @@ -10,15 +10,91 @@ | |||
| 10 | #include <linux/suspend.h> | 10 | #include <linux/suspend.h> |
| 11 | #include <linux/errno.h> | 11 | #include <linux/errno.h> |
| 12 | #include <linux/time.h> | 12 | #include <linux/time.h> |
| 13 | #include <linux/delay.h> | ||
| 14 | #include <linux/gfp.h> | ||
| 13 | #include <asm/io.h> | 15 | #include <asm/io.h> |
| 14 | #include <asm/hd64461.h> | 16 | #include <asm/hd64461.h> |
| 15 | #include <mach/hp6xx.h> | 17 | #include <mach/hp6xx.h> |
| 16 | #include <cpu/dac.h> | 18 | #include <cpu/dac.h> |
| 17 | #include <asm/pm.h> | 19 | #include <asm/freq.h> |
| 20 | #include <asm/watchdog.h> | ||
| 21 | |||
| 22 | #define INTR_OFFSET 0x600 | ||
| 18 | 23 | ||
| 19 | #define STBCR 0xffffff82 | 24 | #define STBCR 0xffffff82 |
| 20 | #define STBCR2 0xffffff88 | 25 | #define STBCR2 0xffffff88 |
| 21 | 26 | ||
| 27 | #define STBCR_STBY 0x80 | ||
| 28 | #define STBCR_MSTP2 0x04 | ||
| 29 | |||
| 30 | #define MCR 0xffffff68 | ||
| 31 | #define RTCNT 0xffffff70 | ||
| 32 | |||
| 33 | #define MCR_RMODE 2 | ||
| 34 | #define MCR_RFSH 4 | ||
| 35 | |||
| 36 | extern u8 wakeup_start; | ||
| 37 | extern u8 wakeup_end; | ||
| 38 | |||
| 39 | static void pm_enter(void) | ||
| 40 | { | ||
| 41 | u8 stbcr, csr; | ||
| 42 | u16 frqcr, mcr; | ||
| 43 | u32 vbr_new, vbr_old; | ||
| 44 | |||
| 45 | set_bl_bit(); | ||
| 46 | |||
| 47 | /* set wdt */ | ||
| 48 | csr = sh_wdt_read_csr(); | ||
| 49 | csr &= ~WTCSR_TME; | ||
| 50 | csr |= WTCSR_CKS_4096; | ||
| 51 | sh_wdt_write_csr(csr); | ||
| 52 | csr = sh_wdt_read_csr(); | ||
| 53 | sh_wdt_write_cnt(0); | ||
| 54 | |||
| 55 | /* disable PLL1 */ | ||
| 56 | frqcr = ctrl_inw(FRQCR); | ||
| 57 | frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY); | ||
| 58 | ctrl_outw(frqcr, FRQCR); | ||
| 59 | |||
| 60 | /* enable standby */ | ||
| 61 | stbcr = ctrl_inb(STBCR); | ||
| 62 | ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR); | ||
| 63 | |||
| 64 | /* set self-refresh */ | ||
| 65 | mcr = ctrl_inw(MCR); | ||
| 66 | ctrl_outw(mcr & ~MCR_RFSH, MCR); | ||
| 67 | |||
| 68 | /* set interrupt handler */ | ||
| 69 | asm volatile("stc vbr, %0" : "=r" (vbr_old)); | ||
| 70 | vbr_new = get_zeroed_page(GFP_ATOMIC); | ||
| 71 | udelay(50); | ||
| 72 | memcpy((void*)(vbr_new + INTR_OFFSET), | ||
| 73 | &wakeup_start, &wakeup_end - &wakeup_start); | ||
| 74 | asm volatile("ldc %0, vbr" : : "r" (vbr_new)); | ||
| 75 | |||
| 76 | ctrl_outw(0, RTCNT); | ||
| 77 | ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR); | ||
| 78 | |||
| 79 | cpu_sleep(); | ||
| 80 | |||
| 81 | asm volatile("ldc %0, vbr" : : "r" (vbr_old)); | ||
| 82 | |||
| 83 | free_page(vbr_new); | ||
| 84 | |||
| 85 | /* enable PLL1 */ | ||
| 86 | frqcr = ctrl_inw(FRQCR); | ||
| 87 | frqcr |= FRQCR_PSTBY; | ||
| 88 | ctrl_outw(frqcr, FRQCR); | ||
| 89 | udelay(50); | ||
| 90 | frqcr |= FRQCR_PLLEN; | ||
| 91 | ctrl_outw(frqcr, FRQCR); | ||
| 92 | |||
| 93 | ctrl_outb(stbcr, STBCR); | ||
| 94 | |||
| 95 | clear_bl_bit(); | ||
| 96 | } | ||
| 97 | |||
| 22 | static int hp6x0_pm_enter(suspend_state_t state) | 98 | static int hp6x0_pm_enter(suspend_state_t state) |
| 23 | { | 99 | { |
| 24 | u8 stbcr, stbcr2; | 100 | u8 stbcr, stbcr2; |
diff --git a/arch/sh/boards/mach-microdev/Makefile b/arch/sh/boards/mach-microdev/Makefile index 1387dd6c85eb..4e3588e8806b 100644 --- a/arch/sh/boards/mach-microdev/Makefile +++ b/arch/sh/boards/mach-microdev/Makefile | |||
| @@ -2,7 +2,4 @@ | |||
| 2 | # Makefile for the SuperH MicroDev specific parts of the kernel | 2 | # Makefile for the SuperH MicroDev specific parts of the kernel |
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | obj-y := setup.o irq.o io.o | 5 | obj-y := setup.o irq.o io.o fdc37c93xapm.o |
| 6 | |||
| 7 | obj-$(CONFIG_HEARTBEAT) += led.o | ||
| 8 | |||
diff --git a/arch/sh/boards/mach-microdev/fdc37c93xapm.c b/arch/sh/boards/mach-microdev/fdc37c93xapm.c new file mode 100644 index 000000000000..458a7cf5fb46 --- /dev/null +++ b/arch/sh/boards/mach-microdev/fdc37c93xapm.c | |||
| @@ -0,0 +1,160 @@ | |||
| 1 | /* | ||
| 2 | * | ||
| 3 | * Setup for the SMSC FDC37C93xAPM | ||
| 4 | * | ||
| 5 | * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) | ||
| 6 | * Copyright (C) 2003, 2004 SuperH, Inc. | ||
| 7 | * Copyright (C) 2004, 2005 Paul Mundt | ||
| 8 | * | ||
| 9 | * SuperH SH4-202 MicroDev board support. | ||
| 10 | * | ||
| 11 | * May be copied or modified under the terms of the GNU General Public | ||
| 12 | * License. See linux/COPYING for more information. | ||
| 13 | */ | ||
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/ioport.h> | ||
| 16 | #include <linux/io.h> | ||
| 17 | #include <linux/err.h> | ||
| 18 | #include <mach/microdev.h> | ||
| 19 | |||
| 20 | #define SMSC_CONFIG_PORT_ADDR (0x3F0) | ||
| 21 | #define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR | ||
| 22 | #define SMSC_DATA_PORT_ADDR (SMSC_INDEX_PORT_ADDR + 1) | ||
| 23 | |||
| 24 | #define SMSC_ENTER_CONFIG_KEY 0x55 | ||
| 25 | #define SMSC_EXIT_CONFIG_KEY 0xaa | ||
| 26 | |||
| 27 | #define SMCS_LOGICAL_DEV_INDEX 0x07 /* Logical Device Number */ | ||
| 28 | #define SMSC_DEVICE_ID_INDEX 0x20 /* Device ID */ | ||
| 29 | #define SMSC_DEVICE_REV_INDEX 0x21 /* Device Revision */ | ||
| 30 | #define SMSC_ACTIVATE_INDEX 0x30 /* Activate */ | ||
| 31 | #define SMSC_PRIMARY_BASE_INDEX 0x60 /* Primary Base Address */ | ||
| 32 | #define SMSC_SECONDARY_BASE_INDEX 0x62 /* Secondary Base Address */ | ||
| 33 | #define SMSC_PRIMARY_INT_INDEX 0x70 /* Primary Interrupt Select */ | ||
| 34 | #define SMSC_SECONDARY_INT_INDEX 0x72 /* Secondary Interrupt Select */ | ||
| 35 | #define SMSC_HDCS0_INDEX 0xf0 /* HDCS0 Address Decoder */ | ||
| 36 | #define SMSC_HDCS1_INDEX 0xf1 /* HDCS1 Address Decoder */ | ||
| 37 | |||
| 38 | #define SMSC_IDE1_DEVICE 1 /* IDE #1 logical device */ | ||
| 39 | #define SMSC_IDE2_DEVICE 2 /* IDE #2 logical device */ | ||
| 40 | #define SMSC_PARALLEL_DEVICE 3 /* Parallel Port logical device */ | ||
| 41 | #define SMSC_SERIAL1_DEVICE 4 /* Serial #1 logical device */ | ||
| 42 | #define SMSC_SERIAL2_DEVICE 5 /* Serial #2 logical device */ | ||
| 43 | #define SMSC_KEYBOARD_DEVICE 7 /* Keyboard logical device */ | ||
| 44 | #define SMSC_CONFIG_REGISTERS 8 /* Configuration Registers (Aux I/O) */ | ||
| 45 | |||
| 46 | #define SMSC_READ_INDEXED(index) ({ \ | ||
| 47 | outb((index), SMSC_INDEX_PORT_ADDR); \ | ||
| 48 | inb(SMSC_DATA_PORT_ADDR); }) | ||
| 49 | #define SMSC_WRITE_INDEXED(val, index) ({ \ | ||
| 50 | outb((index), SMSC_INDEX_PORT_ADDR); \ | ||
| 51 | outb((val), SMSC_DATA_PORT_ADDR); }) | ||
| 52 | |||
| 53 | #define IDE1_PRIMARY_BASE 0x01f0 /* Task File Registe base for IDE #1 */ | ||
| 54 | #define IDE1_SECONDARY_BASE 0x03f6 /* Miscellaneous AT registers for IDE #1 */ | ||
| 55 | #define IDE2_PRIMARY_BASE 0x0170 /* Task File Registe base for IDE #2 */ | ||
| 56 | #define IDE2_SECONDARY_BASE 0x0376 /* Miscellaneous AT registers for IDE #2 */ | ||
| 57 | |||
| 58 | #define SERIAL1_PRIMARY_BASE 0x03f8 | ||
| 59 | #define SERIAL2_PRIMARY_BASE 0x02f8 | ||
| 60 | |||
| 61 | #define MSB(x) ( (x) >> 8 ) | ||
| 62 | #define LSB(x) ( (x) & 0xff ) | ||
| 63 | |||
| 64 | /* General-Purpose base address on CPU-board FPGA */ | ||
| 65 | #define MICRODEV_FPGA_GP_BASE 0xa6100000ul | ||
| 66 | |||
| 67 | static int __init smsc_superio_setup(void) | ||
| 68 | { | ||
| 69 | |||
| 70 | unsigned char devid, devrev; | ||
| 71 | |||
| 72 | /* Initially the chip is in run state */ | ||
| 73 | /* Put it into configuration state */ | ||
| 74 | outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); | ||
| 75 | |||
| 76 | /* Read device ID info */ | ||
| 77 | devid = SMSC_READ_INDEXED(SMSC_DEVICE_ID_INDEX); | ||
| 78 | devrev = SMSC_READ_INDEXED(SMSC_DEVICE_REV_INDEX); | ||
| 79 | |||
| 80 | if ((devid == 0x30) && (devrev == 0x01)) | ||
| 81 | printk("SMSC FDC37C93xAPM SuperIO device detected\n"); | ||
| 82 | else | ||
| 83 | return -ENODEV; | ||
| 84 | |||
| 85 | /* Select the keyboard device */ | ||
| 86 | SMSC_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX); | ||
| 87 | /* enable it */ | ||
| 88 | SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); | ||
| 89 | /* enable the interrupts */ | ||
| 90 | SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_KEYBOARD, SMSC_PRIMARY_INT_INDEX); | ||
| 91 | SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_MOUSE, SMSC_SECONDARY_INT_INDEX); | ||
| 92 | |||
| 93 | /* Select the Serial #1 device */ | ||
| 94 | SMSC_WRITE_INDEXED(SMSC_SERIAL1_DEVICE, SMCS_LOGICAL_DEV_INDEX); | ||
| 95 | /* enable it */ | ||
| 96 | SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); | ||
| 97 | /* program with port addresses */ | ||
| 98 | SMSC_WRITE_INDEXED(MSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); | ||
| 99 | SMSC_WRITE_INDEXED(LSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1); | ||
| 100 | SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX); | ||
| 101 | /* enable the interrupts */ | ||
| 102 | SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL1, SMSC_PRIMARY_INT_INDEX); | ||
| 103 | |||
| 104 | /* Select the Serial #2 device */ | ||
| 105 | SMSC_WRITE_INDEXED(SMSC_SERIAL2_DEVICE, SMCS_LOGICAL_DEV_INDEX); | ||
| 106 | /* enable it */ | ||
| 107 | SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); | ||
| 108 | /* program with port addresses */ | ||
| 109 | SMSC_WRITE_INDEXED(MSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); | ||
| 110 | SMSC_WRITE_INDEXED(LSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1); | ||
| 111 | SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX); | ||
| 112 | /* enable the interrupts */ | ||
| 113 | SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL2, SMSC_PRIMARY_INT_INDEX); | ||
| 114 | |||
| 115 | /* Select the IDE#1 device */ | ||
| 116 | SMSC_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX); | ||
| 117 | /* enable it */ | ||
| 118 | SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); | ||
| 119 | /* program with port addresses */ | ||
| 120 | SMSC_WRITE_INDEXED(MSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); | ||
| 121 | SMSC_WRITE_INDEXED(LSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1); | ||
| 122 | SMSC_WRITE_INDEXED(MSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0); | ||
| 123 | SMSC_WRITE_INDEXED(LSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1); | ||
| 124 | SMSC_WRITE_INDEXED(0x0c, SMSC_HDCS0_INDEX); | ||
| 125 | SMSC_WRITE_INDEXED(0x00, SMSC_HDCS1_INDEX); | ||
| 126 | /* select the interrupt */ | ||
| 127 | SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE1, SMSC_PRIMARY_INT_INDEX); | ||
| 128 | |||
| 129 | /* Select the IDE#2 device */ | ||
| 130 | SMSC_WRITE_INDEXED(SMSC_IDE2_DEVICE, SMCS_LOGICAL_DEV_INDEX); | ||
| 131 | /* enable it */ | ||
| 132 | SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); | ||
| 133 | /* program with port addresses */ | ||
| 134 | SMSC_WRITE_INDEXED(MSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); | ||
| 135 | SMSC_WRITE_INDEXED(LSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1); | ||
| 136 | SMSC_WRITE_INDEXED(MSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0); | ||
| 137 | SMSC_WRITE_INDEXED(LSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1); | ||
| 138 | /* select the interrupt */ | ||
| 139 | SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE2, SMSC_PRIMARY_INT_INDEX); | ||
| 140 | |||
| 141 | /* Select the configuration registers */ | ||
| 142 | SMSC_WRITE_INDEXED(SMSC_CONFIG_REGISTERS, SMCS_LOGICAL_DEV_INDEX); | ||
| 143 | /* enable the appropriate GPIO pins for IDE functionality: | ||
| 144 | * bit[0] In/Out 1==input; 0==output | ||
| 145 | * bit[1] Polarity 1==invert; 0==no invert | ||
| 146 | * bit[2] Int Enb #1 1==Enable Combined IRQ #1; 0==disable | ||
| 147 | * bit[3:4] Function Select 00==original; 01==Alternate Function #1 | ||
| 148 | */ | ||
| 149 | SMSC_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */ | ||
| 150 | SMSC_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */ | ||
| 151 | SMSC_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */ | ||
| 152 | SMSC_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */ | ||
| 153 | SMSC_WRITE_INDEXED(0x08, 0xe8); /* GP20 = nIDE2_OE */ | ||
| 154 | |||
| 155 | /* Exit the configuration state */ | ||
| 156 | outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); | ||
| 157 | |||
| 158 | return 0; | ||
| 159 | } | ||
| 160 | device_initcall(smsc_superio_setup); | ||
diff --git a/arch/sh/boards/mach-microdev/irq.c b/arch/sh/boards/mach-microdev/irq.c index 702753cbd28f..b551963579c1 100644 --- a/arch/sh/boards/mach-microdev/irq.c +++ b/arch/sh/boards/mach-microdev/irq.c | |||
| @@ -67,27 +67,13 @@ static const struct { | |||
| 67 | 67 | ||
| 68 | static void enable_microdev_irq(unsigned int irq); | 68 | static void enable_microdev_irq(unsigned int irq); |
| 69 | static void disable_microdev_irq(unsigned int irq); | 69 | static void disable_microdev_irq(unsigned int irq); |
| 70 | |||
| 71 | /* shutdown is same as "disable" */ | ||
| 72 | #define shutdown_microdev_irq disable_microdev_irq | ||
| 73 | |||
| 74 | static void mask_and_ack_microdev(unsigned int); | 70 | static void mask_and_ack_microdev(unsigned int); |
| 75 | static void end_microdev_irq(unsigned int irq); | ||
| 76 | |||
| 77 | static unsigned int startup_microdev_irq(unsigned int irq) | ||
| 78 | { | ||
| 79 | enable_microdev_irq(irq); | ||
| 80 | return 0; /* never anything pending */ | ||
| 81 | } | ||
| 82 | 71 | ||
| 83 | static struct hw_interrupt_type microdev_irq_type = { | 72 | static struct irq_chip microdev_irq_type = { |
| 84 | .typename = "MicroDev-IRQ", | 73 | .name = "MicroDev-IRQ", |
| 85 | .startup = startup_microdev_irq, | 74 | .unmask = enable_microdev_irq, |
| 86 | .shutdown = shutdown_microdev_irq, | 75 | .mask = disable_microdev_irq, |
| 87 | .enable = enable_microdev_irq, | ||
| 88 | .disable = disable_microdev_irq, | ||
| 89 | .ack = mask_and_ack_microdev, | 76 | .ack = mask_and_ack_microdev, |
| 90 | .end = end_microdev_irq | ||
| 91 | }; | 77 | }; |
| 92 | 78 | ||
| 93 | static void disable_microdev_irq(unsigned int irq) | 79 | static void disable_microdev_irq(unsigned int irq) |
| @@ -130,11 +116,11 @@ static void enable_microdev_irq(unsigned int irq) | |||
| 130 | ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG); | 116 | ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG); |
| 131 | } | 117 | } |
| 132 | 118 | ||
| 133 | /* This functions sets the desired irq handler to be a MicroDev type */ | 119 | /* This function sets the desired irq handler to be a MicroDev type */ |
| 134 | static void __init make_microdev_irq(unsigned int irq) | 120 | static void __init make_microdev_irq(unsigned int irq) |
| 135 | { | 121 | { |
| 136 | disable_irq_nosync(irq); | 122 | disable_irq_nosync(irq); |
| 137 | irq_desc[irq].chip = µdev_irq_type; | 123 | set_irq_chip_and_handler(irq, µdev_irq_type, handle_level_irq); |
| 138 | disable_microdev_irq(irq); | 124 | disable_microdev_irq(irq); |
| 139 | } | 125 | } |
| 140 | 126 | ||
| @@ -143,17 +129,11 @@ static void mask_and_ack_microdev(unsigned int irq) | |||
| 143 | disable_microdev_irq(irq); | 129 | disable_microdev_irq(irq); |
| 144 | } | 130 | } |
| 145 | 131 | ||
| 146 | static void end_microdev_irq(unsigned int irq) | ||
| 147 | { | ||
| 148 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | ||
| 149 | enable_microdev_irq(irq); | ||
| 150 | } | ||
| 151 | |||
| 152 | extern void __init init_microdev_irq(void) | 132 | extern void __init init_microdev_irq(void) |
| 153 | { | 133 | { |
| 154 | int i; | 134 | int i; |
| 155 | 135 | ||
| 156 | /* disable interrupts on the FPGA INTC register */ | 136 | /* disable interrupts on the FPGA INTC register */ |
| 157 | ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG); | 137 | ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG); |
| 158 | 138 | ||
| 159 | for (i = 0; i < NUM_EXTERNAL_IRQS; i++) | 139 | for (i = 0; i < NUM_EXTERNAL_IRQS; i++) |
| @@ -179,5 +159,3 @@ extern void microdev_print_fpga_intc_status(void) | |||
| 179 | printk("FPGA_INTPRI[3..0] = %08x:%08x:%08x:%08x\n", *intprid, *intpric, *intprib, *intpria); | 159 | printk("FPGA_INTPRI[3..0] = %08x:%08x:%08x:%08x\n", *intprid, *intpric, *intprib, *intpria); |
| 180 | printk("-------------------------------------------------------------------------------\n"); | 160 | printk("-------------------------------------------------------------------------------\n"); |
| 181 | } | 161 | } |
| 182 | |||
| 183 | |||
diff --git a/arch/sh/boards/mach-microdev/led.c b/arch/sh/boards/mach-microdev/led.c deleted file mode 100644 index 36e54b47a752..000000000000 --- a/arch/sh/boards/mach-microdev/led.c +++ /dev/null | |||
| @@ -1,101 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/sh/boards/superh/microdev/led.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com> | ||
| 5 | * Copyright (C) 2003 Richard Curnow (Richard.Curnow@superh.com) | ||
| 6 | * | ||
| 7 | * May be copied or modified under the terms of the GNU General Public | ||
| 8 | * License. See linux/COPYING for more information. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <asm/io.h> | ||
| 13 | |||
| 14 | #define LED_REGISTER 0xa6104d20 | ||
| 15 | |||
| 16 | static void mach_led_d9(int value) | ||
| 17 | { | ||
| 18 | unsigned long reg; | ||
| 19 | reg = ctrl_inl(LED_REGISTER); | ||
| 20 | reg &= ~1; | ||
| 21 | reg |= (value & 1); | ||
| 22 | ctrl_outl(reg, LED_REGISTER); | ||
| 23 | return; | ||
| 24 | } | ||
| 25 | |||
| 26 | static void mach_led_d10(int value) | ||
| 27 | { | ||
| 28 | unsigned long reg; | ||
| 29 | reg = ctrl_inl(LED_REGISTER); | ||
| 30 | reg &= ~2; | ||
| 31 | reg |= ((value & 1) << 1); | ||
| 32 | ctrl_outl(reg, LED_REGISTER); | ||
| 33 | return; | ||
| 34 | } | ||
| 35 | |||
| 36 | |||
| 37 | #ifdef CONFIG_HEARTBEAT | ||
| 38 | #include <linux/sched.h> | ||
| 39 | |||
| 40 | static unsigned char banner_table[] = { | ||
| 41 | 0x11, 0x01, 0x11, 0x01, 0x11, 0x03, | ||
| 42 | 0x11, 0x01, 0x11, 0x01, 0x13, 0x03, | ||
| 43 | 0x11, 0x01, 0x13, 0x01, 0x13, 0x01, 0x11, 0x03, | ||
| 44 | 0x11, 0x03, | ||
| 45 | 0x11, 0x01, 0x13, 0x01, 0x11, 0x03, | ||
| 46 | 0x11, 0x01, 0x11, 0x01, 0x11, 0x01, 0x11, 0x07, | ||
| 47 | 0x13, 0x01, 0x13, 0x03, | ||
| 48 | 0x11, 0x01, 0x11, 0x03, | ||
| 49 | 0x13, 0x01, 0x11, 0x01, 0x13, 0x01, 0x11, 0x03, | ||
| 50 | 0x11, 0x01, 0x13, 0x01, 0x11, 0x03, | ||
| 51 | 0x13, 0x01, 0x13, 0x01, 0x13, 0x03, | ||
| 52 | 0x13, 0x01, 0x11, 0x01, 0x11, 0x03, | ||
| 53 | 0x11, 0x03, | ||
| 54 | 0x11, 0x01, 0x11, 0x01, 0x11, 0x01, 0x13, 0x07, | ||
| 55 | 0xff | ||
| 56 | }; | ||
| 57 | |||
| 58 | static void banner(void) | ||
| 59 | { | ||
| 60 | static int pos = 0; | ||
| 61 | static int count = 0; | ||
| 62 | |||
| 63 | if (count) { | ||
| 64 | count--; | ||
| 65 | } else { | ||
| 66 | int val = banner_table[pos]; | ||
| 67 | if (val == 0xff) { | ||
| 68 | pos = 0; | ||
| 69 | val = banner_table[pos]; | ||
| 70 | } | ||
| 71 | pos++; | ||
| 72 | mach_led_d10((val >> 4) & 1); | ||
| 73 | count = 10 * (val & 0xf); | ||
| 74 | } | ||
| 75 | } | ||
| 76 | |||
| 77 | /* From heartbeat_harp in the stboards directory */ | ||
| 78 | /* acts like an actual heart beat -- ie thump-thump-pause... */ | ||
| 79 | void microdev_heartbeat(void) | ||
| 80 | { | ||
| 81 | static unsigned cnt = 0, period = 0, dist = 0; | ||
| 82 | |||
| 83 | if (cnt == 0 || cnt == dist) | ||
| 84 | mach_led_d9(1); | ||
| 85 | else if (cnt == 7 || cnt == dist+7) | ||
| 86 | mach_led_d9(0); | ||
| 87 | |||
| 88 | if (++cnt > period) { | ||
| 89 | cnt = 0; | ||
| 90 | /* The hyperbolic function below modifies the heartbeat period | ||
| 91 | * length in dependency of the current (5min) load. It goes | ||
| 92 | * through the points f(0)=126, f(1)=86, f(5)=51, | ||
| 93 | * f(inf)->30. */ | ||
| 94 | period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30; | ||
| 95 | dist = period / 4; | ||
| 96 | } | ||
| 97 | |||
| 98 | banner(); | ||
| 99 | } | ||
| 100 | |||
| 101 | #endif | ||
diff --git a/arch/sh/boards/mach-microdev/setup.c b/arch/sh/boards/mach-microdev/setup.c index a9202fe3cb59..d1df2a4fb9b8 100644 --- a/arch/sh/boards/mach-microdev/setup.c +++ b/arch/sh/boards/mach-microdev/setup.c | |||
| @@ -17,70 +17,12 @@ | |||
| 17 | #include <mach/microdev.h> | 17 | #include <mach/microdev.h> |
| 18 | #include <asm/io.h> | 18 | #include <asm/io.h> |
| 19 | #include <asm/machvec.h> | 19 | #include <asm/machvec.h> |
| 20 | 20 | #include <asm/sizes.h> | |
| 21 | extern void microdev_heartbeat(void); | ||
| 22 | |||
| 23 | |||
| 24 | /****************************************************************************/ | ||
| 25 | |||
| 26 | |||
| 27 | /* | ||
| 28 | * Setup for the SMSC FDC37C93xAPM | ||
| 29 | */ | ||
| 30 | #define SMSC_CONFIG_PORT_ADDR (0x3F0) | ||
| 31 | #define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR | ||
| 32 | #define SMSC_DATA_PORT_ADDR (SMSC_INDEX_PORT_ADDR + 1) | ||
| 33 | |||
| 34 | #define SMSC_ENTER_CONFIG_KEY 0x55 | ||
| 35 | #define SMSC_EXIT_CONFIG_KEY 0xaa | ||
| 36 | |||
| 37 | #define SMCS_LOGICAL_DEV_INDEX 0x07 /* Logical Device Number */ | ||
| 38 | #define SMSC_DEVICE_ID_INDEX 0x20 /* Device ID */ | ||
| 39 | #define SMSC_DEVICE_REV_INDEX 0x21 /* Device Revision */ | ||
| 40 | #define SMSC_ACTIVATE_INDEX 0x30 /* Activate */ | ||
| 41 | #define SMSC_PRIMARY_BASE_INDEX 0x60 /* Primary Base Address */ | ||
| 42 | #define SMSC_SECONDARY_BASE_INDEX 0x62 /* Secondary Base Address */ | ||
| 43 | #define SMSC_PRIMARY_INT_INDEX 0x70 /* Primary Interrupt Select */ | ||
| 44 | #define SMSC_SECONDARY_INT_INDEX 0x72 /* Secondary Interrupt Select */ | ||
| 45 | #define SMSC_HDCS0_INDEX 0xf0 /* HDCS0 Address Decoder */ | ||
| 46 | #define SMSC_HDCS1_INDEX 0xf1 /* HDCS1 Address Decoder */ | ||
| 47 | |||
| 48 | #define SMSC_IDE1_DEVICE 1 /* IDE #1 logical device */ | ||
| 49 | #define SMSC_IDE2_DEVICE 2 /* IDE #2 logical device */ | ||
| 50 | #define SMSC_PARALLEL_DEVICE 3 /* Parallel Port logical device */ | ||
| 51 | #define SMSC_SERIAL1_DEVICE 4 /* Serial #1 logical device */ | ||
| 52 | #define SMSC_SERIAL2_DEVICE 5 /* Serial #2 logical device */ | ||
| 53 | #define SMSC_KEYBOARD_DEVICE 7 /* Keyboard logical device */ | ||
| 54 | #define SMSC_CONFIG_REGISTERS 8 /* Configuration Registers (Aux I/O) */ | ||
| 55 | |||
| 56 | #define SMSC_READ_INDEXED(index) ({ \ | ||
| 57 | outb((index), SMSC_INDEX_PORT_ADDR); \ | ||
| 58 | inb(SMSC_DATA_PORT_ADDR); }) | ||
| 59 | #define SMSC_WRITE_INDEXED(val, index) ({ \ | ||
| 60 | outb((index), SMSC_INDEX_PORT_ADDR); \ | ||
| 61 | outb((val), SMSC_DATA_PORT_ADDR); }) | ||
| 62 | |||
| 63 | #define IDE1_PRIMARY_BASE 0x01f0 /* Task File Registe base for IDE #1 */ | ||
| 64 | #define IDE1_SECONDARY_BASE 0x03f6 /* Miscellaneous AT registers for IDE #1 */ | ||
| 65 | #define IDE2_PRIMARY_BASE 0x0170 /* Task File Registe base for IDE #2 */ | ||
| 66 | #define IDE2_SECONDARY_BASE 0x0376 /* Miscellaneous AT registers for IDE #2 */ | ||
| 67 | |||
| 68 | #define SERIAL1_PRIMARY_BASE 0x03f8 | ||
| 69 | #define SERIAL2_PRIMARY_BASE 0x02f8 | ||
| 70 | |||
| 71 | #define MSB(x) ( (x) >> 8 ) | ||
| 72 | #define LSB(x) ( (x) & 0xff ) | ||
| 73 | |||
| 74 | /* General-Purpose base address on CPU-board FPGA */ | ||
| 75 | #define MICRODEV_FPGA_GP_BASE 0xa6100000ul | ||
| 76 | |||
| 77 | /* assume a Keyboard Controller is present */ | ||
| 78 | int microdev_kbd_controller_present = 1; | ||
| 79 | 21 | ||
| 80 | static struct resource smc91x_resources[] = { | 22 | static struct resource smc91x_resources[] = { |
| 81 | [0] = { | 23 | [0] = { |
| 82 | .start = 0x300, | 24 | .start = 0x300, |
| 83 | .end = 0x300 + 0x0001000 - 1, | 25 | .end = 0x300 + SZ_4K - 1, |
| 84 | .flags = IORESOURCE_MEM, | 26 | .flags = IORESOURCE_MEM, |
| 85 | }, | 27 | }, |
| 86 | [1] = { | 28 | [1] = { |
| @@ -97,7 +39,6 @@ static struct platform_device smc91x_device = { | |||
| 97 | .resource = smc91x_resources, | 39 | .resource = smc91x_resources, |
| 98 | }; | 40 | }; |
| 99 | 41 | ||
| 100 | #ifdef CONFIG_FB_S1D13XXX | ||
| 101 | static struct s1d13xxxfb_regval s1d13806_initregs[] = { | 42 | static struct s1d13xxxfb_regval s1d13806_initregs[] = { |
| 102 | { S1DREG_MISC, 0x00 }, | 43 | { S1DREG_MISC, 0x00 }, |
| 103 | { S1DREG_COM_DISP_MODE, 0x00 }, | 44 | { S1DREG_COM_DISP_MODE, 0x00 }, |
| @@ -216,12 +157,12 @@ static struct s1d13xxxfb_pdata s1d13806_platform_data = { | |||
| 216 | static struct resource s1d13806_resources[] = { | 157 | static struct resource s1d13806_resources[] = { |
| 217 | [0] = { | 158 | [0] = { |
| 218 | .start = 0x07200000, | 159 | .start = 0x07200000, |
| 219 | .end = 0x07200000 + 0x00200000 - 1, | 160 | .end = 0x07200000 + SZ_2M - 1, |
| 220 | .flags = IORESOURCE_MEM, | 161 | .flags = IORESOURCE_MEM, |
| 221 | }, | 162 | }, |
| 222 | [1] = { | 163 | [1] = { |
| 223 | .start = 0x07000000, | 164 | .start = 0x07000000, |
| 224 | .end = 0x07000000 + 0x00200000 - 1, | 165 | .end = 0x07000000 + SZ_2M - 1, |
| 225 | .flags = IORESOURCE_MEM, | 166 | .flags = IORESOURCE_MEM, |
| 226 | }, | 167 | }, |
| 227 | }; | 168 | }; |
| @@ -236,145 +177,24 @@ static struct platform_device s1d13806_device = { | |||
| 236 | .platform_data = &s1d13806_platform_data, | 177 | .platform_data = &s1d13806_platform_data, |
| 237 | }, | 178 | }, |
| 238 | }; | 179 | }; |
| 239 | #endif | ||
| 240 | 180 | ||
| 241 | static struct platform_device *microdev_devices[] __initdata = { | 181 | static struct platform_device *microdev_devices[] __initdata = { |
| 242 | &smc91x_device, | 182 | &smc91x_device, |
| 243 | #ifdef CONFIG_FB_S1D13XXX | ||
| 244 | &s1d13806_device, | 183 | &s1d13806_device, |
| 245 | #endif | ||
| 246 | }; | 184 | }; |
| 247 | 185 | ||
| 248 | static int __init microdev_devices_setup(void) | 186 | static int __init microdev_devices_setup(void) |
| 249 | { | 187 | { |
| 250 | return platform_add_devices(microdev_devices, ARRAY_SIZE(microdev_devices)); | 188 | return platform_add_devices(microdev_devices, ARRAY_SIZE(microdev_devices)); |
| 251 | } | 189 | } |
| 252 | 190 | device_initcall(microdev_devices_setup); | |
| 253 | /* | ||
| 254 | * Setup for the SMSC FDC37C93xAPM | ||
| 255 | */ | ||
| 256 | static int __init smsc_superio_setup(void) | ||
| 257 | { | ||
| 258 | |||
| 259 | unsigned char devid, devrev; | ||
| 260 | |||
| 261 | /* Initially the chip is in run state */ | ||
| 262 | /* Put it into configuration state */ | ||
| 263 | outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); | ||
| 264 | |||
| 265 | /* Read device ID info */ | ||
| 266 | devid = SMSC_READ_INDEXED(SMSC_DEVICE_ID_INDEX); | ||
| 267 | devrev = SMSC_READ_INDEXED(SMSC_DEVICE_REV_INDEX); | ||
| 268 | if ( (devid==0x30) && (devrev==0x01) ) | ||
| 269 | { | ||
| 270 | printk("SMSC FDC37C93xAPM SuperIO device detected\n"); | ||
| 271 | } | ||
| 272 | else | ||
| 273 | { /* not the device identity we expected */ | ||
| 274 | printk("Not detected a SMSC FDC37C93xAPM SuperIO device (devid=0x%02x, rev=0x%02x)\n", | ||
| 275 | devid, devrev); | ||
| 276 | /* inform the keyboard driver that we have no keyboard controller */ | ||
| 277 | microdev_kbd_controller_present = 0; | ||
| 278 | /* little point in doing anything else in this functon */ | ||
| 279 | return 0; | ||
| 280 | } | ||
| 281 | |||
| 282 | /* Select the keyboard device */ | ||
| 283 | SMSC_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX); | ||
| 284 | /* enable it */ | ||
| 285 | SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); | ||
| 286 | /* enable the interrupts */ | ||
| 287 | SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_KEYBOARD, SMSC_PRIMARY_INT_INDEX); | ||
| 288 | SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_MOUSE, SMSC_SECONDARY_INT_INDEX); | ||
| 289 | |||
| 290 | /* Select the Serial #1 device */ | ||
| 291 | SMSC_WRITE_INDEXED(SMSC_SERIAL1_DEVICE, SMCS_LOGICAL_DEV_INDEX); | ||
| 292 | /* enable it */ | ||
| 293 | SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); | ||
| 294 | /* program with port addresses */ | ||
| 295 | SMSC_WRITE_INDEXED(MSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); | ||
| 296 | SMSC_WRITE_INDEXED(LSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1); | ||
| 297 | SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX); | ||
| 298 | /* enable the interrupts */ | ||
| 299 | SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL1, SMSC_PRIMARY_INT_INDEX); | ||
| 300 | |||
| 301 | /* Select the Serial #2 device */ | ||
| 302 | SMSC_WRITE_INDEXED(SMSC_SERIAL2_DEVICE, SMCS_LOGICAL_DEV_INDEX); | ||
| 303 | /* enable it */ | ||
| 304 | SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); | ||
| 305 | /* program with port addresses */ | ||
| 306 | SMSC_WRITE_INDEXED(MSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); | ||
| 307 | SMSC_WRITE_INDEXED(LSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1); | ||
| 308 | SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX); | ||
| 309 | /* enable the interrupts */ | ||
| 310 | SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL2, SMSC_PRIMARY_INT_INDEX); | ||
| 311 | |||
| 312 | /* Select the IDE#1 device */ | ||
| 313 | SMSC_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX); | ||
| 314 | /* enable it */ | ||
| 315 | SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); | ||
| 316 | /* program with port addresses */ | ||
| 317 | SMSC_WRITE_INDEXED(MSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); | ||
| 318 | SMSC_WRITE_INDEXED(LSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1); | ||
| 319 | SMSC_WRITE_INDEXED(MSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0); | ||
| 320 | SMSC_WRITE_INDEXED(LSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1); | ||
| 321 | SMSC_WRITE_INDEXED(0x0c, SMSC_HDCS0_INDEX); | ||
| 322 | SMSC_WRITE_INDEXED(0x00, SMSC_HDCS1_INDEX); | ||
| 323 | /* select the interrupt */ | ||
| 324 | SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE1, SMSC_PRIMARY_INT_INDEX); | ||
| 325 | |||
| 326 | /* Select the IDE#2 device */ | ||
| 327 | SMSC_WRITE_INDEXED(SMSC_IDE2_DEVICE, SMCS_LOGICAL_DEV_INDEX); | ||
| 328 | /* enable it */ | ||
| 329 | SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); | ||
| 330 | /* program with port addresses */ | ||
| 331 | SMSC_WRITE_INDEXED(MSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); | ||
| 332 | SMSC_WRITE_INDEXED(LSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1); | ||
| 333 | SMSC_WRITE_INDEXED(MSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0); | ||
| 334 | SMSC_WRITE_INDEXED(LSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1); | ||
| 335 | /* select the interrupt */ | ||
| 336 | SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE2, SMSC_PRIMARY_INT_INDEX); | ||
| 337 | |||
| 338 | /* Select the configuration registers */ | ||
| 339 | SMSC_WRITE_INDEXED(SMSC_CONFIG_REGISTERS, SMCS_LOGICAL_DEV_INDEX); | ||
| 340 | /* enable the appropriate GPIO pins for IDE functionality: | ||
| 341 | * bit[0] In/Out 1==input; 0==output | ||
| 342 | * bit[1] Polarity 1==invert; 0==no invert | ||
| 343 | * bit[2] Int Enb #1 1==Enable Combined IRQ #1; 0==disable | ||
| 344 | * bit[3:4] Function Select 00==original; 01==Alternate Function #1 | ||
| 345 | */ | ||
| 346 | SMSC_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */ | ||
| 347 | SMSC_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */ | ||
| 348 | SMSC_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */ | ||
| 349 | SMSC_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */ | ||
| 350 | SMSC_WRITE_INDEXED(0x08, 0xe8); /* GP20 = nIDE2_OE */ | ||
| 351 | |||
| 352 | /* Exit the configuration state */ | ||
| 353 | outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); | ||
| 354 | |||
| 355 | return 0; | ||
| 356 | } | ||
| 357 | |||
| 358 | static void __init microdev_setup(char **cmdline_p) | ||
| 359 | { | ||
| 360 | int * const fpgaRevisionRegister = (int*)(MICRODEV_FPGA_GP_BASE + 0x8ul); | ||
| 361 | const int fpgaRevision = *fpgaRevisionRegister; | ||
| 362 | int * const CacheControlRegister = (int*)CCR; | ||
| 363 | |||
| 364 | device_initcall(microdev_devices_setup); | ||
| 365 | device_initcall(smsc_superio_setup); | ||
| 366 | |||
| 367 | printk("SuperH %s board (FPGA rev: 0x%0x, CCR: 0x%0x)\n", | ||
| 368 | get_system_type(), fpgaRevision, *CacheControlRegister); | ||
| 369 | } | ||
| 370 | 191 | ||
| 371 | /* | 192 | /* |
| 372 | * The Machine Vector | 193 | * The Machine Vector |
| 373 | */ | 194 | */ |
| 374 | static struct sh_machine_vector mv_sh4202_microdev __initmv = { | 195 | static struct sh_machine_vector mv_sh4202_microdev __initmv = { |
| 375 | .mv_name = "SH4-202 MicroDev", | 196 | .mv_name = "SH4-202 MicroDev", |
| 376 | .mv_setup = microdev_setup, | 197 | .mv_nr_irqs = 72, |
| 377 | .mv_nr_irqs = 72, /* QQQ need to check this - use the MACRO */ | ||
| 378 | 198 | ||
| 379 | .mv_inb = microdev_inb, | 199 | .mv_inb = microdev_inb, |
| 380 | .mv_inw = microdev_inw, | 200 | .mv_inw = microdev_inw, |
| @@ -398,8 +218,4 @@ static struct sh_machine_vector mv_sh4202_microdev __initmv = { | |||
| 398 | .mv_outsl = microdev_outsl, | 218 | .mv_outsl = microdev_outsl, |
| 399 | 219 | ||
| 400 | .mv_init_irq = init_microdev_irq, | 220 | .mv_init_irq = init_microdev_irq, |
| 401 | |||
| 402 | #ifdef CONFIG_HEARTBEAT | ||
| 403 | .mv_heartbeat = microdev_heartbeat, | ||
| 404 | #endif | ||
| 405 | }; | 221 | }; |
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c index 975281980299..cc1408119c24 100644 --- a/arch/sh/boards/mach-migor/setup.c +++ b/arch/sh/boards/mach-migor/setup.c | |||
| @@ -89,6 +89,7 @@ static struct resource sh_keysc_resources[] = { | |||
| 89 | 89 | ||
| 90 | static struct platform_device sh_keysc_device = { | 90 | static struct platform_device sh_keysc_device = { |
| 91 | .name = "sh_keysc", | 91 | .name = "sh_keysc", |
| 92 | .id = 0, /* "keysc0" clock */ | ||
| 92 | .num_resources = ARRAY_SIZE(sh_keysc_resources), | 93 | .num_resources = ARRAY_SIZE(sh_keysc_resources), |
| 93 | .resource = sh_keysc_resources, | 94 | .resource = sh_keysc_resources, |
| 94 | .dev = { | 95 | .dev = { |
| @@ -261,6 +262,8 @@ static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = { | |||
| 261 | .sys_bus_cfg = { | 262 | .sys_bus_cfg = { |
| 262 | .ldmt2r = 0x06000a09, | 263 | .ldmt2r = 0x06000a09, |
| 263 | .ldmt3r = 0x180e3418, | 264 | .ldmt3r = 0x180e3418, |
| 265 | /* set 1s delay to encourage fsync() */ | ||
| 266 | .deferred_io_msec = 1000, | ||
| 264 | }, | 267 | }, |
| 265 | } | 268 | } |
| 266 | #endif | 269 | #endif |
| @@ -273,6 +276,10 @@ static struct resource migor_lcdc_resources[] = { | |||
| 273 | .end = 0xfe941fff, | 276 | .end = 0xfe941fff, |
| 274 | .flags = IORESOURCE_MEM, | 277 | .flags = IORESOURCE_MEM, |
| 275 | }, | 278 | }, |
| 279 | [1] = { | ||
| 280 | .start = 28, | ||
| 281 | .flags = IORESOURCE_IRQ, | ||
| 282 | }, | ||
| 276 | }; | 283 | }; |
| 277 | 284 | ||
| 278 | static struct platform_device migor_lcdc_device = { | 285 | static struct platform_device migor_lcdc_device = { |
| @@ -300,6 +307,7 @@ static void camera_power_on(void) | |||
| 300 | gpio_set_value(GPIO_PTT3, 0); | 307 | gpio_set_value(GPIO_PTT3, 0); |
| 301 | mdelay(10); | 308 | mdelay(10); |
| 302 | gpio_set_value(GPIO_PTT3, 1); | 309 | gpio_set_value(GPIO_PTT3, 1); |
| 310 | mdelay(10); /* wait to let chip come out of reset */ | ||
| 303 | } | 311 | } |
| 304 | 312 | ||
| 305 | static void camera_power_off(void) | 313 | static void camera_power_off(void) |
| @@ -432,6 +440,7 @@ static struct resource migor_ceu_resources[] = { | |||
| 432 | 440 | ||
| 433 | static struct platform_device migor_ceu_device = { | 441 | static struct platform_device migor_ceu_device = { |
| 434 | .name = "sh_mobile_ceu", | 442 | .name = "sh_mobile_ceu", |
| 443 | .id = 0, /* "ceu0" clock */ | ||
| 435 | .num_resources = ARRAY_SIZE(migor_ceu_resources), | 444 | .num_resources = ARRAY_SIZE(migor_ceu_resources), |
| 436 | .resource = migor_ceu_resources, | 445 | .resource = migor_ceu_resources, |
| 437 | .dev = { | 446 | .dev = { |
| @@ -479,7 +488,6 @@ static int __init migor_devices_setup(void) | |||
| 479 | ctrl_outl(0x00110080, BSC_CS4WCR); | 488 | ctrl_outl(0x00110080, BSC_CS4WCR); |
| 480 | 489 | ||
| 481 | /* KEYSC */ | 490 | /* KEYSC */ |
| 482 | clk_always_enable("mstp214"); /* KEYSC */ | ||
| 483 | gpio_request(GPIO_FN_KEYOUT0, NULL); | 491 | gpio_request(GPIO_FN_KEYOUT0, NULL); |
| 484 | gpio_request(GPIO_FN_KEYOUT1, NULL); | 492 | gpio_request(GPIO_FN_KEYOUT1, NULL); |
| 485 | gpio_request(GPIO_FN_KEYOUT2, NULL); | 493 | gpio_request(GPIO_FN_KEYOUT2, NULL); |
| @@ -501,7 +509,6 @@ static int __init migor_devices_setup(void) | |||
| 501 | gpio_request(GPIO_FN_IRQ6, NULL); | 509 | gpio_request(GPIO_FN_IRQ6, NULL); |
| 502 | 510 | ||
| 503 | /* LCD Panel */ | 511 | /* LCD Panel */ |
| 504 | clk_always_enable("mstp200"); /* LCDC */ | ||
| 505 | #ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */ | 512 | #ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */ |
| 506 | gpio_request(GPIO_FN_LCDD17, NULL); | 513 | gpio_request(GPIO_FN_LCDD17, NULL); |
| 507 | gpio_request(GPIO_FN_LCDD16, NULL); | 514 | gpio_request(GPIO_FN_LCDD16, NULL); |
| @@ -554,7 +561,6 @@ static int __init migor_devices_setup(void) | |||
| 554 | #endif | 561 | #endif |
| 555 | 562 | ||
| 556 | /* CEU */ | 563 | /* CEU */ |
| 557 | clk_always_enable("mstp203"); /* CEU */ | ||
| 558 | gpio_request(GPIO_FN_VIO_CLK2, NULL); | 564 | gpio_request(GPIO_FN_VIO_CLK2, NULL); |
| 559 | gpio_request(GPIO_FN_VIO_VD2, NULL); | 565 | gpio_request(GPIO_FN_VIO_VD2, NULL); |
| 560 | gpio_request(GPIO_FN_VIO_HD2, NULL); | 566 | gpio_request(GPIO_FN_VIO_HD2, NULL); |
| @@ -589,12 +595,3 @@ static int __init migor_devices_setup(void) | |||
| 589 | return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices)); | 595 | return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices)); |
| 590 | } | 596 | } |
| 591 | __initcall(migor_devices_setup); | 597 | __initcall(migor_devices_setup); |
| 592 | |||
| 593 | static void __init migor_setup(char **cmdline_p) | ||
| 594 | { | ||
| 595 | } | ||
| 596 | |||
| 597 | static struct sh_machine_vector mv_migor __initmv = { | ||
| 598 | .mv_name = "Migo-R", | ||
| 599 | .mv_setup = migor_setup, | ||
| 600 | }; | ||
diff --git a/arch/sh/boards/mach-rsk/Kconfig b/arch/sh/boards/mach-rsk/Kconfig new file mode 100644 index 000000000000..bff095dffc02 --- /dev/null +++ b/arch/sh/boards/mach-rsk/Kconfig | |||
| @@ -0,0 +1,18 @@ | |||
| 1 | if SH_RSK | ||
| 2 | |||
| 3 | choice | ||
| 4 | prompt "RSK+ options" | ||
| 5 | default SH_RSK7203 | ||
| 6 | |||
| 7 | config SH_RSK7201 | ||
| 8 | bool "RSK7201" | ||
| 9 | depends on CPU_SUBTYPE_SH7201 | ||
| 10 | |||
| 11 | config SH_RSK7203 | ||
| 12 | bool "RSK7203" | ||
| 13 | select GENERIC_GPIO | ||
| 14 | depends on CPU_SUBTYPE_SH7203 | ||
| 15 | |||
| 16 | endchoice | ||
| 17 | |||
| 18 | endif | ||
diff --git a/arch/sh/boards/mach-rsk/Makefile b/arch/sh/boards/mach-rsk/Makefile new file mode 100644 index 000000000000..498da75ce38b --- /dev/null +++ b/arch/sh/boards/mach-rsk/Makefile | |||
| @@ -0,0 +1,2 @@ | |||
| 1 | obj-y := setup.o | ||
| 2 | obj-$(CONFIG_SH_RSK7203) += devices-rsk7203.o | ||
diff --git a/arch/sh/boards/board-rsk7203.c b/arch/sh/boards/mach-rsk/devices-rsk7203.c index 58266f06134a..73f743b9be8d 100644 --- a/arch/sh/boards/board-rsk7203.c +++ b/arch/sh/boards/mach-rsk/devices-rsk7203.c | |||
| @@ -50,73 +50,6 @@ static struct platform_device smc911x_device = { | |||
| 50 | }, | 50 | }, |
| 51 | }; | 51 | }; |
| 52 | 52 | ||
| 53 | static const char *probes[] = { "cmdlinepart", NULL }; | ||
| 54 | |||
| 55 | static struct mtd_partition *parsed_partitions; | ||
| 56 | |||
| 57 | static struct mtd_partition rsk7203_partitions[] = { | ||
| 58 | { | ||
| 59 | .name = "Bootloader", | ||
| 60 | .offset = 0x00000000, | ||
| 61 | .size = 0x00040000, | ||
| 62 | .mask_flags = MTD_WRITEABLE, | ||
| 63 | }, { | ||
| 64 | .name = "Kernel", | ||
| 65 | .offset = MTDPART_OFS_NXTBLK, | ||
| 66 | .size = 0x001c0000, | ||
| 67 | }, { | ||
| 68 | .name = "Flash_FS", | ||
| 69 | .offset = MTDPART_OFS_NXTBLK, | ||
| 70 | .size = MTDPART_SIZ_FULL, | ||
| 71 | } | ||
| 72 | }; | ||
| 73 | |||
| 74 | static struct physmap_flash_data flash_data = { | ||
| 75 | .width = 2, | ||
| 76 | }; | ||
| 77 | |||
| 78 | static struct resource flash_resource = { | ||
| 79 | .start = 0x20000000, | ||
| 80 | .end = 0x20400000, | ||
| 81 | .flags = IORESOURCE_MEM, | ||
| 82 | }; | ||
| 83 | |||
| 84 | static struct platform_device flash_device = { | ||
| 85 | .name = "physmap-flash", | ||
| 86 | .id = -1, | ||
| 87 | .resource = &flash_resource, | ||
| 88 | .num_resources = 1, | ||
| 89 | .dev = { | ||
| 90 | .platform_data = &flash_data, | ||
| 91 | }, | ||
| 92 | }; | ||
| 93 | |||
| 94 | static struct mtd_info *flash_mtd; | ||
| 95 | |||
| 96 | static struct map_info rsk7203_flash_map = { | ||
| 97 | .name = "RSK+ Flash", | ||
| 98 | .size = 0x400000, | ||
| 99 | .bankwidth = 2, | ||
| 100 | }; | ||
| 101 | |||
| 102 | static void __init set_mtd_partitions(void) | ||
| 103 | { | ||
| 104 | int nr_parts = 0; | ||
| 105 | |||
| 106 | simple_map_init(&rsk7203_flash_map); | ||
| 107 | flash_mtd = do_map_probe("cfi_probe", &rsk7203_flash_map); | ||
| 108 | nr_parts = parse_mtd_partitions(flash_mtd, probes, | ||
| 109 | &parsed_partitions, 0); | ||
| 110 | /* If there is no partition table, used the hard coded table */ | ||
| 111 | if (nr_parts <= 0) { | ||
| 112 | flash_data.parts = rsk7203_partitions; | ||
| 113 | flash_data.nr_parts = ARRAY_SIZE(rsk7203_partitions); | ||
| 114 | } else { | ||
| 115 | flash_data.nr_parts = nr_parts; | ||
| 116 | flash_data.parts = parsed_partitions; | ||
| 117 | } | ||
| 118 | } | ||
| 119 | |||
| 120 | static struct gpio_led rsk7203_gpio_leds[] = { | 53 | static struct gpio_led rsk7203_gpio_leds[] = { |
| 121 | { | 54 | { |
| 122 | .name = "green", | 55 | .name = "green", |
| @@ -155,7 +88,6 @@ static struct platform_device led_device = { | |||
| 155 | 88 | ||
| 156 | static struct platform_device *rsk7203_devices[] __initdata = { | 89 | static struct platform_device *rsk7203_devices[] __initdata = { |
| 157 | &smc911x_device, | 90 | &smc911x_device, |
| 158 | &flash_device, | ||
| 159 | &led_device, | 91 | &led_device, |
| 160 | }; | 92 | }; |
| 161 | 93 | ||
| @@ -165,15 +97,7 @@ static int __init rsk7203_devices_setup(void) | |||
| 165 | gpio_request(GPIO_FN_TXD0, NULL); | 97 | gpio_request(GPIO_FN_TXD0, NULL); |
| 166 | gpio_request(GPIO_FN_RXD0, NULL); | 98 | gpio_request(GPIO_FN_RXD0, NULL); |
| 167 | 99 | ||
| 168 | set_mtd_partitions(); | ||
| 169 | return platform_add_devices(rsk7203_devices, | 100 | return platform_add_devices(rsk7203_devices, |
| 170 | ARRAY_SIZE(rsk7203_devices)); | 101 | ARRAY_SIZE(rsk7203_devices)); |
| 171 | } | 102 | } |
| 172 | device_initcall(rsk7203_devices_setup); | 103 | device_initcall(rsk7203_devices_setup); |
| 173 | |||
| 174 | /* | ||
| 175 | * The Machine Vector | ||
| 176 | */ | ||
| 177 | static struct sh_machine_vector mv_rsk7203 __initmv = { | ||
| 178 | .mv_name = "RSK+7203", | ||
| 179 | }; | ||
diff --git a/arch/sh/boards/mach-rsk/setup.c b/arch/sh/boards/mach-rsk/setup.c new file mode 100644 index 000000000000..af64d030a5c7 --- /dev/null +++ b/arch/sh/boards/mach-rsk/setup.c | |||
| @@ -0,0 +1,106 @@ | |||
| 1 | /* | ||
| 2 | * Renesas Technology Europe RSK+ Support. | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 Paul Mundt | ||
| 5 | * Copyright (C) 2008 Peter Griffin <pgriffin@mpc-data.co.uk> | ||
| 6 | * | ||
| 7 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 8 | * License. See the file "COPYING" in the main directory of this archive | ||
| 9 | * for more details. | ||
| 10 | */ | ||
| 11 | #include <linux/init.h> | ||
| 12 | #include <linux/types.h> | ||
| 13 | #include <linux/platform_device.h> | ||
| 14 | #include <linux/interrupt.h> | ||
| 15 | #include <linux/mtd/mtd.h> | ||
| 16 | #include <linux/mtd/partitions.h> | ||
| 17 | #include <linux/mtd/physmap.h> | ||
| 18 | #include <linux/mtd/map.h> | ||
| 19 | #include <asm/machvec.h> | ||
| 20 | #include <asm/io.h> | ||
| 21 | |||
| 22 | static const char *probes[] = { "cmdlinepart", NULL }; | ||
| 23 | |||
| 24 | static struct mtd_partition *parsed_partitions; | ||
| 25 | |||
| 26 | static struct mtd_partition rsk_partitions[] = { | ||
| 27 | { | ||
| 28 | .name = "Bootloader", | ||
| 29 | .offset = 0x00000000, | ||
| 30 | .size = 0x00040000, | ||
| 31 | .mask_flags = MTD_WRITEABLE, | ||
| 32 | }, { | ||
| 33 | .name = "Kernel", | ||
| 34 | .offset = MTDPART_OFS_NXTBLK, | ||
| 35 | .size = 0x001c0000, | ||
| 36 | }, { | ||
| 37 | .name = "Flash_FS", | ||
| 38 | .offset = MTDPART_OFS_NXTBLK, | ||
| 39 | .size = MTDPART_SIZ_FULL, | ||
| 40 | } | ||
| 41 | }; | ||
| 42 | |||
| 43 | static struct physmap_flash_data flash_data = { | ||
| 44 | .width = 2, | ||
| 45 | }; | ||
| 46 | |||
| 47 | static struct resource flash_resource = { | ||
| 48 | .start = 0x20000000, | ||
| 49 | .end = 0x20400000, | ||
| 50 | .flags = IORESOURCE_MEM, | ||
| 51 | }; | ||
| 52 | |||
| 53 | static struct platform_device flash_device = { | ||
| 54 | .name = "physmap-flash", | ||
| 55 | .id = -1, | ||
| 56 | .resource = &flash_resource, | ||
| 57 | .num_resources = 1, | ||
| 58 | .dev = { | ||
| 59 | .platform_data = &flash_data, | ||
| 60 | }, | ||
| 61 | }; | ||
| 62 | |||
| 63 | static struct mtd_info *flash_mtd; | ||
| 64 | |||
| 65 | static struct map_info rsk_flash_map = { | ||
| 66 | .name = "RSK+ Flash", | ||
| 67 | .size = 0x400000, | ||
| 68 | .bankwidth = 2, | ||
| 69 | }; | ||
| 70 | |||
| 71 | static void __init set_mtd_partitions(void) | ||
| 72 | { | ||
| 73 | int nr_parts = 0; | ||
| 74 | |||
| 75 | simple_map_init(&rsk_flash_map); | ||
| 76 | flash_mtd = do_map_probe("cfi_probe", &rsk_flash_map); | ||
| 77 | nr_parts = parse_mtd_partitions(flash_mtd, probes, | ||
| 78 | &parsed_partitions, 0); | ||
| 79 | /* If there is no partition table, used the hard coded table */ | ||
| 80 | if (nr_parts <= 0) { | ||
| 81 | flash_data.parts = rsk_partitions; | ||
| 82 | flash_data.nr_parts = ARRAY_SIZE(rsk_partitions); | ||
| 83 | } else { | ||
| 84 | flash_data.nr_parts = nr_parts; | ||
| 85 | flash_data.parts = parsed_partitions; | ||
| 86 | } | ||
| 87 | } | ||
| 88 | |||
| 89 | static struct platform_device *rsk_devices[] __initdata = { | ||
| 90 | &flash_device, | ||
| 91 | }; | ||
| 92 | |||
| 93 | static int __init rsk_devices_setup(void) | ||
| 94 | { | ||
| 95 | set_mtd_partitions(); | ||
| 96 | return platform_add_devices(rsk_devices, | ||
| 97 | ARRAY_SIZE(rsk_devices)); | ||
| 98 | } | ||
| 99 | device_initcall(rsk_devices_setup); | ||
| 100 | |||
| 101 | /* | ||
| 102 | * The Machine Vector | ||
| 103 | */ | ||
| 104 | static struct sh_machine_vector mv_rsk __initmv = { | ||
| 105 | .mv_name = "RSK+", | ||
| 106 | }; | ||
diff --git a/arch/sh/boards/mach-se/7343/Makefile b/arch/sh/boards/mach-se/7343/Makefile index 3024796c6203..4c3666a93790 100644 --- a/arch/sh/boards/mach-se/7343/Makefile +++ b/arch/sh/boards/mach-se/7343/Makefile | |||
| @@ -2,4 +2,4 @@ | |||
| 2 | # Makefile for the 7343 SolutionEngine specific parts of the kernel | 2 | # Makefile for the 7343 SolutionEngine specific parts of the kernel |
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | obj-y := setup.o io.o irq.o | 5 | obj-y := setup.o irq.o |
diff --git a/arch/sh/boards/mach-se/7343/io.c b/arch/sh/boards/mach-se/7343/io.c deleted file mode 100644 index 8741abc1da7b..000000000000 --- a/arch/sh/boards/mach-se/7343/io.c +++ /dev/null | |||
| @@ -1,273 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/boards/se/7343/io.c | ||
| 3 | * | ||
| 4 | * I/O routine for SH-Mobile3AS 7343 SolutionEngine. | ||
| 5 | * | ||
| 6 | */ | ||
| 7 | #include <linux/kernel.h> | ||
| 8 | #include <asm/io.h> | ||
| 9 | #include <mach-se/mach/se7343.h> | ||
| 10 | |||
| 11 | #define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a) | ||
| 12 | |||
| 13 | struct iop { | ||
| 14 | unsigned long start, end; | ||
| 15 | unsigned long base; | ||
| 16 | struct iop *(*check) (struct iop * p, unsigned long port); | ||
| 17 | unsigned char (*inb) (struct iop * p, unsigned long port); | ||
| 18 | unsigned short (*inw) (struct iop * p, unsigned long port); | ||
| 19 | void (*outb) (struct iop * p, unsigned char value, unsigned long port); | ||
| 20 | void (*outw) (struct iop * p, unsigned short value, unsigned long port); | ||
| 21 | }; | ||
| 22 | |||
| 23 | struct iop * | ||
| 24 | simple_check(struct iop *p, unsigned long port) | ||
| 25 | { | ||
| 26 | static int count; | ||
| 27 | |||
| 28 | if (count < 100) | ||
| 29 | count++; | ||
| 30 | |||
| 31 | port &= 0xFFFF; | ||
| 32 | |||
| 33 | if ((p->start <= port) && (port <= p->end)) | ||
| 34 | return p; | ||
| 35 | else | ||
| 36 | badio(check, port); | ||
| 37 | } | ||
| 38 | |||
| 39 | struct iop * | ||
| 40 | ide_check(struct iop *p, unsigned long port) | ||
| 41 | { | ||
| 42 | if (((0x1f0 <= port) && (port <= 0x1f7)) || (port == 0x3f7)) | ||
| 43 | return p; | ||
| 44 | return NULL; | ||
| 45 | } | ||
| 46 | |||
| 47 | unsigned char | ||
| 48 | simple_inb(struct iop *p, unsigned long port) | ||
| 49 | { | ||
| 50 | return *(unsigned char *) (p->base + port); | ||
| 51 | } | ||
| 52 | |||
| 53 | unsigned short | ||
| 54 | simple_inw(struct iop *p, unsigned long port) | ||
| 55 | { | ||
| 56 | return *(unsigned short *) (p->base + port); | ||
| 57 | } | ||
| 58 | |||
| 59 | void | ||
| 60 | simple_outb(struct iop *p, unsigned char value, unsigned long port) | ||
| 61 | { | ||
| 62 | *(unsigned char *) (p->base + port) = value; | ||
| 63 | } | ||
| 64 | |||
| 65 | void | ||
| 66 | simple_outw(struct iop *p, unsigned short value, unsigned long port) | ||
| 67 | { | ||
| 68 | *(unsigned short *) (p->base + port) = value; | ||
| 69 | } | ||
| 70 | |||
| 71 | unsigned char | ||
| 72 | pcc_inb(struct iop *p, unsigned long port) | ||
| 73 | { | ||
| 74 | unsigned long addr = p->base + port + 0x40000; | ||
| 75 | unsigned long v; | ||
| 76 | |||
| 77 | if (port & 1) | ||
| 78 | addr += 0x00400000; | ||
| 79 | v = *(volatile unsigned char *) addr; | ||
| 80 | return v; | ||
| 81 | } | ||
| 82 | |||
| 83 | void | ||
| 84 | pcc_outb(struct iop *p, unsigned char value, unsigned long port) | ||
| 85 | { | ||
| 86 | unsigned long addr = p->base + port + 0x40000; | ||
| 87 | |||
| 88 | if (port & 1) | ||
| 89 | addr += 0x00400000; | ||
| 90 | *(volatile unsigned char *) addr = value; | ||
| 91 | } | ||
| 92 | |||
| 93 | unsigned char | ||
| 94 | bad_inb(struct iop *p, unsigned long port) | ||
| 95 | { | ||
| 96 | badio(inb, port); | ||
| 97 | } | ||
| 98 | |||
| 99 | void | ||
| 100 | bad_outb(struct iop *p, unsigned char value, unsigned long port) | ||
| 101 | { | ||
| 102 | badio(inw, port); | ||
| 103 | } | ||
| 104 | |||
| 105 | #ifdef CONFIG_SMC91X | ||
| 106 | /* MSTLANEX01 LAN at 0xb400:0000 */ | ||
| 107 | static struct iop laniop = { | ||
| 108 | .start = 0x00, | ||
| 109 | .end = 0x0F, | ||
| 110 | .base = 0x04000000, | ||
| 111 | .check = simple_check, | ||
| 112 | .inb = simple_inb, | ||
| 113 | .inw = simple_inw, | ||
| 114 | .outb = simple_outb, | ||
| 115 | .outw = simple_outw, | ||
| 116 | }; | ||
| 117 | #endif | ||
| 118 | |||
| 119 | #ifdef CONFIG_NE2000 | ||
| 120 | /* NE2000 pc card NIC */ | ||
| 121 | static struct iop neiop = { | ||
| 122 | .start = 0x280, | ||
| 123 | .end = 0x29f, | ||
| 124 | .base = 0xb0600000 + 0x80, /* soft 0x280 -> hard 0x300 */ | ||
| 125 | .check = simple_check, | ||
| 126 | .inb = pcc_inb, | ||
| 127 | .inw = simple_inw, | ||
| 128 | .outb = pcc_outb, | ||
| 129 | .outw = simple_outw, | ||
| 130 | }; | ||
| 131 | #endif | ||
| 132 | |||
| 133 | #ifdef CONFIG_IDE | ||
| 134 | /* CF in CF slot */ | ||
| 135 | static struct iop cfiop = { | ||
| 136 | .base = 0xb0600000, | ||
| 137 | .check = ide_check, | ||
| 138 | .inb = pcc_inb, | ||
| 139 | .inw = simple_inw, | ||
| 140 | .outb = pcc_outb, | ||
| 141 | .outw = simple_outw, | ||
| 142 | }; | ||
| 143 | #endif | ||
| 144 | |||
| 145 | static __inline__ struct iop * | ||
| 146 | port2iop(unsigned long port) | ||
| 147 | { | ||
| 148 | if (0) ; | ||
| 149 | #if defined(CONFIG_SMC91X) | ||
| 150 | else if (laniop.check(&laniop, port)) | ||
| 151 | return &laniop; | ||
| 152 | #endif | ||
| 153 | #if defined(CONFIG_NE2000) | ||
| 154 | else if (neiop.check(&neiop, port)) | ||
| 155 | return &neiop; | ||
| 156 | #endif | ||
| 157 | #if defined(CONFIG_IDE) | ||
| 158 | else if (cfiop.check(&cfiop, port)) | ||
| 159 | return &cfiop; | ||
| 160 | #endif | ||
| 161 | else | ||
| 162 | return NULL; | ||
| 163 | } | ||
| 164 | |||
| 165 | static inline void | ||
| 166 | delay(void) | ||
| 167 | { | ||
| 168 | ctrl_inw(0xac000000); | ||
| 169 | ctrl_inw(0xac000000); | ||
| 170 | } | ||
| 171 | |||
| 172 | unsigned char | ||
| 173 | sh7343se_inb(unsigned long port) | ||
| 174 | { | ||
| 175 | struct iop *p = port2iop(port); | ||
| 176 | return (p->inb) (p, port); | ||
| 177 | } | ||
| 178 | |||
| 179 | unsigned char | ||
| 180 | sh7343se_inb_p(unsigned long port) | ||
| 181 | { | ||
| 182 | unsigned char v = sh7343se_inb(port); | ||
| 183 | delay(); | ||
| 184 | return v; | ||
| 185 | } | ||
| 186 | |||
| 187 | unsigned short | ||
| 188 | sh7343se_inw(unsigned long port) | ||
| 189 | { | ||
| 190 | struct iop *p = port2iop(port); | ||
| 191 | return (p->inw) (p, port); | ||
| 192 | } | ||
| 193 | |||
| 194 | unsigned int | ||
| 195 | sh7343se_inl(unsigned long port) | ||
| 196 | { | ||
| 197 | badio(inl, port); | ||
| 198 | } | ||
| 199 | |||
| 200 | void | ||
| 201 | sh7343se_outb(unsigned char value, unsigned long port) | ||
| 202 | { | ||
| 203 | struct iop *p = port2iop(port); | ||
| 204 | (p->outb) (p, value, port); | ||
| 205 | } | ||
| 206 | |||
| 207 | void | ||
| 208 | sh7343se_outb_p(unsigned char value, unsigned long port) | ||
| 209 | { | ||
| 210 | sh7343se_outb(value, port); | ||
| 211 | delay(); | ||
| 212 | } | ||
| 213 | |||
| 214 | void | ||
| 215 | sh7343se_outw(unsigned short value, unsigned long port) | ||
| 216 | { | ||
| 217 | struct iop *p = port2iop(port); | ||
| 218 | (p->outw) (p, value, port); | ||
| 219 | } | ||
| 220 | |||
| 221 | void | ||
| 222 | sh7343se_outl(unsigned int value, unsigned long port) | ||
| 223 | { | ||
| 224 | badio(outl, port); | ||
| 225 | } | ||
| 226 | |||
| 227 | void | ||
| 228 | sh7343se_insb(unsigned long port, void *addr, unsigned long count) | ||
| 229 | { | ||
| 230 | unsigned char *a = addr; | ||
| 231 | struct iop *p = port2iop(port); | ||
| 232 | while (count--) | ||
| 233 | *a++ = (p->inb) (p, port); | ||
| 234 | } | ||
| 235 | |||
| 236 | void | ||
| 237 | sh7343se_insw(unsigned long port, void *addr, unsigned long count) | ||
| 238 | { | ||
| 239 | unsigned short *a = addr; | ||
| 240 | struct iop *p = port2iop(port); | ||
| 241 | while (count--) | ||
| 242 | *a++ = (p->inw) (p, port); | ||
| 243 | } | ||
| 244 | |||
| 245 | void | ||
| 246 | sh7343se_insl(unsigned long port, void *addr, unsigned long count) | ||
| 247 | { | ||
| 248 | badio(insl, port); | ||
| 249 | } | ||
| 250 | |||
| 251 | void | ||
| 252 | sh7343se_outsb(unsigned long port, const void *addr, unsigned long count) | ||
| 253 | { | ||
| 254 | unsigned char *a = (unsigned char *) addr; | ||
| 255 | struct iop *p = port2iop(port); | ||
| 256 | while (count--) | ||
| 257 | (p->outb) (p, *a++, port); | ||
| 258 | } | ||
| 259 | |||
| 260 | void | ||
| 261 | sh7343se_outsw(unsigned long port, const void *addr, unsigned long count) | ||
| 262 | { | ||
| 263 | unsigned short *a = (unsigned short *) addr; | ||
| 264 | struct iop *p = port2iop(port); | ||
| 265 | while (count--) | ||
| 266 | (p->outw) (p, *a++, port); | ||
| 267 | } | ||
| 268 | |||
| 269 | void | ||
| 270 | sh7343se_outsl(unsigned long port, const void *addr, unsigned long count) | ||
| 271 | { | ||
| 272 | badio(outsw, port); | ||
| 273 | } | ||
diff --git a/arch/sh/boards/mach-se/7343/setup.c b/arch/sh/boards/mach-se/7343/setup.c index 486f40bf9274..4de56f35f419 100644 --- a/arch/sh/boards/mach-se/7343/setup.c +++ b/arch/sh/boards/mach-se/7343/setup.c | |||
| @@ -1,36 +1,16 @@ | |||
| 1 | #include <linux/init.h> | 1 | #include <linux/init.h> |
| 2 | #include <linux/platform_device.h> | 2 | #include <linux/platform_device.h> |
| 3 | #include <linux/mtd/physmap.h> | 3 | #include <linux/mtd/physmap.h> |
| 4 | #include <linux/serial_8250.h> | ||
| 5 | #include <linux/serial_reg.h> | ||
| 6 | #include <linux/usb/isp116x.h> | ||
| 7 | #include <linux/delay.h> | ||
| 4 | #include <asm/machvec.h> | 8 | #include <asm/machvec.h> |
| 5 | #include <mach-se/mach/se7343.h> | 9 | #include <mach-se/mach/se7343.h> |
| 6 | #include <asm/heartbeat.h> | 10 | #include <asm/heartbeat.h> |
| 7 | #include <asm/irq.h> | 11 | #include <asm/irq.h> |
| 8 | #include <asm/io.h> | 12 | #include <asm/io.h> |
| 9 | 13 | ||
| 10 | static struct resource smc91x_resources[] = { | ||
| 11 | [0] = { | ||
| 12 | .start = 0x10000000, | ||
| 13 | .end = 0x1000000F, | ||
| 14 | .flags = IORESOURCE_MEM, | ||
| 15 | }, | ||
| 16 | [1] = { | ||
| 17 | /* | ||
| 18 | * shared with other devices via externel | ||
| 19 | * interrupt controller in FPGA... | ||
| 20 | */ | ||
| 21 | .start = SMC_IRQ, | ||
| 22 | .end = SMC_IRQ, | ||
| 23 | .flags = IORESOURCE_IRQ, | ||
| 24 | }, | ||
| 25 | }; | ||
| 26 | |||
| 27 | static struct platform_device smc91x_device = { | ||
| 28 | .name = "smc91x", | ||
| 29 | .id = 0, | ||
| 30 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
| 31 | .resource = smc91x_resources, | ||
| 32 | }; | ||
| 33 | |||
| 34 | static struct resource heartbeat_resources[] = { | 14 | static struct resource heartbeat_resources[] = { |
| 35 | [0] = { | 15 | [0] = { |
| 36 | .start = PA_LED, | 16 | .start = PA_LED, |
| @@ -94,10 +74,83 @@ static struct platform_device nor_flash_device = { | |||
| 94 | .resource = nor_flash_resources, | 74 | .resource = nor_flash_resources, |
| 95 | }; | 75 | }; |
| 96 | 76 | ||
| 77 | #define ST16C2550C_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP) | ||
| 78 | |||
| 79 | static struct plat_serial8250_port serial_platform_data[] = { | ||
| 80 | [0] = { | ||
| 81 | .iotype = UPIO_MEM, | ||
| 82 | .mapbase = 0x16000000, | ||
| 83 | .regshift = 1, | ||
| 84 | .flags = ST16C2550C_FLAGS, | ||
| 85 | .irq = UARTA_IRQ, | ||
| 86 | .uartclk = 7372800, | ||
| 87 | }, | ||
| 88 | [1] = { | ||
| 89 | .iotype = UPIO_MEM, | ||
| 90 | .mapbase = 0x17000000, | ||
| 91 | .regshift = 1, | ||
| 92 | .flags = ST16C2550C_FLAGS, | ||
| 93 | .irq = UARTB_IRQ, | ||
| 94 | .uartclk = 7372800, | ||
| 95 | }, | ||
| 96 | { }, | ||
| 97 | }; | ||
| 98 | |||
| 99 | static struct platform_device uart_device = { | ||
| 100 | .name = "serial8250", | ||
| 101 | .id = PLAT8250_DEV_PLATFORM, | ||
| 102 | .dev = { | ||
| 103 | .platform_data = serial_platform_data, | ||
| 104 | }, | ||
| 105 | }; | ||
| 106 | |||
| 107 | static void isp116x_delay(struct device *dev, int delay) | ||
| 108 | { | ||
| 109 | ndelay(delay); | ||
| 110 | } | ||
| 111 | |||
| 112 | static struct resource usb_resources[] = { | ||
| 113 | [0] = { | ||
| 114 | .start = 0x11800000, | ||
| 115 | .end = 0x11800001, | ||
| 116 | .flags = IORESOURCE_MEM, | ||
| 117 | }, | ||
| 118 | [1] = { | ||
| 119 | .start = 0x11800002, | ||
| 120 | .end = 0x11800003, | ||
| 121 | .flags = IORESOURCE_MEM, | ||
| 122 | }, | ||
| 123 | [2] = { | ||
| 124 | .start = USB_IRQ, | ||
| 125 | .flags = IORESOURCE_IRQ, | ||
| 126 | }, | ||
| 127 | }; | ||
| 128 | |||
| 129 | static struct isp116x_platform_data usb_platform_data = { | ||
| 130 | .sel15Kres = 1, | ||
| 131 | .oc_enable = 1, | ||
| 132 | .int_act_high = 0, | ||
| 133 | .int_edge_triggered = 0, | ||
| 134 | .remote_wakeup_enable = 0, | ||
| 135 | .delay = isp116x_delay, | ||
| 136 | }; | ||
| 137 | |||
| 138 | static struct platform_device usb_device = { | ||
| 139 | .name = "isp116x-hcd", | ||
| 140 | .id = -1, | ||
| 141 | .num_resources = ARRAY_SIZE(usb_resources), | ||
| 142 | .resource = usb_resources, | ||
| 143 | .dev = { | ||
| 144 | .platform_data = &usb_platform_data, | ||
| 145 | }, | ||
| 146 | |||
| 147 | }; | ||
| 148 | |||
| 97 | static struct platform_device *sh7343se_platform_devices[] __initdata = { | 149 | static struct platform_device *sh7343se_platform_devices[] __initdata = { |
| 98 | &smc91x_device, | ||
| 99 | &heartbeat_device, | 150 | &heartbeat_device, |
| 100 | &nor_flash_device, | 151 | &nor_flash_device, |
| 152 | &uart_device, | ||
| 153 | &usb_device, | ||
| 101 | }; | 154 | }; |
| 102 | 155 | ||
| 103 | static int __init sh7343se_devices_setup(void) | 156 | static int __init sh7343se_devices_setup(void) |
| @@ -126,27 +179,6 @@ static void __init sh7343se_setup(char **cmdline_p) | |||
| 126 | static struct sh_machine_vector mv_7343se __initmv = { | 179 | static struct sh_machine_vector mv_7343se __initmv = { |
| 127 | .mv_name = "SolutionEngine 7343", | 180 | .mv_name = "SolutionEngine 7343", |
| 128 | .mv_setup = sh7343se_setup, | 181 | .mv_setup = sh7343se_setup, |
| 129 | .mv_nr_irqs = 108, | 182 | .mv_nr_irqs = SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_NR, |
| 130 | .mv_inb = sh7343se_inb, | ||
| 131 | .mv_inw = sh7343se_inw, | ||
| 132 | .mv_inl = sh7343se_inl, | ||
| 133 | .mv_outb = sh7343se_outb, | ||
| 134 | .mv_outw = sh7343se_outw, | ||
| 135 | .mv_outl = sh7343se_outl, | ||
| 136 | |||
| 137 | .mv_inb_p = sh7343se_inb_p, | ||
| 138 | .mv_inw_p = sh7343se_inw, | ||
| 139 | .mv_inl_p = sh7343se_inl, | ||
| 140 | .mv_outb_p = sh7343se_outb_p, | ||
| 141 | .mv_outw_p = sh7343se_outw, | ||
| 142 | .mv_outl_p = sh7343se_outl, | ||
| 143 | |||
| 144 | .mv_insb = sh7343se_insb, | ||
| 145 | .mv_insw = sh7343se_insw, | ||
| 146 | .mv_insl = sh7343se_insl, | ||
| 147 | .mv_outsb = sh7343se_outsb, | ||
| 148 | .mv_outsw = sh7343se_outsw, | ||
| 149 | .mv_outsl = sh7343se_outsl, | ||
| 150 | |||
| 151 | .mv_init_irq = init_7343se_IRQ, | 183 | .mv_init_irq = init_7343se_IRQ, |
| 152 | }; | 184 | }; |
diff --git a/arch/sh/boards/mach-se/770x/setup.c b/arch/sh/boards/mach-se/770x/setup.c index 9123d9687bf7..527eb6b12610 100644 --- a/arch/sh/boards/mach-se/770x/setup.c +++ b/arch/sh/boards/mach-se/770x/setup.c | |||
| @@ -8,8 +8,9 @@ | |||
| 8 | */ | 8 | */ |
| 9 | #include <linux/init.h> | 9 | #include <linux/init.h> |
| 10 | #include <linux/platform_device.h> | 10 | #include <linux/platform_device.h> |
| 11 | #include <asm/machvec.h> | ||
| 12 | #include <mach-se/mach/se.h> | 11 | #include <mach-se/mach/se.h> |
| 12 | #include <mach-se/mach/mrshpc.h> | ||
| 13 | #include <asm/machvec.h> | ||
| 13 | #include <asm/io.h> | 14 | #include <asm/io.h> |
| 14 | #include <asm/smc37c93x.h> | 15 | #include <asm/smc37c93x.h> |
| 15 | #include <asm/heartbeat.h> | 16 | #include <asm/heartbeat.h> |
| @@ -175,6 +176,7 @@ static struct platform_device *se_devices[] __initdata = { | |||
| 175 | 176 | ||
| 176 | static int __init se_devices_setup(void) | 177 | static int __init se_devices_setup(void) |
| 177 | { | 178 | { |
| 179 | mrshpc_setup_windows(); | ||
| 178 | return platform_add_devices(se_devices, ARRAY_SIZE(se_devices)); | 180 | return platform_add_devices(se_devices, ARRAY_SIZE(se_devices)); |
| 179 | } | 181 | } |
| 180 | device_initcall(se_devices_setup); | 182 | device_initcall(se_devices_setup); |
diff --git a/arch/sh/boards/mach-se/7721/setup.c b/arch/sh/boards/mach-se/7721/setup.c index d3fc80ff4d83..55af4c36b43a 100644 --- a/arch/sh/boards/mach-se/7721/setup.c +++ b/arch/sh/boards/mach-se/7721/setup.c | |||
| @@ -12,8 +12,9 @@ | |||
| 12 | */ | 12 | */ |
| 13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
| 14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
| 15 | #include <asm/machvec.h> | ||
| 16 | #include <mach-se/mach/se7721.h> | 15 | #include <mach-se/mach/se7721.h> |
| 16 | #include <mach-se/mach/mrshpc.h> | ||
| 17 | #include <asm/machvec.h> | ||
| 17 | #include <asm/io.h> | 18 | #include <asm/io.h> |
| 18 | #include <asm/heartbeat.h> | 19 | #include <asm/heartbeat.h> |
| 19 | 20 | ||
| @@ -74,8 +75,8 @@ static struct platform_device *se7721_devices[] __initdata = { | |||
| 74 | 75 | ||
| 75 | static int __init se7721_devices_setup(void) | 76 | static int __init se7721_devices_setup(void) |
| 76 | { | 77 | { |
| 77 | return platform_add_devices(se7721_devices, | 78 | mrshpc_setup_windows(); |
| 78 | ARRAY_SIZE(se7721_devices)); | 79 | return platform_add_devices(se7721_devices, ARRAY_SIZE(se7721_devices)); |
| 79 | } | 80 | } |
| 80 | device_initcall(se7721_devices_setup); | 81 | device_initcall(se7721_devices_setup); |
| 81 | 82 | ||
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c index fe6f96517e12..af84904ed86f 100644 --- a/arch/sh/boards/mach-se/7722/setup.c +++ b/arch/sh/boards/mach-se/7722/setup.c | |||
| @@ -15,9 +15,10 @@ | |||
| 15 | #include <linux/ata_platform.h> | 15 | #include <linux/ata_platform.h> |
| 16 | #include <linux/input.h> | 16 | #include <linux/input.h> |
| 17 | #include <linux/smc91x.h> | 17 | #include <linux/smc91x.h> |
| 18 | #include <mach-se/mach/se7722.h> | ||
| 19 | #include <mach-se/mach/mrshpc.h> | ||
| 18 | #include <asm/machvec.h> | 20 | #include <asm/machvec.h> |
| 19 | #include <asm/clock.h> | 21 | #include <asm/clock.h> |
| 20 | #include <mach-se/mach/se7722.h> | ||
| 21 | #include <asm/io.h> | 22 | #include <asm/io.h> |
| 22 | #include <asm/heartbeat.h> | 23 | #include <asm/heartbeat.h> |
| 23 | #include <asm/sh_keysc.h> | 24 | #include <asm/sh_keysc.h> |
| @@ -130,6 +131,7 @@ static struct resource sh_keysc_resources[] = { | |||
| 130 | 131 | ||
| 131 | static struct platform_device sh_keysc_device = { | 132 | static struct platform_device sh_keysc_device = { |
| 132 | .name = "sh_keysc", | 133 | .name = "sh_keysc", |
| 134 | .id = 0, /* "keysc0" clock */ | ||
| 133 | .num_resources = ARRAY_SIZE(sh_keysc_resources), | 135 | .num_resources = ARRAY_SIZE(sh_keysc_resources), |
| 134 | .resource = sh_keysc_resources, | 136 | .resource = sh_keysc_resources, |
| 135 | .dev = { | 137 | .dev = { |
| @@ -146,10 +148,8 @@ static struct platform_device *se7722_devices[] __initdata = { | |||
| 146 | 148 | ||
| 147 | static int __init se7722_devices_setup(void) | 149 | static int __init se7722_devices_setup(void) |
| 148 | { | 150 | { |
| 149 | clk_always_enable("mstp214"); /* KEYSC */ | 151 | mrshpc_setup_windows(); |
| 150 | 152 | return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices)); | |
| 151 | return platform_add_devices(se7722_devices, | ||
| 152 | ARRAY_SIZE(se7722_devices)); | ||
| 153 | } | 153 | } |
| 154 | device_initcall(se7722_devices_setup); | 154 | device_initcall(se7722_devices_setup); |
| 155 | 155 | ||
diff --git a/arch/sh/boards/mach-sh03/setup.c b/arch/sh/boards/mach-sh03/setup.c index 5771219be3fd..74cfb4b8b03d 100644 --- a/arch/sh/boards/mach-sh03/setup.c +++ b/arch/sh/boards/mach-sh03/setup.c | |||
| @@ -9,6 +9,7 @@ | |||
| 9 | #include <linux/irq.h> | 9 | #include <linux/irq.h> |
| 10 | #include <linux/pci.h> | 10 | #include <linux/pci.h> |
| 11 | #include <linux/platform_device.h> | 11 | #include <linux/platform_device.h> |
| 12 | #include <linux/ata_platform.h> | ||
| 12 | #include <asm/io.h> | 13 | #include <asm/io.h> |
| 13 | #include <asm/rtc.h> | 14 | #include <asm/rtc.h> |
| 14 | #include <mach-sh03/mach/io.h> | 15 | #include <mach-sh03/mach/io.h> |
| @@ -20,19 +21,6 @@ static void __init init_sh03_IRQ(void) | |||
| 20 | plat_irq_setup_pins(IRQ_MODE_IRQ); | 21 | plat_irq_setup_pins(IRQ_MODE_IRQ); |
| 21 | } | 22 | } |
| 22 | 23 | ||
| 23 | extern void *cf_io_base; | ||
| 24 | |||
| 25 | static void __iomem *sh03_ioport_map(unsigned long port, unsigned int size) | ||
| 26 | { | ||
| 27 | if (PXSEG(port)) | ||
| 28 | return (void __iomem *)port; | ||
| 29 | /* CompactFlash (IDE) */ | ||
| 30 | if (((port >= 0x1f0) && (port <= 0x1f7)) || (port == 0x3f6)) | ||
| 31 | return (void __iomem *)((unsigned long)cf_io_base + port); | ||
| 32 | |||
| 33 | return (void __iomem *)(port + PCI_IO_BASE); | ||
| 34 | } | ||
| 35 | |||
| 36 | /* arch/sh/boards/sh03/rtc.c */ | 24 | /* arch/sh/boards/sh03/rtc.c */ |
| 37 | void sh03_time_init(void); | 25 | void sh03_time_init(void); |
| 38 | 26 | ||
| @@ -41,6 +29,30 @@ static void __init sh03_setup(char **cmdline_p) | |||
| 41 | board_time_init = sh03_time_init; | 29 | board_time_init = sh03_time_init; |
| 42 | } | 30 | } |
| 43 | 31 | ||
| 32 | static struct resource cf_ide_resources[] = { | ||
| 33 | [0] = { | ||
| 34 | .start = 0x1f0, | ||
| 35 | .end = 0x1f0 + 8, | ||
| 36 | .flags = IORESOURCE_IO, | ||
| 37 | }, | ||
| 38 | [1] = { | ||
| 39 | .start = 0x1f0 + 0x206, | ||
| 40 | .end = 0x1f0 +8 + 0x206 + 8, | ||
| 41 | .flags = IORESOURCE_IO, | ||
| 42 | }, | ||
| 43 | [2] = { | ||
| 44 | .start = IRL2_IRQ, | ||
| 45 | .flags = IORESOURCE_IRQ, | ||
| 46 | }, | ||
| 47 | }; | ||
| 48 | |||
| 49 | static struct platform_device cf_ide_device = { | ||
| 50 | .name = "pata_platform", | ||
| 51 | .id = -1, | ||
| 52 | .num_resources = ARRAY_SIZE(cf_ide_resources), | ||
| 53 | .resource = cf_ide_resources, | ||
| 54 | }; | ||
| 55 | |||
| 44 | static struct resource heartbeat_resources[] = { | 56 | static struct resource heartbeat_resources[] = { |
| 45 | [0] = { | 57 | [0] = { |
| 46 | .start = 0xa0800000, | 58 | .start = 0xa0800000, |
| @@ -58,10 +70,30 @@ static struct platform_device heartbeat_device = { | |||
| 58 | 70 | ||
| 59 | static struct platform_device *sh03_devices[] __initdata = { | 71 | static struct platform_device *sh03_devices[] __initdata = { |
| 60 | &heartbeat_device, | 72 | &heartbeat_device, |
| 73 | &cf_ide_device, | ||
| 61 | }; | 74 | }; |
| 62 | 75 | ||
| 63 | static int __init sh03_devices_setup(void) | 76 | static int __init sh03_devices_setup(void) |
| 64 | { | 77 | { |
| 78 | pgprot_t prot; | ||
| 79 | unsigned long paddrbase; | ||
| 80 | void *cf_ide_base; | ||
| 81 | |||
| 82 | /* open I/O area window */ | ||
| 83 | paddrbase = virt_to_phys((void *)PA_AREA5_IO); | ||
| 84 | prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16); | ||
| 85 | cf_ide_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot); | ||
| 86 | if (!cf_ide_base) { | ||
| 87 | printk("allocate_cf_area : can't open CF I/O window!\n"); | ||
| 88 | return -ENOMEM; | ||
| 89 | } | ||
| 90 | |||
| 91 | /* IDE cmd address : 0x1f0-0x1f7 and 0x3f6 */ | ||
| 92 | cf_ide_resources[0].start += (unsigned long)cf_ide_base; | ||
| 93 | cf_ide_resources[0].end += (unsigned long)cf_ide_base; | ||
| 94 | cf_ide_resources[1].start += (unsigned long)cf_ide_base; | ||
| 95 | cf_ide_resources[1].end += (unsigned long)cf_ide_base; | ||
| 96 | |||
| 65 | return platform_add_devices(sh03_devices, ARRAY_SIZE(sh03_devices)); | 97 | return platform_add_devices(sh03_devices, ARRAY_SIZE(sh03_devices)); |
| 66 | } | 98 | } |
| 67 | __initcall(sh03_devices_setup); | 99 | __initcall(sh03_devices_setup); |
| @@ -70,6 +102,5 @@ static struct sh_machine_vector mv_sh03 __initmv = { | |||
| 70 | .mv_name = "Interface (CTP/PCI-SH03)", | 102 | .mv_name = "Interface (CTP/PCI-SH03)", |
| 71 | .mv_setup = sh03_setup, | 103 | .mv_setup = sh03_setup, |
| 72 | .mv_nr_irqs = 48, | 104 | .mv_nr_irqs = 48, |
| 73 | .mv_ioport_map = sh03_ioport_map, | ||
| 74 | .mv_init_irq = init_sh03_IRQ, | 105 | .mv_init_irq = init_sh03_IRQ, |
| 75 | }; | 106 | }; |
diff --git a/arch/sh/boards/mach-systemh/irq.c b/arch/sh/boards/mach-systemh/irq.c index 538406872a89..986a0e71d220 100644 --- a/arch/sh/boards/mach-systemh/irq.c +++ b/arch/sh/boards/mach-systemh/irq.c | |||
| @@ -12,8 +12,8 @@ | |||
| 12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
| 13 | #include <linux/irq.h> | 13 | #include <linux/irq.h> |
| 14 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/io.h> | ||
| 15 | 16 | ||
| 16 | #include <asm/io.h> | ||
| 17 | #include <mach/systemh7751.h> | 17 | #include <mach/systemh7751.h> |
| 18 | #include <asm/smc37c93x.h> | 18 | #include <asm/smc37c93x.h> |
| 19 | 19 | ||
| @@ -24,35 +24,17 @@ static unsigned long *systemh_irq_mask_register = (unsigned long *)0xB3F10004; | |||
| 24 | static unsigned long *systemh_irq_request_register = (unsigned long *)0xB3F10000; | 24 | static unsigned long *systemh_irq_request_register = (unsigned long *)0xB3F10000; |
| 25 | 25 | ||
| 26 | /* forward declaration */ | 26 | /* forward declaration */ |
| 27 | static unsigned int startup_systemh_irq(unsigned int irq); | ||
| 28 | static void shutdown_systemh_irq(unsigned int irq); | ||
| 29 | static void enable_systemh_irq(unsigned int irq); | 27 | static void enable_systemh_irq(unsigned int irq); |
| 30 | static void disable_systemh_irq(unsigned int irq); | 28 | static void disable_systemh_irq(unsigned int irq); |
| 31 | static void mask_and_ack_systemh(unsigned int); | 29 | static void mask_and_ack_systemh(unsigned int); |
| 32 | static void end_systemh_irq(unsigned int irq); | ||
| 33 | 30 | ||
| 34 | /* hw_interrupt_type */ | 31 | static struct irq_chip systemh_irq_type = { |
| 35 | static struct hw_interrupt_type systemh_irq_type = { | 32 | .name = " SystemH Register", |
| 36 | .typename = " SystemH Register", | 33 | .unmask = enable_systemh_irq, |
| 37 | .startup = startup_systemh_irq, | 34 | .mask = disable_systemh_irq, |
| 38 | .shutdown = shutdown_systemh_irq, | ||
| 39 | .enable = enable_systemh_irq, | ||
| 40 | .disable = disable_systemh_irq, | ||
| 41 | .ack = mask_and_ack_systemh, | 35 | .ack = mask_and_ack_systemh, |
| 42 | .end = end_systemh_irq | ||
| 43 | }; | 36 | }; |
| 44 | 37 | ||
| 45 | static unsigned int startup_systemh_irq(unsigned int irq) | ||
| 46 | { | ||
| 47 | enable_systemh_irq(irq); | ||
| 48 | return 0; /* never anything pending */ | ||
| 49 | } | ||
| 50 | |||
| 51 | static void shutdown_systemh_irq(unsigned int irq) | ||
| 52 | { | ||
| 53 | disable_systemh_irq(irq); | ||
| 54 | } | ||
| 55 | |||
| 56 | static void disable_systemh_irq(unsigned int irq) | 38 | static void disable_systemh_irq(unsigned int irq) |
| 57 | { | 39 | { |
| 58 | if (systemh_irq_mask_register) { | 40 | if (systemh_irq_mask_register) { |
| @@ -86,16 +68,9 @@ static void mask_and_ack_systemh(unsigned int irq) | |||
| 86 | disable_systemh_irq(irq); | 68 | disable_systemh_irq(irq); |
| 87 | } | 69 | } |
| 88 | 70 | ||
| 89 | static void end_systemh_irq(unsigned int irq) | ||
| 90 | { | ||
| 91 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | ||
| 92 | enable_systemh_irq(irq); | ||
| 93 | } | ||
| 94 | |||
| 95 | void make_systemh_irq(unsigned int irq) | 71 | void make_systemh_irq(unsigned int irq) |
| 96 | { | 72 | { |
| 97 | disable_irq_nosync(irq); | 73 | disable_irq_nosync(irq); |
| 98 | irq_desc[irq].chip = &systemh_irq_type; | 74 | set_irq_chip_and_handler(irq, &systemh_irq_type, handle_level_irq); |
| 99 | disable_systemh_irq(irq); | 75 | disable_systemh_irq(irq); |
| 100 | } | 76 | } |
| 101 | |||
diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c index f1a4a0763c59..27ceeb948bb1 100644 --- a/arch/sh/cchips/hd6446x/hd64461.c +++ b/arch/sh/cchips/hd6446x/hd64461.c | |||
| @@ -10,99 +10,49 @@ | |||
| 10 | #include <linux/interrupt.h> | 10 | #include <linux/interrupt.h> |
| 11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
| 12 | #include <linux/irq.h> | 12 | #include <linux/irq.h> |
| 13 | #include <asm/io.h> | 13 | #include <linux/io.h> |
| 14 | #include <asm/irq.h> | 14 | #include <asm/irq.h> |
| 15 | #include <asm/hd64461.h> | 15 | #include <asm/hd64461.h> |
| 16 | 16 | ||
| 17 | /* This belongs in cpu specific */ | 17 | /* This belongs in cpu specific */ |
| 18 | #define INTC_ICR1 0xA4140010UL | 18 | #define INTC_ICR1 0xA4140010UL |
| 19 | 19 | ||
| 20 | static void disable_hd64461_irq(unsigned int irq) | 20 | static void hd64461_mask_irq(unsigned int irq) |
| 21 | { | 21 | { |
| 22 | unsigned short nimr; | 22 | unsigned short nimr; |
| 23 | unsigned short mask = 1 << (irq - HD64461_IRQBASE); | 23 | unsigned short mask = 1 << (irq - HD64461_IRQBASE); |
| 24 | 24 | ||
| 25 | nimr = inw(HD64461_NIMR); | 25 | nimr = __raw_readw(HD64461_NIMR); |
| 26 | nimr |= mask; | 26 | nimr |= mask; |
| 27 | outw(nimr, HD64461_NIMR); | 27 | __raw_writew(nimr, HD64461_NIMR); |
| 28 | } | 28 | } |
| 29 | 29 | ||
| 30 | static void enable_hd64461_irq(unsigned int irq) | 30 | static void hd64461_unmask_irq(unsigned int irq) |
| 31 | { | 31 | { |
| 32 | unsigned short nimr; | 32 | unsigned short nimr; |
| 33 | unsigned short mask = 1 << (irq - HD64461_IRQBASE); | 33 | unsigned short mask = 1 << (irq - HD64461_IRQBASE); |
| 34 | 34 | ||
| 35 | nimr = inw(HD64461_NIMR); | 35 | nimr = __raw_readw(HD64461_NIMR); |
| 36 | nimr &= ~mask; | 36 | nimr &= ~mask; |
| 37 | outw(nimr, HD64461_NIMR); | 37 | __raw_writew(nimr, HD64461_NIMR); |
| 38 | } | 38 | } |
| 39 | 39 | ||
| 40 | static void mask_and_ack_hd64461(unsigned int irq) | 40 | static void hd64461_mask_and_ack_irq(unsigned int irq) |
| 41 | { | 41 | { |
| 42 | disable_hd64461_irq(irq); | 42 | hd64461_mask_irq(irq); |
| 43 | #ifdef CONFIG_HD64461_ENABLER | 43 | #ifdef CONFIG_HD64461_ENABLER |
| 44 | if (irq == HD64461_IRQBASE + 13) | 44 | if (irq == HD64461_IRQBASE + 13) |
| 45 | outb(0x00, HD64461_PCC1CSCR); | 45 | __raw_writeb(0x00, HD64461_PCC1CSCR); |
| 46 | #endif | 46 | #endif |
| 47 | } | 47 | } |
| 48 | 48 | ||
| 49 | static void end_hd64461_irq(unsigned int irq) | 49 | static struct irq_chip hd64461_irq_chip = { |
| 50 | { | 50 | .name = "HD64461-IRQ", |
| 51 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | 51 | .mask = hd64461_mask_irq, |
| 52 | enable_hd64461_irq(irq); | 52 | .mask_ack = hd64461_mask_and_ack_irq, |
| 53 | } | 53 | .unmask = hd64461_unmask_irq, |
| 54 | |||
| 55 | static unsigned int startup_hd64461_irq(unsigned int irq) | ||
| 56 | { | ||
| 57 | enable_hd64461_irq(irq); | ||
| 58 | return 0; | ||
| 59 | } | ||
| 60 | |||
| 61 | static void shutdown_hd64461_irq(unsigned int irq) | ||
| 62 | { | ||
| 63 | disable_hd64461_irq(irq); | ||
| 64 | } | ||
| 65 | |||
| 66 | static struct hw_interrupt_type hd64461_irq_type = { | ||
| 67 | .typename = "HD64461-IRQ", | ||
| 68 | .startup = startup_hd64461_irq, | ||
| 69 | .shutdown = shutdown_hd64461_irq, | ||
| 70 | .enable = enable_hd64461_irq, | ||
| 71 | .disable = disable_hd64461_irq, | ||
| 72 | .ack = mask_and_ack_hd64461, | ||
| 73 | .end = end_hd64461_irq, | ||
| 74 | }; | 54 | }; |
| 75 | 55 | ||
| 76 | static irqreturn_t hd64461_interrupt(int irq, void *dev_id) | ||
| 77 | { | ||
| 78 | printk(KERN_INFO | ||
| 79 | "HD64461: spurious interrupt, nirr: 0x%x nimr: 0x%x\n", | ||
| 80 | inw(HD64461_NIRR), inw(HD64461_NIMR)); | ||
| 81 | |||
| 82 | return IRQ_NONE; | ||
| 83 | } | ||
| 84 | |||
| 85 | static struct { | ||
| 86 | int (*func) (int, void *); | ||
| 87 | void *dev; | ||
| 88 | } hd64461_demux[HD64461_IRQ_NUM]; | ||
| 89 | |||
| 90 | void hd64461_register_irq_demux(int irq, | ||
| 91 | int (*demux) (int irq, void *dev), void *dev) | ||
| 92 | { | ||
| 93 | hd64461_demux[irq - HD64461_IRQBASE].func = demux; | ||
| 94 | hd64461_demux[irq - HD64461_IRQBASE].dev = dev; | ||
| 95 | } | ||
| 96 | |||
| 97 | EXPORT_SYMBOL(hd64461_register_irq_demux); | ||
| 98 | |||
| 99 | void hd64461_unregister_irq_demux(int irq) | ||
| 100 | { | ||
| 101 | hd64461_demux[irq - HD64461_IRQBASE].func = 0; | ||
| 102 | } | ||
| 103 | |||
| 104 | EXPORT_SYMBOL(hd64461_unregister_irq_demux); | ||
| 105 | |||
| 106 | int hd64461_irq_demux(int irq) | 56 | int hd64461_irq_demux(int irq) |
| 107 | { | 57 | { |
| 108 | if (irq == CONFIG_HD64461_IRQ) { | 58 | if (irq == CONFIG_HD64461_IRQ) { |
| @@ -115,25 +65,11 @@ int hd64461_irq_demux(int irq) | |||
| 115 | for (bit = 1, i = 0; i < 16; bit <<= 1, i++) | 65 | for (bit = 1, i = 0; i < 16; bit <<= 1, i++) |
| 116 | if (nirr & bit) | 66 | if (nirr & bit) |
| 117 | break; | 67 | break; |
| 118 | if (i == 16) | 68 | irq = HD64461_IRQBASE + i; |
| 119 | irq = CONFIG_HD64461_IRQ; | ||
| 120 | else { | ||
| 121 | irq = HD64461_IRQBASE + i; | ||
| 122 | if (hd64461_demux[i].func != 0) { | ||
| 123 | irq = hd64461_demux[i].func(irq, hd64461_demux[i].dev); | ||
| 124 | } | ||
| 125 | } | ||
| 126 | } | 69 | } |
| 127 | return irq; | 70 | return irq; |
| 128 | } | 71 | } |
| 129 | 72 | ||
| 130 | static struct irqaction irq0 = { | ||
| 131 | .handler = hd64461_interrupt, | ||
| 132 | .flags = IRQF_DISABLED, | ||
| 133 | .mask = CPU_MASK_NONE, | ||
| 134 | .name = "HD64461", | ||
| 135 | }; | ||
| 136 | |||
| 137 | int __init setup_hd64461(void) | 73 | int __init setup_hd64461(void) |
| 138 | { | 74 | { |
| 139 | int i; | 75 | int i; |
| @@ -146,22 +82,21 @@ int __init setup_hd64461(void) | |||
| 146 | CONFIG_HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE, | 82 | CONFIG_HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE, |
| 147 | HD64461_IRQBASE + 15); | 83 | HD64461_IRQBASE + 15); |
| 148 | 84 | ||
| 149 | #if defined(CONFIG_CPU_SUBTYPE_SH7709) /* Should be at processor specific part.. */ | 85 | /* Should be at processor specific part.. */ |
| 150 | outw(0x2240, INTC_ICR1); | 86 | #if defined(CONFIG_CPU_SUBTYPE_SH7709) |
| 87 | __raw_writew(0x2240, INTC_ICR1); | ||
| 151 | #endif | 88 | #endif |
| 152 | outw(0xffff, HD64461_NIMR); | 89 | __raw_writew(0xffff, HD64461_NIMR); |
| 153 | 90 | ||
| 154 | /* IRQ 80 -> 95 belongs to HD64461 */ | 91 | /* IRQ 80 -> 95 belongs to HD64461 */ |
| 155 | for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) { | 92 | for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) |
| 156 | irq_desc[i].chip = &hd64461_irq_type; | 93 | set_irq_chip_and_handler(i, &hd64461_irq_chip, |
| 157 | } | 94 | handle_level_irq); |
| 158 | |||
| 159 | setup_irq(CONFIG_HD64461_IRQ, &irq0); | ||
| 160 | 95 | ||
| 161 | #ifdef CONFIG_HD64461_ENABLER | 96 | #ifdef CONFIG_HD64461_ENABLER |
| 162 | printk(KERN_INFO "HD64461: enabling PCMCIA devices\n"); | 97 | printk(KERN_INFO "HD64461: enabling PCMCIA devices\n"); |
| 163 | outb(0x4c, HD64461_PCC1CSCIER); | 98 | __raw_writeb(0x4c, HD64461_PCC1CSCIER); |
| 164 | outb(0x00, HD64461_PCC1CSCR); | 99 | __raw_writeb(0x00, HD64461_PCC1CSCR); |
| 165 | #endif | 100 | #endif |
| 166 | 101 | ||
| 167 | return 0; | 102 | return 0; |
diff --git a/arch/sh/configs/edosk7705_defconfig b/arch/sh/configs/edosk7705_defconfig new file mode 100644 index 000000000000..8f4329fbbd39 --- /dev/null +++ b/arch/sh/configs/edosk7705_defconfig | |||
| @@ -0,0 +1,438 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.28-rc6 | ||
| 4 | # Wed Dec 17 13:53:02 2008 | ||
| 5 | # | ||
| 6 | CONFIG_SUPERH=y | ||
| 7 | CONFIG_SUPERH32=y | ||
| 8 | CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig" | ||
| 9 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 10 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
| 11 | CONFIG_GENERIC_HWEIGHT=y | ||
| 12 | CONFIG_GENERIC_HARDIRQS=y | ||
| 13 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 14 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 15 | # CONFIG_GENERIC_GPIO is not set | ||
| 16 | CONFIG_GENERIC_TIME=y | ||
| 17 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 18 | # CONFIG_ARCH_SUSPEND_POSSIBLE is not set | ||
| 19 | # CONFIG_ARCH_HIBERNATION_POSSIBLE is not set | ||
| 20 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 21 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 22 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 23 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 24 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 25 | CONFIG_ARCH_NO_VIRT_TO_BUS=y | ||
| 26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 27 | |||
| 28 | # | ||
| 29 | # General setup | ||
| 30 | # | ||
| 31 | # CONFIG_EXPERIMENTAL is not set | ||
| 32 | CONFIG_BROKEN_ON_SMP=y | ||
| 33 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 34 | CONFIG_LOCALVERSION="" | ||
| 35 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 36 | # CONFIG_SYSVIPC is not set | ||
| 37 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 38 | # CONFIG_IKCONFIG is not set | ||
| 39 | CONFIG_LOG_BUF_SHIFT=17 | ||
| 40 | # CONFIG_CGROUPS is not set | ||
| 41 | # CONFIG_RELAY is not set | ||
| 42 | # CONFIG_NAMESPACES is not set | ||
| 43 | # CONFIG_BLK_DEV_INITRD is not set | ||
| 44 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
| 45 | CONFIG_EMBEDDED=y | ||
| 46 | # CONFIG_UID16 is not set | ||
| 47 | # CONFIG_SYSCTL_SYSCALL is not set | ||
| 48 | # CONFIG_KALLSYMS is not set | ||
| 49 | # CONFIG_HOTPLUG is not set | ||
| 50 | # CONFIG_PRINTK is not set | ||
| 51 | # CONFIG_BUG is not set | ||
| 52 | # CONFIG_ELF_CORE is not set | ||
| 53 | # CONFIG_COMPAT_BRK is not set | ||
| 54 | # CONFIG_BASE_FULL is not set | ||
| 55 | # CONFIG_FUTEX is not set | ||
| 56 | # CONFIG_EPOLL is not set | ||
| 57 | # CONFIG_SIGNALFD is not set | ||
| 58 | # CONFIG_TIMERFD is not set | ||
| 59 | # CONFIG_EVENTFD is not set | ||
| 60 | CONFIG_SHMEM=y | ||
| 61 | # CONFIG_AIO is not set | ||
| 62 | # CONFIG_VM_EVENT_COUNTERS is not set | ||
| 63 | # CONFIG_SLAB is not set | ||
| 64 | CONFIG_SLUB=y | ||
| 65 | # CONFIG_SLOB is not set | ||
| 66 | # CONFIG_PROFILING is not set | ||
| 67 | # CONFIG_MARKERS is not set | ||
| 68 | CONFIG_HAVE_OPROFILE=y | ||
| 69 | CONFIG_HAVE_IOREMAP_PROT=y | ||
| 70 | CONFIG_HAVE_KPROBES=y | ||
| 71 | CONFIG_HAVE_KRETPROBES=y | ||
| 72 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
| 73 | CONFIG_HAVE_CLK=y | ||
| 74 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 75 | # CONFIG_TINY_SHMEM is not set | ||
| 76 | CONFIG_BASE_SMALL=1 | ||
| 77 | # CONFIG_MODULES is not set | ||
| 78 | # CONFIG_BLOCK is not set | ||
| 79 | CONFIG_CLASSIC_RCU=y | ||
| 80 | # CONFIG_FREEZER is not set | ||
| 81 | |||
| 82 | # | ||
| 83 | # System type | ||
| 84 | # | ||
| 85 | CONFIG_CPU_SH3=y | ||
| 86 | # CONFIG_CPU_SUBTYPE_SH7619 is not set | ||
| 87 | # CONFIG_CPU_SUBTYPE_SH7201 is not set | ||
| 88 | # CONFIG_CPU_SUBTYPE_SH7203 is not set | ||
| 89 | # CONFIG_CPU_SUBTYPE_SH7206 is not set | ||
| 90 | # CONFIG_CPU_SUBTYPE_SH7263 is not set | ||
| 91 | # CONFIG_CPU_SUBTYPE_MXG is not set | ||
| 92 | CONFIG_CPU_SUBTYPE_SH7705=y | ||
| 93 | # CONFIG_CPU_SUBTYPE_SH7706 is not set | ||
| 94 | # CONFIG_CPU_SUBTYPE_SH7707 is not set | ||
| 95 | # CONFIG_CPU_SUBTYPE_SH7708 is not set | ||
| 96 | # CONFIG_CPU_SUBTYPE_SH7709 is not set | ||
| 97 | # CONFIG_CPU_SUBTYPE_SH7710 is not set | ||
| 98 | # CONFIG_CPU_SUBTYPE_SH7712 is not set | ||
| 99 | # CONFIG_CPU_SUBTYPE_SH7720 is not set | ||
| 100 | # CONFIG_CPU_SUBTYPE_SH7721 is not set | ||
| 101 | # CONFIG_CPU_SUBTYPE_SH7750 is not set | ||
| 102 | # CONFIG_CPU_SUBTYPE_SH7091 is not set | ||
| 103 | # CONFIG_CPU_SUBTYPE_SH7750R is not set | ||
| 104 | # CONFIG_CPU_SUBTYPE_SH7750S is not set | ||
| 105 | # CONFIG_CPU_SUBTYPE_SH7751 is not set | ||
| 106 | # CONFIG_CPU_SUBTYPE_SH7751R is not set | ||
| 107 | # CONFIG_CPU_SUBTYPE_SH7760 is not set | ||
| 108 | # CONFIG_CPU_SUBTYPE_SH4_202 is not set | ||
| 109 | # CONFIG_CPU_SUBTYPE_SH7723 is not set | ||
| 110 | # CONFIG_CPU_SUBTYPE_SH7763 is not set | ||
| 111 | # CONFIG_CPU_SUBTYPE_SH7770 is not set | ||
| 112 | # CONFIG_CPU_SUBTYPE_SH7780 is not set | ||
| 113 | # CONFIG_CPU_SUBTYPE_SH7785 is not set | ||
| 114 | # CONFIG_CPU_SUBTYPE_SHX3 is not set | ||
| 115 | # CONFIG_CPU_SUBTYPE_SH7343 is not set | ||
| 116 | # CONFIG_CPU_SUBTYPE_SH7722 is not set | ||
| 117 | # CONFIG_CPU_SUBTYPE_SH7366 is not set | ||
| 118 | # CONFIG_CPU_SUBTYPE_SH5_101 is not set | ||
| 119 | # CONFIG_CPU_SUBTYPE_SH5_103 is not set | ||
| 120 | |||
| 121 | # | ||
| 122 | # Memory management options | ||
| 123 | # | ||
| 124 | CONFIG_QUICKLIST=y | ||
| 125 | CONFIG_MMU=y | ||
| 126 | CONFIG_PAGE_OFFSET=0x80000000 | ||
| 127 | CONFIG_MEMORY_START=0x08000000 | ||
| 128 | CONFIG_MEMORY_SIZE=0x04000000 | ||
| 129 | CONFIG_29BIT=y | ||
| 130 | CONFIG_VSYSCALL=y | ||
| 131 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
| 132 | CONFIG_ARCH_SPARSEMEM_ENABLE=y | ||
| 133 | CONFIG_ARCH_SPARSEMEM_DEFAULT=y | ||
| 134 | CONFIG_MAX_ACTIVE_REGIONS=1 | ||
| 135 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
| 136 | CONFIG_ARCH_SELECT_MEMORY_MODEL=y | ||
| 137 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
| 138 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
| 139 | CONFIG_PAGE_SIZE_4KB=y | ||
| 140 | # CONFIG_PAGE_SIZE_8KB is not set | ||
| 141 | # CONFIG_PAGE_SIZE_16KB is not set | ||
| 142 | # CONFIG_PAGE_SIZE_64KB is not set | ||
| 143 | CONFIG_ENTRY_OFFSET=0x00001000 | ||
| 144 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 145 | # CONFIG_FLATMEM_MANUAL is not set | ||
| 146 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 147 | CONFIG_SPARSEMEM_MANUAL=y | ||
| 148 | CONFIG_SPARSEMEM=y | ||
| 149 | CONFIG_HAVE_MEMORY_PRESENT=y | ||
| 150 | CONFIG_SPARSEMEM_STATIC=y | ||
| 151 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 152 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 153 | CONFIG_MIGRATION=y | ||
| 154 | # CONFIG_RESOURCES_64BIT is not set | ||
| 155 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 156 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 157 | CONFIG_NR_QUICK=2 | ||
| 158 | CONFIG_UNEVICTABLE_LRU=y | ||
| 159 | |||
| 160 | # | ||
| 161 | # Cache configuration | ||
| 162 | # | ||
| 163 | CONFIG_SH7705_CACHE_32KB=y | ||
| 164 | # CONFIG_SH_DIRECT_MAPPED is not set | ||
| 165 | CONFIG_CACHE_WRITEBACK=y | ||
| 166 | # CONFIG_CACHE_WRITETHROUGH is not set | ||
| 167 | # CONFIG_CACHE_OFF is not set | ||
| 168 | |||
| 169 | # | ||
| 170 | # Processor features | ||
| 171 | # | ||
| 172 | CONFIG_CPU_LITTLE_ENDIAN=y | ||
| 173 | # CONFIG_CPU_BIG_ENDIAN is not set | ||
| 174 | CONFIG_SH_ADC=y | ||
| 175 | CONFIG_CPU_HAS_INTEVT=y | ||
| 176 | CONFIG_CPU_HAS_SR_RB=y | ||
| 177 | |||
| 178 | # | ||
| 179 | # Board support | ||
| 180 | # | ||
| 181 | # CONFIG_SH_SOLUTION_ENGINE is not set | ||
| 182 | CONFIG_SH_EDOSK7705=y | ||
| 183 | |||
| 184 | # | ||
| 185 | # Timer and clock configuration | ||
| 186 | # | ||
| 187 | CONFIG_SH_TMU=y | ||
| 188 | CONFIG_SH_TIMER_IRQ=16 | ||
| 189 | CONFIG_SH_PCLK_FREQ=31250000 | ||
| 190 | # CONFIG_NO_HZ is not set | ||
| 191 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 192 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 193 | |||
| 194 | # | ||
| 195 | # CPU Frequency scaling | ||
| 196 | # | ||
| 197 | # CONFIG_CPU_FREQ is not set | ||
| 198 | |||
| 199 | # | ||
| 200 | # DMA support | ||
| 201 | # | ||
| 202 | # CONFIG_SH_DMA is not set | ||
| 203 | |||
| 204 | # | ||
| 205 | # Companion Chips | ||
| 206 | # | ||
| 207 | |||
| 208 | # | ||
| 209 | # Additional SuperH Device Drivers | ||
| 210 | # | ||
| 211 | # CONFIG_HEARTBEAT is not set | ||
| 212 | # CONFIG_PUSH_SWITCH is not set | ||
| 213 | |||
| 214 | # | ||
| 215 | # Kernel features | ||
| 216 | # | ||
| 217 | # CONFIG_HZ_100 is not set | ||
| 218 | CONFIG_HZ_250=y | ||
| 219 | # CONFIG_HZ_300 is not set | ||
| 220 | # CONFIG_HZ_1000 is not set | ||
| 221 | CONFIG_HZ=250 | ||
| 222 | # CONFIG_SCHED_HRTICK is not set | ||
| 223 | CONFIG_PREEMPT_NONE=y | ||
| 224 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 225 | # CONFIG_PREEMPT is not set | ||
| 226 | CONFIG_GUSA=y | ||
| 227 | # CONFIG_GUSA_RB is not set | ||
| 228 | |||
| 229 | # | ||
| 230 | # Boot options | ||
| 231 | # | ||
| 232 | CONFIG_ZERO_PAGE_OFFSET=0x00001000 | ||
| 233 | CONFIG_BOOT_LINK_OFFSET=0x00800000 | ||
| 234 | # CONFIG_CMDLINE_BOOL is not set | ||
| 235 | |||
| 236 | # | ||
| 237 | # Bus options | ||
| 238 | # | ||
| 239 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 240 | |||
| 241 | # | ||
| 242 | # Executable file formats | ||
| 243 | # | ||
| 244 | CONFIG_BINFMT_ELF=y | ||
| 245 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 246 | # CONFIG_HAVE_AOUT is not set | ||
| 247 | # CONFIG_BINFMT_MISC is not set | ||
| 248 | # CONFIG_NET is not set | ||
| 249 | |||
| 250 | # | ||
| 251 | # Device Drivers | ||
| 252 | # | ||
| 253 | |||
| 254 | # | ||
| 255 | # Generic Driver Options | ||
| 256 | # | ||
| 257 | CONFIG_STANDALONE=y | ||
| 258 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
| 259 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 260 | # CONFIG_MTD is not set | ||
| 261 | # CONFIG_PARPORT is not set | ||
| 262 | # CONFIG_MISC_DEVICES is not set | ||
| 263 | CONFIG_HAVE_IDE=y | ||
| 264 | |||
| 265 | # | ||
| 266 | # SCSI device support | ||
| 267 | # | ||
| 268 | # CONFIG_SCSI_DMA is not set | ||
| 269 | # CONFIG_SCSI_NETLINK is not set | ||
| 270 | # CONFIG_PHONE is not set | ||
| 271 | |||
| 272 | # | ||
| 273 | # Input device support | ||
| 274 | # | ||
| 275 | # CONFIG_INPUT is not set | ||
| 276 | |||
| 277 | # | ||
| 278 | # Hardware I/O ports | ||
| 279 | # | ||
| 280 | # CONFIG_SERIO is not set | ||
| 281 | # CONFIG_GAMEPORT is not set | ||
| 282 | |||
| 283 | # | ||
| 284 | # Character devices | ||
| 285 | # | ||
| 286 | # CONFIG_VT is not set | ||
| 287 | # CONFIG_DEVKMEM is not set | ||
| 288 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 289 | |||
| 290 | # | ||
| 291 | # Serial drivers | ||
| 292 | # | ||
| 293 | # CONFIG_SERIAL_8250 is not set | ||
| 294 | |||
| 295 | # | ||
| 296 | # Non-8250 serial port support | ||
| 297 | # | ||
| 298 | # CONFIG_SERIAL_SH_SCI is not set | ||
| 299 | # CONFIG_UNIX98_PTYS is not set | ||
| 300 | # CONFIG_LEGACY_PTYS is not set | ||
| 301 | # CONFIG_IPMI_HANDLER is not set | ||
| 302 | # CONFIG_HW_RANDOM is not set | ||
| 303 | # CONFIG_R3964 is not set | ||
| 304 | # CONFIG_I2C is not set | ||
| 305 | # CONFIG_SPI is not set | ||
| 306 | # CONFIG_W1 is not set | ||
| 307 | # CONFIG_POWER_SUPPLY is not set | ||
| 308 | # CONFIG_HWMON is not set | ||
| 309 | # CONFIG_THERMAL is not set | ||
| 310 | # CONFIG_THERMAL_HWMON is not set | ||
| 311 | # CONFIG_WATCHDOG is not set | ||
| 312 | CONFIG_SSB_POSSIBLE=y | ||
| 313 | |||
| 314 | # | ||
| 315 | # Sonics Silicon Backplane | ||
| 316 | # | ||
| 317 | # CONFIG_SSB is not set | ||
| 318 | |||
| 319 | # | ||
| 320 | # Multifunction device drivers | ||
| 321 | # | ||
| 322 | # CONFIG_MFD_CORE is not set | ||
| 323 | # CONFIG_MFD_SM501 is not set | ||
| 324 | # CONFIG_HTC_PASIC3 is not set | ||
| 325 | # CONFIG_MFD_TMIO is not set | ||
| 326 | # CONFIG_REGULATOR is not set | ||
| 327 | |||
| 328 | # | ||
| 329 | # Multimedia devices | ||
| 330 | # | ||
| 331 | |||
| 332 | # | ||
| 333 | # Multimedia core support | ||
| 334 | # | ||
| 335 | # CONFIG_VIDEO_DEV is not set | ||
| 336 | # CONFIG_VIDEO_MEDIA is not set | ||
| 337 | |||
| 338 | # | ||
| 339 | # Multimedia drivers | ||
| 340 | # | ||
| 341 | # CONFIG_DAB is not set | ||
| 342 | |||
| 343 | # | ||
| 344 | # Graphics support | ||
| 345 | # | ||
| 346 | # CONFIG_VGASTATE is not set | ||
| 347 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 348 | # CONFIG_FB is not set | ||
| 349 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 350 | |||
| 351 | # | ||
| 352 | # Display device support | ||
| 353 | # | ||
| 354 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 355 | # CONFIG_SOUND is not set | ||
| 356 | # CONFIG_USB_SUPPORT is not set | ||
| 357 | # CONFIG_MMC is not set | ||
| 358 | # CONFIG_MEMSTICK is not set | ||
| 359 | # CONFIG_NEW_LEDS is not set | ||
| 360 | # CONFIG_ACCESSIBILITY is not set | ||
| 361 | # CONFIG_RTC_CLASS is not set | ||
| 362 | # CONFIG_DMADEVICES is not set | ||
| 363 | # CONFIG_UIO is not set | ||
| 364 | # CONFIG_STAGING is not set | ||
| 365 | CONFIG_STAGING_EXCLUDE_BUILD=y | ||
| 366 | |||
| 367 | # | ||
| 368 | # File systems | ||
| 369 | # | ||
| 370 | # CONFIG_DNOTIFY is not set | ||
| 371 | # CONFIG_INOTIFY is not set | ||
| 372 | # CONFIG_QUOTA is not set | ||
| 373 | # CONFIG_AUTOFS_FS is not set | ||
| 374 | # CONFIG_AUTOFS4_FS is not set | ||
| 375 | # CONFIG_FUSE_FS is not set | ||
| 376 | |||
| 377 | # | ||
| 378 | # Pseudo filesystems | ||
| 379 | # | ||
| 380 | # CONFIG_PROC_FS is not set | ||
| 381 | # CONFIG_SYSFS is not set | ||
| 382 | # CONFIG_TMPFS is not set | ||
| 383 | # CONFIG_HUGETLBFS is not set | ||
| 384 | # CONFIG_HUGETLB_PAGE is not set | ||
| 385 | |||
| 386 | # | ||
| 387 | # Miscellaneous filesystems | ||
| 388 | # | ||
| 389 | # CONFIG_NLS is not set | ||
| 390 | |||
| 391 | # | ||
| 392 | # Kernel hacking | ||
| 393 | # | ||
| 394 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 395 | # CONFIG_ENABLE_WARN_DEPRECATED is not set | ||
| 396 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
| 397 | CONFIG_FRAME_WARN=1024 | ||
| 398 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 399 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 400 | # CONFIG_HEADERS_CHECK is not set | ||
| 401 | # CONFIG_DEBUG_KERNEL is not set | ||
| 402 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 403 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 404 | # CONFIG_LATENCYTOP is not set | ||
| 405 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 406 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 407 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
| 408 | |||
| 409 | # | ||
| 410 | # Tracers | ||
| 411 | # | ||
| 412 | # CONFIG_SAMPLES is not set | ||
| 413 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 414 | # CONFIG_SH_STANDARD_BIOS is not set | ||
| 415 | # CONFIG_EARLY_SCIF_CONSOLE is not set | ||
| 416 | # CONFIG_MORE_COMPILE_OPTIONS is not set | ||
| 417 | |||
| 418 | # | ||
| 419 | # Security options | ||
| 420 | # | ||
| 421 | # CONFIG_KEYS is not set | ||
| 422 | # CONFIG_SECURITYFS is not set | ||
| 423 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 424 | # CONFIG_CRYPTO is not set | ||
| 425 | |||
| 426 | # | ||
| 427 | # Library routines | ||
| 428 | # | ||
| 429 | # CONFIG_CRC_CCITT is not set | ||
| 430 | # CONFIG_CRC16 is not set | ||
| 431 | # CONFIG_CRC_T10DIF is not set | ||
| 432 | # CONFIG_CRC_ITU_T is not set | ||
| 433 | # CONFIG_CRC32 is not set | ||
| 434 | # CONFIG_CRC7 is not set | ||
| 435 | # CONFIG_LIBCRC32C is not set | ||
| 436 | CONFIG_HAS_IOMEM=y | ||
| 437 | CONFIG_HAS_IOPORT=y | ||
| 438 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/sh/configs/rsk7201_defconfig b/arch/sh/configs/rsk7201_defconfig new file mode 100644 index 000000000000..014c18cbf46a --- /dev/null +++ b/arch/sh/configs/rsk7201_defconfig | |||
| @@ -0,0 +1,703 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.28-rc6 | ||
| 4 | # Mon Dec 8 14:48:02 2008 | ||
| 5 | # | ||
| 6 | CONFIG_SUPERH=y | ||
| 7 | CONFIG_SUPERH32=y | ||
| 8 | CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig" | ||
| 9 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 10 | CONFIG_GENERIC_BUG=y | ||
| 11 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
| 12 | CONFIG_GENERIC_HWEIGHT=y | ||
| 13 | CONFIG_GENERIC_HARDIRQS=y | ||
| 14 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 15 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 16 | # CONFIG_GENERIC_GPIO is not set | ||
| 17 | # CONFIG_GENERIC_TIME is not set | ||
| 18 | # CONFIG_GENERIC_CLOCKEVENTS is not set | ||
| 19 | # CONFIG_ARCH_SUSPEND_POSSIBLE is not set | ||
| 20 | # CONFIG_ARCH_HIBERNATION_POSSIBLE is not set | ||
| 21 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 22 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 23 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 24 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 25 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 26 | CONFIG_ARCH_NO_VIRT_TO_BUS=y | ||
| 27 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 28 | |||
| 29 | # | ||
| 30 | # General setup | ||
| 31 | # | ||
| 32 | CONFIG_EXPERIMENTAL=y | ||
| 33 | CONFIG_BROKEN_ON_SMP=y | ||
| 34 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 35 | CONFIG_LOCALVERSION="" | ||
| 36 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 37 | CONFIG_SYSVIPC=y | ||
| 38 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 39 | CONFIG_BSD_PROCESS_ACCT=y | ||
| 40 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
| 41 | CONFIG_IKCONFIG=y | ||
| 42 | # CONFIG_IKCONFIG_PROC is not set | ||
| 43 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 44 | # CONFIG_CGROUPS is not set | ||
| 45 | # CONFIG_GROUP_SCHED is not set | ||
| 46 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | ||
| 47 | # CONFIG_RELAY is not set | ||
| 48 | CONFIG_NAMESPACES=y | ||
| 49 | CONFIG_UTS_NS=y | ||
| 50 | CONFIG_IPC_NS=y | ||
| 51 | CONFIG_USER_NS=y | ||
| 52 | CONFIG_PID_NS=y | ||
| 53 | CONFIG_BLK_DEV_INITRD=y | ||
| 54 | CONFIG_INITRAMFS_SOURCE="" | ||
| 55 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 56 | CONFIG_SYSCTL=y | ||
| 57 | CONFIG_EMBEDDED=y | ||
| 58 | CONFIG_UID16=y | ||
| 59 | CONFIG_SYSCTL_SYSCALL=y | ||
| 60 | CONFIG_KALLSYMS=y | ||
| 61 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 62 | CONFIG_HOTPLUG=y | ||
| 63 | CONFIG_PRINTK=y | ||
| 64 | CONFIG_BUG=y | ||
| 65 | CONFIG_ELF_CORE=y | ||
| 66 | CONFIG_COMPAT_BRK=y | ||
| 67 | CONFIG_BASE_FULL=y | ||
| 68 | CONFIG_FUTEX=y | ||
| 69 | CONFIG_ANON_INODES=y | ||
| 70 | CONFIG_EPOLL=y | ||
| 71 | CONFIG_SIGNALFD=y | ||
| 72 | CONFIG_TIMERFD=y | ||
| 73 | CONFIG_EVENTFD=y | ||
| 74 | # CONFIG_AIO is not set | ||
| 75 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 76 | # CONFIG_SLAB is not set | ||
| 77 | # CONFIG_SLUB is not set | ||
| 78 | CONFIG_SLOB=y | ||
| 79 | CONFIG_PROFILING=y | ||
| 80 | # CONFIG_MARKERS is not set | ||
| 81 | CONFIG_OPROFILE=y | ||
| 82 | CONFIG_HAVE_OPROFILE=y | ||
| 83 | # CONFIG_KPROBES is not set | ||
| 84 | CONFIG_HAVE_KPROBES=y | ||
| 85 | CONFIG_HAVE_KRETPROBES=y | ||
| 86 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
| 87 | CONFIG_HAVE_CLK=y | ||
| 88 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 89 | CONFIG_RT_MUTEXES=y | ||
| 90 | CONFIG_TINY_SHMEM=y | ||
| 91 | CONFIG_BASE_SMALL=0 | ||
| 92 | CONFIG_MODULES=y | ||
| 93 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 94 | # CONFIG_MODULE_UNLOAD is not set | ||
| 95 | # CONFIG_MODVERSIONS is not set | ||
| 96 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 97 | CONFIG_KMOD=y | ||
| 98 | CONFIG_BLOCK=y | ||
| 99 | # CONFIG_LBD is not set | ||
| 100 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 101 | # CONFIG_LSF is not set | ||
| 102 | # CONFIG_BLK_DEV_BSG is not set | ||
| 103 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 104 | |||
| 105 | # | ||
| 106 | # IO Schedulers | ||
| 107 | # | ||
| 108 | CONFIG_IOSCHED_NOOP=y | ||
| 109 | # CONFIG_IOSCHED_AS is not set | ||
| 110 | # CONFIG_IOSCHED_DEADLINE is not set | ||
| 111 | # CONFIG_IOSCHED_CFQ is not set | ||
| 112 | # CONFIG_DEFAULT_AS is not set | ||
| 113 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 114 | # CONFIG_DEFAULT_CFQ is not set | ||
| 115 | CONFIG_DEFAULT_NOOP=y | ||
| 116 | CONFIG_DEFAULT_IOSCHED="noop" | ||
| 117 | CONFIG_CLASSIC_RCU=y | ||
| 118 | # CONFIG_FREEZER is not set | ||
| 119 | |||
| 120 | # | ||
| 121 | # System type | ||
| 122 | # | ||
| 123 | CONFIG_CPU_SH2=y | ||
| 124 | CONFIG_CPU_SH2A=y | ||
| 125 | # CONFIG_CPU_SUBTYPE_SH7619 is not set | ||
| 126 | CONFIG_CPU_SUBTYPE_SH7201=y | ||
| 127 | # CONFIG_CPU_SUBTYPE_SH7203 is not set | ||
| 128 | # CONFIG_CPU_SUBTYPE_SH7206 is not set | ||
| 129 | # CONFIG_CPU_SUBTYPE_SH7263 is not set | ||
| 130 | # CONFIG_CPU_SUBTYPE_MXG is not set | ||
| 131 | # CONFIG_CPU_SUBTYPE_SH7705 is not set | ||
| 132 | # CONFIG_CPU_SUBTYPE_SH7706 is not set | ||
| 133 | # CONFIG_CPU_SUBTYPE_SH7707 is not set | ||
| 134 | # CONFIG_CPU_SUBTYPE_SH7708 is not set | ||
| 135 | # CONFIG_CPU_SUBTYPE_SH7709 is not set | ||
| 136 | # CONFIG_CPU_SUBTYPE_SH7710 is not set | ||
| 137 | # CONFIG_CPU_SUBTYPE_SH7712 is not set | ||
| 138 | # CONFIG_CPU_SUBTYPE_SH7720 is not set | ||
| 139 | # CONFIG_CPU_SUBTYPE_SH7721 is not set | ||
| 140 | # CONFIG_CPU_SUBTYPE_SH7750 is not set | ||
| 141 | # CONFIG_CPU_SUBTYPE_SH7091 is not set | ||
| 142 | # CONFIG_CPU_SUBTYPE_SH7750R is not set | ||
| 143 | # CONFIG_CPU_SUBTYPE_SH7750S is not set | ||
| 144 | # CONFIG_CPU_SUBTYPE_SH7751 is not set | ||
| 145 | # CONFIG_CPU_SUBTYPE_SH7751R is not set | ||
| 146 | # CONFIG_CPU_SUBTYPE_SH7760 is not set | ||
| 147 | # CONFIG_CPU_SUBTYPE_SH4_202 is not set | ||
| 148 | # CONFIG_CPU_SUBTYPE_SH7723 is not set | ||
| 149 | # CONFIG_CPU_SUBTYPE_SH7763 is not set | ||
| 150 | # CONFIG_CPU_SUBTYPE_SH7770 is not set | ||
| 151 | # CONFIG_CPU_SUBTYPE_SH7780 is not set | ||
| 152 | # CONFIG_CPU_SUBTYPE_SH7785 is not set | ||
| 153 | # CONFIG_CPU_SUBTYPE_SHX3 is not set | ||
| 154 | # CONFIG_CPU_SUBTYPE_SH7343 is not set | ||
| 155 | # CONFIG_CPU_SUBTYPE_SH7722 is not set | ||
| 156 | # CONFIG_CPU_SUBTYPE_SH7366 is not set | ||
| 157 | # CONFIG_CPU_SUBTYPE_SH5_101 is not set | ||
| 158 | # CONFIG_CPU_SUBTYPE_SH5_103 is not set | ||
| 159 | |||
| 160 | # | ||
| 161 | # Memory management options | ||
| 162 | # | ||
| 163 | CONFIG_QUICKLIST=y | ||
| 164 | CONFIG_PAGE_OFFSET=0x00000000 | ||
| 165 | CONFIG_MEMORY_START=0x08000000 | ||
| 166 | CONFIG_MEMORY_SIZE=0x01000000 | ||
| 167 | CONFIG_29BIT=y | ||
| 168 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
| 169 | CONFIG_ARCH_SPARSEMEM_ENABLE=y | ||
| 170 | CONFIG_ARCH_SPARSEMEM_DEFAULT=y | ||
| 171 | CONFIG_MAX_ACTIVE_REGIONS=1 | ||
| 172 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
| 173 | CONFIG_ARCH_SELECT_MEMORY_MODEL=y | ||
| 174 | CONFIG_PAGE_SIZE_4KB=y | ||
| 175 | # CONFIG_PAGE_SIZE_8KB is not set | ||
| 176 | # CONFIG_PAGE_SIZE_16KB is not set | ||
| 177 | # CONFIG_PAGE_SIZE_64KB is not set | ||
| 178 | CONFIG_ENTRY_OFFSET=0x00001000 | ||
| 179 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 180 | CONFIG_FLATMEM_MANUAL=y | ||
| 181 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 182 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 183 | CONFIG_FLATMEM=y | ||
| 184 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 185 | CONFIG_SPARSEMEM_STATIC=y | ||
| 186 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 187 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 188 | # CONFIG_RESOURCES_64BIT is not set | ||
| 189 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 190 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 191 | CONFIG_NR_QUICK=2 | ||
| 192 | |||
| 193 | # | ||
| 194 | # Cache configuration | ||
| 195 | # | ||
| 196 | # CONFIG_SH_DIRECT_MAPPED is not set | ||
| 197 | CONFIG_CACHE_WRITEBACK=y | ||
| 198 | # CONFIG_CACHE_WRITETHROUGH is not set | ||
| 199 | # CONFIG_CACHE_OFF is not set | ||
| 200 | |||
| 201 | # | ||
| 202 | # Processor features | ||
| 203 | # | ||
| 204 | # CONFIG_CPU_LITTLE_ENDIAN is not set | ||
| 205 | CONFIG_CPU_BIG_ENDIAN=y | ||
| 206 | CONFIG_SH_FPU=y | ||
| 207 | CONFIG_CPU_HAS_FPU=y | ||
| 208 | |||
| 209 | # | ||
| 210 | # Board support | ||
| 211 | # | ||
| 212 | CONFIG_SH_RSK=y | ||
| 213 | CONFIG_SH_RSK7201=y | ||
| 214 | # CONFIG_SH_RSK7203 is not set | ||
| 215 | |||
| 216 | # | ||
| 217 | # Timer and clock configuration | ||
| 218 | # | ||
| 219 | # CONFIG_SH_CMT is not set | ||
| 220 | CONFIG_SH_MTU2=y | ||
| 221 | CONFIG_SH_TIMER_IRQ=16 | ||
| 222 | CONFIG_SH_PCLK_FREQ=40000000 | ||
| 223 | CONFIG_SH_CLK_MD=0 | ||
| 224 | |||
| 225 | # | ||
| 226 | # CPU Frequency scaling | ||
| 227 | # | ||
| 228 | # CONFIG_CPU_FREQ is not set | ||
| 229 | |||
| 230 | # | ||
| 231 | # DMA support | ||
| 232 | # | ||
| 233 | |||
| 234 | # | ||
| 235 | # Companion Chips | ||
| 236 | # | ||
| 237 | |||
| 238 | # | ||
| 239 | # Additional SuperH Device Drivers | ||
| 240 | # | ||
| 241 | # CONFIG_HEARTBEAT is not set | ||
| 242 | # CONFIG_PUSH_SWITCH is not set | ||
| 243 | |||
| 244 | # | ||
| 245 | # Kernel features | ||
| 246 | # | ||
| 247 | # CONFIG_HZ_100 is not set | ||
| 248 | # CONFIG_HZ_250 is not set | ||
| 249 | # CONFIG_HZ_300 is not set | ||
| 250 | CONFIG_HZ_1000=y | ||
| 251 | CONFIG_HZ=1000 | ||
| 252 | # CONFIG_SCHED_HRTICK is not set | ||
| 253 | # CONFIG_KEXEC is not set | ||
| 254 | # CONFIG_CRASH_DUMP is not set | ||
| 255 | # CONFIG_SECCOMP is not set | ||
| 256 | CONFIG_PREEMPT_NONE=y | ||
| 257 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 258 | # CONFIG_PREEMPT is not set | ||
| 259 | CONFIG_GUSA=y | ||
| 260 | |||
| 261 | # | ||
| 262 | # Boot options | ||
| 263 | # | ||
| 264 | CONFIG_ZERO_PAGE_OFFSET=0x00001000 | ||
| 265 | CONFIG_BOOT_LINK_OFFSET=0x00800000 | ||
| 266 | CONFIG_CMDLINE_BOOL=y | ||
| 267 | CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=serial ignore_loglevel" | ||
| 268 | |||
| 269 | # | ||
| 270 | # Bus options | ||
| 271 | # | ||
| 272 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 273 | # CONFIG_PCCARD is not set | ||
| 274 | |||
| 275 | # | ||
| 276 | # Executable file formats | ||
| 277 | # | ||
| 278 | CONFIG_BINFMT_ELF_FDPIC=y | ||
| 279 | CONFIG_BINFMT_FLAT=y | ||
| 280 | CONFIG_BINFMT_ZFLAT=y | ||
| 281 | CONFIG_BINFMT_SHARED_FLAT=y | ||
| 282 | # CONFIG_HAVE_AOUT is not set | ||
| 283 | # CONFIG_BINFMT_MISC is not set | ||
| 284 | |||
| 285 | # | ||
| 286 | # Power management options (EXPERIMENTAL) | ||
| 287 | # | ||
| 288 | CONFIG_PM=y | ||
| 289 | # CONFIG_PM_DEBUG is not set | ||
| 290 | CONFIG_CPU_IDLE=y | ||
| 291 | CONFIG_CPU_IDLE_GOV_LADDER=y | ||
| 292 | # CONFIG_NET is not set | ||
| 293 | |||
| 294 | # | ||
| 295 | # Device Drivers | ||
| 296 | # | ||
| 297 | |||
| 298 | # | ||
| 299 | # Generic Driver Options | ||
| 300 | # | ||
| 301 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 302 | # CONFIG_STANDALONE is not set | ||
| 303 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
| 304 | # CONFIG_FW_LOADER is not set | ||
| 305 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 306 | CONFIG_MTD=y | ||
| 307 | # CONFIG_MTD_DEBUG is not set | ||
| 308 | CONFIG_MTD_CONCAT=y | ||
| 309 | CONFIG_MTD_PARTITIONS=y | ||
| 310 | CONFIG_MTD_REDBOOT_PARTS=y | ||
| 311 | CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 | ||
| 312 | # CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set | ||
| 313 | # CONFIG_MTD_REDBOOT_PARTS_READONLY is not set | ||
| 314 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
| 315 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 316 | |||
| 317 | # | ||
| 318 | # User Modules And Translation Layers | ||
| 319 | # | ||
| 320 | CONFIG_MTD_CHAR=y | ||
| 321 | CONFIG_MTD_BLKDEVS=y | ||
| 322 | CONFIG_MTD_BLOCK=y | ||
| 323 | # CONFIG_FTL is not set | ||
| 324 | # CONFIG_NFTL is not set | ||
| 325 | # CONFIG_INFTL is not set | ||
| 326 | # CONFIG_RFD_FTL is not set | ||
| 327 | # CONFIG_SSFDC is not set | ||
| 328 | # CONFIG_MTD_OOPS is not set | ||
| 329 | |||
| 330 | # | ||
| 331 | # RAM/ROM/Flash chip drivers | ||
| 332 | # | ||
| 333 | CONFIG_MTD_CFI=y | ||
| 334 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 335 | CONFIG_MTD_GEN_PROBE=y | ||
| 336 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
| 337 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 338 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 339 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 340 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 341 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 342 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 343 | CONFIG_MTD_CFI_I1=y | ||
| 344 | CONFIG_MTD_CFI_I2=y | ||
| 345 | # CONFIG_MTD_CFI_I4 is not set | ||
| 346 | # CONFIG_MTD_CFI_I8 is not set | ||
| 347 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
| 348 | CONFIG_MTD_CFI_AMDSTD=y | ||
| 349 | # CONFIG_MTD_CFI_STAA is not set | ||
| 350 | CONFIG_MTD_CFI_UTIL=y | ||
| 351 | # CONFIG_MTD_RAM is not set | ||
| 352 | # CONFIG_MTD_ROM is not set | ||
| 353 | # CONFIG_MTD_ABSENT is not set | ||
| 354 | |||
| 355 | # | ||
| 356 | # Mapping drivers for chip access | ||
| 357 | # | ||
| 358 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 359 | CONFIG_MTD_PHYSMAP=y | ||
| 360 | CONFIG_MTD_PHYSMAP_START=0x0 | ||
| 361 | CONFIG_MTD_PHYSMAP_LEN=0x0 | ||
| 362 | CONFIG_MTD_PHYSMAP_BANKWIDTH=4 | ||
| 363 | # CONFIG_MTD_PLATRAM is not set | ||
| 364 | |||
| 365 | # | ||
| 366 | # Self-contained MTD device drivers | ||
| 367 | # | ||
| 368 | # CONFIG_MTD_SLRAM is not set | ||
| 369 | # CONFIG_MTD_PHRAM is not set | ||
| 370 | # CONFIG_MTD_MTDRAM is not set | ||
| 371 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 372 | |||
| 373 | # | ||
| 374 | # Disk-On-Chip Device Drivers | ||
| 375 | # | ||
| 376 | # CONFIG_MTD_DOC2000 is not set | ||
| 377 | # CONFIG_MTD_DOC2001 is not set | ||
| 378 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 379 | # CONFIG_MTD_NAND is not set | ||
| 380 | # CONFIG_MTD_ONENAND is not set | ||
| 381 | |||
| 382 | # | ||
| 383 | # UBI - Unsorted block images | ||
| 384 | # | ||
| 385 | # CONFIG_MTD_UBI is not set | ||
| 386 | # CONFIG_PARPORT is not set | ||
| 387 | CONFIG_BLK_DEV=y | ||
| 388 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 389 | # CONFIG_BLK_DEV_LOOP is not set | ||
| 390 | # CONFIG_BLK_DEV_RAM is not set | ||
| 391 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 392 | # CONFIG_BLK_DEV_HD is not set | ||
| 393 | CONFIG_MISC_DEVICES=y | ||
| 394 | # CONFIG_EEPROM_93CX6 is not set | ||
| 395 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 396 | # CONFIG_C2PORT is not set | ||
| 397 | CONFIG_HAVE_IDE=y | ||
| 398 | # CONFIG_IDE is not set | ||
| 399 | |||
| 400 | # | ||
| 401 | # SCSI device support | ||
| 402 | # | ||
| 403 | # CONFIG_RAID_ATTRS is not set | ||
| 404 | # CONFIG_SCSI is not set | ||
| 405 | # CONFIG_SCSI_DMA is not set | ||
| 406 | # CONFIG_SCSI_NETLINK is not set | ||
| 407 | # CONFIG_ATA is not set | ||
| 408 | # CONFIG_MD is not set | ||
| 409 | # CONFIG_PHONE is not set | ||
| 410 | |||
| 411 | # | ||
| 412 | # Input device support | ||
| 413 | # | ||
| 414 | CONFIG_INPUT=y | ||
| 415 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 416 | # CONFIG_INPUT_POLLDEV is not set | ||
| 417 | |||
| 418 | # | ||
| 419 | # Userland interfaces | ||
| 420 | # | ||
| 421 | # CONFIG_INPUT_MOUSEDEV is not set | ||
| 422 | # CONFIG_INPUT_JOYDEV is not set | ||
| 423 | # CONFIG_INPUT_EVDEV is not set | ||
| 424 | # CONFIG_INPUT_EVBUG is not set | ||
| 425 | |||
| 426 | # | ||
| 427 | # Input Device Drivers | ||
| 428 | # | ||
| 429 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 430 | # CONFIG_INPUT_MOUSE is not set | ||
| 431 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 432 | # CONFIG_INPUT_TABLET is not set | ||
| 433 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 434 | # CONFIG_INPUT_MISC is not set | ||
| 435 | |||
| 436 | # | ||
| 437 | # Hardware I/O ports | ||
| 438 | # | ||
| 439 | # CONFIG_SERIO is not set | ||
| 440 | # CONFIG_GAMEPORT is not set | ||
| 441 | |||
| 442 | # | ||
| 443 | # Character devices | ||
| 444 | # | ||
| 445 | # CONFIG_VT is not set | ||
| 446 | CONFIG_DEVKMEM=y | ||
| 447 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 448 | |||
| 449 | # | ||
| 450 | # Serial drivers | ||
| 451 | # | ||
| 452 | # CONFIG_SERIAL_8250 is not set | ||
| 453 | |||
| 454 | # | ||
| 455 | # Non-8250 serial port support | ||
| 456 | # | ||
| 457 | CONFIG_SERIAL_SH_SCI=y | ||
| 458 | CONFIG_SERIAL_SH_SCI_NR_UARTS=8 | ||
| 459 | CONFIG_SERIAL_SH_SCI_CONSOLE=y | ||
| 460 | CONFIG_SERIAL_CORE=y | ||
| 461 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 462 | # CONFIG_UNIX98_PTYS is not set | ||
| 463 | # CONFIG_LEGACY_PTYS is not set | ||
| 464 | # CONFIG_IPMI_HANDLER is not set | ||
| 465 | # CONFIG_HW_RANDOM is not set | ||
| 466 | # CONFIG_R3964 is not set | ||
| 467 | # CONFIG_RAW_DRIVER is not set | ||
| 468 | # CONFIG_TCG_TPM is not set | ||
| 469 | # CONFIG_I2C is not set | ||
| 470 | # CONFIG_SPI is not set | ||
| 471 | # CONFIG_W1 is not set | ||
| 472 | # CONFIG_POWER_SUPPLY is not set | ||
| 473 | # CONFIG_HWMON is not set | ||
| 474 | CONFIG_THERMAL=y | ||
| 475 | # CONFIG_WATCHDOG is not set | ||
| 476 | CONFIG_SSB_POSSIBLE=y | ||
| 477 | |||
| 478 | # | ||
| 479 | # Sonics Silicon Backplane | ||
| 480 | # | ||
| 481 | # CONFIG_SSB is not set | ||
| 482 | |||
| 483 | # | ||
| 484 | # Multifunction device drivers | ||
| 485 | # | ||
| 486 | # CONFIG_MFD_CORE is not set | ||
| 487 | # CONFIG_MFD_SM501 is not set | ||
| 488 | # CONFIG_HTC_PASIC3 is not set | ||
| 489 | # CONFIG_MFD_TMIO is not set | ||
| 490 | # CONFIG_REGULATOR is not set | ||
| 491 | |||
| 492 | # | ||
| 493 | # Multimedia devices | ||
| 494 | # | ||
| 495 | |||
| 496 | # | ||
| 497 | # Multimedia core support | ||
| 498 | # | ||
| 499 | # CONFIG_VIDEO_DEV is not set | ||
| 500 | # CONFIG_VIDEO_MEDIA is not set | ||
| 501 | |||
| 502 | # | ||
| 503 | # Multimedia drivers | ||
| 504 | # | ||
| 505 | CONFIG_DAB=y | ||
| 506 | |||
| 507 | # | ||
| 508 | # Graphics support | ||
| 509 | # | ||
| 510 | # CONFIG_VGASTATE is not set | ||
| 511 | CONFIG_VIDEO_OUTPUT_CONTROL=y | ||
| 512 | # CONFIG_FB is not set | ||
| 513 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 514 | |||
| 515 | # | ||
| 516 | # Display device support | ||
| 517 | # | ||
| 518 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 519 | # CONFIG_SOUND is not set | ||
| 520 | # CONFIG_HID_SUPPORT is not set | ||
| 521 | # CONFIG_USB_SUPPORT is not set | ||
| 522 | # CONFIG_MMC is not set | ||
| 523 | # CONFIG_MEMSTICK is not set | ||
| 524 | # CONFIG_NEW_LEDS is not set | ||
| 525 | # CONFIG_ACCESSIBILITY is not set | ||
| 526 | CONFIG_RTC_LIB=y | ||
| 527 | CONFIG_RTC_CLASS=y | ||
| 528 | CONFIG_RTC_HCTOSYS=y | ||
| 529 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 530 | # CONFIG_RTC_DEBUG is not set | ||
| 531 | |||
| 532 | # | ||
| 533 | # RTC interfaces | ||
| 534 | # | ||
| 535 | CONFIG_RTC_INTF_SYSFS=y | ||
| 536 | CONFIG_RTC_INTF_PROC=y | ||
| 537 | CONFIG_RTC_INTF_DEV=y | ||
| 538 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 539 | # CONFIG_RTC_DRV_TEST is not set | ||
| 540 | |||
| 541 | # | ||
| 542 | # SPI RTC drivers | ||
| 543 | # | ||
| 544 | |||
| 545 | # | ||
| 546 | # Platform RTC drivers | ||
| 547 | # | ||
| 548 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 549 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 550 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 551 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 552 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 553 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 554 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 555 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 556 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 557 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 558 | |||
| 559 | # | ||
| 560 | # on-CPU RTC drivers | ||
| 561 | # | ||
| 562 | CONFIG_RTC_DRV_SH=y | ||
| 563 | # CONFIG_DMADEVICES is not set | ||
| 564 | # CONFIG_UIO is not set | ||
| 565 | # CONFIG_STAGING is not set | ||
| 566 | CONFIG_STAGING_EXCLUDE_BUILD=y | ||
| 567 | |||
| 568 | # | ||
| 569 | # File systems | ||
| 570 | # | ||
| 571 | CONFIG_EXT2_FS=y | ||
| 572 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 573 | # CONFIG_EXT3_FS is not set | ||
| 574 | # CONFIG_EXT4_FS is not set | ||
| 575 | # CONFIG_REISERFS_FS is not set | ||
| 576 | # CONFIG_JFS_FS is not set | ||
| 577 | # CONFIG_FS_POSIX_ACL is not set | ||
| 578 | # CONFIG_FILE_LOCKING is not set | ||
| 579 | # CONFIG_XFS_FS is not set | ||
| 580 | # CONFIG_DNOTIFY is not set | ||
| 581 | # CONFIG_INOTIFY is not set | ||
| 582 | # CONFIG_QUOTA is not set | ||
| 583 | # CONFIG_AUTOFS_FS is not set | ||
| 584 | # CONFIG_AUTOFS4_FS is not set | ||
| 585 | # CONFIG_FUSE_FS is not set | ||
| 586 | |||
| 587 | # | ||
| 588 | # CD-ROM/DVD Filesystems | ||
| 589 | # | ||
| 590 | # CONFIG_ISO9660_FS is not set | ||
| 591 | # CONFIG_UDF_FS is not set | ||
| 592 | |||
| 593 | # | ||
| 594 | # DOS/FAT/NT Filesystems | ||
| 595 | # | ||
| 596 | # CONFIG_MSDOS_FS is not set | ||
| 597 | # CONFIG_VFAT_FS is not set | ||
| 598 | # CONFIG_NTFS_FS is not set | ||
| 599 | |||
| 600 | # | ||
| 601 | # Pseudo filesystems | ||
| 602 | # | ||
| 603 | CONFIG_PROC_FS=y | ||
| 604 | CONFIG_PROC_SYSCTL=y | ||
| 605 | CONFIG_SYSFS=y | ||
| 606 | # CONFIG_TMPFS is not set | ||
| 607 | # CONFIG_HUGETLB_PAGE is not set | ||
| 608 | # CONFIG_CONFIGFS_FS is not set | ||
| 609 | |||
| 610 | # | ||
| 611 | # Miscellaneous filesystems | ||
| 612 | # | ||
| 613 | # CONFIG_ADFS_FS is not set | ||
| 614 | # CONFIG_AFFS_FS is not set | ||
| 615 | # CONFIG_HFS_FS is not set | ||
| 616 | # CONFIG_HFSPLUS_FS is not set | ||
| 617 | # CONFIG_BEFS_FS is not set | ||
| 618 | # CONFIG_BFS_FS is not set | ||
| 619 | # CONFIG_EFS_FS is not set | ||
| 620 | CONFIG_JFFS2_FS=y | ||
| 621 | CONFIG_JFFS2_FS_DEBUG=0 | ||
| 622 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
| 623 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
| 624 | # CONFIG_JFFS2_SUMMARY is not set | ||
| 625 | # CONFIG_JFFS2_FS_XATTR is not set | ||
| 626 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
| 627 | CONFIG_JFFS2_ZLIB=y | ||
| 628 | # CONFIG_JFFS2_LZO is not set | ||
| 629 | CONFIG_JFFS2_RTIME=y | ||
| 630 | # CONFIG_JFFS2_RUBIN is not set | ||
| 631 | # CONFIG_CRAMFS is not set | ||
| 632 | # CONFIG_VXFS_FS is not set | ||
| 633 | # CONFIG_MINIX_FS is not set | ||
| 634 | # CONFIG_OMFS_FS is not set | ||
| 635 | # CONFIG_HPFS_FS is not set | ||
| 636 | # CONFIG_QNX4FS_FS is not set | ||
| 637 | CONFIG_ROMFS_FS=y | ||
| 638 | # CONFIG_SYSV_FS is not set | ||
| 639 | # CONFIG_UFS_FS is not set | ||
| 640 | |||
| 641 | # | ||
| 642 | # Partition Types | ||
| 643 | # | ||
| 644 | # CONFIG_PARTITION_ADVANCED is not set | ||
| 645 | CONFIG_MSDOS_PARTITION=y | ||
| 646 | # CONFIG_NLS is not set | ||
| 647 | |||
| 648 | # | ||
| 649 | # Kernel hacking | ||
| 650 | # | ||
| 651 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 652 | # CONFIG_PRINTK_TIME is not set | ||
| 653 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 654 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
| 655 | CONFIG_FRAME_WARN=1024 | ||
| 656 | CONFIG_MAGIC_SYSRQ=y | ||
| 657 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 658 | CONFIG_DEBUG_FS=y | ||
| 659 | # CONFIG_HEADERS_CHECK is not set | ||
| 660 | # CONFIG_DEBUG_KERNEL is not set | ||
| 661 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 662 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 663 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 664 | # CONFIG_LATENCYTOP is not set | ||
| 665 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
| 666 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 667 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 668 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
| 669 | |||
| 670 | # | ||
| 671 | # Tracers | ||
| 672 | # | ||
| 673 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
| 674 | # CONFIG_SAMPLES is not set | ||
| 675 | # CONFIG_SH_STANDARD_BIOS is not set | ||
| 676 | # CONFIG_EARLY_SCIF_CONSOLE is not set | ||
| 677 | |||
| 678 | # | ||
| 679 | # Security options | ||
| 680 | # | ||
| 681 | # CONFIG_KEYS is not set | ||
| 682 | # CONFIG_SECURITY is not set | ||
| 683 | # CONFIG_SECURITYFS is not set | ||
| 684 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 685 | # CONFIG_CRYPTO is not set | ||
| 686 | |||
| 687 | # | ||
| 688 | # Library routines | ||
| 689 | # | ||
| 690 | CONFIG_BITREVERSE=y | ||
| 691 | # CONFIG_CRC_CCITT is not set | ||
| 692 | # CONFIG_CRC16 is not set | ||
| 693 | # CONFIG_CRC_T10DIF is not set | ||
| 694 | # CONFIG_CRC_ITU_T is not set | ||
| 695 | CONFIG_CRC32=y | ||
| 696 | # CONFIG_CRC7 is not set | ||
| 697 | # CONFIG_LIBCRC32C is not set | ||
| 698 | CONFIG_ZLIB_INFLATE=y | ||
| 699 | CONFIG_ZLIB_DEFLATE=y | ||
| 700 | CONFIG_PLIST=y | ||
| 701 | CONFIG_HAS_IOMEM=y | ||
| 702 | CONFIG_HAS_IOPORT=y | ||
| 703 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/sh/configs/rsk7203_defconfig b/arch/sh/configs/rsk7203_defconfig index 85b0ac4fc667..dcdef31cf19b 100644 --- a/arch/sh/configs/rsk7203_defconfig +++ b/arch/sh/configs/rsk7203_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.27 | 3 | # Linux kernel version: 2.6.28-rc6 |
| 4 | # Tue Oct 21 12:58:47 2008 | 4 | # Mon Dec 8 14:35:03 2008 |
| 5 | # | 5 | # |
| 6 | CONFIG_SUPERH=y | 6 | CONFIG_SUPERH=y |
| 7 | CONFIG_SUPERH32=y | 7 | CONFIG_SUPERH32=y |
| @@ -16,6 +16,8 @@ CONFIG_GENERIC_IRQ_PROBE=y | |||
| 16 | CONFIG_GENERIC_GPIO=y | 16 | CONFIG_GENERIC_GPIO=y |
| 17 | # CONFIG_GENERIC_TIME is not set | 17 | # CONFIG_GENERIC_TIME is not set |
| 18 | # CONFIG_GENERIC_CLOCKEVENTS is not set | 18 | # CONFIG_GENERIC_CLOCKEVENTS is not set |
| 19 | # CONFIG_ARCH_SUSPEND_POSSIBLE is not set | ||
| 20 | # CONFIG_ARCH_HIBERNATION_POSSIBLE is not set | ||
| 19 | CONFIG_STACKTRACE_SUPPORT=y | 21 | CONFIG_STACKTRACE_SUPPORT=y |
| 20 | CONFIG_LOCKDEP_SUPPORT=y | 22 | CONFIG_LOCKDEP_SUPPORT=y |
| 21 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | 23 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y |
| @@ -75,7 +77,6 @@ CONFIG_TIMERFD=y | |||
| 75 | CONFIG_EVENTFD=y | 77 | CONFIG_EVENTFD=y |
| 76 | CONFIG_AIO=y | 78 | CONFIG_AIO=y |
| 77 | CONFIG_VM_EVENT_COUNTERS=y | 79 | CONFIG_VM_EVENT_COUNTERS=y |
| 78 | CONFIG_PCI_QUIRKS=y | ||
| 79 | # CONFIG_SLAB is not set | 80 | # CONFIG_SLAB is not set |
| 80 | # CONFIG_SLUB is not set | 81 | # CONFIG_SLUB is not set |
| 81 | CONFIG_SLOB=y | 82 | CONFIG_SLOB=y |
| @@ -126,6 +127,7 @@ CONFIG_CLASSIC_RCU=y | |||
| 126 | CONFIG_CPU_SH2=y | 127 | CONFIG_CPU_SH2=y |
| 127 | CONFIG_CPU_SH2A=y | 128 | CONFIG_CPU_SH2A=y |
| 128 | # CONFIG_CPU_SUBTYPE_SH7619 is not set | 129 | # CONFIG_CPU_SUBTYPE_SH7619 is not set |
| 130 | # CONFIG_CPU_SUBTYPE_SH7201 is not set | ||
| 129 | CONFIG_CPU_SUBTYPE_SH7203=y | 131 | CONFIG_CPU_SUBTYPE_SH7203=y |
| 130 | # CONFIG_CPU_SUBTYPE_SH7206 is not set | 132 | # CONFIG_CPU_SUBTYPE_SH7206 is not set |
| 131 | # CONFIG_CPU_SUBTYPE_SH7263 is not set | 133 | # CONFIG_CPU_SUBTYPE_SH7263 is not set |
| @@ -211,6 +213,8 @@ CONFIG_CPU_HAS_FPU=y | |||
| 211 | # | 213 | # |
| 212 | # Board support | 214 | # Board support |
| 213 | # | 215 | # |
| 216 | CONFIG_SH_RSK=y | ||
| 217 | # CONFIG_SH_RSK7201 is not set | ||
| 214 | CONFIG_SH_RSK7203=y | 218 | CONFIG_SH_RSK7203=y |
| 215 | 219 | ||
| 216 | # | 220 | # |
| @@ -296,6 +300,14 @@ CONFIG_BINFMT_ZFLAT=y | |||
| 296 | CONFIG_BINFMT_SHARED_FLAT=y | 300 | CONFIG_BINFMT_SHARED_FLAT=y |
| 297 | # CONFIG_HAVE_AOUT is not set | 301 | # CONFIG_HAVE_AOUT is not set |
| 298 | # CONFIG_BINFMT_MISC is not set | 302 | # CONFIG_BINFMT_MISC is not set |
| 303 | |||
| 304 | # | ||
| 305 | # Power management options (EXPERIMENTAL) | ||
| 306 | # | ||
| 307 | CONFIG_PM=y | ||
| 308 | # CONFIG_PM_DEBUG is not set | ||
| 309 | CONFIG_CPU_IDLE=y | ||
| 310 | CONFIG_CPU_IDLE_GOV_LADDER=y | ||
| 299 | CONFIG_NET=y | 311 | CONFIG_NET=y |
| 300 | 312 | ||
| 301 | # | 313 | # |
| @@ -477,6 +489,7 @@ CONFIG_BLK_DEV=y | |||
| 477 | CONFIG_MISC_DEVICES=y | 489 | CONFIG_MISC_DEVICES=y |
| 478 | # CONFIG_EEPROM_93CX6 is not set | 490 | # CONFIG_EEPROM_93CX6 is not set |
| 479 | # CONFIG_ENCLOSURE_SERVICES is not set | 491 | # CONFIG_ENCLOSURE_SERVICES is not set |
| 492 | # CONFIG_C2PORT is not set | ||
| 480 | CONFIG_HAVE_IDE=y | 493 | CONFIG_HAVE_IDE=y |
| 481 | # CONFIG_IDE is not set | 494 | # CONFIG_IDE is not set |
| 482 | 495 | ||
| @@ -603,11 +616,11 @@ CONFIG_SERIAL_CORE_CONSOLE=y | |||
| 603 | # CONFIG_HWMON is not set | 616 | # CONFIG_HWMON is not set |
| 604 | CONFIG_THERMAL=y | 617 | CONFIG_THERMAL=y |
| 605 | # CONFIG_WATCHDOG is not set | 618 | # CONFIG_WATCHDOG is not set |
| 619 | CONFIG_SSB_POSSIBLE=y | ||
| 606 | 620 | ||
| 607 | # | 621 | # |
| 608 | # Sonics Silicon Backplane | 622 | # Sonics Silicon Backplane |
| 609 | # | 623 | # |
| 610 | CONFIG_SSB_POSSIBLE=y | ||
| 611 | # CONFIG_SSB is not set | 624 | # CONFIG_SSB is not set |
| 612 | 625 | ||
| 613 | # | 626 | # |
| @@ -617,7 +630,11 @@ CONFIG_SSB_POSSIBLE=y | |||
| 617 | # CONFIG_MFD_SM501 is not set | 630 | # CONFIG_MFD_SM501 is not set |
| 618 | # CONFIG_HTC_PASIC3 is not set | 631 | # CONFIG_HTC_PASIC3 is not set |
| 619 | # CONFIG_MFD_TMIO is not set | 632 | # CONFIG_MFD_TMIO is not set |
| 620 | # CONFIG_MFD_WM8400 is not set | 633 | CONFIG_REGULATOR=y |
| 634 | # CONFIG_REGULATOR_DEBUG is not set | ||
| 635 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
| 636 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 637 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 621 | 638 | ||
| 622 | # | 639 | # |
| 623 | # Multimedia devices | 640 | # Multimedia devices |
| @@ -702,19 +719,22 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | |||
| 702 | CONFIG_USB_DEVICEFS=y | 719 | CONFIG_USB_DEVICEFS=y |
| 703 | CONFIG_USB_DEVICE_CLASS=y | 720 | CONFIG_USB_DEVICE_CLASS=y |
| 704 | # CONFIG_USB_DYNAMIC_MINORS is not set | 721 | # CONFIG_USB_DYNAMIC_MINORS is not set |
| 722 | # CONFIG_USB_SUSPEND is not set | ||
| 705 | # CONFIG_USB_OTG is not set | 723 | # CONFIG_USB_OTG is not set |
| 706 | # CONFIG_USB_OTG_WHITELIST is not set | 724 | # CONFIG_USB_OTG_WHITELIST is not set |
| 707 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | 725 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set |
| 708 | CONFIG_USB_MON=y | 726 | CONFIG_USB_MON=y |
| 727 | # CONFIG_USB_WUSB is not set | ||
| 728 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 709 | 729 | ||
| 710 | # | 730 | # |
| 711 | # USB Host Controller Drivers | 731 | # USB Host Controller Drivers |
| 712 | # | 732 | # |
| 713 | # CONFIG_USB_C67X00_HCD is not set | 733 | # CONFIG_USB_C67X00_HCD is not set |
| 714 | # CONFIG_USB_ISP116X_HCD is not set | 734 | # CONFIG_USB_ISP116X_HCD is not set |
| 715 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 716 | # CONFIG_USB_SL811_HCD is not set | 735 | # CONFIG_USB_SL811_HCD is not set |
| 717 | CONFIG_USB_R8A66597_HCD=y | 736 | CONFIG_USB_R8A66597_HCD=y |
| 737 | # CONFIG_USB_HWA_HCD is not set | ||
| 718 | 738 | ||
| 719 | # | 739 | # |
| 720 | # USB Device Class drivers | 740 | # USB Device Class drivers |
| @@ -725,11 +745,11 @@ CONFIG_USB_R8A66597_HCD=y | |||
| 725 | # CONFIG_USB_TMC is not set | 745 | # CONFIG_USB_TMC is not set |
| 726 | 746 | ||
| 727 | # | 747 | # |
| 728 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | 748 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; |
| 729 | # | 749 | # |
| 730 | 750 | ||
| 731 | # | 751 | # |
| 732 | # may also be needed; see USB_STORAGE Help for more information | 752 | # see USB_STORAGE Help for more information |
| 733 | # | 753 | # |
| 734 | # CONFIG_USB_LIBUSUAL is not set | 754 | # CONFIG_USB_LIBUSUAL is not set |
| 735 | 755 | ||
| @@ -770,7 +790,22 @@ CONFIG_USB_R8A66597_HCD=y | |||
| 770 | # CONFIG_USB_GADGET is not set | 790 | # CONFIG_USB_GADGET is not set |
| 771 | # CONFIG_MMC is not set | 791 | # CONFIG_MMC is not set |
| 772 | # CONFIG_MEMSTICK is not set | 792 | # CONFIG_MEMSTICK is not set |
| 773 | # CONFIG_NEW_LEDS is not set | 793 | CONFIG_NEW_LEDS=y |
| 794 | CONFIG_LEDS_CLASS=y | ||
| 795 | |||
| 796 | # | ||
| 797 | # LED drivers | ||
| 798 | # | ||
| 799 | CONFIG_LEDS_GPIO=y | ||
| 800 | |||
| 801 | # | ||
| 802 | # LED Triggers | ||
| 803 | # | ||
| 804 | CONFIG_LEDS_TRIGGERS=y | ||
| 805 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
| 806 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
| 807 | CONFIG_LEDS_TRIGGER_BACKLIGHT=y | ||
| 808 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
| 774 | # CONFIG_ACCESSIBILITY is not set | 809 | # CONFIG_ACCESSIBILITY is not set |
| 775 | CONFIG_RTC_LIB=y | 810 | CONFIG_RTC_LIB=y |
| 776 | CONFIG_RTC_CLASS=y | 811 | CONFIG_RTC_CLASS=y |
| @@ -812,6 +847,7 @@ CONFIG_RTC_DRV_SH=y | |||
| 812 | # CONFIG_DMADEVICES is not set | 847 | # CONFIG_DMADEVICES is not set |
| 813 | # CONFIG_UIO is not set | 848 | # CONFIG_UIO is not set |
| 814 | # CONFIG_STAGING is not set | 849 | # CONFIG_STAGING is not set |
| 850 | CONFIG_STAGING_EXCLUDE_BUILD=y | ||
| 815 | 851 | ||
| 816 | # | 852 | # |
| 817 | # File systems | 853 | # File systems |
| @@ -950,9 +986,14 @@ CONFIG_FRAME_POINTER=y | |||
| 950 | # CONFIG_FAULT_INJECTION is not set | 986 | # CONFIG_FAULT_INJECTION is not set |
| 951 | # CONFIG_LATENCYTOP is not set | 987 | # CONFIG_LATENCYTOP is not set |
| 952 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 988 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
| 953 | CONFIG_NOP_TRACER=y | 989 | CONFIG_HAVE_FUNCTION_TRACER=y |
| 954 | CONFIG_HAVE_FTRACE=y | 990 | CONFIG_HAVE_DYNAMIC_FTRACE=y |
| 955 | # CONFIG_FTRACE is not set | 991 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y |
| 992 | |||
| 993 | # | ||
| 994 | # Tracers | ||
| 995 | # | ||
| 996 | # CONFIG_FUNCTION_TRACER is not set | ||
| 956 | # CONFIG_SCHED_TRACER is not set | 997 | # CONFIG_SCHED_TRACER is not set |
| 957 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | 998 | # CONFIG_CONTEXT_SWITCH_TRACER is not set |
| 958 | # CONFIG_BOOT_TRACER is not set | 999 | # CONFIG_BOOT_TRACER is not set |
diff --git a/arch/sh/configs/rts7751r2dplus_qemu_defconfig b/arch/sh/configs/rts7751r2dplus_qemu_defconfig deleted file mode 100644 index ae8f63000fbf..000000000000 --- a/arch/sh/configs/rts7751r2dplus_qemu_defconfig +++ /dev/null | |||
| @@ -1,949 +0,0 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.27 | ||
| 4 | # Wed Oct 22 18:51:20 2008 | ||
| 5 | # | ||
| 6 | CONFIG_SUPERH=y | ||
| 7 | CONFIG_SUPERH32=y | ||
| 8 | CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig" | ||
| 9 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 10 | CONFIG_GENERIC_BUG=y | ||
| 11 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
| 12 | CONFIG_GENERIC_HWEIGHT=y | ||
| 13 | CONFIG_GENERIC_HARDIRQS=y | ||
| 14 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 15 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 16 | # CONFIG_GENERIC_GPIO is not set | ||
| 17 | CONFIG_GENERIC_TIME=y | ||
| 18 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 19 | CONFIG_SYS_SUPPORTS_PCI=y | ||
| 20 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 21 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 22 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 23 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 24 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 25 | CONFIG_ARCH_NO_VIRT_TO_BUS=y | ||
| 26 | CONFIG_IO_TRAPPED=y | ||
| 27 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 28 | |||
| 29 | # | ||
| 30 | # General setup | ||
| 31 | # | ||
| 32 | CONFIG_EXPERIMENTAL=y | ||
| 33 | CONFIG_BROKEN_ON_SMP=y | ||
| 34 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 35 | CONFIG_LOCALVERSION="" | ||
| 36 | CONFIG_LOCALVERSION_AUTO=y | ||
| 37 | CONFIG_SWAP=y | ||
| 38 | CONFIG_SYSVIPC=y | ||
| 39 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 40 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 41 | CONFIG_IKCONFIG=y | ||
| 42 | CONFIG_IKCONFIG_PROC=y | ||
| 43 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 44 | # CONFIG_CGROUPS is not set | ||
| 45 | CONFIG_GROUP_SCHED=y | ||
| 46 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 47 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 48 | CONFIG_USER_SCHED=y | ||
| 49 | # CONFIG_CGROUP_SCHED is not set | ||
| 50 | CONFIG_SYSFS_DEPRECATED=y | ||
| 51 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 52 | # CONFIG_RELAY is not set | ||
| 53 | # CONFIG_NAMESPACES is not set | ||
| 54 | CONFIG_BLK_DEV_INITRD=y | ||
| 55 | CONFIG_INITRAMFS_SOURCE="" | ||
| 56 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
| 57 | CONFIG_SYSCTL=y | ||
| 58 | CONFIG_EMBEDDED=y | ||
| 59 | CONFIG_UID16=y | ||
| 60 | # CONFIG_SYSCTL_SYSCALL is not set | ||
| 61 | CONFIG_KALLSYMS=y | ||
| 62 | # CONFIG_KALLSYMS_ALL is not set | ||
| 63 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 64 | # CONFIG_HOTPLUG is not set | ||
| 65 | CONFIG_PRINTK=y | ||
| 66 | CONFIG_BUG=y | ||
| 67 | CONFIG_ELF_CORE=y | ||
| 68 | CONFIG_COMPAT_BRK=y | ||
| 69 | CONFIG_BASE_FULL=y | ||
| 70 | CONFIG_FUTEX=y | ||
| 71 | CONFIG_ANON_INODES=y | ||
| 72 | CONFIG_EPOLL=y | ||
| 73 | CONFIG_SIGNALFD=y | ||
| 74 | CONFIG_TIMERFD=y | ||
| 75 | CONFIG_EVENTFD=y | ||
| 76 | CONFIG_SHMEM=y | ||
| 77 | CONFIG_AIO=y | ||
| 78 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 79 | CONFIG_PCI_QUIRKS=y | ||
| 80 | CONFIG_SLAB=y | ||
| 81 | # CONFIG_SLUB is not set | ||
| 82 | # CONFIG_SLOB is not set | ||
| 83 | CONFIG_PROFILING=y | ||
| 84 | # CONFIG_MARKERS is not set | ||
| 85 | CONFIG_OPROFILE=y | ||
| 86 | CONFIG_HAVE_OPROFILE=y | ||
| 87 | # CONFIG_KPROBES is not set | ||
| 88 | CONFIG_HAVE_IOREMAP_PROT=y | ||
| 89 | CONFIG_HAVE_KPROBES=y | ||
| 90 | CONFIG_HAVE_KRETPROBES=y | ||
| 91 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
| 92 | CONFIG_HAVE_CLK=y | ||
| 93 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 94 | CONFIG_SLABINFO=y | ||
| 95 | CONFIG_RT_MUTEXES=y | ||
| 96 | # CONFIG_TINY_SHMEM is not set | ||
| 97 | CONFIG_BASE_SMALL=0 | ||
| 98 | CONFIG_MODULES=y | ||
| 99 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 100 | # CONFIG_MODULE_UNLOAD is not set | ||
| 101 | # CONFIG_MODVERSIONS is not set | ||
| 102 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 103 | CONFIG_KMOD=y | ||
| 104 | CONFIG_BLOCK=y | ||
| 105 | # CONFIG_LBD is not set | ||
| 106 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 107 | # CONFIG_LSF is not set | ||
| 108 | # CONFIG_BLK_DEV_BSG is not set | ||
| 109 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 110 | |||
| 111 | # | ||
| 112 | # IO Schedulers | ||
| 113 | # | ||
| 114 | CONFIG_IOSCHED_NOOP=y | ||
| 115 | CONFIG_IOSCHED_AS=y | ||
| 116 | CONFIG_IOSCHED_DEADLINE=y | ||
| 117 | CONFIG_IOSCHED_CFQ=y | ||
| 118 | CONFIG_DEFAULT_AS=y | ||
| 119 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 120 | # CONFIG_DEFAULT_CFQ is not set | ||
| 121 | # CONFIG_DEFAULT_NOOP is not set | ||
| 122 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
| 123 | CONFIG_CLASSIC_RCU=y | ||
| 124 | # CONFIG_FREEZER is not set | ||
| 125 | |||
| 126 | # | ||
| 127 | # System type | ||
| 128 | # | ||
| 129 | CONFIG_CPU_SH4=y | ||
| 130 | # CONFIG_CPU_SUBTYPE_SH7619 is not set | ||
| 131 | # CONFIG_CPU_SUBTYPE_SH7203 is not set | ||
| 132 | # CONFIG_CPU_SUBTYPE_SH7206 is not set | ||
| 133 | # CONFIG_CPU_SUBTYPE_SH7263 is not set | ||
| 134 | # CONFIG_CPU_SUBTYPE_MXG is not set | ||
| 135 | # CONFIG_CPU_SUBTYPE_SH7705 is not set | ||
| 136 | # CONFIG_CPU_SUBTYPE_SH7706 is not set | ||
| 137 | # CONFIG_CPU_SUBTYPE_SH7707 is not set | ||
| 138 | # CONFIG_CPU_SUBTYPE_SH7708 is not set | ||
| 139 | # CONFIG_CPU_SUBTYPE_SH7709 is not set | ||
| 140 | # CONFIG_CPU_SUBTYPE_SH7710 is not set | ||
| 141 | # CONFIG_CPU_SUBTYPE_SH7712 is not set | ||
| 142 | # CONFIG_CPU_SUBTYPE_SH7720 is not set | ||
| 143 | # CONFIG_CPU_SUBTYPE_SH7721 is not set | ||
| 144 | # CONFIG_CPU_SUBTYPE_SH7750 is not set | ||
| 145 | # CONFIG_CPU_SUBTYPE_SH7091 is not set | ||
| 146 | # CONFIG_CPU_SUBTYPE_SH7750R is not set | ||
| 147 | # CONFIG_CPU_SUBTYPE_SH7750S is not set | ||
| 148 | # CONFIG_CPU_SUBTYPE_SH7751 is not set | ||
| 149 | CONFIG_CPU_SUBTYPE_SH7751R=y | ||
| 150 | # CONFIG_CPU_SUBTYPE_SH7760 is not set | ||
| 151 | # CONFIG_CPU_SUBTYPE_SH4_202 is not set | ||
| 152 | # CONFIG_CPU_SUBTYPE_SH7723 is not set | ||
| 153 | # CONFIG_CPU_SUBTYPE_SH7763 is not set | ||
| 154 | # CONFIG_CPU_SUBTYPE_SH7770 is not set | ||
| 155 | # CONFIG_CPU_SUBTYPE_SH7780 is not set | ||
| 156 | # CONFIG_CPU_SUBTYPE_SH7785 is not set | ||
| 157 | # CONFIG_CPU_SUBTYPE_SHX3 is not set | ||
| 158 | # CONFIG_CPU_SUBTYPE_SH7343 is not set | ||
| 159 | # CONFIG_CPU_SUBTYPE_SH7722 is not set | ||
| 160 | # CONFIG_CPU_SUBTYPE_SH7366 is not set | ||
| 161 | # CONFIG_CPU_SUBTYPE_SH5_101 is not set | ||
| 162 | # CONFIG_CPU_SUBTYPE_SH5_103 is not set | ||
| 163 | |||
| 164 | # | ||
| 165 | # Memory management options | ||
| 166 | # | ||
| 167 | CONFIG_QUICKLIST=y | ||
| 168 | CONFIG_MMU=y | ||
| 169 | CONFIG_PAGE_OFFSET=0x80000000 | ||
| 170 | CONFIG_MEMORY_START=0x0c000000 | ||
| 171 | CONFIG_MEMORY_SIZE=0x04000000 | ||
| 172 | CONFIG_29BIT=y | ||
| 173 | CONFIG_VSYSCALL=y | ||
| 174 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
| 175 | CONFIG_ARCH_SPARSEMEM_ENABLE=y | ||
| 176 | CONFIG_ARCH_SPARSEMEM_DEFAULT=y | ||
| 177 | CONFIG_MAX_ACTIVE_REGIONS=1 | ||
| 178 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
| 179 | CONFIG_ARCH_SELECT_MEMORY_MODEL=y | ||
| 180 | CONFIG_PAGE_SIZE_4KB=y | ||
| 181 | # CONFIG_PAGE_SIZE_8KB is not set | ||
| 182 | # CONFIG_PAGE_SIZE_16KB is not set | ||
| 183 | # CONFIG_PAGE_SIZE_64KB is not set | ||
| 184 | CONFIG_ENTRY_OFFSET=0x00001000 | ||
| 185 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 186 | CONFIG_FLATMEM_MANUAL=y | ||
| 187 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 188 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 189 | CONFIG_FLATMEM=y | ||
| 190 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 191 | CONFIG_SPARSEMEM_STATIC=y | ||
| 192 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 193 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 194 | # CONFIG_RESOURCES_64BIT is not set | ||
| 195 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 196 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 197 | CONFIG_NR_QUICK=2 | ||
| 198 | CONFIG_UNEVICTABLE_LRU=y | ||
| 199 | |||
| 200 | # | ||
| 201 | # Cache configuration | ||
| 202 | # | ||
| 203 | # CONFIG_SH_DIRECT_MAPPED is not set | ||
| 204 | CONFIG_CACHE_WRITEBACK=y | ||
| 205 | # CONFIG_CACHE_WRITETHROUGH is not set | ||
| 206 | # CONFIG_CACHE_OFF is not set | ||
| 207 | |||
| 208 | # | ||
| 209 | # Processor features | ||
| 210 | # | ||
| 211 | CONFIG_CPU_LITTLE_ENDIAN=y | ||
| 212 | # CONFIG_CPU_BIG_ENDIAN is not set | ||
| 213 | CONFIG_SH_FPU=y | ||
| 214 | # CONFIG_SH_STORE_QUEUES is not set | ||
| 215 | CONFIG_CPU_HAS_INTEVT=y | ||
| 216 | CONFIG_CPU_HAS_SR_RB=y | ||
| 217 | CONFIG_CPU_HAS_PTEA=y | ||
| 218 | CONFIG_CPU_HAS_FPU=y | ||
| 219 | |||
| 220 | # | ||
| 221 | # Board support | ||
| 222 | # | ||
| 223 | # CONFIG_SH_7751_SYSTEMH is not set | ||
| 224 | # CONFIG_SH_SECUREEDGE5410 is not set | ||
| 225 | CONFIG_SH_RTS7751R2D=y | ||
| 226 | # CONFIG_SH_LANDISK is not set | ||
| 227 | # CONFIG_SH_TITAN is not set | ||
| 228 | # CONFIG_SH_LBOX_RE2 is not set | ||
| 229 | |||
| 230 | # | ||
| 231 | # RTS7751R2D Board Revision | ||
| 232 | # | ||
| 233 | CONFIG_RTS7751R2D_PLUS=y | ||
| 234 | # CONFIG_RTS7751R2D_1 is not set | ||
| 235 | |||
| 236 | # | ||
| 237 | # Timer and clock configuration | ||
| 238 | # | ||
| 239 | CONFIG_SH_TMU=y | ||
| 240 | CONFIG_SH_TIMER_IRQ=16 | ||
| 241 | CONFIG_SH_PCLK_FREQ=60000000 | ||
| 242 | # CONFIG_NO_HZ is not set | ||
| 243 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 244 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 245 | |||
| 246 | # | ||
| 247 | # CPU Frequency scaling | ||
| 248 | # | ||
| 249 | # CONFIG_CPU_FREQ is not set | ||
| 250 | |||
| 251 | # | ||
| 252 | # DMA support | ||
| 253 | # | ||
| 254 | # CONFIG_SH_DMA is not set | ||
| 255 | |||
| 256 | # | ||
| 257 | # Companion Chips | ||
| 258 | # | ||
| 259 | |||
| 260 | # | ||
| 261 | # Additional SuperH Device Drivers | ||
| 262 | # | ||
| 263 | CONFIG_HEARTBEAT=y | ||
| 264 | # CONFIG_PUSH_SWITCH is not set | ||
| 265 | |||
| 266 | # | ||
| 267 | # Kernel features | ||
| 268 | # | ||
| 269 | # CONFIG_HZ_100 is not set | ||
| 270 | CONFIG_HZ_250=y | ||
| 271 | # CONFIG_HZ_300 is not set | ||
| 272 | # CONFIG_HZ_1000 is not set | ||
| 273 | CONFIG_HZ=250 | ||
| 274 | # CONFIG_SCHED_HRTICK is not set | ||
| 275 | # CONFIG_KEXEC is not set | ||
| 276 | # CONFIG_CRASH_DUMP is not set | ||
| 277 | CONFIG_SECCOMP=y | ||
| 278 | CONFIG_PREEMPT_NONE=y | ||
| 279 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 280 | # CONFIG_PREEMPT is not set | ||
| 281 | CONFIG_GUSA=y | ||
| 282 | # CONFIG_GUSA_RB is not set | ||
| 283 | |||
| 284 | # | ||
| 285 | # Boot options | ||
| 286 | # | ||
| 287 | CONFIG_ZERO_PAGE_OFFSET=0x00010000 | ||
| 288 | CONFIG_BOOT_LINK_OFFSET=0x00800000 | ||
| 289 | # CONFIG_UBC_WAKEUP is not set | ||
| 290 | CONFIG_CMDLINE_BOOL=y | ||
| 291 | CONFIG_CMDLINE="console=tty0 console=ttySC0,115200 root=/dev/sda1 earlyprintk=serial" | ||
| 292 | |||
| 293 | # | ||
| 294 | # Bus options | ||
| 295 | # | ||
| 296 | # CONFIG_PCI is not set | ||
| 297 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 298 | |||
| 299 | # | ||
| 300 | # Executable file formats | ||
| 301 | # | ||
| 302 | CONFIG_BINFMT_ELF=y | ||
| 303 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 304 | # CONFIG_HAVE_AOUT is not set | ||
| 305 | # CONFIG_BINFMT_MISC is not set | ||
| 306 | # CONFIG_NET is not set | ||
| 307 | |||
| 308 | # | ||
| 309 | # Device Drivers | ||
| 310 | # | ||
| 311 | |||
| 312 | # | ||
| 313 | # Generic Driver Options | ||
| 314 | # | ||
| 315 | CONFIG_STANDALONE=y | ||
| 316 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 317 | # CONFIG_DEBUG_DRIVER is not set | ||
| 318 | # CONFIG_DEBUG_DEVRES is not set | ||
| 319 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 320 | # CONFIG_MTD is not set | ||
| 321 | # CONFIG_PARPORT is not set | ||
| 322 | CONFIG_BLK_DEV=y | ||
| 323 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 324 | # CONFIG_BLK_DEV_LOOP is not set | ||
| 325 | CONFIG_BLK_DEV_RAM=y | ||
| 326 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 327 | CONFIG_BLK_DEV_RAM_SIZE=4096 | ||
| 328 | # CONFIG_BLK_DEV_XIP is not set | ||
| 329 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 330 | # CONFIG_BLK_DEV_HD is not set | ||
| 331 | CONFIG_MISC_DEVICES=y | ||
| 332 | # CONFIG_EEPROM_93CX6 is not set | ||
| 333 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 334 | CONFIG_HAVE_IDE=y | ||
| 335 | # CONFIG_IDE is not set | ||
| 336 | |||
| 337 | # | ||
| 338 | # SCSI device support | ||
| 339 | # | ||
| 340 | # CONFIG_RAID_ATTRS is not set | ||
| 341 | CONFIG_SCSI=y | ||
| 342 | CONFIG_SCSI_DMA=y | ||
| 343 | # CONFIG_SCSI_TGT is not set | ||
| 344 | # CONFIG_SCSI_NETLINK is not set | ||
| 345 | CONFIG_SCSI_PROC_FS=y | ||
| 346 | |||
| 347 | # | ||
| 348 | # SCSI support type (disk, tape, CD-ROM) | ||
| 349 | # | ||
| 350 | CONFIG_BLK_DEV_SD=y | ||
| 351 | # CONFIG_CHR_DEV_ST is not set | ||
| 352 | # CONFIG_CHR_DEV_OSST is not set | ||
| 353 | # CONFIG_BLK_DEV_SR is not set | ||
| 354 | # CONFIG_CHR_DEV_SG is not set | ||
| 355 | # CONFIG_CHR_DEV_SCH is not set | ||
| 356 | |||
| 357 | # | ||
| 358 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 359 | # | ||
| 360 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 361 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 362 | # CONFIG_SCSI_LOGGING is not set | ||
| 363 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 364 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 365 | |||
| 366 | # | ||
| 367 | # SCSI Transports | ||
| 368 | # | ||
| 369 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 370 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 371 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 372 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 373 | CONFIG_SCSI_LOWLEVEL=y | ||
| 374 | # CONFIG_SCSI_DEBUG is not set | ||
| 375 | # CONFIG_SCSI_DH is not set | ||
| 376 | CONFIG_ATA=y | ||
| 377 | # CONFIG_ATA_NONSTANDARD is not set | ||
| 378 | CONFIG_SATA_PMP=y | ||
| 379 | CONFIG_ATA_SFF=y | ||
| 380 | # CONFIG_SATA_MV is not set | ||
| 381 | # CONFIG_PATA_PLATFORM is not set | ||
| 382 | # CONFIG_MD is not set | ||
| 383 | # CONFIG_PHONE is not set | ||
| 384 | |||
| 385 | # | ||
| 386 | # Input device support | ||
| 387 | # | ||
| 388 | CONFIG_INPUT=y | ||
| 389 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 390 | # CONFIG_INPUT_POLLDEV is not set | ||
| 391 | |||
| 392 | # | ||
| 393 | # Userland interfaces | ||
| 394 | # | ||
| 395 | # CONFIG_INPUT_MOUSEDEV is not set | ||
| 396 | # CONFIG_INPUT_JOYDEV is not set | ||
| 397 | # CONFIG_INPUT_EVDEV is not set | ||
| 398 | # CONFIG_INPUT_EVBUG is not set | ||
| 399 | |||
| 400 | # | ||
| 401 | # Input Device Drivers | ||
| 402 | # | ||
| 403 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 404 | # CONFIG_INPUT_MOUSE is not set | ||
| 405 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 406 | # CONFIG_INPUT_TABLET is not set | ||
| 407 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 408 | # CONFIG_INPUT_MISC is not set | ||
| 409 | |||
| 410 | # | ||
| 411 | # Hardware I/O ports | ||
| 412 | # | ||
| 413 | # CONFIG_SERIO is not set | ||
| 414 | # CONFIG_GAMEPORT is not set | ||
| 415 | |||
| 416 | # | ||
| 417 | # Character devices | ||
| 418 | # | ||
| 419 | CONFIG_VT=y | ||
| 420 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 421 | CONFIG_VT_CONSOLE=y | ||
| 422 | CONFIG_HW_CONSOLE=y | ||
| 423 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
| 424 | CONFIG_DEVKMEM=y | ||
| 425 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 426 | |||
| 427 | # | ||
| 428 | # Serial drivers | ||
| 429 | # | ||
| 430 | CONFIG_SERIAL_8250=y | ||
| 431 | # CONFIG_SERIAL_8250_CONSOLE is not set | ||
| 432 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
| 433 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 434 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
| 435 | |||
| 436 | # | ||
| 437 | # Non-8250 serial port support | ||
| 438 | # | ||
| 439 | CONFIG_SERIAL_SH_SCI=y | ||
| 440 | CONFIG_SERIAL_SH_SCI_NR_UARTS=1 | ||
| 441 | CONFIG_SERIAL_SH_SCI_CONSOLE=y | ||
| 442 | CONFIG_SERIAL_CORE=y | ||
| 443 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 444 | CONFIG_UNIX98_PTYS=y | ||
| 445 | CONFIG_LEGACY_PTYS=y | ||
| 446 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 447 | # CONFIG_IPMI_HANDLER is not set | ||
| 448 | CONFIG_HW_RANDOM=y | ||
| 449 | # CONFIG_R3964 is not set | ||
| 450 | # CONFIG_RAW_DRIVER is not set | ||
| 451 | # CONFIG_TCG_TPM is not set | ||
| 452 | # CONFIG_I2C is not set | ||
| 453 | CONFIG_SPI=y | ||
| 454 | # CONFIG_SPI_DEBUG is not set | ||
| 455 | CONFIG_SPI_MASTER=y | ||
| 456 | |||
| 457 | # | ||
| 458 | # SPI Master Controller Drivers | ||
| 459 | # | ||
| 460 | CONFIG_SPI_BITBANG=y | ||
| 461 | # CONFIG_SPI_SH_SCI is not set | ||
| 462 | |||
| 463 | # | ||
| 464 | # SPI Protocol Masters | ||
| 465 | # | ||
| 466 | # CONFIG_SPI_AT25 is not set | ||
| 467 | # CONFIG_SPI_SPIDEV is not set | ||
| 468 | # CONFIG_SPI_TLE62X0 is not set | ||
| 469 | # CONFIG_W1 is not set | ||
| 470 | # CONFIG_POWER_SUPPLY is not set | ||
| 471 | CONFIG_HWMON=y | ||
| 472 | # CONFIG_HWMON_VID is not set | ||
| 473 | # CONFIG_SENSORS_ADCXX is not set | ||
| 474 | # CONFIG_SENSORS_F71805F is not set | ||
| 475 | # CONFIG_SENSORS_F71882FG is not set | ||
| 476 | # CONFIG_SENSORS_IT87 is not set | ||
| 477 | # CONFIG_SENSORS_LM70 is not set | ||
| 478 | # CONFIG_SENSORS_MAX1111 is not set | ||
| 479 | # CONFIG_SENSORS_PC87360 is not set | ||
| 480 | # CONFIG_SENSORS_PC87427 is not set | ||
| 481 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
| 482 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
| 483 | # CONFIG_SENSORS_VT1211 is not set | ||
| 484 | # CONFIG_SENSORS_W83627HF is not set | ||
| 485 | # CONFIG_SENSORS_W83627EHF is not set | ||
| 486 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
| 487 | # CONFIG_THERMAL is not set | ||
| 488 | # CONFIG_THERMAL_HWMON is not set | ||
| 489 | # CONFIG_WATCHDOG is not set | ||
| 490 | |||
| 491 | # | ||
| 492 | # Sonics Silicon Backplane | ||
| 493 | # | ||
| 494 | CONFIG_SSB_POSSIBLE=y | ||
| 495 | # CONFIG_SSB is not set | ||
| 496 | |||
| 497 | # | ||
| 498 | # Multifunction device drivers | ||
| 499 | # | ||
| 500 | # CONFIG_MFD_CORE is not set | ||
| 501 | CONFIG_MFD_SM501=y | ||
| 502 | # CONFIG_HTC_PASIC3 is not set | ||
| 503 | # CONFIG_MFD_TMIO is not set | ||
| 504 | # CONFIG_MFD_WM8400 is not set | ||
| 505 | |||
| 506 | # | ||
| 507 | # Multimedia devices | ||
| 508 | # | ||
| 509 | |||
| 510 | # | ||
| 511 | # Multimedia core support | ||
| 512 | # | ||
| 513 | # CONFIG_VIDEO_DEV is not set | ||
| 514 | # CONFIG_VIDEO_MEDIA is not set | ||
| 515 | |||
| 516 | # | ||
| 517 | # Multimedia drivers | ||
| 518 | # | ||
| 519 | CONFIG_DAB=y | ||
| 520 | |||
| 521 | # | ||
| 522 | # Graphics support | ||
| 523 | # | ||
| 524 | # CONFIG_VGASTATE is not set | ||
| 525 | CONFIG_VIDEO_OUTPUT_CONTROL=m | ||
| 526 | CONFIG_FB=y | ||
| 527 | # CONFIG_FIRMWARE_EDID is not set | ||
| 528 | # CONFIG_FB_DDC is not set | ||
| 529 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 530 | CONFIG_FB_CFB_FILLRECT=y | ||
| 531 | CONFIG_FB_CFB_COPYAREA=y | ||
| 532 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
| 533 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
| 534 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 535 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 536 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 537 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 538 | # CONFIG_FB_SYS_FOPS is not set | ||
| 539 | # CONFIG_FB_SVGALIB is not set | ||
| 540 | # CONFIG_FB_MACMODES is not set | ||
| 541 | # CONFIG_FB_BACKLIGHT is not set | ||
| 542 | # CONFIG_FB_MODE_HELPERS is not set | ||
| 543 | # CONFIG_FB_TILEBLITTING is not set | ||
| 544 | |||
| 545 | # | ||
| 546 | # Frame buffer hardware drivers | ||
| 547 | # | ||
| 548 | # CONFIG_FB_S1D13XXX is not set | ||
| 549 | CONFIG_FB_SH_MOBILE_LCDC=m | ||
| 550 | CONFIG_FB_SM501=y | ||
| 551 | # CONFIG_FB_VIRTUAL is not set | ||
| 552 | # CONFIG_FB_METRONOME is not set | ||
| 553 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 554 | |||
| 555 | # | ||
| 556 | # Display device support | ||
| 557 | # | ||
| 558 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 559 | |||
| 560 | # | ||
| 561 | # Console display driver support | ||
| 562 | # | ||
| 563 | CONFIG_DUMMY_CONSOLE=y | ||
| 564 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
| 565 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
| 566 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
| 567 | # CONFIG_FONTS is not set | ||
| 568 | CONFIG_FONT_8x8=y | ||
| 569 | CONFIG_FONT_8x16=y | ||
| 570 | CONFIG_LOGO=y | ||
| 571 | # CONFIG_LOGO_LINUX_MONO is not set | ||
| 572 | # CONFIG_LOGO_LINUX_VGA16 is not set | ||
| 573 | # CONFIG_LOGO_LINUX_CLUT224 is not set | ||
| 574 | # CONFIG_LOGO_SUPERH_MONO is not set | ||
| 575 | # CONFIG_LOGO_SUPERH_VGA16 is not set | ||
| 576 | CONFIG_LOGO_SUPERH_CLUT224=y | ||
| 577 | CONFIG_SOUND=y | ||
| 578 | CONFIG_SOUND_OSS_CORE=y | ||
| 579 | CONFIG_SND=m | ||
| 580 | # CONFIG_SND_SEQUENCER is not set | ||
| 581 | # CONFIG_SND_MIXER_OSS is not set | ||
| 582 | # CONFIG_SND_PCM_OSS is not set | ||
| 583 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
| 584 | CONFIG_SND_SUPPORT_OLD_API=y | ||
| 585 | CONFIG_SND_VERBOSE_PROCFS=y | ||
| 586 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
| 587 | # CONFIG_SND_DEBUG is not set | ||
| 588 | CONFIG_SND_DRIVERS=y | ||
| 589 | # CONFIG_SND_DUMMY is not set | ||
| 590 | # CONFIG_SND_MTPAV is not set | ||
| 591 | # CONFIG_SND_SERIAL_U16550 is not set | ||
| 592 | # CONFIG_SND_MPU401 is not set | ||
| 593 | CONFIG_SND_SPI=y | ||
| 594 | CONFIG_SND_SUPERH=y | ||
| 595 | # CONFIG_SND_SOC is not set | ||
| 596 | CONFIG_SOUND_PRIME=m | ||
| 597 | CONFIG_HID_SUPPORT=y | ||
| 598 | CONFIG_HID=y | ||
| 599 | # CONFIG_HID_DEBUG is not set | ||
| 600 | # CONFIG_HIDRAW is not set | ||
| 601 | # CONFIG_HID_PID is not set | ||
| 602 | |||
| 603 | # | ||
| 604 | # Special HID drivers | ||
| 605 | # | ||
| 606 | CONFIG_HID_COMPAT=y | ||
| 607 | # CONFIG_USB_SUPPORT is not set | ||
| 608 | # CONFIG_MMC is not set | ||
| 609 | # CONFIG_MEMSTICK is not set | ||
| 610 | # CONFIG_NEW_LEDS is not set | ||
| 611 | # CONFIG_ACCESSIBILITY is not set | ||
| 612 | CONFIG_RTC_LIB=y | ||
| 613 | CONFIG_RTC_CLASS=y | ||
| 614 | CONFIG_RTC_HCTOSYS=y | ||
| 615 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 616 | # CONFIG_RTC_DEBUG is not set | ||
| 617 | |||
| 618 | # | ||
| 619 | # RTC interfaces | ||
| 620 | # | ||
| 621 | CONFIG_RTC_INTF_SYSFS=y | ||
| 622 | CONFIG_RTC_INTF_PROC=y | ||
| 623 | CONFIG_RTC_INTF_DEV=y | ||
| 624 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 625 | # CONFIG_RTC_DRV_TEST is not set | ||
| 626 | |||
| 627 | # | ||
| 628 | # SPI RTC drivers | ||
| 629 | # | ||
| 630 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 631 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 632 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
| 633 | CONFIG_RTC_DRV_R9701=y | ||
| 634 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
| 635 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 636 | |||
| 637 | # | ||
| 638 | # Platform RTC drivers | ||
| 639 | # | ||
| 640 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 641 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 642 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 643 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 644 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 645 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 646 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 647 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 648 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 649 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 650 | |||
| 651 | # | ||
| 652 | # on-CPU RTC drivers | ||
| 653 | # | ||
| 654 | # CONFIG_RTC_DRV_SH is not set | ||
| 655 | # CONFIG_DMADEVICES is not set | ||
| 656 | # CONFIG_UIO is not set | ||
| 657 | # CONFIG_STAGING is not set | ||
| 658 | |||
| 659 | # | ||
| 660 | # File systems | ||
| 661 | # | ||
| 662 | CONFIG_EXT2_FS=y | ||
| 663 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 664 | # CONFIG_EXT2_FS_XIP is not set | ||
| 665 | # CONFIG_EXT3_FS is not set | ||
| 666 | # CONFIG_EXT4_FS is not set | ||
| 667 | # CONFIG_REISERFS_FS is not set | ||
| 668 | # CONFIG_JFS_FS is not set | ||
| 669 | # CONFIG_FS_POSIX_ACL is not set | ||
| 670 | CONFIG_FILE_LOCKING=y | ||
| 671 | # CONFIG_XFS_FS is not set | ||
| 672 | CONFIG_DNOTIFY=y | ||
| 673 | CONFIG_INOTIFY=y | ||
| 674 | CONFIG_INOTIFY_USER=y | ||
| 675 | # CONFIG_QUOTA is not set | ||
| 676 | # CONFIG_AUTOFS_FS is not set | ||
| 677 | # CONFIG_AUTOFS4_FS is not set | ||
| 678 | # CONFIG_FUSE_FS is not set | ||
| 679 | |||
| 680 | # | ||
| 681 | # CD-ROM/DVD Filesystems | ||
| 682 | # | ||
| 683 | # CONFIG_ISO9660_FS is not set | ||
| 684 | # CONFIG_UDF_FS is not set | ||
| 685 | |||
| 686 | # | ||
| 687 | # DOS/FAT/NT Filesystems | ||
| 688 | # | ||
| 689 | CONFIG_FAT_FS=y | ||
| 690 | CONFIG_MSDOS_FS=y | ||
| 691 | CONFIG_VFAT_FS=y | ||
| 692 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 693 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 694 | # CONFIG_NTFS_FS is not set | ||
| 695 | |||
| 696 | # | ||
| 697 | # Pseudo filesystems | ||
| 698 | # | ||
| 699 | CONFIG_PROC_FS=y | ||
| 700 | CONFIG_PROC_KCORE=y | ||
| 701 | CONFIG_PROC_SYSCTL=y | ||
| 702 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 703 | CONFIG_SYSFS=y | ||
| 704 | CONFIG_TMPFS=y | ||
| 705 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 706 | # CONFIG_HUGETLBFS is not set | ||
| 707 | # CONFIG_HUGETLB_PAGE is not set | ||
| 708 | # CONFIG_CONFIGFS_FS is not set | ||
| 709 | |||
| 710 | # | ||
| 711 | # Miscellaneous filesystems | ||
| 712 | # | ||
| 713 | # CONFIG_ADFS_FS is not set | ||
| 714 | # CONFIG_AFFS_FS is not set | ||
| 715 | # CONFIG_HFS_FS is not set | ||
| 716 | # CONFIG_HFSPLUS_FS is not set | ||
| 717 | # CONFIG_BEFS_FS is not set | ||
| 718 | # CONFIG_BFS_FS is not set | ||
| 719 | # CONFIG_EFS_FS is not set | ||
| 720 | # CONFIG_CRAMFS is not set | ||
| 721 | # CONFIG_VXFS_FS is not set | ||
| 722 | CONFIG_MINIX_FS=y | ||
| 723 | # CONFIG_OMFS_FS is not set | ||
| 724 | # CONFIG_HPFS_FS is not set | ||
| 725 | # CONFIG_QNX4FS_FS is not set | ||
| 726 | # CONFIG_ROMFS_FS is not set | ||
| 727 | # CONFIG_SYSV_FS is not set | ||
| 728 | # CONFIG_UFS_FS is not set | ||
| 729 | |||
| 730 | # | ||
| 731 | # Partition Types | ||
| 732 | # | ||
| 733 | # CONFIG_PARTITION_ADVANCED is not set | ||
| 734 | CONFIG_MSDOS_PARTITION=y | ||
| 735 | CONFIG_NLS=y | ||
| 736 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 737 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
| 738 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 739 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 740 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 741 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 742 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 743 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 744 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 745 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 746 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 747 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 748 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 749 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 750 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 751 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 752 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 753 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 754 | CONFIG_NLS_CODEPAGE_932=y | ||
| 755 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 756 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 757 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 758 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 759 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 760 | # CONFIG_NLS_ASCII is not set | ||
| 761 | # CONFIG_NLS_ISO8859_1 is not set | ||
| 762 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 763 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 764 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 765 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 766 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 767 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 768 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 769 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 770 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 771 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 772 | # CONFIG_NLS_KOI8_R is not set | ||
| 773 | # CONFIG_NLS_KOI8_U is not set | ||
| 774 | # CONFIG_NLS_UTF8 is not set | ||
| 775 | |||
| 776 | # | ||
| 777 | # Kernel hacking | ||
| 778 | # | ||
| 779 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 780 | # CONFIG_PRINTK_TIME is not set | ||
| 781 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 782 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 783 | CONFIG_FRAME_WARN=1024 | ||
| 784 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 785 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 786 | CONFIG_DEBUG_FS=y | ||
| 787 | # CONFIG_HEADERS_CHECK is not set | ||
| 788 | CONFIG_DEBUG_KERNEL=y | ||
| 789 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 790 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 791 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 792 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 793 | CONFIG_SCHED_DEBUG=y | ||
| 794 | # CONFIG_SCHEDSTATS is not set | ||
| 795 | # CONFIG_TIMER_STATS is not set | ||
| 796 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 797 | # CONFIG_DEBUG_SLAB is not set | ||
| 798 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 799 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 800 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 801 | # CONFIG_DEBUG_MUTEXES is not set | ||
| 802 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 803 | # CONFIG_PROVE_LOCKING is not set | ||
| 804 | # CONFIG_LOCK_STAT is not set | ||
| 805 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 806 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 807 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 808 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 809 | CONFIG_DEBUG_INFO=y | ||
| 810 | # CONFIG_DEBUG_VM is not set | ||
| 811 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 812 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 813 | # CONFIG_DEBUG_LIST is not set | ||
| 814 | # CONFIG_DEBUG_SG is not set | ||
| 815 | # CONFIG_FRAME_POINTER is not set | ||
| 816 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 817 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 818 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 819 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 820 | # CONFIG_FAULT_INJECTION is not set | ||
| 821 | # CONFIG_LATENCYTOP is not set | ||
| 822 | CONFIG_NOP_TRACER=y | ||
| 823 | CONFIG_HAVE_FTRACE=y | ||
| 824 | # CONFIG_FTRACE is not set | ||
| 825 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 826 | # CONFIG_SCHED_TRACER is not set | ||
| 827 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 828 | # CONFIG_BOOT_TRACER is not set | ||
| 829 | # CONFIG_STACK_TRACER is not set | ||
| 830 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
| 831 | # CONFIG_SAMPLES is not set | ||
| 832 | # CONFIG_SH_STANDARD_BIOS is not set | ||
| 833 | CONFIG_EARLY_SCIF_CONSOLE=y | ||
| 834 | CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe80000 | ||
| 835 | CONFIG_EARLY_PRINTK=y | ||
| 836 | # CONFIG_DEBUG_BOOTMEM is not set | ||
| 837 | # CONFIG_DEBUG_STACKOVERFLOW is not set | ||
| 838 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 839 | # CONFIG_4KSTACKS is not set | ||
| 840 | # CONFIG_IRQSTACKS is not set | ||
| 841 | # CONFIG_SH_KGDB is not set | ||
| 842 | |||
| 843 | # | ||
| 844 | # Security options | ||
| 845 | # | ||
| 846 | # CONFIG_KEYS is not set | ||
| 847 | # CONFIG_SECURITY is not set | ||
| 848 | # CONFIG_SECURITYFS is not set | ||
| 849 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 850 | CONFIG_CRYPTO=y | ||
| 851 | |||
| 852 | # | ||
| 853 | # Crypto core or helper | ||
| 854 | # | ||
| 855 | # CONFIG_CRYPTO_FIPS is not set | ||
| 856 | # CONFIG_CRYPTO_MANAGER is not set | ||
| 857 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 858 | # CONFIG_CRYPTO_NULL is not set | ||
| 859 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 860 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 861 | # CONFIG_CRYPTO_TEST is not set | ||
| 862 | |||
| 863 | # | ||
| 864 | # Authenticated Encryption with Associated Data | ||
| 865 | # | ||
| 866 | # CONFIG_CRYPTO_CCM is not set | ||
| 867 | # CONFIG_CRYPTO_GCM is not set | ||
| 868 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 869 | |||
| 870 | # | ||
| 871 | # Block modes | ||
| 872 | # | ||
| 873 | # CONFIG_CRYPTO_CBC is not set | ||
| 874 | # CONFIG_CRYPTO_CTR is not set | ||
| 875 | # CONFIG_CRYPTO_CTS is not set | ||
| 876 | # CONFIG_CRYPTO_ECB is not set | ||
| 877 | # CONFIG_CRYPTO_LRW is not set | ||
| 878 | # CONFIG_CRYPTO_PCBC is not set | ||
| 879 | # CONFIG_CRYPTO_XTS is not set | ||
| 880 | |||
| 881 | # | ||
| 882 | # Hash modes | ||
| 883 | # | ||
| 884 | # CONFIG_CRYPTO_HMAC is not set | ||
| 885 | # CONFIG_CRYPTO_XCBC is not set | ||
| 886 | |||
| 887 | # | ||
| 888 | # Digest | ||
| 889 | # | ||
| 890 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 891 | # CONFIG_CRYPTO_MD4 is not set | ||
| 892 | # CONFIG_CRYPTO_MD5 is not set | ||
| 893 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 894 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 895 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 896 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 897 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 898 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 899 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 900 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 901 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 902 | # CONFIG_CRYPTO_WP512 is not set | ||
| 903 | |||
| 904 | # | ||
| 905 | # Ciphers | ||
| 906 | # | ||
| 907 | # CONFIG_CRYPTO_AES is not set | ||
| 908 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 909 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 910 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 911 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 912 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 913 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 914 | # CONFIG_CRYPTO_DES is not set | ||
| 915 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 916 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 917 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 918 | # CONFIG_CRYPTO_SEED is not set | ||
| 919 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 920 | # CONFIG_CRYPTO_TEA is not set | ||
| 921 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 922 | |||
| 923 | # | ||
| 924 | # Compression | ||
| 925 | # | ||
| 926 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 927 | # CONFIG_CRYPTO_LZO is not set | ||
| 928 | |||
| 929 | # | ||
| 930 | # Random Number Generation | ||
| 931 | # | ||
| 932 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 933 | CONFIG_CRYPTO_HW=y | ||
| 934 | |||
| 935 | # | ||
| 936 | # Library routines | ||
| 937 | # | ||
| 938 | CONFIG_BITREVERSE=y | ||
| 939 | # CONFIG_CRC_CCITT is not set | ||
| 940 | # CONFIG_CRC16 is not set | ||
| 941 | CONFIG_CRC_T10DIF=y | ||
| 942 | # CONFIG_CRC_ITU_T is not set | ||
| 943 | CONFIG_CRC32=y | ||
| 944 | # CONFIG_CRC7 is not set | ||
| 945 | # CONFIG_LIBCRC32C is not set | ||
| 946 | CONFIG_PLIST=y | ||
| 947 | CONFIG_HAS_IOMEM=y | ||
| 948 | CONFIG_HAS_IOPORT=y | ||
| 949 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/sh/configs/se7343_defconfig b/arch/sh/configs/se7343_defconfig index 075f42ed5b09..be246f381507 100644 --- a/arch/sh/configs/se7343_defconfig +++ b/arch/sh/configs/se7343_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.27 | 3 | # Linux kernel version: 2.6.28-rc6 |
| 4 | # Wed Oct 22 19:00:21 2008 | 4 | # Thu Dec 4 16:40:25 2008 |
| 5 | # | 5 | # |
| 6 | CONFIG_SUPERH=y | 6 | CONFIG_SUPERH=y |
| 7 | CONFIG_SUPERH32=y | 7 | CONFIG_SUPERH32=y |
| @@ -74,7 +74,6 @@ CONFIG_EVENTFD=y | |||
| 74 | # CONFIG_SHMEM is not set | 74 | # CONFIG_SHMEM is not set |
| 75 | CONFIG_AIO=y | 75 | CONFIG_AIO=y |
| 76 | CONFIG_VM_EVENT_COUNTERS=y | 76 | CONFIG_VM_EVENT_COUNTERS=y |
| 77 | CONFIG_PCI_QUIRKS=y | ||
| 78 | CONFIG_SLAB=y | 77 | CONFIG_SLAB=y |
| 79 | # CONFIG_SLUB is not set | 78 | # CONFIG_SLUB is not set |
| 80 | # CONFIG_SLOB is not set | 79 | # CONFIG_SLOB is not set |
| @@ -127,6 +126,7 @@ CONFIG_CPU_SH4=y | |||
| 127 | CONFIG_CPU_SH4A=y | 126 | CONFIG_CPU_SH4A=y |
| 128 | CONFIG_CPU_SH4AL_DSP=y | 127 | CONFIG_CPU_SH4AL_DSP=y |
| 129 | # CONFIG_CPU_SUBTYPE_SH7619 is not set | 128 | # CONFIG_CPU_SUBTYPE_SH7619 is not set |
| 129 | # CONFIG_CPU_SUBTYPE_SH7201 is not set | ||
| 130 | # CONFIG_CPU_SUBTYPE_SH7203 is not set | 130 | # CONFIG_CPU_SUBTYPE_SH7203 is not set |
| 131 | # CONFIG_CPU_SUBTYPE_SH7206 is not set | 131 | # CONFIG_CPU_SUBTYPE_SH7206 is not set |
| 132 | # CONFIG_CPU_SUBTYPE_SH7263 is not set | 132 | # CONFIG_CPU_SUBTYPE_SH7263 is not set |
| @@ -227,7 +227,7 @@ CONFIG_SH_7343_SOLUTION_ENGINE=y | |||
| 227 | # | 227 | # |
| 228 | CONFIG_SH_TMU=y | 228 | CONFIG_SH_TMU=y |
| 229 | CONFIG_SH_TIMER_IRQ=16 | 229 | CONFIG_SH_TIMER_IRQ=16 |
| 230 | CONFIG_SH_PCLK_FREQ=27000000 | 230 | CONFIG_SH_PCLK_FREQ=33333333 |
| 231 | # CONFIG_NO_HZ is not set | 231 | # CONFIG_NO_HZ is not set |
| 232 | # CONFIG_HIGH_RES_TIMERS is not set | 232 | # CONFIG_HIGH_RES_TIMERS is not set |
| 233 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | 233 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
| @@ -274,7 +274,8 @@ CONFIG_GUSA=y | |||
| 274 | # | 274 | # |
| 275 | CONFIG_ZERO_PAGE_OFFSET=0x00001000 | 275 | CONFIG_ZERO_PAGE_OFFSET=0x00001000 |
| 276 | CONFIG_BOOT_LINK_OFFSET=0x00800000 | 276 | CONFIG_BOOT_LINK_OFFSET=0x00800000 |
| 277 | # CONFIG_CMDLINE_BOOL is not set | 277 | CONFIG_CMDLINE_BOOL=y |
| 278 | CONFIG_CMDLINE="console=ttySC0,115200" | ||
| 278 | 279 | ||
| 279 | # | 280 | # |
| 280 | # Bus options | 281 | # Bus options |
| @@ -463,6 +464,7 @@ CONFIG_BLK_DEV=y | |||
| 463 | # CONFIG_BLK_DEV_COW_COMMON is not set | 464 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 464 | # CONFIG_BLK_DEV_LOOP is not set | 465 | # CONFIG_BLK_DEV_LOOP is not set |
| 465 | # CONFIG_BLK_DEV_NBD is not set | 466 | # CONFIG_BLK_DEV_NBD is not set |
| 467 | # CONFIG_BLK_DEV_UB is not set | ||
| 466 | # CONFIG_BLK_DEV_RAM is not set | 468 | # CONFIG_BLK_DEV_RAM is not set |
| 467 | # CONFIG_CDROM_PKTCDVD is not set | 469 | # CONFIG_CDROM_PKTCDVD is not set |
| 468 | # CONFIG_ATA_OVER_ETH is not set | 470 | # CONFIG_ATA_OVER_ETH is not set |
| @@ -519,23 +521,10 @@ CONFIG_NETDEVICES=y | |||
| 519 | # CONFIG_EQUALIZER is not set | 521 | # CONFIG_EQUALIZER is not set |
| 520 | # CONFIG_TUN is not set | 522 | # CONFIG_TUN is not set |
| 521 | # CONFIG_VETH is not set | 523 | # CONFIG_VETH is not set |
| 522 | # CONFIG_PHYLIB is not set | 524 | # CONFIG_NET_ETHERNET is not set |
| 523 | CONFIG_NET_ETHERNET=y | ||
| 524 | CONFIG_MII=y | 525 | CONFIG_MII=y |
| 525 | # CONFIG_AX88796 is not set | 526 | # CONFIG_NETDEV_1000 is not set |
| 526 | # CONFIG_STNIC is not set | 527 | # CONFIG_NETDEV_10000 is not set |
| 527 | CONFIG_SMC91X=y | ||
| 528 | # CONFIG_SMC911X is not set | ||
| 529 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 530 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 531 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 532 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 533 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 534 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 535 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 536 | # CONFIG_B44 is not set | ||
| 537 | CONFIG_NETDEV_1000=y | ||
| 538 | CONFIG_NETDEV_10000=y | ||
| 539 | 528 | ||
| 540 | # | 529 | # |
| 541 | # Wireless LAN | 530 | # Wireless LAN |
| @@ -543,6 +532,26 @@ CONFIG_NETDEV_10000=y | |||
| 543 | # CONFIG_WLAN_PRE80211 is not set | 532 | # CONFIG_WLAN_PRE80211 is not set |
| 544 | # CONFIG_WLAN_80211 is not set | 533 | # CONFIG_WLAN_80211 is not set |
| 545 | # CONFIG_IWLWIFI_LEDS is not set | 534 | # CONFIG_IWLWIFI_LEDS is not set |
| 535 | |||
| 536 | # | ||
| 537 | # USB Network Adapters | ||
| 538 | # | ||
| 539 | # CONFIG_USB_CATC is not set | ||
| 540 | # CONFIG_USB_KAWETH is not set | ||
| 541 | # CONFIG_USB_PEGASUS is not set | ||
| 542 | # CONFIG_USB_RTL8150 is not set | ||
| 543 | CONFIG_USB_USBNET=y | ||
| 544 | # CONFIG_USB_NET_AX8817X is not set | ||
| 545 | CONFIG_USB_NET_CDCETHER=y | ||
| 546 | CONFIG_USB_NET_DM9601=y | ||
| 547 | # CONFIG_USB_NET_SMSC95XX is not set | ||
| 548 | # CONFIG_USB_NET_GL620A is not set | ||
| 549 | # CONFIG_USB_NET_NET1080 is not set | ||
| 550 | # CONFIG_USB_NET_PLUSB is not set | ||
| 551 | # CONFIG_USB_NET_MCS7830 is not set | ||
| 552 | # CONFIG_USB_NET_RNDIS_HOST is not set | ||
| 553 | # CONFIG_USB_NET_CDC_SUBSET is not set | ||
| 554 | # CONFIG_USB_NET_ZAURUS is not set | ||
| 546 | # CONFIG_WAN is not set | 555 | # CONFIG_WAN is not set |
| 547 | # CONFIG_PPP is not set | 556 | # CONFIG_PPP is not set |
| 548 | # CONFIG_SLIP is not set | 557 | # CONFIG_SLIP is not set |
| @@ -597,13 +606,17 @@ CONFIG_DEVKMEM=y | |||
| 597 | # | 606 | # |
| 598 | # Serial drivers | 607 | # Serial drivers |
| 599 | # | 608 | # |
| 600 | # CONFIG_SERIAL_8250 is not set | 609 | CONFIG_SERIAL_8250=y |
| 610 | # CONFIG_SERIAL_8250_CONSOLE is not set | ||
| 611 | CONFIG_SERIAL_8250_NR_UARTS=2 | ||
| 612 | CONFIG_SERIAL_8250_RUNTIME_UARTS=2 | ||
| 613 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
| 601 | 614 | ||
| 602 | # | 615 | # |
| 603 | # Non-8250 serial port support | 616 | # Non-8250 serial port support |
| 604 | # | 617 | # |
| 605 | CONFIG_SERIAL_SH_SCI=y | 618 | CONFIG_SERIAL_SH_SCI=y |
| 606 | CONFIG_SERIAL_SH_SCI_NR_UARTS=2 | 619 | CONFIG_SERIAL_SH_SCI_NR_UARTS=4 |
| 607 | CONFIG_SERIAL_SH_SCI_CONSOLE=y | 620 | CONFIG_SERIAL_SH_SCI_CONSOLE=y |
| 608 | CONFIG_SERIAL_CORE=y | 621 | CONFIG_SERIAL_CORE=y |
| 609 | CONFIG_SERIAL_CORE_CONSOLE=y | 622 | CONFIG_SERIAL_CORE_CONSOLE=y |
| @@ -615,7 +628,51 @@ CONFIG_HW_RANDOM=y | |||
| 615 | # CONFIG_R3964 is not set | 628 | # CONFIG_R3964 is not set |
| 616 | # CONFIG_RAW_DRIVER is not set | 629 | # CONFIG_RAW_DRIVER is not set |
| 617 | # CONFIG_TCG_TPM is not set | 630 | # CONFIG_TCG_TPM is not set |
| 618 | # CONFIG_I2C is not set | 631 | CONFIG_I2C=y |
| 632 | CONFIG_I2C_BOARDINFO=y | ||
| 633 | # CONFIG_I2C_CHARDEV is not set | ||
| 634 | CONFIG_I2C_HELPER_AUTO=y | ||
| 635 | |||
| 636 | # | ||
| 637 | # I2C Hardware Bus support | ||
| 638 | # | ||
| 639 | |||
| 640 | # | ||
| 641 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 642 | # | ||
| 643 | # CONFIG_I2C_OCORES is not set | ||
| 644 | CONFIG_I2C_SH_MOBILE=y | ||
| 645 | # CONFIG_I2C_SIMTEC is not set | ||
| 646 | |||
| 647 | # | ||
| 648 | # External I2C/SMBus adapter drivers | ||
| 649 | # | ||
| 650 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 651 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 652 | # CONFIG_I2C_TINY_USB is not set | ||
| 653 | |||
| 654 | # | ||
| 655 | # Other I2C/SMBus bus drivers | ||
| 656 | # | ||
| 657 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 658 | # CONFIG_I2C_STUB is not set | ||
| 659 | |||
| 660 | # | ||
| 661 | # Miscellaneous I2C Chip support | ||
| 662 | # | ||
| 663 | # CONFIG_DS1682 is not set | ||
| 664 | # CONFIG_AT24 is not set | ||
| 665 | # CONFIG_SENSORS_EEPROM is not set | ||
| 666 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 667 | # CONFIG_PCF8575 is not set | ||
| 668 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 669 | # CONFIG_SENSORS_PCF8591 is not set | ||
| 670 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 671 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 672 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 673 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 674 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 675 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 619 | # CONFIG_SPI is not set | 676 | # CONFIG_SPI is not set |
| 620 | # CONFIG_W1 is not set | 677 | # CONFIG_W1 is not set |
| 621 | # CONFIG_POWER_SUPPLY is not set | 678 | # CONFIG_POWER_SUPPLY is not set |
| @@ -623,11 +680,11 @@ CONFIG_HW_RANDOM=y | |||
| 623 | # CONFIG_THERMAL is not set | 680 | # CONFIG_THERMAL is not set |
| 624 | # CONFIG_THERMAL_HWMON is not set | 681 | # CONFIG_THERMAL_HWMON is not set |
| 625 | # CONFIG_WATCHDOG is not set | 682 | # CONFIG_WATCHDOG is not set |
| 683 | CONFIG_SSB_POSSIBLE=y | ||
| 626 | 684 | ||
| 627 | # | 685 | # |
| 628 | # Sonics Silicon Backplane | 686 | # Sonics Silicon Backplane |
| 629 | # | 687 | # |
| 630 | CONFIG_SSB_POSSIBLE=y | ||
| 631 | # CONFIG_SSB is not set | 688 | # CONFIG_SSB is not set |
| 632 | 689 | ||
| 633 | # | 690 | # |
| @@ -637,7 +694,10 @@ CONFIG_SSB_POSSIBLE=y | |||
| 637 | # CONFIG_MFD_SM501 is not set | 694 | # CONFIG_MFD_SM501 is not set |
| 638 | # CONFIG_HTC_PASIC3 is not set | 695 | # CONFIG_HTC_PASIC3 is not set |
| 639 | # CONFIG_MFD_TMIO is not set | 696 | # CONFIG_MFD_TMIO is not set |
| 697 | # CONFIG_PMIC_DA903X is not set | ||
| 640 | # CONFIG_MFD_WM8400 is not set | 698 | # CONFIG_MFD_WM8400 is not set |
| 699 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 700 | # CONFIG_REGULATOR is not set | ||
| 641 | 701 | ||
| 642 | # | 702 | # |
| 643 | # Multimedia devices | 703 | # Multimedia devices |
| @@ -657,6 +717,16 @@ CONFIG_VIDEO_MEDIA=y | |||
| 657 | # Multimedia drivers | 717 | # Multimedia drivers |
| 658 | # | 718 | # |
| 659 | # CONFIG_MEDIA_ATTACH is not set | 719 | # CONFIG_MEDIA_ATTACH is not set |
| 720 | CONFIG_MEDIA_TUNER=y | ||
| 721 | # CONFIG_MEDIA_TUNER_CUSTOMIZE is not set | ||
| 722 | CONFIG_MEDIA_TUNER_SIMPLE=y | ||
| 723 | CONFIG_MEDIA_TUNER_TDA8290=y | ||
| 724 | CONFIG_MEDIA_TUNER_TDA9887=y | ||
| 725 | CONFIG_MEDIA_TUNER_TEA5761=y | ||
| 726 | CONFIG_MEDIA_TUNER_TEA5767=y | ||
| 727 | CONFIG_MEDIA_TUNER_MT20XX=y | ||
| 728 | CONFIG_MEDIA_TUNER_XC2028=y | ||
| 729 | CONFIG_MEDIA_TUNER_XC5000=y | ||
| 660 | CONFIG_VIDEO_V4L2=y | 730 | CONFIG_VIDEO_V4L2=y |
| 661 | CONFIG_VIDEO_V4L1=y | 731 | CONFIG_VIDEO_V4L1=y |
| 662 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | 732 | CONFIG_VIDEO_CAPTURE_DRIVERS=y |
| @@ -665,8 +735,57 @@ CONFIG_VIDEO_CAPTURE_DRIVERS=y | |||
| 665 | CONFIG_VIDEO_HELPER_CHIPS_AUTO=y | 735 | CONFIG_VIDEO_HELPER_CHIPS_AUTO=y |
| 666 | # CONFIG_VIDEO_VIVI is not set | 736 | # CONFIG_VIDEO_VIVI is not set |
| 667 | # CONFIG_VIDEO_CPIA is not set | 737 | # CONFIG_VIDEO_CPIA is not set |
| 738 | # CONFIG_VIDEO_CPIA2 is not set | ||
| 739 | # CONFIG_VIDEO_SAA5246A is not set | ||
| 740 | # CONFIG_VIDEO_SAA5249 is not set | ||
| 668 | # CONFIG_SOC_CAMERA is not set | 741 | # CONFIG_SOC_CAMERA is not set |
| 742 | CONFIG_V4L_USB_DRIVERS=y | ||
| 743 | # CONFIG_USB_VIDEO_CLASS is not set | ||
| 744 | CONFIG_USB_GSPCA=m | ||
| 745 | # CONFIG_USB_M5602 is not set | ||
| 746 | # CONFIG_USB_GSPCA_CONEX is not set | ||
| 747 | # CONFIG_USB_GSPCA_ETOMS is not set | ||
| 748 | # CONFIG_USB_GSPCA_FINEPIX is not set | ||
| 749 | # CONFIG_USB_GSPCA_MARS is not set | ||
| 750 | # CONFIG_USB_GSPCA_OV519 is not set | ||
| 751 | # CONFIG_USB_GSPCA_PAC207 is not set | ||
| 752 | # CONFIG_USB_GSPCA_PAC7311 is not set | ||
| 753 | # CONFIG_USB_GSPCA_SONIXB is not set | ||
| 754 | # CONFIG_USB_GSPCA_SONIXJ is not set | ||
| 755 | # CONFIG_USB_GSPCA_SPCA500 is not set | ||
| 756 | # CONFIG_USB_GSPCA_SPCA501 is not set | ||
| 757 | # CONFIG_USB_GSPCA_SPCA505 is not set | ||
| 758 | # CONFIG_USB_GSPCA_SPCA506 is not set | ||
| 759 | # CONFIG_USB_GSPCA_SPCA508 is not set | ||
| 760 | # CONFIG_USB_GSPCA_SPCA561 is not set | ||
| 761 | # CONFIG_USB_GSPCA_STK014 is not set | ||
| 762 | # CONFIG_USB_GSPCA_SUNPLUS is not set | ||
| 763 | # CONFIG_USB_GSPCA_T613 is not set | ||
| 764 | # CONFIG_USB_GSPCA_TV8532 is not set | ||
| 765 | # CONFIG_USB_GSPCA_VC032X is not set | ||
| 766 | # CONFIG_USB_GSPCA_ZC3XX is not set | ||
| 767 | # CONFIG_VIDEO_PVRUSB2 is not set | ||
| 768 | # CONFIG_VIDEO_EM28XX is not set | ||
| 769 | # CONFIG_VIDEO_USBVISION is not set | ||
| 770 | # CONFIG_USB_VICAM is not set | ||
| 771 | # CONFIG_USB_IBMCAM is not set | ||
| 772 | # CONFIG_USB_KONICAWC is not set | ||
| 773 | # CONFIG_USB_QUICKCAM_MESSENGER is not set | ||
| 774 | # CONFIG_USB_ET61X251 is not set | ||
| 775 | # CONFIG_VIDEO_OVCAMCHIP is not set | ||
| 776 | # CONFIG_USB_OV511 is not set | ||
| 777 | # CONFIG_USB_SE401 is not set | ||
| 778 | # CONFIG_USB_SN9C102 is not set | ||
| 779 | # CONFIG_USB_STV680 is not set | ||
| 780 | # CONFIG_USB_ZC0301 is not set | ||
| 781 | # CONFIG_USB_PWC is not set | ||
| 782 | # CONFIG_USB_ZR364XX is not set | ||
| 783 | # CONFIG_USB_STKWEBCAM is not set | ||
| 784 | # CONFIG_USB_S2255 is not set | ||
| 669 | CONFIG_RADIO_ADAPTERS=y | 785 | CONFIG_RADIO_ADAPTERS=y |
| 786 | # CONFIG_USB_DSBR is not set | ||
| 787 | # CONFIG_USB_SI470X is not set | ||
| 788 | # CONFIG_USB_MR800 is not set | ||
| 670 | # CONFIG_DAB is not set | 789 | # CONFIG_DAB is not set |
| 671 | 790 | ||
| 672 | # | 791 | # |
| @@ -700,6 +819,7 @@ CONFIG_FB_CFB_IMAGEBLIT=m | |||
| 700 | CONFIG_FB_SH_MOBILE_LCDC=m | 819 | CONFIG_FB_SH_MOBILE_LCDC=m |
| 701 | # CONFIG_FB_VIRTUAL is not set | 820 | # CONFIG_FB_VIRTUAL is not set |
| 702 | # CONFIG_FB_METRONOME is not set | 821 | # CONFIG_FB_METRONOME is not set |
| 822 | # CONFIG_FB_MB862XX is not set | ||
| 703 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 823 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set |
| 704 | 824 | ||
| 705 | # | 825 | # |
| @@ -737,27 +857,147 @@ CONFIG_SND_DRIVERS=y | |||
| 737 | # CONFIG_SND_SERIAL_U16550 is not set | 857 | # CONFIG_SND_SERIAL_U16550 is not set |
| 738 | # CONFIG_SND_MPU401 is not set | 858 | # CONFIG_SND_MPU401 is not set |
| 739 | CONFIG_SND_SUPERH=y | 859 | CONFIG_SND_SUPERH=y |
| 860 | CONFIG_SND_USB=y | ||
| 861 | # CONFIG_SND_USB_AUDIO is not set | ||
| 862 | # CONFIG_SND_USB_CAIAQ is not set | ||
| 740 | # CONFIG_SND_SOC is not set | 863 | # CONFIG_SND_SOC is not set |
| 741 | # CONFIG_SOUND_PRIME is not set | 864 | # CONFIG_SOUND_PRIME is not set |
| 742 | CONFIG_HID_SUPPORT=y | 865 | CONFIG_HID_SUPPORT=y |
| 743 | CONFIG_HID=y | 866 | CONFIG_HID=y |
| 744 | # CONFIG_HID_DEBUG is not set | 867 | # CONFIG_HID_DEBUG is not set |
| 745 | # CONFIG_HIDRAW is not set | 868 | # CONFIG_HIDRAW is not set |
| 869 | |||
| 870 | # | ||
| 871 | # USB Input Devices | ||
| 872 | # | ||
| 873 | CONFIG_USB_HID=y | ||
| 746 | # CONFIG_HID_PID is not set | 874 | # CONFIG_HID_PID is not set |
| 875 | # CONFIG_USB_HIDDEV is not set | ||
| 747 | 876 | ||
| 748 | # | 877 | # |
| 749 | # Special HID drivers | 878 | # Special HID drivers |
| 750 | # | 879 | # |
| 751 | CONFIG_HID_COMPAT=y | 880 | CONFIG_HID_COMPAT=y |
| 752 | # CONFIG_USB_SUPPORT is not set | 881 | CONFIG_HID_A4TECH=y |
| 882 | CONFIG_HID_APPLE=y | ||
| 883 | CONFIG_HID_BELKIN=y | ||
| 884 | CONFIG_HID_BRIGHT=y | ||
| 885 | CONFIG_HID_CHERRY=y | ||
| 886 | CONFIG_HID_CHICONY=y | ||
| 887 | CONFIG_HID_CYPRESS=y | ||
| 888 | CONFIG_HID_DELL=y | ||
| 889 | CONFIG_HID_EZKEY=y | ||
| 890 | CONFIG_HID_GYRATION=y | ||
| 891 | CONFIG_HID_LOGITECH=y | ||
| 892 | # CONFIG_LOGITECH_FF is not set | ||
| 893 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | ||
| 894 | CONFIG_HID_MICROSOFT=y | ||
| 895 | CONFIG_HID_MONTEREY=y | ||
| 896 | CONFIG_HID_PANTHERLORD=y | ||
| 897 | # CONFIG_PANTHERLORD_FF is not set | ||
| 898 | CONFIG_HID_PETALYNX=y | ||
| 899 | CONFIG_HID_SAMSUNG=y | ||
| 900 | CONFIG_HID_SONY=y | ||
| 901 | CONFIG_HID_SUNPLUS=y | ||
| 902 | # CONFIG_THRUSTMASTER_FF is not set | ||
| 903 | # CONFIG_ZEROPLUS_FF is not set | ||
| 904 | CONFIG_USB_SUPPORT=y | ||
| 905 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 906 | # CONFIG_USB_ARCH_HAS_OHCI is not set | ||
| 907 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
| 908 | CONFIG_USB=y | ||
| 909 | CONFIG_USB_DEBUG=y | ||
| 910 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
| 911 | |||
| 912 | # | ||
| 913 | # Miscellaneous USB options | ||
| 914 | # | ||
| 915 | CONFIG_USB_DEVICEFS=y | ||
| 916 | CONFIG_USB_DEVICE_CLASS=y | ||
| 917 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 918 | # CONFIG_USB_OTG is not set | ||
| 919 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 920 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 921 | # CONFIG_USB_MON is not set | ||
| 922 | # CONFIG_USB_WUSB is not set | ||
| 923 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 924 | |||
| 925 | # | ||
| 926 | # USB Host Controller Drivers | ||
| 927 | # | ||
| 928 | # CONFIG_USB_C67X00_HCD is not set | ||
| 929 | CONFIG_USB_ISP116X_HCD=y | ||
| 930 | # CONFIG_USB_SL811_HCD is not set | ||
| 931 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 932 | # CONFIG_USB_HWA_HCD is not set | ||
| 933 | |||
| 934 | # | ||
| 935 | # USB Device Class drivers | ||
| 936 | # | ||
| 937 | # CONFIG_USB_ACM is not set | ||
| 938 | # CONFIG_USB_PRINTER is not set | ||
| 939 | # CONFIG_USB_WDM is not set | ||
| 940 | # CONFIG_USB_TMC is not set | ||
| 941 | |||
| 942 | # | ||
| 943 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; | ||
| 944 | # | ||
| 945 | |||
| 946 | # | ||
| 947 | # see USB_STORAGE Help for more information | ||
| 948 | # | ||
| 949 | # CONFIG_USB_STORAGE is not set | ||
| 950 | # CONFIG_USB_LIBUSUAL is not set | ||
| 951 | |||
| 952 | # | ||
| 953 | # USB Imaging devices | ||
| 954 | # | ||
| 955 | # CONFIG_USB_MDC800 is not set | ||
| 956 | # CONFIG_USB_MICROTEK is not set | ||
| 957 | |||
| 958 | # | ||
| 959 | # USB port drivers | ||
| 960 | # | ||
| 961 | # CONFIG_USB_SERIAL is not set | ||
| 962 | |||
| 963 | # | ||
| 964 | # USB Miscellaneous drivers | ||
| 965 | # | ||
| 966 | # CONFIG_USB_EMI62 is not set | ||
| 967 | # CONFIG_USB_EMI26 is not set | ||
| 968 | # CONFIG_USB_ADUTUX is not set | ||
| 969 | # CONFIG_USB_SEVSEG is not set | ||
| 970 | # CONFIG_USB_RIO500 is not set | ||
| 971 | # CONFIG_USB_LEGOTOWER is not set | ||
| 972 | # CONFIG_USB_LCD is not set | ||
| 973 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 974 | # CONFIG_USB_LED is not set | ||
| 975 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 976 | # CONFIG_USB_CYTHERM is not set | ||
| 977 | # CONFIG_USB_PHIDGET is not set | ||
| 978 | # CONFIG_USB_IDMOUSE is not set | ||
| 979 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 980 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 981 | # CONFIG_USB_LD is not set | ||
| 982 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 983 | # CONFIG_USB_IOWARRIOR is not set | ||
| 984 | # CONFIG_USB_TEST is not set | ||
| 985 | # CONFIG_USB_ISIGHTFW is not set | ||
| 986 | # CONFIG_USB_VST is not set | ||
| 987 | # CONFIG_USB_GADGET is not set | ||
| 753 | # CONFIG_MMC is not set | 988 | # CONFIG_MMC is not set |
| 754 | # CONFIG_MEMSTICK is not set | 989 | # CONFIG_MEMSTICK is not set |
| 755 | # CONFIG_NEW_LEDS is not set | 990 | # CONFIG_NEW_LEDS is not set |
| 756 | # CONFIG_ACCESSIBILITY is not set | 991 | # CONFIG_ACCESSIBILITY is not set |
| 757 | # CONFIG_RTC_CLASS is not set | 992 | # CONFIG_RTC_CLASS is not set |
| 758 | # CONFIG_DMADEVICES is not set | 993 | # CONFIG_DMADEVICES is not set |
| 759 | # CONFIG_UIO is not set | 994 | CONFIG_UIO=y |
| 995 | # CONFIG_UIO_PDRV is not set | ||
| 996 | # CONFIG_UIO_PDRV_GENIRQ is not set | ||
| 997 | # CONFIG_UIO_SMX is not set | ||
| 998 | # CONFIG_UIO_SERCOS3 is not set | ||
| 760 | # CONFIG_STAGING is not set | 999 | # CONFIG_STAGING is not set |
| 1000 | CONFIG_STAGING_EXCLUDE_BUILD=y | ||
| 761 | 1001 | ||
| 762 | # | 1002 | # |
| 763 | # File systems | 1003 | # File systems |
| @@ -889,8 +1129,13 @@ CONFIG_FRAME_WARN=1024 | |||
| 889 | # CONFIG_DEBUG_MEMORY_INIT is not set | 1129 | # CONFIG_DEBUG_MEMORY_INIT is not set |
| 890 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | 1130 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set |
| 891 | # CONFIG_LATENCYTOP is not set | 1131 | # CONFIG_LATENCYTOP is not set |
| 892 | CONFIG_NOP_TRACER=y | 1132 | CONFIG_HAVE_FUNCTION_TRACER=y |
| 893 | CONFIG_HAVE_FTRACE=y | 1133 | CONFIG_HAVE_DYNAMIC_FTRACE=y |
| 1134 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
| 1135 | |||
| 1136 | # | ||
| 1137 | # Tracers | ||
| 1138 | # | ||
| 894 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | 1139 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set |
| 895 | # CONFIG_SAMPLES is not set | 1140 | # CONFIG_SAMPLES is not set |
| 896 | # CONFIG_SH_STANDARD_BIOS is not set | 1141 | # CONFIG_SH_STANDARD_BIOS is not set |
diff --git a/arch/sh/drivers/dma/Makefile b/arch/sh/drivers/dma/Makefile index 1ac812d24488..ab956adacb47 100644 --- a/arch/sh/drivers/dma/Makefile +++ b/arch/sh/drivers/dma/Makefile | |||
| @@ -3,7 +3,6 @@ | |||
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | obj-$(CONFIG_SH_DMA_API) += dma-api.o dma-sysfs.o | 5 | obj-$(CONFIG_SH_DMA_API) += dma-api.o dma-sysfs.o |
| 6 | obj-$(CONFIG_ISA_DMA_API) += dma-isa.o | ||
| 7 | obj-$(CONFIG_SH_DMA) += dma-sh.o | 6 | obj-$(CONFIG_SH_DMA) += dma-sh.o |
| 8 | obj-$(CONFIG_SH_DREAMCAST) += dma-pvr2.o dma-g2.o | 7 | obj-$(CONFIG_SH_DREAMCAST) += dma-pvr2.o dma-g2.o |
| 9 | obj-$(CONFIG_SH_DMABRG) += dmabrg.o | 8 | obj-$(CONFIG_SH_DMABRG) += dmabrg.o |
diff --git a/arch/sh/drivers/dma/dma-isa.c b/arch/sh/drivers/dma/dma-isa.c deleted file mode 100644 index 5fb044b791c3..000000000000 --- a/arch/sh/drivers/dma/dma-isa.c +++ /dev/null | |||
| @@ -1,106 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/drivers/dma/dma-isa.c | ||
| 3 | * | ||
| 4 | * Generic ISA DMA wrapper for SH DMA API | ||
| 5 | * | ||
| 6 | * Copyright (C) 2003, 2004 Paul Mundt | ||
| 7 | * | ||
| 8 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 9 | * License. See the file "COPYING" in the main directory of this archive | ||
| 10 | * for more details. | ||
| 11 | */ | ||
| 12 | #include <linux/kernel.h> | ||
| 13 | #include <linux/module.h> | ||
| 14 | #include <asm/dma.h> | ||
| 15 | |||
| 16 | /* | ||
| 17 | * This implements a small wrapper set to make code using the old ISA DMA API | ||
| 18 | * work with the SH DMA API. Since most of the work in the new API happens | ||
| 19 | * at ops->xfer() time, we simply use the various set_dma_xxx() routines to | ||
| 20 | * fill in per-channel info, and then hand hand this off to ops->xfer() at | ||
| 21 | * enable_dma() time. | ||
| 22 | * | ||
| 23 | * For channels that are doing on-demand data transfer via cascading, the | ||
| 24 | * channel itself will still need to be configured through the new API. As | ||
| 25 | * such, this code is meant for only the simplest of tasks (and shouldn't be | ||
| 26 | * used in any new drivers at all). | ||
| 27 | * | ||
| 28 | * NOTE: ops->xfer() is the preferred way of doing things. However, there | ||
| 29 | * are some users of the ISA DMA API that exist in common code that we | ||
| 30 | * don't necessarily want to go out of our way to break, so we still | ||
| 31 | * allow for some compatibility at that level. Any new code is strongly | ||
| 32 | * advised to run far away from the ISA DMA API and use the SH DMA API | ||
| 33 | * directly. | ||
| 34 | */ | ||
| 35 | unsigned long claim_dma_lock(void) | ||
| 36 | { | ||
| 37 | unsigned long flags; | ||
| 38 | |||
| 39 | spin_lock_irqsave(&dma_spin_lock, flags); | ||
| 40 | |||
| 41 | return flags; | ||
| 42 | } | ||
| 43 | EXPORT_SYMBOL(claim_dma_lock); | ||
| 44 | |||
| 45 | void release_dma_lock(unsigned long flags) | ||
| 46 | { | ||
| 47 | spin_unlock_irqrestore(&dma_spin_lock, flags); | ||
| 48 | } | ||
| 49 | EXPORT_SYMBOL(release_dma_lock); | ||
| 50 | |||
| 51 | void disable_dma(unsigned int chan) | ||
| 52 | { | ||
| 53 | /* Nothing */ | ||
| 54 | } | ||
| 55 | EXPORT_SYMBOL(disable_dma); | ||
| 56 | |||
| 57 | void enable_dma(unsigned int chan) | ||
| 58 | { | ||
| 59 | struct dma_info *info = get_dma_info(chan); | ||
| 60 | struct dma_channel *channel = &info->channels[chan]; | ||
| 61 | |||
| 62 | info->ops->xfer(channel); | ||
| 63 | } | ||
| 64 | EXPORT_SYMBOL(enable_dma); | ||
| 65 | |||
| 66 | void clear_dma_ff(unsigned int chan) | ||
| 67 | { | ||
| 68 | /* Nothing */ | ||
| 69 | } | ||
| 70 | EXPORT_SYMBOL(clear_dma_ff); | ||
| 71 | |||
| 72 | void set_dma_mode(unsigned int chan, char mode) | ||
| 73 | { | ||
| 74 | struct dma_info *info = get_dma_info(chan); | ||
| 75 | struct dma_channel *channel = &info->channels[chan]; | ||
| 76 | |||
| 77 | channel->mode = mode; | ||
| 78 | } | ||
| 79 | EXPORT_SYMBOL(set_dma_mode); | ||
| 80 | |||
| 81 | void set_dma_addr(unsigned int chan, unsigned int addr) | ||
| 82 | { | ||
| 83 | struct dma_info *info = get_dma_info(chan); | ||
| 84 | struct dma_channel *channel = &info->channels[chan]; | ||
| 85 | |||
| 86 | /* | ||
| 87 | * Single address mode is the only thing supported through | ||
| 88 | * this interface. | ||
| 89 | */ | ||
| 90 | if ((channel->mode & DMA_MODE_MASK) == DMA_MODE_READ) { | ||
| 91 | channel->sar = addr; | ||
| 92 | } else { | ||
| 93 | channel->dar = addr; | ||
| 94 | } | ||
| 95 | } | ||
| 96 | EXPORT_SYMBOL(set_dma_addr); | ||
| 97 | |||
| 98 | void set_dma_count(unsigned int chan, unsigned int count) | ||
| 99 | { | ||
| 100 | struct dma_info *info = get_dma_info(chan); | ||
| 101 | struct dma_channel *channel = &info->channels[chan]; | ||
| 102 | |||
| 103 | channel->count = count; | ||
| 104 | } | ||
| 105 | EXPORT_SYMBOL(set_dma_count); | ||
| 106 | |||
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c index b2ffe649c7c0..50887a592dd0 100644 --- a/arch/sh/drivers/dma/dma-sh.c +++ b/arch/sh/drivers/dma/dma-sh.c | |||
| @@ -205,7 +205,8 @@ static int sh_dmac_get_dma_residue(struct dma_channel *chan) | |||
| 205 | 205 | ||
| 206 | #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 206 | #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
| 207 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ | 207 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ |
| 208 | defined(CONFIG_CPU_SUBTYPE_SH7780) | 208 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ |
| 209 | defined(CONFIG_CPU_SUBTYPE_SH7709) | ||
| 209 | #define dmaor_read_reg() ctrl_inw(DMAOR) | 210 | #define dmaor_read_reg() ctrl_inw(DMAOR) |
| 210 | #define dmaor_write_reg(data) ctrl_outw(data, DMAOR) | 211 | #define dmaor_write_reg(data) ctrl_outw(data, DMAOR) |
| 211 | #else | 212 | #else |
diff --git a/arch/sh/drivers/dma/dma-sh.h b/arch/sh/drivers/dma/dma-sh.h index b05af34fc15d..05fecd5428e4 100644 --- a/arch/sh/drivers/dma/dma-sh.h +++ b/arch/sh/drivers/dma/dma-sh.h | |||
| @@ -29,6 +29,7 @@ | |||
| 29 | #define RS_IN 0x00000200 | 29 | #define RS_IN 0x00000200 |
| 30 | #define RS_OUT 0x00000300 | 30 | #define RS_OUT 0x00000300 |
| 31 | #define TS_BLK 0x00000040 | 31 | #define TS_BLK 0x00000040 |
| 32 | #define TM_BUR 0x00000020 | ||
| 32 | #define CHCR_DE 0x00000001 | 33 | #define CHCR_DE 0x00000001 |
| 33 | #define CHCR_TE 0x00000002 | 34 | #define CHCR_TE 0x00000002 |
| 34 | #define CHCR_IE 0x00000004 | 35 | #define CHCR_IE 0x00000004 |
diff --git a/arch/sh/drivers/pci/ops-sh03.c b/arch/sh/drivers/pci/ops-sh03.c index ebb58e605d9d..e1703ff5a4d2 100644 --- a/arch/sh/drivers/pci/ops-sh03.c +++ b/arch/sh/drivers/pci/ops-sh03.c | |||
| @@ -18,7 +18,8 @@ | |||
| 18 | */ | 18 | */ |
| 19 | int __init pcibios_init_platform(void) | 19 | int __init pcibios_init_platform(void) |
| 20 | { | 20 | { |
| 21 | return 1; | 21 | __set_io_port_base(SH7751_PCI_IO_BASE); |
| 22 | return 1; | ||
| 22 | } | 23 | } |
| 23 | 24 | ||
| 24 | static struct resource sh7751_io_resource = { | 25 | static struct resource sh7751_io_resource = { |
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c index b2a2bfa3c1bd..078dc44d6b08 100644 --- a/arch/sh/drivers/pci/pci-sh7780.c +++ b/arch/sh/drivers/pci/pci-sh7780.c | |||
| @@ -123,16 +123,14 @@ int __init sh7780_pcic_init(struct sh4_pci_address_map *map) | |||
| 123 | * Window0 = map->window0.size @ non-cached area base = SDRAM | 123 | * Window0 = map->window0.size @ non-cached area base = SDRAM |
| 124 | * Window1 = map->window1.size @ cached area base = SDRAM | 124 | * Window1 = map->window1.size @ cached area base = SDRAM |
| 125 | */ | 125 | */ |
| 126 | word = ((map->window0.size - 1) & 0x1ff00001) | 0x01; | 126 | word = (CONFIG_MEMORY_SIZE - 0x00100000) | 0x00000001; |
| 127 | pci_write_reg(0x07f00001, SH4_PCILSR0); | 127 | pci_write_reg(word, SH4_PCILSR0); |
| 128 | word = ((map->window1.size - 1) & 0x1ff00001) | 0x01; | ||
| 129 | pci_write_reg(0x00000001, SH4_PCILSR1); | 128 | pci_write_reg(0x00000001, SH4_PCILSR1); |
| 130 | /* Set the values on window 0 PCI config registers */ | 129 | /* Set the values on window 0 PCI config registers */ |
| 131 | word = P2SEGADDR(map->window0.base); | 130 | word = (CONFIG_MEMORY_SIZE > 0x08000000) ? 0x10000000 : 0x08000000; |
| 132 | pci_write_reg(0xa8000000, SH4_PCILAR0); | 131 | pci_write_reg(word | 0xa0000000, SH4_PCILAR0); |
| 133 | pci_write_reg(0x08000000, SH7780_PCIMBAR0); | 132 | pci_write_reg(word, SH7780_PCIMBAR0); |
| 134 | /* Set the values on window 1 PCI config registers */ | 133 | /* Set the values on window 1 PCI config registers */ |
| 135 | word = P2SEGADDR(map->window1.base); | ||
| 136 | pci_write_reg(0x00000000, SH4_PCILAR1); | 134 | pci_write_reg(0x00000000, SH4_PCILAR1); |
| 137 | pci_write_reg(0x00000000, SH7780_PCIMBAR1); | 135 | pci_write_reg(0x00000000, SH7780_PCIMBAR1); |
| 138 | 136 | ||
diff --git a/arch/sh/include/asm/addrspace.h b/arch/sh/include/asm/addrspace.h index 2702d81bfc0d..36736c7e93db 100644 --- a/arch/sh/include/asm/addrspace.h +++ b/arch/sh/include/asm/addrspace.h | |||
| @@ -49,5 +49,16 @@ | |||
| 49 | /* Check if an address can be reached in 29 bits */ | 49 | /* Check if an address can be reached in 29 bits */ |
| 50 | #define IS_29BIT(a) (((unsigned long)(a)) < 0x20000000) | 50 | #define IS_29BIT(a) (((unsigned long)(a)) < 0x20000000) |
| 51 | 51 | ||
| 52 | #ifdef CONFIG_SH_STORE_QUEUES | ||
| 53 | /* | ||
| 54 | * This is a special case for the SH-4 store queues, as pages for this | ||
| 55 | * space still need to be faulted in before it's possible to flush the | ||
| 56 | * store queue cache for writeout to the remapped region. | ||
| 57 | */ | ||
| 58 | #define P3_ADDR_MAX (P4SEG_STORE_QUE + 0x04000000) | ||
| 59 | #else | ||
| 60 | #define P3_ADDR_MAX P4SEG | ||
| 61 | #endif | ||
| 62 | |||
| 52 | #endif /* __KERNEL__ */ | 63 | #endif /* __KERNEL__ */ |
| 53 | #endif /* __ASM_SH_ADDRSPACE_H */ | 64 | #endif /* __ASM_SH_ADDRSPACE_H */ |
diff --git a/arch/sh/include/asm/bitops-grb.h b/arch/sh/include/asm/bitops-grb.h index a5907b94395b..e73af33acbf4 100644 --- a/arch/sh/include/asm/bitops-grb.h +++ b/arch/sh/include/asm/bitops-grb.h | |||
| @@ -166,4 +166,7 @@ static inline int test_and_change_bit(int nr, volatile void * addr) | |||
| 166 | 166 | ||
| 167 | return retval; | 167 | return retval; |
| 168 | } | 168 | } |
| 169 | |||
| 170 | #include <asm-generic/bitops/non-atomic.h> | ||
| 171 | |||
| 169 | #endif /* __ASM_SH_BITOPS_GRB_H */ | 172 | #endif /* __ASM_SH_BITOPS_GRB_H */ |
diff --git a/arch/sh/include/asm/bitops-irq.h b/arch/sh/include/asm/bitops-irq.h deleted file mode 100644 index 653a12750584..000000000000 --- a/arch/sh/include/asm/bitops-irq.h +++ /dev/null | |||
| @@ -1,91 +0,0 @@ | |||
| 1 | #ifndef __ASM_SH_BITOPS_IRQ_H | ||
| 2 | #define __ASM_SH_BITOPS_IRQ_H | ||
| 3 | |||
| 4 | static inline void set_bit(int nr, volatile void *addr) | ||
| 5 | { | ||
| 6 | int mask; | ||
| 7 | volatile unsigned int *a = addr; | ||
| 8 | unsigned long flags; | ||
| 9 | |||
| 10 | a += nr >> 5; | ||
| 11 | mask = 1 << (nr & 0x1f); | ||
| 12 | local_irq_save(flags); | ||
| 13 | *a |= mask; | ||
| 14 | local_irq_restore(flags); | ||
| 15 | } | ||
| 16 | |||
| 17 | static inline void clear_bit(int nr, volatile void *addr) | ||
| 18 | { | ||
| 19 | int mask; | ||
| 20 | volatile unsigned int *a = addr; | ||
| 21 | unsigned long flags; | ||
| 22 | |||
| 23 | a += nr >> 5; | ||
| 24 | mask = 1 << (nr & 0x1f); | ||
| 25 | local_irq_save(flags); | ||
| 26 | *a &= ~mask; | ||
| 27 | local_irq_restore(flags); | ||
| 28 | } | ||
| 29 | |||
| 30 | static inline void change_bit(int nr, volatile void *addr) | ||
| 31 | { | ||
| 32 | int mask; | ||
| 33 | volatile unsigned int *a = addr; | ||
| 34 | unsigned long flags; | ||
| 35 | |||
| 36 | a += nr >> 5; | ||
| 37 | mask = 1 << (nr & 0x1f); | ||
| 38 | local_irq_save(flags); | ||
| 39 | *a ^= mask; | ||
| 40 | local_irq_restore(flags); | ||
| 41 | } | ||
| 42 | |||
| 43 | static inline int test_and_set_bit(int nr, volatile void *addr) | ||
| 44 | { | ||
| 45 | int mask, retval; | ||
| 46 | volatile unsigned int *a = addr; | ||
| 47 | unsigned long flags; | ||
| 48 | |||
| 49 | a += nr >> 5; | ||
| 50 | mask = 1 << (nr & 0x1f); | ||
| 51 | local_irq_save(flags); | ||
| 52 | retval = (mask & *a) != 0; | ||
| 53 | *a |= mask; | ||
| 54 | local_irq_restore(flags); | ||
| 55 | |||
| 56 | return retval; | ||
| 57 | } | ||
| 58 | |||
| 59 | static inline int test_and_clear_bit(int nr, volatile void *addr) | ||
| 60 | { | ||
| 61 | int mask, retval; | ||
| 62 | volatile unsigned int *a = addr; | ||
| 63 | unsigned long flags; | ||
| 64 | |||
| 65 | a += nr >> 5; | ||
| 66 | mask = 1 << (nr & 0x1f); | ||
| 67 | local_irq_save(flags); | ||
| 68 | retval = (mask & *a) != 0; | ||
| 69 | *a &= ~mask; | ||
| 70 | local_irq_restore(flags); | ||
| 71 | |||
| 72 | return retval; | ||
| 73 | } | ||
| 74 | |||
| 75 | static inline int test_and_change_bit(int nr, volatile void *addr) | ||
| 76 | { | ||
| 77 | int mask, retval; | ||
| 78 | volatile unsigned int *a = addr; | ||
| 79 | unsigned long flags; | ||
| 80 | |||
| 81 | a += nr >> 5; | ||
| 82 | mask = 1 << (nr & 0x1f); | ||
| 83 | local_irq_save(flags); | ||
| 84 | retval = (mask & *a) != 0; | ||
| 85 | *a ^= mask; | ||
| 86 | local_irq_restore(flags); | ||
| 87 | |||
| 88 | return retval; | ||
| 89 | } | ||
| 90 | |||
| 91 | #endif /* __ASM_SH_BITOPS_IRQ_H */ | ||
diff --git a/arch/sh/include/asm/bitops-llsc.h b/arch/sh/include/asm/bitops-llsc.h index 43b8e1a8239e..1d2fc0b010ad 100644 --- a/arch/sh/include/asm/bitops-llsc.h +++ b/arch/sh/include/asm/bitops-llsc.h | |||
| @@ -141,4 +141,6 @@ static inline int test_and_change_bit(int nr, volatile void * addr) | |||
| 141 | return retval != 0; | 141 | return retval != 0; |
| 142 | } | 142 | } |
| 143 | 143 | ||
| 144 | #include <asm-generic/bitops/non-atomic.h> | ||
| 145 | |||
| 144 | #endif /* __ASM_SH_BITOPS_LLSC_H */ | 146 | #endif /* __ASM_SH_BITOPS_LLSC_H */ |
diff --git a/arch/sh/include/asm/bitops-op32.h b/arch/sh/include/asm/bitops-op32.h new file mode 100644 index 000000000000..f0ae7e9218e0 --- /dev/null +++ b/arch/sh/include/asm/bitops-op32.h | |||
| @@ -0,0 +1,142 @@ | |||
| 1 | #ifndef __ASM_SH_BITOPS_OP32_H | ||
| 2 | #define __ASM_SH_BITOPS_OP32_H | ||
| 3 | |||
| 4 | /* | ||
| 5 | * The bit modifying instructions on SH-2A are only capable of working | ||
| 6 | * with a 3-bit immediate, which signifies the shift position for the bit | ||
| 7 | * being worked on. | ||
| 8 | */ | ||
| 9 | #if defined(__BIG_ENDIAN) | ||
| 10 | #define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7) | ||
| 11 | #define BYTE_NUMBER(nr) ((nr ^ BITOP_LE_SWIZZLE) / BITS_PER_BYTE) | ||
| 12 | #define BYTE_OFFSET(nr) ((nr ^ BITOP_LE_SWIZZLE) % BITS_PER_BYTE) | ||
| 13 | #else | ||
| 14 | #define BYTE_NUMBER(nr) ((nr) / BITS_PER_BYTE) | ||
| 15 | #define BYTE_OFFSET(nr) ((nr) % BITS_PER_BYTE) | ||
| 16 | #endif | ||
| 17 | |||
| 18 | #define IS_IMMEDIATE(nr) (__builtin_constant_p(nr)) | ||
| 19 | |||
| 20 | static inline void __set_bit(int nr, volatile unsigned long *addr) | ||
| 21 | { | ||
| 22 | if (IS_IMMEDIATE(nr)) { | ||
| 23 | __asm__ __volatile__ ( | ||
| 24 | "bset.b %1, @(%O2,%0) ! __set_bit\n\t" | ||
| 25 | : "+r" (addr) | ||
| 26 | : "i" (BYTE_OFFSET(nr)), "i" (BYTE_NUMBER(nr)) | ||
| 27 | : "t", "memory" | ||
| 28 | ); | ||
| 29 | } else { | ||
| 30 | unsigned long mask = BIT_MASK(nr); | ||
| 31 | unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); | ||
| 32 | |||
| 33 | *p |= mask; | ||
| 34 | } | ||
| 35 | } | ||
| 36 | |||
| 37 | static inline void __clear_bit(int nr, volatile unsigned long *addr) | ||
| 38 | { | ||
| 39 | if (IS_IMMEDIATE(nr)) { | ||
| 40 | __asm__ __volatile__ ( | ||
| 41 | "bclr.b %1, @(%O2,%0) ! __clear_bit\n\t" | ||
| 42 | : "+r" (addr) | ||
| 43 | : "i" (BYTE_OFFSET(nr)), | ||
| 44 | "i" (BYTE_NUMBER(nr)) | ||
| 45 | : "t", "memory" | ||
| 46 | ); | ||
| 47 | } else { | ||
| 48 | unsigned long mask = BIT_MASK(nr); | ||
| 49 | unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); | ||
| 50 | |||
| 51 | *p &= ~mask; | ||
| 52 | } | ||
| 53 | } | ||
| 54 | |||
| 55 | /** | ||
| 56 | * __change_bit - Toggle a bit in memory | ||
| 57 | * @nr: the bit to change | ||
| 58 | * @addr: the address to start counting from | ||
| 59 | * | ||
| 60 | * Unlike change_bit(), this function is non-atomic and may be reordered. | ||
| 61 | * If it's called on the same region of memory simultaneously, the effect | ||
| 62 | * may be that only one operation succeeds. | ||
| 63 | */ | ||
| 64 | static inline void __change_bit(int nr, volatile unsigned long *addr) | ||
| 65 | { | ||
| 66 | if (IS_IMMEDIATE(nr)) { | ||
| 67 | __asm__ __volatile__ ( | ||
| 68 | "bxor.b %1, @(%O2,%0) ! __change_bit\n\t" | ||
| 69 | : "+r" (addr) | ||
| 70 | : "i" (BYTE_OFFSET(nr)), | ||
| 71 | "i" (BYTE_NUMBER(nr)) | ||
| 72 | : "t", "memory" | ||
| 73 | ); | ||
| 74 | } else { | ||
| 75 | unsigned long mask = BIT_MASK(nr); | ||
| 76 | unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); | ||
| 77 | |||
| 78 | *p ^= mask; | ||
| 79 | } | ||
| 80 | } | ||
| 81 | |||
| 82 | /** | ||
| 83 | * __test_and_set_bit - Set a bit and return its old value | ||
| 84 | * @nr: Bit to set | ||
| 85 | * @addr: Address to count from | ||
| 86 | * | ||
| 87 | * This operation is non-atomic and can be reordered. | ||
| 88 | * If two examples of this operation race, one can appear to succeed | ||
| 89 | * but actually fail. You must protect multiple accesses with a lock. | ||
| 90 | */ | ||
| 91 | static inline int __test_and_set_bit(int nr, volatile unsigned long *addr) | ||
| 92 | { | ||
| 93 | unsigned long mask = BIT_MASK(nr); | ||
| 94 | unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); | ||
| 95 | unsigned long old = *p; | ||
| 96 | |||
| 97 | *p = old | mask; | ||
| 98 | return (old & mask) != 0; | ||
| 99 | } | ||
| 100 | |||
| 101 | /** | ||
| 102 | * __test_and_clear_bit - Clear a bit and return its old value | ||
| 103 | * @nr: Bit to clear | ||
| 104 | * @addr: Address to count from | ||
| 105 | * | ||
| 106 | * This operation is non-atomic and can be reordered. | ||
| 107 | * If two examples of this operation race, one can appear to succeed | ||
| 108 | * but actually fail. You must protect multiple accesses with a lock. | ||
| 109 | */ | ||
| 110 | static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr) | ||
| 111 | { | ||
| 112 | unsigned long mask = BIT_MASK(nr); | ||
| 113 | unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); | ||
| 114 | unsigned long old = *p; | ||
| 115 | |||
| 116 | *p = old & ~mask; | ||
| 117 | return (old & mask) != 0; | ||
| 118 | } | ||
| 119 | |||
| 120 | /* WARNING: non atomic and it can be reordered! */ | ||
| 121 | static inline int __test_and_change_bit(int nr, | ||
| 122 | volatile unsigned long *addr) | ||
| 123 | { | ||
| 124 | unsigned long mask = BIT_MASK(nr); | ||
| 125 | unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); | ||
| 126 | unsigned long old = *p; | ||
| 127 | |||
| 128 | *p = old ^ mask; | ||
| 129 | return (old & mask) != 0; | ||
| 130 | } | ||
| 131 | |||
| 132 | /** | ||
| 133 | * test_bit - Determine whether a bit is set | ||
| 134 | * @nr: bit number to test | ||
| 135 | * @addr: Address to start counting from | ||
| 136 | */ | ||
| 137 | static inline int test_bit(int nr, const volatile unsigned long *addr) | ||
| 138 | { | ||
| 139 | return 1UL & (addr[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1))); | ||
| 140 | } | ||
| 141 | |||
| 142 | #endif /* __ASM_SH_BITOPS_OP32_H */ | ||
diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h index 367930d8e5ae..ebe595b7ab1f 100644 --- a/arch/sh/include/asm/bitops.h +++ b/arch/sh/include/asm/bitops.h | |||
| @@ -13,21 +13,22 @@ | |||
| 13 | 13 | ||
| 14 | #ifdef CONFIG_GUSA_RB | 14 | #ifdef CONFIG_GUSA_RB |
| 15 | #include <asm/bitops-grb.h> | 15 | #include <asm/bitops-grb.h> |
| 16 | #elif defined(CONFIG_CPU_SH2A) | ||
| 17 | #include <asm-generic/bitops/atomic.h> | ||
| 18 | #include <asm/bitops-op32.h> | ||
| 16 | #elif defined(CONFIG_CPU_SH4A) | 19 | #elif defined(CONFIG_CPU_SH4A) |
| 17 | #include <asm/bitops-llsc.h> | 20 | #include <asm/bitops-llsc.h> |
| 18 | #else | 21 | #else |
| 19 | #include <asm/bitops-irq.h> | 22 | #include <asm-generic/bitops/atomic.h> |
| 23 | #include <asm-generic/bitops/non-atomic.h> | ||
| 20 | #endif | 24 | #endif |
| 21 | 25 | ||
| 22 | |||
| 23 | /* | 26 | /* |
| 24 | * clear_bit() doesn't provide any barrier for the compiler. | 27 | * clear_bit() doesn't provide any barrier for the compiler. |
| 25 | */ | 28 | */ |
| 26 | #define smp_mb__before_clear_bit() barrier() | 29 | #define smp_mb__before_clear_bit() barrier() |
| 27 | #define smp_mb__after_clear_bit() barrier() | 30 | #define smp_mb__after_clear_bit() barrier() |
| 28 | 31 | ||
| 29 | #include <asm-generic/bitops/non-atomic.h> | ||
| 30 | |||
| 31 | #ifdef CONFIG_SUPERH32 | 32 | #ifdef CONFIG_SUPERH32 |
| 32 | static inline unsigned long ffz(unsigned long word) | 33 | static inline unsigned long ffz(unsigned long word) |
| 33 | { | 34 | { |
diff --git a/arch/sh/include/asm/bugs.h b/arch/sh/include/asm/bugs.h index 121b2ecddfc3..4924ff6f5439 100644 --- a/arch/sh/include/asm/bugs.h +++ b/arch/sh/include/asm/bugs.h | |||
| @@ -25,7 +25,7 @@ static void __init check_bugs(void) | |||
| 25 | case CPU_SH7619: | 25 | case CPU_SH7619: |
| 26 | *p++ = '2'; | 26 | *p++ = '2'; |
| 27 | break; | 27 | break; |
| 28 | case CPU_SH7203 ... CPU_MXG: | 28 | case CPU_SH7201 ... CPU_MXG: |
| 29 | *p++ = '2'; | 29 | *p++ = '2'; |
| 30 | *p++ = 'a'; | 30 | *p++ = 'a'; |
| 31 | break; | 31 | break; |
diff --git a/arch/sh/include/asm/elf.h b/arch/sh/include/asm/elf.h index 9eb9036a1bdc..b809f22ea638 100644 --- a/arch/sh/include/asm/elf.h +++ b/arch/sh/include/asm/elf.h | |||
| @@ -108,13 +108,11 @@ typedef struct user_fpu_struct elf_fpregset_t; | |||
| 108 | #define elf_check_fdpic(x) ((x)->e_flags & EF_SH_FDPIC) | 108 | #define elf_check_fdpic(x) ((x)->e_flags & EF_SH_FDPIC) |
| 109 | #define elf_check_const_displacement(x) ((x)->e_flags & EF_SH_PIC) | 109 | #define elf_check_const_displacement(x) ((x)->e_flags & EF_SH_PIC) |
| 110 | 110 | ||
| 111 | #ifdef CONFIG_SUPERH32 | ||
| 112 | /* | 111 | /* |
| 113 | * Enable dump using regset. | 112 | * Enable dump using regset. |
| 114 | * This covers all of general/DSP/FPU regs. | 113 | * This covers all of general/DSP/FPU regs. |
| 115 | */ | 114 | */ |
| 116 | #define CORE_DUMP_USE_REGSET | 115 | #define CORE_DUMP_USE_REGSET |
| 117 | #endif | ||
| 118 | 116 | ||
| 119 | #define USE_ELF_CORE_DUMP | 117 | #define USE_ELF_CORE_DUMP |
| 120 | #define ELF_FDPIC_CORE_EFLAGS EF_SH_FDPIC | 118 | #define ELF_FDPIC_CORE_EFLAGS EF_SH_FDPIC |
diff --git a/arch/sh/include/asm/ftrace.h b/arch/sh/include/asm/ftrace.h index 3aed362c9463..8fea7d8c8258 100644 --- a/arch/sh/include/asm/ftrace.h +++ b/arch/sh/include/asm/ftrace.h | |||
| @@ -1,8 +1,34 @@ | |||
| 1 | #ifndef __ASM_SH_FTRACE_H | 1 | #ifndef __ASM_SH_FTRACE_H |
| 2 | #define __ASM_SH_FTRACE_H | 2 | #define __ASM_SH_FTRACE_H |
| 3 | 3 | ||
| 4 | #ifdef CONFIG_FUNCTION_TRACER | ||
| 5 | |||
| 6 | #define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ | ||
| 7 | |||
| 4 | #ifndef __ASSEMBLY__ | 8 | #ifndef __ASSEMBLY__ |
| 5 | extern void mcount(void); | 9 | extern void mcount(void); |
| 6 | #endif | 10 | |
| 11 | #define MCOUNT_ADDR ((long)(mcount)) | ||
| 12 | |||
| 13 | #ifdef CONFIG_DYNAMIC_FTRACE | ||
| 14 | #define CALLER_ADDR ((long)(ftrace_caller)) | ||
| 15 | #define STUB_ADDR ((long)(ftrace_stub)) | ||
| 16 | |||
| 17 | #define MCOUNT_INSN_OFFSET ((STUB_ADDR - CALLER_ADDR) >> 1) | ||
| 18 | |||
| 19 | struct dyn_arch_ftrace { | ||
| 20 | /* No extra data needed on sh */ | ||
| 21 | }; | ||
| 22 | |||
| 23 | #endif /* CONFIG_DYNAMIC_FTRACE */ | ||
| 24 | |||
| 25 | static inline unsigned long ftrace_call_adjust(unsigned long addr) | ||
| 26 | { | ||
| 27 | /* 'addr' is the memory table address. */ | ||
| 28 | return addr; | ||
| 29 | } | ||
| 30 | |||
| 31 | #endif /* __ASSEMBLY__ */ | ||
| 32 | #endif /* CONFIG_FUNCTION_TRACER */ | ||
| 7 | 33 | ||
| 8 | #endif /* __ASM_SH_FTRACE_H */ | 34 | #endif /* __ASM_SH_FTRACE_H */ |
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index 65eaae34e753..61f6dae40534 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h | |||
| @@ -260,6 +260,10 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) | |||
| 260 | 260 | ||
| 261 | return (void __iomem *)P2SEGADDR(offset); | 261 | return (void __iomem *)P2SEGADDR(offset); |
| 262 | } | 262 | } |
| 263 | |||
| 264 | /* P4 above the store queues are always mapped. */ | ||
| 265 | if (unlikely(offset >= P3_ADDR_MAX)) | ||
| 266 | return (void __iomem *)P4SEGADDR(offset); | ||
| 263 | #endif | 267 | #endif |
| 264 | 268 | ||
| 265 | return __ioremap(offset, size, flags); | 269 | return __ioremap(offset, size, flags); |
diff --git a/arch/sh/include/asm/kgdb.h b/arch/sh/include/asm/kgdb.h index 24e42078f36f..72704ed725e5 100644 --- a/arch/sh/include/asm/kgdb.h +++ b/arch/sh/include/asm/kgdb.h | |||
| @@ -1,21 +1,7 @@ | |||
| 1 | /* | 1 | #ifndef __ASM_SH_KGDB_H |
| 2 | * May be copied or modified under the terms of the GNU General Public | 2 | #define __ASM_SH_KGDB_H |
| 3 | * License. See linux/COPYING for more information. | ||
| 4 | * | ||
| 5 | * Based on original code by Glenn Engel, Jim Kingdon, | ||
| 6 | * David Grothe <dave@gcom.com>, Tigran Aivazian, <tigran@sco.com> and | ||
| 7 | * Amit S. Kale <akale@veritas.com> | ||
| 8 | * | ||
| 9 | * Super-H port based on sh-stub.c (Ben Lee and Steve Chamberlain) by | ||
| 10 | * Henry Bell <henry.bell@st.com> | ||
| 11 | * | ||
| 12 | * Header file for low-level support for remote debug using GDB. | ||
| 13 | * | ||
| 14 | */ | ||
| 15 | |||
| 16 | #ifndef __KGDB_H | ||
| 17 | #define __KGDB_H | ||
| 18 | 3 | ||
| 4 | #include <asm/cacheflush.h> | ||
| 19 | #include <asm/ptrace.h> | 5 | #include <asm/ptrace.h> |
| 20 | 6 | ||
| 21 | /* Same as pt_regs but has vbr in place of syscall_nr */ | 7 | /* Same as pt_regs but has vbr in place of syscall_nr */ |
| @@ -30,40 +16,26 @@ struct kgdb_regs { | |||
| 30 | unsigned long vbr; | 16 | unsigned long vbr; |
| 31 | }; | 17 | }; |
| 32 | 18 | ||
| 33 | /* State info */ | 19 | enum regnames { |
| 34 | extern char kgdb_in_gdb_mode; | 20 | GDB_R0, GDB_R1, GDB_R2, GDB_R3, GDB_R4, GDB_R5, GDB_R6, GDB_R7, |
| 35 | extern int kgdb_nofault; /* Ignore bus errors (in gdb mem access) */ | 21 | GDB_R8, GDB_R9, GDB_R10, GDB_R11, GDB_R12, GDB_R13, GDB_R14, GDB_R15, |
| 36 | extern char in_nmi; /* Debounce flag to prevent NMI reentry*/ | ||
| 37 | 22 | ||
| 38 | /* SCI */ | 23 | GDB_PC, GDB_PR, GDB_SR, GDB_GBR, GDB_MACH, GDB_MACL, GDB_VBR, |
| 39 | extern int kgdb_portnum; | 24 | }; |
| 40 | extern int kgdb_baud; | ||
| 41 | extern char kgdb_parity; | ||
| 42 | extern char kgdb_bits; | ||
| 43 | 25 | ||
| 44 | /* Init and interface stuff */ | 26 | #define NUMREGBYTES ((GDB_VBR + 1) * 4) |
| 45 | extern int kgdb_init(void); | ||
| 46 | extern int (*kgdb_getchar)(void); | ||
| 47 | extern void (*kgdb_putchar)(int); | ||
| 48 | 27 | ||
| 49 | /* Trap functions */ | 28 | static inline void arch_kgdb_breakpoint(void) |
| 50 | typedef void (kgdb_debug_hook_t)(struct pt_regs *regs); | 29 | { |
| 51 | typedef void (kgdb_bus_error_hook_t)(void); | 30 | __asm__ __volatile__ ("trapa #0x3c\n"); |
| 52 | extern kgdb_debug_hook_t *kgdb_debug_hook; | 31 | } |
| 53 | extern kgdb_bus_error_hook_t *kgdb_bus_err_hook; | ||
| 54 | 32 | ||
| 55 | /* Console */ | 33 | /* State info */ |
| 56 | struct console; | 34 | extern char in_nmi; /* Debounce flag to prevent NMI reentry*/ |
| 57 | void kgdb_console_write(struct console *co, const char *s, unsigned count); | ||
| 58 | extern int kgdb_console_setup(struct console *, char *); | ||
| 59 | 35 | ||
| 60 | /* Prototypes for jmp fns */ | 36 | #define BUFMAX 2048 |
| 61 | #define _JBLEN 9 | ||
| 62 | typedef int jmp_buf[_JBLEN]; | ||
| 63 | extern void longjmp(jmp_buf __jmpb, int __retval); | ||
| 64 | extern int setjmp(jmp_buf __jmpb); | ||
| 65 | 37 | ||
| 66 | /* Forced breakpoint */ | 38 | #define CACHE_FLUSH_IS_SAFE 1 |
| 67 | #define breakpoint() __asm__ __volatile__("trapa #0x3c") | 39 | #define BREAK_INSTR_SIZE 2 |
| 68 | 40 | ||
| 69 | #endif | 41 | #endif /* __ASM_SH_KGDB_H */ |
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h index f1bae02ef7b6..64b1c16a0f03 100644 --- a/arch/sh/include/asm/machvec.h +++ b/arch/sh/include/asm/machvec.h | |||
| @@ -14,8 +14,6 @@ | |||
| 14 | #include <linux/time.h> | 14 | #include <linux/time.h> |
| 15 | #include <asm/machtypes.h> | 15 | #include <asm/machtypes.h> |
| 16 | 16 | ||
| 17 | struct device; | ||
| 18 | |||
| 19 | struct sh_machine_vector { | 17 | struct sh_machine_vector { |
| 20 | void (*mv_setup)(char **cmdline_p); | 18 | void (*mv_setup)(char **cmdline_p); |
| 21 | const char *mv_name; | 19 | const char *mv_name; |
| @@ -45,9 +43,6 @@ struct sh_machine_vector { | |||
| 45 | int (*mv_irq_demux)(int irq); | 43 | int (*mv_irq_demux)(int irq); |
| 46 | 44 | ||
| 47 | void (*mv_init_irq)(void); | 45 | void (*mv_init_irq)(void); |
| 48 | void (*mv_init_pci)(void); | ||
| 49 | |||
| 50 | void (*mv_heartbeat)(void); | ||
| 51 | 46 | ||
| 52 | void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); | 47 | void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); |
| 53 | void (*mv_ioport_unmap)(void __iomem *); | 48 | void (*mv_ioport_unmap)(void __iomem *); |
diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h index 04c0c9733ad6..5d9157bd474d 100644 --- a/arch/sh/include/asm/mmu_context.h +++ b/arch/sh/include/asm/mmu_context.h | |||
| @@ -22,7 +22,7 @@ | |||
| 22 | #define MMU_CONTEXT_ASID_MASK 0x000000ff | 22 | #define MMU_CONTEXT_ASID_MASK 0x000000ff |
| 23 | #define MMU_CONTEXT_VERSION_MASK 0xffffff00 | 23 | #define MMU_CONTEXT_VERSION_MASK 0xffffff00 |
| 24 | #define MMU_CONTEXT_FIRST_VERSION 0x00000100 | 24 | #define MMU_CONTEXT_FIRST_VERSION 0x00000100 |
| 25 | #define NO_CONTEXT 0 | 25 | #define NO_CONTEXT 0UL |
| 26 | 26 | ||
| 27 | /* ASID is 8-bit value, so it can't be 0x100 */ | 27 | /* ASID is 8-bit value, so it can't be 0x100 */ |
| 28 | #define MMU_NO_ASID 0x100 | 28 | #define MMU_NO_ASID 0x100 |
| @@ -130,7 +130,7 @@ static inline void switch_mm(struct mm_struct *prev, | |||
| 130 | #define destroy_context(mm) do { } while (0) | 130 | #define destroy_context(mm) do { } while (0) |
| 131 | #define set_asid(asid) do { } while (0) | 131 | #define set_asid(asid) do { } while (0) |
| 132 | #define get_asid() (0) | 132 | #define get_asid() (0) |
| 133 | #define cpu_asid(cpu, mm) ({ (void)cpu; 0; }) | 133 | #define cpu_asid(cpu, mm) ({ (void)cpu; NO_CONTEXT; }) |
| 134 | #define switch_and_save_asid(asid) (0) | 134 | #define switch_and_save_asid(asid) (0) |
| 135 | #define set_TTB(pgd) do { } while (0) | 135 | #define set_TTB(pgd) do { } while (0) |
| 136 | #define get_TTB() (0) | 136 | #define get_TTB() (0) |
diff --git a/arch/sh/include/asm/mutex-llsc.h b/arch/sh/include/asm/mutex-llsc.h new file mode 100644 index 000000000000..ee839ee58ac8 --- /dev/null +++ b/arch/sh/include/asm/mutex-llsc.h | |||
| @@ -0,0 +1,112 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/include/asm/mutex-llsc.h | ||
| 3 | * | ||
| 4 | * SH-4A optimized mutex locking primitives | ||
| 5 | * | ||
| 6 | * Please look into asm-generic/mutex-xchg.h for a formal definition. | ||
| 7 | */ | ||
| 8 | #ifndef __ASM_SH_MUTEX_LLSC_H | ||
| 9 | #define __ASM_SH_MUTEX_LLSC_H | ||
| 10 | |||
| 11 | /* | ||
| 12 | * Attempting to lock a mutex on SH4A is done like in ARMv6+ architecure. | ||
| 13 | * with a bastardized atomic decrement (it is not a reliable atomic decrement | ||
| 14 | * but it satisfies the defined semantics for our purpose, while being | ||
| 15 | * smaller and faster than a real atomic decrement or atomic swap. | ||
| 16 | * The idea is to attempt decrementing the lock value only once. If once | ||
| 17 | * decremented it isn't zero, or if its store-back fails due to a dispute | ||
| 18 | * on the exclusive store, we simply bail out immediately through the slow | ||
| 19 | * path where the lock will be reattempted until it succeeds. | ||
| 20 | */ | ||
| 21 | static inline void | ||
| 22 | __mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *)) | ||
| 23 | { | ||
| 24 | int __ex_flag, __res; | ||
| 25 | |||
| 26 | __asm__ __volatile__ ( | ||
| 27 | "movli.l @%2, %0 \n" | ||
| 28 | "add #-1, %0 \n" | ||
| 29 | "movco.l %0, @%2 \n" | ||
| 30 | "movt %1 \n" | ||
| 31 | : "=&z" (__res), "=&r" (__ex_flag) | ||
| 32 | : "r" (&(count)->counter) | ||
| 33 | : "t"); | ||
| 34 | |||
| 35 | __res |= !__ex_flag; | ||
| 36 | if (unlikely(__res != 0)) | ||
| 37 | fail_fn(count); | ||
| 38 | } | ||
| 39 | |||
| 40 | static inline int | ||
| 41 | __mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *)) | ||
| 42 | { | ||
| 43 | int __ex_flag, __res; | ||
| 44 | |||
| 45 | __asm__ __volatile__ ( | ||
| 46 | "movli.l @%2, %0 \n" | ||
| 47 | "add #-1, %0 \n" | ||
| 48 | "movco.l %0, @%2 \n" | ||
| 49 | "movt %1 \n" | ||
| 50 | : "=&z" (__res), "=&r" (__ex_flag) | ||
| 51 | : "r" (&(count)->counter) | ||
| 52 | : "t"); | ||
| 53 | |||
| 54 | __res |= !__ex_flag; | ||
| 55 | if (unlikely(__res != 0)) | ||
| 56 | __res = fail_fn(count); | ||
| 57 | |||
| 58 | return __res; | ||
| 59 | } | ||
| 60 | |||
| 61 | static inline void | ||
| 62 | __mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *)) | ||
| 63 | { | ||
| 64 | int __ex_flag, __res; | ||
| 65 | |||
| 66 | __asm__ __volatile__ ( | ||
| 67 | "movli.l @%2, %0 \n\t" | ||
| 68 | "add #1, %0 \n\t" | ||
| 69 | "movco.l %0, @%2 \n\t" | ||
| 70 | "movt %1 \n\t" | ||
| 71 | : "=&z" (__res), "=&r" (__ex_flag) | ||
| 72 | : "r" (&(count)->counter) | ||
| 73 | : "t"); | ||
| 74 | |||
| 75 | __res |= !__ex_flag; | ||
| 76 | if (unlikely(__res <= 0)) | ||
| 77 | fail_fn(count); | ||
| 78 | } | ||
| 79 | |||
| 80 | /* | ||
| 81 | * If the unlock was done on a contended lock, or if the unlock simply fails | ||
| 82 | * then the mutex remains locked. | ||
| 83 | */ | ||
| 84 | #define __mutex_slowpath_needs_to_unlock() 1 | ||
| 85 | |||
| 86 | /* | ||
| 87 | * For __mutex_fastpath_trylock we do an atomic decrement and check the | ||
| 88 | * result and put it in the __res variable. | ||
| 89 | */ | ||
| 90 | static inline int | ||
| 91 | __mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *)) | ||
| 92 | { | ||
| 93 | int __res, __orig; | ||
| 94 | |||
| 95 | __asm__ __volatile__ ( | ||
| 96 | "1: movli.l @%2, %0 \n\t" | ||
| 97 | "dt %0 \n\t" | ||
| 98 | "movco.l %0,@%2 \n\t" | ||
| 99 | "bf 1b \n\t" | ||
| 100 | "cmp/eq #0,%0 \n\t" | ||
| 101 | "bt 2f \n\t" | ||
| 102 | "mov #0, %1 \n\t" | ||
| 103 | "bf 3f \n\t" | ||
| 104 | "2: mov #1, %1 \n\t" | ||
| 105 | "3: " | ||
| 106 | : "=&z" (__orig), "=&r" (__res) | ||
| 107 | : "r" (&count->counter) | ||
| 108 | : "t"); | ||
| 109 | |||
| 110 | return __res; | ||
| 111 | } | ||
| 112 | #endif /* __ASM_SH_MUTEX_LLSC_H */ | ||
diff --git a/arch/sh/include/asm/mutex.h b/arch/sh/include/asm/mutex.h index 458c1f7fbc18..d8e37716a4a0 100644 --- a/arch/sh/include/asm/mutex.h +++ b/arch/sh/include/asm/mutex.h | |||
| @@ -5,5 +5,8 @@ | |||
| 5 | * implementation in place, or pick the atomic_xchg() based generic | 5 | * implementation in place, or pick the atomic_xchg() based generic |
| 6 | * implementation. (see asm-generic/mutex-xchg.h for details) | 6 | * implementation. (see asm-generic/mutex-xchg.h for details) |
| 7 | */ | 7 | */ |
| 8 | 8 | #if defined(CONFIG_CPU_SH4A) | |
| 9 | #include <asm/mutex-llsc.h> | ||
| 10 | #else | ||
| 9 | #include <asm-generic/mutex-dec.h> | 11 | #include <asm-generic/mutex-dec.h> |
| 12 | #endif | ||
diff --git a/arch/sh/include/asm/pm.h b/arch/sh/include/asm/pm.h deleted file mode 100644 index 56fdbd6b1c94..000000000000 --- a/arch/sh/include/asm/pm.h +++ /dev/null | |||
| @@ -1,17 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 3 | * License. See the file "COPYING" in the main directory of this archive | ||
| 4 | * for more details. | ||
| 5 | * | ||
| 6 | * Copyright 2006 (c) Andriy Skulysh <askulysh@gmail.com> | ||
| 7 | * | ||
| 8 | */ | ||
| 9 | #ifndef __ASM_SH_PM_H | ||
| 10 | #define __ASM_SH_PM_H | ||
| 11 | |||
| 12 | extern u8 wakeup_start; | ||
| 13 | extern u8 wakeup_end; | ||
| 14 | |||
| 15 | void pm_enter(void); | ||
| 16 | |||
| 17 | #endif | ||
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h index 693364a20ad7..1ef4b24d7619 100644 --- a/arch/sh/include/asm/processor.h +++ b/arch/sh/include/asm/processor.h | |||
| @@ -18,7 +18,7 @@ enum cpu_type { | |||
| 18 | CPU_SH7619, | 18 | CPU_SH7619, |
| 19 | 19 | ||
| 20 | /* SH-2A types */ | 20 | /* SH-2A types */ |
| 21 | CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG, | 21 | CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG, |
| 22 | 22 | ||
| 23 | /* SH-3 types */ | 23 | /* SH-3 types */ |
| 24 | CPU_SH7705, CPU_SH7706, CPU_SH7707, | 24 | CPU_SH7705, CPU_SH7706, CPU_SH7707, |
| @@ -82,6 +82,9 @@ extern struct sh_cpuinfo cpu_data[]; | |||
| 82 | #define current_cpu_data cpu_data[smp_processor_id()] | 82 | #define current_cpu_data cpu_data[smp_processor_id()] |
| 83 | #define raw_current_cpu_data cpu_data[raw_smp_processor_id()] | 83 | #define raw_current_cpu_data cpu_data[raw_smp_processor_id()] |
| 84 | 84 | ||
| 85 | #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") | ||
| 86 | #define cpu_relax() barrier() | ||
| 87 | |||
| 85 | /* Forward decl */ | 88 | /* Forward decl */ |
| 86 | struct seq_operations; | 89 | struct seq_operations; |
| 87 | 90 | ||
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h index a46a0207e977..d79063c5eb9c 100644 --- a/arch/sh/include/asm/processor_32.h +++ b/arch/sh/include/asm/processor_32.h | |||
| @@ -175,6 +175,15 @@ static __inline__ void enable_fpu(void) | |||
| 175 | 175 | ||
| 176 | void show_trace(struct task_struct *tsk, unsigned long *sp, | 176 | void show_trace(struct task_struct *tsk, unsigned long *sp, |
| 177 | struct pt_regs *regs); | 177 | struct pt_regs *regs); |
| 178 | |||
| 179 | #ifdef CONFIG_DUMP_CODE | ||
| 180 | void show_code(struct pt_regs *regs); | ||
| 181 | #else | ||
| 182 | static inline void show_code(struct pt_regs *regs) | ||
| 183 | { | ||
| 184 | } | ||
| 185 | #endif | ||
| 186 | |||
| 178 | extern unsigned long get_wchan(struct task_struct *p); | 187 | extern unsigned long get_wchan(struct task_struct *p); |
| 179 | 188 | ||
| 180 | #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) | 189 | #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) |
| @@ -182,9 +191,6 @@ extern unsigned long get_wchan(struct task_struct *p); | |||
| 182 | 191 | ||
| 183 | #define user_stack_pointer(regs) ((regs)->regs[15]) | 192 | #define user_stack_pointer(regs) ((regs)->regs[15]) |
| 184 | 193 | ||
| 185 | #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") | ||
| 186 | #define cpu_relax() barrier() | ||
| 187 | |||
| 188 | #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \ | 194 | #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \ |
| 189 | defined(CONFIG_CPU_SH4) | 195 | defined(CONFIG_CPU_SH4) |
| 190 | #define PREFETCH_STRIDE L1_CACHE_BYTES | 196 | #define PREFETCH_STRIDE L1_CACHE_BYTES |
diff --git a/arch/sh/include/asm/processor_64.h b/arch/sh/include/asm/processor_64.h index b0b4824dfc4c..803177fcf086 100644 --- a/arch/sh/include/asm/processor_64.h +++ b/arch/sh/include/asm/processor_64.h | |||
| @@ -226,9 +226,7 @@ extern unsigned long get_wchan(struct task_struct *p); | |||
| 226 | #define KSTK_EIP(tsk) ((tsk)->thread.pc) | 226 | #define KSTK_EIP(tsk) ((tsk)->thread.pc) |
| 227 | #define KSTK_ESP(tsk) ((tsk)->thread.sp) | 227 | #define KSTK_ESP(tsk) ((tsk)->thread.sp) |
| 228 | 228 | ||
| 229 | #define user_stack_pointer(regs) ((regs)->sp) | 229 | #define user_stack_pointer(regs) ((regs)->regs[15]) |
| 230 | |||
| 231 | #define cpu_relax() barrier() | ||
| 232 | 230 | ||
| 233 | #endif /* __ASSEMBLY__ */ | 231 | #endif /* __ASSEMBLY__ */ |
| 234 | #endif /* __ASM_SH_PROCESSOR_64_H */ | 232 | #endif /* __ASM_SH_PROCESSOR_64_H */ |
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h index 3ad18e91bca6..12912ab80c15 100644 --- a/arch/sh/include/asm/ptrace.h +++ b/arch/sh/include/asm/ptrace.h | |||
| @@ -86,6 +86,7 @@ struct pt_dspregs { | |||
| 86 | unsigned long re; | 86 | unsigned long re; |
| 87 | unsigned long mod; | 87 | unsigned long mod; |
| 88 | }; | 88 | }; |
| 89 | #endif | ||
| 89 | 90 | ||
| 90 | #define PTRACE_GETREGS 12 /* General registers */ | 91 | #define PTRACE_GETREGS 12 /* General registers */ |
| 91 | #define PTRACE_SETREGS 13 | 92 | #define PTRACE_SETREGS 13 |
| @@ -100,7 +101,6 @@ struct pt_dspregs { | |||
| 100 | 101 | ||
| 101 | #define PTRACE_GETDSPREGS 55 /* DSP registers */ | 102 | #define PTRACE_GETDSPREGS 55 /* DSP registers */ |
| 102 | #define PTRACE_SETDSPREGS 56 | 103 | #define PTRACE_SETDSPREGS 56 |
| 103 | #endif | ||
| 104 | 104 | ||
| 105 | #ifdef __KERNEL__ | 105 | #ifdef __KERNEL__ |
| 106 | #include <asm/addrspace.h> | 106 | #include <asm/addrspace.h> |
diff --git a/arch/sh/include/asm/sh_bios.h b/arch/sh/include/asm/sh_bios.h index 0ca261956e3d..d9c96d7cf6c7 100644 --- a/arch/sh/include/asm/sh_bios.h +++ b/arch/sh/include/asm/sh_bios.h | |||
| @@ -10,7 +10,6 @@ | |||
| 10 | 10 | ||
| 11 | extern void sh_bios_console_write(const char *buf, unsigned int len); | 11 | extern void sh_bios_console_write(const char *buf, unsigned int len); |
| 12 | extern void sh_bios_char_out(char ch); | 12 | extern void sh_bios_char_out(char ch); |
| 13 | extern int sh_bios_in_gdb_mode(void); | ||
| 14 | extern void sh_bios_gdb_detach(void); | 13 | extern void sh_bios_gdb_detach(void); |
| 15 | 14 | ||
| 16 | extern void sh_bios_get_node_addr(unsigned char *node_addr); | 15 | extern void sh_bios_get_node_addr(unsigned char *node_addr); |
diff --git a/arch/sh/include/asm/string_64.h b/arch/sh/include/asm/string_64.h index aa1fef229c78..742007172624 100644 --- a/arch/sh/include/asm/string_64.h +++ b/arch/sh/include/asm/string_64.h | |||
| @@ -1,17 +1,20 @@ | |||
| 1 | #ifndef __ASM_SH_STRING_64_H | 1 | #ifndef __ASM_SH_STRING_64_H |
| 2 | #define __ASM_SH_STRING_64_H | 2 | #define __ASM_SH_STRING_64_H |
| 3 | 3 | ||
| 4 | /* | 4 | #ifdef __KERNEL__ |
| 5 | * include/asm-sh/string_64.h | 5 | |
| 6 | * | 6 | #define __HAVE_ARCH_MEMSET |
| 7 | * Copyright (C) 2000, 2001 Paolo Alberelli | 7 | extern void *memset(void *__s, int __c, size_t __count); |
| 8 | * | ||
| 9 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 10 | * License. See the file "COPYING" in the main directory of this archive | ||
| 11 | * for more details. | ||
| 12 | */ | ||
| 13 | 8 | ||
| 14 | #define __HAVE_ARCH_MEMCPY | 9 | #define __HAVE_ARCH_MEMCPY |
| 15 | extern void *memcpy(void *dest, const void *src, size_t count); | 10 | extern void *memcpy(void *dest, const void *src, size_t count); |
| 16 | 11 | ||
| 12 | #define __HAVE_ARCH_STRLEN | ||
| 13 | extern size_t strlen(const char *); | ||
| 14 | |||
| 15 | #define __HAVE_ARCH_STRCPY | ||
| 16 | extern char *strcpy(char *__dest, const char *__src); | ||
| 17 | |||
| 18 | #endif /* __KERNEL__ */ | ||
| 19 | |||
| 17 | #endif /* __ASM_SH_STRING_64_H */ | 20 | #endif /* __ASM_SH_STRING_64_H */ |
diff --git a/arch/sh/include/asm/syscall_32.h b/arch/sh/include/asm/syscall_32.h index 54773f26cd44..05a868a71ef5 100644 --- a/arch/sh/include/asm/syscall_32.h +++ b/arch/sh/include/asm/syscall_32.h | |||
| @@ -5,7 +5,7 @@ | |||
| 5 | #include <linux/sched.h> | 5 | #include <linux/sched.h> |
| 6 | #include <asm/ptrace.h> | 6 | #include <asm/ptrace.h> |
| 7 | 7 | ||
| 8 | /* The system call number is given by the user in %g1 */ | 8 | /* The system call number is given by the user in R3 */ |
| 9 | static inline long syscall_get_nr(struct task_struct *task, | 9 | static inline long syscall_get_nr(struct task_struct *task, |
| 10 | struct pt_regs *regs) | 10 | struct pt_regs *regs) |
| 11 | { | 11 | { |
diff --git a/arch/sh/include/asm/syscall_64.h b/arch/sh/include/asm/syscall_64.h index bcaaa8ca4d70..e1143b9784d6 100644 --- a/arch/sh/include/asm/syscall_64.h +++ b/arch/sh/include/asm/syscall_64.h | |||
| @@ -1,6 +1,80 @@ | |||
| 1 | #ifndef __ASM_SH_SYSCALL_64_H | 1 | #ifndef __ASM_SH_SYSCALL_64_H |
| 2 | #define __ASM_SH_SYSCALL_64_H | 2 | #define __ASM_SH_SYSCALL_64_H |
| 3 | 3 | ||
| 4 | #include <asm-generic/syscall.h> | 4 | #include <linux/kernel.h> |
| 5 | #include <linux/sched.h> | ||
| 6 | #include <asm/ptrace.h> | ||
| 7 | |||
| 8 | /* The system call number is given by the user in R9 */ | ||
| 9 | static inline long syscall_get_nr(struct task_struct *task, | ||
| 10 | struct pt_regs *regs) | ||
| 11 | { | ||
| 12 | return (regs->syscall_nr >= 0) ? regs->regs[9] : -1L; | ||
| 13 | } | ||
| 14 | |||
| 15 | static inline void syscall_rollback(struct task_struct *task, | ||
| 16 | struct pt_regs *regs) | ||
| 17 | { | ||
| 18 | /* | ||
| 19 | * XXX: This needs some thought. On SH we don't | ||
| 20 | * save away the original R9 value anywhere. | ||
| 21 | */ | ||
| 22 | } | ||
| 23 | |||
| 24 | static inline bool syscall_has_error(struct pt_regs *regs) | ||
| 25 | { | ||
| 26 | return (regs->sr & 0x1) ? true : false; | ||
| 27 | } | ||
| 28 | static inline void syscall_set_error(struct pt_regs *regs) | ||
| 29 | { | ||
| 30 | regs->sr |= 0x1; | ||
| 31 | } | ||
| 32 | static inline void syscall_clear_error(struct pt_regs *regs) | ||
| 33 | { | ||
| 34 | regs->sr &= ~0x1; | ||
| 35 | } | ||
| 36 | |||
| 37 | static inline long syscall_get_error(struct task_struct *task, | ||
| 38 | struct pt_regs *regs) | ||
| 39 | { | ||
| 40 | return syscall_has_error(regs) ? regs->regs[9] : 0; | ||
| 41 | } | ||
| 42 | |||
| 43 | static inline long syscall_get_return_value(struct task_struct *task, | ||
| 44 | struct pt_regs *regs) | ||
| 45 | { | ||
| 46 | return regs->regs[9]; | ||
| 47 | } | ||
| 48 | |||
| 49 | static inline void syscall_set_return_value(struct task_struct *task, | ||
| 50 | struct pt_regs *regs, | ||
| 51 | int error, long val) | ||
| 52 | { | ||
| 53 | if (error) { | ||
| 54 | syscall_set_error(regs); | ||
| 55 | regs->regs[9] = -error; | ||
| 56 | } else { | ||
| 57 | syscall_clear_error(regs); | ||
| 58 | regs->regs[9] = val; | ||
| 59 | } | ||
| 60 | } | ||
| 61 | |||
| 62 | static inline void syscall_get_arguments(struct task_struct *task, | ||
| 63 | struct pt_regs *regs, | ||
| 64 | unsigned int i, unsigned int n, | ||
| 65 | unsigned long *args) | ||
| 66 | { | ||
| 67 | BUG_ON(i + n > 6); | ||
| 68 | memcpy(args, ®s->regs[2 + i], n * sizeof(args[0])); | ||
| 69 | } | ||
| 70 | |||
| 71 | static inline void syscall_set_arguments(struct task_struct *task, | ||
| 72 | struct pt_regs *regs, | ||
| 73 | unsigned int i, unsigned int n, | ||
| 74 | const unsigned long *args) | ||
| 75 | { | ||
| 76 | BUG_ON(i + n > 6); | ||
| 77 | memcpy(®s->regs[2 + i], args, n * sizeof(args[0])); | ||
| 78 | } | ||
| 5 | 79 | ||
| 6 | #endif /* __ASM_SH_SYSCALL_64_H */ | 80 | #endif /* __ASM_SH_SYSCALL_64_H */ |
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h index 6160fe445161..c9ec6af8e745 100644 --- a/arch/sh/include/asm/system.h +++ b/arch/sh/include/asm/system.h | |||
| @@ -175,6 +175,8 @@ asmlinkage void name##_trap_handler(unsigned int vec, struct pt_regs *regs) | |||
| 175 | BUILD_TRAP_HANDLER(address_error); | 175 | BUILD_TRAP_HANDLER(address_error); |
| 176 | BUILD_TRAP_HANDLER(debug); | 176 | BUILD_TRAP_HANDLER(debug); |
| 177 | BUILD_TRAP_HANDLER(bug); | 177 | BUILD_TRAP_HANDLER(bug); |
| 178 | BUILD_TRAP_HANDLER(breakpoint); | ||
| 179 | BUILD_TRAP_HANDLER(singlestep); | ||
| 178 | BUILD_TRAP_HANDLER(fpu_error); | 180 | BUILD_TRAP_HANDLER(fpu_error); |
| 179 | BUILD_TRAP_HANDLER(fpu_state_restore); | 181 | BUILD_TRAP_HANDLER(fpu_state_restore); |
| 180 | 182 | ||
diff --git a/arch/sh/include/asm/unaligned-sh4a.h b/arch/sh/include/asm/unaligned-sh4a.h new file mode 100644 index 000000000000..d8f89770275b --- /dev/null +++ b/arch/sh/include/asm/unaligned-sh4a.h | |||
| @@ -0,0 +1,258 @@ | |||
| 1 | #ifndef __ASM_SH_UNALIGNED_SH4A_H | ||
| 2 | #define __ASM_SH_UNALIGNED_SH4A_H | ||
| 3 | |||
| 4 | /* | ||
| 5 | * SH-4A has support for unaligned 32-bit loads, and 32-bit loads only. | ||
| 6 | * Support for 16 and 64-bit accesses are done through shifting and | ||
| 7 | * masking relative to the endianness. Unaligned stores are not supported | ||
| 8 | * by the instruction encoding, so these continue to use the packed | ||
| 9 | * struct. | ||
| 10 | * | ||
| 11 | * The same note as with the movli.l/movco.l pair applies here, as long | ||
| 12 | * as the load is gauranteed to be inlined, nothing else will hook in to | ||
| 13 | * r0 and we get the return value for free. | ||
| 14 | * | ||
| 15 | * NOTE: Due to the fact we require r0 encoding, care should be taken to | ||
| 16 | * avoid mixing these heavily with other r0 consumers, such as the atomic | ||
| 17 | * ops. Failure to adhere to this can result in the compiler running out | ||
| 18 | * of spill registers and blowing up when building at low optimization | ||
| 19 | * levels. See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=34777. | ||
| 20 | */ | ||
| 21 | #include <linux/types.h> | ||
| 22 | #include <asm/byteorder.h> | ||
| 23 | |||
| 24 | static __always_inline u32 __get_unaligned_cpu32(const u8 *p) | ||
| 25 | { | ||
| 26 | unsigned long unaligned; | ||
| 27 | |||
| 28 | __asm__ __volatile__ ( | ||
| 29 | "movua.l @%1, %0\n\t" | ||
| 30 | : "=z" (unaligned) | ||
| 31 | : "r" (p) | ||
| 32 | ); | ||
| 33 | |||
| 34 | return unaligned; | ||
| 35 | } | ||
| 36 | |||
| 37 | struct __una_u16 { u16 x __attribute__((packed)); }; | ||
| 38 | struct __una_u32 { u32 x __attribute__((packed)); }; | ||
| 39 | struct __una_u64 { u64 x __attribute__((packed)); }; | ||
| 40 | |||
| 41 | static inline u16 __get_unaligned_cpu16(const u8 *p) | ||
| 42 | { | ||
| 43 | #ifdef __LITTLE_ENDIAN | ||
| 44 | return __get_unaligned_cpu32(p) & 0xffff; | ||
| 45 | #else | ||
| 46 | return __get_unaligned_cpu32(p) >> 16; | ||
| 47 | #endif | ||
| 48 | } | ||
| 49 | |||
| 50 | /* | ||
| 51 | * Even though movua.l supports auto-increment on the read side, it can | ||
| 52 | * only store to r0 due to instruction encoding constraints, so just let | ||
| 53 | * the compiler sort it out on its own. | ||
| 54 | */ | ||
| 55 | static inline u64 __get_unaligned_cpu64(const u8 *p) | ||
| 56 | { | ||
| 57 | #ifdef __LITTLE_ENDIAN | ||
| 58 | return (u64)__get_unaligned_cpu32(p + 4) << 32 | | ||
| 59 | __get_unaligned_cpu32(p); | ||
| 60 | #else | ||
| 61 | return (u64)__get_unaligned_cpu32(p) << 32 | | ||
| 62 | __get_unaligned_cpu32(p + 4); | ||
| 63 | #endif | ||
| 64 | } | ||
| 65 | |||
| 66 | static inline u16 get_unaligned_le16(const void *p) | ||
| 67 | { | ||
| 68 | return le16_to_cpu(__get_unaligned_cpu16(p)); | ||
| 69 | } | ||
| 70 | |||
| 71 | static inline u32 get_unaligned_le32(const void *p) | ||
| 72 | { | ||
| 73 | return le32_to_cpu(__get_unaligned_cpu32(p)); | ||
| 74 | } | ||
| 75 | |||
| 76 | static inline u64 get_unaligned_le64(const void *p) | ||
| 77 | { | ||
| 78 | return le64_to_cpu(__get_unaligned_cpu64(p)); | ||
| 79 | } | ||
| 80 | |||
| 81 | static inline u16 get_unaligned_be16(const void *p) | ||
| 82 | { | ||
| 83 | return be16_to_cpu(__get_unaligned_cpu16(p)); | ||
| 84 | } | ||
| 85 | |||
| 86 | static inline u32 get_unaligned_be32(const void *p) | ||
| 87 | { | ||
| 88 | return be32_to_cpu(__get_unaligned_cpu32(p)); | ||
| 89 | } | ||
| 90 | |||
| 91 | static inline u64 get_unaligned_be64(const void *p) | ||
| 92 | { | ||
| 93 | return be64_to_cpu(__get_unaligned_cpu64(p)); | ||
| 94 | } | ||
| 95 | |||
| 96 | static inline void __put_le16_noalign(u8 *p, u16 val) | ||
| 97 | { | ||
| 98 | *p++ = val; | ||
| 99 | *p++ = val >> 8; | ||
| 100 | } | ||
| 101 | |||
| 102 | static inline void __put_le32_noalign(u8 *p, u32 val) | ||
| 103 | { | ||
| 104 | __put_le16_noalign(p, val); | ||
| 105 | __put_le16_noalign(p + 2, val >> 16); | ||
| 106 | } | ||
| 107 | |||
| 108 | static inline void __put_le64_noalign(u8 *p, u64 val) | ||
| 109 | { | ||
| 110 | __put_le32_noalign(p, val); | ||
| 111 | __put_le32_noalign(p + 4, val >> 32); | ||
| 112 | } | ||
| 113 | |||
| 114 | static inline void __put_be16_noalign(u8 *p, u16 val) | ||
| 115 | { | ||
| 116 | *p++ = val >> 8; | ||
| 117 | *p++ = val; | ||
| 118 | } | ||
| 119 | |||
| 120 | static inline void __put_be32_noalign(u8 *p, u32 val) | ||
| 121 | { | ||
| 122 | __put_be16_noalign(p, val >> 16); | ||
| 123 | __put_be16_noalign(p + 2, val); | ||
| 124 | } | ||
| 125 | |||
| 126 | static inline void __put_be64_noalign(u8 *p, u64 val) | ||
| 127 | { | ||
| 128 | __put_be32_noalign(p, val >> 32); | ||
| 129 | __put_be32_noalign(p + 4, val); | ||
| 130 | } | ||
| 131 | |||
| 132 | static inline void put_unaligned_le16(u16 val, void *p) | ||
| 133 | { | ||
| 134 | #ifdef __LITTLE_ENDIAN | ||
| 135 | ((struct __una_u16 *)p)->x = val; | ||
| 136 | #else | ||
| 137 | __put_le16_noalign(p, val); | ||
| 138 | #endif | ||
| 139 | } | ||
| 140 | |||
| 141 | static inline void put_unaligned_le32(u32 val, void *p) | ||
| 142 | { | ||
| 143 | #ifdef __LITTLE_ENDIAN | ||
| 144 | ((struct __una_u32 *)p)->x = val; | ||
| 145 | #else | ||
| 146 | __put_le32_noalign(p, val); | ||
| 147 | #endif | ||
| 148 | } | ||
| 149 | |||
| 150 | static inline void put_unaligned_le64(u64 val, void *p) | ||
| 151 | { | ||
| 152 | #ifdef __LITTLE_ENDIAN | ||
| 153 | ((struct __una_u64 *)p)->x = val; | ||
| 154 | #else | ||
| 155 | __put_le64_noalign(p, val); | ||
| 156 | #endif | ||
| 157 | } | ||
| 158 | |||
| 159 | static inline void put_unaligned_be16(u16 val, void *p) | ||
| 160 | { | ||
| 161 | #ifdef __BIG_ENDIAN | ||
| 162 | ((struct __una_u16 *)p)->x = val; | ||
| 163 | #else | ||
| 164 | __put_be16_noalign(p, val); | ||
| 165 | #endif | ||
| 166 | } | ||
| 167 | |||
| 168 | static inline void put_unaligned_be32(u32 val, void *p) | ||
| 169 | { | ||
| 170 | #ifdef __BIG_ENDIAN | ||
| 171 | ((struct __una_u32 *)p)->x = val; | ||
| 172 | #else | ||
| 173 | __put_be32_noalign(p, val); | ||
| 174 | #endif | ||
| 175 | } | ||
| 176 | |||
| 177 | static inline void put_unaligned_be64(u64 val, void *p) | ||
| 178 | { | ||
| 179 | #ifdef __BIG_ENDIAN | ||
| 180 | ((struct __una_u64 *)p)->x = val; | ||
| 181 | #else | ||
| 182 | __put_be64_noalign(p, val); | ||
| 183 | #endif | ||
| 184 | } | ||
| 185 | |||
| 186 | /* | ||
| 187 | * Cause a link-time error if we try an unaligned access other than | ||
| 188 | * 1,2,4 or 8 bytes long | ||
| 189 | */ | ||
| 190 | extern void __bad_unaligned_access_size(void); | ||
| 191 | |||
| 192 | #define __get_unaligned_le(ptr) ((__force typeof(*(ptr)))({ \ | ||
| 193 | __builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \ | ||
| 194 | __builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_le16((ptr)), \ | ||
| 195 | __builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_le32((ptr)), \ | ||
| 196 | __builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_le64((ptr)), \ | ||
| 197 | __bad_unaligned_access_size())))); \ | ||
| 198 | })) | ||
| 199 | |||
| 200 | #define __get_unaligned_be(ptr) ((__force typeof(*(ptr)))({ \ | ||
| 201 | __builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \ | ||
| 202 | __builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_be16((ptr)), \ | ||
| 203 | __builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_be32((ptr)), \ | ||
| 204 | __builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_be64((ptr)), \ | ||
| 205 | __bad_unaligned_access_size())))); \ | ||
| 206 | })) | ||
| 207 | |||
| 208 | #define __put_unaligned_le(val, ptr) ({ \ | ||
| 209 | void *__gu_p = (ptr); \ | ||
| 210 | switch (sizeof(*(ptr))) { \ | ||
| 211 | case 1: \ | ||
| 212 | *(u8 *)__gu_p = (__force u8)(val); \ | ||
| 213 | break; \ | ||
| 214 | case 2: \ | ||
| 215 | put_unaligned_le16((__force u16)(val), __gu_p); \ | ||
| 216 | break; \ | ||
| 217 | case 4: \ | ||
| 218 | put_unaligned_le32((__force u32)(val), __gu_p); \ | ||
| 219 | break; \ | ||
| 220 | case 8: \ | ||
| 221 | put_unaligned_le64((__force u64)(val), __gu_p); \ | ||
| 222 | break; \ | ||
| 223 | default: \ | ||
| 224 | __bad_unaligned_access_size(); \ | ||
| 225 | break; \ | ||
| 226 | } \ | ||
| 227 | (void)0; }) | ||
| 228 | |||
| 229 | #define __put_unaligned_be(val, ptr) ({ \ | ||
| 230 | void *__gu_p = (ptr); \ | ||
| 231 | switch (sizeof(*(ptr))) { \ | ||
| 232 | case 1: \ | ||
| 233 | *(u8 *)__gu_p = (__force u8)(val); \ | ||
| 234 | break; \ | ||
| 235 | case 2: \ | ||
| 236 | put_unaligned_be16((__force u16)(val), __gu_p); \ | ||
| 237 | break; \ | ||
| 238 | case 4: \ | ||
| 239 | put_unaligned_be32((__force u32)(val), __gu_p); \ | ||
| 240 | break; \ | ||
| 241 | case 8: \ | ||
| 242 | put_unaligned_be64((__force u64)(val), __gu_p); \ | ||
| 243 | break; \ | ||
| 244 | default: \ | ||
| 245 | __bad_unaligned_access_size(); \ | ||
| 246 | break; \ | ||
| 247 | } \ | ||
| 248 | (void)0; }) | ||
| 249 | |||
| 250 | #ifdef __LITTLE_ENDIAN | ||
| 251 | # define get_unaligned __get_unaligned_le | ||
| 252 | # define put_unaligned __put_unaligned_le | ||
| 253 | #else | ||
| 254 | # define get_unaligned __get_unaligned_be | ||
| 255 | # define put_unaligned __put_unaligned_be | ||
| 256 | #endif | ||
| 257 | |||
| 258 | #endif /* __ASM_SH_UNALIGNED_SH4A_H */ | ||
diff --git a/arch/sh/include/asm/unaligned.h b/arch/sh/include/asm/unaligned.h index c1641a01d50f..8c0ad5e4487a 100644 --- a/arch/sh/include/asm/unaligned.h +++ b/arch/sh/include/asm/unaligned.h | |||
| @@ -1,7 +1,11 @@ | |||
| 1 | #ifndef _ASM_SH_UNALIGNED_H | 1 | #ifndef _ASM_SH_UNALIGNED_H |
| 2 | #define _ASM_SH_UNALIGNED_H | 2 | #define _ASM_SH_UNALIGNED_H |
| 3 | 3 | ||
| 4 | /* SH can't handle unaligned accesses. */ | 4 | #ifdef CONFIG_CPU_SH4A |
| 5 | /* SH-4A can handle unaligned loads in a relatively neutered fashion. */ | ||
| 6 | #include <asm/unaligned-sh4a.h> | ||
| 7 | #else | ||
| 8 | /* Otherwise, SH can't handle unaligned accesses. */ | ||
| 5 | #ifdef __LITTLE_ENDIAN__ | 9 | #ifdef __LITTLE_ENDIAN__ |
| 6 | # include <linux/unaligned/le_struct.h> | 10 | # include <linux/unaligned/le_struct.h> |
| 7 | # include <linux/unaligned/be_byteshift.h> | 11 | # include <linux/unaligned/be_byteshift.h> |
| @@ -15,5 +19,6 @@ | |||
| 15 | # define get_unaligned __get_unaligned_be | 19 | # define get_unaligned __get_unaligned_be |
| 16 | # define put_unaligned __put_unaligned_be | 20 | # define put_unaligned __put_unaligned_be |
| 17 | #endif | 21 | #endif |
| 22 | #endif | ||
| 18 | 23 | ||
| 19 | #endif /* _ASM_SH_UNALIGNED_H */ | 24 | #endif /* _ASM_SH_UNALIGNED_H */ |
diff --git a/arch/sh/include/cpu-sh3/cpu/gpio.h b/arch/sh/include/cpu-sh3/cpu/gpio.h index 4e53eb314b8f..9a22b882f3dc 100644 --- a/arch/sh/include/cpu-sh3/cpu/gpio.h +++ b/arch/sh/include/cpu-sh3/cpu/gpio.h | |||
| @@ -62,6 +62,20 @@ | |||
| 62 | #define PORT_PSELC 0xA4050128UL | 62 | #define PORT_PSELC 0xA4050128UL |
| 63 | #define PORT_PSELD 0xA405012AUL | 63 | #define PORT_PSELD 0xA405012AUL |
| 64 | 64 | ||
| 65 | #elif defined(CONFIG_CPU_SUBTYPE_SH7709) | ||
| 66 | |||
| 67 | /* Control registers */ | ||
| 68 | #define PORT_PACR 0xa4000100UL | ||
| 69 | #define PORT_PBCR 0xa4000102UL | ||
| 70 | #define PORT_PCCR 0xa4000104UL | ||
| 71 | #define PORT_PFCR 0xa400010aUL | ||
| 72 | |||
| 73 | /* Data registers */ | ||
| 74 | #define PORT_PADR 0xa4000120UL | ||
| 75 | #define PORT_PBDR 0xa4000122UL | ||
| 76 | #define PORT_PCDR 0xa4000124UL | ||
| 77 | #define PORT_PFDR 0xa400012aUL | ||
| 78 | |||
| 65 | #endif | 79 | #endif |
| 66 | 80 | ||
| 67 | #endif | 81 | #endif |
diff --git a/arch/sh/include/mach-common/mach/edosk7705.h b/arch/sh/include/mach-common/mach/edosk7705.h index 5bdc9d9be3de..efc43b323466 100644 --- a/arch/sh/include/mach-common/mach/edosk7705.h +++ b/arch/sh/include/mach-common/mach/edosk7705.h | |||
| @@ -1,30 +1,7 @@ | |||
| 1 | /* | 1 | #ifndef __ASM_SH_EDOSK7705_H |
| 2 | * include/asm-sh/edosk7705.h | 2 | #define __ASM_SH_EDOSK7705_H |
| 3 | * | ||
| 4 | * Modified version of io_se.h for the EDOSK7705 specific functions. | ||
| 5 | * | ||
| 6 | * May be copied or modified under the terms of the GNU General Public | ||
| 7 | * License. See linux/COPYING for more information. | ||
| 8 | * | ||
| 9 | * IO functions for an Hitachi EDOSK7705 development board | ||
| 10 | */ | ||
| 11 | |||
| 12 | #ifndef __ASM_SH_EDOSK7705_IO_H | ||
| 13 | #define __ASM_SH_EDOSK7705_IO_H | ||
| 14 | 3 | ||
| 4 | #define __IO_PREFIX sh_edosk7705 | ||
| 15 | #include <asm/io_generic.h> | 5 | #include <asm/io_generic.h> |
| 16 | 6 | ||
| 17 | extern unsigned char sh_edosk7705_inb(unsigned long port); | 7 | #endif /* __ASM_SH_EDOSK7705_H */ |
| 18 | extern unsigned int sh_edosk7705_inl(unsigned long port); | ||
| 19 | |||
| 20 | extern void sh_edosk7705_outb(unsigned char value, unsigned long port); | ||
| 21 | extern void sh_edosk7705_outl(unsigned int value, unsigned long port); | ||
| 22 | |||
| 23 | extern void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count); | ||
| 24 | extern void sh_edosk7705_insl(unsigned long port, void *addr, unsigned long count); | ||
| 25 | extern void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count); | ||
| 26 | extern void sh_edosk7705_outsl(unsigned long port, const void *addr, unsigned long count); | ||
| 27 | |||
| 28 | extern unsigned long sh_edosk7705_isa_port2addr(unsigned long offset); | ||
| 29 | |||
| 30 | #endif /* __ASM_SH_EDOSK7705_IO_H */ | ||
diff --git a/arch/sh/include/mach-se/mach/mrshpc.h b/arch/sh/include/mach-se/mach/mrshpc.h new file mode 100644 index 000000000000..56287ee8563a --- /dev/null +++ b/arch/sh/include/mach-se/mach/mrshpc.h | |||
| @@ -0,0 +1,52 @@ | |||
| 1 | #ifndef __MACH_SE_MRSHPC_H | ||
| 2 | #define __MACH_SE_MRSHPC_H | ||
| 3 | |||
| 4 | #include <linux/io.h> | ||
| 5 | |||
| 6 | static inline void __init mrshpc_setup_windows(void) | ||
| 7 | { | ||
| 8 | if ((__raw_readw(MRSHPC_CSR) & 0x000c) != 0) | ||
| 9 | return; /* Not detected */ | ||
| 10 | |||
| 11 | if ((__raw_readw(MRSHPC_CSR) & 0x0080) == 0) { | ||
| 12 | __raw_writew(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */ | ||
| 13 | } else { | ||
| 14 | __raw_writew(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */ | ||
| 15 | } | ||
| 16 | |||
| 17 | /* | ||
| 18 | * PC-Card window open | ||
| 19 | * flag == COMMON/ATTRIBUTE/IO | ||
| 20 | */ | ||
| 21 | /* common window open */ | ||
| 22 | __raw_writew(0x8a84, MRSHPC_MW0CR1); | ||
| 23 | if((__raw_readw(MRSHPC_CSR) & 0x4000) != 0) | ||
| 24 | /* common mode & bus width 16bit SWAP = 1*/ | ||
| 25 | __raw_writew(0x0b00, MRSHPC_MW0CR2); | ||
| 26 | else | ||
| 27 | /* common mode & bus width 16bit SWAP = 0*/ | ||
| 28 | __raw_writew(0x0300, MRSHPC_MW0CR2); | ||
| 29 | |||
| 30 | /* attribute window open */ | ||
| 31 | __raw_writew(0x8a85, MRSHPC_MW1CR1); | ||
| 32 | if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0) | ||
| 33 | /* attribute mode & bus width 16bit SWAP = 1*/ | ||
| 34 | __raw_writew(0x0a00, MRSHPC_MW1CR2); | ||
| 35 | else | ||
| 36 | /* attribute mode & bus width 16bit SWAP = 0*/ | ||
| 37 | __raw_writew(0x0200, MRSHPC_MW1CR2); | ||
| 38 | |||
| 39 | /* I/O window open */ | ||
| 40 | __raw_writew(0x8a86, MRSHPC_IOWCR1); | ||
| 41 | __raw_writew(0x0008, MRSHPC_CDCR); /* I/O card mode */ | ||
| 42 | if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0) | ||
| 43 | __raw_writew(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/ | ||
| 44 | else | ||
| 45 | __raw_writew(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/ | ||
| 46 | |||
| 47 | __raw_writew(0x2000, MRSHPC_ICR); | ||
| 48 | __raw_writeb(0x00, PA_MRSHPC_MW2 + 0x206); | ||
| 49 | __raw_writeb(0x42, PA_MRSHPC_MW2 + 0x200); | ||
| 50 | } | ||
| 51 | |||
| 52 | #endif /* __MACH_SE_MRSHPC_H */ | ||
diff --git a/arch/sh/include/mach-se/mach/se.h b/arch/sh/include/mach-se/mach/se.h index eb23000e1bbe..14be91c5a2f0 100644 --- a/arch/sh/include/mach-se/mach/se.h +++ b/arch/sh/include/mach-se/mach/se.h | |||
| @@ -68,6 +68,24 @@ | |||
| 68 | #define BCR_ILCRF (PA_BCR + 10) | 68 | #define BCR_ILCRF (PA_BCR + 10) |
| 69 | #define BCR_ILCRG (PA_BCR + 12) | 69 | #define BCR_ILCRG (PA_BCR + 12) |
| 70 | 70 | ||
| 71 | #if defined(CONFIG_CPU_SUBTYPE_SH7709) | ||
| 72 | #define INTC_IRR0 0xa4000004UL | ||
| 73 | #define INTC_IRR1 0xa4000006UL | ||
| 74 | #define INTC_IRR2 0xa4000008UL | ||
| 75 | |||
| 76 | #define INTC_ICR0 0xfffffee0UL | ||
| 77 | #define INTC_ICR1 0xa4000010UL | ||
| 78 | #define INTC_ICR2 0xa4000012UL | ||
| 79 | #define INTC_INTER 0xa4000014UL | ||
| 80 | |||
| 81 | #define INTC_IPRC 0xa4000016UL | ||
| 82 | #define INTC_IPRD 0xa4000018UL | ||
| 83 | #define INTC_IPRE 0xa400001aUL | ||
| 84 | |||
| 85 | #define IRQ0_IRQ 32 | ||
| 86 | #define IRQ1_IRQ 33 | ||
| 87 | #endif | ||
| 88 | |||
| 71 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) | 89 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) |
| 72 | #define IRQ_STNIC 12 | 90 | #define IRQ_STNIC 12 |
| 73 | #define IRQ_CFCARD 14 | 91 | #define IRQ_CFCARD 14 |
diff --git a/arch/sh/include/mach-se/mach/se7343.h b/arch/sh/include/mach-se/mach/se7343.h index 98458460e632..749914b400fb 100644 --- a/arch/sh/include/mach-se/mach/se7343.h +++ b/arch/sh/include/mach-se/mach/se7343.h | |||
| @@ -118,9 +118,6 @@ | |||
| 118 | #define FPGA_IN 0xb1400000 | 118 | #define FPGA_IN 0xb1400000 |
| 119 | #define FPGA_OUT 0xb1400002 | 119 | #define FPGA_OUT 0xb1400002 |
| 120 | 120 | ||
| 121 | #define __IO_PREFIX sh7343se | ||
| 122 | #include <asm/io_generic.h> | ||
| 123 | |||
| 124 | #define IRQ0_IRQ 32 | 121 | #define IRQ0_IRQ 32 |
| 125 | #define IRQ1_IRQ 33 | 122 | #define IRQ1_IRQ 33 |
| 126 | #define IRQ4_IRQ 36 | 123 | #define IRQ4_IRQ 36 |
| @@ -132,8 +129,10 @@ | |||
| 132 | #define SE7343_FPGA_IRQ_MRSHPC3 3 | 129 | #define SE7343_FPGA_IRQ_MRSHPC3 3 |
| 133 | #define SE7343_FPGA_IRQ_SMC 6 /* EXT_IRQ2 */ | 130 | #define SE7343_FPGA_IRQ_SMC 6 /* EXT_IRQ2 */ |
| 134 | #define SE7343_FPGA_IRQ_USB 8 | 131 | #define SE7343_FPGA_IRQ_USB 8 |
| 132 | #define SE7343_FPGA_IRQ_UARTA 10 | ||
| 133 | #define SE7343_FPGA_IRQ_UARTB 11 | ||
| 135 | 134 | ||
| 136 | #define SE7343_FPGA_IRQ_NR 11 | 135 | #define SE7343_FPGA_IRQ_NR 12 |
| 137 | #define SE7343_FPGA_IRQ_BASE 120 | 136 | #define SE7343_FPGA_IRQ_BASE 120 |
| 138 | 137 | ||
| 139 | #define MRSHPC_IRQ3 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC3) | 138 | #define MRSHPC_IRQ3 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC3) |
| @@ -142,6 +141,8 @@ | |||
| 142 | #define MRSHPC_IRQ0 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC0) | 141 | #define MRSHPC_IRQ0 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC0) |
| 143 | #define SMC_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_SMC) | 142 | #define SMC_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_SMC) |
| 144 | #define USB_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_USB) | 143 | #define USB_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_USB) |
| 144 | #define UARTA_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_UARTA) | ||
| 145 | #define UARTB_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_UARTB) | ||
| 145 | 146 | ||
| 146 | /* arch/sh/boards/se/7343/irq.c */ | 147 | /* arch/sh/boards/se/7343/irq.c */ |
| 147 | void init_7343se_IRQ(void); | 148 | void init_7343se_IRQ(void); |
diff --git a/arch/sh/kernel/Makefile_32 b/arch/sh/kernel/Makefile_32 index 48edfb145fb4..2e1b86e16ab5 100644 --- a/arch/sh/kernel/Makefile_32 +++ b/arch/sh/kernel/Makefile_32 | |||
| @@ -4,25 +4,31 @@ | |||
| 4 | 4 | ||
| 5 | extra-y := head_32.o init_task.o vmlinux.lds | 5 | extra-y := head_32.o init_task.o vmlinux.lds |
| 6 | 6 | ||
| 7 | obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_32.o \ | 7 | ifdef CONFIG_FUNCTION_TRACER |
| 8 | ptrace_32.o setup.o signal_32.o sys_sh.o sys_sh32.o \ | 8 | # Do not profile debug and lowlevel utilities |
| 9 | syscalls_32.o time_32.o topology.o traps.o traps_32.o | 9 | CFLAGS_REMOVE_ftrace.o = -pg |
| 10 | endif | ||
| 11 | |||
| 12 | obj-y := debugtraps.o idle.o io.o io_generic.o irq.o \ | ||
| 13 | machvec.o process_32.o ptrace_32.o setup.o signal_32.o \ | ||
| 14 | sys_sh.o sys_sh32.o syscalls_32.o time_32.o topology.o \ | ||
| 15 | traps.o traps_32.o | ||
| 10 | 16 | ||
| 11 | obj-y += cpu/ timers/ | 17 | obj-y += cpu/ timers/ |
| 12 | obj-$(CONFIG_VSYSCALL) += vsyscall/ | 18 | obj-$(CONFIG_VSYSCALL) += vsyscall/ |
| 13 | obj-$(CONFIG_SMP) += smp.o | 19 | obj-$(CONFIG_SMP) += smp.o |
| 14 | obj-$(CONFIG_CF_ENABLER) += cf-enabler.o | ||
| 15 | obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o | 20 | obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o |
| 16 | obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o | 21 | obj-$(CONFIG_KGDB) += kgdb.o |
| 17 | obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o | 22 | obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o |
| 18 | obj-$(CONFIG_MODULES) += sh_ksyms_32.o module.o | 23 | obj-$(CONFIG_MODULES) += sh_ksyms_32.o module.o |
| 19 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o | 24 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o |
| 20 | obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o | 25 | obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o |
| 21 | obj-$(CONFIG_CRASH_DUMP) += crash_dump.o | 26 | obj-$(CONFIG_CRASH_DUMP) += crash_dump.o |
| 22 | obj-$(CONFIG_PM) += pm.o | ||
| 23 | obj-$(CONFIG_STACKTRACE) += stacktrace.o | 27 | obj-$(CONFIG_STACKTRACE) += stacktrace.o |
| 24 | obj-$(CONFIG_IO_TRAPPED) += io_trapped.o | 28 | obj-$(CONFIG_IO_TRAPPED) += io_trapped.o |
| 25 | obj-$(CONFIG_KPROBES) += kprobes.o | 29 | obj-$(CONFIG_KPROBES) += kprobes.o |
| 26 | obj-$(CONFIG_GENERIC_GPIO) += gpio.o | 30 | obj-$(CONFIG_GENERIC_GPIO) += gpio.o |
| 31 | obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o | ||
| 32 | obj-$(CONFIG_DUMP_CODE) += disassemble.o | ||
| 27 | 33 | ||
| 28 | EXTRA_CFLAGS += -Werror | 34 | EXTRA_CFLAGS += -Werror |
diff --git a/arch/sh/kernel/Makefile_64 b/arch/sh/kernel/Makefile_64 index c97660b2b48d..fe425d7f6871 100644 --- a/arch/sh/kernel/Makefile_64 +++ b/arch/sh/kernel/Makefile_64 | |||
| @@ -1,21 +1,18 @@ | |||
| 1 | extra-y := head_64.o init_task.o vmlinux.lds | 1 | extra-y := head_64.o init_task.o vmlinux.lds |
| 2 | 2 | ||
| 3 | obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_64.o \ | 3 | obj-y := debugtraps.o idle.o io.o io_generic.o irq.o machvec.o process_64.o \ |
| 4 | ptrace_64.o setup.o signal_64.o sys_sh.o sys_sh64.o \ | 4 | ptrace_64.o setup.o signal_64.o sys_sh.o sys_sh64.o \ |
| 5 | syscalls_64.o time_64.o topology.o traps.o traps_64.o | 5 | syscalls_64.o time_64.o topology.o traps.o traps_64.o |
| 6 | 6 | ||
| 7 | obj-y += cpu/ timers/ | 7 | obj-y += cpu/ timers/ |
| 8 | obj-$(CONFIG_VSYSCALL) += vsyscall/ | 8 | obj-$(CONFIG_VSYSCALL) += vsyscall/ |
| 9 | obj-$(CONFIG_SMP) += smp.o | 9 | obj-$(CONFIG_SMP) += smp.o |
| 10 | obj-$(CONFIG_CF_ENABLER) += cf-enabler.o | ||
| 11 | obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o | 10 | obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o |
| 12 | obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o | ||
| 13 | obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o | 11 | obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o |
| 14 | obj-$(CONFIG_MODULES) += sh_ksyms_64.o module.o | 12 | obj-$(CONFIG_MODULES) += sh_ksyms_64.o module.o |
| 15 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o | 13 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o |
| 16 | obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o | 14 | obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o |
| 17 | obj-$(CONFIG_CRASH_DUMP) += crash_dump.o | 15 | obj-$(CONFIG_CRASH_DUMP) += crash_dump.o |
| 18 | obj-$(CONFIG_PM) += pm.o | ||
| 19 | obj-$(CONFIG_STACKTRACE) += stacktrace.o | 16 | obj-$(CONFIG_STACKTRACE) += stacktrace.o |
| 20 | obj-$(CONFIG_IO_TRAPPED) += io_trapped.o | 17 | obj-$(CONFIG_IO_TRAPPED) += io_trapped.o |
| 21 | obj-$(CONFIG_GENERIC_GPIO) += gpio.o | 18 | obj-$(CONFIG_GENERIC_GPIO) += gpio.o |
diff --git a/arch/sh/kernel/cf-enabler.c b/arch/sh/kernel/cf-enabler.c deleted file mode 100644 index bea40339919b..000000000000 --- a/arch/sh/kernel/cf-enabler.c +++ /dev/null | |||
| @@ -1,168 +0,0 @@ | |||
| 1 | /* $Id: cf-enabler.c,v 1.4 2004/02/22 22:44:36 kkojima Exp $ | ||
| 2 | * | ||
| 3 | * linux/drivers/block/cf-enabler.c | ||
| 4 | * | ||
| 5 | * Copyright (C) 1999 Niibe Yutaka | ||
| 6 | * Copyright (C) 2000 Toshiharu Nozawa | ||
| 7 | * Copyright (C) 2001 A&D Co., Ltd. | ||
| 8 | * | ||
| 9 | * Enable the CF configuration. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/mm.h> | ||
| 14 | #include <linux/vmalloc.h> | ||
| 15 | #include <linux/interrupt.h> | ||
| 16 | #include <asm/io.h> | ||
| 17 | #include <asm/irq.h> | ||
| 18 | |||
| 19 | /* | ||
| 20 | * You can connect Compact Flash directly to the bus of SuperH. | ||
| 21 | * This is the enabler for that. | ||
| 22 | * | ||
| 23 | * SIM: How generic is this really? It looks pretty board, or at | ||
| 24 | * least SH sub-type, specific to me. | ||
| 25 | * I know it doesn't work on the Overdrive! | ||
| 26 | */ | ||
| 27 | |||
| 28 | /* | ||
| 29 | * 0xB8000000 : Attribute | ||
| 30 | * 0xB8001000 : Common Memory | ||
| 31 | * 0xBA000000 : I/O | ||
| 32 | */ | ||
| 33 | #if defined(CONFIG_CPU_SH4) | ||
| 34 | /* SH4 can't access PCMCIA interface through P2 area. | ||
| 35 | * we must remap it with appropriate attribute bit of the page set. | ||
| 36 | * this part is based on Greg Banks' hd64465_ss.c implementation - Masahiro Abe */ | ||
| 37 | |||
| 38 | #if defined(CONFIG_CF_AREA6) | ||
| 39 | #define slot_no 0 | ||
| 40 | #else | ||
| 41 | #define slot_no 1 | ||
| 42 | #endif | ||
| 43 | |||
| 44 | /* use this pointer to access to directly connected compact flash io area*/ | ||
| 45 | void *cf_io_base; | ||
| 46 | |||
| 47 | static int __init allocate_cf_area(void) | ||
| 48 | { | ||
| 49 | pgprot_t prot; | ||
| 50 | unsigned long paddrbase, psize; | ||
| 51 | |||
| 52 | /* open I/O area window */ | ||
| 53 | paddrbase = virt_to_phys((void*)CONFIG_CF_BASE_ADDR); | ||
| 54 | psize = PAGE_SIZE; | ||
| 55 | prot = PAGE_KERNEL_PCC(slot_no, _PAGE_PCC_IO16); | ||
| 56 | cf_io_base = p3_ioremap(paddrbase, psize, prot.pgprot); | ||
| 57 | if (!cf_io_base) { | ||
| 58 | printk("allocate_cf_area : can't open CF I/O window!\n"); | ||
| 59 | return -ENOMEM; | ||
| 60 | } | ||
| 61 | /* printk("p3_ioremap(paddr=0x%08lx, psize=0x%08lx, prot=0x%08lx)=0x%08lx\n", | ||
| 62 | paddrbase, psize, prot.pgprot, cf_io_base);*/ | ||
| 63 | |||
| 64 | /* XXX : do we need attribute and common-memory area also? */ | ||
| 65 | |||
| 66 | return 0; | ||
| 67 | } | ||
| 68 | #endif | ||
| 69 | |||
| 70 | static int __init cf_init_default(void) | ||
| 71 | { | ||
| 72 | /* You must have enabled the card, and set the level interrupt | ||
| 73 | * before reaching this point. Possibly in boot ROM or boot loader. | ||
| 74 | */ | ||
| 75 | #if defined(CONFIG_CPU_SH4) | ||
| 76 | allocate_cf_area(); | ||
| 77 | #endif | ||
| 78 | |||
| 79 | return 0; | ||
| 80 | } | ||
| 81 | |||
| 82 | #if defined(CONFIG_SH_SOLUTION_ENGINE) | ||
| 83 | #include <mach-se/mach/se.h> | ||
| 84 | #elif defined(CONFIG_SH_7722_SOLUTION_ENGINE) | ||
| 85 | #include <mach-se/mach/se7722.h> | ||
| 86 | #elif defined(CONFIG_SH_7721_SOLUTION_ENGINE) | ||
| 87 | #include <mach-se/mach/se7721.h> | ||
| 88 | #endif | ||
| 89 | |||
| 90 | /* | ||
| 91 | * SolutionEngine Seriese | ||
| 92 | * | ||
| 93 | * about MS770xSE | ||
| 94 | * 0xB8400000 : Common Memory | ||
| 95 | * 0xB8500000 : Attribute | ||
| 96 | * 0xB8600000 : I/O | ||
| 97 | * | ||
| 98 | * about MS7722SE | ||
| 99 | * 0xB0400000 : Common Memory | ||
| 100 | * 0xB0500000 : Attribute | ||
| 101 | * 0xB0600000 : I/O | ||
| 102 | */ | ||
| 103 | |||
| 104 | #if defined(CONFIG_SH_SOLUTION_ENGINE) || \ | ||
| 105 | defined(CONFIG_SH_7722_SOLUTION_ENGINE) || \ | ||
| 106 | defined(CONFIG_SH_7721_SOLUTION_ENGINE) | ||
| 107 | static int __init cf_init_se(void) | ||
| 108 | { | ||
| 109 | if ((ctrl_inw(MRSHPC_CSR) & 0x000c) != 0) | ||
| 110 | return 0; /* Not detected */ | ||
| 111 | |||
| 112 | if ((ctrl_inw(MRSHPC_CSR) & 0x0080) == 0) { | ||
| 113 | ctrl_outw(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */ | ||
| 114 | } else { | ||
| 115 | ctrl_outw(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */ | ||
| 116 | } | ||
| 117 | |||
| 118 | /* | ||
| 119 | * PC-Card window open | ||
| 120 | * flag == COMMON/ATTRIBUTE/IO | ||
| 121 | */ | ||
| 122 | /* common window open */ | ||
| 123 | ctrl_outw(0x8a84, MRSHPC_MW0CR1); | ||
| 124 | if((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0) | ||
| 125 | /* common mode & bus width 16bit SWAP = 1*/ | ||
| 126 | ctrl_outw(0x0b00, MRSHPC_MW0CR2); | ||
| 127 | else | ||
| 128 | /* common mode & bus width 16bit SWAP = 0*/ | ||
| 129 | ctrl_outw(0x0300, MRSHPC_MW0CR2); | ||
| 130 | |||
| 131 | /* attribute window open */ | ||
| 132 | ctrl_outw(0x8a85, MRSHPC_MW1CR1); | ||
| 133 | if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0) | ||
| 134 | /* attribute mode & bus width 16bit SWAP = 1*/ | ||
| 135 | ctrl_outw(0x0a00, MRSHPC_MW1CR2); | ||
| 136 | else | ||
| 137 | /* attribute mode & bus width 16bit SWAP = 0*/ | ||
| 138 | ctrl_outw(0x0200, MRSHPC_MW1CR2); | ||
| 139 | |||
| 140 | /* I/O window open */ | ||
| 141 | ctrl_outw(0x8a86, MRSHPC_IOWCR1); | ||
| 142 | ctrl_outw(0x0008, MRSHPC_CDCR); /* I/O card mode */ | ||
| 143 | if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0) | ||
| 144 | ctrl_outw(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/ | ||
| 145 | else | ||
| 146 | ctrl_outw(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/ | ||
| 147 | |||
| 148 | ctrl_outw(0x2000, MRSHPC_ICR); | ||
| 149 | ctrl_outb(0x00, PA_MRSHPC_MW2 + 0x206); | ||
| 150 | ctrl_outb(0x42, PA_MRSHPC_MW2 + 0x200); | ||
| 151 | return 0; | ||
| 152 | } | ||
| 153 | #else | ||
| 154 | static int __init cf_init_se(void) | ||
| 155 | { | ||
| 156 | return -1; | ||
| 157 | } | ||
| 158 | #endif | ||
| 159 | |||
| 160 | static int __init cf_init(void) | ||
| 161 | { | ||
| 162 | if (mach_is_se() || mach_is_7722se() || mach_is_7721se()) | ||
| 163 | return cf_init_se(); | ||
| 164 | |||
| 165 | return cf_init_default(); | ||
| 166 | } | ||
| 167 | |||
| 168 | __initcall (cf_init); | ||
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c index b7e46d5bba43..7b17137536d6 100644 --- a/arch/sh/kernel/cpu/clock.c +++ b/arch/sh/kernel/cpu/clock.c | |||
| @@ -117,6 +117,11 @@ int clk_enable(struct clk *clk) | |||
| 117 | unsigned long flags; | 117 | unsigned long flags; |
| 118 | int ret; | 118 | int ret; |
| 119 | 119 | ||
| 120 | if (!clk) | ||
| 121 | return -EINVAL; | ||
| 122 | |||
| 123 | clk_enable(clk->parent); | ||
| 124 | |||
| 120 | spin_lock_irqsave(&clock_lock, flags); | 125 | spin_lock_irqsave(&clock_lock, flags); |
| 121 | ret = __clk_enable(clk); | 126 | ret = __clk_enable(clk); |
| 122 | spin_unlock_irqrestore(&clock_lock, flags); | 127 | spin_unlock_irqrestore(&clock_lock, flags); |
| @@ -147,9 +152,14 @@ void clk_disable(struct clk *clk) | |||
| 147 | { | 152 | { |
| 148 | unsigned long flags; | 153 | unsigned long flags; |
| 149 | 154 | ||
| 155 | if (!clk) | ||
| 156 | return; | ||
| 157 | |||
| 150 | spin_lock_irqsave(&clock_lock, flags); | 158 | spin_lock_irqsave(&clock_lock, flags); |
| 151 | __clk_disable(clk); | 159 | __clk_disable(clk); |
| 152 | spin_unlock_irqrestore(&clock_lock, flags); | 160 | spin_unlock_irqrestore(&clock_lock, flags); |
| 161 | |||
| 162 | clk_disable(clk->parent); | ||
| 153 | } | 163 | } |
| 154 | EXPORT_SYMBOL_GPL(clk_disable); | 164 | EXPORT_SYMBOL_GPL(clk_disable); |
| 155 | 165 | ||
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c index 75fb03d35670..d29e69c156f0 100644 --- a/arch/sh/kernel/cpu/init.c +++ b/arch/sh/kernel/cpu/init.c | |||
| @@ -261,9 +261,11 @@ asmlinkage void __init sh_cpu_init(void) | |||
| 261 | cache_init(); | 261 | cache_init(); |
| 262 | 262 | ||
| 263 | if (raw_smp_processor_id() == 0) { | 263 | if (raw_smp_processor_id() == 0) { |
| 264 | #ifdef CONFIG_MMU | ||
| 264 | shm_align_mask = max_t(unsigned long, | 265 | shm_align_mask = max_t(unsigned long, |
| 265 | current_cpu_data.dcache.way_size - 1, | 266 | current_cpu_data.dcache.way_size - 1, |
| 266 | PAGE_SIZE - 1); | 267 | PAGE_SIZE - 1); |
| 268 | #endif | ||
| 267 | 269 | ||
| 268 | /* Boot CPU sets the cache shape */ | 270 | /* Boot CPU sets the cache shape */ |
| 269 | detect_cache_shape(); | 271 | detect_cache_shape(); |
diff --git a/arch/sh/kernel/cpu/sh2a/Makefile b/arch/sh/kernel/cpu/sh2a/Makefile index 428450cc0809..45f85c77ef75 100644 --- a/arch/sh/kernel/cpu/sh2a/Makefile +++ b/arch/sh/kernel/cpu/sh2a/Makefile | |||
| @@ -8,9 +8,10 @@ common-y += ex.o entry.o | |||
| 8 | 8 | ||
| 9 | obj-$(CONFIG_SH_FPU) += fpu.o | 9 | obj-$(CONFIG_SH_FPU) += fpu.o |
| 10 | 10 | ||
| 11 | obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o | 11 | obj-$(CONFIG_CPU_SUBTYPE_SH7201) += setup-sh7201.o clock-sh7201.o |
| 12 | obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o | 12 | obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o |
| 13 | obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o | 13 | obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o |
| 14 | obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o | ||
| 14 | obj-$(CONFIG_CPU_SUBTYPE_MXG) += setup-mxg.o clock-sh7206.o | 15 | obj-$(CONFIG_CPU_SUBTYPE_MXG) += setup-mxg.o clock-sh7206.o |
| 15 | 16 | ||
| 16 | # Pinmux setup | 17 | # Pinmux setup |
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c new file mode 100644 index 000000000000..020a96fe961a --- /dev/null +++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c | |||
| @@ -0,0 +1,85 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/kernel/cpu/sh2a/clock-sh7201.c | ||
| 3 | * | ||
| 4 | * SH7201 support for the clock framework | ||
| 5 | * | ||
| 6 | * Copyright (C) 2008 Peter Griffin <pgriffin@mpc-data.co.uk> | ||
| 7 | * | ||
| 8 | * Based on clock-sh4.c | ||
| 9 | * Copyright (C) 2005 Paul Mundt | ||
| 10 | * | ||
| 11 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 12 | * License. See the file "COPYING" in the main directory of this archive | ||
| 13 | * for more details. | ||
| 14 | */ | ||
| 15 | #include <linux/init.h> | ||
| 16 | #include <linux/kernel.h> | ||
| 17 | #include <asm/clock.h> | ||
| 18 | #include <asm/freq.h> | ||
| 19 | #include <asm/io.h> | ||
| 20 | |||
| 21 | const static int pll1rate[]={1,2,3,4,6,8}; | ||
| 22 | const static int pfc_divisors[]={1,2,3,4,6,8,12}; | ||
| 23 | #define ifc_divisors pfc_divisors | ||
| 24 | |||
| 25 | #if (CONFIG_SH_CLK_MD == 0) | ||
| 26 | #define PLL2 (4) | ||
| 27 | #elif (CONFIG_SH_CLK_MD == 2) | ||
| 28 | #define PLL2 (2) | ||
| 29 | #elif (CONFIG_SH_CLK_MD == 3) | ||
| 30 | #define PLL2 (1) | ||
| 31 | #else | ||
| 32 | #error "Illegal Clock Mode!" | ||
| 33 | #endif | ||
| 34 | |||
| 35 | static void master_clk_init(struct clk *clk) | ||
| 36 | { | ||
| 37 | clk->rate = 10000000 * PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007]; | ||
| 38 | } | ||
| 39 | |||
| 40 | static struct clk_ops sh7201_master_clk_ops = { | ||
| 41 | .init = master_clk_init, | ||
| 42 | }; | ||
| 43 | |||
| 44 | static void module_clk_recalc(struct clk *clk) | ||
| 45 | { | ||
| 46 | int idx = (ctrl_inw(FREQCR) & 0x0007); | ||
| 47 | clk->rate = clk->parent->rate / pfc_divisors[idx]; | ||
| 48 | } | ||
| 49 | |||
| 50 | static struct clk_ops sh7201_module_clk_ops = { | ||
| 51 | .recalc = module_clk_recalc, | ||
| 52 | }; | ||
| 53 | |||
| 54 | static void bus_clk_recalc(struct clk *clk) | ||
| 55 | { | ||
| 56 | int idx = (ctrl_inw(FREQCR) & 0x0007); | ||
| 57 | clk->rate = clk->parent->rate / pfc_divisors[idx]; | ||
| 58 | } | ||
| 59 | |||
| 60 | static struct clk_ops sh7201_bus_clk_ops = { | ||
| 61 | .recalc = bus_clk_recalc, | ||
| 62 | }; | ||
| 63 | |||
| 64 | static void cpu_clk_recalc(struct clk *clk) | ||
| 65 | { | ||
| 66 | int idx = ((ctrl_inw(FREQCR) >> 4) & 0x0007); | ||
| 67 | clk->rate = clk->parent->rate / ifc_divisors[idx]; | ||
| 68 | } | ||
| 69 | |||
| 70 | static struct clk_ops sh7201_cpu_clk_ops = { | ||
| 71 | .recalc = cpu_clk_recalc, | ||
| 72 | }; | ||
| 73 | |||
| 74 | static struct clk_ops *sh7201_clk_ops[] = { | ||
| 75 | &sh7201_master_clk_ops, | ||
| 76 | &sh7201_module_clk_ops, | ||
| 77 | &sh7201_bus_clk_ops, | ||
| 78 | &sh7201_cpu_clk_ops, | ||
| 79 | }; | ||
| 80 | |||
| 81 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) | ||
| 82 | { | ||
| 83 | if (idx < ARRAY_SIZE(sh7201_clk_ops)) | ||
| 84 | *ops = sh7201_clk_ops[idx]; | ||
| 85 | } | ||
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c index 6e79132f6f30..e098e2f6aa08 100644 --- a/arch/sh/kernel/cpu/sh2a/probe.c +++ b/arch/sh/kernel/cpu/sh2a/probe.c | |||
| @@ -18,16 +18,17 @@ int __init detect_cpu_and_cache_system(void) | |||
| 18 | /* All SH-2A CPUs have support for 16 and 32-bit opcodes.. */ | 18 | /* All SH-2A CPUs have support for 16 and 32-bit opcodes.. */ |
| 19 | boot_cpu_data.flags |= CPU_HAS_OP32; | 19 | boot_cpu_data.flags |= CPU_HAS_OP32; |
| 20 | 20 | ||
| 21 | #if defined(CONFIG_CPU_SUBTYPE_SH7203) | 21 | #if defined(CONFIG_CPU_SUBTYPE_SH7201) |
| 22 | boot_cpu_data.type = CPU_SH7201; | ||
| 23 | boot_cpu_data.flags |= CPU_HAS_FPU; | ||
| 24 | #elif defined(CONFIG_CPU_SUBTYPE_SH7203) | ||
| 22 | boot_cpu_data.type = CPU_SH7203; | 25 | boot_cpu_data.type = CPU_SH7203; |
| 23 | /* SH7203 has an FPU.. */ | ||
| 24 | boot_cpu_data.flags |= CPU_HAS_FPU; | 26 | boot_cpu_data.flags |= CPU_HAS_FPU; |
| 25 | #elif defined(CONFIG_CPU_SUBTYPE_SH7263) | 27 | #elif defined(CONFIG_CPU_SUBTYPE_SH7263) |
| 26 | boot_cpu_data.type = CPU_SH7263; | 28 | boot_cpu_data.type = CPU_SH7263; |
| 27 | boot_cpu_data.flags |= CPU_HAS_FPU; | 29 | boot_cpu_data.flags |= CPU_HAS_FPU; |
| 28 | #elif defined(CONFIG_CPU_SUBTYPE_SH7206) | 30 | #elif defined(CONFIG_CPU_SUBTYPE_SH7206) |
| 29 | boot_cpu_data.type = CPU_SH7206; | 31 | boot_cpu_data.type = CPU_SH7206; |
| 30 | /* While SH7206 has a DSP.. */ | ||
| 31 | boot_cpu_data.flags |= CPU_HAS_DSP; | 32 | boot_cpu_data.flags |= CPU_HAS_DSP; |
| 32 | #elif defined(CONFIG_CPU_SUBTYPE_MXG) | 33 | #elif defined(CONFIG_CPU_SUBTYPE_MXG) |
| 33 | boot_cpu_data.type = CPU_MXG; | 34 | boot_cpu_data.type = CPU_MXG; |
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c new file mode 100644 index 000000000000..0631e421c022 --- /dev/null +++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c | |||
| @@ -0,0 +1,331 @@ | |||
| 1 | /* | ||
| 2 | * SH7201 setup | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 Peter Griffin pgriffin@mpc-data.co.uk | ||
| 5 | * | ||
| 6 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 7 | * License. See the file "COPYING" in the main directory of this archive | ||
| 8 | * for more details. | ||
| 9 | */ | ||
| 10 | #include <linux/platform_device.h> | ||
| 11 | #include <linux/init.h> | ||
| 12 | #include <linux/serial.h> | ||
| 13 | #include <linux/serial_sci.h> | ||
| 14 | |||
| 15 | enum { | ||
| 16 | UNUSED = 0, | ||
| 17 | |||
| 18 | /* interrupt sources */ | ||
| 19 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, | ||
| 20 | PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7, | ||
| 21 | ADC_ADI, | ||
| 22 | MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D, | ||
| 23 | MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F, | ||
| 24 | MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U, | ||
| 25 | MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U, | ||
| 26 | MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V, | ||
| 27 | MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V, | ||
| 28 | MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W, | ||
| 29 | RTC_ARM, RTC_PRD, RTC_CUP, | ||
| 30 | WDT, | ||
| 31 | IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI, IIC30_TEI, | ||
| 32 | IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI, IIC31_TEI, | ||
| 33 | IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI, IIC32_TEI, | ||
| 34 | |||
| 35 | DMAC0_DMINT0, DMAC1_DMINT1, | ||
| 36 | DMAC2_DMINT2, DMAC3_DMINT3, | ||
| 37 | |||
| 38 | SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI, | ||
| 39 | SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI, | ||
| 40 | SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI, | ||
| 41 | SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI, | ||
| 42 | SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI, | ||
| 43 | SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI, | ||
| 44 | SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI, | ||
| 45 | SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI, | ||
| 46 | |||
| 47 | DMAC0_DMINTA, DMAC4_DMINT4, DMAC5_DMINT5, DMAC6_DMINT6, | ||
| 48 | DMAC7_DMINT7, | ||
| 49 | |||
| 50 | RCAN0_ERS, RCAN0_OVR, | ||
| 51 | RCAN0_SLE, | ||
| 52 | RCAN0_RM0, RCAN0_RM1, | ||
| 53 | |||
| 54 | RCAN1_ERS, RCAN1_OVR, | ||
| 55 | RCAN1_SLE, | ||
| 56 | RCAN1_RM0, RCAN1_RM1, | ||
| 57 | |||
| 58 | SSI0_SSII, SSI1_SSII, | ||
| 59 | |||
| 60 | TMR0_CMIA0, TMR0_CMIB0, TMR0_OVI0, | ||
| 61 | TMR1_CMIA1, TMR1_CMIB1, TMR1_OVI1, | ||
| 62 | |||
| 63 | /* interrupt groups */ | ||
| 64 | |||
| 65 | IRQ, PINT, ADC, | ||
| 66 | MTU20_ABCD, MTU20_VEF, MTU21_AB, MTU21_VU, MTU22_AB, MTU22_VU, | ||
| 67 | MTU23_ABCD, MTU24_ABCD, MTU25_UVW, | ||
| 68 | RTC, IIC30, IIC31, IIC32, | ||
| 69 | SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7, | ||
| 70 | RCAN0, RCAN1, TMR0, TMR1 | ||
| 71 | |||
| 72 | }; | ||
| 73 | |||
| 74 | static struct intc_vect vectors[] __initdata = { | ||
| 75 | INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65), | ||
| 76 | INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67), | ||
| 77 | INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69), | ||
| 78 | INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71), | ||
| 79 | INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81), | ||
| 80 | INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83), | ||
| 81 | INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85), | ||
| 82 | INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87), | ||
| 83 | |||
| 84 | INTC_IRQ(ADC_ADI, 92), | ||
| 85 | |||
| 86 | INTC_IRQ(MTU2_TGI0A, 108), INTC_IRQ(MTU2_TGI0B, 109), | ||
| 87 | INTC_IRQ(MTU2_TGI0C, 110), INTC_IRQ(MTU2_TGI0D, 111), | ||
| 88 | INTC_IRQ(MTU2_TCI0V, 112), | ||
| 89 | INTC_IRQ(MTU2_TGI0E, 113), INTC_IRQ(MTU2_TGI0F, 114), | ||
| 90 | |||
| 91 | INTC_IRQ(MTU2_TGI1A, 116), INTC_IRQ(MTU2_TGI1B, 117), | ||
| 92 | INTC_IRQ(MTU2_TCI1V, 120), INTC_IRQ(MTU2_TCI1U, 121), | ||
| 93 | |||
| 94 | INTC_IRQ(MTU2_TGI2A, 124), INTC_IRQ(MTU2_TGI2B, 125), | ||
| 95 | INTC_IRQ(MTU2_TCI2V, 128), INTC_IRQ(MTU2_TCI2U, 129), | ||
| 96 | |||
| 97 | INTC_IRQ(MTU2_TGI3A, 132), INTC_IRQ(MTU2_TGI3B, 133), | ||
| 98 | INTC_IRQ(MTU2_TGI3C, 134), INTC_IRQ(MTU2_TGI3D, 135), | ||
| 99 | INTC_IRQ(MTU2_TCI3V, 136), | ||
| 100 | |||
| 101 | INTC_IRQ(MTU2_TGI4A, 140), INTC_IRQ(MTU2_TGI4B, 141), | ||
| 102 | INTC_IRQ(MTU2_TGI4C, 142), INTC_IRQ(MTU2_TGI4D, 143), | ||
| 103 | INTC_IRQ(MTU2_TCI4V, 144), | ||
| 104 | |||
| 105 | INTC_IRQ(MTU2_TGI5U, 148), INTC_IRQ(MTU2_TGI5V, 149), | ||
| 106 | INTC_IRQ(MTU2_TGI5W, 150), | ||
| 107 | |||
| 108 | INTC_IRQ(RTC_ARM, 152), INTC_IRQ(RTC_PRD, 153), | ||
| 109 | INTC_IRQ(RTC_CUP, 154), INTC_IRQ(WDT, 156), | ||
| 110 | |||
| 111 | INTC_IRQ(IIC30_STPI, 157), INTC_IRQ(IIC30_NAKI, 158), | ||
| 112 | INTC_IRQ(IIC30_RXI, 159), INTC_IRQ(IIC30_TXI, 160), | ||
| 113 | INTC_IRQ(IIC30_TEI, 161), | ||
| 114 | |||
| 115 | INTC_IRQ(IIC31_STPI, 164), INTC_IRQ(IIC31_NAKI, 165), | ||
| 116 | INTC_IRQ(IIC31_RXI, 166), INTC_IRQ(IIC31_TXI, 167), | ||
| 117 | INTC_IRQ(IIC31_TEI, 168), | ||
| 118 | |||
| 119 | INTC_IRQ(IIC32_STPI, 170), INTC_IRQ(IIC32_NAKI, 171), | ||
| 120 | INTC_IRQ(IIC32_RXI, 172), INTC_IRQ(IIC32_TXI, 173), | ||
| 121 | INTC_IRQ(IIC32_TEI, 174), | ||
| 122 | |||
| 123 | INTC_IRQ(DMAC0_DMINT0, 176), INTC_IRQ(DMAC1_DMINT1, 177), | ||
| 124 | INTC_IRQ(DMAC2_DMINT2, 178), INTC_IRQ(DMAC3_DMINT3, 179), | ||
| 125 | |||
| 126 | INTC_IRQ(SCIF0_BRI, 180), INTC_IRQ(SCIF0_ERI, 181), | ||
| 127 | INTC_IRQ(SCIF0_RXI, 182), INTC_IRQ(SCIF0_TXI, 183), | ||
| 128 | INTC_IRQ(SCIF1_BRI, 184), INTC_IRQ(SCIF1_ERI, 185), | ||
| 129 | INTC_IRQ(SCIF1_RXI, 186), INTC_IRQ(SCIF1_TXI, 187), | ||
| 130 | INTC_IRQ(SCIF2_BRI, 188), INTC_IRQ(SCIF2_ERI, 189), | ||
| 131 | INTC_IRQ(SCIF2_RXI, 190), INTC_IRQ(SCIF2_TXI, 191), | ||
| 132 | INTC_IRQ(SCIF3_BRI, 192), INTC_IRQ(SCIF3_ERI, 193), | ||
| 133 | INTC_IRQ(SCIF3_RXI, 194), INTC_IRQ(SCIF3_TXI, 195), | ||
| 134 | INTC_IRQ(SCIF4_BRI, 196), INTC_IRQ(SCIF4_ERI, 197), | ||
| 135 | INTC_IRQ(SCIF4_RXI, 198), INTC_IRQ(SCIF4_TXI, 199), | ||
| 136 | INTC_IRQ(SCIF5_BRI, 200), INTC_IRQ(SCIF5_ERI, 201), | ||
| 137 | INTC_IRQ(SCIF5_RXI, 202), INTC_IRQ(SCIF5_TXI, 203), | ||
| 138 | INTC_IRQ(SCIF6_BRI, 204), INTC_IRQ(SCIF6_ERI, 205), | ||
| 139 | INTC_IRQ(SCIF6_RXI, 206), INTC_IRQ(SCIF6_TXI, 207), | ||
| 140 | INTC_IRQ(SCIF7_BRI, 208), INTC_IRQ(SCIF7_ERI, 209), | ||
| 141 | INTC_IRQ(SCIF7_RXI, 210), INTC_IRQ(SCIF7_TXI, 211), | ||
| 142 | |||
| 143 | INTC_IRQ(DMAC0_DMINTA, 212), INTC_IRQ(DMAC4_DMINT4, 216), | ||
| 144 | INTC_IRQ(DMAC5_DMINT5, 217), INTC_IRQ(DMAC6_DMINT6, 218), | ||
| 145 | INTC_IRQ(DMAC7_DMINT7, 219), | ||
| 146 | |||
| 147 | INTC_IRQ(RCAN0_ERS, 228), INTC_IRQ(RCAN0_OVR, 229), | ||
| 148 | INTC_IRQ(RCAN0_SLE, 230), | ||
| 149 | INTC_IRQ(RCAN0_RM0, 231), INTC_IRQ(RCAN0_RM1, 232), | ||
| 150 | |||
| 151 | INTC_IRQ(RCAN1_ERS, 234), INTC_IRQ(RCAN1_OVR, 235), | ||
| 152 | INTC_IRQ(RCAN1_SLE, 236), | ||
| 153 | INTC_IRQ(RCAN1_RM0, 237), INTC_IRQ(RCAN1_RM1, 238), | ||
| 154 | |||
| 155 | INTC_IRQ(SSI0_SSII, 244), INTC_IRQ(SSI1_SSII, 245), | ||
| 156 | |||
| 157 | INTC_IRQ(TMR0_CMIA0, 246), INTC_IRQ(TMR0_CMIB0, 247), | ||
| 158 | INTC_IRQ(TMR0_OVI0, 248), | ||
| 159 | |||
| 160 | INTC_IRQ(TMR1_CMIA1, 252), INTC_IRQ(TMR1_CMIB1, 253), | ||
| 161 | INTC_IRQ(TMR1_OVI1, 254), | ||
| 162 | |||
| 163 | }; | ||
| 164 | |||
| 165 | static struct intc_group groups[] __initdata = { | ||
| 166 | INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3, | ||
| 167 | PINT4, PINT5, PINT6, PINT7), | ||
| 168 | INTC_GROUP(MTU20_ABCD, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D), | ||
| 169 | INTC_GROUP(MTU20_VEF, MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F), | ||
| 170 | |||
| 171 | INTC_GROUP(MTU21_AB, MTU2_TGI1A, MTU2_TGI1B), | ||
| 172 | INTC_GROUP(MTU21_VU, MTU2_TCI1V, MTU2_TCI1U), | ||
| 173 | INTC_GROUP(MTU22_AB, MTU2_TGI2A, MTU2_TGI2B), | ||
| 174 | INTC_GROUP(MTU22_VU, MTU2_TCI2V, MTU2_TCI2U), | ||
| 175 | INTC_GROUP(MTU23_ABCD, MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D), | ||
| 176 | INTC_GROUP(MTU24_ABCD, MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D), | ||
| 177 | INTC_GROUP(MTU25_UVW, MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W), | ||
| 178 | INTC_GROUP(RTC, RTC_ARM, RTC_PRD, RTC_CUP ), | ||
| 179 | |||
| 180 | INTC_GROUP(IIC30, IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI, | ||
| 181 | IIC30_TEI), | ||
| 182 | INTC_GROUP(IIC31, IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI, | ||
| 183 | IIC31_TEI), | ||
| 184 | INTC_GROUP(IIC32, IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI, | ||
| 185 | IIC32_TEI), | ||
| 186 | |||
| 187 | INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI), | ||
| 188 | INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI), | ||
| 189 | INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI), | ||
| 190 | INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI), | ||
| 191 | INTC_GROUP(SCIF4, SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI), | ||
| 192 | INTC_GROUP(SCIF5, SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI), | ||
| 193 | INTC_GROUP(SCIF6, SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI), | ||
| 194 | INTC_GROUP(SCIF7, SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI), | ||
| 195 | |||
| 196 | INTC_GROUP(RCAN0, RCAN0_ERS, RCAN0_OVR, RCAN0_RM0, RCAN0_RM1, | ||
| 197 | RCAN0_SLE), | ||
| 198 | INTC_GROUP(RCAN1, RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1, | ||
| 199 | RCAN1_SLE), | ||
| 200 | |||
| 201 | INTC_GROUP(TMR0, TMR0_CMIA0, TMR0_CMIB0, TMR0_OVI0), | ||
| 202 | INTC_GROUP(TMR1, TMR1_CMIA1, TMR1_CMIB1, TMR1_OVI1), | ||
| 203 | }; | ||
| 204 | |||
| 205 | static struct intc_prio_reg prio_registers[] __initdata = { | ||
| 206 | { 0xfffe9418, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } }, | ||
| 207 | { 0xfffe941a, 0, 16, 4, /* IPR02 */ { IRQ4, IRQ5, IRQ6, IRQ7 } }, | ||
| 208 | { 0xfffe9420, 0, 16, 4, /* IPR05 */ { PINT, 0, ADC_ADI, 0 } }, | ||
| 209 | { 0xfffe9800, 0, 16, 4, /* IPR06 */ { 0, MTU20_ABCD, MTU20_VEF, MTU21_AB } }, | ||
| 210 | { 0xfffe9802, 0, 16, 4, /* IPR07 */ { MTU21_VU, MTU22_AB, MTU22_VU, MTU23_ABCD } }, | ||
| 211 | { 0xfffe9804, 0, 16, 4, /* IPR08 */ { MTU2_TCI3V, MTU24_ABCD, MTU2_TCI4V, MTU25_UVW } }, | ||
| 212 | |||
| 213 | { 0xfffe9806, 0, 16, 4, /* IPR09 */ { RTC, WDT, IIC30, 0 } }, | ||
| 214 | { 0xfffe9808, 0, 16, 4, /* IPR10 */ { IIC31, IIC32, DMAC0_DMINT0, DMAC1_DMINT1 } }, | ||
| 215 | { 0xfffe980a, 0, 16, 4, /* IPR11 */ { DMAC2_DMINT2, DMAC3_DMINT3, SCIF0 , SCIF1 } }, | ||
| 216 | { 0xfffe980c, 0, 16, 4, /* IPR12 */ { SCIF2, SCIF3, SCIF4, SCIF5 } }, | ||
| 217 | { 0xfffe980e, 0, 16, 4, /* IPR13 */ { SCIF6, SCIF7, DMAC0_DMINTA, DMAC4_DMINT4 } }, | ||
| 218 | { 0xfffe9810, 0, 16, 4, /* IPR14 */ { DMAC5_DMINT5, DMAC6_DMINT6, DMAC7_DMINT7, 0 } }, | ||
| 219 | { 0xfffe9812, 0, 16, 4, /* IPR15 */ { 0, RCAN0, RCAN1, 0 } }, | ||
| 220 | { 0xfffe9814, 0, 16, 4, /* IPR16 */ { SSI0_SSII, SSI1_SSII, TMR0, TMR1 } }, | ||
| 221 | }; | ||
| 222 | |||
| 223 | static struct intc_mask_reg mask_registers[] __initdata = { | ||
| 224 | { 0xfffe9408, 0, 16, /* PINTER */ | ||
| 225 | { 0, 0, 0, 0, 0, 0, 0, 0, | ||
| 226 | PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } }, | ||
| 227 | }; | ||
| 228 | |||
| 229 | static DECLARE_INTC_DESC(intc_desc, "sh7201", vectors, groups, | ||
| 230 | mask_registers, prio_registers, NULL); | ||
| 231 | |||
| 232 | static struct plat_sci_port sci_platform_data[] = { | ||
| 233 | { | ||
| 234 | .mapbase = 0xfffe8000, | ||
| 235 | .flags = UPF_BOOT_AUTOCONF, | ||
| 236 | .type = PORT_SCIF, | ||
| 237 | .irqs = { 181, 182, 183, 180} | ||
| 238 | }, { | ||
| 239 | .mapbase = 0xfffe8800, | ||
| 240 | .flags = UPF_BOOT_AUTOCONF, | ||
| 241 | .type = PORT_SCIF, | ||
| 242 | .irqs = { 185, 186, 187, 184} | ||
| 243 | }, { | ||
| 244 | .mapbase = 0xfffe9000, | ||
| 245 | .flags = UPF_BOOT_AUTOCONF, | ||
| 246 | .type = PORT_SCIF, | ||
| 247 | .irqs = { 189, 186, 187, 188} | ||
| 248 | }, { | ||
| 249 | .mapbase = 0xfffe9800, | ||
| 250 | .flags = UPF_BOOT_AUTOCONF, | ||
| 251 | .type = PORT_SCIF, | ||
| 252 | .irqs = { 193, 194, 195, 192} | ||
| 253 | }, { | ||
| 254 | .mapbase = 0xfffea000, | ||
| 255 | .flags = UPF_BOOT_AUTOCONF, | ||
| 256 | .type = PORT_SCIF, | ||
| 257 | .irqs = { 196, 198, 199, 196} | ||
| 258 | }, { | ||
| 259 | .mapbase = 0xfffea800, | ||
| 260 | .flags = UPF_BOOT_AUTOCONF, | ||
| 261 | .type = PORT_SCIF, | ||
| 262 | .irqs = { 201, 202, 203, 200} | ||
| 263 | }, { | ||
| 264 | .mapbase = 0xfffeb000, | ||
| 265 | .flags = UPF_BOOT_AUTOCONF, | ||
| 266 | .type = PORT_SCIF, | ||
| 267 | .irqs = { 205, 206, 207, 204} | ||
| 268 | }, { | ||
| 269 | .mapbase = 0xfffeb800, | ||
| 270 | .flags = UPF_BOOT_AUTOCONF, | ||
| 271 | .type = PORT_SCIF, | ||
| 272 | .irqs = { 209, 210, 211, 208} | ||
| 273 | }, { | ||
| 274 | .flags = 0, | ||
| 275 | } | ||
| 276 | }; | ||
| 277 | |||
| 278 | static struct platform_device sci_device = { | ||
| 279 | .name = "sh-sci", | ||
| 280 | .id = -1, | ||
| 281 | .dev = { | ||
| 282 | .platform_data = sci_platform_data, | ||
| 283 | }, | ||
| 284 | }; | ||
| 285 | |||
| 286 | static struct resource rtc_resources[] = { | ||
| 287 | [0] = { | ||
| 288 | .start = 0xffff0800, | ||
| 289 | .end = 0xffff2000 + 0x58 - 1, | ||
| 290 | .flags = IORESOURCE_IO, | ||
| 291 | }, | ||
| 292 | [1] = { | ||
| 293 | /* Period IRQ */ | ||
| 294 | .start = 153, | ||
| 295 | .flags = IORESOURCE_IRQ, | ||
| 296 | }, | ||
| 297 | [2] = { | ||
| 298 | /* Carry IRQ */ | ||
| 299 | .start = 154, | ||
| 300 | .flags = IORESOURCE_IRQ, | ||
| 301 | }, | ||
| 302 | [3] = { | ||
| 303 | /* Alarm IRQ */ | ||
| 304 | .start = 152, | ||
| 305 | .flags = IORESOURCE_IRQ, | ||
| 306 | }, | ||
| 307 | }; | ||
| 308 | |||
| 309 | static struct platform_device rtc_device = { | ||
| 310 | .name = "sh-rtc", | ||
| 311 | .id = -1, | ||
| 312 | .num_resources = ARRAY_SIZE(rtc_resources), | ||
| 313 | .resource = rtc_resources, | ||
| 314 | }; | ||
| 315 | |||
| 316 | static struct platform_device *sh7201_devices[] __initdata = { | ||
| 317 | &sci_device, | ||
| 318 | &rtc_device, | ||
| 319 | }; | ||
| 320 | |||
| 321 | static int __init sh7201_devices_setup(void) | ||
| 322 | { | ||
| 323 | return platform_add_devices(sh7201_devices, | ||
| 324 | ARRAY_SIZE(sh7201_devices)); | ||
| 325 | } | ||
| 326 | __initcall(sh7201_devices_setup); | ||
| 327 | |||
| 328 | void __init plat_irq_setup(void) | ||
| 329 | { | ||
| 330 | register_intc_controller(&intc_desc); | ||
| 331 | } | ||
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S index 3fe482dd05c1..b4106d0c68ec 100644 --- a/arch/sh/kernel/cpu/sh3/entry.S +++ b/arch/sh/kernel/cpu/sh3/entry.S | |||
| @@ -52,7 +52,7 @@ | |||
| 52 | * syscall # | 52 | * syscall # |
| 53 | * | 53 | * |
| 54 | */ | 54 | */ |
| 55 | #if defined(CONFIG_KGDB_NMI) | 55 | #if defined(CONFIG_KGDB) |
| 56 | NMI_VEC = 0x1c0 ! Must catch early for debounce | 56 | NMI_VEC = 0x1c0 ! Must catch early for debounce |
| 57 | #endif | 57 | #endif |
| 58 | 58 | ||
| @@ -307,7 +307,7 @@ skip_restore: | |||
| 307 | 6: or k0, k2 ! Set the IMASK-bits | 307 | 6: or k0, k2 ! Set the IMASK-bits |
| 308 | ldc k2, ssr | 308 | ldc k2, ssr |
| 309 | ! | 309 | ! |
| 310 | #if defined(CONFIG_KGDB_NMI) | 310 | #if defined(CONFIG_KGDB) |
| 311 | ! Clear in_nmi | 311 | ! Clear in_nmi |
| 312 | mov.l 6f, k0 | 312 | mov.l 6f, k0 |
| 313 | mov #0, k1 | 313 | mov #0, k1 |
| @@ -320,7 +320,7 @@ skip_restore: | |||
| 320 | 320 | ||
| 321 | .align 2 | 321 | .align 2 |
| 322 | 5: .long 0x00001000 ! DSP | 322 | 5: .long 0x00001000 ! DSP |
| 323 | #ifdef CONFIG_KGDB_NMI | 323 | #ifdef CONFIG_KGDB |
| 324 | 6: .long in_nmi | 324 | 6: .long in_nmi |
| 325 | #endif | 325 | #endif |
| 326 | 7: .long 0x30000000 | 326 | 7: .long 0x30000000 |
| @@ -376,9 +376,9 @@ tlb_miss: | |||
| 376 | ! | 376 | ! |
| 377 | .balign 512,0,512 | 377 | .balign 512,0,512 |
| 378 | interrupt: | 378 | interrupt: |
| 379 | mov.l 2f, k2 | ||
| 380 | mov.l 3f, k3 | 379 | mov.l 3f, k3 |
| 381 | #if defined(CONFIG_KGDB_NMI) | 380 | #if defined(CONFIG_KGDB) |
| 381 | mov.l 2f, k2 | ||
| 382 | ! Debounce (filter nested NMI) | 382 | ! Debounce (filter nested NMI) |
| 383 | mov.l @k2, k0 | 383 | mov.l @k2, k0 |
| 384 | mov.l 5f, k1 | 384 | mov.l 5f, k1 |
| @@ -390,16 +390,16 @@ interrupt: | |||
| 390 | rte | 390 | rte |
| 391 | nop | 391 | nop |
| 392 | .align 2 | 392 | .align 2 |
| 393 | 2: .long INTEVT | ||
| 393 | 5: .long NMI_VEC | 394 | 5: .long NMI_VEC |
| 394 | 6: .long in_nmi | 395 | 6: .long in_nmi |
| 395 | 0: | 396 | 0: |
| 396 | #endif /* defined(CONFIG_KGDB_NMI) */ | 397 | #endif /* defined(CONFIG_KGDB) */ |
| 397 | bra handle_exception | 398 | bra handle_exception |
| 398 | mov #-1, k2 ! interrupt exception marker | 399 | mov #-1, k2 ! interrupt exception marker |
| 399 | 400 | ||
| 400 | .align 2 | 401 | .align 2 |
| 401 | 1: .long EXPEVT | 402 | 1: .long EXPEVT |
| 402 | 2: .long INTEVT | ||
| 403 | 3: .long ret_from_irq | 403 | 3: .long ret_from_irq |
| 404 | 4: .long ret_from_exception | 404 | 4: .long ret_from_exception |
| 405 | 405 | ||
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S index dac429726899..e5a0de39a2db 100644 --- a/arch/sh/kernel/cpu/sh3/ex.S +++ b/arch/sh/kernel/cpu/sh3/ex.S | |||
| @@ -26,7 +26,7 @@ | |||
| 26 | #define fpu_error_trap_handler exception_error | 26 | #define fpu_error_trap_handler exception_error |
| 27 | #endif | 27 | #endif |
| 28 | 28 | ||
| 29 | #if !defined(CONFIG_KGDB_NMI) | 29 | #if !defined(CONFIG_KGDB) |
| 30 | #define kgdb_handle_exception exception_error | 30 | #define kgdb_handle_exception exception_error |
| 31 | #endif | 31 | #endif |
| 32 | 32 | ||
diff --git a/arch/sh/kernel/cpu/sh4/softfloat.c b/arch/sh/kernel/cpu/sh4/softfloat.c index 2b747f3b02bd..42edf2e54e85 100644 --- a/arch/sh/kernel/cpu/sh4/softfloat.c +++ b/arch/sh/kernel/cpu/sh4/softfloat.c | |||
| @@ -37,6 +37,7 @@ | |||
| 37 | */ | 37 | */ |
| 38 | #include <linux/kernel.h> | 38 | #include <linux/kernel.h> |
| 39 | #include <cpu/fpu.h> | 39 | #include <cpu/fpu.h> |
| 40 | #include <asm/div64.h> | ||
| 40 | 41 | ||
| 41 | #define LIT64( a ) a##LL | 42 | #define LIT64( a ) a##LL |
| 42 | 43 | ||
| @@ -67,16 +68,16 @@ typedef unsigned long long float64; | |||
| 67 | extern void float_raise(unsigned int flags); /* in fpu.c */ | 68 | extern void float_raise(unsigned int flags); /* in fpu.c */ |
| 68 | extern int float_rounding_mode(void); /* in fpu.c */ | 69 | extern int float_rounding_mode(void); /* in fpu.c */ |
| 69 | 70 | ||
| 70 | inline bits64 extractFloat64Frac(float64 a); | 71 | bits64 extractFloat64Frac(float64 a); |
| 71 | inline flag extractFloat64Sign(float64 a); | 72 | flag extractFloat64Sign(float64 a); |
| 72 | inline int16 extractFloat64Exp(float64 a); | 73 | int16 extractFloat64Exp(float64 a); |
| 73 | inline int16 extractFloat32Exp(float32 a); | 74 | int16 extractFloat32Exp(float32 a); |
| 74 | inline flag extractFloat32Sign(float32 a); | 75 | flag extractFloat32Sign(float32 a); |
| 75 | inline bits32 extractFloat32Frac(float32 a); | 76 | bits32 extractFloat32Frac(float32 a); |
| 76 | inline float64 packFloat64(flag zSign, int16 zExp, bits64 zSig); | 77 | float64 packFloat64(flag zSign, int16 zExp, bits64 zSig); |
| 77 | inline void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr); | 78 | void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr); |
| 78 | inline float32 packFloat32(flag zSign, int16 zExp, bits32 zSig); | 79 | float32 packFloat32(flag zSign, int16 zExp, bits32 zSig); |
| 79 | inline void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr); | 80 | void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr); |
| 80 | float64 float64_sub(float64 a, float64 b); | 81 | float64 float64_sub(float64 a, float64 b); |
| 81 | float32 float32_sub(float32 a, float32 b); | 82 | float32 float32_sub(float32 a, float32 b); |
| 82 | float32 float32_add(float32 a, float32 b); | 83 | float32 float32_add(float32 a, float32 b); |
| @@ -86,11 +87,11 @@ float32 float32_div(float32 a, float32 b); | |||
| 86 | float32 float32_mul(float32 a, float32 b); | 87 | float32 float32_mul(float32 a, float32 b); |
| 87 | float64 float64_mul(float64 a, float64 b); | 88 | float64 float64_mul(float64 a, float64 b); |
| 88 | float32 float64_to_float32(float64 a); | 89 | float32 float64_to_float32(float64 a); |
| 89 | inline void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, | 90 | void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, |
| 90 | bits64 * z1Ptr); | 91 | bits64 * z1Ptr); |
| 91 | inline void sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, | 92 | void sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, |
| 92 | bits64 * z1Ptr); | 93 | bits64 * z1Ptr); |
| 93 | inline void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr); | 94 | void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr); |
| 94 | 95 | ||
| 95 | static int8 countLeadingZeros32(bits32 a); | 96 | static int8 countLeadingZeros32(bits32 a); |
| 96 | static int8 countLeadingZeros64(bits64 a); | 97 | static int8 countLeadingZeros64(bits64 a); |
| @@ -110,42 +111,42 @@ static bits64 estimateDiv128To64(bits64 a0, bits64 a1, bits64 b); | |||
| 110 | static void normalizeFloat32Subnormal(bits32 aSig, int16 * zExpPtr, | 111 | static void normalizeFloat32Subnormal(bits32 aSig, int16 * zExpPtr, |
| 111 | bits32 * zSigPtr); | 112 | bits32 * zSigPtr); |
| 112 | 113 | ||
| 113 | inline bits64 extractFloat64Frac(float64 a) | 114 | bits64 extractFloat64Frac(float64 a) |
| 114 | { | 115 | { |
| 115 | return a & LIT64(0x000FFFFFFFFFFFFF); | 116 | return a & LIT64(0x000FFFFFFFFFFFFF); |
| 116 | } | 117 | } |
| 117 | 118 | ||
| 118 | inline flag extractFloat64Sign(float64 a) | 119 | flag extractFloat64Sign(float64 a) |
| 119 | { | 120 | { |
| 120 | return a >> 63; | 121 | return a >> 63; |
| 121 | } | 122 | } |
| 122 | 123 | ||
| 123 | inline int16 extractFloat64Exp(float64 a) | 124 | int16 extractFloat64Exp(float64 a) |
| 124 | { | 125 | { |
| 125 | return (a >> 52) & 0x7FF; | 126 | return (a >> 52) & 0x7FF; |
| 126 | } | 127 | } |
| 127 | 128 | ||
| 128 | inline int16 extractFloat32Exp(float32 a) | 129 | int16 extractFloat32Exp(float32 a) |
| 129 | { | 130 | { |
| 130 | return (a >> 23) & 0xFF; | 131 | return (a >> 23) & 0xFF; |
| 131 | } | 132 | } |
| 132 | 133 | ||
| 133 | inline flag extractFloat32Sign(float32 a) | 134 | flag extractFloat32Sign(float32 a) |
| 134 | { | 135 | { |
| 135 | return a >> 31; | 136 | return a >> 31; |
| 136 | } | 137 | } |
| 137 | 138 | ||
| 138 | inline bits32 extractFloat32Frac(float32 a) | 139 | bits32 extractFloat32Frac(float32 a) |
| 139 | { | 140 | { |
| 140 | return a & 0x007FFFFF; | 141 | return a & 0x007FFFFF; |
| 141 | } | 142 | } |
| 142 | 143 | ||
| 143 | inline float64 packFloat64(flag zSign, int16 zExp, bits64 zSig) | 144 | float64 packFloat64(flag zSign, int16 zExp, bits64 zSig) |
| 144 | { | 145 | { |
| 145 | return (((bits64) zSign) << 63) + (((bits64) zExp) << 52) + zSig; | 146 | return (((bits64) zSign) << 63) + (((bits64) zExp) << 52) + zSig; |
| 146 | } | 147 | } |
| 147 | 148 | ||
| 148 | inline void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr) | 149 | void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr) |
| 149 | { | 150 | { |
| 150 | bits64 z; | 151 | bits64 z; |
| 151 | 152 | ||
| @@ -338,12 +339,12 @@ static float64 addFloat64Sigs(float64 a, float64 b, flag zSign) | |||
| 338 | 339 | ||
| 339 | } | 340 | } |
| 340 | 341 | ||
| 341 | inline float32 packFloat32(flag zSign, int16 zExp, bits32 zSig) | 342 | float32 packFloat32(flag zSign, int16 zExp, bits32 zSig) |
| 342 | { | 343 | { |
| 343 | return (((bits32) zSign) << 31) + (((bits32) zExp) << 23) + zSig; | 344 | return (((bits32) zSign) << 31) + (((bits32) zExp) << 23) + zSig; |
| 344 | } | 345 | } |
| 345 | 346 | ||
| 346 | inline void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr) | 347 | void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr) |
| 347 | { | 348 | { |
| 348 | bits32 z; | 349 | bits32 z; |
| 349 | if (count == 0) { | 350 | if (count == 0) { |
| @@ -634,7 +635,7 @@ normalizeFloat64Subnormal(bits64 aSig, int16 * zExpPtr, bits64 * zSigPtr) | |||
| 634 | *zExpPtr = 1 - shiftCount; | 635 | *zExpPtr = 1 - shiftCount; |
| 635 | } | 636 | } |
| 636 | 637 | ||
| 637 | inline void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, | 638 | void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, |
| 638 | bits64 * z1Ptr) | 639 | bits64 * z1Ptr) |
| 639 | { | 640 | { |
| 640 | bits64 z1; | 641 | bits64 z1; |
| @@ -644,7 +645,7 @@ inline void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, | |||
| 644 | *z0Ptr = a0 + b0 + (z1 < a1); | 645 | *z0Ptr = a0 + b0 + (z1 < a1); |
| 645 | } | 646 | } |
| 646 | 647 | ||
| 647 | inline void | 648 | void |
| 648 | sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, | 649 | sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, |
| 649 | bits64 * z1Ptr) | 650 | bits64 * z1Ptr) |
| 650 | { | 651 | { |
| @@ -656,11 +657,14 @@ static bits64 estimateDiv128To64(bits64 a0, bits64 a1, bits64 b) | |||
| 656 | { | 657 | { |
| 657 | bits64 b0, b1; | 658 | bits64 b0, b1; |
| 658 | bits64 rem0, rem1, term0, term1; | 659 | bits64 rem0, rem1, term0, term1; |
| 659 | bits64 z; | 660 | bits64 z, tmp; |
| 660 | if (b <= a0) | 661 | if (b <= a0) |
| 661 | return LIT64(0xFFFFFFFFFFFFFFFF); | 662 | return LIT64(0xFFFFFFFFFFFFFFFF); |
| 662 | b0 = b >> 32; | 663 | b0 = b >> 32; |
| 663 | z = (b0 << 32 <= a0) ? LIT64(0xFFFFFFFF00000000) : (a0 / b0) << 32; | 664 | tmp = a0; |
| 665 | do_div(tmp, b0); | ||
| 666 | |||
| 667 | z = (b0 << 32 <= a0) ? LIT64(0xFFFFFFFF00000000) : tmp << 32; | ||
| 664 | mul64To128(b, z, &term0, &term1); | 668 | mul64To128(b, z, &term0, &term1); |
| 665 | sub128(a0, a1, term0, term1, &rem0, &rem1); | 669 | sub128(a0, a1, term0, term1, &rem0, &rem1); |
| 666 | while (((sbits64) rem0) < 0) { | 670 | while (((sbits64) rem0) < 0) { |
| @@ -669,11 +673,13 @@ static bits64 estimateDiv128To64(bits64 a0, bits64 a1, bits64 b) | |||
| 669 | add128(rem0, rem1, b0, b1, &rem0, &rem1); | 673 | add128(rem0, rem1, b0, b1, &rem0, &rem1); |
| 670 | } | 674 | } |
| 671 | rem0 = (rem0 << 32) | (rem1 >> 32); | 675 | rem0 = (rem0 << 32) | (rem1 >> 32); |
| 672 | z |= (b0 << 32 <= rem0) ? 0xFFFFFFFF : rem0 / b0; | 676 | tmp = rem0; |
| 677 | do_div(tmp, b0); | ||
| 678 | z |= (b0 << 32 <= rem0) ? 0xFFFFFFFF : tmp; | ||
| 673 | return z; | 679 | return z; |
| 674 | } | 680 | } |
| 675 | 681 | ||
| 676 | inline void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr) | 682 | void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr) |
| 677 | { | 683 | { |
| 678 | bits32 aHigh, aLow, bHigh, bLow; | 684 | bits32 aHigh, aLow, bHigh, bLow; |
| 679 | bits64 z0, zMiddleA, zMiddleB, z1; | 685 | bits64 z0, zMiddleA, zMiddleB, z1; |
| @@ -769,7 +775,8 @@ float32 float32_div(float32 a, float32 b) | |||
| 769 | { | 775 | { |
| 770 | flag aSign, bSign, zSign; | 776 | flag aSign, bSign, zSign; |
| 771 | int16 aExp, bExp, zExp; | 777 | int16 aExp, bExp, zExp; |
| 772 | bits32 aSig, bSig, zSig; | 778 | bits32 aSig, bSig; |
| 779 | uint64_t zSig; | ||
| 773 | 780 | ||
| 774 | aSig = extractFloat32Frac(a); | 781 | aSig = extractFloat32Frac(a); |
| 775 | aExp = extractFloat32Exp(a); | 782 | aExp = extractFloat32Exp(a); |
| @@ -804,11 +811,13 @@ float32 float32_div(float32 a, float32 b) | |||
| 804 | aSig >>= 1; | 811 | aSig >>= 1; |
| 805 | ++zExp; | 812 | ++zExp; |
| 806 | } | 813 | } |
| 807 | zSig = (((bits64) aSig) << 32) / bSig; | 814 | zSig = (((bits64) aSig) << 32); |
| 815 | do_div(zSig, bSig); | ||
| 816 | |||
| 808 | if ((zSig & 0x3F) == 0) { | 817 | if ((zSig & 0x3F) == 0) { |
| 809 | zSig |= (((bits64) bSig) * zSig != ((bits64) aSig) << 32); | 818 | zSig |= (((bits64) bSig) * zSig != ((bits64) aSig) << 32); |
| 810 | } | 819 | } |
| 811 | return roundAndPackFloat32(zSign, zExp, zSig); | 820 | return roundAndPackFloat32(zSign, zExp, (bits32)zSig); |
| 812 | 821 | ||
| 813 | } | 822 | } |
| 814 | 823 | ||
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c index db913855c2fd..0e174af21874 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c | |||
| @@ -229,7 +229,7 @@ struct frqcr_context sh7722_get_clk_context(const char *name) | |||
| 229 | } | 229 | } |
| 230 | 230 | ||
| 231 | /** | 231 | /** |
| 232 | * sh7722_find_divisors - find divisor for setting rate | 232 | * sh7722_find_div_index - find divisor for setting rate |
| 233 | * | 233 | * |
| 234 | * All sh7722 clocks use the same set of multipliers/divisors. This function | 234 | * All sh7722 clocks use the same set of multipliers/divisors. This function |
| 235 | * chooses correct divisor to set the rate of clock with parent clock that | 235 | * chooses correct divisor to set the rate of clock with parent clock that |
| @@ -238,7 +238,7 @@ struct frqcr_context sh7722_get_clk_context(const char *name) | |||
| 238 | * @parent_rate: rate of parent clock | 238 | * @parent_rate: rate of parent clock |
| 239 | * @rate: requested rate to be set | 239 | * @rate: requested rate to be set |
| 240 | */ | 240 | */ |
| 241 | static int sh7722_find_divisors(unsigned long parent_rate, unsigned rate) | 241 | static int sh7722_find_div_index(unsigned long parent_rate, unsigned rate) |
| 242 | { | 242 | { |
| 243 | unsigned div2 = parent_rate * 2 / rate; | 243 | unsigned div2 = parent_rate * 2 / rate; |
| 244 | int index; | 244 | int index; |
| @@ -247,12 +247,12 @@ static int sh7722_find_divisors(unsigned long parent_rate, unsigned rate) | |||
| 247 | return -EINVAL; | 247 | return -EINVAL; |
| 248 | 248 | ||
| 249 | for (index = 1; index < ARRAY_SIZE(divisors2); index++) { | 249 | for (index = 1; index < ARRAY_SIZE(divisors2); index++) { |
| 250 | if (div2 > divisors2[index] && div2 <= divisors2[index]) | 250 | if (div2 > divisors2[index - 1] && div2 <= divisors2[index]) |
| 251 | break; | 251 | break; |
| 252 | } | 252 | } |
| 253 | if (index >= ARRAY_SIZE(divisors2)) | 253 | if (index >= ARRAY_SIZE(divisors2)) |
| 254 | index = ARRAY_SIZE(divisors2) - 1; | 254 | index = ARRAY_SIZE(divisors2) - 1; |
| 255 | return divisors2[index]; | 255 | return index; |
| 256 | } | 256 | } |
| 257 | 257 | ||
| 258 | static void sh7722_frqcr_recalc(struct clk *clk) | 258 | static void sh7722_frqcr_recalc(struct clk *clk) |
| @@ -279,12 +279,12 @@ static int sh7722_frqcr_set_rate(struct clk *clk, unsigned long rate, | |||
| 279 | return -EINVAL; | 279 | return -EINVAL; |
| 280 | 280 | ||
| 281 | /* look for multiplier/divisor pair */ | 281 | /* look for multiplier/divisor pair */ |
| 282 | div = sh7722_find_divisors(parent_rate, rate); | 282 | div = sh7722_find_div_index(parent_rate, rate); |
| 283 | if (div<0) | 283 | if (div<0) |
| 284 | return div; | 284 | return div; |
| 285 | 285 | ||
| 286 | /* calculate new value of clock rate */ | 286 | /* calculate new value of clock rate */ |
| 287 | clk->rate = parent_rate * 2 / div; | 287 | clk->rate = parent_rate * 2 / divisors2[div]; |
| 288 | frqcr = ctrl_inl(FRQCR); | 288 | frqcr = ctrl_inl(FRQCR); |
| 289 | 289 | ||
| 290 | /* FIXME: adjust as algo_id specifies */ | 290 | /* FIXME: adjust as algo_id specifies */ |
| @@ -353,7 +353,7 @@ static int sh7722_frqcr_set_rate(struct clk *clk, unsigned long rate, | |||
| 353 | int part_div; | 353 | int part_div; |
| 354 | 354 | ||
| 355 | if (likely(!err)) { | 355 | if (likely(!err)) { |
| 356 | part_div = sh7722_find_divisors(parent_rate, | 356 | part_div = sh7722_find_div_index(parent_rate, |
| 357 | rate); | 357 | rate); |
| 358 | if (part_div > 0) { | 358 | if (part_div > 0) { |
| 359 | part_ctx = sh7722_get_clk_context( | 359 | part_ctx = sh7722_get_clk_context( |
| @@ -394,12 +394,12 @@ static long sh7722_frqcr_round_rate(struct clk *clk, unsigned long rate) | |||
| 394 | int div; | 394 | int div; |
| 395 | 395 | ||
| 396 | /* look for multiplier/divisor pair */ | 396 | /* look for multiplier/divisor pair */ |
| 397 | div = sh7722_find_divisors(parent_rate, rate); | 397 | div = sh7722_find_div_index(parent_rate, rate); |
| 398 | if (div < 0) | 398 | if (div < 0) |
| 399 | return clk->rate; | 399 | return clk->rate; |
| 400 | 400 | ||
| 401 | /* calculate new value of clock rate */ | 401 | /* calculate new value of clock rate */ |
| 402 | return parent_rate * 2 / div; | 402 | return parent_rate * 2 / divisors2[div]; |
| 403 | } | 403 | } |
| 404 | 404 | ||
| 405 | static struct clk_ops sh7722_frqcr_clk_ops = { | 405 | static struct clk_ops sh7722_frqcr_clk_ops = { |
| @@ -421,7 +421,7 @@ static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id) | |||
| 421 | int div; | 421 | int div; |
| 422 | 422 | ||
| 423 | r = ctrl_inl(clk->arch_flags); | 423 | r = ctrl_inl(clk->arch_flags); |
| 424 | div = sh7722_find_divisors(clk->parent->rate, rate); | 424 | div = sh7722_find_div_index(clk->parent->rate, rate); |
| 425 | if (div < 0) | 425 | if (div < 0) |
| 426 | return div; | 426 | return div; |
| 427 | r = (r & ~0xF) | div; | 427 | r = (r & ~0xF) | div; |
| @@ -516,16 +516,19 @@ static struct clk_ops sh7722_video_clk_ops = { | |||
| 516 | static struct clk sh7722_umem_clock = { | 516 | static struct clk sh7722_umem_clock = { |
| 517 | .name = "umem_clk", | 517 | .name = "umem_clk", |
| 518 | .ops = &sh7722_frqcr_clk_ops, | 518 | .ops = &sh7722_frqcr_clk_ops, |
| 519 | .flags = CLK_RATE_PROPAGATES, | ||
| 519 | }; | 520 | }; |
| 520 | 521 | ||
| 521 | static struct clk sh7722_sh_clock = { | 522 | static struct clk sh7722_sh_clock = { |
| 522 | .name = "sh_clk", | 523 | .name = "sh_clk", |
| 523 | .ops = &sh7722_frqcr_clk_ops, | 524 | .ops = &sh7722_frqcr_clk_ops, |
| 525 | .flags = CLK_RATE_PROPAGATES, | ||
| 524 | }; | 526 | }; |
| 525 | 527 | ||
| 526 | static struct clk sh7722_peripheral_clock = { | 528 | static struct clk sh7722_peripheral_clock = { |
| 527 | .name = "peripheral_clk", | 529 | .name = "peripheral_clk", |
| 528 | .ops = &sh7722_frqcr_clk_ops, | 530 | .ops = &sh7722_frqcr_clk_ops, |
| 531 | .flags = CLK_RATE_PROPAGATES, | ||
| 529 | }; | 532 | }; |
| 530 | 533 | ||
| 531 | static struct clk sh7722_sdram_clock = { | 534 | static struct clk sh7722_sdram_clock = { |
| @@ -533,6 +536,11 @@ static struct clk sh7722_sdram_clock = { | |||
| 533 | .ops = &sh7722_frqcr_clk_ops, | 536 | .ops = &sh7722_frqcr_clk_ops, |
| 534 | }; | 537 | }; |
| 535 | 538 | ||
| 539 | static struct clk sh7722_r_clock = { | ||
| 540 | .name = "r_clk", | ||
| 541 | .rate = 32768, | ||
| 542 | .flags = CLK_RATE_PROPAGATES, | ||
| 543 | }; | ||
| 536 | 544 | ||
| 537 | #ifndef CONFIG_CPU_SUBTYPE_SH7343 | 545 | #ifndef CONFIG_CPU_SUBTYPE_SH7343 |
| 538 | 546 | ||
| @@ -567,12 +575,30 @@ static struct clk sh7722_video_clock = { | |||
| 567 | .ops = &sh7722_video_clk_ops, | 575 | .ops = &sh7722_video_clk_ops, |
| 568 | }; | 576 | }; |
| 569 | 577 | ||
| 570 | static int sh7722_mstpcr_start_stop(struct clk *clk, unsigned long reg, | 578 | #define MSTPCR_ARCH_FLAGS(reg, bit) (((reg) << 8) | (bit)) |
| 571 | int enable) | 579 | #define MSTPCR_ARCH_FLAGS_REG(value) ((value) >> 8) |
| 580 | #define MSTPCR_ARCH_FLAGS_BIT(value) ((value) & 0xff) | ||
| 581 | |||
| 582 | static int sh7722_mstpcr_start_stop(struct clk *clk, int enable) | ||
| 572 | { | 583 | { |
| 573 | unsigned long bit = clk->arch_flags; | 584 | unsigned long bit = MSTPCR_ARCH_FLAGS_BIT(clk->arch_flags); |
| 585 | unsigned long reg; | ||
| 574 | unsigned long r; | 586 | unsigned long r; |
| 575 | 587 | ||
| 588 | switch(MSTPCR_ARCH_FLAGS_REG(clk->arch_flags)) { | ||
| 589 | case 0: | ||
| 590 | reg = MSTPCR0; | ||
| 591 | break; | ||
| 592 | case 1: | ||
| 593 | reg = MSTPCR1; | ||
| 594 | break; | ||
| 595 | case 2: | ||
| 596 | reg = MSTPCR2; | ||
| 597 | break; | ||
| 598 | default: | ||
| 599 | return -EINVAL; | ||
| 600 | } | ||
| 601 | |||
| 576 | r = ctrl_inl(reg); | 602 | r = ctrl_inl(reg); |
| 577 | 603 | ||
| 578 | if (enable) | 604 | if (enable) |
| @@ -584,96 +610,175 @@ static int sh7722_mstpcr_start_stop(struct clk *clk, unsigned long reg, | |||
| 584 | return 0; | 610 | return 0; |
| 585 | } | 611 | } |
| 586 | 612 | ||
| 587 | static void sh7722_mstpcr0_enable(struct clk *clk) | 613 | static void sh7722_mstpcr_enable(struct clk *clk) |
| 588 | { | ||
| 589 | sh7722_mstpcr_start_stop(clk, MSTPCR0, 1); | ||
| 590 | } | ||
| 591 | |||
| 592 | static void sh7722_mstpcr0_disable(struct clk *clk) | ||
| 593 | { | ||
| 594 | sh7722_mstpcr_start_stop(clk, MSTPCR0, 0); | ||
| 595 | } | ||
| 596 | |||
| 597 | static void sh7722_mstpcr1_enable(struct clk *clk) | ||
| 598 | { | ||
| 599 | sh7722_mstpcr_start_stop(clk, MSTPCR1, 1); | ||
| 600 | } | ||
| 601 | |||
| 602 | static void sh7722_mstpcr1_disable(struct clk *clk) | ||
| 603 | { | 614 | { |
| 604 | sh7722_mstpcr_start_stop(clk, MSTPCR1, 0); | 615 | sh7722_mstpcr_start_stop(clk, 1); |
| 605 | } | 616 | } |
| 606 | 617 | ||
| 607 | static void sh7722_mstpcr2_enable(struct clk *clk) | 618 | static void sh7722_mstpcr_disable(struct clk *clk) |
| 608 | { | 619 | { |
| 609 | sh7722_mstpcr_start_stop(clk, MSTPCR2, 1); | 620 | sh7722_mstpcr_start_stop(clk, 0); |
| 610 | } | 621 | } |
| 611 | 622 | ||
| 612 | static void sh7722_mstpcr2_disable(struct clk *clk) | 623 | static void sh7722_mstpcr_recalc(struct clk *clk) |
| 613 | { | 624 | { |
| 614 | sh7722_mstpcr_start_stop(clk, MSTPCR2, 0); | 625 | if (clk->parent) |
| 626 | clk->rate = clk->parent->rate; | ||
| 615 | } | 627 | } |
| 616 | 628 | ||
| 617 | static struct clk_ops sh7722_mstpcr0_clk_ops = { | 629 | static struct clk_ops sh7722_mstpcr_clk_ops = { |
| 618 | .enable = sh7722_mstpcr0_enable, | 630 | .enable = sh7722_mstpcr_enable, |
| 619 | .disable = sh7722_mstpcr0_disable, | 631 | .disable = sh7722_mstpcr_disable, |
| 620 | }; | 632 | .recalc = sh7722_mstpcr_recalc, |
| 621 | |||
| 622 | static struct clk_ops sh7722_mstpcr1_clk_ops = { | ||
| 623 | .enable = sh7722_mstpcr1_enable, | ||
| 624 | .disable = sh7722_mstpcr1_disable, | ||
| 625 | }; | 633 | }; |
| 626 | 634 | ||
| 627 | static struct clk_ops sh7722_mstpcr2_clk_ops = { | 635 | #define MSTPCR(_name, _parent, regnr, bitnr) \ |
| 628 | .enable = sh7722_mstpcr2_enable, | 636 | { \ |
| 629 | .disable = sh7722_mstpcr2_disable, | 637 | .name = _name, \ |
| 630 | }; | 638 | .arch_flags = MSTPCR_ARCH_FLAGS(regnr, bitnr), \ |
| 631 | 639 | .ops = (void *)_parent, \ | |
| 632 | #define DECLARE_MSTPCRN(regnr, bitnr, bitstr) \ | ||
| 633 | { \ | ||
| 634 | .name = "mstp" __stringify(regnr) bitstr, \ | ||
| 635 | .arch_flags = bitnr, \ | ||
| 636 | .ops = &sh7722_mstpcr ## regnr ## _clk_ops, \ | ||
| 637 | } | 640 | } |
| 638 | 641 | ||
| 639 | #define DECLARE_MSTPCR(regnr) \ | 642 | static struct clk sh7722_mstpcr_clocks[] = { |
| 640 | DECLARE_MSTPCRN(regnr, 31, "31"), \ | 643 | #if defined(CONFIG_CPU_SUBTYPE_SH7722) |
| 641 | DECLARE_MSTPCRN(regnr, 30, "30"), \ | 644 | MSTPCR("uram0", "umem_clk", 0, 28), |
| 642 | DECLARE_MSTPCRN(regnr, 29, "29"), \ | 645 | MSTPCR("xymem0", "bus_clk", 0, 26), |
| 643 | DECLARE_MSTPCRN(regnr, 28, "28"), \ | 646 | MSTPCR("tmu0", "peripheral_clk", 0, 15), |
| 644 | DECLARE_MSTPCRN(regnr, 27, "27"), \ | 647 | MSTPCR("cmt0", "r_clk", 0, 14), |
| 645 | DECLARE_MSTPCRN(regnr, 26, "26"), \ | 648 | MSTPCR("rwdt0", "r_clk", 0, 13), |
| 646 | DECLARE_MSTPCRN(regnr, 25, "25"), \ | 649 | MSTPCR("flctl0", "peripheral_clk", 0, 10), |
| 647 | DECLARE_MSTPCRN(regnr, 24, "24"), \ | 650 | MSTPCR("scif0", "peripheral_clk", 0, 7), |
| 648 | DECLARE_MSTPCRN(regnr, 23, "23"), \ | 651 | MSTPCR("scif1", "peripheral_clk", 0, 6), |
| 649 | DECLARE_MSTPCRN(regnr, 22, "22"), \ | 652 | MSTPCR("scif2", "peripheral_clk", 0, 5), |
| 650 | DECLARE_MSTPCRN(regnr, 21, "21"), \ | 653 | MSTPCR("i2c0", "peripheral_clk", 1, 9), |
| 651 | DECLARE_MSTPCRN(regnr, 20, "20"), \ | 654 | MSTPCR("rtc0", "r_clk", 1, 8), |
| 652 | DECLARE_MSTPCRN(regnr, 19, "19"), \ | 655 | MSTPCR("sdhi0", "peripheral_clk", 2, 18), |
| 653 | DECLARE_MSTPCRN(regnr, 18, "18"), \ | 656 | MSTPCR("keysc0", "r_clk", 2, 14), |
| 654 | DECLARE_MSTPCRN(regnr, 17, "17"), \ | 657 | MSTPCR("usbf0", "peripheral_clk", 2, 11), |
| 655 | DECLARE_MSTPCRN(regnr, 16, "16"), \ | 658 | MSTPCR("2dg0", "bus_clk", 2, 9), |
| 656 | DECLARE_MSTPCRN(regnr, 15, "15"), \ | 659 | MSTPCR("siu0", "bus_clk", 2, 8), |
| 657 | DECLARE_MSTPCRN(regnr, 14, "14"), \ | 660 | MSTPCR("vou0", "bus_clk", 2, 5), |
| 658 | DECLARE_MSTPCRN(regnr, 13, "13"), \ | 661 | MSTPCR("jpu0", "bus_clk", 2, 6), |
| 659 | DECLARE_MSTPCRN(regnr, 12, "12"), \ | 662 | MSTPCR("beu0", "bus_clk", 2, 4), |
| 660 | DECLARE_MSTPCRN(regnr, 11, "11"), \ | 663 | MSTPCR("ceu0", "bus_clk", 2, 3), |
| 661 | DECLARE_MSTPCRN(regnr, 10, "10"), \ | 664 | MSTPCR("veu0", "bus_clk", 2, 2), |
| 662 | DECLARE_MSTPCRN(regnr, 9, "09"), \ | 665 | MSTPCR("vpu0", "bus_clk", 2, 1), |
| 663 | DECLARE_MSTPCRN(regnr, 8, "08"), \ | 666 | MSTPCR("lcdc0", "bus_clk", 2, 0), |
| 664 | DECLARE_MSTPCRN(regnr, 7, "07"), \ | 667 | #endif |
| 665 | DECLARE_MSTPCRN(regnr, 6, "06"), \ | 668 | #if defined(CONFIG_CPU_SUBTYPE_SH7723) |
| 666 | DECLARE_MSTPCRN(regnr, 5, "05"), \ | 669 | /* See page 60 of Datasheet V1.0: Overview -> Block Diagram */ |
| 667 | DECLARE_MSTPCRN(regnr, 4, "04"), \ | 670 | MSTPCR("tlb0", "cpu_clk", 0, 31), |
| 668 | DECLARE_MSTPCRN(regnr, 3, "03"), \ | 671 | MSTPCR("ic0", "cpu_clk", 0, 30), |
| 669 | DECLARE_MSTPCRN(regnr, 2, "02"), \ | 672 | MSTPCR("oc0", "cpu_clk", 0, 29), |
| 670 | DECLARE_MSTPCRN(regnr, 1, "01"), \ | 673 | MSTPCR("l2c0", "sh_clk", 0, 28), |
| 671 | DECLARE_MSTPCRN(regnr, 0, "00") | 674 | MSTPCR("ilmem0", "cpu_clk", 0, 27), |
| 672 | 675 | MSTPCR("fpu0", "cpu_clk", 0, 24), | |
| 673 | static struct clk sh7722_mstpcr[] = { | 676 | MSTPCR("intc0", "cpu_clk", 0, 22), |
| 674 | DECLARE_MSTPCR(0), | 677 | MSTPCR("dmac0", "bus_clk", 0, 21), |
| 675 | DECLARE_MSTPCR(1), | 678 | MSTPCR("sh0", "sh_clk", 0, 20), |
| 676 | DECLARE_MSTPCR(2), | 679 | MSTPCR("hudi0", "peripheral_clk", 0, 19), |
| 680 | MSTPCR("ubc0", "cpu_clk", 0, 17), | ||
| 681 | MSTPCR("tmu0", "peripheral_clk", 0, 15), | ||
| 682 | MSTPCR("cmt0", "r_clk", 0, 14), | ||
| 683 | MSTPCR("rwdt0", "r_clk", 0, 13), | ||
| 684 | MSTPCR("dmac1", "bus_clk", 0, 12), | ||
| 685 | MSTPCR("tmu1", "peripheral_clk", 0, 11), | ||
| 686 | MSTPCR("flctl0", "peripheral_clk", 0, 10), | ||
| 687 | MSTPCR("scif0", "peripheral_clk", 0, 9), | ||
| 688 | MSTPCR("scif1", "peripheral_clk", 0, 8), | ||
| 689 | MSTPCR("scif2", "peripheral_clk", 0, 7), | ||
| 690 | MSTPCR("scif3", "bus_clk", 0, 6), | ||
| 691 | MSTPCR("scif4", "bus_clk", 0, 5), | ||
| 692 | MSTPCR("scif5", "bus_clk", 0, 4), | ||
| 693 | MSTPCR("msiof0", "bus_clk", 0, 2), | ||
| 694 | MSTPCR("msiof1", "bus_clk", 0, 1), | ||
| 695 | MSTPCR("meram0", "sh_clk", 0, 0), | ||
| 696 | MSTPCR("i2c0", "peripheral_clk", 1, 9), | ||
| 697 | MSTPCR("rtc0", "r_clk", 1, 8), | ||
| 698 | MSTPCR("atapi0", "sh_clk", 2, 28), | ||
| 699 | MSTPCR("adc0", "peripheral_clk", 2, 28), | ||
| 700 | MSTPCR("tpu0", "bus_clk", 2, 25), | ||
| 701 | MSTPCR("irda0", "peripheral_clk", 2, 24), | ||
| 702 | MSTPCR("tsif0", "bus_clk", 2, 22), | ||
| 703 | MSTPCR("icb0", "bus_clk", 2, 21), | ||
| 704 | MSTPCR("sdhi0", "bus_clk", 2, 18), | ||
| 705 | MSTPCR("sdhi1", "bus_clk", 2, 17), | ||
| 706 | MSTPCR("keysc0", "r_clk", 2, 14), | ||
| 707 | MSTPCR("usb0", "bus_clk", 2, 11), | ||
| 708 | MSTPCR("2dg0", "bus_clk", 2, 10), | ||
| 709 | MSTPCR("siu0", "bus_clk", 2, 8), | ||
| 710 | MSTPCR("veu1", "bus_clk", 2, 6), | ||
| 711 | MSTPCR("vou0", "bus_clk", 2, 5), | ||
| 712 | MSTPCR("beu0", "bus_clk", 2, 4), | ||
| 713 | MSTPCR("ceu0", "bus_clk", 2, 3), | ||
| 714 | MSTPCR("veu0", "bus_clk", 2, 2), | ||
| 715 | MSTPCR("vpu0", "bus_clk", 2, 1), | ||
| 716 | MSTPCR("lcdc0", "bus_clk", 2, 0), | ||
| 717 | #endif | ||
| 718 | #if defined(CONFIG_CPU_SUBTYPE_SH7343) | ||
| 719 | MSTPCR("uram0", "umem_clk", 0, 28), | ||
| 720 | MSTPCR("xymem0", "bus_clk", 0, 26), | ||
| 721 | MSTPCR("tmu0", "peripheral_clk", 0, 15), | ||
| 722 | MSTPCR("cmt0", "r_clk", 0, 14), | ||
| 723 | MSTPCR("rwdt0", "r_clk", 0, 13), | ||
| 724 | MSTPCR("scif0", "peripheral_clk", 0, 7), | ||
| 725 | MSTPCR("scif1", "peripheral_clk", 0, 6), | ||
| 726 | MSTPCR("scif2", "peripheral_clk", 0, 5), | ||
| 727 | MSTPCR("scif3", "peripheral_clk", 0, 4), | ||
| 728 | MSTPCR("i2c0", "peripheral_clk", 1, 9), | ||
| 729 | MSTPCR("i2c1", "peripheral_clk", 1, 8), | ||
| 730 | MSTPCR("sdhi0", "peripheral_clk", 2, 18), | ||
| 731 | MSTPCR("keysc0", "r_clk", 2, 14), | ||
| 732 | MSTPCR("usbf0", "peripheral_clk", 2, 11), | ||
| 733 | MSTPCR("siu0", "bus_clk", 2, 8), | ||
| 734 | MSTPCR("jpu0", "bus_clk", 2, 6), | ||
| 735 | MSTPCR("vou0", "bus_clk", 2, 5), | ||
| 736 | MSTPCR("beu0", "bus_clk", 2, 4), | ||
| 737 | MSTPCR("ceu0", "bus_clk", 2, 3), | ||
| 738 | MSTPCR("veu0", "bus_clk", 2, 2), | ||
| 739 | MSTPCR("vpu0", "bus_clk", 2, 1), | ||
| 740 | MSTPCR("lcdc0", "bus_clk", 2, 0), | ||
| 741 | #endif | ||
| 742 | #if defined(CONFIG_CPU_SUBTYPE_SH7366) | ||
| 743 | /* See page 52 of Datasheet V0.40: Overview -> Block Diagram */ | ||
| 744 | MSTPCR("tlb0", "cpu_clk", 0, 31), | ||
| 745 | MSTPCR("ic0", "cpu_clk", 0, 30), | ||
| 746 | MSTPCR("oc0", "cpu_clk", 0, 29), | ||
| 747 | MSTPCR("rsmem0", "sh_clk", 0, 28), | ||
| 748 | MSTPCR("xymem0", "cpu_clk", 0, 26), | ||
| 749 | MSTPCR("intc30", "peripheral_clk", 0, 23), | ||
| 750 | MSTPCR("intc0", "peripheral_clk", 0, 22), | ||
| 751 | MSTPCR("dmac0", "bus_clk", 0, 21), | ||
| 752 | MSTPCR("sh0", "sh_clk", 0, 20), | ||
| 753 | MSTPCR("hudi0", "peripheral_clk", 0, 19), | ||
| 754 | MSTPCR("ubc0", "cpu_clk", 0, 17), | ||
| 755 | MSTPCR("tmu0", "peripheral_clk", 0, 15), | ||
| 756 | MSTPCR("cmt0", "r_clk", 0, 14), | ||
| 757 | MSTPCR("rwdt0", "r_clk", 0, 13), | ||
| 758 | MSTPCR("flctl0", "peripheral_clk", 0, 10), | ||
| 759 | MSTPCR("scif0", "peripheral_clk", 0, 7), | ||
| 760 | MSTPCR("scif1", "bus_clk", 0, 6), | ||
| 761 | MSTPCR("scif2", "bus_clk", 0, 5), | ||
| 762 | MSTPCR("msiof0", "peripheral_clk", 0, 2), | ||
| 763 | MSTPCR("sbr0", "peripheral_clk", 0, 1), | ||
| 764 | MSTPCR("i2c0", "peripheral_clk", 1, 9), | ||
| 765 | MSTPCR("icb0", "bus_clk", 2, 27), | ||
| 766 | MSTPCR("meram0", "sh_clk", 2, 26), | ||
| 767 | MSTPCR("dacc0", "peripheral_clk", 2, 24), | ||
| 768 | MSTPCR("dacy0", "peripheral_clk", 2, 23), | ||
| 769 | MSTPCR("tsif0", "bus_clk", 2, 22), | ||
| 770 | MSTPCR("sdhi0", "bus_clk", 2, 18), | ||
| 771 | MSTPCR("mmcif0", "bus_clk", 2, 17), | ||
| 772 | MSTPCR("usb0", "bus_clk", 2, 11), | ||
| 773 | MSTPCR("siu0", "bus_clk", 2, 8), | ||
| 774 | MSTPCR("veu1", "bus_clk", 2, 7), | ||
| 775 | MSTPCR("vou0", "bus_clk", 2, 5), | ||
| 776 | MSTPCR("beu0", "bus_clk", 2, 4), | ||
| 777 | MSTPCR("ceu0", "bus_clk", 2, 3), | ||
| 778 | MSTPCR("veu0", "bus_clk", 2, 2), | ||
| 779 | MSTPCR("vpu0", "bus_clk", 2, 1), | ||
| 780 | MSTPCR("lcdc0", "bus_clk", 2, 0), | ||
| 781 | #endif | ||
| 677 | }; | 782 | }; |
| 678 | 783 | ||
| 679 | static struct clk *sh7722_clocks[] = { | 784 | static struct clk *sh7722_clocks[] = { |
| @@ -710,21 +815,30 @@ arch_init_clk_ops(struct clk_ops **ops, int type) | |||
| 710 | 815 | ||
| 711 | int __init arch_clk_init(void) | 816 | int __init arch_clk_init(void) |
| 712 | { | 817 | { |
| 713 | struct clk *master; | 818 | struct clk *clk; |
| 714 | int i; | 819 | int i; |
| 715 | 820 | ||
| 716 | master = clk_get(NULL, "master_clk"); | 821 | clk = clk_get(NULL, "master_clk"); |
| 717 | for (i = 0; i < ARRAY_SIZE(sh7722_clocks); i++) { | 822 | for (i = 0; i < ARRAY_SIZE(sh7722_clocks); i++) { |
| 718 | pr_debug( "Registering clock '%s'\n", sh7722_clocks[i]->name); | 823 | pr_debug( "Registering clock '%s'\n", sh7722_clocks[i]->name); |
| 719 | sh7722_clocks[i]->parent = master; | 824 | sh7722_clocks[i]->parent = clk; |
| 720 | clk_register(sh7722_clocks[i]); | 825 | clk_register(sh7722_clocks[i]); |
| 721 | } | 826 | } |
| 722 | clk_put(master); | 827 | clk_put(clk); |
| 723 | 828 | ||
| 724 | for (i = 0; i < ARRAY_SIZE(sh7722_mstpcr); i++) { | 829 | clk_register(&sh7722_r_clock); |
| 725 | pr_debug( "Registering mstpcr '%s'\n", sh7722_mstpcr[i].name); | 830 | |
| 726 | clk_register(&sh7722_mstpcr[i]); | 831 | for (i = 0; i < ARRAY_SIZE(sh7722_mstpcr_clocks); i++) { |
| 832 | pr_debug( "Registering mstpcr clock '%s'\n", | ||
| 833 | sh7722_mstpcr_clocks[i].name); | ||
| 834 | clk = clk_get(NULL, (void *) sh7722_mstpcr_clocks[i].ops); | ||
| 835 | sh7722_mstpcr_clocks[i].parent = clk; | ||
| 836 | sh7722_mstpcr_clocks[i].ops = &sh7722_mstpcr_clk_ops; | ||
| 837 | clk_register(&sh7722_mstpcr_clocks[i]); | ||
| 838 | clk_put(clk); | ||
| 727 | } | 839 | } |
| 728 | 840 | ||
| 841 | clk_recalc_rate(&sh7722_r_clock); /* make sure rate gets propagated */ | ||
| 842 | |||
| 729 | return 0; | 843 | return 0; |
| 730 | } | 844 | } |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c index 78881b4214da..0623e377f488 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c | |||
| @@ -30,6 +30,7 @@ static struct resource iic0_resources[] = { | |||
| 30 | 30 | ||
| 31 | static struct platform_device iic0_device = { | 31 | static struct platform_device iic0_device = { |
| 32 | .name = "i2c-sh_mobile", | 32 | .name = "i2c-sh_mobile", |
| 33 | .id = 0, /* "i2c0" clock */ | ||
| 33 | .num_resources = ARRAY_SIZE(iic0_resources), | 34 | .num_resources = ARRAY_SIZE(iic0_resources), |
| 34 | .resource = iic0_resources, | 35 | .resource = iic0_resources, |
| 35 | }; | 36 | }; |
| @@ -50,6 +51,7 @@ static struct resource iic1_resources[] = { | |||
| 50 | 51 | ||
| 51 | static struct platform_device iic1_device = { | 52 | static struct platform_device iic1_device = { |
| 52 | .name = "i2c-sh_mobile", | 53 | .name = "i2c-sh_mobile", |
| 54 | .id = 1, /* "i2c1" clock */ | ||
| 53 | .num_resources = ARRAY_SIZE(iic1_resources), | 55 | .num_resources = ARRAY_SIZE(iic1_resources), |
| 54 | .resource = iic1_resources, | 56 | .resource = iic1_resources, |
| 55 | }; | 57 | }; |
| @@ -115,7 +117,22 @@ static struct plat_sci_port sci_platform_data[] = { | |||
| 115 | .mapbase = 0xffe00000, | 117 | .mapbase = 0xffe00000, |
| 116 | .flags = UPF_BOOT_AUTOCONF, | 118 | .flags = UPF_BOOT_AUTOCONF, |
| 117 | .type = PORT_SCIF, | 119 | .type = PORT_SCIF, |
| 118 | .irqs = { 80, 81, 83, 82 }, | 120 | .irqs = { 80, 80, 80, 80 }, |
| 121 | }, { | ||
| 122 | .mapbase = 0xffe10000, | ||
| 123 | .flags = UPF_BOOT_AUTOCONF, | ||
| 124 | .type = PORT_SCIF, | ||
| 125 | .irqs = { 81, 81, 81, 81 }, | ||
| 126 | }, { | ||
| 127 | .mapbase = 0xffe20000, | ||
| 128 | .flags = UPF_BOOT_AUTOCONF, | ||
| 129 | .type = PORT_SCIF, | ||
| 130 | .irqs = { 82, 82, 82, 82 }, | ||
| 131 | }, { | ||
| 132 | .mapbase = 0xffe30000, | ||
| 133 | .flags = UPF_BOOT_AUTOCONF, | ||
| 134 | .type = PORT_SCIF, | ||
| 135 | .irqs = { 83, 83, 83, 83 }, | ||
| 119 | }, { | 136 | }, { |
| 120 | .flags = 0, | 137 | .flags = 0, |
| 121 | } | 138 | } |
| @@ -139,18 +156,10 @@ static struct platform_device *sh7343_devices[] __initdata = { | |||
| 139 | 156 | ||
| 140 | static int __init sh7343_devices_setup(void) | 157 | static int __init sh7343_devices_setup(void) |
| 141 | { | 158 | { |
| 142 | clk_always_enable("mstp031"); /* TLB */ | 159 | clk_always_enable("uram0"); /* URAM */ |
| 143 | clk_always_enable("mstp030"); /* IC */ | 160 | clk_always_enable("xymem0"); /* XYMEM */ |
| 144 | clk_always_enable("mstp029"); /* OC */ | 161 | clk_always_enable("veu0"); /* VEU */ |
| 145 | clk_always_enable("mstp028"); /* URAM */ | 162 | clk_always_enable("vpu0"); /* VPU */ |
| 146 | clk_always_enable("mstp026"); /* XYMEM */ | ||
| 147 | clk_always_enable("mstp023"); /* INTC3 */ | ||
| 148 | clk_always_enable("mstp022"); /* INTC */ | ||
| 149 | clk_always_enable("mstp020"); /* SuperHyway */ | ||
| 150 | clk_always_enable("mstp109"); /* I2C0 */ | ||
| 151 | clk_always_enable("mstp108"); /* I2C1 */ | ||
| 152 | clk_always_enable("mstp202"); /* VEU */ | ||
| 153 | clk_always_enable("mstp201"); /* VPU */ | ||
| 154 | 163 | ||
| 155 | platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20); | 164 | platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20); |
| 156 | platform_resource_setup_memory(&veu_device, "veu", 2 << 20); | 165 | platform_resource_setup_memory(&veu_device, "veu", 2 << 20); |
| @@ -171,7 +180,7 @@ enum { | |||
| 171 | MMC_ERR, MMC_TRAN, MMC_FSTAT, MMC_FRDY, | 180 | MMC_ERR, MMC_TRAN, MMC_FSTAT, MMC_FRDY, |
| 172 | DMAC4, DMAC5, DMAC_DADERR, | 181 | DMAC4, DMAC5, DMAC_DADERR, |
| 173 | KEYSC, | 182 | KEYSC, |
| 174 | SCIF, SCIF1, SCIF2, SCIF3, SCIF4, | 183 | SCIF, SCIF1, SCIF2, SCIF3, |
| 175 | SIOF0, SIOF1, SIO, | 184 | SIOF0, SIOF1, SIO, |
| 176 | FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, | 185 | FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, |
| 177 | I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI, | 186 | I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI, |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c index e17db39b97aa..839ae97a7fd2 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c | |||
| @@ -32,6 +32,7 @@ static struct resource iic_resources[] = { | |||
| 32 | 32 | ||
| 33 | static struct platform_device iic_device = { | 33 | static struct platform_device iic_device = { |
| 34 | .name = "i2c-sh_mobile", | 34 | .name = "i2c-sh_mobile", |
| 35 | .id = 0, /* "i2c0" clock */ | ||
| 35 | .num_resources = ARRAY_SIZE(iic_resources), | 36 | .num_resources = ARRAY_SIZE(iic_resources), |
| 36 | .resource = iic_resources, | 37 | .resource = iic_resources, |
| 37 | }; | 38 | }; |
| @@ -176,19 +177,11 @@ static struct platform_device *sh7366_devices[] __initdata = { | |||
| 176 | 177 | ||
| 177 | static int __init sh7366_devices_setup(void) | 178 | static int __init sh7366_devices_setup(void) |
| 178 | { | 179 | { |
| 179 | clk_always_enable("mstp031"); /* TLB */ | 180 | clk_always_enable("rsmem0"); /* RSMEM */ |
| 180 | clk_always_enable("mstp030"); /* IC */ | 181 | clk_always_enable("xymem0"); /* XYMEM */ |
| 181 | clk_always_enable("mstp029"); /* OC */ | 182 | clk_always_enable("veu1"); /* VEU-2 */ |
| 182 | clk_always_enable("mstp028"); /* RSMEM */ | 183 | clk_always_enable("veu0"); /* VEU-1 */ |
| 183 | clk_always_enable("mstp026"); /* XYMEM */ | 184 | clk_always_enable("vpu0"); /* VPU */ |
| 184 | clk_always_enable("mstp023"); /* INTC3 */ | ||
| 185 | clk_always_enable("mstp022"); /* INTC */ | ||
| 186 | clk_always_enable("mstp020"); /* SuperHyway */ | ||
| 187 | clk_always_enable("mstp109"); /* I2C */ | ||
| 188 | clk_always_enable("mstp211"); /* USB */ | ||
| 189 | clk_always_enable("mstp207"); /* VEU-2 */ | ||
| 190 | clk_always_enable("mstp202"); /* VEU-1 */ | ||
| 191 | clk_always_enable("mstp201"); /* VPU */ | ||
| 192 | 185 | ||
| 193 | platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20); | 186 | platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20); |
| 194 | platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20); | 187 | platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20); |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c index ef77ee1d9f53..50cf6838ec41 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c | |||
| @@ -62,7 +62,7 @@ static struct resource usbf_resources[] = { | |||
| 62 | 62 | ||
| 63 | static struct platform_device usbf_device = { | 63 | static struct platform_device usbf_device = { |
| 64 | .name = "m66592_udc", | 64 | .name = "m66592_udc", |
| 65 | .id = -1, | 65 | .id = 0, /* "usbf0" clock */ |
| 66 | .dev = { | 66 | .dev = { |
| 67 | .dma_mask = NULL, | 67 | .dma_mask = NULL, |
| 68 | .coherent_dma_mask = 0xffffffff, | 68 | .coherent_dma_mask = 0xffffffff, |
| @@ -87,6 +87,7 @@ static struct resource iic_resources[] = { | |||
| 87 | 87 | ||
| 88 | static struct platform_device iic_device = { | 88 | static struct platform_device iic_device = { |
| 89 | .name = "i2c-sh_mobile", | 89 | .name = "i2c-sh_mobile", |
| 90 | .id = 0, /* "i2c0" clock */ | ||
| 90 | .num_resources = ARRAY_SIZE(iic_resources), | 91 | .num_resources = ARRAY_SIZE(iic_resources), |
| 91 | .resource = iic_resources, | 92 | .resource = iic_resources, |
| 92 | }; | 93 | }; |
| @@ -147,6 +148,34 @@ static struct platform_device veu_device = { | |||
| 147 | .num_resources = ARRAY_SIZE(veu_resources), | 148 | .num_resources = ARRAY_SIZE(veu_resources), |
| 148 | }; | 149 | }; |
| 149 | 150 | ||
| 151 | static struct uio_info jpu_platform_data = { | ||
| 152 | .name = "JPU", | ||
| 153 | .version = "0", | ||
| 154 | .irq = 27, | ||
| 155 | }; | ||
| 156 | |||
| 157 | static struct resource jpu_resources[] = { | ||
| 158 | [0] = { | ||
| 159 | .name = "JPU", | ||
| 160 | .start = 0xfea00000, | ||
| 161 | .end = 0xfea102d0, | ||
| 162 | .flags = IORESOURCE_MEM, | ||
| 163 | }, | ||
| 164 | [1] = { | ||
| 165 | /* place holder for contiguous memory */ | ||
| 166 | }, | ||
| 167 | }; | ||
| 168 | |||
| 169 | static struct platform_device jpu_device = { | ||
| 170 | .name = "uio_pdrv_genirq", | ||
| 171 | .id = 2, | ||
| 172 | .dev = { | ||
| 173 | .platform_data = &jpu_platform_data, | ||
| 174 | }, | ||
| 175 | .resource = jpu_resources, | ||
| 176 | .num_resources = ARRAY_SIZE(jpu_resources), | ||
| 177 | }; | ||
| 178 | |||
| 150 | static struct plat_sci_port sci_platform_data[] = { | 179 | static struct plat_sci_port sci_platform_data[] = { |
| 151 | { | 180 | { |
| 152 | .mapbase = 0xffe00000, | 181 | .mapbase = 0xffe00000, |
| @@ -186,24 +215,21 @@ static struct platform_device *sh7722_devices[] __initdata = { | |||
| 186 | &sci_device, | 215 | &sci_device, |
| 187 | &vpu_device, | 216 | &vpu_device, |
| 188 | &veu_device, | 217 | &veu_device, |
| 218 | &jpu_device, | ||
| 189 | }; | 219 | }; |
| 190 | 220 | ||
| 191 | static int __init sh7722_devices_setup(void) | 221 | static int __init sh7722_devices_setup(void) |
| 192 | { | 222 | { |
| 193 | clk_always_enable("mstp031"); /* TLB */ | 223 | clk_always_enable("uram0"); /* URAM */ |
| 194 | clk_always_enable("mstp030"); /* IC */ | 224 | clk_always_enable("xymem0"); /* XYMEM */ |
| 195 | clk_always_enable("mstp029"); /* OC */ | 225 | clk_always_enable("rtc0"); /* RTC */ |
| 196 | clk_always_enable("mstp028"); /* URAM */ | 226 | clk_always_enable("veu0"); /* VEU */ |
| 197 | clk_always_enable("mstp026"); /* XYMEM */ | 227 | clk_always_enable("vpu0"); /* VPU */ |
| 198 | clk_always_enable("mstp022"); /* INTC */ | 228 | clk_always_enable("jpu0"); /* JPU */ |
| 199 | clk_always_enable("mstp020"); /* SuperHyway */ | ||
| 200 | clk_always_enable("mstp109"); /* I2C */ | ||
| 201 | clk_always_enable("mstp211"); /* USB */ | ||
| 202 | clk_always_enable("mstp202"); /* VEU */ | ||
| 203 | clk_always_enable("mstp201"); /* VPU */ | ||
| 204 | 229 | ||
| 205 | platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20); | 230 | platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20); |
| 206 | platform_resource_setup_memory(&veu_device, "veu", 2 << 20); | 231 | platform_resource_setup_memory(&veu_device, "veu", 2 << 20); |
| 232 | platform_resource_setup_memory(&jpu_device, "jpu", 2 << 20); | ||
| 207 | 233 | ||
| 208 | return platform_add_devices(sh7722_devices, | 234 | return platform_add_devices(sh7722_devices, |
| 209 | ARRAY_SIZE(sh7722_devices)); | 235 | ARRAY_SIZE(sh7722_devices)); |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c index 6d9e6972cfc9..849770d780ae 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c | |||
| @@ -215,6 +215,7 @@ static struct resource iic_resources[] = { | |||
| 215 | 215 | ||
| 216 | static struct platform_device iic_device = { | 216 | static struct platform_device iic_device = { |
| 217 | .name = "i2c-sh_mobile", | 217 | .name = "i2c-sh_mobile", |
| 218 | .id = 0, /* "i2c0" clock */ | ||
| 218 | .num_resources = ARRAY_SIZE(iic_resources), | 219 | .num_resources = ARRAY_SIZE(iic_resources), |
| 219 | .resource = iic_resources, | 220 | .resource = iic_resources, |
| 220 | }; | 221 | }; |
| @@ -231,19 +232,11 @@ static struct platform_device *sh7723_devices[] __initdata = { | |||
| 231 | 232 | ||
| 232 | static int __init sh7723_devices_setup(void) | 233 | static int __init sh7723_devices_setup(void) |
| 233 | { | 234 | { |
| 234 | clk_always_enable("mstp031"); /* TLB */ | 235 | clk_always_enable("meram0"); /* MERAM */ |
| 235 | clk_always_enable("mstp030"); /* IC */ | 236 | clk_always_enable("rtc0"); /* RTC */ |
| 236 | clk_always_enable("mstp029"); /* OC */ | 237 | clk_always_enable("veu1"); /* VEU2H1 */ |
| 237 | clk_always_enable("mstp024"); /* FPU */ | 238 | clk_always_enable("veu0"); /* VEU2H0 */ |
| 238 | clk_always_enable("mstp022"); /* INTC */ | 239 | clk_always_enable("vpu0"); /* VPU */ |
| 239 | clk_always_enable("mstp020"); /* SuperHyway */ | ||
| 240 | clk_always_enable("mstp000"); /* MERAM */ | ||
| 241 | clk_always_enable("mstp109"); /* I2C */ | ||
| 242 | clk_always_enable("mstp108"); /* RTC */ | ||
| 243 | clk_always_enable("mstp211"); /* USB */ | ||
| 244 | clk_always_enable("mstp206"); /* VEU2H1 */ | ||
| 245 | clk_always_enable("mstp202"); /* VEU2H0 */ | ||
| 246 | clk_always_enable("mstp201"); /* VPU */ | ||
| 247 | 240 | ||
| 248 | platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20); | 241 | platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20); |
| 249 | platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20); | 242 | platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20); |
diff --git a/arch/sh/kernel/debugtraps.S b/arch/sh/kernel/debugtraps.S index 13b66746410a..591741383ee6 100644 --- a/arch/sh/kernel/debugtraps.S +++ b/arch/sh/kernel/debugtraps.S | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | * | 3 | * |
| 4 | * Debug trap jump tables for SuperH | 4 | * Debug trap jump tables for SuperH |
| 5 | * | 5 | * |
| 6 | * Copyright (C) 2006 Paul Mundt | 6 | * Copyright (C) 2006 - 2008 Paul Mundt |
| 7 | * | 7 | * |
| 8 | * This file is subject to the terms and conditions of the GNU General Public | 8 | * This file is subject to the terms and conditions of the GNU General Public |
| 9 | * License. See the file "COPYING" in the main directory of this archive | 9 | * License. See the file "COPYING" in the main directory of this archive |
| @@ -12,12 +12,13 @@ | |||
| 12 | #include <linux/sys.h> | 12 | #include <linux/sys.h> |
| 13 | #include <linux/linkage.h> | 13 | #include <linux/linkage.h> |
| 14 | 14 | ||
| 15 | #if !defined(CONFIG_SH_KGDB) | 15 | #if !defined(CONFIG_KGDB) |
| 16 | #define kgdb_handle_exception debug_trap_handler | 16 | #define breakpoint_trap_handler debug_trap_handler |
| 17 | #define singlestep_trap_handler debug_trap_handler | ||
| 17 | #endif | 18 | #endif |
| 18 | 19 | ||
| 19 | #if !defined(CONFIG_SH_STANDARD_BIOS) | 20 | #if !defined(CONFIG_SH_STANDARD_BIOS) |
| 20 | #define sh_bios_handler debug_trap_handler | 21 | #define sh_bios_handler debug_trap_handler |
| 21 | #endif | 22 | #endif |
| 22 | 23 | ||
| 23 | .data | 24 | .data |
| @@ -35,7 +36,7 @@ ENTRY(debug_trap_table) | |||
| 35 | .long debug_trap_handler /* 0x39 */ | 36 | .long debug_trap_handler /* 0x39 */ |
| 36 | .long debug_trap_handler /* 0x3a */ | 37 | .long debug_trap_handler /* 0x3a */ |
| 37 | .long debug_trap_handler /* 0x3b */ | 38 | .long debug_trap_handler /* 0x3b */ |
| 38 | .long kgdb_handle_exception /* 0x3c */ | 39 | .long breakpoint_trap_handler /* 0x3c */ |
| 39 | .long debug_trap_handler /* 0x3d */ | 40 | .long singlestep_trap_handler /* 0x3d */ |
| 40 | .long bug_trap_handler /* 0x3e */ | 41 | .long bug_trap_handler /* 0x3e */ |
| 41 | .long sh_bios_handler /* 0x3f */ | 42 | .long sh_bios_handler /* 0x3f */ |
diff --git a/arch/sh/kernel/disassemble.c b/arch/sh/kernel/disassemble.c new file mode 100644 index 000000000000..64d5d8dded7c --- /dev/null +++ b/arch/sh/kernel/disassemble.c | |||
| @@ -0,0 +1,573 @@ | |||
| 1 | /* | ||
| 2 | * Disassemble SuperH instructions. | ||
| 3 | * | ||
| 4 | * Copyright (C) 1999 kaz Kojima | ||
| 5 | * Copyright (C) 2008 Paul Mundt | ||
| 6 | * | ||
| 7 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 8 | * License. See the file "COPYING" in the main directory of this archive | ||
| 9 | * for more details. | ||
| 10 | */ | ||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/string.h> | ||
| 13 | #include <linux/uaccess.h> | ||
| 14 | |||
| 15 | /* | ||
| 16 | * Format of an instruction in memory. | ||
| 17 | */ | ||
| 18 | typedef enum { | ||
| 19 | HEX_0, HEX_1, HEX_2, HEX_3, HEX_4, HEX_5, HEX_6, HEX_7, | ||
| 20 | HEX_8, HEX_9, HEX_A, HEX_B, HEX_C, HEX_D, HEX_E, HEX_F, | ||
| 21 | REG_N, REG_M, REG_NM, REG_B, | ||
| 22 | BRANCH_12, BRANCH_8, | ||
| 23 | DISP_8, DISP_4, | ||
| 24 | IMM_4, IMM_4BY2, IMM_4BY4, PCRELIMM_8BY2, PCRELIMM_8BY4, | ||
| 25 | IMM_8, IMM_8BY2, IMM_8BY4, | ||
| 26 | } sh_nibble_type; | ||
| 27 | |||
| 28 | typedef enum { | ||
| 29 | A_END, A_BDISP12, A_BDISP8, | ||
| 30 | A_DEC_M, A_DEC_N, | ||
| 31 | A_DISP_GBR, A_DISP_PC, A_DISP_REG_M, A_DISP_REG_N, | ||
| 32 | A_GBR, | ||
| 33 | A_IMM, | ||
| 34 | A_INC_M, A_INC_N, | ||
| 35 | A_IND_M, A_IND_N, A_IND_R0_REG_M, A_IND_R0_REG_N, | ||
| 36 | A_MACH, A_MACL, | ||
| 37 | A_PR, A_R0, A_R0_GBR, A_REG_M, A_REG_N, A_REG_B, | ||
| 38 | A_SR, A_VBR, A_SSR, A_SPC, A_SGR, A_DBR, | ||
| 39 | F_REG_N, F_REG_M, D_REG_N, D_REG_M, | ||
| 40 | X_REG_N, /* Only used for argument parsing */ | ||
| 41 | X_REG_M, /* Only used for argument parsing */ | ||
| 42 | DX_REG_N, DX_REG_M, V_REG_N, V_REG_M, | ||
| 43 | FD_REG_N, | ||
| 44 | XMTRX_M4, | ||
| 45 | F_FR0, | ||
| 46 | FPUL_N, FPUL_M, FPSCR_N, FPSCR_M, | ||
| 47 | } sh_arg_type; | ||
| 48 | |||
| 49 | static struct sh_opcode_info { | ||
| 50 | char *name; | ||
| 51 | sh_arg_type arg[7]; | ||
| 52 | sh_nibble_type nibbles[4]; | ||
| 53 | } sh_table[] = { | ||
| 54 | {"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM_8}}, | ||
| 55 | {"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}}, | ||
| 56 | {"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}}, | ||
| 57 | {"addv",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_F}}, | ||
| 58 | {"and",{A_IMM,A_R0},{HEX_C,HEX_9,IMM_8}}, | ||
| 59 | {"and",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_9}}, | ||
| 60 | {"and.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_D,IMM_8}}, | ||
| 61 | {"bra",{A_BDISP12},{HEX_A,BRANCH_12}}, | ||
| 62 | {"bsr",{A_BDISP12},{HEX_B,BRANCH_12}}, | ||
| 63 | {"bt",{A_BDISP8},{HEX_8,HEX_9,BRANCH_8}}, | ||
| 64 | {"bf",{A_BDISP8},{HEX_8,HEX_B,BRANCH_8}}, | ||
| 65 | {"bt.s",{A_BDISP8},{HEX_8,HEX_D,BRANCH_8}}, | ||
| 66 | {"bt/s",{A_BDISP8},{HEX_8,HEX_D,BRANCH_8}}, | ||
| 67 | {"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}}, | ||
| 68 | {"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}}, | ||
| 69 | {"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}}, | ||
| 70 | {"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}}, | ||
| 71 | {"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}}, | ||
| 72 | {"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM_8}}, | ||
| 73 | {"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}}, | ||
| 74 | {"cmp/ge",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_3}}, | ||
| 75 | {"cmp/gt",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_7}}, | ||
| 76 | {"cmp/hi",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_6}}, | ||
| 77 | {"cmp/hs",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_2}}, | ||
| 78 | {"cmp/pl",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_5}}, | ||
| 79 | {"cmp/pz",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_1}}, | ||
| 80 | {"cmp/str",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_C}}, | ||
| 81 | {"div0s",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_7}}, | ||
| 82 | {"div0u",{0},{HEX_0,HEX_0,HEX_1,HEX_9}}, | ||
| 83 | {"div1",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_4}}, | ||
| 84 | {"exts.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_E}}, | ||
| 85 | {"exts.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_F}}, | ||
| 86 | {"extu.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_C}}, | ||
| 87 | {"extu.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_D}}, | ||
| 88 | {"jmp",{A_IND_N},{HEX_4,REG_N,HEX_2,HEX_B}}, | ||
| 89 | {"jsr",{A_IND_N},{HEX_4,REG_N,HEX_0,HEX_B}}, | ||
| 90 | {"ldc",{A_REG_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_E}}, | ||
| 91 | {"ldc",{A_REG_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_E}}, | ||
| 92 | {"ldc",{A_REG_N,A_VBR},{HEX_4,REG_N,HEX_2,HEX_E}}, | ||
| 93 | {"ldc",{A_REG_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_E}}, | ||
| 94 | {"ldc",{A_REG_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_E}}, | ||
| 95 | {"ldc",{A_REG_N,A_DBR},{HEX_4,REG_N,HEX_7,HEX_E}}, | ||
| 96 | {"ldc",{A_REG_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_E}}, | ||
| 97 | {"ldc.l",{A_INC_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_7}}, | ||
| 98 | {"ldc.l",{A_INC_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_7}}, | ||
| 99 | {"ldc.l",{A_INC_N,A_VBR},{HEX_4,REG_N,HEX_2,HEX_7}}, | ||
| 100 | {"ldc.l",{A_INC_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_7}}, | ||
| 101 | {"ldc.l",{A_INC_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_7}}, | ||
| 102 | {"ldc.l",{A_INC_N,A_DBR},{HEX_4,REG_N,HEX_7,HEX_7}}, | ||
| 103 | {"ldc.l",{A_INC_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_7}}, | ||
| 104 | {"lds",{A_REG_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_A}}, | ||
| 105 | {"lds",{A_REG_N,A_MACL},{HEX_4,REG_N,HEX_1,HEX_A}}, | ||
| 106 | {"lds",{A_REG_N,A_PR},{HEX_4,REG_N,HEX_2,HEX_A}}, | ||
| 107 | {"lds",{A_REG_M,FPUL_N},{HEX_4,REG_M,HEX_5,HEX_A}}, | ||
| 108 | {"lds",{A_REG_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_A}}, | ||
| 109 | {"lds.l",{A_INC_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_6}}, | ||
| 110 | {"lds.l",{A_INC_N,A_MACL},{HEX_4,REG_N,HEX_1,HEX_6}}, | ||
| 111 | {"lds.l",{A_INC_N,A_PR},{HEX_4,REG_N,HEX_2,HEX_6}}, | ||
| 112 | {"lds.l",{A_INC_M,FPUL_N},{HEX_4,REG_M,HEX_5,HEX_6}}, | ||
| 113 | {"lds.l",{A_INC_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_6}}, | ||
| 114 | {"ldtlb",{0},{HEX_0,HEX_0,HEX_3,HEX_8}}, | ||
| 115 | {"mac.w",{A_INC_M,A_INC_N},{HEX_4,REG_N,REG_M,HEX_F}}, | ||
| 116 | {"mov",{A_IMM,A_REG_N},{HEX_E,REG_N,IMM_8}}, | ||
| 117 | {"mov",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_3}}, | ||
| 118 | {"mov.b",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_4}}, | ||
| 119 | {"mov.b",{ A_REG_M,A_DEC_N},{HEX_2,REG_N,REG_M,HEX_4}}, | ||
| 120 | {"mov.b",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_0}}, | ||
| 121 | {"mov.b",{A_DISP_REG_M,A_R0},{HEX_8,HEX_4,REG_M,IMM_4}}, | ||
| 122 | {"mov.b",{A_DISP_GBR,A_R0},{HEX_C,HEX_4,IMM_8}}, | ||
| 123 | {"mov.b",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_C}}, | ||
| 124 | {"mov.b",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_4}}, | ||
| 125 | {"mov.b",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_0}}, | ||
| 126 | {"mov.b",{A_R0,A_DISP_REG_M},{HEX_8,HEX_0,REG_M,IMM_4}}, | ||
| 127 | {"mov.b",{A_R0,A_DISP_GBR},{HEX_C,HEX_0,IMM_8}}, | ||
| 128 | {"mov.l",{ A_REG_M,A_DISP_REG_N},{HEX_1,REG_N,REG_M,IMM_4BY4}}, | ||
| 129 | {"mov.l",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_6}}, | ||
| 130 | {"mov.l",{ A_REG_M,A_DEC_N},{HEX_2,REG_N,REG_M,HEX_6}}, | ||
| 131 | {"mov.l",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_2}}, | ||
| 132 | {"mov.l",{A_DISP_REG_M,A_REG_N},{HEX_5,REG_N,REG_M,IMM_4BY4}}, | ||
| 133 | {"mov.l",{A_DISP_GBR,A_R0},{HEX_C,HEX_6,IMM_8BY4}}, | ||
| 134 | {"mov.l",{A_DISP_PC,A_REG_N},{HEX_D,REG_N,PCRELIMM_8BY4}}, | ||
| 135 | {"mov.l",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_E}}, | ||
| 136 | {"mov.l",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_6}}, | ||
| 137 | {"mov.l",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_2}}, | ||
| 138 | {"mov.l",{A_R0,A_DISP_GBR},{HEX_C,HEX_2,IMM_8BY4}}, | ||
| 139 | {"mov.w",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_5}}, | ||
| 140 | {"mov.w",{ A_REG_M,A_DEC_N},{HEX_2,REG_N,REG_M,HEX_5}}, | ||
| 141 | {"mov.w",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_1}}, | ||
| 142 | {"mov.w",{A_DISP_REG_M,A_R0},{HEX_8,HEX_5,REG_M,IMM_4BY2}}, | ||
| 143 | {"mov.w",{A_DISP_GBR,A_R0},{HEX_C,HEX_5,IMM_8BY2}}, | ||
| 144 | {"mov.w",{A_DISP_PC,A_REG_N},{HEX_9,REG_N,PCRELIMM_8BY2}}, | ||
| 145 | {"mov.w",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_D}}, | ||
| 146 | {"mov.w",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_5}}, | ||
| 147 | {"mov.w",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_1}}, | ||
| 148 | {"mov.w",{A_R0,A_DISP_REG_M},{HEX_8,HEX_1,REG_M,IMM_4BY2}}, | ||
| 149 | {"mov.w",{A_R0,A_DISP_GBR},{HEX_C,HEX_1,IMM_8BY2}}, | ||
| 150 | {"mova",{A_DISP_PC,A_R0},{HEX_C,HEX_7,PCRELIMM_8BY4}}, | ||
| 151 | {"movca.l",{A_R0,A_IND_N},{HEX_0,REG_N,HEX_C,HEX_3}}, | ||
| 152 | {"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}}, | ||
| 153 | {"muls",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}}, | ||
| 154 | {"mul.l",{ A_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_7}}, | ||
| 155 | {"mulu",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_E}}, | ||
| 156 | {"neg",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_B}}, | ||
| 157 | {"negc",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_A}}, | ||
| 158 | {"nop",{0},{HEX_0,HEX_0,HEX_0,HEX_9}}, | ||
| 159 | {"not",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_7}}, | ||
| 160 | {"ocbi",{A_IND_N},{HEX_0,REG_N,HEX_9,HEX_3}}, | ||
| 161 | {"ocbp",{A_IND_N},{HEX_0,REG_N,HEX_A,HEX_3}}, | ||
| 162 | {"ocbwb",{A_IND_N},{HEX_0,REG_N,HEX_B,HEX_3}}, | ||
| 163 | {"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM_8}}, | ||
| 164 | {"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}}, | ||
| 165 | {"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM_8}}, | ||
| 166 | {"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}}, | ||
| 167 | {"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}}, | ||
| 168 | {"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}}, | ||
| 169 | {"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}}, | ||
| 170 | {"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}}, | ||
| 171 | {"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}}, | ||
| 172 | {"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}}, | ||
| 173 | {"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}}, | ||
| 174 | {"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}}, | ||
| 175 | {"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}}, | ||
| 176 | {"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}}, | ||
| 177 | {"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}}, | ||
| 178 | {"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}}, | ||
| 179 | {"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}}, | ||
| 180 | {"shll16",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_8}}, | ||
| 181 | {"shll2",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_8}}, | ||
| 182 | {"shll8",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_8}}, | ||
| 183 | {"shlr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_1}}, | ||
| 184 | {"shlr16",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_9}}, | ||
| 185 | {"shlr2",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_9}}, | ||
| 186 | {"shlr8",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_9}}, | ||
| 187 | {"sleep",{0},{HEX_0,HEX_0,HEX_1,HEX_B}}, | ||
| 188 | {"stc",{A_SR,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_2}}, | ||
| 189 | {"stc",{A_GBR,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_2}}, | ||
| 190 | {"stc",{A_VBR,A_REG_N},{HEX_0,REG_N,HEX_2,HEX_2}}, | ||
| 191 | {"stc",{A_SSR,A_REG_N},{HEX_0,REG_N,HEX_3,HEX_2}}, | ||
| 192 | {"stc",{A_SPC,A_REG_N},{HEX_0,REG_N,HEX_4,HEX_2}}, | ||
| 193 | {"stc",{A_SGR,A_REG_N},{HEX_0,REG_N,HEX_6,HEX_2}}, | ||
| 194 | {"stc",{A_DBR,A_REG_N},{HEX_0,REG_N,HEX_7,HEX_2}}, | ||
| 195 | {"stc",{A_REG_B,A_REG_N},{HEX_0,REG_N,REG_B,HEX_2}}, | ||
| 196 | {"stc.l",{A_SR,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_3}}, | ||
| 197 | {"stc.l",{A_GBR,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_3}}, | ||
| 198 | {"stc.l",{A_VBR,A_DEC_N},{HEX_4,REG_N,HEX_2,HEX_3}}, | ||
| 199 | {"stc.l",{A_SSR,A_DEC_N},{HEX_4,REG_N,HEX_3,HEX_3}}, | ||
| 200 | {"stc.l",{A_SPC,A_DEC_N},{HEX_4,REG_N,HEX_4,HEX_3}}, | ||
| 201 | {"stc.l",{A_SGR,A_DEC_N},{HEX_4,REG_N,HEX_6,HEX_3}}, | ||
| 202 | {"stc.l",{A_DBR,A_DEC_N},{HEX_4,REG_N,HEX_7,HEX_3}}, | ||
| 203 | {"stc.l",{A_REG_B,A_DEC_N},{HEX_4,REG_N,REG_B,HEX_3}}, | ||
| 204 | {"sts",{A_MACH,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_A}}, | ||
| 205 | {"sts",{A_MACL,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_A}}, | ||
| 206 | {"sts",{A_PR,A_REG_N},{HEX_0,REG_N,HEX_2,HEX_A}}, | ||
| 207 | {"sts",{FPUL_M,A_REG_N},{HEX_0,REG_N,HEX_5,HEX_A}}, | ||
| 208 | {"sts",{FPSCR_M,A_REG_N},{HEX_0,REG_N,HEX_6,HEX_A}}, | ||
| 209 | {"sts.l",{A_MACH,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_2}}, | ||
| 210 | {"sts.l",{A_MACL,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_2}}, | ||
| 211 | {"sts.l",{A_PR,A_DEC_N},{HEX_4,REG_N,HEX_2,HEX_2}}, | ||
| 212 | {"sts.l",{FPUL_M,A_DEC_N},{HEX_4,REG_N,HEX_5,HEX_2}}, | ||
| 213 | {"sts.l",{FPSCR_M,A_DEC_N},{HEX_4,REG_N,HEX_6,HEX_2}}, | ||
| 214 | {"sub",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_8}}, | ||
| 215 | {"subc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_A}}, | ||
| 216 | {"subv",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_B}}, | ||
| 217 | {"swap.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_8}}, | ||
| 218 | {"swap.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_9}}, | ||
| 219 | {"tas.b",{A_IND_N},{HEX_4,REG_N,HEX_1,HEX_B}}, | ||
| 220 | {"trapa",{A_IMM},{HEX_C,HEX_3,IMM_8}}, | ||
| 221 | {"tst",{A_IMM,A_R0},{HEX_C,HEX_8,IMM_8}}, | ||
| 222 | {"tst",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_8}}, | ||
| 223 | {"tst.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_C,IMM_8}}, | ||
| 224 | {"xor",{A_IMM,A_R0},{HEX_C,HEX_A,IMM_8}}, | ||
| 225 | {"xor",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_A}}, | ||
| 226 | {"xor.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_E,IMM_8}}, | ||
| 227 | {"xtrct",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_D}}, | ||
| 228 | {"mul.l",{ A_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_7}}, | ||
| 229 | {"dt",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_0}}, | ||
| 230 | {"dmuls.l",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_D}}, | ||
| 231 | {"dmulu.l",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_5}}, | ||
| 232 | {"mac.l",{A_INC_M,A_INC_N},{HEX_0,REG_N,REG_M,HEX_F}}, | ||
| 233 | {"braf",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_3}}, | ||
| 234 | {"bsrf",{A_REG_N},{HEX_0,REG_N,HEX_0,HEX_3}}, | ||
| 235 | {"fabs",{FD_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}}, | ||
| 236 | {"fadd",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_0}}, | ||
| 237 | {"fadd",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_0}}, | ||
| 238 | {"fcmp/eq",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_4}}, | ||
| 239 | {"fcmp/eq",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_4}}, | ||
| 240 | {"fcmp/gt",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_5}}, | ||
| 241 | {"fcmp/gt",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_5}}, | ||
| 242 | {"fcnvds",{D_REG_N,FPUL_M},{HEX_F,REG_N,HEX_B,HEX_D}}, | ||
| 243 | {"fcnvsd",{FPUL_M,D_REG_N},{HEX_F,REG_N,HEX_A,HEX_D}}, | ||
| 244 | {"fdiv",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_3}}, | ||
| 245 | {"fdiv",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_3}}, | ||
| 246 | {"fipr",{V_REG_M,V_REG_N},{HEX_F,REG_NM,HEX_E,HEX_D}}, | ||
| 247 | {"fldi0",{F_REG_N},{HEX_F,REG_N,HEX_8,HEX_D}}, | ||
| 248 | {"fldi1",{F_REG_N},{HEX_F,REG_N,HEX_9,HEX_D}}, | ||
| 249 | {"flds",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_1,HEX_D}}, | ||
| 250 | {"float",{FPUL_M,FD_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}}, | ||
| 251 | {"fmac",{F_FR0,F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_E}}, | ||
| 252 | {"fmov",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_C}}, | ||
| 253 | {"fmov",{DX_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_C}}, | ||
| 254 | {"fmov",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}}, | ||
| 255 | {"fmov",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}}, | ||
| 256 | {"fmov",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}}, | ||
| 257 | {"fmov",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}}, | ||
| 258 | {"fmov",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}}, | ||
| 259 | {"fmov",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}}, | ||
| 260 | {"fmov",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}}, | ||
| 261 | {"fmov",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}}, | ||
| 262 | {"fmov",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}}, | ||
| 263 | {"fmov",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}}, | ||
| 264 | {"fmov",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}}, | ||
| 265 | {"fmov",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}}, | ||
| 266 | {"fmov.d",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}}, | ||
| 267 | {"fmov.d",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}}, | ||
| 268 | {"fmov.d",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}}, | ||
| 269 | {"fmov.d",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}}, | ||
| 270 | {"fmov.d",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}}, | ||
| 271 | {"fmov.d",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}}, | ||
| 272 | {"fmov.s",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}}, | ||
| 273 | {"fmov.s",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}}, | ||
| 274 | {"fmov.s",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}}, | ||
| 275 | {"fmov.s",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}}, | ||
| 276 | {"fmov.s",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}}, | ||
| 277 | {"fmov.s",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}}, | ||
| 278 | {"fmul",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_2}}, | ||
| 279 | {"fmul",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_2}}, | ||
| 280 | {"fneg",{FD_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}}, | ||
| 281 | {"frchg",{0},{HEX_F,HEX_B,HEX_F,HEX_D}}, | ||
| 282 | {"fschg",{0},{HEX_F,HEX_3,HEX_F,HEX_D}}, | ||
| 283 | {"fsqrt",{FD_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}}, | ||
| 284 | {"fsts",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_0,HEX_D}}, | ||
| 285 | {"fsub",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_1}}, | ||
| 286 | {"fsub",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_1}}, | ||
| 287 | {"ftrc",{FD_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}}, | ||
| 288 | {"ftrv",{XMTRX_M4,V_REG_N},{HEX_F,REG_NM,HEX_F,HEX_D}}, | ||
| 289 | { 0 }, | ||
| 290 | }; | ||
| 291 | |||
| 292 | static void print_sh_insn(u32 memaddr, u16 insn) | ||
| 293 | { | ||
| 294 | int relmask = ~0; | ||
| 295 | int nibs[4] = { (insn >> 12) & 0xf, (insn >> 8) & 0xf, (insn >> 4) & 0xf, insn & 0xf}; | ||
| 296 | int lastsp; | ||
| 297 | struct sh_opcode_info *op = sh_table; | ||
| 298 | |||
| 299 | for (; op->name; op++) { | ||
| 300 | int n; | ||
| 301 | int imm = 0; | ||
| 302 | int rn = 0; | ||
| 303 | int rm = 0; | ||
| 304 | int rb = 0; | ||
| 305 | int disp_pc; | ||
| 306 | int disp_pc_addr = 0; | ||
| 307 | |||
| 308 | for (n = 0; n < 4; n++) { | ||
| 309 | int i = op->nibbles[n]; | ||
| 310 | |||
| 311 | if (i < 16) { | ||
| 312 | if (nibs[n] == i) | ||
| 313 | continue; | ||
| 314 | goto fail; | ||
| 315 | } | ||
| 316 | switch (i) { | ||
| 317 | case BRANCH_8: | ||
| 318 | imm = (nibs[2] << 4) | (nibs[3]); | ||
| 319 | if (imm & 0x80) | ||
| 320 | imm |= ~0xff; | ||
| 321 | imm = ((char)imm) * 2 + 4 ; | ||
| 322 | goto ok; | ||
| 323 | case BRANCH_12: | ||
| 324 | imm = ((nibs[1]) << 8) | (nibs[2] << 4) | (nibs[3]); | ||
| 325 | if (imm & 0x800) | ||
| 326 | imm |= ~0xfff; | ||
| 327 | imm = imm * 2 + 4; | ||
| 328 | goto ok; | ||
| 329 | case IMM_4: | ||
| 330 | imm = nibs[3]; | ||
| 331 | goto ok; | ||
| 332 | case IMM_4BY2: | ||
| 333 | imm = nibs[3] <<1; | ||
| 334 | goto ok; | ||
| 335 | case IMM_4BY4: | ||
| 336 | imm = nibs[3] <<2; | ||
| 337 | goto ok; | ||
| 338 | case IMM_8: | ||
| 339 | imm = (nibs[2] << 4) | nibs[3]; | ||
| 340 | goto ok; | ||
| 341 | case PCRELIMM_8BY2: | ||
| 342 | imm = ((nibs[2] << 4) | nibs[3]) <<1; | ||
| 343 | relmask = ~1; | ||
| 344 | goto ok; | ||
| 345 | case PCRELIMM_8BY4: | ||
| 346 | imm = ((nibs[2] << 4) | nibs[3]) <<2; | ||
| 347 | relmask = ~3; | ||
| 348 | goto ok; | ||
| 349 | case IMM_8BY2: | ||
| 350 | imm = ((nibs[2] << 4) | nibs[3]) <<1; | ||
| 351 | goto ok; | ||
| 352 | case IMM_8BY4: | ||
| 353 | imm = ((nibs[2] << 4) | nibs[3]) <<2; | ||
| 354 | goto ok; | ||
| 355 | case DISP_8: | ||
| 356 | imm = (nibs[2] << 4) | (nibs[3]); | ||
| 357 | goto ok; | ||
| 358 | case DISP_4: | ||
| 359 | imm = nibs[3]; | ||
| 360 | goto ok; | ||
| 361 | case REG_N: | ||
| 362 | rn = nibs[n]; | ||
| 363 | break; | ||
| 364 | case REG_M: | ||
| 365 | rm = nibs[n]; | ||
| 366 | break; | ||
| 367 | case REG_NM: | ||
| 368 | rn = (nibs[n] & 0xc) >> 2; | ||
| 369 | rm = (nibs[n] & 0x3); | ||
| 370 | break; | ||
| 371 | case REG_B: | ||
| 372 | rb = nibs[n] & 0x07; | ||
| 373 | break; | ||
| 374 | default: | ||
| 375 | return; | ||
| 376 | } | ||
| 377 | } | ||
| 378 | |||
| 379 | ok: | ||
| 380 | printk("%-8s ", op->name); | ||
| 381 | lastsp = (op->arg[0] == A_END); | ||
| 382 | disp_pc = 0; | ||
| 383 | for (n = 0; n < 6 && op->arg[n] != A_END; n++) { | ||
| 384 | if (n && op->arg[1] != A_END) | ||
| 385 | printk(", "); | ||
| 386 | switch (op->arg[n]) { | ||
| 387 | case A_IMM: | ||
| 388 | printk("#%d", (char)(imm)); | ||
| 389 | break; | ||
| 390 | case A_R0: | ||
| 391 | printk("r0"); | ||
| 392 | break; | ||
| 393 | case A_REG_N: | ||
| 394 | printk("r%d", rn); | ||
| 395 | break; | ||
| 396 | case A_INC_N: | ||
| 397 | printk("@r%d+", rn); | ||
| 398 | break; | ||
| 399 | case A_DEC_N: | ||
| 400 | printk("@-r%d", rn); | ||
| 401 | break; | ||
| 402 | case A_IND_N: | ||
| 403 | printk("@r%d", rn); | ||
| 404 | break; | ||
| 405 | case A_DISP_REG_N: | ||
| 406 | printk("@(%d,r%d)", imm, rn); | ||
| 407 | break; | ||
| 408 | case A_REG_M: | ||
| 409 | printk("r%d", rm); | ||
| 410 | break; | ||
| 411 | case A_INC_M: | ||
| 412 | printk("@r%d+", rm); | ||
| 413 | break; | ||
| 414 | case A_DEC_M: | ||
| 415 | printk("@-r%d", rm); | ||
| 416 | break; | ||
| 417 | case A_IND_M: | ||
| 418 | printk("@r%d", rm); | ||
| 419 | break; | ||
| 420 | case A_DISP_REG_M: | ||
| 421 | printk("@(%d,r%d)", imm, rm); | ||
| 422 | break; | ||
| 423 | case A_REG_B: | ||
| 424 | printk("r%d_bank", rb); | ||
| 425 | break; | ||
| 426 | case A_DISP_PC: | ||
| 427 | disp_pc = 1; | ||
| 428 | disp_pc_addr = imm + 4 + (memaddr & relmask); | ||
| 429 | printk("%08x <%pS>", disp_pc_addr, | ||
| 430 | (void *)disp_pc_addr); | ||
| 431 | break; | ||
| 432 | case A_IND_R0_REG_N: | ||
| 433 | printk("@(r0,r%d)", rn); | ||
| 434 | break; | ||
| 435 | case A_IND_R0_REG_M: | ||
| 436 | printk("@(r0,r%d)", rm); | ||
| 437 | break; | ||
| 438 | case A_DISP_GBR: | ||
| 439 | printk("@(%d,gbr)",imm); | ||
| 440 | break; | ||
| 441 | case A_R0_GBR: | ||
| 442 | printk("@(r0,gbr)"); | ||
| 443 | break; | ||
| 444 | case A_BDISP12: | ||
| 445 | case A_BDISP8: | ||
| 446 | printk("%08x", imm + memaddr); | ||
| 447 | break; | ||
| 448 | case A_SR: | ||
| 449 | printk("sr"); | ||
| 450 | break; | ||
| 451 | case A_GBR: | ||
| 452 | printk("gbr"); | ||
| 453 | break; | ||
| 454 | case A_VBR: | ||
| 455 | printk("vbr"); | ||
| 456 | break; | ||
| 457 | case A_SSR: | ||
| 458 | printk("ssr"); | ||
| 459 | break; | ||
| 460 | case A_SPC: | ||
| 461 | printk("spc"); | ||
| 462 | break; | ||
| 463 | case A_MACH: | ||
| 464 | printk("mach"); | ||
| 465 | break; | ||
| 466 | case A_MACL: | ||
| 467 | printk("macl"); | ||
| 468 | break; | ||
| 469 | case A_PR: | ||
| 470 | printk("pr"); | ||
| 471 | break; | ||
| 472 | case A_SGR: | ||
| 473 | printk("sgr"); | ||
| 474 | break; | ||
| 475 | case A_DBR: | ||
| 476 | printk("dbr"); | ||
| 477 | break; | ||
| 478 | case FD_REG_N: | ||
| 479 | if (0) | ||
| 480 | goto d_reg_n; | ||
| 481 | case F_REG_N: | ||
| 482 | printk("fr%d", rn); | ||
| 483 | break; | ||
| 484 | case F_REG_M: | ||
| 485 | printk("fr%d", rm); | ||
| 486 | break; | ||
| 487 | case DX_REG_N: | ||
| 488 | if (rn & 1) { | ||
| 489 | printk("xd%d", rn & ~1); | ||
| 490 | break; | ||
| 491 | } | ||
| 492 | d_reg_n: | ||
| 493 | case D_REG_N: | ||
| 494 | printk("dr%d", rn); | ||
| 495 | break; | ||
| 496 | case DX_REG_M: | ||
| 497 | if (rm & 1) { | ||
| 498 | printk("xd%d", rm & ~1); | ||
| 499 | break; | ||
| 500 | } | ||
| 501 | case D_REG_M: | ||
| 502 | printk("dr%d", rm); | ||
| 503 | break; | ||
| 504 | case FPSCR_M: | ||
| 505 | case FPSCR_N: | ||
| 506 | printk("fpscr"); | ||
| 507 | break; | ||
| 508 | case FPUL_M: | ||
| 509 | case FPUL_N: | ||
| 510 | printk("fpul"); | ||
| 511 | break; | ||
| 512 | case F_FR0: | ||
| 513 | printk("fr0"); | ||
| 514 | break; | ||
| 515 | case V_REG_N: | ||
| 516 | printk("fv%d", rn*4); | ||
| 517 | break; | ||
| 518 | case V_REG_M: | ||
| 519 | printk("fv%d", rm*4); | ||
| 520 | break; | ||
| 521 | case XMTRX_M4: | ||
| 522 | printk("xmtrx"); | ||
| 523 | break; | ||
| 524 | default: | ||
| 525 | return; | ||
| 526 | } | ||
| 527 | } | ||
| 528 | |||
| 529 | if (disp_pc && strcmp(op->name, "mova") != 0) { | ||
| 530 | u32 val; | ||
| 531 | |||
| 532 | if (relmask == ~1) | ||
| 533 | __get_user(val, (u16 *)disp_pc_addr); | ||
| 534 | else | ||
| 535 | __get_user(val, (u32 *)disp_pc_addr); | ||
| 536 | |||
| 537 | printk(" ! %08x <%pS>", val, (void *)val); | ||
| 538 | } | ||
| 539 | |||
| 540 | return; | ||
| 541 | fail: | ||
| 542 | ; | ||
| 543 | |||
| 544 | } | ||
| 545 | |||
| 546 | printk(".word 0x%x%x%x%x", nibs[0], nibs[1], nibs[2], nibs[3]); | ||
| 547 | } | ||
| 548 | |||
| 549 | void show_code(struct pt_regs *regs) | ||
| 550 | { | ||
| 551 | unsigned short *pc = (unsigned short *)regs->pc; | ||
| 552 | long i; | ||
| 553 | |||
| 554 | if (regs->pc & 0x1) | ||
| 555 | return; | ||
| 556 | |||
| 557 | printk("Code:\n"); | ||
| 558 | |||
| 559 | for (i = -3 ; i < 6 ; i++) { | ||
| 560 | unsigned short insn; | ||
| 561 | |||
| 562 | if (__get_user(insn, pc + i)) { | ||
| 563 | printk(" (Bad address in pc)\n"); | ||
| 564 | break; | ||
| 565 | } | ||
| 566 | |||
| 567 | printk("%s%08lx: ", (i ? " ": "->"), (unsigned long)(pc + i)); | ||
| 568 | print_sh_insn((unsigned long)(pc + i), insn); | ||
| 569 | printk("\n"); | ||
| 570 | } | ||
| 571 | |||
| 572 | printk("\n"); | ||
| 573 | } | ||
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S index 5b7efc4016fa..d62359cfbbe2 100644 --- a/arch/sh/kernel/entry-common.S +++ b/arch/sh/kernel/entry-common.S | |||
| @@ -308,15 +308,19 @@ ENTRY(system_call) | |||
| 308 | mov.l 1f, r9 | 308 | mov.l 1f, r9 |
| 309 | mov.l @r9, r8 ! Read from TRA (Trap Address) Register | 309 | mov.l @r9, r8 ! Read from TRA (Trap Address) Register |
| 310 | #endif | 310 | #endif |
| 311 | |||
| 312 | mov #OFF_TRA, r10 | ||
| 313 | add r15, r10 | ||
| 314 | mov.l r8, @r10 ! set TRA value to tra | ||
| 315 | |||
| 311 | /* | 316 | /* |
| 312 | * Check the trap type | 317 | * Check the trap type |
| 313 | */ | 318 | */ |
| 314 | mov #((0x20 << 2) - 1), r9 | 319 | mov #((0x20 << 2) - 1), r9 |
| 315 | cmp/hi r9, r8 | 320 | cmp/hi r9, r8 |
| 316 | bt/s debug_trap ! it's a debug trap.. | 321 | bt/s debug_trap ! it's a debug trap.. |
| 317 | mov #OFF_TRA, r9 | 322 | nop |
| 318 | add r15, r9 | 323 | |
| 319 | mov.l r8, @r9 ! set TRA value to tra | ||
| 320 | #ifdef CONFIG_TRACE_IRQFLAGS | 324 | #ifdef CONFIG_TRACE_IRQFLAGS |
| 321 | mov.l 5f, r10 | 325 | mov.l 5f, r10 |
| 322 | jsr @r10 | 326 | jsr @r10 |
| @@ -371,47 +375,3 @@ syscall_exit: | |||
| 371 | #endif | 375 | #endif |
| 372 | 7: .long do_syscall_trace_enter | 376 | 7: .long do_syscall_trace_enter |
| 373 | 8: .long do_syscall_trace_leave | 377 | 8: .long do_syscall_trace_leave |
| 374 | |||
| 375 | #ifdef CONFIG_FUNCTION_TRACER | ||
| 376 | .align 2 | ||
| 377 | .globl _mcount | ||
| 378 | .type _mcount,@function | ||
| 379 | .globl mcount | ||
| 380 | .type mcount,@function | ||
| 381 | _mcount: | ||
| 382 | mcount: | ||
| 383 | mov.l r4, @-r15 | ||
| 384 | mov.l r5, @-r15 | ||
| 385 | mov.l r6, @-r15 | ||
| 386 | mov.l r7, @-r15 | ||
| 387 | sts.l pr, @-r15 | ||
| 388 | |||
| 389 | mov.l @(20,r15),r4 | ||
| 390 | sts pr, r5 | ||
| 391 | |||
| 392 | mov.l 1f, r6 | ||
| 393 | mov.l ftrace_stub, r7 | ||
| 394 | cmp/eq r6, r7 | ||
| 395 | bt skip_trace | ||
| 396 | |||
| 397 | mov.l @r6, r6 | ||
| 398 | jsr @r6 | ||
| 399 | nop | ||
| 400 | |||
| 401 | skip_trace: | ||
| 402 | |||
| 403 | lds.l @r15+, pr | ||
| 404 | mov.l @r15+, r7 | ||
| 405 | mov.l @r15+, r6 | ||
| 406 | mov.l @r15+, r5 | ||
| 407 | rts | ||
| 408 | mov.l @r15+, r4 | ||
| 409 | |||
| 410 | .align 2 | ||
| 411 | 1: .long ftrace_trace_function | ||
| 412 | |||
| 413 | .globl ftrace_stub | ||
| 414 | ftrace_stub: | ||
| 415 | rts | ||
| 416 | nop | ||
| 417 | #endif /* CONFIG_FUNCTION_TRACER */ | ||
diff --git a/arch/sh/kernel/ftrace.c b/arch/sh/kernel/ftrace.c new file mode 100644 index 000000000000..4c3247477aa3 --- /dev/null +++ b/arch/sh/kernel/ftrace.c | |||
| @@ -0,0 +1,133 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2008 Matt Fleming <mjf@gentoo.org> | ||
| 3 | * Copyright (C) 2008 Paul Mundt <lethal@linux-sh.org> | ||
| 4 | * | ||
| 5 | * Code for replacing ftrace calls with jumps. | ||
| 6 | * | ||
| 7 | * Copyright (C) 2007-2008 Steven Rostedt <srostedt@redhat.com> | ||
| 8 | * | ||
| 9 | * Thanks goes to Ingo Molnar, for suggesting the idea. | ||
| 10 | * Mathieu Desnoyers, for suggesting postponing the modifications. | ||
| 11 | * Arjan van de Ven, for keeping me straight, and explaining to me | ||
| 12 | * the dangers of modifying code on the run. | ||
| 13 | */ | ||
| 14 | #include <linux/uaccess.h> | ||
| 15 | #include <linux/ftrace.h> | ||
| 16 | #include <linux/string.h> | ||
| 17 | #include <linux/init.h> | ||
| 18 | #include <linux/io.h> | ||
| 19 | #include <asm/ftrace.h> | ||
| 20 | #include <asm/cacheflush.h> | ||
| 21 | |||
| 22 | static unsigned char ftrace_nop[] = { | ||
| 23 | 0x09, 0x00, /* nop */ | ||
| 24 | 0x09, 0x00, /* nop */ | ||
| 25 | }; | ||
| 26 | |||
| 27 | static unsigned char ftrace_replaced_code[MCOUNT_INSN_SIZE]; | ||
| 28 | |||
| 29 | unsigned char *ftrace_nop_replace(void) | ||
| 30 | { | ||
| 31 | return ftrace_nop; | ||
| 32 | } | ||
| 33 | |||
| 34 | static int is_sh_nop(unsigned char *ip) | ||
| 35 | { | ||
| 36 | return strncmp(ip, ftrace_nop, sizeof(ftrace_nop)); | ||
| 37 | } | ||
| 38 | |||
| 39 | unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr) | ||
| 40 | { | ||
| 41 | /* Place the address in the memory table. */ | ||
| 42 | if (addr == CALLER_ADDR) | ||
| 43 | __raw_writel(addr + MCOUNT_INSN_OFFSET, ftrace_replaced_code); | ||
| 44 | else | ||
| 45 | __raw_writel(addr, ftrace_replaced_code); | ||
| 46 | |||
| 47 | /* | ||
| 48 | * No locking needed, this must be called via kstop_machine | ||
| 49 | * which in essence is like running on a uniprocessor machine. | ||
| 50 | */ | ||
| 51 | return ftrace_replaced_code; | ||
| 52 | } | ||
| 53 | |||
| 54 | int ftrace_modify_code(unsigned long ip, unsigned char *old_code, | ||
| 55 | unsigned char *new_code) | ||
| 56 | { | ||
| 57 | unsigned char replaced[MCOUNT_INSN_SIZE]; | ||
| 58 | |||
| 59 | /* | ||
| 60 | * Note: Due to modules and __init, code can | ||
| 61 | * disappear and change, we need to protect against faulting | ||
| 62 | * as well as code changing. We do this by using the | ||
| 63 | * probe_kernel_* functions. | ||
| 64 | * | ||
| 65 | * No real locking needed, this code is run through | ||
| 66 | * kstop_machine, or before SMP starts. | ||
| 67 | */ | ||
| 68 | |||
| 69 | /* | ||
| 70 | * If we're trying to nop out a call to a function, we instead | ||
| 71 | * place a call to the address after the memory table. | ||
| 72 | */ | ||
| 73 | if (is_sh_nop(new_code) == 0) | ||
| 74 | __raw_writel(ip + MCOUNT_INSN_SIZE, (unsigned long)new_code); | ||
| 75 | |||
| 76 | /* read the text we want to modify */ | ||
| 77 | if (probe_kernel_read(replaced, (void *)ip, MCOUNT_INSN_SIZE)) | ||
| 78 | return -EFAULT; | ||
| 79 | |||
| 80 | /* Make sure it is what we expect it to be */ | ||
| 81 | if (memcmp(replaced, old_code, MCOUNT_INSN_SIZE) != 0) | ||
| 82 | return -EINVAL; | ||
| 83 | |||
| 84 | /* replace the text with the new text */ | ||
| 85 | if (probe_kernel_write((void *)ip, new_code, MCOUNT_INSN_SIZE)) | ||
| 86 | return -EPERM; | ||
| 87 | |||
| 88 | flush_icache_range(ip, ip + MCOUNT_INSN_SIZE); | ||
| 89 | |||
| 90 | return 0; | ||
| 91 | } | ||
| 92 | |||
| 93 | int ftrace_update_ftrace_func(ftrace_func_t func) | ||
| 94 | { | ||
| 95 | unsigned long ip = (unsigned long)(&ftrace_call); | ||
| 96 | unsigned char old[MCOUNT_INSN_SIZE], *new; | ||
| 97 | |||
| 98 | memcpy(old, (unsigned char *)(ip + MCOUNT_INSN_OFFSET), MCOUNT_INSN_SIZE); | ||
| 99 | new = ftrace_call_replace(ip, (unsigned long)func); | ||
| 100 | |||
| 101 | return ftrace_modify_code(ip + MCOUNT_INSN_OFFSET, old, new); | ||
| 102 | } | ||
| 103 | |||
| 104 | int ftrace_make_nop(struct module *mod, | ||
| 105 | struct dyn_ftrace *rec, unsigned long addr) | ||
| 106 | { | ||
| 107 | unsigned char *new, *old; | ||
| 108 | unsigned long ip = rec->ip; | ||
| 109 | |||
| 110 | old = ftrace_call_replace(ip, addr); | ||
| 111 | new = ftrace_nop_replace(); | ||
| 112 | |||
| 113 | return ftrace_modify_code(rec->ip, old, new); | ||
| 114 | } | ||
| 115 | |||
| 116 | int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) | ||
| 117 | { | ||
| 118 | unsigned char *new, *old; | ||
| 119 | unsigned long ip = rec->ip; | ||
| 120 | |||
| 121 | old = ftrace_nop_replace(); | ||
| 122 | new = ftrace_call_replace(ip, addr); | ||
| 123 | |||
| 124 | return ftrace_modify_code(rec->ip, old, new); | ||
| 125 | } | ||
| 126 | |||
| 127 | int __init ftrace_dyn_arch_init(void *data) | ||
| 128 | { | ||
| 129 | /* The return code is retured via data */ | ||
| 130 | __raw_writel(0, (unsigned long)data); | ||
| 131 | |||
| 132 | return 0; | ||
| 133 | } | ||
diff --git a/arch/sh/kernel/head_32.S b/arch/sh/kernel/head_32.S index ae0a382a82eb..788605ff7088 100644 --- a/arch/sh/kernel/head_32.S +++ b/arch/sh/kernel/head_32.S | |||
| @@ -80,8 +80,14 @@ ENTRY(_stext) | |||
| 80 | mov.l 7f, r0 | 80 | mov.l 7f, r0 |
| 81 | ldc r0, r7_bank ! ... and initial thread_info | 81 | ldc r0, r7_bank ! ... and initial thread_info |
| 82 | #endif | 82 | #endif |
| 83 | 83 | ||
| 84 | ! Clear BSS area | 84 | #ifndef CONFIG_SH_NO_BSS_INIT |
| 85 | /* | ||
| 86 | * Don't clear BSS if running on slow platforms such as an RTL simulation, | ||
| 87 | * remote memory via SHdebug link, etc. For these the memory can be guaranteed | ||
| 88 | * to be all zero on boot anyway. | ||
| 89 | */ | ||
| 90 | ! Clear BSS area | ||
| 85 | #ifdef CONFIG_SMP | 91 | #ifdef CONFIG_SMP |
| 86 | mov.l 3f, r0 | 92 | mov.l 3f, r0 |
| 87 | cmp/eq #0, r0 ! skip clear if set to zero | 93 | cmp/eq #0, r0 ! skip clear if set to zero |
| @@ -97,6 +103,8 @@ ENTRY(_stext) | |||
| 97 | mov.l r0,@-r2 | 103 | mov.l r0,@-r2 |
| 98 | 104 | ||
| 99 | 10: | 105 | 10: |
| 106 | #endif | ||
| 107 | |||
| 100 | ! Additional CPU initialization | 108 | ! Additional CPU initialization |
| 101 | mov.l 6f, r0 | 109 | mov.l 6f, r0 |
| 102 | jsr @r0 | 110 | jsr @r0 |
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c new file mode 100644 index 000000000000..fe59ccfc1152 --- /dev/null +++ b/arch/sh/kernel/idle.c | |||
| @@ -0,0 +1,81 @@ | |||
| 1 | /* | ||
| 2 | * The idle loop for all SuperH platforms. | ||
| 3 | * | ||
| 4 | * Copyright (C) 2002 - 2008 Paul Mundt | ||
| 5 | * | ||
| 6 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 7 | * License. See the file "COPYING" in the main directory of this archive | ||
| 8 | * for more details. | ||
| 9 | */ | ||
| 10 | #include <linux/module.h> | ||
| 11 | #include <linux/init.h> | ||
| 12 | #include <linux/mm.h> | ||
| 13 | #include <linux/pm.h> | ||
| 14 | #include <linux/tick.h> | ||
| 15 | #include <linux/preempt.h> | ||
| 16 | #include <linux/thread_info.h> | ||
| 17 | #include <linux/irqflags.h> | ||
| 18 | #include <asm/pgalloc.h> | ||
| 19 | #include <asm/system.h> | ||
| 20 | #include <asm/atomic.h> | ||
| 21 | |||
| 22 | static int hlt_counter; | ||
| 23 | void (*pm_idle)(void); | ||
| 24 | void (*pm_power_off)(void); | ||
| 25 | EXPORT_SYMBOL(pm_power_off); | ||
| 26 | |||
| 27 | static int __init nohlt_setup(char *__unused) | ||
| 28 | { | ||
| 29 | hlt_counter = 1; | ||
| 30 | return 1; | ||
| 31 | } | ||
| 32 | __setup("nohlt", nohlt_setup); | ||
| 33 | |||
| 34 | static int __init hlt_setup(char *__unused) | ||
| 35 | { | ||
| 36 | hlt_counter = 0; | ||
| 37 | return 1; | ||
| 38 | } | ||
| 39 | __setup("hlt", hlt_setup); | ||
| 40 | |||
| 41 | static void default_idle(void) | ||
| 42 | { | ||
| 43 | if (!hlt_counter) { | ||
| 44 | clear_thread_flag(TIF_POLLING_NRFLAG); | ||
| 45 | smp_mb__after_clear_bit(); | ||
| 46 | set_bl_bit(); | ||
| 47 | stop_critical_timings(); | ||
| 48 | |||
| 49 | while (!need_resched()) | ||
| 50 | cpu_sleep(); | ||
| 51 | |||
| 52 | start_critical_timings(); | ||
| 53 | clear_bl_bit(); | ||
| 54 | set_thread_flag(TIF_POLLING_NRFLAG); | ||
| 55 | } else | ||
| 56 | while (!need_resched()) | ||
| 57 | cpu_relax(); | ||
| 58 | } | ||
| 59 | |||
| 60 | void cpu_idle(void) | ||
| 61 | { | ||
| 62 | set_thread_flag(TIF_POLLING_NRFLAG); | ||
| 63 | |||
| 64 | /* endless idle loop with no priority at all */ | ||
| 65 | while (1) { | ||
| 66 | void (*idle)(void) = pm_idle; | ||
| 67 | |||
| 68 | if (!idle) | ||
| 69 | idle = default_idle; | ||
| 70 | |||
| 71 | tick_nohz_stop_sched_tick(1); | ||
| 72 | while (!need_resched()) | ||
| 73 | idle(); | ||
| 74 | tick_nohz_restart_sched_tick(); | ||
| 75 | |||
| 76 | preempt_enable_no_resched(); | ||
| 77 | schedule(); | ||
| 78 | preempt_disable(); | ||
| 79 | check_pgt_cache(); | ||
| 80 | } | ||
| 81 | } | ||
diff --git a/arch/sh/kernel/kgdb.c b/arch/sh/kernel/kgdb.c new file mode 100644 index 000000000000..7c747e7d71b8 --- /dev/null +++ b/arch/sh/kernel/kgdb.c | |||
| @@ -0,0 +1,285 @@ | |||
| 1 | /* | ||
| 2 | * SuperH KGDB support | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 Paul Mundt | ||
| 5 | * | ||
| 6 | * Single stepping taken from the old stub by Henry Bell and Jeremy Siegel. | ||
| 7 | * | ||
| 8 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 9 | * License. See the file "COPYING" in the main directory of this archive | ||
| 10 | * for more details. | ||
| 11 | */ | ||
| 12 | #include <linux/kgdb.h> | ||
| 13 | #include <linux/kdebug.h> | ||
| 14 | #include <linux/irq.h> | ||
| 15 | #include <linux/io.h> | ||
| 16 | #include <asm/cacheflush.h> | ||
| 17 | |||
| 18 | char in_nmi = 0; /* Set during NMI to prevent re-entry */ | ||
| 19 | |||
| 20 | /* Macros for single step instruction identification */ | ||
| 21 | #define OPCODE_BT(op) (((op) & 0xff00) == 0x8900) | ||
| 22 | #define OPCODE_BF(op) (((op) & 0xff00) == 0x8b00) | ||
| 23 | #define OPCODE_BTF_DISP(op) (((op) & 0x80) ? (((op) | 0xffffff80) << 1) : \ | ||
| 24 | (((op) & 0x7f ) << 1)) | ||
| 25 | #define OPCODE_BFS(op) (((op) & 0xff00) == 0x8f00) | ||
| 26 | #define OPCODE_BTS(op) (((op) & 0xff00) == 0x8d00) | ||
| 27 | #define OPCODE_BRA(op) (((op) & 0xf000) == 0xa000) | ||
| 28 | #define OPCODE_BRA_DISP(op) (((op) & 0x800) ? (((op) | 0xfffff800) << 1) : \ | ||
| 29 | (((op) & 0x7ff) << 1)) | ||
| 30 | #define OPCODE_BRAF(op) (((op) & 0xf0ff) == 0x0023) | ||
| 31 | #define OPCODE_BRAF_REG(op) (((op) & 0x0f00) >> 8) | ||
| 32 | #define OPCODE_BSR(op) (((op) & 0xf000) == 0xb000) | ||
| 33 | #define OPCODE_BSR_DISP(op) (((op) & 0x800) ? (((op) | 0xfffff800) << 1) : \ | ||
| 34 | (((op) & 0x7ff) << 1)) | ||
| 35 | #define OPCODE_BSRF(op) (((op) & 0xf0ff) == 0x0003) | ||
| 36 | #define OPCODE_BSRF_REG(op) (((op) >> 8) & 0xf) | ||
| 37 | #define OPCODE_JMP(op) (((op) & 0xf0ff) == 0x402b) | ||
| 38 | #define OPCODE_JMP_REG(op) (((op) >> 8) & 0xf) | ||
| 39 | #define OPCODE_JSR(op) (((op) & 0xf0ff) == 0x400b) | ||
| 40 | #define OPCODE_JSR_REG(op) (((op) >> 8) & 0xf) | ||
| 41 | #define OPCODE_RTS(op) ((op) == 0xb) | ||
| 42 | #define OPCODE_RTE(op) ((op) == 0x2b) | ||
| 43 | |||
| 44 | #define SR_T_BIT_MASK 0x1 | ||
| 45 | #define STEP_OPCODE 0xc33d | ||
| 46 | |||
| 47 | /* Calculate the new address for after a step */ | ||
| 48 | static short *get_step_address(struct pt_regs *linux_regs) | ||
| 49 | { | ||
| 50 | opcode_t op = __raw_readw(linux_regs->pc); | ||
| 51 | long addr; | ||
| 52 | |||
| 53 | /* BT */ | ||
| 54 | if (OPCODE_BT(op)) { | ||
| 55 | if (linux_regs->sr & SR_T_BIT_MASK) | ||
| 56 | addr = linux_regs->pc + 4 + OPCODE_BTF_DISP(op); | ||
| 57 | else | ||
| 58 | addr = linux_regs->pc + 2; | ||
| 59 | } | ||
| 60 | |||
| 61 | /* BTS */ | ||
| 62 | else if (OPCODE_BTS(op)) { | ||
| 63 | if (linux_regs->sr & SR_T_BIT_MASK) | ||
| 64 | addr = linux_regs->pc + 4 + OPCODE_BTF_DISP(op); | ||
| 65 | else | ||
| 66 | addr = linux_regs->pc + 4; /* Not in delay slot */ | ||
| 67 | } | ||
| 68 | |||
| 69 | /* BF */ | ||
| 70 | else if (OPCODE_BF(op)) { | ||
| 71 | if (!(linux_regs->sr & SR_T_BIT_MASK)) | ||
| 72 | addr = linux_regs->pc + 4 + OPCODE_BTF_DISP(op); | ||
| 73 | else | ||
| 74 | addr = linux_regs->pc + 2; | ||
| 75 | } | ||
| 76 | |||
| 77 | /* BFS */ | ||
| 78 | else if (OPCODE_BFS(op)) { | ||
| 79 | if (!(linux_regs->sr & SR_T_BIT_MASK)) | ||
| 80 | addr = linux_regs->pc + 4 + OPCODE_BTF_DISP(op); | ||
| 81 | else | ||
| 82 | addr = linux_regs->pc + 4; /* Not in delay slot */ | ||
| 83 | } | ||
| 84 | |||
| 85 | /* BRA */ | ||
| 86 | else if (OPCODE_BRA(op)) | ||
| 87 | addr = linux_regs->pc + 4 + OPCODE_BRA_DISP(op); | ||
| 88 | |||
| 89 | /* BRAF */ | ||
| 90 | else if (OPCODE_BRAF(op)) | ||
| 91 | addr = linux_regs->pc + 4 | ||
| 92 | + linux_regs->regs[OPCODE_BRAF_REG(op)]; | ||
| 93 | |||
| 94 | /* BSR */ | ||
| 95 | else if (OPCODE_BSR(op)) | ||
| 96 | addr = linux_regs->pc + 4 + OPCODE_BSR_DISP(op); | ||
| 97 | |||
| 98 | /* BSRF */ | ||
| 99 | else if (OPCODE_BSRF(op)) | ||
| 100 | addr = linux_regs->pc + 4 | ||
| 101 | + linux_regs->regs[OPCODE_BSRF_REG(op)]; | ||
| 102 | |||
| 103 | /* JMP */ | ||
| 104 | else if (OPCODE_JMP(op)) | ||
| 105 | addr = linux_regs->regs[OPCODE_JMP_REG(op)]; | ||
| 106 | |||
| 107 | /* JSR */ | ||
| 108 | else if (OPCODE_JSR(op)) | ||
| 109 | addr = linux_regs->regs[OPCODE_JSR_REG(op)]; | ||
| 110 | |||
| 111 | /* RTS */ | ||
| 112 | else if (OPCODE_RTS(op)) | ||
| 113 | addr = linux_regs->pr; | ||
| 114 | |||
| 115 | /* RTE */ | ||
| 116 | else if (OPCODE_RTE(op)) | ||
| 117 | addr = linux_regs->regs[15]; | ||
| 118 | |||
| 119 | /* Other */ | ||
| 120 | else | ||
| 121 | addr = linux_regs->pc + instruction_size(op); | ||
| 122 | |||
| 123 | flush_icache_range(addr, addr + instruction_size(op)); | ||
| 124 | return (short *)addr; | ||
| 125 | } | ||
| 126 | |||
| 127 | /* | ||
| 128 | * Replace the instruction immediately after the current instruction | ||
| 129 | * (i.e. next in the expected flow of control) with a trap instruction, | ||
| 130 | * so that returning will cause only a single instruction to be executed. | ||
| 131 | * Note that this model is slightly broken for instructions with delay | ||
| 132 | * slots (e.g. B[TF]S, BSR, BRA etc), where both the branch and the | ||
| 133 | * instruction in the delay slot will be executed. | ||
| 134 | */ | ||
| 135 | |||
| 136 | static unsigned long stepped_address; | ||
| 137 | static opcode_t stepped_opcode; | ||
| 138 | |||
| 139 | static void do_single_step(struct pt_regs *linux_regs) | ||
| 140 | { | ||
| 141 | /* Determine where the target instruction will send us to */ | ||
| 142 | unsigned short *addr = get_step_address(linux_regs); | ||
| 143 | |||
| 144 | stepped_address = (int)addr; | ||
| 145 | |||
| 146 | /* Replace it */ | ||
| 147 | stepped_opcode = __raw_readw((long)addr); | ||
| 148 | *addr = STEP_OPCODE; | ||
| 149 | |||
| 150 | /* Flush and return */ | ||
| 151 | flush_icache_range((long)addr, (long)addr + | ||
| 152 | instruction_size(stepped_opcode)); | ||
| 153 | } | ||
| 154 | |||
| 155 | /* Undo a single step */ | ||
| 156 | static void undo_single_step(struct pt_regs *linux_regs) | ||
| 157 | { | ||
| 158 | /* If we have stepped, put back the old instruction */ | ||
| 159 | /* Use stepped_address in case we stopped elsewhere */ | ||
| 160 | if (stepped_opcode != 0) { | ||
| 161 | __raw_writew(stepped_opcode, stepped_address); | ||
| 162 | flush_icache_range(stepped_address, stepped_address + 2); | ||
| 163 | } | ||
| 164 | |||
| 165 | stepped_opcode = 0; | ||
| 166 | } | ||
| 167 | |||
| 168 | void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) | ||
| 169 | { | ||
| 170 | int i; | ||
| 171 | |||
| 172 | for (i = 0; i < 16; i++) | ||
| 173 | gdb_regs[GDB_R0 + i] = regs->regs[i]; | ||
| 174 | |||
| 175 | gdb_regs[GDB_PC] = regs->pc; | ||
| 176 | gdb_regs[GDB_PR] = regs->pr; | ||
| 177 | gdb_regs[GDB_SR] = regs->sr; | ||
| 178 | gdb_regs[GDB_GBR] = regs->gbr; | ||
| 179 | gdb_regs[GDB_MACH] = regs->mach; | ||
| 180 | gdb_regs[GDB_MACL] = regs->macl; | ||
| 181 | |||
| 182 | __asm__ __volatile__ ("stc vbr, %0" : "=r" (gdb_regs[GDB_VBR])); | ||
| 183 | } | ||
| 184 | |||
| 185 | void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs) | ||
| 186 | { | ||
| 187 | int i; | ||
| 188 | |||
| 189 | for (i = 0; i < 16; i++) | ||
| 190 | regs->regs[GDB_R0 + i] = gdb_regs[GDB_R0 + i]; | ||
| 191 | |||
| 192 | regs->pc = gdb_regs[GDB_PC]; | ||
| 193 | regs->pr = gdb_regs[GDB_PR]; | ||
| 194 | regs->sr = gdb_regs[GDB_SR]; | ||
| 195 | regs->gbr = gdb_regs[GDB_GBR]; | ||
| 196 | regs->mach = gdb_regs[GDB_MACH]; | ||
| 197 | regs->macl = gdb_regs[GDB_MACL]; | ||
| 198 | |||
| 199 | __asm__ __volatile__ ("ldc %0, vbr" : : "r" (gdb_regs[GDB_VBR])); | ||
| 200 | } | ||
| 201 | |||
| 202 | void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p) | ||
| 203 | { | ||
| 204 | gdb_regs[GDB_R15] = p->thread.sp; | ||
| 205 | gdb_regs[GDB_PC] = p->thread.pc; | ||
| 206 | } | ||
| 207 | |||
| 208 | int kgdb_arch_handle_exception(int e_vector, int signo, int err_code, | ||
| 209 | char *remcomInBuffer, char *remcomOutBuffer, | ||
| 210 | struct pt_regs *linux_regs) | ||
| 211 | { | ||
| 212 | unsigned long addr; | ||
| 213 | char *ptr; | ||
| 214 | |||
| 215 | /* Undo any stepping we may have done */ | ||
| 216 | undo_single_step(linux_regs); | ||
| 217 | |||
| 218 | switch (remcomInBuffer[0]) { | ||
| 219 | case 'c': | ||
| 220 | case 's': | ||
| 221 | /* try to read optional parameter, pc unchanged if no parm */ | ||
| 222 | ptr = &remcomInBuffer[1]; | ||
| 223 | if (kgdb_hex2long(&ptr, &addr)) | ||
| 224 | linux_regs->pc = addr; | ||
| 225 | case 'D': | ||
| 226 | case 'k': | ||
| 227 | atomic_set(&kgdb_cpu_doing_single_step, -1); | ||
| 228 | |||
| 229 | if (remcomInBuffer[0] == 's') { | ||
| 230 | do_single_step(linux_regs); | ||
| 231 | kgdb_single_step = 1; | ||
| 232 | |||
| 233 | atomic_set(&kgdb_cpu_doing_single_step, | ||
| 234 | raw_smp_processor_id()); | ||
| 235 | } | ||
| 236 | |||
| 237 | return 0; | ||
| 238 | } | ||
| 239 | |||
| 240 | /* this means that we do not want to exit from the handler: */ | ||
| 241 | return -1; | ||
| 242 | } | ||
| 243 | |||
| 244 | /* | ||
| 245 | * The primary entry points for the kgdb debug trap table entries. | ||
| 246 | */ | ||
| 247 | BUILD_TRAP_HANDLER(singlestep) | ||
| 248 | { | ||
| 249 | unsigned long flags; | ||
| 250 | TRAP_HANDLER_DECL; | ||
| 251 | |||
| 252 | local_irq_save(flags); | ||
| 253 | regs->pc -= instruction_size(__raw_readw(regs->pc - 4)); | ||
| 254 | kgdb_handle_exception(vec >> 2, SIGTRAP, 0, regs); | ||
| 255 | local_irq_restore(flags); | ||
| 256 | } | ||
| 257 | |||
| 258 | |||
| 259 | BUILD_TRAP_HANDLER(breakpoint) | ||
| 260 | { | ||
| 261 | unsigned long flags; | ||
| 262 | TRAP_HANDLER_DECL; | ||
| 263 | |||
| 264 | local_irq_save(flags); | ||
| 265 | kgdb_handle_exception(vec >> 2, SIGTRAP, 0, regs); | ||
| 266 | local_irq_restore(flags); | ||
| 267 | } | ||
| 268 | |||
| 269 | int kgdb_arch_init(void) | ||
| 270 | { | ||
| 271 | return 0; | ||
| 272 | } | ||
| 273 | |||
| 274 | void kgdb_arch_exit(void) | ||
| 275 | { | ||
| 276 | } | ||
| 277 | |||
| 278 | struct kgdb_arch arch_kgdb_ops = { | ||
| 279 | /* Breakpoint instruction: trapa #0x3c */ | ||
| 280 | #ifdef CONFIG_CPU_LITTLE_ENDIAN | ||
| 281 | .gdb_bpt_instr = { 0x3c, 0xc3 }, | ||
| 282 | #else | ||
| 283 | .gdb_bpt_instr = { 0xc3, 0x3c }, | ||
| 284 | #endif | ||
| 285 | }; | ||
diff --git a/arch/sh/kernel/kgdb_jmp.S b/arch/sh/kernel/kgdb_jmp.S deleted file mode 100644 index 339bb1d7ff0b..000000000000 --- a/arch/sh/kernel/kgdb_jmp.S +++ /dev/null | |||
| @@ -1,33 +0,0 @@ | |||
| 1 | #include <linux/linkage.h> | ||
| 2 | |||
| 3 | ENTRY(setjmp) | ||
| 4 | add #(9*4), r4 | ||
| 5 | sts.l pr, @-r4 | ||
| 6 | mov.l r15, @-r4 | ||
| 7 | mov.l r14, @-r4 | ||
| 8 | mov.l r13, @-r4 | ||
| 9 | mov.l r12, @-r4 | ||
| 10 | mov.l r11, @-r4 | ||
| 11 | mov.l r10, @-r4 | ||
| 12 | mov.l r9, @-r4 | ||
| 13 | mov.l r8, @-r4 | ||
| 14 | rts | ||
| 15 | mov #0, r0 | ||
| 16 | |||
| 17 | ENTRY(longjmp) | ||
| 18 | mov.l @r4+, r8 | ||
| 19 | mov.l @r4+, r9 | ||
| 20 | mov.l @r4+, r10 | ||
| 21 | mov.l @r4+, r11 | ||
| 22 | mov.l @r4+, r12 | ||
| 23 | mov.l @r4+, r13 | ||
| 24 | mov.l @r4+, r14 | ||
| 25 | mov.l @r4+, r15 | ||
| 26 | lds.l @r4+, pr | ||
| 27 | mov r5, r0 | ||
| 28 | tst r0, r0 | ||
| 29 | bf 1f | ||
| 30 | mov #1, r0 ! in case val==0 | ||
| 31 | 1: rts | ||
| 32 | nop | ||
| 33 | |||
diff --git a/arch/sh/kernel/kgdb_stub.c b/arch/sh/kernel/kgdb_stub.c deleted file mode 100644 index bf8ac4c71640..000000000000 --- a/arch/sh/kernel/kgdb_stub.c +++ /dev/null | |||
| @@ -1,1052 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * May be copied or modified under the terms of the GNU General Public | ||
| 3 | * License. See linux/COPYING for more information. | ||
| 4 | * | ||
| 5 | * Contains extracts from code by Glenn Engel, Jim Kingdon, | ||
| 6 | * David Grothe <dave@gcom.com>, Tigran Aivazian <tigran@sco.com>, | ||
| 7 | * Amit S. Kale <akale@veritas.com>, William Gatliff <bgat@open-widgets.com>, | ||
| 8 | * Ben Lee, Steve Chamberlain and Benoit Miller <fulg@iname.com>. | ||
| 9 | * | ||
| 10 | * This version by Henry Bell <henry.bell@st.com> | ||
| 11 | * Minor modifications by Jeremy Siegel <jsiegel@mvista.com> | ||
| 12 | * | ||
| 13 | * Contains low-level support for remote debug using GDB. | ||
| 14 | * | ||
| 15 | * To enable debugger support, two things need to happen. A call to | ||
| 16 | * set_debug_traps() is necessary in order to allow any breakpoints | ||
| 17 | * or error conditions to be properly intercepted and reported to gdb. | ||
| 18 | * A breakpoint also needs to be generated to begin communication. This | ||
| 19 | * is most easily accomplished by a call to breakpoint() which does | ||
| 20 | * a trapa if the initialisation phase has been successfully completed. | ||
| 21 | * | ||
| 22 | * In this case, set_debug_traps() is not used to "take over" exceptions; | ||
| 23 | * other kernel code is modified instead to enter the kgdb functions here | ||
| 24 | * when appropriate (see entry.S for breakpoint traps and NMI interrupts, | ||
| 25 | * see traps.c for kernel error exceptions). | ||
| 26 | * | ||
| 27 | * The following gdb commands are supported: | ||
| 28 | * | ||
| 29 | * Command Function Return value | ||
| 30 | * | ||
| 31 | * g return the value of the CPU registers hex data or ENN | ||
| 32 | * G set the value of the CPU registers OK or ENN | ||
| 33 | * | ||
| 34 | * mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN | ||
| 35 | * MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN | ||
| 36 | * XAA..AA,LLLL: Same, but data is binary (not hex) OK or ENN | ||
| 37 | * | ||
| 38 | * c Resume at current address SNN ( signal NN) | ||
| 39 | * cAA..AA Continue at address AA..AA SNN | ||
| 40 | * CNN; Resume at current address with signal SNN | ||
| 41 | * CNN;AA..AA Resume at address AA..AA with signal SNN | ||
| 42 | * | ||
| 43 | * s Step one instruction SNN | ||
| 44 | * sAA..AA Step one instruction from AA..AA SNN | ||
| 45 | * SNN; Step one instruction with signal SNN | ||
| 46 | * SNNAA..AA Step one instruction from AA..AA w/NN SNN | ||
| 47 | * | ||
| 48 | * k kill (Detach GDB) | ||
| 49 | * | ||
| 50 | * d Toggle debug flag | ||
| 51 | * D Detach GDB | ||
| 52 | * | ||
| 53 | * Hct Set thread t for operations, OK or ENN | ||
| 54 | * c = 'c' (step, cont), c = 'g' (other | ||
| 55 | * operations) | ||
| 56 | * | ||
| 57 | * qC Query current thread ID QCpid | ||
| 58 | * qfThreadInfo Get list of current threads (first) m<id> | ||
| 59 | * qsThreadInfo " " " " " (subsequent) | ||
| 60 | * qOffsets Get section offsets Text=x;Data=y;Bss=z | ||
| 61 | * | ||
| 62 | * TXX Find if thread XX is alive OK or ENN | ||
| 63 | * ? What was the last sigval ? SNN (signal NN) | ||
| 64 | * O Output to GDB console | ||
| 65 | * | ||
| 66 | * Remote communication protocol. | ||
| 67 | * | ||
| 68 | * A debug packet whose contents are <data> is encapsulated for | ||
| 69 | * transmission in the form: | ||
| 70 | * | ||
| 71 | * $ <data> # CSUM1 CSUM2 | ||
| 72 | * | ||
| 73 | * <data> must be ASCII alphanumeric and cannot include characters | ||
| 74 | * '$' or '#'. If <data> starts with two characters followed by | ||
| 75 | * ':', then the existing stubs interpret this as a sequence number. | ||
| 76 | * | ||
| 77 | * CSUM1 and CSUM2 are ascii hex representation of an 8-bit | ||
| 78 | * checksum of <data>, the most significant nibble is sent first. | ||
| 79 | * the hex digits 0-9,a-f are used. | ||
| 80 | * | ||
| 81 | * Receiver responds with: | ||
| 82 | * | ||
| 83 | * + - if CSUM is correct and ready for next packet | ||
| 84 | * - - if CSUM is incorrect | ||
| 85 | * | ||
| 86 | * Responses can be run-length encoded to save space. A '*' means that | ||
| 87 | * the next character is an ASCII encoding giving a repeat count which | ||
| 88 | * stands for that many repetitions of the character preceding the '*'. | ||
| 89 | * The encoding is n+29, yielding a printable character where n >=3 | ||
| 90 | * (which is where RLE starts to win). Don't use an n > 126. | ||
| 91 | * | ||
| 92 | * So "0* " means the same as "0000". | ||
| 93 | */ | ||
| 94 | |||
| 95 | #include <linux/string.h> | ||
| 96 | #include <linux/kernel.h> | ||
| 97 | #include <linux/sched.h> | ||
| 98 | #include <linux/smp.h> | ||
| 99 | #include <linux/spinlock.h> | ||
| 100 | #include <linux/delay.h> | ||
| 101 | #include <linux/linkage.h> | ||
| 102 | #include <linux/init.h> | ||
| 103 | #include <linux/console.h> | ||
| 104 | #include <linux/sysrq.h> | ||
| 105 | #include <linux/module.h> | ||
| 106 | #include <asm/system.h> | ||
| 107 | #include <asm/cacheflush.h> | ||
| 108 | #include <asm/current.h> | ||
| 109 | #include <asm/signal.h> | ||
| 110 | #include <asm/pgtable.h> | ||
| 111 | #include <asm/ptrace.h> | ||
| 112 | #include <asm/kgdb.h> | ||
| 113 | #include <asm/io.h> | ||
| 114 | |||
| 115 | /* Function pointers for linkage */ | ||
| 116 | kgdb_debug_hook_t *kgdb_debug_hook; | ||
| 117 | kgdb_bus_error_hook_t *kgdb_bus_err_hook; | ||
| 118 | |||
| 119 | int (*kgdb_getchar)(void); | ||
| 120 | EXPORT_SYMBOL_GPL(kgdb_getchar); | ||
| 121 | void (*kgdb_putchar)(int); | ||
| 122 | EXPORT_SYMBOL_GPL(kgdb_putchar); | ||
| 123 | |||
| 124 | static void put_debug_char(int c) | ||
| 125 | { | ||
| 126 | if (!kgdb_putchar) | ||
| 127 | return; | ||
| 128 | (*kgdb_putchar)(c); | ||
| 129 | } | ||
| 130 | static int get_debug_char(void) | ||
| 131 | { | ||
| 132 | if (!kgdb_getchar) | ||
| 133 | return -1; | ||
| 134 | return (*kgdb_getchar)(); | ||
| 135 | } | ||
| 136 | |||
| 137 | /* Num chars in in/out bound buffers, register packets need NUMREGBYTES * 2 */ | ||
| 138 | #define BUFMAX 1024 | ||
| 139 | #define NUMREGBYTES (MAXREG*4) | ||
| 140 | #define OUTBUFMAX (NUMREGBYTES*2+512) | ||
| 141 | |||
| 142 | enum { | ||
| 143 | R0 = 0, R1, R2, R3, R4, R5, R6, R7, | ||
| 144 | R8, R9, R10, R11, R12, R13, R14, R15, | ||
| 145 | PC, PR, GBR, VBR, MACH, MACL, SR, | ||
| 146 | /* */ | ||
| 147 | MAXREG | ||
| 148 | }; | ||
| 149 | |||
| 150 | static unsigned int registers[MAXREG]; | ||
| 151 | struct kgdb_regs trap_registers; | ||
| 152 | |||
| 153 | char kgdb_in_gdb_mode; | ||
| 154 | char in_nmi; /* Set during NMI to prevent reentry */ | ||
| 155 | int kgdb_nofault; /* Boolean to ignore bus errs (i.e. in GDB) */ | ||
| 156 | |||
| 157 | /* Default values for SCI (can override via kernel args in setup.c) */ | ||
| 158 | #ifndef CONFIG_KGDB_DEFPORT | ||
| 159 | #define CONFIG_KGDB_DEFPORT 1 | ||
| 160 | #endif | ||
| 161 | |||
| 162 | #ifndef CONFIG_KGDB_DEFBAUD | ||
| 163 | #define CONFIG_KGDB_DEFBAUD 115200 | ||
| 164 | #endif | ||
| 165 | |||
| 166 | #if defined(CONFIG_KGDB_DEFPARITY_E) | ||
| 167 | #define CONFIG_KGDB_DEFPARITY 'E' | ||
| 168 | #elif defined(CONFIG_KGDB_DEFPARITY_O) | ||
| 169 | #define CONFIG_KGDB_DEFPARITY 'O' | ||
| 170 | #else /* CONFIG_KGDB_DEFPARITY_N */ | ||
| 171 | #define CONFIG_KGDB_DEFPARITY 'N' | ||
| 172 | #endif | ||
| 173 | |||
| 174 | #ifdef CONFIG_KGDB_DEFBITS_7 | ||
| 175 | #define CONFIG_KGDB_DEFBITS '7' | ||
| 176 | #else /* CONFIG_KGDB_DEFBITS_8 */ | ||
| 177 | #define CONFIG_KGDB_DEFBITS '8' | ||
| 178 | #endif | ||
| 179 | |||
| 180 | /* SCI/UART settings, used in kgdb_console_setup() */ | ||
| 181 | int kgdb_portnum = CONFIG_KGDB_DEFPORT; | ||
| 182 | EXPORT_SYMBOL_GPL(kgdb_portnum); | ||
| 183 | int kgdb_baud = CONFIG_KGDB_DEFBAUD; | ||
| 184 | EXPORT_SYMBOL_GPL(kgdb_baud); | ||
| 185 | char kgdb_parity = CONFIG_KGDB_DEFPARITY; | ||
| 186 | EXPORT_SYMBOL_GPL(kgdb_parity); | ||
| 187 | char kgdb_bits = CONFIG_KGDB_DEFBITS; | ||
| 188 | EXPORT_SYMBOL_GPL(kgdb_bits); | ||
| 189 | |||
| 190 | /* Jump buffer for setjmp/longjmp */ | ||
| 191 | static jmp_buf rem_com_env; | ||
| 192 | |||
| 193 | /* TRA differs sh3/4 */ | ||
| 194 | #if defined(CONFIG_CPU_SH3) | ||
| 195 | #define TRA 0xffffffd0 | ||
| 196 | #elif defined(CONFIG_CPU_SH4) | ||
| 197 | #define TRA 0xff000020 | ||
| 198 | #endif | ||
| 199 | |||
| 200 | /* Macros for single step instruction identification */ | ||
| 201 | #define OPCODE_BT(op) (((op) & 0xff00) == 0x8900) | ||
| 202 | #define OPCODE_BF(op) (((op) & 0xff00) == 0x8b00) | ||
| 203 | #define OPCODE_BTF_DISP(op) (((op) & 0x80) ? (((op) | 0xffffff80) << 1) : \ | ||
| 204 | (((op) & 0x7f ) << 1)) | ||
| 205 | #define OPCODE_BFS(op) (((op) & 0xff00) == 0x8f00) | ||
| 206 | #define OPCODE_BTS(op) (((op) & 0xff00) == 0x8d00) | ||
| 207 | #define OPCODE_BRA(op) (((op) & 0xf000) == 0xa000) | ||
| 208 | #define OPCODE_BRA_DISP(op) (((op) & 0x800) ? (((op) | 0xfffff800) << 1) : \ | ||
| 209 | (((op) & 0x7ff) << 1)) | ||
| 210 | #define OPCODE_BRAF(op) (((op) & 0xf0ff) == 0x0023) | ||
| 211 | #define OPCODE_BRAF_REG(op) (((op) & 0x0f00) >> 8) | ||
| 212 | #define OPCODE_BSR(op) (((op) & 0xf000) == 0xb000) | ||
| 213 | #define OPCODE_BSR_DISP(op) (((op) & 0x800) ? (((op) | 0xfffff800) << 1) : \ | ||
| 214 | (((op) & 0x7ff) << 1)) | ||
| 215 | #define OPCODE_BSRF(op) (((op) & 0xf0ff) == 0x0003) | ||
| 216 | #define OPCODE_BSRF_REG(op) (((op) >> 8) & 0xf) | ||
| 217 | #define OPCODE_JMP(op) (((op) & 0xf0ff) == 0x402b) | ||
| 218 | #define OPCODE_JMP_REG(op) (((op) >> 8) & 0xf) | ||
| 219 | #define OPCODE_JSR(op) (((op) & 0xf0ff) == 0x400b) | ||
| 220 | #define OPCODE_JSR_REG(op) (((op) >> 8) & 0xf) | ||
| 221 | #define OPCODE_RTS(op) ((op) == 0xb) | ||
| 222 | #define OPCODE_RTE(op) ((op) == 0x2b) | ||
| 223 | |||
| 224 | #define SR_T_BIT_MASK 0x1 | ||
| 225 | #define STEP_OPCODE 0xc320 | ||
| 226 | #define BIOS_CALL_TRAP 0x3f | ||
| 227 | |||
| 228 | /* Exception codes as per SH-4 core manual */ | ||
| 229 | #define ADDRESS_ERROR_LOAD_VEC 7 | ||
| 230 | #define ADDRESS_ERROR_STORE_VEC 8 | ||
| 231 | #define TRAP_VEC 11 | ||
| 232 | #define INVALID_INSN_VEC 12 | ||
| 233 | #define INVALID_SLOT_VEC 13 | ||
| 234 | #define NMI_VEC 14 | ||
| 235 | #define USER_BREAK_VEC 15 | ||
| 236 | #define SERIAL_BREAK_VEC 58 | ||
| 237 | |||
| 238 | /* Misc static */ | ||
| 239 | static int stepped_address; | ||
| 240 | static short stepped_opcode; | ||
| 241 | static char in_buffer[BUFMAX]; | ||
| 242 | static char out_buffer[OUTBUFMAX]; | ||
| 243 | |||
| 244 | static void kgdb_to_gdb(const char *s); | ||
| 245 | |||
| 246 | /* Convert ch to hex */ | ||
| 247 | static int hex(const char ch) | ||
| 248 | { | ||
| 249 | if ((ch >= 'a') && (ch <= 'f')) | ||
| 250 | return (ch - 'a' + 10); | ||
| 251 | if ((ch >= '0') && (ch <= '9')) | ||
| 252 | return (ch - '0'); | ||
| 253 | if ((ch >= 'A') && (ch <= 'F')) | ||
| 254 | return (ch - 'A' + 10); | ||
| 255 | return (-1); | ||
| 256 | } | ||
| 257 | |||
| 258 | /* Convert the memory pointed to by mem into hex, placing result in buf. | ||
| 259 | Returns a pointer to the last char put in buf (null) */ | ||
| 260 | static char *mem_to_hex(const char *mem, char *buf, const int count) | ||
| 261 | { | ||
| 262 | int i; | ||
| 263 | int ch; | ||
| 264 | unsigned short s_val; | ||
| 265 | unsigned long l_val; | ||
| 266 | |||
| 267 | /* Check for 16 or 32 */ | ||
| 268 | if (count == 2 && ((long) mem & 1) == 0) { | ||
| 269 | s_val = *(unsigned short *) mem; | ||
| 270 | mem = (char *) &s_val; | ||
| 271 | } else if (count == 4 && ((long) mem & 3) == 0) { | ||
| 272 | l_val = *(unsigned long *) mem; | ||
| 273 | mem = (char *) &l_val; | ||
| 274 | } | ||
| 275 | for (i = 0; i < count; i++) { | ||
| 276 | ch = *mem++; | ||
| 277 | buf = pack_hex_byte(buf, ch); | ||
| 278 | } | ||
| 279 | *buf = 0; | ||
| 280 | return (buf); | ||
| 281 | } | ||
| 282 | |||
| 283 | /* Convert the hex array pointed to by buf into binary, to be placed in mem. | ||
| 284 | Return a pointer to the character after the last byte written */ | ||
| 285 | static char *hex_to_mem(const char *buf, char *mem, const int count) | ||
| 286 | { | ||
| 287 | int i; | ||
| 288 | unsigned char ch; | ||
| 289 | |||
| 290 | for (i = 0; i < count; i++) { | ||
| 291 | ch = hex(*buf++) << 4; | ||
| 292 | ch = ch + hex(*buf++); | ||
| 293 | *mem++ = ch; | ||
| 294 | } | ||
| 295 | return (mem); | ||
| 296 | } | ||
| 297 | |||
| 298 | /* While finding valid hex chars, convert to an integer, then return it */ | ||
| 299 | static int hex_to_int(char **ptr, int *int_value) | ||
| 300 | { | ||
| 301 | int num_chars = 0; | ||
| 302 | int hex_value; | ||
| 303 | |||
| 304 | *int_value = 0; | ||
| 305 | |||
| 306 | while (**ptr) { | ||
| 307 | hex_value = hex(**ptr); | ||
| 308 | if (hex_value >= 0) { | ||
| 309 | *int_value = (*int_value << 4) | hex_value; | ||
| 310 | num_chars++; | ||
| 311 | } else | ||
| 312 | break; | ||
| 313 | (*ptr)++; | ||
| 314 | } | ||
| 315 | return num_chars; | ||
| 316 | } | ||
| 317 | |||
| 318 | /* Copy the binary array pointed to by buf into mem. Fix $, #, | ||
| 319 | and 0x7d escaped with 0x7d. Return a pointer to the character | ||
| 320 | after the last byte written. */ | ||
| 321 | static char *ebin_to_mem(const char *buf, char *mem, int count) | ||
| 322 | { | ||
| 323 | for (; count > 0; count--, buf++) { | ||
| 324 | if (*buf == 0x7d) | ||
| 325 | *mem++ = *(++buf) ^ 0x20; | ||
| 326 | else | ||
| 327 | *mem++ = *buf; | ||
| 328 | } | ||
| 329 | return mem; | ||
| 330 | } | ||
| 331 | |||
| 332 | /* Scan for the start char '$', read the packet and check the checksum */ | ||
| 333 | static void get_packet(char *buffer, int buflen) | ||
| 334 | { | ||
| 335 | unsigned char checksum; | ||
| 336 | unsigned char xmitcsum; | ||
| 337 | int i; | ||
| 338 | int count; | ||
| 339 | char ch; | ||
| 340 | |||
| 341 | do { | ||
| 342 | /* Ignore everything until the start character */ | ||
| 343 | while ((ch = get_debug_char()) != '$'); | ||
| 344 | |||
| 345 | checksum = 0; | ||
| 346 | xmitcsum = -1; | ||
| 347 | count = 0; | ||
| 348 | |||
| 349 | /* Now, read until a # or end of buffer is found */ | ||
| 350 | while (count < (buflen - 1)) { | ||
| 351 | ch = get_debug_char(); | ||
| 352 | |||
| 353 | if (ch == '#') | ||
| 354 | break; | ||
| 355 | |||
| 356 | checksum = checksum + ch; | ||
| 357 | buffer[count] = ch; | ||
| 358 | count = count + 1; | ||
| 359 | } | ||
| 360 | |||
| 361 | buffer[count] = 0; | ||
| 362 | |||
| 363 | /* Continue to read checksum following # */ | ||
| 364 | if (ch == '#') { | ||
| 365 | xmitcsum = hex(get_debug_char()) << 4; | ||
| 366 | xmitcsum += hex(get_debug_char()); | ||
| 367 | |||
| 368 | /* Checksum */ | ||
| 369 | if (checksum != xmitcsum) | ||
| 370 | put_debug_char('-'); /* Failed checksum */ | ||
| 371 | else { | ||
| 372 | /* Ack successful transfer */ | ||
| 373 | put_debug_char('+'); | ||
| 374 | |||
| 375 | /* If a sequence char is present, reply | ||
| 376 | the sequence ID */ | ||
| 377 | if (buffer[2] == ':') { | ||
| 378 | put_debug_char(buffer[0]); | ||
| 379 | put_debug_char(buffer[1]); | ||
| 380 | |||
| 381 | /* Remove sequence chars from buffer */ | ||
| 382 | count = strlen(buffer); | ||
| 383 | for (i = 3; i <= count; i++) | ||
| 384 | buffer[i - 3] = buffer[i]; | ||
| 385 | } | ||
| 386 | } | ||
| 387 | } | ||
| 388 | } | ||
| 389 | while (checksum != xmitcsum); /* Keep trying while we fail */ | ||
| 390 | } | ||
| 391 | |||
| 392 | /* Send the packet in the buffer with run-length encoding */ | ||
| 393 | static void put_packet(char *buffer) | ||
| 394 | { | ||
| 395 | int checksum; | ||
| 396 | char *src; | ||
| 397 | int runlen; | ||
| 398 | int encode; | ||
| 399 | |||
| 400 | do { | ||
| 401 | src = buffer; | ||
| 402 | put_debug_char('$'); | ||
| 403 | checksum = 0; | ||
| 404 | |||
| 405 | /* Continue while we still have chars left */ | ||
| 406 | while (*src) { | ||
| 407 | /* Check for runs up to 99 chars long */ | ||
| 408 | for (runlen = 1; runlen < 99; runlen++) { | ||
| 409 | if (src[0] != src[runlen]) | ||
| 410 | break; | ||
| 411 | } | ||
| 412 | |||
| 413 | if (runlen > 3) { | ||
| 414 | /* Got a useful amount, send encoding */ | ||
| 415 | encode = runlen + ' ' - 4; | ||
| 416 | put_debug_char(*src); checksum += *src; | ||
| 417 | put_debug_char('*'); checksum += '*'; | ||
| 418 | put_debug_char(encode); checksum += encode; | ||
| 419 | src += runlen; | ||
| 420 | } else { | ||
| 421 | /* Otherwise just send the current char */ | ||
| 422 | put_debug_char(*src); checksum += *src; | ||
| 423 | src += 1; | ||
| 424 | } | ||
| 425 | } | ||
| 426 | |||
| 427 | /* '#' Separator, put high and low components of checksum */ | ||
| 428 | put_debug_char('#'); | ||
| 429 | put_debug_char(hex_asc_hi(checksum)); | ||
| 430 | put_debug_char(hex_asc_lo(checksum)); | ||
| 431 | } | ||
| 432 | while ((get_debug_char()) != '+'); /* While no ack */ | ||
| 433 | } | ||
| 434 | |||
| 435 | /* A bus error has occurred - perform a longjmp to return execution and | ||
| 436 | allow handling of the error */ | ||
| 437 | static void kgdb_handle_bus_error(void) | ||
| 438 | { | ||
| 439 | longjmp(rem_com_env, 1); | ||
| 440 | } | ||
| 441 | |||
| 442 | /* Translate SH-3/4 exception numbers to unix-like signal values */ | ||
| 443 | static int compute_signal(const int excep_code) | ||
| 444 | { | ||
| 445 | int sigval; | ||
| 446 | |||
| 447 | switch (excep_code) { | ||
| 448 | |||
| 449 | case INVALID_INSN_VEC: | ||
| 450 | case INVALID_SLOT_VEC: | ||
| 451 | sigval = SIGILL; | ||
| 452 | break; | ||
| 453 | case ADDRESS_ERROR_LOAD_VEC: | ||
| 454 | case ADDRESS_ERROR_STORE_VEC: | ||
| 455 | sigval = SIGSEGV; | ||
| 456 | break; | ||
| 457 | |||
| 458 | case SERIAL_BREAK_VEC: | ||
| 459 | case NMI_VEC: | ||
| 460 | sigval = SIGINT; | ||
| 461 | break; | ||
| 462 | |||
| 463 | case USER_BREAK_VEC: | ||
| 464 | case TRAP_VEC: | ||
| 465 | sigval = SIGTRAP; | ||
| 466 | break; | ||
| 467 | |||
| 468 | default: | ||
| 469 | sigval = SIGBUS; /* "software generated" */ | ||
| 470 | break; | ||
| 471 | } | ||
| 472 | |||
| 473 | return (sigval); | ||
| 474 | } | ||
| 475 | |||
| 476 | /* Make a local copy of the registers passed into the handler (bletch) */ | ||
| 477 | static void kgdb_regs_to_gdb_regs(const struct kgdb_regs *regs, | ||
| 478 | int *gdb_regs) | ||
| 479 | { | ||
| 480 | gdb_regs[R0] = regs->regs[R0]; | ||
| 481 | gdb_regs[R1] = regs->regs[R1]; | ||
| 482 | gdb_regs[R2] = regs->regs[R2]; | ||
| 483 | gdb_regs[R3] = regs->regs[R3]; | ||
| 484 | gdb_regs[R4] = regs->regs[R4]; | ||
| 485 | gdb_regs[R5] = regs->regs[R5]; | ||
| 486 | gdb_regs[R6] = regs->regs[R6]; | ||
| 487 | gdb_regs[R7] = regs->regs[R7]; | ||
| 488 | gdb_regs[R8] = regs->regs[R8]; | ||
| 489 | gdb_regs[R9] = regs->regs[R9]; | ||
| 490 | gdb_regs[R10] = regs->regs[R10]; | ||
| 491 | gdb_regs[R11] = regs->regs[R11]; | ||
| 492 | gdb_regs[R12] = regs->regs[R12]; | ||
| 493 | gdb_regs[R13] = regs->regs[R13]; | ||
| 494 | gdb_regs[R14] = regs->regs[R14]; | ||
| 495 | gdb_regs[R15] = regs->regs[R15]; | ||
| 496 | gdb_regs[PC] = regs->pc; | ||
| 497 | gdb_regs[PR] = regs->pr; | ||
| 498 | gdb_regs[GBR] = regs->gbr; | ||
| 499 | gdb_regs[MACH] = regs->mach; | ||
| 500 | gdb_regs[MACL] = regs->macl; | ||
| 501 | gdb_regs[SR] = regs->sr; | ||
| 502 | gdb_regs[VBR] = regs->vbr; | ||
| 503 | } | ||
| 504 | |||
| 505 | /* Copy local gdb registers back to kgdb regs, for later copy to kernel */ | ||
| 506 | static void gdb_regs_to_kgdb_regs(const int *gdb_regs, | ||
| 507 | struct kgdb_regs *regs) | ||
| 508 | { | ||
| 509 | regs->regs[R0] = gdb_regs[R0]; | ||
| 510 | regs->regs[R1] = gdb_regs[R1]; | ||
| 511 | regs->regs[R2] = gdb_regs[R2]; | ||
| 512 | regs->regs[R3] = gdb_regs[R3]; | ||
| 513 | regs->regs[R4] = gdb_regs[R4]; | ||
| 514 | regs->regs[R5] = gdb_regs[R5]; | ||
| 515 | regs->regs[R6] = gdb_regs[R6]; | ||
| 516 | regs->regs[R7] = gdb_regs[R7]; | ||
| 517 | regs->regs[R8] = gdb_regs[R8]; | ||
| 518 | regs->regs[R9] = gdb_regs[R9]; | ||
| 519 | regs->regs[R10] = gdb_regs[R10]; | ||
| 520 | regs->regs[R11] = gdb_regs[R11]; | ||
| 521 | regs->regs[R12] = gdb_regs[R12]; | ||
| 522 | regs->regs[R13] = gdb_regs[R13]; | ||
| 523 | regs->regs[R14] = gdb_regs[R14]; | ||
| 524 | regs->regs[R15] = gdb_regs[R15]; | ||
| 525 | regs->pc = gdb_regs[PC]; | ||
| 526 | regs->pr = gdb_regs[PR]; | ||
| 527 | regs->gbr = gdb_regs[GBR]; | ||
| 528 | regs->mach = gdb_regs[MACH]; | ||
| 529 | regs->macl = gdb_regs[MACL]; | ||
| 530 | regs->sr = gdb_regs[SR]; | ||
| 531 | regs->vbr = gdb_regs[VBR]; | ||
| 532 | } | ||
| 533 | |||
| 534 | /* Calculate the new address for after a step */ | ||
| 535 | static short *get_step_address(void) | ||
| 536 | { | ||
| 537 | short op = *(short *) trap_registers.pc; | ||
| 538 | long addr; | ||
| 539 | |||
| 540 | /* BT */ | ||
| 541 | if (OPCODE_BT(op)) { | ||
| 542 | if (trap_registers.sr & SR_T_BIT_MASK) | ||
| 543 | addr = trap_registers.pc + 4 + OPCODE_BTF_DISP(op); | ||
| 544 | else | ||
| 545 | addr = trap_registers.pc + 2; | ||
| 546 | } | ||
| 547 | |||
| 548 | /* BTS */ | ||
| 549 | else if (OPCODE_BTS(op)) { | ||
| 550 | if (trap_registers.sr & SR_T_BIT_MASK) | ||
| 551 | addr = trap_registers.pc + 4 + OPCODE_BTF_DISP(op); | ||
| 552 | else | ||
| 553 | addr = trap_registers.pc + 4; /* Not in delay slot */ | ||
| 554 | } | ||
| 555 | |||
| 556 | /* BF */ | ||
| 557 | else if (OPCODE_BF(op)) { | ||
| 558 | if (!(trap_registers.sr & SR_T_BIT_MASK)) | ||
| 559 | addr = trap_registers.pc + 4 + OPCODE_BTF_DISP(op); | ||
| 560 | else | ||
| 561 | addr = trap_registers.pc + 2; | ||
| 562 | } | ||
| 563 | |||
| 564 | /* BFS */ | ||
| 565 | else if (OPCODE_BFS(op)) { | ||
| 566 | if (!(trap_registers.sr & SR_T_BIT_MASK)) | ||
| 567 | addr = trap_registers.pc + 4 + OPCODE_BTF_DISP(op); | ||
| 568 | else | ||
| 569 | addr = trap_registers.pc + 4; /* Not in delay slot */ | ||
| 570 | } | ||
| 571 | |||
| 572 | /* BRA */ | ||
| 573 | else if (OPCODE_BRA(op)) | ||
| 574 | addr = trap_registers.pc + 4 + OPCODE_BRA_DISP(op); | ||
| 575 | |||
| 576 | /* BRAF */ | ||
| 577 | else if (OPCODE_BRAF(op)) | ||
| 578 | addr = trap_registers.pc + 4 | ||
| 579 | + trap_registers.regs[OPCODE_BRAF_REG(op)]; | ||
| 580 | |||
| 581 | /* BSR */ | ||
| 582 | else if (OPCODE_BSR(op)) | ||
| 583 | addr = trap_registers.pc + 4 + OPCODE_BSR_DISP(op); | ||
| 584 | |||
| 585 | /* BSRF */ | ||
| 586 | else if (OPCODE_BSRF(op)) | ||
| 587 | addr = trap_registers.pc + 4 | ||
| 588 | + trap_registers.regs[OPCODE_BSRF_REG(op)]; | ||
| 589 | |||
| 590 | /* JMP */ | ||
| 591 | else if (OPCODE_JMP(op)) | ||
| 592 | addr = trap_registers.regs[OPCODE_JMP_REG(op)]; | ||
| 593 | |||
| 594 | /* JSR */ | ||
| 595 | else if (OPCODE_JSR(op)) | ||
| 596 | addr = trap_registers.regs[OPCODE_JSR_REG(op)]; | ||
| 597 | |||
| 598 | /* RTS */ | ||
| 599 | else if (OPCODE_RTS(op)) | ||
| 600 | addr = trap_registers.pr; | ||
| 601 | |||
| 602 | /* RTE */ | ||
| 603 | else if (OPCODE_RTE(op)) | ||
| 604 | addr = trap_registers.regs[15]; | ||
| 605 | |||
| 606 | /* Other */ | ||
| 607 | else | ||
| 608 | addr = trap_registers.pc + 2; | ||
| 609 | |||
| 610 | flush_icache_range(addr, addr + 2); | ||
| 611 | return (short *) addr; | ||
| 612 | } | ||
| 613 | |||
| 614 | /* Set up a single-step. Replace the instruction immediately after the | ||
| 615 | current instruction (i.e. next in the expected flow of control) with a | ||
| 616 | trap instruction, so that returning will cause only a single instruction | ||
| 617 | to be executed. Note that this model is slightly broken for instructions | ||
| 618 | with delay slots (e.g. B[TF]S, BSR, BRA etc), where both the branch | ||
| 619 | and the instruction in the delay slot will be executed. */ | ||
| 620 | static void do_single_step(void) | ||
| 621 | { | ||
| 622 | unsigned short *addr = 0; | ||
| 623 | |||
| 624 | /* Determine where the target instruction will send us to */ | ||
| 625 | addr = get_step_address(); | ||
| 626 | stepped_address = (int)addr; | ||
| 627 | |||
| 628 | /* Replace it */ | ||
| 629 | stepped_opcode = *(short *)addr; | ||
| 630 | *addr = STEP_OPCODE; | ||
| 631 | |||
| 632 | /* Flush and return */ | ||
| 633 | flush_icache_range((long) addr, (long) addr + 2); | ||
| 634 | } | ||
| 635 | |||
| 636 | /* Undo a single step */ | ||
| 637 | static void undo_single_step(void) | ||
| 638 | { | ||
| 639 | /* If we have stepped, put back the old instruction */ | ||
| 640 | /* Use stepped_address in case we stopped elsewhere */ | ||
| 641 | if (stepped_opcode != 0) { | ||
| 642 | *(short*)stepped_address = stepped_opcode; | ||
| 643 | flush_icache_range(stepped_address, stepped_address + 2); | ||
| 644 | } | ||
| 645 | stepped_opcode = 0; | ||
| 646 | } | ||
| 647 | |||
| 648 | /* Send a signal message */ | ||
| 649 | static void send_signal_msg(const int signum) | ||
| 650 | { | ||
| 651 | out_buffer[0] = 'S'; | ||
| 652 | out_buffer[1] = hex_asc_hi(signum); | ||
| 653 | out_buffer[2] = hex_asc_lo(signum); | ||
| 654 | out_buffer[3] = 0; | ||
| 655 | put_packet(out_buffer); | ||
| 656 | } | ||
| 657 | |||
| 658 | /* Reply that all was well */ | ||
| 659 | static void send_ok_msg(void) | ||
| 660 | { | ||
| 661 | strcpy(out_buffer, "OK"); | ||
| 662 | put_packet(out_buffer); | ||
| 663 | } | ||
| 664 | |||
| 665 | /* Reply that an error occurred */ | ||
| 666 | static void send_err_msg(void) | ||
| 667 | { | ||
| 668 | strcpy(out_buffer, "E01"); | ||
| 669 | put_packet(out_buffer); | ||
| 670 | } | ||
| 671 | |||
| 672 | /* Empty message indicates unrecognised command */ | ||
| 673 | static void send_empty_msg(void) | ||
| 674 | { | ||
| 675 | put_packet(""); | ||
| 676 | } | ||
| 677 | |||
| 678 | /* Read memory due to 'm' message */ | ||
| 679 | static void read_mem_msg(void) | ||
| 680 | { | ||
| 681 | char *ptr; | ||
| 682 | int addr; | ||
| 683 | int length; | ||
| 684 | |||
| 685 | /* Jmp, disable bus error handler */ | ||
| 686 | if (setjmp(rem_com_env) == 0) { | ||
| 687 | |||
| 688 | kgdb_nofault = 1; | ||
| 689 | |||
| 690 | /* Walk through, have m<addr>,<length> */ | ||
| 691 | ptr = &in_buffer[1]; | ||
| 692 | if (hex_to_int(&ptr, &addr) && (*ptr++ == ',')) | ||
| 693 | if (hex_to_int(&ptr, &length)) { | ||
| 694 | ptr = 0; | ||
| 695 | if (length * 2 > OUTBUFMAX) | ||
| 696 | length = OUTBUFMAX / 2; | ||
| 697 | mem_to_hex((char *) addr, out_buffer, length); | ||
| 698 | } | ||
| 699 | if (ptr) | ||
| 700 | send_err_msg(); | ||
| 701 | else | ||
| 702 | put_packet(out_buffer); | ||
| 703 | } else | ||
| 704 | send_err_msg(); | ||
| 705 | |||
| 706 | /* Restore bus error handler */ | ||
| 707 | kgdb_nofault = 0; | ||
| 708 | } | ||
| 709 | |||
| 710 | /* Write memory due to 'M' or 'X' message */ | ||
| 711 | static void write_mem_msg(int binary) | ||
| 712 | { | ||
| 713 | char *ptr; | ||
| 714 | int addr; | ||
| 715 | int length; | ||
| 716 | |||
| 717 | if (setjmp(rem_com_env) == 0) { | ||
| 718 | |||
| 719 | kgdb_nofault = 1; | ||
| 720 | |||
| 721 | /* Walk through, have M<addr>,<length>:<data> */ | ||
| 722 | ptr = &in_buffer[1]; | ||
| 723 | if (hex_to_int(&ptr, &addr) && (*ptr++ == ',')) | ||
| 724 | if (hex_to_int(&ptr, &length) && (*ptr++ == ':')) { | ||
| 725 | if (binary) | ||
| 726 | ebin_to_mem(ptr, (char*)addr, length); | ||
| 727 | else | ||
| 728 | hex_to_mem(ptr, (char*)addr, length); | ||
| 729 | flush_icache_range(addr, addr + length); | ||
| 730 | ptr = 0; | ||
| 731 | send_ok_msg(); | ||
| 732 | } | ||
| 733 | if (ptr) | ||
| 734 | send_err_msg(); | ||
| 735 | } else | ||
| 736 | send_err_msg(); | ||
| 737 | |||
| 738 | /* Restore bus error handler */ | ||
| 739 | kgdb_nofault = 0; | ||
| 740 | } | ||
| 741 | |||
| 742 | /* Continue message */ | ||
| 743 | static void continue_msg(void) | ||
| 744 | { | ||
| 745 | /* Try to read optional parameter, PC unchanged if none */ | ||
| 746 | char *ptr = &in_buffer[1]; | ||
| 747 | int addr; | ||
| 748 | |||
| 749 | if (hex_to_int(&ptr, &addr)) | ||
| 750 | trap_registers.pc = addr; | ||
| 751 | } | ||
| 752 | |||
| 753 | /* Continue message with signal */ | ||
| 754 | static void continue_with_sig_msg(void) | ||
| 755 | { | ||
| 756 | int signal; | ||
| 757 | char *ptr = &in_buffer[1]; | ||
| 758 | int addr; | ||
| 759 | |||
| 760 | /* Report limitation */ | ||
| 761 | kgdb_to_gdb("Cannot force signal in kgdb, continuing anyway.\n"); | ||
| 762 | |||
| 763 | /* Signal */ | ||
| 764 | hex_to_int(&ptr, &signal); | ||
| 765 | if (*ptr == ';') | ||
| 766 | ptr++; | ||
| 767 | |||
| 768 | /* Optional address */ | ||
| 769 | if (hex_to_int(&ptr, &addr)) | ||
| 770 | trap_registers.pc = addr; | ||
| 771 | } | ||
| 772 | |||
| 773 | /* Step message */ | ||
| 774 | static void step_msg(void) | ||
| 775 | { | ||
| 776 | continue_msg(); | ||
| 777 | do_single_step(); | ||
| 778 | } | ||
| 779 | |||
| 780 | /* Step message with signal */ | ||
| 781 | static void step_with_sig_msg(void) | ||
| 782 | { | ||
| 783 | continue_with_sig_msg(); | ||
| 784 | do_single_step(); | ||
| 785 | } | ||
| 786 | |||
| 787 | /* Send register contents */ | ||
| 788 | static void send_regs_msg(void) | ||
| 789 | { | ||
| 790 | kgdb_regs_to_gdb_regs(&trap_registers, registers); | ||
| 791 | mem_to_hex((char *) registers, out_buffer, NUMREGBYTES); | ||
| 792 | put_packet(out_buffer); | ||
| 793 | } | ||
| 794 | |||
| 795 | /* Set register contents - currently can't set other thread's registers */ | ||
| 796 | static void set_regs_msg(void) | ||
| 797 | { | ||
| 798 | kgdb_regs_to_gdb_regs(&trap_registers, registers); | ||
| 799 | hex_to_mem(&in_buffer[1], (char *) registers, NUMREGBYTES); | ||
| 800 | gdb_regs_to_kgdb_regs(registers, &trap_registers); | ||
| 801 | send_ok_msg(); | ||
| 802 | } | ||
| 803 | |||
| 804 | #ifdef CONFIG_SH_KGDB_CONSOLE | ||
| 805 | /* | ||
| 806 | * Bring up the ports.. | ||
| 807 | */ | ||
| 808 | static int __init kgdb_serial_setup(void) | ||
| 809 | { | ||
| 810 | struct console dummy; | ||
| 811 | return kgdb_console_setup(&dummy, 0); | ||
| 812 | } | ||
| 813 | #else | ||
| 814 | #define kgdb_serial_setup() 0 | ||
| 815 | #endif | ||
| 816 | |||
| 817 | /* The command loop, read and act on requests */ | ||
| 818 | static void kgdb_command_loop(const int excep_code, const int trapa_value) | ||
| 819 | { | ||
| 820 | int sigval; | ||
| 821 | |||
| 822 | /* Enter GDB mode (e.g. after detach) */ | ||
| 823 | if (!kgdb_in_gdb_mode) { | ||
| 824 | /* Do serial setup, notify user, issue preemptive ack */ | ||
| 825 | printk(KERN_NOTICE "KGDB: Waiting for GDB\n"); | ||
| 826 | kgdb_in_gdb_mode = 1; | ||
| 827 | put_debug_char('+'); | ||
| 828 | } | ||
| 829 | |||
| 830 | /* Reply to host that an exception has occurred */ | ||
| 831 | sigval = compute_signal(excep_code); | ||
| 832 | send_signal_msg(sigval); | ||
| 833 | |||
| 834 | /* TRAP_VEC exception indicates a software trap inserted in place of | ||
| 835 | code by GDB so back up PC by one instruction, as this instruction | ||
| 836 | will later be replaced by its original one. Do NOT do this for | ||
| 837 | trap 0xff, since that indicates a compiled-in breakpoint which | ||
| 838 | will not be replaced (and we would retake the trap forever) */ | ||
| 839 | if ((excep_code == TRAP_VEC) && (trapa_value != (0x3c << 2))) | ||
| 840 | trap_registers.pc -= 2; | ||
| 841 | |||
| 842 | /* Undo any stepping we may have done */ | ||
| 843 | undo_single_step(); | ||
| 844 | |||
| 845 | while (1) { | ||
| 846 | out_buffer[0] = 0; | ||
| 847 | get_packet(in_buffer, BUFMAX); | ||
| 848 | |||
| 849 | /* Examine first char of buffer to see what we need to do */ | ||
| 850 | switch (in_buffer[0]) { | ||
| 851 | case '?': /* Send which signal we've received */ | ||
| 852 | send_signal_msg(sigval); | ||
| 853 | break; | ||
| 854 | |||
| 855 | case 'g': /* Return the values of the CPU registers */ | ||
| 856 | send_regs_msg(); | ||
| 857 | break; | ||
| 858 | |||
| 859 | case 'G': /* Set the value of the CPU registers */ | ||
| 860 | set_regs_msg(); | ||
| 861 | break; | ||
| 862 | |||
| 863 | case 'm': /* Read LLLL bytes address AA..AA */ | ||
| 864 | read_mem_msg(); | ||
| 865 | break; | ||
| 866 | |||
| 867 | case 'M': /* Write LLLL bytes address AA..AA, ret OK */ | ||
| 868 | write_mem_msg(0); /* 0 = data in hex */ | ||
| 869 | break; | ||
| 870 | |||
| 871 | case 'X': /* Write LLLL bytes esc bin address AA..AA */ | ||
| 872 | if (kgdb_bits == '8') | ||
| 873 | write_mem_msg(1); /* 1 = data in binary */ | ||
| 874 | else | ||
| 875 | send_empty_msg(); | ||
| 876 | break; | ||
| 877 | |||
| 878 | case 'C': /* Continue, signum included, we ignore it */ | ||
| 879 | continue_with_sig_msg(); | ||
| 880 | return; | ||
| 881 | |||
| 882 | case 'c': /* Continue at address AA..AA (optional) */ | ||
| 883 | continue_msg(); | ||
| 884 | return; | ||
| 885 | |||
| 886 | case 'S': /* Step, signum included, we ignore it */ | ||
| 887 | step_with_sig_msg(); | ||
| 888 | return; | ||
| 889 | |||
| 890 | case 's': /* Step one instruction from AA..AA */ | ||
| 891 | step_msg(); | ||
| 892 | return; | ||
| 893 | |||
| 894 | case 'k': /* 'Kill the program' with a kernel ? */ | ||
| 895 | break; | ||
| 896 | |||
| 897 | case 'D': /* Detach from program, send reply OK */ | ||
| 898 | kgdb_in_gdb_mode = 0; | ||
| 899 | send_ok_msg(); | ||
| 900 | get_debug_char(); | ||
| 901 | return; | ||
| 902 | |||
| 903 | default: | ||
| 904 | send_empty_msg(); | ||
| 905 | break; | ||
| 906 | } | ||
| 907 | } | ||
| 908 | } | ||
| 909 | |||
| 910 | /* There has been an exception, most likely a breakpoint. */ | ||
| 911 | static void handle_exception(struct pt_regs *regs) | ||
| 912 | { | ||
| 913 | int excep_code, vbr_val; | ||
| 914 | int count; | ||
| 915 | int trapa_value = ctrl_inl(TRA); | ||
| 916 | |||
| 917 | /* Copy kernel regs (from stack) */ | ||
| 918 | for (count = 0; count < 16; count++) | ||
| 919 | trap_registers.regs[count] = regs->regs[count]; | ||
| 920 | trap_registers.pc = regs->pc; | ||
| 921 | trap_registers.pr = regs->pr; | ||
| 922 | trap_registers.sr = regs->sr; | ||
| 923 | trap_registers.gbr = regs->gbr; | ||
| 924 | trap_registers.mach = regs->mach; | ||
| 925 | trap_registers.macl = regs->macl; | ||
| 926 | |||
| 927 | asm("stc vbr, %0":"=r"(vbr_val)); | ||
| 928 | trap_registers.vbr = vbr_val; | ||
| 929 | |||
| 930 | /* Get excode for command loop call, user access */ | ||
| 931 | asm("stc r2_bank, %0":"=r"(excep_code)); | ||
| 932 | |||
| 933 | /* Act on the exception */ | ||
| 934 | kgdb_command_loop(excep_code, trapa_value); | ||
| 935 | |||
| 936 | /* Copy back the (maybe modified) registers */ | ||
| 937 | for (count = 0; count < 16; count++) | ||
| 938 | regs->regs[count] = trap_registers.regs[count]; | ||
| 939 | regs->pc = trap_registers.pc; | ||
| 940 | regs->pr = trap_registers.pr; | ||
| 941 | regs->sr = trap_registers.sr; | ||
| 942 | regs->gbr = trap_registers.gbr; | ||
| 943 | regs->mach = trap_registers.mach; | ||
| 944 | regs->macl = trap_registers.macl; | ||
| 945 | |||
| 946 | vbr_val = trap_registers.vbr; | ||
| 947 | asm("ldc %0, vbr": :"r"(vbr_val)); | ||
| 948 | } | ||
| 949 | |||
| 950 | asmlinkage void kgdb_handle_exception(unsigned long r4, unsigned long r5, | ||
| 951 | unsigned long r6, unsigned long r7, | ||
| 952 | struct pt_regs __regs) | ||
| 953 | { | ||
| 954 | struct pt_regs *regs = RELOC_HIDE(&__regs, 0); | ||
| 955 | handle_exception(regs); | ||
| 956 | } | ||
| 957 | |||
| 958 | /* Initialise the KGDB data structures and serial configuration */ | ||
| 959 | int __init kgdb_init(void) | ||
| 960 | { | ||
| 961 | in_nmi = 0; | ||
| 962 | kgdb_nofault = 0; | ||
| 963 | stepped_opcode = 0; | ||
| 964 | kgdb_in_gdb_mode = 0; | ||
| 965 | |||
| 966 | if (kgdb_serial_setup() != 0) { | ||
| 967 | printk(KERN_NOTICE "KGDB: serial setup error\n"); | ||
| 968 | return -1; | ||
| 969 | } | ||
| 970 | |||
| 971 | /* Init ptr to exception handler */ | ||
| 972 | kgdb_debug_hook = handle_exception; | ||
| 973 | kgdb_bus_err_hook = kgdb_handle_bus_error; | ||
| 974 | |||
| 975 | /* Enter kgdb now if requested, or just report init done */ | ||
| 976 | printk(KERN_NOTICE "KGDB: stub is initialized.\n"); | ||
| 977 | |||
| 978 | return 0; | ||
| 979 | } | ||
| 980 | |||
| 981 | /* Make function available for "user messages"; console will use it too. */ | ||
| 982 | |||
| 983 | char gdbmsgbuf[BUFMAX]; | ||
| 984 | #define MAXOUT ((BUFMAX-2)/2) | ||
| 985 | |||
| 986 | static void kgdb_msg_write(const char *s, unsigned count) | ||
| 987 | { | ||
| 988 | int i; | ||
| 989 | int wcount; | ||
| 990 | char *bufptr; | ||
| 991 | |||
| 992 | /* 'O'utput */ | ||
| 993 | gdbmsgbuf[0] = 'O'; | ||
| 994 | |||
| 995 | /* Fill and send buffers... */ | ||
| 996 | while (count > 0) { | ||
| 997 | bufptr = gdbmsgbuf + 1; | ||
| 998 | |||
| 999 | /* Calculate how many this time */ | ||
| 1000 | wcount = (count > MAXOUT) ? MAXOUT : count; | ||
| 1001 | |||
| 1002 | /* Pack in hex chars */ | ||
| 1003 | for (i = 0; i < wcount; i++) | ||
| 1004 | bufptr = pack_hex_byte(bufptr, s[i]); | ||
| 1005 | *bufptr = '\0'; | ||
| 1006 | |||
| 1007 | /* Move up */ | ||
| 1008 | s += wcount; | ||
| 1009 | count -= wcount; | ||
| 1010 | |||
| 1011 | /* Write packet */ | ||
| 1012 | put_packet(gdbmsgbuf); | ||
| 1013 | } | ||
| 1014 | } | ||
| 1015 | |||
| 1016 | static void kgdb_to_gdb(const char *s) | ||
| 1017 | { | ||
| 1018 | kgdb_msg_write(s, strlen(s)); | ||
| 1019 | } | ||
| 1020 | |||
| 1021 | #ifdef CONFIG_SH_KGDB_CONSOLE | ||
| 1022 | void kgdb_console_write(struct console *co, const char *s, unsigned count) | ||
| 1023 | { | ||
| 1024 | /* Bail if we're not talking to GDB */ | ||
| 1025 | if (!kgdb_in_gdb_mode) | ||
| 1026 | return; | ||
| 1027 | |||
| 1028 | kgdb_msg_write(s, count); | ||
| 1029 | } | ||
| 1030 | #endif | ||
| 1031 | |||
| 1032 | #ifdef CONFIG_KGDB_SYSRQ | ||
| 1033 | static void sysrq_handle_gdb(int key, struct tty_struct *tty) | ||
| 1034 | { | ||
| 1035 | printk("Entering GDB stub\n"); | ||
| 1036 | breakpoint(); | ||
| 1037 | } | ||
| 1038 | |||
| 1039 | static struct sysrq_key_op sysrq_gdb_op = { | ||
| 1040 | .handler = sysrq_handle_gdb, | ||
| 1041 | .help_msg = "Gdb", | ||
| 1042 | .action_msg = "GDB", | ||
| 1043 | }; | ||
| 1044 | |||
| 1045 | static int gdb_register_sysrq(void) | ||
| 1046 | { | ||
| 1047 | printk("Registering GDB sysrq handler\n"); | ||
| 1048 | register_sysrq_key('g', &sysrq_gdb_op); | ||
| 1049 | return 0; | ||
| 1050 | } | ||
| 1051 | module_init(gdb_register_sysrq); | ||
| 1052 | #endif | ||
diff --git a/arch/sh/kernel/pm.c b/arch/sh/kernel/pm.c deleted file mode 100644 index 10ab62c9aede..000000000000 --- a/arch/sh/kernel/pm.c +++ /dev/null | |||
| @@ -1,88 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Generic Power Management Routine | ||
| 3 | * | ||
| 4 | * Copyright (c) 2006 Andriy Skulysh <askulsyh@gmail.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or | ||
| 7 | * modify it under the terms of the GNU General Public License. | ||
| 8 | */ | ||
| 9 | #include <linux/suspend.h> | ||
| 10 | #include <linux/delay.h> | ||
| 11 | #include <linux/gfp.h> | ||
| 12 | #include <asm/freq.h> | ||
| 13 | #include <asm/io.h> | ||
| 14 | #include <asm/watchdog.h> | ||
| 15 | #include <asm/pm.h> | ||
| 16 | |||
| 17 | #define INTR_OFFSET 0x600 | ||
| 18 | |||
| 19 | #define STBCR 0xffffff82 | ||
| 20 | #define STBCR2 0xffffff88 | ||
| 21 | |||
| 22 | #define STBCR_STBY 0x80 | ||
| 23 | #define STBCR_MSTP2 0x04 | ||
| 24 | |||
| 25 | #define MCR 0xffffff68 | ||
| 26 | #define RTCNT 0xffffff70 | ||
| 27 | |||
| 28 | #define MCR_RMODE 2 | ||
| 29 | #define MCR_RFSH 4 | ||
| 30 | |||
| 31 | void pm_enter(void) | ||
| 32 | { | ||
| 33 | u8 stbcr, csr; | ||
| 34 | u16 frqcr, mcr; | ||
| 35 | u32 vbr_new, vbr_old; | ||
| 36 | |||
| 37 | set_bl_bit(); | ||
| 38 | |||
| 39 | /* set wdt */ | ||
| 40 | csr = sh_wdt_read_csr(); | ||
| 41 | csr &= ~WTCSR_TME; | ||
| 42 | csr |= WTCSR_CKS_4096; | ||
| 43 | sh_wdt_write_csr(csr); | ||
| 44 | csr = sh_wdt_read_csr(); | ||
| 45 | sh_wdt_write_cnt(0); | ||
| 46 | |||
| 47 | /* disable PLL1 */ | ||
| 48 | frqcr = ctrl_inw(FRQCR); | ||
| 49 | frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY); | ||
| 50 | ctrl_outw(frqcr, FRQCR); | ||
| 51 | |||
| 52 | /* enable standby */ | ||
| 53 | stbcr = ctrl_inb(STBCR); | ||
| 54 | ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR); | ||
| 55 | |||
| 56 | /* set self-refresh */ | ||
| 57 | mcr = ctrl_inw(MCR); | ||
| 58 | ctrl_outw(mcr & ~MCR_RFSH, MCR); | ||
| 59 | |||
| 60 | /* set interrupt handler */ | ||
| 61 | asm volatile("stc vbr, %0" : "=r" (vbr_old)); | ||
| 62 | vbr_new = get_zeroed_page(GFP_ATOMIC); | ||
| 63 | udelay(50); | ||
| 64 | memcpy((void*)(vbr_new + INTR_OFFSET), | ||
| 65 | &wakeup_start, &wakeup_end - &wakeup_start); | ||
| 66 | asm volatile("ldc %0, vbr" : : "r" (vbr_new)); | ||
| 67 | |||
| 68 | ctrl_outw(0, RTCNT); | ||
| 69 | ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR); | ||
| 70 | |||
| 71 | cpu_sleep(); | ||
| 72 | |||
| 73 | asm volatile("ldc %0, vbr" : : "r" (vbr_old)); | ||
| 74 | |||
| 75 | free_page(vbr_new); | ||
| 76 | |||
| 77 | /* enable PLL1 */ | ||
| 78 | frqcr = ctrl_inw(FRQCR); | ||
| 79 | frqcr |= FRQCR_PSTBY; | ||
| 80 | ctrl_outw(frqcr, FRQCR); | ||
| 81 | udelay(50); | ||
| 82 | frqcr |= FRQCR_PLLEN; | ||
| 83 | ctrl_outw(frqcr, FRQCR); | ||
| 84 | |||
| 85 | ctrl_outb(stbcr, STBCR); | ||
| 86 | |||
| 87 | clear_bl_bit(); | ||
| 88 | } | ||
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c index b965f0282c7d..ddafbbbab2ab 100644 --- a/arch/sh/kernel/process_32.c +++ b/arch/sh/kernel/process_32.c | |||
| @@ -32,65 +32,8 @@ | |||
| 32 | #include <asm/fpu.h> | 32 | #include <asm/fpu.h> |
| 33 | #include <asm/syscalls.h> | 33 | #include <asm/syscalls.h> |
| 34 | 34 | ||
| 35 | static int hlt_counter; | ||
| 36 | int ubc_usercnt = 0; | 35 | int ubc_usercnt = 0; |
| 37 | 36 | ||
| 38 | void (*pm_idle)(void); | ||
| 39 | void (*pm_power_off)(void); | ||
| 40 | EXPORT_SYMBOL(pm_power_off); | ||
| 41 | |||
| 42 | static int __init nohlt_setup(char *__unused) | ||
| 43 | { | ||
| 44 | hlt_counter = 1; | ||
| 45 | return 1; | ||
| 46 | } | ||
| 47 | __setup("nohlt", nohlt_setup); | ||
| 48 | |||
| 49 | static int __init hlt_setup(char *__unused) | ||
| 50 | { | ||
| 51 | hlt_counter = 0; | ||
| 52 | return 1; | ||
| 53 | } | ||
| 54 | __setup("hlt", hlt_setup); | ||
| 55 | |||
| 56 | static void default_idle(void) | ||
| 57 | { | ||
| 58 | if (!hlt_counter) { | ||
| 59 | clear_thread_flag(TIF_POLLING_NRFLAG); | ||
| 60 | smp_mb__after_clear_bit(); | ||
| 61 | set_bl_bit(); | ||
| 62 | while (!need_resched()) | ||
| 63 | cpu_sleep(); | ||
| 64 | clear_bl_bit(); | ||
| 65 | set_thread_flag(TIF_POLLING_NRFLAG); | ||
| 66 | } else | ||
| 67 | while (!need_resched()) | ||
| 68 | cpu_relax(); | ||
| 69 | } | ||
| 70 | |||
| 71 | void cpu_idle(void) | ||
| 72 | { | ||
| 73 | set_thread_flag(TIF_POLLING_NRFLAG); | ||
| 74 | |||
| 75 | /* endless idle loop with no priority at all */ | ||
| 76 | while (1) { | ||
| 77 | void (*idle)(void) = pm_idle; | ||
| 78 | |||
| 79 | if (!idle) | ||
| 80 | idle = default_idle; | ||
| 81 | |||
| 82 | tick_nohz_stop_sched_tick(1); | ||
| 83 | while (!need_resched()) | ||
| 84 | idle(); | ||
| 85 | tick_nohz_restart_sched_tick(); | ||
| 86 | |||
| 87 | preempt_enable_no_resched(); | ||
| 88 | schedule(); | ||
| 89 | preempt_disable(); | ||
| 90 | check_pgt_cache(); | ||
| 91 | } | ||
| 92 | } | ||
| 93 | |||
| 94 | void machine_restart(char * __unused) | 37 | void machine_restart(char * __unused) |
| 95 | { | 38 | { |
| 96 | /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */ | 39 | /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */ |
| @@ -115,8 +58,8 @@ void machine_power_off(void) | |||
| 115 | void show_regs(struct pt_regs * regs) | 58 | void show_regs(struct pt_regs * regs) |
| 116 | { | 59 | { |
| 117 | printk("\n"); | 60 | printk("\n"); |
| 118 | printk("Pid : %d, Comm: %20s\n", task_pid_nr(current), current->comm); | 61 | printk("Pid : %d, Comm: \t\t%s\n", task_pid_nr(current), current->comm); |
| 119 | printk("CPU : %d %s (%s %.*s)\n", | 62 | printk("CPU : %d \t\t%s (%s %.*s)\n\n", |
| 120 | smp_processor_id(), print_tainted(), init_utsname()->release, | 63 | smp_processor_id(), print_tainted(), init_utsname()->release, |
| 121 | (int)strcspn(init_utsname()->version, " "), | 64 | (int)strcspn(init_utsname()->version, " "), |
| 122 | init_utsname()->version); | 65 | init_utsname()->version); |
| @@ -148,26 +91,16 @@ void show_regs(struct pt_regs * regs) | |||
| 148 | regs->mach, regs->macl, regs->gbr, regs->pr); | 91 | regs->mach, regs->macl, regs->gbr, regs->pr); |
| 149 | 92 | ||
| 150 | show_trace(NULL, (unsigned long *)regs->regs[15], regs); | 93 | show_trace(NULL, (unsigned long *)regs->regs[15], regs); |
| 94 | show_code(regs); | ||
| 151 | } | 95 | } |
| 152 | 96 | ||
| 153 | /* | 97 | /* |
| 154 | * Create a kernel thread | 98 | * Create a kernel thread |
| 155 | */ | 99 | */ |
| 156 | 100 | ATTRIB_NORET void kernel_thread_helper(void *arg, int (*fn)(void *)) | |
| 157 | /* | 101 | { |
| 158 | * This is the mechanism for creating a new kernel thread. | 102 | do_exit(fn(arg)); |
| 159 | * | 103 | } |
| 160 | */ | ||
| 161 | extern void kernel_thread_helper(void); | ||
| 162 | __asm__(".align 5\n" | ||
| 163 | "kernel_thread_helper:\n\t" | ||
| 164 | "jsr @r5\n\t" | ||
| 165 | " nop\n\t" | ||
| 166 | "mov.l 1f, r1\n\t" | ||
| 167 | "jsr @r1\n\t" | ||
| 168 | " mov r0, r4\n\t" | ||
| 169 | ".align 2\n\t" | ||
| 170 | "1:.long do_exit"); | ||
| 171 | 104 | ||
| 172 | /* Don't use this in BL=1(cli). Or else, CPU resets! */ | 105 | /* Don't use this in BL=1(cli). Or else, CPU resets! */ |
| 173 | int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags) | 106 | int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags) |
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c index b7aa09235b51..a7e5f2e74bac 100644 --- a/arch/sh/kernel/process_64.c +++ b/arch/sh/kernel/process_64.c | |||
| @@ -23,7 +23,6 @@ | |||
| 23 | #include <linux/reboot.h> | 23 | #include <linux/reboot.h> |
| 24 | #include <linux/init.h> | 24 | #include <linux/init.h> |
| 25 | #include <linux/module.h> | 25 | #include <linux/module.h> |
| 26 | #include <linux/proc_fs.h> | ||
| 27 | #include <linux/io.h> | 26 | #include <linux/io.h> |
| 28 | #include <asm/syscalls.h> | 27 | #include <asm/syscalls.h> |
| 29 | #include <asm/uaccess.h> | 28 | #include <asm/uaccess.h> |
| @@ -33,56 +32,6 @@ | |||
| 33 | 32 | ||
| 34 | struct task_struct *last_task_used_math = NULL; | 33 | struct task_struct *last_task_used_math = NULL; |
| 35 | 34 | ||
| 36 | static int hlt_counter = 1; | ||
| 37 | |||
| 38 | #define HARD_IDLE_TIMEOUT (HZ / 3) | ||
| 39 | |||
| 40 | static int __init nohlt_setup(char *__unused) | ||
| 41 | { | ||
| 42 | hlt_counter = 1; | ||
| 43 | return 1; | ||
| 44 | } | ||
| 45 | |||
| 46 | static int __init hlt_setup(char *__unused) | ||
| 47 | { | ||
| 48 | hlt_counter = 0; | ||
| 49 | return 1; | ||
| 50 | } | ||
| 51 | |||
| 52 | __setup("nohlt", nohlt_setup); | ||
| 53 | __setup("hlt", hlt_setup); | ||
| 54 | |||
| 55 | static inline void hlt(void) | ||
| 56 | { | ||
| 57 | __asm__ __volatile__ ("sleep" : : : "memory"); | ||
| 58 | } | ||
| 59 | |||
| 60 | /* | ||
| 61 | * The idle loop on a uniprocessor SH.. | ||
| 62 | */ | ||
| 63 | void cpu_idle(void) | ||
| 64 | { | ||
| 65 | /* endless idle loop with no priority at all */ | ||
| 66 | while (1) { | ||
| 67 | if (hlt_counter) { | ||
| 68 | while (!need_resched()) | ||
| 69 | cpu_relax(); | ||
| 70 | } else { | ||
| 71 | local_irq_disable(); | ||
| 72 | while (!need_resched()) { | ||
| 73 | local_irq_enable(); | ||
| 74 | hlt(); | ||
| 75 | local_irq_disable(); | ||
| 76 | } | ||
| 77 | local_irq_enable(); | ||
| 78 | } | ||
| 79 | preempt_enable_no_resched(); | ||
| 80 | schedule(); | ||
| 81 | preempt_disable(); | ||
| 82 | } | ||
| 83 | |||
| 84 | } | ||
| 85 | |||
| 86 | void machine_restart(char * __unused) | 35 | void machine_restart(char * __unused) |
| 87 | { | 36 | { |
| 88 | extern void phys_stext(void); | 37 | extern void phys_stext(void); |
| @@ -97,13 +46,6 @@ void machine_halt(void) | |||
| 97 | 46 | ||
| 98 | void machine_power_off(void) | 47 | void machine_power_off(void) |
| 99 | { | 48 | { |
| 100 | #if 0 | ||
| 101 | /* Disable watchdog timer */ | ||
| 102 | ctrl_outl(0xa5000000, WTCSR); | ||
| 103 | /* Configure deep standby on sleep */ | ||
| 104 | ctrl_outl(0x03, STBCR); | ||
| 105 | #endif | ||
| 106 | |||
| 107 | __asm__ __volatile__ ( | 49 | __asm__ __volatile__ ( |
| 108 | "sleep\n\t" | 50 | "sleep\n\t" |
| 109 | "synci\n\t" | 51 | "synci\n\t" |
| @@ -113,9 +55,6 @@ void machine_power_off(void) | |||
| 113 | panic("Unexpected wakeup!\n"); | 55 | panic("Unexpected wakeup!\n"); |
| 114 | } | 56 | } |
| 115 | 57 | ||
| 116 | void (*pm_power_off)(void) = machine_power_off; | ||
| 117 | EXPORT_SYMBOL(pm_power_off); | ||
| 118 | |||
| 119 | void show_regs(struct pt_regs * regs) | 58 | void show_regs(struct pt_regs * regs) |
| 120 | { | 59 | { |
| 121 | unsigned long long ah, al, bh, bl, ch, cl; | 60 | unsigned long long ah, al, bh, bl, ch, cl; |
| @@ -365,18 +304,6 @@ void show_regs(struct pt_regs * regs) | |||
| 365 | } | 304 | } |
| 366 | } | 305 | } |
| 367 | 306 | ||
| 368 | struct task_struct * alloc_task_struct(void) | ||
| 369 | { | ||
| 370 | /* Get task descriptor pages */ | ||
| 371 | return (struct task_struct *) | ||
| 372 | __get_free_pages(GFP_KERNEL, get_order(THREAD_SIZE)); | ||
| 373 | } | ||
| 374 | |||
| 375 | void free_task_struct(struct task_struct *p) | ||
| 376 | { | ||
| 377 | free_pages((unsigned long) p, get_order(THREAD_SIZE)); | ||
| 378 | } | ||
| 379 | |||
| 380 | /* | 307 | /* |
| 381 | * Create a kernel thread | 308 | * Create a kernel thread |
| 382 | */ | 309 | */ |
| @@ -662,41 +589,3 @@ unsigned long get_wchan(struct task_struct *p) | |||
| 662 | #endif | 589 | #endif |
| 663 | return pc; | 590 | return pc; |
| 664 | } | 591 | } |
| 665 | |||
| 666 | /* Provide a /proc/asids file that lists out the | ||
| 667 | ASIDs currently associated with the processes. (If the DM.PC register is | ||
| 668 | examined through the debug link, this shows ASID + PC. To make use of this, | ||
| 669 | the PID->ASID relationship needs to be known. This is primarily for | ||
| 670 | debugging.) | ||
| 671 | */ | ||
| 672 | |||
| 673 | #if defined(CONFIG_SH64_PROC_ASIDS) | ||
| 674 | static int | ||
| 675 | asids_proc_info(char *buf, char **start, off_t fpos, int length, int *eof, void *data) | ||
| 676 | { | ||
| 677 | int len=0; | ||
| 678 | struct task_struct *p; | ||
| 679 | read_lock(&tasklist_lock); | ||
| 680 | for_each_process(p) { | ||
| 681 | int pid = p->pid; | ||
| 682 | |||
| 683 | if (!pid) | ||
| 684 | continue; | ||
| 685 | if (p->mm) | ||
| 686 | len += sprintf(buf+len, "%5d : %02lx\n", pid, | ||
| 687 | asid_cache(smp_processor_id())); | ||
| 688 | else | ||
| 689 | len += sprintf(buf+len, "%5d : (none)\n", pid); | ||
| 690 | } | ||
| 691 | read_unlock(&tasklist_lock); | ||
| 692 | *eof = 1; | ||
| 693 | return len; | ||
| 694 | } | ||
| 695 | |||
| 696 | static int __init register_proc_asids(void) | ||
| 697 | { | ||
| 698 | create_proc_read_entry("asids", 0, NULL, asids_proc_info, NULL); | ||
| 699 | return 0; | ||
| 700 | } | ||
| 701 | __initcall(register_proc_asids); | ||
| 702 | #endif | ||
diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c index e15b099c1f06..695097438f02 100644 --- a/arch/sh/kernel/ptrace_64.c +++ b/arch/sh/kernel/ptrace_64.c | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | * arch/sh/kernel/ptrace_64.c | 2 | * arch/sh/kernel/ptrace_64.c |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2000, 2001 Paolo Alberelli | 4 | * Copyright (C) 2000, 2001 Paolo Alberelli |
| 5 | * Copyright (C) 2003 - 2007 Paul Mundt | 5 | * Copyright (C) 2003 - 2008 Paul Mundt |
| 6 | * | 6 | * |
| 7 | * Started from SH3/4 version: | 7 | * Started from SH3/4 version: |
| 8 | * SuperH version: Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka | 8 | * SuperH version: Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka |
| @@ -29,6 +29,8 @@ | |||
| 29 | #include <linux/audit.h> | 29 | #include <linux/audit.h> |
| 30 | #include <linux/seccomp.h> | 30 | #include <linux/seccomp.h> |
| 31 | #include <linux/tracehook.h> | 31 | #include <linux/tracehook.h> |
| 32 | #include <linux/elf.h> | ||
| 33 | #include <linux/regset.h> | ||
| 32 | #include <asm/io.h> | 34 | #include <asm/io.h> |
| 33 | #include <asm/uaccess.h> | 35 | #include <asm/uaccess.h> |
| 34 | #include <asm/pgtable.h> | 36 | #include <asm/pgtable.h> |
| @@ -137,6 +139,165 @@ void user_disable_single_step(struct task_struct *child) | |||
| 137 | regs->sr &= ~SR_SSTEP; | 139 | regs->sr &= ~SR_SSTEP; |
| 138 | } | 140 | } |
| 139 | 141 | ||
| 142 | static int genregs_get(struct task_struct *target, | ||
| 143 | const struct user_regset *regset, | ||
| 144 | unsigned int pos, unsigned int count, | ||
| 145 | void *kbuf, void __user *ubuf) | ||
| 146 | { | ||
| 147 | const struct pt_regs *regs = task_pt_regs(target); | ||
| 148 | int ret; | ||
| 149 | |||
| 150 | /* PC, SR, SYSCALL */ | ||
| 151 | ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, | ||
| 152 | ®s->pc, | ||
| 153 | 0, 3 * sizeof(unsigned long long)); | ||
| 154 | |||
| 155 | /* R1 -> R63 */ | ||
| 156 | if (!ret) | ||
| 157 | ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, | ||
| 158 | regs->regs, | ||
| 159 | offsetof(struct pt_regs, regs[0]), | ||
| 160 | 63 * sizeof(unsigned long long)); | ||
| 161 | /* TR0 -> TR7 */ | ||
| 162 | if (!ret) | ||
| 163 | ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, | ||
| 164 | regs->tregs, | ||
| 165 | offsetof(struct pt_regs, tregs[0]), | ||
| 166 | 8 * sizeof(unsigned long long)); | ||
| 167 | |||
| 168 | if (!ret) | ||
| 169 | ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, | ||
| 170 | sizeof(struct pt_regs), -1); | ||
| 171 | |||
| 172 | return ret; | ||
| 173 | } | ||
| 174 | |||
| 175 | static int genregs_set(struct task_struct *target, | ||
| 176 | const struct user_regset *regset, | ||
| 177 | unsigned int pos, unsigned int count, | ||
| 178 | const void *kbuf, const void __user *ubuf) | ||
| 179 | { | ||
| 180 | struct pt_regs *regs = task_pt_regs(target); | ||
| 181 | int ret; | ||
| 182 | |||
| 183 | /* PC, SR, SYSCALL */ | ||
| 184 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | ||
| 185 | ®s->pc, | ||
| 186 | 0, 3 * sizeof(unsigned long long)); | ||
| 187 | |||
| 188 | /* R1 -> R63 */ | ||
| 189 | if (!ret && count > 0) | ||
| 190 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | ||
| 191 | regs->regs, | ||
| 192 | offsetof(struct pt_regs, regs[0]), | ||
| 193 | 63 * sizeof(unsigned long long)); | ||
| 194 | |||
| 195 | /* TR0 -> TR7 */ | ||
| 196 | if (!ret && count > 0) | ||
| 197 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | ||
| 198 | regs->tregs, | ||
| 199 | offsetof(struct pt_regs, tregs[0]), | ||
| 200 | 8 * sizeof(unsigned long long)); | ||
| 201 | |||
| 202 | if (!ret) | ||
| 203 | ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, | ||
| 204 | sizeof(struct pt_regs), -1); | ||
| 205 | |||
| 206 | return ret; | ||
| 207 | } | ||
| 208 | |||
| 209 | #ifdef CONFIG_SH_FPU | ||
| 210 | int fpregs_get(struct task_struct *target, | ||
| 211 | const struct user_regset *regset, | ||
| 212 | unsigned int pos, unsigned int count, | ||
| 213 | void *kbuf, void __user *ubuf) | ||
| 214 | { | ||
| 215 | int ret; | ||
| 216 | |||
| 217 | ret = init_fpu(target); | ||
| 218 | if (ret) | ||
| 219 | return ret; | ||
| 220 | |||
| 221 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, | ||
| 222 | &target->thread.fpu.hard, 0, -1); | ||
| 223 | } | ||
| 224 | |||
| 225 | static int fpregs_set(struct task_struct *target, | ||
| 226 | const struct user_regset *regset, | ||
| 227 | unsigned int pos, unsigned int count, | ||
| 228 | const void *kbuf, const void __user *ubuf) | ||
| 229 | { | ||
| 230 | int ret; | ||
| 231 | |||
| 232 | ret = init_fpu(target); | ||
| 233 | if (ret) | ||
| 234 | return ret; | ||
| 235 | |||
| 236 | set_stopped_child_used_math(target); | ||
| 237 | |||
| 238 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, | ||
| 239 | &target->thread.fpu.hard, 0, -1); | ||
| 240 | } | ||
| 241 | |||
| 242 | static int fpregs_active(struct task_struct *target, | ||
| 243 | const struct user_regset *regset) | ||
| 244 | { | ||
| 245 | return tsk_used_math(target) ? regset->n : 0; | ||
| 246 | } | ||
| 247 | #endif | ||
| 248 | |||
| 249 | /* | ||
| 250 | * These are our native regset flavours. | ||
| 251 | */ | ||
| 252 | enum sh_regset { | ||
| 253 | REGSET_GENERAL, | ||
| 254 | #ifdef CONFIG_SH_FPU | ||
| 255 | REGSET_FPU, | ||
| 256 | #endif | ||
| 257 | }; | ||
| 258 | |||
| 259 | static const struct user_regset sh_regsets[] = { | ||
| 260 | /* | ||
| 261 | * Format is: | ||
| 262 | * PC, SR, SYSCALL, | ||
| 263 | * R1 --> R63, | ||
| 264 | * TR0 --> TR7, | ||
| 265 | */ | ||
| 266 | [REGSET_GENERAL] = { | ||
| 267 | .core_note_type = NT_PRSTATUS, | ||
| 268 | .n = ELF_NGREG, | ||
| 269 | .size = sizeof(long long), | ||
| 270 | .align = sizeof(long long), | ||
| 271 | .get = genregs_get, | ||
| 272 | .set = genregs_set, | ||
| 273 | }, | ||
| 274 | |||
| 275 | #ifdef CONFIG_SH_FPU | ||
| 276 | [REGSET_FPU] = { | ||
| 277 | .core_note_type = NT_PRFPREG, | ||
| 278 | .n = sizeof(struct user_fpu_struct) / | ||
| 279 | sizeof(long long), | ||
| 280 | .size = sizeof(long long), | ||
| 281 | .align = sizeof(long long), | ||
| 282 | .get = fpregs_get, | ||
| 283 | .set = fpregs_set, | ||
| 284 | .active = fpregs_active, | ||
| 285 | }, | ||
| 286 | #endif | ||
| 287 | }; | ||
| 288 | |||
| 289 | static const struct user_regset_view user_sh64_native_view = { | ||
| 290 | .name = "sh64", | ||
| 291 | .e_machine = EM_SH, | ||
| 292 | .regsets = sh_regsets, | ||
| 293 | .n = ARRAY_SIZE(sh_regsets), | ||
| 294 | }; | ||
| 295 | |||
| 296 | const struct user_regset_view *task_user_regset_view(struct task_struct *task) | ||
| 297 | { | ||
| 298 | return &user_sh64_native_view; | ||
| 299 | } | ||
| 300 | |||
| 140 | long arch_ptrace(struct task_struct *child, long request, long addr, long data) | 301 | long arch_ptrace(struct task_struct *child, long request, long addr, long data) |
| 141 | { | 302 | { |
| 142 | int ret; | 303 | int ret; |
| @@ -195,10 +356,33 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
| 195 | } | 356 | } |
| 196 | break; | 357 | break; |
| 197 | 358 | ||
| 359 | case PTRACE_GETREGS: | ||
| 360 | return copy_regset_to_user(child, &user_sh64_native_view, | ||
| 361 | REGSET_GENERAL, | ||
| 362 | 0, sizeof(struct pt_regs), | ||
| 363 | (void __user *)data); | ||
| 364 | case PTRACE_SETREGS: | ||
| 365 | return copy_regset_from_user(child, &user_sh64_native_view, | ||
| 366 | REGSET_GENERAL, | ||
| 367 | 0, sizeof(struct pt_regs), | ||
| 368 | (const void __user *)data); | ||
| 369 | #ifdef CONFIG_SH_FPU | ||
| 370 | case PTRACE_GETFPREGS: | ||
| 371 | return copy_regset_to_user(child, &user_sh64_native_view, | ||
| 372 | REGSET_FPU, | ||
| 373 | 0, sizeof(struct user_fpu_struct), | ||
| 374 | (void __user *)data); | ||
| 375 | case PTRACE_SETFPREGS: | ||
| 376 | return copy_regset_from_user(child, &user_sh64_native_view, | ||
| 377 | REGSET_FPU, | ||
| 378 | 0, sizeof(struct user_fpu_struct), | ||
| 379 | (const void __user *)data); | ||
| 380 | #endif | ||
| 198 | default: | 381 | default: |
| 199 | ret = ptrace_request(child, request, addr, data); | 382 | ret = ptrace_request(child, request, addr, data); |
| 200 | break; | 383 | break; |
| 201 | } | 384 | } |
| 385 | |||
| 202 | return ret; | 386 | return ret; |
| 203 | } | 387 | } |
| 204 | 388 | ||
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index e7152cc6930e..534247508572 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c | |||
| @@ -417,6 +417,7 @@ void __init setup_arch(char **cmdline_p) | |||
| 417 | } | 417 | } |
| 418 | 418 | ||
| 419 | static const char *cpu_name[] = { | 419 | static const char *cpu_name[] = { |
| 420 | [CPU_SH7201] = "SH7201", | ||
| 420 | [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263", | 421 | [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263", |
| 421 | [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619", | 422 | [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619", |
| 422 | [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", | 423 | [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", |
diff --git a/arch/sh/kernel/sh_bios.c b/arch/sh/kernel/sh_bios.c index d1bcac4fa269..c852f7805728 100644 --- a/arch/sh/kernel/sh_bios.c +++ b/arch/sh/kernel/sh_bios.c | |||
| @@ -8,69 +8,50 @@ | |||
| 8 | #include <linux/module.h> | 8 | #include <linux/module.h> |
| 9 | #include <asm/sh_bios.h> | 9 | #include <asm/sh_bios.h> |
| 10 | 10 | ||
| 11 | #define BIOS_CALL_CONSOLE_WRITE 0 | 11 | #define BIOS_CALL_CONSOLE_WRITE 0 |
| 12 | #define BIOS_CALL_READ_BLOCK 1 | ||
| 13 | #define BIOS_CALL_ETH_NODE_ADDR 10 | 12 | #define BIOS_CALL_ETH_NODE_ADDR 10 |
| 14 | #define BIOS_CALL_SHUTDOWN 11 | 13 | #define BIOS_CALL_SHUTDOWN 11 |
| 15 | #define BIOS_CALL_CHAR_OUT 0x1f /* TODO: hack */ | 14 | #define BIOS_CALL_CHAR_OUT 0x1f /* TODO: hack */ |
| 16 | #define BIOS_CALL_GDB_GET_MODE_PTR 0xfe | 15 | #define BIOS_CALL_GDB_DETACH 0xff |
| 17 | #define BIOS_CALL_GDB_DETACH 0xff | ||
| 18 | 16 | ||
| 19 | static __inline__ long sh_bios_call(long func, long arg0, long arg1, long arg2, long arg3) | 17 | static inline long sh_bios_call(long func, long arg0, long arg1, long arg2, |
| 18 | long arg3) | ||
| 20 | { | 19 | { |
| 21 | register long r0 __asm__("r0") = func; | 20 | register long r0 __asm__("r0") = func; |
| 22 | register long r4 __asm__("r4") = arg0; | 21 | register long r4 __asm__("r4") = arg0; |
| 23 | register long r5 __asm__("r5") = arg1; | 22 | register long r5 __asm__("r5") = arg1; |
| 24 | register long r6 __asm__("r6") = arg2; | 23 | register long r6 __asm__("r6") = arg2; |
| 25 | register long r7 __asm__("r7") = arg3; | 24 | register long r7 __asm__("r7") = arg3; |
| 26 | __asm__ __volatile__("trapa #0x3f" | 25 | |
| 27 | : "=z" (r0) | 26 | __asm__ __volatile__("trapa #0x3f":"=z"(r0) |
| 28 | : "0" (r0), "r" (r4), "r" (r5), "r" (r6), "r" (r7) | 27 | :"0"(r0), "r"(r4), "r"(r5), "r"(r6), "r"(r7) |
| 29 | : "memory"); | 28 | :"memory"); |
| 30 | return r0; | 29 | return r0; |
| 31 | } | 30 | } |
| 32 | 31 | ||
| 33 | |||
| 34 | void sh_bios_console_write(const char *buf, unsigned int len) | 32 | void sh_bios_console_write(const char *buf, unsigned int len) |
| 35 | { | 33 | { |
| 36 | sh_bios_call(BIOS_CALL_CONSOLE_WRITE, (long)buf, (long)len, 0, 0); | 34 | sh_bios_call(BIOS_CALL_CONSOLE_WRITE, (long)buf, (long)len, 0, 0); |
| 37 | } | 35 | } |
| 38 | 36 | ||
| 39 | |||
| 40 | void sh_bios_char_out(char ch) | 37 | void sh_bios_char_out(char ch) |
| 41 | { | 38 | { |
| 42 | sh_bios_call(BIOS_CALL_CHAR_OUT, ch, 0, 0, 0); | 39 | sh_bios_call(BIOS_CALL_CHAR_OUT, ch, 0, 0, 0); |
| 43 | } | ||
| 44 | |||
| 45 | |||
| 46 | int sh_bios_in_gdb_mode(void) | ||
| 47 | { | ||
| 48 | static char queried = 0; | ||
| 49 | static char *gdb_mode_p = 0; | ||
| 50 | |||
| 51 | if (!queried) | ||
| 52 | { | ||
| 53 | /* Query the gdb stub for address of its gdb mode variable */ | ||
| 54 | long r = sh_bios_call(BIOS_CALL_GDB_GET_MODE_PTR, 0, 0, 0, 0); | ||
| 55 | if (r != ~0) /* BIOS returns -1 for unknown function */ | ||
| 56 | gdb_mode_p = (char *)r; | ||
| 57 | queried = 1; | ||
| 58 | } | ||
| 59 | return (gdb_mode_p != 0 ? *gdb_mode_p : 0); | ||
| 60 | } | 40 | } |
| 61 | 41 | ||
| 62 | void sh_bios_gdb_detach(void) | 42 | void sh_bios_gdb_detach(void) |
| 63 | { | 43 | { |
| 64 | sh_bios_call(BIOS_CALL_GDB_DETACH, 0, 0, 0, 0); | 44 | sh_bios_call(BIOS_CALL_GDB_DETACH, 0, 0, 0, 0); |
| 65 | } | 45 | } |
| 66 | EXPORT_SYMBOL(sh_bios_gdb_detach); | 46 | EXPORT_SYMBOL_GPL(sh_bios_gdb_detach); |
| 67 | 47 | ||
| 68 | void sh_bios_get_node_addr (unsigned char *node_addr) | 48 | void sh_bios_get_node_addr(unsigned char *node_addr) |
| 69 | { | 49 | { |
| 70 | sh_bios_call(BIOS_CALL_ETH_NODE_ADDR, 0, (long)node_addr, 0, 0); | 50 | sh_bios_call(BIOS_CALL_ETH_NODE_ADDR, 0, (long)node_addr, 0, 0); |
| 71 | } | 51 | } |
| 52 | EXPORT_SYMBOL_GPL(sh_bios_get_node_addr); | ||
| 72 | 53 | ||
| 73 | void sh_bios_shutdown(unsigned int how) | 54 | void sh_bios_shutdown(unsigned int how) |
| 74 | { | 55 | { |
| 75 | sh_bios_call(BIOS_CALL_SHUTDOWN, how, 0, 0, 0); | 56 | sh_bios_call(BIOS_CALL_SHUTDOWN, how, 0, 0, 0); |
| 76 | } | 57 | } |
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c index 92ae5e6c099e..528de2955c81 100644 --- a/arch/sh/kernel/sh_ksyms_32.c +++ b/arch/sh/kernel/sh_ksyms_32.c | |||
| @@ -52,16 +52,12 @@ EXPORT_SYMBOL(__const_udelay); | |||
| 52 | 52 | ||
| 53 | #define DECLARE_EXPORT(name) \ | 53 | #define DECLARE_EXPORT(name) \ |
| 54 | extern void name(void);EXPORT_SYMBOL(name) | 54 | extern void name(void);EXPORT_SYMBOL(name) |
| 55 | #define MAYBE_DECLARE_EXPORT(name) \ | ||
| 56 | extern void name(void) __weak;EXPORT_SYMBOL(name) | ||
| 57 | 55 | ||
| 58 | /* These symbols are generated by the compiler itself */ | ||
| 59 | DECLARE_EXPORT(__udivsi3); | 56 | DECLARE_EXPORT(__udivsi3); |
| 60 | DECLARE_EXPORT(__sdivsi3); | 57 | DECLARE_EXPORT(__sdivsi3); |
| 58 | DECLARE_EXPORT(__lshrsi3); | ||
| 61 | DECLARE_EXPORT(__ashrsi3); | 59 | DECLARE_EXPORT(__ashrsi3); |
| 62 | DECLARE_EXPORT(__ashlsi3); | 60 | DECLARE_EXPORT(__ashlsi3); |
| 63 | DECLARE_EXPORT(__ashrdi3); | ||
| 64 | DECLARE_EXPORT(__ashldi3); | ||
| 65 | DECLARE_EXPORT(__ashiftrt_r4_6); | 61 | DECLARE_EXPORT(__ashiftrt_r4_6); |
| 66 | DECLARE_EXPORT(__ashiftrt_r4_7); | 62 | DECLARE_EXPORT(__ashiftrt_r4_7); |
| 67 | DECLARE_EXPORT(__ashiftrt_r4_8); | 63 | DECLARE_EXPORT(__ashiftrt_r4_8); |
| @@ -79,8 +75,7 @@ DECLARE_EXPORT(__ashiftrt_r4_23); | |||
| 79 | DECLARE_EXPORT(__ashiftrt_r4_24); | 75 | DECLARE_EXPORT(__ashiftrt_r4_24); |
| 80 | DECLARE_EXPORT(__ashiftrt_r4_27); | 76 | DECLARE_EXPORT(__ashiftrt_r4_27); |
| 81 | DECLARE_EXPORT(__ashiftrt_r4_30); | 77 | DECLARE_EXPORT(__ashiftrt_r4_30); |
| 82 | DECLARE_EXPORT(__lshrsi3); | 78 | DECLARE_EXPORT(__movstr); |
| 83 | DECLARE_EXPORT(__lshrdi3); | ||
| 84 | DECLARE_EXPORT(__movstrSI8); | 79 | DECLARE_EXPORT(__movstrSI8); |
| 85 | DECLARE_EXPORT(__movstrSI12); | 80 | DECLARE_EXPORT(__movstrSI12); |
| 86 | DECLARE_EXPORT(__movstrSI16); | 81 | DECLARE_EXPORT(__movstrSI16); |
| @@ -95,31 +90,17 @@ DECLARE_EXPORT(__movstrSI48); | |||
| 95 | DECLARE_EXPORT(__movstrSI52); | 90 | DECLARE_EXPORT(__movstrSI52); |
| 96 | DECLARE_EXPORT(__movstrSI56); | 91 | DECLARE_EXPORT(__movstrSI56); |
| 97 | DECLARE_EXPORT(__movstrSI60); | 92 | DECLARE_EXPORT(__movstrSI60); |
| 98 | #if __GNUC__ == 4 | 93 | DECLARE_EXPORT(__movstr_i4_even); |
| 99 | DECLARE_EXPORT(__movmem); | 94 | DECLARE_EXPORT(__movstr_i4_odd); |
| 100 | #else | 95 | DECLARE_EXPORT(__movstrSI12_i4); |
| 101 | DECLARE_EXPORT(__movstr); | ||
| 102 | #endif | ||
| 103 | |||
| 104 | #if __GNUC__ == 4 | ||
| 105 | DECLARE_EXPORT(__movmem_i4_even); | 96 | DECLARE_EXPORT(__movmem_i4_even); |
| 106 | DECLARE_EXPORT(__movmem_i4_odd); | 97 | DECLARE_EXPORT(__movmem_i4_odd); |
| 107 | DECLARE_EXPORT(__movmemSI12_i4); | 98 | DECLARE_EXPORT(__movmemSI12_i4); |
| 108 | |||
| 109 | #if (__GNUC_MINOR__ >= 2 || defined(__GNUC_STM_RELEASE__)) | ||
| 110 | /* | ||
| 111 | * GCC >= 4.2 emits these for division, as do GCC 4.1.x versions of the ST | ||
| 112 | * compiler which include backported patches. | ||
| 113 | */ | ||
| 114 | DECLARE_EXPORT(__udiv_qrnnd_16); | 99 | DECLARE_EXPORT(__udiv_qrnnd_16); |
| 115 | MAYBE_DECLARE_EXPORT(__sdivsi3_i4i); | 100 | DECLARE_EXPORT(__sdivsi3_i4); |
| 116 | MAYBE_DECLARE_EXPORT(__udivsi3_i4i); | 101 | DECLARE_EXPORT(__udivsi3_i4); |
| 117 | #endif | 102 | DECLARE_EXPORT(__sdivsi3_i4i); |
| 118 | #else /* GCC 3.x */ | 103 | DECLARE_EXPORT(__udivsi3_i4i); |
| 119 | DECLARE_EXPORT(__movstr_i4_even); | ||
| 120 | DECLARE_EXPORT(__movstr_i4_odd); | ||
| 121 | DECLARE_EXPORT(__movstrSI12_i4); | ||
| 122 | #endif /* __GNUC__ == 4 */ | ||
| 123 | 104 | ||
| 124 | #if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \ | 105 | #if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \ |
| 125 | defined(CONFIG_SH7705_CACHE_32KB)) | 106 | defined(CONFIG_SH7705_CACHE_32KB)) |
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c index 9324d32adacc..0d74d6b8774e 100644 --- a/arch/sh/kernel/sh_ksyms_64.c +++ b/arch/sh/kernel/sh_ksyms_64.c | |||
| @@ -65,15 +65,16 @@ EXPORT_SYMBOL(copy_page); | |||
| 65 | EXPORT_SYMBOL(__copy_user); | 65 | EXPORT_SYMBOL(__copy_user); |
| 66 | EXPORT_SYMBOL(empty_zero_page); | 66 | EXPORT_SYMBOL(empty_zero_page); |
| 67 | EXPORT_SYMBOL(memcpy); | 67 | EXPORT_SYMBOL(memcpy); |
| 68 | EXPORT_SYMBOL(memset); | ||
| 68 | EXPORT_SYMBOL(__udelay); | 69 | EXPORT_SYMBOL(__udelay); |
| 69 | EXPORT_SYMBOL(__ndelay); | 70 | EXPORT_SYMBOL(__ndelay); |
| 70 | EXPORT_SYMBOL(__const_udelay); | 71 | EXPORT_SYMBOL(__const_udelay); |
| 72 | EXPORT_SYMBOL(strlen); | ||
| 73 | EXPORT_SYMBOL(strcpy); | ||
| 71 | 74 | ||
| 72 | /* Ugh. These come in from libgcc.a at link time. */ | 75 | /* Ugh. These come in from libgcc.a at link time. */ |
| 73 | #define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name) | 76 | #define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name) |
| 74 | 77 | ||
| 75 | DECLARE_EXPORT(__sdivsi3); | 78 | DECLARE_EXPORT(__sdivsi3); |
| 76 | DECLARE_EXPORT(__sdivsi3_2); | ||
| 77 | DECLARE_EXPORT(__muldi3); | ||
| 78 | DECLARE_EXPORT(__udivsi3); | 79 | DECLARE_EXPORT(__udivsi3); |
| 79 | DECLARE_EXPORT(__div_table); | 80 | DECLARE_EXPORT(__div_table); |
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c index 69d09c0b3498..77c21bde376a 100644 --- a/arch/sh/kernel/signal_32.c +++ b/arch/sh/kernel/signal_32.c | |||
| @@ -533,7 +533,6 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, | |||
| 533 | { | 533 | { |
| 534 | int ret; | 534 | int ret; |
| 535 | 535 | ||
| 536 | |||
| 537 | /* Set up the stack frame */ | 536 | /* Set up the stack frame */ |
| 538 | if (ka->sa.sa_flags & SA_SIGINFO) | 537 | if (ka->sa.sa_flags & SA_SIGINFO) |
| 539 | ret = setup_rt_frame(sig, ka, info, oldset, regs); | 538 | ret = setup_rt_frame(sig, ka, info, oldset, regs); |
diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c index ce3e851dffcb..b22fdfaaa191 100644 --- a/arch/sh/kernel/signal_64.c +++ b/arch/sh/kernel/signal_64.c | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | * arch/sh/kernel/signal_64.c | 2 | * arch/sh/kernel/signal_64.c |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2000, 2001 Paolo Alberelli | 4 | * Copyright (C) 2000, 2001 Paolo Alberelli |
| 5 | * Copyright (C) 2003 Paul Mundt | 5 | * Copyright (C) 2003 - 2008 Paul Mundt |
| 6 | * Copyright (C) 2004 Richard Curnow | 6 | * Copyright (C) 2004 Richard Curnow |
| 7 | * | 7 | * |
| 8 | * This file is subject to the terms and conditions of the GNU General Public | 8 | * This file is subject to the terms and conditions of the GNU General Public |
| @@ -43,10 +43,38 @@ | |||
| 43 | 43 | ||
| 44 | #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) | 44 | #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) |
| 45 | 45 | ||
| 46 | static void | 46 | static int |
| 47 | handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka, | 47 | handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka, |
| 48 | sigset_t *oldset, struct pt_regs * regs); | 48 | sigset_t *oldset, struct pt_regs * regs); |
| 49 | 49 | ||
| 50 | static inline void | ||
| 51 | handle_syscall_restart(struct pt_regs *regs, struct sigaction *sa) | ||
| 52 | { | ||
| 53 | /* If we're not from a syscall, bail out */ | ||
| 54 | if (regs->syscall_nr < 0) | ||
| 55 | return; | ||
| 56 | |||
| 57 | /* check for system call restart.. */ | ||
| 58 | switch (regs->regs[REG_RET]) { | ||
| 59 | case -ERESTART_RESTARTBLOCK: | ||
| 60 | case -ERESTARTNOHAND: | ||
| 61 | no_system_call_restart: | ||
| 62 | regs->regs[REG_RET] = -EINTR; | ||
| 63 | regs->sr |= 1; | ||
| 64 | break; | ||
| 65 | |||
| 66 | case -ERESTARTSYS: | ||
| 67 | if (!(sa->sa_flags & SA_RESTART)) | ||
| 68 | goto no_system_call_restart; | ||
| 69 | /* fallthrough */ | ||
| 70 | case -ERESTARTNOINTR: | ||
| 71 | /* Decode syscall # */ | ||
| 72 | regs->regs[REG_RET] = regs->syscall_nr; | ||
| 73 | regs->pc -= 4; | ||
| 74 | break; | ||
| 75 | } | ||
| 76 | } | ||
| 77 | |||
| 50 | /* | 78 | /* |
| 51 | * Note that 'init' is a special process: it doesn't get signals it doesn't | 79 | * Note that 'init' is a special process: it doesn't get signals it doesn't |
| 52 | * want to handle. Thus you cannot kill init even with a SIGKILL even by | 80 | * want to handle. Thus you cannot kill init even with a SIGKILL even by |
| @@ -80,21 +108,23 @@ static int do_signal(struct pt_regs *regs, sigset_t *oldset) | |||
| 80 | oldset = ¤t->blocked; | 108 | oldset = ¤t->blocked; |
| 81 | 109 | ||
| 82 | signr = get_signal_to_deliver(&info, &ka, regs, 0); | 110 | signr = get_signal_to_deliver(&info, &ka, regs, 0); |
| 83 | |||
| 84 | if (signr > 0) { | 111 | if (signr > 0) { |
| 85 | /* Whee! Actually deliver the signal. */ | 112 | if (regs->sr & 1) |
| 86 | handle_signal(signr, &info, &ka, oldset, regs); | 113 | handle_syscall_restart(regs, &ka.sa); |
| 87 | 114 | ||
| 88 | /* | 115 | /* Whee! Actually deliver the signal. */ |
| 89 | * If a signal was successfully delivered, the saved sigmask | 116 | if (handle_signal(signr, &info, &ka, oldset, regs) == 0) { |
| 90 | * is in its frame, and we can clear the TIF_RESTORE_SIGMASK | 117 | /* |
| 91 | * flag. | 118 | * If a signal was successfully delivered, the |
| 92 | */ | 119 | * saved sigmask is in its frame, and we can |
| 93 | if (test_thread_flag(TIF_RESTORE_SIGMASK)) | 120 | * clear the TIF_RESTORE_SIGMASK flag. |
| 94 | clear_thread_flag(TIF_RESTORE_SIGMASK); | 121 | */ |
| 95 | 122 | if (test_thread_flag(TIF_RESTORE_SIGMASK)) | |
| 96 | tracehook_signal_handler(signr, &info, &ka, regs, 0); | 123 | clear_thread_flag(TIF_RESTORE_SIGMASK); |
| 97 | return 1; | 124 | |
| 125 | tracehook_signal_handler(signr, &info, &ka, regs, 0); | ||
| 126 | return 1; | ||
| 127 | } | ||
| 98 | } | 128 | } |
| 99 | 129 | ||
| 100 | no_signal: | 130 | no_signal: |
| @@ -129,7 +159,6 @@ no_signal: | |||
| 129 | /* | 159 | /* |
| 130 | * Atomically swap in the new signal mask, and wait for a signal. | 160 | * Atomically swap in the new signal mask, and wait for a signal. |
| 131 | */ | 161 | */ |
| 132 | |||
| 133 | asmlinkage int | 162 | asmlinkage int |
| 134 | sys_sigsuspend(old_sigset_t mask, | 163 | sys_sigsuspend(old_sigset_t mask, |
| 135 | unsigned long r3, unsigned long r4, unsigned long r5, | 164 | unsigned long r3, unsigned long r4, unsigned long r5, |
| @@ -235,20 +264,16 @@ sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, | |||
| 235 | return do_sigaltstack(uss, uoss, REF_REG_SP); | 264 | return do_sigaltstack(uss, uoss, REF_REG_SP); |
| 236 | } | 265 | } |
| 237 | 266 | ||
| 238 | |||
| 239 | /* | 267 | /* |
| 240 | * Do a signal return; undo the signal stack. | 268 | * Do a signal return; undo the signal stack. |
| 241 | */ | 269 | */ |
| 242 | 270 | struct sigframe { | |
| 243 | struct sigframe | ||
| 244 | { | ||
| 245 | struct sigcontext sc; | 271 | struct sigcontext sc; |
| 246 | unsigned long extramask[_NSIG_WORDS-1]; | 272 | unsigned long extramask[_NSIG_WORDS-1]; |
| 247 | long long retcode[2]; | 273 | long long retcode[2]; |
| 248 | }; | 274 | }; |
| 249 | 275 | ||
| 250 | struct rt_sigframe | 276 | struct rt_sigframe { |
| 251 | { | ||
| 252 | struct siginfo __user *pinfo; | 277 | struct siginfo __user *pinfo; |
| 253 | void *puc; | 278 | void *puc; |
| 254 | struct siginfo info; | 279 | struct siginfo info; |
| @@ -450,7 +475,6 @@ badframe: | |||
| 450 | /* | 475 | /* |
| 451 | * Set up a signal frame. | 476 | * Set up a signal frame. |
| 452 | */ | 477 | */ |
| 453 | |||
| 454 | static int | 478 | static int |
| 455 | setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs, | 479 | setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs, |
| 456 | unsigned long mask) | 480 | unsigned long mask) |
| @@ -504,8 +528,8 @@ get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size) | |||
| 504 | void sa_default_restorer(void); /* See comments below */ | 528 | void sa_default_restorer(void); /* See comments below */ |
| 505 | void sa_default_rt_restorer(void); /* See comments below */ | 529 | void sa_default_rt_restorer(void); /* See comments below */ |
| 506 | 530 | ||
| 507 | static void setup_frame(int sig, struct k_sigaction *ka, | 531 | static int setup_frame(int sig, struct k_sigaction *ka, |
| 508 | sigset_t *set, struct pt_regs *regs) | 532 | sigset_t *set, struct pt_regs *regs) |
| 509 | { | 533 | { |
| 510 | struct sigframe __user *frame; | 534 | struct sigframe __user *frame; |
| 511 | int err = 0; | 535 | int err = 0; |
| @@ -596,23 +620,21 @@ static void setup_frame(int sig, struct k_sigaction *ka, | |||
| 596 | 620 | ||
| 597 | set_fs(USER_DS); | 621 | set_fs(USER_DS); |
| 598 | 622 | ||
| 599 | #if DEBUG_SIG | ||
| 600 | /* Broken %016Lx */ | 623 | /* Broken %016Lx */ |
| 601 | printk("SIG deliver (#%d,%s:%d): sp=%p pc=%08Lx%08Lx link=%08Lx%08Lx\n", | 624 | pr_debug("SIG deliver (#%d,%s:%d): sp=%p pc=%08Lx%08Lx link=%08Lx%08Lx\n", |
| 602 | signal, | 625 | signal, current->comm, current->pid, frame, |
| 603 | current->comm, current->pid, frame, | 626 | regs->pc >> 32, regs->pc & 0xffffffff, |
| 604 | regs->pc >> 32, regs->pc & 0xffffffff, | 627 | DEREF_REG_PR >> 32, DEREF_REG_PR & 0xffffffff); |
| 605 | DEREF_REG_PR >> 32, DEREF_REG_PR & 0xffffffff); | ||
| 606 | #endif | ||
| 607 | 628 | ||
| 608 | return; | 629 | return 0; |
| 609 | 630 | ||
| 610 | give_sigsegv: | 631 | give_sigsegv: |
| 611 | force_sigsegv(sig, current); | 632 | force_sigsegv(sig, current); |
| 633 | return -EFAULT; | ||
| 612 | } | 634 | } |
| 613 | 635 | ||
| 614 | static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | 636 | static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, |
| 615 | sigset_t *set, struct pt_regs *regs) | 637 | sigset_t *set, struct pt_regs *regs) |
| 616 | { | 638 | { |
| 617 | struct rt_sigframe __user *frame; | 639 | struct rt_sigframe __user *frame; |
| 618 | int err = 0; | 640 | int err = 0; |
| @@ -702,62 +724,46 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
| 702 | 724 | ||
| 703 | set_fs(USER_DS); | 725 | set_fs(USER_DS); |
| 704 | 726 | ||
| 705 | #if DEBUG_SIG | 727 | pr_debug("SIG deliver (#%d,%s:%d): sp=%p pc=%08Lx%08Lx link=%08Lx%08Lx\n", |
| 706 | /* Broken %016Lx */ | 728 | signal, current->comm, current->pid, frame, |
| 707 | printk("SIG deliver (#%d,%s:%d): sp=%p pc=%08Lx%08Lx link=%08Lx%08Lx\n", | 729 | regs->pc >> 32, regs->pc & 0xffffffff, |
| 708 | signal, | 730 | DEREF_REG_PR >> 32, DEREF_REG_PR & 0xffffffff); |
| 709 | current->comm, current->pid, frame, | ||
| 710 | regs->pc >> 32, regs->pc & 0xffffffff, | ||
| 711 | DEREF_REG_PR >> 32, DEREF_REG_PR & 0xffffffff); | ||
| 712 | #endif | ||
| 713 | 731 | ||
| 714 | return; | 732 | return 0; |
| 715 | 733 | ||
| 716 | give_sigsegv: | 734 | give_sigsegv: |
| 717 | force_sigsegv(sig, current); | 735 | force_sigsegv(sig, current); |
| 736 | return -EFAULT; | ||
| 718 | } | 737 | } |
| 719 | 738 | ||
| 720 | /* | 739 | /* |
| 721 | * OK, we're invoking a handler | 740 | * OK, we're invoking a handler |
| 722 | */ | 741 | */ |
| 723 | 742 | static int | |
| 724 | static void | ||
| 725 | handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka, | 743 | handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka, |
| 726 | sigset_t *oldset, struct pt_regs * regs) | 744 | sigset_t *oldset, struct pt_regs * regs) |
| 727 | { | 745 | { |
| 728 | /* Are we from a system call? */ | 746 | int ret; |
| 729 | if (regs->syscall_nr >= 0) { | ||
| 730 | /* If so, check system call restarting.. */ | ||
| 731 | switch (regs->regs[REG_RET]) { | ||
| 732 | case -ERESTART_RESTARTBLOCK: | ||
| 733 | case -ERESTARTNOHAND: | ||
| 734 | no_system_call_restart: | ||
| 735 | regs->regs[REG_RET] = -EINTR; | ||
| 736 | break; | ||
| 737 | |||
| 738 | case -ERESTARTSYS: | ||
| 739 | if (!(ka->sa.sa_flags & SA_RESTART)) | ||
| 740 | goto no_system_call_restart; | ||
| 741 | /* fallthrough */ | ||
| 742 | case -ERESTARTNOINTR: | ||
| 743 | /* Decode syscall # */ | ||
| 744 | regs->regs[REG_RET] = regs->syscall_nr; | ||
| 745 | regs->pc -= 4; | ||
| 746 | } | ||
| 747 | } | ||
| 748 | 747 | ||
| 749 | /* Set up the stack frame */ | 748 | /* Set up the stack frame */ |
| 750 | if (ka->sa.sa_flags & SA_SIGINFO) | 749 | if (ka->sa.sa_flags & SA_SIGINFO) |
| 751 | setup_rt_frame(sig, ka, info, oldset, regs); | 750 | ret = setup_rt_frame(sig, ka, info, oldset, regs); |
| 752 | else | 751 | else |
| 753 | setup_frame(sig, ka, oldset, regs); | 752 | ret = setup_frame(sig, ka, oldset, regs); |
| 753 | |||
| 754 | if (ka->sa.sa_flags & SA_ONESHOT) | ||
| 755 | ka->sa.sa_handler = SIG_DFL; | ||
| 756 | |||
| 757 | if (ret == 0) { | ||
| 758 | spin_lock_irq(¤t->sighand->siglock); | ||
| 759 | sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); | ||
| 760 | if (!(ka->sa.sa_flags & SA_NODEFER)) | ||
| 761 | sigaddset(¤t->blocked,sig); | ||
| 762 | recalc_sigpending(); | ||
| 763 | spin_unlock_irq(¤t->sighand->siglock); | ||
| 764 | } | ||
| 754 | 765 | ||
| 755 | spin_lock_irq(¤t->sighand->siglock); | 766 | return ret; |
| 756 | sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); | ||
| 757 | if (!(ka->sa.sa_flags & SA_NODEFER)) | ||
| 758 | sigaddset(¤t->blocked,sig); | ||
| 759 | recalc_sigpending(); | ||
| 760 | spin_unlock_irq(¤t->sighand->siglock); | ||
| 761 | } | 767 | } |
| 762 | 768 | ||
| 763 | asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags) | 769 | asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags) |
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c index 38f098c9c72d..58dfc02c7af1 100644 --- a/arch/sh/kernel/sys_sh.c +++ b/arch/sh/kernel/sys_sh.c | |||
| @@ -22,102 +22,10 @@ | |||
| 22 | #include <linux/module.h> | 22 | #include <linux/module.h> |
| 23 | #include <linux/fs.h> | 23 | #include <linux/fs.h> |
| 24 | #include <linux/ipc.h> | 24 | #include <linux/ipc.h> |
| 25 | #include <asm/cacheflush.h> | ||
| 26 | #include <asm/syscalls.h> | 25 | #include <asm/syscalls.h> |
| 27 | #include <asm/uaccess.h> | 26 | #include <asm/uaccess.h> |
| 28 | #include <asm/unistd.h> | 27 | #include <asm/unistd.h> |
| 29 | 28 | ||
| 30 | unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */ | ||
| 31 | EXPORT_SYMBOL(shm_align_mask); | ||
| 32 | |||
| 33 | #ifdef CONFIG_MMU | ||
| 34 | /* | ||
| 35 | * To avoid cache aliases, we map the shared page with same color. | ||
| 36 | */ | ||
| 37 | #define COLOUR_ALIGN(addr, pgoff) \ | ||
| 38 | ((((addr) + shm_align_mask) & ~shm_align_mask) + \ | ||
| 39 | (((pgoff) << PAGE_SHIFT) & shm_align_mask)) | ||
| 40 | |||
| 41 | unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, | ||
| 42 | unsigned long len, unsigned long pgoff, unsigned long flags) | ||
| 43 | { | ||
| 44 | struct mm_struct *mm = current->mm; | ||
| 45 | struct vm_area_struct *vma; | ||
| 46 | unsigned long start_addr; | ||
| 47 | int do_colour_align; | ||
| 48 | |||
| 49 | if (flags & MAP_FIXED) { | ||
| 50 | /* We do not accept a shared mapping if it would violate | ||
| 51 | * cache aliasing constraints. | ||
| 52 | */ | ||
| 53 | if ((flags & MAP_SHARED) && (addr & shm_align_mask)) | ||
| 54 | return -EINVAL; | ||
| 55 | return addr; | ||
| 56 | } | ||
| 57 | |||
| 58 | if (unlikely(len > TASK_SIZE)) | ||
| 59 | return -ENOMEM; | ||
| 60 | |||
| 61 | do_colour_align = 0; | ||
| 62 | if (filp || (flags & MAP_SHARED)) | ||
| 63 | do_colour_align = 1; | ||
| 64 | |||
| 65 | if (addr) { | ||
| 66 | if (do_colour_align) | ||
| 67 | addr = COLOUR_ALIGN(addr, pgoff); | ||
| 68 | else | ||
| 69 | addr = PAGE_ALIGN(addr); | ||
| 70 | |||
| 71 | vma = find_vma(mm, addr); | ||
| 72 | if (TASK_SIZE - len >= addr && | ||
| 73 | (!vma || addr + len <= vma->vm_start)) | ||
| 74 | return addr; | ||
| 75 | } | ||
| 76 | |||
| 77 | if (len > mm->cached_hole_size) { | ||
| 78 | start_addr = addr = mm->free_area_cache; | ||
| 79 | } else { | ||
| 80 | mm->cached_hole_size = 0; | ||
| 81 | start_addr = addr = TASK_UNMAPPED_BASE; | ||
| 82 | } | ||
| 83 | |||
| 84 | full_search: | ||
| 85 | if (do_colour_align) | ||
| 86 | addr = COLOUR_ALIGN(addr, pgoff); | ||
| 87 | else | ||
| 88 | addr = PAGE_ALIGN(mm->free_area_cache); | ||
| 89 | |||
| 90 | for (vma = find_vma(mm, addr); ; vma = vma->vm_next) { | ||
| 91 | /* At this point: (!vma || addr < vma->vm_end). */ | ||
| 92 | if (unlikely(TASK_SIZE - len < addr)) { | ||
| 93 | /* | ||
| 94 | * Start a new search - just in case we missed | ||
| 95 | * some holes. | ||
| 96 | */ | ||
| 97 | if (start_addr != TASK_UNMAPPED_BASE) { | ||
| 98 | start_addr = addr = TASK_UNMAPPED_BASE; | ||
| 99 | mm->cached_hole_size = 0; | ||
| 100 | goto full_search; | ||
| 101 | } | ||
| 102 | return -ENOMEM; | ||
| 103 | } | ||
| 104 | if (likely(!vma || addr + len <= vma->vm_start)) { | ||
| 105 | /* | ||
| 106 | * Remember the place where we stopped the search: | ||
| 107 | */ | ||
| 108 | mm->free_area_cache = addr + len; | ||
| 109 | return addr; | ||
| 110 | } | ||
| 111 | if (addr + mm->cached_hole_size < vma->vm_start) | ||
| 112 | mm->cached_hole_size = vma->vm_start - addr; | ||
| 113 | |||
| 114 | addr = vma->vm_end; | ||
| 115 | if (do_colour_align) | ||
| 116 | addr = COLOUR_ALIGN(addr, pgoff); | ||
| 117 | } | ||
| 118 | } | ||
| 119 | #endif /* CONFIG_MMU */ | ||
| 120 | |||
| 121 | static inline long | 29 | static inline long |
| 122 | do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, | 30 | do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, |
| 123 | unsigned long flags, int fd, unsigned long pgoff) | 31 | unsigned long flags, int fd, unsigned long pgoff) |
diff --git a/arch/sh/kernel/time_32.c b/arch/sh/kernel/time_32.c index 23ca711c27d2..8457f83242c5 100644 --- a/arch/sh/kernel/time_32.c +++ b/arch/sh/kernel/time_32.c | |||
| @@ -125,11 +125,6 @@ void handle_timer_tick(void) | |||
| 125 | if (current->pid) | 125 | if (current->pid) |
| 126 | profile_tick(CPU_PROFILING); | 126 | profile_tick(CPU_PROFILING); |
| 127 | 127 | ||
| 128 | #ifdef CONFIG_HEARTBEAT | ||
| 129 | if (sh_mv.mv_heartbeat != NULL) | ||
| 130 | sh_mv.mv_heartbeat(); | ||
| 131 | #endif | ||
| 132 | |||
| 133 | /* | 128 | /* |
| 134 | * Here we are in the timer irq handler. We just have irqs locally | 129 | * Here we are in the timer irq handler. We just have irqs locally |
| 135 | * disabled but we don't know if the timer_bh is running on the other | 130 | * disabled but we don't know if the timer_bh is running on the other |
| @@ -277,11 +272,4 @@ void __init time_init(void) | |||
| 277 | ((sh_hpt_frequency + 500) / 1000) / 1000, | 272 | ((sh_hpt_frequency + 500) / 1000) / 1000, |
| 278 | ((sh_hpt_frequency + 500) / 1000) % 1000); | 273 | ((sh_hpt_frequency + 500) / 1000) % 1000); |
| 279 | 274 | ||
| 280 | #if defined(CONFIG_SH_KGDB) | ||
| 281 | /* | ||
| 282 | * Set up kgdb as requested. We do it here because the serial | ||
| 283 | * init uses the timer vars we just set up for figuring baud. | ||
| 284 | */ | ||
| 285 | kgdb_init(); | ||
| 286 | #endif | ||
| 287 | } | 275 | } |
diff --git a/arch/sh/kernel/time_64.c b/arch/sh/kernel/time_64.c index bbb2af1004d9..59d2a03e8b3c 100644 --- a/arch/sh/kernel/time_64.c +++ b/arch/sh/kernel/time_64.c | |||
| @@ -240,11 +240,6 @@ static inline void do_timer_interrupt(void) | |||
| 240 | 240 | ||
| 241 | do_timer(1); | 241 | do_timer(1); |
| 242 | 242 | ||
| 243 | #ifdef CONFIG_HEARTBEAT | ||
| 244 | if (sh_mv.mv_heartbeat != NULL) | ||
| 245 | sh_mv.mv_heartbeat(); | ||
| 246 | #endif | ||
| 247 | |||
| 248 | /* | 243 | /* |
| 249 | * If we have an externally synchronized Linux clock, then update | 244 | * If we have an externally synchronized Linux clock, then update |
| 250 | * RTC clock accordingly every ~11 minutes. Set_rtc_mmss() has to be | 245 | * RTC clock accordingly every ~11 minutes. Set_rtc_mmss() has to be |
diff --git a/arch/sh/kernel/timers/timer-mtu2.c b/arch/sh/kernel/timers/timer-mtu2.c index fe453c01f9c9..c3d237e1d566 100644 --- a/arch/sh/kernel/timers/timer-mtu2.c +++ b/arch/sh/kernel/timers/timer-mtu2.c | |||
| @@ -34,7 +34,12 @@ | |||
| 34 | #define MTU2_TIER_1 0xfffe4384 | 34 | #define MTU2_TIER_1 0xfffe4384 |
| 35 | #define MTU2_TSR_1 0xfffe4385 | 35 | #define MTU2_TSR_1 0xfffe4385 |
| 36 | #define MTU2_TCNT_1 0xfffe4386 /* 16-bit counter */ | 36 | #define MTU2_TCNT_1 0xfffe4386 /* 16-bit counter */ |
| 37 | |||
| 38 | #if defined(CONFIG_CPU_SUBTYPE_SH7201) | ||
| 39 | #define MTU2_TGRA_1 0xfffe4388 | ||
| 40 | #else | ||
| 37 | #define MTU2_TGRA_1 0xfffe438a | 41 | #define MTU2_TGRA_1 0xfffe438a |
| 42 | #endif | ||
| 38 | 43 | ||
| 39 | #define STBCR3 0xfffe0408 | 44 | #define STBCR3 0xfffe0408 |
| 40 | 45 | ||
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c index 1e5c74efbacc..88807a2aacc3 100644 --- a/arch/sh/kernel/traps_32.c +++ b/arch/sh/kernel/traps_32.c | |||
| @@ -28,17 +28,6 @@ | |||
| 28 | #include <asm/fpu.h> | 28 | #include <asm/fpu.h> |
| 29 | #include <asm/kprobes.h> | 29 | #include <asm/kprobes.h> |
| 30 | 30 | ||
| 31 | #ifdef CONFIG_SH_KGDB | ||
| 32 | #include <asm/kgdb.h> | ||
| 33 | #define CHK_REMOTE_DEBUG(regs) \ | ||
| 34 | { \ | ||
| 35 | if (kgdb_debug_hook && !user_mode(regs))\ | ||
| 36 | (*kgdb_debug_hook)(regs); \ | ||
| 37 | } | ||
| 38 | #else | ||
| 39 | #define CHK_REMOTE_DEBUG(regs) | ||
| 40 | #endif | ||
| 41 | |||
| 42 | #ifdef CONFIG_CPU_SH2 | 31 | #ifdef CONFIG_CPU_SH2 |
| 43 | # define TRAP_RESERVED_INST 4 | 32 | # define TRAP_RESERVED_INST 4 |
| 44 | # define TRAP_ILLEGAL_SLOT_INST 6 | 33 | # define TRAP_ILLEGAL_SLOT_INST 6 |
| @@ -94,7 +83,6 @@ void die(const char * str, struct pt_regs * regs, long err) | |||
| 94 | 83 | ||
| 95 | printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter); | 84 | printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter); |
| 96 | 85 | ||
| 97 | CHK_REMOTE_DEBUG(regs); | ||
| 98 | print_modules(); | 86 | print_modules(); |
| 99 | show_regs(regs); | 87 | show_regs(regs); |
| 100 | 88 | ||
| @@ -683,13 +671,12 @@ asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5, | |||
| 683 | error_code = lookup_exception_vector(); | 671 | error_code = lookup_exception_vector(); |
| 684 | 672 | ||
| 685 | local_irq_enable(); | 673 | local_irq_enable(); |
| 686 | CHK_REMOTE_DEBUG(regs); | ||
| 687 | force_sig(SIGILL, tsk); | 674 | force_sig(SIGILL, tsk); |
| 688 | die_if_no_fixup("reserved instruction", regs, error_code); | 675 | die_if_no_fixup("reserved instruction", regs, error_code); |
| 689 | } | 676 | } |
| 690 | 677 | ||
| 691 | #ifdef CONFIG_SH_FPU_EMU | 678 | #ifdef CONFIG_SH_FPU_EMU |
| 692 | static int emulate_branch(unsigned short inst, struct pt_regs* regs) | 679 | static int emulate_branch(unsigned short inst, struct pt_regs *regs) |
| 693 | { | 680 | { |
| 694 | /* | 681 | /* |
| 695 | * bfs: 8fxx: PC+=d*2+4; | 682 | * bfs: 8fxx: PC+=d*2+4; |
| @@ -702,27 +689,32 @@ static int emulate_branch(unsigned short inst, struct pt_regs* regs) | |||
| 702 | * jsr: 4x0b: PC=Rn after PR=PC+4; | 689 | * jsr: 4x0b: PC=Rn after PR=PC+4; |
| 703 | * rts: 000b: PC=PR; | 690 | * rts: 000b: PC=PR; |
| 704 | */ | 691 | */ |
| 705 | if ((inst & 0xfd00) == 0x8d00) { | 692 | if (((inst & 0xf000) == 0xb000) || /* bsr */ |
| 693 | ((inst & 0xf0ff) == 0x0003) || /* bsrf */ | ||
| 694 | ((inst & 0xf0ff) == 0x400b)) /* jsr */ | ||
| 695 | regs->pr = regs->pc + 4; | ||
| 696 | |||
| 697 | if ((inst & 0xfd00) == 0x8d00) { /* bfs, bts */ | ||
| 706 | regs->pc += SH_PC_8BIT_OFFSET(inst); | 698 | regs->pc += SH_PC_8BIT_OFFSET(inst); |
| 707 | return 0; | 699 | return 0; |
| 708 | } | 700 | } |
| 709 | 701 | ||
| 710 | if ((inst & 0xe000) == 0xa000) { | 702 | if ((inst & 0xe000) == 0xa000) { /* bra, bsr */ |
| 711 | regs->pc += SH_PC_12BIT_OFFSET(inst); | 703 | regs->pc += SH_PC_12BIT_OFFSET(inst); |
| 712 | return 0; | 704 | return 0; |
| 713 | } | 705 | } |
| 714 | 706 | ||
| 715 | if ((inst & 0xf0df) == 0x0003) { | 707 | if ((inst & 0xf0df) == 0x0003) { /* braf, bsrf */ |
| 716 | regs->pc += regs->regs[(inst & 0x0f00) >> 8] + 4; | 708 | regs->pc += regs->regs[(inst & 0x0f00) >> 8] + 4; |
| 717 | return 0; | 709 | return 0; |
| 718 | } | 710 | } |
| 719 | 711 | ||
| 720 | if ((inst & 0xf0df) == 0x400b) { | 712 | if ((inst & 0xf0df) == 0x400b) { /* jmp, jsr */ |
| 721 | regs->pc = regs->regs[(inst & 0x0f00) >> 8]; | 713 | regs->pc = regs->regs[(inst & 0x0f00) >> 8]; |
| 722 | return 0; | 714 | return 0; |
| 723 | } | 715 | } |
| 724 | 716 | ||
| 725 | if ((inst & 0xffff) == 0x000b) { | 717 | if ((inst & 0xffff) == 0x000b) { /* rts */ |
| 726 | regs->pc = regs->pr; | 718 | regs->pc = regs->pr; |
| 727 | return 0; | 719 | return 0; |
| 728 | } | 720 | } |
| @@ -756,7 +748,6 @@ asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5, | |||
| 756 | inst = lookup_exception_vector(); | 748 | inst = lookup_exception_vector(); |
| 757 | 749 | ||
| 758 | local_irq_enable(); | 750 | local_irq_enable(); |
| 759 | CHK_REMOTE_DEBUG(regs); | ||
| 760 | force_sig(SIGILL, tsk); | 751 | force_sig(SIGILL, tsk); |
| 761 | die_if_no_fixup("illegal slot instruction", regs, inst); | 752 | die_if_no_fixup("illegal slot instruction", regs, inst); |
| 762 | } | 753 | } |
| @@ -868,10 +859,7 @@ void show_trace(struct task_struct *tsk, unsigned long *sp, | |||
| 868 | if (regs && user_mode(regs)) | 859 | if (regs && user_mode(regs)) |
| 869 | return; | 860 | return; |
| 870 | 861 | ||
| 871 | printk("\nCall trace: "); | 862 | printk("\nCall trace:\n"); |
| 872 | #ifdef CONFIG_KALLSYMS | ||
| 873 | printk("\n"); | ||
| 874 | #endif | ||
| 875 | 863 | ||
| 876 | while (!kstack_end(sp)) { | 864 | while (!kstack_end(sp)) { |
| 877 | addr = *sp++; | 865 | addr = *sp++; |
diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile index 8596cc78e18d..aaea580b65bb 100644 --- a/arch/sh/lib/Makefile +++ b/arch/sh/lib/Makefile | |||
| @@ -5,12 +5,26 @@ | |||
| 5 | lib-y = delay.o memset.o memmove.o memchr.o \ | 5 | lib-y = delay.o memset.o memmove.o memchr.o \ |
| 6 | checksum.o strlen.o div64.o div64-generic.o | 6 | checksum.o strlen.o div64.o div64-generic.o |
| 7 | 7 | ||
| 8 | # Extracted from libgcc | ||
| 9 | lib-y += movmem.o ashldi3.o ashrdi3.o lshrdi3.o \ | ||
| 10 | ashlsi3.o ashrsi3.o ashiftrt.o lshrsi3.o \ | ||
| 11 | udiv_qrnnd.o | ||
| 12 | |||
| 13 | udivsi3-y := udivsi3_i4i-Os.o | ||
| 14 | |||
| 15 | ifneq ($(CONFIG_CC_OPTIMIZE_FOR_SIZE),y) | ||
| 16 | udivsi3-$(CONFIG_CPU_SH3) := udivsi3_i4i.o | ||
| 17 | udivsi3-$(CONFIG_CPU_SH4) := udivsi3_i4i.o | ||
| 18 | endif | ||
| 19 | udivsi3-y += udivsi3.o | ||
| 20 | |||
| 8 | obj-y += io.o | 21 | obj-y += io.o |
| 9 | 22 | ||
| 10 | memcpy-y := memcpy.o | 23 | memcpy-y := memcpy.o |
| 11 | memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o | 24 | memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o |
| 12 | 25 | ||
| 13 | lib-$(CONFIG_MMU) += copy_page.o clear_page.o | 26 | lib-$(CONFIG_MMU) += copy_page.o clear_page.o |
| 14 | lib-y += $(memcpy-y) | 27 | lib-$(CONFIG_FUNCTION_TRACER) += mcount.o |
| 28 | lib-y += $(memcpy-y) $(udivsi3-y) | ||
| 15 | 29 | ||
| 16 | EXTRA_CFLAGS += -Werror | 30 | EXTRA_CFLAGS += -Werror |
diff --git a/arch/sh/lib/ashiftrt.S b/arch/sh/lib/ashiftrt.S new file mode 100644 index 000000000000..45ce86558f46 --- /dev/null +++ b/arch/sh/lib/ashiftrt.S | |||
| @@ -0,0 +1,149 @@ | |||
| 1 | /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, | ||
| 2 | 2004, 2005, 2006 | ||
| 3 | Free Software Foundation, Inc. | ||
| 4 | |||
| 5 | This file is free software; you can redistribute it and/or modify it | ||
| 6 | under the terms of the GNU General Public License as published by the | ||
| 7 | Free Software Foundation; either version 2, or (at your option) any | ||
| 8 | later version. | ||
| 9 | |||
| 10 | In addition to the permissions in the GNU General Public License, the | ||
| 11 | Free Software Foundation gives you unlimited permission to link the | ||
| 12 | compiled version of this file into combinations with other programs, | ||
| 13 | and to distribute those combinations without any restriction coming | ||
| 14 | from the use of this file. (The General Public License restrictions | ||
| 15 | do apply in other respects; for example, they cover modification of | ||
| 16 | the file, and distribution when not linked into a combine | ||
| 17 | executable.) | ||
| 18 | |||
| 19 | This file is distributed in the hope that it will be useful, but | ||
| 20 | WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 21 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 22 | General Public License for more details. | ||
| 23 | |||
| 24 | You should have received a copy of the GNU General Public License | ||
| 25 | along with this program; see the file COPYING. If not, write to | ||
| 26 | the Free Software Foundation, 51 Franklin Street, Fifth Floor, | ||
| 27 | Boston, MA 02110-1301, USA. */ | ||
| 28 | |||
| 29 | !! libgcc routines for the Renesas / SuperH SH CPUs. | ||
| 30 | !! Contributed by Steve Chamberlain. | ||
| 31 | !! sac@cygnus.com | ||
| 32 | |||
| 33 | !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines | ||
| 34 | !! recoded in assembly by Toshiyasu Morita | ||
| 35 | !! tm@netcom.com | ||
| 36 | |||
| 37 | /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and | ||
| 38 | ELF local label prefixes by J"orn Rennecke | ||
| 39 | amylaar@cygnus.com */ | ||
| 40 | |||
| 41 | .global __ashiftrt_r4_0 | ||
| 42 | .global __ashiftrt_r4_1 | ||
| 43 | .global __ashiftrt_r4_2 | ||
| 44 | .global __ashiftrt_r4_3 | ||
| 45 | .global __ashiftrt_r4_4 | ||
| 46 | .global __ashiftrt_r4_5 | ||
| 47 | .global __ashiftrt_r4_6 | ||
| 48 | .global __ashiftrt_r4_7 | ||
| 49 | .global __ashiftrt_r4_8 | ||
| 50 | .global __ashiftrt_r4_9 | ||
| 51 | .global __ashiftrt_r4_10 | ||
| 52 | .global __ashiftrt_r4_11 | ||
| 53 | .global __ashiftrt_r4_12 | ||
| 54 | .global __ashiftrt_r4_13 | ||
| 55 | .global __ashiftrt_r4_14 | ||
| 56 | .global __ashiftrt_r4_15 | ||
| 57 | .global __ashiftrt_r4_16 | ||
| 58 | .global __ashiftrt_r4_17 | ||
| 59 | .global __ashiftrt_r4_18 | ||
| 60 | .global __ashiftrt_r4_19 | ||
| 61 | .global __ashiftrt_r4_20 | ||
| 62 | .global __ashiftrt_r4_21 | ||
| 63 | .global __ashiftrt_r4_22 | ||
| 64 | .global __ashiftrt_r4_23 | ||
| 65 | .global __ashiftrt_r4_24 | ||
| 66 | .global __ashiftrt_r4_25 | ||
| 67 | .global __ashiftrt_r4_26 | ||
| 68 | .global __ashiftrt_r4_27 | ||
| 69 | .global __ashiftrt_r4_28 | ||
| 70 | .global __ashiftrt_r4_29 | ||
| 71 | .global __ashiftrt_r4_30 | ||
| 72 | .global __ashiftrt_r4_31 | ||
| 73 | .global __ashiftrt_r4_32 | ||
| 74 | |||
| 75 | .align 1 | ||
| 76 | __ashiftrt_r4_32: | ||
| 77 | __ashiftrt_r4_31: | ||
| 78 | rotcl r4 | ||
| 79 | rts | ||
| 80 | subc r4,r4 | ||
| 81 | __ashiftrt_r4_30: | ||
| 82 | shar r4 | ||
| 83 | __ashiftrt_r4_29: | ||
| 84 | shar r4 | ||
| 85 | __ashiftrt_r4_28: | ||
| 86 | shar r4 | ||
| 87 | __ashiftrt_r4_27: | ||
| 88 | shar r4 | ||
| 89 | __ashiftrt_r4_26: | ||
| 90 | shar r4 | ||
| 91 | __ashiftrt_r4_25: | ||
| 92 | shar r4 | ||
| 93 | __ashiftrt_r4_24: | ||
| 94 | shlr16 r4 | ||
| 95 | shlr8 r4 | ||
| 96 | rts | ||
| 97 | exts.b r4,r4 | ||
| 98 | __ashiftrt_r4_23: | ||
| 99 | shar r4 | ||
| 100 | __ashiftrt_r4_22: | ||
| 101 | shar r4 | ||
| 102 | __ashiftrt_r4_21: | ||
| 103 | shar r4 | ||
| 104 | __ashiftrt_r4_20: | ||
| 105 | shar r4 | ||
| 106 | __ashiftrt_r4_19: | ||
| 107 | shar r4 | ||
| 108 | __ashiftrt_r4_18: | ||
| 109 | shar r4 | ||
| 110 | __ashiftrt_r4_17: | ||
| 111 | shar r4 | ||
| 112 | __ashiftrt_r4_16: | ||
| 113 | shlr16 r4 | ||
| 114 | rts | ||
| 115 | exts.w r4,r4 | ||
| 116 | __ashiftrt_r4_15: | ||
| 117 | shar r4 | ||
| 118 | __ashiftrt_r4_14: | ||
| 119 | shar r4 | ||
| 120 | __ashiftrt_r4_13: | ||
| 121 | shar r4 | ||
| 122 | __ashiftrt_r4_12: | ||
| 123 | shar r4 | ||
| 124 | __ashiftrt_r4_11: | ||
| 125 | shar r4 | ||
| 126 | __ashiftrt_r4_10: | ||
| 127 | shar r4 | ||
| 128 | __ashiftrt_r4_9: | ||
| 129 | shar r4 | ||
| 130 | __ashiftrt_r4_8: | ||
| 131 | shar r4 | ||
| 132 | __ashiftrt_r4_7: | ||
| 133 | shar r4 | ||
| 134 | __ashiftrt_r4_6: | ||
| 135 | shar r4 | ||
| 136 | __ashiftrt_r4_5: | ||
| 137 | shar r4 | ||
| 138 | __ashiftrt_r4_4: | ||
| 139 | shar r4 | ||
| 140 | __ashiftrt_r4_3: | ||
| 141 | shar r4 | ||
| 142 | __ashiftrt_r4_2: | ||
| 143 | shar r4 | ||
| 144 | __ashiftrt_r4_1: | ||
| 145 | rts | ||
| 146 | shar r4 | ||
| 147 | __ashiftrt_r4_0: | ||
| 148 | rts | ||
| 149 | nop | ||
diff --git a/arch/sh/lib/ashldi3.c b/arch/sh/lib/ashldi3.c new file mode 100644 index 000000000000..beb80f316095 --- /dev/null +++ b/arch/sh/lib/ashldi3.c | |||
| @@ -0,0 +1,29 @@ | |||
| 1 | #include <linux/module.h> | ||
| 2 | |||
| 3 | #include "libgcc.h" | ||
| 4 | |||
| 5 | long long __ashldi3(long long u, word_type b) | ||
| 6 | { | ||
| 7 | DWunion uu, w; | ||
| 8 | word_type bm; | ||
| 9 | |||
| 10 | if (b == 0) | ||
| 11 | return u; | ||
| 12 | |||
| 13 | uu.ll = u; | ||
| 14 | bm = 32 - b; | ||
| 15 | |||
| 16 | if (bm <= 0) { | ||
| 17 | w.s.low = 0; | ||
| 18 | w.s.high = (unsigned int) uu.s.low << -bm; | ||
| 19 | } else { | ||
| 20 | const unsigned int carries = (unsigned int) uu.s.low >> bm; | ||
| 21 | |||
| 22 | w.s.low = (unsigned int) uu.s.low << b; | ||
| 23 | w.s.high = ((unsigned int) uu.s.high << b) | carries; | ||
| 24 | } | ||
| 25 | |||
| 26 | return w.ll; | ||
| 27 | } | ||
| 28 | |||
| 29 | EXPORT_SYMBOL(__ashldi3); | ||
diff --git a/arch/sh/lib/ashlsi3.S b/arch/sh/lib/ashlsi3.S new file mode 100644 index 000000000000..bd47e9b403a5 --- /dev/null +++ b/arch/sh/lib/ashlsi3.S | |||
| @@ -0,0 +1,193 @@ | |||
| 1 | /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, | ||
| 2 | 2004, 2005, 2006 | ||
| 3 | Free Software Foundation, Inc. | ||
| 4 | |||
| 5 | This file is free software; you can redistribute it and/or modify it | ||
| 6 | under the terms of the GNU General Public License as published by the | ||
| 7 | Free Software Foundation; either version 2, or (at your option) any | ||
| 8 | later version. | ||
| 9 | |||
| 10 | In addition to the permissions in the GNU General Public License, the | ||
| 11 | Free Software Foundation gives you unlimited permission to link the | ||
| 12 | compiled version of this file into combinations with other programs, | ||
| 13 | and to distribute those combinations without any restriction coming | ||
| 14 | from the use of this file. (The General Public License restrictions | ||
| 15 | do apply in other respects; for example, they cover modification of | ||
| 16 | the file, and distribution when not linked into a combine | ||
| 17 | executable.) | ||
| 18 | |||
| 19 | This file is distributed in the hope that it will be useful, but | ||
| 20 | WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 21 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 22 | General Public License for more details. | ||
| 23 | |||
| 24 | You should have received a copy of the GNU General Public License | ||
| 25 | along with this program; see the file COPYING. If not, write to | ||
| 26 | the Free Software Foundation, 51 Franklin Street, Fifth Floor, | ||
| 27 | Boston, MA 02110-1301, USA. */ | ||
| 28 | |||
| 29 | !! libgcc routines for the Renesas / SuperH SH CPUs. | ||
| 30 | !! Contributed by Steve Chamberlain. | ||
| 31 | !! sac@cygnus.com | ||
| 32 | |||
| 33 | !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines | ||
| 34 | !! recoded in assembly by Toshiyasu Morita | ||
| 35 | !! tm@netcom.com | ||
| 36 | |||
| 37 | /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and | ||
| 38 | ELF local label prefixes by J"orn Rennecke | ||
| 39 | amylaar@cygnus.com */ | ||
| 40 | |||
| 41 | ! | ||
| 42 | ! __ashlsi3 | ||
| 43 | ! | ||
| 44 | ! Entry: | ||
| 45 | ! | ||
| 46 | ! r4: Value to shift | ||
| 47 | ! r5: Shifts | ||
| 48 | ! | ||
| 49 | ! Exit: | ||
| 50 | ! | ||
| 51 | ! r0: Result | ||
| 52 | ! | ||
| 53 | ! Destroys: | ||
| 54 | ! | ||
| 55 | ! (none) | ||
| 56 | ! | ||
| 57 | .global __ashlsi3 | ||
| 58 | |||
| 59 | .align 2 | ||
| 60 | __ashlsi3: | ||
| 61 | mov #31,r0 | ||
| 62 | and r0,r5 | ||
| 63 | mova ashlsi3_table,r0 | ||
| 64 | mov.b @(r0,r5),r5 | ||
| 65 | #ifdef __sh1__ | ||
| 66 | add r5,r0 | ||
| 67 | jmp @r0 | ||
| 68 | #else | ||
| 69 | braf r5 | ||
| 70 | #endif | ||
| 71 | mov r4,r0 | ||
| 72 | |||
| 73 | .align 2 | ||
| 74 | ashlsi3_table: | ||
| 75 | .byte ashlsi3_0-ashlsi3_table | ||
| 76 | .byte ashlsi3_1-ashlsi3_table | ||
| 77 | .byte ashlsi3_2-ashlsi3_table | ||
| 78 | .byte ashlsi3_3-ashlsi3_table | ||
| 79 | .byte ashlsi3_4-ashlsi3_table | ||
| 80 | .byte ashlsi3_5-ashlsi3_table | ||
| 81 | .byte ashlsi3_6-ashlsi3_table | ||
| 82 | .byte ashlsi3_7-ashlsi3_table | ||
| 83 | .byte ashlsi3_8-ashlsi3_table | ||
| 84 | .byte ashlsi3_9-ashlsi3_table | ||
| 85 | .byte ashlsi3_10-ashlsi3_table | ||
| 86 | .byte ashlsi3_11-ashlsi3_table | ||
| 87 | .byte ashlsi3_12-ashlsi3_table | ||
| 88 | .byte ashlsi3_13-ashlsi3_table | ||
| 89 | .byte ashlsi3_14-ashlsi3_table | ||
| 90 | .byte ashlsi3_15-ashlsi3_table | ||
| 91 | .byte ashlsi3_16-ashlsi3_table | ||
| 92 | .byte ashlsi3_17-ashlsi3_table | ||
| 93 | .byte ashlsi3_18-ashlsi3_table | ||
| 94 | .byte ashlsi3_19-ashlsi3_table | ||
| 95 | .byte ashlsi3_20-ashlsi3_table | ||
| 96 | .byte ashlsi3_21-ashlsi3_table | ||
| 97 | .byte ashlsi3_22-ashlsi3_table | ||
| 98 | .byte ashlsi3_23-ashlsi3_table | ||
| 99 | .byte ashlsi3_24-ashlsi3_table | ||
| 100 | .byte ashlsi3_25-ashlsi3_table | ||
| 101 | .byte ashlsi3_26-ashlsi3_table | ||
| 102 | .byte ashlsi3_27-ashlsi3_table | ||
| 103 | .byte ashlsi3_28-ashlsi3_table | ||
| 104 | .byte ashlsi3_29-ashlsi3_table | ||
| 105 | .byte ashlsi3_30-ashlsi3_table | ||
| 106 | .byte ashlsi3_31-ashlsi3_table | ||
| 107 | |||
| 108 | ashlsi3_6: | ||
| 109 | shll2 r0 | ||
| 110 | ashlsi3_4: | ||
| 111 | shll2 r0 | ||
| 112 | ashlsi3_2: | ||
| 113 | rts | ||
| 114 | shll2 r0 | ||
| 115 | |||
| 116 | ashlsi3_7: | ||
| 117 | shll2 r0 | ||
| 118 | ashlsi3_5: | ||
| 119 | shll2 r0 | ||
| 120 | ashlsi3_3: | ||
| 121 | shll2 r0 | ||
| 122 | ashlsi3_1: | ||
| 123 | rts | ||
| 124 | shll r0 | ||
| 125 | |||
| 126 | ashlsi3_14: | ||
| 127 | shll2 r0 | ||
| 128 | ashlsi3_12: | ||
| 129 | shll2 r0 | ||
| 130 | ashlsi3_10: | ||
| 131 | shll2 r0 | ||
| 132 | ashlsi3_8: | ||
| 133 | rts | ||
| 134 | shll8 r0 | ||
| 135 | |||
| 136 | ashlsi3_15: | ||
| 137 | shll2 r0 | ||
| 138 | ashlsi3_13: | ||
| 139 | shll2 r0 | ||
| 140 | ashlsi3_11: | ||
| 141 | shll2 r0 | ||
| 142 | ashlsi3_9: | ||
| 143 | shll8 r0 | ||
| 144 | rts | ||
| 145 | shll r0 | ||
| 146 | |||
| 147 | ashlsi3_22: | ||
| 148 | shll2 r0 | ||
| 149 | ashlsi3_20: | ||
| 150 | shll2 r0 | ||
| 151 | ashlsi3_18: | ||
| 152 | shll2 r0 | ||
| 153 | ashlsi3_16: | ||
| 154 | rts | ||
| 155 | shll16 r0 | ||
| 156 | |||
| 157 | ashlsi3_23: | ||
| 158 | shll2 r0 | ||
| 159 | ashlsi3_21: | ||
| 160 | shll2 r0 | ||
| 161 | ashlsi3_19: | ||
| 162 | shll2 r0 | ||
| 163 | ashlsi3_17: | ||
| 164 | shll16 r0 | ||
| 165 | rts | ||
| 166 | shll r0 | ||
| 167 | |||
| 168 | ashlsi3_30: | ||
| 169 | shll2 r0 | ||
| 170 | ashlsi3_28: | ||
| 171 | shll2 r0 | ||
| 172 | ashlsi3_26: | ||
| 173 | shll2 r0 | ||
| 174 | ashlsi3_24: | ||
| 175 | shll16 r0 | ||
| 176 | rts | ||
| 177 | shll8 r0 | ||
| 178 | |||
| 179 | ashlsi3_31: | ||
| 180 | shll2 r0 | ||
| 181 | ashlsi3_29: | ||
| 182 | shll2 r0 | ||
| 183 | ashlsi3_27: | ||
| 184 | shll2 r0 | ||
| 185 | ashlsi3_25: | ||
| 186 | shll16 r0 | ||
| 187 | shll8 r0 | ||
| 188 | rts | ||
| 189 | shll r0 | ||
| 190 | |||
| 191 | ashlsi3_0: | ||
| 192 | rts | ||
| 193 | nop | ||
diff --git a/arch/sh/lib/ashrdi3.c b/arch/sh/lib/ashrdi3.c new file mode 100644 index 000000000000..c884a912b660 --- /dev/null +++ b/arch/sh/lib/ashrdi3.c | |||
| @@ -0,0 +1,31 @@ | |||
| 1 | #include <linux/module.h> | ||
| 2 | |||
| 3 | #include "libgcc.h" | ||
| 4 | |||
| 5 | long long __ashrdi3(long long u, word_type b) | ||
| 6 | { | ||
| 7 | DWunion uu, w; | ||
| 8 | word_type bm; | ||
| 9 | |||
| 10 | if (b == 0) | ||
| 11 | return u; | ||
| 12 | |||
| 13 | uu.ll = u; | ||
| 14 | bm = 32 - b; | ||
| 15 | |||
| 16 | if (bm <= 0) { | ||
| 17 | /* w.s.high = 1..1 or 0..0 */ | ||
| 18 | w.s.high = | ||
| 19 | uu.s.high >> 31; | ||
| 20 | w.s.low = uu.s.high >> -bm; | ||
| 21 | } else { | ||
| 22 | const unsigned int carries = (unsigned int) uu.s.high << bm; | ||
| 23 | |||
| 24 | w.s.high = uu.s.high >> b; | ||
| 25 | w.s.low = ((unsigned int) uu.s.low >> b) | carries; | ||
| 26 | } | ||
| 27 | |||
| 28 | return w.ll; | ||
| 29 | } | ||
| 30 | |||
| 31 | EXPORT_SYMBOL(__ashrdi3); | ||
diff --git a/arch/sh/lib/ashrsi3.S b/arch/sh/lib/ashrsi3.S new file mode 100644 index 000000000000..6f3cf46b77c2 --- /dev/null +++ b/arch/sh/lib/ashrsi3.S | |||
| @@ -0,0 +1,185 @@ | |||
| 1 | /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, | ||
| 2 | 2004, 2005, 2006 | ||
| 3 | Free Software Foundation, Inc. | ||
| 4 | |||
| 5 | This file is free software; you can redistribute it and/or modify it | ||
| 6 | under the terms of the GNU General Public License as published by the | ||
| 7 | Free Software Foundation; either version 2, or (at your option) any | ||
| 8 | later version. | ||
| 9 | |||
| 10 | In addition to the permissions in the GNU General Public License, the | ||
| 11 | Free Software Foundation gives you unlimited permission to link the | ||
| 12 | compiled version of this file into combinations with other programs, | ||
| 13 | and to distribute those combinations without any restriction coming | ||
| 14 | from the use of this file. (The General Public License restrictions | ||
| 15 | do apply in other respects; for example, they cover modification of | ||
| 16 | the file, and distribution when not linked into a combine | ||
| 17 | executable.) | ||
| 18 | |||
| 19 | This file is distributed in the hope that it will be useful, but | ||
| 20 | WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 21 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 22 | General Public License for more details. | ||
| 23 | |||
| 24 | You should have received a copy of the GNU General Public License | ||
| 25 | along with this program; see the file COPYING. If not, write to | ||
| 26 | the Free Software Foundation, 51 Franklin Street, Fifth Floor, | ||
| 27 | Boston, MA 02110-1301, USA. */ | ||
| 28 | |||
| 29 | !! libgcc routines for the Renesas / SuperH SH CPUs. | ||
| 30 | !! Contributed by Steve Chamberlain. | ||
| 31 | !! sac@cygnus.com | ||
| 32 | |||
| 33 | !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines | ||
| 34 | !! recoded in assembly by Toshiyasu Morita | ||
| 35 | !! tm@netcom.com | ||
| 36 | |||
| 37 | /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and | ||
| 38 | ELF local label prefixes by J"orn Rennecke | ||
| 39 | amylaar@cygnus.com */ | ||
| 40 | |||
| 41 | ! | ||
| 42 | ! __ashrsi3 | ||
| 43 | ! | ||
| 44 | ! Entry: | ||
| 45 | ! | ||
| 46 | ! r4: Value to shift | ||
| 47 | ! r5: Shifts | ||
| 48 | ! | ||
| 49 | ! Exit: | ||
| 50 | ! | ||
| 51 | ! r0: Result | ||
| 52 | ! | ||
| 53 | ! Destroys: | ||
| 54 | ! | ||
| 55 | ! (none) | ||
| 56 | ! | ||
| 57 | |||
| 58 | .global __ashrsi3 | ||
| 59 | |||
| 60 | .align 2 | ||
| 61 | __ashrsi3: | ||
| 62 | mov #31,r0 | ||
| 63 | and r0,r5 | ||
| 64 | mova ashrsi3_table,r0 | ||
| 65 | mov.b @(r0,r5),r5 | ||
| 66 | #ifdef __sh1__ | ||
| 67 | add r5,r0 | ||
| 68 | jmp @r0 | ||
| 69 | #else | ||
| 70 | braf r5 | ||
| 71 | #endif | ||
| 72 | mov r4,r0 | ||
| 73 | |||
| 74 | .align 2 | ||
| 75 | ashrsi3_table: | ||
| 76 | .byte ashrsi3_0-ashrsi3_table | ||
| 77 | .byte ashrsi3_1-ashrsi3_table | ||
| 78 | .byte ashrsi3_2-ashrsi3_table | ||
| 79 | .byte ashrsi3_3-ashrsi3_table | ||
| 80 | .byte ashrsi3_4-ashrsi3_table | ||
| 81 | .byte ashrsi3_5-ashrsi3_table | ||
| 82 | .byte ashrsi3_6-ashrsi3_table | ||
| 83 | .byte ashrsi3_7-ashrsi3_table | ||
| 84 | .byte ashrsi3_8-ashrsi3_table | ||
| 85 | .byte ashrsi3_9-ashrsi3_table | ||
| 86 | .byte ashrsi3_10-ashrsi3_table | ||
| 87 | .byte ashrsi3_11-ashrsi3_table | ||
| 88 | .byte ashrsi3_12-ashrsi3_table | ||
| 89 | .byte ashrsi3_13-ashrsi3_table | ||
| 90 | .byte ashrsi3_14-ashrsi3_table | ||
| 91 | .byte ashrsi3_15-ashrsi3_table | ||
| 92 | .byte ashrsi3_16-ashrsi3_table | ||
| 93 | .byte ashrsi3_17-ashrsi3_table | ||
| 94 | .byte ashrsi3_18-ashrsi3_table | ||
| 95 | .byte ashrsi3_19-ashrsi3_table | ||
| 96 | .byte ashrsi3_20-ashrsi3_table | ||
| 97 | .byte ashrsi3_21-ashrsi3_table | ||
| 98 | .byte ashrsi3_22-ashrsi3_table | ||
| 99 | .byte ashrsi3_23-ashrsi3_table | ||
| 100 | .byte ashrsi3_24-ashrsi3_table | ||
| 101 | .byte ashrsi3_25-ashrsi3_table | ||
| 102 | .byte ashrsi3_26-ashrsi3_table | ||
| 103 | .byte ashrsi3_27-ashrsi3_table | ||
| 104 | .byte ashrsi3_28-ashrsi3_table | ||
| 105 | .byte ashrsi3_29-ashrsi3_table | ||
| 106 | .byte ashrsi3_30-ashrsi3_table | ||
| 107 | .byte ashrsi3_31-ashrsi3_table | ||
| 108 | |||
| 109 | ashrsi3_31: | ||
| 110 | rotcl r0 | ||
| 111 | rts | ||
| 112 | subc r0,r0 | ||
| 113 | |||
| 114 | ashrsi3_30: | ||
| 115 | shar r0 | ||
| 116 | ashrsi3_29: | ||
| 117 | shar r0 | ||
| 118 | ashrsi3_28: | ||
| 119 | shar r0 | ||
| 120 | ashrsi3_27: | ||
| 121 | shar r0 | ||
| 122 | ashrsi3_26: | ||
| 123 | shar r0 | ||
| 124 | ashrsi3_25: | ||
| 125 | shar r0 | ||
| 126 | ashrsi3_24: | ||
| 127 | shlr16 r0 | ||
| 128 | shlr8 r0 | ||
| 129 | rts | ||
| 130 | exts.b r0,r0 | ||
| 131 | |||
| 132 | ashrsi3_23: | ||
| 133 | shar r0 | ||
| 134 | ashrsi3_22: | ||
| 135 | shar r0 | ||
| 136 | ashrsi3_21: | ||
| 137 | shar r0 | ||
| 138 | ashrsi3_20: | ||
| 139 | shar r0 | ||
| 140 | ashrsi3_19: | ||
| 141 | shar r0 | ||
| 142 | ashrsi3_18: | ||
| 143 | shar r0 | ||
| 144 | ashrsi3_17: | ||
| 145 | shar r0 | ||
| 146 | ashrsi3_16: | ||
| 147 | shlr16 r0 | ||
| 148 | rts | ||
| 149 | exts.w r0,r0 | ||
| 150 | |||
| 151 | ashrsi3_15: | ||
| 152 | shar r0 | ||
| 153 | ashrsi3_14: | ||
| 154 | shar r0 | ||
| 155 | ashrsi3_13: | ||
| 156 | shar r0 | ||
| 157 | ashrsi3_12: | ||
| 158 | shar r0 | ||
| 159 | ashrsi3_11: | ||
| 160 | shar r0 | ||
| 161 | ashrsi3_10: | ||
| 162 | shar r0 | ||
| 163 | ashrsi3_9: | ||
| 164 | shar r0 | ||
| 165 | ashrsi3_8: | ||
| 166 | shar r0 | ||
| 167 | ashrsi3_7: | ||
| 168 | shar r0 | ||
| 169 | ashrsi3_6: | ||
| 170 | shar r0 | ||
| 171 | ashrsi3_5: | ||
| 172 | shar r0 | ||
| 173 | ashrsi3_4: | ||
| 174 | shar r0 | ||
| 175 | ashrsi3_3: | ||
| 176 | shar r0 | ||
| 177 | ashrsi3_2: | ||
| 178 | shar r0 | ||
| 179 | ashrsi3_1: | ||
| 180 | rts | ||
| 181 | shar r0 | ||
| 182 | |||
| 183 | ashrsi3_0: | ||
| 184 | rts | ||
| 185 | nop | ||
diff --git a/arch/sh/lib/libgcc.h b/arch/sh/lib/libgcc.h new file mode 100644 index 000000000000..3f19d1c5d942 --- /dev/null +++ b/arch/sh/lib/libgcc.h | |||
| @@ -0,0 +1,26 @@ | |||
| 1 | #ifndef __ASM_LIBGCC_H | ||
| 2 | #define __ASM_LIBGCC_H | ||
| 3 | |||
| 4 | #include <asm/byteorder.h> | ||
| 5 | |||
| 6 | typedef int word_type __attribute__ ((mode (__word__))); | ||
| 7 | |||
| 8 | #ifdef __BIG_ENDIAN | ||
| 9 | struct DWstruct { | ||
| 10 | int high, low; | ||
| 11 | }; | ||
| 12 | #elif defined(__LITTLE_ENDIAN) | ||
| 13 | struct DWstruct { | ||
| 14 | int low, high; | ||
| 15 | }; | ||
| 16 | #else | ||
| 17 | #error I feel sick. | ||
| 18 | #endif | ||
| 19 | |||
| 20 | typedef union | ||
| 21 | { | ||
| 22 | struct DWstruct s; | ||
| 23 | long long ll; | ||
| 24 | } DWunion; | ||
| 25 | |||
| 26 | #endif /* __ASM_LIBGCC_H */ | ||
diff --git a/arch/sh/lib/lshrdi3.c b/arch/sh/lib/lshrdi3.c new file mode 100644 index 000000000000..dcf8d6810b7c --- /dev/null +++ b/arch/sh/lib/lshrdi3.c | |||
| @@ -0,0 +1,29 @@ | |||
| 1 | #include <linux/module.h> | ||
| 2 | |||
| 3 | #include "libgcc.h" | ||
| 4 | |||
| 5 | long long __lshrdi3(long long u, word_type b) | ||
| 6 | { | ||
| 7 | DWunion uu, w; | ||
| 8 | word_type bm; | ||
| 9 | |||
| 10 | if (b == 0) | ||
| 11 | return u; | ||
| 12 | |||
| 13 | uu.ll = u; | ||
| 14 | bm = 32 - b; | ||
| 15 | |||
| 16 | if (bm <= 0) { | ||
| 17 | w.s.high = 0; | ||
| 18 | w.s.low = (unsigned int) uu.s.high >> -bm; | ||
| 19 | } else { | ||
| 20 | const unsigned int carries = (unsigned int) uu.s.high << bm; | ||
| 21 | |||
| 22 | w.s.high = (unsigned int) uu.s.high >> b; | ||
| 23 | w.s.low = ((unsigned int) uu.s.low >> b) | carries; | ||
| 24 | } | ||
| 25 | |||
| 26 | return w.ll; | ||
| 27 | } | ||
| 28 | |||
| 29 | EXPORT_SYMBOL(__lshrdi3); | ||
diff --git a/arch/sh/lib/lshrsi3.S b/arch/sh/lib/lshrsi3.S new file mode 100644 index 000000000000..1e7aaa557130 --- /dev/null +++ b/arch/sh/lib/lshrsi3.S | |||
| @@ -0,0 +1,193 @@ | |||
| 1 | /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, | ||
| 2 | 2004, 2005, 2006 | ||
| 3 | Free Software Foundation, Inc. | ||
| 4 | |||
| 5 | This file is free software; you can redistribute it and/or modify it | ||
| 6 | under the terms of the GNU General Public License as published by the | ||
| 7 | Free Software Foundation; either version 2, or (at your option) any | ||
| 8 | later version. | ||
| 9 | |||
| 10 | In addition to the permissions in the GNU General Public License, the | ||
| 11 | Free Software Foundation gives you unlimited permission to link the | ||
| 12 | compiled version of this file into combinations with other programs, | ||
| 13 | and to distribute those combinations without any restriction coming | ||
| 14 | from the use of this file. (The General Public License restrictions | ||
| 15 | do apply in other respects; for example, they cover modification of | ||
| 16 | the file, and distribution when not linked into a combine | ||
| 17 | executable.) | ||
| 18 | |||
| 19 | This file is distributed in the hope that it will be useful, but | ||
| 20 | WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 21 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 22 | General Public License for more details. | ||
| 23 | |||
| 24 | You should have received a copy of the GNU General Public License | ||
| 25 | along with this program; see the file COPYING. If not, write to | ||
| 26 | the Free Software Foundation, 51 Franklin Street, Fifth Floor, | ||
| 27 | Boston, MA 02110-1301, USA. */ | ||
| 28 | |||
| 29 | !! libgcc routines for the Renesas / SuperH SH CPUs. | ||
| 30 | !! Contributed by Steve Chamberlain. | ||
| 31 | !! sac@cygnus.com | ||
| 32 | |||
| 33 | !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines | ||
| 34 | !! recoded in assembly by Toshiyasu Morita | ||
| 35 | !! tm@netcom.com | ||
| 36 | |||
| 37 | /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and | ||
| 38 | ELF local label prefixes by J"orn Rennecke | ||
| 39 | amylaar@cygnus.com */ | ||
| 40 | |||
| 41 | ! | ||
| 42 | ! __lshrsi3 | ||
| 43 | ! | ||
| 44 | ! Entry: | ||
| 45 | ! | ||
| 46 | ! r4: Value to shift | ||
| 47 | ! r5: Shifts | ||
| 48 | ! | ||
| 49 | ! Exit: | ||
| 50 | ! | ||
| 51 | ! r0: Result | ||
| 52 | ! | ||
| 53 | ! Destroys: | ||
| 54 | ! | ||
| 55 | ! (none) | ||
| 56 | ! | ||
| 57 | .global __lshrsi3 | ||
| 58 | |||
| 59 | .align 2 | ||
| 60 | __lshrsi3: | ||
| 61 | mov #31,r0 | ||
| 62 | and r0,r5 | ||
| 63 | mova lshrsi3_table,r0 | ||
| 64 | mov.b @(r0,r5),r5 | ||
| 65 | #ifdef __sh1__ | ||
| 66 | add r5,r0 | ||
| 67 | jmp @r0 | ||
| 68 | #else | ||
| 69 | braf r5 | ||
| 70 | #endif | ||
| 71 | mov r4,r0 | ||
| 72 | |||
| 73 | .align 2 | ||
| 74 | lshrsi3_table: | ||
| 75 | .byte lshrsi3_0-lshrsi3_table | ||
| 76 | .byte lshrsi3_1-lshrsi3_table | ||
| 77 | .byte lshrsi3_2-lshrsi3_table | ||
| 78 | .byte lshrsi3_3-lshrsi3_table | ||
| 79 | .byte lshrsi3_4-lshrsi3_table | ||
| 80 | .byte lshrsi3_5-lshrsi3_table | ||
| 81 | .byte lshrsi3_6-lshrsi3_table | ||
| 82 | .byte lshrsi3_7-lshrsi3_table | ||
| 83 | .byte lshrsi3_8-lshrsi3_table | ||
| 84 | .byte lshrsi3_9-lshrsi3_table | ||
| 85 | .byte lshrsi3_10-lshrsi3_table | ||
| 86 | .byte lshrsi3_11-lshrsi3_table | ||
| 87 | .byte lshrsi3_12-lshrsi3_table | ||
| 88 | .byte lshrsi3_13-lshrsi3_table | ||
| 89 | .byte lshrsi3_14-lshrsi3_table | ||
| 90 | .byte lshrsi3_15-lshrsi3_table | ||
| 91 | .byte lshrsi3_16-lshrsi3_table | ||
| 92 | .byte lshrsi3_17-lshrsi3_table | ||
| 93 | .byte lshrsi3_18-lshrsi3_table | ||
| 94 | .byte lshrsi3_19-lshrsi3_table | ||
| 95 | .byte lshrsi3_20-lshrsi3_table | ||
| 96 | .byte lshrsi3_21-lshrsi3_table | ||
| 97 | .byte lshrsi3_22-lshrsi3_table | ||
| 98 | .byte lshrsi3_23-lshrsi3_table | ||
| 99 | .byte lshrsi3_24-lshrsi3_table | ||
| 100 | .byte lshrsi3_25-lshrsi3_table | ||
| 101 | .byte lshrsi3_26-lshrsi3_table | ||
| 102 | .byte lshrsi3_27-lshrsi3_table | ||
| 103 | .byte lshrsi3_28-lshrsi3_table | ||
| 104 | .byte lshrsi3_29-lshrsi3_table | ||
| 105 | .byte lshrsi3_30-lshrsi3_table | ||
| 106 | .byte lshrsi3_31-lshrsi3_table | ||
| 107 | |||
| 108 | lshrsi3_6: | ||
| 109 | shlr2 r0 | ||
| 110 | lshrsi3_4: | ||
| 111 | shlr2 r0 | ||
| 112 | lshrsi3_2: | ||
| 113 | rts | ||
| 114 | shlr2 r0 | ||
| 115 | |||
| 116 | lshrsi3_7: | ||
| 117 | shlr2 r0 | ||
| 118 | lshrsi3_5: | ||
| 119 | shlr2 r0 | ||
| 120 | lshrsi3_3: | ||
| 121 | shlr2 r0 | ||
| 122 | lshrsi3_1: | ||
| 123 | rts | ||
| 124 | shlr r0 | ||
| 125 | |||
| 126 | lshrsi3_14: | ||
| 127 | shlr2 r0 | ||
| 128 | lshrsi3_12: | ||
| 129 | shlr2 r0 | ||
| 130 | lshrsi3_10: | ||
| 131 | shlr2 r0 | ||
| 132 | lshrsi3_8: | ||
| 133 | rts | ||
| 134 | shlr8 r0 | ||
| 135 | |||
| 136 | lshrsi3_15: | ||
| 137 | shlr2 r0 | ||
| 138 | lshrsi3_13: | ||
| 139 | shlr2 r0 | ||
| 140 | lshrsi3_11: | ||
| 141 | shlr2 r0 | ||
| 142 | lshrsi3_9: | ||
| 143 | shlr8 r0 | ||
| 144 | rts | ||
| 145 | shlr r0 | ||
| 146 | |||
| 147 | lshrsi3_22: | ||
| 148 | shlr2 r0 | ||
| 149 | lshrsi3_20: | ||
| 150 | shlr2 r0 | ||
| 151 | lshrsi3_18: | ||
| 152 | shlr2 r0 | ||
| 153 | lshrsi3_16: | ||
| 154 | rts | ||
| 155 | shlr16 r0 | ||
| 156 | |||
| 157 | lshrsi3_23: | ||
| 158 | shlr2 r0 | ||
| 159 | lshrsi3_21: | ||
| 160 | shlr2 r0 | ||
| 161 | lshrsi3_19: | ||
| 162 | shlr2 r0 | ||
| 163 | lshrsi3_17: | ||
| 164 | shlr16 r0 | ||
| 165 | rts | ||
| 166 | shlr r0 | ||
| 167 | |||
| 168 | lshrsi3_30: | ||
| 169 | shlr2 r0 | ||
| 170 | lshrsi3_28: | ||
| 171 | shlr2 r0 | ||
| 172 | lshrsi3_26: | ||
| 173 | shlr2 r0 | ||
| 174 | lshrsi3_24: | ||
| 175 | shlr16 r0 | ||
| 176 | rts | ||
| 177 | shlr8 r0 | ||
| 178 | |||
| 179 | lshrsi3_31: | ||
| 180 | shlr2 r0 | ||
| 181 | lshrsi3_29: | ||
| 182 | shlr2 r0 | ||
| 183 | lshrsi3_27: | ||
| 184 | shlr2 r0 | ||
| 185 | lshrsi3_25: | ||
| 186 | shlr16 r0 | ||
| 187 | shlr8 r0 | ||
| 188 | rts | ||
| 189 | shlr r0 | ||
| 190 | |||
| 191 | lshrsi3_0: | ||
| 192 | rts | ||
| 193 | nop | ||
diff --git a/arch/sh/lib/mcount.S b/arch/sh/lib/mcount.S new file mode 100644 index 000000000000..110fbfe1831f --- /dev/null +++ b/arch/sh/lib/mcount.S | |||
| @@ -0,0 +1,90 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/lib/mcount.S | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 Paul Mundt | ||
| 5 | * Copyright (C) 2008 Matt Fleming | ||
| 6 | * | ||
| 7 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 8 | * License. See the file "COPYING" in the main directory of this archive | ||
| 9 | * for more details. | ||
| 10 | */ | ||
| 11 | #include <asm/ftrace.h> | ||
| 12 | |||
| 13 | #define MCOUNT_ENTER() \ | ||
| 14 | mov.l r4, @-r15; \ | ||
| 15 | mov.l r5, @-r15; \ | ||
| 16 | mov.l r6, @-r15; \ | ||
| 17 | mov.l r7, @-r15; \ | ||
| 18 | sts.l pr, @-r15; \ | ||
| 19 | \ | ||
| 20 | mov.l @(20,r15),r4; \ | ||
| 21 | sts pr, r5 | ||
| 22 | |||
| 23 | #define MCOUNT_LEAVE() \ | ||
| 24 | lds.l @r15+, pr; \ | ||
| 25 | mov.l @r15+, r7; \ | ||
| 26 | mov.l @r15+, r6; \ | ||
| 27 | mov.l @r15+, r5; \ | ||
| 28 | rts; \ | ||
| 29 | mov.l @r15+, r4 | ||
| 30 | |||
| 31 | .align 2 | ||
| 32 | .globl _mcount | ||
| 33 | .type _mcount,@function | ||
| 34 | .globl mcount | ||
| 35 | .type mcount,@function | ||
| 36 | _mcount: | ||
| 37 | mcount: | ||
| 38 | MCOUNT_ENTER() | ||
| 39 | |||
| 40 | #ifdef CONFIG_DYNAMIC_FTRACE | ||
| 41 | .globl mcount_call | ||
| 42 | mcount_call: | ||
| 43 | mov.l .Lftrace_stub, r6 | ||
| 44 | #else | ||
| 45 | mov.l .Lftrace_trace_function, r6 | ||
| 46 | mov.l ftrace_stub, r7 | ||
| 47 | cmp/eq r6, r7 | ||
| 48 | bt skip_trace | ||
| 49 | mov.l @r6, r6 | ||
| 50 | #endif | ||
| 51 | |||
| 52 | jsr @r6 | ||
| 53 | nop | ||
| 54 | |||
| 55 | skip_trace: | ||
| 56 | MCOUNT_LEAVE() | ||
| 57 | |||
| 58 | .align 2 | ||
| 59 | .Lftrace_trace_function: | ||
| 60 | .long ftrace_trace_function | ||
| 61 | |||
| 62 | #ifdef CONFIG_DYNAMIC_FTRACE | ||
| 63 | .globl ftrace_caller | ||
| 64 | ftrace_caller: | ||
| 65 | MCOUNT_ENTER() | ||
| 66 | |||
| 67 | .globl ftrace_call | ||
| 68 | ftrace_call: | ||
| 69 | mov.l .Lftrace_stub, r6 | ||
| 70 | jsr @r6 | ||
| 71 | nop | ||
| 72 | |||
| 73 | MCOUNT_LEAVE() | ||
| 74 | #endif /* CONFIG_DYNAMIC_FTRACE */ | ||
| 75 | |||
| 76 | /* | ||
| 77 | * NOTE: From here on the locations of the .Lftrace_stub label and | ||
| 78 | * ftrace_stub itself are fixed. Adding additional data here will skew | ||
| 79 | * the displacement for the memory table and break the block replacement. | ||
| 80 | * Place new labels either after the ftrace_stub body, or before | ||
| 81 | * ftrace_caller. You have been warned. | ||
| 82 | */ | ||
| 83 | .align 2 | ||
| 84 | .Lftrace_stub: | ||
| 85 | .long ftrace_stub | ||
| 86 | |||
| 87 | .globl ftrace_stub | ||
| 88 | ftrace_stub: | ||
| 89 | rts | ||
| 90 | nop | ||
diff --git a/arch/sh/lib/movmem.S b/arch/sh/lib/movmem.S new file mode 100644 index 000000000000..62075f6bc67c --- /dev/null +++ b/arch/sh/lib/movmem.S | |||
| @@ -0,0 +1,238 @@ | |||
| 1 | /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, | ||
| 2 | 2004, 2005, 2006 | ||
| 3 | Free Software Foundation, Inc. | ||
| 4 | |||
| 5 | This file is free software; you can redistribute it and/or modify it | ||
| 6 | under the terms of the GNU General Public License as published by the | ||
| 7 | Free Software Foundation; either version 2, or (at your option) any | ||
| 8 | later version. | ||
| 9 | |||
| 10 | In addition to the permissions in the GNU General Public License, the | ||
| 11 | Free Software Foundation gives you unlimited permission to link the | ||
| 12 | compiled version of this file into combinations with other programs, | ||
| 13 | and to distribute those combinations without any restriction coming | ||
| 14 | from the use of this file. (The General Public License restrictions | ||
| 15 | do apply in other respects; for example, they cover modification of | ||
| 16 | the file, and distribution when not linked into a combine | ||
| 17 | executable.) | ||
| 18 | |||
| 19 | This file is distributed in the hope that it will be useful, but | ||
| 20 | WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 21 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 22 | General Public License for more details. | ||
| 23 | |||
| 24 | You should have received a copy of the GNU General Public License | ||
| 25 | along with this program; see the file COPYING. If not, write to | ||
| 26 | the Free Software Foundation, 51 Franklin Street, Fifth Floor, | ||
| 27 | Boston, MA 02110-1301, USA. */ | ||
| 28 | |||
| 29 | !! libgcc routines for the Renesas / SuperH SH CPUs. | ||
| 30 | !! Contributed by Steve Chamberlain. | ||
| 31 | !! sac@cygnus.com | ||
| 32 | |||
| 33 | !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines | ||
| 34 | !! recoded in assembly by Toshiyasu Morita | ||
| 35 | !! tm@netcom.com | ||
| 36 | |||
| 37 | /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and | ||
| 38 | ELF local label prefixes by J"orn Rennecke | ||
| 39 | amylaar@cygnus.com */ | ||
| 40 | |||
| 41 | .text | ||
| 42 | .balign 4 | ||
| 43 | .global __movmem | ||
| 44 | .global __movstr | ||
| 45 | .set __movstr, __movmem | ||
| 46 | /* This would be a lot simpler if r6 contained the byte count | ||
| 47 | minus 64, and we wouldn't be called here for a byte count of 64. */ | ||
| 48 | __movmem: | ||
| 49 | sts.l pr,@-r15 | ||
| 50 | shll2 r6 | ||
| 51 | bsr __movmemSI52+2 | ||
| 52 | mov.l @(48,r5),r0 | ||
| 53 | .balign 4 | ||
| 54 | movmem_loop: /* Reached with rts */ | ||
| 55 | mov.l @(60,r5),r0 | ||
| 56 | add #-64,r6 | ||
| 57 | mov.l r0,@(60,r4) | ||
| 58 | tst r6,r6 | ||
| 59 | mov.l @(56,r5),r0 | ||
| 60 | bt movmem_done | ||
| 61 | mov.l r0,@(56,r4) | ||
| 62 | cmp/pl r6 | ||
| 63 | mov.l @(52,r5),r0 | ||
| 64 | add #64,r5 | ||
| 65 | mov.l r0,@(52,r4) | ||
| 66 | add #64,r4 | ||
| 67 | bt __movmemSI52 | ||
| 68 | ! done all the large groups, do the remainder | ||
| 69 | ! jump to movmem+ | ||
| 70 | mova __movmemSI4+4,r0 | ||
| 71 | add r6,r0 | ||
| 72 | jmp @r0 | ||
| 73 | movmem_done: ! share slot insn, works out aligned. | ||
| 74 | lds.l @r15+,pr | ||
| 75 | mov.l r0,@(56,r4) | ||
| 76 | mov.l @(52,r5),r0 | ||
| 77 | rts | ||
| 78 | mov.l r0,@(52,r4) | ||
| 79 | .balign 4 | ||
| 80 | |||
| 81 | .global __movmemSI64 | ||
| 82 | .global __movstrSI64 | ||
| 83 | .set __movstrSI64, __movmemSI64 | ||
| 84 | __movmemSI64: | ||
| 85 | mov.l @(60,r5),r0 | ||
| 86 | mov.l r0,@(60,r4) | ||
| 87 | .global __movmemSI60 | ||
| 88 | .global __movstrSI60 | ||
| 89 | .set __movstrSI60, __movmemSI60 | ||
| 90 | __movmemSI60: | ||
| 91 | mov.l @(56,r5),r0 | ||
| 92 | mov.l r0,@(56,r4) | ||
| 93 | .global __movmemSI56 | ||
| 94 | .global __movstrSI56 | ||
| 95 | .set __movstrSI56, __movmemSI56 | ||
| 96 | __movmemSI56: | ||
| 97 | mov.l @(52,r5),r0 | ||
| 98 | mov.l r0,@(52,r4) | ||
| 99 | .global __movmemSI52 | ||
| 100 | .global __movstrSI52 | ||
| 101 | .set __movstrSI52, __movmemSI52 | ||
| 102 | __movmemSI52: | ||
| 103 | mov.l @(48,r5),r0 | ||
| 104 | mov.l r0,@(48,r4) | ||
| 105 | .global __movmemSI48 | ||
| 106 | .global __movstrSI48 | ||
| 107 | .set __movstrSI48, __movmemSI48 | ||
| 108 | __movmemSI48: | ||
| 109 | mov.l @(44,r5),r0 | ||
| 110 | mov.l r0,@(44,r4) | ||
| 111 | .global __movmemSI44 | ||
| 112 | .global __movstrSI44 | ||
| 113 | .set __movstrSI44, __movmemSI44 | ||
| 114 | __movmemSI44: | ||
| 115 | mov.l @(40,r5),r0 | ||
| 116 | mov.l r0,@(40,r4) | ||
| 117 | .global __movmemSI40 | ||
| 118 | .global __movstrSI40 | ||
| 119 | .set __movstrSI40, __movmemSI40 | ||
| 120 | __movmemSI40: | ||
| 121 | mov.l @(36,r5),r0 | ||
| 122 | mov.l r0,@(36,r4) | ||
| 123 | .global __movmemSI36 | ||
| 124 | .global __movstrSI36 | ||
| 125 | .set __movstrSI36, __movmemSI36 | ||
| 126 | __movmemSI36: | ||
| 127 | mov.l @(32,r5),r0 | ||
| 128 | mov.l r0,@(32,r4) | ||
| 129 | .global __movmemSI32 | ||
| 130 | .global __movstrSI32 | ||
| 131 | .set __movstrSI32, __movmemSI32 | ||
| 132 | __movmemSI32: | ||
| 133 | mov.l @(28,r5),r0 | ||
| 134 | mov.l r0,@(28,r4) | ||
| 135 | .global __movmemSI28 | ||
| 136 | .global __movstrSI28 | ||
| 137 | .set __movstrSI28, __movmemSI28 | ||
| 138 | __movmemSI28: | ||
| 139 | mov.l @(24,r5),r0 | ||
| 140 | mov.l r0,@(24,r4) | ||
| 141 | .global __movmemSI24 | ||
| 142 | .global __movstrSI24 | ||
| 143 | .set __movstrSI24, __movmemSI24 | ||
| 144 | __movmemSI24: | ||
| 145 | mov.l @(20,r5),r0 | ||
| 146 | mov.l r0,@(20,r4) | ||
| 147 | .global __movmemSI20 | ||
| 148 | .global __movstrSI20 | ||
| 149 | .set __movstrSI20, __movmemSI20 | ||
| 150 | __movmemSI20: | ||
| 151 | mov.l @(16,r5),r0 | ||
| 152 | mov.l r0,@(16,r4) | ||
| 153 | .global __movmemSI16 | ||
| 154 | .global __movstrSI16 | ||
| 155 | .set __movstrSI16, __movmemSI16 | ||
| 156 | __movmemSI16: | ||
| 157 | mov.l @(12,r5),r0 | ||
| 158 | mov.l r0,@(12,r4) | ||
| 159 | .global __movmemSI12 | ||
| 160 | .global __movstrSI12 | ||
| 161 | .set __movstrSI12, __movmemSI12 | ||
| 162 | __movmemSI12: | ||
| 163 | mov.l @(8,r5),r0 | ||
| 164 | mov.l r0,@(8,r4) | ||
| 165 | .global __movmemSI8 | ||
| 166 | .global __movstrSI8 | ||
| 167 | .set __movstrSI8, __movmemSI8 | ||
| 168 | __movmemSI8: | ||
| 169 | mov.l @(4,r5),r0 | ||
| 170 | mov.l r0,@(4,r4) | ||
| 171 | .global __movmemSI4 | ||
| 172 | .global __movstrSI4 | ||
| 173 | .set __movstrSI4, __movmemSI4 | ||
| 174 | __movmemSI4: | ||
| 175 | mov.l @(0,r5),r0 | ||
| 176 | rts | ||
| 177 | mov.l r0,@(0,r4) | ||
| 178 | |||
| 179 | .global __movmem_i4_even | ||
| 180 | .global __movstr_i4_even | ||
| 181 | .set __movstr_i4_even, __movmem_i4_even | ||
| 182 | |||
| 183 | .global __movmem_i4_odd | ||
| 184 | .global __movstr_i4_odd | ||
| 185 | .set __movstr_i4_odd, __movmem_i4_odd | ||
| 186 | |||
| 187 | .global __movmemSI12_i4 | ||
| 188 | .global __movstrSI12_i4 | ||
| 189 | .set __movstrSI12_i4, __movmemSI12_i4 | ||
| 190 | |||
| 191 | .p2align 5 | ||
| 192 | L_movmem_2mod4_end: | ||
| 193 | mov.l r0,@(16,r4) | ||
| 194 | rts | ||
| 195 | mov.l r1,@(20,r4) | ||
| 196 | |||
| 197 | .p2align 2 | ||
| 198 | |||
| 199 | __movmem_i4_even: | ||
| 200 | mov.l @r5+,r0 | ||
| 201 | bra L_movmem_start_even | ||
| 202 | mov.l @r5+,r1 | ||
| 203 | |||
| 204 | __movmem_i4_odd: | ||
| 205 | mov.l @r5+,r1 | ||
| 206 | add #-4,r4 | ||
| 207 | mov.l @r5+,r2 | ||
| 208 | mov.l @r5+,r3 | ||
| 209 | mov.l r1,@(4,r4) | ||
| 210 | mov.l r2,@(8,r4) | ||
| 211 | |||
| 212 | L_movmem_loop: | ||
| 213 | mov.l r3,@(12,r4) | ||
| 214 | dt r6 | ||
| 215 | mov.l @r5+,r0 | ||
| 216 | bt/s L_movmem_2mod4_end | ||
| 217 | mov.l @r5+,r1 | ||
| 218 | add #16,r4 | ||
| 219 | L_movmem_start_even: | ||
| 220 | mov.l @r5+,r2 | ||
| 221 | mov.l @r5+,r3 | ||
| 222 | mov.l r0,@r4 | ||
| 223 | dt r6 | ||
| 224 | mov.l r1,@(4,r4) | ||
| 225 | bf/s L_movmem_loop | ||
| 226 | mov.l r2,@(8,r4) | ||
| 227 | rts | ||
| 228 | mov.l r3,@(12,r4) | ||
| 229 | |||
| 230 | .p2align 4 | ||
| 231 | __movmemSI12_i4: | ||
| 232 | mov.l @r5,r0 | ||
| 233 | mov.l @(4,r5),r1 | ||
| 234 | mov.l @(8,r5),r2 | ||
| 235 | mov.l r0,@r4 | ||
| 236 | mov.l r1,@(4,r4) | ||
| 237 | rts | ||
| 238 | mov.l r2,@(8,r4) | ||
diff --git a/arch/sh/lib/udiv_qrnnd.S b/arch/sh/lib/udiv_qrnnd.S new file mode 100644 index 000000000000..32b9a36de943 --- /dev/null +++ b/arch/sh/lib/udiv_qrnnd.S | |||
| @@ -0,0 +1,81 @@ | |||
| 1 | /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, | ||
| 2 | 2004, 2005, 2006 | ||
| 3 | Free Software Foundation, Inc. | ||
| 4 | |||
| 5 | This file is free software; you can redistribute it and/or modify it | ||
| 6 | under the terms of the GNU General Public License as published by the | ||
| 7 | Free Software Foundation; either version 2, or (at your option) any | ||
| 8 | later version. | ||
| 9 | |||
| 10 | In addition to the permissions in the GNU General Public License, the | ||
| 11 | Free Software Foundation gives you unlimited permission to link the | ||
| 12 | compiled version of this file into combinations with other programs, | ||
| 13 | and to distribute those combinations without any restriction coming | ||
| 14 | from the use of this file. (The General Public License restrictions | ||
| 15 | do apply in other respects; for example, they cover modification of | ||
| 16 | the file, and distribution when not linked into a combine | ||
| 17 | executable.) | ||
| 18 | |||
| 19 | This file is distributed in the hope that it will be useful, but | ||
| 20 | WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 21 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 22 | General Public License for more details. | ||
| 23 | |||
| 24 | You should have received a copy of the GNU General Public License | ||
| 25 | along with this program; see the file COPYING. If not, write to | ||
| 26 | the Free Software Foundation, 51 Franklin Street, Fifth Floor, | ||
| 27 | Boston, MA 02110-1301, USA. */ | ||
| 28 | |||
| 29 | !! libgcc routines for the Renesas / SuperH SH CPUs. | ||
| 30 | !! Contributed by Steve Chamberlain. | ||
| 31 | !! sac@cygnus.com | ||
| 32 | |||
| 33 | !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines | ||
| 34 | !! recoded in assembly by Toshiyasu Morita | ||
| 35 | !! tm@netcom.com | ||
| 36 | |||
| 37 | /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and | ||
| 38 | ELF local label prefixes by J"orn Rennecke | ||
| 39 | amylaar@cygnus.com */ | ||
| 40 | |||
| 41 | /* r0: rn r1: qn */ /* r0: n1 r4: n0 r5: d r6: d1 */ /* r2: __m */ | ||
| 42 | /* n1 < d, but n1 might be larger than d1. */ | ||
| 43 | .global __udiv_qrnnd_16 | ||
| 44 | .balign 8 | ||
| 45 | __udiv_qrnnd_16: | ||
| 46 | div0u | ||
| 47 | cmp/hi r6,r0 | ||
| 48 | bt .Lots | ||
| 49 | .rept 16 | ||
| 50 | div1 r6,r0 | ||
| 51 | .endr | ||
| 52 | extu.w r0,r1 | ||
| 53 | bt 0f | ||
| 54 | add r6,r0 | ||
| 55 | 0: rotcl r1 | ||
| 56 | mulu.w r1,r5 | ||
| 57 | xtrct r4,r0 | ||
| 58 | swap.w r0,r0 | ||
| 59 | sts macl,r2 | ||
| 60 | cmp/hs r2,r0 | ||
| 61 | sub r2,r0 | ||
| 62 | bt 0f | ||
| 63 | addc r5,r0 | ||
| 64 | add #-1,r1 | ||
| 65 | bt 0f | ||
| 66 | 1: add #-1,r1 | ||
| 67 | rts | ||
| 68 | add r5,r0 | ||
| 69 | .balign 8 | ||
| 70 | .Lots: | ||
| 71 | sub r5,r0 | ||
| 72 | swap.w r4,r1 | ||
| 73 | xtrct r0,r1 | ||
| 74 | clrt | ||
| 75 | mov r1,r0 | ||
| 76 | addc r5,r0 | ||
| 77 | mov #-1,r1 | ||
| 78 | bf/s 1b | ||
| 79 | shlr16 r1 | ||
| 80 | 0: rts | ||
| 81 | nop | ||
diff --git a/arch/sh/lib/udivsi3.S b/arch/sh/lib/udivsi3.S new file mode 100644 index 000000000000..72157ab5c314 --- /dev/null +++ b/arch/sh/lib/udivsi3.S | |||
| @@ -0,0 +1,87 @@ | |||
| 1 | /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, | ||
| 2 | 2004, 2005 | ||
| 3 | Free Software Foundation, Inc. | ||
| 4 | |||
| 5 | This file is free software; you can redistribute it and/or modify it | ||
| 6 | under the terms of the GNU General Public License as published by the | ||
| 7 | Free Software Foundation; either version 2, or (at your option) any | ||
| 8 | later version. | ||
| 9 | |||
| 10 | In addition to the permissions in the GNU General Public License, the | ||
| 11 | Free Software Foundation gives you unlimited permission to link the | ||
| 12 | compiled version of this file into combinations with other programs, | ||
| 13 | and to distribute those combinations without any restriction coming | ||
| 14 | from the use of this file. (The General Public License restrictions | ||
| 15 | do apply in other respects; for example, they cover modification of | ||
| 16 | the file, and distribution when not linked into a combine | ||
| 17 | executable.) | ||
| 18 | |||
| 19 | This file is distributed in the hope that it will be useful, but | ||
| 20 | WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 21 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 22 | General Public License for more details. | ||
| 23 | |||
| 24 | You should have received a copy of the GNU General Public License | ||
| 25 | along with this program; see the file COPYING. If not, write to | ||
| 26 | the Free Software Foundation, 51 Franklin Street, Fifth Floor, | ||
| 27 | Boston, MA 02110-1301, USA. */ | ||
| 28 | |||
| 29 | !! libgcc routines for the Renesas / SuperH SH CPUs. | ||
| 30 | !! Contributed by Steve Chamberlain. | ||
| 31 | !! sac@cygnus.com | ||
| 32 | |||
| 33 | .balign 4 | ||
| 34 | .global __udivsi3 | ||
| 35 | .type __udivsi3, @function | ||
| 36 | div8: | ||
| 37 | div1 r5,r4 | ||
| 38 | div7: | ||
| 39 | div1 r5,r4; div1 r5,r4; div1 r5,r4 | ||
| 40 | div1 r5,r4; div1 r5,r4; div1 r5,r4; rts; div1 r5,r4 | ||
| 41 | |||
| 42 | divx4: | ||
| 43 | div1 r5,r4; rotcl r0 | ||
| 44 | div1 r5,r4; rotcl r0 | ||
| 45 | div1 r5,r4; rotcl r0 | ||
| 46 | rts; div1 r5,r4 | ||
| 47 | |||
| 48 | __udivsi3: | ||
| 49 | sts.l pr,@-r15 | ||
| 50 | extu.w r5,r0 | ||
| 51 | cmp/eq r5,r0 | ||
| 52 | bf/s large_divisor | ||
| 53 | div0u | ||
| 54 | swap.w r4,r0 | ||
| 55 | shlr16 r4 | ||
| 56 | bsr div8 | ||
| 57 | shll16 r5 | ||
| 58 | bsr div7 | ||
| 59 | div1 r5,r4 | ||
| 60 | xtrct r4,r0 | ||
| 61 | xtrct r0,r4 | ||
| 62 | bsr div8 | ||
| 63 | swap.w r4,r4 | ||
| 64 | bsr div7 | ||
| 65 | div1 r5,r4 | ||
| 66 | lds.l @r15+,pr | ||
| 67 | xtrct r4,r0 | ||
| 68 | swap.w r0,r0 | ||
| 69 | rotcl r0 | ||
| 70 | rts | ||
| 71 | shlr16 r5 | ||
| 72 | |||
| 73 | large_divisor: | ||
| 74 | mov #0,r0 | ||
| 75 | xtrct r4,r0 | ||
| 76 | xtrct r0,r4 | ||
| 77 | bsr divx4 | ||
| 78 | rotcl r0 | ||
| 79 | bsr divx4 | ||
| 80 | rotcl r0 | ||
| 81 | bsr divx4 | ||
| 82 | rotcl r0 | ||
| 83 | bsr divx4 | ||
| 84 | rotcl r0 | ||
| 85 | lds.l @r15+,pr | ||
| 86 | rts | ||
| 87 | rotcl r0 | ||
diff --git a/arch/sh/lib/udivsi3_i4i-Os.S b/arch/sh/lib/udivsi3_i4i-Os.S new file mode 100644 index 000000000000..4835553e1ea9 --- /dev/null +++ b/arch/sh/lib/udivsi3_i4i-Os.S | |||
| @@ -0,0 +1,149 @@ | |||
| 1 | /* Copyright (C) 2006 Free Software Foundation, Inc. | ||
| 2 | |||
| 3 | This file is free software; you can redistribute it and/or modify it | ||
| 4 | under the terms of the GNU General Public License as published by the | ||
| 5 | Free Software Foundation; either version 2, or (at your option) any | ||
| 6 | later version. | ||
| 7 | |||
| 8 | In addition to the permissions in the GNU General Public License, the | ||
| 9 | Free Software Foundation gives you unlimited permission to link the | ||
| 10 | compiled version of this file into combinations with other programs, | ||
| 11 | and to distribute those combinations without any restriction coming | ||
| 12 | from the use of this file. (The General Public License restrictions | ||
| 13 | do apply in other respects; for example, they cover modification of | ||
| 14 | the file, and distribution when not linked into a combine | ||
| 15 | executable.) | ||
| 16 | |||
| 17 | This file is distributed in the hope that it will be useful, but | ||
| 18 | WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 19 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 20 | General Public License for more details. | ||
| 21 | |||
| 22 | You should have received a copy of the GNU General Public License | ||
| 23 | along with this program; see the file COPYING. If not, write to | ||
| 24 | the Free Software Foundation, 51 Franklin Street, Fifth Floor, | ||
| 25 | Boston, MA 02110-1301, USA. */ | ||
| 26 | |||
| 27 | /* Moderately Space-optimized libgcc routines for the Renesas SH / | ||
| 28 | STMicroelectronics ST40 CPUs. | ||
| 29 | Contributed by J"orn Rennecke joern.rennecke@st.com. */ | ||
| 30 | |||
| 31 | /* Size: 186 bytes jointly for udivsi3_i4i and sdivsi3_i4i | ||
| 32 | sh4-200 run times: | ||
| 33 | udiv small divisor: 55 cycles | ||
| 34 | udiv large divisor: 52 cycles | ||
| 35 | sdiv small divisor, positive result: 59 cycles | ||
| 36 | sdiv large divisor, positive result: 56 cycles | ||
| 37 | sdiv small divisor, negative result: 65 cycles (*) | ||
| 38 | sdiv large divisor, negative result: 62 cycles (*) | ||
| 39 | (*): r2 is restored in the rts delay slot and has a lingering latency | ||
| 40 | of two more cycles. */ | ||
| 41 | .balign 4 | ||
| 42 | .global __udivsi3_i4i | ||
| 43 | .global __udivsi3_i4 | ||
| 44 | .set __udivsi3_i4, __udivsi3_i4i | ||
| 45 | .type __udivsi3_i4i, @function | ||
| 46 | .type __sdivsi3_i4i, @function | ||
| 47 | __udivsi3_i4i: | ||
| 48 | sts pr,r1 | ||
| 49 | mov.l r4,@-r15 | ||
| 50 | extu.w r5,r0 | ||
| 51 | cmp/eq r5,r0 | ||
| 52 | swap.w r4,r0 | ||
| 53 | shlr16 r4 | ||
| 54 | bf/s large_divisor | ||
| 55 | div0u | ||
| 56 | mov.l r5,@-r15 | ||
| 57 | shll16 r5 | ||
| 58 | sdiv_small_divisor: | ||
| 59 | div1 r5,r4 | ||
| 60 | bsr div6 | ||
| 61 | div1 r5,r4 | ||
| 62 | div1 r5,r4 | ||
| 63 | bsr div6 | ||
| 64 | div1 r5,r4 | ||
| 65 | xtrct r4,r0 | ||
| 66 | xtrct r0,r4 | ||
| 67 | bsr div7 | ||
| 68 | swap.w r4,r4 | ||
| 69 | div1 r5,r4 | ||
| 70 | bsr div7 | ||
| 71 | div1 r5,r4 | ||
| 72 | xtrct r4,r0 | ||
| 73 | mov.l @r15+,r5 | ||
| 74 | swap.w r0,r0 | ||
| 75 | mov.l @r15+,r4 | ||
| 76 | jmp @r1 | ||
| 77 | rotcl r0 | ||
| 78 | div7: | ||
| 79 | div1 r5,r4 | ||
| 80 | div6: | ||
| 81 | div1 r5,r4; div1 r5,r4; div1 r5,r4 | ||
| 82 | div1 r5,r4; div1 r5,r4; rts; div1 r5,r4 | ||
| 83 | |||
| 84 | divx3: | ||
| 85 | rotcl r0 | ||
| 86 | div1 r5,r4 | ||
| 87 | rotcl r0 | ||
| 88 | div1 r5,r4 | ||
| 89 | rotcl r0 | ||
| 90 | rts | ||
| 91 | div1 r5,r4 | ||
| 92 | |||
| 93 | large_divisor: | ||
| 94 | mov.l r5,@-r15 | ||
| 95 | sdiv_large_divisor: | ||
| 96 | xor r4,r0 | ||
| 97 | .rept 4 | ||
| 98 | rotcl r0 | ||
| 99 | bsr divx3 | ||
| 100 | div1 r5,r4 | ||
| 101 | .endr | ||
| 102 | mov.l @r15+,r5 | ||
| 103 | mov.l @r15+,r4 | ||
| 104 | jmp @r1 | ||
| 105 | rotcl r0 | ||
| 106 | |||
| 107 | .global __sdivsi3_i4i | ||
| 108 | .global __sdivsi3_i4 | ||
| 109 | .global __sdivsi3 | ||
| 110 | .set __sdivsi3_i4, __sdivsi3_i4i | ||
| 111 | .set __sdivsi3, __sdivsi3_i4i | ||
| 112 | __sdivsi3_i4i: | ||
| 113 | mov.l r4,@-r15 | ||
| 114 | cmp/pz r5 | ||
| 115 | mov.l r5,@-r15 | ||
| 116 | bt/s pos_divisor | ||
| 117 | cmp/pz r4 | ||
| 118 | neg r5,r5 | ||
| 119 | extu.w r5,r0 | ||
| 120 | bt/s neg_result | ||
| 121 | cmp/eq r5,r0 | ||
| 122 | neg r4,r4 | ||
| 123 | pos_result: | ||
| 124 | swap.w r4,r0 | ||
| 125 | bra sdiv_check_divisor | ||
| 126 | sts pr,r1 | ||
| 127 | pos_divisor: | ||
| 128 | extu.w r5,r0 | ||
| 129 | bt/s pos_result | ||
| 130 | cmp/eq r5,r0 | ||
| 131 | neg r4,r4 | ||
| 132 | neg_result: | ||
| 133 | mova negate_result,r0 | ||
| 134 | ; | ||
| 135 | mov r0,r1 | ||
| 136 | swap.w r4,r0 | ||
| 137 | lds r2,macl | ||
| 138 | sts pr,r2 | ||
| 139 | sdiv_check_divisor: | ||
| 140 | shlr16 r4 | ||
| 141 | bf/s sdiv_large_divisor | ||
| 142 | div0u | ||
| 143 | bra sdiv_small_divisor | ||
| 144 | shll16 r5 | ||
| 145 | .balign 4 | ||
| 146 | negate_result: | ||
| 147 | neg r0,r0 | ||
| 148 | jmp @r2 | ||
| 149 | sts macl,r2 | ||
diff --git a/arch/sh/lib/udivsi3_i4i.S b/arch/sh/lib/udivsi3_i4i.S new file mode 100644 index 000000000000..f1a79d9c5015 --- /dev/null +++ b/arch/sh/lib/udivsi3_i4i.S | |||
| @@ -0,0 +1,666 @@ | |||
| 1 | /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, | ||
| 2 | 2004, 2005, 2006 | ||
| 3 | Free Software Foundation, Inc. | ||
| 4 | |||
| 5 | This file is free software; you can redistribute it and/or modify it | ||
| 6 | under the terms of the GNU General Public License as published by the | ||
| 7 | Free Software Foundation; either version 2, or (at your option) any | ||
| 8 | later version. | ||
| 9 | |||
| 10 | In addition to the permissions in the GNU General Public License, the | ||
| 11 | Free Software Foundation gives you unlimited permission to link the | ||
| 12 | compiled version of this file into combinations with other programs, | ||
| 13 | and to distribute those combinations without any restriction coming | ||
| 14 | from the use of this file. (The General Public License restrictions | ||
| 15 | do apply in other respects; for example, they cover modification of | ||
| 16 | the file, and distribution when not linked into a combine | ||
| 17 | executable.) | ||
| 18 | |||
| 19 | This file is distributed in the hope that it will be useful, but | ||
| 20 | WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 21 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 22 | General Public License for more details. | ||
| 23 | |||
| 24 | You should have received a copy of the GNU General Public License | ||
| 25 | along with this program; see the file COPYING. If not, write to | ||
| 26 | the Free Software Foundation, 51 Franklin Street, Fifth Floor, | ||
| 27 | Boston, MA 02110-1301, USA. */ | ||
| 28 | |||
| 29 | !! libgcc routines for the Renesas / SuperH SH CPUs. | ||
| 30 | !! Contributed by Steve Chamberlain. | ||
| 31 | !! sac@cygnus.com | ||
| 32 | |||
| 33 | !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines | ||
| 34 | !! recoded in assembly by Toshiyasu Morita | ||
| 35 | !! tm@netcom.com | ||
| 36 | |||
| 37 | /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and | ||
| 38 | ELF local label prefixes by J"orn Rennecke | ||
| 39 | amylaar@cygnus.com */ | ||
| 40 | |||
| 41 | /* This code used shld, thus is not suitable for SH1 / SH2. */ | ||
| 42 | |||
| 43 | /* Signed / unsigned division without use of FPU, optimized for SH4. | ||
| 44 | Uses a lookup table for divisors in the range -128 .. +128, and | ||
| 45 | div1 with case distinction for larger divisors in three more ranges. | ||
| 46 | The code is lumped together with the table to allow the use of mova. */ | ||
| 47 | #ifdef CONFIG_CPU_LITTLE_ENDIAN | ||
| 48 | #define L_LSB 0 | ||
| 49 | #define L_LSWMSB 1 | ||
| 50 | #define L_MSWLSB 2 | ||
| 51 | #else | ||
| 52 | #define L_LSB 3 | ||
| 53 | #define L_LSWMSB 2 | ||
| 54 | #define L_MSWLSB 1 | ||
| 55 | #endif | ||
| 56 | |||
| 57 | .balign 4 | ||
| 58 | .global __udivsi3_i4i | ||
| 59 | .global __udivsi3_i4 | ||
| 60 | .set __udivsi3_i4, __udivsi3_i4i | ||
| 61 | .type __udivsi3_i4i, @function | ||
| 62 | __udivsi3_i4i: | ||
| 63 | mov.w c128_w, r1 | ||
| 64 | div0u | ||
| 65 | mov r4,r0 | ||
| 66 | shlr8 r0 | ||
| 67 | cmp/hi r1,r5 | ||
| 68 | extu.w r5,r1 | ||
| 69 | bf udiv_le128 | ||
| 70 | cmp/eq r5,r1 | ||
| 71 | bf udiv_ge64k | ||
| 72 | shlr r0 | ||
| 73 | mov r5,r1 | ||
| 74 | shll16 r5 | ||
| 75 | mov.l r4,@-r15 | ||
| 76 | div1 r5,r0 | ||
| 77 | mov.l r1,@-r15 | ||
| 78 | div1 r5,r0 | ||
| 79 | div1 r5,r0 | ||
| 80 | bra udiv_25 | ||
| 81 | div1 r5,r0 | ||
| 82 | |||
| 83 | div_le128: | ||
| 84 | mova div_table_ix,r0 | ||
| 85 | bra div_le128_2 | ||
| 86 | mov.b @(r0,r5),r1 | ||
| 87 | udiv_le128: | ||
| 88 | mov.l r4,@-r15 | ||
| 89 | mova div_table_ix,r0 | ||
| 90 | mov.b @(r0,r5),r1 | ||
| 91 | mov.l r5,@-r15 | ||
| 92 | div_le128_2: | ||
| 93 | mova div_table_inv,r0 | ||
| 94 | mov.l @(r0,r1),r1 | ||
| 95 | mov r5,r0 | ||
| 96 | tst #0xfe,r0 | ||
| 97 | mova div_table_clz,r0 | ||
| 98 | dmulu.l r1,r4 | ||
| 99 | mov.b @(r0,r5),r1 | ||
| 100 | bt/s div_by_1 | ||
| 101 | mov r4,r0 | ||
| 102 | mov.l @r15+,r5 | ||
| 103 | sts mach,r0 | ||
| 104 | /* clrt */ | ||
| 105 | addc r4,r0 | ||
| 106 | mov.l @r15+,r4 | ||
| 107 | rotcr r0 | ||
| 108 | rts | ||
| 109 | shld r1,r0 | ||
| 110 | |||
| 111 | div_by_1_neg: | ||
| 112 | neg r4,r0 | ||
| 113 | div_by_1: | ||
| 114 | mov.l @r15+,r5 | ||
| 115 | rts | ||
| 116 | mov.l @r15+,r4 | ||
| 117 | |||
| 118 | div_ge64k: | ||
| 119 | bt/s div_r8 | ||
| 120 | div0u | ||
| 121 | shll8 r5 | ||
| 122 | bra div_ge64k_2 | ||
| 123 | div1 r5,r0 | ||
| 124 | udiv_ge64k: | ||
| 125 | cmp/hi r0,r5 | ||
| 126 | mov r5,r1 | ||
| 127 | bt udiv_r8 | ||
| 128 | shll8 r5 | ||
| 129 | mov.l r4,@-r15 | ||
| 130 | div1 r5,r0 | ||
| 131 | mov.l r1,@-r15 | ||
| 132 | div_ge64k_2: | ||
| 133 | div1 r5,r0 | ||
| 134 | mov.l zero_l,r1 | ||
| 135 | .rept 4 | ||
| 136 | div1 r5,r0 | ||
| 137 | .endr | ||
| 138 | mov.l r1,@-r15 | ||
| 139 | div1 r5,r0 | ||
| 140 | mov.w m256_w,r1 | ||
| 141 | div1 r5,r0 | ||
| 142 | mov.b r0,@(L_LSWMSB,r15) | ||
| 143 | xor r4,r0 | ||
| 144 | and r1,r0 | ||
| 145 | bra div_ge64k_end | ||
| 146 | xor r4,r0 | ||
| 147 | |||
| 148 | div_r8: | ||
| 149 | shll16 r4 | ||
| 150 | bra div_r8_2 | ||
| 151 | shll8 r4 | ||
| 152 | udiv_r8: | ||
| 153 | mov.l r4,@-r15 | ||
| 154 | shll16 r4 | ||
| 155 | clrt | ||
| 156 | shll8 r4 | ||
| 157 | mov.l r5,@-r15 | ||
| 158 | div_r8_2: | ||
| 159 | rotcl r4 | ||
| 160 | mov r0,r1 | ||
| 161 | div1 r5,r1 | ||
| 162 | mov r4,r0 | ||
| 163 | rotcl r0 | ||
| 164 | mov r5,r4 | ||
| 165 | div1 r5,r1 | ||
| 166 | .rept 5 | ||
| 167 | rotcl r0; div1 r5,r1 | ||
| 168 | .endr | ||
| 169 | rotcl r0 | ||
| 170 | mov.l @r15+,r5 | ||
| 171 | div1 r4,r1 | ||
| 172 | mov.l @r15+,r4 | ||
| 173 | rts | ||
| 174 | rotcl r0 | ||
| 175 | |||
| 176 | .global __sdivsi3_i4i | ||
| 177 | .global __sdivsi3_i4 | ||
| 178 | .global __sdivsi3 | ||
| 179 | .set __sdivsi3_i4, __sdivsi3_i4i | ||
| 180 | .set __sdivsi3, __sdivsi3_i4i | ||
| 181 | .type __sdivsi3_i4i, @function | ||
| 182 | /* This is link-compatible with a __sdivsi3 call, | ||
| 183 | but we effectively clobber only r1. */ | ||
| 184 | __sdivsi3_i4i: | ||
| 185 | mov.l r4,@-r15 | ||
| 186 | cmp/pz r5 | ||
| 187 | mov.w c128_w, r1 | ||
| 188 | bt/s pos_divisor | ||
| 189 | cmp/pz r4 | ||
| 190 | mov.l r5,@-r15 | ||
| 191 | neg r5,r5 | ||
| 192 | bt/s neg_result | ||
| 193 | cmp/hi r1,r5 | ||
| 194 | neg r4,r4 | ||
| 195 | pos_result: | ||
| 196 | extu.w r5,r0 | ||
| 197 | bf div_le128 | ||
| 198 | cmp/eq r5,r0 | ||
| 199 | mov r4,r0 | ||
| 200 | shlr8 r0 | ||
| 201 | bf/s div_ge64k | ||
| 202 | cmp/hi r0,r5 | ||
| 203 | div0u | ||
| 204 | shll16 r5 | ||
| 205 | div1 r5,r0 | ||
| 206 | div1 r5,r0 | ||
| 207 | div1 r5,r0 | ||
| 208 | udiv_25: | ||
| 209 | mov.l zero_l,r1 | ||
| 210 | div1 r5,r0 | ||
| 211 | div1 r5,r0 | ||
| 212 | mov.l r1,@-r15 | ||
| 213 | .rept 3 | ||
| 214 | div1 r5,r0 | ||
| 215 | .endr | ||
| 216 | mov.b r0,@(L_MSWLSB,r15) | ||
| 217 | xtrct r4,r0 | ||
| 218 | swap.w r0,r0 | ||
| 219 | .rept 8 | ||
| 220 | div1 r5,r0 | ||
| 221 | .endr | ||
| 222 | mov.b r0,@(L_LSWMSB,r15) | ||
| 223 | div_ge64k_end: | ||
| 224 | .rept 8 | ||
| 225 | div1 r5,r0 | ||
| 226 | .endr | ||
| 227 | mov.l @r15+,r4 ! zero-extension and swap using LS unit. | ||
| 228 | extu.b r0,r0 | ||
| 229 | mov.l @r15+,r5 | ||
| 230 | or r4,r0 | ||
| 231 | mov.l @r15+,r4 | ||
| 232 | rts | ||
| 233 | rotcl r0 | ||
| 234 | |||
| 235 | div_le128_neg: | ||
| 236 | tst #0xfe,r0 | ||
| 237 | mova div_table_ix,r0 | ||
| 238 | mov.b @(r0,r5),r1 | ||
| 239 | mova div_table_inv,r0 | ||
| 240 | bt/s div_by_1_neg | ||
| 241 | mov.l @(r0,r1),r1 | ||
| 242 | mova div_table_clz,r0 | ||
| 243 | dmulu.l r1,r4 | ||
| 244 | mov.b @(r0,r5),r1 | ||
| 245 | mov.l @r15+,r5 | ||
| 246 | sts mach,r0 | ||
| 247 | /* clrt */ | ||
| 248 | addc r4,r0 | ||
| 249 | mov.l @r15+,r4 | ||
| 250 | rotcr r0 | ||
| 251 | shld r1,r0 | ||
| 252 | rts | ||
| 253 | neg r0,r0 | ||
| 254 | |||
| 255 | pos_divisor: | ||
| 256 | mov.l r5,@-r15 | ||
| 257 | bt/s pos_result | ||
| 258 | cmp/hi r1,r5 | ||
| 259 | neg r4,r4 | ||
| 260 | neg_result: | ||
| 261 | extu.w r5,r0 | ||
| 262 | bf div_le128_neg | ||
| 263 | cmp/eq r5,r0 | ||
| 264 | mov r4,r0 | ||
| 265 | shlr8 r0 | ||
| 266 | bf/s div_ge64k_neg | ||
| 267 | cmp/hi r0,r5 | ||
| 268 | div0u | ||
| 269 | mov.l zero_l,r1 | ||
| 270 | shll16 r5 | ||
| 271 | div1 r5,r0 | ||
| 272 | mov.l r1,@-r15 | ||
| 273 | .rept 7 | ||
| 274 | div1 r5,r0 | ||
| 275 | .endr | ||
| 276 | mov.b r0,@(L_MSWLSB,r15) | ||
| 277 | xtrct r4,r0 | ||
| 278 | swap.w r0,r0 | ||
| 279 | .rept 8 | ||
| 280 | div1 r5,r0 | ||
| 281 | .endr | ||
| 282 | mov.b r0,@(L_LSWMSB,r15) | ||
| 283 | div_ge64k_neg_end: | ||
| 284 | .rept 8 | ||
| 285 | div1 r5,r0 | ||
| 286 | .endr | ||
| 287 | mov.l @r15+,r4 ! zero-extension and swap using LS unit. | ||
| 288 | extu.b r0,r1 | ||
| 289 | mov.l @r15+,r5 | ||
| 290 | or r4,r1 | ||
| 291 | div_r8_neg_end: | ||
| 292 | mov.l @r15+,r4 | ||
| 293 | rotcl r1 | ||
| 294 | rts | ||
| 295 | neg r1,r0 | ||
| 296 | |||
| 297 | div_ge64k_neg: | ||
| 298 | bt/s div_r8_neg | ||
| 299 | div0u | ||
| 300 | shll8 r5 | ||
| 301 | mov.l zero_l,r1 | ||
| 302 | .rept 6 | ||
| 303 | div1 r5,r0 | ||
| 304 | .endr | ||
| 305 | mov.l r1,@-r15 | ||
| 306 | div1 r5,r0 | ||
| 307 | mov.w m256_w,r1 | ||
| 308 | div1 r5,r0 | ||
| 309 | mov.b r0,@(L_LSWMSB,r15) | ||
| 310 | xor r4,r0 | ||
| 311 | and r1,r0 | ||
| 312 | bra div_ge64k_neg_end | ||
| 313 | xor r4,r0 | ||
| 314 | |||
| 315 | c128_w: | ||
| 316 | .word 128 | ||
| 317 | |||
| 318 | div_r8_neg: | ||
| 319 | clrt | ||
| 320 | shll16 r4 | ||
| 321 | mov r4,r1 | ||
| 322 | shll8 r1 | ||
| 323 | mov r5,r4 | ||
| 324 | .rept 7 | ||
| 325 | rotcl r1; div1 r5,r0 | ||
| 326 | .endr | ||
| 327 | mov.l @r15+,r5 | ||
| 328 | rotcl r1 | ||
| 329 | bra div_r8_neg_end | ||
| 330 | div1 r4,r0 | ||
| 331 | |||
| 332 | m256_w: | ||
| 333 | .word 0xff00 | ||
| 334 | /* This table has been generated by divtab-sh4.c. */ | ||
| 335 | .balign 4 | ||
| 336 | div_table_clz: | ||
| 337 | .byte 0 | ||
| 338 | .byte 1 | ||
| 339 | .byte 0 | ||
| 340 | .byte -1 | ||
| 341 | .byte -1 | ||
| 342 | .byte -2 | ||
| 343 | .byte -2 | ||
| 344 | .byte -2 | ||
| 345 | .byte -2 | ||
| 346 | .byte -3 | ||
| 347 | .byte -3 | ||
| 348 | .byte -3 | ||
| 349 | .byte -3 | ||
| 350 | .byte -3 | ||
| 351 | .byte -3 | ||
| 352 | .byte -3 | ||
| 353 | .byte -3 | ||
| 354 | .byte -4 | ||
| 355 | .byte -4 | ||
| 356 | .byte -4 | ||
| 357 | .byte -4 | ||
| 358 | .byte -4 | ||
| 359 | .byte -4 | ||
| 360 | .byte -4 | ||
| 361 | .byte -4 | ||
| 362 | .byte -4 | ||
| 363 | .byte -4 | ||
| 364 | .byte -4 | ||
| 365 | .byte -4 | ||
| 366 | .byte -4 | ||
| 367 | .byte -4 | ||
| 368 | .byte -4 | ||
| 369 | .byte -4 | ||
| 370 | .byte -5 | ||
| 371 | .byte -5 | ||
| 372 | .byte -5 | ||
| 373 | .byte -5 | ||
| 374 | .byte -5 | ||
| 375 | .byte -5 | ||
| 376 | .byte -5 | ||
| 377 | .byte -5 | ||
| 378 | .byte -5 | ||
| 379 | .byte -5 | ||
| 380 | .byte -5 | ||
| 381 | .byte -5 | ||
| 382 | .byte -5 | ||
| 383 | .byte -5 | ||
| 384 | .byte -5 | ||
| 385 | .byte -5 | ||
| 386 | .byte -5 | ||
| 387 | .byte -5 | ||
| 388 | .byte -5 | ||
| 389 | .byte -5 | ||
| 390 | .byte -5 | ||
| 391 | .byte -5 | ||
| 392 | .byte -5 | ||
| 393 | .byte -5 | ||
| 394 | .byte -5 | ||
| 395 | .byte -5 | ||
| 396 | .byte -5 | ||
| 397 | .byte -5 | ||
| 398 | .byte -5 | ||
| 399 | .byte -5 | ||
| 400 | .byte -5 | ||
| 401 | .byte -5 | ||
| 402 | .byte -6 | ||
| 403 | .byte -6 | ||
| 404 | .byte -6 | ||
| 405 | .byte -6 | ||
| 406 | .byte -6 | ||
| 407 | .byte -6 | ||
| 408 | .byte -6 | ||
| 409 | .byte -6 | ||
| 410 | .byte -6 | ||
| 411 | .byte -6 | ||
| 412 | .byte -6 | ||
| 413 | .byte -6 | ||
| 414 | .byte -6 | ||
| 415 | .byte -6 | ||
| 416 | .byte -6 | ||
| 417 | .byte -6 | ||
| 418 | .byte -6 | ||
| 419 | .byte -6 | ||
| 420 | .byte -6 | ||
| 421 | .byte -6 | ||
| 422 | .byte -6 | ||
| 423 | .byte -6 | ||
| 424 | .byte -6 | ||
| 425 | .byte -6 | ||
| 426 | .byte -6 | ||
| 427 | .byte -6 | ||
| 428 | .byte -6 | ||
| 429 | .byte -6 | ||
| 430 | .byte -6 | ||
| 431 | .byte -6 | ||
| 432 | .byte -6 | ||
| 433 | .byte -6 | ||
| 434 | .byte -6 | ||
| 435 | .byte -6 | ||
| 436 | .byte -6 | ||
| 437 | .byte -6 | ||
| 438 | .byte -6 | ||
| 439 | .byte -6 | ||
| 440 | .byte -6 | ||
| 441 | .byte -6 | ||
| 442 | .byte -6 | ||
| 443 | .byte -6 | ||
| 444 | .byte -6 | ||
| 445 | .byte -6 | ||
| 446 | .byte -6 | ||
| 447 | .byte -6 | ||
| 448 | .byte -6 | ||
| 449 | .byte -6 | ||
| 450 | .byte -6 | ||
| 451 | .byte -6 | ||
| 452 | .byte -6 | ||
| 453 | .byte -6 | ||
| 454 | .byte -6 | ||
| 455 | .byte -6 | ||
| 456 | .byte -6 | ||
| 457 | .byte -6 | ||
| 458 | .byte -6 | ||
| 459 | .byte -6 | ||
| 460 | .byte -6 | ||
| 461 | .byte -6 | ||
| 462 | .byte -6 | ||
| 463 | .byte -6 | ||
| 464 | .byte -6 | ||
| 465 | /* Lookup table translating positive divisor to index into table of | ||
| 466 | normalized inverse. N.B. the '0' entry is also the last entry of the | ||
| 467 | previous table, and causes an unaligned access for division by zero. */ | ||
| 468 | div_table_ix: | ||
| 469 | .byte -6 | ||
| 470 | .byte -128 | ||
| 471 | .byte -128 | ||
| 472 | .byte 0 | ||
| 473 | .byte -128 | ||
| 474 | .byte -64 | ||
| 475 | .byte 0 | ||
| 476 | .byte 64 | ||
| 477 | .byte -128 | ||
| 478 | .byte -96 | ||
| 479 | .byte -64 | ||
| 480 | .byte -32 | ||
| 481 | .byte 0 | ||
| 482 | .byte 32 | ||
| 483 | .byte 64 | ||
| 484 | .byte 96 | ||
| 485 | .byte -128 | ||
| 486 | .byte -112 | ||
| 487 | .byte -96 | ||
| 488 | .byte -80 | ||
| 489 | .byte -64 | ||
| 490 | .byte -48 | ||
| 491 | .byte -32 | ||
| 492 | .byte -16 | ||
| 493 | .byte 0 | ||
| 494 | .byte 16 | ||
| 495 | .byte 32 | ||
| 496 | .byte 48 | ||
| 497 | .byte 64 | ||
| 498 | .byte 80 | ||
| 499 | .byte 96 | ||
| 500 | .byte 112 | ||
| 501 | .byte -128 | ||
| 502 | .byte -120 | ||
| 503 | .byte -112 | ||
| 504 | .byte -104 | ||
| 505 | .byte -96 | ||
| 506 | .byte -88 | ||
| 507 | .byte -80 | ||
| 508 | .byte -72 | ||
| 509 | .byte -64 | ||
| 510 | .byte -56 | ||
| 511 | .byte -48 | ||
| 512 | .byte -40 | ||
| 513 | .byte -32 | ||
| 514 | .byte -24 | ||
| 515 | .byte -16 | ||
| 516 | .byte -8 | ||
| 517 | .byte 0 | ||
| 518 | .byte 8 | ||
| 519 | .byte 16 | ||
| 520 | .byte 24 | ||
| 521 | .byte 32 | ||
| 522 | .byte 40 | ||
| 523 | .byte 48 | ||
| 524 | .byte 56 | ||
| 525 | .byte 64 | ||
| 526 | .byte 72 | ||
| 527 | .byte 80 | ||
| 528 | .byte 88 | ||
| 529 | .byte 96 | ||
| 530 | .byte 104 | ||
| 531 | .byte 112 | ||
| 532 | .byte 120 | ||
| 533 | .byte -128 | ||
| 534 | .byte -124 | ||
| 535 | .byte -120 | ||
| 536 | .byte -116 | ||
| 537 | .byte -112 | ||
| 538 | .byte -108 | ||
| 539 | .byte -104 | ||
| 540 | .byte -100 | ||
| 541 | .byte -96 | ||
| 542 | .byte -92 | ||
| 543 | .byte -88 | ||
| 544 | .byte -84 | ||
| 545 | .byte -80 | ||
| 546 | .byte -76 | ||
| 547 | .byte -72 | ||
| 548 | .byte -68 | ||
| 549 | .byte -64 | ||
| 550 | .byte -60 | ||
| 551 | .byte -56 | ||
| 552 | .byte -52 | ||
| 553 | .byte -48 | ||
| 554 | .byte -44 | ||
| 555 | .byte -40 | ||
| 556 | .byte -36 | ||
| 557 | .byte -32 | ||
| 558 | .byte -28 | ||
| 559 | .byte -24 | ||
| 560 | .byte -20 | ||
| 561 | .byte -16 | ||
| 562 | .byte -12 | ||
| 563 | .byte -8 | ||
| 564 | .byte -4 | ||
| 565 | .byte 0 | ||
| 566 | .byte 4 | ||
| 567 | .byte 8 | ||
| 568 | .byte 12 | ||
| 569 | .byte 16 | ||
| 570 | .byte 20 | ||
| 571 | .byte 24 | ||
| 572 | .byte 28 | ||
| 573 | .byte 32 | ||
| 574 | .byte 36 | ||
| 575 | .byte 40 | ||
| 576 | .byte 44 | ||
| 577 | .byte 48 | ||
| 578 | .byte 52 | ||
| 579 | .byte 56 | ||
| 580 | .byte 60 | ||
| 581 | .byte 64 | ||
| 582 | .byte 68 | ||
| 583 | .byte 72 | ||
| 584 | .byte 76 | ||
| 585 | .byte 80 | ||
| 586 | .byte 84 | ||
| 587 | .byte 88 | ||
| 588 | .byte 92 | ||
| 589 | .byte 96 | ||
| 590 | .byte 100 | ||
| 591 | .byte 104 | ||
| 592 | .byte 108 | ||
| 593 | .byte 112 | ||
| 594 | .byte 116 | ||
| 595 | .byte 120 | ||
| 596 | .byte 124 | ||
| 597 | .byte -128 | ||
| 598 | /* 1/64 .. 1/127, normalized. There is an implicit leading 1 in bit 32. */ | ||
| 599 | .balign 4 | ||
| 600 | zero_l: | ||
| 601 | .long 0x0 | ||
| 602 | .long 0xF81F81F9 | ||
| 603 | .long 0xF07C1F08 | ||
| 604 | .long 0xE9131AC0 | ||
| 605 | .long 0xE1E1E1E2 | ||
| 606 | .long 0xDAE6076C | ||
| 607 | .long 0xD41D41D5 | ||
| 608 | .long 0xCD856891 | ||
| 609 | .long 0xC71C71C8 | ||
| 610 | .long 0xC0E07039 | ||
| 611 | .long 0xBACF914D | ||
| 612 | .long 0xB4E81B4F | ||
| 613 | .long 0xAF286BCB | ||
| 614 | .long 0xA98EF607 | ||
| 615 | .long 0xA41A41A5 | ||
| 616 | .long 0x9EC8E952 | ||
| 617 | .long 0x9999999A | ||
| 618 | .long 0x948B0FCE | ||
| 619 | .long 0x8F9C18FA | ||
| 620 | .long 0x8ACB90F7 | ||
| 621 | .long 0x86186187 | ||
| 622 | .long 0x81818182 | ||
| 623 | .long 0x7D05F418 | ||
| 624 | .long 0x78A4C818 | ||
| 625 | .long 0x745D1746 | ||
| 626 | .long 0x702E05C1 | ||
| 627 | .long 0x6C16C16D | ||
| 628 | .long 0x68168169 | ||
| 629 | .long 0x642C8591 | ||
| 630 | .long 0x60581606 | ||
| 631 | .long 0x5C9882BA | ||
| 632 | .long 0x58ED2309 | ||
| 633 | div_table_inv: | ||
| 634 | .long 0x55555556 | ||
| 635 | .long 0x51D07EAF | ||
| 636 | .long 0x4E5E0A73 | ||
| 637 | .long 0x4AFD6A06 | ||
| 638 | .long 0x47AE147B | ||
| 639 | .long 0x446F8657 | ||
| 640 | .long 0x41414142 | ||
| 641 | .long 0x3E22CBCF | ||
| 642 | .long 0x3B13B13C | ||
| 643 | .long 0x38138139 | ||
| 644 | .long 0x3521CFB3 | ||
| 645 | .long 0x323E34A3 | ||
| 646 | .long 0x2F684BDB | ||
| 647 | .long 0x2C9FB4D9 | ||
| 648 | .long 0x29E4129F | ||
| 649 | .long 0x27350B89 | ||
| 650 | .long 0x24924925 | ||
| 651 | .long 0x21FB7813 | ||
| 652 | .long 0x1F7047DD | ||
| 653 | .long 0x1CF06ADB | ||
| 654 | .long 0x1A7B9612 | ||
| 655 | .long 0x18118119 | ||
| 656 | .long 0x15B1E5F8 | ||
| 657 | .long 0x135C8114 | ||
| 658 | .long 0x11111112 | ||
| 659 | .long 0xECF56BF | ||
| 660 | .long 0xC9714FC | ||
| 661 | .long 0xA6810A7 | ||
| 662 | .long 0x8421085 | ||
| 663 | .long 0x624DD30 | ||
| 664 | .long 0x4104105 | ||
| 665 | .long 0x2040811 | ||
| 666 | /* maximum error: 0.987342 scaled: 0.921875*/ | ||
diff --git a/arch/sh/lib64/Makefile b/arch/sh/lib64/Makefile index 9950966923a0..4bacb9e83478 100644 --- a/arch/sh/lib64/Makefile +++ b/arch/sh/lib64/Makefile | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | # Makefile for the SH-5 specific library files.. | 2 | # Makefile for the SH-5 specific library files.. |
| 3 | # | 3 | # |
| 4 | # Copyright (C) 2000, 2001 Paolo Alberelli | 4 | # Copyright (C) 2000, 2001 Paolo Alberelli |
| 5 | # Copyright (C) 2003 Paul Mundt | 5 | # Copyright (C) 2003 - 2008 Paul Mundt |
| 6 | # | 6 | # |
| 7 | # This file is subject to the terms and conditions of the GNU General Public | 7 | # This file is subject to the terms and conditions of the GNU General Public |
| 8 | # License. See the file "COPYING" in the main directory of this archive | 8 | # License. See the file "COPYING" in the main directory of this archive |
| @@ -10,6 +10,8 @@ | |||
| 10 | # | 10 | # |
| 11 | 11 | ||
| 12 | # Panic should really be compiled as PIC | 12 | # Panic should really be compiled as PIC |
| 13 | lib-y := udelay.o c-checksum.o dbg.o panic.o memcpy.o copy_user_memcpy.o \ | 13 | lib-y := udelay.o c-checksum.o dbg.o panic.o memcpy.o memset.o \ |
| 14 | copy_page.o clear_page.o | 14 | copy_user_memcpy.o copy_page.o clear_page.o strcpy.o strlen.o |
| 15 | 15 | ||
| 16 | # Extracted from libgcc | ||
| 17 | lib-y += udivsi3.o udivdi3.o sdivsi3.o | ||
diff --git a/arch/sh/lib64/c-checksum.c b/arch/sh/lib64/c-checksum.c index 5c284e0cff9c..73c0877e3a29 100644 --- a/arch/sh/lib64/c-checksum.c +++ b/arch/sh/lib64/c-checksum.c | |||
| @@ -35,7 +35,7 @@ static inline unsigned short foldto16(unsigned long x) | |||
| 35 | 35 | ||
| 36 | static inline unsigned short myfoldto16(unsigned long long x) | 36 | static inline unsigned short myfoldto16(unsigned long long x) |
| 37 | { | 37 | { |
| 38 | /* Fold down to 32-bits so we don't loose in the typedef-less | 38 | /* Fold down to 32-bits so we don't lose in the typedef-less |
| 39 | network stack. */ | 39 | network stack. */ |
| 40 | /* 64 to 33 */ | 40 | /* 64 to 33 */ |
| 41 | x = (x & 0xffffffff) + (x >> 32); | 41 | x = (x & 0xffffffff) + (x >> 32); |
| @@ -199,7 +199,7 @@ __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, | |||
| 199 | result = (__force u64) saddr + (__force u64) daddr + | 199 | result = (__force u64) saddr + (__force u64) daddr + |
| 200 | (__force u64) sum + ((len + proto) << 8); | 200 | (__force u64) sum + ((len + proto) << 8); |
| 201 | 201 | ||
| 202 | /* Fold down to 32-bits so we don't loose in the typedef-less | 202 | /* Fold down to 32-bits so we don't lose in the typedef-less |
| 203 | network stack. */ | 203 | network stack. */ |
| 204 | /* 64 to 33 */ | 204 | /* 64 to 33 */ |
| 205 | result = (result & 0xffffffff) + (result >> 32); | 205 | result = (result & 0xffffffff) + (result >> 32); |
diff --git a/arch/sh/lib64/memcpy.S b/arch/sh/lib64/memcpy.S new file mode 100644 index 000000000000..dd300c372ce1 --- /dev/null +++ b/arch/sh/lib64/memcpy.S | |||
| @@ -0,0 +1,201 @@ | |||
| 1 | /* Cloned and hacked for uClibc by Paul Mundt, December 2003 */ | ||
| 2 | /* Modified by SuperH, Inc. September 2003 */ | ||
| 3 | ! | ||
| 4 | ! Fast SH memcpy | ||
| 5 | ! | ||
| 6 | ! by Toshiyasu Morita (tm@netcom.com) | ||
| 7 | ! hacked by J"orn Rernnecke (joern.rennecke@superh.com) ("o for o-umlaut) | ||
| 8 | ! SH5 code Copyright 2002 SuperH Ltd. | ||
| 9 | ! | ||
| 10 | ! Entry: ARG0: destination pointer | ||
| 11 | ! ARG1: source pointer | ||
| 12 | ! ARG2: byte count | ||
| 13 | ! | ||
| 14 | ! Exit: RESULT: destination pointer | ||
| 15 | ! any other registers in the range r0-r7: trashed | ||
| 16 | ! | ||
| 17 | ! Notes: Usually one wants to do small reads and write a longword, but | ||
| 18 | ! unfortunately it is difficult in some cases to concatanate bytes | ||
| 19 | ! into a longword on the SH, so this does a longword read and small | ||
| 20 | ! writes. | ||
| 21 | ! | ||
| 22 | ! This implementation makes two assumptions about how it is called: | ||
| 23 | ! | ||
| 24 | ! 1.: If the byte count is nonzero, the address of the last byte to be | ||
| 25 | ! copied is unsigned greater than the address of the first byte to | ||
| 26 | ! be copied. This could be easily swapped for a signed comparison, | ||
| 27 | ! but the algorithm used needs some comparison. | ||
| 28 | ! | ||
| 29 | ! 2.: When there are two or three bytes in the last word of an 11-or-more | ||
| 30 | ! bytes memory chunk to b copied, the rest of the word can be read | ||
| 31 | ! without side effects. | ||
| 32 | ! This could be easily changed by increasing the minumum size of | ||
| 33 | ! a fast memcpy and the amount subtracted from r7 before L_2l_loop be 2, | ||
| 34 | ! however, this would cost a few extra cyles on average. | ||
| 35 | ! For SHmedia, the assumption is that any quadword can be read in its | ||
| 36 | ! enirety if at least one byte is included in the copy. | ||
| 37 | ! | ||
| 38 | |||
| 39 | .section .text..SHmedia32,"ax" | ||
| 40 | .globl memcpy | ||
| 41 | .type memcpy, @function | ||
| 42 | .align 5 | ||
| 43 | |||
| 44 | memcpy: | ||
| 45 | |||
| 46 | #define LDUAQ(P,O,D0,D1) ldlo.q P,O,D0; ldhi.q P,O+7,D1 | ||
| 47 | #define STUAQ(P,O,D0,D1) stlo.q P,O,D0; sthi.q P,O+7,D1 | ||
| 48 | #define LDUAL(P,O,D0,D1) ldlo.l P,O,D0; ldhi.l P,O+3,D1 | ||
| 49 | #define STUAL(P,O,D0,D1) stlo.l P,O,D0; sthi.l P,O+3,D1 | ||
| 50 | |||
| 51 | ld.b r3,0,r63 | ||
| 52 | pta/l Large,tr0 | ||
| 53 | movi 25,r0 | ||
| 54 | bgeu/u r4,r0,tr0 | ||
| 55 | nsb r4,r0 | ||
| 56 | shlli r0,5,r0 | ||
| 57 | movi (L1-L0+63*32 + 1) & 0xffff,r1 | ||
| 58 | sub r1, r0, r0 | ||
| 59 | L0: ptrel r0,tr0 | ||
| 60 | add r2,r4,r5 | ||
| 61 | ptabs r18,tr1 | ||
| 62 | add r3,r4,r6 | ||
| 63 | blink tr0,r63 | ||
| 64 | |||
| 65 | /* Rearranged to make cut2 safe */ | ||
| 66 | .balign 8 | ||
| 67 | L4_7: /* 4..7 byte memcpy cntd. */ | ||
| 68 | stlo.l r2, 0, r0 | ||
| 69 | or r6, r7, r6 | ||
| 70 | sthi.l r5, -1, r6 | ||
| 71 | stlo.l r5, -4, r6 | ||
| 72 | blink tr1,r63 | ||
| 73 | |||
| 74 | .balign 8 | ||
| 75 | L1: /* 0 byte memcpy */ | ||
| 76 | nop | ||
| 77 | blink tr1,r63 | ||
| 78 | nop | ||
| 79 | nop | ||
| 80 | nop | ||
| 81 | nop | ||
| 82 | |||
| 83 | L2_3: /* 2 or 3 byte memcpy cntd. */ | ||
| 84 | st.b r5,-1,r6 | ||
| 85 | blink tr1,r63 | ||
| 86 | |||
| 87 | /* 1 byte memcpy */ | ||
| 88 | ld.b r3,0,r0 | ||
| 89 | st.b r2,0,r0 | ||
| 90 | blink tr1,r63 | ||
| 91 | |||
| 92 | L8_15: /* 8..15 byte memcpy cntd. */ | ||
| 93 | stlo.q r2, 0, r0 | ||
| 94 | or r6, r7, r6 | ||
| 95 | sthi.q r5, -1, r6 | ||
| 96 | stlo.q r5, -8, r6 | ||
| 97 | blink tr1,r63 | ||
| 98 | |||
| 99 | /* 2 or 3 byte memcpy */ | ||
| 100 | ld.b r3,0,r0 | ||
| 101 | ld.b r2,0,r63 | ||
| 102 | ld.b r3,1,r1 | ||
| 103 | st.b r2,0,r0 | ||
| 104 | pta/l L2_3,tr0 | ||
| 105 | ld.b r6,-1,r6 | ||
| 106 | st.b r2,1,r1 | ||
| 107 | blink tr0, r63 | ||
| 108 | |||
| 109 | /* 4 .. 7 byte memcpy */ | ||
| 110 | LDUAL (r3, 0, r0, r1) | ||
| 111 | pta L4_7, tr0 | ||
| 112 | ldlo.l r6, -4, r7 | ||
| 113 | or r0, r1, r0 | ||
| 114 | sthi.l r2, 3, r0 | ||
| 115 | ldhi.l r6, -1, r6 | ||
| 116 | blink tr0, r63 | ||
| 117 | |||
| 118 | /* 8 .. 15 byte memcpy */ | ||
| 119 | LDUAQ (r3, 0, r0, r1) | ||
| 120 | pta L8_15, tr0 | ||
| 121 | ldlo.q r6, -8, r7 | ||
| 122 | or r0, r1, r0 | ||
| 123 | sthi.q r2, 7, r0 | ||
| 124 | ldhi.q r6, -1, r6 | ||
| 125 | blink tr0, r63 | ||
| 126 | |||
| 127 | /* 16 .. 24 byte memcpy */ | ||
| 128 | LDUAQ (r3, 0, r0, r1) | ||
| 129 | LDUAQ (r3, 8, r8, r9) | ||
| 130 | or r0, r1, r0 | ||
| 131 | sthi.q r2, 7, r0 | ||
| 132 | or r8, r9, r8 | ||
| 133 | sthi.q r2, 15, r8 | ||
| 134 | ldlo.q r6, -8, r7 | ||
| 135 | ldhi.q r6, -1, r6 | ||
| 136 | stlo.q r2, 8, r8 | ||
| 137 | stlo.q r2, 0, r0 | ||
| 138 | or r6, r7, r6 | ||
| 139 | sthi.q r5, -1, r6 | ||
| 140 | stlo.q r5, -8, r6 | ||
| 141 | blink tr1,r63 | ||
| 142 | |||
| 143 | Large: | ||
| 144 | ld.b r2, 0, r63 | ||
| 145 | pta/l Loop_ua, tr1 | ||
| 146 | ori r3, -8, r7 | ||
| 147 | sub r2, r7, r22 | ||
| 148 | sub r3, r2, r6 | ||
| 149 | add r2, r4, r5 | ||
| 150 | ldlo.q r3, 0, r0 | ||
| 151 | addi r5, -16, r5 | ||
| 152 | movi 64+8, r27 // could subtract r7 from that. | ||
| 153 | stlo.q r2, 0, r0 | ||
| 154 | sthi.q r2, 7, r0 | ||
| 155 | ldx.q r22, r6, r0 | ||
| 156 | bgtu/l r27, r4, tr1 | ||
| 157 | |||
| 158 | addi r5, -48, r27 | ||
| 159 | pta/l Loop_line, tr0 | ||
| 160 | addi r6, 64, r36 | ||
| 161 | addi r6, -24, r19 | ||
| 162 | addi r6, -16, r20 | ||
| 163 | addi r6, -8, r21 | ||
| 164 | |||
| 165 | Loop_line: | ||
| 166 | ldx.q r22, r36, r63 | ||
| 167 | alloco r22, 32 | ||
| 168 | addi r22, 32, r22 | ||
| 169 | ldx.q r22, r19, r23 | ||
| 170 | sthi.q r22, -25, r0 | ||
| 171 | ldx.q r22, r20, r24 | ||
| 172 | ldx.q r22, r21, r25 | ||
| 173 | stlo.q r22, -32, r0 | ||
| 174 | ldx.q r22, r6, r0 | ||
| 175 | sthi.q r22, -17, r23 | ||
| 176 | sthi.q r22, -9, r24 | ||
| 177 | sthi.q r22, -1, r25 | ||
| 178 | stlo.q r22, -24, r23 | ||
| 179 | stlo.q r22, -16, r24 | ||
| 180 | stlo.q r22, -8, r25 | ||
| 181 | bgeu r27, r22, tr0 | ||
| 182 | |||
| 183 | Loop_ua: | ||
| 184 | addi r22, 8, r22 | ||
| 185 | sthi.q r22, -1, r0 | ||
| 186 | stlo.q r22, -8, r0 | ||
| 187 | ldx.q r22, r6, r0 | ||
| 188 | bgtu/l r5, r22, tr1 | ||
| 189 | |||
| 190 | add r3, r4, r7 | ||
| 191 | ldlo.q r7, -8, r1 | ||
| 192 | sthi.q r22, 7, r0 | ||
| 193 | ldhi.q r7, -1, r7 | ||
| 194 | ptabs r18,tr1 | ||
| 195 | stlo.q r22, 0, r0 | ||
| 196 | or r1, r7, r1 | ||
| 197 | sthi.q r5, 15, r1 | ||
| 198 | stlo.q r5, 8, r1 | ||
| 199 | blink tr1, r63 | ||
| 200 | |||
| 201 | .size memcpy,.-memcpy | ||
diff --git a/arch/sh/lib64/memcpy.c b/arch/sh/lib64/memcpy.c deleted file mode 100644 index fba436a92bfa..000000000000 --- a/arch/sh/lib64/memcpy.c +++ /dev/null | |||
| @@ -1,81 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2002 Mark Debbage (Mark.Debbage@superh.com) | ||
| 3 | * | ||
| 4 | * May be copied or modified under the terms of the GNU General Public | ||
| 5 | * License. See linux/COPYING for more information. | ||
| 6 | * | ||
| 7 | */ | ||
| 8 | |||
| 9 | #include <linux/types.h> | ||
| 10 | #include <asm/string.h> | ||
| 11 | |||
| 12 | // This is a simplistic optimization of memcpy to increase the | ||
| 13 | // granularity of access beyond one byte using aligned | ||
| 14 | // loads and stores. This is not an optimal implementation | ||
| 15 | // for SH-5 (especially with regard to prefetching and the cache), | ||
| 16 | // and a better version should be provided later ... | ||
| 17 | |||
| 18 | void *memcpy(void *dest, const void *src, size_t count) | ||
| 19 | { | ||
| 20 | char *d = (char *) dest, *s = (char *) src; | ||
| 21 | |||
| 22 | if (count >= 32) { | ||
| 23 | int i = 8 - (((unsigned long) d) & 0x7); | ||
| 24 | |||
| 25 | if (i != 8) | ||
| 26 | while (i-- && count--) { | ||
| 27 | *d++ = *s++; | ||
| 28 | } | ||
| 29 | |||
| 30 | if (((((unsigned long) d) & 0x7) == 0) && | ||
| 31 | ((((unsigned long) s) & 0x7) == 0)) { | ||
| 32 | while (count >= 32) { | ||
| 33 | unsigned long long t1, t2, t3, t4; | ||
| 34 | t1 = *(unsigned long long *) (s); | ||
| 35 | t2 = *(unsigned long long *) (s + 8); | ||
| 36 | t3 = *(unsigned long long *) (s + 16); | ||
| 37 | t4 = *(unsigned long long *) (s + 24); | ||
| 38 | *(unsigned long long *) (d) = t1; | ||
| 39 | *(unsigned long long *) (d + 8) = t2; | ||
| 40 | *(unsigned long long *) (d + 16) = t3; | ||
| 41 | *(unsigned long long *) (d + 24) = t4; | ||
| 42 | d += 32; | ||
| 43 | s += 32; | ||
| 44 | count -= 32; | ||
| 45 | } | ||
| 46 | while (count >= 8) { | ||
| 47 | *(unsigned long long *) d = | ||
| 48 | *(unsigned long long *) s; | ||
| 49 | d += 8; | ||
| 50 | s += 8; | ||
| 51 | count -= 8; | ||
| 52 | } | ||
| 53 | } | ||
| 54 | |||
| 55 | if (((((unsigned long) d) & 0x3) == 0) && | ||
| 56 | ((((unsigned long) s) & 0x3) == 0)) { | ||
| 57 | while (count >= 4) { | ||
| 58 | *(unsigned long *) d = *(unsigned long *) s; | ||
| 59 | d += 4; | ||
| 60 | s += 4; | ||
| 61 | count -= 4; | ||
| 62 | } | ||
| 63 | } | ||
| 64 | |||
| 65 | if (((((unsigned long) d) & 0x1) == 0) && | ||
| 66 | ((((unsigned long) s) & 0x1) == 0)) { | ||
| 67 | while (count >= 2) { | ||
| 68 | *(unsigned short *) d = *(unsigned short *) s; | ||
| 69 | d += 2; | ||
| 70 | s += 2; | ||
| 71 | count -= 2; | ||
| 72 | } | ||
| 73 | } | ||
| 74 | } | ||
| 75 | |||
| 76 | while (count--) { | ||
| 77 | *d++ = *s++; | ||
| 78 | } | ||
| 79 | |||
| 80 | return d; | ||
| 81 | } | ||
diff --git a/arch/sh/lib64/memset.S b/arch/sh/lib64/memset.S new file mode 100644 index 000000000000..2d37b0488552 --- /dev/null +++ b/arch/sh/lib64/memset.S | |||
| @@ -0,0 +1,91 @@ | |||
| 1 | /* Cloned and hacked for uClibc by Paul Mundt, December 2003 */ | ||
| 2 | /* Modified by SuperH, Inc. September 2003 */ | ||
| 3 | ! | ||
| 4 | ! Fast SH memset | ||
| 5 | ! | ||
| 6 | ! by Toshiyasu Morita (tm@netcom.com) | ||
| 7 | ! | ||
| 8 | ! SH5 code by J"orn Rennecke (joern.rennecke@superh.com) | ||
| 9 | ! Copyright 2002 SuperH Ltd. | ||
| 10 | ! | ||
| 11 | |||
| 12 | #if __BYTE_ORDER == __LITTLE_ENDIAN | ||
| 13 | #define SHHI shlld | ||
| 14 | #define SHLO shlrd | ||
| 15 | #else | ||
| 16 | #define SHHI shlrd | ||
| 17 | #define SHLO shlld | ||
| 18 | #endif | ||
| 19 | |||
| 20 | .section .text..SHmedia32,"ax" | ||
| 21 | .globl memset | ||
| 22 | .type memset, @function | ||
| 23 | |||
| 24 | .align 5 | ||
| 25 | |||
| 26 | memset: | ||
| 27 | pta/l multiquad, tr0 | ||
| 28 | andi r2, 7, r22 | ||
| 29 | ptabs r18, tr2 | ||
| 30 | mshflo.b r3,r3,r3 | ||
| 31 | add r4, r22, r23 | ||
| 32 | mperm.w r3, r63, r3 // Fill pattern now in every byte of r3 | ||
| 33 | |||
| 34 | movi 8, r9 | ||
| 35 | bgtu/u r23, r9, tr0 // multiquad | ||
| 36 | |||
| 37 | beqi/u r4, 0, tr2 // Return with size 0 - ensures no mem accesses | ||
| 38 | ldlo.q r2, 0, r7 | ||
| 39 | shlli r4, 2, r4 | ||
| 40 | movi -1, r8 | ||
| 41 | SHHI r8, r4, r8 | ||
| 42 | SHHI r8, r4, r8 | ||
| 43 | mcmv r7, r8, r3 | ||
| 44 | stlo.q r2, 0, r3 | ||
| 45 | blink tr2, r63 | ||
| 46 | |||
| 47 | multiquad: | ||
| 48 | pta/l lastquad, tr0 | ||
| 49 | stlo.q r2, 0, r3 | ||
| 50 | shlri r23, 3, r24 | ||
| 51 | add r2, r4, r5 | ||
| 52 | beqi/u r24, 1, tr0 // lastquad | ||
| 53 | pta/l loop, tr1 | ||
| 54 | sub r2, r22, r25 | ||
| 55 | andi r5, -8, r20 // calculate end address and | ||
| 56 | addi r20, -7*8, r8 // loop end address; This might overflow, so we need | ||
| 57 | // to use a different test before we start the loop | ||
| 58 | bge/u r24, r9, tr1 // loop | ||
| 59 | st.q r25, 8, r3 | ||
| 60 | st.q r20, -8, r3 | ||
| 61 | shlri r24, 1, r24 | ||
| 62 | beqi/u r24, 1, tr0 // lastquad | ||
| 63 | st.q r25, 16, r3 | ||
| 64 | st.q r20, -16, r3 | ||
| 65 | beqi/u r24, 2, tr0 // lastquad | ||
| 66 | st.q r25, 24, r3 | ||
| 67 | st.q r20, -24, r3 | ||
| 68 | lastquad: | ||
| 69 | sthi.q r5, -1, r3 | ||
| 70 | blink tr2,r63 | ||
| 71 | |||
| 72 | loop: | ||
| 73 | !!! alloco r25, 32 // QQQ comment out for short-term fix to SHUK #3895. | ||
| 74 | // QQQ commenting out is locically correct, but sub-optimal | ||
| 75 | // QQQ Sean McGoogan - 4th April 2003. | ||
| 76 | st.q r25, 8, r3 | ||
| 77 | st.q r25, 16, r3 | ||
| 78 | st.q r25, 24, r3 | ||
| 79 | st.q r25, 32, r3 | ||
| 80 | addi r25, 32, r25 | ||
| 81 | bgeu/l r8, r25, tr1 // loop | ||
| 82 | |||
| 83 | st.q r20, -40, r3 | ||
| 84 | st.q r20, -32, r3 | ||
| 85 | st.q r20, -24, r3 | ||
| 86 | st.q r20, -16, r3 | ||
| 87 | st.q r20, -8, r3 | ||
| 88 | sthi.q r5, -1, r3 | ||
| 89 | blink tr2,r63 | ||
| 90 | |||
| 91 | .size memset,.-memset | ||
diff --git a/arch/sh/lib64/sdivsi3.S b/arch/sh/lib64/sdivsi3.S new file mode 100644 index 000000000000..6a800c6a4904 --- /dev/null +++ b/arch/sh/lib64/sdivsi3.S | |||
| @@ -0,0 +1,131 @@ | |||
| 1 | .global __sdivsi3 | ||
| 2 | .section .text..SHmedia32,"ax" | ||
| 3 | .align 2 | ||
| 4 | |||
| 5 | /* inputs: r4,r5 */ | ||
| 6 | /* clobbered: r1,r18,r19,r20,r21,r25,tr0 */ | ||
| 7 | /* result in r0 */ | ||
| 8 | __sdivsi3: | ||
| 9 | ptb __div_table,tr0 | ||
| 10 | |||
| 11 | nsb r5, r1 | ||
| 12 | shlld r5, r1, r25 /* normalize; [-2 ..1, 1..2) in s2.62 */ | ||
| 13 | shari r25, 58, r21 /* extract 5(6) bit index (s2.4 with hole -1..1) */ | ||
| 14 | /* bubble */ | ||
| 15 | gettr tr0,r20 | ||
| 16 | ldx.ub r20, r21, r19 /* u0.8 */ | ||
| 17 | shari r25, 32, r25 /* normalize to s2.30 */ | ||
| 18 | shlli r21, 1, r21 | ||
| 19 | muls.l r25, r19, r19 /* s2.38 */ | ||
| 20 | ldx.w r20, r21, r21 /* s2.14 */ | ||
| 21 | ptabs r18, tr0 | ||
| 22 | shari r19, 24, r19 /* truncate to s2.14 */ | ||
| 23 | sub r21, r19, r19 /* some 11 bit inverse in s1.14 */ | ||
| 24 | muls.l r19, r19, r21 /* u0.28 */ | ||
| 25 | sub r63, r1, r1 | ||
| 26 | addi r1, 92, r1 | ||
| 27 | muls.l r25, r21, r18 /* s2.58 */ | ||
| 28 | shlli r19, 45, r19 /* multiply by two and convert to s2.58 */ | ||
| 29 | /* bubble */ | ||
| 30 | sub r19, r18, r18 | ||
| 31 | shari r18, 28, r18 /* some 22 bit inverse in s1.30 */ | ||
| 32 | muls.l r18, r25, r0 /* s2.60 */ | ||
| 33 | muls.l r18, r4, r25 /* s32.30 */ | ||
| 34 | /* bubble */ | ||
| 35 | shari r0, 16, r19 /* s-16.44 */ | ||
| 36 | muls.l r19, r18, r19 /* s-16.74 */ | ||
| 37 | shari r25, 63, r0 | ||
| 38 | shari r4, 14, r18 /* s19.-14 */ | ||
| 39 | shari r19, 30, r19 /* s-16.44 */ | ||
| 40 | muls.l r19, r18, r19 /* s15.30 */ | ||
| 41 | xor r21, r0, r21 /* You could also use the constant 1 << 27. */ | ||
| 42 | add r21, r25, r21 | ||
| 43 | sub r21, r19, r21 | ||
| 44 | shard r21, r1, r21 | ||
| 45 | sub r21, r0, r0 | ||
| 46 | blink tr0, r63 | ||
| 47 | |||
| 48 | /* This table has been generated by divtab.c . | ||
| 49 | Defects for bias -330: | ||
| 50 | Max defect: 6.081536e-07 at -1.000000e+00 | ||
| 51 | Min defect: 2.849516e-08 at 1.030651e+00 | ||
| 52 | Max 2nd step defect: 9.606539e-12 at -1.000000e+00 | ||
| 53 | Min 2nd step defect: 0.000000e+00 at 0.000000e+00 | ||
| 54 | Defect at 1: 1.238659e-07 | ||
| 55 | Defect at -2: 1.061708e-07 */ | ||
| 56 | |||
| 57 | .balign 2 | ||
| 58 | .type __div_table,@object | ||
| 59 | .size __div_table,128 | ||
| 60 | /* negative division constants */ | ||
| 61 | .word -16638 | ||
| 62 | .word -17135 | ||
| 63 | .word -17737 | ||
| 64 | .word -18433 | ||
| 65 | .word -19103 | ||
| 66 | .word -19751 | ||
| 67 | .word -20583 | ||
| 68 | .word -21383 | ||
| 69 | .word -22343 | ||
| 70 | .word -23353 | ||
| 71 | .word -24407 | ||
| 72 | .word -25582 | ||
| 73 | .word -26863 | ||
| 74 | .word -28382 | ||
| 75 | .word -29965 | ||
| 76 | .word -31800 | ||
| 77 | /* negative division factors */ | ||
| 78 | .byte 66 | ||
| 79 | .byte 70 | ||
| 80 | .byte 75 | ||
| 81 | .byte 81 | ||
| 82 | .byte 87 | ||
| 83 | .byte 93 | ||
| 84 | .byte 101 | ||
| 85 | .byte 109 | ||
| 86 | .byte 119 | ||
| 87 | .byte 130 | ||
| 88 | .byte 142 | ||
| 89 | .byte 156 | ||
| 90 | .byte 172 | ||
| 91 | .byte 192 | ||
| 92 | .byte 214 | ||
| 93 | .byte 241 | ||
| 94 | .skip 16 | ||
| 95 | .global __div_table | ||
| 96 | __div_table: | ||
| 97 | .skip 16 | ||
| 98 | /* positive division factors */ | ||
| 99 | .byte 241 | ||
| 100 | .byte 214 | ||
| 101 | .byte 192 | ||
| 102 | .byte 172 | ||
| 103 | .byte 156 | ||
| 104 | .byte 142 | ||
| 105 | .byte 130 | ||
| 106 | .byte 119 | ||
| 107 | .byte 109 | ||
| 108 | .byte 101 | ||
| 109 | .byte 93 | ||
| 110 | .byte 87 | ||
| 111 | .byte 81 | ||
| 112 | .byte 75 | ||
| 113 | .byte 70 | ||
| 114 | .byte 66 | ||
| 115 | /* positive division constants */ | ||
| 116 | .word 31801 | ||
| 117 | .word 29966 | ||
| 118 | .word 28383 | ||
| 119 | .word 26864 | ||
| 120 | .word 25583 | ||
| 121 | .word 24408 | ||
| 122 | .word 23354 | ||
| 123 | .word 22344 | ||
| 124 | .word 21384 | ||
| 125 | .word 20584 | ||
| 126 | .word 19752 | ||
| 127 | .word 19104 | ||
| 128 | .word 18434 | ||
| 129 | .word 17738 | ||
| 130 | .word 17136 | ||
| 131 | .word 16639 | ||
diff --git a/arch/sh/lib64/strcpy.S b/arch/sh/lib64/strcpy.S new file mode 100644 index 000000000000..ea7c9c533eea --- /dev/null +++ b/arch/sh/lib64/strcpy.S | |||
| @@ -0,0 +1,97 @@ | |||
| 1 | /* Cloned and hacked for uClibc by Paul Mundt, December 2003 */ | ||
| 2 | /* Modified by SuperH, Inc. September 2003 */ | ||
| 3 | ! Entry: arg0: destination | ||
| 4 | ! arg1: source | ||
| 5 | ! Exit: result: destination | ||
| 6 | ! | ||
| 7 | ! SH5 code Copyright 2002 SuperH Ltd. | ||
| 8 | |||
| 9 | #if __BYTE_ORDER == __LITTLE_ENDIAN | ||
| 10 | #define SHHI shlld | ||
| 11 | #define SHLO shlrd | ||
| 12 | #else | ||
| 13 | #define SHHI shlrd | ||
| 14 | #define SHLO shlld | ||
| 15 | #endif | ||
| 16 | |||
| 17 | .section .text..SHmedia32,"ax" | ||
| 18 | .globl strcpy | ||
| 19 | .type strcpy, @function | ||
| 20 | .align 5 | ||
| 21 | |||
| 22 | strcpy: | ||
| 23 | |||
| 24 | pta/l shortstring,tr1 | ||
| 25 | ldlo.q r3,0,r4 | ||
| 26 | ptabs r18,tr4 | ||
| 27 | shlli r3,3,r7 | ||
| 28 | addi r2, 8, r0 | ||
| 29 | mcmpeq.b r4,r63,r6 | ||
| 30 | SHHI r6,r7,r6 | ||
| 31 | bnei/u r6,0,tr1 // shortstring | ||
| 32 | pta/l no_lddst, tr2 | ||
| 33 | ori r3,-8,r23 | ||
| 34 | sub r2, r23, r0 | ||
| 35 | sub r3, r2, r21 | ||
| 36 | addi r21, 8, r20 | ||
| 37 | ldx.q r0, r21, r5 | ||
| 38 | pta/l loop, tr0 | ||
| 39 | ori r2,-8,r22 | ||
| 40 | mcmpeq.b r5, r63, r6 | ||
| 41 | bgt/u r22, r23, tr2 // no_lddst | ||
| 42 | |||
| 43 | // r22 < r23 : Need to do a load from the destination. | ||
| 44 | // r22 == r23 : Doesn't actually need to load from destination, | ||
| 45 | // but still can be handled here. | ||
| 46 | ldlo.q r2, 0, r9 | ||
| 47 | movi -1, r8 | ||
| 48 | SHLO r8, r7, r8 | ||
| 49 | mcmv r4, r8, r9 | ||
| 50 | stlo.q r2, 0, r9 | ||
| 51 | beqi/l r6, 0, tr0 // loop | ||
| 52 | |||
| 53 | add r5, r63, r4 | ||
| 54 | addi r0, 8, r0 | ||
| 55 | blink tr1, r63 // shortstring | ||
| 56 | no_lddst: | ||
| 57 | // r22 > r23: note that for r22 == r23 the sthi.q would clobber | ||
| 58 | // bytes before the destination region. | ||
| 59 | stlo.q r2, 0, r4 | ||
| 60 | SHHI r4, r7, r4 | ||
| 61 | sthi.q r0, -1, r4 | ||
| 62 | beqi/l r6, 0, tr0 // loop | ||
| 63 | |||
| 64 | add r5, r63, r4 | ||
| 65 | addi r0, 8, r0 | ||
| 66 | shortstring: | ||
| 67 | #if __BYTE_ORDER != __LITTLE_ENDIAN | ||
| 68 | pta/l shortstring2,tr1 | ||
| 69 | byterev r4,r4 | ||
| 70 | #endif | ||
| 71 | shortstring2: | ||
| 72 | st.b r0,-8,r4 | ||
| 73 | andi r4,0xff,r5 | ||
| 74 | shlri r4,8,r4 | ||
| 75 | addi r0,1,r0 | ||
| 76 | bnei/l r5,0,tr1 | ||
| 77 | blink tr4,r63 // return | ||
| 78 | |||
| 79 | .balign 8 | ||
| 80 | loop: | ||
| 81 | stlo.q r0, 0, r5 | ||
| 82 | ldx.q r0, r20, r4 | ||
| 83 | addi r0, 16, r0 | ||
| 84 | sthi.q r0, -9, r5 | ||
| 85 | mcmpeq.b r4, r63, r6 | ||
| 86 | bnei/u r6, 0, tr1 // shortstring | ||
| 87 | ldx.q r0, r21, r5 | ||
| 88 | stlo.q r0, -8, r4 | ||
| 89 | sthi.q r0, -1, r4 | ||
| 90 | mcmpeq.b r5, r63, r6 | ||
| 91 | beqi/l r6, 0, tr0 // loop | ||
| 92 | |||
| 93 | add r5, r63, r4 | ||
| 94 | addi r0, 8, r0 | ||
| 95 | blink tr1, r63 // shortstring | ||
| 96 | |||
| 97 | .size strcpy,.-strcpy | ||
diff --git a/arch/sh/lib64/strlen.S b/arch/sh/lib64/strlen.S new file mode 100644 index 000000000000..cbc0d912e5f3 --- /dev/null +++ b/arch/sh/lib64/strlen.S | |||
| @@ -0,0 +1,33 @@ | |||
| 1 | /* | ||
| 2 | * Simplistic strlen() implementation for SHmedia. | ||
| 3 | * | ||
| 4 | * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org> | ||
| 5 | */ | ||
| 6 | |||
| 7 | .section .text..SHmedia32,"ax" | ||
| 8 | .globl strlen | ||
| 9 | .type strlen,@function | ||
| 10 | |||
| 11 | .balign 16 | ||
| 12 | strlen: | ||
| 13 | ptabs r18, tr4 | ||
| 14 | |||
| 15 | /* | ||
| 16 | * Note: We could easily deal with the NULL case here with a simple | ||
| 17 | * sanity check, though it seems that the behavior we want is to fault | ||
| 18 | * in the event that r2 == NULL, so we don't bother. | ||
| 19 | */ | ||
| 20 | /* beqi r2, 0, tr4 */ ! Sanity check | ||
| 21 | |||
| 22 | movi -1, r0 | ||
| 23 | pta/l loop, tr0 | ||
| 24 | loop: | ||
| 25 | ld.b r2, 0, r1 | ||
| 26 | addi r2, 1, r2 | ||
| 27 | addi r0, 1, r0 | ||
| 28 | bnei/l r1, 0, tr0 | ||
| 29 | |||
| 30 | or r0, r63, r2 | ||
| 31 | blink tr4, r63 | ||
| 32 | |||
| 33 | .size strlen,.-strlen | ||
diff --git a/arch/sh/lib64/udivdi3.S b/arch/sh/lib64/udivdi3.S new file mode 100644 index 000000000000..6895c0225b85 --- /dev/null +++ b/arch/sh/lib64/udivdi3.S | |||
| @@ -0,0 +1,120 @@ | |||
| 1 | .section .text..SHmedia32,"ax" | ||
| 2 | .align 2 | ||
| 3 | .global __udivdi3 | ||
| 4 | __udivdi3: | ||
| 5 | shlri r3,1,r4 | ||
| 6 | nsb r4,r22 | ||
| 7 | shlld r3,r22,r6 | ||
| 8 | shlri r6,49,r5 | ||
| 9 | movi 0xffffffffffffbaf1,r21 /* .l shift count 17. */ | ||
| 10 | sub r21,r5,r1 | ||
| 11 | mmulfx.w r1,r1,r4 | ||
| 12 | mshflo.w r1,r63,r1 | ||
| 13 | sub r63,r22,r20 // r63 == 64 % 64 | ||
| 14 | mmulfx.w r5,r4,r4 | ||
| 15 | pta large_divisor,tr0 | ||
| 16 | addi r20,32,r9 | ||
| 17 | msub.w r1,r4,r1 | ||
| 18 | madd.w r1,r1,r1 | ||
| 19 | mmulfx.w r1,r1,r4 | ||
| 20 | shlri r6,32,r7 | ||
| 21 | bgt/u r9,r63,tr0 // large_divisor | ||
| 22 | mmulfx.w r5,r4,r4 | ||
| 23 | shlri r2,32+14,r19 | ||
| 24 | addi r22,-31,r0 | ||
| 25 | msub.w r1,r4,r1 | ||
| 26 | |||
| 27 | mulu.l r1,r7,r4 | ||
| 28 | addi r1,-3,r5 | ||
| 29 | mulu.l r5,r19,r5 | ||
| 30 | sub r63,r4,r4 // Negate to make sure r1 ends up <= 1/r2 | ||
| 31 | shlri r4,2,r4 /* chop off leading %0000000000000000 001.00000000000 - or, as | ||
| 32 | the case may be, %0000000000000000 000.11111111111, still */ | ||
| 33 | muls.l r1,r4,r4 /* leaving at least one sign bit. */ | ||
| 34 | mulu.l r5,r3,r8 | ||
| 35 | mshalds.l r1,r21,r1 | ||
| 36 | shari r4,26,r4 | ||
| 37 | shlld r8,r0,r8 | ||
| 38 | add r1,r4,r1 // 31 bit unsigned reciprocal now in r1 (msb equiv. 0.5) | ||
| 39 | sub r2,r8,r2 | ||
| 40 | /* Can do second step of 64 : 32 div now, using r1 and the rest in r2. */ | ||
| 41 | |||
| 42 | shlri r2,22,r21 | ||
| 43 | mulu.l r21,r1,r21 | ||
| 44 | shlld r5,r0,r8 | ||
| 45 | addi r20,30-22,r0 | ||
| 46 | shlrd r21,r0,r21 | ||
| 47 | mulu.l r21,r3,r5 | ||
| 48 | add r8,r21,r8 | ||
| 49 | mcmpgt.l r21,r63,r21 // See Note 1 | ||
| 50 | addi r20,30,r0 | ||
| 51 | mshfhi.l r63,r21,r21 | ||
| 52 | sub r2,r5,r2 | ||
| 53 | andc r2,r21,r2 | ||
| 54 | |||
| 55 | /* small divisor: need a third divide step */ | ||
| 56 | mulu.l r2,r1,r7 | ||
| 57 | ptabs r18,tr0 | ||
| 58 | addi r2,1,r2 | ||
| 59 | shlrd r7,r0,r7 | ||
| 60 | mulu.l r7,r3,r5 | ||
| 61 | add r8,r7,r8 | ||
| 62 | sub r2,r3,r2 | ||
| 63 | cmpgt r2,r5,r5 | ||
| 64 | add r8,r5,r2 | ||
| 65 | /* could test r3 here to check for divide by zero. */ | ||
| 66 | blink tr0,r63 | ||
| 67 | |||
| 68 | large_divisor: | ||
| 69 | mmulfx.w r5,r4,r4 | ||
| 70 | shlrd r2,r9,r25 | ||
| 71 | shlri r25,32,r8 | ||
| 72 | msub.w r1,r4,r1 | ||
| 73 | |||
| 74 | mulu.l r1,r7,r4 | ||
| 75 | addi r1,-3,r5 | ||
| 76 | mulu.l r5,r8,r5 | ||
| 77 | sub r63,r4,r4 // Negate to make sure r1 ends up <= 1/r2 | ||
| 78 | shlri r4,2,r4 /* chop off leading %0000000000000000 001.00000000000 - or, as | ||
| 79 | the case may be, %0000000000000000 000.11111111111, still */ | ||
| 80 | muls.l r1,r4,r4 /* leaving at least one sign bit. */ | ||
| 81 | shlri r5,14-1,r8 | ||
| 82 | mulu.l r8,r7,r5 | ||
| 83 | mshalds.l r1,r21,r1 | ||
| 84 | shari r4,26,r4 | ||
| 85 | add r1,r4,r1 // 31 bit unsigned reciprocal now in r1 (msb equiv. 0.5) | ||
| 86 | sub r25,r5,r25 | ||
| 87 | /* Can do second step of 64 : 32 div now, using r1 and the rest in r25. */ | ||
| 88 | |||
| 89 | shlri r25,22,r21 | ||
| 90 | mulu.l r21,r1,r21 | ||
| 91 | pta no_lo_adj,tr0 | ||
| 92 | addi r22,32,r0 | ||
| 93 | shlri r21,40,r21 | ||
| 94 | mulu.l r21,r7,r5 | ||
| 95 | add r8,r21,r8 | ||
| 96 | shlld r2,r0,r2 | ||
| 97 | sub r25,r5,r25 | ||
| 98 | bgtu/u r7,r25,tr0 // no_lo_adj | ||
| 99 | addi r8,1,r8 | ||
| 100 | sub r25,r7,r25 | ||
| 101 | no_lo_adj: | ||
| 102 | mextr4 r2,r25,r2 | ||
| 103 | |||
| 104 | /* large_divisor: only needs a few adjustments. */ | ||
| 105 | mulu.l r8,r6,r5 | ||
| 106 | ptabs r18,tr0 | ||
| 107 | /* bubble */ | ||
| 108 | cmpgtu r5,r2,r5 | ||
| 109 | sub r8,r5,r2 | ||
| 110 | blink tr0,r63 | ||
| 111 | |||
| 112 | /* Note 1: To shift the result of the second divide stage so that the result | ||
| 113 | always fits into 32 bits, yet we still reduce the rest sufficiently | ||
| 114 | would require a lot of instructions to do the shifts just right. Using | ||
| 115 | the full 64 bit shift result to multiply with the divisor would require | ||
| 116 | four extra instructions for the upper 32 bits (shift / mulu / shift / sub). | ||
| 117 | Fortunately, if the upper 32 bits of the shift result are nonzero, we | ||
| 118 | know that the rest after taking this partial result into account will | ||
| 119 | fit into 32 bits. So we just clear the upper 32 bits of the rest if the | ||
| 120 | upper 32 bits of the partial result are nonzero. */ | ||
diff --git a/arch/sh/lib64/udivsi3.S b/arch/sh/lib64/udivsi3.S new file mode 100644 index 000000000000..e68120e4b847 --- /dev/null +++ b/arch/sh/lib64/udivsi3.S | |||
| @@ -0,0 +1,59 @@ | |||
| 1 | .global __udivsi3 | ||
| 2 | .section .text..SHmedia32,"ax" | ||
| 3 | .align 2 | ||
| 4 | |||
| 5 | /* | ||
| 6 | inputs: r4,r5 | ||
| 7 | clobbered: r18,r19,r20,r21,r22,r25,tr0 | ||
| 8 | result in r0. | ||
| 9 | */ | ||
| 10 | __udivsi3: | ||
| 11 | addz.l r5,r63,r22 | ||
| 12 | nsb r22,r0 | ||
| 13 | shlld r22,r0,r25 | ||
| 14 | shlri r25,48,r25 | ||
| 15 | movi 0xffffffffffffbb0c,r20 /* shift count eqiv 76 */ | ||
| 16 | sub r20,r25,r21 | ||
| 17 | mmulfx.w r21,r21,r19 | ||
| 18 | mshflo.w r21,r63,r21 | ||
| 19 | ptabs r18,tr0 | ||
| 20 | mmulfx.w r25,r19,r19 | ||
| 21 | sub r20,r0,r0 | ||
| 22 | /* bubble */ | ||
| 23 | msub.w r21,r19,r19 | ||
| 24 | |||
| 25 | /* | ||
| 26 | * It would be nice for scheduling to do this add to r21 before | ||
| 27 | * the msub.w, but we need a different value for r19 to keep | ||
| 28 | * errors under control. | ||
| 29 | */ | ||
| 30 | addi r19,-2,r21 | ||
| 31 | mulu.l r4,r21,r18 | ||
| 32 | mmulfx.w r19,r19,r19 | ||
| 33 | shlli r21,15,r21 | ||
| 34 | shlrd r18,r0,r18 | ||
| 35 | mulu.l r18,r22,r20 | ||
| 36 | mmacnfx.wl r25,r19,r21 | ||
| 37 | /* bubble */ | ||
| 38 | sub r4,r20,r25 | ||
| 39 | |||
| 40 | mulu.l r25,r21,r19 | ||
| 41 | addi r0,14,r0 | ||
| 42 | /* bubble */ | ||
| 43 | shlrd r19,r0,r19 | ||
| 44 | mulu.l r19,r22,r20 | ||
| 45 | add r18,r19,r18 | ||
| 46 | /* bubble */ | ||
| 47 | sub.l r25,r20,r25 | ||
| 48 | |||
| 49 | mulu.l r25,r21,r19 | ||
| 50 | addz.l r25,r63,r25 | ||
| 51 | sub r25,r22,r25 | ||
| 52 | shlrd r19,r0,r19 | ||
| 53 | mulu.l r19,r22,r20 | ||
| 54 | addi r25,1,r25 | ||
| 55 | add r18,r19,r18 | ||
| 56 | |||
| 57 | cmpgt r25,r20,r25 | ||
| 58 | add.l r18,r25,r0 | ||
| 59 | blink tr0,r63 | ||
diff --git a/arch/sh/mm/Makefile_32 b/arch/sh/mm/Makefile_32 index f066e76da204..cb2f3f299591 100644 --- a/arch/sh/mm/Makefile_32 +++ b/arch/sh/mm/Makefile_32 | |||
| @@ -18,6 +18,7 @@ mmu-y := tlb-nommu.o pg-nommu.o | |||
| 18 | mmu-$(CONFIG_MMU) := fault_32.o tlbflush_32.o ioremap_32.o | 18 | mmu-$(CONFIG_MMU) := fault_32.o tlbflush_32.o ioremap_32.o |
| 19 | 19 | ||
| 20 | obj-y += $(mmu-y) | 20 | obj-y += $(mmu-y) |
| 21 | obj-$(CONFIG_DEBUG_FS) += asids-debugfs.o | ||
| 21 | 22 | ||
| 22 | ifdef CONFIG_DEBUG_FS | 23 | ifdef CONFIG_DEBUG_FS |
| 23 | obj-$(CONFIG_CPU_SH4) += cache-debugfs.o | 24 | obj-$(CONFIG_CPU_SH4) += cache-debugfs.o |
diff --git a/arch/sh/mm/Makefile_64 b/arch/sh/mm/Makefile_64 index 9481d0f54efd..2863ffb7006d 100644 --- a/arch/sh/mm/Makefile_64 +++ b/arch/sh/mm/Makefile_64 | |||
| @@ -13,6 +13,7 @@ obj-y += cache-sh5.o | |||
| 13 | endif | 13 | endif |
| 14 | 14 | ||
| 15 | obj-y += $(mmu-y) | 15 | obj-y += $(mmu-y) |
| 16 | obj-$(CONFIG_DEBUG_FS) += asids-debugfs.o | ||
| 16 | 17 | ||
| 17 | obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o | 18 | obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o |
| 18 | obj-$(CONFIG_NUMA) += numa.o | 19 | obj-$(CONFIG_NUMA) += numa.o |
diff --git a/arch/sh/mm/asids-debugfs.c b/arch/sh/mm/asids-debugfs.c new file mode 100644 index 000000000000..8e912a15e94f --- /dev/null +++ b/arch/sh/mm/asids-debugfs.c | |||
| @@ -0,0 +1,79 @@ | |||
| 1 | /* | ||
| 2 | * debugfs ops for process ASIDs | ||
| 3 | * | ||
| 4 | * Copyright (C) 2000, 2001 Paolo Alberelli | ||
| 5 | * Copyright (C) 2003 - 2008 Paul Mundt | ||
| 6 | * Copyright (C) 2003, 2004 Richard Curnow | ||
| 7 | * | ||
| 8 | * Provides a debugfs file that lists out the ASIDs currently associated | ||
| 9 | * with the processes. | ||
| 10 | * | ||
| 11 | * In the SH-5 case, if the DM.PC register is examined through the debug | ||
| 12 | * link, this shows ASID + PC. To make use of this, the PID->ASID | ||
| 13 | * relationship needs to be known. This is primarily for debugging. | ||
| 14 | * | ||
| 15 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 16 | * License. See the file "COPYING" in the main directory of this archive | ||
| 17 | * for more details. | ||
| 18 | */ | ||
| 19 | #include <linux/init.h> | ||
| 20 | #include <linux/module.h> | ||
| 21 | #include <linux/debugfs.h> | ||
| 22 | #include <linux/seq_file.h> | ||
| 23 | #include <linux/spinlock.h> | ||
| 24 | #include <asm/processor.h> | ||
| 25 | #include <asm/mmu_context.h> | ||
| 26 | |||
| 27 | static int asids_seq_show(struct seq_file *file, void *iter) | ||
| 28 | { | ||
| 29 | struct task_struct *p; | ||
| 30 | |||
| 31 | read_lock(&tasklist_lock); | ||
| 32 | |||
| 33 | for_each_process(p) { | ||
| 34 | int pid = p->pid; | ||
| 35 | |||
| 36 | if (unlikely(!pid)) | ||
| 37 | continue; | ||
| 38 | |||
| 39 | if (p->mm) | ||
| 40 | seq_printf(file, "%5d : %02lx\n", pid, | ||
| 41 | cpu_asid(smp_processor_id(), p->mm)); | ||
| 42 | else | ||
| 43 | seq_printf(file, "%5d : (none)\n", pid); | ||
| 44 | } | ||
| 45 | |||
| 46 | read_unlock(&tasklist_lock); | ||
| 47 | |||
| 48 | return 0; | ||
| 49 | } | ||
| 50 | |||
| 51 | static int asids_debugfs_open(struct inode *inode, struct file *file) | ||
| 52 | { | ||
| 53 | return single_open(file, asids_seq_show, inode->i_private); | ||
| 54 | } | ||
| 55 | |||
| 56 | static const struct file_operations asids_debugfs_fops = { | ||
| 57 | .owner = THIS_MODULE, | ||
| 58 | .open = asids_debugfs_open, | ||
| 59 | .read = seq_read, | ||
| 60 | .llseek = seq_lseek, | ||
| 61 | .release = single_release, | ||
| 62 | }; | ||
| 63 | |||
| 64 | static int __init asids_debugfs_init(void) | ||
| 65 | { | ||
| 66 | struct dentry *asids_dentry; | ||
| 67 | |||
| 68 | asids_dentry = debugfs_create_file("asids", S_IRUSR, sh_debugfs_root, | ||
| 69 | NULL, &asids_debugfs_fops); | ||
| 70 | if (!asids_dentry) | ||
| 71 | return -ENOMEM; | ||
| 72 | if (IS_ERR(asids_dentry)) | ||
| 73 | return PTR_ERR(asids_dentry); | ||
| 74 | |||
| 75 | return 0; | ||
| 76 | } | ||
| 77 | module_init(asids_debugfs_init); | ||
| 78 | |||
| 79 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c index 9f8ea3ada4db..edcd5fbf9651 100644 --- a/arch/sh/mm/consistent.c +++ b/arch/sh/mm/consistent.c | |||
| @@ -42,6 +42,8 @@ void *dma_alloc_coherent(struct device *dev, size_t size, | |||
| 42 | return NULL; | 42 | return NULL; |
| 43 | } | 43 | } |
| 44 | 44 | ||
| 45 | split_page(pfn_to_page(virt_to_phys(ret) >> PAGE_SHIFT), order); | ||
| 46 | |||
| 45 | *dma_handle = virt_to_phys(ret); | 47 | *dma_handle = virt_to_phys(ret); |
| 46 | return ret_nocache; | 48 | return ret_nocache; |
| 47 | } | 49 | } |
| @@ -51,10 +53,13 @@ void dma_free_coherent(struct device *dev, size_t size, | |||
| 51 | void *vaddr, dma_addr_t dma_handle) | 53 | void *vaddr, dma_addr_t dma_handle) |
| 52 | { | 54 | { |
| 53 | int order = get_order(size); | 55 | int order = get_order(size); |
| 56 | unsigned long pfn = dma_handle >> PAGE_SHIFT; | ||
| 57 | int k; | ||
| 54 | 58 | ||
| 55 | if (!dma_release_from_coherent(dev, order, vaddr)) { | 59 | if (!dma_release_from_coherent(dev, order, vaddr)) { |
| 56 | WARN_ON(irqs_disabled()); /* for portability */ | 60 | WARN_ON(irqs_disabled()); /* for portability */ |
| 57 | free_pages((unsigned long)phys_to_virt(dma_handle), order); | 61 | for (k = 0; k < (1 << order); k++) |
| 62 | __free_pages(pfn_to_page(pfn + k), 0); | ||
| 58 | iounmap(vaddr); | 63 | iounmap(vaddr); |
| 59 | } | 64 | } |
| 60 | } | 65 | } |
diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c index 898d477e47c1..31a33ebdef6f 100644 --- a/arch/sh/mm/fault_32.c +++ b/arch/sh/mm/fault_32.c | |||
| @@ -20,7 +20,6 @@ | |||
| 20 | #include <asm/system.h> | 20 | #include <asm/system.h> |
| 21 | #include <asm/mmu_context.h> | 21 | #include <asm/mmu_context.h> |
| 22 | #include <asm/tlbflush.h> | 22 | #include <asm/tlbflush.h> |
| 23 | #include <asm/kgdb.h> | ||
| 24 | 23 | ||
| 25 | /* | 24 | /* |
| 26 | * This routine handles page faults. It determines the address, | 25 | * This routine handles page faults. It determines the address, |
| @@ -265,17 +264,6 @@ static inline int notify_page_fault(struct pt_regs *regs, int trap) | |||
| 265 | return ret; | 264 | return ret; |
| 266 | } | 265 | } |
| 267 | 266 | ||
| 268 | #ifdef CONFIG_SH_STORE_QUEUES | ||
| 269 | /* | ||
| 270 | * This is a special case for the SH-4 store queues, as pages for this | ||
| 271 | * space still need to be faulted in before it's possible to flush the | ||
| 272 | * store queue cache for writeout to the remapped region. | ||
| 273 | */ | ||
| 274 | #define P3_ADDR_MAX (P4SEG_STORE_QUE + 0x04000000) | ||
| 275 | #else | ||
| 276 | #define P3_ADDR_MAX P4SEG | ||
| 277 | #endif | ||
| 278 | |||
| 279 | /* | 267 | /* |
| 280 | * Called with interrupts disabled. | 268 | * Called with interrupts disabled. |
| 281 | */ | 269 | */ |
| @@ -293,11 +281,6 @@ asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs, | |||
| 293 | if (notify_page_fault(regs, lookup_exception_vector())) | 281 | if (notify_page_fault(regs, lookup_exception_vector())) |
| 294 | goto out; | 282 | goto out; |
| 295 | 283 | ||
| 296 | #ifdef CONFIG_SH_KGDB | ||
| 297 | if (kgdb_nofault && kgdb_bus_err_hook) | ||
| 298 | kgdb_bus_err_hook(); | ||
| 299 | #endif | ||
| 300 | |||
| 301 | ret = 1; | 284 | ret = 1; |
| 302 | 285 | ||
| 303 | /* | 286 | /* |
diff --git a/arch/sh/mm/ioremap_32.c b/arch/sh/mm/ioremap_32.c index 882a32ebc6b7..32946fba123e 100644 --- a/arch/sh/mm/ioremap_32.c +++ b/arch/sh/mm/ioremap_32.c | |||
| @@ -116,9 +116,10 @@ EXPORT_SYMBOL(__ioremap); | |||
| 116 | void __iounmap(void __iomem *addr) | 116 | void __iounmap(void __iomem *addr) |
| 117 | { | 117 | { |
| 118 | unsigned long vaddr = (unsigned long __force)addr; | 118 | unsigned long vaddr = (unsigned long __force)addr; |
| 119 | unsigned long seg = PXSEG(vaddr); | ||
| 119 | struct vm_struct *p; | 120 | struct vm_struct *p; |
| 120 | 121 | ||
| 121 | if (PXSEG(vaddr) < P3SEG || is_pci_memaddr(vaddr)) | 122 | if (seg < P3SEG || seg >= P3_ADDR_MAX || is_pci_memaddr(vaddr)) |
| 122 | return; | 123 | return; |
| 123 | 124 | ||
| 124 | #ifdef CONFIG_32BIT | 125 | #ifdef CONFIG_32BIT |
diff --git a/arch/sh/mm/mmap.c b/arch/sh/mm/mmap.c index 8837d511710a..931f4d003fa0 100644 --- a/arch/sh/mm/mmap.c +++ b/arch/sh/mm/mmap.c | |||
| @@ -9,7 +9,101 @@ | |||
| 9 | */ | 9 | */ |
| 10 | #include <linux/io.h> | 10 | #include <linux/io.h> |
| 11 | #include <linux/mm.h> | 11 | #include <linux/mm.h> |
| 12 | #include <linux/mman.h> | ||
| 13 | #include <linux/module.h> | ||
| 12 | #include <asm/page.h> | 14 | #include <asm/page.h> |
| 15 | #include <asm/processor.h> | ||
| 16 | |||
| 17 | #ifdef CONFIG_MMU | ||
| 18 | unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */ | ||
| 19 | EXPORT_SYMBOL(shm_align_mask); | ||
| 20 | |||
| 21 | /* | ||
| 22 | * To avoid cache aliases, we map the shared page with same color. | ||
| 23 | */ | ||
| 24 | #define COLOUR_ALIGN(addr, pgoff) \ | ||
| 25 | ((((addr) + shm_align_mask) & ~shm_align_mask) + \ | ||
| 26 | (((pgoff) << PAGE_SHIFT) & shm_align_mask)) | ||
| 27 | |||
| 28 | unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, | ||
| 29 | unsigned long len, unsigned long pgoff, unsigned long flags) | ||
| 30 | { | ||
| 31 | struct mm_struct *mm = current->mm; | ||
| 32 | struct vm_area_struct *vma; | ||
| 33 | unsigned long start_addr; | ||
| 34 | int do_colour_align; | ||
| 35 | |||
| 36 | if (flags & MAP_FIXED) { | ||
| 37 | /* We do not accept a shared mapping if it would violate | ||
| 38 | * cache aliasing constraints. | ||
| 39 | */ | ||
| 40 | if ((flags & MAP_SHARED) && (addr & shm_align_mask)) | ||
| 41 | return -EINVAL; | ||
| 42 | return addr; | ||
| 43 | } | ||
| 44 | |||
| 45 | if (unlikely(len > TASK_SIZE)) | ||
| 46 | return -ENOMEM; | ||
| 47 | |||
| 48 | do_colour_align = 0; | ||
| 49 | if (filp || (flags & MAP_SHARED)) | ||
| 50 | do_colour_align = 1; | ||
| 51 | |||
| 52 | if (addr) { | ||
| 53 | if (do_colour_align) | ||
| 54 | addr = COLOUR_ALIGN(addr, pgoff); | ||
| 55 | else | ||
| 56 | addr = PAGE_ALIGN(addr); | ||
| 57 | |||
| 58 | vma = find_vma(mm, addr); | ||
| 59 | if (TASK_SIZE - len >= addr && | ||
| 60 | (!vma || addr + len <= vma->vm_start)) | ||
| 61 | return addr; | ||
| 62 | } | ||
| 63 | |||
| 64 | if (len > mm->cached_hole_size) { | ||
| 65 | start_addr = addr = mm->free_area_cache; | ||
| 66 | } else { | ||
| 67 | mm->cached_hole_size = 0; | ||
| 68 | start_addr = addr = TASK_UNMAPPED_BASE; | ||
| 69 | } | ||
| 70 | |||
| 71 | full_search: | ||
| 72 | if (do_colour_align) | ||
| 73 | addr = COLOUR_ALIGN(addr, pgoff); | ||
| 74 | else | ||
| 75 | addr = PAGE_ALIGN(mm->free_area_cache); | ||
| 76 | |||
| 77 | for (vma = find_vma(mm, addr); ; vma = vma->vm_next) { | ||
| 78 | /* At this point: (!vma || addr < vma->vm_end). */ | ||
| 79 | if (unlikely(TASK_SIZE - len < addr)) { | ||
| 80 | /* | ||
| 81 | * Start a new search - just in case we missed | ||
| 82 | * some holes. | ||
| 83 | */ | ||
| 84 | if (start_addr != TASK_UNMAPPED_BASE) { | ||
| 85 | start_addr = addr = TASK_UNMAPPED_BASE; | ||
| 86 | mm->cached_hole_size = 0; | ||
| 87 | goto full_search; | ||
| 88 | } | ||
| 89 | return -ENOMEM; | ||
| 90 | } | ||
| 91 | if (likely(!vma || addr + len <= vma->vm_start)) { | ||
| 92 | /* | ||
| 93 | * Remember the place where we stopped the search: | ||
| 94 | */ | ||
| 95 | mm->free_area_cache = addr + len; | ||
| 96 | return addr; | ||
| 97 | } | ||
| 98 | if (addr + mm->cached_hole_size < vma->vm_start) | ||
| 99 | mm->cached_hole_size = vma->vm_start - addr; | ||
| 100 | |||
| 101 | addr = vma->vm_end; | ||
| 102 | if (do_colour_align) | ||
| 103 | addr = COLOUR_ALIGN(addr, pgoff); | ||
| 104 | } | ||
| 105 | } | ||
| 106 | #endif /* CONFIG_MMU */ | ||
| 13 | 107 | ||
| 14 | /* | 108 | /* |
| 15 | * You really shouldn't be using read() or write() on /dev/mem. This | 109 | * You really shouldn't be using read() or write() on /dev/mem. This |
diff --git a/arch/sh/oprofile/Makefile b/arch/sh/oprofile/Makefile index 2efc2e79fd29..8e6eec91c14c 100644 --- a/arch/sh/oprofile/Makefile +++ b/arch/sh/oprofile/Makefile | |||
| @@ -6,13 +6,8 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \ | |||
| 6 | oprofilefs.o oprofile_stats.o \ | 6 | oprofilefs.o oprofile_stats.o \ |
| 7 | timer_int.o ) | 7 | timer_int.o ) |
| 8 | 8 | ||
| 9 | profdrvr-y := op_model_null.o | 9 | oprofile-y := $(DRIVER_OBJS) common.o backtrace.o |
| 10 | 10 | ||
| 11 | # SH7750-style performance counters exist across 7750/7750S and 7091. | 11 | oprofile-$(CONFIG_CPU_SUBTYPE_SH7750S) += op_model_sh7750.o |
| 12 | profdrvr-$(CONFIG_CPU_SUBTYPE_SH7750S) := op_model_sh7750.o | 12 | oprofile-$(CONFIG_CPU_SUBTYPE_SH7750) += op_model_sh7750.o |
| 13 | profdrvr-$(CONFIG_CPU_SUBTYPE_SH7750) := op_model_sh7750.o | 13 | oprofile-$(CONFIG_CPU_SUBTYPE_SH7091) += op_model_sh7750.o |
| 14 | profdrvr-$(CONFIG_CPU_SUBTYPE_SH7091) := op_model_sh7750.o | ||
| 15 | |||
| 16 | oprofile-y := $(DRIVER_OBJS) $(profdrvr-y) | ||
| 17 | |||
| 18 | EXTRA_CFLAGS += -Werror | ||
diff --git a/arch/sh/oprofile/backtrace.c b/arch/sh/oprofile/backtrace.c new file mode 100644 index 000000000000..9499a2914f89 --- /dev/null +++ b/arch/sh/oprofile/backtrace.c | |||
| @@ -0,0 +1,114 @@ | |||
| 1 | /* | ||
| 2 | * SH specific backtracing code for oprofile | ||
| 3 | * | ||
| 4 | * Copyright 2007 STMicroelectronics Ltd. | ||
| 5 | * | ||
| 6 | * Author: Dave Peverley <dpeverley@mpc-data.co.uk> | ||
| 7 | * | ||
| 8 | * Based on ARM oprofile backtrace code by Richard Purdie and in turn, i386 | ||
| 9 | * oprofile backtrace code by John Levon, David Smith | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License version 2 as | ||
| 13 | * published by the Free Software Foundation. | ||
| 14 | * | ||
| 15 | */ | ||
| 16 | #include <linux/oprofile.h> | ||
| 17 | #include <linux/sched.h> | ||
| 18 | #include <linux/kallsyms.h> | ||
| 19 | #include <linux/mm.h> | ||
| 20 | #include <asm/ptrace.h> | ||
| 21 | #include <asm/uaccess.h> | ||
| 22 | #include <asm/sections.h> | ||
| 23 | |||
| 24 | /* Limit to stop backtracing too far. */ | ||
| 25 | static int backtrace_limit = 20; | ||
| 26 | |||
| 27 | static unsigned long * | ||
| 28 | user_backtrace(unsigned long *stackaddr, struct pt_regs *regs) | ||
| 29 | { | ||
| 30 | unsigned long buf_stack; | ||
| 31 | |||
| 32 | /* Also check accessibility of address */ | ||
| 33 | if (!access_ok(VERIFY_READ, stackaddr, sizeof(unsigned long))) | ||
| 34 | return NULL; | ||
| 35 | |||
| 36 | if (__copy_from_user_inatomic(&buf_stack, stackaddr, sizeof(unsigned long))) | ||
| 37 | return NULL; | ||
| 38 | |||
| 39 | /* Quick paranoia check */ | ||
| 40 | if (buf_stack & 3) | ||
| 41 | return NULL; | ||
| 42 | |||
| 43 | oprofile_add_trace(buf_stack); | ||
| 44 | |||
| 45 | stackaddr++; | ||
| 46 | |||
| 47 | return stackaddr; | ||
| 48 | } | ||
| 49 | |||
| 50 | /* | ||
| 51 | * | | /\ Higher addresses | ||
| 52 | * | | | ||
| 53 | * --------------- stack base (address of current_thread_info) | ||
| 54 | * | thread info | | ||
| 55 | * . . | ||
| 56 | * | stack | | ||
| 57 | * --------------- saved regs->regs[15] value if valid | ||
| 58 | * . . | ||
| 59 | * --------------- struct pt_regs stored on stack (struct pt_regs *) | ||
| 60 | * | | | ||
| 61 | * . . | ||
| 62 | * | | | ||
| 63 | * --------------- ??? | ||
| 64 | * | | | ||
| 65 | * | | \/ Lower addresses | ||
| 66 | * | ||
| 67 | * Thus, &pt_regs <-> stack base restricts the valid(ish) fp values | ||
| 68 | */ | ||
| 69 | static int valid_kernel_stack(unsigned long *stackaddr, struct pt_regs *regs) | ||
| 70 | { | ||
| 71 | unsigned long stack = (unsigned long)regs; | ||
| 72 | unsigned long stack_base = (stack & ~(THREAD_SIZE - 1)) + THREAD_SIZE; | ||
| 73 | |||
| 74 | return ((unsigned long)stackaddr > stack) && ((unsigned long)stackaddr < stack_base); | ||
| 75 | } | ||
| 76 | |||
| 77 | static unsigned long * | ||
| 78 | kernel_backtrace(unsigned long *stackaddr, struct pt_regs *regs) | ||
| 79 | { | ||
| 80 | unsigned long addr; | ||
| 81 | |||
| 82 | /* | ||
| 83 | * If not a valid kernel address, keep going till we find one | ||
| 84 | * or the SP stops being a valid address. | ||
| 85 | */ | ||
| 86 | do { | ||
| 87 | addr = *stackaddr++; | ||
| 88 | oprofile_add_trace(addr); | ||
| 89 | } while (valid_kernel_stack(stackaddr, regs)); | ||
| 90 | |||
| 91 | return stackaddr; | ||
| 92 | } | ||
| 93 | |||
| 94 | void sh_backtrace(struct pt_regs * const regs, unsigned int depth) | ||
| 95 | { | ||
| 96 | unsigned long *stackaddr; | ||
| 97 | |||
| 98 | /* | ||
| 99 | * Paranoia - clip max depth as we could get lost in the weeds. | ||
| 100 | */ | ||
| 101 | if (depth > backtrace_limit) | ||
| 102 | depth = backtrace_limit; | ||
| 103 | |||
| 104 | stackaddr = (unsigned long *)regs->regs[15]; | ||
| 105 | if (!user_mode(regs)) { | ||
| 106 | while (depth-- && valid_kernel_stack(stackaddr, regs)) | ||
| 107 | stackaddr = kernel_backtrace(stackaddr, regs); | ||
| 108 | |||
| 109 | return; | ||
| 110 | } | ||
| 111 | |||
| 112 | while (depth-- && (stackaddr != NULL)) | ||
| 113 | stackaddr = user_backtrace(stackaddr, regs); | ||
| 114 | } | ||
diff --git a/arch/sh/oprofile/common.c b/arch/sh/oprofile/common.c new file mode 100644 index 000000000000..1d97d64cb95f --- /dev/null +++ b/arch/sh/oprofile/common.c | |||
| @@ -0,0 +1,150 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/oprofile/init.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2003 - 2008 Paul Mundt | ||
| 5 | * | ||
| 6 | * Based on arch/mips/oprofile/common.c: | ||
| 7 | * | ||
| 8 | * Copyright (C) 2004, 2005 Ralf Baechle | ||
| 9 | * Copyright (C) 2005 MIPS Technologies, Inc. | ||
| 10 | * | ||
| 11 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 12 | * License. See the file "COPYING" in the main directory of this archive | ||
| 13 | * for more details. | ||
| 14 | */ | ||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/oprofile.h> | ||
| 17 | #include <linux/init.h> | ||
| 18 | #include <linux/errno.h> | ||
| 19 | #include <linux/smp.h> | ||
| 20 | #include <asm/processor.h> | ||
| 21 | #include "op_impl.h" | ||
| 22 | |||
| 23 | extern struct op_sh_model op_model_sh7750_ops __weak; | ||
| 24 | extern struct op_sh_model op_model_sh4a_ops __weak; | ||
| 25 | |||
| 26 | static struct op_sh_model *model; | ||
| 27 | |||
| 28 | static struct op_counter_config ctr[20]; | ||
| 29 | |||
| 30 | extern void sh_backtrace(struct pt_regs * const regs, unsigned int depth); | ||
| 31 | |||
| 32 | static int op_sh_setup(void) | ||
| 33 | { | ||
| 34 | /* Pre-compute the values to stuff in the hardware registers. */ | ||
| 35 | model->reg_setup(ctr); | ||
| 36 | |||
| 37 | /* Configure the registers on all cpus. */ | ||
| 38 | on_each_cpu(model->cpu_setup, NULL, 1); | ||
| 39 | |||
| 40 | return 0; | ||
| 41 | } | ||
| 42 | |||
| 43 | static int op_sh_create_files(struct super_block *sb, struct dentry *root) | ||
| 44 | { | ||
| 45 | int i, ret = 0; | ||
| 46 | |||
| 47 | for (i = 0; i < model->num_counters; i++) { | ||
| 48 | struct dentry *dir; | ||
| 49 | char buf[4]; | ||
| 50 | |||
| 51 | snprintf(buf, sizeof(buf), "%d", i); | ||
| 52 | dir = oprofilefs_mkdir(sb, root, buf); | ||
| 53 | |||
| 54 | ret |= oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled); | ||
| 55 | ret |= oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event); | ||
| 56 | ret |= oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel); | ||
| 57 | ret |= oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user); | ||
| 58 | |||
| 59 | if (model->create_files) | ||
| 60 | ret |= model->create_files(sb, dir); | ||
| 61 | else | ||
| 62 | ret |= oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count); | ||
| 63 | |||
| 64 | /* Dummy entries */ | ||
| 65 | ret |= oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask); | ||
| 66 | } | ||
| 67 | |||
| 68 | return ret; | ||
| 69 | } | ||
| 70 | |||
| 71 | static int op_sh_start(void) | ||
| 72 | { | ||
| 73 | /* Enable performance monitoring for all counters. */ | ||
| 74 | on_each_cpu(model->cpu_start, NULL, 1); | ||
| 75 | |||
| 76 | return 0; | ||
| 77 | } | ||
| 78 | |||
| 79 | static void op_sh_stop(void) | ||
| 80 | { | ||
| 81 | /* Disable performance monitoring for all counters. */ | ||
| 82 | on_each_cpu(model->cpu_stop, NULL, 1); | ||
| 83 | } | ||
| 84 | |||
| 85 | int __init oprofile_arch_init(struct oprofile_operations *ops) | ||
| 86 | { | ||
| 87 | struct op_sh_model *lmodel = NULL; | ||
| 88 | int ret; | ||
| 89 | |||
| 90 | /* | ||
| 91 | * Always assign the backtrace op. If the counter initialization | ||
| 92 | * fails, we fall back to the timer which will still make use of | ||
| 93 | * this. | ||
| 94 | */ | ||
| 95 | ops->backtrace = sh_backtrace; | ||
| 96 | |||
| 97 | switch (current_cpu_data.type) { | ||
| 98 | /* SH-4 types */ | ||
| 99 | case CPU_SH7750: | ||
| 100 | case CPU_SH7750S: | ||
| 101 | lmodel = &op_model_sh7750_ops; | ||
| 102 | break; | ||
| 103 | |||
| 104 | /* SH-4A types */ | ||
| 105 | case CPU_SH7763: | ||
| 106 | case CPU_SH7770: | ||
| 107 | case CPU_SH7780: | ||
| 108 | case CPU_SH7781: | ||
| 109 | case CPU_SH7785: | ||
| 110 | case CPU_SH7723: | ||
| 111 | case CPU_SHX3: | ||
| 112 | lmodel = &op_model_sh4a_ops; | ||
| 113 | break; | ||
| 114 | |||
| 115 | /* SH4AL-DSP types */ | ||
| 116 | case CPU_SH7343: | ||
| 117 | case CPU_SH7722: | ||
| 118 | case CPU_SH7366: | ||
| 119 | lmodel = &op_model_sh4a_ops; | ||
| 120 | break; | ||
| 121 | } | ||
| 122 | |||
| 123 | if (!lmodel) | ||
| 124 | return -ENODEV; | ||
| 125 | if (!(current_cpu_data.flags & CPU_HAS_PERF_COUNTER)) | ||
| 126 | return -ENODEV; | ||
| 127 | |||
| 128 | ret = lmodel->init(); | ||
| 129 | if (unlikely(ret != 0)) | ||
| 130 | return ret; | ||
| 131 | |||
| 132 | model = lmodel; | ||
| 133 | |||
| 134 | ops->setup = op_sh_setup; | ||
| 135 | ops->create_files = op_sh_create_files; | ||
| 136 | ops->start = op_sh_start; | ||
| 137 | ops->stop = op_sh_stop; | ||
| 138 | ops->cpu_type = lmodel->cpu_type; | ||
| 139 | |||
| 140 | printk(KERN_INFO "oprofile: using %s performance monitoring.\n", | ||
| 141 | lmodel->cpu_type); | ||
| 142 | |||
| 143 | return 0; | ||
| 144 | } | ||
| 145 | |||
| 146 | void oprofile_arch_exit(void) | ||
| 147 | { | ||
| 148 | if (model && model->exit) | ||
| 149 | model->exit(); | ||
| 150 | } | ||
diff --git a/arch/sh/oprofile/op_impl.h b/arch/sh/oprofile/op_impl.h new file mode 100644 index 000000000000..4d509975eba6 --- /dev/null +++ b/arch/sh/oprofile/op_impl.h | |||
| @@ -0,0 +1,33 @@ | |||
| 1 | #ifndef __OP_IMPL_H | ||
| 2 | #define __OP_IMPL_H | ||
| 3 | |||
| 4 | /* Per-counter configuration as set via oprofilefs. */ | ||
| 5 | struct op_counter_config { | ||
| 6 | unsigned long enabled; | ||
| 7 | unsigned long event; | ||
| 8 | |||
| 9 | unsigned long long count; | ||
| 10 | |||
| 11 | /* Dummy values for userspace tool compliance */ | ||
| 12 | unsigned long kernel; | ||
| 13 | unsigned long user; | ||
| 14 | unsigned long unit_mask; | ||
| 15 | }; | ||
| 16 | |||
| 17 | /* Per-architecture configury and hooks. */ | ||
| 18 | struct op_sh_model { | ||
| 19 | void (*reg_setup)(struct op_counter_config *); | ||
| 20 | int (*create_files)(struct super_block *sb, struct dentry *dir); | ||
| 21 | void (*cpu_setup)(void *dummy); | ||
| 22 | int (*init)(void); | ||
| 23 | void (*exit)(void); | ||
| 24 | void (*cpu_start)(void *args); | ||
| 25 | void (*cpu_stop)(void *args); | ||
| 26 | char *cpu_type; | ||
| 27 | unsigned char num_counters; | ||
| 28 | }; | ||
| 29 | |||
| 30 | /* arch/sh/oprofile/common.c */ | ||
| 31 | extern void sh_backtrace(struct pt_regs * const regs, unsigned int depth); | ||
| 32 | |||
| 33 | #endif /* __OP_IMPL_H */ | ||
diff --git a/arch/sh/oprofile/op_model_null.c b/arch/sh/oprofile/op_model_null.c deleted file mode 100644 index a845b088edb4..000000000000 --- a/arch/sh/oprofile/op_model_null.c +++ /dev/null | |||
| @@ -1,23 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/oprofile/op_model_null.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2003 Paul Mundt | ||
| 5 | * | ||
| 6 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 7 | * License. See the file "COPYING" in the main directory of this archive | ||
| 8 | * for more details. | ||
| 9 | */ | ||
| 10 | #include <linux/kernel.h> | ||
| 11 | #include <linux/oprofile.h> | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/errno.h> | ||
| 14 | |||
| 15 | int __init oprofile_arch_init(struct oprofile_operations *ops) | ||
| 16 | { | ||
| 17 | return -ENODEV; | ||
| 18 | } | ||
| 19 | |||
| 20 | void oprofile_arch_exit(void) | ||
| 21 | { | ||
| 22 | } | ||
| 23 | |||
diff --git a/arch/sh/oprofile/op_model_sh7750.c b/arch/sh/oprofile/op_model_sh7750.c index 008b3b03750a..c892c7c30c2f 100644 --- a/arch/sh/oprofile/op_model_sh7750.c +++ b/arch/sh/oprofile/op_model_sh7750.c | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | * | 3 | * |
| 4 | * OProfile support for SH7750/SH7750S Performance Counters | 4 | * OProfile support for SH7750/SH7750S Performance Counters |
| 5 | * | 5 | * |
| 6 | * Copyright (C) 2003, 2004 Paul Mundt | 6 | * Copyright (C) 2003 - 2008 Paul Mundt |
| 7 | * | 7 | * |
| 8 | * This file is subject to the terms and conditions of the GNU General Public | 8 | * This file is subject to the terms and conditions of the GNU General Public |
| 9 | * License. See the file "COPYING" in the main directory of this archive | 9 | * License. See the file "COPYING" in the main directory of this archive |
| @@ -15,19 +15,16 @@ | |||
| 15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
| 16 | #include <linux/errno.h> | 16 | #include <linux/errno.h> |
| 17 | #include <linux/interrupt.h> | 17 | #include <linux/interrupt.h> |
| 18 | #include <linux/io.h> | ||
| 18 | #include <linux/fs.h> | 19 | #include <linux/fs.h> |
| 19 | #include <asm/uaccess.h> | 20 | #include "op_impl.h" |
| 20 | #include <asm/io.h> | ||
| 21 | 21 | ||
| 22 | #define PM_CR_BASE 0xff000084 /* 16-bit */ | 22 | #define PM_CR_BASE 0xff000084 /* 16-bit */ |
| 23 | #define PM_CTR_BASE 0xff100004 /* 32-bit */ | 23 | #define PM_CTR_BASE 0xff100004 /* 32-bit */ |
| 24 | 24 | ||
| 25 | #define PMCR1 (PM_CR_BASE + 0x00) | 25 | #define PMCR(n) (PM_CR_BASE + ((n) * 0x04)) |
| 26 | #define PMCR2 (PM_CR_BASE + 0x04) | 26 | #define PMCTRH(n) (PM_CTR_BASE + 0x00 + ((n) * 0x08)) |
| 27 | #define PMCTR1H (PM_CTR_BASE + 0x00) | 27 | #define PMCTRL(n) (PM_CTR_BASE + 0x04 + ((n) * 0x08)) |
| 28 | #define PMCTR1L (PM_CTR_BASE + 0x04) | ||
| 29 | #define PMCTR2H (PM_CTR_BASE + 0x08) | ||
| 30 | #define PMCTR2L (PM_CTR_BASE + 0x0c) | ||
| 31 | 28 | ||
| 32 | #define PMCR_PMM_MASK 0x0000003f | 29 | #define PMCR_PMM_MASK 0x0000003f |
| 33 | 30 | ||
| @@ -36,25 +33,15 @@ | |||
| 36 | #define PMCR_PMST 0x00004000 | 33 | #define PMCR_PMST 0x00004000 |
| 37 | #define PMCR_PMEN 0x00008000 | 34 | #define PMCR_PMEN 0x00008000 |
| 38 | 35 | ||
| 39 | #define PMCR_ENABLE (PMCR_PMST | PMCR_PMEN) | 36 | struct op_sh_model op_model_sh7750_ops; |
| 40 | 37 | ||
| 41 | /* | ||
| 42 | * SH7750/SH7750S have 2 perf counters | ||
| 43 | */ | ||
| 44 | #define NR_CNTRS 2 | 38 | #define NR_CNTRS 2 |
| 45 | 39 | ||
| 46 | struct op_counter_config { | 40 | static struct sh7750_ppc_register_config { |
| 47 | unsigned long enabled; | 41 | unsigned int ctrl; |
| 48 | unsigned long event; | 42 | unsigned long cnt_hi; |
| 49 | unsigned long count; | 43 | unsigned long cnt_lo; |
| 50 | 44 | } regcache[NR_CNTRS]; | |
| 51 | /* Dummy values for userspace tool compliance */ | ||
| 52 | unsigned long kernel; | ||
| 53 | unsigned long user; | ||
| 54 | unsigned long unit_mask; | ||
| 55 | }; | ||
| 56 | |||
| 57 | static struct op_counter_config ctr[NR_CNTRS]; | ||
| 58 | 45 | ||
| 59 | /* | 46 | /* |
| 60 | * There are a number of events supported by each counter (33 in total). | 47 | * There are a number of events supported by each counter (33 in total). |
| @@ -116,12 +103,8 @@ static int sh7750_timer_notify(struct pt_regs *regs) | |||
| 116 | 103 | ||
| 117 | static u64 sh7750_read_counter(int counter) | 104 | static u64 sh7750_read_counter(int counter) |
| 118 | { | 105 | { |
| 119 | u32 hi, lo; | 106 | return (u64)((u64)(__raw_readl(PMCTRH(counter)) & 0xffff) << 32) | |
| 120 | 107 | __raw_readl(PMCTRL(counter)); | |
| 121 | hi = (counter == 0) ? ctrl_inl(PMCTR1H) : ctrl_inl(PMCTR2H); | ||
| 122 | lo = (counter == 0) ? ctrl_inl(PMCTR1L) : ctrl_inl(PMCTR2L); | ||
| 123 | |||
| 124 | return (u64)((u64)(hi & 0xffff) << 32) | lo; | ||
| 125 | } | 108 | } |
| 126 | 109 | ||
| 127 | /* | 110 | /* |
| @@ -170,11 +153,7 @@ static ssize_t sh7750_write_count(struct file *file, const char __user *buf, | |||
| 170 | */ | 153 | */ |
| 171 | WARN_ON(val != 0); | 154 | WARN_ON(val != 0); |
| 172 | 155 | ||
| 173 | if (counter == 0) { | 156 | __raw_writew(__raw_readw(PMCR(counter)) | PMCR_PMCLR, PMCR(counter)); |
| 174 | ctrl_outw(ctrl_inw(PMCR1) | PMCR_PMCLR, PMCR1); | ||
| 175 | } else { | ||
| 176 | ctrl_outw(ctrl_inw(PMCR2) | PMCR_PMCLR, PMCR2); | ||
| 177 | } | ||
| 178 | 157 | ||
| 179 | return count; | 158 | return count; |
| 180 | } | 159 | } |
| @@ -184,88 +163,93 @@ static const struct file_operations count_fops = { | |||
| 184 | .write = sh7750_write_count, | 163 | .write = sh7750_write_count, |
| 185 | }; | 164 | }; |
| 186 | 165 | ||
| 187 | static int sh7750_perf_counter_create_files(struct super_block *sb, struct dentry *root) | 166 | static int sh7750_ppc_create_files(struct super_block *sb, struct dentry *dir) |
| 188 | { | 167 | { |
| 189 | int i; | 168 | return oprofilefs_create_file(sb, dir, "count", &count_fops); |
| 169 | } | ||
| 190 | 170 | ||
| 191 | for (i = 0; i < NR_CNTRS; i++) { | 171 | static void sh7750_ppc_reg_setup(struct op_counter_config *ctr) |
| 192 | struct dentry *dir; | 172 | { |
| 193 | char buf[4]; | 173 | unsigned int counters = op_model_sh7750_ops.num_counters; |
| 174 | int i; | ||
| 194 | 175 | ||
| 195 | snprintf(buf, sizeof(buf), "%d", i); | 176 | for (i = 0; i < counters; i++) { |
| 196 | dir = oprofilefs_mkdir(sb, root, buf); | 177 | regcache[i].ctrl = 0; |
| 178 | regcache[i].cnt_hi = 0; | ||
| 179 | regcache[i].cnt_lo = 0; | ||
| 197 | 180 | ||
| 198 | oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled); | 181 | if (!ctr[i].enabled) |
| 199 | oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event); | 182 | continue; |
| 200 | oprofilefs_create_file(sb, dir, "count", &count_fops); | ||
| 201 | 183 | ||
| 202 | /* Dummy entries */ | 184 | regcache[i].ctrl |= ctr[i].event | PMCR_PMEN | PMCR_PMST; |
| 203 | oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel); | 185 | regcache[i].cnt_hi = (unsigned long)((ctr->count >> 32) & 0xffff); |
| 204 | oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user); | 186 | regcache[i].cnt_lo = (unsigned long)(ctr->count & 0xffffffff); |
| 205 | oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask); | ||
| 206 | } | 187 | } |
| 207 | |||
| 208 | return 0; | ||
| 209 | } | 188 | } |
| 210 | 189 | ||
| 211 | static int sh7750_perf_counter_start(void) | 190 | static void sh7750_ppc_cpu_setup(void *args) |
| 212 | { | 191 | { |
| 213 | u16 pmcr; | 192 | unsigned int counters = op_model_sh7750_ops.num_counters; |
| 214 | 193 | int i; | |
| 215 | /* Enable counter 1 */ | ||
| 216 | if (ctr[0].enabled) { | ||
| 217 | pmcr = ctrl_inw(PMCR1); | ||
| 218 | WARN_ON(pmcr & PMCR_PMEN); | ||
| 219 | |||
| 220 | pmcr &= ~PMCR_PMM_MASK; | ||
| 221 | pmcr |= ctr[0].event; | ||
| 222 | ctrl_outw(pmcr | PMCR_ENABLE, PMCR1); | ||
| 223 | } | ||
| 224 | |||
| 225 | /* Enable counter 2 */ | ||
| 226 | if (ctr[1].enabled) { | ||
| 227 | pmcr = ctrl_inw(PMCR2); | ||
| 228 | WARN_ON(pmcr & PMCR_PMEN); | ||
| 229 | 194 | ||
| 230 | pmcr &= ~PMCR_PMM_MASK; | 195 | for (i = 0; i < counters; i++) { |
| 231 | pmcr |= ctr[1].event; | 196 | __raw_writew(0, PMCR(i)); |
| 232 | ctrl_outw(pmcr | PMCR_ENABLE, PMCR2); | 197 | __raw_writel(regcache[i].cnt_hi, PMCTRH(i)); |
| 198 | __raw_writel(regcache[i].cnt_lo, PMCTRL(i)); | ||
| 233 | } | 199 | } |
| 234 | |||
| 235 | return register_timer_hook(sh7750_timer_notify); | ||
| 236 | } | 200 | } |
| 237 | 201 | ||
| 238 | static void sh7750_perf_counter_stop(void) | 202 | static void sh7750_ppc_cpu_start(void *args) |
| 239 | { | 203 | { |
| 240 | ctrl_outw(ctrl_inw(PMCR1) & ~PMCR_PMEN, PMCR1); | 204 | unsigned int counters = op_model_sh7750_ops.num_counters; |
| 241 | ctrl_outw(ctrl_inw(PMCR2) & ~PMCR_PMEN, PMCR2); | 205 | int i; |
| 242 | 206 | ||
| 243 | unregister_timer_hook(sh7750_timer_notify); | 207 | for (i = 0; i < counters; i++) |
| 208 | __raw_writew(regcache[i].ctrl, PMCR(i)); | ||
| 244 | } | 209 | } |
| 245 | 210 | ||
| 246 | static struct oprofile_operations sh7750_perf_counter_ops = { | 211 | static void sh7750_ppc_cpu_stop(void *args) |
| 247 | .create_files = sh7750_perf_counter_create_files, | ||
| 248 | .start = sh7750_perf_counter_start, | ||
| 249 | .stop = sh7750_perf_counter_stop, | ||
| 250 | }; | ||
| 251 | |||
| 252 | int __init oprofile_arch_init(struct oprofile_operations *ops) | ||
| 253 | { | 212 | { |
| 254 | if (!(current_cpu_data.flags & CPU_HAS_PERF_COUNTER)) | 213 | unsigned int counters = op_model_sh7750_ops.num_counters; |
| 255 | return -ENODEV; | 214 | int i; |
| 256 | 215 | ||
| 257 | ops = &sh7750_perf_counter_ops; | 216 | /* Disable the counters */ |
| 258 | ops->cpu_type = "sh/sh7750"; | 217 | for (i = 0; i < counters; i++) |
| 218 | __raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i)); | ||
| 219 | } | ||
| 259 | 220 | ||
| 260 | printk(KERN_INFO "oprofile: using SH-4 performance monitoring.\n"); | 221 | static inline void sh7750_ppc_reset(void) |
| 222 | { | ||
| 223 | unsigned int counters = op_model_sh7750_ops.num_counters; | ||
| 224 | int i; | ||
| 261 | 225 | ||
| 262 | /* Clear the counters */ | 226 | /* Clear the counters */ |
| 263 | ctrl_outw(ctrl_inw(PMCR1) | PMCR_PMCLR, PMCR1); | 227 | for (i = 0; i < counters; i++) |
| 264 | ctrl_outw(ctrl_inw(PMCR2) | PMCR_PMCLR, PMCR2); | 228 | __raw_writew(__raw_readw(PMCR(i)) | PMCR_PMCLR, PMCR(i)); |
| 229 | } | ||
| 265 | 230 | ||
| 266 | return 0; | 231 | static int sh7750_ppc_init(void) |
| 232 | { | ||
| 233 | sh7750_ppc_reset(); | ||
| 234 | |||
| 235 | return register_timer_hook(sh7750_timer_notify); | ||
| 267 | } | 236 | } |
| 268 | 237 | ||
| 269 | void oprofile_arch_exit(void) | 238 | static void sh7750_ppc_exit(void) |
| 270 | { | 239 | { |
| 240 | unregister_timer_hook(sh7750_timer_notify); | ||
| 241 | |||
| 242 | sh7750_ppc_reset(); | ||
| 271 | } | 243 | } |
| 244 | |||
| 245 | struct op_sh_model op_model_sh7750_ops = { | ||
| 246 | .cpu_type = "sh/sh7750", | ||
| 247 | .num_counters = NR_CNTRS, | ||
| 248 | .reg_setup = sh7750_ppc_reg_setup, | ||
| 249 | .cpu_setup = sh7750_ppc_cpu_setup, | ||
| 250 | .cpu_start = sh7750_ppc_cpu_start, | ||
| 251 | .cpu_stop = sh7750_ppc_cpu_stop, | ||
| 252 | .init = sh7750_ppc_init, | ||
| 253 | .exit = sh7750_ppc_exit, | ||
| 254 | .create_files = sh7750_ppc_create_files, | ||
| 255 | }; | ||
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types index d0c2928d1066..284b7e867496 100644 --- a/arch/sh/tools/mach-types +++ b/arch/sh/tools/mach-types | |||
| @@ -8,6 +8,7 @@ | |||
| 8 | SE SH_SOLUTION_ENGINE | 8 | SE SH_SOLUTION_ENGINE |
| 9 | HIGHLANDER SH_HIGHLANDER | 9 | HIGHLANDER SH_HIGHLANDER |
| 10 | RTS7751R2D SH_RTS7751R2D | 10 | RTS7751R2D SH_RTS7751R2D |
| 11 | RSK SH_RSK | ||
| 11 | 12 | ||
| 12 | # | 13 | # |
| 13 | # List of companion chips / MFDs. | 14 | # List of companion chips / MFDs. |
| @@ -46,6 +47,7 @@ R2D_1 RTS7751R2D_1 | |||
| 46 | CAYMAN SH_CAYMAN | 47 | CAYMAN SH_CAYMAN |
| 47 | SDK7780 SH_SDK7780 | 48 | SDK7780 SH_SDK7780 |
| 48 | MIGOR SH_MIGOR | 49 | MIGOR SH_MIGOR |
| 50 | RSK7201 SH_RSK7201 | ||
| 49 | RSK7203 SH_RSK7203 | 51 | RSK7203 SH_RSK7203 |
| 50 | AP325RXA SH_AP325RXA | 52 | AP325RXA SH_AP325RXA |
| 51 | SH7763RDP SH_SH7763RDP | 53 | SH7763RDP SH_SH7763RDP |
diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c index 3384a717fec0..6c3d60b939bf 100644 --- a/drivers/i2c/busses/i2c-sh_mobile.c +++ b/drivers/i2c/busses/i2c-sh_mobile.c | |||
| @@ -160,9 +160,39 @@ struct sh_mobile_i2c_data { | |||
| 160 | 160 | ||
| 161 | static void activate_ch(struct sh_mobile_i2c_data *pd) | 161 | static void activate_ch(struct sh_mobile_i2c_data *pd) |
| 162 | { | 162 | { |
| 163 | unsigned long i2c_clk; | ||
| 164 | u_int32_t num; | ||
| 165 | u_int32_t denom; | ||
| 166 | u_int32_t tmp; | ||
| 167 | |||
| 163 | /* Make sure the clock is enabled */ | 168 | /* Make sure the clock is enabled */ |
| 164 | clk_enable(pd->clk); | 169 | clk_enable(pd->clk); |
| 165 | 170 | ||
| 171 | /* Get clock rate after clock is enabled */ | ||
| 172 | i2c_clk = clk_get_rate(pd->clk); | ||
| 173 | |||
| 174 | /* Calculate the value for iccl. From the data sheet: | ||
| 175 | * iccl = (p clock / transfer rate) * (L / (L + H)) | ||
| 176 | * where L and H are the SCL low/high ratio (5/4 in this case). | ||
| 177 | * We also round off the result. | ||
| 178 | */ | ||
| 179 | num = i2c_clk * 5; | ||
| 180 | denom = NORMAL_SPEED * 9; | ||
| 181 | tmp = num * 10 / denom; | ||
| 182 | if (tmp % 10 >= 5) | ||
| 183 | pd->iccl = (u_int8_t)((num/denom) + 1); | ||
| 184 | else | ||
| 185 | pd->iccl = (u_int8_t)(num/denom); | ||
| 186 | |||
| 187 | /* Calculate the value for icch. From the data sheet: | ||
| 188 | icch = (p clock / transfer rate) * (H / (L + H)) */ | ||
| 189 | num = i2c_clk * 4; | ||
| 190 | tmp = num * 10 / denom; | ||
| 191 | if (tmp % 10 >= 5) | ||
| 192 | pd->icch = (u_int8_t)((num/denom) + 1); | ||
| 193 | else | ||
| 194 | pd->icch = (u_int8_t)(num/denom); | ||
| 195 | |||
| 166 | /* Enable channel and configure rx ack */ | 196 | /* Enable channel and configure rx ack */ |
| 167 | iowrite8(ioread8(ICCR(pd)) | ICCR_ICE, ICCR(pd)); | 197 | iowrite8(ioread8(ICCR(pd)) | ICCR_ICE, ICCR(pd)); |
| 168 | 198 | ||
| @@ -459,40 +489,6 @@ static struct i2c_algorithm sh_mobile_i2c_algorithm = { | |||
| 459 | .master_xfer = sh_mobile_i2c_xfer, | 489 | .master_xfer = sh_mobile_i2c_xfer, |
| 460 | }; | 490 | }; |
| 461 | 491 | ||
| 462 | static void sh_mobile_i2c_setup_channel(struct platform_device *dev) | ||
| 463 | { | ||
| 464 | struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev); | ||
| 465 | unsigned long peripheral_clk = clk_get_rate(pd->clk); | ||
| 466 | u_int32_t num; | ||
| 467 | u_int32_t denom; | ||
| 468 | u_int32_t tmp; | ||
| 469 | |||
| 470 | spin_lock_init(&pd->lock); | ||
| 471 | init_waitqueue_head(&pd->wait); | ||
| 472 | |||
| 473 | /* Calculate the value for iccl. From the data sheet: | ||
| 474 | * iccl = (p clock / transfer rate) * (L / (L + H)) | ||
| 475 | * where L and H are the SCL low/high ratio (5/4 in this case). | ||
| 476 | * We also round off the result. | ||
| 477 | */ | ||
| 478 | num = peripheral_clk * 5; | ||
| 479 | denom = NORMAL_SPEED * 9; | ||
| 480 | tmp = num * 10 / denom; | ||
| 481 | if (tmp % 10 >= 5) | ||
| 482 | pd->iccl = (u_int8_t)((num/denom) + 1); | ||
| 483 | else | ||
| 484 | pd->iccl = (u_int8_t)(num/denom); | ||
| 485 | |||
| 486 | /* Calculate the value for icch. From the data sheet: | ||
| 487 | icch = (p clock / transfer rate) * (H / (L + H)) */ | ||
| 488 | num = peripheral_clk * 4; | ||
| 489 | tmp = num * 10 / denom; | ||
| 490 | if (tmp % 10 >= 5) | ||
| 491 | pd->icch = (u_int8_t)((num/denom) + 1); | ||
| 492 | else | ||
| 493 | pd->icch = (u_int8_t)(num/denom); | ||
| 494 | } | ||
| 495 | |||
| 496 | static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook) | 492 | static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook) |
| 497 | { | 493 | { |
| 498 | struct resource *res; | 494 | struct resource *res; |
| @@ -533,6 +529,7 @@ static int sh_mobile_i2c_probe(struct platform_device *dev) | |||
| 533 | struct sh_mobile_i2c_data *pd; | 529 | struct sh_mobile_i2c_data *pd; |
| 534 | struct i2c_adapter *adap; | 530 | struct i2c_adapter *adap; |
| 535 | struct resource *res; | 531 | struct resource *res; |
| 532 | char clk_name[8]; | ||
| 536 | int size; | 533 | int size; |
| 537 | int ret; | 534 | int ret; |
| 538 | 535 | ||
| @@ -542,9 +539,10 @@ static int sh_mobile_i2c_probe(struct platform_device *dev) | |||
| 542 | return -ENOMEM; | 539 | return -ENOMEM; |
| 543 | } | 540 | } |
| 544 | 541 | ||
| 545 | pd->clk = clk_get(&dev->dev, "peripheral_clk"); | 542 | snprintf(clk_name, sizeof(clk_name), "i2c%d", dev->id); |
| 543 | pd->clk = clk_get(&dev->dev, clk_name); | ||
| 546 | if (IS_ERR(pd->clk)) { | 544 | if (IS_ERR(pd->clk)) { |
| 547 | dev_err(&dev->dev, "cannot get peripheral clock\n"); | 545 | dev_err(&dev->dev, "cannot get clock \"%s\"\n", clk_name); |
| 548 | ret = PTR_ERR(pd->clk); | 546 | ret = PTR_ERR(pd->clk); |
| 549 | goto err; | 547 | goto err; |
| 550 | } | 548 | } |
| @@ -586,7 +584,8 @@ static int sh_mobile_i2c_probe(struct platform_device *dev) | |||
| 586 | 584 | ||
| 587 | strlcpy(adap->name, dev->name, sizeof(adap->name)); | 585 | strlcpy(adap->name, dev->name, sizeof(adap->name)); |
| 588 | 586 | ||
| 589 | sh_mobile_i2c_setup_channel(dev); | 587 | spin_lock_init(&pd->lock); |
| 588 | init_waitqueue_head(&pd->wait); | ||
| 590 | 589 | ||
| 591 | ret = i2c_add_numbered_adapter(adap); | 590 | ret = i2c_add_numbered_adapter(adap); |
| 592 | if (ret < 0) { | 591 | if (ret < 0) { |
diff --git a/drivers/input/keyboard/sh_keysc.c b/drivers/input/keyboard/sh_keysc.c index c600ab7f93e8..5c8a1bcf7ca7 100644 --- a/drivers/input/keyboard/sh_keysc.c +++ b/drivers/input/keyboard/sh_keysc.c | |||
| @@ -18,6 +18,7 @@ | |||
| 18 | #include <linux/delay.h> | 18 | #include <linux/delay.h> |
| 19 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
| 20 | #include <linux/input.h> | 20 | #include <linux/input.h> |
| 21 | #include <linux/clk.h> | ||
| 21 | #include <linux/io.h> | 22 | #include <linux/io.h> |
| 22 | #include <asm/sh_keysc.h> | 23 | #include <asm/sh_keysc.h> |
| 23 | 24 | ||
| @@ -39,6 +40,7 @@ static const struct { | |||
| 39 | 40 | ||
| 40 | struct sh_keysc_priv { | 41 | struct sh_keysc_priv { |
| 41 | void __iomem *iomem_base; | 42 | void __iomem *iomem_base; |
| 43 | struct clk *clk; | ||
| 42 | unsigned long last_keys; | 44 | unsigned long last_keys; |
| 43 | struct input_dev *input; | 45 | struct input_dev *input; |
| 44 | struct sh_keysc_info pdata; | 46 | struct sh_keysc_info pdata; |
| @@ -125,6 +127,7 @@ static int __devinit sh_keysc_probe(struct platform_device *pdev) | |||
| 125 | struct sh_keysc_info *pdata; | 127 | struct sh_keysc_info *pdata; |
| 126 | struct resource *res; | 128 | struct resource *res; |
| 127 | struct input_dev *input; | 129 | struct input_dev *input; |
| 130 | char clk_name[8]; | ||
| 128 | int i, k; | 131 | int i, k; |
| 129 | int irq, error; | 132 | int irq, error; |
| 130 | 133 | ||
| @@ -165,11 +168,19 @@ static int __devinit sh_keysc_probe(struct platform_device *pdev) | |||
| 165 | goto err1; | 168 | goto err1; |
| 166 | } | 169 | } |
| 167 | 170 | ||
| 171 | snprintf(clk_name, sizeof(clk_name), "keysc%d", pdev->id); | ||
| 172 | priv->clk = clk_get(&pdev->dev, clk_name); | ||
| 173 | if (IS_ERR(priv->clk)) { | ||
| 174 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); | ||
| 175 | error = PTR_ERR(priv->clk); | ||
| 176 | goto err2; | ||
| 177 | } | ||
| 178 | |||
| 168 | priv->input = input_allocate_device(); | 179 | priv->input = input_allocate_device(); |
| 169 | if (!priv->input) { | 180 | if (!priv->input) { |
| 170 | dev_err(&pdev->dev, "failed to allocate input device\n"); | 181 | dev_err(&pdev->dev, "failed to allocate input device\n"); |
| 171 | error = -ENOMEM; | 182 | error = -ENOMEM; |
| 172 | goto err2; | 183 | goto err3; |
| 173 | } | 184 | } |
| 174 | 185 | ||
| 175 | input = priv->input; | 186 | input = priv->input; |
| @@ -187,7 +198,7 @@ static int __devinit sh_keysc_probe(struct platform_device *pdev) | |||
| 187 | error = request_irq(irq, sh_keysc_isr, 0, pdev->name, pdev); | 198 | error = request_irq(irq, sh_keysc_isr, 0, pdev->name, pdev); |
| 188 | if (error) { | 199 | if (error) { |
| 189 | dev_err(&pdev->dev, "failed to request IRQ\n"); | 200 | dev_err(&pdev->dev, "failed to request IRQ\n"); |
| 190 | goto err3; | 201 | goto err4; |
| 191 | } | 202 | } |
| 192 | 203 | ||
| 193 | for (i = 0; i < SH_KEYSC_MAXKEYS; i++) { | 204 | for (i = 0; i < SH_KEYSC_MAXKEYS; i++) { |
| @@ -199,18 +210,22 @@ static int __devinit sh_keysc_probe(struct platform_device *pdev) | |||
| 199 | error = input_register_device(input); | 210 | error = input_register_device(input); |
| 200 | if (error) { | 211 | if (error) { |
| 201 | dev_err(&pdev->dev, "failed to register input device\n"); | 212 | dev_err(&pdev->dev, "failed to register input device\n"); |
| 202 | goto err4; | 213 | goto err5; |
| 203 | } | 214 | } |
| 204 | 215 | ||
| 216 | clk_enable(priv->clk); | ||
| 217 | |||
| 205 | iowrite16((sh_keysc_mode[pdata->mode].kymd << 8) | | 218 | iowrite16((sh_keysc_mode[pdata->mode].kymd << 8) | |
| 206 | pdata->scan_timing, priv->iomem_base + KYCR1_OFFS); | 219 | pdata->scan_timing, priv->iomem_base + KYCR1_OFFS); |
| 207 | iowrite16(0, priv->iomem_base + KYOUTDR_OFFS); | 220 | iowrite16(0, priv->iomem_base + KYOUTDR_OFFS); |
| 208 | iowrite16(KYCR2_IRQ_LEVEL, priv->iomem_base + KYCR2_OFFS); | 221 | iowrite16(KYCR2_IRQ_LEVEL, priv->iomem_base + KYCR2_OFFS); |
| 209 | return 0; | 222 | return 0; |
| 210 | err4: | 223 | err5: |
| 211 | free_irq(irq, pdev); | 224 | free_irq(irq, pdev); |
| 212 | err3: | 225 | err4: |
| 213 | input_free_device(input); | 226 | input_free_device(input); |
| 227 | err3: | ||
| 228 | clk_put(priv->clk); | ||
| 214 | err2: | 229 | err2: |
| 215 | iounmap(priv->iomem_base); | 230 | iounmap(priv->iomem_base); |
| 216 | err1: | 231 | err1: |
| @@ -230,6 +245,9 @@ static int __devexit sh_keysc_remove(struct platform_device *pdev) | |||
| 230 | free_irq(platform_get_irq(pdev, 0), pdev); | 245 | free_irq(platform_get_irq(pdev, 0), pdev); |
| 231 | iounmap(priv->iomem_base); | 246 | iounmap(priv->iomem_base); |
| 232 | 247 | ||
| 248 | clk_disable(priv->clk); | ||
| 249 | clk_put(priv->clk); | ||
| 250 | |||
| 233 | platform_set_drvdata(pdev, NULL); | 251 | platform_set_drvdata(pdev, NULL); |
| 234 | kfree(priv); | 252 | kfree(priv); |
| 235 | return 0; | 253 | return 0; |
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig index 47102c2c8250..057fd7e160c4 100644 --- a/drivers/media/video/Kconfig +++ b/drivers/media/video/Kconfig | |||
| @@ -759,7 +759,7 @@ config VIDEO_PXA27x | |||
| 759 | 759 | ||
| 760 | config VIDEO_SH_MOBILE_CEU | 760 | config VIDEO_SH_MOBILE_CEU |
| 761 | tristate "SuperH Mobile CEU Interface driver" | 761 | tristate "SuperH Mobile CEU Interface driver" |
| 762 | depends on VIDEO_DEV && SOC_CAMERA && HAS_DMA | 762 | depends on VIDEO_DEV && SOC_CAMERA && HAS_DMA && HAVE_CLK |
| 763 | select VIDEOBUF_DMA_CONTIG | 763 | select VIDEOBUF_DMA_CONTIG |
| 764 | ---help--- | 764 | ---help--- |
| 765 | This is a v4l2 driver for the SuperH Mobile CEU Interface | 765 | This is a v4l2 driver for the SuperH Mobile CEU Interface |
diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c index 2407607f2eff..536b1a9b310c 100644 --- a/drivers/media/video/sh_mobile_ceu_camera.c +++ b/drivers/media/video/sh_mobile_ceu_camera.c | |||
| @@ -31,6 +31,7 @@ | |||
| 31 | #include <linux/platform_device.h> | 31 | #include <linux/platform_device.h> |
| 32 | #include <linux/mutex.h> | 32 | #include <linux/mutex.h> |
| 33 | #include <linux/videodev2.h> | 33 | #include <linux/videodev2.h> |
| 34 | #include <linux/clk.h> | ||
| 34 | 35 | ||
| 35 | #include <media/v4l2-common.h> | 36 | #include <media/v4l2-common.h> |
| 36 | #include <media/v4l2-dev.h> | 37 | #include <media/v4l2-dev.h> |
| @@ -89,6 +90,7 @@ struct sh_mobile_ceu_dev { | |||
| 89 | 90 | ||
| 90 | unsigned int irq; | 91 | unsigned int irq; |
| 91 | void __iomem *base; | 92 | void __iomem *base; |
| 93 | struct clk *clk; | ||
| 92 | unsigned long video_limit; | 94 | unsigned long video_limit; |
| 93 | 95 | ||
| 94 | /* lock used to protect videobuf */ | 96 | /* lock used to protect videobuf */ |
| @@ -309,6 +311,8 @@ static int sh_mobile_ceu_add_device(struct soc_camera_device *icd) | |||
| 309 | if (ret) | 311 | if (ret) |
| 310 | goto err; | 312 | goto err; |
| 311 | 313 | ||
| 314 | clk_enable(pcdev->clk); | ||
| 315 | |||
| 312 | ceu_write(pcdev, CAPSR, 1 << 16); /* reset */ | 316 | ceu_write(pcdev, CAPSR, 1 << 16); /* reset */ |
| 313 | while (ceu_read(pcdev, CSTSR) & 1) | 317 | while (ceu_read(pcdev, CSTSR) & 1) |
| 314 | msleep(1); | 318 | msleep(1); |
| @@ -342,6 +346,8 @@ static void sh_mobile_ceu_remove_device(struct soc_camera_device *icd) | |||
| 342 | } | 346 | } |
| 343 | spin_unlock_irqrestore(&pcdev->lock, flags); | 347 | spin_unlock_irqrestore(&pcdev->lock, flags); |
| 344 | 348 | ||
| 349 | clk_disable(pcdev->clk); | ||
| 350 | |||
| 345 | icd->ops->release(icd); | 351 | icd->ops->release(icd); |
| 346 | 352 | ||
| 347 | dev_info(&icd->dev, | 353 | dev_info(&icd->dev, |
| @@ -550,6 +556,7 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev) | |||
| 550 | struct sh_mobile_ceu_dev *pcdev; | 556 | struct sh_mobile_ceu_dev *pcdev; |
| 551 | struct resource *res; | 557 | struct resource *res; |
| 552 | void __iomem *base; | 558 | void __iomem *base; |
| 559 | char clk_name[8]; | ||
| 553 | unsigned int irq; | 560 | unsigned int irq; |
| 554 | int err = 0; | 561 | int err = 0; |
| 555 | 562 | ||
| @@ -615,6 +622,14 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev) | |||
| 615 | goto exit_release_mem; | 622 | goto exit_release_mem; |
| 616 | } | 623 | } |
| 617 | 624 | ||
| 625 | snprintf(clk_name, sizeof(clk_name), "ceu%d", pdev->id); | ||
| 626 | pcdev->clk = clk_get(&pdev->dev, clk_name); | ||
| 627 | if (IS_ERR(pcdev->clk)) { | ||
| 628 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); | ||
| 629 | err = PTR_ERR(pcdev->clk); | ||
| 630 | goto exit_free_irq; | ||
| 631 | } | ||
| 632 | |||
| 618 | pcdev->ici.priv = pcdev; | 633 | pcdev->ici.priv = pcdev; |
| 619 | pcdev->ici.dev.parent = &pdev->dev; | 634 | pcdev->ici.dev.parent = &pdev->dev; |
| 620 | pcdev->ici.nr = pdev->id; | 635 | pcdev->ici.nr = pdev->id; |
| @@ -623,10 +638,12 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev) | |||
| 623 | 638 | ||
| 624 | err = soc_camera_host_register(&pcdev->ici); | 639 | err = soc_camera_host_register(&pcdev->ici); |
| 625 | if (err) | 640 | if (err) |
| 626 | goto exit_free_irq; | 641 | goto exit_free_clk; |
| 627 | 642 | ||
| 628 | return 0; | 643 | return 0; |
| 629 | 644 | ||
| 645 | exit_free_clk: | ||
| 646 | clk_put(pcdev->clk); | ||
| 630 | exit_free_irq: | 647 | exit_free_irq: |
| 631 | free_irq(pcdev->irq, pcdev); | 648 | free_irq(pcdev->irq, pcdev); |
| 632 | exit_release_mem: | 649 | exit_release_mem: |
| @@ -645,6 +662,7 @@ static int sh_mobile_ceu_remove(struct platform_device *pdev) | |||
| 645 | struct sh_mobile_ceu_dev *pcdev = platform_get_drvdata(pdev); | 662 | struct sh_mobile_ceu_dev *pcdev = platform_get_drvdata(pdev); |
| 646 | 663 | ||
| 647 | soc_camera_host_unregister(&pcdev->ici); | 664 | soc_camera_host_unregister(&pcdev->ici); |
| 665 | clk_put(pcdev->clk); | ||
| 648 | free_irq(pcdev->irq, pcdev); | 666 | free_irq(pcdev->irq, pcdev); |
| 649 | if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) | 667 | if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) |
| 650 | dma_release_declared_memory(&pdev->dev); | 668 | dma_release_declared_memory(&pdev->dev); |
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index 165fc010978c..557b54ab2f25 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c | |||
| @@ -51,7 +51,6 @@ | |||
| 51 | #ifdef CONFIG_SUPERH | 51 | #ifdef CONFIG_SUPERH |
| 52 | #include <asm/clock.h> | 52 | #include <asm/clock.h> |
| 53 | #include <asm/sh_bios.h> | 53 | #include <asm/sh_bios.h> |
| 54 | #include <asm/kgdb.h> | ||
| 55 | #endif | 54 | #endif |
| 56 | 55 | ||
| 57 | #include "sh-sci.h" | 56 | #include "sh-sci.h" |
| @@ -65,10 +64,6 @@ struct sci_port { | |||
| 65 | /* Port IRQs: ERI, RXI, TXI, BRI (optional) */ | 64 | /* Port IRQs: ERI, RXI, TXI, BRI (optional) */ |
| 66 | unsigned int irqs[SCIx_NR_IRQS]; | 65 | unsigned int irqs[SCIx_NR_IRQS]; |
| 67 | 66 | ||
| 68 | /* Port pin configuration */ | ||
| 69 | void (*init_pins)(struct uart_port *port, | ||
| 70 | unsigned int cflag); | ||
| 71 | |||
| 72 | /* Port enable callback */ | 67 | /* Port enable callback */ |
| 73 | void (*enable)(struct uart_port *port); | 68 | void (*enable)(struct uart_port *port); |
| 74 | 69 | ||
| @@ -85,10 +80,6 @@ struct sci_port { | |||
| 85 | #endif | 80 | #endif |
| 86 | }; | 81 | }; |
| 87 | 82 | ||
| 88 | #ifdef CONFIG_SH_KGDB | ||
| 89 | static struct sci_port *kgdb_sci_port; | ||
| 90 | #endif | ||
| 91 | |||
| 92 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE | 83 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE |
| 93 | static struct sci_port *serial_console_port; | 84 | static struct sci_port *serial_console_port; |
| 94 | #endif | 85 | #endif |
| @@ -101,21 +92,26 @@ static void sci_stop_tx(struct uart_port *port); | |||
| 101 | static struct sci_port sci_ports[SCI_NPORTS]; | 92 | static struct sci_port sci_ports[SCI_NPORTS]; |
| 102 | static struct uart_driver sci_uart_driver; | 93 | static struct uart_driver sci_uart_driver; |
| 103 | 94 | ||
| 104 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \ | 95 | static inline struct sci_port * |
| 105 | defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB) | 96 | to_sci_port(struct uart_port *uart) |
| 97 | { | ||
| 98 | return container_of(uart, struct sci_port, port); | ||
| 99 | } | ||
| 100 | |||
| 101 | #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE) | ||
| 102 | |||
| 103 | #ifdef CONFIG_CONSOLE_POLL | ||
| 106 | static inline void handle_error(struct uart_port *port) | 104 | static inline void handle_error(struct uart_port *port) |
| 107 | { | 105 | { |
| 108 | /* Clear error flags */ | 106 | /* Clear error flags */ |
| 109 | sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); | 107 | sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); |
| 110 | } | 108 | } |
| 111 | 109 | ||
| 112 | static int get_char(struct uart_port *port) | 110 | static int sci_poll_get_char(struct uart_port *port) |
| 113 | { | 111 | { |
| 114 | unsigned long flags; | ||
| 115 | unsigned short status; | 112 | unsigned short status; |
| 116 | int c; | 113 | int c; |
| 117 | 114 | ||
| 118 | spin_lock_irqsave(&port->lock, flags); | ||
| 119 | do { | 115 | do { |
| 120 | status = sci_in(port, SCxSR); | 116 | status = sci_in(port, SCxSR); |
| 121 | if (status & SCxSR_ERRORS(port)) { | 117 | if (status & SCxSR_ERRORS(port)) { |
| @@ -123,23 +119,21 @@ static int get_char(struct uart_port *port) | |||
| 123 | continue; | 119 | continue; |
| 124 | } | 120 | } |
| 125 | } while (!(status & SCxSR_RDxF(port))); | 121 | } while (!(status & SCxSR_RDxF(port))); |
| 122 | |||
| 126 | c = sci_in(port, SCxRDR); | 123 | c = sci_in(port, SCxRDR); |
| 127 | sci_in(port, SCxSR); /* Dummy read */ | 124 | |
| 125 | /* Dummy read */ | ||
| 126 | sci_in(port, SCxSR); | ||
| 128 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | 127 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); |
| 129 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 130 | 128 | ||
| 131 | return c; | 129 | return c; |
| 132 | } | 130 | } |
| 133 | #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */ | 131 | #endif |
| 134 | 132 | ||
| 135 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB) | 133 | static void sci_poll_put_char(struct uart_port *port, unsigned char c) |
| 136 | static void put_char(struct uart_port *port, char c) | ||
| 137 | { | 134 | { |
| 138 | unsigned long flags; | ||
| 139 | unsigned short status; | 135 | unsigned short status; |
| 140 | 136 | ||
| 141 | spin_lock_irqsave(&port->lock, flags); | ||
| 142 | |||
| 143 | do { | 137 | do { |
| 144 | status = sci_in(port, SCxSR); | 138 | status = sci_in(port, SCxSR); |
| 145 | } while (!(status & SCxSR_TDxE(port))); | 139 | } while (!(status & SCxSR_TDxE(port))); |
| @@ -147,96 +141,22 @@ static void put_char(struct uart_port *port, char c) | |||
| 147 | sci_in(port, SCxSR); /* Dummy read */ | 141 | sci_in(port, SCxSR); /* Dummy read */ |
| 148 | sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); | 142 | sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); |
| 149 | sci_out(port, SCxTDR, c); | 143 | sci_out(port, SCxTDR, c); |
| 150 | |||
| 151 | spin_unlock_irqrestore(&port->lock, flags); | ||
| 152 | } | 144 | } |
| 153 | #endif | 145 | #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */ |
| 154 | |||
| 155 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE | ||
| 156 | static void put_string(struct sci_port *sci_port, const char *buffer, int count) | ||
| 157 | { | ||
| 158 | struct uart_port *port = &sci_port->port; | ||
| 159 | const unsigned char *p = buffer; | ||
| 160 | int i; | ||
| 161 | |||
| 162 | #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB) | ||
| 163 | int checksum; | ||
| 164 | int usegdb=0; | ||
| 165 | |||
| 166 | #ifdef CONFIG_SH_STANDARD_BIOS | ||
| 167 | /* This call only does a trap the first time it is | ||
| 168 | * called, and so is safe to do here unconditionally | ||
| 169 | */ | ||
| 170 | usegdb |= sh_bios_in_gdb_mode(); | ||
| 171 | #endif | ||
| 172 | #ifdef CONFIG_SH_KGDB | ||
| 173 | usegdb |= (kgdb_in_gdb_mode && (sci_port == kgdb_sci_port)); | ||
| 174 | #endif | ||
| 175 | |||
| 176 | if (usegdb) { | ||
| 177 | /* $<packet info>#<checksum>. */ | ||
| 178 | do { | ||
| 179 | unsigned char c; | ||
| 180 | put_char(port, '$'); | ||
| 181 | put_char(port, 'O'); /* 'O'utput to console */ | ||
| 182 | checksum = 'O'; | ||
| 183 | |||
| 184 | for (i=0; i<count; i++) { /* Don't use run length encoding */ | ||
| 185 | int h, l; | ||
| 186 | |||
| 187 | c = *p++; | ||
| 188 | h = hex_asc_hi(c); | ||
| 189 | l = hex_asc_lo(c); | ||
| 190 | put_char(port, h); | ||
| 191 | put_char(port, l); | ||
| 192 | checksum += h + l; | ||
| 193 | } | ||
| 194 | put_char(port, '#'); | ||
| 195 | put_char(port, hex_asc_hi(checksum)); | ||
| 196 | put_char(port, hex_asc_lo(checksum)); | ||
| 197 | } while (get_char(port) != '+'); | ||
| 198 | } else | ||
| 199 | #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */ | ||
| 200 | for (i=0; i<count; i++) { | ||
| 201 | if (*p == 10) | ||
| 202 | put_char(port, '\r'); | ||
| 203 | put_char(port, *p++); | ||
| 204 | } | ||
| 205 | } | ||
| 206 | #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ | ||
| 207 | |||
| 208 | #ifdef CONFIG_SH_KGDB | ||
| 209 | static int kgdb_sci_getchar(void) | ||
| 210 | { | ||
| 211 | int c; | ||
| 212 | |||
| 213 | /* Keep trying to read a character, this could be neater */ | ||
| 214 | while ((c = get_char(&kgdb_sci_port->port)) < 0) | ||
| 215 | cpu_relax(); | ||
| 216 | |||
| 217 | return c; | ||
| 218 | } | ||
| 219 | |||
| 220 | static inline void kgdb_sci_putchar(int c) | ||
| 221 | { | ||
| 222 | put_char(&kgdb_sci_port->port, c); | ||
| 223 | } | ||
| 224 | #endif /* CONFIG_SH_KGDB */ | ||
| 225 | 146 | ||
| 226 | #if defined(__H8300S__) | 147 | #if defined(__H8300S__) |
| 227 | enum { sci_disable, sci_enable }; | 148 | enum { sci_disable, sci_enable }; |
| 228 | 149 | ||
| 229 | static void h8300_sci_config(struct uart_port* port, unsigned int ctrl) | 150 | static void h8300_sci_config(struct uart_port *port, unsigned int ctrl) |
| 230 | { | 151 | { |
| 231 | volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL; | 152 | volatile unsigned char *mstpcrl = (volatile unsigned char *)MSTPCRL; |
| 232 | int ch = (port->mapbase - SMR0) >> 3; | 153 | int ch = (port->mapbase - SMR0) >> 3; |
| 233 | unsigned char mask = 1 << (ch+1); | 154 | unsigned char mask = 1 << (ch+1); |
| 234 | 155 | ||
| 235 | if (ctrl == sci_disable) { | 156 | if (ctrl == sci_disable) |
| 236 | *mstpcrl |= mask; | 157 | *mstpcrl |= mask; |
| 237 | } else { | 158 | else |
| 238 | *mstpcrl &= ~mask; | 159 | *mstpcrl &= ~mask; |
| 239 | } | ||
| 240 | } | 160 | } |
| 241 | 161 | ||
| 242 | static inline void h8300_sci_enable(struct uart_port *port) | 162 | static inline void h8300_sci_enable(struct uart_port *port) |
| @@ -251,7 +171,7 @@ static inline void h8300_sci_disable(struct uart_port *port) | |||
| 251 | #endif | 171 | #endif |
| 252 | 172 | ||
| 253 | #if defined(__H8300H__) || defined(__H8300S__) | 173 | #if defined(__H8300H__) || defined(__H8300S__) |
| 254 | static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag) | 174 | static void sci_init_pins(struct uart_port *port, unsigned int cflag) |
| 255 | { | 175 | { |
| 256 | int ch = (port->mapbase - SMR0) >> 3; | 176 | int ch = (port->mapbase - SMR0) >> 3; |
| 257 | 177 | ||
| @@ -266,141 +186,99 @@ static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag) | |||
| 266 | /* tx mark output*/ | 186 | /* tx mark output*/ |
| 267 | H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx; | 187 | H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx; |
| 268 | } | 188 | } |
| 269 | #else | 189 | #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) |
| 270 | #define sci_init_pins_sci NULL | 190 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
| 271 | #endif | ||
| 272 | |||
| 273 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) | ||
| 274 | static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag) | ||
| 275 | { | 191 | { |
| 276 | unsigned int fcr_val = 0; | 192 | if (port->mapbase == 0xA4400000) { |
| 277 | 193 | __raw_writew(__raw_readw(PACR) & 0xffc0, PACR); | |
| 278 | if (cflag & CRTSCTS) | 194 | __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR); |
| 279 | fcr_val |= SCFCR_MCE; | 195 | } else if (port->mapbase == 0xA4410000) |
| 280 | 196 | __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR); | |
| 281 | sci_out(port, SCFCR, fcr_val); | ||
| 282 | } | ||
| 283 | #else | ||
| 284 | #define sci_init_pins_irda NULL | ||
| 285 | #endif | ||
| 286 | |||
| 287 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) | ||
| 288 | static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag) | ||
| 289 | { | ||
| 290 | unsigned int fcr_val = 0; | ||
| 291 | |||
| 292 | set_sh771x_scif_pfc(port); | ||
| 293 | if (cflag & CRTSCTS) { | ||
| 294 | fcr_val |= SCFCR_MCE; | ||
| 295 | } | ||
| 296 | sci_out(port, SCFCR, fcr_val); | ||
| 297 | } | 197 | } |
| 298 | #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721) | 198 | #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721) |
| 299 | static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) | 199 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
| 300 | { | 200 | { |
| 301 | unsigned int fcr_val = 0; | ||
| 302 | unsigned short data; | 201 | unsigned short data; |
| 303 | 202 | ||
| 304 | if (cflag & CRTSCTS) { | 203 | if (cflag & CRTSCTS) { |
| 305 | /* enable RTS/CTS */ | 204 | /* enable RTS/CTS */ |
| 306 | if (port->mapbase == 0xa4430000) { /* SCIF0 */ | 205 | if (port->mapbase == 0xa4430000) { /* SCIF0 */ |
| 307 | /* Clear PTCR bit 9-2; enable all scif pins but sck */ | 206 | /* Clear PTCR bit 9-2; enable all scif pins but sck */ |
| 308 | data = ctrl_inw(PORT_PTCR); | 207 | data = __raw_readw(PORT_PTCR); |
| 309 | ctrl_outw((data & 0xfc03), PORT_PTCR); | 208 | __raw_writew((data & 0xfc03), PORT_PTCR); |
| 310 | } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ | 209 | } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ |
| 311 | /* Clear PVCR bit 9-2 */ | 210 | /* Clear PVCR bit 9-2 */ |
| 312 | data = ctrl_inw(PORT_PVCR); | 211 | data = __raw_readw(PORT_PVCR); |
| 313 | ctrl_outw((data & 0xfc03), PORT_PVCR); | 212 | __raw_writew((data & 0xfc03), PORT_PVCR); |
| 314 | } | 213 | } |
| 315 | fcr_val |= SCFCR_MCE; | ||
| 316 | } else { | 214 | } else { |
| 317 | if (port->mapbase == 0xa4430000) { /* SCIF0 */ | 215 | if (port->mapbase == 0xa4430000) { /* SCIF0 */ |
| 318 | /* Clear PTCR bit 5-2; enable only tx and rx */ | 216 | /* Clear PTCR bit 5-2; enable only tx and rx */ |
| 319 | data = ctrl_inw(PORT_PTCR); | 217 | data = __raw_readw(PORT_PTCR); |
| 320 | ctrl_outw((data & 0xffc3), PORT_PTCR); | 218 | __raw_writew((data & 0xffc3), PORT_PTCR); |
| 321 | } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ | 219 | } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ |
| 322 | /* Clear PVCR bit 5-2 */ | 220 | /* Clear PVCR bit 5-2 */ |
| 323 | data = ctrl_inw(PORT_PVCR); | 221 | data = __raw_readw(PORT_PVCR); |
| 324 | ctrl_outw((data & 0xffc3), PORT_PVCR); | 222 | __raw_writew((data & 0xffc3), PORT_PVCR); |
| 325 | } | 223 | } |
| 326 | } | 224 | } |
| 327 | sci_out(port, SCFCR, fcr_val); | ||
| 328 | } | 225 | } |
| 329 | #elif defined(CONFIG_CPU_SH3) | 226 | #elif defined(CONFIG_CPU_SH3) |
| 330 | /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */ | 227 | /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */ |
| 331 | static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) | 228 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
| 332 | { | 229 | { |
| 333 | unsigned int fcr_val = 0; | ||
| 334 | unsigned short data; | 230 | unsigned short data; |
| 335 | 231 | ||
| 336 | /* We need to set SCPCR to enable RTS/CTS */ | 232 | /* We need to set SCPCR to enable RTS/CTS */ |
| 337 | data = ctrl_inw(SCPCR); | 233 | data = __raw_readw(SCPCR); |
| 338 | /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/ | 234 | /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/ |
| 339 | ctrl_outw(data & 0x0fcf, SCPCR); | 235 | __raw_writew(data & 0x0fcf, SCPCR); |
| 340 | 236 | ||
| 341 | if (cflag & CRTSCTS) | 237 | if (!(cflag & CRTSCTS)) { |
| 342 | fcr_val |= SCFCR_MCE; | ||
| 343 | else { | ||
| 344 | /* We need to set SCPCR to enable RTS/CTS */ | 238 | /* We need to set SCPCR to enable RTS/CTS */ |
| 345 | data = ctrl_inw(SCPCR); | 239 | data = __raw_readw(SCPCR); |
| 346 | /* Clear out SCP7MD1,0, SCP4MD1,0, | 240 | /* Clear out SCP7MD1,0, SCP4MD1,0, |
| 347 | Set SCP6MD1,0 = {01} (output) */ | 241 | Set SCP6MD1,0 = {01} (output) */ |
| 348 | ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR); | 242 | __raw_writew((data & 0x0fcf) | 0x1000, SCPCR); |
| 349 | 243 | ||
| 350 | data = ctrl_inb(SCPDR); | 244 | data = ctrl_inb(SCPDR); |
| 351 | /* Set /RTS2 (bit6) = 0 */ | 245 | /* Set /RTS2 (bit6) = 0 */ |
| 352 | ctrl_outb(data & 0xbf, SCPDR); | 246 | ctrl_outb(data & 0xbf, SCPDR); |
| 353 | } | 247 | } |
| 354 | |||
| 355 | sci_out(port, SCFCR, fcr_val); | ||
| 356 | } | 248 | } |
| 357 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) | 249 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) |
| 358 | static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) | 250 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
| 359 | { | 251 | { |
| 360 | unsigned int fcr_val = 0; | ||
| 361 | unsigned short data; | 252 | unsigned short data; |
| 362 | 253 | ||
| 363 | if (port->mapbase == 0xffe00000) { | 254 | if (port->mapbase == 0xffe00000) { |
| 364 | data = ctrl_inw(PSCR); | 255 | data = __raw_readw(PSCR); |
| 365 | data &= ~0x03cf; | 256 | data &= ~0x03cf; |
| 366 | if (cflag & CRTSCTS) | 257 | if (!(cflag & CRTSCTS)) |
| 367 | fcr_val |= SCFCR_MCE; | ||
| 368 | else | ||
| 369 | data |= 0x0340; | 258 | data |= 0x0340; |
| 370 | 259 | ||
| 371 | ctrl_outw(data, PSCR); | 260 | __raw_writew(data, PSCR); |
| 372 | } | 261 | } |
| 373 | /* SCIF1 and SCIF2 should be setup by board code */ | ||
| 374 | |||
| 375 | sci_out(port, SCFCR, fcr_val); | ||
| 376 | } | ||
| 377 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) | ||
| 378 | static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) | ||
| 379 | { | ||
| 380 | /* Nothing to do here.. */ | ||
| 381 | sci_out(port, SCFCR, 0); | ||
| 382 | } | 262 | } |
| 383 | #else | ||
| 384 | /* For SH7750 */ | ||
| 385 | static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) | ||
| 386 | { | ||
| 387 | unsigned int fcr_val = 0; | ||
| 388 | |||
| 389 | if (cflag & CRTSCTS) { | ||
| 390 | fcr_val |= SCFCR_MCE; | ||
| 391 | } else { | ||
| 392 | #if defined(CONFIG_CPU_SUBTYPE_SH7343) || defined(CONFIG_CPU_SUBTYPE_SH7366) | ||
| 393 | /* Nothing */ | ||
| 394 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ | 263 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ |
| 395 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | 264 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ |
| 396 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ | 265 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ |
| 397 | defined(CONFIG_CPU_SUBTYPE_SHX3) | 266 | defined(CONFIG_CPU_SUBTYPE_SHX3) |
| 398 | ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */ | 267 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
| 268 | { | ||
| 269 | if (!(cflag & CRTSCTS)) | ||
| 270 | __raw_writew(0x0080, SCSPTR0); /* Set RTS = 1 */ | ||
| 271 | } | ||
| 272 | #elif defined(CONFIG_CPU_SH4) && !defined(CONFIG_CPU_SH4A) | ||
| 273 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) | ||
| 274 | { | ||
| 275 | if (!(cflag & CRTSCTS)) | ||
| 276 | __raw_writew(0x0080, SCSPTR2); /* Set RTS = 1 */ | ||
| 277 | } | ||
| 399 | #else | 278 | #else |
| 400 | ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */ | 279 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
| 401 | #endif | 280 | { |
| 402 | } | 281 | /* Nothing to do */ |
| 403 | sci_out(port, SCFCR, fcr_val); | ||
| 404 | } | 282 | } |
| 405 | #endif | 283 | #endif |
| 406 | 284 | ||
| @@ -419,18 +297,26 @@ static inline int scif_rxroom(struct uart_port *port) | |||
| 419 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) | 297 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) |
| 420 | static inline int scif_txroom(struct uart_port *port) | 298 | static inline int scif_txroom(struct uart_port *port) |
| 421 | { | 299 | { |
| 422 | if((port->mapbase == 0xffe00000) || (port->mapbase == 0xffe08000)) /* SCIF0/1*/ | 300 | if ((port->mapbase == 0xffe00000) || |
| 301 | (port->mapbase == 0xffe08000)) { | ||
| 302 | /* SCIF0/1*/ | ||
| 423 | return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff); | 303 | return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff); |
| 424 | else /* SCIF2 */ | 304 | } else { |
| 305 | /* SCIF2 */ | ||
| 425 | return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8); | 306 | return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8); |
| 307 | } | ||
| 426 | } | 308 | } |
| 427 | 309 | ||
| 428 | static inline int scif_rxroom(struct uart_port *port) | 310 | static inline int scif_rxroom(struct uart_port *port) |
| 429 | { | 311 | { |
| 430 | if((port->mapbase == 0xffe00000) || (port->mapbase == 0xffe08000)) /* SCIF0/1*/ | 312 | if ((port->mapbase == 0xffe00000) || |
| 313 | (port->mapbase == 0xffe08000)) { | ||
| 314 | /* SCIF0/1*/ | ||
| 431 | return sci_in(port, SCRFDR) & 0xff; | 315 | return sci_in(port, SCRFDR) & 0xff; |
| 432 | else /* SCIF2 */ | 316 | } else { |
| 317 | /* SCIF2 */ | ||
| 433 | return sci_in(port, SCFDR) & SCIF2_RFDC_MASK; | 318 | return sci_in(port, SCFDR) & SCIF2_RFDC_MASK; |
| 319 | } | ||
| 434 | } | 320 | } |
| 435 | #else | 321 | #else |
| 436 | static inline int scif_txroom(struct uart_port *port) | 322 | static inline int scif_txroom(struct uart_port *port) |
| @@ -446,12 +332,12 @@ static inline int scif_rxroom(struct uart_port *port) | |||
| 446 | 332 | ||
| 447 | static inline int sci_txroom(struct uart_port *port) | 333 | static inline int sci_txroom(struct uart_port *port) |
| 448 | { | 334 | { |
| 449 | return ((sci_in(port, SCxSR) & SCI_TDRE) != 0); | 335 | return (sci_in(port, SCxSR) & SCI_TDRE) != 0; |
| 450 | } | 336 | } |
| 451 | 337 | ||
| 452 | static inline int sci_rxroom(struct uart_port *port) | 338 | static inline int sci_rxroom(struct uart_port *port) |
| 453 | { | 339 | { |
| 454 | return ((sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0); | 340 | return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0; |
| 455 | } | 341 | } |
| 456 | 342 | ||
| 457 | /* ********************************************************************** * | 343 | /* ********************************************************************** * |
| @@ -469,11 +355,10 @@ static void sci_transmit_chars(struct uart_port *port) | |||
| 469 | status = sci_in(port, SCxSR); | 355 | status = sci_in(port, SCxSR); |
| 470 | if (!(status & SCxSR_TDxE(port))) { | 356 | if (!(status & SCxSR_TDxE(port))) { |
| 471 | ctrl = sci_in(port, SCSCR); | 357 | ctrl = sci_in(port, SCSCR); |
| 472 | if (uart_circ_empty(xmit)) { | 358 | if (uart_circ_empty(xmit)) |
| 473 | ctrl &= ~SCI_CTRL_FLAGS_TIE; | 359 | ctrl &= ~SCI_CTRL_FLAGS_TIE; |
| 474 | } else { | 360 | else |
| 475 | ctrl |= SCI_CTRL_FLAGS_TIE; | 361 | ctrl |= SCI_CTRL_FLAGS_TIE; |
| 476 | } | ||
| 477 | sci_out(port, SCSCR, ctrl); | 362 | sci_out(port, SCSCR, ctrl); |
| 478 | return; | 363 | return; |
| 479 | } | 364 | } |
| @@ -521,11 +406,11 @@ static void sci_transmit_chars(struct uart_port *port) | |||
| 521 | } | 406 | } |
| 522 | 407 | ||
| 523 | /* On SH3, SCIF may read end-of-break as a space->mark char */ | 408 | /* On SH3, SCIF may read end-of-break as a space->mark char */ |
| 524 | #define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); }) | 409 | #define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); }) |
| 525 | 410 | ||
| 526 | static inline void sci_receive_chars(struct uart_port *port) | 411 | static inline void sci_receive_chars(struct uart_port *port) |
| 527 | { | 412 | { |
| 528 | struct sci_port *sci_port = (struct sci_port *)port; | 413 | struct sci_port *sci_port = to_sci_port(port); |
| 529 | struct tty_struct *tty = port->info->port.tty; | 414 | struct tty_struct *tty = port->info->port.tty; |
| 530 | int i, count, copied = 0; | 415 | int i, count, copied = 0; |
| 531 | unsigned short status; | 416 | unsigned short status; |
| @@ -550,13 +435,13 @@ static inline void sci_receive_chars(struct uart_port *port) | |||
| 550 | 435 | ||
| 551 | if (port->type == PORT_SCI) { | 436 | if (port->type == PORT_SCI) { |
| 552 | char c = sci_in(port, SCxRDR); | 437 | char c = sci_in(port, SCxRDR); |
| 553 | if (uart_handle_sysrq_char(port, c) || sci_port->break_flag) | 438 | if (uart_handle_sysrq_char(port, c) || |
| 439 | sci_port->break_flag) | ||
| 554 | count = 0; | 440 | count = 0; |
| 555 | else { | 441 | else |
| 556 | tty_insert_flip_char(tty, c, TTY_NORMAL); | 442 | tty_insert_flip_char(tty, c, TTY_NORMAL); |
| 557 | } | ||
| 558 | } else { | 443 | } else { |
| 559 | for (i=0; i<count; i++) { | 444 | for (i = 0; i < count; i++) { |
| 560 | char c = sci_in(port, SCxRDR); | 445 | char c = sci_in(port, SCxRDR); |
| 561 | status = sci_in(port, SCxSR); | 446 | status = sci_in(port, SCxSR); |
| 562 | #if defined(CONFIG_CPU_SH3) | 447 | #if defined(CONFIG_CPU_SH3) |
| @@ -569,7 +454,7 @@ static inline void sci_receive_chars(struct uart_port *port) | |||
| 569 | } | 454 | } |
| 570 | 455 | ||
| 571 | /* Nonzero => end-of-break */ | 456 | /* Nonzero => end-of-break */ |
| 572 | pr_debug("scif: debounce<%02x>\n", c); | 457 | dev_dbg(port->dev, "debounce<%02x>\n", c); |
| 573 | sci_port->break_flag = 0; | 458 | sci_port->break_flag = 0; |
| 574 | 459 | ||
| 575 | if (STEPFN(c)) { | 460 | if (STEPFN(c)) { |
| @@ -586,12 +471,13 @@ static inline void sci_receive_chars(struct uart_port *port) | |||
| 586 | /* Store data and status */ | 471 | /* Store data and status */ |
| 587 | if (status&SCxSR_FER(port)) { | 472 | if (status&SCxSR_FER(port)) { |
| 588 | flag = TTY_FRAME; | 473 | flag = TTY_FRAME; |
| 589 | pr_debug("sci: frame error\n"); | 474 | dev_notice(port->dev, "frame error\n"); |
| 590 | } else if (status&SCxSR_PER(port)) { | 475 | } else if (status&SCxSR_PER(port)) { |
| 591 | flag = TTY_PARITY; | 476 | flag = TTY_PARITY; |
| 592 | pr_debug("sci: parity error\n"); | 477 | dev_notice(port->dev, "parity error\n"); |
| 593 | } else | 478 | } else |
| 594 | flag = TTY_NORMAL; | 479 | flag = TTY_NORMAL; |
| 480 | |||
| 595 | tty_insert_flip_char(tty, c, flag); | 481 | tty_insert_flip_char(tty, c, flag); |
| 596 | } | 482 | } |
| 597 | } | 483 | } |
| @@ -651,13 +537,14 @@ static inline int sci_handle_errors(struct uart_port *port) | |||
| 651 | /* overrun error */ | 537 | /* overrun error */ |
| 652 | if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) | 538 | if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) |
| 653 | copied++; | 539 | copied++; |
| 654 | pr_debug("sci: overrun error\n"); | 540 | |
| 541 | dev_notice(port->dev, "overrun error"); | ||
| 655 | } | 542 | } |
| 656 | 543 | ||
| 657 | if (status & SCxSR_FER(port)) { | 544 | if (status & SCxSR_FER(port)) { |
| 658 | if (sci_rxd_in(port) == 0) { | 545 | if (sci_rxd_in(port) == 0) { |
| 659 | /* Notify of BREAK */ | 546 | /* Notify of BREAK */ |
| 660 | struct sci_port *sci_port = (struct sci_port *)port; | 547 | struct sci_port *sci_port = to_sci_port(port); |
| 661 | 548 | ||
| 662 | if (!sci_port->break_flag) { | 549 | if (!sci_port->break_flag) { |
| 663 | sci_port->break_flag = 1; | 550 | sci_port->break_flag = 1; |
| @@ -666,15 +553,19 @@ static inline int sci_handle_errors(struct uart_port *port) | |||
| 666 | /* Do sysrq handling. */ | 553 | /* Do sysrq handling. */ |
| 667 | if (uart_handle_break(port)) | 554 | if (uart_handle_break(port)) |
| 668 | return 0; | 555 | return 0; |
| 669 | pr_debug("sci: BREAK detected\n"); | 556 | |
| 557 | dev_dbg(port->dev, "BREAK detected\n"); | ||
| 558 | |||
| 670 | if (tty_insert_flip_char(tty, 0, TTY_BREAK)) | 559 | if (tty_insert_flip_char(tty, 0, TTY_BREAK)) |
| 671 | copied++; | 560 | copied++; |
| 672 | } | 561 | } |
| 562 | |||
| 673 | } else { | 563 | } else { |
| 674 | /* frame error */ | 564 | /* frame error */ |
| 675 | if (tty_insert_flip_char(tty, 0, TTY_FRAME)) | 565 | if (tty_insert_flip_char(tty, 0, TTY_FRAME)) |
| 676 | copied++; | 566 | copied++; |
| 677 | pr_debug("sci: frame error\n"); | 567 | |
| 568 | dev_notice(port->dev, "frame error\n"); | ||
| 678 | } | 569 | } |
| 679 | } | 570 | } |
| 680 | 571 | ||
| @@ -682,7 +573,8 @@ static inline int sci_handle_errors(struct uart_port *port) | |||
| 682 | /* parity error */ | 573 | /* parity error */ |
| 683 | if (tty_insert_flip_char(tty, 0, TTY_PARITY)) | 574 | if (tty_insert_flip_char(tty, 0, TTY_PARITY)) |
| 684 | copied++; | 575 | copied++; |
| 685 | pr_debug("sci: parity error\n"); | 576 | |
| 577 | dev_notice(port->dev, "parity error"); | ||
| 686 | } | 578 | } |
| 687 | 579 | ||
| 688 | if (copied) | 580 | if (copied) |
| @@ -691,6 +583,27 @@ static inline int sci_handle_errors(struct uart_port *port) | |||
| 691 | return copied; | 583 | return copied; |
| 692 | } | 584 | } |
| 693 | 585 | ||
| 586 | static inline int sci_handle_fifo_overrun(struct uart_port *port) | ||
| 587 | { | ||
| 588 | struct tty_struct *tty = port->info->port.tty; | ||
| 589 | int copied = 0; | ||
| 590 | |||
| 591 | if (port->type != PORT_SCIF) | ||
| 592 | return 0; | ||
| 593 | |||
| 594 | if ((sci_in(port, SCLSR) & SCIF_ORER) != 0) { | ||
| 595 | sci_out(port, SCLSR, 0); | ||
| 596 | |||
| 597 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); | ||
| 598 | tty_flip_buffer_push(tty); | ||
| 599 | |||
| 600 | dev_notice(port->dev, "overrun error\n"); | ||
| 601 | copied++; | ||
| 602 | } | ||
| 603 | |||
| 604 | return copied; | ||
| 605 | } | ||
| 606 | |||
| 694 | static inline int sci_handle_breaks(struct uart_port *port) | 607 | static inline int sci_handle_breaks(struct uart_port *port) |
| 695 | { | 608 | { |
| 696 | int copied = 0; | 609 | int copied = 0; |
| @@ -709,23 +622,15 @@ static inline int sci_handle_breaks(struct uart_port *port) | |||
| 709 | /* Notify of BREAK */ | 622 | /* Notify of BREAK */ |
| 710 | if (tty_insert_flip_char(tty, 0, TTY_BREAK)) | 623 | if (tty_insert_flip_char(tty, 0, TTY_BREAK)) |
| 711 | copied++; | 624 | copied++; |
| 712 | pr_debug("sci: BREAK detected\n"); | ||
| 713 | } | ||
| 714 | 625 | ||
| 715 | #if defined(SCIF_ORER) | 626 | dev_dbg(port->dev, "BREAK detected\n"); |
| 716 | /* XXX: Handle SCIF overrun error */ | ||
| 717 | if (port->type != PORT_SCI && (sci_in(port, SCLSR) & SCIF_ORER) != 0) { | ||
| 718 | sci_out(port, SCLSR, 0); | ||
| 719 | if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) { | ||
| 720 | copied++; | ||
| 721 | pr_debug("sci: overrun error\n"); | ||
| 722 | } | ||
| 723 | } | 627 | } |
| 724 | #endif | ||
| 725 | 628 | ||
| 726 | if (copied) | 629 | if (copied) |
| 727 | tty_flip_buffer_push(tty); | 630 | tty_flip_buffer_push(tty); |
| 728 | 631 | ||
| 632 | copied += sci_handle_fifo_overrun(port); | ||
| 633 | |||
| 729 | return copied; | 634 | return copied; |
| 730 | } | 635 | } |
| 731 | 636 | ||
| @@ -763,16 +668,7 @@ static irqreturn_t sci_er_interrupt(int irq, void *ptr) | |||
| 763 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | 668 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); |
| 764 | } | 669 | } |
| 765 | } else { | 670 | } else { |
| 766 | #if defined(SCIF_ORER) | 671 | sci_handle_fifo_overrun(port); |
| 767 | if((sci_in(port, SCLSR) & SCIF_ORER) != 0) { | ||
| 768 | struct tty_struct *tty = port->info->port.tty; | ||
| 769 | |||
| 770 | sci_out(port, SCLSR, 0); | ||
| 771 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); | ||
| 772 | tty_flip_buffer_push(tty); | ||
| 773 | pr_debug("scif: overrun error\n"); | ||
| 774 | } | ||
| 775 | #endif | ||
| 776 | sci_rx_interrupt(irq, ptr); | 672 | sci_rx_interrupt(irq, ptr); |
| 777 | } | 673 | } |
| 778 | 674 | ||
| @@ -801,8 +697,8 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr) | |||
| 801 | struct uart_port *port = ptr; | 697 | struct uart_port *port = ptr; |
| 802 | irqreturn_t ret = IRQ_NONE; | 698 | irqreturn_t ret = IRQ_NONE; |
| 803 | 699 | ||
| 804 | ssr_status = sci_in(port,SCxSR); | 700 | ssr_status = sci_in(port, SCxSR); |
| 805 | scr_status = sci_in(port,SCSCR); | 701 | scr_status = sci_in(port, SCSCR); |
| 806 | 702 | ||
| 807 | /* Tx Interrupt */ | 703 | /* Tx Interrupt */ |
| 808 | if ((ssr_status & 0x0020) && (scr_status & SCI_CTRL_FLAGS_TIE)) | 704 | if ((ssr_status & 0x0020) && (scr_status & SCI_CTRL_FLAGS_TIE)) |
| @@ -820,7 +716,7 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr) | |||
| 820 | return ret; | 716 | return ret; |
| 821 | } | 717 | } |
| 822 | 718 | ||
| 823 | #if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK) | 719 | #ifdef CONFIG_HAVE_CLK |
| 824 | /* | 720 | /* |
| 825 | * Here we define a transistion notifier so that we can update all of our | 721 | * Here we define a transistion notifier so that we can update all of our |
| 826 | * ports' baud rate when the peripheral clock changes. | 722 | * ports' baud rate when the peripheral clock changes. |
| @@ -828,41 +724,20 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr) | |||
| 828 | static int sci_notifier(struct notifier_block *self, | 724 | static int sci_notifier(struct notifier_block *self, |
| 829 | unsigned long phase, void *p) | 725 | unsigned long phase, void *p) |
| 830 | { | 726 | { |
| 831 | struct cpufreq_freqs *freqs = p; | ||
| 832 | int i; | 727 | int i; |
| 833 | 728 | ||
| 834 | if ((phase == CPUFREQ_POSTCHANGE) || | 729 | if ((phase == CPUFREQ_POSTCHANGE) || |
| 835 | (phase == CPUFREQ_RESUMECHANGE)){ | 730 | (phase == CPUFREQ_RESUMECHANGE)) |
| 836 | for (i = 0; i < SCI_NPORTS; i++) { | 731 | for (i = 0; i < SCI_NPORTS; i++) { |
| 837 | struct uart_port *port = &sci_ports[i].port; | 732 | struct sci_port *s = &sci_ports[i]; |
| 838 | struct clk *clk; | 733 | s->port.uartclk = clk_get_rate(s->clk); |
| 839 | |||
| 840 | /* | ||
| 841 | * Update the uartclk per-port if frequency has | ||
| 842 | * changed, since it will no longer necessarily be | ||
| 843 | * consistent with the old frequency. | ||
| 844 | * | ||
| 845 | * Really we want to be able to do something like | ||
| 846 | * uart_change_speed() or something along those lines | ||
| 847 | * here to implicitly reset the per-port baud rate.. | ||
| 848 | * | ||
| 849 | * Clean this up later.. | ||
| 850 | */ | ||
| 851 | clk = clk_get(NULL, "module_clk"); | ||
| 852 | port->uartclk = clk_get_rate(clk); | ||
| 853 | clk_put(clk); | ||
| 854 | } | 734 | } |
| 855 | 735 | ||
| 856 | printk(KERN_INFO "%s: got a postchange notification " | ||
| 857 | "for cpu %d (old %d, new %d)\n", | ||
| 858 | __func__, freqs->cpu, freqs->old, freqs->new); | ||
| 859 | } | ||
| 860 | |||
| 861 | return NOTIFY_OK; | 736 | return NOTIFY_OK; |
| 862 | } | 737 | } |
| 863 | 738 | ||
| 864 | static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 }; | 739 | static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 }; |
| 865 | #endif /* CONFIG_CPU_FREQ && CONFIG_HAVE_CLK */ | 740 | #endif |
| 866 | 741 | ||
| 867 | static int sci_request_irq(struct sci_port *port) | 742 | static int sci_request_irq(struct sci_port *port) |
| 868 | { | 743 | { |
| @@ -875,23 +750,22 @@ static int sci_request_irq(struct sci_port *port) | |||
| 875 | "SCI Transmit Data Empty", "SCI Break" }; | 750 | "SCI Transmit Data Empty", "SCI Break" }; |
| 876 | 751 | ||
| 877 | if (port->irqs[0] == port->irqs[1]) { | 752 | if (port->irqs[0] == port->irqs[1]) { |
| 878 | if (!port->irqs[0]) { | 753 | if (unlikely(!port->irqs[0])) |
| 879 | printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n"); | ||
| 880 | return -ENODEV; | 754 | return -ENODEV; |
| 881 | } | ||
| 882 | 755 | ||
| 883 | if (request_irq(port->irqs[0], sci_mpxed_interrupt, | 756 | if (request_irq(port->irqs[0], sci_mpxed_interrupt, |
| 884 | IRQF_DISABLED, "sci", port)) { | 757 | IRQF_DISABLED, "sci", port)) { |
| 885 | printk(KERN_ERR "sci: Cannot allocate irq.\n"); | 758 | dev_err(port->port.dev, "Can't allocate IRQ\n"); |
| 886 | return -ENODEV; | 759 | return -ENODEV; |
| 887 | } | 760 | } |
| 888 | } else { | 761 | } else { |
| 889 | for (i = 0; i < ARRAY_SIZE(handlers); i++) { | 762 | for (i = 0; i < ARRAY_SIZE(handlers); i++) { |
| 890 | if (!port->irqs[i]) | 763 | if (unlikely(!port->irqs[i])) |
| 891 | continue; | 764 | continue; |
| 765 | |||
| 892 | if (request_irq(port->irqs[i], handlers[i], | 766 | if (request_irq(port->irqs[i], handlers[i], |
| 893 | IRQF_DISABLED, desc[i], port)) { | 767 | IRQF_DISABLED, desc[i], port)) { |
| 894 | printk(KERN_ERR "sci: Cannot allocate irq.\n"); | 768 | dev_err(port->port.dev, "Can't allocate IRQ\n"); |
| 895 | return -ENODEV; | 769 | return -ENODEV; |
| 896 | } | 770 | } |
| 897 | } | 771 | } |
| @@ -904,12 +778,9 @@ static void sci_free_irq(struct sci_port *port) | |||
| 904 | { | 778 | { |
| 905 | int i; | 779 | int i; |
| 906 | 780 | ||
| 907 | if (port->irqs[0] == port->irqs[1]) { | 781 | if (port->irqs[0] == port->irqs[1]) |
| 908 | if (!port->irqs[0]) | 782 | free_irq(port->irqs[0], port); |
| 909 | printk("sci: sci_free_irq error\n"); | 783 | else { |
| 910 | else | ||
| 911 | free_irq(port->irqs[0], port); | ||
| 912 | } else { | ||
| 913 | for (i = 0; i < ARRAY_SIZE(port->irqs); i++) { | 784 | for (i = 0; i < ARRAY_SIZE(port->irqs); i++) { |
| 914 | if (!port->irqs[i]) | 785 | if (!port->irqs[i]) |
| 915 | continue; | 786 | continue; |
| @@ -1028,7 +899,6 @@ static void sci_shutdown(struct uart_port *port) | |||
| 1028 | static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | 899 | static void sci_set_termios(struct uart_port *port, struct ktermios *termios, |
| 1029 | struct ktermios *old) | 900 | struct ktermios *old) |
| 1030 | { | 901 | { |
| 1031 | struct sci_port *s = &sci_ports[port->line]; | ||
| 1032 | unsigned int status, baud, smr_val; | 902 | unsigned int status, baud, smr_val; |
| 1033 | int t = -1; | 903 | int t = -1; |
| 1034 | 904 | ||
| @@ -1060,32 +930,36 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 1060 | sci_out(port, SCSMR, smr_val); | 930 | sci_out(port, SCSMR, smr_val); |
| 1061 | 931 | ||
| 1062 | if (t > 0) { | 932 | if (t > 0) { |
| 1063 | if(t >= 256) { | 933 | if (t >= 256) { |
| 1064 | sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1); | 934 | sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1); |
| 1065 | t >>= 2; | 935 | t >>= 2; |
| 1066 | } else { | 936 | } else |
| 1067 | sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3); | 937 | sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3); |
| 1068 | } | 938 | |
| 1069 | sci_out(port, SCBRR, t); | 939 | sci_out(port, SCBRR, t); |
| 1070 | udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */ | 940 | udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */ |
| 1071 | } | 941 | } |
| 1072 | 942 | ||
| 1073 | if (likely(s->init_pins)) | 943 | sci_init_pins(port, termios->c_cflag); |
| 1074 | s->init_pins(port, termios->c_cflag); | 944 | sci_out(port, SCFCR, (termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0); |
| 1075 | 945 | ||
| 1076 | sci_out(port, SCSCR, SCSCR_INIT(port)); | 946 | sci_out(port, SCSCR, SCSCR_INIT(port)); |
| 1077 | 947 | ||
| 1078 | if ((termios->c_cflag & CREAD) != 0) | 948 | if ((termios->c_cflag & CREAD) != 0) |
| 1079 | sci_start_rx(port,0); | 949 | sci_start_rx(port, 0); |
| 1080 | } | 950 | } |
| 1081 | 951 | ||
| 1082 | static const char *sci_type(struct uart_port *port) | 952 | static const char *sci_type(struct uart_port *port) |
| 1083 | { | 953 | { |
| 1084 | switch (port->type) { | 954 | switch (port->type) { |
| 1085 | case PORT_SCI: return "sci"; | 955 | case PORT_IRDA: |
| 1086 | case PORT_SCIF: return "scif"; | 956 | return "irda"; |
| 1087 | case PORT_IRDA: return "irda"; | 957 | case PORT_SCI: |
| 1088 | case PORT_SCIFA: return "scifa"; | 958 | return "sci"; |
| 959 | case PORT_SCIF: | ||
| 960 | return "scif"; | ||
| 961 | case PORT_SCIFA: | ||
| 962 | return "scifa"; | ||
| 1089 | } | 963 | } |
| 1090 | 964 | ||
| 1091 | return NULL; | 965 | return NULL; |
| @@ -1108,19 +982,6 @@ static void sci_config_port(struct uart_port *port, int flags) | |||
| 1108 | 982 | ||
| 1109 | port->type = s->type; | 983 | port->type = s->type; |
| 1110 | 984 | ||
| 1111 | switch (port->type) { | ||
| 1112 | case PORT_SCI: | ||
| 1113 | s->init_pins = sci_init_pins_sci; | ||
| 1114 | break; | ||
| 1115 | case PORT_SCIF: | ||
| 1116 | case PORT_SCIFA: | ||
| 1117 | s->init_pins = sci_init_pins_scif; | ||
| 1118 | break; | ||
| 1119 | case PORT_IRDA: | ||
| 1120 | s->init_pins = sci_init_pins_irda; | ||
| 1121 | break; | ||
| 1122 | } | ||
| 1123 | |||
| 1124 | if (port->flags & UPF_IOREMAP && !port->membase) { | 985 | if (port->flags & UPF_IOREMAP && !port->membase) { |
| 1125 | #if defined(CONFIG_SUPERH64) | 986 | #if defined(CONFIG_SUPERH64) |
| 1126 | port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF"); | 987 | port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF"); |
| @@ -1129,7 +990,7 @@ static void sci_config_port(struct uart_port *port, int flags) | |||
| 1129 | port->membase = ioremap_nocache(port->mapbase, 0x40); | 990 | port->membase = ioremap_nocache(port->mapbase, 0x40); |
| 1130 | #endif | 991 | #endif |
| 1131 | 992 | ||
| 1132 | printk(KERN_ERR "sci: can't remap port#%d\n", port->line); | 993 | dev_err(port->dev, "can't remap port#%d\n", port->line); |
| 1133 | } | 994 | } |
| 1134 | } | 995 | } |
| 1135 | 996 | ||
| @@ -1163,6 +1024,10 @@ static struct uart_ops sci_uart_ops = { | |||
| 1163 | .request_port = sci_request_port, | 1024 | .request_port = sci_request_port, |
| 1164 | .config_port = sci_config_port, | 1025 | .config_port = sci_config_port, |
| 1165 | .verify_port = sci_verify_port, | 1026 | .verify_port = sci_verify_port, |
| 1027 | #ifdef CONFIG_CONSOLE_POLL | ||
| 1028 | .poll_get_char = sci_poll_get_char, | ||
| 1029 | .poll_put_char = sci_poll_put_char, | ||
| 1030 | #endif | ||
| 1166 | }; | 1031 | }; |
| 1167 | 1032 | ||
| 1168 | static void __init sci_init_ports(void) | 1033 | static void __init sci_init_ports(void) |
| @@ -1229,7 +1094,15 @@ int __init early_sci_setup(struct uart_port *port) | |||
| 1229 | static void serial_console_write(struct console *co, const char *s, | 1094 | static void serial_console_write(struct console *co, const char *s, |
| 1230 | unsigned count) | 1095 | unsigned count) |
| 1231 | { | 1096 | { |
| 1232 | put_string(serial_console_port, s, count); | 1097 | struct uart_port *port = &serial_console_port->port; |
| 1098 | int i; | ||
| 1099 | |||
| 1100 | for (i = 0; i < count; i++) { | ||
| 1101 | if (*s == 10) | ||
| 1102 | sci_poll_put_char(port, '\r'); | ||
| 1103 | |||
| 1104 | sci_poll_put_char(port, *s++); | ||
| 1105 | } | ||
| 1233 | } | 1106 | } |
| 1234 | 1107 | ||
| 1235 | static int __init serial_console_setup(struct console *co, char *options) | 1108 | static int __init serial_console_setup(struct console *co, char *options) |
| @@ -1307,89 +1180,8 @@ static int __init sci_console_init(void) | |||
| 1307 | console_initcall(sci_console_init); | 1180 | console_initcall(sci_console_init); |
| 1308 | #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ | 1181 | #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ |
| 1309 | 1182 | ||
| 1310 | #ifdef CONFIG_SH_KGDB_CONSOLE | 1183 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) |
| 1311 | /* | 1184 | #define SCI_CONSOLE (&serial_console) |
| 1312 | * FIXME: Most of this can go away.. at the moment, we rely on | ||
| 1313 | * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though | ||
| 1314 | * most of that can easily be done here instead. | ||
| 1315 | * | ||
| 1316 | * For the time being, just accept the values that were parsed earlier.. | ||
| 1317 | */ | ||
| 1318 | static void __init kgdb_console_get_options(struct uart_port *port, int *baud, | ||
| 1319 | int *parity, int *bits) | ||
| 1320 | { | ||
| 1321 | *baud = kgdb_baud; | ||
| 1322 | *parity = tolower(kgdb_parity); | ||
| 1323 | *bits = kgdb_bits - '0'; | ||
| 1324 | } | ||
| 1325 | |||
| 1326 | /* | ||
| 1327 | * The naming here is somewhat misleading, since kgdb_console_setup() takes | ||
| 1328 | * care of the early-on initialization for kgdb, regardless of whether we | ||
| 1329 | * actually use kgdb as a console or not. | ||
| 1330 | * | ||
| 1331 | * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense. | ||
| 1332 | */ | ||
| 1333 | int __init kgdb_console_setup(struct console *co, char *options) | ||
| 1334 | { | ||
| 1335 | struct uart_port *port = &sci_ports[kgdb_portnum].port; | ||
| 1336 | int baud = 38400; | ||
| 1337 | int bits = 8; | ||
| 1338 | int parity = 'n'; | ||
| 1339 | int flow = 'n'; | ||
| 1340 | |||
| 1341 | if (co->index != kgdb_portnum) | ||
| 1342 | co->index = kgdb_portnum; | ||
| 1343 | |||
| 1344 | kgdb_sci_port = &sci_ports[co->index]; | ||
| 1345 | port = &kgdb_sci_port->port; | ||
| 1346 | |||
| 1347 | /* | ||
| 1348 | * Also need to check port->type, we don't actually have any | ||
| 1349 | * UPIO_PORT ports, but uart_report_port() handily misreports | ||
| 1350 | * it anyways if we don't have a port available by the time this is | ||
| 1351 | * called. | ||
| 1352 | */ | ||
| 1353 | if (!port->type) | ||
| 1354 | return -ENODEV; | ||
| 1355 | if (!port->membase || !port->mapbase) | ||
| 1356 | return -ENODEV; | ||
| 1357 | |||
| 1358 | if (options) | ||
| 1359 | uart_parse_options(options, &baud, &parity, &bits, &flow); | ||
| 1360 | else | ||
| 1361 | kgdb_console_get_options(port, &baud, &parity, &bits); | ||
| 1362 | |||
| 1363 | kgdb_getchar = kgdb_sci_getchar; | ||
| 1364 | kgdb_putchar = kgdb_sci_putchar; | ||
| 1365 | |||
| 1366 | return uart_set_options(port, co, baud, parity, bits, flow); | ||
| 1367 | } | ||
| 1368 | |||
| 1369 | static struct console kgdb_console = { | ||
| 1370 | .name = "ttySC", | ||
| 1371 | .device = uart_console_device, | ||
| 1372 | .write = kgdb_console_write, | ||
| 1373 | .setup = kgdb_console_setup, | ||
| 1374 | .flags = CON_PRINTBUFFER, | ||
| 1375 | .index = -1, | ||
| 1376 | .data = &sci_uart_driver, | ||
| 1377 | }; | ||
| 1378 | |||
| 1379 | /* Register the KGDB console so we get messages (d'oh!) */ | ||
| 1380 | static int __init kgdb_console_init(void) | ||
| 1381 | { | ||
| 1382 | sci_init_ports(); | ||
| 1383 | register_console(&kgdb_console); | ||
| 1384 | return 0; | ||
| 1385 | } | ||
| 1386 | console_initcall(kgdb_console_init); | ||
| 1387 | #endif /* CONFIG_SH_KGDB_CONSOLE */ | ||
| 1388 | |||
| 1389 | #if defined(CONFIG_SH_KGDB_CONSOLE) | ||
| 1390 | #define SCI_CONSOLE &kgdb_console | ||
| 1391 | #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE) | ||
| 1392 | #define SCI_CONSOLE &serial_console | ||
| 1393 | #else | 1185 | #else |
| 1394 | #define SCI_CONSOLE 0 | 1186 | #define SCI_CONSOLE 0 |
| 1395 | #endif | 1187 | #endif |
| @@ -1463,15 +1255,8 @@ static int __devinit sci_probe(struct platform_device *dev) | |||
| 1463 | uart_add_one_port(&sci_uart_driver, &sciport->port); | 1255 | uart_add_one_port(&sci_uart_driver, &sciport->port); |
| 1464 | } | 1256 | } |
| 1465 | 1257 | ||
| 1466 | #if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE) | 1258 | #ifdef CONFIG_HAVE_CLK |
| 1467 | kgdb_sci_port = &sci_ports[kgdb_portnum]; | ||
| 1468 | kgdb_getchar = kgdb_sci_getchar; | ||
| 1469 | kgdb_putchar = kgdb_sci_putchar; | ||
| 1470 | #endif | ||
| 1471 | |||
| 1472 | #if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK) | ||
| 1473 | cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER); | 1259 | cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER); |
| 1474 | dev_info(&dev->dev, "CPU frequency notifier registered\n"); | ||
| 1475 | #endif | 1260 | #endif |
| 1476 | 1261 | ||
| 1477 | #ifdef CONFIG_SH_STANDARD_BIOS | 1262 | #ifdef CONFIG_SH_STANDARD_BIOS |
| @@ -1491,6 +1276,10 @@ static int __devexit sci_remove(struct platform_device *dev) | |||
| 1491 | { | 1276 | { |
| 1492 | int i; | 1277 | int i; |
| 1493 | 1278 | ||
| 1279 | #ifdef CONFIG_HAVE_CLK | ||
| 1280 | cpufreq_unregister_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER); | ||
| 1281 | #endif | ||
| 1282 | |||
| 1494 | for (i = 0; i < SCI_NPORTS; i++) | 1283 | for (i = 0; i < SCI_NPORTS; i++) |
| 1495 | uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port); | 1284 | uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port); |
| 1496 | 1285 | ||
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index 9f33b064172e..38c600c0dbbf 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
| @@ -133,13 +133,20 @@ | |||
| 133 | # define SCSPTR5 0xffef0024 /* 16 bit SCIF */ | 133 | # define SCSPTR5 0xffef0024 /* 16 bit SCIF */ |
| 134 | # define SCIF_OPER 0x0001 /* Overrun error bit */ | 134 | # define SCIF_OPER 0x0001 /* Overrun error bit */ |
| 135 | # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 135 | # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
| 136 | #elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \ | 136 | #elif defined(CONFIG_CPU_SUBTYPE_SH7201) || \ |
| 137 | defined(CONFIG_CPU_SUBTYPE_SH7203) || \ | ||
| 137 | defined(CONFIG_CPU_SUBTYPE_SH7206) || \ | 138 | defined(CONFIG_CPU_SUBTYPE_SH7206) || \ |
| 138 | defined(CONFIG_CPU_SUBTYPE_SH7263) | 139 | defined(CONFIG_CPU_SUBTYPE_SH7263) |
| 139 | # define SCSPTR0 0xfffe8020 /* 16 bit SCIF */ | 140 | # define SCSPTR0 0xfffe8020 /* 16 bit SCIF */ |
| 140 | # define SCSPTR1 0xfffe8820 /* 16 bit SCIF */ | 141 | # define SCSPTR1 0xfffe8820 /* 16 bit SCIF */ |
| 141 | # define SCSPTR2 0xfffe9020 /* 16 bit SCIF */ | 142 | # define SCSPTR2 0xfffe9020 /* 16 bit SCIF */ |
| 142 | # define SCSPTR3 0xfffe9820 /* 16 bit SCIF */ | 143 | # define SCSPTR3 0xfffe9820 /* 16 bit SCIF */ |
| 144 | # if defined(CONFIG_CPU_SUBTYPE_SH7201) | ||
| 145 | # define SCSPTR4 0xfffeA020 /* 16 bit SCIF */ | ||
| 146 | # define SCSPTR5 0xfffeA820 /* 16 bit SCIF */ | ||
| 147 | # define SCSPTR6 0xfffeB020 /* 16 bit SCIF */ | ||
| 148 | # define SCSPTR7 0xfffeB820 /* 16 bit SCIF */ | ||
| 149 | # endif | ||
| 143 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 150 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
| 144 | #elif defined(CONFIG_CPU_SUBTYPE_SH7619) | 151 | #elif defined(CONFIG_CPU_SUBTYPE_SH7619) |
| 145 | # define SCSPTR0 0xf8400020 /* 16 bit SCIF */ | 152 | # define SCSPTR0 0xf8400020 /* 16 bit SCIF */ |
| @@ -225,6 +232,10 @@ | |||
| 225 | # define SCIF_TXROOM_MAX 16 | 232 | # define SCIF_TXROOM_MAX 16 |
| 226 | #endif | 233 | #endif |
| 227 | 234 | ||
| 235 | #ifndef SCIF_ORER | ||
| 236 | #define SCIF_ORER 0x0000 | ||
| 237 | #endif | ||
| 238 | |||
| 228 | #define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND) | 239 | #define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND) |
| 229 | #define SCxSR_ERRORS(port) (((port)->type == PORT_SCI) ? SCI_ERRORS : SCIF_ERRORS) | 240 | #define SCxSR_ERRORS(port) (((port)->type == PORT_SCI) ? SCI_ERRORS : SCIF_ERRORS) |
| 230 | #define SCxSR_RDxF(port) (((port)->type == PORT_SCI) ? SCI_RDRF : SCIF_RDF) | 241 | #define SCxSR_RDxF(port) (((port)->type == PORT_SCI) ? SCI_RDRF : SCIF_RDF) |
| @@ -232,12 +243,7 @@ | |||
| 232 | #define SCxSR_FER(port) (((port)->type == PORT_SCI) ? SCI_FER : SCIF_FER) | 243 | #define SCxSR_FER(port) (((port)->type == PORT_SCI) ? SCI_FER : SCIF_FER) |
| 233 | #define SCxSR_PER(port) (((port)->type == PORT_SCI) ? SCI_PER : SCIF_PER) | 244 | #define SCxSR_PER(port) (((port)->type == PORT_SCI) ? SCI_PER : SCIF_PER) |
| 234 | #define SCxSR_BRK(port) (((port)->type == PORT_SCI) ? 0x00 : SCIF_BRK) | 245 | #define SCxSR_BRK(port) (((port)->type == PORT_SCI) ? 0x00 : SCIF_BRK) |
| 235 | 246 | #define SCxSR_ORER(port) (((port)->type == PORT_SCI) ? SCI_ORER : SCIF_ORER) | |
| 236 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) | ||
| 237 | # define SCxSR_ORER(port) (((port)->type == PORT_SCI) ? SCI_ORER : SCIF_ORER) | ||
| 238 | #else | ||
| 239 | # define SCxSR_ORER(port) (((port)->type == PORT_SCI) ? SCI_ORER : 0x0000) | ||
| 240 | #endif | ||
| 241 | 247 | ||
| 242 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 248 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |
| 243 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 249 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
| @@ -501,18 +507,6 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
| 501 | { | 507 | { |
| 502 | return sci_in(port,SCxSR)&0x0010 ? 1 : 0; | 508 | return sci_in(port,SCxSR)&0x0010 ? 1 : 0; |
| 503 | } | 509 | } |
| 504 | static inline void set_sh771x_scif_pfc(struct uart_port *port) | ||
| 505 | { | ||
| 506 | if (port->mapbase == 0xA4400000){ | ||
| 507 | ctrl_outw(ctrl_inw(PACR)&0xffc0,PACR); | ||
| 508 | ctrl_outw(ctrl_inw(PBCR)&0x0fff,PBCR); | ||
| 509 | return; | ||
| 510 | } | ||
| 511 | if (port->mapbase == 0xA4410000){ | ||
| 512 | ctrl_outw(ctrl_inw(PBCR)&0xf003,PBCR); | ||
| 513 | return; | ||
| 514 | } | ||
| 515 | } | ||
| 516 | #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 510 | #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
| 517 | defined(CONFIG_CPU_SUBTYPE_SH7721) | 511 | defined(CONFIG_CPU_SUBTYPE_SH7721) |
| 518 | static inline int sci_rxd_in(struct uart_port *port) | 512 | static inline int sci_rxd_in(struct uart_port *port) |
| @@ -664,7 +658,8 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
| 664 | return ctrl_inw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */ | 658 | return ctrl_inw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */ |
| 665 | return 1; | 659 | return 1; |
| 666 | } | 660 | } |
| 667 | #elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \ | 661 | #elif defined(CONFIG_CPU_SUBTYPE_SH7201) || \ |
| 662 | defined(CONFIG_CPU_SUBTYPE_SH7203) || \ | ||
| 668 | defined(CONFIG_CPU_SUBTYPE_SH7206) || \ | 663 | defined(CONFIG_CPU_SUBTYPE_SH7206) || \ |
| 669 | defined(CONFIG_CPU_SUBTYPE_SH7263) | 664 | defined(CONFIG_CPU_SUBTYPE_SH7263) |
| 670 | static inline int sci_rxd_in(struct uart_port *port) | 665 | static inline int sci_rxd_in(struct uart_port *port) |
| @@ -677,6 +672,16 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
| 677 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 672 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
| 678 | if (port->mapbase == 0xfffe9800) | 673 | if (port->mapbase == 0xfffe9800) |
| 679 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ | 674 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ |
| 675 | #if defined(CONFIG_CPU_SUBTYPE_SH7201) | ||
| 676 | if (port->mapbase == 0xfffeA000) | ||
| 677 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | ||
| 678 | if (port->mapbase == 0xfffeA800) | ||
| 679 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | ||
| 680 | if (port->mapbase == 0xfffeB000) | ||
| 681 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | ||
| 682 | if (port->mapbase == 0xfffeB800) | ||
| 683 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ | ||
| 684 | #endif | ||
| 680 | return 1; | 685 | return 1; |
| 681 | } | 686 | } |
| 682 | #elif defined(CONFIG_CPU_SUBTYPE_SH7619) | 687 | #elif defined(CONFIG_CPU_SUBTYPE_SH7619) |
diff --git a/drivers/usb/gadget/m66592-udc.c b/drivers/usb/gadget/m66592-udc.c index 77b44fb48f0a..3a8879ec2061 100644 --- a/drivers/usb/gadget/m66592-udc.c +++ b/drivers/usb/gadget/m66592-udc.c | |||
| @@ -623,7 +623,6 @@ static void start_ep0(struct m66592_ep *ep, struct m66592_request *req) | |||
| 623 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) | 623 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) |
| 624 | static void init_controller(struct m66592 *m66592) | 624 | static void init_controller(struct m66592 *m66592) |
| 625 | { | 625 | { |
| 626 | usbf_start_clock(); | ||
| 627 | m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */ | 626 | m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */ |
| 628 | m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG); | 627 | m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG); |
| 629 | m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG); | 628 | m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG); |
| @@ -671,9 +670,7 @@ static void init_controller(struct m66592 *m66592) | |||
| 671 | 670 | ||
| 672 | static void disable_controller(struct m66592 *m66592) | 671 | static void disable_controller(struct m66592 *m66592) |
| 673 | { | 672 | { |
| 674 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) | 673 | #if !defined(CONFIG_SUPERH_BUILT_IN_M66592) |
| 675 | usbf_stop_clock(); | ||
| 676 | #else | ||
| 677 | m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG); | 674 | m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG); |
| 678 | udelay(1); | 675 | udelay(1); |
| 679 | m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG); | 676 | m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG); |
| @@ -686,9 +683,7 @@ static void disable_controller(struct m66592 *m66592) | |||
| 686 | 683 | ||
| 687 | static void m66592_start_xclock(struct m66592 *m66592) | 684 | static void m66592_start_xclock(struct m66592 *m66592) |
| 688 | { | 685 | { |
| 689 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) | 686 | #if !defined(CONFIG_SUPERH_BUILT_IN_M66592) |
| 690 | usbf_start_clock(); | ||
| 691 | #else | ||
| 692 | u16 tmp; | 687 | u16 tmp; |
| 693 | 688 | ||
| 694 | tmp = m66592_read(m66592, M66592_SYSCFG); | 689 | tmp = m66592_read(m66592, M66592_SYSCFG); |
| @@ -1539,7 +1534,10 @@ static int __exit m66592_remove(struct platform_device *pdev) | |||
| 1539 | iounmap(m66592->reg); | 1534 | iounmap(m66592->reg); |
| 1540 | free_irq(platform_get_irq(pdev, 0), m66592); | 1535 | free_irq(platform_get_irq(pdev, 0), m66592); |
| 1541 | m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req); | 1536 | m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req); |
| 1542 | usbf_stop_clock(); | 1537 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) |
| 1538 | clk_disable(m66592->clk); | ||
| 1539 | clk_put(m66592->clk); | ||
| 1540 | #endif | ||
| 1543 | kfree(m66592); | 1541 | kfree(m66592); |
| 1544 | return 0; | 1542 | return 0; |
| 1545 | } | 1543 | } |
| @@ -1556,6 +1554,9 @@ static int __init m66592_probe(struct platform_device *pdev) | |||
| 1556 | int irq; | 1554 | int irq; |
| 1557 | void __iomem *reg = NULL; | 1555 | void __iomem *reg = NULL; |
| 1558 | struct m66592 *m66592 = NULL; | 1556 | struct m66592 *m66592 = NULL; |
| 1557 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) | ||
| 1558 | char clk_name[8]; | ||
| 1559 | #endif | ||
| 1559 | int ret = 0; | 1560 | int ret = 0; |
| 1560 | int i; | 1561 | int i; |
| 1561 | 1562 | ||
| @@ -1614,6 +1615,16 @@ static int __init m66592_probe(struct platform_device *pdev) | |||
| 1614 | goto clean_up; | 1615 | goto clean_up; |
| 1615 | } | 1616 | } |
| 1616 | 1617 | ||
| 1618 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) | ||
| 1619 | snprintf(clk_name, sizeof(clk_name), "usbf%d", pdev->id); | ||
| 1620 | m66592->clk = clk_get(&pdev->dev, clk_name); | ||
| 1621 | if (IS_ERR(m66592->clk)) { | ||
| 1622 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); | ||
| 1623 | ret = PTR_ERR(m66592->clk); | ||
| 1624 | goto clean_up2; | ||
| 1625 | } | ||
| 1626 | clk_enable(m66592->clk); | ||
| 1627 | #endif | ||
| 1617 | INIT_LIST_HEAD(&m66592->gadget.ep_list); | 1628 | INIT_LIST_HEAD(&m66592->gadget.ep_list); |
| 1618 | m66592->gadget.ep0 = &m66592->ep[0].ep; | 1629 | m66592->gadget.ep0 = &m66592->ep[0].ep; |
| 1619 | INIT_LIST_HEAD(&m66592->gadget.ep0->ep_list); | 1630 | INIT_LIST_HEAD(&m66592->gadget.ep0->ep_list); |
| @@ -1645,7 +1656,7 @@ static int __init m66592_probe(struct platform_device *pdev) | |||
| 1645 | 1656 | ||
| 1646 | m66592->ep0_req = m66592_alloc_request(&m66592->ep[0].ep, GFP_KERNEL); | 1657 | m66592->ep0_req = m66592_alloc_request(&m66592->ep[0].ep, GFP_KERNEL); |
| 1647 | if (m66592->ep0_req == NULL) | 1658 | if (m66592->ep0_req == NULL) |
| 1648 | goto clean_up2; | 1659 | goto clean_up3; |
| 1649 | m66592->ep0_req->complete = nop_completion; | 1660 | m66592->ep0_req->complete = nop_completion; |
| 1650 | 1661 | ||
| 1651 | init_controller(m66592); | 1662 | init_controller(m66592); |
| @@ -1653,7 +1664,12 @@ static int __init m66592_probe(struct platform_device *pdev) | |||
| 1653 | dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION); | 1664 | dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION); |
| 1654 | return 0; | 1665 | return 0; |
| 1655 | 1666 | ||
| 1667 | clean_up3: | ||
| 1668 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) | ||
| 1669 | clk_disable(m66592->clk); | ||
| 1670 | clk_put(m66592->clk); | ||
| 1656 | clean_up2: | 1671 | clean_up2: |
| 1672 | #endif | ||
| 1657 | free_irq(irq, m66592); | 1673 | free_irq(irq, m66592); |
| 1658 | clean_up: | 1674 | clean_up: |
| 1659 | if (m66592) { | 1675 | if (m66592) { |
diff --git a/drivers/usb/gadget/m66592-udc.h b/drivers/usb/gadget/m66592-udc.h index f118f00f1466..286ce07e7960 100644 --- a/drivers/usb/gadget/m66592-udc.h +++ b/drivers/usb/gadget/m66592-udc.h | |||
| @@ -23,6 +23,10 @@ | |||
| 23 | #ifndef __M66592_UDC_H__ | 23 | #ifndef __M66592_UDC_H__ |
| 24 | #define __M66592_UDC_H__ | 24 | #define __M66592_UDC_H__ |
| 25 | 25 | ||
| 26 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) | ||
| 27 | #include <linux/clk.h> | ||
| 28 | #endif | ||
| 29 | |||
| 26 | #define M66592_SYSCFG 0x00 | 30 | #define M66592_SYSCFG 0x00 |
| 27 | #define M66592_XTAL 0xC000 /* b15-14: Crystal selection */ | 31 | #define M66592_XTAL 0xC000 /* b15-14: Crystal selection */ |
| 28 | #define M66592_XTAL48 0x8000 /* 48MHz */ | 32 | #define M66592_XTAL48 0x8000 /* 48MHz */ |
| @@ -476,6 +480,9 @@ struct m66592_ep { | |||
| 476 | struct m66592 { | 480 | struct m66592 { |
| 477 | spinlock_t lock; | 481 | spinlock_t lock; |
| 478 | void __iomem *reg; | 482 | void __iomem *reg; |
| 483 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) | ||
| 484 | struct clk *clk; | ||
| 485 | #endif | ||
| 479 | 486 | ||
| 480 | struct usb_gadget gadget; | 487 | struct usb_gadget gadget; |
| 481 | struct usb_gadget_driver *driver; | 488 | struct usb_gadget_driver *driver; |
| @@ -604,26 +611,6 @@ static inline void m66592_mdfy(struct m66592 *m66592, u16 val, u16 pat, | |||
| 604 | #define m66592_bset(m66592, val, offset) \ | 611 | #define m66592_bset(m66592, val, offset) \ |
| 605 | m66592_mdfy(m66592, val, 0, offset) | 612 | m66592_mdfy(m66592, val, 0, offset) |
| 606 | 613 | ||
| 607 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) | ||
| 608 | #include <asm/io.h> | ||
| 609 | #define MSTPCR2 0xA4150038 /* for SH7722 */ | ||
| 610 | #define MSTPCR2_USB 0x00000800 | ||
| 611 | |||
| 612 | static inline void usbf_start_clock(void) | ||
| 613 | { | ||
| 614 | ctrl_outl(ctrl_inl(MSTPCR2) & ~MSTPCR2_USB, MSTPCR2); | ||
| 615 | } | ||
| 616 | |||
| 617 | static inline void usbf_stop_clock(void) | ||
| 618 | { | ||
| 619 | ctrl_outl(ctrl_inl(MSTPCR2) | MSTPCR2_USB, MSTPCR2); | ||
| 620 | } | ||
| 621 | |||
| 622 | #else | ||
| 623 | #define usbf_start_clock(x) | ||
| 624 | #define usbf_stop_clock(x) | ||
| 625 | #endif /* if defined(CONFIG_SUPERH_BUILT_IN_M66592) */ | ||
| 626 | |||
| 627 | #endif /* ifndef __M66592_UDC_H__ */ | 614 | #endif /* ifndef __M66592_UDC_H__ */ |
| 628 | 615 | ||
| 629 | 616 | ||
diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c index 2376f24f3c83..c21f14e0666a 100644 --- a/drivers/usb/host/r8a66597-hcd.c +++ b/drivers/usb/host/r8a66597-hcd.c | |||
| @@ -114,6 +114,9 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597) | |||
| 114 | int i = 0; | 114 | int i = 0; |
| 115 | 115 | ||
| 116 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) | 116 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) |
| 117 | #if defined(CONFIG_HAVE_CLK) | ||
| 118 | clk_enable(r8a66597->clk); | ||
| 119 | #endif | ||
| 117 | do { | 120 | do { |
| 118 | r8a66597_write(r8a66597, SCKE, SYSCFG0); | 121 | r8a66597_write(r8a66597, SCKE, SYSCFG0); |
| 119 | tmp = r8a66597_read(r8a66597, SYSCFG0); | 122 | tmp = r8a66597_read(r8a66597, SYSCFG0); |
| @@ -154,7 +157,11 @@ static void r8a66597_clock_disable(struct r8a66597 *r8a66597) | |||
| 154 | { | 157 | { |
| 155 | r8a66597_bclr(r8a66597, SCKE, SYSCFG0); | 158 | r8a66597_bclr(r8a66597, SCKE, SYSCFG0); |
| 156 | udelay(1); | 159 | udelay(1); |
| 157 | #if !defined(CONFIG_SUPERH_ON_CHIP_R8A66597) | 160 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) |
| 161 | #if defined(CONFIG_HAVE_CLK) | ||
| 162 | clk_disable(r8a66597->clk); | ||
| 163 | #endif | ||
| 164 | #else | ||
| 158 | r8a66597_bclr(r8a66597, PLLC, SYSCFG0); | 165 | r8a66597_bclr(r8a66597, PLLC, SYSCFG0); |
| 159 | r8a66597_bclr(r8a66597, XCKE, SYSCFG0); | 166 | r8a66597_bclr(r8a66597, XCKE, SYSCFG0); |
| 160 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | 167 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); |
| @@ -2261,6 +2268,9 @@ static int __init_or_module r8a66597_remove(struct platform_device *pdev) | |||
| 2261 | del_timer_sync(&r8a66597->rh_timer); | 2268 | del_timer_sync(&r8a66597->rh_timer); |
| 2262 | usb_remove_hcd(hcd); | 2269 | usb_remove_hcd(hcd); |
| 2263 | iounmap((void *)r8a66597->reg); | 2270 | iounmap((void *)r8a66597->reg); |
| 2271 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) | ||
| 2272 | clk_put(r8a66597->clk); | ||
| 2273 | #endif | ||
| 2264 | usb_put_hcd(hcd); | 2274 | usb_put_hcd(hcd); |
| 2265 | return 0; | 2275 | return 0; |
| 2266 | } | 2276 | } |
| @@ -2268,6 +2278,9 @@ static int __init_or_module r8a66597_remove(struct platform_device *pdev) | |||
| 2268 | #define resource_len(r) (((r)->end - (r)->start) + 1) | 2278 | #define resource_len(r) (((r)->end - (r)->start) + 1) |
| 2269 | static int __init r8a66597_probe(struct platform_device *pdev) | 2279 | static int __init r8a66597_probe(struct platform_device *pdev) |
| 2270 | { | 2280 | { |
| 2281 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) | ||
| 2282 | char clk_name[8]; | ||
| 2283 | #endif | ||
| 2271 | struct resource *res = NULL, *ires; | 2284 | struct resource *res = NULL, *ires; |
| 2272 | int irq = -1; | 2285 | int irq = -1; |
| 2273 | void __iomem *reg = NULL; | 2286 | void __iomem *reg = NULL; |
| @@ -2320,6 +2333,16 @@ static int __init r8a66597_probe(struct platform_device *pdev) | |||
| 2320 | memset(r8a66597, 0, sizeof(struct r8a66597)); | 2333 | memset(r8a66597, 0, sizeof(struct r8a66597)); |
| 2321 | dev_set_drvdata(&pdev->dev, r8a66597); | 2334 | dev_set_drvdata(&pdev->dev, r8a66597); |
| 2322 | 2335 | ||
| 2336 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) | ||
| 2337 | snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id); | ||
| 2338 | r8a66597->clk = clk_get(&pdev->dev, clk_name); | ||
| 2339 | if (IS_ERR(r8a66597->clk)) { | ||
| 2340 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); | ||
| 2341 | ret = PTR_ERR(r8a66597->clk); | ||
| 2342 | goto clean_up2; | ||
| 2343 | } | ||
| 2344 | #endif | ||
| 2345 | |||
| 2323 | spin_lock_init(&r8a66597->lock); | 2346 | spin_lock_init(&r8a66597->lock); |
| 2324 | init_timer(&r8a66597->rh_timer); | 2347 | init_timer(&r8a66597->rh_timer); |
| 2325 | r8a66597->rh_timer.function = r8a66597_timer; | 2348 | r8a66597->rh_timer.function = r8a66597_timer; |
| @@ -2365,11 +2388,18 @@ static int __init r8a66597_probe(struct platform_device *pdev) | |||
| 2365 | ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | irq_trigger); | 2388 | ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | irq_trigger); |
| 2366 | if (ret != 0) { | 2389 | if (ret != 0) { |
| 2367 | dev_err(&pdev->dev, "Failed to add hcd\n"); | 2390 | dev_err(&pdev->dev, "Failed to add hcd\n"); |
| 2368 | goto clean_up; | 2391 | goto clean_up3; |
| 2369 | } | 2392 | } |
| 2370 | 2393 | ||
| 2371 | return 0; | 2394 | return 0; |
| 2372 | 2395 | ||
| 2396 | clean_up3: | ||
| 2397 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) | ||
| 2398 | clk_put(r8a66597->clk); | ||
| 2399 | clean_up2: | ||
| 2400 | #endif | ||
| 2401 | usb_put_hcd(hcd); | ||
| 2402 | |||
| 2373 | clean_up: | 2403 | clean_up: |
| 2374 | if (reg) | 2404 | if (reg) |
| 2375 | iounmap(reg); | 2405 | iounmap(reg); |
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h index 84ee01417315..ecacde4d69b0 100644 --- a/drivers/usb/host/r8a66597.h +++ b/drivers/usb/host/r8a66597.h | |||
| @@ -26,6 +26,10 @@ | |||
| 26 | #ifndef __R8A66597_H__ | 26 | #ifndef __R8A66597_H__ |
| 27 | #define __R8A66597_H__ | 27 | #define __R8A66597_H__ |
| 28 | 28 | ||
| 29 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) | ||
| 30 | #include <linux/clk.h> | ||
| 31 | #endif | ||
| 32 | |||
| 29 | #define SYSCFG0 0x00 | 33 | #define SYSCFG0 0x00 |
| 30 | #define SYSCFG1 0x02 | 34 | #define SYSCFG1 0x02 |
| 31 | #define SYSSTS0 0x04 | 35 | #define SYSSTS0 0x04 |
| @@ -481,7 +485,9 @@ struct r8a66597_root_hub { | |||
| 481 | struct r8a66597 { | 485 | struct r8a66597 { |
| 482 | spinlock_t lock; | 486 | spinlock_t lock; |
| 483 | unsigned long reg; | 487 | unsigned long reg; |
| 484 | 488 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) | |
| 489 | struct clk *clk; | ||
| 490 | #endif | ||
| 485 | struct r8a66597_device device0; | 491 | struct r8a66597_device device0; |
| 486 | struct r8a66597_root_hub root_hub[R8A66597_MAX_ROOT_HUB]; | 492 | struct r8a66597_root_hub root_hub[R8A66597_MAX_ROOT_HUB]; |
| 487 | struct list_head pipe_queue[R8A66597_MAX_NUM_PIPE]; | 493 | struct list_head pipe_queue[R8A66597_MAX_NUM_PIPE]; |
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 3f3ce13fef43..d0c821992a99 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig | |||
| @@ -1889,10 +1889,11 @@ config FB_W100 | |||
| 1889 | config FB_SH_MOBILE_LCDC | 1889 | config FB_SH_MOBILE_LCDC |
| 1890 | tristate "SuperH Mobile LCDC framebuffer support" | 1890 | tristate "SuperH Mobile LCDC framebuffer support" |
| 1891 | depends on FB && SUPERH | 1891 | depends on FB && SUPERH |
| 1892 | select FB_CFB_FILLRECT | 1892 | select FB_SYS_FILLRECT |
| 1893 | select FB_CFB_COPYAREA | 1893 | select FB_SYS_COPYAREA |
| 1894 | select FB_CFB_IMAGEBLIT | 1894 | select FB_SYS_IMAGEBLIT |
| 1895 | default m | 1895 | select FB_SYS_FOPS |
| 1896 | select FB_DEFERRED_IO | ||
| 1896 | ---help--- | 1897 | ---help--- |
| 1897 | Frame buffer driver for the on-chip SH-Mobile LCD controller. | 1898 | Frame buffer driver for the on-chip SH-Mobile LCD controller. |
| 1898 | 1899 | ||
| @@ -2021,17 +2022,19 @@ config FB_COBALT | |||
| 2021 | depends on FB && MIPS_COBALT | 2022 | depends on FB && MIPS_COBALT |
| 2022 | 2023 | ||
| 2023 | config FB_SH7760 | 2024 | config FB_SH7760 |
| 2024 | bool "SH7760/SH7763 LCDC support" | 2025 | bool "SH7760/SH7763/SH7720/SH7721 LCDC support" |
| 2025 | depends on FB && (CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7763) | 2026 | depends on FB && (CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7763 \ |
| 2026 | select FB_CFB_FILLRECT | 2027 | || CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721) |
| 2027 | select FB_CFB_COPYAREA | 2028 | select FB_CFB_FILLRECT |
| 2028 | select FB_CFB_IMAGEBLIT | 2029 | select FB_CFB_COPYAREA |
| 2029 | help | 2030 | select FB_CFB_IMAGEBLIT |
| 2030 | Support for the SH7760/SH7763 integrated (D)STN/TFT LCD Controller. | 2031 | ---help--- |
| 2031 | Supports display resolutions up to 1024x1024 pixel, grayscale and | 2032 | Support for the SH7760/SH7763/SH7720/SH7721 integrated |
| 2032 | color operation, with depths ranging from 1 bpp to 8 bpp monochrome | 2033 | (D)STN/TFT LCD Controller. |
| 2033 | and 8, 15 or 16 bpp color; 90 degrees clockwise display rotation for | 2034 | Supports display resolutions up to 1024x1024 pixel, grayscale and |
| 2034 | panels <= 320 pixel horizontal resolution. | 2035 | color operation, with depths ranging from 1 bpp to 8 bpp monochrome |
| 2036 | and 8, 15 or 16 bpp color; 90 degrees clockwise display rotation for | ||
| 2037 | panels <= 320 pixel horizontal resolution. | ||
| 2035 | 2038 | ||
| 2036 | config FB_VIRTUAL | 2039 | config FB_VIRTUAL |
| 2037 | tristate "Virtual Frame Buffer support (ONLY FOR TESTING!)" | 2040 | tristate "Virtual Frame Buffer support (ONLY FOR TESTING!)" |
diff --git a/drivers/video/fb_defio.c b/drivers/video/fb_defio.c index 4835bdc4e9f1..082026546aee 100644 --- a/drivers/video/fb_defio.c +++ b/drivers/video/fb_defio.c | |||
| @@ -24,6 +24,19 @@ | |||
| 24 | #include <linux/rmap.h> | 24 | #include <linux/rmap.h> |
| 25 | #include <linux/pagemap.h> | 25 | #include <linux/pagemap.h> |
| 26 | 26 | ||
| 27 | struct page *fb_deferred_io_page(struct fb_info *info, unsigned long offs) | ||
| 28 | { | ||
| 29 | void *screen_base = (void __force *) info->screen_base; | ||
| 30 | struct page *page; | ||
| 31 | |||
| 32 | if (is_vmalloc_addr(screen_base + offs)) | ||
| 33 | page = vmalloc_to_page(screen_base + offs); | ||
| 34 | else | ||
| 35 | page = pfn_to_page((info->fix.smem_start + offs) >> PAGE_SHIFT); | ||
| 36 | |||
| 37 | return page; | ||
| 38 | } | ||
| 39 | |||
| 27 | /* this is to find and return the vmalloc-ed fb pages */ | 40 | /* this is to find and return the vmalloc-ed fb pages */ |
| 28 | static int fb_deferred_io_fault(struct vm_area_struct *vma, | 41 | static int fb_deferred_io_fault(struct vm_area_struct *vma, |
| 29 | struct vm_fault *vmf) | 42 | struct vm_fault *vmf) |
| @@ -31,14 +44,12 @@ static int fb_deferred_io_fault(struct vm_area_struct *vma, | |||
| 31 | unsigned long offset; | 44 | unsigned long offset; |
| 32 | struct page *page; | 45 | struct page *page; |
| 33 | struct fb_info *info = vma->vm_private_data; | 46 | struct fb_info *info = vma->vm_private_data; |
| 34 | /* info->screen_base is virtual memory */ | ||
| 35 | void *screen_base = (void __force *) info->screen_base; | ||
| 36 | 47 | ||
| 37 | offset = vmf->pgoff << PAGE_SHIFT; | 48 | offset = vmf->pgoff << PAGE_SHIFT; |
| 38 | if (offset >= info->fix.smem_len) | 49 | if (offset >= info->fix.smem_len) |
| 39 | return VM_FAULT_SIGBUS; | 50 | return VM_FAULT_SIGBUS; |
| 40 | 51 | ||
| 41 | page = vmalloc_to_page(screen_base + offset); | 52 | page = fb_deferred_io_page(info, offset); |
| 42 | if (!page) | 53 | if (!page) |
| 43 | return VM_FAULT_SIGBUS; | 54 | return VM_FAULT_SIGBUS; |
| 44 | 55 | ||
| @@ -60,6 +71,10 @@ int fb_deferred_io_fsync(struct file *file, struct dentry *dentry, int datasync) | |||
| 60 | { | 71 | { |
| 61 | struct fb_info *info = file->private_data; | 72 | struct fb_info *info = file->private_data; |
| 62 | 73 | ||
| 74 | /* Skip if deferred io is complied-in but disabled on this fbdev */ | ||
| 75 | if (!info->fbdefio) | ||
| 76 | return 0; | ||
| 77 | |||
| 63 | /* Kill off the delayed work */ | 78 | /* Kill off the delayed work */ |
| 64 | cancel_rearming_delayed_work(&info->deferred_work); | 79 | cancel_rearming_delayed_work(&info->deferred_work); |
| 65 | 80 | ||
| @@ -184,7 +199,6 @@ EXPORT_SYMBOL_GPL(fb_deferred_io_open); | |||
| 184 | 199 | ||
| 185 | void fb_deferred_io_cleanup(struct fb_info *info) | 200 | void fb_deferred_io_cleanup(struct fb_info *info) |
| 186 | { | 201 | { |
| 187 | void *screen_base = (void __force *) info->screen_base; | ||
| 188 | struct fb_deferred_io *fbdefio = info->fbdefio; | 202 | struct fb_deferred_io *fbdefio = info->fbdefio; |
| 189 | struct page *page; | 203 | struct page *page; |
| 190 | int i; | 204 | int i; |
| @@ -195,9 +209,12 @@ void fb_deferred_io_cleanup(struct fb_info *info) | |||
| 195 | 209 | ||
| 196 | /* clear out the mapping that we setup */ | 210 | /* clear out the mapping that we setup */ |
| 197 | for (i = 0 ; i < info->fix.smem_len; i += PAGE_SIZE) { | 211 | for (i = 0 ; i < info->fix.smem_len; i += PAGE_SIZE) { |
| 198 | page = vmalloc_to_page(screen_base + i); | 212 | page = fb_deferred_io_page(info, i); |
| 199 | page->mapping = NULL; | 213 | page->mapping = NULL; |
| 200 | } | 214 | } |
| 215 | |||
| 216 | info->fbops->fb_mmap = NULL; | ||
| 217 | mutex_destroy(&fbdefio->lock); | ||
| 201 | } | 218 | } |
| 202 | EXPORT_SYMBOL_GPL(fb_deferred_io_cleanup); | 219 | EXPORT_SYMBOL_GPL(fb_deferred_io_cleanup); |
| 203 | 220 | ||
diff --git a/drivers/video/sh7760fb.c b/drivers/video/sh7760fb.c index 8d0212da4514..653bdfee3057 100644 --- a/drivers/video/sh7760fb.c +++ b/drivers/video/sh7760fb.c | |||
| @@ -13,6 +13,8 @@ | |||
| 13 | * | 13 | * |
| 14 | * Thanks to Siegfried Schaefer <s.schaefer at schaefer-edv.de> | 14 | * Thanks to Siegfried Schaefer <s.schaefer at schaefer-edv.de> |
| 15 | * for his original source and testing! | 15 | * for his original source and testing! |
| 16 | * | ||
| 17 | * sh7760_setcolreg get from drivers/video/sh_mobile_lcdcfb.c | ||
| 16 | */ | 18 | */ |
| 17 | 19 | ||
| 18 | #include <linux/completion.h> | 20 | #include <linux/completion.h> |
| @@ -53,29 +55,6 @@ static irqreturn_t sh7760fb_irq(int irq, void *data) | |||
| 53 | return IRQ_HANDLED; | 55 | return IRQ_HANDLED; |
| 54 | } | 56 | } |
| 55 | 57 | ||
| 56 | static void sh7760fb_wait_vsync(struct fb_info *info) | ||
| 57 | { | ||
| 58 | struct sh7760fb_par *par = info->par; | ||
| 59 | |||
| 60 | if (par->pd->novsync) | ||
| 61 | return; | ||
| 62 | |||
| 63 | iowrite16(ioread16(par->base + LDINTR) & ~VINT_CHECK, | ||
| 64 | par->base + LDINTR); | ||
| 65 | |||
| 66 | if (par->irq < 0) { | ||
| 67 | /* poll for vert. retrace: status bit is sticky */ | ||
| 68 | while (!(ioread16(par->base + LDINTR) & VINT_CHECK)) | ||
| 69 | cpu_relax(); | ||
| 70 | } else { | ||
| 71 | /* a "wait_for_irq_event(par->irq)" would be extremely nice */ | ||
| 72 | init_completion(&par->vsync); | ||
| 73 | enable_irq(par->irq); | ||
| 74 | wait_for_completion(&par->vsync); | ||
| 75 | disable_irq_nosync(par->irq); | ||
| 76 | } | ||
| 77 | } | ||
| 78 | |||
| 79 | /* wait_for_lps - wait until power supply has reached a certain state. */ | 58 | /* wait_for_lps - wait until power supply has reached a certain state. */ |
| 80 | static int wait_for_lps(struct sh7760fb_par *par, int val) | 59 | static int wait_for_lps(struct sh7760fb_par *par, int val) |
| 81 | { | 60 | { |
| @@ -117,55 +96,28 @@ static int sh7760fb_blank(int blank, struct fb_info *info) | |||
| 117 | return wait_for_lps(par, lps); | 96 | return wait_for_lps(par, lps); |
| 118 | } | 97 | } |
| 119 | 98 | ||
| 120 | /* set color registers */ | 99 | static int sh7760_setcolreg (u_int regno, |
| 121 | static int sh7760fb_setcmap(struct fb_cmap *cmap, struct fb_info *info) | 100 | u_int red, u_int green, u_int blue, |
| 101 | u_int transp, struct fb_info *info) | ||
| 122 | { | 102 | { |
| 123 | struct sh7760fb_par *par = info->par; | 103 | u32 *palette = info->pseudo_palette; |
| 124 | u32 s = cmap->start; | ||
| 125 | u32 l = cmap->len; | ||
| 126 | u16 *r = cmap->red; | ||
| 127 | u16 *g = cmap->green; | ||
| 128 | u16 *b = cmap->blue; | ||
| 129 | u32 col, tmo; | ||
| 130 | int ret; | ||
| 131 | 104 | ||
| 132 | ret = 0; | 105 | if (regno >= 16) |
| 106 | return -EINVAL; | ||
| 133 | 107 | ||
| 134 | sh7760fb_wait_vsync(info); | 108 | /* only FB_VISUAL_TRUECOLOR supported */ |
| 135 | 109 | ||
| 136 | /* request palette access */ | 110 | red >>= 16 - info->var.red.length; |
| 137 | iowrite16(LDPALCR_PALEN, par->base + LDPALCR); | 111 | green >>= 16 - info->var.green.length; |
| 112 | blue >>= 16 - info->var.blue.length; | ||
| 113 | transp >>= 16 - info->var.transp.length; | ||
| 138 | 114 | ||
| 139 | /* poll for access grant */ | 115 | palette[regno] = (red << info->var.red.offset) | |
| 140 | tmo = 100; | 116 | (green << info->var.green.offset) | |
| 141 | while (!(ioread16(par->base + LDPALCR) & LDPALCR_PALS) && (--tmo)) | 117 | (blue << info->var.blue.offset) | |
| 142 | cpu_relax(); | 118 | (transp << info->var.transp.offset); |
| 143 | 119 | ||
| 144 | if (!tmo) { | 120 | return 0; |
| 145 | ret = 1; | ||
| 146 | dev_dbg(info->dev, "no palette access!\n"); | ||
| 147 | goto out; | ||
| 148 | } | ||
| 149 | |||
| 150 | while (l && (s < 256)) { | ||
| 151 | col = ((*r) & 0xff) << 16; | ||
| 152 | col |= ((*g) & 0xff) << 8; | ||
| 153 | col |= ((*b) & 0xff); | ||
| 154 | col &= SH7760FB_PALETTE_MASK; | ||
| 155 | iowrite32(col, par->base + LDPR(s)); | ||
| 156 | |||
| 157 | if (s < 16) | ||
| 158 | ((u32 *) (info->pseudo_palette))[s] = s; | ||
| 159 | |||
| 160 | s++; | ||
| 161 | l--; | ||
| 162 | r++; | ||
| 163 | g++; | ||
| 164 | b++; | ||
| 165 | } | ||
| 166 | out: | ||
| 167 | iowrite16(0, par->base + LDPALCR); | ||
| 168 | return ret; | ||
| 169 | } | 121 | } |
| 170 | 122 | ||
| 171 | static void encode_fix(struct fb_fix_screeninfo *fix, struct fb_info *info, | 123 | static void encode_fix(struct fb_fix_screeninfo *fix, struct fb_info *info, |
| @@ -406,7 +358,7 @@ static struct fb_ops sh7760fb_ops = { | |||
| 406 | .owner = THIS_MODULE, | 358 | .owner = THIS_MODULE, |
| 407 | .fb_blank = sh7760fb_blank, | 359 | .fb_blank = sh7760fb_blank, |
| 408 | .fb_check_var = sh7760fb_check_var, | 360 | .fb_check_var = sh7760fb_check_var, |
| 409 | .fb_setcmap = sh7760fb_setcmap, | 361 | .fb_setcolreg = sh7760_setcolreg, |
| 410 | .fb_set_par = sh7760fb_set_par, | 362 | .fb_set_par = sh7760fb_set_par, |
| 411 | .fb_fillrect = cfb_fillrect, | 363 | .fb_fillrect = cfb_fillrect, |
| 412 | .fb_copyarea = cfb_copyarea, | 364 | .fb_copyarea = cfb_copyarea, |
diff --git a/drivers/video/sh_mobile_lcdcfb.c b/drivers/video/sh_mobile_lcdcfb.c index efff672fd7b8..0e2b8fd24df1 100644 --- a/drivers/video/sh_mobile_lcdcfb.c +++ b/drivers/video/sh_mobile_lcdcfb.c | |||
| @@ -16,7 +16,9 @@ | |||
| 16 | #include <linux/clk.h> | 16 | #include <linux/clk.h> |
| 17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
| 18 | #include <linux/dma-mapping.h> | 18 | #include <linux/dma-mapping.h> |
| 19 | #include <linux/interrupt.h> | ||
| 19 | #include <video/sh_mobile_lcdc.h> | 20 | #include <video/sh_mobile_lcdc.h> |
| 21 | #include <asm/atomic.h> | ||
| 20 | 22 | ||
| 21 | #define PALETTE_NR 16 | 23 | #define PALETTE_NR 16 |
| 22 | 24 | ||
| @@ -30,11 +32,15 @@ struct sh_mobile_lcdc_chan { | |||
| 30 | u32 pseudo_palette[PALETTE_NR]; | 32 | u32 pseudo_palette[PALETTE_NR]; |
| 31 | struct fb_info info; | 33 | struct fb_info info; |
| 32 | dma_addr_t dma_handle; | 34 | dma_addr_t dma_handle; |
| 35 | struct fb_deferred_io defio; | ||
| 33 | }; | 36 | }; |
| 34 | 37 | ||
| 35 | struct sh_mobile_lcdc_priv { | 38 | struct sh_mobile_lcdc_priv { |
| 36 | void __iomem *base; | 39 | void __iomem *base; |
| 40 | int irq; | ||
| 37 | #ifdef CONFIG_HAVE_CLK | 41 | #ifdef CONFIG_HAVE_CLK |
| 42 | atomic_t clk_usecnt; | ||
| 43 | struct clk *dot_clk; | ||
| 38 | struct clk *clk; | 44 | struct clk *clk; |
| 39 | #endif | 45 | #endif |
| 40 | unsigned long lddckr; | 46 | unsigned long lddckr; |
| @@ -56,7 +62,7 @@ struct sh_mobile_lcdc_priv { | |||
| 56 | 62 | ||
| 57 | /* per-channel registers */ | 63 | /* per-channel registers */ |
| 58 | enum { LDDCKPAT1R, LDDCKPAT2R, LDMT1R, LDMT2R, LDMT3R, LDDFR, LDSM1R, | 64 | enum { LDDCKPAT1R, LDDCKPAT2R, LDMT1R, LDMT2R, LDMT3R, LDDFR, LDSM1R, |
| 59 | LDSA1R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR }; | 65 | LDSM2R, LDSA1R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR }; |
| 60 | 66 | ||
| 61 | static unsigned long lcdc_offs_mainlcd[] = { | 67 | static unsigned long lcdc_offs_mainlcd[] = { |
| 62 | [LDDCKPAT1R] = 0x400, | 68 | [LDDCKPAT1R] = 0x400, |
| @@ -66,6 +72,7 @@ static unsigned long lcdc_offs_mainlcd[] = { | |||
| 66 | [LDMT3R] = 0x420, | 72 | [LDMT3R] = 0x420, |
| 67 | [LDDFR] = 0x424, | 73 | [LDDFR] = 0x424, |
| 68 | [LDSM1R] = 0x428, | 74 | [LDSM1R] = 0x428, |
| 75 | [LDSM2R] = 0x42c, | ||
| 69 | [LDSA1R] = 0x430, | 76 | [LDSA1R] = 0x430, |
| 70 | [LDMLSR] = 0x438, | 77 | [LDMLSR] = 0x438, |
| 71 | [LDHCNR] = 0x448, | 78 | [LDHCNR] = 0x448, |
| @@ -83,6 +90,7 @@ static unsigned long lcdc_offs_sublcd[] = { | |||
| 83 | [LDMT3R] = 0x608, | 90 | [LDMT3R] = 0x608, |
| 84 | [LDDFR] = 0x60c, | 91 | [LDDFR] = 0x60c, |
| 85 | [LDSM1R] = 0x610, | 92 | [LDSM1R] = 0x610, |
| 93 | [LDSM2R] = 0x614, | ||
| 86 | [LDSA1R] = 0x618, | 94 | [LDSA1R] = 0x618, |
| 87 | [LDMLSR] = 0x620, | 95 | [LDMLSR] = 0x620, |
| 88 | [LDHCNR] = 0x624, | 96 | [LDHCNR] = 0x624, |
| @@ -96,6 +104,8 @@ static unsigned long lcdc_offs_sublcd[] = { | |||
| 96 | #define LCDC_RESET 0x00000100 | 104 | #define LCDC_RESET 0x00000100 |
| 97 | #define DISPLAY_BEU 0x00000008 | 105 | #define DISPLAY_BEU 0x00000008 |
| 98 | #define LCDC_ENABLE 0x00000001 | 106 | #define LCDC_ENABLE 0x00000001 |
| 107 | #define LDINTR_FE 0x00000400 | ||
| 108 | #define LDINTR_FS 0x00000004 | ||
| 99 | 109 | ||
| 100 | static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan, | 110 | static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan, |
| 101 | int reg_nr, unsigned long data) | 111 | int reg_nr, unsigned long data) |
| @@ -170,6 +180,65 @@ struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = { | |||
| 170 | lcdc_sys_read_data, | 180 | lcdc_sys_read_data, |
| 171 | }; | 181 | }; |
| 172 | 182 | ||
| 183 | #ifdef CONFIG_HAVE_CLK | ||
| 184 | static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) | ||
| 185 | { | ||
| 186 | if (atomic_inc_and_test(&priv->clk_usecnt)) { | ||
| 187 | clk_enable(priv->clk); | ||
| 188 | if (priv->dot_clk) | ||
| 189 | clk_enable(priv->dot_clk); | ||
| 190 | } | ||
| 191 | } | ||
| 192 | |||
| 193 | static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv) | ||
| 194 | { | ||
| 195 | if (atomic_sub_return(1, &priv->clk_usecnt) == -1) { | ||
| 196 | if (priv->dot_clk) | ||
| 197 | clk_disable(priv->dot_clk); | ||
| 198 | clk_disable(priv->clk); | ||
| 199 | } | ||
| 200 | } | ||
| 201 | #else | ||
| 202 | static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) {} | ||
| 203 | static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv) {} | ||
| 204 | #endif | ||
| 205 | |||
| 206 | static void sh_mobile_lcdc_deferred_io(struct fb_info *info, | ||
| 207 | struct list_head *pagelist) | ||
| 208 | { | ||
| 209 | struct sh_mobile_lcdc_chan *ch = info->par; | ||
| 210 | |||
| 211 | /* enable clocks before accessing hardware */ | ||
| 212 | sh_mobile_lcdc_clk_on(ch->lcdc); | ||
| 213 | |||
| 214 | /* trigger panel update */ | ||
| 215 | lcdc_write_chan(ch, LDSM2R, 1); | ||
| 216 | } | ||
| 217 | |||
| 218 | static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info) | ||
| 219 | { | ||
| 220 | struct fb_deferred_io *fbdefio = info->fbdefio; | ||
| 221 | |||
| 222 | if (fbdefio) | ||
| 223 | schedule_delayed_work(&info->deferred_work, fbdefio->delay); | ||
| 224 | } | ||
| 225 | |||
| 226 | static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data) | ||
| 227 | { | ||
| 228 | struct sh_mobile_lcdc_priv *priv = data; | ||
| 229 | unsigned long tmp; | ||
| 230 | |||
| 231 | /* acknowledge interrupt */ | ||
| 232 | tmp = lcdc_read(priv, _LDINTR); | ||
| 233 | tmp &= 0xffffff00; /* mask in high 24 bits */ | ||
| 234 | tmp |= 0x000000ff ^ LDINTR_FS; /* status in low 8 */ | ||
| 235 | lcdc_write(priv, _LDINTR, tmp); | ||
| 236 | |||
| 237 | /* disable clocks */ | ||
| 238 | sh_mobile_lcdc_clk_off(priv); | ||
| 239 | return IRQ_HANDLED; | ||
| 240 | } | ||
| 241 | |||
| 173 | static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv, | 242 | static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv, |
| 174 | int start) | 243 | int start) |
| 175 | { | 244 | { |
| @@ -207,6 +276,11 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv) | |||
| 207 | int k, m; | 276 | int k, m; |
| 208 | int ret = 0; | 277 | int ret = 0; |
| 209 | 278 | ||
| 279 | /* enable clocks before accessing the hardware */ | ||
| 280 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) | ||
| 281 | if (priv->ch[k].enabled) | ||
| 282 | sh_mobile_lcdc_clk_on(priv); | ||
| 283 | |||
| 210 | /* reset */ | 284 | /* reset */ |
| 211 | lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LCDC_RESET); | 285 | lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LCDC_RESET); |
| 212 | lcdc_wait_bit(priv, _LDCNT2R, LCDC_RESET, 0); | 286 | lcdc_wait_bit(priv, _LDCNT2R, LCDC_RESET, 0); |
| @@ -249,7 +323,7 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv) | |||
| 249 | lcdc_write(priv, _LDDCKSTPR, 0); | 323 | lcdc_write(priv, _LDDCKSTPR, 0); |
| 250 | lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0); | 324 | lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0); |
| 251 | 325 | ||
| 252 | /* interrupts are disabled */ | 326 | /* interrupts are disabled to begin with */ |
| 253 | lcdc_write(priv, _LDINTR, 0); | 327 | lcdc_write(priv, _LDINTR, 0); |
| 254 | 328 | ||
| 255 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { | 329 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { |
| @@ -310,9 +384,6 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv) | |||
| 310 | return ret; | 384 | return ret; |
| 311 | } | 385 | } |
| 312 | 386 | ||
| 313 | /* --- display_lcdc_data() --- */ | ||
| 314 | lcdc_write(priv, _LDINTR, 0x00000f00); | ||
| 315 | |||
| 316 | /* word and long word swap */ | 387 | /* word and long word swap */ |
| 317 | lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 6); | 388 | lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 6); |
| 318 | 389 | ||
| @@ -334,8 +405,24 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv) | |||
| 334 | /* set line size */ | 405 | /* set line size */ |
| 335 | lcdc_write_chan(ch, LDMLSR, ch->info.fix.line_length); | 406 | lcdc_write_chan(ch, LDMLSR, ch->info.fix.line_length); |
| 336 | 407 | ||
| 337 | /* continuous read mode */ | 408 | /* setup deferred io if SYS bus */ |
| 338 | lcdc_write_chan(ch, LDSM1R, 0); | 409 | tmp = ch->cfg.sys_bus_cfg.deferred_io_msec; |
| 410 | if (ch->ldmt1r_value & (1 << 12) && tmp) { | ||
| 411 | ch->defio.deferred_io = sh_mobile_lcdc_deferred_io; | ||
| 412 | ch->defio.delay = msecs_to_jiffies(tmp); | ||
| 413 | ch->info.fbdefio = &ch->defio; | ||
| 414 | fb_deferred_io_init(&ch->info); | ||
| 415 | |||
| 416 | /* one-shot mode */ | ||
| 417 | lcdc_write_chan(ch, LDSM1R, 1); | ||
| 418 | |||
| 419 | /* enable "Frame End Interrupt Enable" bit */ | ||
| 420 | lcdc_write(priv, _LDINTR, LDINTR_FE); | ||
| 421 | |||
| 422 | } else { | ||
| 423 | /* continuous read mode */ | ||
| 424 | lcdc_write_chan(ch, LDSM1R, 0); | ||
| 425 | } | ||
| 339 | } | 426 | } |
| 340 | 427 | ||
| 341 | /* display output */ | 428 | /* display output */ |
| @@ -359,6 +446,7 @@ static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv) | |||
| 359 | { | 446 | { |
| 360 | struct sh_mobile_lcdc_chan *ch; | 447 | struct sh_mobile_lcdc_chan *ch; |
| 361 | struct sh_mobile_lcdc_board_cfg *board_cfg; | 448 | struct sh_mobile_lcdc_board_cfg *board_cfg; |
| 449 | unsigned long tmp; | ||
| 362 | int k; | 450 | int k; |
| 363 | 451 | ||
| 364 | /* tell the board code to disable the panel */ | 452 | /* tell the board code to disable the panel */ |
| @@ -367,10 +455,22 @@ static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv) | |||
| 367 | board_cfg = &ch->cfg.board_cfg; | 455 | board_cfg = &ch->cfg.board_cfg; |
| 368 | if (board_cfg->display_off) | 456 | if (board_cfg->display_off) |
| 369 | board_cfg->display_off(board_cfg->board_data); | 457 | board_cfg->display_off(board_cfg->board_data); |
| 458 | |||
| 459 | /* cleanup deferred io if SYS bus */ | ||
| 460 | tmp = ch->cfg.sys_bus_cfg.deferred_io_msec; | ||
| 461 | if (ch->ldmt1r_value & (1 << 12) && tmp) { | ||
| 462 | fb_deferred_io_cleanup(&ch->info); | ||
| 463 | ch->info.fbdefio = NULL; | ||
| 464 | } | ||
| 370 | } | 465 | } |
| 371 | 466 | ||
| 372 | /* stop the lcdc */ | 467 | /* stop the lcdc */ |
| 373 | sh_mobile_lcdc_start_stop(priv, 0); | 468 | sh_mobile_lcdc_start_stop(priv, 0); |
| 469 | |||
| 470 | /* stop clocks */ | ||
| 471 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) | ||
| 472 | if (priv->ch[k].enabled) | ||
| 473 | sh_mobile_lcdc_clk_off(priv); | ||
| 374 | } | 474 | } |
| 375 | 475 | ||
| 376 | static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch) | 476 | static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch) |
| @@ -413,9 +513,13 @@ static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch) | |||
| 413 | return -EINVAL; | 513 | return -EINVAL; |
| 414 | } | 514 | } |
| 415 | 515 | ||
| 416 | static int sh_mobile_lcdc_setup_clocks(struct device *dev, int clock_source, | 516 | static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev, |
| 517 | int clock_source, | ||
| 417 | struct sh_mobile_lcdc_priv *priv) | 518 | struct sh_mobile_lcdc_priv *priv) |
| 418 | { | 519 | { |
| 520 | #ifdef CONFIG_HAVE_CLK | ||
| 521 | char clk_name[8]; | ||
| 522 | #endif | ||
| 419 | char *str; | 523 | char *str; |
| 420 | int icksel; | 524 | int icksel; |
| 421 | 525 | ||
| @@ -430,14 +534,21 @@ static int sh_mobile_lcdc_setup_clocks(struct device *dev, int clock_source, | |||
| 430 | priv->lddckr = icksel << 16; | 534 | priv->lddckr = icksel << 16; |
| 431 | 535 | ||
| 432 | #ifdef CONFIG_HAVE_CLK | 536 | #ifdef CONFIG_HAVE_CLK |
| 537 | atomic_set(&priv->clk_usecnt, -1); | ||
| 538 | snprintf(clk_name, sizeof(clk_name), "lcdc%d", pdev->id); | ||
| 539 | priv->clk = clk_get(&pdev->dev, clk_name); | ||
| 540 | if (IS_ERR(priv->clk)) { | ||
| 541 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); | ||
| 542 | return PTR_ERR(priv->clk); | ||
| 543 | } | ||
| 544 | |||
| 433 | if (str) { | 545 | if (str) { |
| 434 | priv->clk = clk_get(dev, str); | 546 | priv->dot_clk = clk_get(&pdev->dev, str); |
| 435 | if (IS_ERR(priv->clk)) { | 547 | if (IS_ERR(priv->dot_clk)) { |
| 436 | dev_err(dev, "cannot get clock %s\n", str); | 548 | dev_err(&pdev->dev, "cannot get dot clock %s\n", str); |
| 437 | return PTR_ERR(priv->clk); | 549 | clk_put(priv->clk); |
| 550 | return PTR_ERR(priv->dot_clk); | ||
| 438 | } | 551 | } |
| 439 | |||
| 440 | clk_enable(priv->clk); | ||
| 441 | } | 552 | } |
| 442 | #endif | 553 | #endif |
| 443 | 554 | ||
| @@ -475,11 +586,34 @@ static struct fb_fix_screeninfo sh_mobile_lcdc_fix = { | |||
| 475 | .accel = FB_ACCEL_NONE, | 586 | .accel = FB_ACCEL_NONE, |
| 476 | }; | 587 | }; |
| 477 | 588 | ||
| 589 | static void sh_mobile_lcdc_fillrect(struct fb_info *info, | ||
| 590 | const struct fb_fillrect *rect) | ||
| 591 | { | ||
| 592 | sys_fillrect(info, rect); | ||
| 593 | sh_mobile_lcdc_deferred_io_touch(info); | ||
| 594 | } | ||
| 595 | |||
| 596 | static void sh_mobile_lcdc_copyarea(struct fb_info *info, | ||
| 597 | const struct fb_copyarea *area) | ||
| 598 | { | ||
| 599 | sys_copyarea(info, area); | ||
| 600 | sh_mobile_lcdc_deferred_io_touch(info); | ||
| 601 | } | ||
| 602 | |||
| 603 | static void sh_mobile_lcdc_imageblit(struct fb_info *info, | ||
| 604 | const struct fb_image *image) | ||
| 605 | { | ||
| 606 | sys_imageblit(info, image); | ||
| 607 | sh_mobile_lcdc_deferred_io_touch(info); | ||
| 608 | } | ||
| 609 | |||
| 478 | static struct fb_ops sh_mobile_lcdc_ops = { | 610 | static struct fb_ops sh_mobile_lcdc_ops = { |
| 479 | .fb_setcolreg = sh_mobile_lcdc_setcolreg, | 611 | .fb_setcolreg = sh_mobile_lcdc_setcolreg, |
| 480 | .fb_fillrect = cfb_fillrect, | 612 | .fb_read = fb_sys_read, |
| 481 | .fb_copyarea = cfb_copyarea, | 613 | .fb_write = fb_sys_write, |
| 482 | .fb_imageblit = cfb_imageblit, | 614 | .fb_fillrect = sh_mobile_lcdc_fillrect, |
| 615 | .fb_copyarea = sh_mobile_lcdc_copyarea, | ||
| 616 | .fb_imageblit = sh_mobile_lcdc_imageblit, | ||
| 483 | }; | 617 | }; |
| 484 | 618 | ||
| 485 | static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp) | 619 | static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp) |
| @@ -540,8 +674,9 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev) | |||
| 540 | } | 674 | } |
| 541 | 675 | ||
| 542 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 676 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 543 | if (res == NULL) { | 677 | i = platform_get_irq(pdev, 0); |
| 544 | dev_err(&pdev->dev, "cannot find IO resource\n"); | 678 | if (!res || i < 0) { |
| 679 | dev_err(&pdev->dev, "cannot get platform resources\n"); | ||
| 545 | error = -ENOENT; | 680 | error = -ENOENT; |
| 546 | goto err0; | 681 | goto err0; |
| 547 | } | 682 | } |
| @@ -553,6 +688,14 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev) | |||
| 553 | goto err0; | 688 | goto err0; |
| 554 | } | 689 | } |
| 555 | 690 | ||
| 691 | error = request_irq(i, sh_mobile_lcdc_irq, IRQF_DISABLED, | ||
| 692 | pdev->dev.bus_id, priv); | ||
| 693 | if (error) { | ||
| 694 | dev_err(&pdev->dev, "unable to request irq\n"); | ||
| 695 | goto err1; | ||
| 696 | } | ||
| 697 | |||
| 698 | priv->irq = i; | ||
| 556 | platform_set_drvdata(pdev, priv); | 699 | platform_set_drvdata(pdev, priv); |
| 557 | pdata = pdev->dev.platform_data; | 700 | pdata = pdev->dev.platform_data; |
| 558 | 701 | ||
| @@ -587,8 +730,7 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev) | |||
| 587 | goto err1; | 730 | goto err1; |
| 588 | } | 731 | } |
| 589 | 732 | ||
| 590 | error = sh_mobile_lcdc_setup_clocks(&pdev->dev, | 733 | error = sh_mobile_lcdc_setup_clocks(pdev, pdata->clock_source, priv); |
| 591 | pdata->clock_source, priv); | ||
| 592 | if (error) { | 734 | if (error) { |
| 593 | dev_err(&pdev->dev, "unable to setup clocks\n"); | 735 | dev_err(&pdev->dev, "unable to setup clocks\n"); |
| 594 | goto err1; | 736 | goto err1; |
| @@ -637,6 +779,7 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev) | |||
| 637 | info->fix.smem_start = priv->ch[i].dma_handle; | 779 | info->fix.smem_start = priv->ch[i].dma_handle; |
| 638 | info->screen_base = buf; | 780 | info->screen_base = buf; |
| 639 | info->device = &pdev->dev; | 781 | info->device = &pdev->dev; |
| 782 | info->par = &priv->ch[i]; | ||
| 640 | } | 783 | } |
| 641 | 784 | ||
| 642 | if (error) | 785 | if (error) |
| @@ -664,6 +807,10 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev) | |||
| 664 | (int) priv->ch[i].cfg.lcd_cfg.xres, | 807 | (int) priv->ch[i].cfg.lcd_cfg.xres, |
| 665 | (int) priv->ch[i].cfg.lcd_cfg.yres, | 808 | (int) priv->ch[i].cfg.lcd_cfg.yres, |
| 666 | priv->ch[i].cfg.bpp); | 809 | priv->ch[i].cfg.bpp); |
| 810 | |||
| 811 | /* deferred io mode: disable clock to save power */ | ||
| 812 | if (info->fbdefio) | ||
| 813 | sh_mobile_lcdc_clk_off(priv); | ||
| 667 | } | 814 | } |
| 668 | 815 | ||
| 669 | return 0; | 816 | return 0; |
| @@ -697,15 +844,16 @@ static int sh_mobile_lcdc_remove(struct platform_device *pdev) | |||
| 697 | } | 844 | } |
| 698 | 845 | ||
| 699 | #ifdef CONFIG_HAVE_CLK | 846 | #ifdef CONFIG_HAVE_CLK |
| 700 | if (priv->clk) { | 847 | if (priv->dot_clk) |
| 701 | clk_disable(priv->clk); | 848 | clk_put(priv->dot_clk); |
| 702 | clk_put(priv->clk); | 849 | clk_put(priv->clk); |
| 703 | } | ||
| 704 | #endif | 850 | #endif |
| 705 | 851 | ||
| 706 | if (priv->base) | 852 | if (priv->base) |
| 707 | iounmap(priv->base); | 853 | iounmap(priv->base); |
| 708 | 854 | ||
| 855 | if (priv->irq) | ||
| 856 | free_irq(priv->irq, priv); | ||
| 709 | kfree(priv); | 857 | kfree(priv); |
| 710 | return 0; | 858 | return 0; |
| 711 | } | 859 | } |
diff --git a/include/linux/fb.h b/include/linux/fb.h index 75a81eaf3430..1ee63df5be92 100644 --- a/include/linux/fb.h +++ b/include/linux/fb.h | |||
| @@ -888,7 +888,7 @@ struct fb_info { | |||
| 888 | #define fb_writeq sbus_writeq | 888 | #define fb_writeq sbus_writeq |
| 889 | #define fb_memset sbus_memset_io | 889 | #define fb_memset sbus_memset_io |
| 890 | 890 | ||
| 891 | #elif defined(__i386__) || defined(__alpha__) || defined(__x86_64__) || defined(__hppa__) || (defined(__sh__) && !defined(__SH5__)) || defined(__powerpc__) || defined(__avr32__) | 891 | #elif defined(__i386__) || defined(__alpha__) || defined(__x86_64__) || defined(__hppa__) || defined(__sh__) || defined(__powerpc__) || defined(__avr32__) |
| 892 | 892 | ||
| 893 | #define fb_readb __raw_readb | 893 | #define fb_readb __raw_readb |
| 894 | #define fb_readw __raw_readw | 894 | #define fb_readw __raw_readw |
diff --git a/include/video/sh_mobile_lcdc.h b/include/video/sh_mobile_lcdc.h index 1a4bc6ada606..25144ab22b95 100644 --- a/include/video/sh_mobile_lcdc.h +++ b/include/video/sh_mobile_lcdc.h | |||
| @@ -37,6 +37,7 @@ enum { LCDC_CLK_BUS, LCDC_CLK_PERIPHERAL, LCDC_CLK_EXTERNAL }; | |||
| 37 | struct sh_mobile_lcdc_sys_bus_cfg { | 37 | struct sh_mobile_lcdc_sys_bus_cfg { |
| 38 | unsigned long ldmt2r; | 38 | unsigned long ldmt2r; |
| 39 | unsigned long ldmt3r; | 39 | unsigned long ldmt3r; |
| 40 | unsigned long deferred_io_msec; | ||
| 40 | }; | 41 | }; |
| 41 | 42 | ||
| 42 | struct sh_mobile_lcdc_sys_bus_ops { | 43 | struct sh_mobile_lcdc_sys_bus_ops { |
diff --git a/scripts/recordmcount.pl b/scripts/recordmcount.pl index 6b9fe3eb8360..c67cec8e90f4 100755 --- a/scripts/recordmcount.pl +++ b/scripts/recordmcount.pl | |||
| @@ -167,6 +167,17 @@ if ($arch eq "x86_64") { | |||
| 167 | $objcopy .= " -O elf32-i386"; | 167 | $objcopy .= " -O elf32-i386"; |
| 168 | $cc .= " -m32"; | 168 | $cc .= " -m32"; |
| 169 | 169 | ||
| 170 | } elsif ($arch eq "sh") { | ||
| 171 | $section_regex = "Disassembly of section\\s+(\\S+):"; | ||
| 172 | $function_regex = "^([0-9a-fA-F]+)\\s+<(.*?)>:"; | ||
| 173 | $mcount_regex = "^\\s*([0-9a-fA-F]+):.*\\smcount\$"; | ||
| 174 | $type = ".long"; | ||
| 175 | |||
| 176 | # force flags for this arch | ||
| 177 | $ld .= " -m shlelf_linux"; | ||
| 178 | $objcopy .= " -O elf32-sh-linux"; | ||
| 179 | $cc .= " -m32"; | ||
| 180 | |||
| 170 | } else { | 181 | } else { |
| 171 | die "Arch $arch is not supported with CONFIG_FTRACE_MCOUNT_RECORD"; | 182 | die "Arch $arch is not supported with CONFIG_FTRACE_MCOUNT_RECORD"; |
| 172 | } | 183 | } |
