diff options
| -rw-r--r-- | drivers/ata/pata_at91.c | 67 |
1 files changed, 36 insertions, 31 deletions
diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c index 8561a9f195c1..5702affcb325 100644 --- a/drivers/ata/pata_at91.c +++ b/drivers/ata/pata_at91.c | |||
| @@ -26,9 +26,7 @@ | |||
| 26 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
| 27 | #include <linux/ata_platform.h> | 27 | #include <linux/ata_platform.h> |
| 28 | 28 | ||
| 29 | #include <mach/at91sam9260_matrix.h> | ||
| 30 | #include <mach/at91sam9_smc.h> | 29 | #include <mach/at91sam9_smc.h> |
| 31 | #include <mach/at91sam9260.h> | ||
| 32 | #include <mach/board.h> | 30 | #include <mach/board.h> |
| 33 | #include <mach/gpio.h> | 31 | #include <mach/gpio.h> |
| 34 | 32 | ||
| @@ -44,65 +42,62 @@ struct at91_ide_info { | |||
| 44 | unsigned long mode; | 42 | unsigned long mode; |
| 45 | unsigned int cs; | 43 | unsigned int cs; |
| 46 | 44 | ||
| 45 | struct clk *mck; | ||
| 46 | |||
| 47 | void __iomem *ide_addr; | 47 | void __iomem *ide_addr; |
| 48 | void __iomem *alt_addr; | 48 | void __iomem *alt_addr; |
| 49 | }; | 49 | }; |
| 50 | 50 | ||
| 51 | const struct ata_timing initial_timing = | 51 | static const struct ata_timing initial_timing = |
| 52 | {XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0}; | 52 | {XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0}; |
| 53 | 53 | ||
| 54 | static unsigned int calc_mck_cycles(unsigned int ns, unsigned int mck_hz) | 54 | static unsigned long calc_mck_cycles(unsigned long ns, unsigned long mck_hz) |
| 55 | { | 55 | { |
| 56 | unsigned long mul; | 56 | unsigned long mul; |
| 57 | 57 | ||
| 58 | /* | 58 | /* |
| 59 | * cycles = x [nsec] * f [Hz] / 10^9 [ns in sec] = | 59 | * cycles = x [nsec] * f [Hz] / 10^9 [ns in sec] = |
| 60 | * x * (f / 1_000_000_000) = | 60 | * x * (f / 1_000_000_000) = |
| 61 | * x * ((f * 65536) / 1_000_000_000) / 65536 = | 61 | * x * ((f * 65536) / 1_000_000_000) / 65536 = |
| 62 | * x * (((f / 10_000) * 65536) / 100_000) / 65536 = | 62 | * x * (((f / 10_000) * 65536) / 100_000) / 65536 = |
| 63 | */ | 63 | */ |
| 64 | 64 | ||
| 65 | mul = (mck_hz / 10000) << 16; | 65 | mul = (mck_hz / 10000) << 16; |
| 66 | mul /= 100000; | 66 | mul /= 100000; |
| 67 | 67 | ||
| 68 | return (ns * mul + 65536) >> 16; /* rounding */ | 68 | return (ns * mul + 65536) >> 16; /* rounding */ |
| 69 | } | 69 | } |
| 70 | 70 | ||
| 71 | static void set_smc_mode(struct at91_ide_info *info) | 71 | static void set_smc_mode(struct at91_ide_info *info) |
| 72 | { | 72 | { |
| 73 | at91_sys_write(AT91_SMC_MODE(info->cs), info->mode); | 73 | at91_sys_write(AT91_SMC_MODE(info->cs), info->mode); |
| 74 | return; | 74 | return; |
| 75 | } | 75 | } |
| 76 | 76 | ||
| 77 | static void set_smc_timing(struct device *dev, | 77 | static void set_smc_timing(struct device *dev, |
| 78 | struct at91_ide_info *info, const struct ata_timing *ata) | 78 | struct at91_ide_info *info, const struct ata_timing *ata) |
| 79 | { | 79 | { |
| 80 | int read_cycle, write_cycle, active, recover; | 80 | unsigned long read_cycle, write_cycle, active, recover; |
| 81 | int nrd_setup, nrd_pulse, nrd_recover; | 81 | unsigned long nrd_setup, nrd_pulse, nrd_recover; |
| 82 | int nwe_setup, nwe_pulse; | 82 | unsigned long nwe_setup, nwe_pulse; |
| 83 | 83 | ||
| 84 | int ncs_write_setup, ncs_write_pulse; | 84 | unsigned long ncs_write_setup, ncs_write_pulse; |
| 85 | int ncs_read_setup, ncs_read_pulse; | 85 | unsigned long ncs_read_setup, ncs_read_pulse; |
| 86 | 86 | ||
| 87 | unsigned int mck_hz; | 87 | unsigned long mck_hz; |
| 88 | struct clk *mck; | ||
| 89 | 88 | ||
| 90 | read_cycle = ata->cyc8b; | 89 | read_cycle = ata->cyc8b; |
| 91 | nrd_setup = ata->setup; | 90 | nrd_setup = ata->setup; |
| 92 | nrd_pulse = ata->act8b; | 91 | nrd_pulse = ata->act8b; |
| 93 | nrd_recover = ata->rec8b; | 92 | nrd_recover = ata->rec8b; |
| 94 | 93 | ||
| 95 | mck = clk_get(NULL, "mck"); | 94 | mck_hz = clk_get_rate(info->mck); |
| 96 | BUG_ON(IS_ERR(mck)); | ||
| 97 | mck_hz = clk_get_rate(mck); | ||
| 98 | 95 | ||
| 99 | read_cycle = calc_mck_cycles(read_cycle, mck_hz); | 96 | read_cycle = calc_mck_cycles(read_cycle, mck_hz); |
| 100 | nrd_setup = calc_mck_cycles(nrd_setup, mck_hz); | 97 | nrd_setup = calc_mck_cycles(nrd_setup, mck_hz); |
| 101 | nrd_pulse = calc_mck_cycles(nrd_pulse, mck_hz); | 98 | nrd_pulse = calc_mck_cycles(nrd_pulse, mck_hz); |
| 102 | nrd_recover = calc_mck_cycles(nrd_recover, mck_hz); | 99 | nrd_recover = calc_mck_cycles(nrd_recover, mck_hz); |
| 103 | 100 | ||
| 104 | clk_put(mck); | ||
| 105 | |||
| 106 | active = nrd_setup + nrd_pulse; | 101 | active = nrd_setup + nrd_pulse; |
| 107 | recover = read_cycle - active; | 102 | recover = read_cycle - active; |
| 108 | 103 | ||
| @@ -121,13 +116,13 @@ static void set_smc_timing(struct device *dev, | |||
| 121 | ncs_write_setup = ncs_read_setup; | 116 | ncs_write_setup = ncs_read_setup; |
| 122 | ncs_write_pulse = ncs_read_pulse; | 117 | ncs_write_pulse = ncs_read_pulse; |
| 123 | 118 | ||
| 124 | dev_dbg(dev, "ATA timings: nrd_setup = %d nrd_pulse = %d nrd_cycle = %d\n", | 119 | dev_dbg(dev, "ATA timings: nrd_setup = %lu nrd_pulse = %lu nrd_cycle = %lu\n", |
| 125 | nrd_setup, nrd_pulse, read_cycle); | 120 | nrd_setup, nrd_pulse, read_cycle); |
| 126 | dev_dbg(dev, "ATA timings: nwe_setup = %d nwe_pulse = %d nwe_cycle = %d\n", | 121 | dev_dbg(dev, "ATA timings: nwe_setup = %lu nwe_pulse = %lu nwe_cycle = %lu\n", |
| 127 | nwe_setup, nwe_pulse, write_cycle); | 122 | nwe_setup, nwe_pulse, write_cycle); |
| 128 | dev_dbg(dev, "ATA timings: ncs_read_setup = %d ncs_read_pulse = %d\n", | 123 | dev_dbg(dev, "ATA timings: ncs_read_setup = %lu ncs_read_pulse = %lu\n", |
| 129 | ncs_read_setup, ncs_read_pulse); | 124 | ncs_read_setup, ncs_read_pulse); |
| 130 | dev_dbg(dev, "ATA timings: ncs_write_setup = %d ncs_write_pulse = %d\n", | 125 | dev_dbg(dev, "ATA timings: ncs_write_setup = %lu ncs_write_pulse = %lu\n", |
| 131 | ncs_write_setup, ncs_write_pulse); | 126 | ncs_write_setup, ncs_write_pulse); |
| 132 | 127 | ||
| 133 | at91_sys_write(AT91_SMC_SETUP(info->cs), | 128 | at91_sys_write(AT91_SMC_SETUP(info->cs), |
| @@ -217,6 +212,7 @@ static int __devinit pata_at91_probe(struct platform_device *pdev) | |||
| 217 | struct resource *mem_res; | 212 | struct resource *mem_res; |
| 218 | struct ata_host *host; | 213 | struct ata_host *host; |
| 219 | struct ata_port *ap; | 214 | struct ata_port *ap; |
| 215 | |||
| 220 | int irq_flags = 0; | 216 | int irq_flags = 0; |
| 221 | int irq = 0; | 217 | int irq = 0; |
| 222 | int ret; | 218 | int ret; |
| @@ -261,6 +257,13 @@ static int __devinit pata_at91_probe(struct platform_device *pdev) | |||
| 261 | return -ENOMEM; | 257 | return -ENOMEM; |
| 262 | } | 258 | } |
| 263 | 259 | ||
| 260 | info->mck = clk_get(NULL, "mck"); | ||
| 261 | |||
| 262 | if (IS_ERR(info->mck)) { | ||
| 263 | dev_err(dev, "failed to get access to mck clock\n"); | ||
| 264 | return -ENODEV; | ||
| 265 | } | ||
| 266 | |||
| 264 | info->cs = board->chipselect; | 267 | info->cs = board->chipselect; |
| 265 | info->mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | | 268 | info->mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | |
| 266 | AT91_SMC_EXNWMODE_READY | AT91_SMC_BAT_SELECT | | 269 | AT91_SMC_EXNWMODE_READY | AT91_SMC_BAT_SELECT | |
| @@ -304,6 +307,7 @@ err_alt_ioremap: | |||
| 304 | devm_iounmap(dev, info->ide_addr); | 307 | devm_iounmap(dev, info->ide_addr); |
| 305 | 308 | ||
| 306 | err_ide_ioremap: | 309 | err_ide_ioremap: |
| 310 | clk_put(info->mck); | ||
| 307 | kfree(info); | 311 | kfree(info); |
| 308 | 312 | ||
| 309 | return ret; | 313 | return ret; |
| @@ -326,6 +330,7 @@ static int __devexit pata_at91_remove(struct platform_device *pdev) | |||
| 326 | 330 | ||
| 327 | devm_iounmap(dev, info->ide_addr); | 331 | devm_iounmap(dev, info->ide_addr); |
| 328 | devm_iounmap(dev, info->alt_addr); | 332 | devm_iounmap(dev, info->alt_addr); |
| 333 | clk_put(info->mck); | ||
| 329 | 334 | ||
| 330 | kfree(info); | 335 | kfree(info); |
| 331 | return 0; | 336 | return 0; |
